; -------------------------------------------------------------------------------- ; @Title: STM32MP2 On-Chip Peripherals ; @Props: Released ; @Author: NEJ ; @Changelog: 2024-12-03 NEJ ; @Manufacturer: STM - ST Microelectronics N.V. ; @Doc: Generated (TRACE32, build: 174943.), based on: ; STM32MP25_CA35.svd (Ver. 1.0), STM32MP25_CM0P.svd (Ver. 1.0), ; STM32MP25_CM33.svd (Ver. 1.0) ; @Core: Cortex-A35, Cortex-M0+, Cortex-M33F ; @Chip: STM32MP251A-CA35, STM32MP251A-CM33F, STM32MP251A-CM0+, ; STM32MP251C-CA35, STM32MP251C-CM33F, STM32MP251C-CM0+, ; STM32MP251D-CA35, STM32MP251D-CM33F, STM32MP251D-CM0+, ; STM32MP251F-CA35, STM32MP251F-CM33F, STM32MP251F-CM0+, ; STM32MP253A-CA35, STM32MP253A-CM33F, STM32MP253A-CM0+, ; STM32MP253C-CA35, STM32MP253C-CM33F, STM32MP253C-CM0+, ; STM32MP253D-CA35, STM32MP253D-CM33F, STM32MP253D-CM0+, ; STM32MP253F-CA35, STM32MP253F-CM33F, STM32MP253F-CM0+, ; STM32MP255A-CA35, STM32MP255A-CM33F, STM32MP255A-CM0+, ; STM32MP255C-CA35, STM32MP255C-CM33F, STM32MP255C-CM0+, ; STM32MP255D-CA35, STM32MP255D-CM33F, STM32MP255D-CM0+, ; STM32MP255F-CA35, STM32MP255F-CM33F, STM32MP255F-CM0+, ; STM32MP257A-CA35, STM32MP257A-CM33F, STM32MP257A-CM0+, ; STM32MP257C-CA35, STM32MP257C-CM33F, STM32MP257C-CM0+, ; STM32MP257D-CA35, STM32MP257D-CM33F, STM32MP257D-CM0+, ; STM32MP257F-CA35, STM32MP257F-CM33F, STM32MP257F-CM0+ ; @Copyright: (C) 1989-2025 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perstm32mp2.per 19030 2025-02-12 12:00:43Z pegold $ AUTOINDENT.ON CENTER TREE ENUMDELIMITER "," base ad:0x0 sif (CORENAME()=="CORTEXM33F") tree.close "Core Registers (Cortex-M33F)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 12. group.long 0x08++0x03 line.long 0x00 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 29. " EXTEXCLALL ,Allows external exclusive operations to be used in a configuration with no MPU" "No,Yes" bitfld.long 0x00 12. " DISITMATBFLUSH ,Disables ITM and DWT ATB flush" "No,Yes" bitfld.long 0x00 10. " FPEXCODIS ,Disables FPU exception outputs" "No,Yes" textline " " bitfld.long 0x00 9. " DISOOFP ,Disables floating-point" "No,Yes" bitfld.long 0x00 2. " DISFOLD ,Disables dual-issue functionality" "No,Yes" bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle" "No,Yes" group.long 0x0C++0x0F line.long 0x00 "CPPWR,Coprocessor Power Control Register" bitfld.long 0x00 21. " SUS10 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 20. " SU10 ,This bit indicates and allows modification of whether the state associated with the floating point unit is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 15. " SUS7 ,State unknown Secure only" "Both states,Secure only" textline " " bitfld.long 0x00 14. " SU7 ,This bit indicates and allows modification of whether the state associated with the coprocessor 7 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 13. " SUS6 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 12. " SU6 ,This bit indicates and allows modification of whether the state associated with the coprocessor 6 is permitted to become UNKNOWN" "Not permitted,Permitted" textline " " bitfld.long 0x00 11. " SUS5 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 10. " SU5 ,This bit indicates and allows modification of whether the state associated with the coprocessor 5 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 9. " SUS4 ,State unknown Secure only" "Both states,Secure only" textline " " bitfld.long 0x00 8. " SU4 ,This bit indicates and allows modification of whether the state associated with the coprocessor 4 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 7. " SUS3 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 6. " SU3 ,This bit indicates and allows modification of whether the state associated with the coprocessor 3 is permitted to become UNKNOWN" "Not permitted,Permitted" textline " " bitfld.long 0x00 5. " SUS2 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 4. " SU2 ,This bit indicates and allows modification of whether the state associated with the coprocessor 2 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 3. " SUS1 ,State unknown Secure only" "Both states,Secure only" textline " " bitfld.long 0x00 2. " SU1 ,This bit indicates and allows modification of whether the state associated with the coprocessor 1 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 1. " SUS0 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 0. " SU0 ,This bit indicates and allows modification of whether the state associated with the coprocessor 0 is permitted to become UNKNOWN" "Not permitted,Permitted" line.long 0x04 "SYST_CSR,SysTick Control and Status Register" rbitfld.long 0x04 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted" bitfld.long 0x04 2. " CLKSOURCE ,SysTick clock source" "External,Core" bitfld.long 0x04 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick" textline " " bitfld.long 0x04 0. " ENABLE ,Counter Enable" "Disabled,Enabled" line.long 0x08 "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" line.long 0x0C "SYST_CVR,SysTick Current Value Register" hexmask.long.tbyte 0x0C 0.--23. 1. " CURRENT ,Current counter value" rgroup.long 0x1C++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" rgroup.long 0xD00++0x03 line.long 0x00 "CPUID,CPUID Base Register" abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited" bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15" bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8-M w/ Main Extension" newline abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xD21=Cortex-M33" bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15" group.long 0xD04++0x23 line.long 0x00 "ICSR,Interrupt Control and State Register" setclrfld.long 0x00 31. 0x00 31. 0x00 30. " PENDNMISET , On writes allows the NMI exception to be set as pending. On reads indicates whether the NMI exception is pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET , On writes allows the PendSV exception for the selected Security state to be set as pending. On reads indicates whether the PendSV for the selected Security state exception is pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending" textline " " bitfld.long 0x00 24. " STTNS ,Controls whether in a single SysTick implementation the SysTick is Secure or Non-secure" "Secure,Non-secure" rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled" rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending" textline " " hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt" rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent" hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception" line.long 0x04 "VTOR,Vector Table Offset Register" hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address" line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key" rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian" bitfld.long 0x08 14. " PRIS ,Prioritize Secure exceptions" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " BFHFNMINS ,BusFault BusFault HardFault and NMI Non-secure enable" "Disabled,Enabled" bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" bitfld.long 0x08 3. " SYSRESETREQS ,System reset request Secure only" "Both states,Secure only" textline " " bitfld.long 0x08 2. " SYSRESETREQ ,System reset request" "Not requested,Requested" bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear" line.long 0x0C "SCR,System Control Register" bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0C 3. " SLEEPDEEPS ,Controls whether the SLEEPDEEP bit is only accessible from the secure state" "Both states,Secure only" bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" textline " " bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" line.long 0x10 "CCR,Configuration and Control Register" bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled" bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled" bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " STKOFHFNMIGN ,Controls the effect of a stack limit violation while executing at a requested priority less than 0" "Not ignored,Ignored" bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise busfaults on handlers running at a requested priority less than 0" "Not ignored,Ignored" bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled" bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled" line.long 0x14 "SHPR1,System Handler Priority Register 1" hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of system handler 7, SecureFault" hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6, UsageFault" hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5, BusFault" textline " " hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4, MemManage" line.long 0x18 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11, SVCall" line.long 0x1C "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of system handler 15, SysTick" hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of system handler 14, PendSV" hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of system handler 12, DebugMonitor" line.long 0x20 "SHCSR,System Handler Control and State Register" bitfld.long 0x20 21. " HARDFAULTPENDED ,HardFault exception status" "Not pending,Pending" bitfld.long 0x20 20. " SECUREFAULTPENDED ,SecureFault exception status" "Not pending,Pending" bitfld.long 0x20 19. " SECUREFAULTENA ,SecureFault exception enable" "Disabled,Enabled" textline " " bitfld.long 0x20 18. " USGFAULTENA ,UsageFault exception enable" "Disabled,Enabled" bitfld.long 0x20 17. " BUSFAULTENA ,BusFault exception enable" "Disabled,Enabled" bitfld.long 0x20 16. " MEMFAULTENA ,MemManage exception enable" "Disabled,Enabled" textline " " bitfld.long 0x20 15. " SVCALLPENDED ,SVCall exception status" "Not pending,Pending" bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault exception status" "Not pending,Pending" bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage exception status" "Not pending,Pending" textline " " bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault exception status" "Not pending,Pending" bitfld.long 0x20 11. " SYSTICKACT ,SysTick exception status" "Not active,Active" bitfld.long 0x20 10. " PENDSVACT ,PendSV exception status" "Not active,Active" textline " " bitfld.long 0x20 8. " MONITORACT ,Monitor exception status" "Not active,Active" bitfld.long 0x20 7. " SVCALLACT ,SVCall exception status" "Not active,Active" bitfld.long 0x20 5. " NMIACT ,NMI exception status" "Not active,Active" textline " " bitfld.long 0x20 4. " SECUREFAULTACT ,SecureFault exception status" "Not active,Active" bitfld.long 0x20 3. " USGFAULTACT ,UsageFault exception status" "Not active,Active" bitfld.long 0x20 2. " HARDFAULTACT ,HardFault exception status for the selected Security state" "Not active,Active" textline " " bitfld.long 0x20 1. " BUSFAULTACT ,BusFault exception status" "Not active,Active" bitfld.long 0x20 0. " MEMFAULTACT ,MemManage exception status" "Not active,Active" group.byte 0xD28++0x1 line.byte 0x00 "MMFSR,MemManage Status Register" bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x00 4. " MSTKERR ,Stacking Access Violations" "Not occurred,Occurred" textline " " bitfld.byte 0x00 3. " MUNSTKERR ,Unstacking Access Violations" "Not occurred,Occurred" bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred" bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred" line.byte 0x01 "BFSR,Bus Fault Status Register" bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x01 4. " STKERR ,Derived bus fault (exception entry)" "Not occurred,Occurred" textline " " bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault (exception return)" "Not occurred,Occurred" bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred" bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred" textline " " bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred" group.word 0xD2A++0x1 line.word 0x00 "UFSR,Usage Fault Status Register" eventfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error" eventfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error" eventfld.word 0x00 4. " STKOF ,Stack overflow error" "No error,Error" textline " " eventfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error" eventfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error" eventfld.word 0x00 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error" textline " " eventfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error" group.long 0xD2C++0x03 line.long 0x00 "HFSR,HardFault Status Register" bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred" bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred" bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred" group.long 0xD34++0x0B line.long 0x00 "MMFAR,MemManage Fault Address Register" line.long 0x04 "BFAR,BusFault Address Register" line.long 0x08 "AFSR,Auxiliary Fault Status Register" group.long 0xD88++0x03 line.long 0x00 "CPACR,Coprocessor Access Control Register" bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Denied,Privileged,,Full" bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Denied,Privileged,,Full" textline " " bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Denied,Privileged,,Full" bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Denied,Privileged,,Full" bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Denied,Privileged,,Full" textline " " bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Denied,Privileged,,Full" bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Denied,Privileged,,Full" bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Denied,Privileged,,Full" textline " " bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Denied,Privileged,,Full" if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD48) group.long 0xD8C++0x03 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 11. " CP11 ,Enables Non-secure access to coprocessor CP11" "Disabled,Enabled" bitfld.long 0x00 10. " CP10 ,Enables Non-secure access to coprocessor CP10" "Disabled,Enabled" bitfld.long 0x00 7. " CP7 ,Enables Non-secure access to coprocessor CP7" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CP6 ,Enables Non-secure access to coprocessor CP6" "Disabled,Enabled" bitfld.long 0x00 5. " CP5 ,Enables Non-secure access to coprocessor CP5" "Disabled,Enabled" bitfld.long 0x00 4. " CP4 ,Enables Non-secure access to coprocessor CP4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CP3 ,Enables Non-secure access to coprocessor CP3" "Disabled,Enabled" bitfld.long 0x00 2. " CP2 ,Enables Non-secure access to coprocessor CP2" "Disabled,Enabled" bitfld.long 0x00 1. " CP1 ,Enables Non-secure access to coprocessor CP1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CP0 ,Enables Non-secure access to coprocessor CP0" "Disabled,Enabled" else hgroup.long 0xD8C++0x03 hide.long 0x00 "NSACR,Non-Secure Access Control Register (not accessible)" endif wgroup.long 0xF00++0x03 line.long 0x00 "STIR,Software Triggered Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be pended" tree "Memory System" width 10. rgroup.long 0xD78++0x03 line.long 0x00 "CLIDR,Cache Level ID Register" bitfld.long 0x00 30.--31. " ICB ,Inner cache boundary" "Not disclosed,L1 cache highest,L2 cache highest,L3 cache highest" bitfld.long 0x00 27.--29. " LOU ,LOUU" "Level 1,Level 2,?..." bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,?..." textline " " bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,Instr. only,Data only,Data and Instr.,Unified cache,?..." bitfld.long 0x00 15.--17. " CL6 ,Cache type field level 6" "No cache,?..." bitfld.long 0x00 12.--14. " CL5 ,Cache type field level 5" "No cache,?..." textline " " bitfld.long 0x00 9.--11. " CL4 ,Cache type field level 4" "No cache,?..." bitfld.long 0x00 6.--8. " CL3 ,Cache type field level 3" "No cache,?..." bitfld.long 0x00 3.--5. " CL2 ,Cache type field level 2" "No cache,?..." textline " " bitfld.long 0x00 0.--2. " CL1 ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD7C)&0xE0000000)==0x80000000) rgroup.long 0xD7C++0x03 line.long 0x00 "CTR,Cache Type Register" bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..." bitfld.long 0x00 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else rgroup.long 0xD7C++0x03 line.long 0x00 "CTR,Cache Type Register" bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..." endif rgroup.long 0xD80++0x03 line.long 0x00 "CCSIDR,Cache Size ID Register" bitfld.long 0x00 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported" bitfld.long 0x00 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported" bitfld.long 0x00 29. " RA ,Indicates support available for read allocation" "Not supported,Supported" textline " " bitfld.long 0x00 28. " WA ,Indicates support available for write allocation" "Not supported,Supported" hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1" hexmask.long.word 0x00 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1" textline " " bitfld.long 0x00 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512" group.long 0xD84++0x03 line.long 0x00 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,?..." bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data/Unified,Instruction" wgroup.long 0xF50++0x03 line.long 0x00 "ICIALLU,I-Cache Invalidate All to PoU" wgroup.long 0xF58++0x23 line.long 0x00 "ICIMVAU,I-Cache Invalidate by MVA to PoU" line.long 0x04 "DCIMVAC,D-Cache Invalidate by MVA to PoC" line.long 0x08 "DCISW,D-Cache Invalidate by Set-Way" hexmask.long 0x08 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on" bitfld.long 0x08 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8" line.long 0x0C "DCCMVAU,D-Cache Clean by MVA to PoU" line.long 0x10 "DCCMVAC,D-Cache Clean by MVA to PoC" line.long 0x14 "DCCSW,D-Cache Clean by Set-Way" hexmask.long 0x14 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on" bitfld.long 0x14 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8" line.long 0x18 "DCCIMVAC,D-Cache Clean and Invalidate by MVA to PoC" line.long 0x1C "DCCISW,D-Cache Clean and Invalidate by Set-Way" hexmask.long 0x1C 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on" bitfld.long 0x1C 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8" line.long 0x20 "BPIALL,Branch Predictor Invalidate All" tree.end tree "Feature Registers" width 10. rgroup.long 0xD40++0x0B line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 4.--7. " STATE1 ,T32 instruction set support" ",,,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..." line.long 0x04 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..." bitfld.long 0x04 4.--7. " SECURITY ,Security support" "Not implemented,Implemented,?..." line.long 0x08 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x08 20.--23. " MPROFDBG ,M-profile debug. Indicates the supported M-profile debug architecture" "Not supported,ARMv8-M Debug architecture,?..." rgroup.long 0xD4C++0x03 line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long 0xD50++0x03 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " TCM ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "1 level,2 levels,?..." textline " " bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,HW coherency,,,,,,,,,,,,,,Ignored" bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,,PMSAv8,?..." rgroup.long 0xD54++0x03 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" rgroup.long 0xD58++0x03 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..." rgroup.long 0xD5C++0x03 line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3" bitfld.long 0x00 8.--11. " BPMAINT ,Indicates the supported branch predictor maintenance" "Not supported,Supported,?..." bitfld.long 0x00 4.--7. " CMAINTSW ,Indicates the supported cache maintenance operations by set/way" "Not supported,Supported,?..." bitfld.long 0x00 0.--3. " CMAINTVA ,Indicates the supported cache maintenance operations by virtual-address" "Not supported,Supported,?..." rgroup.long 0xD60++0x03 line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..." bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..." bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,Supported,?..." textline " " bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..." rgroup.long 0xD64++0x03 line.long 0x00 "ID_ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x00 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..." bitfld.long 0x00 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..." bitfld.long 0x00 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..." textline " " bitfld.long 0x00 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Basic,Extended,?..." rgroup.long 0xD68++0x03 line.long 0x00 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x00 28.--31. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..." bitfld.long 0x00 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..." bitfld.long 0x00 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,SMULL/SMLAL,,SMULL/SMLAL/DSP,?..." textline " " bitfld.long 0x00 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MUL,MUL/MLA/MLS,?..." bitfld.long 0x00 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..." bitfld.long 0x00 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..." textline " " bitfld.long 0x00 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,,Load-acquire/Store-release/Exclusive,?..." rgroup.long 0xD6C++0x03 line.long 0x00 "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x00 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..." bitfld.long 0x00 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..." textline " " bitfld.long 0x00 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..." bitfld.long 0x00 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Extended,?..." textline " " bitfld.long 0x00 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB/Q-bit,?..." rgroup.long 0xD70++0x03 line.long 0x00 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x00 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,CPS/MRS/MSR,?..." bitfld.long 0x00 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" ",,,Supported,?..." bitfld.long 0x00 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,,,DMB/DSB/ISB,?..." textline " " bitfld.long 0x00 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..." bitfld.long 0x00 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,,,Load/store,?..." bitfld.long 0x00 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,?..." tree.end tree "CoreSight Identification Registers" base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 11. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xFBC))&0x100000)==0x100000) rgroup.long 0xFBC++0x03 line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register" hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part" else rgroup.long 0xFBC++0x03 line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" endif rgroup.long 0xFE0++0x0F line.long 0x00 "DPIDR0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "DPIDR1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "DPIDR2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "DPIDR3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "DCIDR0,Component ID0 (Preamble)" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "DCIDR1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class" line.long 0x08 "DCIDR2,Component ID2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0c "DCIDR3,Component ID3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 0xB else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit (MPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,?..." group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8 group.long 0xD9C++0x03 "Region 8" saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 8 (not implemented)" saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9 group.long 0xD9C++0x03 "Region 9" saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 9 (not implemented)" saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA group.long 0xD9C++0x03 "Region 10" saveout 0xD98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xA line.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 10 (not implemented)" saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB group.long 0xD9C++0x03 "Region 11" saveout 0xD98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xB line.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 11 (not implemented)" saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC group.long 0xD9C++0x03 "Region 12" saveout 0xD98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xC line.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 12 (not implemented)" saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD group.long 0xD9C++0x03 "Region 13" saveout 0xD98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xD line.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 13 (not implemented)" saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE group.long 0xD9C++0x03 "Region 14" saveout 0xD98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xE line.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 14 (not implemented)" saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF group.long 0xD9C++0x03 "Region 15" saveout 0xD98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xF line.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 15 (not implemented)" saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15" endif tree.end newline group.long 0xDC0++0x07 line.long 0x00 "MPU_MAIR0,MPU Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. " ATTR3H ,Attribute 3 High. Outer memory attributes for MPU regions with an AttrIndex of 3" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 24.--27. " ATTR3L ,Attribute 3 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 3 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x00 20.--23. " ATTR2H ,Attribute 2 High. Outer memory attributes for MPU regions with an AttrIndex of 2" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 16.--19. " ATTR2L ,Attribute 2 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 2 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x00 12.--15. " ATTR1H ,Attribute 1 High. Outer memory attributes for MPU regions with an AttrIndex of 1" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 8.--11. " ATTR1L ,Attribute 1 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 1 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x00 4.--7. " ATTR0H ,Attribute 0 High. Outer memory attributes for MPU regions with an AttrIndex of 0" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 0.--3. " ATTR0L ,Attribute 0 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 0 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" line.long 0x04 "MPU_MAIR1,MPU Memory Attribute Indirection Register 1" bitfld.long 0x04 28.--31. " ATTR7H ,Attribute 7 High. Outer memory attributes for MPU regions with an AttrIndex of 7" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 24.--27. " ATTR7L ,Attribute 7 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 7 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x04 20.--23. " ATTR6H ,Attribute 6 High. Outer memory attributes for MPU regions with an AttrIndex of 6" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 16.--19. " ATTR6L ,Attribute 6 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 6 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x04 12.--15. " ATTR5H ,Attribute 5 High. Outer memory attributes for MPU regions with an AttrIndex of 5" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 8.--11. " ATTR5L ,Attribute 5 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 5 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x04 4.--7. " ATTR4H ,Attribute 4 High. Outer memory attributes for MPU regions with an AttrIndex of 4" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 0.--3. " ATTR4L ,Attribute 4 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 4 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Security Attribution Unit (SAU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. group.long 0xDD0++0x03 line.long 0x00 "SAU_CTRL,SAU Control Register" bitfld.long 0x00 1. " ALLNS ,When SAU_CTRL.ENABLE is 0 this bit controls if the memory is marked as Non-secure or Secure" "Secure,Non-Secure" bitfld.long 0x00 0. " ENABLE ,Enables the SAU" "Disabled,Enabled" rgroup.long 0xDD4++0x03 line.long 0x00 "SAU_TYPE,SAU Type Register" bitfld.long 0x00 0.--7. " SREGION ,The number of implemented SAU regions" "0,1,2,3,4,5,6,7,8,?..." group.long 0xDD8++0x03 line.long 0x00 "SAU_RNR,SAU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " SAU_RNR ,Indicates the SAU region accessed by SAU_RBAR and SAU_RLAR" tree.close "SAU regions" if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD0) if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x0 group.long 0xDDC++0x03 "Region 0" saveout 0xDD8 %l 0x0 line.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x0 line.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 0 (not implemented)" saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x1 group.long 0xDDC++0x03 "Region 1" saveout 0xDD8 %l 0x1 line.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x1 line.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 1 (not implemented)" saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x2 group.long 0xDDC++0x03 "Region 2" saveout 0xDD8 %l 0x2 line.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x2 line.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 2 (not implemented)" saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x3 group.long 0xDDC++0x03 "Region 3" saveout 0xDD8 %l 0x3 line.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x3 line.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 3 (not implemented)" saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x4 group.long 0xDDC++0x03 "Region 4" saveout 0xDD8 %l 0x4 line.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x4 line.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 4 (not implemented)" saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x5 group.long 0xDDC++0x03 "Region 5" saveout 0xDD8 %l 0x5 line.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x5 line.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 5 (not implemented)" saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x6 group.long 0xDDC++0x03 "Region 6" saveout 0xDD8 %l 0x6 line.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x6 line.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 6 (not implemented)" saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x7 group.long 0xDDC++0x03 "Region 7" saveout 0xDD8 %l 0x7 line.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x7 line.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 7 (not implemented)" saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7" endif else hgroup.long 0xDDC++0x03 "Region 0 (not accessible)" saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0" hgroup.long 0xDDC++0x03 "Region 1 (not accessible)" saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1" hgroup.long 0xDDC++0x03 "Region 2 (not accessible)" saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2" hgroup.long 0xDDC++0x03 "Region 3 (not accessible)" saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3" hgroup.long 0xDDC++0x03 "Region 4 (not accessible)" saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4" hgroup.long 0xDDC++0x03 "Region 5 (not accessible)" saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5" hgroup.long 0xDDC++0x03 "Region 6 (not accessible)" saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6" hgroup.long 0xDDC++0x03 "Region 7 (not accessible)" saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7" endif tree.end group.long 0xDE4++0x03 line.long 0x00 "SFSR,Secure Fault Status Register" bitfld.long 0x00 7. " LSERR ,Lazy state error flag" "Not occurred,Occurred" bitfld.long 0x00 6. " SFARVALID ,Secure fault address valid" "Not valid,Valid" bitfld.long 0x00 5. " LSPERR ,Lazy state preservation error flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " INVTRAN ,Invalid transition flag" "Not occurred,Occurred" bitfld.long 0x00 3. " AUVIOL ,Attribution unit violation flag" "Not occurred,Occurred" bitfld.long 0x00 2. " INVER ,Invalid exception return flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " INVIS ,Invalid integrity signature flag" "Not occurred,Occurred" bitfld.long 0x00 0. " INVEP ,Invalid entry point" "Not occurred,Occurred" group.long 0xDE8++0x03 line.long 0x00 "SFAR,Secure Fault Address Register" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller (NVIC)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 6. group.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Controller Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,0-64,0-96,0-128,0-160,0-192,0-224,0-255,0-287,0-319,0-351,0-383,0-415,0-447,0-479,0-511" width 24. tree "Interrupt Enable Registers" group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x104++0x03 line.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x104++0x03 hide.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x108++0x03 line.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x108++0x03 hide.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x10C++0x03 line.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x10C++0x03 hide.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x110++0x03 line.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x110++0x03 hide.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x114++0x03 line.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x114++0x03 hide.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x118++0x03 line.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x118++0x03 hide.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x11C++0x03 line.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA255 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA254 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA253 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA252 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA251 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA250 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA249 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA248 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA247 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA246 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA245 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA244 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA243 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA242 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA241 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA240 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x11C++0x03 hide.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x120++0x03 line.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA287 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA286 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA285 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA284 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA283 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA282 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA281 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA280 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA279 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA278 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA277 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA276 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA275 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA274 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA273 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA272 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA271 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA270 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA269 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA268 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA267 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA266 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA265 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA264 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA263 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA262 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA261 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA260 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA259 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA258 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA257 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA256 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x120++0x03 hide.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x124++0x03 line.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA319 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA318 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA317 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA316 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA315 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA314 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA313 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA312 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA311 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA310 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA309 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA308 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA307 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA306 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA305 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA304 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA303 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA302 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA301 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA300 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA299 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA298 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA297 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA296 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA295 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA294 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA293 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA292 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA291 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA290 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA289 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA288 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x124++0x03 hide.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x128++0x03 line.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA351 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA350 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA349 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA348 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA347 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA346 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA345 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA344 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA343 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA342 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA341 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA340 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA339 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA338 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA337 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA336 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA335 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA334 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA333 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA332 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA331 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA330 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA329 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA328 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA327 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA326 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA325 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA324 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA323 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA322 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA321 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA320 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x128++0x03 hide.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x12C++0x03 line.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA383 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA382 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA381 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA380 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA379 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA378 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA377 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA376 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA375 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA374 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA373 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA372 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA371 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA370 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA369 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA368 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA367 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA366 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA365 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA364 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA363 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA362 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA361 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA360 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA359 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA358 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA357 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA356 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA355 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA354 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA353 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA352 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x12C++0x03 hide.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x130++0x03 line.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA415 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA414 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA413 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA412 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA411 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA410 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA409 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA408 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA407 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA406 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA405 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA404 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA403 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA402 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA401 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA400 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA399 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA398 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA397 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA396 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA395 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA394 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA393 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA392 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA391 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA390 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA389 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA388 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA387 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA386 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA385 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA384 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x130++0x03 hide.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x134++0x03 line.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA447 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA446 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA445 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA444 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA443 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA442 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA441 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA440 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA439 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA438 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA437 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA436 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA435 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA434 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA433 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA432 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA431 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA430 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA429 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA428 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA427 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA426 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA425 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA424 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA423 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA422 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA421 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA420 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA419 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA418 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA417 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA416 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x134++0x03 hide.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x138++0x03 line.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA479 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA478 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA477 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA476 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA475 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA474 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA473 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA472 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA471 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA470 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA469 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA468 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA467 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA466 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA465 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA464 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA463 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA462 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA461 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA460 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA459 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA458 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA457 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA456 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA455 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA454 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA453 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA452 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA451 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA450 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA449 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA448 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x138++0x03 hide.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F) group.long 0x13C++0x03 line.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA511 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA510 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA509 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA508 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA507 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA506 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA505 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA504 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA503 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA502 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA501 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA500 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA499 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA498 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA497 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA496 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA495 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA494 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA493 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA492 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA491 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA490 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA489 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA488 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA487 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA486 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA485 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA484 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA483 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA482 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA481 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA480 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x13C++0x03 hide.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register" endif tree.end width 24. tree "Interrupt Pending Registers" group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x204++0x03 line.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x204++0x03 hide.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x208++0x03 line.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x208++0x03 hide.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x20C++0x03 line.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x20C++0x03 hide.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x210++0x03 line.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x210++0x03 hide.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x214++0x03 line.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x214++0x03 hide.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x218++0x03 line.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x218++0x03 hide.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x21C++0x03 line.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN255 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN254 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN253 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN252 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN251 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN250 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN249 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN248 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN247 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN246 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN245 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN244 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN243 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN242 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN241 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN240 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x21C++0x03 hide.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x220++0x03 line.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN287 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN286 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN285 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN284 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN283 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN282 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN281 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN280 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN279 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN278 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN277 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN276 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN275 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN274 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN273 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN272 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN271 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN270 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN269 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN268 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN267 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN266 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN265 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN264 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN263 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN262 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN261 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN260 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN259 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN258 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN257 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN256 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x220++0x03 hide.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x224++0x03 line.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN319 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN318 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN317 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN316 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN315 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN314 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN313 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN312 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN311 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN310 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN309 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN308 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN307 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN306 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN305 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN304 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN303 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN302 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN301 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN300 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN299 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN298 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN297 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN296 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN295 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN294 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN293 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN292 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN291 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN290 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN289 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN288 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x224++0x03 hide.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x228++0x03 line.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN351 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN350 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN349 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN348 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN347 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN346 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN345 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN344 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN343 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN342 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN341 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN340 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN339 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN338 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN337 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN336 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN335 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN334 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN333 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN332 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN331 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN330 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN329 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN328 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN327 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN326 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN325 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN324 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN323 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN322 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN321 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN320 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x228++0x03 hide.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x22C++0x03 line.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN383 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN382 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN381 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN380 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN379 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN378 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN377 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN376 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN375 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN374 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN373 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN372 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN371 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN370 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN369 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN368 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN367 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN366 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN365 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN364 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN363 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN362 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN361 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN360 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN359 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN358 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN357 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN356 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN355 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN354 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN353 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN352 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x22C++0x03 hide.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x230++0x03 line.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN415 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN414 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN413 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN412 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN411 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN410 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN409 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN408 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN407 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN406 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN405 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN404 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN403 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN402 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN401 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN400 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN399 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN398 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN397 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN396 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN395 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN394 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN393 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN392 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN391 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN390 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN389 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN388 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN387 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN386 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN385 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN384 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x230++0x03 hide.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x234++0x03 line.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN447 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN446 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN445 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN444 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN443 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN442 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN441 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN440 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN439 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN438 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN437 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN436 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN435 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN434 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN433 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN432 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN431 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN430 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN429 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN428 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN427 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN426 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN425 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN424 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN423 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN422 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN421 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN420 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN419 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN418 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN417 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN416 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x234++0x03 hide.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x238++0x03 line.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN479 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN478 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN477 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN476 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN475 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN474 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN473 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN472 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN471 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN470 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN469 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN468 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN467 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN466 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN465 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN464 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN463 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN462 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN461 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN460 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN459 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN458 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN457 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN456 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN455 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN454 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN453 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN452 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN451 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN450 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN449 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN448 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x238++0x03 hide.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F) group.long 0x23C++0x03 line.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN511 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN510 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN509 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN508 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN507 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN506 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN505 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN504 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN503 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN502 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN501 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN500 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN499 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN498 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN497 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN496 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN495 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN494 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN493 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN492 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN491 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN490 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN489 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN488 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN487 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN486 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN485 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN484 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN483 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN482 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN481 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN480 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x23C++0x03 hide.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register" endif tree.end width 11. tree "Interrupt Active Bit Registers" rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE0,Active Bit Register 0" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) rgroup.long 0x304++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x304++0x03 hide.long 0x00 "ACTIVE1,Active Bit Register 1" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) rgroup.long 0x308++0x03 line.long 0x00 "ACTIVE2,Active Bit Register 2" bitfld.long 0x00 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x308++0x03 hide.long 0x00 "ACTIVE2,Active Bit Register 2" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) rgroup.long 0x30C++0x03 line.long 0x00 "ACTIVE3,Active Bit Register 3" bitfld.long 0x00 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x30C++0x03 hide.long 0x00 "ACTIVE3,Active Bit Register 3" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) rgroup.long 0x310++0x03 line.long 0x00 "ACTIVE4,Active Bit Register 4" bitfld.long 0x00 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x310++0x03 hide.long 0x00 "ACTIVE4,Active Bit Register 4" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) rgroup.long 0x314++0x03 line.long 0x00 "ACTIVE5,Active Bit Register 5" bitfld.long 0x00 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x314++0x03 hide.long 0x00 "ACTIVE5,Active Bit Register 5" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) rgroup.long 0x318++0x03 line.long 0x00 "ACTIVE6,Active Bit Register 6" bitfld.long 0x00 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x318++0x03 hide.long 0x00 "ACTIVE6,Active Bit Register 6" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) rgroup.long 0x31C++0x03 line.long 0x00 "ACTIVE7,Active Bit Register 7" bitfld.long 0x00 31. " ACTIVE255 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE254 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE253 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE252 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE251 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE250 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE249 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE248 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE247 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE246 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE245 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE244 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE243 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE242 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE241 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE240 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x31C++0x03 hide.long 0x00 "ACTIVE7,Active Bit Register 7" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) rgroup.long 0x320++0x03 line.long 0x00 "ACTIVE8,Active Bit Register 8" bitfld.long 0x00 31. " ACTIVE287 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE286 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE285 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE284 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE283 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE282 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE281 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE280 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE279 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE278 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE277 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE276 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE275 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE274 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE273 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE272 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE271 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE270 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE269 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE268 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE267 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE266 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE265 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE264 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE263 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE262 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE261 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE260 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE259 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE258 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE257 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE256 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x320++0x03 hide.long 0x00 "ACTIVE8,Active Bit Register 8" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) rgroup.long 0x324++0x03 line.long 0x00 "ACTIVE9,Active Bit Register 9" bitfld.long 0x00 31. " ACTIVE319 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE318 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE317 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE316 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE315 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE314 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE313 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE312 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE311 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE310 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE309 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE308 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE307 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE306 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE305 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE304 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE303 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE302 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE301 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE300 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE299 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE298 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE297 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE296 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE295 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE294 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE293 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE292 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE291 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE290 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE289 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE288 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x324++0x03 hide.long 0x00 "ACTIVE9,Active Bit Register 9" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) rgroup.long 0x328++0x03 line.long 0x00 "ACTIVE10,Active Bit Register 10" bitfld.long 0x00 31. " ACTIVE351 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE350 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE349 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE348 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE347 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE346 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE345 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE344 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE343 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE342 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE341 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE340 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE339 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE338 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE337 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE336 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE335 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE334 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE333 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE332 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE331 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE330 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE329 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE328 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE327 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE326 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE325 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE324 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE323 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE322 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE321 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE320 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x328++0x03 hide.long 0x00 "ACTIVE10,Active Bit Register 10" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) rgroup.long 0x32C++0x03 line.long 0x00 "ACTIVE11,Active Bit Register 11" bitfld.long 0x00 31. " ACTIVE383 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE382 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE381 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE380 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE379 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE378 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE377 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE376 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE375 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE374 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE373 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE372 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE371 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE370 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE369 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE368 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE367 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE366 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE365 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE364 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE363 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE362 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE361 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE360 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE359 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE358 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE357 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE356 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE355 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE354 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE353 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE352 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x32C++0x03 hide.long 0x00 "ACTIVE11,Active Bit Register 11" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) rgroup.long 0x330++0x03 line.long 0x00 "ACTIVE12,Active Bit Register 12" bitfld.long 0x00 31. " ACTIVE415 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE414 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE413 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE412 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE411 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE410 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE409 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE408 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE407 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE406 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE405 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE404 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE403 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE402 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE401 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE400 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE399 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE398 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE397 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE396 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE395 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE394 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE393 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE392 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE391 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE390 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE389 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE388 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE387 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE386 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE385 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE384 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x330++0x03 hide.long 0x00 "ACTIVE12,Active Bit Register 12" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) rgroup.long 0x334++0x03 line.long 0x00 "ACTIVE13,Active Bit Register 13" bitfld.long 0x00 31. " ACTIVE447 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE446 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE445 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE444 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE443 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE442 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE441 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE440 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE439 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE438 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE437 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE436 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE435 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE434 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE433 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE432 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE431 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE430 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE429 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE428 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE427 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE426 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE425 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE424 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE423 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE422 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE421 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE420 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE419 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE418 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE417 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE416 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x334++0x03 hide.long 0x00 "ACTIVE13,Active Bit Register 13" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) rgroup.long 0x338++0x03 line.long 0x00 "ACTIVE14,Active Bit Register 14" bitfld.long 0x00 31. " ACTIVE479 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE478 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE477 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE476 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE475 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE474 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE473 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE472 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE471 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE470 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE469 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE468 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE467 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE466 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE465 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE464 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE463 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE462 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE461 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE460 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE459 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE458 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE457 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE456 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE455 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE454 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE453 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE452 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE451 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE450 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE449 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE448 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x338++0x03 hide.long 0x00 "ACTIVE14,Active Bit Register 14" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F) rgroup.long 0x33C++0x03 line.long 0x00 "ACTIVE15,Active Bit Register 15" bitfld.long 0x00 31. " ACTIVE511 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE510 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE509 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE508 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE507 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE506 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE505 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE504 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE503 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE502 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE501 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE500 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE499 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE498 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE497 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE496 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE495 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE494 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE493 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE492 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE491 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE490 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE489 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE488 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE487 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE486 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE485 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE484 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE483 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE482 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE481 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE480 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x33C++0x03 hide.long 0x00 "ACTIVE15,Active Bit Register 15" endif tree.end width 13. tree "Interrupt Target Non-Secure Registers" group.long 0x380++0x03 line.long 0x00 "NVIC_ITNS0,Interrupt Target Non-Secure Register 0" bitfld.long 0x00 31. " ITNS31 ,Interrupt Targets Non-secure 31" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS30 ,Interrupt Targets Non-secure 30" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS29 ,Interrupt Targets Non-secure 29" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS28 ,Interrupt Targets Non-secure 28" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS27 ,Interrupt Targets Non-secure 27" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS26 ,Interrupt Targets Non-secure 26" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS25 ,Interrupt Targets Non-secure 25" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS24 ,Interrupt Targets Non-secure 24" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS23 ,Interrupt Targets Non-secure 23" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS22 ,Interrupt Targets Non-secure 22" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS21 ,Interrupt Targets Non-secure 21" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS20 ,Interrupt Targets Non-secure 20" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS19 ,Interrupt Targets Non-secure 19" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS18 ,Interrupt Targets Non-secure 18" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS17 ,Interrupt Targets Non-secure 17" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS16 ,Interrupt Targets Non-secure 16" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS15 ,Interrupt Targets Non-secure 15" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS14 ,Interrupt Targets Non-secure 14" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS13 ,Interrupt Targets Non-secure 13" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS12 ,Interrupt Targets Non-secure 12" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS11 ,Interrupt Targets Non-secure 11" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS10 ,Interrupt Targets Non-secure 10" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS9 ,Interrupt Targets Non-secure 9" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS8 ,Interrupt Targets Non-secure 8" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS7 ,Interrupt Targets Non-secure 7" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS6 ,Interrupt Targets Non-secure 6" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS5 ,Interrupt Targets Non-secure 5" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS4 ,Interrupt Targets Non-secure 4" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS3 ,Interrupt Targets Non-secure 3" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS2 ,Interrupt Targets Non-secure 2" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS1 ,Interrupt Targets Non-secure 1" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS0 ,Interrupt Targets Non-secure 0" "Secure,Non-secure" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x384++0x03 line.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1" bitfld.long 0x00 31. " ITNS63 ,Interrupt Targets Non-secure 63" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS62 ,Interrupt Targets Non-secure 62" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS61 ,Interrupt Targets Non-secure 61" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS60 ,Interrupt Targets Non-secure 60" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS59 ,Interrupt Targets Non-secure 59" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS58 ,Interrupt Targets Non-secure 58" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS57 ,Interrupt Targets Non-secure 57" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS56 ,Interrupt Targets Non-secure 56" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS55 ,Interrupt Targets Non-secure 55" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS54 ,Interrupt Targets Non-secure 54" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS53 ,Interrupt Targets Non-secure 53" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS52 ,Interrupt Targets Non-secure 52" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS51 ,Interrupt Targets Non-secure 51" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS50 ,Interrupt Targets Non-secure 50" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS49 ,Interrupt Targets Non-secure 49" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS48 ,Interrupt Targets Non-secure 48" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS47 ,Interrupt Targets Non-secure 47" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS46 ,Interrupt Targets Non-secure 46" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS45 ,Interrupt Targets Non-secure 45" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS44 ,Interrupt Targets Non-secure 44" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS43 ,Interrupt Targets Non-secure 43" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS42 ,Interrupt Targets Non-secure 42" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS41 ,Interrupt Targets Non-secure 41" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS40 ,Interrupt Targets Non-secure 40" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS39 ,Interrupt Targets Non-secure 39" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS38 ,Interrupt Targets Non-secure 38" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS37 ,Interrupt Targets Non-secure 37" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS36 ,Interrupt Targets Non-secure 36" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS35 ,Interrupt Targets Non-secure 35" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS34 ,Interrupt Targets Non-secure 34" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS33 ,Interrupt Targets Non-secure 33" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS32 ,Interrupt Targets Non-secure 32" "Secure,Non-secure" else hgroup.long 0x384++0x03 hide.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x388++0x03 line.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2" bitfld.long 0x00 31. " ITNS95 ,Interrupt Targets Non-secure 95" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS94 ,Interrupt Targets Non-secure 94" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS93 ,Interrupt Targets Non-secure 93" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS92 ,Interrupt Targets Non-secure 92" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS91 ,Interrupt Targets Non-secure 91" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS90 ,Interrupt Targets Non-secure 90" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS89 ,Interrupt Targets Non-secure 89" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS88 ,Interrupt Targets Non-secure 88" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS87 ,Interrupt Targets Non-secure 87" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS86 ,Interrupt Targets Non-secure 86" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS85 ,Interrupt Targets Non-secure 85" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS84 ,Interrupt Targets Non-secure 84" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS83 ,Interrupt Targets Non-secure 83" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS82 ,Interrupt Targets Non-secure 82" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS81 ,Interrupt Targets Non-secure 81" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS80 ,Interrupt Targets Non-secure 80" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS79 ,Interrupt Targets Non-secure 79" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS78 ,Interrupt Targets Non-secure 78" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS77 ,Interrupt Targets Non-secure 77" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS76 ,Interrupt Targets Non-secure 76" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS75 ,Interrupt Targets Non-secure 75" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS74 ,Interrupt Targets Non-secure 74" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS73 ,Interrupt Targets Non-secure 73" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS72 ,Interrupt Targets Non-secure 72" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS71 ,Interrupt Targets Non-secure 71" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS70 ,Interrupt Targets Non-secure 70" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS69 ,Interrupt Targets Non-secure 69" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS68 ,Interrupt Targets Non-secure 68" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS67 ,Interrupt Targets Non-secure 67" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS66 ,Interrupt Targets Non-secure 66" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS65 ,Interrupt Targets Non-secure 65" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS64 ,Interrupt Targets Non-secure 64" "Secure,Non-secure" else hgroup.long 0x388++0x03 hide.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x38C++0x03 line.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3" bitfld.long 0x00 31. " ITNS127 ,Interrupt Targets Non-secure 127" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS126 ,Interrupt Targets Non-secure 126" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS125 ,Interrupt Targets Non-secure 125" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS124 ,Interrupt Targets Non-secure 124" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS123 ,Interrupt Targets Non-secure 123" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS122 ,Interrupt Targets Non-secure 122" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS121 ,Interrupt Targets Non-secure 121" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS120 ,Interrupt Targets Non-secure 120" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS119 ,Interrupt Targets Non-secure 119" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS118 ,Interrupt Targets Non-secure 118" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS117 ,Interrupt Targets Non-secure 117" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS116 ,Interrupt Targets Non-secure 116" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS115 ,Interrupt Targets Non-secure 115" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS114 ,Interrupt Targets Non-secure 114" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS113 ,Interrupt Targets Non-secure 113" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS112 ,Interrupt Targets Non-secure 112" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS111 ,Interrupt Targets Non-secure 111" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS110 ,Interrupt Targets Non-secure 110" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS109 ,Interrupt Targets Non-secure 109" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS108 ,Interrupt Targets Non-secure 108" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS107 ,Interrupt Targets Non-secure 107" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS106 ,Interrupt Targets Non-secure 106" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS105 ,Interrupt Targets Non-secure 105" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS104 ,Interrupt Targets Non-secure 104" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS103 ,Interrupt Targets Non-secure 103" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS102 ,Interrupt Targets Non-secure 102" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS101 ,Interrupt Targets Non-secure 101" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS100 ,Interrupt Targets Non-secure 100" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS99 ,Interrupt Targets Non-secure 99" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS98 ,Interrupt Targets Non-secure 98" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS97 ,Interrupt Targets Non-secure 97" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS96 ,Interrupt Targets Non-secure 96" "Secure,Non-secure" else hgroup.long 0x38C++0x03 hide.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x390++0x03 line.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4" bitfld.long 0x00 31. " ITNS159 ,Interrupt Targets Non-secure 159" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS158 ,Interrupt Targets Non-secure 158" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS157 ,Interrupt Targets Non-secure 157" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS156 ,Interrupt Targets Non-secure 156" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS155 ,Interrupt Targets Non-secure 155" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS154 ,Interrupt Targets Non-secure 154" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS153 ,Interrupt Targets Non-secure 153" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS152 ,Interrupt Targets Non-secure 152" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS151 ,Interrupt Targets Non-secure 151" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS150 ,Interrupt Targets Non-secure 150" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS149 ,Interrupt Targets Non-secure 149" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS148 ,Interrupt Targets Non-secure 148" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS147 ,Interrupt Targets Non-secure 147" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS146 ,Interrupt Targets Non-secure 146" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS145 ,Interrupt Targets Non-secure 145" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS144 ,Interrupt Targets Non-secure 144" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS143 ,Interrupt Targets Non-secure 143" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS142 ,Interrupt Targets Non-secure 142" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS141 ,Interrupt Targets Non-secure 141" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS140 ,Interrupt Targets Non-secure 140" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS139 ,Interrupt Targets Non-secure 139" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS138 ,Interrupt Targets Non-secure 138" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS137 ,Interrupt Targets Non-secure 137" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS136 ,Interrupt Targets Non-secure 136" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS135 ,Interrupt Targets Non-secure 135" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS134 ,Interrupt Targets Non-secure 134" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS133 ,Interrupt Targets Non-secure 133" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS132 ,Interrupt Targets Non-secure 132" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS131 ,Interrupt Targets Non-secure 131" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS130 ,Interrupt Targets Non-secure 130" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS129 ,Interrupt Targets Non-secure 129" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS128 ,Interrupt Targets Non-secure 128" "Secure,Non-secure" else hgroup.long 0x390++0x03 hide.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x394++0x03 line.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5" bitfld.long 0x00 31. " ITNS191 ,Interrupt Targets Non-secure 191" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS190 ,Interrupt Targets Non-secure 190" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS189 ,Interrupt Targets Non-secure 189" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS188 ,Interrupt Targets Non-secure 188" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS187 ,Interrupt Targets Non-secure 187" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS186 ,Interrupt Targets Non-secure 186" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS185 ,Interrupt Targets Non-secure 185" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS184 ,Interrupt Targets Non-secure 184" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS183 ,Interrupt Targets Non-secure 183" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS182 ,Interrupt Targets Non-secure 182" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS181 ,Interrupt Targets Non-secure 181" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS180 ,Interrupt Targets Non-secure 180" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS179 ,Interrupt Targets Non-secure 179" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS178 ,Interrupt Targets Non-secure 178" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS177 ,Interrupt Targets Non-secure 177" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS176 ,Interrupt Targets Non-secure 176" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS175 ,Interrupt Targets Non-secure 175" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS174 ,Interrupt Targets Non-secure 174" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS173 ,Interrupt Targets Non-secure 173" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS172 ,Interrupt Targets Non-secure 172" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS171 ,Interrupt Targets Non-secure 171" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS170 ,Interrupt Targets Non-secure 170" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS169 ,Interrupt Targets Non-secure 169" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS168 ,Interrupt Targets Non-secure 168" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS167 ,Interrupt Targets Non-secure 167" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS166 ,Interrupt Targets Non-secure 166" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS165 ,Interrupt Targets Non-secure 165" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS164 ,Interrupt Targets Non-secure 164" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS163 ,Interrupt Targets Non-secure 163" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS162 ,Interrupt Targets Non-secure 162" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS161 ,Interrupt Targets Non-secure 161" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS160 ,Interrupt Targets Non-secure 160" "Secure,Non-secure" else hgroup.long 0x394++0x03 hide.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x398++0x03 line.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6" bitfld.long 0x00 31. " ITNS223 ,Interrupt Targets Non-secure 223" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS222 ,Interrupt Targets Non-secure 222" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS221 ,Interrupt Targets Non-secure 221" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS220 ,Interrupt Targets Non-secure 220" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS219 ,Interrupt Targets Non-secure 219" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS218 ,Interrupt Targets Non-secure 218" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS217 ,Interrupt Targets Non-secure 217" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS216 ,Interrupt Targets Non-secure 216" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS215 ,Interrupt Targets Non-secure 215" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS214 ,Interrupt Targets Non-secure 214" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS213 ,Interrupt Targets Non-secure 213" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS212 ,Interrupt Targets Non-secure 212" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS211 ,Interrupt Targets Non-secure 211" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS210 ,Interrupt Targets Non-secure 210" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS209 ,Interrupt Targets Non-secure 209" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS208 ,Interrupt Targets Non-secure 208" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS207 ,Interrupt Targets Non-secure 207" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS206 ,Interrupt Targets Non-secure 206" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS205 ,Interrupt Targets Non-secure 205" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS204 ,Interrupt Targets Non-secure 204" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS203 ,Interrupt Targets Non-secure 203" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS202 ,Interrupt Targets Non-secure 202" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS201 ,Interrupt Targets Non-secure 201" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS200 ,Interrupt Targets Non-secure 200" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS199 ,Interrupt Targets Non-secure 199" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS198 ,Interrupt Targets Non-secure 198" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS197 ,Interrupt Targets Non-secure 197" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS196 ,Interrupt Targets Non-secure 196" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS195 ,Interrupt Targets Non-secure 195" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS194 ,Interrupt Targets Non-secure 194" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS193 ,Interrupt Targets Non-secure 193" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS192 ,Interrupt Targets Non-secure 192" "Secure,Non-secure" else hgroup.long 0x398++0x03 hide.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x39C++0x03 line.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7" bitfld.long 0x00 31. " ITNS255 ,Interrupt Targets Non-secure 255" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS254 ,Interrupt Targets Non-secure 254" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS253 ,Interrupt Targets Non-secure 253" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS252 ,Interrupt Targets Non-secure 252" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS251 ,Interrupt Targets Non-secure 251" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS250 ,Interrupt Targets Non-secure 250" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS249 ,Interrupt Targets Non-secure 249" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS248 ,Interrupt Targets Non-secure 248" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS247 ,Interrupt Targets Non-secure 247" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS246 ,Interrupt Targets Non-secure 246" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS245 ,Interrupt Targets Non-secure 245" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS244 ,Interrupt Targets Non-secure 244" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS243 ,Interrupt Targets Non-secure 243" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS242 ,Interrupt Targets Non-secure 242" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS241 ,Interrupt Targets Non-secure 241" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS240 ,Interrupt Targets Non-secure 240" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS239 ,Interrupt Targets Non-secure 239" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS238 ,Interrupt Targets Non-secure 238" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS237 ,Interrupt Targets Non-secure 237" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS236 ,Interrupt Targets Non-secure 236" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS235 ,Interrupt Targets Non-secure 235" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS234 ,Interrupt Targets Non-secure 234" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS233 ,Interrupt Targets Non-secure 233" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS232 ,Interrupt Targets Non-secure 232" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS231 ,Interrupt Targets Non-secure 231" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS230 ,Interrupt Targets Non-secure 230" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS229 ,Interrupt Targets Non-secure 229" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS228 ,Interrupt Targets Non-secure 228" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS227 ,Interrupt Targets Non-secure 227" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS226 ,Interrupt Targets Non-secure 226" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS225 ,Interrupt Targets Non-secure 225" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS224 ,Interrupt Targets Non-secure 224" "Secure,Non-secure" else hgroup.long 0x39C++0x03 hide.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x3A0++0x03 line.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8" bitfld.long 0x00 31. " ITNS287 ,Interrupt Targets Non-secure 287" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS286 ,Interrupt Targets Non-secure 286" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS285 ,Interrupt Targets Non-secure 285" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS284 ,Interrupt Targets Non-secure 284" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS283 ,Interrupt Targets Non-secure 283" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS282 ,Interrupt Targets Non-secure 282" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS281 ,Interrupt Targets Non-secure 281" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS280 ,Interrupt Targets Non-secure 280" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS279 ,Interrupt Targets Non-secure 279" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS278 ,Interrupt Targets Non-secure 278" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS277 ,Interrupt Targets Non-secure 277" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS276 ,Interrupt Targets Non-secure 276" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS275 ,Interrupt Targets Non-secure 275" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS274 ,Interrupt Targets Non-secure 274" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS273 ,Interrupt Targets Non-secure 273" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS272 ,Interrupt Targets Non-secure 272" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS271 ,Interrupt Targets Non-secure 271" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS270 ,Interrupt Targets Non-secure 270" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS269 ,Interrupt Targets Non-secure 269" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS268 ,Interrupt Targets Non-secure 268" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS267 ,Interrupt Targets Non-secure 267" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS266 ,Interrupt Targets Non-secure 266" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS265 ,Interrupt Targets Non-secure 265" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS264 ,Interrupt Targets Non-secure 264" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS263 ,Interrupt Targets Non-secure 263" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS262 ,Interrupt Targets Non-secure 262" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS261 ,Interrupt Targets Non-secure 261" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS260 ,Interrupt Targets Non-secure 260" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS259 ,Interrupt Targets Non-secure 259" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS258 ,Interrupt Targets Non-secure 258" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS257 ,Interrupt Targets Non-secure 257" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS256 ,Interrupt Targets Non-secure 256" "Secure,Non-secure" else hgroup.long 0x3A0++0x03 hide.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x3A4++0x03 line.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9" bitfld.long 0x00 31. " ITNS319 ,Interrupt Targets Non-secure 319" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS318 ,Interrupt Targets Non-secure 318" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS317 ,Interrupt Targets Non-secure 317" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS316 ,Interrupt Targets Non-secure 316" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS315 ,Interrupt Targets Non-secure 315" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS314 ,Interrupt Targets Non-secure 314" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS313 ,Interrupt Targets Non-secure 313" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS312 ,Interrupt Targets Non-secure 312" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS311 ,Interrupt Targets Non-secure 311" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS310 ,Interrupt Targets Non-secure 310" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS309 ,Interrupt Targets Non-secure 309" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS308 ,Interrupt Targets Non-secure 308" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS307 ,Interrupt Targets Non-secure 307" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS306 ,Interrupt Targets Non-secure 306" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS305 ,Interrupt Targets Non-secure 305" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS304 ,Interrupt Targets Non-secure 304" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS303 ,Interrupt Targets Non-secure 303" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS302 ,Interrupt Targets Non-secure 302" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS301 ,Interrupt Targets Non-secure 301" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS300 ,Interrupt Targets Non-secure 300" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS299 ,Interrupt Targets Non-secure 299" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS298 ,Interrupt Targets Non-secure 298" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS297 ,Interrupt Targets Non-secure 297" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS296 ,Interrupt Targets Non-secure 296" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS295 ,Interrupt Targets Non-secure 295" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS294 ,Interrupt Targets Non-secure 294" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS293 ,Interrupt Targets Non-secure 293" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS292 ,Interrupt Targets Non-secure 292" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS291 ,Interrupt Targets Non-secure 291" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS290 ,Interrupt Targets Non-secure 290" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS289 ,Interrupt Targets Non-secure 289" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS288 ,Interrupt Targets Non-secure 288" "Secure,Non-secure" else hgroup.long 0x3A4++0x03 hide.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x3A8++0x03 line.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10" bitfld.long 0x00 31. " ITNS351 ,Interrupt Targets Non-secure 351" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS350 ,Interrupt Targets Non-secure 350" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS349 ,Interrupt Targets Non-secure 349" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS348 ,Interrupt Targets Non-secure 348" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS347 ,Interrupt Targets Non-secure 347" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS346 ,Interrupt Targets Non-secure 346" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS345 ,Interrupt Targets Non-secure 345" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS344 ,Interrupt Targets Non-secure 344" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS343 ,Interrupt Targets Non-secure 343" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS342 ,Interrupt Targets Non-secure 342" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS341 ,Interrupt Targets Non-secure 341" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS340 ,Interrupt Targets Non-secure 340" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS339 ,Interrupt Targets Non-secure 339" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS338 ,Interrupt Targets Non-secure 338" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS337 ,Interrupt Targets Non-secure 337" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS336 ,Interrupt Targets Non-secure 336" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS335 ,Interrupt Targets Non-secure 335" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS334 ,Interrupt Targets Non-secure 334" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS333 ,Interrupt Targets Non-secure 333" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS332 ,Interrupt Targets Non-secure 332" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS331 ,Interrupt Targets Non-secure 331" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS330 ,Interrupt Targets Non-secure 330" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS329 ,Interrupt Targets Non-secure 329" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS328 ,Interrupt Targets Non-secure 328" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS327 ,Interrupt Targets Non-secure 327" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS326 ,Interrupt Targets Non-secure 326" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS325 ,Interrupt Targets Non-secure 325" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS324 ,Interrupt Targets Non-secure 324" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS323 ,Interrupt Targets Non-secure 323" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS322 ,Interrupt Targets Non-secure 322" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS321 ,Interrupt Targets Non-secure 321" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS320 ,Interrupt Targets Non-secure 320" "Secure,Non-secure" else hgroup.long 0x3A8++0x03 hide.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x3AC++0x03 line.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11" bitfld.long 0x00 31. " ITNS383 ,Interrupt Targets Non-secure 383" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS382 ,Interrupt Targets Non-secure 382" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS381 ,Interrupt Targets Non-secure 381" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS380 ,Interrupt Targets Non-secure 380" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS379 ,Interrupt Targets Non-secure 379" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS378 ,Interrupt Targets Non-secure 378" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS377 ,Interrupt Targets Non-secure 377" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS376 ,Interrupt Targets Non-secure 376" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS375 ,Interrupt Targets Non-secure 375" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS374 ,Interrupt Targets Non-secure 374" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS373 ,Interrupt Targets Non-secure 373" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS372 ,Interrupt Targets Non-secure 372" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS371 ,Interrupt Targets Non-secure 371" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS370 ,Interrupt Targets Non-secure 370" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS369 ,Interrupt Targets Non-secure 369" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS368 ,Interrupt Targets Non-secure 368" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS367 ,Interrupt Targets Non-secure 367" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS366 ,Interrupt Targets Non-secure 366" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS365 ,Interrupt Targets Non-secure 365" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS364 ,Interrupt Targets Non-secure 364" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS363 ,Interrupt Targets Non-secure 363" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS362 ,Interrupt Targets Non-secure 362" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS361 ,Interrupt Targets Non-secure 361" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS360 ,Interrupt Targets Non-secure 360" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS359 ,Interrupt Targets Non-secure 359" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS358 ,Interrupt Targets Non-secure 358" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS357 ,Interrupt Targets Non-secure 357" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS356 ,Interrupt Targets Non-secure 356" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS355 ,Interrupt Targets Non-secure 355" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS354 ,Interrupt Targets Non-secure 354" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS353 ,Interrupt Targets Non-secure 353" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS352 ,Interrupt Targets Non-secure 352" "Secure,Non-secure" else hgroup.long 0x3AC++0x03 hide.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x3B0++0x03 line.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12" bitfld.long 0x00 31. " ITNS415 ,Interrupt Targets Non-secure 415" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS414 ,Interrupt Targets Non-secure 414" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS413 ,Interrupt Targets Non-secure 413" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS412 ,Interrupt Targets Non-secure 412" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS411 ,Interrupt Targets Non-secure 411" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS410 ,Interrupt Targets Non-secure 410" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS409 ,Interrupt Targets Non-secure 409" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS408 ,Interrupt Targets Non-secure 408" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS407 ,Interrupt Targets Non-secure 407" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS406 ,Interrupt Targets Non-secure 406" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS405 ,Interrupt Targets Non-secure 405" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS404 ,Interrupt Targets Non-secure 404" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS403 ,Interrupt Targets Non-secure 403" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS402 ,Interrupt Targets Non-secure 402" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS401 ,Interrupt Targets Non-secure 401" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS400 ,Interrupt Targets Non-secure 400" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS399 ,Interrupt Targets Non-secure 399" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS398 ,Interrupt Targets Non-secure 398" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS397 ,Interrupt Targets Non-secure 397" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS396 ,Interrupt Targets Non-secure 396" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS395 ,Interrupt Targets Non-secure 395" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS394 ,Interrupt Targets Non-secure 394" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS393 ,Interrupt Targets Non-secure 393" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS392 ,Interrupt Targets Non-secure 392" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS391 ,Interrupt Targets Non-secure 391" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS390 ,Interrupt Targets Non-secure 390" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS389 ,Interrupt Targets Non-secure 389" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS388 ,Interrupt Targets Non-secure 388" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS387 ,Interrupt Targets Non-secure 387" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS386 ,Interrupt Targets Non-secure 386" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS385 ,Interrupt Targets Non-secure 385" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS384 ,Interrupt Targets Non-secure 384" "Secure,Non-secure" else hgroup.long 0x3B0++0x03 hide.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x3B4++0x03 line.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13" bitfld.long 0x00 31. " ITNS447 ,Interrupt Targets Non-secure 447" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS446 ,Interrupt Targets Non-secure 446" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS445 ,Interrupt Targets Non-secure 445" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS444 ,Interrupt Targets Non-secure 444" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS443 ,Interrupt Targets Non-secure 443" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS442 ,Interrupt Targets Non-secure 442" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS441 ,Interrupt Targets Non-secure 441" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS440 ,Interrupt Targets Non-secure 440" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS439 ,Interrupt Targets Non-secure 439" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS438 ,Interrupt Targets Non-secure 438" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS437 ,Interrupt Targets Non-secure 437" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS436 ,Interrupt Targets Non-secure 436" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS435 ,Interrupt Targets Non-secure 435" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS434 ,Interrupt Targets Non-secure 434" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS433 ,Interrupt Targets Non-secure 433" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS432 ,Interrupt Targets Non-secure 432" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS431 ,Interrupt Targets Non-secure 431" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS430 ,Interrupt Targets Non-secure 430" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS429 ,Interrupt Targets Non-secure 429" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS428 ,Interrupt Targets Non-secure 428" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS427 ,Interrupt Targets Non-secure 427" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS426 ,Interrupt Targets Non-secure 426" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS425 ,Interrupt Targets Non-secure 425" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS424 ,Interrupt Targets Non-secure 424" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS423 ,Interrupt Targets Non-secure 423" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS422 ,Interrupt Targets Non-secure 422" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS421 ,Interrupt Targets Non-secure 421" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS420 ,Interrupt Targets Non-secure 420" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS419 ,Interrupt Targets Non-secure 419" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS418 ,Interrupt Targets Non-secure 418" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS417 ,Interrupt Targets Non-secure 417" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS416 ,Interrupt Targets Non-secure 416" "Secure,Non-secure" else hgroup.long 0x3B4++0x03 hide.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x3B8++0x03 line.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14" bitfld.long 0x00 31. " ITNS479 ,Interrupt Targets Non-secure 479" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS478 ,Interrupt Targets Non-secure 478" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS477 ,Interrupt Targets Non-secure 477" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS476 ,Interrupt Targets Non-secure 476" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS475 ,Interrupt Targets Non-secure 475" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS474 ,Interrupt Targets Non-secure 474" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS473 ,Interrupt Targets Non-secure 473" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS472 ,Interrupt Targets Non-secure 472" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS471 ,Interrupt Targets Non-secure 471" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS470 ,Interrupt Targets Non-secure 470" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS469 ,Interrupt Targets Non-secure 469" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS468 ,Interrupt Targets Non-secure 468" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS467 ,Interrupt Targets Non-secure 467" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS466 ,Interrupt Targets Non-secure 466" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS465 ,Interrupt Targets Non-secure 465" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS464 ,Interrupt Targets Non-secure 464" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS463 ,Interrupt Targets Non-secure 463" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS462 ,Interrupt Targets Non-secure 462" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS461 ,Interrupt Targets Non-secure 461" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS460 ,Interrupt Targets Non-secure 460" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS459 ,Interrupt Targets Non-secure 459" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS458 ,Interrupt Targets Non-secure 458" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS457 ,Interrupt Targets Non-secure 457" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS456 ,Interrupt Targets Non-secure 456" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS455 ,Interrupt Targets Non-secure 455" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS454 ,Interrupt Targets Non-secure 454" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS453 ,Interrupt Targets Non-secure 453" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS452 ,Interrupt Targets Non-secure 452" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS451 ,Interrupt Targets Non-secure 451" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS450 ,Interrupt Targets Non-secure 450" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS449 ,Interrupt Targets Non-secure 449" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS448 ,Interrupt Targets Non-secure 448" "Secure,Non-secure" else hgroup.long 0x3B8++0x03 hide.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x0F) group.long 0x3BC++0x03 line.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15" bitfld.long 0x00 31. " ITNS511 ,Interrupt Targets Non-secure 511" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS510 ,Interrupt Targets Non-secure 510" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS509 ,Interrupt Targets Non-secure 509" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS508 ,Interrupt Targets Non-secure 508" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS507 ,Interrupt Targets Non-secure 507" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS506 ,Interrupt Targets Non-secure 506" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS505 ,Interrupt Targets Non-secure 505" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS504 ,Interrupt Targets Non-secure 504" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS503 ,Interrupt Targets Non-secure 503" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS502 ,Interrupt Targets Non-secure 502" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS501 ,Interrupt Targets Non-secure 501" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS500 ,Interrupt Targets Non-secure 500" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS499 ,Interrupt Targets Non-secure 499" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS498 ,Interrupt Targets Non-secure 498" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS497 ,Interrupt Targets Non-secure 497" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS496 ,Interrupt Targets Non-secure 496" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS495 ,Interrupt Targets Non-secure 495" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS494 ,Interrupt Targets Non-secure 494" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS493 ,Interrupt Targets Non-secure 493" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS492 ,Interrupt Targets Non-secure 492" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS491 ,Interrupt Targets Non-secure 491" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS490 ,Interrupt Targets Non-secure 490" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS489 ,Interrupt Targets Non-secure 489" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS488 ,Interrupt Targets Non-secure 488" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS487 ,Interrupt Targets Non-secure 487" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS486 ,Interrupt Targets Non-secure 486" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS485 ,Interrupt Targets Non-secure 485" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS484 ,Interrupt Targets Non-secure 484" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS483 ,Interrupt Targets Non-secure 483" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS482 ,Interrupt Targets Non-secure 482" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS481 ,Interrupt Targets Non-secure 481" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS480 ,Interrupt Targets Non-secure 480" "Secure,Non-secure" else hgroup.long 0x3BC++0x03 hide.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15" endif tree.end tree "Interrupt Priority Registers" group.long 0x400++0x1F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x420++0x1F line.long 0x0 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x4 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x8 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0xC "IPR11,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x10 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x14 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x18 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x1C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" else hgroup.long 0x420++0x1F hide.long 0x0 "IPR8,Interrupt Priority Register" hide.long 0x4 "IPR9,Interrupt Priority Register" hide.long 0x8 "IPR10,Interrupt Priority Register" hide.long 0xC "IPR11,Interrupt Priority Register" hide.long 0x10 "IPR12,Interrupt Priority Register" hide.long 0x14 "IPR13,Interrupt Priority Register" hide.long 0x18 "IPR14,Interrupt Priority Register" hide.long 0x1C "IPR15,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x440++0x1F line.long 0x0 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x4 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x8 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0xC "IPR19,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x10 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x14 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x18 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x1C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" else hgroup.long 0x440++0x1F hide.long 0x0 "IPR16,Interrupt Priority Register" hide.long 0x4 "IPR17,Interrupt Priority Register" hide.long 0x8 "IPR18,Interrupt Priority Register" hide.long 0xC "IPR19,Interrupt Priority Register" hide.long 0x10 "IPR20,Interrupt Priority Register" hide.long 0x14 "IPR21,Interrupt Priority Register" hide.long 0x18 "IPR22,Interrupt Priority Register" hide.long 0x1C "IPR23,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x460++0x1F line.long 0x0 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x4 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x8 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0xC "IPR27,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x10 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x14 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x18 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x1C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" else hgroup.long 0x460++0x1F hide.long 0x0 "IPR24,Interrupt Priority Register" hide.long 0x4 "IPR25,Interrupt Priority Register" hide.long 0x8 "IPR26,Interrupt Priority Register" hide.long 0xC "IPR27,Interrupt Priority Register" hide.long 0x10 "IPR28,Interrupt Priority Register" hide.long 0x14 "IPR29,Interrupt Priority Register" hide.long 0x18 "IPR30,Interrupt Priority Register" hide.long 0x1C "IPR31,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x480++0x1F line.long 0x0 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x4 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x8 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0xC "IPR35,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x10 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x14 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x18 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x1C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" else hgroup.long 0x480++0x1F hide.long 0x0 "IPR32,Interrupt Priority Register" hide.long 0x4 "IPR33,Interrupt Priority Register" hide.long 0x8 "IPR34,Interrupt Priority Register" hide.long 0xC "IPR35,Interrupt Priority Register" hide.long 0x10 "IPR36,Interrupt Priority Register" hide.long 0x14 "IPR37,Interrupt Priority Register" hide.long 0x18 "IPR38,Interrupt Priority Register" hide.long 0x1C "IPR39,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x4A0++0x1F line.long 0x0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0x4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0x8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0x10 "IPR44,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0x14 "IPR45,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0x18 "IPR46,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0x1C "IPR47,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" else hgroup.long 0x4A0++0x1F hide.long 0x0 "IPR40,Interrupt Priority Register" hide.long 0x4 "IPR41,Interrupt Priority Register" hide.long 0x8 "IPR42,Interrupt Priority Register" hide.long 0xC "IPR43,Interrupt Priority Register" hide.long 0x10 "IPR44,Interrupt Priority Register" hide.long 0x14 "IPR45,Interrupt Priority Register" hide.long 0x18 "IPR46,Interrupt Priority Register" hide.long 0x1C "IPR47,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x4C0++0x1F line.long 0x0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0x4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0x8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0x10 "IPR52,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0x14 "IPR53,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0x18 "IPR54,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0x1C "IPR55,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" else hgroup.long 0x4C0++0x1F hide.long 0x0 "IPR48,Interrupt Priority Register" hide.long 0x4 "IPR49,Interrupt Priority Register" hide.long 0x8 "IPR50,Interrupt Priority Register" hide.long 0xC "IPR51,Interrupt Priority Register" hide.long 0x10 "IPR52,Interrupt Priority Register" hide.long 0x14 "IPR53,Interrupt Priority Register" hide.long 0x18 "IPR54,Interrupt Priority Register" hide.long 0x1C "IPR55,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x4E0++0x1F line.long 0x0 "IPR56,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority" line.long 0x4 "IPR57,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority" line.long 0x8 "IPR58,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority" line.long 0xC "IPR59,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority" line.long 0x10 "IPR60,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_243 ,Interrupt 243 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_242 ,Interrupt 242 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_241 ,Interrupt 241 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_240 ,Interrupt 240 Priority" line.long 0x14 "IPR61,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_247 ,Interrupt 247 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_246 ,Interrupt 246 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_245 ,Interrupt 245 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_244 ,Interrupt 244 Priority" line.long 0x18 "IPR62,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_251 ,Interrupt 251 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_250 ,Interrupt 250 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_249 ,Interrupt 249 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_248 ,Interrupt 248 Priority" line.long 0x1C "IPR63,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_255 ,Interrupt 255 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_254 ,Interrupt 254 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_253 ,Interrupt 253 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_252 ,Interrupt 252 Priority" else hgroup.long 0x4E0++0x1F hide.long 0x0 "IPR56,Interrupt Priority Register" hide.long 0x4 "IPR57,Interrupt Priority Register" hide.long 0x8 "IPR58,Interrupt Priority Register" hide.long 0xC "IPR59,Interrupt Priority Register" hide.long 0x10 "IPR60,Interrupt Priority Register" hide.long 0x14 "IPR61,Interrupt Priority Register" hide.long 0x18 "IPR62,Interrupt Priority Register" hide.long 0x1C "IPR63,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x500++0x1F line.long 0x0 "IPR64,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_259 ,Interrupt 259 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_258 ,Interrupt 258 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_257 ,Interrupt 257 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_256 ,Interrupt 256 Priority" line.long 0x4 "IPR65,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_263 ,Interrupt 263 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_262 ,Interrupt 262 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_261 ,Interrupt 261 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_260 ,Interrupt 260 Priority" line.long 0x8 "IPR66,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_267 ,Interrupt 267 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_266 ,Interrupt 266 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_265 ,Interrupt 265 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_264 ,Interrupt 264 Priority" line.long 0xC "IPR67,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_271 ,Interrupt 271 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_270 ,Interrupt 270 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_269 ,Interrupt 269 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_268 ,Interrupt 268 Priority" line.long 0x10 "IPR68,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_275 ,Interrupt 275 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_274 ,Interrupt 274 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_273 ,Interrupt 273 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_272 ,Interrupt 272 Priority" line.long 0x14 "IPR69,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_279 ,Interrupt 279 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_278 ,Interrupt 278 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_277 ,Interrupt 277 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_276 ,Interrupt 276 Priority" line.long 0x18 "IPR70,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_283 ,Interrupt 283 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_282 ,Interrupt 282 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_281 ,Interrupt 281 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_280 ,Interrupt 280 Priority" line.long 0x1C "IPR71,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_287 ,Interrupt 287 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_286 ,Interrupt 286 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_285 ,Interrupt 285 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_284 ,Interrupt 284 Priority" else hgroup.long 0x500++0x1F hide.long 0x0 "IPR64,Interrupt Priority Register" hide.long 0x4 "IPR65,Interrupt Priority Register" hide.long 0x8 "IPR66,Interrupt Priority Register" hide.long 0xC "IPR67,Interrupt Priority Register" hide.long 0x10 "IPR68,Interrupt Priority Register" hide.long 0x14 "IPR69,Interrupt Priority Register" hide.long 0x18 "IPR70,Interrupt Priority Register" hide.long 0x1C "IPR71,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x520++0x1F line.long 0x0 "IPR72,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_291 ,Interrupt 291 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_290 ,Interrupt 290 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_289 ,Interrupt 289 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_288 ,Interrupt 288 Priority" line.long 0x4 "IPR73,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_295 ,Interrupt 295 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_294 ,Interrupt 294 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_293 ,Interrupt 293 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_292 ,Interrupt 292 Priority" line.long 0x8 "IPR74,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_299 ,Interrupt 299 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_298 ,Interrupt 298 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_297 ,Interrupt 297 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_296 ,Interrupt 296 Priority" line.long 0xC "IPR75,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_303 ,Interrupt 303 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_302 ,Interrupt 302 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_301 ,Interrupt 301 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_300 ,Interrupt 300 Priority" line.long 0x10 "IPR76,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_307 ,Interrupt 307 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_306 ,Interrupt 306 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_305 ,Interrupt 305 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_304 ,Interrupt 304 Priority" line.long 0x14 "IPR77,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_311 ,Interrupt 311 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_310 ,Interrupt 310 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_309 ,Interrupt 309 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_308 ,Interrupt 308 Priority" line.long 0x18 "IPR78,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_315 ,Interrupt 315 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_314 ,Interrupt 314 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_313 ,Interrupt 313 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_312 ,Interrupt 312 Priority" line.long 0x1C "IPR79,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_319 ,Interrupt 319 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_318 ,Interrupt 318 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_317 ,Interrupt 317 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_316 ,Interrupt 316 Priority" else hgroup.long 0x520++0x1F hide.long 0x0 "IPR72,Interrupt Priority Register" hide.long 0x4 "IPR73,Interrupt Priority Register" hide.long 0x8 "IPR74,Interrupt Priority Register" hide.long 0xC "IPR75,Interrupt Priority Register" hide.long 0x10 "IPR76,Interrupt Priority Register" hide.long 0x14 "IPR77,Interrupt Priority Register" hide.long 0x18 "IPR78,Interrupt Priority Register" hide.long 0x1C "IPR79,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x540++0x1F line.long 0x0 "IPR80,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_323 ,Interrupt 323 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_322 ,Interrupt 322 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_321 ,Interrupt 321 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_320 ,Interrupt 320 Priority" line.long 0x4 "IPR81,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_327 ,Interrupt 327 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_326 ,Interrupt 326 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_325 ,Interrupt 325 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_324 ,Interrupt 324 Priority" line.long 0x8 "IPR82,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_331 ,Interrupt 331 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_330 ,Interrupt 330 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_329 ,Interrupt 329 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_328 ,Interrupt 328 Priority" line.long 0xC "IPR83,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_335 ,Interrupt 335 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_334 ,Interrupt 334 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_333 ,Interrupt 333 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_332 ,Interrupt 332 Priority" line.long 0x10 "IPR84,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_339 ,Interrupt 339 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_338 ,Interrupt 338 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_337 ,Interrupt 337 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_336 ,Interrupt 336 Priority" line.long 0x14 "IPR85,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_343 ,Interrupt 343 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_342 ,Interrupt 342 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_341 ,Interrupt 341 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_340 ,Interrupt 340 Priority" line.long 0x18 "IPR86,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_347 ,Interrupt 347 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_346 ,Interrupt 346 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_345 ,Interrupt 345 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_344 ,Interrupt 344 Priority" line.long 0x1C "IPR87,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_351 ,Interrupt 351 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_350 ,Interrupt 350 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_349 ,Interrupt 349 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_348 ,Interrupt 348 Priority" else hgroup.long 0x540++0x1F hide.long 0x0 "IPR80,Interrupt Priority Register" hide.long 0x4 "IPR81,Interrupt Priority Register" hide.long 0x8 "IPR82,Interrupt Priority Register" hide.long 0xC "IPR83,Interrupt Priority Register" hide.long 0x10 "IPR84,Interrupt Priority Register" hide.long 0x14 "IPR85,Interrupt Priority Register" hide.long 0x18 "IPR86,Interrupt Priority Register" hide.long 0x1C "IPR87,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x560++0x1F line.long 0x0 "IPR88,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_355 ,Interrupt 355 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_354 ,Interrupt 354 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_353 ,Interrupt 353 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_352 ,Interrupt 352 Priority" line.long 0x4 "IPR89,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_359 ,Interrupt 359 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_358 ,Interrupt 358 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_357 ,Interrupt 357 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_356 ,Interrupt 356 Priority" line.long 0x8 "IPR90,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_363 ,Interrupt 363 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_362 ,Interrupt 362 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_361 ,Interrupt 361 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_360 ,Interrupt 360 Priority" line.long 0xC "IPR91,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_367 ,Interrupt 367 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_366 ,Interrupt 366 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_365 ,Interrupt 365 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_364 ,Interrupt 364 Priority" line.long 0x10 "IPR92,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_371 ,Interrupt 371 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_370 ,Interrupt 370 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_369 ,Interrupt 369 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_368 ,Interrupt 368 Priority" line.long 0x14 "IPR93,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_375 ,Interrupt 375 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_374 ,Interrupt 374 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_373 ,Interrupt 373 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_372 ,Interrupt 372 Priority" line.long 0x18 "IPR94,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_379 ,Interrupt 379 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_378 ,Interrupt 378 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_377 ,Interrupt 377 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_376 ,Interrupt 376 Priority" line.long 0x1C "IPR95,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_383 ,Interrupt 383 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_382 ,Interrupt 382 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_381 ,Interrupt 381 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_380 ,Interrupt 380 Priority" else hgroup.long 0x560++0x1F hide.long 0x0 "IPR88,Interrupt Priority Register" hide.long 0x4 "IPR89,Interrupt Priority Register" hide.long 0x8 "IPR90,Interrupt Priority Register" hide.long 0xC "IPR91,Interrupt Priority Register" hide.long 0x10 "IPR92,Interrupt Priority Register" hide.long 0x14 "IPR93,Interrupt Priority Register" hide.long 0x18 "IPR94,Interrupt Priority Register" hide.long 0x1C "IPR95,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x580++0x1F line.long 0x0 "IPR96,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_387 ,Interrupt 387 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_386 ,Interrupt 386 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_385 ,Interrupt 385 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_384 ,Interrupt 384 Priority" line.long 0x4 "IPR97,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_391 ,Interrupt 391 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_390 ,Interrupt 390 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_389 ,Interrupt 389 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_388 ,Interrupt 388 Priority" line.long 0x8 "IPR98,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_395 ,Interrupt 395 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_394 ,Interrupt 394 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_393 ,Interrupt 393 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_392 ,Interrupt 392 Priority" line.long 0xC "IPR99,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_399 ,Interrupt 399 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_398 ,Interrupt 398 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_397 ,Interrupt 397 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_396 ,Interrupt 396 Priority" line.long 0x10 "IPR100,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_403 ,Interrupt 403 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_402 ,Interrupt 402 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_401 ,Interrupt 401 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_400 ,Interrupt 400 Priority" line.long 0x14 "IPR101,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_407 ,Interrupt 407 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_406 ,Interrupt 406 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_405 ,Interrupt 405 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_404 ,Interrupt 404 Priority" line.long 0x18 "IPR102,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_411 ,Interrupt 411 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_410 ,Interrupt 410 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_409 ,Interrupt 409 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_408 ,Interrupt 408 Priority" line.long 0x1C "IPR103,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_415 ,Interrupt 415 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_414 ,Interrupt 414 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_413 ,Interrupt 413 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_412 ,Interrupt 412 Priority" else hgroup.long 0x580++0x1F hide.long 0x0 "IPR96,Interrupt Priority Register" hide.long 0x4 "IPR97,Interrupt Priority Register" hide.long 0x8 "IPR98,Interrupt Priority Register" hide.long 0xC "IPR99,Interrupt Priority Register" hide.long 0x10 "IPR100,Interrupt Priority Register" hide.long 0x14 "IPR101,Interrupt Priority Register" hide.long 0x18 "IPR102,Interrupt Priority Register" hide.long 0x1C "IPR103,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x5A0++0x1F line.long 0x0 "IPR104,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_419 ,Interrupt 419 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_418 ,Interrupt 418 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_417 ,Interrupt 417 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_416 ,Interrupt 416 Priority" line.long 0x4 "IPR105,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_423 ,Interrupt 423 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_422 ,Interrupt 422 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_421 ,Interrupt 421 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_420 ,Interrupt 420 Priority" line.long 0x8 "IPR106,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_427 ,Interrupt 427 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_426 ,Interrupt 426 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_425 ,Interrupt 425 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_424 ,Interrupt 424 Priority" line.long 0xC "IPR107,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_431 ,Interrupt 431 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_430 ,Interrupt 430 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_429 ,Interrupt 429 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_428 ,Interrupt 428 Priority" line.long 0x10 "IPR108,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_435 ,Interrupt 435 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_434 ,Interrupt 434 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_433 ,Interrupt 433 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_432 ,Interrupt 432 Priority" line.long 0x14 "IPR109,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_439 ,Interrupt 439 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_438 ,Interrupt 438 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_437 ,Interrupt 437 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_436 ,Interrupt 436 Priority" line.long 0x18 "IPR110,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_443 ,Interrupt 443 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_442 ,Interrupt 442 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_441 ,Interrupt 441 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_440 ,Interrupt 440 Priority" line.long 0x1C "IPR111,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_447 ,Interrupt 447 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_446 ,Interrupt 446 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_445 ,Interrupt 445 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_444 ,Interrupt 444 Priority" else hgroup.long 0x5A0++0x1F hide.long 0x0 "IPR104,Interrupt Priority Register" hide.long 0x4 "IPR105,Interrupt Priority Register" hide.long 0x8 "IPR106,Interrupt Priority Register" hide.long 0xC "IPR107,Interrupt Priority Register" hide.long 0x10 "IPR108,Interrupt Priority Register" hide.long 0x14 "IPR109,Interrupt Priority Register" hide.long 0x18 "IPR110,Interrupt Priority Register" hide.long 0x1C "IPR111,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x5C0++0x1F line.long 0x0 "IPR112,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_451 ,Interrupt 451 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_450 ,Interrupt 450 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_449 ,Interrupt 449 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_448 ,Interrupt 448 Priority" line.long 0x4 "IPR113,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_455 ,Interrupt 455 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_454 ,Interrupt 454 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_453 ,Interrupt 453 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_452 ,Interrupt 452 Priority" line.long 0x8 "IPR114,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_459 ,Interrupt 459 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_458 ,Interrupt 458 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_457 ,Interrupt 457 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_456 ,Interrupt 456 Priority" line.long 0xC "IPR115,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_463 ,Interrupt 463 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_462 ,Interrupt 462 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_461 ,Interrupt 461 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_460 ,Interrupt 460 Priority" line.long 0x10 "IPR116,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_467 ,Interrupt 467 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_466 ,Interrupt 466 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_465 ,Interrupt 465 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_464 ,Interrupt 464 Priority" line.long 0x14 "IPR117,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_471 ,Interrupt 471 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_470 ,Interrupt 470 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_469 ,Interrupt 469 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_468 ,Interrupt 468 Priority" line.long 0x18 "IPR118,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_475 ,Interrupt 475 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_474 ,Interrupt 474 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_473 ,Interrupt 473 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_472 ,Interrupt 472 Priority" line.long 0x1C "IPR119,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_479 ,Interrupt 479 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_478 ,Interrupt 478 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_477 ,Interrupt 477 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_476 ,Interrupt 476 Priority" else hgroup.long 0x5C0++0x1F hide.long 0x0 "IPR112,Interrupt Priority Register" hide.long 0x4 "IPR113,Interrupt Priority Register" hide.long 0x8 "IPR114,Interrupt Priority Register" hide.long 0xC "IPR115,Interrupt Priority Register" hide.long 0x10 "IPR116,Interrupt Priority Register" hide.long 0x14 "IPR117,Interrupt Priority Register" hide.long 0x18 "IPR118,Interrupt Priority Register" hide.long 0x1C "IPR119,Interrupt Priority Register" endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end sif (CORENAME()=="CORTEXM33F") tree "Floating-point Unit (FPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 8. group.long 0xF34++0x0B line.long 0x00 "FPCCR,Floating-Point Context Control Register" bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled" bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled" bitfld.long 0x00 29. " LSPENS ,This bit controls whether the LSPEN bit is writeable from the Non-secure state" "Writeable,Write ignored" newline bitfld.long 0x00 28. " CLRONRET ,Clear floating point caller saved registers on exception return" "Disabled,Enabled" bitfld.long 0x00 27. " CLRONRETS ,Clear on return Secure only" "Both states,Secure only" bitfld.long 0x00 26. " TS ,Treat as Secure" "Disabled,Enabled" newline bitfld.long 0x00 10. " UFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the UsageFault exception to pending" "Not able,Able" bitfld.long 0x00 9. " SPLIMVIOL ,Indicates whether the FP context violates the stack pointer limit that was active when lazy state preservation was activated" "Low,High" bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able" newline bitfld.long 0x00 7. " SFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the SecureFault exception to pending" "Not able,Able" bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able" bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able" newline bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able" bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread" bitfld.long 0x00 2. " S ,Indicates the FP context belongs to the specified security state" "Non-secure,Secure" newline bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged" bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active" line.long 0x04 "FPCAR,Floating-Point Context Address Register" hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame" line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register" bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative" bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation" bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode" newline bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero" rgroup.long 0xF40++0x0B line.long 0x00 "MVFR0,Media and FP Feature Register 0" bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..." bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..." bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..." newline bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..." bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..." bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..." line.long 0x04 "MVFR1,Media and FP Feature Register 1" bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..." bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..." newline bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..." bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Fully denormalized,?..." line.long 0x08 "MVFR2,Media and FP Feature Register 2" bitfld.long 0x08 4.--7. " VFP_MISC ,Indicates the hardware support for FP miscellaneous features" "Not supported,,,,Supported,?..." width 0xB else newline textline "COREDEBUG component base address not specified" newline endif tree.end endif tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 13. group.long 0xD30++0x03 line.long 0x00 "DFSR,Debug Fault Status Register" eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated" eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered" eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated" newline eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated" eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated" newline hgroup.long 0xDF0++0x03 hide.long 0x00 "DHCSR,Debug Halting Control and Status Register" in newline wgroup.long 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write" hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register" group.long 0xDF8++0x03 line.long 0x00 "DCRDR,Debug Core Register Data Register" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000) group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled" bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled" newline bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" else group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled" bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled" newline bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" endif newline group.long 0xE04++0x07 line.long 0x00 "DAUTHCTRL,Debug Authentication Control Register" bitfld.long 0x00 3. " INTSPNIDEN ,Internal secure non-invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 2. " SPNIDENSEL ,Secure non-invasive debug enable select.Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure non-invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPNIDEN" bitfld.long 0x00 1. " INTSPIDEN ,Internal secure invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 0. " SPIDENSEL ,Secure invasive debug enable select. Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPIDEN" line.long 0x04 "DSCSR,Debug Security Control and Status Register" bitfld.long 0x04 16. " CDS ,This field indicates the current security state of the processor" "Non-secure,Secure" bitfld.long 0x04 1. " SBRSEL ,Secure banked register select" "Non-secure,Secure" bitfld.long 0x04 0. " SBRSELEN ,Secure banked register select enable" "Disabled,Enabled" rgroup.long 0xFB8++0x03 line.long 0x00 "DAUTHSTATUS,Debug Authentication Status Register" bitfld.long 0x00 7. " SNI ,Secure non-invasive debug implemented" ",Implemented" bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enabled" "0,1" bitfld.long 0x00 5. " SI ,Secure invasive debug features implemented" ",Implemented" bitfld.long 0x00 4. " SE ,Secure invasive debug enabled" "0,1" newline bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implemented" ",Implemented" bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enabled" "0,1" bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implemented" ",Implemented" bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enabled" "0,1" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Flash Patch and Breakpoint Unit (FPB)" sif COMPonent.AVAILABLE("FPB") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1)) width 12. group.long 0x00++0x03 line.long 0x00 "FP_CTRL,Flash Patch Control Register" bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Reserved,Version 2,?..." rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,?..." rbitfld.long 0x00 8.--11. " NUM_LIT ,Number of literal comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " KEY ,Key Field" "Low,High" bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled" textline " " if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x04))&0x20000000)==0x20000000) rgroup.long 0x04++0x03 line.long 0x00 "FP_REMAP,Flash Patch Remap Register" bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported" hexmask.long 0x00 5.--28. 0x20 " REMAP ,Remap address" else rgroup.long 0x04++0x03 line.long 0x00 "FP_REMAP,Flash Patch Remap Register" bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00) group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00) group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00) group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00) group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif tree "CoreSight Identification Registers" width 12. rgroup.long 0xFCC++0x03 line.long 0x00 "FP_DEVTYPE,FPB CoreSight Device Type Register" hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type" hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xFBC))&0x100000)==0x100000) rgroup.long 0xFBC++0x03 line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register" hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part" else rgroup.long 0xFBC++0x03 line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" endif rgroup.long 0xFE0++0x0F line.long 0x00 "FP_PIDR0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "FP_PIDR1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "FP_PIDR2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0C "FP_PIDR3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "FP_PIDR4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "FP_CIDR0,Component ID0 (Preamble)" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "FP_CIDR1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class" line.long 0x08 "FP_CIDR2,Component ID2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0c "FP_CIDR3,Component ID3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 0x0b else newline textline "FPB component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 16. group.long 0x00++0x03 line.long 0x00 "DWT_CTRL,Control Register" rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,?..." rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported" rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported" textline " " rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported" bitfld.long 0x00 23. " CYCDISS ,Controls whether the cycle counter is prevented from incrementing while the PE is in Secure state" "No,Yes" bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled" bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled" bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " PCSAMPLENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled" bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]" bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]" textline " " bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x1000000)==0x0000000) group.long 0x04++0x03 line.long 0x00 "DWT_CYCCNT,Cycle Count register" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x2000000)==0x0000000) group.long 0x08++0x17 line.long 0x00 "DWT_CPICNT,CPI Count register" hexmask.long.byte 0x00 0.--7. 1. " CPICNT ,Base instruction overhead counter" line.long 0x04 "DWT_EXCCNT,Exception Overhead Count Register" hexmask.long.byte 0x04 0.--7. 1. " EXCCNT ,The exception overhead counter" line.long 0x08 "DWT_SLEEPCNT,Sleep Count Register" hexmask.long.byte 0x08 0.--7. 1. " SLEEPCNT ,Sleep Counter" line.long 0x10 "DWT_LSUCNT,LSU Count Register" hexmask.long.byte 0x10 0.--7. 1. " LSUCNT ,Load-store overhead counter" line.long 0x14 "DWT_FOLDCNT,Folded-instruction Count register" hexmask.long.byte 0x14 0.--7. 1. " FOLDCNT ,Folded-instruction counter" endif rgroup.long 0x1C++0x03 line.long 0x00 "DWT_PCSR,Program Counter Sample register" textline " " if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)==0x1) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x4) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xC) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xF) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" endif group.long (0x20+0x08)++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Register 0" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)==0x1) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x4) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xC) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xF) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" endif group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Register 1" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)==0x1) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x4) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xC) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xF) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" endif group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Register 2" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)==0x1) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x4) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xC) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xF) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" endif group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Register 3" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved" tree "CoreSight Identification Registers" width 13. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xFBC))&0x100000)==0x100000) rgroup.long 0xFBC++0x03 line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register" hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part" else rgroup.long 0xFBC++0x03 line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" endif rgroup.long 0xFCC++0x03 line.long 0x00 "DWT_DEVTYPE,Device Type Identifier register" hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type" hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type" rgroup.long 0xFE0++0x0F line.long 0x00 "DWT_PIDR0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "DWT_PIDR1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "DWT_PIDR2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "DWT_PIDR3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "DWT_PIDR4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "DWT_CIDR0,Component ID0 (Preamble)" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "DWT_CIDR1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class" line.long 0x08 "DWT_CIDR2,Component ID2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0c "DWT_CIDR3,Component ID3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 0x0b else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end endif sif (CORENAME()=="CORTEXM0+") tree.close "Core Registers (Cortex-M0+)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 0x8 if (CORENAME()=="CORTEXM1") group.long 0x10++0x0b line.long 0x00 "STCSR,SysTick Control and Status Register" bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1" bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock" textline " " bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick" bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled" line.long 0x04 "STRVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0" line.long 0x08 "STCVR,SysTick Current Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter" else group.long 0x10++0x0b line.long 0x00 "STCSR,SysTick Control and Status Register" bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1" bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock" textline " " bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick" bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled" line.long 0x04 "STRVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0" line.long 0x08 "STCVR,SysTick Current Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter" endif if (CORENAME()=="CORTEXM1") rgroup.long 0x1c++0x03 line.long 0x00 "STCR,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1" bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known" else rgroup.long 0x1c++0x03 line.long 0x00 "STCR,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors" endif if (CORENAME()=="CORTEXM1") rgroup.long 0xd00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited" bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15" textline " " bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,ARMv6-M,0xD,0xE,0xF" textline " " abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xC21=Cortex-M1" bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15" elif (CORENAME()=="CORTEXM0+") rgroup.long 0xd00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited" bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15" textline " " bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,ARMv6-M,0xD,0xE,0xF" textline " " abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xC60=Cortex-M0+" bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15" else rgroup.long 0xd00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited" bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15" textline " " bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,ARMv6-M,0xD,0xE,0xF" textline " " abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xC20=Cortex-M0" bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15" endif group.long 0xd04++0x03 line.long 0x00 "ICSR,Interrupt Control State Register" bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending" bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending" textline " " bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending" bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending" textline " " bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending" bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service" textline " " bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt" hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field" textline " " hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field" if (CORENAME()=="CORTEXM0+") group.long 0xd08++0x03 line.long 0x00 "VTOR,Vector Table Offset Register" hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address" else textline " " endif group.long 0xd0c++0x03 line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key" bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian" textline " " bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset" bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear" group.long 0xd10++0x03 line.long 0x00 "SCR,System Control Register" bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" textline " " bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" rgroup.long 0xd14++0x03 line.long 0x00 "CCR,Configuration and Control Register" bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned" bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped" group.long 0xd1c++0x0b line.long 0x00 "SHPR2,System Handler Priority Register 2" bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11" line.long 0x04 "SHPR3,System Handler Priority Register 3" bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11" bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11" line.long 0x08 "SHCSR,System Handler Control and State Register" bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending" if (CORENAME()=="CORTEXM0+") hgroup.long 0x08++0x03 hide.long 0x00 "ACTLR,Auxiliary Control Register" else textline " " endif else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit (MPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 8.--15. 1. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,?..." group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" textline " " textline " " endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller (NVIC)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 12. tree "Interrupt Enable Registers" group.long 0x100++0x03 line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" tree.end tree "Interrupt Pending Registers" group.long 0x200++0x03 line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" tree.end width 6. tree "Interrupt Priority Registers" group.long 0x400++0x1F line.long 0x00 "INT0,Interrupt Priority Register" bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3" bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3" bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3" bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3" line.long 0x04 "INT1,Interrupt Priority Register" bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3" bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3" bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3" bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3" line.long 0x08 "INT2,Interrupt Priority Register" bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3" bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3" bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3" bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3" line.long 0x0C "INT3,Interrupt Priority Register" bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3" bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3" bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3" bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3" line.long 0x10 "INT4,Interrupt Priority Register" bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3" bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3" bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3" bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3" line.long 0x14 "INT5,Interrupt Priority Register" bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3" bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3" bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3" bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3" line.long 0x18 "INT6,Interrupt Priority Register" bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3" bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3" bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3" bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3" line.long 0x1C "INT7,Interrupt Priority Register" bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3" bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3" bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3" bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3" tree.end width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 0xA group.long 0xD30++0x03 line.long 0x00 "DFSR,Data Fault Status Register" eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred" eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred" textline " " eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match" textline " " eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match" eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request" if (CORENAME()=="CORTEXM1") if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00) group.long 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " textline " " textfld " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" else group.long 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted" textline " " bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" endif else if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00) group.long 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " textline " " textfld " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" else group.long 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted" textline " " bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" endif endif wgroup.long 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Selector Register" bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write" bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..." group.long 0xDF8++0x07 line.long 0x00 "DCRDR,Debug Core Register Data Register" hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor" line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled" bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error" textline " " bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Breakpoint Unit (BPU)" sif COMPonent.AVAILABLE("BPU") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1)) width 8. group.long 0x00++0x03 line.long 0x00 "BP_CTRL,Breakpoint Control Register" bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " KEY ,Key field" "No write,Write" bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled" group.long 0x8++0x03 line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled" group.long 0xC++0x03 line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled" group.long 0x10++0x03 line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled" group.long 0x14++0x03 line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled" else newline textline "BPU component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 14. rgroup.long 0x00++0x03 line.long 0x00 "DW_CTRL,DW Control Register " bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x1c++0x03 line.long 0x00 "DW_PCSR,DW Program Counter Sample Register" hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF" group.long 0x20++0x0b line.long 0x00 "DW_COMP0,DW Comparator Register 0" hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address" line.long 0x04 "DW_MASK0,DW Mask Register 0" hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP" line.long 0x08 "DW_FUNCTION0,DW Function Register 0" bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match" bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..." group.long 0x30++0x0b line.long 0x00 "DW_COMP1,DW Comparator Register 1" hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address" line.long 0x04 "DW_MASK1,DW Mask Register 1 " hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP" line.long 0x08 "DW_FUNCTION1,DW Function Register 1" bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match" bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..." else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end endif sif (CORENAME()=="CORTEXA35") tree "Core Registers (Cortex-A35)" AUTOINDENT.PUSH AUTOINDENT.ON center tree tree.open "AArch64" tree "ID Registers" rgroup.quad spr:0x30000++0x0 line.quad 0x00 "MIDR_EL1,Main ID Register" hexmask.quad.byte 0x00 24.--31. 0x01 "IMPLEMENTER,Implementer code" bitfld.quad 0x00 20.--23. "VARIANT,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 16.--19. "ARCHITECTURE,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CPUID scheme" newline hexmask.quad.word 0x00 4.--15. 0x10 "PARTNUM,Primary Part Number" bitfld.quad 0x00 0.--3. "REVISION,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.quad spr:0x30040++0x00 line.quad 0x00 "ID_AA64PFR0_EL1,AArch64 Processor Feature Register 0" bitfld.quad 0x00 24.--27. "GIC,GIC CPU interface" "Disabled,Enabled,?..." bitfld.quad 0x00 20.--23. "ADVSIMD,Advanced SIMD" "Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented" bitfld.quad 0x00 16.--19. "FP,Floating-point" "Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented" newline bitfld.quad 0x00 12.--15. "EL3,EL3 exception handling" "Reserved,Reserved,AArch32/AArch64,?..." bitfld.quad 0x00 8.--11. "EL2,EL2 exception handling" "Reserved,Reserved,AArch32/AArch64,?..." bitfld.quad 0x00 4.--7. "EL1,EL1 exception handling" "Reserved,Reserved,AArch32/AArch64,?..." newline bitfld.quad 0x00 0.--3. "EL0,EL0 exception handling" "Reserved,Reserved,AArch32/AArch64,?..." rgroup.quad spr:0x30050++0x00 line.quad 0x00 "ID_AA64DFR0_EL1,AArch64 Debug Feature Register 0" bitfld.quad 0x00 28.--31. "CTX_CMPS,Number of breakpoints that are context-aware minus 1" "Reserved,1,?..." bitfld.quad 0x00 20.--23. "WRPS,The number of watchpoints minus 1" "Reserved,Reserved,Reserved,3,?..." bitfld.quad 0x00 12.--15. "BRPS,The number of breakpoints minus 1" "Reserved,Reserved,Reserved,Reserved,Reserved,5,?..." newline bitfld.quad 0x00 8.--11. "PMUVER,Performance Monitors extension version" "Reserved,Implemented,?..." bitfld.quad 0x00 4.--7. "TRACEVER,Trace extension" "Not implemented,?..." bitfld.quad 0x00 0.--3. "DEBUGGER,Debug architecture version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implemented,?..." rgroup.quad spr:0x30060++0x00 line.quad 0x00 "ID_AA64ISAR0_EL1,AArch64 Instruction Set Attribute Register 0" bitfld.quad 0x00 16.--19. "CRC32,CRC32" "Reserved,Implemented,?..." bitfld.quad 0x00 12.--15. "SHA2,SHA2 instructions are implemented" "Not implemented,Implemented,?..." bitfld.quad 0x00 8.--11. "SHA1,SHA1 instructions are implemented" "Not implemented,Implemented,?..." newline bitfld.quad 0x00 4.--7. "AES,AES instructions are implemented" "Not implemented,Reserved,Implemented,?..." rgroup.quad spr:0x30070++0x00 line.quad 0x00 "ID_AA64MMFR0_EL1,AArch64 Memory Model Feature Register 0" bitfld.quad 0x00 28.--31. "TGRAN4,4KB granule supported" "Supported,?..." bitfld.quad 0x00 24.--27. "TGRAN64,64KB granule supported" "Supported,?..." bitfld.quad 0x00 20.--23. "TGRAN16,16KB granule supported" "Reserved,Supported,?..." newline bitfld.quad 0x00 12.--15. "SNSMEM,Secure versus Non-secure Memory distinction" "Reserved,Supported,?..." bitfld.quad 0x00 8.--11. "BIGEND,Mixed-endian configuration support" "Reserved,Supported,?..." bitfld.quad 0x00 4.--7. "ASIDBITS,Number of ASID bits" "Reserved,Reserved,16 bits,?..." newline bitfld.quad 0x00 0.--3. "PARANGE,Physical address range supported" "Reserved,Reserved,40 bits/1 TB,?..." rgroup.quad spr:0x30054++0x00 line.quad 0x00 "ID_AA64AFR0_EL1,AArch64 Auxiliary Feature Register 0" rgroup.quad spr:0x30055++0x00 line.quad 0x00 "ID_AA64AFR1_EL1,AArch64 Auxiliary Feature Register 1" rgroup.quad spr:0x30041++0x00 line.quad 0x00 "ID_AA64PFR1_EL1,AArch64 Processor Feature Register 1" rgroup.quad spr:0x30051++0x00 line.quad 0x00 "ID_AA64DFR1_EL1,AArch64 Debug Feature Register 1" rgroup.quad spr:0x30061++0x00 line.quad 0x00 "ID_AA64ISAR1_EL1,AArch64 Instruction Set Attribute Register 1" rgroup.quad spr:0x30071++0x00 line.quad 0x00 "ID_AA64MMFR1_EL1,AArch64 Memory Model Feature Register 1" rgroup.quad spr:0x30010++0x00 line.quad 0x00 "ID_PFR0_EL1,AArch32 Processor Feature Register 0" bitfld.quad 0x00 12.--15. "STATE3,Thumb Execution Environment (Thumb-EE) Support" "Not supported,?..." bitfld.quad 0x00 8.--11. "STATE2,Support for Jazelle extension" "Reserved,Supported,?..." bitfld.quad 0x00 4.--7. "STATE1,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..." newline bitfld.quad 0x00 0.--3. "STATE0,ARM Instruction Set Support" "Reserved,Supported,?..." rgroup.quad spr:0x30011++0x00 line.quad 0x00 "ID_PFR1_EL1,AArch32 Processor Feature Register 1" bitfld.quad 0x00 28.--31. "GIC_CPU,GIC CPU Support" "Disabled,Enabled,?..." newline bitfld.quad 0x00 16.--19. "GT,Generic Timer Support" "Reserved,Supported,?..." bitfld.quad 0x00 12.--15. "V,Virtualization Extensions Support" "Reserved,Supported,?..." bitfld.quad 0x00 8.--11. "MPM,Microcontroller Programmer's Model Support" "Not supported,?..." newline bitfld.quad 0x00 4.--7. "S,Security Extensions Architecture v1 Support" "Reserved,Supported,?..." bitfld.quad 0x00 0.--3. "PM,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..." rgroup.quad spr:0x30012++0x00 line.quad 0x00 "ID_DFR0_EL1,AArch32 Debug Feature Register 0" bitfld.quad 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.quad 0x00 20.--23. "MPROFDBG,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.quad 0x00 16.--19. "MMAPTRC,Trace Model (Memory-Mapped) Support" "Not supported,Supported,?..." newline bitfld.quad 0x00 12.--15. "COPTRC,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.quad 0x00 4.--7. "COPSDBG,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.quad 0x00 0.--3. "COPDBG,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." rgroup.quad spr:0x30013++0x00 line.quad 0x00 "ID_AFR0_EL1,AArch32 Auxiliary Feature Register 0 EL1" rgroup.quad spr:0x30014++0x00 line.quad 0x00 "ID_MMFR0_EL1,AArch32 Memory Model Feature Register 0" bitfld.quad 0x00 28.--31. "IS,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..." bitfld.quad 0x00 24.--27. "FCSE,Fast Context Switch Memory Mappings Support" "Not supported,?..." bitfld.quad 0x00 20.--23. "AR,Auxiliary Register Support" "Reserved,Reserved,Supported,?..." newline bitfld.quad 0x00 16.--19. "TCM,TCM and Associated DMA Support" "Not supported,?..." bitfld.quad 0x00 12.--15. "SL,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.quad 0x00 8.--11. "OS,Outer Shareable Support" "Reserved,Implemented,?..." newline bitfld.quad 0x00 4.--7. "PMSA,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.quad 0x00 0.--3. "VMSA,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,VMSAv7,?..." rgroup.quad spr:0x30015++0x00 line.quad 0x00 "ID_MMFR1_EL1,AArch32 Memory Model Feature Register 1" bitfld.quad 0x00 28.--31. "BPRED,Indicates branch predictor management requirements" "Reserved,Reserved,Reserved,Reserved,Not required,?..." bitfld.quad 0x00 24.--27. "L1TSTCLN,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.quad 0x00 20.--23. "L1UNI,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." newline bitfld.quad 0x00 16.--19. "L1HVD,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.quad 0x00 12.--15. "L1UNISW,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.quad 0x00 8.--11. "L1HVDSW,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." newline bitfld.quad 0x00 4.--7. "L1UNIVA,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.quad 0x00 0.--3. "L1HVDVA,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." rgroup.quad spr:0x30016++0x00 line.quad 0x00 "ID_MMFR2_EL1,AArch32 Memory Model Feature Register 2" bitfld.quad 0x00 28.--31. "HWACCFLG,Hardware Access Flag Support" "Not supported,?..." bitfld.quad 0x00 24.--27. "WFISTALL,Wait for Interrupt Stalling Support" "Reserved,Supported,?..." bitfld.quad 0x00 20.--23. "MEMBARR,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..." newline bitfld.quad 0x00 16.--19. "UNITLB,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.quad 0x00 12.--15. "HVDTLB,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.quad 0x00 8.--11. "LL1HVDRNG,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..." newline bitfld.quad 0x00 4.--7. "L1HVDBG,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." bitfld.quad 0x00 0.--3. "L1HVDFG,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." rgroup.quad spr:0x30017++0x00 line.quad 0x00 "ID_MMFR3_EL1,AArch32 Memory Model Feature Register 3" bitfld.quad 0x00 28.--31. "SUPERSEC,Supersection support" "Supported,?..." bitfld.quad 0x00 24.--27. "CMEMSZ,Cache memory size" "Reserved,Reserved,1TByte,?..." bitfld.quad 0x00 20.--23. "CW,Coherent walk" "Reserved,Supported,?..." newline bitfld.quad 0x00 12.--15. "MB,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..." bitfld.quad 0x00 8.--11. "BPM,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..." bitfld.quad 0x00 4.--7. "CMSW,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." newline bitfld.quad 0x00 0.--3. "CMVA,Invalidate Cache MVA Support" "Reserved,Supported,?..." rgroup.quad spr:0x30020++0x00 line.quad 0x00 "ID_ISAR0_EL1,AArch32 Instruction Set Attribute Register 0" bitfld.quad 0x00 24.--27. "DIVIDE,Divide Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.quad 0x00 20.--23. "DEBUG,Debug Instructions Support" "Reserved,Supported,?..." bitfld.quad 0x00 16.--19. "COPROC,Coprocessor Instructions Support" "Not supported,?..." newline bitfld.quad 0x00 12.--15. "CMPBRANCH,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..." bitfld.quad 0x00 8.--11. "BITFIELD,Bitfield Instructions Support" "Reserved,Supported,?..." bitfld.quad 0x00 4.--7. "BITCOUNT,Bit Counting Instructions Support" "Reserved,Supported,?..." newline bitfld.quad 0x00 0.--3. "SWAP,Swap Instructions Support" "Not supported,?..." rgroup.quad spr:0x30021++0x00 line.quad 0x00 "ID_ISAR1_EL1,AArch32 Instruction Set Attribute Register 1" bitfld.quad 0x00 28.--31. "JAZELLE,Jazelle Instructions Support" "Reserved,Supported,?..." bitfld.quad 0x00 24.--27. "INTERWORK,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.quad 0x00 20.--23. "IMMEDIATE,Immediate Instructions Support" "Reserved,Supported,?..." newline bitfld.quad 0x00 16.--19. "IFTHEN,If Then Instructions Support" "Reserved,Supported,?..." bitfld.quad 0x00 12.--15. "EXTEND,Extend Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.quad 0x00 8.--11. "EXCEPT_AR,Exception A and R Instructions Support" "Reserved,Supported,?..." newline bitfld.quad 0x00 4.--7. "EXCEPT,Exception in ARM Instructions Support" "Reserved,Supported,?..." bitfld.quad 0x00 0.--3. "ENDIAN,Endian Instructions Support" "Reserved,Supported,?..." rgroup.quad spr:0x30022++0x00 line.quad 0x00 "ID_ISAR2_EL1,AArch32 Instruction Set Attribute Register 2" bitfld.quad 0x00 28.--31. "REVERSAL,Reversal Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.quad 0x00 24.--27. "PSR_AR,PSR Instructions Support" "Reserved,Supported,?..." bitfld.quad 0x00 20.--23. "MULTU,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..." newline bitfld.quad 0x00 16.--19. "MULTS,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.quad 0x00 12.--15. "MULT,Multiply Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.quad 0x00 8.--11. "MULTIACCESSINT,Multi-Access Interruptible Instructions Support" "Not supported,?..." newline bitfld.quad 0x00 4.--7. "MEMHINT,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.quad 0x00 0.--3. "LOADSTORE,Load and Store Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.quad spr:0x30023++0x00 line.quad 0x00 "ID_ISAR3_EL1,AArch32 Instruction Set Attribute Register 3" bitfld.quad 0x00 28.--31. "THUMBEE,Thumb-EE Extensions Support" "Not supported,?..." bitfld.quad 0x00 24.--27. "TRUENOP,True NOP Instructions Support" "Reserved,Supported,?..." bitfld.quad 0x00 20.--23. "THUMBCOPY,Thumb Copy Instructions Support" "Reserved,Supported,?..." newline bitfld.quad 0x00 16.--19. "TABBRANCH,Table Branch Instructions Support" "Reserved,Supported,?..." bitfld.quad 0x00 12.--15. "SYNCHPRIM,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.quad 0x00 8.--11. "SVC,SVC Instructions Support" "Reserved,Supported,?..." newline bitfld.quad 0x00 4.--7. "SIMD,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.quad 0x00 0.--3. "SATURATE,Saturate Instructions Support" "Reserved,Supported,?..." rgroup.quad spr:0x30024++0x00 line.quad 0x00 "ID_ISAR4_EL1,AArch32 Instruction Set Attribute Register 4" bitfld.quad 0x00 28.--31. "SWP_FRAC,Memory System Locking Support" "Not supported,?..." bitfld.quad 0x00 24.--27. "PSR_M,PSR_M Instructions Support" "Not supported,?..." bitfld.quad 0x00 20.--23. "SYNCHPRIM_FRAC,Synchronization Primitive instructions" "Supported,?..." newline bitfld.quad 0x00 16.--19. "BARRIER,Barrier Instructions Support" "Reserved,Supported,?..." bitfld.quad 0x00 12.--15. "SMC,SMC Instructions Support" "Reserved,Supported,?..." bitfld.quad 0x00 8.--11. "WRITEBACK,Write-Back Instructions Support" "Reserved,Supported,?..." newline bitfld.quad 0x00 4.--7. "WITHSHIFTS,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.quad 0x00 0.--3. "UNPRIV,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.quad spr:0x30025++0x00 line.quad 0x00 "ID_ISAR5_EL1,AArch32 Instruction Set Attribute Register 5" bitfld.quad 0x00 16.--19. "CRC32,CRC32 Instructions Support" "Reserved,Supported,?..." bitfld.quad 0x00 12.--15. "SHA2,SHA2 Instructions Support" "Not supported,Supported,?..." bitfld.quad 0x00 8.--11. "SHA1,SHA1 Instructions Support" "Not supported,Supported,?..." newline bitfld.quad 0x00 4.--7. "AES,AES Instructions Support" "Not supported,Reserved,Supported,?..." bitfld.quad 0x00 0.--3. "SEVL,SEVL Instructions Support" "Reserved,Supported,?..." rgroup.quad spr:0x30005++0x00 line.quad 0x00 "MPIDR_EL1,Multiprocessor Affinity Register" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Highest level affinity field" bitfld.quad 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor" bitfld.quad 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largely independent,?..." newline hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0. Lowest level affinity field" rgroup.quad spr:0x30006++0x0 line.quad 0x00 "REVIDR_EL1,Revision ID Register" rgroup.quad spr:0x33007++0x00 line.quad 0x00 "DCZID_EL0,Data Cache Zero ID Register" bitfld.quad 0x00 4. "DZP,Prohibit the DC ZVA instruction" "Not prohibited,Prohibited" bitfld.quad 0x00 0.--3. "BS,Block Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." rgroup.quad spr:0x31007++0x00 line.quad 0x00 "AIDR_EL1,Auxiliary ID Register" group.quad spr:0x34000++0x0 line.quad 0x00 "VPIDR_EL2,Virtualization Processor ID Register" hexmask.quad.byte 0x00 24.--31. 0x01 "IMPLEMENTER,Implementer code" bitfld.quad 0x00 20.--23. "VARIANT,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 16.--19. "ARCHITECTURE,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CPUID scheme" newline hexmask.quad.word 0x00 4.--15. 0x10 "PARTNUM,Primary Part Number" bitfld.quad 0x00 0.--3. "REVISION,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.quad spr:0x34005++0x00 line.quad 0x00 "VMPIDR_EL2,Virtualization Multiprocessor ID Register" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Highest level affinity field" bitfld.quad 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor" bitfld.quad 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largely independent,?..." newline hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0. Lowest level affinity field" tree.end tree "System Control and Configuration" group.quad spr:0x36111++0x00 line.quad 0x00 "SDER32_EL3,Secure Debug Enable Register" bitfld.quad 0x00 1. "SUNIDEN,Enable non-invasive debug features in Secure User mode" "Disabled,Enabled" bitfld.quad 0x00 0. "SUIDEN,Enable debug exceptions in Secure User mode" "Disabled,Enabled" group.quad spr:0x30100++0x0 line.quad 0x00 "SCTLR_EL1,System Control Register (EL1)" bitfld.quad 0x00 26. "UCI,EL0 access enable (DC CVAU|DC CIVAC|DC CVAC|IC IVAU)" "Disabled,Enabled" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" newline bitfld.quad 0x00 24. "E0E,Endianness of explicit data access at EL0" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.quad 0x00 18. "NTWE,Not trap WFE" "No,Yes" bitfld.quad 0x00 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.quad 0x00 15. "UCT,EL0 access enable (CTR_EL0)" "Disabled,Enabled" bitfld.quad 0x00 14. "DZE,EL0 access enable (DC ZVA)" "Disabled,Enabled" newline bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.quad 0x00 9. "UMA,User Mask Access" "Disabled,Enabled" newline bitfld.quad 0x00 8. "SED,SETEND Disable" "No,Yes" bitfld.quad 0x00 7. "ITD,IT instruction disable" "No,Yes" newline bitfld.quad 0x00 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" bitfld.quad 0x00 4. "SA0,EL0 stack alignment check enable" "Disabled,Enabled" newline bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" newline bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x34100++0x0 line.quad 0x00 "SCTLR_EL2,System Control Register (EL2)" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x36100++0x0 line.quad 0x00 "SCTLR_EL3,System Control Register (EL3)" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x31F20++0x00 line.quad 0x00 "CPUACTLR_EL1,CPU Auxiliary Control Register" bitfld.quad 0x00 44. "ENDCCASCI,Enable Data Cache Clean As data cache Clean/Invalidate" "Disabled,Enabled" bitfld.quad 0x00 30. "CDIDIS,Disable Cryptographic Dual Issue" "No,Yes" newline bitfld.quad 0x00 29. "DIDIS,Disable Dual Issue" "No,Yes" bitfld.quad 0x00 27.--28. "RADIS,Write streaming no-allocate threshold" "16th,128th,512th,Disabled" newline bitfld.quad 0x00 25.--26. "L1RADIS,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled" bitfld.quad 0x00 24. "DTAH,Disable Transient allocation hint" "No,Yes" newline bitfld.quad 0x00 23. "STBPFRS,Disable ReadUnique request for prefetch streams initiated by STB accesses" "No,Yes" bitfld.quad 0x00 22. "STBPFDIS,Disable prefetch streams initiated from STB accesses" "No,Yes" newline bitfld.quad 0x00 19.--20. "NPFSTRM,Number of independent data prefetch streams" "1 stream,2 streams,3 streams,4 streams" bitfld.quad 0x00 18. "DSTDIS,Enable device split throttle" "Disabled,Enabled" newline bitfld.quad 0x00 17. "STRIDE,Configure the sequence length that triggers data prefetch streams" "2 linefills,3 linefills" bitfld.quad 0x00 13.--15. "L1PCTL,L1 Data prefetch control" "Disabled,1,2,3,4,5,6,8" newline bitfld.quad 0x00 10. "DODMBS,Disable optimized Data Memory Barrier behavior" "No,Yes" bitfld.quad 0x00 6. "L1DEIEN,L1 D-cache Data RAM Error Injection Enable" "Disabled,Enabled" group.quad spr:0x31F21++0x00 line.quad 0x00 "CPUECTLR_EL1,CPU Extended Control Register" bitfld.quad 0x00 6. "SMPEN,Enable hardware management ofdata coherency with other processors in the multiprocessor" "Disabled,Enabled" bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" newline bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.quad spr:0x30101++0x0 line.quad 0x00 "ACTLR_EL1,Auxiliary Control Register (EL1)" group.quad spr:0x34101++0x0 line.quad 0x00 "ACTLR_EL2,Auxiliary Control Register (EL2)" bitfld.quad 0x00 6. "L2ACTLR,L2ACTLR write access control" "Disabled,Enabled" bitfld.quad 0x00 5. "L2ECTLR,L2ECTLR write access control" "Disabled,Enabled" newline bitfld.quad 0x00 4. "L2CTLR,L2CTLR write access control" "Disabled,Enabled" bitfld.quad 0x00 1. "CPUECTLR,CPUECTLR write access control" "Disabled,Enabled" newline bitfld.quad 0x00 0. "CPUACTLR,CPUACTLR write access control" "Disabled,Enabled" group.quad spr:0x36101++0x0 line.quad 0x00 "ACTLR_EL3,Auxiliary Control Register (EL3)" bitfld.quad 0x00 6. "L2ACTLR,L2ACTLR write access control" "Disabled,Enabled" bitfld.quad 0x00 5. "L2ECTLR,L2ECTLR write access control" "Disabled,Enabled" newline bitfld.quad 0x00 4. "L2CTLR,L2CTLR write access control" "Disabled,Enabled" bitfld.quad 0x00 1. "CPUECTLR,CPUECTLR write access control" "Disabled,Enabled" newline bitfld.quad 0x00 0. "CPUACTLR,CPUACTLR write access control" "Disabled,Enabled" group.quad spr:0x30102++0x00 line.quad 0x00 "CPACR_EL1,Architectural Feature Access Control Register" bitfld.quad 0x00 20.--21. "FPEN,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution to trap to EL1 when executed from EL0 or EL1" "EL0/EL1,EL0,EL0/EL1,Not trapped" group.quad spr:0x36110++0x0 line.quad 0x00 "SCR_EL3,Secure Configuration Register" bitfld.quad 0x00 13. "TWE,Trap WFE Instructions" "Not trapped,Trapped" bitfld.quad 0x00 12. "TWI,Trap WFI Instructions" "Not trapped,Trapped" newline bitfld.quad 0x00 11. "ST,Enable secure EL1 access" "Disabled,Enabled" bitfld.quad 0x00 10. "RW,Register width control for lower exception levels" "AArch32,AArch64" newline bitfld.quad 0x00 9. "SIF,Secure Instruction Fetch" "Permitted,Not permitted" bitfld.quad 0x00 8. "HCE,Hypervisor Call enable" "No,Yes" newline bitfld.quad 0x00 7. "SMD,Secure Monitor Call disable" "No,Yes" bitfld.quad 0x00 3. "EA,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor" newline bitfld.quad 0x00 2. "FIQ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor" bitfld.quad 0x00 1. "IRQ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor" newline bitfld.quad 0x00 0. "NS,Secure mode " "Secure,Non-secure" group.quad spr:0x34110++0x00 line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register" bitfld.quad 0x00 33. "ID,Stage 2 Instruction cache disable" "No,Yes" bitfld.quad 0x00 32. "CD,Stage 2 Data cache disable" "No,Yes" newline bitfld.quad 0x00 31. "RW,Register width control for lower exception levels" "AArch32,EL1 is 64-bit" bitfld.quad 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled" newline bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Disabled,Enabled" bitfld.quad 0x00 27. "TGE,Trap General Exceptions has an enhanced role when EL2 is using AArch64" "Disabled,Enabled" newline bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Disabled,Enabled" bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unificiation to EL2" "Disabled,Enabled" bitfld.quad 0x00 23. "TPC,Trap Data/Unified Cache maintenance instructions to Point of Coherency tp EL2" "Disabled,Enabled" newline bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Disabled,Enabled" bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Register" "Disabled,Enabled" newline bitfld.quad 0x00 20. "TIDCP,Trap Implementation Dependent functionality" "Disabled,Enabled" bitfld.quad 0x00 19. "TSC,Trap SMC" "Disabled,Enabled" newline bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled" bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled" newline bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled" bitfld.quad 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled" newline bitfld.quad 0x00 14. "TWE,Trap WFE" "Disabled,Enabled" bitfld.quad 0x00 13. "TWI,Trap WFI" "Disabled,Enabled" newline bitfld.quad 0x00 12. "DC,Default Cacheable" "Disabled,Enabled" bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. determines the minimum shareability domain that is applied to any barrier executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System" newline bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced" bitfld.quad 0x00 8. "VSE,Virtual System Error/Asynchronous Abort" "Not pending,Pending" newline bitfld.quad 0x00 7. "VI,Virtual IRQ Interrupt" "Not pending,Pending" bitfld.quad 0x00 6. "VF,Virtual FIQ Interrupt" "Not pending,Pending" newline bitfld.quad 0x00 5. "AMO,Asynchronous abort and error interrupt routing" "Disabled,Enabled" bitfld.quad 0x00 4. "IMO,Physical IRQ Routing" "Disabled,Enabled" newline bitfld.quad 0x00 3. "FMO,Physical FIQ Routing" "Disabled,Enabled" bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled" newline bitfld.quad 0x00 1. "SWIO,Set/Way Invalidation Override" "Disabled,Enabled" bitfld.quad 0x00 0. "VM,Second stage of Translation enable" "Disabled,Enabled" group.quad spr:0x30510++0x00 line.quad 0x00 "AFSR0_EL1,Auxiliary Fault Status Registers 0 (EL1)" group.quad spr:0x30511++0x00 line.quad 0x00 "AFSR1_EL1,Auxiliary Fault Status Registers 1 (EL1)" group.quad spr:0x34510++0x00 line.quad 0x00 "AFSR0_EL2,Auxiliary Fault Status Registers 0 (EL2)" group.quad spr:0x34511++0x00 line.quad 0x00 "AFSR1_EL2,Auxiliary Fault Status Registers 1 (EL2)" group.quad spr:0x36510++0x00 line.quad 0x00 "AFSR0_EL3,Auxiliary Fault Status Registers 0 (EL3)" group.quad spr:0x36511++0x00 line.quad 0x00 "AFSR1_EL3,Auxiliary Fault Status Registers 1 (EL3)" tree.open "Exception Syndrome Registers" if (((per.q(spr:0x30520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000)) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((per.q(spr:0x30520))&0xFC000000)==0x04000000) if (((per.q(spr:0x30520))&0x1000000)==0x1000000) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.quad 0x00 0. "TI,Trapped instruction" "WFI,WFE" else group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline bitfld.quad 0x00 0. "TI,Trapped instruction" "WFI,WFE" endif elif (((per.q(spr:0x30520))&0xFC000000)==(0x0C000000||0x14000000)) if (((per.q(spr:0x30520))&0x1000000)==0x1000000) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.quad 0x00 17.--19. "OPC2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 14.--16. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.quad 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" else group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline bitfld.quad 0x00 17.--19. "OPC2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 14.--16. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.quad 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" endif elif (((per.q(spr:0x30520))&0xFC000000)==(0x10000000||0x30000000)) if (((per.q(spr:0x30520))&0x1000000)==0x1000000) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.quad 0x00 16.--19. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 10.--14. "RT2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" else group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline bitfld.quad 0x00 16.--19. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 10.--14. "RT2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" endif elif (((per.q(spr:0x30520))&0xFC000000)==0x18000000) if (((per.q(spr:0x30520))&0x1000000)==0x1000000) if (((per.q(spr:0x30520))&0x08)==0x08) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.quad.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" newline bitfld.quad 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,?..." newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" else group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.quad.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" bitfld.quad 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,?..." newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" endif else if (((per.q(spr:0x30520))&0x08)==0x08) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline hexmask.quad.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" newline bitfld.quad 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,?..." newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" else group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline hexmask.quad.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" bitfld.quad 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,?..." newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" endif endif elif (((per.q(spr:0x30520))&0xFC000000)==0x1C000000) if (((per.q(spr:0x30520))&0x1000000)==0x1000000) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" else group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" endif elif (((per.q(spr:0x30520))&0xFC000000)==(0x44000000||0x54000000)) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.quad.word 0x00 0.--15. 1. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((per.q(spr:0x30520))&0xFC000000)==0x60000000) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 20.--21. "OP0,Op0 value from the issued instruction" "0,1,2,3" bitfld.quad 0x00 17.--19. "OP2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.quad 0x00 14.--16. "OP1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((per.q(spr:0x30520))&0xFC000000)==(0x80000000||0x84000000)) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 11.--12. "SET,Synchronous Error Type" "UER,UEO,UC,CE" newline bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.quad 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/L0/base register,Address size/L1,Address size/L2,Address size/L3,Translation/L0,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/L0,Sync. external abort/L1,Sync. external abort/L2,Sync. external abort/L3,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/L0,Sync. parity/ECC/L1,Sync. parity/ECC/L2,Sync. parity/ECC/L3,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." elif (((per.q(spr:0x30520))&0xFD000000)==(0x91000000||0x95000000)) if (((per.q(spr:0x30520))&0x3F)==0x10) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.quad 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.quad 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.quad 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes" newline newline bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.quad 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/L0/TTBR,Address size/L1,Address size/L2,Address size/L3,Translation/L0,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/L0,Sync. external abort/L1,Sync. external abort/L2,Sync. external abort/L3,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/L0,Sync. parity/ECC/L1,Sync. parity/ECC/L2,Sync. parity/ECC/L3,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,?..." else group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.quad 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.quad 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.quad 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes" newline newline bitfld.quad 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/L0/TTBR,Address size/L1,Address size/L2,Address size/L3,Translation/L0,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/L0,Sync. external abort/L1,Sync. external abort/L2,Sync. external abort/L3,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/L0,Sync. parity/ECC/L1,Sync. parity/ECC/L2,Sync. parity/ECC/L3,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,?..." endif elif (((per.q(spr:0x30520))&0xFD000000)==(0x90000000||0x94000000)) if (((per.q(spr:0x30520))&0x3F)==0x10) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" newline newline newline newline bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.quad 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/L0/TTBR,Address size/L1,Address size/L2,Address size/L3,Translation/L0,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/L0,Sync. external abort/L1,Sync. external abort/L2,Sync. external abort/L3,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/L0,Sync. parity/ECC/L1,Sync. parity/ECC/L2,Sync. parity/ECC/L3,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,?..." else group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" newline newline newline newline bitfld.quad 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/L0/TTBR,Address size/L1,Address size/L2,Address size/L3,Translation/L0,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/L0,Sync. external abort/L1,Sync. external abort/L2,Sync. external abort/L3,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/L0,Sync. parity/ECC/L1,Sync. parity/ECC/L2,Sync. parity/ECC/L3,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,?..." endif elif (((per.q(spr:0x30520))&0xFC800000)==(0xA0800000||0xB0800000)) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.quad 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.quad 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.quad 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.quad 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.quad 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.quad 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((per.q(spr:0x30520))&0xFC800000)==(0xA0000000||0xB0000000)) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((per.q(spr:0x30520))&0xFD000000)==0xBD000000) if (((per.q(spr:0x30520))&0x3F)==0x11) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.quad 0x00 13. "IESB,Implicit Error Synchronization Barrier" "Not synchronized,Synchronized" newline bitfld.quad 0x00 10.--12. "AET,Asynchronous Error Type" "UC,UEU,UEO,UER,CE,?..." bitfld.quad 0x00 9. "EA,External abort type" "No,Yes" newline bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Uncategorized,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous,?..." else group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.quad 0x00 9. "EA,External abort type" "No,Yes" newline newline bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Uncategorized,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous,?..." endif elif (((per.q(spr:0x30520))&0xFD000000)==0xBC000000) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((per.q(spr:0x30520))&0xFC000000)==(0xC0000000||0xC4000000)) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.q(spr:0x30520))&0xFC000000)==(0xC8000000||0xCC000000)) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,EX bit valid" "Not valid,Valid" bitfld.quad 0x00 6. "EX,Exclusive operation" "No,Yes" newline bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.q(spr:0x30520))&0xFC000000)==(0xD0000000||0xD4000000)) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write" newline bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.q(spr:0x30520))&0xFC000000)==(0xE0000000||0xF0000000)) group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.quad.word 0x00 0.--15. 1. "COMMENT,Set to the instruction comment field value" else group.quad spr:0x30520++0x00 line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." endif if (((per.q(spr:0x34520))&0xFC000000)==(0x00000000||0x24000000||0x38000000||0x88000000||0x98000000)) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((per.q(spr:0x34520))&0xFC000000)==0x04000000) if (((per.q(spr:0x34520))&0x1000000)==0x1000000) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.quad 0x00 0. "TI,Trapped instruction" "WFI,WFE" else group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline bitfld.quad 0x00 0. "TI,Trapped instruction" "WFI,WFE" endif elif (((per.q(spr:0x34520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000)) if (((per.q(spr:0x34520))&0x1000000)==0x1000000) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.quad 0x00 17.--19. "OPC2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 14.--16. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.quad 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" else group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline bitfld.quad 0x00 17.--19. "OPC2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 14.--16. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.quad 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" endif elif (((per.q(spr:0x34520))&0xFC000000)==(0x10000000||0x30000000)) if (((per.q(spr:0x34520))&0x1000000)==0x1000000) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.quad 0x00 16.--19. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 10.--14. "RT2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" else group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline bitfld.quad 0x00 16.--19. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 10.--14. "RT2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" endif elif (((per.q(spr:0x34520))&0xFC000000)==0x18000000) if (((per.q(spr:0x34520))&0x1000000)==0x1000000) if (((per.q(spr:0x34520))&0x08)==0x08) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.quad.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" newline bitfld.quad 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,?..." newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" else group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.quad.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" bitfld.quad 0x00 5.--9. "RN,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,?..." newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" endif else if (((per.q(spr:0x34520))&0x08)==0x08) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline hexmask.quad.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" newline bitfld.quad 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,?..." newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" else group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline hexmask.quad.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" bitfld.quad 0x00 5.--9. "RN,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,?..." newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" endif endif elif (((per.q(spr:0x34520))&0xFC000000)==0x1C000000) if (((per.q(spr:0x34520))&0x1000000)==0x1000000) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" else group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" endif elif (((per.q(spr:0x34520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000||0x5C000000)) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.quad.word 0x00 0.--15. 1. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((per.q(spr:0x34520))&0xFC000000)==0x4C000000) if ((((per.q(spr:0x34520))&0x1000000)==0x1000000)&&(((per.q(spr:0x34520))&0xF0000)==0x80000)) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.quad 0x00 19. "CCKNOWNPASS,Indicates whether the instruction might have failed its condition code check" "Unconditional,Conditional" elif (((per.q(spr:0x34520))&0xF0000)==0x80000) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline bitfld.quad 0x00 19. "CCKNOWNPASS,Indicates whether the instruction might have failed its condition code check" "Unconditional,Conditional" else group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline newline bitfld.quad 0x00 19. "CCKNOWNPASS,Indicates whether the instruction might have failed its condition code check" "Unconditional,Conditional" endif elif (((per.q(spr:0x34520))&0xFC000000)==0x60000000) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 20.--21. "OP0,Op0 value from the issued instruction" "0,1,2,3" bitfld.quad 0x00 17.--19. "OP2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.quad 0x00 14.--16. "OP1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((per.q(spr:0x34520))&0xFC000000)==0x68000000) if (((per.q(spr:0x34520))&0x02)==0x02) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 1. "ERET,Indicates whether an ERET or ERETA* instruction was trapped to EL2" "ERET,ERETA*" bitfld.quad 0x00 0. "ERETA,Indicates whether an ERETAA or ERETAB instruction was trapped to EL2" "ERETAA,ERETAB" else group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 1. "ERET,Indicates whether an ERET or ERETA* instruction was trapped to EL2" "ERET,ERETA*" endif elif (((per.q(spr:0x34520))&0xFC000000)==(0x80000000||0x84000000)) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 11.--12. "SET,Synchronous Error Type" "UER,UEO,UC,CE" newline bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.quad 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/L0/base register,Address size/L1,Address size/L2,Address size/L3,Translation/L0,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/L0,Sync. external abort/L1,Sync. external abort/L2,Sync. external abort/L3,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/L0,Sync. parity/ECC/L1,Sync. parity/ECC/L2,Sync. parity/ECC/L3,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." elif (((per.q(spr:0x34520))&0xFD000000)==(0x91000000||0x95000000)) if (((per.q(spr:0x34520))&0x3F)==0x10) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.quad 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.quad 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.quad 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes" newline newline bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.quad 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/L0/TTBR,Address size/L1,Address size/L2,Address size/L3,Translation/L0,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/L0,Sync. external abort/L1,Sync. external abort/L2,Sync. external abort/L3,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/L0,Sync. parity/ECC/L1,Sync. parity/ECC/L2,Sync. parity/ECC/L3,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,?..." else group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.quad 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.quad 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.quad 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes" newline newline bitfld.quad 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/L0/TTBR,Address size/L1,Address size/L2,Address size/L3,Translation/L0,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/L0,Sync. external abort/L1,Sync. external abort/L2,Sync. external abort/L3,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/L0,Sync. parity/ECC/L1,Sync. parity/ECC/L2,Sync. parity/ECC/L3,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,?..." endif elif (((per.q(spr:0x34520))&0xFD000000)==(0x90000000||0x94000000)) if (((per.q(spr:0x34520))&0x3F)==0x10) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" newline newline newline newline bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.quad 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/L0/TTBR,Address size/L1,Address size/L2,Address size/L3,Translation/L0,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/L0,Sync. external abort/L1,Sync. external abort/L2,Sync. external abort/L3,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/L0,Sync. parity/ECC/L1,Sync. parity/ECC/L2,Sync. parity/ECC/L3,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,?..." else group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" newline newline newline newline bitfld.quad 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/L0/TTBR,Address size/L1,Address size/L2,Address size/L3,Translation/L0,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/L0,Sync. external abort/L1,Sync. external abort/L2,Sync. external abort/L3,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/L0,Sync. parity/ECC/L1,Sync. parity/ECC/L2,Sync. parity/ECC/L3,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,?..." endif elif (((per.q(spr:0x34520))&0xFC800000)==(0xA0800000||0xB0800000)) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.quad 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.quad 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.quad 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.quad 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.quad 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.quad 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((per.q(spr:0x34520))&0xFC800000)==(0xA0000000||0xB0000000)) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((per.q(spr:0x34520))&0xFD000000)==0xBD000000) if (((per.q(spr:0x34520))&0x3F)==0x11) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.quad 0x00 13. "IESB,Implicit Error Synchronization Barrier" "Not synchronized,Synchronized" newline bitfld.quad 0x00 10.--12. "AET,Asynchronous Error Type" "UC,UEU,UEO,UER,CE,?..." newline bitfld.quad 0x00 9. "EA,External abort type" "No,Yes" bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Uncategorized,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous,?..." else group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" newline newline bitfld.quad 0x00 9. "EA,External abort type" "No,Yes" bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Uncategorized,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous,?..." endif elif (((per.q(spr:0x34520))&0xFD000000)==0xBC000000) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((per.q(spr:0x34520))&0xFC000000)==(0xC0000000||0xC4000000||0xE8000000)) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.q(spr:0x34520))&0xFC000000)==(0xC8000000||0xCC000000)) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,EX bit valid" "Not valid,Valid" bitfld.quad 0x00 6. "EX,Exclusive operation" "No,Yes" newline bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.q(spr:0x34520))&0xFC000000)==(0xD0000000||0xD4000000)) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write" newline bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.q(spr:0x34520))&0xFC000000)==(0xE0000000||0xF0000000)) group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.quad.word 0x00 0.--15. 1. "COMMENT,Set to the instruction comment field value" else group.quad spr:0x34520++0x00 line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,ERET/ERETAA/ERETAB,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,?..." endif if (((per.q(spr:0x36520))&0xFC000000)==(0x00000000||0x24000000||0x38000000||0x88000000||0x98000000)) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((per.q(spr:0x36520))&0xFC000000)==0x04000000) if (((per.q(spr:0x36520))&0x1000000)==0x1000000) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.quad 0x00 0. "TI,Trapped instruction" "WFI,WFE" else group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline bitfld.quad 0x00 0. "TI,Trapped instruction" "WFI,WFE" endif elif (((per.q(spr:0x36520))&0xFC000000)==(0x0C000000||0x14000000)) if (((per.q(spr:0x36520))&0x1000000)==0x1000000) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.quad 0x00 17.--19. "OPC2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 14.--16. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.quad 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" else group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline bitfld.quad 0x00 17.--19. "OPC2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 14.--16. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.quad 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" endif elif (((per.q(spr:0x36520))&0xFC000000)==(0x10000000||0x30000000)) if (((per.q(spr:0x36520))&0x1000000)==0x1000000) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.quad 0x00 16.--19. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 10.--14. "RT2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" else group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline bitfld.quad 0x00 16.--19. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 10.--14. "RT2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" endif elif (((per.q(spr:0x36520))&0xFC000000)==0x18000000) if (((per.q(spr:0x36520))&0x1000000)==0x1000000) if (((per.q(spr:0x36520))&0x08)==0x08) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.quad.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" newline bitfld.quad 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,?..." newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" else group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.quad.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" bitfld.quad 0x00 5.--9. "RN,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,?..." newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" endif else if (((per.q(spr:0x36520))&0x08)==0x08) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline hexmask.quad.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" newline bitfld.quad 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,?..." newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" else group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline hexmask.quad.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" bitfld.quad 0x00 5.--9. "RN,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,?..." newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" endif endif elif (((per.q(spr:0x36520))&0xFC000000)==0x1C000000) if (((per.q(spr:0x36520))&0x1000000)==0x1000000) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" else group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" endif elif (((per.q(spr:0x36520))&0xFC000000)==0x4C000000) if ((((per.q(spr:0x36520))&0x1000000)==0x1000000)&&(((per.q(spr:0x36520))&0xF0000)==0x80000)) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.quad 0x00 19. "CCKNOWNPASS,Indicates whether the instruction might have failed its condition code check" "Unconditional,Conditional" elif (((per.q(spr:0x36520))&0xF0000)==0x80000) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline bitfld.quad 0x00 19. "CCKNOWNPASS,Indicates whether the instruction might have failed its condition code check" "Unconditional,Conditional" else group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL2)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline newline bitfld.quad 0x00 19. "CCKNOWNPASS,Indicates whether the instruction might have failed its condition code check" "Unconditional,Conditional" endif elif (((per.q(spr:0x36520))&0xFC000000)==(0x54000000||0x58000000||0x5C000000)) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.quad.word 0x00 0.--15. 1. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((per.q(spr:0x36520))&0xFC000000)==0x60000000) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 20.--21. "OP0,Op0 value from the issued instruction" "0,1,2,3" bitfld.quad 0x00 17.--19. "OP2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.quad 0x00 14.--16. "OP1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((per.q(spr:0x36520))&0xFC000000)==0x7C000000) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.quad.long 0x00 0.--24. 1. "IMPL_DEF,Implementation defined" elif (((per.q(spr:0x36520))&0xFC000000)==(0x80000000||0x84000000)) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 11.--12. "SET,Synchronous Error Type" "UER,UEO,UC,CE" newline bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.quad 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/L0/base register,Address size/L1,Address size/L2,Address size/L3,Translation/L0,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/L0,Sync. external abort/L1,Sync. external abort/L2,Sync. external abort/L3,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/L0,Sync. parity/ECC/L1,Sync. parity/ECC/L2,Sync. parity/ECC/L3,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." elif (((per.q(spr:0x36520))&0xFD000000)==(0x91000000||0x95000000)) if (((per.q(spr:0x36520))&0x3F)==0x10) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.quad 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.quad 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.quad 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes" newline newline bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.quad 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/L0/TTBR,Address size/L1,Address size/L2,Address size/L3,Translation/L0,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/L0,Sync. external abort/L1,Sync. external abort/L2,Sync. external abort/L3,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/L0,Sync. parity/ECC/L1,Sync. parity/ECC/L2,Sync. parity/ECC/L3,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,?..." else group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.quad 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.quad 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.quad 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.quad 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes" newline newline bitfld.quad 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/L0/TTBR,Address size/L1,Address size/L2,Address size/L3,Translation/L0,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/L0,Sync. external abort/L1,Sync. external abort/L2,Sync. external abort/L3,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/L0,Sync. parity/ECC/L1,Sync. parity/ECC/L2,Sync. parity/ECC/L3,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,?..." endif elif (((per.q(spr:0x36520))&0xFD000000)==(0x90000000||0x94000000)) if (((per.q(spr:0x36520))&0x3F)==0x10) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" newline newline newline newline bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.quad 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/L0/TTBR,Address size/L1,Address size/L2,Address size/L3,Translation/L0,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/L0,Sync. external abort/L1,Sync. external abort/L2,Sync. external abort/L3,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/L0,Sync. parity/ECC/L1,Sync. parity/ECC/L2,Sync. parity/ECC/L3,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,?..." else group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" newline newline newline newline bitfld.quad 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/L0/TTBR,Address size/L1,Address size/L2,Address size/L3,Translation/L0,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/L0,Sync. external abort/L1,Sync. external abort/L2,Sync. external abort/L3,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/L0,Sync. parity/ECC/L1,Sync. parity/ECC/L2,Sync. parity/ECC/L3,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,?..." endif elif (((per.q(spr:0x36520))&0xFC800000)==0xB0800000) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.quad 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.quad 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.quad 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.quad 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.quad 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.quad 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((per.q(spr:0x36520))&0xFC800000)==0xB0000000) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((per.q(spr:0x36520))&0xFD000000)==0xBD000000) if (((per.q(spr:0x36520))&0x3F)==0x11) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.quad 0x00 13. "IESB,Implicit Error Synchronization Barrier" "Not synchronized,Synchronized" newline bitfld.quad 0x00 10.--12. "AET,Asynchronous Error Type" "UC,UEU,UEO,UER,CE,?..." newline bitfld.quad 0x00 9. "EA,External abort type" "No,Yes" bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Uncategorized,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous,?..." else group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" newline newline bitfld.quad 0x00 9. "EA,External abort type" "No,Yes" bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Uncategorized,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous,?..." endif elif (((per.q(spr:0x36520))&0xFD000000)==0xBC000000) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((per.q(spr:0x36520))&0xFC000000)==0xF0000000) group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.quad.word 0x00 0.--15. 1. "COMMENT,Set to the instruction comment field value" else group.quad spr:0x36520++0x00 line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Pointer Authentication,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implementation defined,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,?..." endif tree.end newline if (((per.q(spr:0x34501))&0x200)==0x200) group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/L1,Sync. external/on TTW/L2,Sync. external/on TTW/L3,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/L1,Sync. parity/on memory access/on TTW/L2,Sync. parity/on memory access/on TTW/L3,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." else group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/L1,Permission/section,Sync. external/on TTW/L2,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/L1,Reserved,Sync. parity/on TTW/L2,?..." endif group.quad spr:0x30600++0x00 line.quad 0x00 "FAR_EL1,Fault Address Register (EL1)" group.quad spr:0x34600++0x00 line.quad 0x00 "FAR_EL2,Fault Address Register (EL2)" group.quad spr:0x36600++0x00 line.quad 0x00 "FAR_EL3,Fault Address Register (EL3)" group.quad spr:0x34604++0x00 line.quad 0x00 "HPFAR_EL2,Hypervisor IPA Fault Address Register" hexmask.quad 0x00 4.--39. 0x10 "FIPA[47:12],Bits [47:12] of the faulting intermediate physical address" group.quad spr:0x30C00++0x00 line.quad 0x00 "VBAR_EL1,Vector Base Address Register (EL1)" hexmask.quad 0x00 11.--63. 0x8 "VBA,Base address of the exception vectors for exceptions taken in this exception level" group.quad spr:0x34C00++0x00 line.quad 0x00 "VBAR_EL2,Vector Base Address Register (EL2)" hexmask.quad 0x00 11.--63. 0x8 "VBA,Base address of the exception vectors for exceptions taken in this exception level" group.quad spr:0x36C00++0x00 line.quad 0x00 "VBAR_EL3,Vector Base Address Register (EL3)" hexmask.quad 0x00 11.--63. 0x8 "VBA,Base address of the exception vectors for exceptions taken in this exception level" rgroup.quad spr:0x36C01++0x00 line.quad 0x00 "RVBAR_EL3,Reset Vector Base Address Register" group.quad spr:0x36C02++0x00 line.quad 0x00 "RMR_EL3,Reset Management Register" bitfld.quad 0x00 1. "RR,Reset Request" "Not requested,Requested" bitfld.quad 0x00 0. "AA64,Determines which execution state the processor boots into after a warmreset" "AArch32,AArch64" rgroup.quad spr:0x30C10++0x00 line.quad 0x00 "ISR_EL1,Interrupt Status Register" bitfld.quad 0x00 8. "A,External abort pending flag" "Not pending,Pending" bitfld.quad 0x00 7. "I,Interrupt pending flag" "Not pending,Pending" bitfld.quad 0x00 6. "F,Fast interrupt pending flag" "Not pending,Pending" rgroup.quad spr:0x31F30++0x00 line.quad 0x00 "CBAR_EL1,Configuration Base Address Register" hexmask.quad.tbyte 0x00 18.--39. 0x4 "PERIPHBASE[39:18],Holds the physical base address of the memory-mapped GIC CPU interface registers" group.quad spr:0x30D01++0x00 line.quad 0x00 "CONTEXTIDR_EL1,Context ID Register" group.quad spr:0x33D02++0x00 line.quad 0x00 "TPIDR_EL0,Software Thread ID Register (EL0)" group.quad spr:0x33D03++0x00 line.quad 0x00 "TPIDRRO_EL0,Read-Only Software Thread ID Register (EL0)" group.quad spr:0x30D04++0x00 line.quad 0x00 "TPIDR_EL1,Software Thread ID Register (EL1)" group.quad spr:0x34D02++0x00 line.quad 0x00 "TPIDR_EL2,Software Thread ID Register (EL2)" group.quad spr:0x36D02++0x00 line.quad 0x00 "TPIDR_EL3,Software Thread ID Register (EL3)" tree.end tree "System Instructions" wgroup.quad spr:0x10710++0x00 line.quad 0x00 "IC_IALLUIS,IC_IALLUIS" wgroup.quad spr:0x10750++0x00 line.quad 0x00 "IC_IALLU,IC_IALLU" wgroup.quad spr:0x13751++0x00 line.quad 0x00 "IC_IVAU,IC_IVAU" wgroup.quad spr:0x13741++0x00 line.quad 0x00 "DC_ZVA,DC_ZVA" wgroup.quad spr:0x10761++0x00 line.quad 0x00 "DC_IVAC,DC_IVAC" wgroup.quad spr:0x10762++0x00 line.quad 0x00 "DC_ISW,DC_ISW" wgroup.quad spr:0x137A1++0x00 line.quad 0x00 "DC_CVAC,DC_CVAC" wgroup.quad spr:0x107A2++0x00 line.quad 0x00 "DC_CSW,DC_CSW" wgroup.quad spr:0x137B1++0x00 line.quad 0x00 "DC_CVAU,DC_CVAU" wgroup.quad spr:0x137E1++0x00 line.quad 0x00 "DC_CIVAC,DC_CIVAC" wgroup.quad spr:0x107E2++0x00 line.quad 0x00 "DC_CISW,DC_CISW" wgroup.quad spr:0x10780++0x00 line.quad 0x00 "AT_S1E1R,AT_S1E1R" wgroup.quad spr:0x10781++0x00 line.quad 0x00 "AT_S1E1W,AT_S1E1W" wgroup.quad spr:0x10782++0x00 line.quad 0x00 "AT_S1E0R,AT_S1E0R" wgroup.quad spr:0x10783++0x00 line.quad 0x00 "AT_S1E0W,AT_S1E0W" wgroup.quad spr:0x14784++0x00 line.quad 0x00 "AT_S12E1R,AT_S12E1R" wgroup.quad spr:0x14785++0x00 line.quad 0x00 "AT_S12E1W,AT_S12E1W" wgroup.quad spr:0x14786++0x00 line.quad 0x00 "AT_S12E0R,AT_S12E0R" wgroup.quad spr:0x14787++0x00 line.quad 0x00 "AT_S12E0W,AT_S12E0W" wgroup.quad spr:0x14780++0x00 line.quad 0x00 "AT_S1E2R,AT_S1E2R" wgroup.quad spr:0x14781++0x00 line.quad 0x00 "AT_S1E2W,AT_S1E2W" wgroup.quad spr:0x16780++0x00 line.quad 0x00 "AT_S1E3R,AT_S1E3R" wgroup.quad spr:0x16781++0x00 line.quad 0x00 "AT_S1E3W,AT_S1E3W" wgroup.quad spr:0x10870++0x00 line.quad 0x00 "TLBI_VMALLE1,TLBI_VMALLE1" wgroup.quad spr:0x10871++0x00 line.quad 0x00 "TLBI_VAE1,TLBI_VAE1" wgroup.quad spr:0x10872++0x00 line.quad 0x00 "TLBI_ASIDE1,TLBI_ASIDE1" wgroup.quad spr:0x10873++0x00 line.quad 0x00 "TLBI_VAAE1,TLBI_VAAE1" wgroup.quad spr:0x10875++0x00 line.quad 0x00 "TLBI_VALE1,TLBI_VALE1" wgroup.quad spr:0x10877++0x00 line.quad 0x00 "TLBI_VAALE1,TLBI_VAALE1" wgroup.quad spr:0x10830++0x00 line.quad 0x00 "TLBI_VMALLE1IS,TLBI_VMALLE1IS" wgroup.quad spr:0x10831++0x00 line.quad 0x00 "TLBI_VAE1IS,TLBI_VAE1IS" wgroup.quad spr:0x10832++0x00 line.quad 0x00 "TLBI_ASIDE1IS,TLBI_ASIDE1IS" wgroup.quad spr:0x10833++0x00 line.quad 0x00 "TLBI_VAAE1IS,TLBI_VAAE1IS" wgroup.quad spr:0x10835++0x00 line.quad 0x00 "TLBI_VALE1IS,TLBI_VALE1IS" wgroup.quad spr:0x10837++0x00 line.quad 0x00 "TLBI_VAALE1IS,TLBI_VAALE1IS" wgroup.quad spr:0x14801++0x00 line.quad 0x00 "TLBI_IPAS2E1IS,TLBI_IPAS2E1IS" wgroup.quad spr:0x14805++0x00 line.quad 0x00 "TLBI_IPAS2LE1IS,TLBI_IPAS2LE1IS" wgroup.quad spr:0x14841++0x00 line.quad 0x00 "TLBI_IPAS2E1,TLBI_IPAS2E1" wgroup.quad spr:0x14845++0x00 line.quad 0x00 "TLBI_IPAS2LE1,TLBI_IPAS2LE1" wgroup.quad spr:0x14871++0x00 line.quad 0x00 "TLBI_VAE2,TLBI_VAE2" wgroup.quad spr:0x14875++0x00 line.quad 0x00 "TLBI_VALE2,TLBI_VALE2" wgroup.quad spr:0x14876++0x00 line.quad 0x00 "TLBI_VMALLS12E1,TLBI_VMALLS12E1" wgroup.quad spr:0x14831++0x00 line.quad 0x00 "TLBI_VAE2IS,TLBI_VAE2IS" wgroup.quad spr:0x14835++0x00 line.quad 0x00 "TLBI_VALE2IS,TLBI_VALE2IS" wgroup.quad spr:0x14836++0x00 line.quad 0x00 "TLBI_VMALLS12E1IS,TLBI_VMALLS12E1IS" wgroup.quad spr:0x16871++0x00 line.quad 0x00 "TLBI_VAE3,TLBI_VAE3" wgroup.quad spr:0x16875++0x00 line.quad 0x00 "TLBI_VALE3,TLBI_VALE3" wgroup.quad spr:0x16831++0x00 line.quad 0x00 "TLBI_VAE3IS,TLBI_VAE3IS" wgroup.quad spr:0x16835++0x00 line.quad 0x00 "TLBI_VALE3IS,TLBI_VALE3IS" wgroup.quad spr:0x14870++0x00 line.quad 0x00 "TLBI_ALLE2,TLBI_ALLE2" wgroup.quad spr:0x14830++0x00 line.quad 0x00 "TLBI_ALLE2IS,TLBI_ALLE2IS" wgroup.quad spr:0x14874++0x00 line.quad 0x00 "TLBI_ALLE1,TLBI_ALLE1" wgroup.quad spr:0x14834++0x00 line.quad 0x00 "TLBI_ALLE1IS,TLBI_ALLE1IS" wgroup.quad spr:0x16870++0x00 line.quad 0x00 "TLBI_ALLE3,TLBI_ALLE3" wgroup.quad spr:0x16830++0x00 line.quad 0x00 "TLBI_ALLE3IS,TLBI_ALLE3IS" tree.end tree "Memory Management Unit" group.quad spr:0x30100++0x0 line.quad 0x00 "SCTLR_EL1,System Control Register (EL1)" bitfld.quad 0x00 26. "UCI,EL0 access enable (DC CVAU|DC CIVAC|DC CVAC|IC IVAU)" "Disabled,Enabled" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" newline bitfld.quad 0x00 24. "E0E,Endianness of explicit data access at EL0" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.quad 0x00 18. "NTWE,Not trap WFE" "No,Yes" bitfld.quad 0x00 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.quad 0x00 15. "UCT,EL0 access enable (CTR_EL0)" "Disabled,Enabled" bitfld.quad 0x00 14. "DZE,EL0 access enable (DC ZVA)" "Disabled,Enabled" newline bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.quad 0x00 9. "UMA,User Mask Access" "Disabled,Enabled" newline bitfld.quad 0x00 8. "SED,SETEND Disable" "No,Yes" bitfld.quad 0x00 7. "ITD,IT instruction disable" "No,Yes" newline bitfld.quad 0x00 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" bitfld.quad 0x00 4. "SA0,EL0 stack alignment check enable" "Disabled,Enabled" newline bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" newline bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x34100++0x0 line.quad 0x00 "SCTLR_EL2,System Control Register (EL2)" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x36100++0x0 line.quad 0x00 "SCTLR_EL3,System Control Register (EL3)" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x30200++0x00 line.quad 0x00 "TTBR0_EL1,Translation Table Base Register 0 (EL1)" hexmask.quad.word 0x00 48.--63. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 0x01 "BADDR,Translation table base address" group.quad spr:0x30201++0x00 line.quad 0x00 "TTBR1_EL1,Translation Table Base Register 1 (EL1)" hexmask.quad.word 0x00 48.--63. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 0x01 "BADDR,Translation table base address" group.quad spr:0x34200++0x00 line.quad 0x00 "TTBR0_EL2,Translation Table Base Register 0 (EL2)" hexmask.quad 0x00 1.--47. 0x02 "BADDR,Translation table base address" group.quad spr:0x36200++0x00 line.quad 0x00 "TTBR0_EL3,Translation Table Base Register 0 (EL3)" hexmask.quad 0x00 0.--47. 0x01 "BADDR,Translation table base address" group.quad spr:0x30202++0x00 line.quad 0x00 "TCR_EL1,Translation Control Register (EL1)" bitfld.quad 0x00 38. "TBI1,Top Byte Ignored 1" "Not ignored,Ignored" bitfld.quad 0x00 37. "TBI0,Top Byte Ignored 0" "Not ignored,Ignored" newline bitfld.quad 0x00 36. "AS,ASID size" "8-bit,16-bit" bitfld.quad 0x00 32.--34. "IPS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..." newline bitfld.quad 0x00 30.--31. "TG1,TTBR1_EL1 granule size" "Reserved,16 KB,4 KB,64 KB" bitfld.quad 0x00 28.--29. "SH1,Shareability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 26.--27. "ORGN1,Outer cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 24.--25. "IRGN1,Inner cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 23. "EPD1,Translation table walk disable for translations using TTBR1_EL1" "Enabled,Disabled" bitfld.quad 0x00 22. "A1,Selects whether TTBR0_EL1 or TTBR1_EL1 defines the ASID" "TTBR0_EL1,TTBR1_EL1" newline bitfld.quad 0x00 16.--21. "T1SZ,Size offset of the memory region addressed by TTBR1_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL1 granule size" "4 KB,64 KB,16 KB,?..." newline bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 7. "EPD0,Translation table walk disable for translations using TTBR0" "Enabled,Disabled" newline bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.quad spr:0x34202++0x00 line.quad 0x00 "TCR_EL2,Translation Control Register (EL2)" bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored" bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..." newline bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL2 granule size" "4 KB,64 KB,16 KB,?..." bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.quad spr:0x36202++0x00 line.quad 0x00 "TCR_EL3,Translation Control Register (EL3)" bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored" bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..." newline bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL3 granule size" "4 KB,64 KB,16 KB,?..." bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.quad spr:0x34300++0x00 line.quad 0x00 "DACR32_EL2,Domain Access Control Register" bitfld.quad 0x00 30.--31. "D15,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.quad 0x00 28.--29. "D14,Domain Access 14" "Denied,Client,Reserved,Manager" newline bitfld.quad 0x00 26.--27. "D13,Domain Access 13" "Denied,Client,Reserved,Manager" bitfld.quad 0x00 24.--25. "D12,Domain Access 12" "Denied,Client,Reserved,Manager" newline bitfld.quad 0x00 22.--23. "D11,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.quad 0x00 20.--21. "D10,Domain Access 10" "Denied,Client,Reserved,Manager" newline bitfld.quad 0x00 18.--19. "D9,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.quad 0x00 16.--17. "D8,Domain Access 8" "Denied,Client,Reserved,Manager" newline bitfld.quad 0x00 14.--15. "D7,Domain Access 7" "Denied,Client,Reserved,Manager" bitfld.quad 0x00 12.--13. "D6,Domain Access 6" "Denied,Client,Reserved,Manager" newline bitfld.quad 0x00 10.--11. "D5,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.quad 0x00 8.--9. "D4,Domain Access 4" "Denied,Client,Reserved,Manager" newline bitfld.quad 0x00 6.--7. "D3,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.quad 0x00 4.--5. "D2,Domain Access 2" "Denied,Client,Reserved,Manager" newline bitfld.quad 0x00 2.--3. "D1,Domain Access 1" "Denied,Client,Reserved,Manager" bitfld.quad 0x00 0.--1. "D0,Domain Access 0" "Denied,Client,Reserved,Manager" if (((per.q(spr:0x30740))&0xF000000000000001)==0x0000000000000000) group.quad spr:0x30740++0x00 line.quad 0x00 "PAR_EL1,Physical Address Register" bitfld.quad 0x00 60.--63. "ATTRH,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read" bitfld.quad 0x00 56.--59. "ATTRL,Device memory or Normal memory plus Inner cacheability [Type/Cacheable/Allocate]" "Device-nGnRnE,Reserved,Reserved,Reserved,Device-not nGnRnE,?..." newline hexmask.quad 0x00 12.--47. 0x10 "PA[47:12],Physical Address" bitfld.quad 0x00 9. "NS,The NS attribute for a translation table entry read from Secure state" "No,Yes" newline bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" newline bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted" elif (((per.q(spr:0x30740))&0x01)==0x00) group.quad spr:0x30740++0x00 line.quad 0x00 "PAR_EL1,Physical Address Register" bitfld.quad 0x00 60.--63. "ATTRH,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read" bitfld.quad 0x00 56.--59. "ATTRL,Device memory or Normal memory plus Inner cacheability [Type/Cacheable/Allocate]" "Reserved,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read" newline hexmask.quad 0x00 12.--47. 0x10 "PA[47:12],Physical Address" bitfld.quad 0x00 9. "NS,The NS attribute for a translation table entry read from Secure state" "No,Yes" newline bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" newline bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted" else group.quad spr:0x30740++0x00 line.quad 0x00 "PAR_EL1,Physical Address Register" newline bitfld.quad 0x00 9. "S,Indicates the translation stage at which the translation aborted" "Stage 1,Stage 2" bitfld.quad 0x00 8. "PTW,Translation aborted because of a stage 2 fault during a stage 1 translation table walk" "No,Yes" newline bitfld.quad 0x00 1.--6. "FST,Fault status field" "Address size/L0/TTBR,Address size/L1,Address size/L2,Address size/L3,Translation/L0,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Reserved,Reserved,Reserved,Reserved,Sync. external abort/L0,Sync. external abort/L1,Sync. external abort/L2,Sync. external abort/L3,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,?..." newline bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted" endif tree.open "Memory Attribute Indirection Registers" group.quad spr:0x30A20++0x00 line.quad 0x00 "MAIR_EL1,Memory Attribute Indirection Register" bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" group.quad spr:0x34A20++0x00 line.quad 0x00 "MAIR_EL2,Memory Attribute Indirection Register" bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" group.quad spr:0x36A20++0x00 line.quad 0x00 "MAIR_EL3,Memory Attribute Indirection Register" bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" newline bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate" bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate" group.quad spr:0x30A30++0x00 line.quad 0x00 "AMAIR_EL1,Memory Attribute Indirection Register (EL1)" group.quad spr:0x34A30++0x00 line.quad 0x00 "AMAIR_EL2,Memory Attribute Indirection Register (EL2)" group.quad spr:0x36A30++0x00 line.quad 0x00 "AMAIR_EL3,Memory Attribute Indirection Register (EL3)" tree.end newline group.quad spr:0x30D01++0x00 line.quad 0x00 "CONTEXTIDR_EL1,Context ID Register" tree.end tree "Virtualization Extensions" group.quad spr:0x34100++0x0 line.quad 0x00 "SCTLR_EL2,System Control Register (EL2)" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x34110++0x00 line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register" bitfld.quad 0x00 33. "ID,Stage 2 instruction cache disable" "No,Yes" bitfld.quad 0x00 32. "CD,Stage 2 data cache disable" "No,Yes" bitfld.quad 0x00 31. "RW,Register width control for lower exception levels" "AArch32,AArch64" newline bitfld.quad 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled" bitfld.quad 0x00 28. "TDZ,Traps DC ZVA instruction" "Disabled,Enabled" bitfld.quad 0x00 27. "TGE,Trap General Exceptions" "Disabled,Enabled" newline bitfld.quad 0x00 26. "TVM,Trap Virtual Memory Controls" "Disabled,Enabled" bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions" "Disabled,Enabled" bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled" newline bitfld.quad 0x00 23. "TPC,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled" bitfld.quad 0x00 22. "TSW,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled" bitfld.quad 0x00 21. "TAC,Trap Auxiliary Control Register Accesses" "Disabled,Enabled" newline bitfld.quad 0x00 20. "TIDCP,Trap Lockdown" "Disabled,Enabled" bitfld.quad 0x00 19. "TSC,Trap SMC" "Disabled,Enabled" bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled" newline bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled" bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled" bitfld.quad 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled" newline bitfld.quad 0x00 14. "TWE,Trap WFE" "Disabled,Enabled" bitfld.quad 0x00 13. "TWI,Trap WFI" "Disabled,Enabled" bitfld.quad 0x00 12. "DC,Default Cacheable" "Disabled,Enabled" newline bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability Upgrade" "No effect,Inner Shareable,Outer Shareable,Full system" bitfld.quad 0x00 9. "FB,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled" bitfld.quad 0x00 8. "VSE,Virtual System Error/Asynchronous Abort" "Not aborted,Aborted" newline bitfld.quad 0x00 7. "VI,Virtual IRQ interrupt" "No interrupt,Interrupt" bitfld.quad 0x00 6. "VF,Virtual FIQ interrupt" "No interrupt,Interrupt" bitfld.quad 0x00 5. "AMO,A-bit Mask Override" "Not routed,Routed" newline bitfld.quad 0x00 4. "IMO,I-bit Mask Override" "Not routed,Routed" bitfld.quad 0x00 3. "FMO,F-bit Mask Override" "Not routed,Routed" bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled" newline bitfld.quad 0x00 1. "SWIO,Set/Way Invalidation Override" "No override,Override" bitfld.quad 0x00 0. "VM,Second Stage of Translation Enable" "Disabled,Enabled" group.quad spr:0x34111++0x00 line.quad 0x00 "MDCR_EL2,Hypervisor Debug Control Register (EL2)" bitfld.quad 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid" bitfld.quad 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid" bitfld.quad 0x00 9. "TDA,Trap Debug Access" "No effect,Valid" newline bitfld.quad 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid" bitfld.quad 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled" bitfld.quad 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid" newline bitfld.quad 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid" bitfld.quad 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6" group.quad spr:0x34112++0x00 line.quad 0x00 "CPTR_EL2,Architectural Feature Trap Register (EL2)" bitfld.quad 0x00 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped" bitfld.quad 0x00 10. "TFP,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution from a lower exception level to EL2" "Not trapped,Trapped" group.quad spr:0x36131++0x00 line.quad 0x00 "MDCR_EL3,Hypervisor Debug Control Register (EL3)" bitfld.quad 0x00 21. "EPMAD,External debugger access to Performance Monitors registers disabled" "No,Yes" bitfld.quad 0x00 20. "EDAD,External debugger access to breakpoint and watchpoint registers disabled" "No,Yes" bitfld.quad 0x00 17. "SPME,Secure performance monitors enable" "Disabled,Enabled" newline bitfld.quad 0x00 16. "SDD,AArch64 secure debug disable" "No,Yes" bitfld.quad 0x00 14.--15. "SPD32,AArch32 secure privileged debug" "Legacy,Reserved,Disabled,Enabled" bitfld.quad 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid" newline bitfld.quad 0x00 9. "TDA,Trap Debug Access" "No effect,Valid" bitfld.quad 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid" group.quad spr:0x36112++0x00 line.quad 0x00 "CPTR_EL3,Architectural Feature Trap Register (EL3)" bitfld.quad 0x00 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped" bitfld.quad 0x00 10. "TFP,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution from a lower exception level to EL2" "Not trapped,Trapped" group.quad spr:0x34113++0x00 line.quad 0x00 "HSTR_EL2,Hypervisor System Trap Register" bitfld.quad 0x00 16. "TTEE,Trap ThumbEE" "Not supported,?..." bitfld.quad 0x00 15. "T15,Trap coprocessor primary register CRn = 15" "No effect,Trapped" bitfld.quad 0x00 13. "T13,Trap coprocessor primary register CRn = 13" "No effect,Trapped" newline bitfld.quad 0x00 12. "T12,Trap coprocessor primary register CRn = 12" "No effect,Trapped" bitfld.quad 0x00 11. "T11,Trap coprocessor primary register CRn = 11" "No effect,Trapped" bitfld.quad 0x00 10. "T10,Trap coprocessor primary register CRn = 10" "No effect,Trapped" newline bitfld.quad 0x00 9. "T9,Trap coprocessor primary register CRn = 9" "No effect,Trapped" bitfld.quad 0x00 8. "T8,Trap coprocessor primary register CRn = 8" "No effect,Trapped" bitfld.quad 0x00 7. "T7,Trap coprocessor primary register CRn = 7" "No effect,Trapped" newline bitfld.quad 0x00 6. "T6,Trap coprocessor primary register CRn = 6" "No effect,Trapped" bitfld.quad 0x00 5. "T5,Trap coprocessor primary register CRn = 5" "No effect,Trapped" bitfld.quad 0x00 3. "T3,Trap coprocessor primary register CRn = 3" "No effect,Trapped" newline bitfld.quad 0x00 2. "T2,Trap coprocessor primary register CRn = 2" "No effect,Trapped" bitfld.quad 0x00 1. "T1,Trap coprocessor primary register CRn = 1" "No effect,Trapped" bitfld.quad 0x00 0. "T0,Trap coprocessor primary register CRn = 0" "No effect,Trapped" group.quad spr:0x34117++0x00 line.quad 0x00 "HACR_EL2,Hypervisor Auxiliary Configuration Register" group.quad spr:0x34210++0x00 line.quad 0x00 "VTTBR_EL2,Virtualization Translation Table Base Register" hexmask.quad.byte 0x00 48.--55. 1. "VMID,VMID for the translation table" hexmask.quad 0x00 1.--47. 1. "BADDR,Translation table base address" group.quad spr:0x34212++0x00 line.quad 0x00 "VTCR_EL2,Virtualization Translation Control Register" bitfld.quad 0x00 16.--18. "PS,Physical Address Size" "32 bits/4GB,36 bits/64GB,40 bits/1TB,?..." bitfld.quad 0x00 14.--15. "TG0,Granule size for the corresponding translation table base address register" "4 KB,64 KB,16 KB,?..." bitfld.quad 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" newline bitfld.quad 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "Outer Non-cacheable,Outer WB WA cacheable,Outer WT cacheable,Outer WB no WA cacheable" bitfld.quad 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Inner Non-cacheable,Inner WB WA cacheable,Inner WT cacheable,Inner WB no WA cacheable" bitfld.quad 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3" newline bitfld.quad 0x00 0.--5. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.quad spr:0x34604++0x00 line.quad 0x00 "HPFAR_EL2,Hypervisor IPA Fault Address Register" hexmask.quad 0x00 4.--39. 0x10 "FIPA,Faulting IPA bits" tree.end tree "Cache Control and Configuration" rgroup.quad spr:0x33001++0x0 line.quad 0x00 "CTR_EL0,Cache Type Register" bitfld.quad 0x00 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.quad 0x00 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.quad 0x00 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.quad 0x00 14.--15. "L1IP,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..." bitfld.quad 0x00 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." group.quad spr:0x32000++0x0 line.quad 0x00 "CSSELR_EL1,Cache Size Selection Register" bitfld.quad 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,Level 2,?..." bitfld.quad 0x00 0. "IND,Instruction/Not Data" "Data/Unified,Instruction" rgroup.quad spr:0x31000++0x0 line.quad 0x00 "CCSIDR_EL1,Current Cache Size ID Register" bitfld.quad 0x00 31. "WT,Write-Through" "Not Supported,?..." bitfld.quad 0x00 30. "WB,Write-Back" "Not Supported,Supported" bitfld.quad 0x00 29. "RA,Read-Allocate" "Not Supported,Supported" newline bitfld.quad 0x00 28. "WA,Write-Allocate" "Not Supported,Supported" hexmask.quad.word 0x00 13.--27. 1. 1. "NUMSETS,Number of Sets" hexmask.quad.word 0x00 3.--12. 1. 1. "ASSOCIATIVITY,Associativity" newline bitfld.quad 0x00 0.--2. "LINESIZE,Line Size" "Reserved,Reserved,16 words,?..." rgroup.quad spr:0x31001++0x0 line.quad 0x00 "CLIDR_EL1,Cache Level ID Register" bitfld.quad 0x00 30.--31. "ICB,Inner cache boundary" "Not disclosed,?..." bitfld.quad 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,L1 cache,?..." bitfld.quad 0x00 24.--26. "LOC,Level of Coherency" "Reserved,No L2 cache,L2 cache,?..." newline bitfld.quad 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Reserved,L2 cache,?..." bitfld.quad 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..." bitfld.quad 0x00 3.--5. "CTYPE2,Cache type for levels 2" "No cache,Reserved,Reserved,Reserved,Unified,?..." newline bitfld.quad 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate,?..." tree "Level 1 memory system" rgroup.quad spr:0x33F00++0x00 line.quad 0x00 "CDBGDR0_EL3,Cache Debug Data Register 0" rgroup.quad spr:0x33F01++0x00 line.quad 0x00 "CDBGDR1_EL3,Cache Debug Data Register 1" rgroup.quad spr:0x33F02++0x00 line.quad 0x00 "CDBGDR2_EL3,Cache Debug Data Register 2" rgroup.quad spr:0x33F03++0x00 line.quad 0x00 "CDBGDR3_EL3,Cache Debug Data Register 3" wgroup.quad spr:0x33F20++0x00 line.quad 0x00 "CDBGDCT_EL3,Data Cache Tag Read Operation Register" wgroup.quad spr:0x33F21++0x00 line.quad 0x00 "CDBGICT_EL3,Instruction Cache Tag Read Operation Register" wgroup.quad spr:0x33F40++0x00 line.quad 0x00 "CDBGDCD_EL3,Data Cache Data Read Operation Register" wgroup.quad spr:0x33F41++0x00 line.quad 0x00 "CDBGICD_EL3,Instruction Cache Data Read Operation Register" wgroup.quad spr:0x33F42++0x00 line.quad 0x00 "CDBGTD_EL3,TLB Data Read Operation Register" if (((per.q(spr:0x31F22))&0x7F000000)==0x000000000) group.quad spr:0x31F22++0x00 line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register EL1" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "Way 0,Way 1,?..." newline hexmask.quad.word 0x00 0.--11. 0x01 "RAD,RAM address" elif (((per.q(spr:0x31F22))&0x7F000000)==0x01000000) group.quad spr:0x31F22++0x00 line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register EL1" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "Bank 0,Bank 1,?..." newline hexmask.quad.word 0x00 0.--11. 0x01 "RAMADDR,RAM address" elif (((per.q(spr:0x31F22))&0x7F000000)==0x08000000) group.quad spr:0x31F22++0x00 line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register EL1" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "Way 0,Way 1,Way 2,Way 3,?..." newline hexmask.quad.word 0x00 0.--11. 0x01 "RAMADDR,RAM address" elif (((per.q(spr:0x31F22))&0x7F000000)==0x09000000) group.quad spr:0x31F22++0x00 line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register EL1" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "Bank 0,Bank 1,Bank 2,Bank 3,Bank 4,Bank 5,Bank 6,Bank 7" newline hexmask.quad.word 0x00 0.--11. 0x01 "RAMADDR,RAM address" elif (((per.q(spr:0x31F22))&0x7F000000)==0x0A000000) group.quad spr:0x31F22++0x00 line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register EL1" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "Dirty RAM,?..." newline hexmask.quad.word 0x00 0.--11. 0x01 "RAMADDR,RAM address" elif (((per.q(spr:0x31F22))&0x7F000000)==0x18000000) group.quad spr:0x31F22++0x00 line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register EL1" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "Way 0,Way 1,?..." newline hexmask.quad.word 0x00 0.--11. 0x01 "RAMADDR,RAM address" else group.quad spr:0x31F22++0x00 line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register EL1" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" hexmask.quad.word 0x00 0.--11. 0x01 "RAMADDR,RAM address" endif tree.end tree "Level 2 memory system" group.quad spr:0x31B02++0x0 line.quad 0x00 "L2CTLR_EL1,L2 Control Register" bitfld.quad 0x00 24.--25. "NCPU,Number of CPU" "1,2,3,4" bitfld.quad 0x00 22. "CPUCP,CPU Cache Protection" "Not implemented,ECC implemented" bitfld.quad 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Not implemented,ECC implemented" newline bitfld.quad 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycles" bitfld.quad 0x00 0. "DRAMOL,L2 data RAM output latency" "2 cycles,3 cycles" group.quad spr:0x31B03++0x0 line.quad 0x00 "L2ECTLR_EL1,L2 Extended Control Register" bitfld.quad 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error" bitfld.quad 0x00 29. "AACASYNCERR,AXI/ACE/CHI asynchronous error" "No error,Error" bitfld.quad 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.quad spr:0x31F00++0x00 line.quad 0x00 "L2ACTLR_EL1,L2 Auxiliary Control Register" bitfld.quad 0x00 30.--31. "L2VC,L2 victim Control" "0,1,2,3" bitfld.quad 0x00 29. "L2DEIEN,L2 cache data RAM error injection enable" "Disabled,Enabled" bitfld.quad 0x00 24. "L2TEIEN,L2 cache tag RAM error injection enable" "Disabled,Enabled" newline bitfld.quad 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled" bitfld.quad 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes" if (((per.q(spr:0x31F23))&0x7F000000)==0x10000000) group.quad spr:0x31F23++0x00 line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--21. "C/W,Indicates the RAM where the first memory error occurred" "Way 0,Way 1,Way 2,Way 3,Way 4,Way 5,Way 6,Way 7,?..." newline hexmask.quad.word 0x00 3.--16. 1. "IND,Index" elif (((per.q(spr:0x31F23))&0x7F000000)==0x11000000) group.quad spr:0x31F23++0x00 line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--21. "C/W,Indicates the RAM where the first memory error occurred" "Bank 0,Bank 1,Bank 2,Bank 3,Bank 4,Bank 5,Bank 6,Bank 7,?..." newline hexmask.quad.word 0x00 3.--16. 1. "IND,Index" elif (((per.q(spr:0x31F23))&0x7F000000)==0x12000000) group.quad spr:0x31F23++0x00 line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--21. "C/W,Indicates the RAM where the first memory error occurred" "CPU0/Way 0,CPU0/Way 1,CPU0/Way 2,CPU0/Way 3,CPU1/Way 0,CPU1/Way 1,CPU1/Way 2,CPU1/Way 3,CPU2/Way 0,CPU2/Way 1,CPU2/Way 2,CPU2/Way 3,CPU3/Way 0,CPU3/Way 1,CPU3/Way 2,CPU3/Way 3" newline hexmask.quad.word 0x00 3.--16. 1. "IND,Index" else group.quad spr:0x31F23++0x00 line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" hexmask.quad.word 0x00 3.--16. 1. "IND,Index" endif tree.end tree.end tree "System Performance Monitor" group.quad spr:0x339C0++0x00 line.quad 0x00 "PMCR_EL0,Performance Monitor Control Register" rhexmask.quad.byte 0x00 24.--31. 1. "IMP,Implementer code" rhexmask.quad.byte 0x00 16.--23. 1. "IDCODE,Identification code" rbitfld.quad 0x00 11.--15. "N,Number of counters implemented" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,6,?..." bitfld.quad 0x00 6. "LC,Long cycle count enable" "Disabled,Enabled" newline bitfld.quad 0x00 5. "DP,Disable CCNT when prohibited" "No,Yes" bitfld.quad 0x00 4. "X,Export Enable" "Disabled,Enabled" bitfld.quad 0x00 3. "D,Clock Divider" "Every cycle,64th cycle" eventfld.quad 0x00 2. "C,Clock Counter Reset" "No reset,Reset" newline eventfld.quad 0x00 1. "P,Performance Counter Reset" "No reset,Reset" bitfld.quad 0x00 0. "E,All Counters enable" "Disabled,Enabled" group.quad spr:0x339C1++0x00 line.quad 0x00 "PMCNTENSET_EL0,Count Enable Set Register " bitfld.quad 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" bitfld.quad 0x00 5. "P5,Event Counter 5 enable bit" "Disabled,Enabled" bitfld.quad 0x00 4. "P4,Event Counter 4 enable bit" "Disabled,Enabled" bitfld.quad 0x00 3. "P3,Event Counter 3 enable bit" "Disabled,Enabled" newline bitfld.quad 0x00 2. "P2,Event Counter 2 enable bit" "Disabled,Enabled" bitfld.quad 0x00 1. "P1,Event Counter 1 enable bit" "Disabled,Enabled" bitfld.quad 0x00 0. "P0,Event Counter 0 enable bit" "Disabled,Enabled" group.quad spr:0x339C2++0x00 line.quad 0x00 "PMCNTENCLR_EL0,Count Enable Clear Register" bitfld.quad 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" bitfld.quad 0x00 5. "P5,Event Counter 5 clear bit" "Disabled,Enabled" bitfld.quad 0x00 4. "P4,Event Counter 4 clear bit" "Disabled,Enabled" bitfld.quad 0x00 3. "P3,Event Counter 3 clear bit" "Disabled,Enabled" newline bitfld.quad 0x00 2. "P2,Event Counter 2 clear bit" "Disabled,Enabled" bitfld.quad 0x00 1. "P1,Event Counter 1 clear bit" "Disabled,Enabled" bitfld.quad 0x00 0. "P0,Event Counter 0 clear bit" "Disabled,Enabled" group.quad spr:0x339C3++0x00 line.quad 0x00 "PMOVSCLR_EL0,Performance Monitors Overflow Flag Status Clear Register" eventfld.quad 0x00 31. "C,PMCCNTR overflow" "No overflow,Overflow" eventfld.quad 0x00 5. "P5,Event Counter 5 overflow clear bit" "Disabled,Enabled" eventfld.quad 0x00 4. "P4,Event Counter 4 overflow clear bit" "Disabled,Enabled" eventfld.quad 0x00 3. "P3,Event Counter 3 overflow clear bit" "Disabled,Enabled" newline eventfld.quad 0x00 2. "P2,Event Counter 2 overflow clear bit" "Disabled,Enabled" eventfld.quad 0x00 1. "P1,Event Counter 1 overflow clear bit" "Disabled,Enabled" eventfld.quad 0x00 0. "P0,Event Counter 0 overflow clear bit" "Disabled,Enabled" wgroup.quad spr:0x339C4++0x00 line.quad 0x00 "PMSWINC_EL0,Performance Monitor Software Increment" bitfld.quad 0x00 5. "P5,Increment PMN5" "No action,Increment" bitfld.quad 0x00 4. "P4,Increment PMN4" "No action,Increment" bitfld.quad 0x00 3. "P3,Increment PMN3" "No action,Increment" bitfld.quad 0x00 2. "P2,Increment PMN2" "No action,Increment" newline bitfld.quad 0x00 1. "P1,Increment PMN1" "No action,Increment" bitfld.quad 0x00 0. "P0,Increment PMN0" "No action,Increment" group.quad spr:0x339C5++0x00 line.quad 0x00 "PMSELR_EL0,Performance Monitor Select Register" bitfld.quad 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.open "Common Event Identification Registers" rgroup.quad spr:0x339C6++0x00 line.quad 0x00 "PMCEID0_EL0,Common Event Identification Register" bitfld.quad 0x00 31. "L1D_CACHE_ALLOCATE,Level 1 data cache allocate" "Not implemented,?..." bitfld.quad 0x00 30. "CHAIN,Chain" "Reserved,Implemented" bitfld.quad 0x00 29. "BUS_CYCLES,Bus cycle" "Reserved,Implemented" newline bitfld.quad 0x00 28. "TTBR_WRITE_RETIRED,TTBR write retired" "Not implemented,?..." bitfld.quad 0x00 27. "INST_SPEC,Instruction speculatively executed" "Reserved,Implemented" bitfld.quad 0x00 26. "MEMORY_ERROR,Local memory error" "Reserved,Implemented" newline bitfld.quad 0x00 25. "BUS_ACCESS,Bus access" "Reserved,Implemented" bitfld.quad 0x00 24. "L2D_CACHE_WB,Level 2 data cache write-back" "Not implemented,Implemented" bitfld.quad 0x00 23. "L2D_CACHE_REFILL,Level 2 data cache refill" "Not implemented,Implemented" newline bitfld.quad 0x00 22. "L2D_CACHE,Level 2 data cache access" "Not implemented,Implemented" bitfld.quad 0x00 21. "L1D_CACHE_WB,Level 1 data cache write-back" "Reserved,Implemented" bitfld.quad 0x00 20. "L1I_CACHE,Level 1 instruction cache access" "Reserved,Implemented" newline bitfld.quad 0x00 19. "MEM_ACCESS,Data memory access" "Reserved,Implemented" bitfld.quad 0x00 18. "BR_PRED,Predictable branch speculatively executed" "Reserved,Implemented" bitfld.quad 0x00 17. "CPU_CYCLES,CPU Cycle" "Reserved,Implemented" newline bitfld.quad 0x00 16. "BR_MIS_PRED,Mispredicted or not predicted branch speculatively executed" "Reserved,Implemented" bitfld.quad 0x00 15. "UNALIGNED_LDST_RETIRED,UNALIGNED_LDST_RETIRED" "Reserved,Implemented" bitfld.quad 0x00 14. "BR_RETURN_RETIRED,Instruction architecturally executed condition check pass procedure return" "Not implemented,?..." newline bitfld.quad 0x00 13. "BR_IMMED_RETIRED,Instruction architecturally executed immediate branch" "Reserved,Implemented" bitfld.quad 0x00 12. "PC_WRITE_RETIRED,Instruction architecturally executed condition check pass software change of the PC" "Reserved,Implemented" bitfld.quad 0x00 11. "CID_WRITE_RETIRED,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Reserved,Implemented" newline bitfld.quad 0x00 10. "EXC_RETURN,Instruction architecturally executed condition check pass exception return" "Reserved,Implemented" bitfld.quad 0x00 9. "EXC_TAKEN,Exception taken" "Reserved,Implemented" bitfld.quad 0x00 8. "INST_RETIRED,Instruction architecturally executed" "Reserved,Implemented" newline bitfld.quad 0x00 7. "ST_RETIRED,Instruction architecturally executed condition check pass store" "Reserved,Implemented" bitfld.quad 0x00 6. "LD_RETIRED,Instruction architecturally executed condition check pass load" "Reserved,Implemented" bitfld.quad 0x00 5. "L1D_TLB_REFILL,Level 1 data TLB refill" "Reserved,Implemented" newline bitfld.quad 0x00 4. "L1D_CACHE,Level 1 data cache access" "Reserved,Implemented" bitfld.quad 0x00 3. "L1D_CACHE_REFILL,Level 1 data cache refill" "Reserved,Implemented" bitfld.quad 0x00 2. "L1I_TLB_REFILL,Level 1 instruction TLB refill" "Reserved,Implemented" newline bitfld.quad 0x00 1. "L1I_CACHE_REFILL,Level 1 instruction cache refill" "Reserved,Implemented" bitfld.quad 0x00 0. "SW_INCR,Instruction architecturally executed condition check pass software increment" "Reserved,Implemented" rgroup.quad spr:0x339C7++0x00 line.quad 0x00 "PMCEID1_EL0,Common Event Identification Register" bitfld.quad 0x00 16. "L2I_TLB,Attributable Level 2 instruction TLB access" "Not implemented,?..." bitfld.quad 0x00 15. "L2D_TLB,Attributable Level 2 data or unified TLB access" "Not implemented,?..." bitfld.quad 0x00 14. "L2I_TLB_REFILL,Attributable Level 2 instruction TLB refill" "Not implemented,?..." newline bitfld.quad 0x00 13. "L2D_TLB_REFIL,Attributable Level 2 data or unified TLB refill" "Not implemented,?..." bitfld.quad 0x00 12. "L3D_CACHE_WB,Attributable Level 3 data or unified cache write-back" "Not implemented,?..." bitfld.quad 0x00 11. "L3D_CACHE,Attributable Level 3 data or unified cache access" "Not implemented,?..." newline bitfld.quad 0x00 10. "L3D_CACHE_REFILL,Attributable Level 3 data or unified cache refill" "Not implemented,?..." bitfld.quad 0x00 9. "L3D_CACHE_ALLOCATE,Attributable Level 3 data or unified cache allocation without refill" "Not implemented,?..." bitfld.quad 0x00 8. "L2I_CACHE_REFILL,Attributable Level 2 instruction cache refill" "Not implemented,?..." newline bitfld.quad 0x00 7. "L2I_CACHE,Attributable Level 2 instruction cache access" "Not implemented,?..." bitfld.quad 0x00 6. "L1I_TLB,Level 1 instruction TLB access" "Not implemented,?..." bitfld.quad 0x00 5. "L1D_TLB,Level 1 data or unified TLB access" "Not implemented,?..." newline bitfld.quad 0x00 4. "STALL_BACKEND,No operation issued due to backend" "Not implemented,?..." bitfld.quad 0x00 3. "STALL_FRONTEND,No operation issued due to the frontend" "Not implemented,?..." bitfld.quad 0x00 2. "BR_MIS_PRED_RETIRED,Instruction architecturally executed mispredicted branch" "Not implemented,?..." newline bitfld.quad 0x00 1. "BR_RETIRED,Instruction architecturally executed branch" "Not implemented,?..." bitfld.quad 0x00 0. "L2D_CACHE_ALLOCATE,Level 2 data cache allocation without refill" "Not implemented,?..." tree.end newline group.quad spr:0x339D0++0x00 line.quad 0x00 "PMCCNTR_EL0,Performance Monitor Cycle Count Register" if (((per.q(spr:0x339C5))&0x1F)==0x1F) group.quad spr:0x339D1++0x00 line.quad 0x00 "PMXEVTYPER_EL0,Performance Monitor Event Type Register" bitfld.quad 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.quad 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.quad 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.quad 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.quad 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.quad 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" else group.quad spr:0x339D1++0x00 line.quad 0x00 "PMXEVTYPER_EL0,Performance Monitor Event Type Register" bitfld.quad 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.quad 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.quad 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.quad 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.quad 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.quad 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" endif group.quad spr:0x339D2++0x00 line.quad 0x00 "PMXEVCNTR_EL0,Performance Monitor Event Count Register" group.quad spr:0x339E0++0x00 line.quad 0x00 "PMUSERENR_EL0,Performance Monitor User Enable Register" bitfld.quad 0x00 3. "ER,Event counter read enable" "Disabled,Enabled" bitfld.quad 0x00 2. "EC,Cycle counter read enable" "Disabled,Enabled" bitfld.quad 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled" bitfld.quad 0x00 0. "EN,User mode access enable" "Disabled,Enabled" group.quad spr:0x309E1++0x00 line.quad 0x00 "PMINTENSET_EL1,Performance Monitor Interrupt Enable Set" bitfld.quad 0x00 31. "C,Cycle counter Overflow Interrupt clear" "Disabled,Enabled" bitfld.quad 0x00 5. "P5,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 4. "P4,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 3. "P3,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.quad 0x00 2. "P2,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 1. "P1,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 0. "P0,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" group.quad spr:0x309E2++0x00 line.quad 0x00 "PMINTENCLR_EL1,Performance Monitor Interrupt Enable Clear" eventfld.quad 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" eventfld.quad 0x00 5. "P5,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.quad 0x00 4. "P4,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.quad 0x00 3. "P3,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.quad 0x00 2. "P2,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.quad 0x00 1. "P1,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.quad 0x00 0. "P0,Overflow Interrupt Clear" "Disabled,Enabled" group.quad spr:0x339E3++0x00 line.quad 0x00 "PMOVSSET_EL0,Performance Monitor Overflow Flag Status Set Register" bitfld.quad 0x00 31. "C,Cycle counter Overflow Interrupt clear" "Disabled,Enabled" bitfld.quad 0x00 5. "P5,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 4. "P4,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 3. "P3,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.quad 0x00 2. "P2,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 1. "P1,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 0. "P0,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" group.quad spr:0x33E80++0x00 line.quad 0x00 "PMEVCNTR0_EL0,Performance Monitors Event Count Register 0" group.quad spr:(0x33E80+0x40)++0x00 line.quad 0x00 "PMEVTYPER0_EL0,Performance Monitors Selected Event Type Register 0" bitfld.quad 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.quad 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.quad 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.quad 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.quad 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.quad 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad spr:0x33E81++0x00 line.quad 0x00 "PMEVCNTR1_EL0,Performance Monitors Event Count Register 1" group.quad spr:(0x33E81+0x40)++0x00 line.quad 0x00 "PMEVTYPER1_EL0,Performance Monitors Selected Event Type Register 1" bitfld.quad 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.quad 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.quad 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.quad 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.quad 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.quad 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad spr:0x33E82++0x00 line.quad 0x00 "PMEVCNTR2_EL0,Performance Monitors Event Count Register 2" group.quad spr:(0x33E82+0x40)++0x00 line.quad 0x00 "PMEVTYPER2_EL0,Performance Monitors Selected Event Type Register 2" bitfld.quad 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.quad 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.quad 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.quad 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.quad 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.quad 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad spr:0x33E83++0x00 line.quad 0x00 "PMEVCNTR3_EL0,Performance Monitors Event Count Register 3" group.quad spr:(0x33E83+0x40)++0x00 line.quad 0x00 "PMEVTYPER3_EL0,Performance Monitors Selected Event Type Register 3" bitfld.quad 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.quad 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.quad 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.quad 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.quad 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.quad 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad spr:0x33E84++0x00 line.quad 0x00 "PMEVCNTR4_EL0,Performance Monitors Event Count Register 4" group.quad spr:(0x33E84+0x40)++0x00 line.quad 0x00 "PMEVTYPER4_EL0,Performance Monitors Selected Event Type Register 4" bitfld.quad 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.quad 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.quad 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.quad 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.quad 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.quad 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad spr:0x33E85++0x00 line.quad 0x00 "PMEVCNTR5_EL0,Performance Monitors Event Count Register 5" group.quad spr:(0x33E85+0x40)++0x00 line.quad 0x00 "PMEVTYPER5_EL0,Performance Monitors Selected Event Type Register 5" bitfld.quad 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.quad 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.quad 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.quad 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.quad 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.quad 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad spr:0x33EF7++0x00 line.quad 0x00 "PMCCFILTR_EL0,Performance Monitors Cycle Count Filter Register" bitfld.quad 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.quad 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.quad 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.quad 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.quad 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.quad 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" tree.end tree "System Timer Registers" group.quad spr:0x33E00++0x00 line.quad 0x00 "CNTFRQ_EL0,Counter-timer Frequency Register" hexmask.quad.long 0x00 0.--31. 1. "CF,Clock frequency" rgroup.quad spr:0x33E01++0x00 line.quad 0x00 "CNTPCT_EL0,Counter-timer Physical Count Register" rgroup.quad spr:0x33E02++0x00 line.quad 0x00 "CNTVCT_EL0,Counter-timer Virtual Count Register" group.quad spr:0x34E03++0x00 line.quad 0x00 "CNTVOFF_EL2,Counter-timer Virtual Offset Register" group.quad spr:0x30E10++0x00 line.quad 0x00 "CNTKCTL_EL1,Counter-timer Kernel Control Register" bitfld.quad 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 mode" "Disabled,Enabled" bitfld.quad 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 mode" "Disabled,Enabled" bitfld.quad 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from that counter when that stream is enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit defined by EVNTI generates an event when the event stream is enabled" "0 to 1,1 to 0" newline bitfld.quad 0x00 2. "EVNTEN,Enables the generation of an event stream from the corresponding counter" "Disabled,Enabled" bitfld.quad 0x00 1. "EL0VCTEN,Controls whether the virtual counter CNTVCT and the frequency Register CNTFRQ are accessible from EL0 mode" "Disabled,Enabled" bitfld.quad 0x00 0. "EL0PCTEN,Controls whether the physical counter CNTPCT and the frequency Register CNTFRQ are accessible from EL0 mode" "Disabled,Enabled" group.quad spr:0x34E10++0x00 line.quad 0x00 "CNTHCTL_EL2,Counter-timer Hypervisor Control Register" bitfld.quad 0x00 4.--7. "EVNTI,Selects which bit of CNTPCT is the trigger for the event stream generated from the physical counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit defined by EVNTI generates an event when the event stream is enabled" "0 to 1,1 to 0" bitfld.quad 0x00 2. "EVNTEN,Enables the generation of an event stream from the physical counter" "Disabled,Enabled" bitfld.quad 0x00 1. "EL1PCEN,Controls whether the physical timer registers are accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible" newline bitfld.quad 0x00 0. "EL1PCTEN,Controls whether the physical counter CNTPCT is accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible" group.quad spr:0x33E20++0x00 line.quad 0x00 "CNTP_TVAL_EL0,Counter-timer Physical Timer TimerValue Register" hexmask.quad.long 0x00 0.--31. 1. "TV,TimerValue view of the EL1 physical timer" group.quad spr:0x33E21++0x00 line.quad 0x00 "CNTP_CTL_EL0,Counter-timer Physical Timer Control Register" rbitfld.quad 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.quad 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked" bitfld.quad 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad spr:0x33E22++0x00 line.quad 0x00 "CNTP_CVAL_EL0,Counter-timer Physical Timer CompareValue Register" group.quad spr:0x33E30++0x00 line.quad 0x00 "CNTV_TVAL_EL0,Counter-timer Virtual Timer TimerValue Register" hexmask.quad.long 0x00 0.--31. 1. "TV,TimerValue view of the EL1 virtual timer" group.quad spr:0x33E31++0x00 line.quad 0x00 "CNTV_CTL_EL0,Counter-timer Virtual Timer Control Register" rbitfld.quad 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.quad 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked" bitfld.quad 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad spr:0x33E32++0x00 line.quad 0x00 "CNTV_CVAL_EL0,Counter-timer Virtual Timer CompareValue Register" group.quad spr:0x34E20++0x00 line.quad 0x00 "CNTHP_TVAL_EL2,Counter-timer Hypervisor Physical Timer TimerValue Register" hexmask.quad.long 0x00 0.--31. 1. "TV,TimerValue view of the EL2 physical timer" group.quad spr:0x34E21++0x00 line.quad 0x00 "CNTHP_CTL_EL2,Counter-timer Hypervisor Physical Timer Control Register" rbitfld.quad 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.quad 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked" bitfld.quad 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad spr:0x34E22++0x00 line.quad 0x00 "CNTHP_CVAL_EL2,Counter-timer Hypervisor Physical Timer CompareValue Register" group.quad spr:0x37E20++0x00 line.quad 0x00 "CNTPS_TVAL_EL1,Counter-timer Physical Secure Timer TimerValue Register" hexmask.quad.long 0x00 0.--31. 1. "TV,TimerValue view of the secure physical timer" group.quad spr:0x37E21++0x00 line.quad 0x00 "CNTPS_CTL_EL1,Counter-timer Physical Secure Timer Control Register" rbitfld.quad 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" newline bitfld.quad 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked" bitfld.quad 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad spr:0x37E22++0x00 line.quad 0x00 "CNTPS_CVAL_EL1,Counter-timer Physical Secure Timer CompareValue Register" tree.end tree "Generic Interrupt Controller System Registers" tree "AArch64 GIC Physical CPU Interface System Registers" tree.open "Interrupt Controller Active Priorities Registers" group.quad spr:0x30C84++0x00 line.quad 0x00 "ICC_AP0R0_EL1,Interrupt Controller Active Priorities Group 0 Register 0 (EL1)" bitfld.quad 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.quad 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.quad 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.quad 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.quad 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" newline bitfld.quad 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.quad 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.quad 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.quad 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.quad 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" newline bitfld.quad 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.quad 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" bitfld.quad 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.quad 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.quad 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.quad 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.quad 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.quad 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.quad 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.quad 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.quad 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.quad 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.quad 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.quad 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" bitfld.quad 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" newline bitfld.quad 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.quad 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.quad 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" group.quad spr:0x30C90++0x00 line.quad 0x00 "ICC_AP1R0_EL1,Interrupt Controller Active Priorities Group 1 Register 0 (EL1)" bitfld.quad 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.quad 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.quad 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.quad 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.quad 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" newline bitfld.quad 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.quad 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.quad 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.quad 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.quad 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" newline bitfld.quad 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.quad 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" bitfld.quad 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.quad 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.quad 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.quad 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.quad 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.quad 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.quad 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.quad 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.quad 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.quad 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.quad 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.quad 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" bitfld.quad 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" newline bitfld.quad 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.quad 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.quad 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" tree.end newline if (((per.q(spr:0x30CB6))&0x10000000000)==0x00) wgroup.quad spr:0x30CB6++0x00 line.quad 0x00 "ICC_ASGI1R_EL1,Interrupt Controller Alias Software Generated Interrupt Group 1 Register" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated" else wgroup.quad spr:0x30CB6++0x00 line.quad 0x00 "ICC_ASGI1R_EL1,Interrupt Controller Alias Software Generated Interrupt Group 1 Register" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline endif group.quad spr:0x30C83++0x00 line.quad 0x00 "ICC_BPR0_EL1,Interrupt Controller Binary Point Register 0" bitfld.quad 0x00 0.--2. "BINARYPOINT,Interrupt Priority Field Control and Interrupt Preemption Control" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]" group.quad spr:0x30CC3++0x00 line.quad 0x00 "ICC_BPR1_EL1,Interrupt Controller Binary Point Register 1" bitfld.quad 0x00 0.--2. "BINARYPOINT,Interrupt Priority Field Control and Interrupt Preemption Control" "Reserved,[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]" group.quad spr:0x30CC4++0x00 line.quad 0x00 "ICC_CTLR_EL1,Interrupt Controller Control Register (EL1)" rbitfld.quad 0x00 19. "EXTRANGE,Extended INTID range" "Reserved,Supported" rbitfld.quad 0x00 18. "RSS,Range selector support" "0 - 15,0 - 255" newline rbitfld.quad 0x00 15. "A3V,Affinity 3 Valid" "Zero,Non-zero" rbitfld.quad 0x00 14. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported" rbitfld.quad 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." newline rbitfld.quad 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 6. "PMHE,Controls whether the priority mask Register is used as a hint for interrupt distribution" "Disabled,Enabled" bitfld.quad 0x00 1. "EOIMODE,Controls whether a write to an End of Interrupt Register also deactivates the interrupt" "Disabled,Enabled" newline bitfld.quad 0x00 0. "CBPR,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 interrupts" "Separate registers,Same Register" group.quad spr:0x36CC4++0x00 line.quad 0x00 "ICC_CTLR_EL3,Interrupt Controller Control Register (EL3)" rbitfld.quad 0x00 19. "ExtRange,Extended INTID range" "Not supported,Supported" rbitfld.quad 0x00 18. "RSS,Range Selector Support" "0 - 15,0 - 255" newline rbitfld.quad 0x00 17. "NDS,Disable Security not supported" "Supported,Not supported" rbitfld.quad 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported" rbitfld.quad 0x00 14. "SEIS,Indicates whether the CPU interface supports generation of SEIs" "Not supported,Supported" newline rbitfld.quad 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." rbitfld.quad 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled" newline bitfld.quad 0x00 4. "EOIMODE_EL1NS,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (Non-secure EL1 and EL2)" "Priority drop/Deactivation,Priority drop" bitfld.quad 0x00 3. "EOIMODE_EL1S,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (Secure EL1)" "Priority drop/Deactivation,Priority drop" bitfld.quad 0x00 2. "EOIMODE_EL3,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (EL3)" "Enabled,Disabled" newline bitfld.quad 0x00 1. "CBPR_EL1NS,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 Non-secure interrupts at EL1" "Separate registers,Same Register" bitfld.quad 0x00 0. "CBPR_EL1S,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 Secure interrupts in Secure non-Monitor modes" "Separate registers,Same Register" if (((per.q(spr:0x30CC4))&0x3800)==0x00) wgroup.quad spr:0x30CB1++0x00 line.quad 0x00 "ICC_DIR_EL1,Interrupt Controller Deactivate Interrupt Register" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the interrupt to be deactivated" wgroup.quad spr:0x30C81++0x00 line.quad 0x00 "ICC_EOIR0_EL1,Interrupt Controller End Of Interrupt Register 0" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR0 access" wgroup.quad spr:0x30CC1++0x00 line.quad 0x00 "ICC_EOIR1_EL1,Interrupt Controller End Of Interrupt Register 1" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR1 access" rgroup.quad spr:0x30C82++0x00 line.quad 0x00 "ICC_HPPIR0_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 0" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level" rgroup.quad spr:0x30CC2++0x00 line.quad 0x00 "ICC_HPPIR1_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 1" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level" elif (((per.q(spr:0x30CC4))&0x3800)==0x800) wgroup.quad spr:0x30CB1++0x00 line.quad 0x00 "ICC_DIR_EL1,Interrupt Controller Deactivate Interrupt Register" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the interrupt to be deactivated" wgroup.quad spr:0x30C81++0x00 line.quad 0x00 "ICC_EOIR0_EL1,Interrupt Controller End Of Interrupt Register 0" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR0 access" wgroup.quad spr:0x30CC1++0x00 line.quad 0x00 "ICC_EOIR1_EL1,Interrupt Controller End Of Interrupt Register 1" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR1 access" rgroup.quad spr:0x30C82++0x00 line.quad 0x00 "ICC_HPPIR0_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 0" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level" rgroup.quad spr:0x30CC2++0x00 line.quad 0x00 "ICC_HPPIR1_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 1" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level" endif hgroup.quad spr:0x30C80++0x00 hide.long 0x00 "ICC_IAR0_EL1,Interrupt Acknowledge Register 0" in hgroup.quad spr:0x30CC0++0x00 hide.long 0x00 "ICC_IAR1_EL1,Interrupt Acknowledge Register 1" in newline group.quad spr:0x30CC6++0x00 line.quad 0x00 "ICC_IGRPEN0_EL1,Interrupt Controller Interrupt Group 0 Enable Register" bitfld.quad 0x00 0. "ENABLE,Enables Group 0 interrupts" "Disabled,Enabled" group.quad spr:0x30CC7++0x00 line.quad 0x00 "ICC_IGRPEN1_EL1,Interrupt Controller Interrupt Group 1 Enable Register (EL1)" bitfld.quad 0x00 0. "ENABLE,Enables Group 1 interrupts" "Disabled,Enabled" group.quad spr:0x36CC7++0x00 line.quad 0x00 "ICC_IGRPEN1_EL3,Interrupt Controller Interrupt Group 1 Enable Register (EL3)" bitfld.quad 0x00 1. "ENABLEGRP1S,Enables Group 1 interrupts for the Secure state" "Disabled,Enabled" bitfld.quad 0x00 0. "ENABLEGRP1NS,Enables Group 1 interrupts for the Non-secure state" "Disabled,Enabled" group.quad spr:0x30460++0x00 line.quad 0x00 "ICC_PMR_EL1,Interrupt Controller Interrupt Priority Mask Register" hexmask.quad.byte 0x00 0.--7. 1. "PRIORITY,The priority mask level for the CPU interface" rgroup.quad spr:0x30CB3++0x00 line.quad 0x00 "ICC_RPR_EL1,Interrupt Controller Running Priority Register" hexmask.quad.byte 0x00 0.--7. 1. "PRIORITY,The current running priority on the CPU interface" if (((per.q(spr:0x30CB7))&0x10000000000)==0x00) wgroup.quad spr:0x30CB7++0x00 line.quad 0x00 "ICC_SGI0R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated." else wgroup.quad spr:0x30CB7++0x00 line.quad 0x00 "ICC_SGI0R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline endif if (((per.q(spr:0x30CB5))&0x10000000000)==0x00) wgroup.quad spr:0x30CB5++0x00 line.quad 0x00 "ICC_SGI1R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated" else wgroup.quad spr:0x30CB5++0x00 line.quad 0x00 "ICC_SGI1R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline endif group.quad spr:0x30CC5++0x00 line.quad 0x00 "ICC_SRE_EL1,Interrupt Controller System Register Enable Register (EL1)" bitfld.quad 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.quad 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" bitfld.quad 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" group.quad spr:0x34C95++0x00 line.quad 0x00 "ICC_SRE_EL2,Interrupt Controller System Register Enable Register (EL2)" bitfld.quad 0x00 3. "ENABLE,Enables lower Exception level access to ICC_SRE_EL1" "Trapped,Not trapped" bitfld.quad 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.quad 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" newline bitfld.quad 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" group.quad spr:0x36CC5++0x00 line.quad 0x00 "ICC_SRE_EL3,Interrupt Controller System Register Enable Register (EL3)" bitfld.quad 0x00 3. "ENABLE,Enables lower Exception level access to ICC_SRE_EL1/ICC_SRE_EL2" "Trapped,Not trapped" bitfld.quad 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.quad 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" newline bitfld.quad 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" tree.end tree "AArch64 Virtual Interface Control System Registers" tree.open "Hypervisor Active Priorities Registers" group.quad spr:0x34C80++0x00 line.quad 0x00 "ICH_AP0R0_EL2,Interrupt Controller Hypervisor Active Priorities Group 0 Register 0" bitfld.quad 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.quad 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.quad 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.quad 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.quad 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" newline bitfld.quad 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.quad 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.quad 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.quad 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.quad 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" newline bitfld.quad 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.quad 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" bitfld.quad 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.quad 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.quad 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.quad 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.quad 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.quad 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.quad 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.quad 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.quad 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.quad 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.quad 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.quad 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" bitfld.quad 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" newline bitfld.quad 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.quad 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.quad 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" group.quad spr:0x34C90++0x00 line.quad 0x00 "ICH_AP1R0_EL2,Interrupt Controller Hypervisor Active Priorities Group 1 Register 0" bitfld.quad 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.quad 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.quad 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.quad 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.quad 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" newline bitfld.quad 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.quad 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.quad 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.quad 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.quad 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" newline bitfld.quad 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.quad 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" bitfld.quad 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.quad 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.quad 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.quad 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.quad 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.quad 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.quad 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.quad 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.quad 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.quad 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.quad 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.quad 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" bitfld.quad 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" newline bitfld.quad 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.quad 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.quad 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" tree.end newline rgroup.quad spr:0x34CB3++0x00 line.quad 0x00 "ICH_EISR_EL2,Interrupt Controller End of Interrupt Status Register" bitfld.quad 0x00 3. "STATUS3,EOI maintenance interrupt status bit for List register 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. "STATUS2,EOI maintenance interrupt status bit for List register 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. "STATUS1,EOI maintenance interrupt status bit for List register 1" "No interrupt,Interrupt" newline bitfld.quad 0x00 0. "STATUS0,EOI maintenance interrupt status bit for List register 0" "No interrupt,Interrupt" rgroup.quad spr:0x34CB5++0x00 line.quad 0x00 "ICH_ELRSR_EL2,Interrupt Controller Empty List Register Status Register" bitfld.quad 0x00 3. "STATUS3,Status bit for List register 3" "Interrupt,No interrupt" bitfld.quad 0x00 2. "STATUS2,Status bit for List register 2" "Interrupt,No interrupt" bitfld.quad 0x00 1. "STATUS1,Status bit for List register 1" "Interrupt,No interrupt" newline bitfld.quad 0x00 0. "STATUS0,Status bit for List register 0" "Interrupt,No interrupt" if (((per.q(spr:0x34CB1))&0x400000)==0x400000) group.quad spr:0x34CB0++0x00 line.quad 0x00 "ICH_HCR_EL2,Interrupt Controller Hypervisor Control Register" bitfld.quad 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 14. "TDIR,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped" bitfld.quad 0x00 13. "TSEI,Trap all locally generated SEIs" "Not trapped,Trapped" newline bitfld.quad 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped" bitfld.quad 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped" bitfld.quad 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped" newline bitfld.quad 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled" newline bitfld.quad 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" newline bitfld.quad 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled" else group.quad spr:0x34CB0++0x00 line.quad 0x00 "ICH_HCR_EL2,Interrupt Controller Hypervisor Control Register" bitfld.quad 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 14. "TDIR,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped" newline bitfld.quad 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped" bitfld.quad 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped" bitfld.quad 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped" newline bitfld.quad 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled" newline bitfld.quad 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" newline bitfld.quad 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled" endif if (((per.q(spr:0x34CC0+0x0))&0x2000000000000000)==0x00) group.quad spr:(0x34CC0+0x0)++0x00 line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" else group.quad spr:(0x34CC0+0x0)++0x00 line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID for hardware interrupts" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" endif if (((per.q(spr:0x34CC0+0x1))&0x2000000000000000)==0x00) group.quad spr:(0x34CC0+0x1)++0x00 line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" else group.quad spr:(0x34CC0+0x1)++0x00 line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID for hardware interrupts" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" endif if (((per.q(spr:0x34CC0+0x2))&0x2000000000000000)==0x00) group.quad spr:(0x34CC0+0x2)++0x00 line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" else group.quad spr:(0x34CC0+0x2)++0x00 line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID for hardware interrupts" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" endif if (((per.q(spr:0x34CC0+0x3))&0x2000000000000000)==0x00) group.quad spr:(0x34CC0+0x3)++0x00 line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" else group.quad spr:(0x34CC0+0x3)++0x00 line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID for hardware interrupts" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" endif rgroup.quad spr:0x34CB2++0x00 line.quad 0x00 "ICH_MISR_EL2,Interrupt Controller Maintenance Interrupt State Register" bitfld.quad 0x00 7. "VGRP1D,VPE Group 1 Disabled" "Not asserted,Asserted" bitfld.quad 0x00 6. "VGRP1E,VPE Group 1 Enabled" "Not asserted,Asserted" bitfld.quad 0x00 5. "VGRP0D,VPE Group 0 Disabled" "Not asserted,Asserted" newline bitfld.quad 0x00 4. "VGRP0E,VPE Group 0 Enabled" "Not asserted,Asserted" bitfld.quad 0x00 3. "NP,No Pending" "Not asserted,Asserted" bitfld.quad 0x00 2. "LRENP,List Register Entry Not Present" "Not asserted,Asserted" newline bitfld.quad 0x00 1. "U,Underflow" "Not asserted,Asserted" bitfld.quad 0x00 0. "EOI,End Of Interrupt" "Not asserted,Asserted" group.quad spr:0x34CB7++0x00 line.quad 0x00 "ICH_VMCR_EL2,Interrupt Controller Virtual Machine Control Register" hexmask.quad.byte 0x00 24.--31. 1. "VPMR,The priority mask level for the virtual CPU interface" bitfld.quad 0x00 21.--23. "VBPR0,Virtual Binary Point Register Group 0" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]" bitfld.quad 0x00 18.--20. "VBPR1,Virtual Binary Point Register Group 1" "Reserved,[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]" newline bitfld.quad 0x00 9. "VEOIM,Controls whether a write to an End of Interrupt register also deactivates the virtual interrupt" "Disabled,Enabled" bitfld.quad 0x00 4. "VCBPR,Virtual Common Binary Point Register" "Separate registers,Same register" bitfld.quad 0x00 3. "VFIQEN,Virtual FIQ enable" "Virtual IRQs,Virtual FIQs" newline bitfld.quad 0x00 2. "VACKCTL,Virtual FIQ enable" "1022,Corresponding interrupt" bitfld.quad 0x00 1. "VENG1,Virtual Group 1 interrupt enable" "Disabled,Enabled" bitfld.quad 0x00 0. "VENG0,Virtual Group 0 interrupt enable" "Disabled,Enabled" rgroup.quad spr:0x34CB1++0x00 line.quad 0x00 "ICH_VTR_EL2,Interrupt Controller VGIC Type Register" bitfld.quad 0x00 29.--31. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 26.--28. "PREBITS,The number of virtual preemption bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 23.--25. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." newline bitfld.quad 0x00 22. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported" bitfld.quad 0x00 21. "A3V,Affinity 3 Valid" "Only zero values supported,Non-zero values supported" bitfld.quad 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Supported,Not supported" newline bitfld.quad 0x00 19. "TDS,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Not supported,Supported" bitfld.quad 0x00 0.--4. "LISTREGS,The number of implemented List registers minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end tree.end tree "Debug Registers" rgroup.quad spr:0x23010++0x00 line.quad 0x00 "MDCCSR_EL0,Debug Comms Channel Status Register" bitfld.quad 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full" bitfld.quad 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full" group.quad spr:0x20020++0x00 line.quad 0x00 "MDCCINT_EL1,Debug Comms Channel Interrupt Enable register" bitfld.quad 0x00 30. "RX,DCC interrupt enable controls" "Disabled,Enabled" bitfld.quad 0x00 29. "TX,DCC interrupt enable controls" "Disabled,Enabled" group.quad spr:0x23040++0x00 line.quad 0x00 "DBGDTR_EL0,Half Duplex Data Transfer Register" hexmask.quad.long 0x00 32.--63. 1. "HIGHWORD,Writes to this register set DTRRX to the value in this field and do not change RXfull" hexmask.quad.long 0x00 0.--31. 1. "LOWWORD,Writes to this register set DTRTX to the value in this field and set TXfull to 1" rgroup.quad spr:0x23050++0x00 line.quad 0x00 "DBGDTRRX_EL0,Full Duplex Receive Data Transfer Register" wgroup.quad spr:0x23050++0x00 line.quad 0x00 "DBGDTRTX_EL0,Full Duplex Transmit Data Transfer Register" group.quad spr:0x24070++0x00 line.quad 0x00 "DBGVCR32_EL2,Vector Catch Register" bitfld.quad 0x00 31. "NSF,FIQ vector catch enable in Non-secure state" "Low,High" bitfld.quad 0x00 30. "NSI,IRQ vector catch enable in Non-secure state" "Low,High" bitfld.quad 0x00 28. "NSD,Data Abort vector catch enable in Non-secure state" "Low,High" bitfld.quad 0x00 27. "NSP,Prefetch Abort vector catch enable in Non-secure state" "Low,High" newline bitfld.quad 0x00 26. "NSS,Supervisor Call (SVC) vector catch enable in Non-secure state" "Low,High" bitfld.quad 0x00 25. "NSU,Undefined Instruction vector catch enable in Non-secure state" "Low,High" bitfld.quad 0x00 7. "SF,FIQ vector catch enable in Secure state" "Low,High" bitfld.quad 0x00 6. "SI,IRQ vector catch enable in Secure state" "Low,High" newline bitfld.quad 0x00 4. "SD,Data Abort vector catch enable in Secure state" "Low,High" bitfld.quad 0x00 3. "SP,Prefetch Abort vector catch enable in Secure state" "Low,High" bitfld.quad 0x00 2. "SS,Supervisor Call (SVC) vector catch enable in Secure state" "Low,High" bitfld.quad 0x00 1. "SU,Undefined Instruction vector catch enable in Secure state" "Low,High" group.quad spr:0x20002++0x00 line.quad 0x00 "OSDTRRX_EL1,OS Lock Data Transfer Register" if (((per.q(spr:0x20114))&0x02)==0x02) group.quad spr:0x20022++0x00 line.quad 0x00 "MDSCR_EL1,Monitor Debug System Control Register" bitfld.quad 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full" bitfld.quad 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full" bitfld.quad 0x00 27. "RXO,Save/restore bit" "Low,High" bitfld.quad 0x00 26. "TXU,Save/restore bit" "Low,High" newline bitfld.quad 0x00 22.--23. "INTDIS,Save/restore bits" "0,1,2,3" bitfld.quad 0x00 21. "TDA,Save/restore bit" "Low,High" bitfld.quad 0x00 15. "MDE,Monitor debug events" "Disabled,Enabled" bitfld.quad 0x00 14. "HDE,Save/restore bit" "Low,High" newline bitfld.quad 0x00 13. "KDE,Local (kernel) debug enable" "Disabled,Enabled" bitfld.quad 0x00 12. "TDCC,Trap accesses to the debug comms channel in EL0" "Disabled,Enabled" bitfld.quad 0x00 6. "ERR,Save/restore bit" "Low,High" bitfld.quad 0x00 0. "SS,Software step control" "Disabled,Enabled" else group.quad spr:0x20022++0x00 line.quad 0x00 "MDSCR_EL1,Monitor Debug System Control Register" rbitfld.quad 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full" rbitfld.quad 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full" rbitfld.quad 0x00 27. "RXO,Save/restore bit" "Low,High" rbitfld.quad 0x00 26. "TXU,Save/restore bit" "Low,High" newline rbitfld.quad 0x00 22.--23. "INTDIS,Save/restore bits" "0,1,2,3" rbitfld.quad 0x00 21. "TDA,Save/restore bit" "Low,High" bitfld.quad 0x00 15. "MDE,Monitor debug events" "Disabled,Enabled" bitfld.quad 0x00 14. "HDE,Save/restore bit" "Low,High" newline bitfld.quad 0x00 13. "KDE,Local (kernel) debug enable" "Disabled,Enabled" bitfld.quad 0x00 12. "TDCC,Trap accesses to the debug comms channel in EL0" "Disabled,Enabled" rbitfld.quad 0x00 6. "ERR,Save/restore bit" "Low,High" bitfld.quad 0x00 0. "SS,Software step control" "Disabled,Enabled" endif group.quad spr:0x20032++0x00 line.quad 0x00 "OSDTRTX_EL1,OS Lock Data Transfer Register" group.quad spr:0x20062++0x00 line.quad 0x00 "OSECCR_EL1,OS Lock Exception Catch Control Register" rgroup.quad spr:0x20100++0x00 line.quad 0x00 "MDRAR_EL1,Debug ROM Address Register" hexmask.quad 0x00 12.--47. 0x10 "ROMADDR,ROM base physical address" bitfld.quad 0x00 0.--1. "VALID,ROM address valid" "Invalid,Reserved,Reserved,Valid" wgroup.quad spr:0x20104++0x00 line.quad 0x00 "OSLAR_EL1,OS Lock Access Register" bitfld.quad 0x00 0. "OSLK,OS lock" "Unlock,Lock" rgroup.quad spr:0x20114++0x00 line.quad 0x00 "OSLSR_EL1,OS Lock Status Register" bitfld.quad 0x00 2. "NTT,Not 32-bit access" "Low,?..." bitfld.quad 0x00 1. "OSLK,OS lock status" "Not locked,Locked" bitfld.quad 0x00 0. 3. "OSLM,OS lock model implemented field" "Reserved,Reserved,Impelemented,?..." group.quad spr:0x20134++0x00 line.quad 0x00 "OSDLR_EL1,OS Double-lock Register" bitfld.quad 0x00 0. "DLK,OS double-lock control" "Not locked,Locked" group.quad spr:0x20144++0x00 line.quad 0x00 "DBGPRCR_EL1,Debug Power/Reset Control Register" bitfld.quad 0x00 0. "CORENPDRQ,Core no powerdown request" "No,Yes" group.quad spr:0x20786++0x00 line.quad 0x00 "DBGCLAIMSET_EL1,Claim Tag register Set" bitfld.quad 0x00 7. "CT7,Claim Tag 7 Set" "Reserved,Set" bitfld.quad 0x00 6. "CT6,Claim Tag 6 Set" "Reserved,Set" bitfld.quad 0x00 5. "CT5,Claim Tag 5 Set" "Reserved,Set" bitfld.quad 0x00 4. "CT4,Claim Tag 4 Set" "Reserved,Set" newline bitfld.quad 0x00 3. "CT3,Claim Tag 3 Set" "Reserved,Set" bitfld.quad 0x00 2. "CT2,Claim Tag 2 Set" "Reserved,Set" bitfld.quad 0x00 1. "CT1,Claim Tag 1 Set" "Reserved,Set" bitfld.quad 0x00 0. "CT0,Claim Tag 0 Set" "Reserved,Set" group.quad spr:0x20796++0x00 line.quad 0x00 "DBGCLAIMCLR_EL1,Claim Tag register Clear" bitfld.quad 0x00 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared" bitfld.quad 0x00 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared" bitfld.quad 0x00 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared" bitfld.quad 0x00 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared" newline bitfld.quad 0x00 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared" bitfld.quad 0x00 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared" bitfld.quad 0x00 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared" bitfld.quad 0x00 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared" rgroup.quad spr:0x207E6++0x00 line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status Register" bitfld.quad 0x00 6.--7. "SNID,Secure non-invasive debug" "Not implemented,Reserved,Disabled,Enabled" bitfld.quad 0x00 4.--5. "SID,Secure invasive debug" "Not implemented,Reserved,Disabled,Enabled" bitfld.quad 0x00 2.--3. "NSNID,Non-secure non-invasive debug" "Not implemented,Reserved,Reserved,Enabled" bitfld.quad 0x00 0.--1. "NSID,Non-secure invasive debug" "Not implemented,Reserved,Disabled,Enabled" tree.end tree "Breakpoint Registers" tree "Breakpoint 0" if (((per.q(spr:0x20005+0x0))&0xF00000)<=0x100000) group.quad spr:(0x20004+0x0)++0x00 line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x04 "VA,Bits[48:2] of the address value for comparison" elif (((((per.q(spr:0x20005+0x0))&0xF00000)>=0x200000)&&(((per.q(spr:0x20005+0x0))&0xF00000)<=0x300000))||((((per.q(spr:0x20005+0x0))&0xF00000)>=0x600000)&&(((per.q(spr:0x20005+0x0))&0xF00000)<=0x700000))) group.quad spr:(0x20004+0x0)++0x00 line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison" elif ((((per.q(spr:0x20005+0x0))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x0))&0xF00000)<=0x900000)&&(((per.q(spr:0x34212))&0x80000)==0x00)) group.quad spr:(0x20004+0x0)++0x00 line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif ((((per.q(spr:0x20005+0x0))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x0))&0xF00000)<=0x900000)&&(((per.q(spr:0x34212))&0x80000)==0x80000)) group.quad spr:(0x20004+0x0)++0x00 line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register" hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison" elif ((((per.q(spr:0x20005+0x0))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x0))&0xF00000)<=0xB00000)&&(((per.q(spr:0x34212))&0x80000)==0x00)) group.quad spr:(0x20004+0x0)++0x00 line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison" elif ((((per.q(spr:0x20005+0x0))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x0))&0xF00000)<=0xB00000)&&(((per.q(spr:0x34212))&0x80000)==0x80000)) group.quad spr:(0x20004+0x0)++0x00 line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register" hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison" elif ((((per.q(spr:0x20005+0x0))&0xF00000)>=0xC00000)&&(((per.q(spr:0x20005+0x0))&0xF00000)<=0xD00000)) group.quad spr:(0x20004+0x0)++0x00 line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register" hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison against CONTEXTIDR_EL2" elif ((((per.q(spr:0x20005+0x0))&0xF00000)>=0xE00000)&&(((per.q(spr:0x20005+0x0))&0xF00000)<=0xF00000)) group.quad spr:(0x20004+0x0)++0x00 line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register" hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison against CONTEXTIDR_EL2" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison against CONTEXTIDR_EL1" else rgroup.quad spr:(0x20004+0x0)++0x00 line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register" endif if (((per.q(spr:0x20005+0x0))&0x2000)==0x2000) if (((per.q(spr:0x20005+0x0))&0xC000)==0x0000) group.quad spr:(0x20005+0x0)++0x00 line.quad 0x00 "DBGBCR0_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif (((per.q(spr:0x20005+0x0))&0xC000)==0x4000) group.quad spr:(0x20005+0x0)++0x00 line.quad 0x00 "DBGBCR0_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif (((per.q(spr:0x20005+0x0))&0xC000)==0x8000) group.quad spr:(0x20005+0x0)++0x00 line.quad 0x00 "DBGBCR0_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "TrustZone,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.quad spr:(0x20005+0x0)++0x00 line.quad 0x00 "DBGBCR0_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif else if (((per.q(spr:0x20005+0x0))&0xC000)==0xC000) group.quad spr:(0x20005+0x0)++0x00 line.quad 0x00 "DBGBCR0_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.quad spr:(0x20005+0x0)++0x00 line.quad 0x00 "DBGBCR0_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,User,User/System" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif endif tree.end tree "Breakpoint 1" if (((per.q(spr:0x20005+0x10))&0xF00000)<=0x100000) group.quad spr:(0x20004+0x10)++0x00 line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x04 "VA,Bits[48:2] of the address value for comparison" elif (((((per.q(spr:0x20005+0x10))&0xF00000)>=0x200000)&&(((per.q(spr:0x20005+0x10))&0xF00000)<=0x300000))||((((per.q(spr:0x20005+0x10))&0xF00000)>=0x600000)&&(((per.q(spr:0x20005+0x10))&0xF00000)<=0x700000))) group.quad spr:(0x20004+0x10)++0x00 line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison" elif ((((per.q(spr:0x20005+0x10))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x10))&0xF00000)<=0x900000)&&(((per.q(spr:0x34212))&0x80000)==0x00)) group.quad spr:(0x20004+0x10)++0x00 line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif ((((per.q(spr:0x20005+0x10))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x10))&0xF00000)<=0x900000)&&(((per.q(spr:0x34212))&0x80000)==0x80000)) group.quad spr:(0x20004+0x10)++0x00 line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register" hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison" elif ((((per.q(spr:0x20005+0x10))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x10))&0xF00000)<=0xB00000)&&(((per.q(spr:0x34212))&0x80000)==0x00)) group.quad spr:(0x20004+0x10)++0x00 line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison" elif ((((per.q(spr:0x20005+0x10))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x10))&0xF00000)<=0xB00000)&&(((per.q(spr:0x34212))&0x80000)==0x80000)) group.quad spr:(0x20004+0x10)++0x00 line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register" hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison" elif ((((per.q(spr:0x20005+0x10))&0xF00000)>=0xC00000)&&(((per.q(spr:0x20005+0x10))&0xF00000)<=0xD00000)) group.quad spr:(0x20004+0x10)++0x00 line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register" hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison against CONTEXTIDR_EL2" elif ((((per.q(spr:0x20005+0x10))&0xF00000)>=0xE00000)&&(((per.q(spr:0x20005+0x10))&0xF00000)<=0xF00000)) group.quad spr:(0x20004+0x10)++0x00 line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register" hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison against CONTEXTIDR_EL2" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison against CONTEXTIDR_EL1" else rgroup.quad spr:(0x20004+0x10)++0x00 line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register" endif if (((per.q(spr:0x20005+0x10))&0x2000)==0x2000) if (((per.q(spr:0x20005+0x10))&0xC000)==0x0000) group.quad spr:(0x20005+0x10)++0x00 line.quad 0x00 "DBGBCR1_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif (((per.q(spr:0x20005+0x10))&0xC000)==0x4000) group.quad spr:(0x20005+0x10)++0x00 line.quad 0x00 "DBGBCR1_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif (((per.q(spr:0x20005+0x10))&0xC000)==0x8000) group.quad spr:(0x20005+0x10)++0x00 line.quad 0x00 "DBGBCR1_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "TrustZone,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.quad spr:(0x20005+0x10)++0x00 line.quad 0x00 "DBGBCR1_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif else if (((per.q(spr:0x20005+0x10))&0xC000)==0xC000) group.quad spr:(0x20005+0x10)++0x00 line.quad 0x00 "DBGBCR1_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.quad spr:(0x20005+0x10)++0x00 line.quad 0x00 "DBGBCR1_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,User,User/System" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif endif tree.end tree "Breakpoint 2" if (((per.q(spr:0x20005+0x20))&0xF00000)<=0x100000) group.quad spr:(0x20004+0x20)++0x00 line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x04 "VA,Bits[48:2] of the address value for comparison" elif (((((per.q(spr:0x20005+0x20))&0xF00000)>=0x200000)&&(((per.q(spr:0x20005+0x20))&0xF00000)<=0x300000))||((((per.q(spr:0x20005+0x20))&0xF00000)>=0x600000)&&(((per.q(spr:0x20005+0x20))&0xF00000)<=0x700000))) group.quad spr:(0x20004+0x20)++0x00 line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison" elif ((((per.q(spr:0x20005+0x20))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x20))&0xF00000)<=0x900000)&&(((per.q(spr:0x34212))&0x80000)==0x00)) group.quad spr:(0x20004+0x20)++0x00 line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif ((((per.q(spr:0x20005+0x20))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x20))&0xF00000)<=0x900000)&&(((per.q(spr:0x34212))&0x80000)==0x80000)) group.quad spr:(0x20004+0x20)++0x00 line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register" hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison" elif ((((per.q(spr:0x20005+0x20))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x20))&0xF00000)<=0xB00000)&&(((per.q(spr:0x34212))&0x80000)==0x00)) group.quad spr:(0x20004+0x20)++0x00 line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison" elif ((((per.q(spr:0x20005+0x20))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x20))&0xF00000)<=0xB00000)&&(((per.q(spr:0x34212))&0x80000)==0x80000)) group.quad spr:(0x20004+0x20)++0x00 line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register" hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison" elif ((((per.q(spr:0x20005+0x20))&0xF00000)>=0xC00000)&&(((per.q(spr:0x20005+0x20))&0xF00000)<=0xD00000)) group.quad spr:(0x20004+0x20)++0x00 line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register" hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison against CONTEXTIDR_EL2" elif ((((per.q(spr:0x20005+0x20))&0xF00000)>=0xE00000)&&(((per.q(spr:0x20005+0x20))&0xF00000)<=0xF00000)) group.quad spr:(0x20004+0x20)++0x00 line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register" hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison against CONTEXTIDR_EL2" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison against CONTEXTIDR_EL1" else rgroup.quad spr:(0x20004+0x20)++0x00 line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register" endif if (((per.q(spr:0x20005+0x20))&0x2000)==0x2000) if (((per.q(spr:0x20005+0x20))&0xC000)==0x0000) group.quad spr:(0x20005+0x20)++0x00 line.quad 0x00 "DBGBCR2_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif (((per.q(spr:0x20005+0x20))&0xC000)==0x4000) group.quad spr:(0x20005+0x20)++0x00 line.quad 0x00 "DBGBCR2_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif (((per.q(spr:0x20005+0x20))&0xC000)==0x8000) group.quad spr:(0x20005+0x20)++0x00 line.quad 0x00 "DBGBCR2_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "TrustZone,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.quad spr:(0x20005+0x20)++0x00 line.quad 0x00 "DBGBCR2_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif else if (((per.q(spr:0x20005+0x20))&0xC000)==0xC000) group.quad spr:(0x20005+0x20)++0x00 line.quad 0x00 "DBGBCR2_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.quad spr:(0x20005+0x20)++0x00 line.quad 0x00 "DBGBCR2_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,User,User/System" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif endif tree.end tree "Breakpoint 3" if (((per.q(spr:0x20005+0x30))&0xF00000)<=0x100000) group.quad spr:(0x20004+0x30)++0x00 line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x04 "VA,Bits[48:2] of the address value for comparison" elif (((((per.q(spr:0x20005+0x30))&0xF00000)>=0x200000)&&(((per.q(spr:0x20005+0x30))&0xF00000)<=0x300000))||((((per.q(spr:0x20005+0x30))&0xF00000)>=0x600000)&&(((per.q(spr:0x20005+0x30))&0xF00000)<=0x700000))) group.quad spr:(0x20004+0x30)++0x00 line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison" elif ((((per.q(spr:0x20005+0x30))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x30))&0xF00000)<=0x900000)&&(((per.q(spr:0x34212))&0x80000)==0x00)) group.quad spr:(0x20004+0x30)++0x00 line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif ((((per.q(spr:0x20005+0x30))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x30))&0xF00000)<=0x900000)&&(((per.q(spr:0x34212))&0x80000)==0x80000)) group.quad spr:(0x20004+0x30)++0x00 line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register" hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison" elif ((((per.q(spr:0x20005+0x30))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x30))&0xF00000)<=0xB00000)&&(((per.q(spr:0x34212))&0x80000)==0x00)) group.quad spr:(0x20004+0x30)++0x00 line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison" elif ((((per.q(spr:0x20005+0x30))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x30))&0xF00000)<=0xB00000)&&(((per.q(spr:0x34212))&0x80000)==0x80000)) group.quad spr:(0x20004+0x30)++0x00 line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register" hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison" elif ((((per.q(spr:0x20005+0x30))&0xF00000)>=0xC00000)&&(((per.q(spr:0x20005+0x30))&0xF00000)<=0xD00000)) group.quad spr:(0x20004+0x30)++0x00 line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register" hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison against CONTEXTIDR_EL2" elif ((((per.q(spr:0x20005+0x30))&0xF00000)>=0xE00000)&&(((per.q(spr:0x20005+0x30))&0xF00000)<=0xF00000)) group.quad spr:(0x20004+0x30)++0x00 line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register" hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison against CONTEXTIDR_EL2" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison against CONTEXTIDR_EL1" else rgroup.quad spr:(0x20004+0x30)++0x00 line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register" endif if (((per.q(spr:0x20005+0x30))&0x2000)==0x2000) if (((per.q(spr:0x20005+0x30))&0xC000)==0x0000) group.quad spr:(0x20005+0x30)++0x00 line.quad 0x00 "DBGBCR3_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif (((per.q(spr:0x20005+0x30))&0xC000)==0x4000) group.quad spr:(0x20005+0x30)++0x00 line.quad 0x00 "DBGBCR3_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif (((per.q(spr:0x20005+0x30))&0xC000)==0x8000) group.quad spr:(0x20005+0x30)++0x00 line.quad 0x00 "DBGBCR3_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "TrustZone,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.quad spr:(0x20005+0x30)++0x00 line.quad 0x00 "DBGBCR3_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif else if (((per.q(spr:0x20005+0x30))&0xC000)==0xC000) group.quad spr:(0x20005+0x30)++0x00 line.quad 0x00 "DBGBCR3_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.quad spr:(0x20005+0x30)++0x00 line.quad 0x00 "DBGBCR3_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,User,User/System" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif endif tree.end tree "Breakpoint 4" if (((per.q(spr:0x20005+0x40))&0xF00000)<=0x100000) group.quad spr:(0x20004+0x40)++0x00 line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x04 "VA,Bits[48:2] of the address value for comparison" elif (((((per.q(spr:0x20005+0x40))&0xF00000)>=0x200000)&&(((per.q(spr:0x20005+0x40))&0xF00000)<=0x300000))||((((per.q(spr:0x20005+0x40))&0xF00000)>=0x600000)&&(((per.q(spr:0x20005+0x40))&0xF00000)<=0x700000))) group.quad spr:(0x20004+0x40)++0x00 line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison" elif ((((per.q(spr:0x20005+0x40))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x40))&0xF00000)<=0x900000)&&(((per.q(spr:0x34212))&0x80000)==0x00)) group.quad spr:(0x20004+0x40)++0x00 line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif ((((per.q(spr:0x20005+0x40))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x40))&0xF00000)<=0x900000)&&(((per.q(spr:0x34212))&0x80000)==0x80000)) group.quad spr:(0x20004+0x40)++0x00 line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register" hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison" elif ((((per.q(spr:0x20005+0x40))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x40))&0xF00000)<=0xB00000)&&(((per.q(spr:0x34212))&0x80000)==0x00)) group.quad spr:(0x20004+0x40)++0x00 line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison" elif ((((per.q(spr:0x20005+0x40))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x40))&0xF00000)<=0xB00000)&&(((per.q(spr:0x34212))&0x80000)==0x80000)) group.quad spr:(0x20004+0x40)++0x00 line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register" hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison" elif ((((per.q(spr:0x20005+0x40))&0xF00000)>=0xC00000)&&(((per.q(spr:0x20005+0x40))&0xF00000)<=0xD00000)) group.quad spr:(0x20004+0x40)++0x00 line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register" hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison against CONTEXTIDR_EL2" elif ((((per.q(spr:0x20005+0x40))&0xF00000)>=0xE00000)&&(((per.q(spr:0x20005+0x40))&0xF00000)<=0xF00000)) group.quad spr:(0x20004+0x40)++0x00 line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register" hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison against CONTEXTIDR_EL2" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison against CONTEXTIDR_EL1" else rgroup.quad spr:(0x20004+0x40)++0x00 line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register" endif if (((per.q(spr:0x20005+0x40))&0x2000)==0x2000) if (((per.q(spr:0x20005+0x40))&0xC000)==0x0000) group.quad spr:(0x20005+0x40)++0x00 line.quad 0x00 "DBGBCR4_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif (((per.q(spr:0x20005+0x40))&0xC000)==0x4000) group.quad spr:(0x20005+0x40)++0x00 line.quad 0x00 "DBGBCR4_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif (((per.q(spr:0x20005+0x40))&0xC000)==0x8000) group.quad spr:(0x20005+0x40)++0x00 line.quad 0x00 "DBGBCR4_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "TrustZone,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.quad spr:(0x20005+0x40)++0x00 line.quad 0x00 "DBGBCR4_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif else if (((per.q(spr:0x20005+0x40))&0xC000)==0xC000) group.quad spr:(0x20005+0x40)++0x00 line.quad 0x00 "DBGBCR4_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.quad spr:(0x20005+0x40)++0x00 line.quad 0x00 "DBGBCR4_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,User,User/System" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif endif tree.end tree "Breakpoint 5" if (((per.q(spr:0x20005+0x50))&0xF00000)<=0x100000) group.quad spr:(0x20004+0x50)++0x00 line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x04 "VA,Bits[48:2] of the address value for comparison" elif (((((per.q(spr:0x20005+0x50))&0xF00000)>=0x200000)&&(((per.q(spr:0x20005+0x50))&0xF00000)<=0x300000))||((((per.q(spr:0x20005+0x50))&0xF00000)>=0x600000)&&(((per.q(spr:0x20005+0x50))&0xF00000)<=0x700000))) group.quad spr:(0x20004+0x50)++0x00 line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison" elif ((((per.q(spr:0x20005+0x50))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x50))&0xF00000)<=0x900000)&&(((per.q(spr:0x34212))&0x80000)==0x00)) group.quad spr:(0x20004+0x50)++0x00 line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif ((((per.q(spr:0x20005+0x50))&0xF00000)>=0x800000)&&(((per.q(spr:0x20005+0x50))&0xF00000)<=0x900000)&&(((per.q(spr:0x34212))&0x80000)==0x80000)) group.quad spr:(0x20004+0x50)++0x00 line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register" hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison" elif ((((per.q(spr:0x20005+0x50))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x50))&0xF00000)<=0xB00000)&&(((per.q(spr:0x34212))&0x80000)==0x00)) group.quad spr:(0x20004+0x50)++0x00 line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison" elif ((((per.q(spr:0x20005+0x50))&0xF00000)>=0xA00000)&&(((per.q(spr:0x20005+0x50))&0xF00000)<=0xB00000)&&(((per.q(spr:0x34212))&0x80000)==0x80000)) group.quad spr:(0x20004+0x50)++0x00 line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register" hexmask.quad.word 0x00 32.--47. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison" elif ((((per.q(spr:0x20005+0x50))&0xF00000)>=0xC00000)&&(((per.q(spr:0x20005+0x50))&0xF00000)<=0xD00000)) group.quad spr:(0x20004+0x50)++0x00 line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register" hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison against CONTEXTIDR_EL2" elif ((((per.q(spr:0x20005+0x50))&0xF00000)>=0xE00000)&&(((per.q(spr:0x20005+0x50))&0xF00000)<=0xF00000)) group.quad spr:(0x20004+0x50)++0x00 line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register" hexmask.quad.long 0x00 32.--63. 1. "CONTEXTID2,Context ID value for comparison against CONTEXTIDR_EL2" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID value for comparison against CONTEXTIDR_EL1" else rgroup.quad spr:(0x20004+0x50)++0x00 line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register" endif if (((per.q(spr:0x20005+0x50))&0x2000)==0x2000) if (((per.q(spr:0x20005+0x50))&0xC000)==0x0000) group.quad spr:(0x20005+0x50)++0x00 line.quad 0x00 "DBGBCR5_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif (((per.q(spr:0x20005+0x50))&0xC000)==0x4000) group.quad spr:(0x20005+0x50)++0x00 line.quad 0x00 "DBGBCR5_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif (((per.q(spr:0x20005+0x50))&0xC000)==0x8000) group.quad spr:(0x20005+0x50)++0x00 line.quad 0x00 "DBGBCR5_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "TrustZone,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.quad spr:(0x20005+0x50)++0x00 line.quad 0x00 "DBGBCR5_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Both" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif else if (((per.q(spr:0x20005+0x50))&0xC000)==0xC000) group.quad spr:(0x20005+0x50)++0x00 line.quad 0x00 "DBGBCR5_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.quad spr:(0x20005+0x50)++0x00 line.quad 0x00 "DBGBCR5_EL1,Breakpoint Control Register" bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" newline bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" bitfld.quad 0x00 5.--8. "BAS,Byte address select" "Reserved,Reserved,Reserved,DBGBVRn_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVRn_EL1+2,Reserved,Reserved,DBGBVRn_EL1" bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,User,User/System" newline bitfld.quad 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif endif tree.end tree.end tree "Watchpoint Control Registers" tree "Watchpoint 0" group.quad spr:(0x20006+0x0)++0x00 line.quad 0x00 "DBGWVR0_EL1,Watchpoint Value Register (AArch64)" hexmask.quad 0x00 2.--48. 0x04 "ADDRESS,Data address" if (((per.q(spr:0x20007+0x0))&0x2000)==0x0000) if (((per.q(spr:0x20007+0x0))&0xC000)==0xC000) group.quad spr:(0x20007+0x0)++0x00 line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" else group.quad spr:(0x20007+0x0)++0x00 line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" endif else if (((per.q(spr:0x20007+0x0))&0xC000)==0x0000) group.quad spr:(0x20007+0x0)++0x00 line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" elif (((per.q(spr:0x20007+0x0))&0xC000)==0x8000) group.quad spr:(0x20007+0x0)++0x00 line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "TrustZone,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" else group.quad spr:(0x20007+0x0)++0x00 line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Superisor,System/Supervisor,Reserved,User/System/Supervisor" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" endif endif tree.end tree "Watchpoint 1" group.quad spr:(0x20006+0x10)++0x00 line.quad 0x00 "DBGWVR1_EL1,Watchpoint Value Register (AArch64)" hexmask.quad 0x00 2.--48. 0x04 "ADDRESS,Data address" if (((per.q(spr:0x20007+0x10))&0x2000)==0x0000) if (((per.q(spr:0x20007+0x10))&0xC000)==0xC000) group.quad spr:(0x20007+0x10)++0x00 line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" else group.quad spr:(0x20007+0x10)++0x00 line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" endif else if (((per.q(spr:0x20007+0x10))&0xC000)==0x0000) group.quad spr:(0x20007+0x10)++0x00 line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" elif (((per.q(spr:0x20007+0x10))&0xC000)==0x8000) group.quad spr:(0x20007+0x10)++0x00 line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "TrustZone,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" else group.quad spr:(0x20007+0x10)++0x00 line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Superisor,System/Supervisor,Reserved,User/System/Supervisor" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" endif endif tree.end tree "Watchpoint 2" group.quad spr:(0x20006+0x20)++0x00 line.quad 0x00 "DBGWVR2_EL1,Watchpoint Value Register (AArch64)" hexmask.quad 0x00 2.--48. 0x04 "ADDRESS,Data address" if (((per.q(spr:0x20007+0x20))&0x2000)==0x0000) if (((per.q(spr:0x20007+0x20))&0xC000)==0xC000) group.quad spr:(0x20007+0x20)++0x00 line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" else group.quad spr:(0x20007+0x20)++0x00 line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" endif else if (((per.q(spr:0x20007+0x20))&0xC000)==0x0000) group.quad spr:(0x20007+0x20)++0x00 line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" elif (((per.q(spr:0x20007+0x20))&0xC000)==0x8000) group.quad spr:(0x20007+0x20)++0x00 line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "TrustZone,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" else group.quad spr:(0x20007+0x20)++0x00 line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Superisor,System/Supervisor,Reserved,User/System/Supervisor" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" endif endif tree.end tree "Watchpoint 3" group.quad spr:(0x20006+0x30)++0x00 line.quad 0x00 "DBGWVR3_EL1,Watchpoint Value Register (AArch64)" hexmask.quad 0x00 2.--48. 0x04 "ADDRESS,Data address" if (((per.q(spr:0x20007+0x30))&0x2000)==0x0000) if (((per.q(spr:0x20007+0x30))&0xC000)==0xC000) group.quad spr:(0x20007+0x30)++0x00 line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,System/Supervisor,Reserved,User/System/Supervisor" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" else group.quad spr:(0x20007+0x30)++0x00 line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" endif else if (((per.q(spr:0x20007+0x30))&0xC000)==0x0000) group.quad spr:(0x20007+0x30)++0x00 line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" elif (((per.q(spr:0x20007+0x30))&0xC000)==0x8000) group.quad spr:(0x20007+0x30)++0x00 line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Secure" bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "TrustZone,System/Supervisor/TrustZone,Reserved,User/System/Supervisor/TrustZone" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" else group.quad spr:(0x20007+0x30)++0x00 line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register" bitfld.quad 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "Superisor,System/Supervisor,Reserved,User/System/Supervisor" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" endif endif tree.end tree.end tree.end tree.open "AArch32" tree "ID Registers" rgroup.long c15:0x0000++0x0 line.long 0x0 "MIDR,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 "IMPL,Implementer code" bitfld.long 0x0 20.--23. "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. "ARCH,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8" newline hexmask.long.word 0x0 4.--15. 0x10 "PART,Primary Part Number" bitfld.long 0x0 0.--3. "REV,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c15:0x0100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..." bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." rgroup.long c15:0x0200++0x0 line.long 0x0 "TCMTR,TCM Type Register" rgroup.long c15:0x0300++0x0 line.long 0x0 "TLBTR,TLB Type Register" rgroup.long c15:0x0500++0x0 line.long 0x0 "MPIDR,Multiprocessor Affinity Register" bitfld.long 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor" bitfld.long 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largely independent,?..." hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field" newline hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field" hexmask.long.byte 0x00 0.--7. 1. "AFF0,Affinity level 0. Lowest level affinity field" rgroup.long c15:0x0600++0x0 line.long 0x0 "REVIDR,Revision ID Register" rgroup.long c15:0x0410++0x00 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. "IS,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..." bitfld.long 0x00 24.--27. "FCSE,Fast Context Switch Memory Mappings Support" "Not supported,?..." bitfld.long 0x00 20.--23. "AR,Auxiliary Register Support" "Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "TCM,TCM and Associated DMA Support" "Not supported,?..." bitfld.long 0x00 12.--15. "SL,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.long 0x00 8.--11. "OSS,Outer Shareable Support" "Reserved,Implemented,?..." newline bitfld.long 0x00 4.--7. "PMSA,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. "VMSA,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,VMSAv7,?..." rgroup.long c15:0x0510++0x00 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. "BTB,Branch Predictor" "Reserved,Reserved,Reserved,Reserved,No flushing,?..." bitfld.long 0x00 24.--27. "L1TCO,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. "L1UCMO,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." newline bitfld.long 0x00 16.--19. "L1HCMO,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. "L1UCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. "L1HCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "L1UCLMOMVA,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. "L1HCLMOMVA,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." rgroup.long c15:0x0610++0x00 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 28.--31. "HAF,Hardware Access Flag Support" "Not supported,?..." bitfld.long 0x00 24.--27. "WFI,Wait for Interrupt Stalling Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MBF,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "UTLBMO,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. "HTLBMO,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. "HL1CMRO,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "HL1BPCRO,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. "HL1FPCRO,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." rgroup.long c15:0x0710++0x00 line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3" bitfld.long 0x00 28.--31. "SS,Supersection support" "Supported,?..." bitfld.long 0x00 24.--27. "CMEMSZ,Cache memory size" "Reserved,Reserved,1TByte,?..." bitfld.long 0x00 20.--23. "CW,Coherent walk" "Reserved,Supported,?..." newline bitfld.long 0x00 12.--15. "MB,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "BPM,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 4.--7. "HCMOSW,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "HCMOMVA,Invalidate Cache MVA Support" "Reserved,Supported,?..." rgroup.long c15:0x0020++0x00 line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. "DIVI,Divide Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "DEBI,Debug Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. "CI,Coprocessor Instructions Support" "Not supported,?..." newline bitfld.long 0x00 12.--15. "CBI,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "BI,Bitfield Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. "BCI,Bit Counting Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "SI,Swap Instructions Support" "Not supported,?..." rgroup.long c15:0x0120++0x00 line.long 0x00 "ID_ISAR1,Instruction Set Attribute Register 1" bitfld.long 0x00 28.--31. "JI,Jazelle Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. "INTI,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "IMMI,Immediate Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "ITEI,If Then Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "EXTI,Extend Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "EARI,Exception A and R Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "EXIN,Exception in ARM Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. "ENDI,Endian Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0220++0x00 line.long 0x00 "ID_ISAR2,Instruction Set Attribute Register 2" bitfld.long 0x00 28.--31. "RI,Reversal Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. "PSRI,PSR Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "UMI,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "SMI,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. "MI,Multiply Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "II,Multi-Access Interruptible Instructions Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "MHI,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "LSI,Load and Store Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.long c15:0x0320++0x00 line.long 0x00 "ID_ISAR3,Instruction Set Attribute Register 3" bitfld.long 0x00 28.--31. "TEEEI,Thumb-EE Extensions Support" "Not supported,?..." bitfld.long 0x00 24.--27. "NOPI,True NOP Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "TCI,Thumb Copy Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "TBI,Table Branch Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SPI,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "SVCI,SVC Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "SIMDI,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "SI,Saturate Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0420++0x00 line.long 0x00 "ID_ISAR4,Instruction Set Attribute Register 4" bitfld.long 0x00 28.--31. "SWP_FRAC,Memory System Locking Support" "Not supported,?..." bitfld.long 0x00 24.--27. "PSR_M_I,PSR_M Instructions Support" "Not supported,?..." bitfld.long 0x00 20.--23. "SPRI,Synchronization Primitive instructions" "Supported,?..." newline bitfld.long 0x00 16.--19. "BI,Barrier Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SMCI,SMC Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "WBI,Write-Back Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "WSI,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "UI,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.long c15:0x0520++0x00 line.long 0x00 "ID_ISAR5,Instruction Set Attribute Register 5" bitfld.long 0x00 16.--19. "CRC32,CRC32 Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SHA2,SHA2 Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. "SHA1,SHA1 Instructions Support" "Not supported,Supported,?..." newline bitfld.long 0x00 4.--7. "AES,AES Instructions Support" "Not supported,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "SEVL,SEVL Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0010++0x00 line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 12.--15. "STATE3,Thumb Execution Environment (Thumb-EE) Support" "Not supported,?..." bitfld.long 0x00 8.--11. "STATE2,Support for Jazelle extension" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. "STATE1,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "STATE0,ARM Instruction Set Support" "Reserved,Supported,?..." rgroup.long c15:0x0110++0x00 line.long 0x00 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x00 28.--31. "GIC_CPU,GIC CPU Support" "Disabled,Enabled,?..." bitfld.long 0x00 16.--19. "GT,Generic Timer Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "VE,Virtualization Extensions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 8.--11. "MPM,Microcontroller Programmer's Model Support" "Not supported,?..." bitfld.long 0x00 4.--7. "SE,Security Extensions Architecture v1 Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. "PM,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..." rgroup.long c15:0x0210++0x00 line.long 0x00 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Not implemented,Supported,?..." newline bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." rgroup.long c15:0x0310++0x00 line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" tree.end tree "System Control and Configuration" group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32" bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled" newline bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" newline bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad c15:0x100F0++0x01 line.quad 0x00 "CPUACTLR,CPU Auxiliary Control Register" bitfld.quad 0x00 44. "ENDCCASCI,Enable Data Cache Clean As data cache Clean/Invalidate" "Disabled,Enabled" bitfld.quad 0x00 30. "CDIDIS,Disable Cryptographic Dual Issue" "No,Yes" newline bitfld.quad 0x00 29. "DIDIS,Disable Dual Issue" "No,Yes" bitfld.quad 0x00 27.--28. "RADIS,Write streaming no-allocate threshold" "16th,128th,512th,Disabled" newline bitfld.quad 0x00 25.--26. "L1RADIS,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled" bitfld.quad 0x00 24. "DTAH,Disable Transient allocation hint" "No,Yes" newline bitfld.quad 0x00 23. "STBPFRS,Disable ReadUnique request for prefetch streams initiated by STB accesses" "No,Yes" bitfld.quad 0x00 22. "STBPFDIS,Disable prefetch streams initiated from STB accesses" "No,Yes" newline bitfld.quad 0x00 19.--20. "NPFSTRM,Number of independent data prefetch streams" "1 stream,2 streams,3 streams,4 streams" bitfld.quad 0x00 18. "DSTDIS,Enable device split throttle" "Disabled,Enabled" newline bitfld.quad 0x00 17. "STRIDE,Enable stride detection" "2 linefills,3 linefills" bitfld.quad 0x00 13.--15. "L1PCTL,L1 Data prefetch control" "Disabled,1,2,3,4,5,6,8" newline bitfld.quad 0x00 11. "DYNSDIS,Disable dynamic stride adjustment for prefetch streams" "No,Yes" bitfld.quad 0x00 10. "DODMBS,Disable optimized Data Memory Barrier behavior" "No,Yes" newline bitfld.quad 0x00 6. "L1DEIEN,L1 D-cache Data RAM Error Injection Enable" "Disabled,Enabled" group.quad c15:0x110F0++0x01 line.quad 0x00 "CPUECTLR,CPU Extended Control Register" bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled" bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" newline bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" if (((per.q(c15:0x120F0))&0x7F000000)==0x000000000) group.quad c15:0x120F0++0x01 line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "Way 0,Way 1,?..." newline hexmask.quad.word 0x00 0.--11. 1. "RAD,RAM address" elif (((per.q(c15:0x120F0))&0x7F000000)==0x01000000) group.quad c15:0x120F0++0x01 line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "Bank 0,Bank 1,?..." newline hexmask.quad.word 0x00 0.--11. 1. "RAD,RAM address" elif (((per.q(c15:0x120F0))&0x7F000000)==0x08000000) group.quad c15:0x120F0++0x01 line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "Way 0,Way 1,Way 2,Way 3,?..." newline hexmask.quad.word 0x00 0.--11. 1. "RAD,RAM address" elif (((per.q(c15:0x120F0))&0x7F000000)==0x09000000) group.quad c15:0x120F0++0x01 line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "Bank 0,Bank 1,Bank 2,Bank 3,Bank 4,Bank 5,Bank 6,Bank 7" newline hexmask.quad.word 0x00 0.--11. 0x01 "RAD,RAM address" elif (((per.q(c15:0x120F0))&0x7F000000)==0x0A000000) group.quad c15:0x120F0++0x01 line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "Dirty RAM,?..." newline hexmask.quad.word 0x00 0.--11. 0x01 "RAD,RAM address" elif (((per.q(c15:0x120F0))&0x7F000000)==0x18000000) group.quad c15:0x120F0++0x01 line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "Way 0,Way 1,?..." newline hexmask.quad.word 0x00 0.--11. 0x01 "RAD,RAM address" else group.quad c15:0x120F0++0x01 line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" hexmask.quad.word 0x00 0.--11. 0x01 "RAD,RAM address" endif group.long c15:0x0101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled" bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled" bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled" group.long c15:0x0201++0x00 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. "ASEDIS,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 22.--23. "CP11,Coprocesor access control" "Denied,EL1 only,Reserved,Full" newline bitfld.long 0x0 20.--21. "CP10,Coprocesor access control" "Denied,EL1 only,Reserved,Full" group.long c15:0x0011++0x0 line.long 0x0 "SCR,Secure Configuration Register" bitfld.long 0x00 13. "TWE,Trap WFE Instructions" "Not trapped,Trapped" bitfld.long 0x00 12. "TWI,Trap WFI Instructions" "Not trapped,Trapped" newline bitfld.long 0x00 9. "SIF,Secure Instruction Fetch" "Permitted,Not permitted" bitfld.long 0x00 8. "HCE,Hypervisor Call enable" "No,Yes" newline bitfld.long 0x00 7. "SCD,Secure Monitor Call disable" "No,Yes" bitfld.long 0x00 5. "AW,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed" newline bitfld.long 0x00 4. "FW,Controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed" bitfld.long 0x00 3. "EA,External Abort exceptions handled in Abort mode or Monitor mode" "Not taken,Taken" newline bitfld.long 0x00 2. "FIQ,FIQ exceptions handled in FIQ mode or Monitor mode" "Not taken,Taken" bitfld.long 0x00 1. "IRQ,IRQ exceptions handled in IRQ mode or Monitor mode" "Not taken,Taken" newline bitfld.long 0x00 0. "NS,Secure mode" "Secure,Non-secure" group.long c15:0x0111++0x00 line.long 0x00 "SDER,Secure Debug Enable Register" bitfld.long 0x00 1. "SUNIDEN,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted" bitfld.long 0x00 0. "SUIDEN,Invasive Secure User Debug Enable bit" "Denied,Permitted" group.long c15:0x0131++0x00 line.long 0x00 "SDCR,Secure Debug Control Register" bitfld.long 0x00 21. "EPMAD,External debugger access to Performance Monitors registers disabled" "No,Yes" bitfld.long 0x00 20. "EDAD,External debugger access to breakpoint and watchpoint registers disabled" "No,Yes" newline bitfld.long 0x00 17. "SPME,Secure performance monitors enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. "SPD,AArch32 secure privileged debug" "Legacy,Reserved,Disabled,Enabled" group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 15. "NSASEDIS,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x00 11. "CP11,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" newline bitfld.long 0x00 10. "CP10,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" group.long c15:0x000C++0x00 line.long 0x00 "VBAR,Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 "VBA,Vector Base Address" group.long c15:0x010C++0x00 line.long 0x00 "MVBAR,Monitor Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 "VBA,Vector Base Address" rgroup.long c15:0x001C++0x00 line.long 0x00 "ISR,Interrupt Status Register" bitfld.long 0x00 8. "A,External abort pending flag" "Not pending,Pending" bitfld.long 0x00 7. "I,Interrupt pending flag" "Not pending,Pending" newline bitfld.long 0x00 6. "F,Fast interrupt pending flag" "Not pending,Pending" group.long c15:0x020C++0x00 line.long 0x00 "RMR,Reset Management Register" bitfld.long 0x00 1. "RR,Reset Request" "Not requested,Requested" bitfld.long 0x00 0. "AA64,Determines which execution state the processor boots into after a warm reset" "AArch32,AArch64" rgroup.long c15:0x0015++0x00 line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register" rgroup.long c15:0x0115++0x00 line.long 0x00 "AIFSR,Auxiliary Instruction Fault Status Register" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR" newline bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write" bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external,Async. external,Reserved,Reserved,Reserved,Sync. external/on TTW/L1,Sync. external/on TTW/L2,Sync. external/on TTW/L3,Sync. parity/on memory access,Async. parity/on memory access,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/L1,Sync. parity/on memory access/on TTW/L2,Sync. parity/on memory access/on TTW/L3,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Reserved,LDREX or STREX,?..." group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/L1,Sync. external/on TTW/L2,Sync. external/on TTW/L3,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/L1,Sync. parity/on memory access/on TTW/L2,Sync. parity/on memory access/on TTW/L3,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR" newline bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write" bitfld.long 0x00 4.--7. "DOMAIN,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" newline bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/section,Instruction cache maintenance,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/L1,Permission/section,Sync. external/L2,Permission/L2,TLB conflict,Reserved,Reserved,Reserved,Reserved,LDREX or STREX,Async. external,Reserved,Async. parity,Sync. parity,Reserved,Reserved,Sync. parity/L1,Reserved,Sync. parity/L2,?..." group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/L1,Permission/section,Sync. external/on TTW/L2,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/L1,Reserved,Sync. parity/on TTW/L2,?..." endif group.long c15:0x0006++0x00 line.long 0x00 "DFAR,Data Fault Address Register" group.long c15:0x0206++0x00 line.long 0x00 "IFAR,Instruction Fault Address Register" rgroup.long c15:0x103F++0x00 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long.word 0x00 18.--31. 0x04 "PERIPHBASE[31:18],Periphbase[31:18]" hexmask.long.byte 0x00 0.--7. 0x01 "PERIPHBASE[39:32],Periphbase[39:32]" rgroup.long c15:0x000D++0x00 line.long 0x00 "FCSEIDR,FCSE Process ID register" group.long c15:0x020D++0x00 line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register" rgroup.long c15:0x030D++0x00 line.long 0x00 "TPIDRURO,User Read-Only Thread ID Register" group.long c15:0x040D++0x00 line.long 0x00 "TPIDRPRW,EL1 only Thread ID Register" tree "System Instructions" wgroup.long c15:0x0017++0x00 line.long 0x00 "ICIALLUIS,ICIALLUIS" wgroup.long c15:0x0617++0x00 line.long 0x00 "BPIALLIS,BPIALLIS" wgroup.long c15:0x0057++0x00 line.long 0x00 "ICIALLU,ICIALLU" wgroup.long c15:0x0157++0x00 line.long 0x00 "ICIMVAU,ICIMVAU" wgroup.long c15:0x0457++0x00 line.long 0x00 "CP15ISB,CP15ISB" wgroup.long c15:0x0657++0x00 line.long 0x00 "BPIALL,BPIALL" wgroup.long c15:0x0757++0x00 line.long 0x00 "BPIMVA,BPIMVA" wgroup.long c15:0x0167++0x00 line.long 0x00 "DCIMVAC,DCIMVAC" wgroup.long c15:0x0267++0x00 line.long 0x00 "DCISW,DCISW" wgroup.long c15:0x0087++0x00 line.long 0x00 "ATS1CPR,ATS1CPR" wgroup.long c15:0x0187++0x00 line.long 0x00 "ATS1CPW,ATS1CPW" wgroup.long c15:0x0287++0x00 line.long 0x00 "ATS1CUR,ATS1CUR" wgroup.long c15:0x0387++0x00 line.long 0x00 "ATS1CUW,ATS1CUW" wgroup.long c15:0x0487++0x00 line.long 0x00 "ATS12NSOPR,ATS12NSOPR" wgroup.long c15:0x0587++0x00 line.long 0x00 "ATS12NSOPW,ATS12NSOPW" wgroup.long c15:0x0687++0x00 line.long 0x00 "ATS12NSOUR,ATS12NSOUR" wgroup.long c15:0x0787++0x00 line.long 0x00 "ATS12NSOUW,ATS12NSOUW" wgroup.long c15:0x01A7++0x00 line.long 0x00 "DCCMVAC,DCCMVAC" wgroup.long c15:0x02A7++0x00 line.long 0x00 "DCCSW,DCCSW" wgroup.long c15:0x04A7++0x00 line.long 0x00 "CP15DSB,CP15DSB" wgroup.long c15:0x05A7++0x00 line.long 0x00 "CP15DMB,CP15DMB" wgroup.long c15:0x01B7++0x00 line.long 0x00 "DCCMVAU,DCCMVAU" wgroup.long c15:0x01E7++0x00 line.long 0x00 "DCCIMVAC,DCCIMVAC" wgroup.long c15:0x02E7++0x00 line.long 0x00 "DCCISW,DCCISW" wgroup.long c15:0x4087++0x00 line.long 0x00 "ATS1HR,ATS1HR" wgroup.long c15:0x4187++0x00 line.long 0x00 "ATS1HW,ATS1HW" wgroup.long c15:0x0038++0x00 line.long 0x00 "TLBIALLIS,TLBIALLIS" wgroup.long c15:0x0138++0x00 line.long 0x00 "TLBIMVAIS,TLBIMVAIS" wgroup.long c15:0x0238++0x00 line.long 0x00 "TLBIASIDIS,TLBIASIDIS" wgroup.long c15:0x0338++0x00 line.long 0x00 "TLBIMVAAIS,TLBIMVAAIS" wgroup.long c15:0x0538++0x00 line.long 0x00 "TLBIMVALIS,TLBIMVALIS" wgroup.long c15:0x0738++0x00 line.long 0x00 "TLBIMVAALIS,TLBIMVAALIS" wgroup.long c15:0x0058++0x00 line.long 0x00 "ITLBIALL,ITLBIALL" wgroup.long c15:0x0158++0x00 line.long 0x00 "ITLBIMVA,ITLBIMVA" wgroup.long c15:0x0258++0x00 line.long 0x00 "ITLBIASID,ITLBIASID" wgroup.long c15:0x0068++0x00 line.long 0x00 "DTLBIALL,DTLBIALL" wgroup.long c15:0x0168++0x00 line.long 0x00 "DTLBIMVA,DTLBIMVA" wgroup.long c15:0x0268++0x00 line.long 0x00 "DTLBIASID,DTLBIASID" wgroup.long c15:0x0078++0x00 line.long 0x00 "TLBIALL,TLBIALL" wgroup.long c15:0x0178++0x00 line.long 0x00 "TLBIMVA,TLBIMVA" wgroup.long c15:0x0278++0x00 line.long 0x00 "TLBIASID,TLBIASID" wgroup.long c15:0x0378++0x00 line.long 0x00 "TLBIMVAA,TLBIMVAA" wgroup.long c15:0x0578++0x00 line.long 0x00 "TLBIMVAL,TLBIMVAL" wgroup.long c15:0x0778++0x00 line.long 0x00 "TLBIMVAAL,TLBIMVAAL" wgroup.long c15:0x4108++0x00 line.long 0x00 "TLBIIPAS2IS,TLBIIPAS2IS" wgroup.long c15:0x4508++0x00 line.long 0x00 "TLBIIPAS2LIS,TLBIIPAS2LIS" wgroup.long c15:0x4038++0x00 line.long 0x00 "TLBIALLHIS,TLBIALLHIS" wgroup.long c15:0x4138++0x00 line.long 0x00 "TLBIMVAHIS,TLBIMVAHIS" wgroup.long c15:0x4438++0x00 line.long 0x00 "TLBIALLNSNHIS,TLBIALLNSNHIS" wgroup.long c15:0x4538++0x00 line.long 0x00 "TLBIMVALHIS,TLBIMVALHIS" wgroup.long c15:0x4148++0x00 line.long 0x00 "TLBIIPAS2,TLBIIPAS2" wgroup.long c15:0x4548++0x00 line.long 0x00 "TLBIIPAS2L,TLBIIPAS2L" wgroup.long c15:0x4078++0x00 line.long 0x00 "TLBIALLH,TLBIALLH" wgroup.long c15:0x4178++0x00 line.long 0x00 "TLBIMVAH,TLBIMVAH" wgroup.long c15:0x4478++0x00 line.long 0x00 "TLBIALLNSNH,TLBIALLNSNH" wgroup.long c15:0x4578++0x00 line.long 0x00 "TLBIMVALH,TLBIMVALH" tree.end tree.end tree "Memory Management Unit" group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32" bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled" newline bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" newline bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.long c15:0x4001++0x0 line.long 0x00 "HSCTLR,System Control Register" bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 5. "CP15BEN,C15 barrier enable" "Disabled,Enabled" bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" newline bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" bitfld.long 0x0 0. "M,MMU enable" "Disabled,Enabled" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.quad c15:0x10020++0x01 line.quad 0x00 "TTBR0,Translation Table Base Register 0" hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" newline newline group.quad c15:0x11020++0x01 line.quad 0x00 "TTBR1,Translation Table Base Register 1" hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" newline newline group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 28.--29. "SH1,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" newline bitfld.long 0x00 26.--27. "ORGN1,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 24.--25. "IRGN1,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 23. "EPD1,Translation Walk Disable for TTBR1" "No,Yes" bitfld.long 0x00 22. "A1,Selects TTBR0 or TTBR1 to defines the ASID" "TTBR0,TTBR1" newline bitfld.long 0x00 16.--18. "T1SZ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" newline bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 7. "EPD0,Translation Walk Disable for TTBR0 region" "No,Yes" bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7" else group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Register 0" hexmask.long 0x00 7.--31. 0x80 "TTB0,Translation table base 0 address" bitfld.long 0x00 6. 0. "IRGN,Inner region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 5. "NOS,Not Outer Shareable bit" "Outer,Inner" bitfld.long 0x00 3.--4. "RGN,RGN" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 1. "S,Shareable bit" "Non-shareable,Shareable" group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Register 1" hexmask.long 0x00 7.--31. 0x80 "TTB1,Translation table base 1 address" bitfld.long 0x00 6. 0. "IRGN,Inner region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 5. "NOS,Not Outer Shareable bit" "Outer,Inner" bitfld.long 0x00 3.--4. "RGN,RGN" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 1. "S,Shareable bit" "Non-shareable,Shareable" group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 5. "PD1,Translation table walk disable for translations using TTBR1" "No,Yes" newline bitfld.long 0x00 4. "PD0,Translation table walk disable for translations using TTBR0" "No,Yes" bitfld.long 0x00 0.--2. "N,Width of the base address held in TTBR0" "0,1,2,3,4,5,6,7" newline newline newline newline endif group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register" hexmask.quad 0x00 1.--47. 0x02 "BADDR,Translation table base address" group.long c15:0x4202++0x00 line.long 0x00 "HTCR,Hypervisor Translation Control Register" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7" group.long c15:0x0003++0x00 line.long 0x00 "DACR,Domain Access Control Register" bitfld.long 0x0 30.--31. "D15,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. "D14,Domain Access 14" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 26.--27. "D13,Domain Access 13" "Denied,Client,Reserved,Manager" bitfld.long 0x0 24.--25. "D12,Domain Access 12" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 22.--23. "D11,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. "D10,Domain Access 10" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 18.--19. "D9,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. "D8,Domain Access 8" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 14.--15. "D7,Domain Access 7" "Denied,Client,Reserved,Manager" bitfld.long 0x0 12.--13. "D6,Domain Access 6" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 10.--11. "D5,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. "D4,Domain Access 4" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 6.--7. "D3,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. "D2,Domain Access 2" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 2.--3. "D1,Domain Access 1" "Denied,Client,Reserved,Manager" bitfld.long 0x0 0.--1. "D0,Domain Access 0" "Denied,Client,Reserved,Manager" if ((((per.l(c15:0x0202))&0x80000000)==0x00000000)&&(((per.l(c15:0x0047))&0x01)==0x00)) group.long c15:0x0047++0x00 line.long 0x00 "PAR,Physical Address Register" hexmask.long.tbyte 0x00 12.--31. 0x10 "PA,Physical Address" bitfld.long 0x00 11. "LPAE,Descriptor translation table format" "Short,Long" newline bitfld.long 0x00 10. "NOS,Not Outer Shareable attribute for the region" "No,Yes" bitfld.long 0x00 9. "NS,Non-secure" "No,Yes" newline bitfld.long 0x00 7. "SH,Shareable attribute for the region" "No,Yes" bitfld.long 0x00 4.--6. "INNER,Inner memory attributes for the region" "Non-cacheable,Device-nGnRnE,Reserved,Device-nGnRE,Reserved,Write-Back/Write-Allocate,Write-Through,Write-Back/No Write-Allocate" newline bitfld.long 0x00 2.--3. "OUTER,Outer memory attributes for the region" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/No Write-Allocate,Write-Back/No Write-Allocate" bitfld.long 0x00 1. "SS,Supersection" "Disabled,Enabled" newline bitfld.long 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted" elif ((((per.l(c15:0x0202))&0x80000000)==0x00000000)&&(((per.l(c15:0x0047))&0x01)==0x01)) group.long c15:0x0047++0x00 line.long 0x00 "PAR,Physical Address Register" newline bitfld.long 0x00 11. "LPAE,Descriptor translation table format" "Short,Long" newline bitfld.long 0x00 6. "FS[5],Fault status bit [5] - External abort type" "Internal,External" newline bitfld.long 0x00 1.--5. "FS[4:0],Fault status bit [4:0] - Abort source" "Reserved,Alignment,Debug,Access flag/L1,Instruction,Translation/L1,Access flag/L2,Translation/L2,Sync. external,Domain/L1,Reserved,Domain/L2,Sync. external/on TTW/L1,Permission/L1,Sync. external/on TTW/L2,Permission/L2,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupp. exclusive access,SError,Reserved,Reserved,Sync. parity/ECC on memory access,Reserved,Reserved,Sync. parity/ECC on TTW/L1,Reserved,Sync. parity/ECC on TTW/L2,?..." newline bitfld.long 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted" elif ((((per.l(c15:0x0202))&0x80000000)==0x80000000)&&(((per.l(c15:0x10070))&0x01)==0x00)) group.quad c15:0x10070++0x01 line.quad 0x00 "PAR,Physical Address Register" hexmask.quad.byte 0x00 56.--63. 1. "ATTR,Memory attributes for the returned PA" hexmask.quad.long 0x00 12.--39. 0x10 "PA,Physical Address" newline bitfld.quad 0x00 11. "LPAE,Descriptor translation table format" "Short,Long" bitfld.quad 0x00 9. "NS,Non-secure" "No,Yes" newline bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" newline newline bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted" else group.quad c15:0x10070++0x01 line.quad 0x00 "PAR,Physical Address Register" newline bitfld.quad 0x00 11. "LPAE,Descriptor translation table format" "Short,Long" bitfld.quad 0x00 9. "FSTAGE,Indicates the translation stage at which the translation aborted" "Stage 1,Stage 2" newline bitfld.quad 0x00 8. "S2WLK,Translation aborted because of a stage 2 fault during a stage 1 translation table walk" "No,Yes" newline bitfld.quad 0x00 1.--6. "FST,Fault Status Field" "Address size/TTBR,Address size/L1,Address size/L2,Address size/L3,Reserved,Translation/L1,Translation/L2,Translation/L3,Reserved,Access flag/L1,Access flag/L2,Access flag/L3,Reserved,Permission/L1,Permission/L2,Permission/L3,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/L1,Sync. external/on TTW/L2,Sync. external/on TTW/L3,Sync. parity/ECC on memory access,Sync. parity/ECC on memory access,Reserved,Reserved,Reserved,Sync. parity/ECC on TTW/L1,Sync. parity/ECC on TTW/L2,Sync. parity/ECC/on TTW/L3,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." newline bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted" endif tree.open "Memory Attribute Indirection Registers" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x002A++0x00 line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" group.long c15:0x012A++0x00 line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1" bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" group.long c15:0x010D++0x00 line.long 0x0 "CONTEXTIDR,Context ID Register" else group.long c15:0x002A++0x0 line.long 0x00 "PRRR,Primary Region Remap Register" bitfld.long 0x00 31. "NOS7,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 30. "NOS6,Outer Shareable property mapping for memory attributes" "Outer,Inner" newline bitfld.long 0x00 29. "NOS5,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 28. "NOS4,Outer Shareable property mapping for memory attributes" "Outer,Inner" newline bitfld.long 0x00 27. "NOS3,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 26. "NOS2,Outer Shareable property mapping for memory attributes" "Outer,Inner" newline bitfld.long 0x00 25. "NOS1,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 24. "NOS0,Outer Shareable property mapping for memory attributes" "Outer,Inner" newline bitfld.long 0x00 19. "NS1,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped" bitfld.long 0x00 18. "NS0,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped" newline bitfld.long 0x00 17. "DS1,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped" bitfld.long 0x00 16. "DS0,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped" newline bitfld.long 0x00 14.--15. "TR7,{TEX[0] C B} = b111 Remap" "Strongly ordered,Device,Normal,?..." bitfld.long 0x00 12.--13. "TR6,{TEX[0] C B} = b110 Remap" "Strongly ordered,Device,Normal,?..." newline bitfld.long 0x00 10.--11. "TR5,{TEX[0] C B} = b101 Remap" "Strongly ordered,Device,Normal,?..." bitfld.long 0x00 8.--9. "TR4,{TEX[0] C B} = b100 Remap" "Strongly ordered,Device,Normal,?..." newline bitfld.long 0x00 6.--7. "TR3,{TEX[0] C B} = b011 Remap" "Strongly ordered,Device,Normal,?..." bitfld.long 0x00 4.--5. "TR2,{TEX[0] C B} = b010 Remap" "Strongly ordered,Device,Normal,?..." newline bitfld.long 0x00 2.--3. "TR1,{TEX[0] C B} = b001 Remap" "Strongly ordered,Device,Normal,?..." bitfld.long 0x00 0.--1. "TR0,{TEX[0] C B} = b000 Remap" "Strongly ordered,Device,Normal,?..." group.long c15:0x012A++0x0 line.long 0x00 "NMRR,Normal Memory Remap Register" bitfld.long 0x00 30.--31. "OR7,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 28.--29. "OR6,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 26.--27. "OR5,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 24.--25. "OR4,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 22.--23. "OR3,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 20.--21. "OR2,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 18.--19. "OR1,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 16.--17. "OR0,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 14.--15. "IR7,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 12.--13. "IR6,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 10.--11. "IR5,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 8.--9. "IR4,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 6.--7. "IR3,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 4.--5. "IR2,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 2.--3. "IR1,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 0.--1. "IR0,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" group.long c15:0x010D++0x00 line.long 0x0 "CONTEXTIDR,Context ID Register" hexmask.long.tbyte 0x00 8.--31. 1. "PROCID,Process identifier" hexmask.long.byte 0x00 0.--7. 1. "ASID,Address space identifier" endif rgroup.long c15:0x003A++0x00 line.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0" rgroup.long c15:0x013A++0x00 line.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1" rgroup.long c15:0x403A++0x00 line.long 0x00 "HAMAIR0,Hypervisor Auxiliary Memory Attribute Indirection Register 0" rgroup.long c15:0x413A++0x00 line.long 0x00 "HAMAIR1,Hypervisor Auxiliary Memory Attribute Indirection Register 1" tree.end tree.end tree "Virtualization Extensions" group.long c15:0x4000++0x0 line.long 0x00 "VPIDR,Virtualization Processor ID Register" hexmask.long.byte 0x0 24.--31. 0x1 "IMPL,Implementer code" bitfld.long 0x0 20.--23. "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x0 16.--19. "ARCH,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8" hexmask.long.word 0x0 4.--15. 0x10 "PART,Primary Part Number" newline bitfld.long 0x0 0.--3. "REV,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long c15:0x4500++0x00 line.long 0x00 "VMPIDR,Virtualization Multiprocessor ID Register" bitfld.long 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor" bitfld.long 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largely independent,?..." newline hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field" hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field" newline hexmask.long.byte 0x00 0.--7. 1. "AFF0,Affinity level 0. Lowest level affinity field" group.long c15:0x420D++0x00 line.long 0x00 "HTPIDR,Hypervisor Software Thread ID Register" group.long c15:0x4001++0x0 line.long 0x00 "HSCTLR,System Control Register" bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 5. "CP15BEN,C15 barrier enable" "Disabled,Enabled" bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" newline bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" bitfld.long 0x0 0. "M,MMU enable" "Disabled,Enabled" group.long c15:0x4101++0x00 line.long 0x00 "HACTLR,Hypervisor Auxiliary Control Register" bitfld.long 0x00 6. "L2ACTLR,L2ACTLR write access control" "Disabled,Enabled" bitfld.long 0x00 5. "L2ECTLR,L2ECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 4. "L2CTLR,L2CTLR write access control" "Disabled,Enabled" bitfld.long 0x00 1. "CPUECTLR,CPUECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 0. "CPUACTLR,CPUACTLR write access control" "Disabled,Enabled" rgroup.long c15:0x4711++0x00 line.long 0x00 "HACR,Hypervisor Auxiliary Configuration Register" group.long c15:0x4011++0x00 line.long 0x00 "HCR,Hypervisor Configuration Register" bitfld.long 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled" bitfld.long 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes" newline bitfld.long 0x00 27. "TGE,Trap General Exceptions" "Disabled,Enabled" bitfld.long 0x00 26. "TVM,Trap Virtual Memory Controls" "Disabled,Enabled" newline bitfld.long 0x00 25. "TTLB,Trap TLB maintenance instructions" "Disabled,Enabled" bitfld.long 0x00 24. "TPU,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled" newline bitfld.long 0x00 23. "TPC,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled" bitfld.long 0x00 22. "TSW,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled" newline bitfld.long 0x00 21. "TAC,Trap Auxiliary Control Register Accesses" "Disabled,Enabled" bitfld.long 0x00 20. "TIDCP,Trap Lockdown" "Disabled,Enabled" newline bitfld.long 0x00 19. "TSC,Trap SMC" "Disabled,Enabled" bitfld.long 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled" newline bitfld.long 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled" bitfld.long 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled" newline bitfld.long 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled" bitfld.long 0x00 14. "TWE,Trap WFE" "Disabled,Enabled" newline bitfld.long 0x00 13. "TWI,Trap WFI" "Disabled,Enabled" bitfld.long 0x00 12. "DC,Default Cacheable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. "BSU,Barrier Shareability Upgrade" "No effect,Inner Shareable,Outer Shareable,Full system" bitfld.long 0x00 9. "FB,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled" newline bitfld.long 0x00 8. "VA,Virtual External Asynchronous Abort" "No aborted,Aborted" bitfld.long 0x00 7. "VI,Virtual IRQ interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 6. "VF,Virtual FIQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. "AMO,A-bit Mask Override" "No override,Override" newline bitfld.long 0x00 4. "IMO,I-bit Mask Override" "No override,Override" bitfld.long 0x00 3. "FMO,F-bit Mask Override" "No override,Override" newline bitfld.long 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled" bitfld.long 0x00 1. "SWIO,Set/Way Invalidation Override" "No override,Override" newline bitfld.long 0x00 0. "VM,Second Stage of Translation Enable" "Disabled,Enabled" group.long c15:0x4411++0x00 line.long 0x00 "HCR2,Hypervisor Configuration Register 2" bitfld.long 0x00 1. "ID,Stage 2 Instruction cache disable" "No,Yes" bitfld.long 0x00 0. "CD,Stage 2 Data cache disable" "No,Yes" group.long c15:0x4111++0x00 line.long 0x00 "HDCR,Hypervisor Debug Control Register" bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid" bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid" newline bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid" bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid" newline bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled" bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid" newline bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid" bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long c15:0x4211++0x00 line.long 0x00 "HCPTR,Hypervisor Architectural Feature Trap Register" bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped" bitfld.long 0x0 15. "TASE,Trap Advanced SIMD extensions" "Not trapped,Trapped" newline bitfld.long 0x0 11. "TCP11,Trap coprocessor 11" "Not trapped,Trapped" bitfld.long 0x0 10. "TCP10,Trap coprocessor 10" "Not trapped,Trapped" group.long c15:0x4311++0x00 line.long 0x00 "HSTR,Hypervisor System Trap Register" bitfld.long 0x00 16. "TTEE,Trap ThumbEE" "Not supported,?..." bitfld.long 0x00 15. "T15,Trap coprocessor primary register CRn = 15" "No effect,Trapped" newline bitfld.long 0x00 13. "T13,Trap coprocessor primary register CRn = 13" "No effect,Trapped" bitfld.long 0x00 12. "T12,Trap coprocessor primary register CRn = 12" "No effect,Trapped" newline bitfld.long 0x00 11. "T11,Trap coprocessor primary register CRn = 11" "No effect,Trapped" bitfld.long 0x00 10. "T10,Trap coprocessor primary register CRn = 10" "No effect,Trapped" newline bitfld.long 0x00 9. "T9,Trap coprocessor primary register CRn = 9" "No effect,Trapped" bitfld.long 0x00 8. "T8,Trap coprocessor primary register CRn = 8" "No effect,Trapped" newline bitfld.long 0x00 7. "T7,Trap coprocessor primary register CRn = 7" "No effect,Trapped" bitfld.long 0x00 6. "T6,Trap coprocessor primary register CRn = 6" "No effect,Trapped" newline bitfld.long 0x00 5. "T5,Trap coprocessor primary register CRn = 5" "No effect,Trapped" bitfld.long 0x00 3. "T3,Trap coprocessor primary register CRn = 3" "No effect,Trapped" newline bitfld.long 0x00 2. "T2,Trap coprocessor primary register CRn = 2" "No effect,Trapped" bitfld.long 0x00 1. "T1,Trap coprocessor primary register CRn = 1" "No effect,Trapped" newline bitfld.long 0x00 0. "T0,Trap coprocessor primary register CRn = 0" "No effect,Trapped" group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" group.long c15:0x4202++0x00 line.long 0x00 "HTCR,Hypervisor Translation Control Register" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7" group.quad c15:0x16020++0x01 line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register" hexmask.quad.byte 0x00 48.--55. 1. "VMID,The VMID for the translation table" hexmask.quad 0x00 1.--47. 1. "BADDR,Translation table base address" group.long c15:0x4212++0x00 line.long 0x00 "VTCR,Virtualization Translation Control Register" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "Second,First,?..." newline bitfld.long 0x00 4. "S,Sign-extension of the T0SZ field" "Low,High" bitfld.long 0x00 0.--3. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long c15:0x4006++0x00 line.long 0x00 "HDFAR,Hypervisor Data Fault Address Register" rgroup.long c15:0x4015++0x00 line.long 0x00 "HADFSR,Hypervisor Auxiliary Data Fault Status Syndrome Register" rgroup.long c15:0x4115++0x00 line.long 0x00 "HAIFSR,Hypervisor Auxiliary Instruction Fault Status Register" if ((per.l(c15:0x04025)&0xFC000000)==(0x00000000||0x38000000||0x88000000)) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" elif (((per.l(c15:0x4025))&0xFC000000)==0x4000000) if (((per.l(c15:0x4025))&0x1000000)==0x1000000) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Invalid,Valid" bitfld.long 0x00 20.--23. "COND,The condition code for the trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Invalid,Valid" bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" endif elif (((per.l(c15:0x4025))&0xFC000000)==(0xC000000||0x20000000||0x14000000)) if (((per.l(c15:0x4025))&0x1000000)==0x1000000) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Invalid,Valid" bitfld.long 0x00 20.--23. "COND,The condition code for the trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 17.--19. "OPC2,The Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "OPC1,The Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRN,The CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--8. "RT,The Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 1.--4. "CRM,The CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Indicates the direction of the trapped instruction" "MCR,MRC/VMRS" else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Invalid,Valid" bitfld.long 0x00 17.--19. "OPC2,The Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "OPC1,The Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRN,The CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--8. "RT,The Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. "CRM,The CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Indicates the direction of the trapped instruction" "MCR,MRC/VMRS" endif elif (((per.l(c15:0x4025))&0xFC000000)==(0x10000000||0x30000000)) if (((per.l(c15:0x4025))&0x1000000)==0x1000000) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Invalid,Valid" bitfld.long 0x00 20.--23. "COND,The condition code for the trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 16.--19. "OPC1,The Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--13. "RT2,The Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--8. "RT,The Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. "CRM,The CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Indicates the direction of the trapped instruction" "MCRR,MRRC" else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Invalid,Valid" bitfld.long 0x00 16.--19. "OPC1,The Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--13. "RT2,The Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--8. "RT,The Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 1.--4. "CRM,The CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Indicates the direction of the trapped instruction" "MCRR,MRRC" endif elif (((per.l(c15:0x4025))&0xFC000000)==0x18000000) if (((per.l(c15:0x4025))&0x1000000)==0x1000000) if (((per.l(c15:0x4025))&0x08)==0x08) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Invalid,Valid" bitfld.long 0x00 20.--23. "COND,The condition code for the trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" newline bitfld.long 0x00 1.--3. "AM,Addressing mode" "Imm unindexed,Imm post-indexed,Imm offset,Imm pre-indexed,Literal unindexed (A32),Reserved,Literal offset (A32),?..." bitfld.long 0x00 0. "DIRECTION,Indicates the direction of the trapped instruction" "STC,LDC" else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Invalid,Valid" bitfld.long 0x00 20.--23. "COND,The condition code for the trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--8. "RN,The Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Imm unindexed,Imm post-indexed,Imm offset,Imm pre-indexed,Literal unindexed (A32),Reserved,Literal offset (A32),?..." newline bitfld.long 0x00 0. "DIRECTION,Indicates the direction of the trapped instruction" "STC,LDC" endif else if (((per.l(c15:0x4025))&0x08)==0x08) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Invalid,Valid" hexmask.long.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Imm unindexed,Imm post-indexed,Imm offset,Imm pre-indexed,Literal unindexed (A32),Reserved,Literal offset (A32),?..." newline bitfld.long 0x00 0. "DIRECTION,Indicates the direction of the trapped instruction" "STC,LDC" else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Invalid,Valid" hexmask.long.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" newline bitfld.long 0x00 5.--8. "RN,The Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" newline bitfld.long 0x00 1.--3. "AM,Addressing mode" "Imm unindexed,Imm post-indexed,Imm offset,Imm pre-indexed,Literal unindexed (A32),Reserved,Literal offset (A32),?..." bitfld.long 0x00 0. "DIRECTION,Indicates the direction of the trapped instruction" "STC,LDC" endif endif elif (((per.l(c15:0x4025))&0xFC000000)==0x1C000000) if (((per.l(c15:0x4025))&0x1000000)==0x1000000) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Invalid,Valid" bitfld.long 0x00 20.--23. "COND,The condition code for the trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5. "TA,Indicates trapped use of Advanced SIMD functionality" "Not occurred,Occurred" bitfld.long 0x00 0.--3. "COPROC,The number of the coprocessor accessed by the trapped operation" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CP10,?..." else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Invalid,Valid" bitfld.long 0x00 5. "TA,Indicates trapped use of Advanced SIMD functionality" "Not occurred,Occurred" newline bitfld.long 0x00 0.--3. "COPROC,The number of the coprocessor accessed by the trapped operation" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CP10,?..." endif elif (((per.l(c15:0x4025))&0xFC000000)==(0x44000000||0x48000000)) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. 1. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif ((((per.l(c15:0x4025))&0xFC000000)==(0x80000000||0x84000000))&&(((per.l(c15:0x4025))&0x3F)==0x10)) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 10. "FNV,FAR not Valid" "HIFAR valid,HIFAR invalid" newline bitfld.long 0x00 9. "EA,External abort type" "Internal,External" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an access for a stage 1 translation table walk" "Not occurred,Occurred" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address/TTBR,Address/Lvl1,Address/Lvl2,Address/Lvl3,Reserved,Translation/Lvl1,Translation/Lvl2,Translation/Lvl3,Reserved,Access flag/Lvl1,Access flag/Lvl2,Access flag/Lvl3,Reserved,Permission/Lvl1,Permission/Lvl2,Permission/Lvl3,SEA/Not ECC/Not on TTBW,Reserved,Reserved,Reserved,Reserved,SEA/Not ECC/On TTBW lvl1,SEA/Not ECC/On TTBW lvl2,SEA/Not ECC/On TTBW lvl3,SPE on mem access/Not on TTBW,Reserved,Reserved,Reserved,Reserved,SPE on mem access/On TTBW lvl1,SPE on mem access/On TTBW lvl2,SPE on mem access/On TTBW lvl3,Reserved,Reserved,Debug (only from Hypervisor mode),Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,?..." elif ((((per.l(c15:0x4025))&0xFC000000)==(0x80000000||0x84000000))&&(((per.l(c15:0x4025))&0x3F)!=0x10)) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 9. "EA,External abort type" "Internal,External" newline bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an access for a stage 1 translation table walk" "Not occurred,Occurred" bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address/TTBR,Address/Lvl1,Address/Lvl2,Address/Lvl3,Reserved,Translation/Lvl1,Translation/Lvl2,Translation/Lvl3,Reserved,Access flag/Lvl1,Access flag/Lvl2,Access flag/Lvl3,Reserved,Permission/Lvl1,Permission/Lvl2,Permission/Lvl3,SEA/Not ECC/Not on TTBW,Reserved,Reserved,Reserved,Reserved,SEA/Not ECC/On TTBW lvl1,SEA/Not ECC/On TTBW lvl2,SEA/Not ECC/On TTBW lvl3,SPE on mem access/Not on TTBW,Reserved,Reserved,Reserved,Reserved,SPE on mem access/On TTBW lvl1,SPE on mem access/On TTBW lvl2,SPE on mem access/On TTBW lvl3,Reserved,Reserved,Debug (only from Hypervisor mode),Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,?..." elif (((per.l(c15:0x4025))&0xFD000000)==(0x91000000||0x95000000)) if (((per.l(c15:0x4025))&0x3F)==(0x11)) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Invalid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--19. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14. "AR,Acquire/Release semantics present" "Absent,Present" bitfld.long 0x00 10.--11. "AET,Asynchronous Error Type" "UC,UEU,UEO/CE,UER" newline bitfld.long 0x00 9. "EA,External abort type" "Internal,External" bitfld.long 0x00 8. "CM,Cache maintenance" "Not generated,Generated" newline bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an access for a stage 1 translation table walk" "Not occurred,Occurred" bitfld.long 0x00 6. "WNR,Write not Read as abort cause" "Read,Write" newline bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address/TTBR,Address/Lvl1,Address/Lvl2,Address/Lvl3,Reserved,Translation/Lvl1,Translation/Lvl2,Translation/Lvl3,Reserved,Access flag/Lvl1,Access flag/Lvl2,Access flag/Lvl3,Reserved,Permission/Lvl1,Permission/Lvl2,Permission/Lvl3,SEA/Not ECC/Not on TTBW,SError int,Reserved,Reserved,Reserved,SEA/Not ECC/On TTBW lvl1,SEA/Not ECC/On TTBW lvl2,SEA/Not ECC/On TTBW lvl3,SPE on mem access/Not on TTBW,SError int from parity/ECC err on mem access,Reserved,Reserved,Reserved,SPE on mem access/On TTBW lvl1,SPE on mem access/On TTBW lvl2,SPE on mem access/On TTBW lvl3,Reserved,Alignment fault,Debug (only from Hypervisor mode),Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,Reserved,Reserved,Reserved,Lockdown fault,Unsupp Exclusive acc fault,?..." else if (((per.l(c15:0x4025))&0x3F)==(0x10)) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Invalid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--19. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14. "AR,Acquire/Release semantics present" "Absent,Present" bitfld.long 0x00 10. "FNV,FAR not Valid" "Valid,Invalid" newline bitfld.long 0x00 9. "EA,External abort type" "Internal,External" bitfld.long 0x00 8. "CM,Cache maintenance" "Not generated,Generated" newline bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an access for a stage 1 translation table walk" "Not occurred,Occurred" bitfld.long 0x00 6. "WNR,Write not Read as abort cause" "Read,Write" newline bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address/TTBR,Address/Lvl1,Address/Lvl2,Address/Lvl3,Reserved,Translation/Lvl1,Translation/Lvl2,Translation/Lvl3,Reserved,Access flag/Lvl1,Access flag/Lvl2,Access flag/Lvl3,Reserved,Permission/Lvl1,Permission/Lvl2,Permission/Lvl3,SEA/Not ECC/Not on TTBW,SError int,Reserved,Reserved,Reserved,SEA/Not ECC/On TTBW lvl1,SEA/Not ECC/On TTBW lvl2,SEA/Not ECC/On TTBW lvl3,SPE on mem access/Not on TTBW,SError int from parity/ECC err on mem access,Reserved,Reserved,Reserved,SPE on mem access/On TTBW lvl1,SPE on mem access/On TTBW lvl2,SPE on mem access/On TTBW lvl3,Reserved,Alignment fault,Debug (only from Hypervisor mode),Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,Reserved,Reserved,Reserved,Lockdown fault,Unsupp Exclusive acc fault,?..." else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Invalid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--19. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14. "AR,Acquire/Release semantics present" "Absent,Present" bitfld.long 0x00 9. "EA,External abort type" "Internal,External" newline bitfld.long 0x00 8. "CM,Cache maintenance" "Not generated,Generated" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an access for a stage 1 translation table walk" "Not occurred,Occurred" newline bitfld.long 0x00 6. "WNR,Write not Read as abort cause" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address/TTBR,Address/Lvl1,Address/Lvl2,Address/Lvl3,Reserved,Translation/Lvl1,Translation/Lvl2,Translation/Lvl3,Reserved,Access flag/Lvl1,Access flag/Lvl2,Access flag/Lvl3,Reserved,Permission/Lvl1,Permission/Lvl2,Permission/Lvl3,SEA/Not ECC/Not on TTBW,SError int,Reserved,Reserved,Reserved,SEA/Not ECC/On TTBW lvl1,SEA/Not ECC/On TTBW lvl2,SEA/Not ECC/On TTBW lvl3,SPE on mem access/Not on TTBW,SError int from parity/ECC err on mem access,Reserved,Reserved,Reserved,SPE on mem access/On TTBW lvl1,SPE on mem access/On TTBW lvl2,SPE on mem access/On TTBW lvl3,Reserved,Alignment fault,Debug (only from Hypervisor mode),Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,Reserved,Reserved,Reserved,Lockdown fault,Unsupp Exclusive acc fault,?..." endif endif elif (((per.l(c15:0x4025))&0xFD000000)==(0x90000000||0x94000000)) if (((per.l(c15:0x4025))&0x3F)==(0x11)) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Invalid,Valid" bitfld.long 0x00 10.--11. "AET,Asynchronous Error Type" "UC,UEU,UEO/CE,UER" newline bitfld.long 0x00 9. "EA,External abort type" "Internal,External" bitfld.long 0x00 8. "CM,Cache maintenance" "Not generated,Generated" newline bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an access for a stage 1 translation table walk" "Not occurred,Occurred" bitfld.long 0x00 6. "WNR,Write not Read as abort cause" "Read,Write" newline bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address/TTBR,Address/Lvl1,Address/Lvl2,Address/Lvl3,Reserved,Translation/Lvl1,Translation/Lvl2,Translation/Lvl3,Reserved,Access flag/Lvl1,Access flag/Lvl2,Access flag/Lvl3,Reserved,Permission/Lvl1,Permission/Lvl2,Permission/Lvl3,SEA/Not ECC/Not on TTBW,SError int,Reserved,Reserved,Reserved,SEA/Not ECC/On TTBW lvl1,SEA/Not ECC/On TTBW lvl2,SEA/Not ECC/On TTBW lvl3,SPE on mem access/Not on TTBW,SError int from parity/ECC err on mem access,Reserved,Reserved,Reserved,SPE on mem access/On TTBW lvl1,SPE on mem access/On TTBW lvl2,SPE on mem access/On TTBW lvl3,Reserved,Alignment fault,Debug (only from Hypervisor mode),Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,Reserved,Reserved,Reserved,Lockdown fault,Unsupp Exclusive acc fault,?..." else if (((per.l(c15:0x4025))&0x3F)==(0x10)) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Invalid,Valid" bitfld.long 0x00 10. "FNV,FAR not Valid" "Valid,Invalid" newline bitfld.long 0x00 9. "EA,External abort type" "Internal,External" bitfld.long 0x00 8. "CM,Cache maintenance" "Not generated,Generated" newline bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an access for a stage 1 translation table walk" "Not occurred,Occurred" bitfld.long 0x00 6. "WNR,Write not Read as abort cause" "Read,Write" newline bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address/TTBR,Address/Lvl1,Address/Lvl2,Address/Lvl3,Reserved,Translation/Lvl1,Translation/Lvl2,Translation/Lvl3,Reserved,Access flag/Lvl1,Access flag/Lvl2,Access flag/Lvl3,Reserved,Permission/Lvl1,Permission/Lvl2,Permission/Lvl3,SEA/Not ECC/Not on TTBW,SError int,Reserved,Reserved,Reserved,SEA/Not ECC/On TTBW lvl1,SEA/Not ECC/On TTBW lvl2,SEA/Not ECC/On TTBW lvl3,SPE on mem access/Not on TTBW,SError int from parity/ECC err on mem access,Reserved,Reserved,Reserved,SPE on mem access/On TTBW lvl1,SPE on mem access/On TTBW lvl2,SPE on mem access/On TTBW lvl3,Reserved,Alignment fault,Debug (only from Hypervisor mode),Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,Reserved,Reserved,Reserved,Lockdown fault,Unsupp Exclusive acc fault,?..." else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Invalid,Valid" bitfld.long 0x00 9. "EA,External abort type" "Internal,External" newline bitfld.long 0x00 8. "CM,Cache maintenance" "Not generated,Generated" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an access for a stage 1 translation table walk" "Not occurred,Occurred" newline bitfld.long 0x00 6. "WNR,Write not Read as abort cause" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address/TTBR,Address/Lvl1,Address/Lvl2,Address/Lvl3,Reserved,Translation/Lvl1,Translation/Lvl2,Translation/Lvl3,Reserved,Access flag/Lvl1,Access flag/Lvl2,Access flag/Lvl3,Reserved,Permission/Lvl1,Permission/Lvl2,Permission/Lvl3,SEA/Not ECC/Not on TTBW,SError int,Reserved,Reserved,Reserved,SEA/Not ECC/On TTBW lvl1,SEA/Not ECC/On TTBW lvl2,SEA/Not ECC/On TTBW lvl3,SPE on mem access/Not on TTBW,SError int from parity/ECC err on mem access,Reserved,Reserved,Reserved,SPE on mem access/On TTBW lvl1,SPE on mem access/On TTBW lvl2,SPE on mem access/On TTBW lvl3,Reserved,Alignment fault,Debug (only from Hypervisor mode),Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,Reserved,Reserved,Reserved,Lockdown fault,Unsupp Exclusive acc fault,?..." endif endif elif (((per.l(c15:0x4025))&0xFD000000)==(0x4C000000||0x4D000000)) if (((per.l(c15:0x4025))&0xF0000)==(0x80000)) if (((per.l(c15:0x4025))&0x1000000)==(0x1000000)) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Invalid,Valid" bitfld.long 0x00 20.--23. "COND,The condition code for the trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 19. "CCKNOWNPASS,Trapped instruction" "Unconditional,Conditional" else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Invalid,Valid" bitfld.long 0x00 19. "CCKNOWNPASS,Trapped instruction" "Unconditional,Conditional" endif else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline bitfld.long 0x00 19. "CCKNOWNPASS,Trapped instruction" "Unconditional,Conditional" endif else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped SIDM/Floating point register,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline hexmask.long 0x00 0.--24. 1. "ISS,Instruction specific syndrome" endif group.long c15:0x4206++0x00 line.long 0x00 "HIFAR,Hypervisor Instruction Fault Address Register" group.long c15:0x4406++0x00 line.long 0x00 "HPFAR,Hypervisor IPA Fault Address Register" hexmask.long 0x00 4.--31. 1. "FIPA[39:12],Bits [39:12] of the faulting intermediate physical address" tree.open "Hypervisor Memory Attribute Indirection Registers" group.long c15:0x402A++0x00 line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" group.long c15:0x412A++0x00 line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1" bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" tree.end newline group.long c15:0x400C++0x00 line.long 0x00 "HVBAR,Hypervisor Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 "HVBADDR,Hypervisor Vector Base Address" tree.end tree "Cache Control and Configuration" rgroup.long c15:0x0100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..." bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 30.--31. "ICB,Inner cache boundary" "Not disclosed,?..." bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..." bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,No L2 cache,L1/L2 cleaned,?..." newline bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,L2 cache not implemented,L2 cache implemented,?..." bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..." bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "No cache,Reserved,Reserved,Reserved,Unified,?..." newline bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Separate I/D,?..." rgroup.long c15:0x1000++0x0 line.long 0x0 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,?..." bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported" bitfld.long 0x00 29. "RA,Read-Allocate" "Not Supported,Supported" newline bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported" hexmask.long.word 0x00 13.--27. 1. "SETS,Number of Sets" hexmask.long.word 0x00 3.--12. 1. "ASSOC,Associativity" newline bitfld.long 0x00 0.--2. "LSIZE,Line Size" "Reserved,Reserved,16 words,?..." group.long c15:0x2000++0x0 line.long 0x0 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,Level 2,?..." bitfld.long 0x00 0. "IND,Instruction/Not Data" "Data/Unified,Instruction" tree "Level 1 memory system" rgroup.long c15:0x300F++0x00 line.long 0x00 "DL1DATA0,Data L1 Data 0 Register" rgroup.long c15:0x310F++0x00 line.long 0x00 "DL1DATA1,Data L1 Data 1 Register" rgroup.long c15:0x320F++0x00 line.long 0x00 "DL1DATA2,Data L1 Data 2 Register" rgroup.long c15:0x330F++0x00 line.long 0x00 "DL1DATA3,Data L1 Data 3 Register" wgroup.long c15:0x302F++0x00 line.long 0x00 "DCTROR,Data Cache Tag Read Operation Register" wgroup.long c15:0x312F++0x00 line.long 0x00 "ICTROR,Instruction Cache Tag Read Operation Register" wgroup.long c15:0x304F++0x00 line.long 0x00 "DCDROR,Data Cache Data Read Operation Register" wgroup.long c15:0x314F++0x00 line.long 0x00 "ICDROR,Instruction Cache Data Read Operation Register" wgroup.long c15:0x324F++0x00 line.long 0x00 "TLBDROR,TLB Data Read Operation Register" tree.end tree "Level 2 memory system" rgroup.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" bitfld.long 0x00 24.--25. "NCPU,Number of CPU" "1,2,3,4" bitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Not implemented,ECC implemented" bitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Not implemented,ECC implemented" newline bitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycles" bitfld.long 0x00 0. "DRAMOL,L2 data RAM output latency" "2 cycles,3 cycles" group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error" bitfld.long 0x00 29. "AACASYNCERR,AXI/ACE/CHI asynchronous error" "No error,Error" bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.long c15:0x100F++0x00 line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register" bitfld.long 0x00 30.--31. "L2VC,L2 victim Control" "0,1,2,3" newline bitfld.long 0x00 29. "L2DEIEN,L2 cache data RAM error injection enable" "Disabled,Enabled" bitfld.long 0x00 24. "L2TEIEN,L2 cache tag RAM error injection enable" "Disabled,Enabled" newline bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled" bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes" if (((per.q(c15:0x130F0))&0x7F000000)==0x10000000) group.quad c15:0x130F0++0x01 line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--21. "C/W,Indicates the RAM where the first memory error occurred" "Way 0,Way 1,Way 2,Way 3,Way 4,Way 5,Way 6,Way 7,?..." newline hexmask.quad.tbyte 0x00 3.--16. 0x08 "RAD,RAM address" elif (((per.q(c15:0x130F0))&0x7F000000)==0x11000000) group.quad c15:0x130F0++0x01 line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--21. "C/W,Indicates the RAM where the first memory error occurred" "Bank 0,Bank 1,Bank 2,Bank 3,Bank 4,Bank 5,Bank 6,Bank 7,?..." newline hexmask.quad.tbyte 0x00 3.--16. 0x08 "RAD,RAM address" elif (((per.q(c15:0x130F0))&0x7F000000)==0x12000000) group.quad c15:0x130F0++0x01 line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--21. "C/W,Indicates the RAM where the first memory error occurred" "CPU0/Way 0,CPU0/Way 1,CPU0/Way 2,CPU0/Way 3,CPU1/Way 0,CPU1/Way 1,CPU1/Way 2,CPU1/Way 3,CPU2/Way 0,CPU2/Way 1,CPU2/Way 2,CPU2/Way 3,CPU3/Way 0,CPU3/Way 1,CPU3/Way 2,CPU3/Way 3" newline hexmask.quad.tbyte 0x00 3.--16. 0x08 "RAD,RAM address" else group.quad c15:0x130F0++0x01 line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" newline hexmask.quad.tbyte 0x00 3.--16. 0x08 "RAD,RAM address" endif tree.end tree.end tree "System Performance Monitor" group.long c15:0x00c9++0x00 line.long 0x00 "PMCR,Performance Monitor Control Register" hexmask.long.byte 0x00 24.--31. 1. "IMP,Implementer code" hexmask.long.byte 0x00 16.--23. 1. "IDCODE,Identification code" bitfld.long 0x00 11.--15. "N,Number of counters implemented" "0,1,2,3,4,5,6,?..." bitfld.long 0x00 6. "LC,Long cycle count enable" "Disabled,Enabled" newline bitfld.long 0x00 5. "DP,Disable CCNT when prohibited" "No,Yes" bitfld.long 0x00 4. "X,Export Enable" "Disabled,Enabled" bitfld.long 0x00 3. "D,Clock Divider" "Every cycle,64th cycle" bitfld.long 0x00 2. "C,Clock Counter Reset" "No reset,?..." newline bitfld.long 0x00 1. "P,Performance Counter Reset" "No reset,?..." bitfld.long 0x00 0. "E,All Counters Enable" "Disabled,Enabled" group.long c15:0x01c9++0x00 line.long 0x00 "PMCNTENSET,Count Enable Set Register " bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" bitfld.long 0x00 5. "P5,Event Counter 5 enable bit" "Disabled,Enabled" bitfld.long 0x00 4. "P4,Event Counter 4 enable bit" "Disabled,Enabled" bitfld.long 0x00 3. "P3,Event Counter 3 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 2. "P2,Event Counter 2 enable bit" "Disabled,Enabled" bitfld.long 0x00 1. "P1,Event Counter 1 enable bit" "Disabled,Enabled" bitfld.long 0x00 0. "P0,Event Counter 0 enable bit" "Disabled,Enabled" group.long c15:0x02c9++0x00 line.long 0x00 "PMCNTENCLR,Count Enable Clear Register" eventfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" eventfld.long 0x00 5. "P5,Event Counter 5 clear bit" "Disabled,Enabled" eventfld.long 0x00 4. "P4,Event Counter 4 clear bit" "Disabled,Enabled" eventfld.long 0x00 3. "P3,Event Counter 3 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 2. "P2,Event Counter 2 clear bit" "Disabled,Enabled" eventfld.long 0x00 1. "P1,Event Counter 1 clear bit" "Disabled,Enabled" eventfld.long 0x00 0. "P0,Event Counter 0 clear bit" "Disabled,Enabled" group.long c15:0x03c9++0x00 line.long 0x00 "PMOVSR,Performance Monitor Overflow Status Register" eventfld.long 0x00 31. "C,PMCCNTR overflow" "No overflow,Overflow" eventfld.long 0x00 5. "P5,PMN5 overflow" "No overflow,Overflow" eventfld.long 0x00 4. "P4,PMN4 overflow" "No overflow,Overflow" eventfld.long 0x00 3. "P3,PMN3 overflow" "No overflow,Overflow" newline eventfld.long 0x00 2. "P2,PMN2 overflow" "No overflow,Overflow" eventfld.long 0x00 1. "P1,PMN1 overflow" "No overflow,Overflow" eventfld.long 0x00 0. "P0,PMN0 overflow" "No overflow,Overflow" wgroup.long c15:0x04c9++0x00 line.long 0x00 "PMSWINC,Performance Monitor Software Increment" bitfld.long 0x00 5. "P5,Increment PMN5" "No action,Increment" bitfld.long 0x00 4. "P4,Increment PMN4" "No action,Increment" bitfld.long 0x00 3. "P3,Increment PMN3" "No action,Increment" bitfld.long 0x00 2. "P2,Increment PMN2" "No action,Increment" newline bitfld.long 0x00 1. "P1,Increment PMN1" "No action,Increment" bitfld.long 0x00 0. "P0,Increment PMN0" "No action,Increment" group.long c15:0x05c9++0x00 line.long 0x00 "PMSELR,Performance Monitor Select Register" bitfld.long 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.open "Common Event Identification Registers" rgroup.long c15:0x06C9++0x00 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 31. "EVENT31,L1 Data cache allocate" "Not implemented,?..." bitfld.long 0x00 30. "EVENT30,Chain" "Reserved,Implemented" newline bitfld.long 0x00 29. "EVENT29,Bus cycle" "Reserved,Implemented" bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,?..." bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Reserved,Implemented" newline bitfld.long 0x00 26. "EVENT26,Local memory error" "Reserved,Implemented" bitfld.long 0x00 25. "EVENT25,Bus access" "Reserved,Implemented" bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented" newline bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented" bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Reserved,Implemented" newline bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Reserved,Implemented" bitfld.long 0x00 19. "EVENT19,Data memory access" "Reserved,Implemented" bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Reserved,Implemented" newline bitfld.long 0x00 17. "EVENT17,Cycle" "Reserved,Implemented" bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Reserved,Implemented" bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass unaligned load or store" "Reserved,Implemented" newline bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,?..." bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed immediate branch" "Reserved,Implemented" bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Reserved,Implemented" newline bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Reserved,Implemented" bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Reserved,Implemented" bitfld.long 0x00 9. "EVENT9,Exception taken" "Reserved,Implemented" newline bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Reserved,Implemented" bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass store" "Reserved,Implemented" bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass load" "Reserved,Implemented" newline bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Reserved,Implemented" bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Reserved,Implemented" bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Reserved,Implemented" newline bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Reserved,Implemented" bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Reserved,Implemented" bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Reserved,Implemented" rgroup.long c15:0x07C9++0x0 line.long 0x00 "PMCEID1,Common Event Identification Register 1" bitfld.long 0x00 16. "EVENT48,Attributable Level 2 instruction TLB access" "Not implemented,?..." bitfld.long 0x00 15. "EVENT47,Attributable Level 2 data or unified TLB access" "Not implemented,?..." bitfld.long 0x00 14. "EVENT46,Attributable Level 2 instruction TLB refill" "Not implemented,?..." newline bitfld.long 0x00 13. "EVENT45,Attributable Level 2 data or unified TLB refill" "Not implemented,?..." bitfld.long 0x00 12. "EVENT44,Attributable Level 3 data or unified cache write-back" "Not implemented,?..." bitfld.long 0x00 11. "EVENT43,Attributable Level 3 data or unified cache access" "Not implemented,?..." newline bitfld.long 0x00 10. "EVENT42,Attributable Level 3 data or unified cache refill" "Not implemented,?..." bitfld.long 0x00 9. "EVENT41,Attributable Level 3 data or unified cache allocation without refill" "Not implemented,?..." bitfld.long 0x00 8. "EVENT40,Attributable Level 2 instruction cache refill" "Not implemented,?..." newline bitfld.long 0x00 7. "EVENT39,Attributable Level 2 instruction cache access" "Not implemented,?..." bitfld.long 0x00 6. "EVENT38,Level 1 instruction TLB access" "Not implemented,?..." bitfld.long 0x00 5. "EVENT37,Level 1 data or unified TLB access" "Not implemented,?..." newline bitfld.long 0x00 4. "EVENT36,No operation issued due to backend" "Not implemented,?..." bitfld.long 0x00 3. "EVENT35,No operation issued due to the frontend" "Not implemented,?..." bitfld.long 0x00 2. "EVENT34,Instruction architecturally executed mispredicted branch" "Not implemented,?..." newline bitfld.long 0x00 1. "EVENT33,Instruction architecturally executed branch" "Not implemented,?..." bitfld.long 0x00 0. "EVENT32,Level 2 data cache allocation without refill" "Not implemented,?..." tree.end newline if (((per.q(c15:0x00c9))&0x40)==0x40) group.quad c15:0x10090++0x01 line.quad 0x00 "PMCCNTR,Performance Monitor Cycle Count Register" else group.long c15:0x00d9++0x00 line.long 0x00 "PMCCNTR,Performance Monitor Cycle Count Register" endif if (((per.q(c15:0x05c9))&0x1F)==0x1F) group.long c15:0x01d9++0x00 line.long 0x00 "PMXEVTYPER,Performance Monitor Event Type Register" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" else group.long c15:0x01d9++0x00 line.long 0x00 "PMXEVTYPER,Performance Monitor Event Type Register" endif group.long c15:0x02d9++0x00 line.long 0x00 "PMXEVCNTR,Performance Monitor Event Count Register" group.long c15:0x00e9++0x00 line.long 0x00 "PMUSERENR,Performance Monitor User Enable Register" bitfld.long 0x00 3. "ER,Event counter read enable" "Disabled,Enabled" bitfld.long 0x00 2. "CR,Cycle counter read enable" "Disabled,Enabled" bitfld.long 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,User mode access enable" "Disabled,Enabled" group.long c15:0x01e9++0x00 line.long 0x00 "PMINTENSET,Performance Monitor Interrupt Enable Set" bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" bitfld.long 0x00 5. "P5,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. "P4,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. "P3,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. "P2,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. "P1,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. "P0,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" group.long c15:0x02e9++0x00 line.long 0x00 "PMINTENCLR,Performance Monitor Interrupt Enable Clear" eventfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" eventfld.long 0x00 5. "P5,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 4. "P4,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 3. "P3,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 2. "P2,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 1. "P1,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 0. "P0,Overflow Interrupt Clear" "Disabled,Enabled" group.long c15:0x03e9++0x00 line.long 0x00 "PMOVSSET,Performance Monitor Overflow Flag Status Set Register" bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" bitfld.long 0x00 5. "P5,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. "P4,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. "P3,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. "P2,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. "P1,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. "P0,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" group.long c15:0x8E++0x00 line.long 0x00 "PMEVCNTR0,Performance Monitors Event Count Register 0" group.long c15:(0x8E+0x40)++0x00 line.long 0x00 "PMEVTYPER0,Performance Monitors Selected Event Type Register 0" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x18E++0x00 line.long 0x00 "PMEVCNTR1,Performance Monitors Event Count Register 1" group.long c15:(0x18E+0x40)++0x00 line.long 0x00 "PMEVTYPER1,Performance Monitors Selected Event Type Register 1" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x28E++0x00 line.long 0x00 "PMEVCNTR2,Performance Monitors Event Count Register 2" group.long c15:(0x28E+0x40)++0x00 line.long 0x00 "PMEVTYPER2,Performance Monitors Selected Event Type Register 2" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x38E++0x00 line.long 0x00 "PMEVCNTR3,Performance Monitors Event Count Register 3" group.long c15:(0x38E+0x40)++0x00 line.long 0x00 "PMEVTYPER3,Performance Monitors Selected Event Type Register 3" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x48E++0x00 line.long 0x00 "PMEVCNTR4,Performance Monitors Event Count Register 4" group.long c15:(0x48E+0x40)++0x00 line.long 0x00 "PMEVTYPER4,Performance Monitors Selected Event Type Register 4" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x58E++0x00 line.long 0x00 "PMEVCNTR5,Performance Monitors Event Count Register 5" group.long c15:(0x58E+0x40)++0x00 line.long 0x00 "PMEVTYPER5,Performance Monitors Selected Event Type Register 5" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x07FE++0x00 line.long 0x00 "PMCCFILTR,Performance Monitors Cycle Count Filter Register" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" tree.end tree "System Timer Registers" group.long c15:0x000E++0x00 line.long 0x00 "CNTFRQ,Counter Frequency Register" rgroup.quad c15:0x100E0++0x01 line.quad 0x00 "CNTPCT,Counter Physical Count Register" group.long c15:0x001E++0x00 line.long 0x00 "CNTKCTL,Timer PL1 Control Register" bitfld.long 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" newline bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter CNTVCT and the frequency register CNTFRQ are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter CNTPCT and the frequency register CNTFRQ are accessible from EL0 modes" "Not accessible,Accessible" group.long c15:0x002E++0x00 line.long 0x00 "CNTP_TVAL,Counter PL1 Physical Compare Value Register" if (((per.q(c15:0x012E))&0x01)==0x01) group.long c15:0x012E++0x00 line.long 0x00 "CNTP_CTL,Counter PL1 Physical Timer Control Register" rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" else group.long c15:0x012E++0x00 line.long 0x00 "CNTP_CTL,Counter PL1 Physical Timer Control Register" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" endif group.long c15:0x003E++0x00 line.long 0x00 "CNTV_TVAL,Counter PL1 Virtual Timer Value Register" if (((per.q(c15:0x013E))&0x01)==0x01) group.long c15:0x013E++0x00 line.long 0x00 "CNTV_CTL,Counter PL1 Virtual Timer Control Register" rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" else group.long c15:0x013E++0x00 line.long 0x00 "CNTV_CTL,Counter PL1 Virtual Timer Control Register" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" endif group.quad c15:0x110E0++0x01 line.quad 0x00 "CNTVCT,Counter Virtual Count Register" group.quad c15:0x120E0++0x01 line.quad 0x00 "CNTP_CVAL,Counter PL1 Physical Compare Value Register" group.quad c15:0x130E0++0x01 line.quad 0x00 "CNTV_CVAL,Counter PL1 Virtual Compare Value Register" group.quad c15:0x140E0++0x01 line.quad 0x00 "CNTVOFF,Counter Virtual Offset Register" group.long c15:0x401E++0x00 line.long 0x00 "CNTHCTL,Counter Non-secure PL2 Control Register" bitfld.long 0x00 4.--7. "EVNTI,Select trigger for the event stream generated from counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" newline bitfld.long 0x00 1. "EL1VCTEN,Controls whether the Non-secure copies of the physical timer registers are accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. "EL1PCTEN,Controls whether the physical counter CNTPCT is accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible" group.long c15:0x402E++0x00 line.long 0x00 "CNTHP_TVAL,Counter Non-secure PL2 Physical Timer Value Register" if (((per.q(c15:0x412E))&0x01)==0x01) group.long c15:0x412E++0x00 line.long 0x00 "CNTHP_CTL,Counter Non-secure PL2 Physical Timer Control Register" rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" else group.long c15:0x412E++0x00 line.long 0x00 "CNTHP_CTL,Counter Non-secure PL2 Physical Timer Control Register" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" endif group.quad c15:0x160E0++0x01 line.quad 0x00 "CNTHP_CVAL,Counter Non-secure PL2 Physical Compare Value Register" tree.end tree "Generic Interrupt Controller System Registers" tree "AArch32 GIC Physical CPU Interface System Registers" tree.open "Interrupt Controller Active Priorities Registers" group.long c15:0x048C++0x00 line.long 0x00 "ICC_AP0R0,Active Priorities 0 Register 0" bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" newline bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" newline bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" newline bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" group.long c15:0x009C++0x00 line.long 0x00 "ICC_AP1R0,Active Priorities 1 Register 0" bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" newline bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" newline bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" newline bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" tree.end newline if (((per.q(c15:0x110C0))&0x10000000000)==0x00) wgroup.quad c15:0x110C0++0x01 line.quad 0x00 "ICC_ASGI1R,Alternate SGI Generation Register 1" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Target list,All PEs excluding self" newline hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" bitfld.quad 0x00 24.--27. "INTID,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List" else wgroup.quad c15:0x110C0++0x01 line.quad 0x00 "ICC_ASGI1R,Alternate SGI Generation Register 1" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Target list,All PEs excluding self" newline bitfld.quad 0x00 24.--27. "INTID,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline endif group.long c15:0x038C++0x00 line.long 0x00 "ICC_BPR0,Binary Point Register 0" bitfld.long 0x00 0.--2. "BINARYPOINT,Interrupt priority field control and interrupt preemption control" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]" group.long c15:0x03CC++0x00 line.long 0x00 "ICC_BPR1,Binary Point Register 1" bitfld.long 0x00 0.--2. "BINARYPOINT,Interrupt priority field control and interrupt preemption control" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]" group.long c15:0x04CC++0x00 line.long 0x00 "ICC_CTLR,Interrupt Control Registers for EL1" rbitfld.long 0x00 19. "EXTRANGE,Extended INTID range" "Reserved,Supported" rbitfld.long 0x00 18. "RSS,Range selector support" "0 - 15,0 - 255" newline rbitfld.long 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported" rbitfld.long 0x00 14. "SEIS,SEI Support" "Not supported,Supported" rbitfld.long 0x00 11.--13. "IDBITS,Number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." newline rbitfld.long 0x00 8.--10. "PRIBITS,Number of priority bits implemented" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled" bitfld.long 0x00 1. "EOIMODE,Alias of ICC_MCTLR.EOImode_EL1" "0,1" newline bitfld.long 0x00 0. "CBPR,Common Binary Point Register" "0,1" group.long c15:0x64CC++0x00 line.long 0x00 "ICC_MCTLR,Interrupt Control Registers for EL3" rbitfld.long 0x00 19. "EXTRANGE,Extended INTID range" "Reserved,Supported" rbitfld.long 0x00 18. "RSS,Range selector support" "0 - 15,0 - 255" newline rbitfld.long 0x00 17. "NDS,Disable Security not supported" "Supported,Not supported" rbitfld.long 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported" rbitfld.long 0x00 14. "SEIS,Indicates whether the CPU interface supports generation of SEIs" "Not supported,Supported" newline rbitfld.long 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." rbitfld.long 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "EOIMODE_EL1NS,Controls whether a write to an End of Interrupt register also deactivates the interrupt(Non-secure EL1 and EL2)" "Enabled,Disabled" bitfld.long 0x00 3. "EOIMODE_EL1S,Controls whether a write to an End of Interrupt register also deactivates the interrupt(Secure EL1)" "Enabled,Disabled" bitfld.long 0x00 2. "EOIMODE_EL3,Controls whether a write to an End of Interrupt register also deactivates the interrupt(EL3)" "Enabled,Disabled" newline bitfld.long 0x00 1. "CBPR_EL1NS,Controls whether the same register is used for interrupt preemption of both Group 0 and Group 1 Non-secure interrupts at EL1" "Separate registers,Same register" bitfld.long 0x00 0. "CBPR_EL1S,Controls whether the same register is used for interrupt preemption of both Group 0 and Group 1 Secure interrupts in Secure non-Monitor modes" "Separate registers,Same register" if (((per.q(c15:0x04CC))&0x3800)==0x0000) wgroup.long c15:0x01BC++0x00 line.long 0x00 "ICC_DIR,Deactivate Interrupt Register" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the interrupt to be deactivated" wgroup.long c15:0x018C++0x00 line.long 0x00 "ICC_EOIR0,End Of Interrupt Register 0" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR0 access" wgroup.long c15:0x01CC++0x00 line.long 0x00 "ICC_EOIR1,End Of Interrupt Register 1" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR1 access." rgroup.long c15:0x028C++0x00 line.long 0x00 "ICC_HPPIR0,Highest Prioity Pending Interrupt Register 0" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt" rgroup.long c15:0x02CC++0x00 line.long 0x00 "ICC_HPPIR1,Highest Prioity Pending Interrupt Register 1" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt" else wgroup.long c15:0x01BC++0x00 line.long 0x00 "ICC_DIR,Deactivate Interrupt Register" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the interrupt to be deactivated" wgroup.long c15:0x018C++0x00 line.long 0x00 "ICC_EOIR0,End Of Interrupt Register 0" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR0 access" wgroup.long c15:0x01CC++0x00 line.long 0x00 "ICC_EOIR1,End Of Interrupt Register 1" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR1 access." rgroup.long c15:0x028C++0x00 line.long 0x00 "ICC_HPPIR0,Highest Prioity Pending Interrupt Register 0" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt" rgroup.long c15:0x02CC++0x00 line.long 0x00 "ICC_HPPIR1,Highest Prioity Pending Interrupt Register 1" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt" endif hgroup.long c15:0x008C++0x00 hide.long 0x00 "ICC_IAR0,Interrupt Acknowledge Register 0" in hgroup.long c15:0x00CC++0x00 hide.long 0x00 "ICC_IAR1,Interrupt Acknowledge Register 1" in group.long c15:0x06CC++0x00 line.long 0x00 "ICC_IGRPEN0,Interrupt Group Enable Register 0" bitfld.long 0x00 0. "ENABLE,Enables Group 0 interrupts" "Disabled,Enabled" group.long c15:0x07CC++0x00 line.long 0x00 "ICC_IGRPEN1,Interrupt Group Enable Register 1" bitfld.long 0x00 0. "ENABLE,Enables Group 0 interrupts" "Disabled,Enabled" group.long c15:0x0064++0x00 line.long 0x00 "ICC_PMR,Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Priority mask level for the CPU interface" rgroup.long c15:0x03BC++0x00 line.long 0x00 "ICC_RPR,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface" if (((per.q(c15:0x120C0))&0x10000000000)==0x00) wgroup.quad c15:0x120C0++0x01 line.quad 0x00 "ICC_SGI0R,SGI Generation Register 0" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Target list,All PEs excluding self" newline hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List" else wgroup.quad c15:0x120C0++0x01 line.quad 0x00 "ICC_SGI0R,SGI Generation Register 0" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Target list,All PEs excluding self" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline endif if (((per.q(c15:0x100C0))&0x10000000000)==0x00) wgroup.quad c15:0x100C0++0x01 line.quad 0x00 "ICC_SGI1R,SGI Generation Register 1" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Target list,All PEs excluding self" newline hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List" else wgroup.quad c15:0x100C0++0x01 line.quad 0x00 "ICC_SGI1R,SGI Generation Register 1" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Target list,All PEs excluding self" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline endif group.long c15:0x05CC++0x00 line.long 0x00 "ICC_SRE,System Register Enable Register for EL1" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" group.long c15:0x459C++0x00 line.long 0x00 "ICC_HSRE,System Register Enable Register for EL2" bitfld.long 0x00 3. "ENABLE,Enable lower exception level access to ICC_SRE_EL1" "Disabled,Enabled" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" newline bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" group.long c15:0x65CC++0x00 line.long 0x00 "ICC_MSRE,System Register Enable Register for EL3" bitfld.long 0x00 3. "ENABLE,Enable lower exception level access to ICC_SRE_EL1 and ICC_SRE_EL2" "Disabled,Enabled" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" newline bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" group.long c15:0x67CC++0x00 line.long 0x00 "ICC_MGRPEN1,Monitor Group1 Interrupt Group Enable" bitfld.long 0x00 1. "ENABLEGRP1S,Enables Group 1 interrupts for the Secure state" "Disabled,Enabled" bitfld.long 0x00 0. "ENABLEGRP1NS,Enables Group 1 interrupts for the Non-secure state" "Disabled,Enabled" tree.end tree "AArch32 Virtual Interface Control System Registers" tree.open "Hypervisor Active Priorities Registers" group.long c15:0x408C++0x00 line.long 0x00 "ICH_AP0R0,Interrupt Controller Hypervisor Active Priorities Group 0 Register 0" bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" newline bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" newline bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" newline bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" group.long c15:0x409C++0x00 line.long 0x00 "ICH_AP1R0,Interrupt Controller Hypervisor Active Priorities Group 1 Register 0" bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" newline bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" newline bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" newline bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" tree.end newline rgroup.long c15:0x438C++0x00 line.long 0x00 "ICH_EISR,Interrupt Controller End of Interrupt Status Register" bitfld.long 0x00 3. "STATUS3,EOI maintenance interrupt status bit for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "STATUS2,EOI maintenance interrupt status bit for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. "STATUS1,EOI maintenance interrupt status bit for List register 1" "No interrupt,Interrupt" newline bitfld.long 0x00 0. "STATUS0,EOI maintenance interrupt status bit for List register 0" "No interrupt,Interrupt" rgroup.long c15:0x458C++0x00 line.long 0x00 "ICH_ELRSR,Interrupt Controller Empty List Register Status Register" bitfld.long 0x00 3. "STATUS3,Status bit for List register 3" "Interrupt,No interrupt" bitfld.long 0x00 2. "STATUS2,Status bit for List register 2" "Interrupt,No interrupt" bitfld.long 0x00 1. "STATUS1,Status bit for List register 1" "Interrupt,No interrupt" newline bitfld.long 0x00 0. "STATUS0,Status bit for List register 0" "Interrupt,No interrupt" if (((per.q(c15:0x41BC))&0x480000)==0x480000) group.long c15:0x40BC++0x00 line.long 0x00 "ICH_HCR,Interrupt Controller Hypervisor Control Register" bitfld.long 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. "TDIR,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped" bitfld.long 0x00 13. "TSEI,Trap all locally generated SEIs" "Not trapped,Trapped" newline bitfld.long 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped" newline bitfld.long 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled" elif (((per.q(c15:0x41BC))&0x480000)==0x080000) group.long c15:0x40BC++0x00 line.long 0x00 "ICH_HCR,Interrupt Controller Hypervisor Control Register" bitfld.long 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. "TDIR,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped" newline bitfld.long 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped" newline bitfld.long 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled" elif (((per.q(c15:0x41BC))&0x480000)==0x400000) group.long c15:0x40BC++0x00 line.long 0x00 "ICH_HCR,Interrupt Controller Hypervisor Control Register" bitfld.long 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 13. "TSEI,Trap all locally generated SEIs" "Not trapped,Trapped" newline bitfld.long 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped" newline bitfld.long 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled" else group.long c15:0x40BC++0x00 line.long 0x00 "ICH_HCR,Interrupt Controller Hypervisor Control Register" bitfld.long 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped" newline bitfld.long 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled" endif group.long c15:(0x40CC+0x0)++0x00 line.long 0x00 "ICH_LR0,Interrupt Controller List Register 0" group.long c15:(0x40CC+0x100)++0x00 line.long 0x00 "ICH_LR1,Interrupt Controller List Register 1" group.long c15:(0x40CC+0x200)++0x00 line.long 0x00 "ICH_LR2,Interrupt Controller List Register 2" group.long c15:(0x40CC+0x300)++0x00 line.long 0x00 "ICH_LR3,Interrupt Controller List Register 3" if (((per.q(c15:0x40EC+0x0))&0x20000000)==0x20000000) group.long c15:(0x40EC+0x0)++0x00 line.long 0x00 "ICH_LRC0,Interrupt Controller List Register Extension 0" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" else group.long c15:(0x40EC+0x0)++0x00 line.long 0x00 "ICH_LRC0,Interrupt Controller List Register Extension 0" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" bitfld.long 0x00 9. "EOI,Asserted EOI maintenance interrupt" "Not asserted,Asserted" endif if (((per.q(c15:0x40EC+0x100))&0x20000000)==0x20000000) group.long c15:(0x40EC+0x100)++0x00 line.long 0x00 "ICH_LRC1,Interrupt Controller List Register Extension 1" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" else group.long c15:(0x40EC+0x100)++0x00 line.long 0x00 "ICH_LRC1,Interrupt Controller List Register Extension 1" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" bitfld.long 0x00 9. "EOI,Asserted EOI maintenance interrupt" "Not asserted,Asserted" endif if (((per.q(c15:0x40EC+0x200))&0x20000000)==0x20000000) group.long c15:(0x40EC+0x200)++0x00 line.long 0x00 "ICH_LRC2,Interrupt Controller List Register Extension 2" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" else group.long c15:(0x40EC+0x200)++0x00 line.long 0x00 "ICH_LRC2,Interrupt Controller List Register Extension 2" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" bitfld.long 0x00 9. "EOI,Asserted EOI maintenance interrupt" "Not asserted,Asserted" endif if (((per.q(c15:0x40EC+0x300))&0x20000000)==0x20000000) group.long c15:(0x40EC+0x300)++0x00 line.long 0x00 "ICH_LRC3,Interrupt Controller List Register Extension 3" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" else group.long c15:(0x40EC+0x300)++0x00 line.long 0x00 "ICH_LRC3,Interrupt Controller List Register Extension 3" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt meaning that it corresponds to a physical interrupt" "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" bitfld.long 0x00 9. "EOI,Asserted EOI maintenance interrupt" "Not asserted,Asserted" endif rgroup.long c15:0x42BC++0x00 line.long 0x00 "ICH_MISR,Interrupt Controller Maintenance Interrupt State Register" bitfld.long 0x00 7. "VGRP1D,VPE Group 1 Disabled" "Not asserted,Asserted" bitfld.long 0x00 6. "VGRP1E,VPE Group 1 Enabled" "Not asserted,Asserted" bitfld.long 0x00 5. "VGRP0D,VPE Group 0 Disabled" "Not asserted,Asserted" newline bitfld.long 0x00 4. "VGRP0E,VPE Group 0 Enabled" "Not asserted,Asserted" bitfld.long 0x00 3. "NP,No Pending" "Not asserted,Asserted" bitfld.long 0x00 2. "LRENP,List Register Entry Not Present" "Not asserted,Asserted" newline bitfld.long 0x00 1. "U,Underflow" "Not asserted,Asserted" bitfld.long 0x00 0. "EOI,End Of Interrupt" "Not asserted,Asserted" group.long c15:0x478C++0x00 line.long 0x00 "ICH_VMCR,Interrupt Controller Virtual Machine Control Register" hexmask.long.byte 0x00 24.--31. 1. "VPMR,The priority mask level for the virtual CPU interface" bitfld.long 0x00 21.--23. "VBPR0,Virtual Binary Point Register Group 0" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]" bitfld.long 0x00 18.--20. "VBPR1,Virtual Binary Point Register Group 1" "Reserved,[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]" newline bitfld.long 0x00 9. "VEOIM,Controls whether a write to an End of Interrupt register also deactivates the virtual interrupt" "Disabled,Enabled" bitfld.long 0x00 4. "VCBPR,Virtual Common Binary Point Register" "Separate registers,Same register" bitfld.long 0x00 3. "VFIQEN,Virtual FIQ enable" "Virtual IRQs,Virtual FIQs" newline bitfld.long 0x00 2. "VACKCTL,Virtual FIQ enable" "1022,Corresponding interrupt" bitfld.long 0x00 1. "VENG1,Virtual Group 1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. "VENG0,Virtual Group 0 interrupt enable" "Disabled,Enabled" group.long c15:0x449C++0x00 line.long 0x00 "ICH_VSEIR,Virtual System Error Interrupt Register" group.long c15:0x41BC++0x00 line.long 0x00 "ICH_VTR,Interrupt Controller VGIC Type Register" bitfld.long 0x00 29.--31. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x00 26.--28. "PREBITS,The number of virtual preemption bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23.--25. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." newline bitfld.long 0x00 22. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported" bitfld.long 0x00 21. "A3V,Affinity 3 Valid" "Only zero values supported,Non-zero values supported" bitfld.long 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Supported,Not supported" newline bitfld.long 0x00 19. "TDS,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Not supported,Supported" bitfld.long 0x00 0.--4. "LISTREGS,The number of implemented List registers minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end tree.end tree "Debug Registers" tree "Coresight Management Registers" rgroup.long c14:0x0000++0x00 line.long 0x00 "DBGDIDR,Debug ID Register" bitfld.long 0x00 28.--31. "WRP,Number of Watchpoint Register Pairs" "Reserved,Reserved,Reserved,4,?..." bitfld.long 0x00 24.--27. "BRP,Number of Breakpoint Register Pairs" "Reserved,Reserved,Reserved,Reserved,Reserved,6,?..." bitfld.long 0x00 20.--23. "CTX_CMP,Number of BRPs with Context ID Comparison Capability" "Reserved,Two context,?..." newline hexmask.long.byte 0x00 16.--19. 1. "VERSION,Debug Architecture Version" bitfld.long 0x00 14. "NSUHD,Secure User halting debug-mode" "Reserved,Not supported" bitfld.long 0x00 12. "SE,Security Extensions implemented" "Reserved,Implemented" rgroup.long c14:0x0060++0x00 line.long 0x00 "DBGWFAR,Watchpoint Fault Address Register" group.long c14:0x0070++0x00 line.long 0x00 "DBGVCR,Debug Vector Catch register" bitfld.long 0x00 31. "FIQVCE_NS,FIQ vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 30. "IRQVCE_NS,IRQ vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 28. "DAVCE_NS,Data Abort vector catch in Non-secure state" "Disabled,Enabled" newline bitfld.long 0x00 27. "PAVCE_NS,Prefetch Abort vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 26. "SVCVCE_NS,SVC vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 25. "UIVCE_NS,Undefined instruction vector catch in Non-secure state" "Disabled,Enabled" newline bitfld.long 0x00 15. "FIQVCE_SM,FIQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 14. "IRQVCE_SM,IRQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 12. "DAVCE_SM,Data Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" newline bitfld.long 0x00 11. "PAVCE_SM,Prefetch Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 10. "SMCVCE_S,SMC vector catch enable in Secure state" "Disabled,Enabled" bitfld.long 0x00 7. "FIQVCE_S,FIQ vector catch in Secure state" "Disabled,Enabled" newline bitfld.long 0x00 6. "IRQVCE_S,IRG vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 4. "DAVCE_S,Data Abort vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 3. "PAVCE_S,Prefetch Abort vector catch in Secure state" "Disabled,Enabled" newline bitfld.long 0x00 2. "SVCVCE_S,SVC vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 1. "UIVCE_S,Undefined instruction vector catch in Secure state" "Disabled,Enabled" group.long c14:0x0020++0x000 line.long 0x00 "DBGDCCINT,DCC Interrupt Enable Register" bitfld.long 0x00 30. "RX,DCC interrupt request enable control for DTRRX" "Disabled,Enabled" bitfld.long 0x00 29. "TX,DCC interrupt request enable control for DTRTX" "Disabled,Enabled" group.long c14:0x0200++0x00 line.long 0x00 "DBGDTRRXEXT,Debug Receive Register (External View)" if (((per.l(c14:0x0411))&0x02)==0x02) group.long c14:0x0220++0x00 line.long 0x00 "DBGDSCREXT,Debug Status and Control Register (External View)" bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. "RXO,Used for save/restore of EDSCR.RXO" "Disabled,Enabled" newline bitfld.long 0x00 26. "TXU,Used for save/restore of EDSCR.TXU" "Disabled,Enabled" bitfld.long 0x00 22.--23. "INTDIS,Used for save/restore of EDSCR.INTdis" "Don't disabled interrupts,Disabled interrupts targeting non-sec EL1,Disabled all interrupts,Disabled all interrupts" bitfld.long 0x00 21. "TDA,Used for save/restore of EDSCR.TDA" "Disabled,Enabled" newline rbitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure" rbitfld.long 0x00 17. "SPNIDDIS,Secure Privileged Non-Invasive Debug Disable" "No,Yes" rbitfld.long 0x00 16. "SPIDDIS,Secure Privileged Invasive Debug Disable" "No,Yes" newline bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled" bitfld.long 0x00 14. "HDE,Used for save/restore of EDSCR.HDE" "Disabled,Enabled" bitfld.long 0x00 12. "UDCCDIS,User mode access to Communications Channel disable" "No,Yes" newline bitfld.long 0x00 6. "ERR,Used for save/restore of EDSCR.ERR" "Disabled,Enabled" bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,BKPT Instruction,Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..." else group.long c14:0x0220++0x00 line.long 0x00 "DBGDSCREXT,Debug Status and Control Register (External View)" rbitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full" rbitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full" rbitfld.long 0x00 27. "RXO,Used for save/restore of EDSCR.RXO" "Disabled,Enabled" newline rbitfld.long 0x00 26. "TXU,Used for save/restore of EDSCR.TXU" "Disabled,Enabled" rbitfld.long 0x00 22.--23. "INTDIS,Used for save/restore of EDSCR.INTdis" "Don't disabled interrupts,Disabled interrupts targeting non-sec EL1,Disabled all interrupts,Disabled all interrupts" rbitfld.long 0x00 21. "TDA,Used for save/restore of EDSCR.TDA" "Disabled,Enabled" newline rbitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure" rbitfld.long 0x00 17. "SPNIDDIS,Secure Privileged Non-Invasive Debug Disable" "No,Yes" rbitfld.long 0x00 16. "SPIDDIS,Secure Privileged Invasive Debug Disable" "No,Yes" newline bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled" rbitfld.long 0x00 14. "HDE,Used for save/restore of EDSCR.HDE" "Disabled,Enabled" bitfld.long 0x00 12. "UDCCDIS,User mode access to Communications Channel disable" "No,Yes" newline rbitfld.long 0x00 6. "ERR,Used for save/restore of EDSCR.ERR" "Disabled,Enabled" bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,BKPT Instruction,Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..." endif rgroup.long c14:0x0010++0x00 line.long 0x00 "DBGDSCRINT,Debug Status and Control Register (Internal View)" bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure" newline bitfld.long 0x00 17. "SPNIDDIS,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. "SPIDDIS,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled" newline bitfld.long 0x00 12. "UDCCDIS,User mode access to Communications Channel disable" "No,Yes" bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,BKPT Instruction,Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..." group.long c14:0x0230++0x00 line.long 0x00 "DBGDTRTXEXT,Debug Transmit Register (External View)" rgroup.long c14:0x0050++0x00 line.long 0x00 "DBGDTRTXINT,Debug Transmit Register (Internal View)" wgroup.long c14:0x0050++0x00 line.long 0x00 "DBGDTRRXINT,Debug Receive Register (Internal View)" group.long c14:0x0687++0x00 line.long 0x00 "DBGCLAIMSET,Claim Tag Set Register" bitfld.long 0x00 7. "CT7,Claim Tag 7 Set" "Not set,Set" bitfld.long 0x00 6. "CT6,Claim Tag 6 Set" "Not set,Set" bitfld.long 0x00 5. "CT5,Claim Tag 5 Set" "Not set,Set" newline bitfld.long 0x00 4. "CT4,Claim Tag 4 Set" "Not set,Set" bitfld.long 0x00 3. "CT3,Claim Tag 3 Set" "Not set,Set" bitfld.long 0x00 2. "CT2,Claim Tag 2 Set" "Not set,Set" newline bitfld.long 0x00 1. "CT1,Claim Tag 1 Set" "Not set,Set" bitfld.long 0x00 0. "CT0,Claim Tag 0 Set" "Not set,Set" group.long c14:0x0697++0x00 line.long 0x00 "DBGCLAIMCLR,Claim Tag Clear Register" bitfld.long 0x00 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared" bitfld.long 0x00 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared" bitfld.long 0x00 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared" newline bitfld.long 0x00 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared" bitfld.long 0x00 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared" bitfld.long 0x00 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared" newline bitfld.long 0x00 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared" bitfld.long 0x00 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared" rgroup.long c14:0x06E7++0x00 line.long 0x00 "DBGAUTHSTATUS,Debug Authentication Status Register" bitfld.long 0x00 7. "SNDFI,Secure non-invasive debug features implementation" "No effect,Implemented" bitfld.long 0x00 6. "SNDE,Secure non-invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 5. "SIDFI,Secure invasive debug features implementation" "No effect,Implemented" newline bitfld.long 0x00 4. "SIDE,Secure invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 3. "NSNDFI,Non-secure non-invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 2. "NSNDE,Non-secure non-invasive debug enable" "0,1" newline bitfld.long 0x00 1. "NSIDFI,Non-secure invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 0. "NSIDE,Non-secure invasive debug enable" "0,1" rgroup.long c14:0x0707++0x00 line.long 0x00 "DBGDEVID2,Debug Device ID Register 2" rgroup.long c14:0x0717++0x00 line.long 0x00 "DBGDEVID1,Debug Device ID Register 1" bitfld.long 0x00 0.--3. "PCSROFFSET,This field defines the offset applied to DBGPCSR samples" "0,1,No offset,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c14:0x0727++0x000 line.long 0x00 "DBGDEVID,Debug Device ID Register 0" bitfld.long 0x00 28.--31. "CIDMASK,Specifies the level of support for the Context ID matching breakpoint masking capability" "Not implemented,?..." bitfld.long 0x00 24.--27. "AUXREGS,Specifies support for the Debug External Auxiliary Control Register" "Not implemented,?..." bitfld.long 0x00 20.--23. "DOUBLELOCK,Specifies support for the Debug OS Double Lock Register" "Reserved,Implemented,?..." newline bitfld.long 0x00 16.--19. "VIREXTNS,Specifies whether EL2 is implemented" "Reserved,Implemented,?..." bitfld.long 0x00 12.--15. "VECTORCATCH,Defines the form of the vector catch event implemented" "Implemented,?..." bitfld.long 0x00 8.--11. "BPADDRMASK,Indicates the level of support for the Immediate Virtual Address(IVA) matching breakpoint masking capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented" newline bitfld.long 0x00 4.--7. "WPADDRMASK,Indicates the level of support for the DVA matching watchpoint masking capability" "Reserved,Implemented,?..." bitfld.long 0x00 0.--3. "PCSAMPLE,Indicates the level of support for Program Counter sampling using debug registers 40 and 41" "Reserved,Reserved,Reserved,Implemented,?..." tree.end newline rgroup.quad c14:0x10010++0x001 line.quad 0x00 "DBGDRAR,Debug ROM Address Register" hexmask.quad.word 0x00 32.--47. 0x1 "ROMADDR,ROM physical address" hexmask.quad.tbyte 0x00 12.--31. 0x10 "ROMADDR,ROM physical address" bitfld.quad 0x00 1. "VALID1,ROM table address valid" "Not valid,Valid" newline bitfld.quad 0x00 0. "VALID0,ROM table address valid" "Not valid,Valid" rgroup.quad c14:0x10020++0x001 line.quad 0x00 "DBGDSAR,Debug Self Address Offset Register" wgroup.long c14:0x0401++0x000 line.long 0x00 "DBGOSLAR,Operating System Lock Access Register" rgroup.long c14:0x0411++0x000 line.long 0x00 "DBGOSLSR,Operating System Lock Status Register" bitfld.long 0x00 2. "NTT,32-Bit Access" "Not required,?..." bitfld.long 0x00 1. "OSLK,Status of the OS Lock" "Not locked,Locked" bitfld.long 0x00 0. 3. "OSLM,OS Lock Model implemented Bit" "Reserved,Reserved,Implemented,?..." if (((per.l(c14:0x0411))&0x2)==0x02) group.long c14:0x0260++0x000 line.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register" else rgroup.long c14:0x0260++0x000 line.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register" endif group.long c14:0x0431++0x000 line.long 0x00 "DBGOSDLR,Debug OS Double Lock Register" bitfld.long 0x00 0. "DLK,OS Double Lock control bit" "Not locked,Locked" group.long c14:0x0441++0x000 line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register" bitfld.long 0x00 0. "CORENPDRQ,Core No Power down Request" "Low,High" tree.end tree "Breakpoint Registers" if (((per.l(c14:0x500+0x0))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x0)++0x000 "Breakpoint 0" line.long 0x00 "DBGBVR0,Breakpoint Value Register" hexmask.long 0x00 2.--31. 0x04 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:0x500+0x0))&0xF00000)==(0x600000||0x700000||0x800000||0x900000||0xC00000||0xD00000||0xE00000||0xF00000)) rgroup.long c14:(0x0400+0x0)++0x000 "Breakpoint 0" line.long 0x00 "DBGBVR0,Breakpoint Value Register" else group.long c14:(0x0400+0x0)++0x000 "Breakpoint 0" line.long 0x00 "DBGBVR0,Breakpoint Value Register" endif if (((per.l(c14:0x0500+0x0))&0x2000)==0x2000) if (((per.l(c14:0x0500+0x0))&0xC000)==0xC000) group.long c14:(0x0500+0x0)++0x00 line.long 0x00 "DBGBCR0,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 0 is generated" "Supervisor,?..." bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" elif (((per.l(c14:0x0500+0x0))&0xC000)==0x8000) group.long c14:(0x0500+0x0)++0x00 line.long 0x00 "DBGBCR0,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 0 is generated" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" else group.long c14:(0x0500+0x0)++0x00 line.long 0x00 "DBGBCR0,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 0 is generated" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" endif else group.long c14:(0x0500+0x0)++0x00 line.long 0x00 "DBGBCR0,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 0 is generated" "User/System,System,User,User/System" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" endif if (((per.l(c14:0x500+0x10))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x10)++0x000 "Breakpoint 1" line.long 0x00 "DBGBVR1,Breakpoint Value Register" hexmask.long 0x00 2.--31. 0x04 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:0x500+0x10))&0xF00000)==(0x600000||0x700000||0x800000||0x900000||0xC00000||0xD00000||0xE00000||0xF00000)) rgroup.long c14:(0x0400+0x10)++0x000 "Breakpoint 1" line.long 0x00 "DBGBVR1,Breakpoint Value Register" else group.long c14:(0x0400+0x10)++0x000 "Breakpoint 1" line.long 0x00 "DBGBVR1,Breakpoint Value Register" endif if (((per.l(c14:0x0500+0x10))&0x2000)==0x2000) if (((per.l(c14:0x0500+0x10))&0xC000)==0xC000) group.long c14:(0x0500+0x10)++0x00 line.long 0x00 "DBGBCR1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 1 is generated" "Supervisor,?..." bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" elif (((per.l(c14:0x0500+0x10))&0xC000)==0x8000) group.long c14:(0x0500+0x10)++0x00 line.long 0x00 "DBGBCR1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 1 is generated" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" else group.long c14:(0x0500+0x10)++0x00 line.long 0x00 "DBGBCR1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 1 is generated" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" endif else group.long c14:(0x0500+0x10)++0x00 line.long 0x00 "DBGBCR1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 1 is generated" "User/System,System,User,User/System" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" endif if (((per.l(c14:0x500+0x20))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x20)++0x000 "Breakpoint 2" line.long 0x00 "DBGBVR2,Breakpoint Value Register" hexmask.long 0x00 2.--31. 0x04 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:0x500+0x20))&0xF00000)==(0x600000||0x700000||0x800000||0x900000||0xC00000||0xD00000||0xE00000||0xF00000)) rgroup.long c14:(0x0400+0x20)++0x000 "Breakpoint 2" line.long 0x00 "DBGBVR2,Breakpoint Value Register" else group.long c14:(0x0400+0x20)++0x000 "Breakpoint 2" line.long 0x00 "DBGBVR2,Breakpoint Value Register" endif if (((per.l(c14:0x0500+0x20))&0x2000)==0x2000) if (((per.l(c14:0x0500+0x20))&0xC000)==0xC000) group.long c14:(0x0500+0x20)++0x00 line.long 0x00 "DBGBCR2,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 2 is generated" "Supervisor,?..." bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" elif (((per.l(c14:0x0500+0x20))&0xC000)==0x8000) group.long c14:(0x0500+0x20)++0x00 line.long 0x00 "DBGBCR2,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 2 is generated" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" else group.long c14:(0x0500+0x20)++0x00 line.long 0x00 "DBGBCR2,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 2 is generated" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" endif else group.long c14:(0x0500+0x20)++0x00 line.long 0x00 "DBGBCR2,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 2 is generated" "User/System,System,User,User/System" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" endif if (((per.l(c14:0x500+0x30))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x30)++0x000 "Breakpoint 3" line.long 0x00 "DBGBVR3,Breakpoint Value Register" hexmask.long 0x00 2.--31. 0x04 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:0x500+0x30))&0xF00000)==(0x600000||0x700000||0x800000||0x900000||0xC00000||0xD00000||0xE00000||0xF00000)) rgroup.long c14:(0x0400+0x30)++0x000 "Breakpoint 3" line.long 0x00 "DBGBVR3,Breakpoint Value Register" else group.long c14:(0x0400+0x30)++0x000 "Breakpoint 3" line.long 0x00 "DBGBVR3,Breakpoint Value Register" endif if (((per.l(c14:0x0500+0x30))&0x2000)==0x2000) if (((per.l(c14:0x0500+0x30))&0xC000)==0xC000) group.long c14:(0x0500+0x30)++0x00 line.long 0x00 "DBGBCR3,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 3 is generated" "Supervisor,?..." bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" elif (((per.l(c14:0x0500+0x30))&0xC000)==0x8000) group.long c14:(0x0500+0x30)++0x00 line.long 0x00 "DBGBCR3,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 3 is generated" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" else group.long c14:(0x0500+0x30)++0x00 line.long 0x00 "DBGBCR3,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 3 is generated" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" endif else group.long c14:(0x0500+0x30)++0x00 line.long 0x00 "DBGBCR3,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 3 is generated" "User/System,System,User,User/System" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" endif if (((per.l(c14:0x500+0x40))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x40)++0x000 "Breakpoint 4" line.long 0x00 "DBGBVR4,Breakpoint Value Register" hexmask.long 0x00 2.--31. 0x04 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:0x500+0x40))&0xF00000)==(0x600000||0x700000||0x800000||0x900000||0xC00000||0xD00000||0xE00000||0xF00000)) rgroup.long c14:(0x0400+0x40)++0x000 "Breakpoint 4" line.long 0x00 "DBGBVR4,Breakpoint Value Register" else group.long c14:(0x0400+0x40)++0x000 "Breakpoint 4" line.long 0x00 "DBGBVR4,Breakpoint Value Register" endif if (((per.l(c14:0x0500+0x40))&0x2000)==0x2000) if (((per.l(c14:0x0500+0x40))&0xC000)==0xC000) group.long c14:(0x0500+0x40)++0x00 line.long 0x00 "DBGBCR4,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 4 is generated" "Supervisor,?..." bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" elif (((per.l(c14:0x0500+0x40))&0xC000)==0x8000) group.long c14:(0x0500+0x40)++0x00 line.long 0x00 "DBGBCR4,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 4 is generated" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" else group.long c14:(0x0500+0x40)++0x00 line.long 0x00 "DBGBCR4,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 4 is generated" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" endif else group.long c14:(0x0500+0x40)++0x00 line.long 0x00 "DBGBCR4,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 4 is generated" "User/System,System,User,User/System" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" endif if (((per.l(c14:0x500+0x50))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x50)++0x000 "Breakpoint 5" line.long 0x00 "DBGBVR5,Breakpoint Value Register" hexmask.long 0x00 2.--31. 0x04 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:0x500+0x50))&0xF00000)==(0x600000||0x700000||0x800000||0x900000||0xC00000||0xD00000||0xE00000||0xF00000)) rgroup.long c14:(0x0400+0x50)++0x000 "Breakpoint 5" line.long 0x00 "DBGBVR5,Breakpoint Value Register" else group.long c14:(0x0400+0x50)++0x000 "Breakpoint 5" line.long 0x00 "DBGBVR5,Breakpoint Value Register" endif if (((per.l(c14:0x0500+0x50))&0x2000)==0x2000) if (((per.l(c14:0x0500+0x50))&0xC000)==0xC000) group.long c14:(0x0500+0x50)++0x00 line.long 0x00 "DBGBCR5,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 5 is generated" "Supervisor,?..." bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" elif (((per.l(c14:0x0500+0x50))&0xC000)==0x8000) group.long c14:(0x0500+0x50)++0x00 line.long 0x00 "DBGBCR5,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 5 is generated" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" else group.long c14:(0x0500+0x50)++0x00 line.long 0x00 "DBGBCR5,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 5 is generated" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" endif else group.long c14:(0x0500+0x50)++0x00 line.long 0x00 "DBGBCR5,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Determines the Exception level or levels at which a breakpoint debug event for breakpoint 5 is generated" "User/System,System,User,User/System" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" endif group.long c14:0x0141++0x00 line.long 0x00 "DBGBXVR4,Debug Breakpoint Extended Value Register 4" hexmask.long.byte 0x00 0.--7. 1. "VMID,VMID value" group.long c14:0x0151++0x00 line.long 0x00 "DBGBXVR5,Debug Breakpoint Extended Value Register 5" hexmask.long.byte 0x00 0.--7. 1. "VMID,VMID value" tree.end tree "Watchpoint Control Registers" group.long c14:(0x0600+0x0)++0x000 "Watchpoint 0" line.long 0x00 "DBGWVR0,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "DA,Data address" if (((per.l(c14:0x0700+0x0))&0x2000)==0x2000) if (((per.l(c14:0x0700+0x0))&0xC000)==0xC000) group.long c14:(0x0700+0x0)++0x000 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x00 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x00 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x01 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x00 1.--2. "PAC,Determines the Exception level or levels at which a watchpoint debug event for watchpoint 0 is generated" "Supervisor,?..." bitfld.long 0x00 0. "WE,Watchpoint enable" "Disabled,Enabled" elif (((per.l(c14:0x0700+0x0))&0x8000)==0x8000) group.long c14:(0x0700+0x0)++0x000 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x00 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x00 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x01 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x00 1.--2. "PAC,Determines the Exception level or levels at which a watchpoint debug event for watchpoint 0 is generated" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "WE,Watchpoint enable" "Disabled,Enabled" else group.long c14:(0x0700+0x0)++0x000 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x00 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x00 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x01 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x00 1.--2. "PAC,Determines the Exception level or levels at which a watchpoint debug event for watchpoint 0 is generated" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "WE,Watchpoint enable" "Disabled,Enabled" endif else group.long c14:(0x0700+0x0)++0x000 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x00 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x00 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x01 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x00 1.--2. "PAC,Determines the Exception level or levels at which a watchpoint debug event for watchpoint 0 is generated" "Reserved,System,User,User/System" bitfld.long 0x00 0. "WE,Watchpoint enable" "Disabled,Enabled" endif group.long c14:(0x0600+0x10)++0x000 "Watchpoint 1" line.long 0x00 "DBGWVR1,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "DA,Data address" if (((per.l(c14:0x0700+0x10))&0x2000)==0x2000) if (((per.l(c14:0x0700+0x10))&0xC000)==0xC000) group.long c14:(0x0700+0x10)++0x000 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x00 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x00 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x01 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x00 1.--2. "PAC,Determines the Exception level or levels at which a watchpoint debug event for watchpoint 1 is generated" "Supervisor,?..." bitfld.long 0x00 0. "WE,Watchpoint enable" "Disabled,Enabled" elif (((per.l(c14:0x0700+0x10))&0x8000)==0x8000) group.long c14:(0x0700+0x10)++0x000 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x00 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x00 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x01 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x00 1.--2. "PAC,Determines the Exception level or levels at which a watchpoint debug event for watchpoint 1 is generated" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "WE,Watchpoint enable" "Disabled,Enabled" else group.long c14:(0x0700+0x10)++0x000 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x00 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x00 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x01 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x00 1.--2. "PAC,Determines the Exception level or levels at which a watchpoint debug event for watchpoint 1 is generated" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "WE,Watchpoint enable" "Disabled,Enabled" endif else group.long c14:(0x0700+0x10)++0x000 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x00 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x00 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x01 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x00 1.--2. "PAC,Determines the Exception level or levels at which a watchpoint debug event for watchpoint 1 is generated" "Reserved,System,User,User/System" bitfld.long 0x00 0. "WE,Watchpoint enable" "Disabled,Enabled" endif group.long c14:(0x0600+0x20)++0x000 "Watchpoint 2" line.long 0x00 "DBGWVR2,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "DA,Data address" if (((per.l(c14:0x0700+0x20))&0x2000)==0x2000) if (((per.l(c14:0x0700+0x20))&0xC000)==0xC000) group.long c14:(0x0700+0x20)++0x000 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x00 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x00 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x01 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x00 1.--2. "PAC,Determines the Exception level or levels at which a watchpoint debug event for watchpoint 2 is generated" "Supervisor,?..." bitfld.long 0x00 0. "WE,Watchpoint enable" "Disabled,Enabled" elif (((per.l(c14:0x0700+0x20))&0x8000)==0x8000) group.long c14:(0x0700+0x20)++0x000 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x00 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x00 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x01 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x00 1.--2. "PAC,Determines the Exception level or levels at which a watchpoint debug event for watchpoint 2 is generated" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "WE,Watchpoint enable" "Disabled,Enabled" else group.long c14:(0x0700+0x20)++0x000 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x00 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x00 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x01 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x00 1.--2. "PAC,Determines the Exception level or levels at which a watchpoint debug event for watchpoint 2 is generated" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "WE,Watchpoint enable" "Disabled,Enabled" endif else group.long c14:(0x0700+0x20)++0x000 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x00 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x00 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x01 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x00 1.--2. "PAC,Determines the Exception level or levels at which a watchpoint debug event for watchpoint 2 is generated" "Reserved,System,User,User/System" bitfld.long 0x00 0. "WE,Watchpoint enable" "Disabled,Enabled" endif group.long c14:(0x0600+0x30)++0x000 "Watchpoint 3" line.long 0x00 "DBGWVR3,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "DA,Data address" if (((per.l(c14:0x0700+0x30))&0x2000)==0x2000) if (((per.l(c14:0x0700+0x30))&0xC000)==0xC000) group.long c14:(0x0700+0x30)++0x000 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x00 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x00 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x01 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x00 1.--2. "PAC,Determines the Exception level or levels at which a watchpoint debug event for watchpoint 3 is generated" "Supervisor,?..." bitfld.long 0x00 0. "WE,Watchpoint enable" "Disabled,Enabled" elif (((per.l(c14:0x0700+0x30))&0x8000)==0x8000) group.long c14:(0x0700+0x30)++0x000 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x00 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x00 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x01 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x00 1.--2. "PAC,Determines the Exception level or levels at which a watchpoint debug event for watchpoint 3 is generated" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "WE,Watchpoint enable" "Disabled,Enabled" else group.long c14:(0x0700+0x30)++0x000 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x00 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x00 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x01 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x00 1.--2. "PAC,Determines the Exception level or levels at which a watchpoint debug event for watchpoint 3 is generated" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "WE,Watchpoint enable" "Disabled,Enabled" endif else group.long c14:(0x0700+0x30)++0x000 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x00 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x00 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x01 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x00 1.--2. "PAC,Determines the Exception level or levels at which a watchpoint debug event for watchpoint 3 is generated" "Reserved,System,User,User/System" bitfld.long 0x00 0. "WE,Watchpoint enable" "Disabled,Enabled" endif tree.end tree.end AUTOINDENT.OFF AUTOINDENT.POP tree.open "Interrupt Controller (GIC-400)" width 17. width 17. base ad:0x4ac10000 tree "Distributor Interface" if (((per.l(ad:0x4ac10000+0x04))&0x400)==0x400) if PER.ADDRESS.isSECUREEX(ad:0x4ac10000) group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)" bitfld.long 0x00 1. " ENABLEGRP1 ,Global Interrupt Enable Group 1" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Global Interrupt Enable Group 1" "Disabled,Enabled" else group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register (Non-secure access)" bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled" endif else group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register" bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled" endif if (((per.l(ad:0x4ac10000+0x04))&0x400)==0x400) rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 11.--15. " LSPI ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020" else rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 10. " SECURITYEXTN ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020" endif rgroup.long 0x0008++0x03 line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register" bitfld.long 0x00 24.--31. " PRODID ,Indicates the product ID" "PL390,PL390,GIC400,GIC400,?..." bitfld.long 0x00 16.--19. " VAR ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " REV ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" sif CPU.FEATURE(hypervisor)||CPU.FEATURE(secure) width 17. tree "Group/Security Registers" if PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x0080) group.long 0x0080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Secure Access)" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0 (Secure),Group 1 (Non-secure)" else group.long 0x0080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0,Group 1" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0,Group 1" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0,Group 1" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0,Group 1" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0,Group 1" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0,Group 1" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0,Group 1" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0,Group 1" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0,Group 1" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0,Group 1" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0,Group 1" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0,Group 1" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0,Group 1" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0,Group 1" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0,Group 1" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0,Group 1" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0,Group 1" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0,Group 1" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0,Group 1" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0,Group 1" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0,Group 1" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0,Group 1" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x01)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x0084)) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Secure Access)" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x01) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Non-secure access)" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0,Group 1" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0,Group 1" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0,Group 1" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0,Group 1" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0,Group 1" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0,Group 1" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0,Group 1" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0,Group 1" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0,Group 1" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0,Group 1" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0,Group 1" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0,Group 1" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0,Group 1" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0,Group 1" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0,Group 1" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0,Group 1" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0,Group 1" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0,Group 1" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0,Group 1" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0,Group 1" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0,Group 1" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0,Group 1" else rgroup.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x02)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x0088)) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Secure access)" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x02) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Non-secure access)" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0,Group 1" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0,Group 1" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0,Group 1" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0,Group 1" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0,Group 1" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0,Group 1" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0,Group 1" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0,Group 1" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0,Group 1" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0,Group 1" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0,Group 1" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0,Group 1" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0,Group 1" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0,Group 1" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0,Group 1" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0,Group 1" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0,Group 1" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0,Group 1" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0,Group 1" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0,Group 1" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0,Group 1" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0,Group 1" else rgroup.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x03)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x008C)) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Secure access)" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x03) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Non-secure access)" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0,Group 1" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0,Group 1" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0,Group 1" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0,Group 1" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0,Group 1" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0,Group 1" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0,Group 1" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0,Group 1" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0,Group 1" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0,Group 1" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0,Group 1" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0,Group 1" else rgroup.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x04)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x0090)) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Secure access)" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x04) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Non-secure access)" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0,Group 1" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0,Group 1" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0,Group 1" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0,Group 1" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0,Group 1" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0,Group 1" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0,Group 1" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0,Group 1" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0,Group 1" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0,Group 1" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0,Group 1" else rgroup.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x05)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x0094)) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Secure access)" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x05) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Non-secure access)" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0,Group 1" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0,Group 1" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0,Group 1" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0,Group 1" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0,Group 1" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0,Group 1" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0,Group 1" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0,Group 1" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0,Group 1" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0,Group 1" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0,Group 1" else rgroup.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x06)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x0098)) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Secure access)" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x06) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Non-secure access)" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0,Group 1" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0,Group 1" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0,Group 1" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0,Group 1" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0,Group 1" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0,Group 1" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0,Group 1" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0,Group 1" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0,Group 1" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0,Group 1" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0,Group 1" else rgroup.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x07)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x009C)) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Secure access)" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x07) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Non-secure access)" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0,Group 1" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0,Group 1" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0,Group 1" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0,Group 1" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0,Group 1" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0,Group 1" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0,Group 1" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0,Group 1" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0,Group 1" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0,Group 1" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0,Group 1" else rgroup.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x08)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00A0)) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Secure access)" bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x08) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Non-secure access)" bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1" bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0,Group 1" bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1" bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0,Group 1" bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1" bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0,Group 1" bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1" bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0,Group 1" bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1" bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0,Group 1" bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1" bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0,Group 1" bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1" bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0,Group 1" bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1" bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0,Group 1" bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1" bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0,Group 1" bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1" bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0,Group 1" bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1" bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0,Group 1" else rgroup.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x09)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00A4)) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Secure access)" bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x09) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Non-secure access)" bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1" bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0,Group 1" bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1" bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0,Group 1" bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1" bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0,Group 1" bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1" bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0,Group 1" bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1" bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0,Group 1" bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1" bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0,Group 1" bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1" bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0,Group 1" bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1" bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0,Group 1" bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1" bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0,Group 1" bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1" bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0,Group 1" bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1" bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0,Group 1" else rgroup.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0A)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00A8)) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Secure access)" bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0A) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Non-secure access)" bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1" bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0,Group 1" bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1" bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0,Group 1" bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1" bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0,Group 1" bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1" bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0,Group 1" bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1" bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0,Group 1" bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1" bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0,Group 1" bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1" bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0,Group 1" bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1" bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0,Group 1" bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1" bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0,Group 1" bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1" bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0,Group 1" bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1" bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0,Group 1" else rgroup.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0B)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00AC)) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Secure access)" bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0B) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Non-secure access)" bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1" bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0,Group 1" bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1" bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0,Group 1" bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1" bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0,Group 1" bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1" bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0,Group 1" bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1" bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0,Group 1" bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1" bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0,Group 1" bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1" bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0,Group 1" bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1" bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0,Group 1" bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1" bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0,Group 1" bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1" bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0,Group 1" bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1" bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0,Group 1" else rgroup.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0C)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00B0)) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Secure access)" bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0C) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Non-secure access)" bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1" bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0,Group 1" bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1" bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0,Group 1" bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1" bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0,Group 1" bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1" bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0,Group 1" bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1" bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0,Group 1" bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1" bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0,Group 1" bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1" bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0,Group 1" bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1" bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0,Group 1" bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1" bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0,Group 1" bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1" bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0,Group 1" bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1" bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0,Group 1" else rgroup.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0D)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00B4)) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Secure access)" bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0D) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Non-secure access)" bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1" bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0,Group 1" bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1" bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0,Group 1" bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1" bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0,Group 1" bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1" bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0,Group 1" bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1" bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0,Group 1" bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1" bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0,Group 1" bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1" bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0,Group 1" bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1" bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0,Group 1" bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1" bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0,Group 1" bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1" bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0,Group 1" bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1" bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0,Group 1" else rgroup.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0E)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00B8)) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Secure access)" bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0E) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Non-secure access)" bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1" bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0,Group 1" bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1" bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0,Group 1" bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1" bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0,Group 1" bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1" bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0,Group 1" bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1" bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0,Group 1" bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1" bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0,Group 1" bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1" bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0,Group 1" bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1" bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0,Group 1" bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1" bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0,Group 1" bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1" bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0,Group 1" bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1" bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0,Group 1" else rgroup.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0F)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00BC)) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Secure access)" bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0F) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Non-secure access)" bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1" bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0,Group 1" bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1" bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0,Group 1" bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1" bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0,Group 1" bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1" bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0,Group 1" bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1" bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0,Group 1" bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1" bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0,Group 1" bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1" bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0,Group 1" bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1" bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0,Group 1" bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1" bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0,Group 1" bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1" bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0,Group 1" bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1" bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0,Group 1" else rgroup.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x10)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00C0)) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Secure access)" bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x10) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Non-secure access)" bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0,Group 1" bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0,Group 1" bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0,Group 1" bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0,Group 1" bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0,Group 1" bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0,Group 1" bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0,Group 1" bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0,Group 1" bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0,Group 1" bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0,Group 1" bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0,Group 1" bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0,Group 1" bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0,Group 1" bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0,Group 1" bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0,Group 1" bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0,Group 1" bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0,Group 1" bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0,Group 1" bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0,Group 1" bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0,Group 1" bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0,Group 1" bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0,Group 1" else rgroup.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x11)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00C4)) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Secure access)" bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x11) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Non-secure access)" bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0,Group 1" bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0,Group 1" bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0,Group 1" bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0,Group 1" bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0,Group 1" bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0,Group 1" bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0,Group 1" bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0,Group 1" bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0,Group 1" bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0,Group 1" bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0,Group 1" bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0,Group 1" bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0,Group 1" bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0,Group 1" bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0,Group 1" bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0,Group 1" bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0,Group 1" bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0,Group 1" bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0,Group 1" bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0,Group 1" bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0,Group 1" bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0,Group 1" else rgroup.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x12)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00C8)) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Secure access)" bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x12) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Non-secure access)" bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0,Group 1" bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0,Group 1" bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0,Group 1" bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0,Group 1" bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0,Group 1" bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0,Group 1" bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0,Group 1" bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0,Group 1" bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0,Group 1" bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0,Group 1" bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0,Group 1" bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0,Group 1" bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0,Group 1" bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0,Group 1" bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0,Group 1" bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0,Group 1" bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0,Group 1" bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0,Group 1" bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0,Group 1" bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0,Group 1" bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0,Group 1" bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0,Group 1" else rgroup.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x13)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00CC)) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Secure access)" bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x13) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Non-secure access)" bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0,Group 1" bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0,Group 1" bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0,Group 1" bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0,Group 1" bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0,Group 1" bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0,Group 1" bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0,Group 1" bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0,Group 1" bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0,Group 1" bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0,Group 1" bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0,Group 1" bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0,Group 1" bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0,Group 1" bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0,Group 1" bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0,Group 1" bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0,Group 1" bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0,Group 1" bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0,Group 1" bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0,Group 1" bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0,Group 1" bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0,Group 1" bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0,Group 1" else rgroup.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x14)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00D0)) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Secure access)" bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x14) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Non-secure access)" bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0,Group 1" bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0,Group 1" bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0,Group 1" bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0,Group 1" bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0,Group 1" bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0,Group 1" bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0,Group 1" bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0,Group 1" bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0,Group 1" bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0,Group 1" bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0,Group 1" bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0,Group 1" bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0,Group 1" bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0,Group 1" bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0,Group 1" bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0,Group 1" bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0,Group 1" bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0,Group 1" bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0,Group 1" bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0,Group 1" bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0,Group 1" bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0,Group 1" else rgroup.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x15)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00D4)) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Secure access)" bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x15) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Non-secure access)" bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0,Group 1" bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0,Group 1" bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0,Group 1" bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0,Group 1" bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0,Group 1" bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0,Group 1" bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0,Group 1" bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0,Group 1" bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0,Group 1" bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0,Group 1" bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0,Group 1" bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0,Group 1" bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0,Group 1" bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0,Group 1" bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0,Group 1" bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0,Group 1" bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0,Group 1" bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0,Group 1" bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0,Group 1" bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0,Group 1" bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0,Group 1" bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0,Group 1" else rgroup.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x16)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00D8)) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Secure access)" bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x16) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Non-secure access)" bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0,Group 1" bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0,Group 1" bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0,Group 1" bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0,Group 1" bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0,Group 1" bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0,Group 1" bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0,Group 1" bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0,Group 1" bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0,Group 1" bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0,Group 1" bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0,Group 1" bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0,Group 1" bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0,Group 1" bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0,Group 1" bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0,Group 1" bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0,Group 1" bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0,Group 1" bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0,Group 1" bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0,Group 1" bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0,Group 1" bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0,Group 1" bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0,Group 1" else rgroup.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x17)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00DC)) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Secure access)" bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x17) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Non-secure access)" bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0,Group 1" bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0,Group 1" bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0,Group 1" bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0,Group 1" bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0,Group 1" bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0,Group 1" bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0,Group 1" bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0,Group 1" bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0,Group 1" bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0,Group 1" bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0,Group 1" bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0,Group 1" bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0,Group 1" bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0,Group 1" bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0,Group 1" bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0,Group 1" bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0,Group 1" bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0,Group 1" bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0,Group 1" bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0,Group 1" bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0,Group 1" bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0,Group 1" else rgroup.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x18)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00E0)) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Secure access)" bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x18) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Non-secure access)" bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0,Group 1" bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0,Group 1" bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0,Group 1" bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0,Group 1" bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0,Group 1" bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0,Group 1" bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0,Group 1" bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0,Group 1" bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0,Group 1" bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0,Group 1" bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0,Group 1" bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0,Group 1" bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0,Group 1" bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0,Group 1" bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0,Group 1" bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0,Group 1" bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0,Group 1" bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0,Group 1" bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0,Group 1" bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0,Group 1" bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0,Group 1" bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0,Group 1" else rgroup.long 0x0E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x19)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00E4)) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Secure access)" bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x19) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Non-secure access)" bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0,Group 1" bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0,Group 1" bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0,Group 1" bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0,Group 1" bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0,Group 1" bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0,Group 1" bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0,Group 1" bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0,Group 1" bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0,Group 1" bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0,Group 1" bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0,Group 1" bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0,Group 1" bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0,Group 1" bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0,Group 1" bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0,Group 1" bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0,Group 1" bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0,Group 1" bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0,Group 1" bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0,Group 1" bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0,Group 1" bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0,Group 1" bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0,Group 1" else rgroup.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1A)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00E8)) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Secure access)" bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1A) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Non-secure access)" bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0,Group 1" bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0,Group 1" bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0,Group 1" bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0,Group 1" bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0,Group 1" bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0,Group 1" bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0,Group 1" bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0,Group 1" bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0,Group 1" bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0,Group 1" bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0,Group 1" bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0,Group 1" bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0,Group 1" bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0,Group 1" bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0,Group 1" bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0,Group 1" bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0,Group 1" bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0,Group 1" bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0,Group 1" bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0,Group 1" bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0,Group 1" bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0,Group 1" else rgroup.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1B)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00EC)) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Secure access)" bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1B) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Non-Secure access)" bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0,Group 1" bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0,Group 1" bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0,Group 1" bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0,Group 1" bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0,Group 1" bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0,Group 1" bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0,Group 1" bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0,Group 1" bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0,Group 1" bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0,Group 1" bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0,Group 1" bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0,Group 1" bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0,Group 1" bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0,Group 1" bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0,Group 1" bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0,Group 1" bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0,Group 1" bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0,Group 1" bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0,Group 1" bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0,Group 1" bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0,Group 1" bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0,Group 1" else rgroup.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1C)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00F0)) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Secure access)" bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1C) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Non-secure access)" bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0,Group 1" bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0,Group 1" bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0,Group 1" bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0,Group 1" bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0,Group 1" bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0,Group 1" bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0,Group 1" bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0,Group 1" bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0,Group 1" bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0,Group 1" bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0,Group 1" bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0,Group 1" bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0,Group 1" bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0,Group 1" bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0,Group 1" bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0,Group 1" bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0,Group 1" bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0,Group 1" bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0,Group 1" bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0,Group 1" bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0,Group 1" bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0,Group 1" else rgroup.long 0x0F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1D)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00F4)) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Secure access)" bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1D) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Non-secure access)" bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0,Group 1" bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0,Group 1" bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0,Group 1" bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0,Group 1" bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0,Group 1" bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0,Group 1" bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0,Group 1" bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0,Group 1" bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0,Group 1" bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0,Group 1" bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0,Group 1" bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0,Group 1" bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0,Group 1" bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0,Group 1" bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0,Group 1" bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0,Group 1" bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0,Group 1" bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0,Group 1" bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0,Group 1" bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0,Group 1" bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0,Group 1" bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0,Group 1" else rgroup.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1E)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00F8)) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Secure access)" bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1E) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Non-secure access)" bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0,Group 1" bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0,Group 1" bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0,Group 1" bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0,Group 1" bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0,Group 1" bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0,Group 1" bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0,Group 1" bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0,Group 1" bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0,Group 1" bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0,Group 1" bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0,Group 1" bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0,Group 1" bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0,Group 1" bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0,Group 1" bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0,Group 1" bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0,Group 1" bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0,Group 1" bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0,Group 1" bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0,Group 1" bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0,Group 1" bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0,Group 1" bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0,Group 1" else rgroup.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)==0x1F)&&(PER.ADDRESS.isSECUREEX(ad:0x4ac10000+0x00FC)) group.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Secure access)" bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x4ac10000+0x04))&0x0000001F)==0x1F) group.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Non-secure access)" bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0,Group 1" bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0,Group 1" bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0,Group 1" bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0,Group 1" bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0,Group 1" bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0,Group 1" bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0,Group 1" bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0,Group 1" bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0,Group 1" bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0,Group 1" bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0,Group 1" bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0,Group 1" bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0,Group 1" bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0,Group 1" bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0,Group 1" bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0,Group 1" bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0,Group 1" bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0,Group 1" bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0,Group 1" else rgroup.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end endif width 24. tree "Set/Clear Enable Registers" group.long 0x0100++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31 ,Set/Clear Enable Bit 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB30 ,Set/Clear Enable Bit 30" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB29 ,Set/Clear Enable Bit 29" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28 ,Set/Clear Enable Bit 28" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB27 ,Set/Clear Enable Bit 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB26 ,Set/Clear Enable Bit 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25 ,Set/Clear Enable Bit 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB24 ,Set/Clear Enable Bit 24" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB23 ,Set/Clear Enable Bit 23" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22 ,Set/Clear Enable Bit 22" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB21 ,Set/Clear Enable Bit 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB20 ,Set/Clear Enable Bit 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19 ,Set/Clear Enable Bit 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB18 ,Set/Clear Enable Bit 18" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB17 ,Set/Clear Enable Bit 17" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16 ,Set/Clear Enable Bit 16" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB15 ,Set/Clear Enable Bit 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB14 ,Set/Clear Enable Bit 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB13 ,Set/Clear Enable Bit 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB12 ,Set/Clear Enable Bit 12" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB11 ,Set/Clear Enable Bit 11" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB10 ,Set/Clear Enable Bit 10" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB9 ,Set/Clear Enable Bit 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB8 ,Set/Clear Enable Bit 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB7 ,Set/Clear Enable Bit 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB6 ,Set/Clear Enable Bit 6" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB5 ,Set/Clear Enable Bit 5" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB4 ,Set/Clear Enable Bit 4" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB3 ,Set/Clear Enable Bit 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB2 ,Set/Clear Enable Bit 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB1 ,Set/Clear Enable Bit 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB0 ,Set/Clear Enable Bit 0" "Disabled,Enabled" if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x01) group.long 0x0104++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63 ,Set/Clear Enable Bit 63" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB62 ,Set/Clear Enable Bit 62" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB61 ,Set/Clear Enable Bit 61" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60 ,Set/Clear Enable Bit 60" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB59 ,Set/Clear Enable Bit 59" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB58 ,Set/Clear Enable Bit 58" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57 ,Set/Clear Enable Bit 57" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB56 ,Set/Clear Enable Bit 56" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB55 ,Set/Clear Enable Bit 55" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54 ,Set/Clear Enable Bit 54" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB53 ,Set/Clear Enable Bit 53" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB52 ,Set/Clear Enable Bit 52" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51 ,Set/Clear Enable Bit 51" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB50 ,Set/Clear Enable Bit 50" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB49 ,Set/Clear Enable Bit 49" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48 ,Set/Clear Enable Bit 48" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB47 ,Set/Clear Enable Bit 47" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB46 ,Set/Clear Enable Bit 46" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45 ,Set/Clear Enable Bit 45" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB44 ,Set/Clear Enable Bit 44" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB43 ,Set/Clear Enable Bit 43" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42 ,Set/Clear Enable Bit 42" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB41 ,Set/Clear Enable Bit 41" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB40 ,Set/Clear Enable Bit 40" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39 ,Set/Clear Enable Bit 39" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB38 ,Set/Clear Enable Bit 38" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB37 ,Set/Clear Enable Bit 37" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36 ,Set/Clear Enable Bit 36" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB35 ,Set/Clear Enable Bit 35" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB34 ,Set/Clear Enable Bit 34" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33 ,Set/Clear Enable Bit 33" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB32 ,Set/Clear Enable Bit 32" "Disabled,Enabled" else rgroup.long 0x0104++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x02) group.long 0x0108++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95 ,Set/Clear Enable Bit 95" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB94 ,Set/Clear Enable Bit 94" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB93 ,Set/Clear Enable Bit 93" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92 ,Set/Clear Enable Bit 92" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB91 ,Set/Clear Enable Bit 91" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB90 ,Set/Clear Enable Bit 90" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89 ,Set/Clear Enable Bit 89" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB88 ,Set/Clear Enable Bit 88" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB87 ,Set/Clear Enable Bit 87" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86 ,Set/Clear Enable Bit 86" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB85 ,Set/Clear Enable Bit 85" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB84 ,Set/Clear Enable Bit 84" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83 ,Set/Clear Enable Bit 83" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB82 ,Set/Clear Enable Bit 82" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB81 ,Set/Clear Enable Bit 81" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80 ,Set/Clear Enable Bit 80" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB79 ,Set/Clear Enable Bit 79" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB78 ,Set/Clear Enable Bit 78" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77 ,Set/Clear Enable Bit 77" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB76 ,Set/Clear Enable Bit 76" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB75 ,Set/Clear Enable Bit 75" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74 ,Set/Clear Enable Bit 74" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB73 ,Set/Clear Enable Bit 73" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB72 ,Set/Clear Enable Bit 72" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71 ,Set/Clear Enable Bit 71" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB70 ,Set/Clear Enable Bit 70" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB69 ,Set/Clear Enable Bit 69" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68 ,Set/Clear Enable Bit 68" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB67 ,Set/Clear Enable Bit 67" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB66 ,Set/Clear Enable Bit 66" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65 ,Set/Clear Enable Bit 65" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB64 ,Set/Clear Enable Bit 64" "Disabled,Enabled" else rgroup.long 0x0108++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x03) group.long 0x010C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127 ,Set/Clear Enable Bit 127" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB126 ,Set/Clear Enable Bit 126" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB125 ,Set/Clear Enable Bit 125" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124 ,Set/Clear Enable Bit 124" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB123 ,Set/Clear Enable Bit 123" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB122 ,Set/Clear Enable Bit 122" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121 ,Set/Clear Enable Bit 121" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB120 ,Set/Clear Enable Bit 120" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB119 ,Set/Clear Enable Bit 119" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118 ,Set/Clear Enable Bit 118" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB117 ,Set/Clear Enable Bit 117" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB116 ,Set/Clear Enable Bit 116" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115 ,Set/Clear Enable Bit 115" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB114 ,Set/Clear Enable Bit 114" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB113 ,Set/Clear Enable Bit 113" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112 ,Set/Clear Enable Bit 112" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB111 ,Set/Clear Enable Bit 111" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB110 ,Set/Clear Enable Bit 110" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109 ,Set/Clear Enable Bit 109" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB108 ,Set/Clear Enable Bit 108" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB107 ,Set/Clear Enable Bit 107" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106 ,Set/Clear Enable Bit 106" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB105 ,Set/Clear Enable Bit 105" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB104 ,Set/Clear Enable Bit 104" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103 ,Set/Clear Enable Bit 103" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB102 ,Set/Clear Enable Bit 102" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB101 ,Set/Clear Enable Bit 101" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100 ,Set/Clear Enable Bit 100" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB99 ,Set/Clear Enable Bit 99" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB98 ,Set/Clear Enable Bit 98" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97 ,Set/Clear Enable Bit 97" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB96 ,Set/Clear Enable Bit 96" "Disabled,Enabled" else rgroup.long 0x010C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x04) group.long 0x0110++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159 ,Set/Clear Enable Bit 159" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB158 ,Set/Clear Enable Bit 158" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB157 ,Set/Clear Enable Bit 157" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156 ,Set/Clear Enable Bit 156" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB155 ,Set/Clear Enable Bit 155" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB154 ,Set/Clear Enable Bit 154" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153 ,Set/Clear Enable Bit 153" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB152 ,Set/Clear Enable Bit 152" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB151 ,Set/Clear Enable Bit 151" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150 ,Set/Clear Enable Bit 150" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB149 ,Set/Clear Enable Bit 149" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB148 ,Set/Clear Enable Bit 148" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147 ,Set/Clear Enable Bit 147" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB146 ,Set/Clear Enable Bit 146" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB145 ,Set/Clear Enable Bit 145" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144 ,Set/Clear Enable Bit 144" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB143 ,Set/Clear Enable Bit 143" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB142 ,Set/Clear Enable Bit 142" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141 ,Set/Clear Enable Bit 141" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB140 ,Set/Clear Enable Bit 140" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB139 ,Set/Clear Enable Bit 139" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138 ,Set/Clear Enable Bit 138" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB137 ,Set/Clear Enable Bit 137" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB136 ,Set/Clear Enable Bit 136" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135 ,Set/Clear Enable Bit 135" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB134 ,Set/Clear Enable Bit 134" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB133 ,Set/Clear Enable Bit 133" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132 ,Set/Clear Enable Bit 132" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB131 ,Set/Clear Enable Bit 131" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB130 ,Set/Clear Enable Bit 130" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129 ,Set/Clear Enable Bit 129" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB128 ,Set/Clear Enable Bit 128" "Disabled,Enabled" else rgroup.long 0x0110++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x05) group.long 0x0114++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191 ,Set/Clear Enable Bit 191" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB190 ,Set/Clear Enable Bit 190" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB189 ,Set/Clear Enable Bit 189" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188 ,Set/Clear Enable Bit 188" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB187 ,Set/Clear Enable Bit 187" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB186 ,Set/Clear Enable Bit 186" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185 ,Set/Clear Enable Bit 185" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB184 ,Set/Clear Enable Bit 184" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB183 ,Set/Clear Enable Bit 183" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182 ,Set/Clear Enable Bit 182" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB181 ,Set/Clear Enable Bit 181" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB180 ,Set/Clear Enable Bit 180" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179 ,Set/Clear Enable Bit 179" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB178 ,Set/Clear Enable Bit 178" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB177 ,Set/Clear Enable Bit 177" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176 ,Set/Clear Enable Bit 176" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB175 ,Set/Clear Enable Bit 175" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB174 ,Set/Clear Enable Bit 174" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173 ,Set/Clear Enable Bit 173" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB172 ,Set/Clear Enable Bit 172" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB171 ,Set/Clear Enable Bit 171" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170 ,Set/Clear Enable Bit 170" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB169 ,Set/Clear Enable Bit 169" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB168 ,Set/Clear Enable Bit 168" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167 ,Set/Clear Enable Bit 167" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB166 ,Set/Clear Enable Bit 166" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB165 ,Set/Clear Enable Bit 165" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164 ,Set/Clear Enable Bit 164" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB163 ,Set/Clear Enable Bit 163" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB162 ,Set/Clear Enable Bit 162" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161 ,Set/Clear Enable Bit 161" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB160 ,Set/Clear Enable Bit 160" "Disabled,Enabled" else rgroup.long 0x0114++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x06) group.long 0x0118++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223 ,Set/Clear Enable Bit 223" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB222 ,Set/Clear Enable Bit 222" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB221 ,Set/Clear Enable Bit 221" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220 ,Set/Clear Enable Bit 220" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB219 ,Set/Clear Enable Bit 219" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB218 ,Set/Clear Enable Bit 218" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217 ,Set/Clear Enable Bit 217" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB216 ,Set/Clear Enable Bit 216" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB215 ,Set/Clear Enable Bit 215" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214 ,Set/Clear Enable Bit 214" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB213 ,Set/Clear Enable Bit 213" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB212 ,Set/Clear Enable Bit 212" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211 ,Set/Clear Enable Bit 211" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB210 ,Set/Clear Enable Bit 210" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB209 ,Set/Clear Enable Bit 209" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208 ,Set/Clear Enable Bit 208" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB207 ,Set/Clear Enable Bit 207" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB206 ,Set/Clear Enable Bit 206" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205 ,Set/Clear Enable Bit 205" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB204 ,Set/Clear Enable Bit 204" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB203 ,Set/Clear Enable Bit 203" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202 ,Set/Clear Enable Bit 202" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB201 ,Set/Clear Enable Bit 201" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB200 ,Set/Clear Enable Bit 200" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199 ,Set/Clear Enable Bit 199" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB198 ,Set/Clear Enable Bit 198" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB197 ,Set/Clear Enable Bit 197" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196 ,Set/Clear Enable Bit 196" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB195 ,Set/Clear Enable Bit 195" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB194 ,Set/Clear Enable Bit 194" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193 ,Set/Clear Enable Bit 193" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB192 ,Set/Clear Enable Bit 192" "Disabled,Enabled" else rgroup.long 0x0118++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x07) group.long 0x011C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255 ,Set/Clear Enable Bit 255" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB254 ,Set/Clear Enable Bit 254" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB253 ,Set/Clear Enable Bit 253" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252 ,Set/Clear Enable Bit 252" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB251 ,Set/Clear Enable Bit 251" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB250 ,Set/Clear Enable Bit 250" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249 ,Set/Clear Enable Bit 249" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB248 ,Set/Clear Enable Bit 248" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB247 ,Set/Clear Enable Bit 247" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246 ,Set/Clear Enable Bit 246" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB245 ,Set/Clear Enable Bit 245" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB244 ,Set/Clear Enable Bit 244" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243 ,Set/Clear Enable Bit 243" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB242 ,Set/Clear Enable Bit 242" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB241 ,Set/Clear Enable Bit 241" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240 ,Set/Clear Enable Bit 240" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB239 ,Set/Clear Enable Bit 239" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB238 ,Set/Clear Enable Bit 238" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237 ,Set/Clear Enable Bit 237" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB236 ,Set/Clear Enable Bit 236" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB235 ,Set/Clear Enable Bit 235" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234 ,Set/Clear Enable Bit 234" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB233 ,Set/Clear Enable Bit 233" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB232 ,Set/Clear Enable Bit 232" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231 ,Set/Clear Enable Bit 231" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB230 ,Set/Clear Enable Bit 230" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB229 ,Set/Clear Enable Bit 229" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228 ,Set/Clear Enable Bit 228" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB227 ,Set/Clear Enable Bit 227" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB226 ,Set/Clear Enable Bit 226" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225 ,Set/Clear Enable Bit 225" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB224 ,Set/Clear Enable Bit 224" "Disabled,Enabled" else rgroup.long 0x011C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x08) group.long 0x0120++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287 ,Set/Clear Enable Bit 287" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB286 ,Set/Clear Enable Bit 286" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB285 ,Set/Clear Enable Bit 285" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284 ,Set/Clear Enable Bit 284" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB283 ,Set/Clear Enable Bit 283" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB282 ,Set/Clear Enable Bit 282" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281 ,Set/Clear Enable Bit 281" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB280 ,Set/Clear Enable Bit 280" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB279 ,Set/Clear Enable Bit 279" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278 ,Set/Clear Enable Bit 278" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB277 ,Set/Clear Enable Bit 277" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB276 ,Set/Clear Enable Bit 276" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275 ,Set/Clear Enable Bit 275" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB274 ,Set/Clear Enable Bit 274" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB273 ,Set/Clear Enable Bit 273" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272 ,Set/Clear Enable Bit 272" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB271 ,Set/Clear Enable Bit 271" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB270 ,Set/Clear Enable Bit 270" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269 ,Set/Clear Enable Bit 269" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB268 ,Set/Clear Enable Bit 268" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB267 ,Set/Clear Enable Bit 267" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266 ,Set/Clear Enable Bit 266" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB265 ,Set/Clear Enable Bit 265" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB264 ,Set/Clear Enable Bit 264" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263 ,Set/Clear Enable Bit 263" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB262 ,Set/Clear Enable Bit 262" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB261 ,Set/Clear Enable Bit 261" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260 ,Set/Clear Enable Bit 260" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB259 ,Set/Clear Enable Bit 259" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB258 ,Set/Clear Enable Bit 258" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257 ,Set/Clear Enable Bit 257" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB256 ,Set/Clear Enable Bit 256" "Disabled,Enabled" else rgroup.long 0x0120++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x09) group.long 0x0124++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319 ,Set/Clear Enable Bit 319" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB318 ,Set/Clear Enable Bit 318" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB317 ,Set/Clear Enable Bit 317" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316 ,Set/Clear Enable Bit 316" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB315 ,Set/Clear Enable Bit 315" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB314 ,Set/Clear Enable Bit 314" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313 ,Set/Clear Enable Bit 313" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB312 ,Set/Clear Enable Bit 312" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB311 ,Set/Clear Enable Bit 311" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310 ,Set/Clear Enable Bit 310" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB309 ,Set/Clear Enable Bit 309" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB308 ,Set/Clear Enable Bit 308" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307 ,Set/Clear Enable Bit 307" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB306 ,Set/Clear Enable Bit 306" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB305 ,Set/Clear Enable Bit 305" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304 ,Set/Clear Enable Bit 304" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB303 ,Set/Clear Enable Bit 303" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB302 ,Set/Clear Enable Bit 302" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301 ,Set/Clear Enable Bit 301" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB300 ,Set/Clear Enable Bit 300" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB299 ,Set/Clear Enable Bit 299" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298 ,Set/Clear Enable Bit 298" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB297 ,Set/Clear Enable Bit 297" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB296 ,Set/Clear Enable Bit 296" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295 ,Set/Clear Enable Bit 295" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB294 ,Set/Clear Enable Bit 294" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB293 ,Set/Clear Enable Bit 293" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292 ,Set/Clear Enable Bit 292" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB291 ,Set/Clear Enable Bit 291" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB290 ,Set/Clear Enable Bit 290" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289 ,Set/Clear Enable Bit 289" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB288 ,Set/Clear Enable Bit 288" "Disabled,Enabled" else rgroup.long 0x0124++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0A) group.long 0x0128++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351 ,Set/Clear Enable Bit 351" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB350 ,Set/Clear Enable Bit 350" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB349 ,Set/Clear Enable Bit 349" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348 ,Set/Clear Enable Bit 348" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB347 ,Set/Clear Enable Bit 347" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB346 ,Set/Clear Enable Bit 346" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345 ,Set/Clear Enable Bit 345" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB344 ,Set/Clear Enable Bit 344" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB343 ,Set/Clear Enable Bit 343" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342 ,Set/Clear Enable Bit 342" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB341 ,Set/Clear Enable Bit 341" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB340 ,Set/Clear Enable Bit 340" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339 ,Set/Clear Enable Bit 339" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB338 ,Set/Clear Enable Bit 338" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB337 ,Set/Clear Enable Bit 337" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336 ,Set/Clear Enable Bit 336" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB335 ,Set/Clear Enable Bit 335" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB334 ,Set/Clear Enable Bit 334" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333 ,Set/Clear Enable Bit 333" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB332 ,Set/Clear Enable Bit 332" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB331 ,Set/Clear Enable Bit 331" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330 ,Set/Clear Enable Bit 330" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB329 ,Set/Clear Enable Bit 329" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB328 ,Set/Clear Enable Bit 328" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327 ,Set/Clear Enable Bit 327" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB326 ,Set/Clear Enable Bit 326" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB325 ,Set/Clear Enable Bit 325" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324 ,Set/Clear Enable Bit 324" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB323 ,Set/Clear Enable Bit 323" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB322 ,Set/Clear Enable Bit 322" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321 ,Set/Clear Enable Bit 321" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB320 ,Set/Clear Enable Bit 320" "Disabled,Enabled" else rgroup.long 0x0128++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0B) group.long 0x012C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383 ,Set/Clear Enable Bit 383" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB382 ,Set/Clear Enable Bit 382" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB381 ,Set/Clear Enable Bit 381" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380 ,Set/Clear Enable Bit 380" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB379 ,Set/Clear Enable Bit 379" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB378 ,Set/Clear Enable Bit 378" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377 ,Set/Clear Enable Bit 377" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB376 ,Set/Clear Enable Bit 376" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB375 ,Set/Clear Enable Bit 375" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374 ,Set/Clear Enable Bit 374" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB373 ,Set/Clear Enable Bit 373" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB372 ,Set/Clear Enable Bit 372" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371 ,Set/Clear Enable Bit 371" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB370 ,Set/Clear Enable Bit 370" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB369 ,Set/Clear Enable Bit 369" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368 ,Set/Clear Enable Bit 368" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB367 ,Set/Clear Enable Bit 367" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB366 ,Set/Clear Enable Bit 366" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365 ,Set/Clear Enable Bit 365" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB364 ,Set/Clear Enable Bit 364" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB363 ,Set/Clear Enable Bit 363" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362 ,Set/Clear Enable Bit 362" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB361 ,Set/Clear Enable Bit 361" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB360 ,Set/Clear Enable Bit 360" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359 ,Set/Clear Enable Bit 359" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB358 ,Set/Clear Enable Bit 358" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB357 ,Set/Clear Enable Bit 357" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356 ,Set/Clear Enable Bit 356" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB355 ,Set/Clear Enable Bit 355" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB354 ,Set/Clear Enable Bit 354" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353 ,Set/Clear Enable Bit 353" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB352 ,Set/Clear Enable Bit 352" "Disabled,Enabled" else rgroup.long 0x012C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0C) group.long 0x0130++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415 ,Set/Clear Enable Bit 415" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB414 ,Set/Clear Enable Bit 414" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB413 ,Set/Clear Enable Bit 413" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412 ,Set/Clear Enable Bit 412" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB411 ,Set/Clear Enable Bit 411" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB410 ,Set/Clear Enable Bit 410" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409 ,Set/Clear Enable Bit 409" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB408 ,Set/Clear Enable Bit 408" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB407 ,Set/Clear Enable Bit 407" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406 ,Set/Clear Enable Bit 406" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB405 ,Set/Clear Enable Bit 405" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB404 ,Set/Clear Enable Bit 404" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403 ,Set/Clear Enable Bit 403" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB402 ,Set/Clear Enable Bit 402" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB401 ,Set/Clear Enable Bit 401" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400 ,Set/Clear Enable Bit 400" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB399 ,Set/Clear Enable Bit 399" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB398 ,Set/Clear Enable Bit 398" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397 ,Set/Clear Enable Bit 397" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB396 ,Set/Clear Enable Bit 396" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB395 ,Set/Clear Enable Bit 395" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394 ,Set/Clear Enable Bit 394" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB393 ,Set/Clear Enable Bit 393" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB392 ,Set/Clear Enable Bit 392" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391 ,Set/Clear Enable Bit 391" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB390 ,Set/Clear Enable Bit 390" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB389 ,Set/Clear Enable Bit 389" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388 ,Set/Clear Enable Bit 388" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB387 ,Set/Clear Enable Bit 387" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB386 ,Set/Clear Enable Bit 386" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385 ,Set/Clear Enable Bit 385" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB384 ,Set/Clear Enable Bit 384" "Disabled,Enabled" else rgroup.long 0x0130++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0D) group.long 0x0134++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447 ,Set/Clear Enable Bit 447" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB446 ,Set/Clear Enable Bit 446" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB445 ,Set/Clear Enable Bit 445" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444 ,Set/Clear Enable Bit 444" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB443 ,Set/Clear Enable Bit 443" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB442 ,Set/Clear Enable Bit 442" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441 ,Set/Clear Enable Bit 441" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB440 ,Set/Clear Enable Bit 440" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB439 ,Set/Clear Enable Bit 439" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438 ,Set/Clear Enable Bit 438" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB437 ,Set/Clear Enable Bit 437" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB436 ,Set/Clear Enable Bit 436" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435 ,Set/Clear Enable Bit 435" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB434 ,Set/Clear Enable Bit 434" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB433 ,Set/Clear Enable Bit 433" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432 ,Set/Clear Enable Bit 432" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB431 ,Set/Clear Enable Bit 431" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB430 ,Set/Clear Enable Bit 430" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429 ,Set/Clear Enable Bit 429" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB428 ,Set/Clear Enable Bit 428" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB427 ,Set/Clear Enable Bit 427" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426 ,Set/Clear Enable Bit 426" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB425 ,Set/Clear Enable Bit 425" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB424 ,Set/Clear Enable Bit 424" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423 ,Set/Clear Enable Bit 423" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB422 ,Set/Clear Enable Bit 422" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB421 ,Set/Clear Enable Bit 421" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420 ,Set/Clear Enable Bit 420" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB419 ,Set/Clear Enable Bit 419" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB418 ,Set/Clear Enable Bit 418" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417 ,Set/Clear Enable Bit 417" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB416 ,Set/Clear Enable Bit 416" "Disabled,Enabled" else rgroup.long 0x0134++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0E) group.long 0x0138++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479 ,Set/Clear Enable Bit 479" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB478 ,Set/Clear Enable Bit 478" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB477 ,Set/Clear Enable Bit 477" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476 ,Set/Clear Enable Bit 476" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB475 ,Set/Clear Enable Bit 475" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB474 ,Set/Clear Enable Bit 474" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473 ,Set/Clear Enable Bit 473" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB472 ,Set/Clear Enable Bit 472" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB471 ,Set/Clear Enable Bit 471" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470 ,Set/Clear Enable Bit 470" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB469 ,Set/Clear Enable Bit 469" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB468 ,Set/Clear Enable Bit 468" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467 ,Set/Clear Enable Bit 467" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB466 ,Set/Clear Enable Bit 466" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB465 ,Set/Clear Enable Bit 465" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464 ,Set/Clear Enable Bit 464" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB463 ,Set/Clear Enable Bit 463" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB462 ,Set/Clear Enable Bit 462" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461 ,Set/Clear Enable Bit 461" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB460 ,Set/Clear Enable Bit 460" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB459 ,Set/Clear Enable Bit 459" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458 ,Set/Clear Enable Bit 458" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB457 ,Set/Clear Enable Bit 457" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB456 ,Set/Clear Enable Bit 456" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455 ,Set/Clear Enable Bit 455" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB454 ,Set/Clear Enable Bit 454" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB453 ,Set/Clear Enable Bit 453" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452 ,Set/Clear Enable Bit 452" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB451 ,Set/Clear Enable Bit 451" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB450 ,Set/Clear Enable Bit 450" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449 ,Set/Clear Enable Bit 449" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB448 ,Set/Clear Enable Bit 448" "Disabled,Enabled" else rgroup.long 0x0138++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0F) group.long 0x013C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511 ,Set/Clear Enable Bit 511" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB510 ,Set/Clear Enable Bit 510" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB509 ,Set/Clear Enable Bit 509" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508 ,Set/Clear Enable Bit 508" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB507 ,Set/Clear Enable Bit 507" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB506 ,Set/Clear Enable Bit 506" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505 ,Set/Clear Enable Bit 505" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB504 ,Set/Clear Enable Bit 504" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB503 ,Set/Clear Enable Bit 503" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502 ,Set/Clear Enable Bit 502" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB501 ,Set/Clear Enable Bit 501" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB500 ,Set/Clear Enable Bit 500" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499 ,Set/Clear Enable Bit 499" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB498 ,Set/Clear Enable Bit 498" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB497 ,Set/Clear Enable Bit 497" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496 ,Set/Clear Enable Bit 496" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB495 ,Set/Clear Enable Bit 495" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB494 ,Set/Clear Enable Bit 494" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493 ,Set/Clear Enable Bit 493" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB492 ,Set/Clear Enable Bit 492" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB491 ,Set/Clear Enable Bit 491" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490 ,Set/Clear Enable Bit 490" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB489 ,Set/Clear Enable Bit 489" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB488 ,Set/Clear Enable Bit 488" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487 ,Set/Clear Enable Bit 487" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB486 ,Set/Clear Enable Bit 486" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB485 ,Set/Clear Enable Bit 485" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484 ,Set/Clear Enable Bit 484" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB483 ,Set/Clear Enable Bit 483" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB482 ,Set/Clear Enable Bit 482" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481 ,Set/Clear Enable Bit 481" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB480 ,Set/Clear Enable Bit 480" "Disabled,Enabled" else rgroup.long 0x013C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x10) group.long 0x0140++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543 ,Set/Clear Enable Bit 543" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB542 ,Set/Clear Enable Bit 542" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB541 ,Set/Clear Enable Bit 541" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540 ,Set/Clear Enable Bit 540" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB539 ,Set/Clear Enable Bit 539" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB538 ,Set/Clear Enable Bit 538" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537 ,Set/Clear Enable Bit 537" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB536 ,Set/Clear Enable Bit 536" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB535 ,Set/Clear Enable Bit 535" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534 ,Set/Clear Enable Bit 534" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB533 ,Set/Clear Enable Bit 533" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB532 ,Set/Clear Enable Bit 532" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531 ,Set/Clear Enable Bit 531" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB530 ,Set/Clear Enable Bit 530" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB529 ,Set/Clear Enable Bit 529" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528 ,Set/Clear Enable Bit 528" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB527 ,Set/Clear Enable Bit 527" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB526 ,Set/Clear Enable Bit 526" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525 ,Set/Clear Enable Bit 525" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB524 ,Set/Clear Enable Bit 524" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB523 ,Set/Clear Enable Bit 523" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522 ,Set/Clear Enable Bit 522" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB521 ,Set/Clear Enable Bit 521" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB520 ,Set/Clear Enable Bit 520" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519 ,Set/Clear Enable Bit 519" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB518 ,Set/Clear Enable Bit 518" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB517 ,Set/Clear Enable Bit 517" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516 ,Set/Clear Enable Bit 516" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB515 ,Set/Clear Enable Bit 515" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB514 ,Set/Clear Enable Bit 514" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513 ,Set/Clear Enable Bit 513" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB512 ,Set/Clear Enable Bit 512" "Disabled,Enabled" else rgroup.long 0x0140++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x11) group.long 0x0144++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575 ,Set/Clear Enable Bit 575" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB574 ,Set/Clear Enable Bit 574" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB573 ,Set/Clear Enable Bit 573" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572 ,Set/Clear Enable Bit 572" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB571 ,Set/Clear Enable Bit 571" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB570 ,Set/Clear Enable Bit 570" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569 ,Set/Clear Enable Bit 569" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB568 ,Set/Clear Enable Bit 568" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB567 ,Set/Clear Enable Bit 567" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566 ,Set/Clear Enable Bit 566" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB565 ,Set/Clear Enable Bit 565" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB564 ,Set/Clear Enable Bit 564" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563 ,Set/Clear Enable Bit 563" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB562 ,Set/Clear Enable Bit 562" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB561 ,Set/Clear Enable Bit 561" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560 ,Set/Clear Enable Bit 560" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB559 ,Set/Clear Enable Bit 559" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB558 ,Set/Clear Enable Bit 558" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557 ,Set/Clear Enable Bit 557" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB556 ,Set/Clear Enable Bit 556" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB555 ,Set/Clear Enable Bit 555" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554 ,Set/Clear Enable Bit 554" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB553 ,Set/Clear Enable Bit 553" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB552 ,Set/Clear Enable Bit 552" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551 ,Set/Clear Enable Bit 551" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB550 ,Set/Clear Enable Bit 550" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB549 ,Set/Clear Enable Bit 549" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548 ,Set/Clear Enable Bit 548" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB547 ,Set/Clear Enable Bit 547" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB546 ,Set/Clear Enable Bit 546" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545 ,Set/Clear Enable Bit 545" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB544 ,Set/Clear Enable Bit 544" "Disabled,Enabled" else rgroup.long 0x0144++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x12) group.long 0x0148++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607 ,Set/Clear Enable Bit 607" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB606 ,Set/Clear Enable Bit 606" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB605 ,Set/Clear Enable Bit 605" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604 ,Set/Clear Enable Bit 604" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB603 ,Set/Clear Enable Bit 603" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB602 ,Set/Clear Enable Bit 602" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601 ,Set/Clear Enable Bit 601" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB600 ,Set/Clear Enable Bit 600" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB599 ,Set/Clear Enable Bit 599" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598 ,Set/Clear Enable Bit 598" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB597 ,Set/Clear Enable Bit 597" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB596 ,Set/Clear Enable Bit 596" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595 ,Set/Clear Enable Bit 595" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB594 ,Set/Clear Enable Bit 594" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB593 ,Set/Clear Enable Bit 593" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592 ,Set/Clear Enable Bit 592" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB591 ,Set/Clear Enable Bit 591" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB590 ,Set/Clear Enable Bit 590" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589 ,Set/Clear Enable Bit 589" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB588 ,Set/Clear Enable Bit 588" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB587 ,Set/Clear Enable Bit 587" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586 ,Set/Clear Enable Bit 586" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB585 ,Set/Clear Enable Bit 585" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB584 ,Set/Clear Enable Bit 584" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583 ,Set/Clear Enable Bit 583" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB582 ,Set/Clear Enable Bit 582" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB581 ,Set/Clear Enable Bit 581" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580 ,Set/Clear Enable Bit 580" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB579 ,Set/Clear Enable Bit 579" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB578 ,Set/Clear Enable Bit 578" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577 ,Set/Clear Enable Bit 577" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB576 ,Set/Clear Enable Bit 576" "Disabled,Enabled" else rgroup.long 0x0148++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x13) group.long 0x014C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639 ,Set/Clear Enable Bit 639" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB638 ,Set/Clear Enable Bit 638" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB637 ,Set/Clear Enable Bit 637" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636 ,Set/Clear Enable Bit 636" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB635 ,Set/Clear Enable Bit 635" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB634 ,Set/Clear Enable Bit 634" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633 ,Set/Clear Enable Bit 633" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB632 ,Set/Clear Enable Bit 632" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB631 ,Set/Clear Enable Bit 631" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630 ,Set/Clear Enable Bit 630" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB629 ,Set/Clear Enable Bit 629" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB628 ,Set/Clear Enable Bit 628" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627 ,Set/Clear Enable Bit 627" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB626 ,Set/Clear Enable Bit 626" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB625 ,Set/Clear Enable Bit 625" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624 ,Set/Clear Enable Bit 624" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB623 ,Set/Clear Enable Bit 623" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB622 ,Set/Clear Enable Bit 622" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621 ,Set/Clear Enable Bit 621" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB620 ,Set/Clear Enable Bit 620" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB619 ,Set/Clear Enable Bit 619" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618 ,Set/Clear Enable Bit 618" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB617 ,Set/Clear Enable Bit 617" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB616 ,Set/Clear Enable Bit 616" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615 ,Set/Clear Enable Bit 615" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB614 ,Set/Clear Enable Bit 614" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB613 ,Set/Clear Enable Bit 613" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612 ,Set/Clear Enable Bit 612" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB611 ,Set/Clear Enable Bit 611" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB610 ,Set/Clear Enable Bit 610" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609 ,Set/Clear Enable Bit 609" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB608 ,Set/Clear Enable Bit 608" "Disabled,Enabled" else rgroup.long 0x014C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x14) group.long 0x0150++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671 ,Set/Clear Enable Bit 671" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB670 ,Set/Clear Enable Bit 670" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB669 ,Set/Clear Enable Bit 669" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668 ,Set/Clear Enable Bit 668" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB667 ,Set/Clear Enable Bit 667" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB666 ,Set/Clear Enable Bit 666" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665 ,Set/Clear Enable Bit 665" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB664 ,Set/Clear Enable Bit 664" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB663 ,Set/Clear Enable Bit 663" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662 ,Set/Clear Enable Bit 662" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB661 ,Set/Clear Enable Bit 661" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB660 ,Set/Clear Enable Bit 660" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659 ,Set/Clear Enable Bit 659" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB658 ,Set/Clear Enable Bit 658" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB657 ,Set/Clear Enable Bit 657" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656 ,Set/Clear Enable Bit 656" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB655 ,Set/Clear Enable Bit 655" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB654 ,Set/Clear Enable Bit 654" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653 ,Set/Clear Enable Bit 653" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB652 ,Set/Clear Enable Bit 652" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB651 ,Set/Clear Enable Bit 651" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650 ,Set/Clear Enable Bit 650" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB649 ,Set/Clear Enable Bit 649" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB648 ,Set/Clear Enable Bit 648" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647 ,Set/Clear Enable Bit 647" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB646 ,Set/Clear Enable Bit 646" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB645 ,Set/Clear Enable Bit 645" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644 ,Set/Clear Enable Bit 644" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB643 ,Set/Clear Enable Bit 643" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB642 ,Set/Clear Enable Bit 642" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641 ,Set/Clear Enable Bit 641" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB640 ,Set/Clear Enable Bit 640" "Disabled,Enabled" else rgroup.long 0x0150++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x15) group.long 0x0154++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703 ,Set/Clear Enable Bit 703" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB702 ,Set/Clear Enable Bit 702" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB701 ,Set/Clear Enable Bit 701" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700 ,Set/Clear Enable Bit 700" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB699 ,Set/Clear Enable Bit 699" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB698 ,Set/Clear Enable Bit 698" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697 ,Set/Clear Enable Bit 697" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB696 ,Set/Clear Enable Bit 696" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB695 ,Set/Clear Enable Bit 695" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694 ,Set/Clear Enable Bit 694" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB693 ,Set/Clear Enable Bit 693" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB692 ,Set/Clear Enable Bit 692" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691 ,Set/Clear Enable Bit 691" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB690 ,Set/Clear Enable Bit 690" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB689 ,Set/Clear Enable Bit 689" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688 ,Set/Clear Enable Bit 688" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB687 ,Set/Clear Enable Bit 687" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB686 ,Set/Clear Enable Bit 686" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685 ,Set/Clear Enable Bit 685" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB684 ,Set/Clear Enable Bit 684" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB683 ,Set/Clear Enable Bit 683" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682 ,Set/Clear Enable Bit 682" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB681 ,Set/Clear Enable Bit 681" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB680 ,Set/Clear Enable Bit 680" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679 ,Set/Clear Enable Bit 679" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB678 ,Set/Clear Enable Bit 678" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB677 ,Set/Clear Enable Bit 677" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676 ,Set/Clear Enable Bit 676" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB675 ,Set/Clear Enable Bit 675" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB674 ,Set/Clear Enable Bit 674" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673 ,Set/Clear Enable Bit 673" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB672 ,Set/Clear Enable Bit 672" "Disabled,Enabled" else rgroup.long 0x0154++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x16) group.long 0x0158++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735 ,Set/Clear Enable Bit 735" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB734 ,Set/Clear Enable Bit 734" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB733 ,Set/Clear Enable Bit 733" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732 ,Set/Clear Enable Bit 732" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB731 ,Set/Clear Enable Bit 731" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB730 ,Set/Clear Enable Bit 730" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729 ,Set/Clear Enable Bit 729" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB728 ,Set/Clear Enable Bit 728" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB727 ,Set/Clear Enable Bit 727" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726 ,Set/Clear Enable Bit 726" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB725 ,Set/Clear Enable Bit 725" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB724 ,Set/Clear Enable Bit 724" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723 ,Set/Clear Enable Bit 723" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB722 ,Set/Clear Enable Bit 722" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB721 ,Set/Clear Enable Bit 721" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720 ,Set/Clear Enable Bit 720" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB719 ,Set/Clear Enable Bit 719" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB718 ,Set/Clear Enable Bit 718" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717 ,Set/Clear Enable Bit 717" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB716 ,Set/Clear Enable Bit 716" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB715 ,Set/Clear Enable Bit 715" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714 ,Set/Clear Enable Bit 714" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB713 ,Set/Clear Enable Bit 713" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB712 ,Set/Clear Enable Bit 712" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711 ,Set/Clear Enable Bit 711" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB710 ,Set/Clear Enable Bit 710" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB709 ,Set/Clear Enable Bit 709" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708 ,Set/Clear Enable Bit 708" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB707 ,Set/Clear Enable Bit 707" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB706 ,Set/Clear Enable Bit 706" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705 ,Set/Clear Enable Bit 705" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB704 ,Set/Clear Enable Bit 704" "Disabled,Enabled" else rgroup.long 0x0158++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x17) group.long 0x015C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767 ,Set/Clear Enable Bit 767" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB766 ,Set/Clear Enable Bit 766" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB765 ,Set/Clear Enable Bit 765" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764 ,Set/Clear Enable Bit 764" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB763 ,Set/Clear Enable Bit 763" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB762 ,Set/Clear Enable Bit 762" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761 ,Set/Clear Enable Bit 761" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB760 ,Set/Clear Enable Bit 760" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB759 ,Set/Clear Enable Bit 759" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758 ,Set/Clear Enable Bit 758" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB757 ,Set/Clear Enable Bit 757" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB756 ,Set/Clear Enable Bit 756" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755 ,Set/Clear Enable Bit 755" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB754 ,Set/Clear Enable Bit 754" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB753 ,Set/Clear Enable Bit 753" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752 ,Set/Clear Enable Bit 752" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB751 ,Set/Clear Enable Bit 751" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB750 ,Set/Clear Enable Bit 750" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749 ,Set/Clear Enable Bit 749" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB748 ,Set/Clear Enable Bit 748" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB747 ,Set/Clear Enable Bit 747" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746 ,Set/Clear Enable Bit 746" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB745 ,Set/Clear Enable Bit 745" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB744 ,Set/Clear Enable Bit 744" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743 ,Set/Clear Enable Bit 743" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB742 ,Set/Clear Enable Bit 742" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB741 ,Set/Clear Enable Bit 741" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740 ,Set/Clear Enable Bit 740" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB739 ,Set/Clear Enable Bit 739" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB738 ,Set/Clear Enable Bit 738" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737 ,Set/Clear Enable Bit 737" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB736 ,Set/Clear Enable Bit 736" "Disabled,Enabled" else rgroup.long 0x015C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x18) group.long 0x0160++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799 ,Set/Clear Enable Bit 799" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB798 ,Set/Clear Enable Bit 798" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB797 ,Set/Clear Enable Bit 797" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796 ,Set/Clear Enable Bit 796" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB795 ,Set/Clear Enable Bit 795" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB794 ,Set/Clear Enable Bit 794" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793 ,Set/Clear Enable Bit 793" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB792 ,Set/Clear Enable Bit 792" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB791 ,Set/Clear Enable Bit 791" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790 ,Set/Clear Enable Bit 790" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB789 ,Set/Clear Enable Bit 789" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB788 ,Set/Clear Enable Bit 788" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787 ,Set/Clear Enable Bit 787" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB786 ,Set/Clear Enable Bit 786" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB785 ,Set/Clear Enable Bit 785" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784 ,Set/Clear Enable Bit 784" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB783 ,Set/Clear Enable Bit 783" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB782 ,Set/Clear Enable Bit 782" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781 ,Set/Clear Enable Bit 781" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB780 ,Set/Clear Enable Bit 780" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB779 ,Set/Clear Enable Bit 779" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778 ,Set/Clear Enable Bit 778" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB777 ,Set/Clear Enable Bit 777" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB776 ,Set/Clear Enable Bit 776" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775 ,Set/Clear Enable Bit 775" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB774 ,Set/Clear Enable Bit 774" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB773 ,Set/Clear Enable Bit 773" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772 ,Set/Clear Enable Bit 772" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB771 ,Set/Clear Enable Bit 771" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB770 ,Set/Clear Enable Bit 770" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769 ,Set/Clear Enable Bit 769" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB768 ,Set/Clear Enable Bit 768" "Disabled,Enabled" else rgroup.long 0x0160++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x19) group.long 0x0164++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831 ,Set/Clear Enable Bit 831" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB830 ,Set/Clear Enable Bit 830" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB829 ,Set/Clear Enable Bit 829" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828 ,Set/Clear Enable Bit 828" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB827 ,Set/Clear Enable Bit 827" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB826 ,Set/Clear Enable Bit 826" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825 ,Set/Clear Enable Bit 825" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB824 ,Set/Clear Enable Bit 824" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB823 ,Set/Clear Enable Bit 823" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822 ,Set/Clear Enable Bit 822" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB821 ,Set/Clear Enable Bit 821" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB820 ,Set/Clear Enable Bit 820" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819 ,Set/Clear Enable Bit 819" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB818 ,Set/Clear Enable Bit 818" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB817 ,Set/Clear Enable Bit 817" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816 ,Set/Clear Enable Bit 816" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB815 ,Set/Clear Enable Bit 815" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB814 ,Set/Clear Enable Bit 814" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813 ,Set/Clear Enable Bit 813" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB812 ,Set/Clear Enable Bit 812" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB811 ,Set/Clear Enable Bit 811" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810 ,Set/Clear Enable Bit 810" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB809 ,Set/Clear Enable Bit 809" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB808 ,Set/Clear Enable Bit 808" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807 ,Set/Clear Enable Bit 807" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB806 ,Set/Clear Enable Bit 806" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB805 ,Set/Clear Enable Bit 805" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804 ,Set/Clear Enable Bit 804" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB803 ,Set/Clear Enable Bit 803" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB802 ,Set/Clear Enable Bit 802" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801 ,Set/Clear Enable Bit 801" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB800 ,Set/Clear Enable Bit 800" "Disabled,Enabled" else rgroup.long 0x0164++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1A) group.long 0x0168++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863 ,Set/Clear Enable Bit 863" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB862 ,Set/Clear Enable Bit 862" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB861 ,Set/Clear Enable Bit 861" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860 ,Set/Clear Enable Bit 860" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB859 ,Set/Clear Enable Bit 859" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB858 ,Set/Clear Enable Bit 858" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857 ,Set/Clear Enable Bit 857" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB856 ,Set/Clear Enable Bit 856" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB855 ,Set/Clear Enable Bit 855" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854 ,Set/Clear Enable Bit 854" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB853 ,Set/Clear Enable Bit 853" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB852 ,Set/Clear Enable Bit 852" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851 ,Set/Clear Enable Bit 851" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB850 ,Set/Clear Enable Bit 850" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB849 ,Set/Clear Enable Bit 849" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848 ,Set/Clear Enable Bit 848" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB847 ,Set/Clear Enable Bit 847" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB846 ,Set/Clear Enable Bit 846" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845 ,Set/Clear Enable Bit 845" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB844 ,Set/Clear Enable Bit 844" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB843 ,Set/Clear Enable Bit 843" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842 ,Set/Clear Enable Bit 842" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB841 ,Set/Clear Enable Bit 841" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB840 ,Set/Clear Enable Bit 840" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839 ,Set/Clear Enable Bit 839" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB838 ,Set/Clear Enable Bit 838" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB837 ,Set/Clear Enable Bit 837" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836 ,Set/Clear Enable Bit 836" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB835 ,Set/Clear Enable Bit 835" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB834 ,Set/Clear Enable Bit 834" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833 ,Set/Clear Enable Bit 833" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB832 ,Set/Clear Enable Bit 832" "Disabled,Enabled" else rgroup.long 0x0168++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1B) group.long 0x016C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895 ,Set/Clear Enable Bit 895" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB894 ,Set/Clear Enable Bit 894" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB893 ,Set/Clear Enable Bit 893" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892 ,Set/Clear Enable Bit 892" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB891 ,Set/Clear Enable Bit 891" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB890 ,Set/Clear Enable Bit 890" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889 ,Set/Clear Enable Bit 889" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB888 ,Set/Clear Enable Bit 888" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB887 ,Set/Clear Enable Bit 887" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886 ,Set/Clear Enable Bit 886" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB885 ,Set/Clear Enable Bit 885" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB884 ,Set/Clear Enable Bit 884" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883 ,Set/Clear Enable Bit 883" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB882 ,Set/Clear Enable Bit 882" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB881 ,Set/Clear Enable Bit 881" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880 ,Set/Clear Enable Bit 880" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB879 ,Set/Clear Enable Bit 879" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB878 ,Set/Clear Enable Bit 878" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877 ,Set/Clear Enable Bit 877" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB876 ,Set/Clear Enable Bit 876" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB875 ,Set/Clear Enable Bit 875" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874 ,Set/Clear Enable Bit 874" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB873 ,Set/Clear Enable Bit 873" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB872 ,Set/Clear Enable Bit 872" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871 ,Set/Clear Enable Bit 871" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB870 ,Set/Clear Enable Bit 870" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB869 ,Set/Clear Enable Bit 869" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868 ,Set/Clear Enable Bit 868" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB867 ,Set/Clear Enable Bit 867" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB866 ,Set/Clear Enable Bit 866" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865 ,Set/Clear Enable Bit 865" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB864 ,Set/Clear Enable Bit 864" "Disabled,Enabled" else rgroup.long 0x016C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1C) group.long 0x0170++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927 ,Set/Clear Enable Bit 927" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB926 ,Set/Clear Enable Bit 926" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB925 ,Set/Clear Enable Bit 925" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924 ,Set/Clear Enable Bit 924" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB923 ,Set/Clear Enable Bit 923" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB922 ,Set/Clear Enable Bit 922" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921 ,Set/Clear Enable Bit 921" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB920 ,Set/Clear Enable Bit 920" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB919 ,Set/Clear Enable Bit 919" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918 ,Set/Clear Enable Bit 918" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB917 ,Set/Clear Enable Bit 917" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB916 ,Set/Clear Enable Bit 916" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915 ,Set/Clear Enable Bit 915" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB914 ,Set/Clear Enable Bit 914" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB913 ,Set/Clear Enable Bit 913" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912 ,Set/Clear Enable Bit 912" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB911 ,Set/Clear Enable Bit 911" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB910 ,Set/Clear Enable Bit 910" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909 ,Set/Clear Enable Bit 909" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB908 ,Set/Clear Enable Bit 908" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB907 ,Set/Clear Enable Bit 907" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906 ,Set/Clear Enable Bit 906" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB905 ,Set/Clear Enable Bit 905" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB904 ,Set/Clear Enable Bit 904" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903 ,Set/Clear Enable Bit 903" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB902 ,Set/Clear Enable Bit 902" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB901 ,Set/Clear Enable Bit 901" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900 ,Set/Clear Enable Bit 900" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB899 ,Set/Clear Enable Bit 899" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB898 ,Set/Clear Enable Bit 898" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897 ,Set/Clear Enable Bit 897" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB896 ,Set/Clear Enable Bit 896" "Disabled,Enabled" else rgroup.long 0x0170++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1D) group.long 0x0174++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959 ,Set/Clear Enable Bit 959" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB958 ,Set/Clear Enable Bit 958" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB957 ,Set/Clear Enable Bit 957" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956 ,Set/Clear Enable Bit 956" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB955 ,Set/Clear Enable Bit 955" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB954 ,Set/Clear Enable Bit 954" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953 ,Set/Clear Enable Bit 953" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB952 ,Set/Clear Enable Bit 952" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB951 ,Set/Clear Enable Bit 951" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950 ,Set/Clear Enable Bit 950" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB949 ,Set/Clear Enable Bit 949" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB948 ,Set/Clear Enable Bit 948" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947 ,Set/Clear Enable Bit 947" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB946 ,Set/Clear Enable Bit 946" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB945 ,Set/Clear Enable Bit 945" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944 ,Set/Clear Enable Bit 944" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB943 ,Set/Clear Enable Bit 943" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB942 ,Set/Clear Enable Bit 942" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941 ,Set/Clear Enable Bit 941" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB940 ,Set/Clear Enable Bit 940" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB939 ,Set/Clear Enable Bit 939" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938 ,Set/Clear Enable Bit 938" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB937 ,Set/Clear Enable Bit 937" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB936 ,Set/Clear Enable Bit 936" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935 ,Set/Clear Enable Bit 935" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB934 ,Set/Clear Enable Bit 934" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB933 ,Set/Clear Enable Bit 933" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932 ,Set/Clear Enable Bit 932" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB931 ,Set/Clear Enable Bit 931" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB930 ,Set/Clear Enable Bit 930" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929 ,Set/Clear Enable Bit 929" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB928 ,Set/Clear Enable Bit 928" "Disabled,Enabled" else rgroup.long 0x0174++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1E) group.long 0x0178++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991 ,Set/Clear Enable Bit 991" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB990 ,Set/Clear Enable Bit 990" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB989 ,Set/Clear Enable Bit 989" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988 ,Set/Clear Enable Bit 988" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB987 ,Set/Clear Enable Bit 987" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB986 ,Set/Clear Enable Bit 986" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985 ,Set/Clear Enable Bit 985" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB984 ,Set/Clear Enable Bit 984" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB983 ,Set/Clear Enable Bit 983" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982 ,Set/Clear Enable Bit 982" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB981 ,Set/Clear Enable Bit 981" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB980 ,Set/Clear Enable Bit 980" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979 ,Set/Clear Enable Bit 979" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB978 ,Set/Clear Enable Bit 978" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB977 ,Set/Clear Enable Bit 977" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976 ,Set/Clear Enable Bit 976" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB975 ,Set/Clear Enable Bit 975" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB974 ,Set/Clear Enable Bit 974" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973 ,Set/Clear Enable Bit 973" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB972 ,Set/Clear Enable Bit 972" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB971 ,Set/Clear Enable Bit 971" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970 ,Set/Clear Enable Bit 970" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB969 ,Set/Clear Enable Bit 969" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB968 ,Set/Clear Enable Bit 968" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967 ,Set/Clear Enable Bit 967" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB966 ,Set/Clear Enable Bit 966" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB965 ,Set/Clear Enable Bit 965" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964 ,Set/Clear Enable Bit 964" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB963 ,Set/Clear Enable Bit 963" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB962 ,Set/Clear Enable Bit 962" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961 ,Set/Clear Enable Bit 961" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB960 ,Set/Clear Enable Bit 960" "Disabled,Enabled" else rgroup.long 0x0178++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)==0x1F) group.long 0x017C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB1019 ,Set/Clear Enable Bit 1019" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB1018 ,Set/Clear Enable Bit 1018" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB1017 ,Set/Clear Enable Bit 1017" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB1016 ,Set/Clear Enable Bit 1016" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB1015 ,Set/Clear Enable Bit 1015" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB1014 ,Set/Clear Enable Bit 1014" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB1013 ,Set/Clear Enable Bit 1013" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB1012 ,Set/Clear Enable Bit 1012" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB1011 ,Set/Clear Enable Bit 1011" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB1010 ,Set/Clear Enable Bit 1010" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB1009 ,Set/Clear Enable Bit 1009" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB1008 ,Set/Clear Enable Bit 1008" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB1007 ,Set/Clear Enable Bit 1007" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB1006 ,Set/Clear Enable Bit 1006" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB1005 ,Set/Clear Enable Bit 1005" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB1004 ,Set/Clear Enable Bit 1004" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB1003 ,Set/Clear Enable Bit 1003" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB1002 ,Set/Clear Enable Bit 1002" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB1001 ,Set/Clear Enable Bit 1001" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB1000 ,Set/Clear Enable Bit 1000" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB999 ,Set/Clear Enable Bit 999" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB998 ,Set/Clear Enable Bit 998" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB997 ,Set/Clear Enable Bit 997" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB996 ,Set/Clear Enable Bit 996" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB995 ,Set/Clear Enable Bit 995" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB994 ,Set/Clear Enable Bit 994" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB993 ,Set/Clear Enable Bit 993" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB992 ,Set/Clear Enable Bit 992" "Disabled,Enabled" else rgroup.long 0x017C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 22. tree "Set/Clear Pending Registers" group.long 0x0200++0x03 line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31 ,Set/Clear Pending Bit 31" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND30 ,Set/Clear Pending Bit 30" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND29 ,Set/Clear Pending Bit 29" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28 ,Set/Clear Pending Bit 28" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND27 ,Set/Clear Pending Bit 27" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND26 ,Set/Clear Pending Bit 26" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25 ,Set/Clear Pending Bit 25" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND24 ,Set/Clear Pending Bit 24" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND23 ,Set/Clear Pending Bit 23" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22 ,Set/Clear Pending Bit 22" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND21 ,Set/Clear Pending Bit 21" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND20 ,Set/Clear Pending Bit 20" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19 ,Set/Clear Pending Bit 19" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND18 ,Set/Clear Pending Bit 18" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND17 ,Set/Clear Pending Bit 17" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16 ,Set/Clear Pending Bit 16" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND15 ,Set/Clear Pending Bit 15" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND14 ,Set/Clear Pending Bit 14" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13 ,Set/Clear Pending Bit 13" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND12 ,Set/Clear Pending Bit 12" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND11 ,Set/Clear Pending Bit 11" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10 ,Set/Clear Pending Bit 10" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND9 ,Set/Clear Pending Bit 9" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND8 ,Set/Clear Pending Bit 8" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7 ,Set/Clear Pending Bit 7" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND6 ,Set/Clear Pending Bit 6" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND5 ,Set/Clear Pending Bit 5" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4 ,Set/Clear Pending Bit 4" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND3 ,Set/Clear Pending Bit 3" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND2 ,Set/Clear Pending Bit 2" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1 ,Set/Clear Pending Bit 1" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND0 ,Set/Clear Pending Bit 0" "Not pending,Pending" if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x01) group.long 0x0204++0x03 line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63 ,Set/Clear Pending Bit 63" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND62 ,Set/Clear Pending Bit 62" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND61 ,Set/Clear Pending Bit 61" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60 ,Set/Clear Pending Bit 60" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND59 ,Set/Clear Pending Bit 59" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND58 ,Set/Clear Pending Bit 58" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57 ,Set/Clear Pending Bit 57" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND56 ,Set/Clear Pending Bit 56" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND55 ,Set/Clear Pending Bit 55" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54 ,Set/Clear Pending Bit 54" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND53 ,Set/Clear Pending Bit 53" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND52 ,Set/Clear Pending Bit 52" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51 ,Set/Clear Pending Bit 51" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND50 ,Set/Clear Pending Bit 50" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND49 ,Set/Clear Pending Bit 49" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48 ,Set/Clear Pending Bit 48" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND47 ,Set/Clear Pending Bit 47" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND46 ,Set/Clear Pending Bit 46" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45 ,Set/Clear Pending Bit 45" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND44 ,Set/Clear Pending Bit 44" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND43 ,Set/Clear Pending Bit 43" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42 ,Set/Clear Pending Bit 42" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND41 ,Set/Clear Pending Bit 41" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND40 ,Set/Clear Pending Bit 40" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39 ,Set/Clear Pending Bit 39" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND38 ,Set/Clear Pending Bit 38" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND37 ,Set/Clear Pending Bit 37" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36 ,Set/Clear Pending Bit 36" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND35 ,Set/Clear Pending Bit 35" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND34 ,Set/Clear Pending Bit 34" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33 ,Set/Clear Pending Bit 33" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND32 ,Set/Clear Pending Bit 32" "Not pending,Pending" else rgroup.long 0x0204++0x03 line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x02) group.long 0x0208++0x03 line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95 ,Set/Clear Pending Bit 95" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND94 ,Set/Clear Pending Bit 94" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND93 ,Set/Clear Pending Bit 93" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92 ,Set/Clear Pending Bit 92" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND91 ,Set/Clear Pending Bit 91" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND90 ,Set/Clear Pending Bit 90" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89 ,Set/Clear Pending Bit 89" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND88 ,Set/Clear Pending Bit 88" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND87 ,Set/Clear Pending Bit 87" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86 ,Set/Clear Pending Bit 86" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND85 ,Set/Clear Pending Bit 85" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND84 ,Set/Clear Pending Bit 84" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83 ,Set/Clear Pending Bit 83" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND82 ,Set/Clear Pending Bit 82" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND81 ,Set/Clear Pending Bit 81" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80 ,Set/Clear Pending Bit 80" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND79 ,Set/Clear Pending Bit 79" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND78 ,Set/Clear Pending Bit 78" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77 ,Set/Clear Pending Bit 77" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND76 ,Set/Clear Pending Bit 76" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND75 ,Set/Clear Pending Bit 75" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74 ,Set/Clear Pending Bit 74" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND73 ,Set/Clear Pending Bit 73" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND72 ,Set/Clear Pending Bit 72" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71 ,Set/Clear Pending Bit 71" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND70 ,Set/Clear Pending Bit 70" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND69 ,Set/Clear Pending Bit 69" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68 ,Set/Clear Pending Bit 68" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND67 ,Set/Clear Pending Bit 67" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND66 ,Set/Clear Pending Bit 66" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65 ,Set/Clear Pending Bit 65" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND64 ,Set/Clear Pending Bit 64" "Not pending,Pending" else rgroup.long 0x0208++0x03 line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x03) group.long 0x020C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127 ,Set/Clear Pending Bit 127" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND126 ,Set/Clear Pending Bit 126" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND125 ,Set/Clear Pending Bit 125" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124 ,Set/Clear Pending Bit 124" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND123 ,Set/Clear Pending Bit 123" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND122 ,Set/Clear Pending Bit 122" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121 ,Set/Clear Pending Bit 121" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND120 ,Set/Clear Pending Bit 120" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND119 ,Set/Clear Pending Bit 119" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118 ,Set/Clear Pending Bit 118" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND117 ,Set/Clear Pending Bit 117" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND116 ,Set/Clear Pending Bit 116" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115 ,Set/Clear Pending Bit 115" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND114 ,Set/Clear Pending Bit 114" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND113 ,Set/Clear Pending Bit 113" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112 ,Set/Clear Pending Bit 112" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND111 ,Set/Clear Pending Bit 111" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND110 ,Set/Clear Pending Bit 110" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109 ,Set/Clear Pending Bit 109" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND108 ,Set/Clear Pending Bit 108" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND107 ,Set/Clear Pending Bit 107" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106 ,Set/Clear Pending Bit 106" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND105 ,Set/Clear Pending Bit 105" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND104 ,Set/Clear Pending Bit 104" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103 ,Set/Clear Pending Bit 103" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND102 ,Set/Clear Pending Bit 102" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND101 ,Set/Clear Pending Bit 101" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100 ,Set/Clear Pending Bit 100" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND99 ,Set/Clear Pending Bit 99" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND98 ,Set/Clear Pending Bit 98" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97 ,Set/Clear Pending Bit 97" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND96 ,Set/Clear Pending Bit 96" "Not pending,Pending" else rgroup.long 0x020C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x04) group.long 0x0210++0x03 line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159 ,Set/Clear Pending Bit 159" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND158 ,Set/Clear Pending Bit 158" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND157 ,Set/Clear Pending Bit 157" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156 ,Set/Clear Pending Bit 156" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND155 ,Set/Clear Pending Bit 155" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND154 ,Set/Clear Pending Bit 154" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153 ,Set/Clear Pending Bit 153" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND152 ,Set/Clear Pending Bit 152" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND151 ,Set/Clear Pending Bit 151" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150 ,Set/Clear Pending Bit 150" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND149 ,Set/Clear Pending Bit 149" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND148 ,Set/Clear Pending Bit 148" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147 ,Set/Clear Pending Bit 147" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND146 ,Set/Clear Pending Bit 146" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND145 ,Set/Clear Pending Bit 145" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144 ,Set/Clear Pending Bit 144" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND143 ,Set/Clear Pending Bit 143" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND142 ,Set/Clear Pending Bit 142" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141 ,Set/Clear Pending Bit 141" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND140 ,Set/Clear Pending Bit 140" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND139 ,Set/Clear Pending Bit 139" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138 ,Set/Clear Pending Bit 138" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND137 ,Set/Clear Pending Bit 137" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND136 ,Set/Clear Pending Bit 136" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135 ,Set/Clear Pending Bit 135" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND134 ,Set/Clear Pending Bit 134" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND133 ,Set/Clear Pending Bit 133" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132 ,Set/Clear Pending Bit 132" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND131 ,Set/Clear Pending Bit 131" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND130 ,Set/Clear Pending Bit 130" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129 ,Set/Clear Pending Bit 129" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND128 ,Set/Clear Pending Bit 128" "Not pending,Pending" else rgroup.long 0x0210++0x03 line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x05) group.long 0x0214++0x03 line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191 ,Set/Clear Pending Bit 191" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND190 ,Set/Clear Pending Bit 190" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND189 ,Set/Clear Pending Bit 189" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188 ,Set/Clear Pending Bit 188" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND187 ,Set/Clear Pending Bit 187" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND186 ,Set/Clear Pending Bit 186" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185 ,Set/Clear Pending Bit 185" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND184 ,Set/Clear Pending Bit 184" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND183 ,Set/Clear Pending Bit 183" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182 ,Set/Clear Pending Bit 182" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND181 ,Set/Clear Pending Bit 181" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND180 ,Set/Clear Pending Bit 180" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179 ,Set/Clear Pending Bit 179" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND178 ,Set/Clear Pending Bit 178" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND177 ,Set/Clear Pending Bit 177" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176 ,Set/Clear Pending Bit 176" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND175 ,Set/Clear Pending Bit 175" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND174 ,Set/Clear Pending Bit 174" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173 ,Set/Clear Pending Bit 173" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND172 ,Set/Clear Pending Bit 172" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND171 ,Set/Clear Pending Bit 171" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170 ,Set/Clear Pending Bit 170" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND169 ,Set/Clear Pending Bit 169" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND168 ,Set/Clear Pending Bit 168" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167 ,Set/Clear Pending Bit 167" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND166 ,Set/Clear Pending Bit 166" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND165 ,Set/Clear Pending Bit 165" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164 ,Set/Clear Pending Bit 164" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND163 ,Set/Clear Pending Bit 163" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND162 ,Set/Clear Pending Bit 162" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161 ,Set/Clear Pending Bit 161" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND160 ,Set/Clear Pending Bit 160" "Not pending,Pending" else rgroup.long 0x0214++0x03 line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x06) group.long 0x0218++0x03 line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223 ,Set/Clear Pending Bit 223" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND222 ,Set/Clear Pending Bit 222" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND221 ,Set/Clear Pending Bit 221" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220 ,Set/Clear Pending Bit 220" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND219 ,Set/Clear Pending Bit 219" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND218 ,Set/Clear Pending Bit 218" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217 ,Set/Clear Pending Bit 217" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND216 ,Set/Clear Pending Bit 216" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND215 ,Set/Clear Pending Bit 215" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214 ,Set/Clear Pending Bit 214" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND213 ,Set/Clear Pending Bit 213" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND212 ,Set/Clear Pending Bit 212" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211 ,Set/Clear Pending Bit 211" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND210 ,Set/Clear Pending Bit 210" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND209 ,Set/Clear Pending Bit 209" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208 ,Set/Clear Pending Bit 208" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND207 ,Set/Clear Pending Bit 207" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND206 ,Set/Clear Pending Bit 206" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205 ,Set/Clear Pending Bit 205" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND204 ,Set/Clear Pending Bit 204" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND203 ,Set/Clear Pending Bit 203" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202 ,Set/Clear Pending Bit 202" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND201 ,Set/Clear Pending Bit 201" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND200 ,Set/Clear Pending Bit 200" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199 ,Set/Clear Pending Bit 199" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND198 ,Set/Clear Pending Bit 198" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND197 ,Set/Clear Pending Bit 197" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196 ,Set/Clear Pending Bit 196" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND195 ,Set/Clear Pending Bit 195" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND194 ,Set/Clear Pending Bit 194" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193 ,Set/Clear Pending Bit 193" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND192 ,Set/Clear Pending Bit 192" "Not pending,Pending" else rgroup.long 0x0218++0x03 line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x07) group.long 0x021C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255 ,Set/Clear Pending Bit 255" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND254 ,Set/Clear Pending Bit 254" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND253 ,Set/Clear Pending Bit 253" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252 ,Set/Clear Pending Bit 252" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND251 ,Set/Clear Pending Bit 251" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND250 ,Set/Clear Pending Bit 250" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249 ,Set/Clear Pending Bit 249" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND248 ,Set/Clear Pending Bit 248" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND247 ,Set/Clear Pending Bit 247" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246 ,Set/Clear Pending Bit 246" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND245 ,Set/Clear Pending Bit 245" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND244 ,Set/Clear Pending Bit 244" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243 ,Set/Clear Pending Bit 243" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND242 ,Set/Clear Pending Bit 242" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND241 ,Set/Clear Pending Bit 241" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240 ,Set/Clear Pending Bit 240" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND239 ,Set/Clear Pending Bit 239" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND238 ,Set/Clear Pending Bit 238" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237 ,Set/Clear Pending Bit 237" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND236 ,Set/Clear Pending Bit 236" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND235 ,Set/Clear Pending Bit 235" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234 ,Set/Clear Pending Bit 234" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND233 ,Set/Clear Pending Bit 233" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND232 ,Set/Clear Pending Bit 232" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231 ,Set/Clear Pending Bit 231" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND230 ,Set/Clear Pending Bit 230" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND229 ,Set/Clear Pending Bit 229" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228 ,Set/Clear Pending Bit 228" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND227 ,Set/Clear Pending Bit 227" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND226 ,Set/Clear Pending Bit 226" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225 ,Set/Clear Pending Bit 225" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND224 ,Set/Clear Pending Bit 224" "Not pending,Pending" else rgroup.long 0x021C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x08) group.long 0x0220++0x03 line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287 ,Set/Clear Pending Bit 287" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND286 ,Set/Clear Pending Bit 286" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND285 ,Set/Clear Pending Bit 285" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284 ,Set/Clear Pending Bit 284" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND283 ,Set/Clear Pending Bit 283" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND282 ,Set/Clear Pending Bit 282" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281 ,Set/Clear Pending Bit 281" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND280 ,Set/Clear Pending Bit 280" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND279 ,Set/Clear Pending Bit 279" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278 ,Set/Clear Pending Bit 278" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND277 ,Set/Clear Pending Bit 277" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND276 ,Set/Clear Pending Bit 276" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275 ,Set/Clear Pending Bit 275" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND274 ,Set/Clear Pending Bit 274" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND273 ,Set/Clear Pending Bit 273" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272 ,Set/Clear Pending Bit 272" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND271 ,Set/Clear Pending Bit 271" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND270 ,Set/Clear Pending Bit 270" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269 ,Set/Clear Pending Bit 269" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND268 ,Set/Clear Pending Bit 268" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND267 ,Set/Clear Pending Bit 267" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266 ,Set/Clear Pending Bit 266" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND265 ,Set/Clear Pending Bit 265" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND264 ,Set/Clear Pending Bit 264" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263 ,Set/Clear Pending Bit 263" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND262 ,Set/Clear Pending Bit 262" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND261 ,Set/Clear Pending Bit 261" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260 ,Set/Clear Pending Bit 260" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND259 ,Set/Clear Pending Bit 259" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND258 ,Set/Clear Pending Bit 258" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257 ,Set/Clear Pending Bit 257" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND256 ,Set/Clear Pending Bit 256" "Not pending,Pending" else rgroup.long 0x0220++0x03 line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x09) group.long 0x0224++0x03 line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319 ,Set/Clear Pending Bit 319" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND318 ,Set/Clear Pending Bit 318" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND317 ,Set/Clear Pending Bit 317" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316 ,Set/Clear Pending Bit 316" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND315 ,Set/Clear Pending Bit 315" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND314 ,Set/Clear Pending Bit 314" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313 ,Set/Clear Pending Bit 313" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND312 ,Set/Clear Pending Bit 312" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND311 ,Set/Clear Pending Bit 311" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310 ,Set/Clear Pending Bit 310" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND309 ,Set/Clear Pending Bit 309" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND308 ,Set/Clear Pending Bit 308" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307 ,Set/Clear Pending Bit 307" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND306 ,Set/Clear Pending Bit 306" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND305 ,Set/Clear Pending Bit 305" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304 ,Set/Clear Pending Bit 304" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND303 ,Set/Clear Pending Bit 303" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND302 ,Set/Clear Pending Bit 302" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301 ,Set/Clear Pending Bit 301" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND300 ,Set/Clear Pending Bit 300" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND299 ,Set/Clear Pending Bit 299" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298 ,Set/Clear Pending Bit 298" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND297 ,Set/Clear Pending Bit 297" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND296 ,Set/Clear Pending Bit 296" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295 ,Set/Clear Pending Bit 295" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND294 ,Set/Clear Pending Bit 294" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND293 ,Set/Clear Pending Bit 293" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292 ,Set/Clear Pending Bit 292" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND291 ,Set/Clear Pending Bit 291" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND290 ,Set/Clear Pending Bit 290" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289 ,Set/Clear Pending Bit 289" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND288 ,Set/Clear Pending Bit 288" "Not pending,Pending" else rgroup.long 0x0224++0x03 line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0A) group.long 0x0228++0x03 line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351 ,Set/Clear Pending Bit 351" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND350 ,Set/Clear Pending Bit 350" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND349 ,Set/Clear Pending Bit 349" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348 ,Set/Clear Pending Bit 348" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND347 ,Set/Clear Pending Bit 347" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND346 ,Set/Clear Pending Bit 346" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345 ,Set/Clear Pending Bit 345" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND344 ,Set/Clear Pending Bit 344" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND343 ,Set/Clear Pending Bit 343" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342 ,Set/Clear Pending Bit 342" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND341 ,Set/Clear Pending Bit 341" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND340 ,Set/Clear Pending Bit 340" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339 ,Set/Clear Pending Bit 339" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND338 ,Set/Clear Pending Bit 338" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND337 ,Set/Clear Pending Bit 337" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336 ,Set/Clear Pending Bit 336" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND335 ,Set/Clear Pending Bit 335" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND334 ,Set/Clear Pending Bit 334" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333 ,Set/Clear Pending Bit 333" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND332 ,Set/Clear Pending Bit 332" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND331 ,Set/Clear Pending Bit 331" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330 ,Set/Clear Pending Bit 330" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND329 ,Set/Clear Pending Bit 329" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND328 ,Set/Clear Pending Bit 328" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327 ,Set/Clear Pending Bit 327" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND326 ,Set/Clear Pending Bit 326" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND325 ,Set/Clear Pending Bit 325" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324 ,Set/Clear Pending Bit 324" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND323 ,Set/Clear Pending Bit 323" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND322 ,Set/Clear Pending Bit 322" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321 ,Set/Clear Pending Bit 321" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND320 ,Set/Clear Pending Bit 320" "Not pending,Pending" else rgroup.long 0x0228++0x03 line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0B) group.long 0x022C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383 ,Set/Clear Pending Bit 383" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND382 ,Set/Clear Pending Bit 382" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND381 ,Set/Clear Pending Bit 381" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380 ,Set/Clear Pending Bit 380" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND379 ,Set/Clear Pending Bit 379" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND378 ,Set/Clear Pending Bit 378" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377 ,Set/Clear Pending Bit 377" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND376 ,Set/Clear Pending Bit 376" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND375 ,Set/Clear Pending Bit 375" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374 ,Set/Clear Pending Bit 374" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND373 ,Set/Clear Pending Bit 373" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND372 ,Set/Clear Pending Bit 372" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371 ,Set/Clear Pending Bit 371" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND370 ,Set/Clear Pending Bit 370" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND369 ,Set/Clear Pending Bit 369" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368 ,Set/Clear Pending Bit 368" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND367 ,Set/Clear Pending Bit 367" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND366 ,Set/Clear Pending Bit 366" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365 ,Set/Clear Pending Bit 365" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND364 ,Set/Clear Pending Bit 364" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND363 ,Set/Clear Pending Bit 363" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362 ,Set/Clear Pending Bit 362" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND361 ,Set/Clear Pending Bit 361" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND360 ,Set/Clear Pending Bit 360" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359 ,Set/Clear Pending Bit 359" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND358 ,Set/Clear Pending Bit 358" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND357 ,Set/Clear Pending Bit 357" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356 ,Set/Clear Pending Bit 356" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND355 ,Set/Clear Pending Bit 355" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND354 ,Set/Clear Pending Bit 354" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353 ,Set/Clear Pending Bit 353" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND352 ,Set/Clear Pending Bit 352" "Not pending,Pending" else rgroup.long 0x022C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0C) group.long 0x0230++0x03 line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415 ,Set/Clear Pending Bit 415" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND414 ,Set/Clear Pending Bit 414" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND413 ,Set/Clear Pending Bit 413" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412 ,Set/Clear Pending Bit 412" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND411 ,Set/Clear Pending Bit 411" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND410 ,Set/Clear Pending Bit 410" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409 ,Set/Clear Pending Bit 409" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND408 ,Set/Clear Pending Bit 408" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND407 ,Set/Clear Pending Bit 407" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406 ,Set/Clear Pending Bit 406" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND405 ,Set/Clear Pending Bit 405" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND404 ,Set/Clear Pending Bit 404" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403 ,Set/Clear Pending Bit 403" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND402 ,Set/Clear Pending Bit 402" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND401 ,Set/Clear Pending Bit 401" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400 ,Set/Clear Pending Bit 400" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND399 ,Set/Clear Pending Bit 399" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND398 ,Set/Clear Pending Bit 398" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397 ,Set/Clear Pending Bit 397" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND396 ,Set/Clear Pending Bit 396" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND395 ,Set/Clear Pending Bit 395" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394 ,Set/Clear Pending Bit 394" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND393 ,Set/Clear Pending Bit 393" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND392 ,Set/Clear Pending Bit 392" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391 ,Set/Clear Pending Bit 391" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND390 ,Set/Clear Pending Bit 390" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND389 ,Set/Clear Pending Bit 389" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388 ,Set/Clear Pending Bit 388" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND387 ,Set/Clear Pending Bit 387" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND386 ,Set/Clear Pending Bit 386" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385 ,Set/Clear Pending Bit 385" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND384 ,Set/Clear Pending Bit 384" "Not pending,Pending" else rgroup.long 0x0230++0x03 line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0D) group.long 0x0234++0x03 line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447 ,Set/Clear Pending Bit 447" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND446 ,Set/Clear Pending Bit 446" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND445 ,Set/Clear Pending Bit 445" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444 ,Set/Clear Pending Bit 444" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND443 ,Set/Clear Pending Bit 443" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND442 ,Set/Clear Pending Bit 442" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441 ,Set/Clear Pending Bit 441" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND440 ,Set/Clear Pending Bit 440" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND439 ,Set/Clear Pending Bit 439" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438 ,Set/Clear Pending Bit 438" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND437 ,Set/Clear Pending Bit 437" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND436 ,Set/Clear Pending Bit 436" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435 ,Set/Clear Pending Bit 435" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND434 ,Set/Clear Pending Bit 434" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND433 ,Set/Clear Pending Bit 433" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432 ,Set/Clear Pending Bit 432" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND431 ,Set/Clear Pending Bit 431" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND430 ,Set/Clear Pending Bit 430" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429 ,Set/Clear Pending Bit 429" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND428 ,Set/Clear Pending Bit 428" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND427 ,Set/Clear Pending Bit 427" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426 ,Set/Clear Pending Bit 426" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND425 ,Set/Clear Pending Bit 425" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND424 ,Set/Clear Pending Bit 424" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423 ,Set/Clear Pending Bit 423" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND422 ,Set/Clear Pending Bit 422" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND421 ,Set/Clear Pending Bit 421" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420 ,Set/Clear Pending Bit 420" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND419 ,Set/Clear Pending Bit 419" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND418 ,Set/Clear Pending Bit 418" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417 ,Set/Clear Pending Bit 417" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND416 ,Set/Clear Pending Bit 416" "Not pending,Pending" else rgroup.long 0x0234++0x03 line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0E) group.long 0x0238++0x03 line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479 ,Set/Clear Pending Bit 479" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND478 ,Set/Clear Pending Bit 478" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND477 ,Set/Clear Pending Bit 477" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476 ,Set/Clear Pending Bit 476" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND475 ,Set/Clear Pending Bit 475" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND474 ,Set/Clear Pending Bit 474" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473 ,Set/Clear Pending Bit 473" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND472 ,Set/Clear Pending Bit 472" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND471 ,Set/Clear Pending Bit 471" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470 ,Set/Clear Pending Bit 470" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND469 ,Set/Clear Pending Bit 469" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND468 ,Set/Clear Pending Bit 468" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467 ,Set/Clear Pending Bit 467" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND466 ,Set/Clear Pending Bit 466" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND465 ,Set/Clear Pending Bit 465" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464 ,Set/Clear Pending Bit 464" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND463 ,Set/Clear Pending Bit 463" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND462 ,Set/Clear Pending Bit 462" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461 ,Set/Clear Pending Bit 461" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND460 ,Set/Clear Pending Bit 460" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND459 ,Set/Clear Pending Bit 459" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458 ,Set/Clear Pending Bit 458" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND457 ,Set/Clear Pending Bit 457" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND456 ,Set/Clear Pending Bit 456" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455 ,Set/Clear Pending Bit 455" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND454 ,Set/Clear Pending Bit 454" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND453 ,Set/Clear Pending Bit 453" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452 ,Set/Clear Pending Bit 452" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND451 ,Set/Clear Pending Bit 451" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND450 ,Set/Clear Pending Bit 450" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449 ,Set/Clear Pending Bit 449" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND448 ,Set/Clear Pending Bit 448" "Not pending,Pending" else rgroup.long 0x0238++0x03 line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0F) group.long 0x023C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511 ,Set/Clear Pending Bit 511" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND510 ,Set/Clear Pending Bit 510" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND509 ,Set/Clear Pending Bit 509" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508 ,Set/Clear Pending Bit 508" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND507 ,Set/Clear Pending Bit 507" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND506 ,Set/Clear Pending Bit 506" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505 ,Set/Clear Pending Bit 505" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND504 ,Set/Clear Pending Bit 504" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND503 ,Set/Clear Pending Bit 503" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502 ,Set/Clear Pending Bit 502" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND501 ,Set/Clear Pending Bit 501" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND500 ,Set/Clear Pending Bit 500" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499 ,Set/Clear Pending Bit 499" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND498 ,Set/Clear Pending Bit 498" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND497 ,Set/Clear Pending Bit 497" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496 ,Set/Clear Pending Bit 496" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND495 ,Set/Clear Pending Bit 495" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND494 ,Set/Clear Pending Bit 494" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493 ,Set/Clear Pending Bit 493" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND492 ,Set/Clear Pending Bit 492" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND491 ,Set/Clear Pending Bit 491" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490 ,Set/Clear Pending Bit 490" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND489 ,Set/Clear Pending Bit 489" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND488 ,Set/Clear Pending Bit 488" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487 ,Set/Clear Pending Bit 487" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND486 ,Set/Clear Pending Bit 486" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND485 ,Set/Clear Pending Bit 485" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484 ,Set/Clear Pending Bit 484" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND483 ,Set/Clear Pending Bit 483" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND482 ,Set/Clear Pending Bit 482" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481 ,Set/Clear Pending Bit 481" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND480 ,Set/Clear Pending Bit 480" "Not pending,Pending" else rgroup.long 0x023C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x10) group.long 0x0240++0x03 line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543 ,Set/Clear Pending Bit 543" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND542 ,Set/Clear Pending Bit 542" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND541 ,Set/Clear Pending Bit 541" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540 ,Set/Clear Pending Bit 540" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND539 ,Set/Clear Pending Bit 539" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND538 ,Set/Clear Pending Bit 538" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537 ,Set/Clear Pending Bit 537" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND536 ,Set/Clear Pending Bit 536" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND535 ,Set/Clear Pending Bit 535" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534 ,Set/Clear Pending Bit 534" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND533 ,Set/Clear Pending Bit 533" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND532 ,Set/Clear Pending Bit 532" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531 ,Set/Clear Pending Bit 531" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND530 ,Set/Clear Pending Bit 530" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND529 ,Set/Clear Pending Bit 529" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528 ,Set/Clear Pending Bit 528" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND527 ,Set/Clear Pending Bit 527" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND526 ,Set/Clear Pending Bit 526" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525 ,Set/Clear Pending Bit 525" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND524 ,Set/Clear Pending Bit 524" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND523 ,Set/Clear Pending Bit 523" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522 ,Set/Clear Pending Bit 522" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND521 ,Set/Clear Pending Bit 521" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND520 ,Set/Clear Pending Bit 520" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519 ,Set/Clear Pending Bit 519" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND518 ,Set/Clear Pending Bit 518" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND517 ,Set/Clear Pending Bit 517" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516 ,Set/Clear Pending Bit 516" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND515 ,Set/Clear Pending Bit 515" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND514 ,Set/Clear Pending Bit 514" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513 ,Set/Clear Pending Bit 513" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND512 ,Set/Clear Pending Bit 512" "Not pending,Pending" else rgroup.long 0x0240++0x03 line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x11) group.long 0x0244++0x03 line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575 ,Set/Clear Pending Bit 575" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND574 ,Set/Clear Pending Bit 574" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND573 ,Set/Clear Pending Bit 573" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572 ,Set/Clear Pending Bit 572" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND571 ,Set/Clear Pending Bit 571" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND570 ,Set/Clear Pending Bit 570" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569 ,Set/Clear Pending Bit 569" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND568 ,Set/Clear Pending Bit 568" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND567 ,Set/Clear Pending Bit 567" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566 ,Set/Clear Pending Bit 566" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND565 ,Set/Clear Pending Bit 565" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND564 ,Set/Clear Pending Bit 564" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563 ,Set/Clear Pending Bit 563" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND562 ,Set/Clear Pending Bit 562" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND561 ,Set/Clear Pending Bit 561" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560 ,Set/Clear Pending Bit 560" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND559 ,Set/Clear Pending Bit 559" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND558 ,Set/Clear Pending Bit 558" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557 ,Set/Clear Pending Bit 557" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND556 ,Set/Clear Pending Bit 556" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND555 ,Set/Clear Pending Bit 555" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554 ,Set/Clear Pending Bit 554" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND553 ,Set/Clear Pending Bit 553" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND552 ,Set/Clear Pending Bit 552" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551 ,Set/Clear Pending Bit 551" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND550 ,Set/Clear Pending Bit 550" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND549 ,Set/Clear Pending Bit 549" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548 ,Set/Clear Pending Bit 548" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND547 ,Set/Clear Pending Bit 547" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND546 ,Set/Clear Pending Bit 546" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545 ,Set/Clear Pending Bit 545" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND544 ,Set/Clear Pending Bit 544" "Not pending,Pending" else rgroup.long 0x0244++0x03 line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x12) group.long 0x0248++0x03 line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607 ,Set/Clear Pending Bit 607" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND606 ,Set/Clear Pending Bit 606" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND605 ,Set/Clear Pending Bit 605" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604 ,Set/Clear Pending Bit 604" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND603 ,Set/Clear Pending Bit 603" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND602 ,Set/Clear Pending Bit 602" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601 ,Set/Clear Pending Bit 601" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND600 ,Set/Clear Pending Bit 600" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND599 ,Set/Clear Pending Bit 599" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598 ,Set/Clear Pending Bit 598" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND597 ,Set/Clear Pending Bit 597" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND596 ,Set/Clear Pending Bit 596" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595 ,Set/Clear Pending Bit 595" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND594 ,Set/Clear Pending Bit 594" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND593 ,Set/Clear Pending Bit 593" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592 ,Set/Clear Pending Bit 592" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND591 ,Set/Clear Pending Bit 591" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND590 ,Set/Clear Pending Bit 590" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589 ,Set/Clear Pending Bit 589" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND588 ,Set/Clear Pending Bit 588" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND587 ,Set/Clear Pending Bit 587" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586 ,Set/Clear Pending Bit 586" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND585 ,Set/Clear Pending Bit 585" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND584 ,Set/Clear Pending Bit 584" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583 ,Set/Clear Pending Bit 583" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND582 ,Set/Clear Pending Bit 582" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND581 ,Set/Clear Pending Bit 581" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580 ,Set/Clear Pending Bit 580" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND579 ,Set/Clear Pending Bit 579" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND578 ,Set/Clear Pending Bit 578" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577 ,Set/Clear Pending Bit 577" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND576 ,Set/Clear Pending Bit 576" "Not pending,Pending" else rgroup.long 0x0248++0x03 line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x13) group.long 0x024C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639 ,Set/Clear Pending Bit 639" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND638 ,Set/Clear Pending Bit 638" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND637 ,Set/Clear Pending Bit 637" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636 ,Set/Clear Pending Bit 636" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND635 ,Set/Clear Pending Bit 635" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND634 ,Set/Clear Pending Bit 634" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633 ,Set/Clear Pending Bit 633" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND632 ,Set/Clear Pending Bit 632" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND631 ,Set/Clear Pending Bit 631" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630 ,Set/Clear Pending Bit 630" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND629 ,Set/Clear Pending Bit 629" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND628 ,Set/Clear Pending Bit 628" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627 ,Set/Clear Pending Bit 627" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND626 ,Set/Clear Pending Bit 626" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND625 ,Set/Clear Pending Bit 625" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624 ,Set/Clear Pending Bit 624" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND623 ,Set/Clear Pending Bit 623" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND622 ,Set/Clear Pending Bit 622" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621 ,Set/Clear Pending Bit 621" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND620 ,Set/Clear Pending Bit 620" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND619 ,Set/Clear Pending Bit 619" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618 ,Set/Clear Pending Bit 618" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND617 ,Set/Clear Pending Bit 617" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND616 ,Set/Clear Pending Bit 616" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615 ,Set/Clear Pending Bit 615" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND614 ,Set/Clear Pending Bit 614" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND613 ,Set/Clear Pending Bit 613" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612 ,Set/Clear Pending Bit 612" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND611 ,Set/Clear Pending Bit 611" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND610 ,Set/Clear Pending Bit 610" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609 ,Set/Clear Pending Bit 609" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND608 ,Set/Clear Pending Bit 608" "Not pending,Pending" else rgroup.long 0x024C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x14) group.long 0x0250++0x03 line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671 ,Set/Clear Pending Bit 671" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND670 ,Set/Clear Pending Bit 670" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND669 ,Set/Clear Pending Bit 669" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668 ,Set/Clear Pending Bit 668" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND667 ,Set/Clear Pending Bit 667" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND666 ,Set/Clear Pending Bit 666" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665 ,Set/Clear Pending Bit 665" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND664 ,Set/Clear Pending Bit 664" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND663 ,Set/Clear Pending Bit 663" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662 ,Set/Clear Pending Bit 662" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND661 ,Set/Clear Pending Bit 661" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND660 ,Set/Clear Pending Bit 660" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659 ,Set/Clear Pending Bit 659" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND658 ,Set/Clear Pending Bit 658" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND657 ,Set/Clear Pending Bit 657" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656 ,Set/Clear Pending Bit 656" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND655 ,Set/Clear Pending Bit 655" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND654 ,Set/Clear Pending Bit 654" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653 ,Set/Clear Pending Bit 653" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND652 ,Set/Clear Pending Bit 652" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND651 ,Set/Clear Pending Bit 651" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650 ,Set/Clear Pending Bit 650" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND649 ,Set/Clear Pending Bit 649" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND648 ,Set/Clear Pending Bit 648" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647 ,Set/Clear Pending Bit 647" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND646 ,Set/Clear Pending Bit 646" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND645 ,Set/Clear Pending Bit 645" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644 ,Set/Clear Pending Bit 644" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND643 ,Set/Clear Pending Bit 643" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND642 ,Set/Clear Pending Bit 642" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641 ,Set/Clear Pending Bit 641" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND640 ,Set/Clear Pending Bit 640" "Not pending,Pending" else rgroup.long 0x0250++0x03 line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x15) group.long 0x0254++0x03 line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703 ,Set/Clear Pending Bit 703" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND702 ,Set/Clear Pending Bit 702" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND701 ,Set/Clear Pending Bit 701" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700 ,Set/Clear Pending Bit 700" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND699 ,Set/Clear Pending Bit 699" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND698 ,Set/Clear Pending Bit 698" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697 ,Set/Clear Pending Bit 697" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND696 ,Set/Clear Pending Bit 696" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND695 ,Set/Clear Pending Bit 695" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694 ,Set/Clear Pending Bit 694" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND693 ,Set/Clear Pending Bit 693" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND692 ,Set/Clear Pending Bit 692" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691 ,Set/Clear Pending Bit 691" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND690 ,Set/Clear Pending Bit 690" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND689 ,Set/Clear Pending Bit 689" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688 ,Set/Clear Pending Bit 688" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND687 ,Set/Clear Pending Bit 687" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND686 ,Set/Clear Pending Bit 686" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685 ,Set/Clear Pending Bit 685" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND684 ,Set/Clear Pending Bit 684" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND683 ,Set/Clear Pending Bit 683" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682 ,Set/Clear Pending Bit 682" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND681 ,Set/Clear Pending Bit 681" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND680 ,Set/Clear Pending Bit 680" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679 ,Set/Clear Pending Bit 679" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND678 ,Set/Clear Pending Bit 678" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND677 ,Set/Clear Pending Bit 677" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676 ,Set/Clear Pending Bit 676" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND675 ,Set/Clear Pending Bit 675" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND674 ,Set/Clear Pending Bit 674" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673 ,Set/Clear Pending Bit 673" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND672 ,Set/Clear Pending Bit 672" "Not pending,Pending" else rgroup.long 0x0254++0x03 line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x16) group.long 0x0258++0x03 line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735 ,Set/Clear Pending Bit 735" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND734 ,Set/Clear Pending Bit 734" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND733 ,Set/Clear Pending Bit 733" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732 ,Set/Clear Pending Bit 732" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND731 ,Set/Clear Pending Bit 731" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND730 ,Set/Clear Pending Bit 730" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729 ,Set/Clear Pending Bit 729" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND728 ,Set/Clear Pending Bit 728" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND727 ,Set/Clear Pending Bit 727" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726 ,Set/Clear Pending Bit 726" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND725 ,Set/Clear Pending Bit 725" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND724 ,Set/Clear Pending Bit 724" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723 ,Set/Clear Pending Bit 723" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND722 ,Set/Clear Pending Bit 722" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND721 ,Set/Clear Pending Bit 721" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720 ,Set/Clear Pending Bit 720" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND719 ,Set/Clear Pending Bit 719" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND718 ,Set/Clear Pending Bit 718" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717 ,Set/Clear Pending Bit 717" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND716 ,Set/Clear Pending Bit 716" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND715 ,Set/Clear Pending Bit 715" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714 ,Set/Clear Pending Bit 714" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND713 ,Set/Clear Pending Bit 713" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND712 ,Set/Clear Pending Bit 712" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711 ,Set/Clear Pending Bit 711" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND710 ,Set/Clear Pending Bit 710" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND709 ,Set/Clear Pending Bit 709" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708 ,Set/Clear Pending Bit 708" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND707 ,Set/Clear Pending Bit 707" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND706 ,Set/Clear Pending Bit 706" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705 ,Set/Clear Pending Bit 705" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND704 ,Set/Clear Pending Bit 704" "Not pending,Pending" else rgroup.long 0x0258++0x03 line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x17) group.long 0x025C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767 ,Set/Clear Pending Bit 767" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND766 ,Set/Clear Pending Bit 766" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND765 ,Set/Clear Pending Bit 765" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764 ,Set/Clear Pending Bit 764" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND763 ,Set/Clear Pending Bit 763" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND762 ,Set/Clear Pending Bit 762" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761 ,Set/Clear Pending Bit 761" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND760 ,Set/Clear Pending Bit 760" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND759 ,Set/Clear Pending Bit 759" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758 ,Set/Clear Pending Bit 758" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND757 ,Set/Clear Pending Bit 757" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND756 ,Set/Clear Pending Bit 756" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755 ,Set/Clear Pending Bit 755" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND754 ,Set/Clear Pending Bit 754" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND753 ,Set/Clear Pending Bit 753" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752 ,Set/Clear Pending Bit 752" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND751 ,Set/Clear Pending Bit 751" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND750 ,Set/Clear Pending Bit 750" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749 ,Set/Clear Pending Bit 749" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND748 ,Set/Clear Pending Bit 748" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND747 ,Set/Clear Pending Bit 747" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746 ,Set/Clear Pending Bit 746" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND745 ,Set/Clear Pending Bit 745" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND744 ,Set/Clear Pending Bit 744" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743 ,Set/Clear Pending Bit 743" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND742 ,Set/Clear Pending Bit 742" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND741 ,Set/Clear Pending Bit 741" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740 ,Set/Clear Pending Bit 740" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND739 ,Set/Clear Pending Bit 739" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND738 ,Set/Clear Pending Bit 738" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737 ,Set/Clear Pending Bit 737" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND736 ,Set/Clear Pending Bit 736" "Not pending,Pending" else rgroup.long 0x025C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x18) group.long 0x0260++0x03 line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799 ,Set/Clear Pending Bit 799" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND798 ,Set/Clear Pending Bit 798" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND797 ,Set/Clear Pending Bit 797" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796 ,Set/Clear Pending Bit 796" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND795 ,Set/Clear Pending Bit 795" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND794 ,Set/Clear Pending Bit 794" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793 ,Set/Clear Pending Bit 793" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND792 ,Set/Clear Pending Bit 792" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND791 ,Set/Clear Pending Bit 791" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790 ,Set/Clear Pending Bit 790" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND789 ,Set/Clear Pending Bit 789" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND788 ,Set/Clear Pending Bit 788" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787 ,Set/Clear Pending Bit 787" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND786 ,Set/Clear Pending Bit 786" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND785 ,Set/Clear Pending Bit 785" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784 ,Set/Clear Pending Bit 784" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND783 ,Set/Clear Pending Bit 783" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND782 ,Set/Clear Pending Bit 782" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781 ,Set/Clear Pending Bit 781" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND780 ,Set/Clear Pending Bit 780" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND779 ,Set/Clear Pending Bit 779" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778 ,Set/Clear Pending Bit 778" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND777 ,Set/Clear Pending Bit 777" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND776 ,Set/Clear Pending Bit 776" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775 ,Set/Clear Pending Bit 775" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND774 ,Set/Clear Pending Bit 774" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND773 ,Set/Clear Pending Bit 773" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772 ,Set/Clear Pending Bit 772" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND771 ,Set/Clear Pending Bit 771" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND770 ,Set/Clear Pending Bit 770" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769 ,Set/Clear Pending Bit 769" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND768 ,Set/Clear Pending Bit 768" "Not pending,Pending" else rgroup.long 0x0260++0x03 line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x19) group.long 0x0264++0x03 line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831 ,Set/Clear Pending Bit 831" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND830 ,Set/Clear Pending Bit 830" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND829 ,Set/Clear Pending Bit 829" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828 ,Set/Clear Pending Bit 828" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND827 ,Set/Clear Pending Bit 827" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND826 ,Set/Clear Pending Bit 826" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825 ,Set/Clear Pending Bit 825" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND824 ,Set/Clear Pending Bit 824" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND823 ,Set/Clear Pending Bit 823" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822 ,Set/Clear Pending Bit 822" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND821 ,Set/Clear Pending Bit 821" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND820 ,Set/Clear Pending Bit 820" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819 ,Set/Clear Pending Bit 819" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND818 ,Set/Clear Pending Bit 818" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND817 ,Set/Clear Pending Bit 817" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816 ,Set/Clear Pending Bit 816" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND815 ,Set/Clear Pending Bit 815" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND814 ,Set/Clear Pending Bit 814" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813 ,Set/Clear Pending Bit 813" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND812 ,Set/Clear Pending Bit 812" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND811 ,Set/Clear Pending Bit 811" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810 ,Set/Clear Pending Bit 810" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND809 ,Set/Clear Pending Bit 809" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND808 ,Set/Clear Pending Bit 808" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807 ,Set/Clear Pending Bit 807" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND806 ,Set/Clear Pending Bit 806" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND805 ,Set/Clear Pending Bit 805" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804 ,Set/Clear Pending Bit 804" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND803 ,Set/Clear Pending Bit 803" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND802 ,Set/Clear Pending Bit 802" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801 ,Set/Clear Pending Bit 801" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND800 ,Set/Clear Pending Bit 800" "Not pending,Pending" else rgroup.long 0x0264++0x03 line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1A) group.long 0x0268++0x03 line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863 ,Set/Clear Pending Bit 863" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND862 ,Set/Clear Pending Bit 862" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND861 ,Set/Clear Pending Bit 861" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860 ,Set/Clear Pending Bit 860" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND859 ,Set/Clear Pending Bit 859" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND858 ,Set/Clear Pending Bit 858" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857 ,Set/Clear Pending Bit 857" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND856 ,Set/Clear Pending Bit 856" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND855 ,Set/Clear Pending Bit 855" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854 ,Set/Clear Pending Bit 854" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND853 ,Set/Clear Pending Bit 853" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND852 ,Set/Clear Pending Bit 852" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851 ,Set/Clear Pending Bit 851" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND850 ,Set/Clear Pending Bit 850" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND849 ,Set/Clear Pending Bit 849" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848 ,Set/Clear Pending Bit 848" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND847 ,Set/Clear Pending Bit 847" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND846 ,Set/Clear Pending Bit 846" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845 ,Set/Clear Pending Bit 845" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND844 ,Set/Clear Pending Bit 844" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND843 ,Set/Clear Pending Bit 843" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842 ,Set/Clear Pending Bit 842" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND841 ,Set/Clear Pending Bit 841" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND840 ,Set/Clear Pending Bit 840" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839 ,Set/Clear Pending Bit 839" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND838 ,Set/Clear Pending Bit 838" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND837 ,Set/Clear Pending Bit 837" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836 ,Set/Clear Pending Bit 836" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND835 ,Set/Clear Pending Bit 835" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND834 ,Set/Clear Pending Bit 834" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833 ,Set/Clear Pending Bit 833" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND832 ,Set/Clear Pending Bit 832" "Not pending,Pending" else rgroup.long 0x0268++0x03 line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1B) group.long 0x026C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895 ,Set/Clear Pending Bit 895" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND894 ,Set/Clear Pending Bit 894" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND893 ,Set/Clear Pending Bit 893" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892 ,Set/Clear Pending Bit 892" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND891 ,Set/Clear Pending Bit 891" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND890 ,Set/Clear Pending Bit 890" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889 ,Set/Clear Pending Bit 889" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND888 ,Set/Clear Pending Bit 888" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND887 ,Set/Clear Pending Bit 887" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886 ,Set/Clear Pending Bit 886" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND885 ,Set/Clear Pending Bit 885" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND884 ,Set/Clear Pending Bit 884" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883 ,Set/Clear Pending Bit 883" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND882 ,Set/Clear Pending Bit 882" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND881 ,Set/Clear Pending Bit 881" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880 ,Set/Clear Pending Bit 880" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND879 ,Set/Clear Pending Bit 879" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND878 ,Set/Clear Pending Bit 878" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877 ,Set/Clear Pending Bit 877" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND876 ,Set/Clear Pending Bit 876" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND875 ,Set/Clear Pending Bit 875" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874 ,Set/Clear Pending Bit 874" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND873 ,Set/Clear Pending Bit 873" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND872 ,Set/Clear Pending Bit 872" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871 ,Set/Clear Pending Bit 871" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND870 ,Set/Clear Pending Bit 870" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND869 ,Set/Clear Pending Bit 869" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868 ,Set/Clear Pending Bit 868" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND867 ,Set/Clear Pending Bit 867" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND866 ,Set/Clear Pending Bit 866" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865 ,Set/Clear Pending Bit 865" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND864 ,Set/Clear Pending Bit 864" "Not pending,Pending" else rgroup.long 0x026C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1C) group.long 0x0270++0x03 line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927 ,Set/Clear Pending Bit 927" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND926 ,Set/Clear Pending Bit 926" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND925 ,Set/Clear Pending Bit 925" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924 ,Set/Clear Pending Bit 924" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND923 ,Set/Clear Pending Bit 923" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND922 ,Set/Clear Pending Bit 922" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921 ,Set/Clear Pending Bit 921" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND920 ,Set/Clear Pending Bit 920" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND919 ,Set/Clear Pending Bit 919" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918 ,Set/Clear Pending Bit 918" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND917 ,Set/Clear Pending Bit 917" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND916 ,Set/Clear Pending Bit 916" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915 ,Set/Clear Pending Bit 915" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND914 ,Set/Clear Pending Bit 914" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND913 ,Set/Clear Pending Bit 913" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912 ,Set/Clear Pending Bit 912" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND911 ,Set/Clear Pending Bit 911" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND910 ,Set/Clear Pending Bit 910" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909 ,Set/Clear Pending Bit 909" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND908 ,Set/Clear Pending Bit 908" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND907 ,Set/Clear Pending Bit 907" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906 ,Set/Clear Pending Bit 906" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND905 ,Set/Clear Pending Bit 905" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND904 ,Set/Clear Pending Bit 904" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903 ,Set/Clear Pending Bit 903" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND902 ,Set/Clear Pending Bit 902" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND901 ,Set/Clear Pending Bit 901" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900 ,Set/Clear Pending Bit 900" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND899 ,Set/Clear Pending Bit 899" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND898 ,Set/Clear Pending Bit 898" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897 ,Set/Clear Pending Bit 897" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND896 ,Set/Clear Pending Bit 896" "Not pending,Pending" else rgroup.long 0x0270++0x03 line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1D) group.long 0x0274++0x03 line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959 ,Set/Clear Pending Bit 959" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND958 ,Set/Clear Pending Bit 958" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND957 ,Set/Clear Pending Bit 957" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956 ,Set/Clear Pending Bit 956" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND955 ,Set/Clear Pending Bit 955" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND954 ,Set/Clear Pending Bit 954" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953 ,Set/Clear Pending Bit 953" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND952 ,Set/Clear Pending Bit 952" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND951 ,Set/Clear Pending Bit 951" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950 ,Set/Clear Pending Bit 950" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND949 ,Set/Clear Pending Bit 949" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND948 ,Set/Clear Pending Bit 948" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947 ,Set/Clear Pending Bit 947" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND946 ,Set/Clear Pending Bit 946" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND945 ,Set/Clear Pending Bit 945" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944 ,Set/Clear Pending Bit 944" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND943 ,Set/Clear Pending Bit 943" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND942 ,Set/Clear Pending Bit 942" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941 ,Set/Clear Pending Bit 941" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND940 ,Set/Clear Pending Bit 940" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND939 ,Set/Clear Pending Bit 939" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938 ,Set/Clear Pending Bit 938" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND937 ,Set/Clear Pending Bit 937" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND936 ,Set/Clear Pending Bit 936" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935 ,Set/Clear Pending Bit 935" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND934 ,Set/Clear Pending Bit 934" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND933 ,Set/Clear Pending Bit 933" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932 ,Set/Clear Pending Bit 932" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND931 ,Set/Clear Pending Bit 931" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND930 ,Set/Clear Pending Bit 930" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929 ,Set/Clear Pending Bit 929" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND928 ,Set/Clear Pending Bit 928" "Not pending,Pending" else rgroup.long 0x0274++0x03 line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1E) group.long 0x0278++0x03 line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991 ,Set/Clear Pending Bit 991" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND990 ,Set/Clear Pending Bit 990" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND989 ,Set/Clear Pending Bit 989" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988 ,Set/Clear Pending Bit 988" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND987 ,Set/Clear Pending Bit 987" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND986 ,Set/Clear Pending Bit 986" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985 ,Set/Clear Pending Bit 985" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND984 ,Set/Clear Pending Bit 984" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND983 ,Set/Clear Pending Bit 983" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982 ,Set/Clear Pending Bit 982" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND981 ,Set/Clear Pending Bit 981" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND980 ,Set/Clear Pending Bit 980" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979 ,Set/Clear Pending Bit 979" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND978 ,Set/Clear Pending Bit 978" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND977 ,Set/Clear Pending Bit 977" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976 ,Set/Clear Pending Bit 976" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND975 ,Set/Clear Pending Bit 975" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND974 ,Set/Clear Pending Bit 974" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973 ,Set/Clear Pending Bit 973" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND972 ,Set/Clear Pending Bit 972" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND971 ,Set/Clear Pending Bit 971" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970 ,Set/Clear Pending Bit 970" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND969 ,Set/Clear Pending Bit 969" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND968 ,Set/Clear Pending Bit 968" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967 ,Set/Clear Pending Bit 967" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND966 ,Set/Clear Pending Bit 966" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND965 ,Set/Clear Pending Bit 965" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964 ,Set/Clear Pending Bit 964" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND963 ,Set/Clear Pending Bit 963" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND962 ,Set/Clear Pending Bit 962" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961 ,Set/Clear Pending Bit 961" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND960 ,Set/Clear Pending Bit 960" "Not pending,Pending" else rgroup.long 0x0278++0x03 line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)==0x1F) group.long 0x027C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND1019 ,Set/Clear Pending Bit 1019" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND1018 ,Set/Clear Pending Bit 1018" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND1017 ,Set/Clear Pending Bit 1017" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND1016 ,Set/Clear Pending Bit 1016" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND1015 ,Set/Clear Pending Bit 1015" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND1014 ,Set/Clear Pending Bit 1014" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND1013 ,Set/Clear Pending Bit 1013" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND1012 ,Set/Clear Pending Bit 1012" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND1011 ,Set/Clear Pending Bit 1011" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND1010 ,Set/Clear Pending Bit 1010" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND1009 ,Set/Clear Pending Bit 1009" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND1008 ,Set/Clear Pending Bit 1008" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND1007 ,Set/Clear Pending Bit 1007" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND1006 ,Set/Clear Pending Bit 1006" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND1005 ,Set/Clear Pending Bit 1005" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND1004 ,Set/Clear Pending Bit 1004" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND1003 ,Set/Clear Pending Bit 1003" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND1002 ,Set/Clear Pending Bit 1002" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND1001 ,Set/Clear Pending Bit 1001" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND1000 ,Set/Clear Pending Bit 1000" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND999 ,Set/Clear Pending Bit 999" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND998 ,Set/Clear Pending Bit 998" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND997 ,Set/Clear Pending Bit 997" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND996 ,Set/Clear Pending Bit 996" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND995 ,Set/Clear Pending Bit 995" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND994 ,Set/Clear Pending Bit 994" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND993 ,Set/Clear Pending Bit 993" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND992 ,Set/Clear Pending Bit 992" "Not pending,Pending" else rgroup.long 0x027C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 24. tree "Set/Clear Active Registers" if (((per.l(ad:0x4ac10000+0x08))&0xFF000000)==(0x0000000||0x1000000)) rgroup.long 0x0300++0x03 line.long 0x0 "GICD_ICDABR0,Active Status Register 0" bitfld.long 0x00 31. " ASB31 ,Active Status Bit 31" "Not active,Active" bitfld.long 0x00 30. " ASB30 ,Active Status Bit 30" "Not active,Active" bitfld.long 0x00 29. " ASB29 ,Active Status Bit 29" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB28 ,Active Status Bit 28" "Not active,Active" bitfld.long 0x00 27. " ASB27 ,Active Status Bit 27" "Not active,Active" bitfld.long 0x00 26. " ASB26 ,Active Status Bit 26" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB25 ,Active Status Bit 25" "Not active,Active" bitfld.long 0x00 24. " ASB24 ,Active Status Bit 24" "Not active,Active" bitfld.long 0x00 23. " ASB23 ,Active Status Bit 23" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB22 ,Active Status Bit 22" "Not active,Active" bitfld.long 0x00 21. " ASB21 ,Active Status Bit 21" "Not active,Active" bitfld.long 0x00 20. " ASB20 ,Active Status Bit 20" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB19 ,Active Status Bit 19" "Not active,Active" bitfld.long 0x00 18. " ASB18 ,Active Status Bit 18" "Not active,Active" bitfld.long 0x00 17. " ASB17 ,Active Status Bit 17" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB16 ,Active Status Bit 16" "Not active,Active" bitfld.long 0x00 15. " ASB15 ,Active Status Bit 15" "Not active,Active" bitfld.long 0x00 14. " ASB14 ,Active Status Bit 14" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB13 ,Active Status Bit 13" "Not active,Active" bitfld.long 0x00 12. " ASB12 ,Active Status Bit 12" "Not active,Active" bitfld.long 0x00 11. " ASB11 ,Active Status Bit 11" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB10 ,Active Status Bit 10" "Not active,Active" bitfld.long 0x00 9. " ASB9 ,Active Status Bit 9" "Not active,Active" bitfld.long 0x00 8. " ASB8 ,Active Status Bit 8" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB7 ,Active Status Bit 7" "Not active,Active" bitfld.long 0x00 6. " ASB6 ,Active Status Bit 6" "Not active,Active" bitfld.long 0x00 5. " ASB5 ,Active Status Bit 5" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB4 ,Active Status Bit 4" "Not active,Active" bitfld.long 0x00 3. " ASB3 ,Active Status Bit 3" "Not active,Active" bitfld.long 0x00 2. " ASB2 ,Active Status Bit 2" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB1 ,Active Status Bit 1" "Not active,Active" bitfld.long 0x00 0. " ASB0 ,Active Status Bit 0" "Not active,Active" if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x01) rgroup.long 0x0304++0x03 line.long 0x0 "GICD_ICDABR1,Active Status Register 1" bitfld.long 0x00 31. " ASB63 ,Active Status Bit 63" "Not active,Active" bitfld.long 0x00 30. " ASB62 ,Active Status Bit 62" "Not active,Active" bitfld.long 0x00 29. " ASB61 ,Active Status Bit 61" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB60 ,Active Status Bit 60" "Not active,Active" bitfld.long 0x00 27. " ASB59 ,Active Status Bit 59" "Not active,Active" bitfld.long 0x00 26. " ASB58 ,Active Status Bit 58" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB57 ,Active Status Bit 57" "Not active,Active" bitfld.long 0x00 24. " ASB56 ,Active Status Bit 56" "Not active,Active" bitfld.long 0x00 23. " ASB55 ,Active Status Bit 55" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB54 ,Active Status Bit 54" "Not active,Active" bitfld.long 0x00 21. " ASB53 ,Active Status Bit 53" "Not active,Active" bitfld.long 0x00 20. " ASB52 ,Active Status Bit 52" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB51 ,Active Status Bit 51" "Not active,Active" bitfld.long 0x00 18. " ASB50 ,Active Status Bit 50" "Not active,Active" bitfld.long 0x00 17. " ASB49 ,Active Status Bit 49" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB48 ,Active Status Bit 48" "Not active,Active" bitfld.long 0x00 15. " ASB47 ,Active Status Bit 47" "Not active,Active" bitfld.long 0x00 14. " ASB46 ,Active Status Bit 46" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB45 ,Active Status Bit 45" "Not active,Active" bitfld.long 0x00 12. " ASB44 ,Active Status Bit 44" "Not active,Active" bitfld.long 0x00 11. " ASB43 ,Active Status Bit 43" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB42 ,Active Status Bit 42" "Not active,Active" bitfld.long 0x00 9. " ASB41 ,Active Status Bit 41" "Not active,Active" bitfld.long 0x00 8. " ASB40 ,Active Status Bit 40" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB39 ,Active Status Bit 39" "Not active,Active" bitfld.long 0x00 6. " ASB38 ,Active Status Bit 38" "Not active,Active" bitfld.long 0x00 5. " ASB37 ,Active Status Bit 37" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB36 ,Active Status Bit 36" "Not active,Active" bitfld.long 0x00 3. " ASB35 ,Active Status Bit 35" "Not active,Active" bitfld.long 0x00 2. " ASB34 ,Active Status Bit 34" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB33 ,Active Status Bit 33" "Not active,Active" bitfld.long 0x00 0. " ASB32 ,Active Status Bit 32" "Not active,Active" else rgroup.long 0x0304++0x03 line.long 0x0 "GICD_ICDABR1,Active Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x02) rgroup.long 0x0308++0x03 line.long 0x0 "GICD_ICDABR2,Active Status Register 2" bitfld.long 0x00 31. " ASB95 ,Active Status Bit 95" "Not active,Active" bitfld.long 0x00 30. " ASB94 ,Active Status Bit 94" "Not active,Active" bitfld.long 0x00 29. " ASB93 ,Active Status Bit 93" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB92 ,Active Status Bit 92" "Not active,Active" bitfld.long 0x00 27. " ASB91 ,Active Status Bit 91" "Not active,Active" bitfld.long 0x00 26. " ASB90 ,Active Status Bit 90" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB89 ,Active Status Bit 89" "Not active,Active" bitfld.long 0x00 24. " ASB88 ,Active Status Bit 88" "Not active,Active" bitfld.long 0x00 23. " ASB87 ,Active Status Bit 87" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB86 ,Active Status Bit 86" "Not active,Active" bitfld.long 0x00 21. " ASB85 ,Active Status Bit 85" "Not active,Active" bitfld.long 0x00 20. " ASB84 ,Active Status Bit 84" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB83 ,Active Status Bit 83" "Not active,Active" bitfld.long 0x00 18. " ASB82 ,Active Status Bit 82" "Not active,Active" bitfld.long 0x00 17. " ASB81 ,Active Status Bit 81" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB80 ,Active Status Bit 80" "Not active,Active" bitfld.long 0x00 15. " ASB79 ,Active Status Bit 79" "Not active,Active" bitfld.long 0x00 14. " ASB78 ,Active Status Bit 78" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB77 ,Active Status Bit 77" "Not active,Active" bitfld.long 0x00 12. " ASB76 ,Active Status Bit 76" "Not active,Active" bitfld.long 0x00 11. " ASB75 ,Active Status Bit 75" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB74 ,Active Status Bit 74" "Not active,Active" bitfld.long 0x00 9. " ASB73 ,Active Status Bit 73" "Not active,Active" bitfld.long 0x00 8. " ASB72 ,Active Status Bit 72" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB71 ,Active Status Bit 71" "Not active,Active" bitfld.long 0x00 6. " ASB70 ,Active Status Bit 70" "Not active,Active" bitfld.long 0x00 5. " ASB69 ,Active Status Bit 69" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB68 ,Active Status Bit 68" "Not active,Active" bitfld.long 0x00 3. " ASB67 ,Active Status Bit 67" "Not active,Active" bitfld.long 0x00 2. " ASB66 ,Active Status Bit 66" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB65 ,Active Status Bit 65" "Not active,Active" bitfld.long 0x00 0. " ASB64 ,Active Status Bit 64" "Not active,Active" else rgroup.long 0x0308++0x03 line.long 0x0 "GICD_ICDABR2,Active Status Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x03) rgroup.long 0x030C++0x03 line.long 0x0 "GICD_ICDABR3,Active Status Register 3" bitfld.long 0x00 31. " ASB127 ,Active Status Bit 127" "Not active,Active" bitfld.long 0x00 30. " ASB126 ,Active Status Bit 126" "Not active,Active" bitfld.long 0x00 29. " ASB125 ,Active Status Bit 125" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB124 ,Active Status Bit 124" "Not active,Active" bitfld.long 0x00 27. " ASB123 ,Active Status Bit 123" "Not active,Active" bitfld.long 0x00 26. " ASB122 ,Active Status Bit 122" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB121 ,Active Status Bit 121" "Not active,Active" bitfld.long 0x00 24. " ASB120 ,Active Status Bit 120" "Not active,Active" bitfld.long 0x00 23. " ASB119 ,Active Status Bit 119" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB118 ,Active Status Bit 118" "Not active,Active" bitfld.long 0x00 21. " ASB117 ,Active Status Bit 117" "Not active,Active" bitfld.long 0x00 20. " ASB116 ,Active Status Bit 116" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB115 ,Active Status Bit 115" "Not active,Active" bitfld.long 0x00 18. " ASB114 ,Active Status Bit 114" "Not active,Active" bitfld.long 0x00 17. " ASB113 ,Active Status Bit 113" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB112 ,Active Status Bit 112" "Not active,Active" bitfld.long 0x00 15. " ASB111 ,Active Status Bit 111" "Not active,Active" bitfld.long 0x00 14. " ASB110 ,Active Status Bit 110" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB109 ,Active Status Bit 109" "Not active,Active" bitfld.long 0x00 12. " ASB108 ,Active Status Bit 108" "Not active,Active" bitfld.long 0x00 11. " ASB107 ,Active Status Bit 107" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB106 ,Active Status Bit 106" "Not active,Active" bitfld.long 0x00 9. " ASB105 ,Active Status Bit 105" "Not active,Active" bitfld.long 0x00 8. " ASB104 ,Active Status Bit 104" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB103 ,Active Status Bit 103" "Not active,Active" bitfld.long 0x00 6. " ASB102 ,Active Status Bit 102" "Not active,Active" bitfld.long 0x00 5. " ASB101 ,Active Status Bit 101" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB100 ,Active Status Bit 100" "Not active,Active" bitfld.long 0x00 3. " ASB99 ,Active Status Bit 99" "Not active,Active" bitfld.long 0x00 2. " ASB98 ,Active Status Bit 98" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB97 ,Active Status Bit 97" "Not active,Active" bitfld.long 0x00 0. " ASB96 ,Active Status Bit 96" "Not active,Active" else rgroup.long 0x030C++0x03 line.long 0x0 "GICD_ICDABR3,Active Status Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x04) rgroup.long 0x0310++0x03 line.long 0x0 "GICD_ICDABR4,Active Status Register 4" bitfld.long 0x00 31. " ASB159 ,Active Status Bit 159" "Not active,Active" bitfld.long 0x00 30. " ASB158 ,Active Status Bit 158" "Not active,Active" bitfld.long 0x00 29. " ASB157 ,Active Status Bit 157" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB156 ,Active Status Bit 156" "Not active,Active" bitfld.long 0x00 27. " ASB155 ,Active Status Bit 155" "Not active,Active" bitfld.long 0x00 26. " ASB154 ,Active Status Bit 154" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB153 ,Active Status Bit 153" "Not active,Active" bitfld.long 0x00 24. " ASB152 ,Active Status Bit 152" "Not active,Active" bitfld.long 0x00 23. " ASB151 ,Active Status Bit 151" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB150 ,Active Status Bit 150" "Not active,Active" bitfld.long 0x00 21. " ASB149 ,Active Status Bit 149" "Not active,Active" bitfld.long 0x00 20. " ASB148 ,Active Status Bit 148" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB147 ,Active Status Bit 147" "Not active,Active" bitfld.long 0x00 18. " ASB146 ,Active Status Bit 146" "Not active,Active" bitfld.long 0x00 17. " ASB145 ,Active Status Bit 145" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB144 ,Active Status Bit 144" "Not active,Active" bitfld.long 0x00 15. " ASB143 ,Active Status Bit 143" "Not active,Active" bitfld.long 0x00 14. " ASB142 ,Active Status Bit 142" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB141 ,Active Status Bit 141" "Not active,Active" bitfld.long 0x00 12. " ASB140 ,Active Status Bit 140" "Not active,Active" bitfld.long 0x00 11. " ASB139 ,Active Status Bit 139" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB138 ,Active Status Bit 138" "Not active,Active" bitfld.long 0x00 9. " ASB137 ,Active Status Bit 137" "Not active,Active" bitfld.long 0x00 8. " ASB136 ,Active Status Bit 136" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB135 ,Active Status Bit 135" "Not active,Active" bitfld.long 0x00 6. " ASB134 ,Active Status Bit 134" "Not active,Active" bitfld.long 0x00 5. " ASB133 ,Active Status Bit 133" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB132 ,Active Status Bit 132" "Not active,Active" bitfld.long 0x00 3. " ASB131 ,Active Status Bit 131" "Not active,Active" bitfld.long 0x00 2. " ASB130 ,Active Status Bit 130" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB129 ,Active Status Bit 129" "Not active,Active" bitfld.long 0x00 0. " ASB128 ,Active Status Bit 128" "Not active,Active" else rgroup.long 0x0310++0x03 line.long 0x0 "GICD_ICDABR4,Active Status Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x05) rgroup.long 0x0314++0x03 line.long 0x0 "GICD_ICDABR5,Active Status Register 5" bitfld.long 0x00 31. " ASB191 ,Active Status Bit 191" "Not active,Active" bitfld.long 0x00 30. " ASB190 ,Active Status Bit 190" "Not active,Active" bitfld.long 0x00 29. " ASB189 ,Active Status Bit 189" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB188 ,Active Status Bit 188" "Not active,Active" bitfld.long 0x00 27. " ASB187 ,Active Status Bit 187" "Not active,Active" bitfld.long 0x00 26. " ASB186 ,Active Status Bit 186" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB185 ,Active Status Bit 185" "Not active,Active" bitfld.long 0x00 24. " ASB184 ,Active Status Bit 184" "Not active,Active" bitfld.long 0x00 23. " ASB183 ,Active Status Bit 183" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB182 ,Active Status Bit 182" "Not active,Active" bitfld.long 0x00 21. " ASB181 ,Active Status Bit 181" "Not active,Active" bitfld.long 0x00 20. " ASB180 ,Active Status Bit 180" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB179 ,Active Status Bit 179" "Not active,Active" bitfld.long 0x00 18. " ASB178 ,Active Status Bit 178" "Not active,Active" bitfld.long 0x00 17. " ASB177 ,Active Status Bit 177" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB176 ,Active Status Bit 176" "Not active,Active" bitfld.long 0x00 15. " ASB175 ,Active Status Bit 175" "Not active,Active" bitfld.long 0x00 14. " ASB174 ,Active Status Bit 174" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB173 ,Active Status Bit 173" "Not active,Active" bitfld.long 0x00 12. " ASB172 ,Active Status Bit 172" "Not active,Active" bitfld.long 0x00 11. " ASB171 ,Active Status Bit 171" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB170 ,Active Status Bit 170" "Not active,Active" bitfld.long 0x00 9. " ASB169 ,Active Status Bit 169" "Not active,Active" bitfld.long 0x00 8. " ASB168 ,Active Status Bit 168" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB167 ,Active Status Bit 167" "Not active,Active" bitfld.long 0x00 6. " ASB166 ,Active Status Bit 166" "Not active,Active" bitfld.long 0x00 5. " ASB165 ,Active Status Bit 165" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB164 ,Active Status Bit 164" "Not active,Active" bitfld.long 0x00 3. " ASB163 ,Active Status Bit 163" "Not active,Active" bitfld.long 0x00 2. " ASB162 ,Active Status Bit 162" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB161 ,Active Status Bit 161" "Not active,Active" bitfld.long 0x00 0. " ASB160 ,Active Status Bit 160" "Not active,Active" else rgroup.long 0x0314++0x03 line.long 0x0 "GICD_ICDABR5,Active Status Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x06) rgroup.long 0x0318++0x03 line.long 0x0 "GICD_ICDABR6,Active Status Register 6" bitfld.long 0x00 31. " ASB223 ,Active Status Bit 223" "Not active,Active" bitfld.long 0x00 30. " ASB222 ,Active Status Bit 222" "Not active,Active" bitfld.long 0x00 29. " ASB221 ,Active Status Bit 221" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB220 ,Active Status Bit 220" "Not active,Active" bitfld.long 0x00 27. " ASB219 ,Active Status Bit 219" "Not active,Active" bitfld.long 0x00 26. " ASB218 ,Active Status Bit 218" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB217 ,Active Status Bit 217" "Not active,Active" bitfld.long 0x00 24. " ASB216 ,Active Status Bit 216" "Not active,Active" bitfld.long 0x00 23. " ASB215 ,Active Status Bit 215" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB214 ,Active Status Bit 214" "Not active,Active" bitfld.long 0x00 21. " ASB213 ,Active Status Bit 213" "Not active,Active" bitfld.long 0x00 20. " ASB212 ,Active Status Bit 212" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB211 ,Active Status Bit 211" "Not active,Active" bitfld.long 0x00 18. " ASB210 ,Active Status Bit 210" "Not active,Active" bitfld.long 0x00 17. " ASB209 ,Active Status Bit 209" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB208 ,Active Status Bit 208" "Not active,Active" bitfld.long 0x00 15. " ASB207 ,Active Status Bit 207" "Not active,Active" bitfld.long 0x00 14. " ASB206 ,Active Status Bit 206" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB205 ,Active Status Bit 205" "Not active,Active" bitfld.long 0x00 12. " ASB204 ,Active Status Bit 204" "Not active,Active" bitfld.long 0x00 11. " ASB203 ,Active Status Bit 203" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB202 ,Active Status Bit 202" "Not active,Active" bitfld.long 0x00 9. " ASB201 ,Active Status Bit 201" "Not active,Active" bitfld.long 0x00 8. " ASB200 ,Active Status Bit 200" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB199 ,Active Status Bit 199" "Not active,Active" bitfld.long 0x00 6. " ASB198 ,Active Status Bit 198" "Not active,Active" bitfld.long 0x00 5. " ASB197 ,Active Status Bit 197" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB196 ,Active Status Bit 196" "Not active,Active" bitfld.long 0x00 3. " ASB195 ,Active Status Bit 195" "Not active,Active" bitfld.long 0x00 2. " ASB194 ,Active Status Bit 194" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB193 ,Active Status Bit 193" "Not active,Active" bitfld.long 0x00 0. " ASB192 ,Active Status Bit 192" "Not active,Active" else rgroup.long 0x0318++0x03 line.long 0x0 "GICD_ICDABR6,Active Status Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x07) rgroup.long 0x031C++0x03 line.long 0x0 "GICD_ICDABR7,Active Status Register 7" bitfld.long 0x00 31. " ASB255 ,Active Status Bit 255" "Not active,Active" bitfld.long 0x00 30. " ASB254 ,Active Status Bit 254" "Not active,Active" bitfld.long 0x00 29. " ASB253 ,Active Status Bit 253" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB252 ,Active Status Bit 252" "Not active,Active" bitfld.long 0x00 27. " ASB251 ,Active Status Bit 251" "Not active,Active" bitfld.long 0x00 26. " ASB250 ,Active Status Bit 250" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB249 ,Active Status Bit 249" "Not active,Active" bitfld.long 0x00 24. " ASB248 ,Active Status Bit 248" "Not active,Active" bitfld.long 0x00 23. " ASB247 ,Active Status Bit 247" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB246 ,Active Status Bit 246" "Not active,Active" bitfld.long 0x00 21. " ASB245 ,Active Status Bit 245" "Not active,Active" bitfld.long 0x00 20. " ASB244 ,Active Status Bit 244" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB243 ,Active Status Bit 243" "Not active,Active" bitfld.long 0x00 18. " ASB242 ,Active Status Bit 242" "Not active,Active" bitfld.long 0x00 17. " ASB241 ,Active Status Bit 241" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB240 ,Active Status Bit 240" "Not active,Active" bitfld.long 0x00 15. " ASB239 ,Active Status Bit 239" "Not active,Active" bitfld.long 0x00 14. " ASB238 ,Active Status Bit 238" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB237 ,Active Status Bit 237" "Not active,Active" bitfld.long 0x00 12. " ASB236 ,Active Status Bit 236" "Not active,Active" bitfld.long 0x00 11. " ASB235 ,Active Status Bit 235" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB234 ,Active Status Bit 234" "Not active,Active" bitfld.long 0x00 9. " ASB233 ,Active Status Bit 233" "Not active,Active" bitfld.long 0x00 8. " ASB232 ,Active Status Bit 232" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB231 ,Active Status Bit 231" "Not active,Active" bitfld.long 0x00 6. " ASB230 ,Active Status Bit 230" "Not active,Active" bitfld.long 0x00 5. " ASB229 ,Active Status Bit 229" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB228 ,Active Status Bit 228" "Not active,Active" bitfld.long 0x00 3. " ASB227 ,Active Status Bit 227" "Not active,Active" bitfld.long 0x00 2. " ASB226 ,Active Status Bit 226" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB225 ,Active Status Bit 225" "Not active,Active" bitfld.long 0x00 0. " ASB224 ,Active Status Bit 224" "Not active,Active" else rgroup.long 0x031C++0x03 line.long 0x0 "GICD_ICDABR7,Active Status Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x08) rgroup.long 0x0320++0x03 line.long 0x0 "GICD_ICDABR8,Active Status Register 8" bitfld.long 0x00 31. " ASB287 ,Active Status Bit 287" "Not active,Active" bitfld.long 0x00 30. " ASB286 ,Active Status Bit 286" "Not active,Active" bitfld.long 0x00 29. " ASB285 ,Active Status Bit 285" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB284 ,Active Status Bit 284" "Not active,Active" bitfld.long 0x00 27. " ASB283 ,Active Status Bit 283" "Not active,Active" bitfld.long 0x00 26. " ASB282 ,Active Status Bit 282" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB281 ,Active Status Bit 281" "Not active,Active" bitfld.long 0x00 24. " ASB280 ,Active Status Bit 280" "Not active,Active" bitfld.long 0x00 23. " ASB279 ,Active Status Bit 279" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB278 ,Active Status Bit 278" "Not active,Active" bitfld.long 0x00 21. " ASB277 ,Active Status Bit 277" "Not active,Active" bitfld.long 0x00 20. " ASB276 ,Active Status Bit 276" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB275 ,Active Status Bit 275" "Not active,Active" bitfld.long 0x00 18. " ASB274 ,Active Status Bit 274" "Not active,Active" bitfld.long 0x00 17. " ASB273 ,Active Status Bit 273" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB272 ,Active Status Bit 272" "Not active,Active" bitfld.long 0x00 15. " ASB271 ,Active Status Bit 271" "Not active,Active" bitfld.long 0x00 14. " ASB270 ,Active Status Bit 270" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB269 ,Active Status Bit 269" "Not active,Active" bitfld.long 0x00 12. " ASB268 ,Active Status Bit 268" "Not active,Active" bitfld.long 0x00 11. " ASB267 ,Active Status Bit 267" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB266 ,Active Status Bit 266" "Not active,Active" bitfld.long 0x00 9. " ASB265 ,Active Status Bit 265" "Not active,Active" bitfld.long 0x00 8. " ASB264 ,Active Status Bit 264" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB263 ,Active Status Bit 263" "Not active,Active" bitfld.long 0x00 6. " ASB262 ,Active Status Bit 262" "Not active,Active" bitfld.long 0x00 5. " ASB261 ,Active Status Bit 261" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB260 ,Active Status Bit 260" "Not active,Active" bitfld.long 0x00 3. " ASB259 ,Active Status Bit 259" "Not active,Active" bitfld.long 0x00 2. " ASB258 ,Active Status Bit 258" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB257 ,Active Status Bit 257" "Not active,Active" bitfld.long 0x00 0. " ASB256 ,Active Status Bit 256" "Not active,Active" else rgroup.long 0x0320++0x03 line.long 0x0 "GICD_ICDABR8,Active Status Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x09) rgroup.long 0x0324++0x03 line.long 0x0 "GICD_ICDABR9,Active Status Register 9" bitfld.long 0x00 31. " ASB319 ,Active Status Bit 319" "Not active,Active" bitfld.long 0x00 30. " ASB318 ,Active Status Bit 318" "Not active,Active" bitfld.long 0x00 29. " ASB317 ,Active Status Bit 317" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB316 ,Active Status Bit 316" "Not active,Active" bitfld.long 0x00 27. " ASB315 ,Active Status Bit 315" "Not active,Active" bitfld.long 0x00 26. " ASB314 ,Active Status Bit 314" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB313 ,Active Status Bit 313" "Not active,Active" bitfld.long 0x00 24. " ASB312 ,Active Status Bit 312" "Not active,Active" bitfld.long 0x00 23. " ASB311 ,Active Status Bit 311" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB310 ,Active Status Bit 310" "Not active,Active" bitfld.long 0x00 21. " ASB309 ,Active Status Bit 309" "Not active,Active" bitfld.long 0x00 20. " ASB308 ,Active Status Bit 308" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB307 ,Active Status Bit 307" "Not active,Active" bitfld.long 0x00 18. " ASB306 ,Active Status Bit 306" "Not active,Active" bitfld.long 0x00 17. " ASB305 ,Active Status Bit 305" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB304 ,Active Status Bit 304" "Not active,Active" bitfld.long 0x00 15. " ASB303 ,Active Status Bit 303" "Not active,Active" bitfld.long 0x00 14. " ASB302 ,Active Status Bit 302" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB301 ,Active Status Bit 301" "Not active,Active" bitfld.long 0x00 12. " ASB300 ,Active Status Bit 300" "Not active,Active" bitfld.long 0x00 11. " ASB299 ,Active Status Bit 299" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB298 ,Active Status Bit 298" "Not active,Active" bitfld.long 0x00 9. " ASB297 ,Active Status Bit 297" "Not active,Active" bitfld.long 0x00 8. " ASB296 ,Active Status Bit 296" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB295 ,Active Status Bit 295" "Not active,Active" bitfld.long 0x00 6. " ASB294 ,Active Status Bit 294" "Not active,Active" bitfld.long 0x00 5. " ASB293 ,Active Status Bit 293" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB292 ,Active Status Bit 292" "Not active,Active" bitfld.long 0x00 3. " ASB291 ,Active Status Bit 291" "Not active,Active" bitfld.long 0x00 2. " ASB290 ,Active Status Bit 290" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB289 ,Active Status Bit 289" "Not active,Active" bitfld.long 0x00 0. " ASB288 ,Active Status Bit 288" "Not active,Active" else rgroup.long 0x0324++0x03 line.long 0x0 "GICD_ICDABR9,Active Status Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0A) rgroup.long 0x0328++0x03 line.long 0x0 "GICD_ICDABR10,Active Status Register 10" bitfld.long 0x00 31. " ASB351 ,Active Status Bit 351" "Not active,Active" bitfld.long 0x00 30. " ASB350 ,Active Status Bit 350" "Not active,Active" bitfld.long 0x00 29. " ASB349 ,Active Status Bit 349" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB348 ,Active Status Bit 348" "Not active,Active" bitfld.long 0x00 27. " ASB347 ,Active Status Bit 347" "Not active,Active" bitfld.long 0x00 26. " ASB346 ,Active Status Bit 346" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB345 ,Active Status Bit 345" "Not active,Active" bitfld.long 0x00 24. " ASB344 ,Active Status Bit 344" "Not active,Active" bitfld.long 0x00 23. " ASB343 ,Active Status Bit 343" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB342 ,Active Status Bit 342" "Not active,Active" bitfld.long 0x00 21. " ASB341 ,Active Status Bit 341" "Not active,Active" bitfld.long 0x00 20. " ASB340 ,Active Status Bit 340" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB339 ,Active Status Bit 339" "Not active,Active" bitfld.long 0x00 18. " ASB338 ,Active Status Bit 338" "Not active,Active" bitfld.long 0x00 17. " ASB337 ,Active Status Bit 337" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB336 ,Active Status Bit 336" "Not active,Active" bitfld.long 0x00 15. " ASB335 ,Active Status Bit 335" "Not active,Active" bitfld.long 0x00 14. " ASB334 ,Active Status Bit 334" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB333 ,Active Status Bit 333" "Not active,Active" bitfld.long 0x00 12. " ASB332 ,Active Status Bit 332" "Not active,Active" bitfld.long 0x00 11. " ASB331 ,Active Status Bit 331" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB330 ,Active Status Bit 330" "Not active,Active" bitfld.long 0x00 9. " ASB329 ,Active Status Bit 329" "Not active,Active" bitfld.long 0x00 8. " ASB328 ,Active Status Bit 328" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB327 ,Active Status Bit 327" "Not active,Active" bitfld.long 0x00 6. " ASB326 ,Active Status Bit 326" "Not active,Active" bitfld.long 0x00 5. " ASB325 ,Active Status Bit 325" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB324 ,Active Status Bit 324" "Not active,Active" bitfld.long 0x00 3. " ASB323 ,Active Status Bit 323" "Not active,Active" bitfld.long 0x00 2. " ASB322 ,Active Status Bit 322" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB321 ,Active Status Bit 321" "Not active,Active" bitfld.long 0x00 0. " ASB320 ,Active Status Bit 320" "Not active,Active" else rgroup.long 0x0328++0x03 line.long 0x0 "GICD_ICDABR10,Active Status Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0B) rgroup.long 0x032C++0x03 line.long 0x0 "GICD_ICDABR11,Active Status Register 11" bitfld.long 0x00 31. " ASB383 ,Active Status Bit 383" "Not active,Active" bitfld.long 0x00 30. " ASB382 ,Active Status Bit 382" "Not active,Active" bitfld.long 0x00 29. " ASB381 ,Active Status Bit 381" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB380 ,Active Status Bit 380" "Not active,Active" bitfld.long 0x00 27. " ASB379 ,Active Status Bit 379" "Not active,Active" bitfld.long 0x00 26. " ASB378 ,Active Status Bit 378" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB377 ,Active Status Bit 377" "Not active,Active" bitfld.long 0x00 24. " ASB376 ,Active Status Bit 376" "Not active,Active" bitfld.long 0x00 23. " ASB375 ,Active Status Bit 375" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB374 ,Active Status Bit 374" "Not active,Active" bitfld.long 0x00 21. " ASB373 ,Active Status Bit 373" "Not active,Active" bitfld.long 0x00 20. " ASB372 ,Active Status Bit 372" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB371 ,Active Status Bit 371" "Not active,Active" bitfld.long 0x00 18. " ASB370 ,Active Status Bit 370" "Not active,Active" bitfld.long 0x00 17. " ASB369 ,Active Status Bit 369" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB368 ,Active Status Bit 368" "Not active,Active" bitfld.long 0x00 15. " ASB367 ,Active Status Bit 367" "Not active,Active" bitfld.long 0x00 14. " ASB366 ,Active Status Bit 366" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB365 ,Active Status Bit 365" "Not active,Active" bitfld.long 0x00 12. " ASB364 ,Active Status Bit 364" "Not active,Active" bitfld.long 0x00 11. " ASB363 ,Active Status Bit 363" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB362 ,Active Status Bit 362" "Not active,Active" bitfld.long 0x00 9. " ASB361 ,Active Status Bit 361" "Not active,Active" bitfld.long 0x00 8. " ASB360 ,Active Status Bit 360" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB359 ,Active Status Bit 359" "Not active,Active" bitfld.long 0x00 6. " ASB358 ,Active Status Bit 358" "Not active,Active" bitfld.long 0x00 5. " ASB357 ,Active Status Bit 357" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB356 ,Active Status Bit 356" "Not active,Active" bitfld.long 0x00 3. " ASB355 ,Active Status Bit 355" "Not active,Active" bitfld.long 0x00 2. " ASB354 ,Active Status Bit 354" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB353 ,Active Status Bit 353" "Not active,Active" bitfld.long 0x00 0. " ASB352 ,Active Status Bit 352" "Not active,Active" else rgroup.long 0x032C++0x03 line.long 0x0 "GICD_ICDABR11,Active Status Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0C) rgroup.long 0x0330++0x03 line.long 0x0 "GICD_ICDABR12,Active Status Register 12" bitfld.long 0x00 31. " ASB415 ,Active Status Bit 415" "Not active,Active" bitfld.long 0x00 30. " ASB414 ,Active Status Bit 414" "Not active,Active" bitfld.long 0x00 29. " ASB413 ,Active Status Bit 413" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB412 ,Active Status Bit 412" "Not active,Active" bitfld.long 0x00 27. " ASB411 ,Active Status Bit 411" "Not active,Active" bitfld.long 0x00 26. " ASB410 ,Active Status Bit 410" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB409 ,Active Status Bit 409" "Not active,Active" bitfld.long 0x00 24. " ASB408 ,Active Status Bit 408" "Not active,Active" bitfld.long 0x00 23. " ASB407 ,Active Status Bit 407" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB406 ,Active Status Bit 406" "Not active,Active" bitfld.long 0x00 21. " ASB405 ,Active Status Bit 405" "Not active,Active" bitfld.long 0x00 20. " ASB404 ,Active Status Bit 404" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB403 ,Active Status Bit 403" "Not active,Active" bitfld.long 0x00 18. " ASB402 ,Active Status Bit 402" "Not active,Active" bitfld.long 0x00 17. " ASB401 ,Active Status Bit 401" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB400 ,Active Status Bit 400" "Not active,Active" bitfld.long 0x00 15. " ASB399 ,Active Status Bit 399" "Not active,Active" bitfld.long 0x00 14. " ASB398 ,Active Status Bit 398" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB397 ,Active Status Bit 397" "Not active,Active" bitfld.long 0x00 12. " ASB396 ,Active Status Bit 396" "Not active,Active" bitfld.long 0x00 11. " ASB395 ,Active Status Bit 395" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB394 ,Active Status Bit 394" "Not active,Active" bitfld.long 0x00 9. " ASB393 ,Active Status Bit 393" "Not active,Active" bitfld.long 0x00 8. " ASB392 ,Active Status Bit 392" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB391 ,Active Status Bit 391" "Not active,Active" bitfld.long 0x00 6. " ASB390 ,Active Status Bit 390" "Not active,Active" bitfld.long 0x00 5. " ASB389 ,Active Status Bit 389" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB388 ,Active Status Bit 388" "Not active,Active" bitfld.long 0x00 3. " ASB387 ,Active Status Bit 387" "Not active,Active" bitfld.long 0x00 2. " ASB386 ,Active Status Bit 386" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB385 ,Active Status Bit 385" "Not active,Active" bitfld.long 0x00 0. " ASB384 ,Active Status Bit 384" "Not active,Active" else rgroup.long 0x0330++0x03 line.long 0x0 "GICD_ICDABR12,Active Status Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0D) rgroup.long 0x0334++0x03 line.long 0x0 "GICD_ICDABR13,Active Status Register 13" bitfld.long 0x00 31. " ASB447 ,Active Status Bit 447" "Not active,Active" bitfld.long 0x00 30. " ASB446 ,Active Status Bit 446" "Not active,Active" bitfld.long 0x00 29. " ASB445 ,Active Status Bit 445" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB444 ,Active Status Bit 444" "Not active,Active" bitfld.long 0x00 27. " ASB443 ,Active Status Bit 443" "Not active,Active" bitfld.long 0x00 26. " ASB442 ,Active Status Bit 442" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB441 ,Active Status Bit 441" "Not active,Active" bitfld.long 0x00 24. " ASB440 ,Active Status Bit 440" "Not active,Active" bitfld.long 0x00 23. " ASB439 ,Active Status Bit 439" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB438 ,Active Status Bit 438" "Not active,Active" bitfld.long 0x00 21. " ASB437 ,Active Status Bit 437" "Not active,Active" bitfld.long 0x00 20. " ASB436 ,Active Status Bit 436" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB435 ,Active Status Bit 435" "Not active,Active" bitfld.long 0x00 18. " ASB434 ,Active Status Bit 434" "Not active,Active" bitfld.long 0x00 17. " ASB433 ,Active Status Bit 433" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB432 ,Active Status Bit 432" "Not active,Active" bitfld.long 0x00 15. " ASB431 ,Active Status Bit 431" "Not active,Active" bitfld.long 0x00 14. " ASB430 ,Active Status Bit 430" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB429 ,Active Status Bit 429" "Not active,Active" bitfld.long 0x00 12. " ASB428 ,Active Status Bit 428" "Not active,Active" bitfld.long 0x00 11. " ASB427 ,Active Status Bit 427" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB426 ,Active Status Bit 426" "Not active,Active" bitfld.long 0x00 9. " ASB425 ,Active Status Bit 425" "Not active,Active" bitfld.long 0x00 8. " ASB424 ,Active Status Bit 424" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB423 ,Active Status Bit 423" "Not active,Active" bitfld.long 0x00 6. " ASB422 ,Active Status Bit 422" "Not active,Active" bitfld.long 0x00 5. " ASB421 ,Active Status Bit 421" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB420 ,Active Status Bit 420" "Not active,Active" bitfld.long 0x00 3. " ASB419 ,Active Status Bit 419" "Not active,Active" bitfld.long 0x00 2. " ASB418 ,Active Status Bit 418" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB417 ,Active Status Bit 417" "Not active,Active" bitfld.long 0x00 0. " ASB416 ,Active Status Bit 416" "Not active,Active" else rgroup.long 0x0334++0x03 line.long 0x0 "GICD_ICDABR13,Active Status Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0E) rgroup.long 0x0338++0x03 line.long 0x0 "GICD_ICDABR14,Active Status Register 14" bitfld.long 0x00 31. " ASB479 ,Active Status Bit 479" "Not active,Active" bitfld.long 0x00 30. " ASB478 ,Active Status Bit 478" "Not active,Active" bitfld.long 0x00 29. " ASB477 ,Active Status Bit 477" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB476 ,Active Status Bit 476" "Not active,Active" bitfld.long 0x00 27. " ASB475 ,Active Status Bit 475" "Not active,Active" bitfld.long 0x00 26. " ASB474 ,Active Status Bit 474" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB473 ,Active Status Bit 473" "Not active,Active" bitfld.long 0x00 24. " ASB472 ,Active Status Bit 472" "Not active,Active" bitfld.long 0x00 23. " ASB471 ,Active Status Bit 471" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB470 ,Active Status Bit 470" "Not active,Active" bitfld.long 0x00 21. " ASB469 ,Active Status Bit 469" "Not active,Active" bitfld.long 0x00 20. " ASB468 ,Active Status Bit 468" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB467 ,Active Status Bit 467" "Not active,Active" bitfld.long 0x00 18. " ASB466 ,Active Status Bit 466" "Not active,Active" bitfld.long 0x00 17. " ASB465 ,Active Status Bit 465" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB464 ,Active Status Bit 464" "Not active,Active" bitfld.long 0x00 15. " ASB463 ,Active Status Bit 463" "Not active,Active" bitfld.long 0x00 14. " ASB462 ,Active Status Bit 462" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB461 ,Active Status Bit 461" "Not active,Active" bitfld.long 0x00 12. " ASB460 ,Active Status Bit 460" "Not active,Active" bitfld.long 0x00 11. " ASB459 ,Active Status Bit 459" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB458 ,Active Status Bit 458" "Not active,Active" bitfld.long 0x00 9. " ASB457 ,Active Status Bit 457" "Not active,Active" bitfld.long 0x00 8. " ASB456 ,Active Status Bit 456" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB455 ,Active Status Bit 455" "Not active,Active" bitfld.long 0x00 6. " ASB454 ,Active Status Bit 454" "Not active,Active" bitfld.long 0x00 5. " ASB453 ,Active Status Bit 453" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB452 ,Active Status Bit 452" "Not active,Active" bitfld.long 0x00 3. " ASB451 ,Active Status Bit 451" "Not active,Active" bitfld.long 0x00 2. " ASB450 ,Active Status Bit 450" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB449 ,Active Status Bit 449" "Not active,Active" bitfld.long 0x00 0. " ASB448 ,Active Status Bit 448" "Not active,Active" else rgroup.long 0x0338++0x03 line.long 0x0 "GICD_ICDABR14,Active Status Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0F) rgroup.long 0x033C++0x03 line.long 0x0 "GICD_ICDABR15,Active Status Register 15" bitfld.long 0x00 31. " ASB511 ,Active Status Bit 511" "Not active,Active" bitfld.long 0x00 30. " ASB510 ,Active Status Bit 510" "Not active,Active" bitfld.long 0x00 29. " ASB509 ,Active Status Bit 509" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB508 ,Active Status Bit 508" "Not active,Active" bitfld.long 0x00 27. " ASB507 ,Active Status Bit 507" "Not active,Active" bitfld.long 0x00 26. " ASB506 ,Active Status Bit 506" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB505 ,Active Status Bit 505" "Not active,Active" bitfld.long 0x00 24. " ASB504 ,Active Status Bit 504" "Not active,Active" bitfld.long 0x00 23. " ASB503 ,Active Status Bit 503" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB502 ,Active Status Bit 502" "Not active,Active" bitfld.long 0x00 21. " ASB501 ,Active Status Bit 501" "Not active,Active" bitfld.long 0x00 20. " ASB500 ,Active Status Bit 500" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB499 ,Active Status Bit 499" "Not active,Active" bitfld.long 0x00 18. " ASB498 ,Active Status Bit 498" "Not active,Active" bitfld.long 0x00 17. " ASB497 ,Active Status Bit 497" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB496 ,Active Status Bit 496" "Not active,Active" bitfld.long 0x00 15. " ASB495 ,Active Status Bit 495" "Not active,Active" bitfld.long 0x00 14. " ASB494 ,Active Status Bit 494" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB493 ,Active Status Bit 493" "Not active,Active" bitfld.long 0x00 12. " ASB492 ,Active Status Bit 492" "Not active,Active" bitfld.long 0x00 11. " ASB491 ,Active Status Bit 491" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB490 ,Active Status Bit 490" "Not active,Active" bitfld.long 0x00 9. " ASB489 ,Active Status Bit 489" "Not active,Active" bitfld.long 0x00 8. " ASB488 ,Active Status Bit 488" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB487 ,Active Status Bit 487" "Not active,Active" bitfld.long 0x00 6. " ASB486 ,Active Status Bit 486" "Not active,Active" bitfld.long 0x00 5. " ASB485 ,Active Status Bit 485" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB484 ,Active Status Bit 484" "Not active,Active" bitfld.long 0x00 3. " ASB483 ,Active Status Bit 483" "Not active,Active" bitfld.long 0x00 2. " ASB482 ,Active Status Bit 482" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB481 ,Active Status Bit 481" "Not active,Active" bitfld.long 0x00 0. " ASB480 ,Active Status Bit 480" "Not active,Active" else rgroup.long 0x033C++0x03 line.long 0x0 "GICD_ICDABR15,Active Status Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x10) rgroup.long 0x0340++0x03 line.long 0x0 "GICD_ICDABR16,Active Status Register 16" bitfld.long 0x00 31. " ASB543 ,Active Status Bit 543" "Not active,Active" bitfld.long 0x00 30. " ASB542 ,Active Status Bit 542" "Not active,Active" bitfld.long 0x00 29. " ASB541 ,Active Status Bit 541" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB540 ,Active Status Bit 540" "Not active,Active" bitfld.long 0x00 27. " ASB539 ,Active Status Bit 539" "Not active,Active" bitfld.long 0x00 26. " ASB538 ,Active Status Bit 538" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB537 ,Active Status Bit 537" "Not active,Active" bitfld.long 0x00 24. " ASB536 ,Active Status Bit 536" "Not active,Active" bitfld.long 0x00 23. " ASB535 ,Active Status Bit 535" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB534 ,Active Status Bit 534" "Not active,Active" bitfld.long 0x00 21. " ASB533 ,Active Status Bit 533" "Not active,Active" bitfld.long 0x00 20. " ASB532 ,Active Status Bit 532" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB531 ,Active Status Bit 531" "Not active,Active" bitfld.long 0x00 18. " ASB530 ,Active Status Bit 530" "Not active,Active" bitfld.long 0x00 17. " ASB529 ,Active Status Bit 529" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB528 ,Active Status Bit 528" "Not active,Active" bitfld.long 0x00 15. " ASB527 ,Active Status Bit 527" "Not active,Active" bitfld.long 0x00 14. " ASB526 ,Active Status Bit 526" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB525 ,Active Status Bit 525" "Not active,Active" bitfld.long 0x00 12. " ASB524 ,Active Status Bit 524" "Not active,Active" bitfld.long 0x00 11. " ASB523 ,Active Status Bit 523" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB522 ,Active Status Bit 522" "Not active,Active" bitfld.long 0x00 9. " ASB521 ,Active Status Bit 521" "Not active,Active" bitfld.long 0x00 8. " ASB520 ,Active Status Bit 520" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB519 ,Active Status Bit 519" "Not active,Active" bitfld.long 0x00 6. " ASB518 ,Active Status Bit 518" "Not active,Active" bitfld.long 0x00 5. " ASB517 ,Active Status Bit 517" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB516 ,Active Status Bit 516" "Not active,Active" bitfld.long 0x00 3. " ASB515 ,Active Status Bit 515" "Not active,Active" bitfld.long 0x00 2. " ASB514 ,Active Status Bit 514" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB513 ,Active Status Bit 513" "Not active,Active" bitfld.long 0x00 0. " ASB512 ,Active Status Bit 512" "Not active,Active" else rgroup.long 0x0340++0x03 line.long 0x0 "GICD_ICDABR16,Active Status Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x11) rgroup.long 0x0344++0x03 line.long 0x0 "GICD_ICDABR17,Active Status Register 17" bitfld.long 0x00 31. " ASB575 ,Active Status Bit 575" "Not active,Active" bitfld.long 0x00 30. " ASB574 ,Active Status Bit 574" "Not active,Active" bitfld.long 0x00 29. " ASB573 ,Active Status Bit 573" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB572 ,Active Status Bit 572" "Not active,Active" bitfld.long 0x00 27. " ASB571 ,Active Status Bit 571" "Not active,Active" bitfld.long 0x00 26. " ASB570 ,Active Status Bit 570" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB569 ,Active Status Bit 569" "Not active,Active" bitfld.long 0x00 24. " ASB568 ,Active Status Bit 568" "Not active,Active" bitfld.long 0x00 23. " ASB567 ,Active Status Bit 567" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB566 ,Active Status Bit 566" "Not active,Active" bitfld.long 0x00 21. " ASB565 ,Active Status Bit 565" "Not active,Active" bitfld.long 0x00 20. " ASB564 ,Active Status Bit 564" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB563 ,Active Status Bit 563" "Not active,Active" bitfld.long 0x00 18. " ASB562 ,Active Status Bit 562" "Not active,Active" bitfld.long 0x00 17. " ASB561 ,Active Status Bit 561" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB560 ,Active Status Bit 560" "Not active,Active" bitfld.long 0x00 15. " ASB559 ,Active Status Bit 559" "Not active,Active" bitfld.long 0x00 14. " ASB558 ,Active Status Bit 558" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB557 ,Active Status Bit 557" "Not active,Active" bitfld.long 0x00 12. " ASB556 ,Active Status Bit 556" "Not active,Active" bitfld.long 0x00 11. " ASB555 ,Active Status Bit 555" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB554 ,Active Status Bit 554" "Not active,Active" bitfld.long 0x00 9. " ASB553 ,Active Status Bit 553" "Not active,Active" bitfld.long 0x00 8. " ASB552 ,Active Status Bit 552" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB551 ,Active Status Bit 551" "Not active,Active" bitfld.long 0x00 6. " ASB550 ,Active Status Bit 550" "Not active,Active" bitfld.long 0x00 5. " ASB549 ,Active Status Bit 549" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB548 ,Active Status Bit 548" "Not active,Active" bitfld.long 0x00 3. " ASB547 ,Active Status Bit 547" "Not active,Active" bitfld.long 0x00 2. " ASB546 ,Active Status Bit 546" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB545 ,Active Status Bit 545" "Not active,Active" bitfld.long 0x00 0. " ASB544 ,Active Status Bit 544" "Not active,Active" else rgroup.long 0x0344++0x03 line.long 0x0 "GICD_ICDABR17,Active Status Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x12) rgroup.long 0x0348++0x03 line.long 0x0 "GICD_ICDABR18,Active Status Register 18" bitfld.long 0x00 31. " ASB607 ,Active Status Bit 607" "Not active,Active" bitfld.long 0x00 30. " ASB606 ,Active Status Bit 606" "Not active,Active" bitfld.long 0x00 29. " ASB605 ,Active Status Bit 605" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB604 ,Active Status Bit 604" "Not active,Active" bitfld.long 0x00 27. " ASB603 ,Active Status Bit 603" "Not active,Active" bitfld.long 0x00 26. " ASB602 ,Active Status Bit 602" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB601 ,Active Status Bit 601" "Not active,Active" bitfld.long 0x00 24. " ASB600 ,Active Status Bit 600" "Not active,Active" bitfld.long 0x00 23. " ASB599 ,Active Status Bit 599" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB598 ,Active Status Bit 598" "Not active,Active" bitfld.long 0x00 21. " ASB597 ,Active Status Bit 597" "Not active,Active" bitfld.long 0x00 20. " ASB596 ,Active Status Bit 596" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB595 ,Active Status Bit 595" "Not active,Active" bitfld.long 0x00 18. " ASB594 ,Active Status Bit 594" "Not active,Active" bitfld.long 0x00 17. " ASB593 ,Active Status Bit 593" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB592 ,Active Status Bit 592" "Not active,Active" bitfld.long 0x00 15. " ASB591 ,Active Status Bit 591" "Not active,Active" bitfld.long 0x00 14. " ASB590 ,Active Status Bit 590" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB589 ,Active Status Bit 589" "Not active,Active" bitfld.long 0x00 12. " ASB588 ,Active Status Bit 588" "Not active,Active" bitfld.long 0x00 11. " ASB587 ,Active Status Bit 587" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB586 ,Active Status Bit 586" "Not active,Active" bitfld.long 0x00 9. " ASB585 ,Active Status Bit 585" "Not active,Active" bitfld.long 0x00 8. " ASB584 ,Active Status Bit 584" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB583 ,Active Status Bit 583" "Not active,Active" bitfld.long 0x00 6. " ASB582 ,Active Status Bit 582" "Not active,Active" bitfld.long 0x00 5. " ASB581 ,Active Status Bit 581" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB580 ,Active Status Bit 580" "Not active,Active" bitfld.long 0x00 3. " ASB579 ,Active Status Bit 579" "Not active,Active" bitfld.long 0x00 2. " ASB578 ,Active Status Bit 578" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB577 ,Active Status Bit 577" "Not active,Active" bitfld.long 0x00 0. " ASB576 ,Active Status Bit 576" "Not active,Active" else rgroup.long 0x0348++0x03 line.long 0x0 "GICD_ICDABR18,Active Status Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x13) rgroup.long 0x034C++0x03 line.long 0x0 "GICD_ICDABR19,Active Status Register 19" bitfld.long 0x00 31. " ASB639 ,Active Status Bit 639" "Not active,Active" bitfld.long 0x00 30. " ASB638 ,Active Status Bit 638" "Not active,Active" bitfld.long 0x00 29. " ASB637 ,Active Status Bit 637" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB636 ,Active Status Bit 636" "Not active,Active" bitfld.long 0x00 27. " ASB635 ,Active Status Bit 635" "Not active,Active" bitfld.long 0x00 26. " ASB634 ,Active Status Bit 634" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB633 ,Active Status Bit 633" "Not active,Active" bitfld.long 0x00 24. " ASB632 ,Active Status Bit 632" "Not active,Active" bitfld.long 0x00 23. " ASB631 ,Active Status Bit 631" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB630 ,Active Status Bit 630" "Not active,Active" bitfld.long 0x00 21. " ASB629 ,Active Status Bit 629" "Not active,Active" bitfld.long 0x00 20. " ASB628 ,Active Status Bit 628" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB627 ,Active Status Bit 627" "Not active,Active" bitfld.long 0x00 18. " ASB626 ,Active Status Bit 626" "Not active,Active" bitfld.long 0x00 17. " ASB625 ,Active Status Bit 625" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB624 ,Active Status Bit 624" "Not active,Active" bitfld.long 0x00 15. " ASB623 ,Active Status Bit 623" "Not active,Active" bitfld.long 0x00 14. " ASB622 ,Active Status Bit 622" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB621 ,Active Status Bit 621" "Not active,Active" bitfld.long 0x00 12. " ASB620 ,Active Status Bit 620" "Not active,Active" bitfld.long 0x00 11. " ASB619 ,Active Status Bit 619" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB618 ,Active Status Bit 618" "Not active,Active" bitfld.long 0x00 9. " ASB617 ,Active Status Bit 617" "Not active,Active" bitfld.long 0x00 8. " ASB616 ,Active Status Bit 616" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB615 ,Active Status Bit 615" "Not active,Active" bitfld.long 0x00 6. " ASB614 ,Active Status Bit 614" "Not active,Active" bitfld.long 0x00 5. " ASB613 ,Active Status Bit 613" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB612 ,Active Status Bit 612" "Not active,Active" bitfld.long 0x00 3. " ASB611 ,Active Status Bit 611" "Not active,Active" bitfld.long 0x00 2. " ASB610 ,Active Status Bit 610" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB609 ,Active Status Bit 609" "Not active,Active" bitfld.long 0x00 0. " ASB608 ,Active Status Bit 608" "Not active,Active" else rgroup.long 0x034C++0x03 line.long 0x0 "GICD_ICDABR19,Active Status Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x14) rgroup.long 0x0350++0x03 line.long 0x0 "GICD_ICDABR20,Active Status Register 20" bitfld.long 0x00 31. " ASB671 ,Active Status Bit 671" "Not active,Active" bitfld.long 0x00 30. " ASB670 ,Active Status Bit 670" "Not active,Active" bitfld.long 0x00 29. " ASB669 ,Active Status Bit 669" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB668 ,Active Status Bit 668" "Not active,Active" bitfld.long 0x00 27. " ASB667 ,Active Status Bit 667" "Not active,Active" bitfld.long 0x00 26. " ASB666 ,Active Status Bit 666" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB665 ,Active Status Bit 665" "Not active,Active" bitfld.long 0x00 24. " ASB664 ,Active Status Bit 664" "Not active,Active" bitfld.long 0x00 23. " ASB663 ,Active Status Bit 663" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB662 ,Active Status Bit 662" "Not active,Active" bitfld.long 0x00 21. " ASB661 ,Active Status Bit 661" "Not active,Active" bitfld.long 0x00 20. " ASB660 ,Active Status Bit 660" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB659 ,Active Status Bit 659" "Not active,Active" bitfld.long 0x00 18. " ASB658 ,Active Status Bit 658" "Not active,Active" bitfld.long 0x00 17. " ASB657 ,Active Status Bit 657" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB656 ,Active Status Bit 656" "Not active,Active" bitfld.long 0x00 15. " ASB655 ,Active Status Bit 655" "Not active,Active" bitfld.long 0x00 14. " ASB654 ,Active Status Bit 654" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB653 ,Active Status Bit 653" "Not active,Active" bitfld.long 0x00 12. " ASB652 ,Active Status Bit 652" "Not active,Active" bitfld.long 0x00 11. " ASB651 ,Active Status Bit 651" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB650 ,Active Status Bit 650" "Not active,Active" bitfld.long 0x00 9. " ASB649 ,Active Status Bit 649" "Not active,Active" bitfld.long 0x00 8. " ASB648 ,Active Status Bit 648" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB647 ,Active Status Bit 647" "Not active,Active" bitfld.long 0x00 6. " ASB646 ,Active Status Bit 646" "Not active,Active" bitfld.long 0x00 5. " ASB645 ,Active Status Bit 645" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB644 ,Active Status Bit 644" "Not active,Active" bitfld.long 0x00 3. " ASB643 ,Active Status Bit 643" "Not active,Active" bitfld.long 0x00 2. " ASB642 ,Active Status Bit 642" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB641 ,Active Status Bit 641" "Not active,Active" bitfld.long 0x00 0. " ASB640 ,Active Status Bit 640" "Not active,Active" else rgroup.long 0x0350++0x03 line.long 0x0 "GICD_ICDABR20,Active Status Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x15) rgroup.long 0x0354++0x03 line.long 0x0 "GICD_ICDABR21,Active Status Register 21" bitfld.long 0x00 31. " ASB703 ,Active Status Bit 703" "Not active,Active" bitfld.long 0x00 30. " ASB702 ,Active Status Bit 702" "Not active,Active" bitfld.long 0x00 29. " ASB701 ,Active Status Bit 701" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB700 ,Active Status Bit 700" "Not active,Active" bitfld.long 0x00 27. " ASB699 ,Active Status Bit 699" "Not active,Active" bitfld.long 0x00 26. " ASB698 ,Active Status Bit 698" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB697 ,Active Status Bit 697" "Not active,Active" bitfld.long 0x00 24. " ASB696 ,Active Status Bit 696" "Not active,Active" bitfld.long 0x00 23. " ASB695 ,Active Status Bit 695" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB694 ,Active Status Bit 694" "Not active,Active" bitfld.long 0x00 21. " ASB693 ,Active Status Bit 693" "Not active,Active" bitfld.long 0x00 20. " ASB692 ,Active Status Bit 692" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB691 ,Active Status Bit 691" "Not active,Active" bitfld.long 0x00 18. " ASB690 ,Active Status Bit 690" "Not active,Active" bitfld.long 0x00 17. " ASB689 ,Active Status Bit 689" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB688 ,Active Status Bit 688" "Not active,Active" bitfld.long 0x00 15. " ASB687 ,Active Status Bit 687" "Not active,Active" bitfld.long 0x00 14. " ASB686 ,Active Status Bit 686" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB685 ,Active Status Bit 685" "Not active,Active" bitfld.long 0x00 12. " ASB684 ,Active Status Bit 684" "Not active,Active" bitfld.long 0x00 11. " ASB683 ,Active Status Bit 683" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB682 ,Active Status Bit 682" "Not active,Active" bitfld.long 0x00 9. " ASB681 ,Active Status Bit 681" "Not active,Active" bitfld.long 0x00 8. " ASB680 ,Active Status Bit 680" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB679 ,Active Status Bit 679" "Not active,Active" bitfld.long 0x00 6. " ASB678 ,Active Status Bit 678" "Not active,Active" bitfld.long 0x00 5. " ASB677 ,Active Status Bit 677" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB676 ,Active Status Bit 676" "Not active,Active" bitfld.long 0x00 3. " ASB675 ,Active Status Bit 675" "Not active,Active" bitfld.long 0x00 2. " ASB674 ,Active Status Bit 674" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB673 ,Active Status Bit 673" "Not active,Active" bitfld.long 0x00 0. " ASB672 ,Active Status Bit 672" "Not active,Active" else rgroup.long 0x0354++0x03 line.long 0x0 "GICD_ICDABR21,Active Status Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x16) rgroup.long 0x0358++0x03 line.long 0x0 "GICD_ICDABR22,Active Status Register 22" bitfld.long 0x00 31. " ASB735 ,Active Status Bit 735" "Not active,Active" bitfld.long 0x00 30. " ASB734 ,Active Status Bit 734" "Not active,Active" bitfld.long 0x00 29. " ASB733 ,Active Status Bit 733" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB732 ,Active Status Bit 732" "Not active,Active" bitfld.long 0x00 27. " ASB731 ,Active Status Bit 731" "Not active,Active" bitfld.long 0x00 26. " ASB730 ,Active Status Bit 730" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB729 ,Active Status Bit 729" "Not active,Active" bitfld.long 0x00 24. " ASB728 ,Active Status Bit 728" "Not active,Active" bitfld.long 0x00 23. " ASB727 ,Active Status Bit 727" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB726 ,Active Status Bit 726" "Not active,Active" bitfld.long 0x00 21. " ASB725 ,Active Status Bit 725" "Not active,Active" bitfld.long 0x00 20. " ASB724 ,Active Status Bit 724" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB723 ,Active Status Bit 723" "Not active,Active" bitfld.long 0x00 18. " ASB722 ,Active Status Bit 722" "Not active,Active" bitfld.long 0x00 17. " ASB721 ,Active Status Bit 721" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB720 ,Active Status Bit 720" "Not active,Active" bitfld.long 0x00 15. " ASB719 ,Active Status Bit 719" "Not active,Active" bitfld.long 0x00 14. " ASB718 ,Active Status Bit 718" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB717 ,Active Status Bit 717" "Not active,Active" bitfld.long 0x00 12. " ASB716 ,Active Status Bit 716" "Not active,Active" bitfld.long 0x00 11. " ASB715 ,Active Status Bit 715" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB714 ,Active Status Bit 714" "Not active,Active" bitfld.long 0x00 9. " ASB713 ,Active Status Bit 713" "Not active,Active" bitfld.long 0x00 8. " ASB712 ,Active Status Bit 712" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB711 ,Active Status Bit 711" "Not active,Active" bitfld.long 0x00 6. " ASB710 ,Active Status Bit 710" "Not active,Active" bitfld.long 0x00 5. " ASB709 ,Active Status Bit 709" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB708 ,Active Status Bit 708" "Not active,Active" bitfld.long 0x00 3. " ASB707 ,Active Status Bit 707" "Not active,Active" bitfld.long 0x00 2. " ASB706 ,Active Status Bit 706" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB705 ,Active Status Bit 705" "Not active,Active" bitfld.long 0x00 0. " ASB704 ,Active Status Bit 704" "Not active,Active" else rgroup.long 0x0358++0x03 line.long 0x0 "GICD_ICDABR22,Active Status Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x17) rgroup.long 0x035C++0x03 line.long 0x0 "GICD_ICDABR23,Active Status Register 23" bitfld.long 0x00 31. " ASB767 ,Active Status Bit 767" "Not active,Active" bitfld.long 0x00 30. " ASB766 ,Active Status Bit 766" "Not active,Active" bitfld.long 0x00 29. " ASB765 ,Active Status Bit 765" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB764 ,Active Status Bit 764" "Not active,Active" bitfld.long 0x00 27. " ASB763 ,Active Status Bit 763" "Not active,Active" bitfld.long 0x00 26. " ASB762 ,Active Status Bit 762" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB761 ,Active Status Bit 761" "Not active,Active" bitfld.long 0x00 24. " ASB760 ,Active Status Bit 760" "Not active,Active" bitfld.long 0x00 23. " ASB759 ,Active Status Bit 759" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB758 ,Active Status Bit 758" "Not active,Active" bitfld.long 0x00 21. " ASB757 ,Active Status Bit 757" "Not active,Active" bitfld.long 0x00 20. " ASB756 ,Active Status Bit 756" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB755 ,Active Status Bit 755" "Not active,Active" bitfld.long 0x00 18. " ASB754 ,Active Status Bit 754" "Not active,Active" bitfld.long 0x00 17. " ASB753 ,Active Status Bit 753" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB752 ,Active Status Bit 752" "Not active,Active" bitfld.long 0x00 15. " ASB751 ,Active Status Bit 751" "Not active,Active" bitfld.long 0x00 14. " ASB750 ,Active Status Bit 750" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB749 ,Active Status Bit 749" "Not active,Active" bitfld.long 0x00 12. " ASB748 ,Active Status Bit 748" "Not active,Active" bitfld.long 0x00 11. " ASB747 ,Active Status Bit 747" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB746 ,Active Status Bit 746" "Not active,Active" bitfld.long 0x00 9. " ASB745 ,Active Status Bit 745" "Not active,Active" bitfld.long 0x00 8. " ASB744 ,Active Status Bit 744" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB743 ,Active Status Bit 743" "Not active,Active" bitfld.long 0x00 6. " ASB742 ,Active Status Bit 742" "Not active,Active" bitfld.long 0x00 5. " ASB741 ,Active Status Bit 741" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB740 ,Active Status Bit 740" "Not active,Active" bitfld.long 0x00 3. " ASB739 ,Active Status Bit 739" "Not active,Active" bitfld.long 0x00 2. " ASB738 ,Active Status Bit 738" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB737 ,Active Status Bit 737" "Not active,Active" bitfld.long 0x00 0. " ASB736 ,Active Status Bit 736" "Not active,Active" else rgroup.long 0x035C++0x03 line.long 0x0 "GICD_ICDABR23,Active Status Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x18) rgroup.long 0x0360++0x03 line.long 0x0 "GICD_ICDABR24,Active Status Register 24" bitfld.long 0x00 31. " ASB799 ,Active Status Bit 799" "Not active,Active" bitfld.long 0x00 30. " ASB798 ,Active Status Bit 798" "Not active,Active" bitfld.long 0x00 29. " ASB797 ,Active Status Bit 797" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB796 ,Active Status Bit 796" "Not active,Active" bitfld.long 0x00 27. " ASB795 ,Active Status Bit 795" "Not active,Active" bitfld.long 0x00 26. " ASB794 ,Active Status Bit 794" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB793 ,Active Status Bit 793" "Not active,Active" bitfld.long 0x00 24. " ASB792 ,Active Status Bit 792" "Not active,Active" bitfld.long 0x00 23. " ASB791 ,Active Status Bit 791" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB790 ,Active Status Bit 790" "Not active,Active" bitfld.long 0x00 21. " ASB789 ,Active Status Bit 789" "Not active,Active" bitfld.long 0x00 20. " ASB788 ,Active Status Bit 788" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB787 ,Active Status Bit 787" "Not active,Active" bitfld.long 0x00 18. " ASB786 ,Active Status Bit 786" "Not active,Active" bitfld.long 0x00 17. " ASB785 ,Active Status Bit 785" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB784 ,Active Status Bit 784" "Not active,Active" bitfld.long 0x00 15. " ASB783 ,Active Status Bit 783" "Not active,Active" bitfld.long 0x00 14. " ASB782 ,Active Status Bit 782" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB781 ,Active Status Bit 781" "Not active,Active" bitfld.long 0x00 12. " ASB780 ,Active Status Bit 780" "Not active,Active" bitfld.long 0x00 11. " ASB779 ,Active Status Bit 779" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB778 ,Active Status Bit 778" "Not active,Active" bitfld.long 0x00 9. " ASB777 ,Active Status Bit 777" "Not active,Active" bitfld.long 0x00 8. " ASB776 ,Active Status Bit 776" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB775 ,Active Status Bit 775" "Not active,Active" bitfld.long 0x00 6. " ASB774 ,Active Status Bit 774" "Not active,Active" bitfld.long 0x00 5. " ASB773 ,Active Status Bit 773" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB772 ,Active Status Bit 772" "Not active,Active" bitfld.long 0x00 3. " ASB771 ,Active Status Bit 771" "Not active,Active" bitfld.long 0x00 2. " ASB770 ,Active Status Bit 770" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB769 ,Active Status Bit 769" "Not active,Active" bitfld.long 0x00 0. " ASB768 ,Active Status Bit 768" "Not active,Active" else rgroup.long 0x0360++0x03 line.long 0x0 "GICD_ICDABR24,Active Status Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x19) rgroup.long 0x0364++0x03 line.long 0x0 "GICD_ICDABR25,Active Status Register 25" bitfld.long 0x00 31. " ASB831 ,Active Status Bit 831" "Not active,Active" bitfld.long 0x00 30. " ASB830 ,Active Status Bit 830" "Not active,Active" bitfld.long 0x00 29. " ASB829 ,Active Status Bit 829" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB828 ,Active Status Bit 828" "Not active,Active" bitfld.long 0x00 27. " ASB827 ,Active Status Bit 827" "Not active,Active" bitfld.long 0x00 26. " ASB826 ,Active Status Bit 826" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB825 ,Active Status Bit 825" "Not active,Active" bitfld.long 0x00 24. " ASB824 ,Active Status Bit 824" "Not active,Active" bitfld.long 0x00 23. " ASB823 ,Active Status Bit 823" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB822 ,Active Status Bit 822" "Not active,Active" bitfld.long 0x00 21. " ASB821 ,Active Status Bit 821" "Not active,Active" bitfld.long 0x00 20. " ASB820 ,Active Status Bit 820" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB819 ,Active Status Bit 819" "Not active,Active" bitfld.long 0x00 18. " ASB818 ,Active Status Bit 818" "Not active,Active" bitfld.long 0x00 17. " ASB817 ,Active Status Bit 817" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB816 ,Active Status Bit 816" "Not active,Active" bitfld.long 0x00 15. " ASB815 ,Active Status Bit 815" "Not active,Active" bitfld.long 0x00 14. " ASB814 ,Active Status Bit 814" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB813 ,Active Status Bit 813" "Not active,Active" bitfld.long 0x00 12. " ASB812 ,Active Status Bit 812" "Not active,Active" bitfld.long 0x00 11. " ASB811 ,Active Status Bit 811" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB810 ,Active Status Bit 810" "Not active,Active" bitfld.long 0x00 9. " ASB809 ,Active Status Bit 809" "Not active,Active" bitfld.long 0x00 8. " ASB808 ,Active Status Bit 808" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB807 ,Active Status Bit 807" "Not active,Active" bitfld.long 0x00 6. " ASB806 ,Active Status Bit 806" "Not active,Active" bitfld.long 0x00 5. " ASB805 ,Active Status Bit 805" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB804 ,Active Status Bit 804" "Not active,Active" bitfld.long 0x00 3. " ASB803 ,Active Status Bit 803" "Not active,Active" bitfld.long 0x00 2. " ASB802 ,Active Status Bit 802" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB801 ,Active Status Bit 801" "Not active,Active" bitfld.long 0x00 0. " ASB800 ,Active Status Bit 800" "Not active,Active" else rgroup.long 0x0364++0x03 line.long 0x0 "GICD_ICDABR25,Active Status Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1A) rgroup.long 0x0368++0x03 line.long 0x0 "GICD_ICDABR26,Active Status Register 26" bitfld.long 0x00 31. " ASB863 ,Active Status Bit 863" "Not active,Active" bitfld.long 0x00 30. " ASB862 ,Active Status Bit 862" "Not active,Active" bitfld.long 0x00 29. " ASB861 ,Active Status Bit 861" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB860 ,Active Status Bit 860" "Not active,Active" bitfld.long 0x00 27. " ASB859 ,Active Status Bit 859" "Not active,Active" bitfld.long 0x00 26. " ASB858 ,Active Status Bit 858" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB857 ,Active Status Bit 857" "Not active,Active" bitfld.long 0x00 24. " ASB856 ,Active Status Bit 856" "Not active,Active" bitfld.long 0x00 23. " ASB855 ,Active Status Bit 855" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB854 ,Active Status Bit 854" "Not active,Active" bitfld.long 0x00 21. " ASB853 ,Active Status Bit 853" "Not active,Active" bitfld.long 0x00 20. " ASB852 ,Active Status Bit 852" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB851 ,Active Status Bit 851" "Not active,Active" bitfld.long 0x00 18. " ASB850 ,Active Status Bit 850" "Not active,Active" bitfld.long 0x00 17. " ASB849 ,Active Status Bit 849" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB848 ,Active Status Bit 848" "Not active,Active" bitfld.long 0x00 15. " ASB847 ,Active Status Bit 847" "Not active,Active" bitfld.long 0x00 14. " ASB846 ,Active Status Bit 846" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB845 ,Active Status Bit 845" "Not active,Active" bitfld.long 0x00 12. " ASB844 ,Active Status Bit 844" "Not active,Active" bitfld.long 0x00 11. " ASB843 ,Active Status Bit 843" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB842 ,Active Status Bit 842" "Not active,Active" bitfld.long 0x00 9. " ASB841 ,Active Status Bit 841" "Not active,Active" bitfld.long 0x00 8. " ASB840 ,Active Status Bit 840" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB839 ,Active Status Bit 839" "Not active,Active" bitfld.long 0x00 6. " ASB838 ,Active Status Bit 838" "Not active,Active" bitfld.long 0x00 5. " ASB837 ,Active Status Bit 837" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB836 ,Active Status Bit 836" "Not active,Active" bitfld.long 0x00 3. " ASB835 ,Active Status Bit 835" "Not active,Active" bitfld.long 0x00 2. " ASB834 ,Active Status Bit 834" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB833 ,Active Status Bit 833" "Not active,Active" bitfld.long 0x00 0. " ASB832 ,Active Status Bit 832" "Not active,Active" else rgroup.long 0x0368++0x03 line.long 0x0 "GICD_ICDABR26,Active Status Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1B) rgroup.long 0x036C++0x03 line.long 0x0 "GICD_ICDABR27,Active Status Register 27" bitfld.long 0x00 31. " ASB895 ,Active Status Bit 895" "Not active,Active" bitfld.long 0x00 30. " ASB894 ,Active Status Bit 894" "Not active,Active" bitfld.long 0x00 29. " ASB893 ,Active Status Bit 893" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB892 ,Active Status Bit 892" "Not active,Active" bitfld.long 0x00 27. " ASB891 ,Active Status Bit 891" "Not active,Active" bitfld.long 0x00 26. " ASB890 ,Active Status Bit 890" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB889 ,Active Status Bit 889" "Not active,Active" bitfld.long 0x00 24. " ASB888 ,Active Status Bit 888" "Not active,Active" bitfld.long 0x00 23. " ASB887 ,Active Status Bit 887" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB886 ,Active Status Bit 886" "Not active,Active" bitfld.long 0x00 21. " ASB885 ,Active Status Bit 885" "Not active,Active" bitfld.long 0x00 20. " ASB884 ,Active Status Bit 884" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB883 ,Active Status Bit 883" "Not active,Active" bitfld.long 0x00 18. " ASB882 ,Active Status Bit 882" "Not active,Active" bitfld.long 0x00 17. " ASB881 ,Active Status Bit 881" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB880 ,Active Status Bit 880" "Not active,Active" bitfld.long 0x00 15. " ASB879 ,Active Status Bit 879" "Not active,Active" bitfld.long 0x00 14. " ASB878 ,Active Status Bit 878" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB877 ,Active Status Bit 877" "Not active,Active" bitfld.long 0x00 12. " ASB876 ,Active Status Bit 876" "Not active,Active" bitfld.long 0x00 11. " ASB875 ,Active Status Bit 875" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB874 ,Active Status Bit 874" "Not active,Active" bitfld.long 0x00 9. " ASB873 ,Active Status Bit 873" "Not active,Active" bitfld.long 0x00 8. " ASB872 ,Active Status Bit 872" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB871 ,Active Status Bit 871" "Not active,Active" bitfld.long 0x00 6. " ASB870 ,Active Status Bit 870" "Not active,Active" bitfld.long 0x00 5. " ASB869 ,Active Status Bit 869" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB868 ,Active Status Bit 868" "Not active,Active" bitfld.long 0x00 3. " ASB867 ,Active Status Bit 867" "Not active,Active" bitfld.long 0x00 2. " ASB866 ,Active Status Bit 866" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB865 ,Active Status Bit 865" "Not active,Active" bitfld.long 0x00 0. " ASB864 ,Active Status Bit 864" "Not active,Active" else rgroup.long 0x036C++0x03 line.long 0x0 "GICD_ICDABR27,Active Status Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1C) rgroup.long 0x0370++0x03 line.long 0x0 "GICD_ICDABR28,Active Status Register 28" bitfld.long 0x00 31. " ASB927 ,Active Status Bit 927" "Not active,Active" bitfld.long 0x00 30. " ASB926 ,Active Status Bit 926" "Not active,Active" bitfld.long 0x00 29. " ASB925 ,Active Status Bit 925" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB924 ,Active Status Bit 924" "Not active,Active" bitfld.long 0x00 27. " ASB923 ,Active Status Bit 923" "Not active,Active" bitfld.long 0x00 26. " ASB922 ,Active Status Bit 922" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB921 ,Active Status Bit 921" "Not active,Active" bitfld.long 0x00 24. " ASB920 ,Active Status Bit 920" "Not active,Active" bitfld.long 0x00 23. " ASB919 ,Active Status Bit 919" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB918 ,Active Status Bit 918" "Not active,Active" bitfld.long 0x00 21. " ASB917 ,Active Status Bit 917" "Not active,Active" bitfld.long 0x00 20. " ASB916 ,Active Status Bit 916" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB915 ,Active Status Bit 915" "Not active,Active" bitfld.long 0x00 18. " ASB914 ,Active Status Bit 914" "Not active,Active" bitfld.long 0x00 17. " ASB913 ,Active Status Bit 913" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB912 ,Active Status Bit 912" "Not active,Active" bitfld.long 0x00 15. " ASB911 ,Active Status Bit 911" "Not active,Active" bitfld.long 0x00 14. " ASB910 ,Active Status Bit 910" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB909 ,Active Status Bit 909" "Not active,Active" bitfld.long 0x00 12. " ASB908 ,Active Status Bit 908" "Not active,Active" bitfld.long 0x00 11. " ASB907 ,Active Status Bit 907" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB906 ,Active Status Bit 906" "Not active,Active" bitfld.long 0x00 9. " ASB905 ,Active Status Bit 905" "Not active,Active" bitfld.long 0x00 8. " ASB904 ,Active Status Bit 904" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB903 ,Active Status Bit 903" "Not active,Active" bitfld.long 0x00 6. " ASB902 ,Active Status Bit 902" "Not active,Active" bitfld.long 0x00 5. " ASB901 ,Active Status Bit 901" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB900 ,Active Status Bit 900" "Not active,Active" bitfld.long 0x00 3. " ASB899 ,Active Status Bit 899" "Not active,Active" bitfld.long 0x00 2. " ASB898 ,Active Status Bit 898" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB897 ,Active Status Bit 897" "Not active,Active" bitfld.long 0x00 0. " ASB896 ,Active Status Bit 896" "Not active,Active" else rgroup.long 0x0370++0x03 line.long 0x0 "GICD_ICDABR28,Active Status Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1D) rgroup.long 0x0374++0x03 line.long 0x0 "GICD_ICDABR29,Active Status Register 29" bitfld.long 0x00 31. " ASB959 ,Active Status Bit 959" "Not active,Active" bitfld.long 0x00 30. " ASB958 ,Active Status Bit 958" "Not active,Active" bitfld.long 0x00 29. " ASB957 ,Active Status Bit 957" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB956 ,Active Status Bit 956" "Not active,Active" bitfld.long 0x00 27. " ASB955 ,Active Status Bit 955" "Not active,Active" bitfld.long 0x00 26. " ASB954 ,Active Status Bit 954" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB953 ,Active Status Bit 953" "Not active,Active" bitfld.long 0x00 24. " ASB952 ,Active Status Bit 952" "Not active,Active" bitfld.long 0x00 23. " ASB951 ,Active Status Bit 951" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB950 ,Active Status Bit 950" "Not active,Active" bitfld.long 0x00 21. " ASB949 ,Active Status Bit 949" "Not active,Active" bitfld.long 0x00 20. " ASB948 ,Active Status Bit 948" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB947 ,Active Status Bit 947" "Not active,Active" bitfld.long 0x00 18. " ASB946 ,Active Status Bit 946" "Not active,Active" bitfld.long 0x00 17. " ASB945 ,Active Status Bit 945" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB944 ,Active Status Bit 944" "Not active,Active" bitfld.long 0x00 15. " ASB943 ,Active Status Bit 943" "Not active,Active" bitfld.long 0x00 14. " ASB942 ,Active Status Bit 942" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB941 ,Active Status Bit 941" "Not active,Active" bitfld.long 0x00 12. " ASB940 ,Active Status Bit 940" "Not active,Active" bitfld.long 0x00 11. " ASB939 ,Active Status Bit 939" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB938 ,Active Status Bit 938" "Not active,Active" bitfld.long 0x00 9. " ASB937 ,Active Status Bit 937" "Not active,Active" bitfld.long 0x00 8. " ASB936 ,Active Status Bit 936" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB935 ,Active Status Bit 935" "Not active,Active" bitfld.long 0x00 6. " ASB934 ,Active Status Bit 934" "Not active,Active" bitfld.long 0x00 5. " ASB933 ,Active Status Bit 933" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB932 ,Active Status Bit 932" "Not active,Active" bitfld.long 0x00 3. " ASB931 ,Active Status Bit 931" "Not active,Active" bitfld.long 0x00 2. " ASB930 ,Active Status Bit 930" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB929 ,Active Status Bit 929" "Not active,Active" bitfld.long 0x00 0. " ASB928 ,Active Status Bit 928" "Not active,Active" else rgroup.long 0x0374++0x03 line.long 0x0 "GICD_ICDABR29,Active Status Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1E) rgroup.long 0x0378++0x03 line.long 0x0 "GICD_ICDABR30,Active Status Register 30" bitfld.long 0x00 31. " ASB991 ,Active Status Bit 991" "Not active,Active" bitfld.long 0x00 30. " ASB990 ,Active Status Bit 990" "Not active,Active" bitfld.long 0x00 29. " ASB989 ,Active Status Bit 989" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB988 ,Active Status Bit 988" "Not active,Active" bitfld.long 0x00 27. " ASB987 ,Active Status Bit 987" "Not active,Active" bitfld.long 0x00 26. " ASB986 ,Active Status Bit 986" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB985 ,Active Status Bit 985" "Not active,Active" bitfld.long 0x00 24. " ASB984 ,Active Status Bit 984" "Not active,Active" bitfld.long 0x00 23. " ASB983 ,Active Status Bit 983" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB982 ,Active Status Bit 982" "Not active,Active" bitfld.long 0x00 21. " ASB981 ,Active Status Bit 981" "Not active,Active" bitfld.long 0x00 20. " ASB980 ,Active Status Bit 980" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB979 ,Active Status Bit 979" "Not active,Active" bitfld.long 0x00 18. " ASB978 ,Active Status Bit 978" "Not active,Active" bitfld.long 0x00 17. " ASB977 ,Active Status Bit 977" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB976 ,Active Status Bit 976" "Not active,Active" bitfld.long 0x00 15. " ASB975 ,Active Status Bit 975" "Not active,Active" bitfld.long 0x00 14. " ASB974 ,Active Status Bit 974" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB973 ,Active Status Bit 973" "Not active,Active" bitfld.long 0x00 12. " ASB972 ,Active Status Bit 972" "Not active,Active" bitfld.long 0x00 11. " ASB971 ,Active Status Bit 971" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB970 ,Active Status Bit 970" "Not active,Active" bitfld.long 0x00 9. " ASB969 ,Active Status Bit 969" "Not active,Active" bitfld.long 0x00 8. " ASB968 ,Active Status Bit 968" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB967 ,Active Status Bit 967" "Not active,Active" bitfld.long 0x00 6. " ASB966 ,Active Status Bit 966" "Not active,Active" bitfld.long 0x00 5. " ASB965 ,Active Status Bit 965" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB964 ,Active Status Bit 964" "Not active,Active" bitfld.long 0x00 3. " ASB963 ,Active Status Bit 963" "Not active,Active" bitfld.long 0x00 2. " ASB962 ,Active Status Bit 962" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB961 ,Active Status Bit 961" "Not active,Active" bitfld.long 0x00 0. " ASB960 ,Active Status Bit 960" "Not active,Active" else rgroup.long 0x0378++0x03 line.long 0x0 "GICD_ICDABR30,Active Status Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)==0x1F) rgroup.long 0x037C++0x03 line.long 0x0 "GICD_ICDABR31,Active Status Register 31" bitfld.long 0x00 27. " ASB1019 ,Active Status Bit 1019" "Not active,Active" bitfld.long 0x00 26. " ASB1018 ,Active Status Bit 1018" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB1017 ,Active Status Bit 1017" "Not active,Active" bitfld.long 0x00 24. " ASB1016 ,Active Status Bit 1016" "Not active,Active" bitfld.long 0x00 23. " ASB1015 ,Active Status Bit 1015" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB1014 ,Active Status Bit 1014" "Not active,Active" bitfld.long 0x00 21. " ASB1013 ,Active Status Bit 1013" "Not active,Active" bitfld.long 0x00 20. " ASB1012 ,Active Status Bit 1012" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB1011 ,Active Status Bit 1011" "Not active,Active" bitfld.long 0x00 18. " ASB1010 ,Active Status Bit 1010" "Not active,Active" bitfld.long 0x00 17. " ASB1009 ,Active Status Bit 1009" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB1008 ,Active Status Bit 1008" "Not active,Active" bitfld.long 0x00 15. " ASB1007 ,Active Status Bit 1007" "Not active,Active" bitfld.long 0x00 14. " ASB1006 ,Active Status Bit 1006" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB1005 ,Active Status Bit 1005" "Not active,Active" bitfld.long 0x00 12. " ASB1004 ,Active Status Bit 1004" "Not active,Active" bitfld.long 0x00 11. " ASB1003 ,Active Status Bit 1003" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB1002 ,Active Status Bit 1002" "Not active,Active" bitfld.long 0x00 9. " ASB1001 ,Active Status Bit 1001" "Not active,Active" bitfld.long 0x00 8. " ASB1000 ,Active Status Bit 1000" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB999 ,Active Status Bit 999" "Not active,Active" bitfld.long 0x00 6. " ASB998 ,Active Status Bit 998" "Not active,Active" bitfld.long 0x00 5. " ASB997 ,Active Status Bit 997" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB996 ,Active Status Bit 996" "Not active,Active" bitfld.long 0x00 3. " ASB995 ,Active Status Bit 995" "Not active,Active" bitfld.long 0x00 2. " ASB994 ,Active Status Bit 994" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB993 ,Active Status Bit 993" "Not active,Active" bitfld.long 0x00 0. " ASB992 ,Active Status Bit 992" "Not active,Active" else rgroup.long 0x037C++0x03 line.long 0x0 "GICD_ICDABR31,Active Status Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif else group.long 0x0300++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE31 ,Set/Clear Active Bit 31" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE30 ,Set/Clear Active Bit 30" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE29 ,Set/Clear Active Bit 29" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE28 ,Set/Clear Active Bit 28" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE27 ,Set/Clear Active Bit 27" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE26 ,Set/Clear Active Bit 26" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE25 ,Set/Clear Active Bit 25" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE24 ,Set/Clear Active Bit 24" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE23 ,Set/Clear Active Bit 23" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE22 ,Set/Clear Active Bit 22" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE21 ,Set/Clear Active Bit 21" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE20 ,Set/Clear Active Bit 20" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE19 ,Set/Clear Active Bit 19" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE18 ,Set/Clear Active Bit 18" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE17 ,Set/Clear Active Bit 17" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE16 ,Set/Clear Active Bit 16" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE15 ,Set/Clear Active Bit 15" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE14 ,Set/Clear Active Bit 14" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE13 ,Set/Clear Active Bit 13" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE12 ,Set/Clear Active Bit 12" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE11 ,Set/Clear Active Bit 11" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE10 ,Set/Clear Active Bit 10" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE9 ,Set/Clear Active Bit 9" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE8 ,Set/Clear Active Bit 8" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE7 ,Set/Clear Active Bit 7" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE6 ,Set/Clear Active Bit 6" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE5 ,Set/Clear Active Bit 5" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE4 ,Set/Clear Active Bit 4" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE3 ,Set/Clear Active Bit 3" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE2 ,Set/Clear Active Bit 2" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE1 ,Set/Clear Active Bit 1" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE0 ,Set/Clear Active Bit 0" "Not active,Active" if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x01) group.long 0x0304++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE63 ,Set/Clear Active Bit 63" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE62 ,Set/Clear Active Bit 62" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE61 ,Set/Clear Active Bit 61" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE60 ,Set/Clear Active Bit 60" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE59 ,Set/Clear Active Bit 59" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE58 ,Set/Clear Active Bit 58" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE57 ,Set/Clear Active Bit 57" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE56 ,Set/Clear Active Bit 56" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE55 ,Set/Clear Active Bit 55" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE54 ,Set/Clear Active Bit 54" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE53 ,Set/Clear Active Bit 53" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE52 ,Set/Clear Active Bit 52" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE51 ,Set/Clear Active Bit 51" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE50 ,Set/Clear Active Bit 50" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE49 ,Set/Clear Active Bit 49" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE48 ,Set/Clear Active Bit 48" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE47 ,Set/Clear Active Bit 47" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE46 ,Set/Clear Active Bit 46" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE45 ,Set/Clear Active Bit 45" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE44 ,Set/Clear Active Bit 44" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE43 ,Set/Clear Active Bit 43" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE42 ,Set/Clear Active Bit 42" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE41 ,Set/Clear Active Bit 41" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE40 ,Set/Clear Active Bit 40" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE39 ,Set/Clear Active Bit 39" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE38 ,Set/Clear Active Bit 38" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE37 ,Set/Clear Active Bit 37" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE36 ,Set/Clear Active Bit 36" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE35 ,Set/Clear Active Bit 35" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE34 ,Set/Clear Active Bit 34" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE33 ,Set/Clear Active Bit 33" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE32 ,Set/Clear Active Bit 32" "Not active,Active" else rgroup.long 0x0304++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x02) group.long 0x0308++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE95 ,Set/Clear Active Bit 95" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE94 ,Set/Clear Active Bit 94" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE93 ,Set/Clear Active Bit 93" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE92 ,Set/Clear Active Bit 92" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE91 ,Set/Clear Active Bit 91" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE90 ,Set/Clear Active Bit 90" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE89 ,Set/Clear Active Bit 89" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE88 ,Set/Clear Active Bit 88" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE87 ,Set/Clear Active Bit 87" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE86 ,Set/Clear Active Bit 86" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE85 ,Set/Clear Active Bit 85" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE84 ,Set/Clear Active Bit 84" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE83 ,Set/Clear Active Bit 83" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE82 ,Set/Clear Active Bit 82" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE81 ,Set/Clear Active Bit 81" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE80 ,Set/Clear Active Bit 80" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE79 ,Set/Clear Active Bit 79" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE78 ,Set/Clear Active Bit 78" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE77 ,Set/Clear Active Bit 77" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE76 ,Set/Clear Active Bit 76" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE75 ,Set/Clear Active Bit 75" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE74 ,Set/Clear Active Bit 74" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE73 ,Set/Clear Active Bit 73" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE72 ,Set/Clear Active Bit 72" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE71 ,Set/Clear Active Bit 71" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE70 ,Set/Clear Active Bit 70" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE69 ,Set/Clear Active Bit 69" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE68 ,Set/Clear Active Bit 68" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE67 ,Set/Clear Active Bit 67" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE66 ,Set/Clear Active Bit 66" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE65 ,Set/Clear Active Bit 65" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE64 ,Set/Clear Active Bit 64" "Not active,Active" else rgroup.long 0x0308++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x03) group.long 0x030C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE127 ,Set/Clear Active Bit 127" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE126 ,Set/Clear Active Bit 126" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE125 ,Set/Clear Active Bit 125" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE124 ,Set/Clear Active Bit 124" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE123 ,Set/Clear Active Bit 123" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE122 ,Set/Clear Active Bit 122" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE121 ,Set/Clear Active Bit 121" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE120 ,Set/Clear Active Bit 120" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE119 ,Set/Clear Active Bit 119" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE118 ,Set/Clear Active Bit 118" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE117 ,Set/Clear Active Bit 117" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE116 ,Set/Clear Active Bit 116" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE115 ,Set/Clear Active Bit 115" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE114 ,Set/Clear Active Bit 114" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE113 ,Set/Clear Active Bit 113" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE112 ,Set/Clear Active Bit 112" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE111 ,Set/Clear Active Bit 111" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE110 ,Set/Clear Active Bit 110" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE109 ,Set/Clear Active Bit 109" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE108 ,Set/Clear Active Bit 108" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE107 ,Set/Clear Active Bit 107" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE106 ,Set/Clear Active Bit 106" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE105 ,Set/Clear Active Bit 105" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE104 ,Set/Clear Active Bit 104" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE103 ,Set/Clear Active Bit 103" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE102 ,Set/Clear Active Bit 102" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE101 ,Set/Clear Active Bit 101" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE100 ,Set/Clear Active Bit 100" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE99 ,Set/Clear Active Bit 99" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE98 ,Set/Clear Active Bit 98" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE97 ,Set/Clear Active Bit 97" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE96 ,Set/Clear Active Bit 96" "Not active,Active" else rgroup.long 0x030C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x04) group.long 0x0310++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE159 ,Set/Clear Active Bit 159" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE158 ,Set/Clear Active Bit 158" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE157 ,Set/Clear Active Bit 157" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE156 ,Set/Clear Active Bit 156" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE155 ,Set/Clear Active Bit 155" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE154 ,Set/Clear Active Bit 154" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE153 ,Set/Clear Active Bit 153" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE152 ,Set/Clear Active Bit 152" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE151 ,Set/Clear Active Bit 151" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE150 ,Set/Clear Active Bit 150" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE149 ,Set/Clear Active Bit 149" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE148 ,Set/Clear Active Bit 148" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE147 ,Set/Clear Active Bit 147" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE146 ,Set/Clear Active Bit 146" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE145 ,Set/Clear Active Bit 145" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE144 ,Set/Clear Active Bit 144" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE143 ,Set/Clear Active Bit 143" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE142 ,Set/Clear Active Bit 142" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE141 ,Set/Clear Active Bit 141" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE140 ,Set/Clear Active Bit 140" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE139 ,Set/Clear Active Bit 139" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE138 ,Set/Clear Active Bit 138" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE137 ,Set/Clear Active Bit 137" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE136 ,Set/Clear Active Bit 136" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE135 ,Set/Clear Active Bit 135" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE134 ,Set/Clear Active Bit 134" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE133 ,Set/Clear Active Bit 133" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE132 ,Set/Clear Active Bit 132" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE131 ,Set/Clear Active Bit 131" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE130 ,Set/Clear Active Bit 130" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE129 ,Set/Clear Active Bit 129" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE128 ,Set/Clear Active Bit 128" "Not active,Active" else rgroup.long 0x0310++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x05) group.long 0x0314++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE191 ,Set/Clear Active Bit 191" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE190 ,Set/Clear Active Bit 190" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE189 ,Set/Clear Active Bit 189" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE188 ,Set/Clear Active Bit 188" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE187 ,Set/Clear Active Bit 187" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE186 ,Set/Clear Active Bit 186" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE185 ,Set/Clear Active Bit 185" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE184 ,Set/Clear Active Bit 184" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE183 ,Set/Clear Active Bit 183" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE182 ,Set/Clear Active Bit 182" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE181 ,Set/Clear Active Bit 181" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE180 ,Set/Clear Active Bit 180" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE179 ,Set/Clear Active Bit 179" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE178 ,Set/Clear Active Bit 178" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE177 ,Set/Clear Active Bit 177" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE176 ,Set/Clear Active Bit 176" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE175 ,Set/Clear Active Bit 175" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE174 ,Set/Clear Active Bit 174" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE173 ,Set/Clear Active Bit 173" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE172 ,Set/Clear Active Bit 172" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE171 ,Set/Clear Active Bit 171" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE170 ,Set/Clear Active Bit 170" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE169 ,Set/Clear Active Bit 169" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE168 ,Set/Clear Active Bit 168" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE167 ,Set/Clear Active Bit 167" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE166 ,Set/Clear Active Bit 166" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE165 ,Set/Clear Active Bit 165" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE164 ,Set/Clear Active Bit 164" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE163 ,Set/Clear Active Bit 163" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE162 ,Set/Clear Active Bit 162" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE161 ,Set/Clear Active Bit 161" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE160 ,Set/Clear Active Bit 160" "Not active,Active" else rgroup.long 0x0314++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x06) group.long 0x0318++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE223 ,Set/Clear Active Bit 223" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE222 ,Set/Clear Active Bit 222" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE221 ,Set/Clear Active Bit 221" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE220 ,Set/Clear Active Bit 220" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE219 ,Set/Clear Active Bit 219" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE218 ,Set/Clear Active Bit 218" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE217 ,Set/Clear Active Bit 217" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE216 ,Set/Clear Active Bit 216" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE215 ,Set/Clear Active Bit 215" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE214 ,Set/Clear Active Bit 214" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE213 ,Set/Clear Active Bit 213" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE212 ,Set/Clear Active Bit 212" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE211 ,Set/Clear Active Bit 211" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE210 ,Set/Clear Active Bit 210" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE209 ,Set/Clear Active Bit 209" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE208 ,Set/Clear Active Bit 208" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE207 ,Set/Clear Active Bit 207" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE206 ,Set/Clear Active Bit 206" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE205 ,Set/Clear Active Bit 205" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE204 ,Set/Clear Active Bit 204" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE203 ,Set/Clear Active Bit 203" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE202 ,Set/Clear Active Bit 202" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE201 ,Set/Clear Active Bit 201" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE200 ,Set/Clear Active Bit 200" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE199 ,Set/Clear Active Bit 199" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE198 ,Set/Clear Active Bit 198" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE197 ,Set/Clear Active Bit 197" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE196 ,Set/Clear Active Bit 196" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE195 ,Set/Clear Active Bit 195" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE194 ,Set/Clear Active Bit 194" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE193 ,Set/Clear Active Bit 193" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE192 ,Set/Clear Active Bit 192" "Not active,Active" else rgroup.long 0x0318++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x07) group.long 0x031C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE255 ,Set/Clear Active Bit 255" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE254 ,Set/Clear Active Bit 254" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE253 ,Set/Clear Active Bit 253" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE252 ,Set/Clear Active Bit 252" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE251 ,Set/Clear Active Bit 251" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE250 ,Set/Clear Active Bit 250" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE249 ,Set/Clear Active Bit 249" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE248 ,Set/Clear Active Bit 248" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE247 ,Set/Clear Active Bit 247" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE246 ,Set/Clear Active Bit 246" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE245 ,Set/Clear Active Bit 245" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE244 ,Set/Clear Active Bit 244" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE243 ,Set/Clear Active Bit 243" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE242 ,Set/Clear Active Bit 242" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE241 ,Set/Clear Active Bit 241" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE240 ,Set/Clear Active Bit 240" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE239 ,Set/Clear Active Bit 239" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE238 ,Set/Clear Active Bit 238" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE237 ,Set/Clear Active Bit 237" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE236 ,Set/Clear Active Bit 236" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE235 ,Set/Clear Active Bit 235" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE234 ,Set/Clear Active Bit 234" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE233 ,Set/Clear Active Bit 233" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE232 ,Set/Clear Active Bit 232" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE231 ,Set/Clear Active Bit 231" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE230 ,Set/Clear Active Bit 230" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE229 ,Set/Clear Active Bit 229" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE228 ,Set/Clear Active Bit 228" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE227 ,Set/Clear Active Bit 227" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE226 ,Set/Clear Active Bit 226" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE225 ,Set/Clear Active Bit 225" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE224 ,Set/Clear Active Bit 224" "Not active,Active" else rgroup.long 0x031C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x08) group.long 0x0320++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE287 ,Set/Clear Active Bit 287" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE286 ,Set/Clear Active Bit 286" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE285 ,Set/Clear Active Bit 285" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE284 ,Set/Clear Active Bit 284" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE283 ,Set/Clear Active Bit 283" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE282 ,Set/Clear Active Bit 282" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE281 ,Set/Clear Active Bit 281" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE280 ,Set/Clear Active Bit 280" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE279 ,Set/Clear Active Bit 279" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE278 ,Set/Clear Active Bit 278" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE277 ,Set/Clear Active Bit 277" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE276 ,Set/Clear Active Bit 276" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE275 ,Set/Clear Active Bit 275" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE274 ,Set/Clear Active Bit 274" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE273 ,Set/Clear Active Bit 273" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE272 ,Set/Clear Active Bit 272" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE271 ,Set/Clear Active Bit 271" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE270 ,Set/Clear Active Bit 270" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE269 ,Set/Clear Active Bit 269" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE268 ,Set/Clear Active Bit 268" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE267 ,Set/Clear Active Bit 267" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE266 ,Set/Clear Active Bit 266" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE265 ,Set/Clear Active Bit 265" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE264 ,Set/Clear Active Bit 264" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE263 ,Set/Clear Active Bit 263" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE262 ,Set/Clear Active Bit 262" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE261 ,Set/Clear Active Bit 261" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE260 ,Set/Clear Active Bit 260" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE259 ,Set/Clear Active Bit 259" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE258 ,Set/Clear Active Bit 258" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE257 ,Set/Clear Active Bit 257" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE256 ,Set/Clear Active Bit 256" "Not active,Active" else rgroup.long 0x0320++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x09) group.long 0x0324++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE319 ,Set/Clear Active Bit 319" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE318 ,Set/Clear Active Bit 318" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE317 ,Set/Clear Active Bit 317" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE316 ,Set/Clear Active Bit 316" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE315 ,Set/Clear Active Bit 315" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE314 ,Set/Clear Active Bit 314" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE313 ,Set/Clear Active Bit 313" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE312 ,Set/Clear Active Bit 312" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE311 ,Set/Clear Active Bit 311" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE310 ,Set/Clear Active Bit 310" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE309 ,Set/Clear Active Bit 309" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE308 ,Set/Clear Active Bit 308" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE307 ,Set/Clear Active Bit 307" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE306 ,Set/Clear Active Bit 306" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE305 ,Set/Clear Active Bit 305" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE304 ,Set/Clear Active Bit 304" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE303 ,Set/Clear Active Bit 303" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE302 ,Set/Clear Active Bit 302" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE301 ,Set/Clear Active Bit 301" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE300 ,Set/Clear Active Bit 300" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE299 ,Set/Clear Active Bit 299" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE298 ,Set/Clear Active Bit 298" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE297 ,Set/Clear Active Bit 297" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE296 ,Set/Clear Active Bit 296" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE295 ,Set/Clear Active Bit 295" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE294 ,Set/Clear Active Bit 294" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE293 ,Set/Clear Active Bit 293" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE292 ,Set/Clear Active Bit 292" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE291 ,Set/Clear Active Bit 291" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE290 ,Set/Clear Active Bit 290" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE289 ,Set/Clear Active Bit 289" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE288 ,Set/Clear Active Bit 288" "Not active,Active" else rgroup.long 0x0324++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0A) group.long 0x0328++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE351 ,Set/Clear Active Bit 351" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE350 ,Set/Clear Active Bit 350" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE349 ,Set/Clear Active Bit 349" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE348 ,Set/Clear Active Bit 348" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE347 ,Set/Clear Active Bit 347" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE346 ,Set/Clear Active Bit 346" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE345 ,Set/Clear Active Bit 345" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE344 ,Set/Clear Active Bit 344" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE343 ,Set/Clear Active Bit 343" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE342 ,Set/Clear Active Bit 342" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE341 ,Set/Clear Active Bit 341" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE340 ,Set/Clear Active Bit 340" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE339 ,Set/Clear Active Bit 339" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE338 ,Set/Clear Active Bit 338" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE337 ,Set/Clear Active Bit 337" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE336 ,Set/Clear Active Bit 336" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE335 ,Set/Clear Active Bit 335" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE334 ,Set/Clear Active Bit 334" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE333 ,Set/Clear Active Bit 333" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE332 ,Set/Clear Active Bit 332" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE331 ,Set/Clear Active Bit 331" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE330 ,Set/Clear Active Bit 330" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE329 ,Set/Clear Active Bit 329" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE328 ,Set/Clear Active Bit 328" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE327 ,Set/Clear Active Bit 327" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE326 ,Set/Clear Active Bit 326" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE325 ,Set/Clear Active Bit 325" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE324 ,Set/Clear Active Bit 324" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE323 ,Set/Clear Active Bit 323" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE322 ,Set/Clear Active Bit 322" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE321 ,Set/Clear Active Bit 321" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE320 ,Set/Clear Active Bit 320" "Not active,Active" else rgroup.long 0x0328++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0B) group.long 0x032C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE383 ,Set/Clear Active Bit 383" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE382 ,Set/Clear Active Bit 382" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE381 ,Set/Clear Active Bit 381" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE380 ,Set/Clear Active Bit 380" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE379 ,Set/Clear Active Bit 379" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE378 ,Set/Clear Active Bit 378" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE377 ,Set/Clear Active Bit 377" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE376 ,Set/Clear Active Bit 376" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE375 ,Set/Clear Active Bit 375" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE374 ,Set/Clear Active Bit 374" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE373 ,Set/Clear Active Bit 373" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE372 ,Set/Clear Active Bit 372" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE371 ,Set/Clear Active Bit 371" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE370 ,Set/Clear Active Bit 370" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE369 ,Set/Clear Active Bit 369" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE368 ,Set/Clear Active Bit 368" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE367 ,Set/Clear Active Bit 367" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE366 ,Set/Clear Active Bit 366" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE365 ,Set/Clear Active Bit 365" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE364 ,Set/Clear Active Bit 364" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE363 ,Set/Clear Active Bit 363" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE362 ,Set/Clear Active Bit 362" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE361 ,Set/Clear Active Bit 361" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE360 ,Set/Clear Active Bit 360" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE359 ,Set/Clear Active Bit 359" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE358 ,Set/Clear Active Bit 358" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE357 ,Set/Clear Active Bit 357" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE356 ,Set/Clear Active Bit 356" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE355 ,Set/Clear Active Bit 355" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE354 ,Set/Clear Active Bit 354" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE353 ,Set/Clear Active Bit 353" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE352 ,Set/Clear Active Bit 352" "Not active,Active" else rgroup.long 0x032C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0C) group.long 0x0330++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE415 ,Set/Clear Active Bit 415" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE414 ,Set/Clear Active Bit 414" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE413 ,Set/Clear Active Bit 413" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE412 ,Set/Clear Active Bit 412" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE411 ,Set/Clear Active Bit 411" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE410 ,Set/Clear Active Bit 410" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE409 ,Set/Clear Active Bit 409" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE408 ,Set/Clear Active Bit 408" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE407 ,Set/Clear Active Bit 407" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE406 ,Set/Clear Active Bit 406" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE405 ,Set/Clear Active Bit 405" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE404 ,Set/Clear Active Bit 404" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE403 ,Set/Clear Active Bit 403" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE402 ,Set/Clear Active Bit 402" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE401 ,Set/Clear Active Bit 401" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE400 ,Set/Clear Active Bit 400" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE399 ,Set/Clear Active Bit 399" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE398 ,Set/Clear Active Bit 398" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE397 ,Set/Clear Active Bit 397" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE396 ,Set/Clear Active Bit 396" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE395 ,Set/Clear Active Bit 395" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE394 ,Set/Clear Active Bit 394" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE393 ,Set/Clear Active Bit 393" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE392 ,Set/Clear Active Bit 392" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE391 ,Set/Clear Active Bit 391" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE390 ,Set/Clear Active Bit 390" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE389 ,Set/Clear Active Bit 389" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE388 ,Set/Clear Active Bit 388" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE387 ,Set/Clear Active Bit 387" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE386 ,Set/Clear Active Bit 386" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE385 ,Set/Clear Active Bit 385" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE384 ,Set/Clear Active Bit 384" "Not active,Active" else rgroup.long 0x0330++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0D) group.long 0x0334++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE447 ,Set/Clear Active Bit 447" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE446 ,Set/Clear Active Bit 446" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE445 ,Set/Clear Active Bit 445" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE444 ,Set/Clear Active Bit 444" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE443 ,Set/Clear Active Bit 443" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE442 ,Set/Clear Active Bit 442" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE441 ,Set/Clear Active Bit 441" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE440 ,Set/Clear Active Bit 440" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE439 ,Set/Clear Active Bit 439" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE438 ,Set/Clear Active Bit 438" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE437 ,Set/Clear Active Bit 437" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE436 ,Set/Clear Active Bit 436" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE435 ,Set/Clear Active Bit 435" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE434 ,Set/Clear Active Bit 434" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE433 ,Set/Clear Active Bit 433" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE432 ,Set/Clear Active Bit 432" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE431 ,Set/Clear Active Bit 431" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE430 ,Set/Clear Active Bit 430" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE429 ,Set/Clear Active Bit 429" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE428 ,Set/Clear Active Bit 428" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE427 ,Set/Clear Active Bit 427" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE426 ,Set/Clear Active Bit 426" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE425 ,Set/Clear Active Bit 425" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE424 ,Set/Clear Active Bit 424" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE423 ,Set/Clear Active Bit 423" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE422 ,Set/Clear Active Bit 422" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE421 ,Set/Clear Active Bit 421" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE420 ,Set/Clear Active Bit 420" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE419 ,Set/Clear Active Bit 419" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE418 ,Set/Clear Active Bit 418" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE417 ,Set/Clear Active Bit 417" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE416 ,Set/Clear Active Bit 416" "Not active,Active" else rgroup.long 0x0334++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0E) group.long 0x0338++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE479 ,Set/Clear Active Bit 479" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE478 ,Set/Clear Active Bit 478" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE477 ,Set/Clear Active Bit 477" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE476 ,Set/Clear Active Bit 476" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE475 ,Set/Clear Active Bit 475" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE474 ,Set/Clear Active Bit 474" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE473 ,Set/Clear Active Bit 473" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE472 ,Set/Clear Active Bit 472" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE471 ,Set/Clear Active Bit 471" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE470 ,Set/Clear Active Bit 470" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE469 ,Set/Clear Active Bit 469" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE468 ,Set/Clear Active Bit 468" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE467 ,Set/Clear Active Bit 467" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE466 ,Set/Clear Active Bit 466" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE465 ,Set/Clear Active Bit 465" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE464 ,Set/Clear Active Bit 464" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE463 ,Set/Clear Active Bit 463" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE462 ,Set/Clear Active Bit 462" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE461 ,Set/Clear Active Bit 461" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE460 ,Set/Clear Active Bit 460" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE459 ,Set/Clear Active Bit 459" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE458 ,Set/Clear Active Bit 458" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE457 ,Set/Clear Active Bit 457" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE456 ,Set/Clear Active Bit 456" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE455 ,Set/Clear Active Bit 455" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE454 ,Set/Clear Active Bit 454" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE453 ,Set/Clear Active Bit 453" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE452 ,Set/Clear Active Bit 452" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE451 ,Set/Clear Active Bit 451" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE450 ,Set/Clear Active Bit 450" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE449 ,Set/Clear Active Bit 449" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE448 ,Set/Clear Active Bit 448" "Not active,Active" else rgroup.long 0x0338++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0F) group.long 0x033C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE511 ,Set/Clear Active Bit 511" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE510 ,Set/Clear Active Bit 510" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE509 ,Set/Clear Active Bit 509" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE508 ,Set/Clear Active Bit 508" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE507 ,Set/Clear Active Bit 507" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE506 ,Set/Clear Active Bit 506" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE505 ,Set/Clear Active Bit 505" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE504 ,Set/Clear Active Bit 504" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE503 ,Set/Clear Active Bit 503" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE502 ,Set/Clear Active Bit 502" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE501 ,Set/Clear Active Bit 501" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE500 ,Set/Clear Active Bit 500" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE499 ,Set/Clear Active Bit 499" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE498 ,Set/Clear Active Bit 498" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE497 ,Set/Clear Active Bit 497" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE496 ,Set/Clear Active Bit 496" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE495 ,Set/Clear Active Bit 495" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE494 ,Set/Clear Active Bit 494" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE493 ,Set/Clear Active Bit 493" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE492 ,Set/Clear Active Bit 492" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE491 ,Set/Clear Active Bit 491" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE490 ,Set/Clear Active Bit 490" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE489 ,Set/Clear Active Bit 489" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE488 ,Set/Clear Active Bit 488" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE487 ,Set/Clear Active Bit 487" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE486 ,Set/Clear Active Bit 486" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE485 ,Set/Clear Active Bit 485" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE484 ,Set/Clear Active Bit 484" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE483 ,Set/Clear Active Bit 483" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE482 ,Set/Clear Active Bit 482" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE481 ,Set/Clear Active Bit 481" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE480 ,Set/Clear Active Bit 480" "Not active,Active" else rgroup.long 0x033C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif rgroup.long 0x0340++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0344++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0348++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x034C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0350++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0354++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0358++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x035C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0360++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0364++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0368++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x036C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0370++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0374++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0378++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x037C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER31,Interrupt Set/Clear Active Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end tree "Priority Registers" group.long 0x400++0x03 line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0" hexmask.long.byte 0x00 24.--31. 1. " INTID3 ,Interrupt ID3 Priority/Priority Byte Offset 3 " hexmask.long.byte 0x00 16.--23. 1. " INTID2 ,Interrupt ID2 Priority/Priority Byte Offset 2 " hexmask.long.byte 0x00 8.--15. 1. " INTID1 ,Interrupt ID1 Priority/Priority Byte Offset 1 " hexmask.long.byte 0x00 0.--7. 1. " INTID0 ,Interrupt ID0 Priority/Priority Byte Offset 0 " group.long 0x404++0x03 line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1" hexmask.long.byte 0x00 24.--31. 1. " INTID7 ,Interrupt ID7 Priority/Priority Byte Offset 7 " hexmask.long.byte 0x00 16.--23. 1. " INTID6 ,Interrupt ID6 Priority/Priority Byte Offset 6 " hexmask.long.byte 0x00 8.--15. 1. " INTID5 ,Interrupt ID5 Priority/Priority Byte Offset 5 " hexmask.long.byte 0x00 0.--7. 1. " INTID4 ,Interrupt ID4 Priority/Priority Byte Offset 4 " group.long 0x408++0x03 line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2" hexmask.long.byte 0x00 24.--31. 1. " INTID11 ,Interrupt ID11 Priority/Priority Byte Offset 11 " hexmask.long.byte 0x00 16.--23. 1. " INTID10 ,Interrupt ID10 Priority/Priority Byte Offset 10 " hexmask.long.byte 0x00 8.--15. 1. " INTID9 ,Interrupt ID9 Priority/Priority Byte Offset 9 " hexmask.long.byte 0x00 0.--7. 1. " INTID8 ,Interrupt ID8 Priority/Priority Byte Offset 8 " group.long 0x40C++0x03 line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3" hexmask.long.byte 0x00 24.--31. 1. " INTID15 ,Interrupt ID15 Priority/Priority Byte Offset 15 " hexmask.long.byte 0x00 16.--23. 1. " INTID14 ,Interrupt ID14 Priority/Priority Byte Offset 14 " hexmask.long.byte 0x00 8.--15. 1. " INTID13 ,Interrupt ID13 Priority/Priority Byte Offset 13 " hexmask.long.byte 0x00 0.--7. 1. " INTID12 ,Interrupt ID12 Priority/Priority Byte Offset 12 " group.long 0x410++0x03 line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4" hexmask.long.byte 0x00 24.--31. 1. " INTID19 ,Interrupt ID19 Priority/Priority Byte Offset 19 " hexmask.long.byte 0x00 16.--23. 1. " INTID18 ,Interrupt ID18 Priority/Priority Byte Offset 18 " hexmask.long.byte 0x00 8.--15. 1. " INTID17 ,Interrupt ID17 Priority/Priority Byte Offset 17 " hexmask.long.byte 0x00 0.--7. 1. " INTID16 ,Interrupt ID16 Priority/Priority Byte Offset 16 " group.long 0x414++0x03 line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5" hexmask.long.byte 0x00 24.--31. 1. " INTID23 ,Interrupt ID23 Priority/Priority Byte Offset 23 " hexmask.long.byte 0x00 16.--23. 1. " INTID22 ,Interrupt ID22 Priority/Priority Byte Offset 22 " hexmask.long.byte 0x00 8.--15. 1. " INTID21 ,Interrupt ID21 Priority/Priority Byte Offset 21 " hexmask.long.byte 0x00 0.--7. 1. " INTID20 ,Interrupt ID20 Priority/Priority Byte Offset 20 " group.long 0x418++0x03 line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6" hexmask.long.byte 0x00 24.--31. 1. " INTID27 ,Interrupt ID27 Priority/Priority Byte Offset 27 " hexmask.long.byte 0x00 16.--23. 1. " INTID26 ,Interrupt ID26 Priority/Priority Byte Offset 26 " hexmask.long.byte 0x00 8.--15. 1. " INTID25 ,Interrupt ID25 Priority/Priority Byte Offset 25 " hexmask.long.byte 0x00 0.--7. 1. " INTID24 ,Interrupt ID24 Priority/Priority Byte Offset 24 " group.long 0x41C++0x03 line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7" hexmask.long.byte 0x00 24.--31. 1. " INTID31 ,Interrupt ID31 Priority/Priority Byte Offset 31 " hexmask.long.byte 0x00 16.--23. 1. " INTID30 ,Interrupt ID30 Priority/Priority Byte Offset 30 " hexmask.long.byte 0x00 8.--15. 1. " INTID29 ,Interrupt ID29 Priority/Priority Byte Offset 29 " hexmask.long.byte 0x00 0.--7. 1. " INTID28 ,Interrupt ID28 Priority/Priority Byte Offset 28 " if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x01) group.long 0x420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" hexmask.long.byte 0x00 24.--31. 1. " INTID35 ,Interrupt ID35 Priority/Priority Byte Offset 35 " hexmask.long.byte 0x00 16.--23. 1. " INTID34 ,Interrupt ID34 Priority/Priority Byte Offset 34 " hexmask.long.byte 0x00 8.--15. 1. " INTID33 ,Interrupt ID33 Priority/Priority Byte Offset 33 " hexmask.long.byte 0x00 0.--7. 1. " INTID32 ,Interrupt ID32 Priority/Priority Byte Offset 32 " group.long 0x424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" hexmask.long.byte 0x00 24.--31. 1. " INTID39 ,Interrupt ID39 Priority/Priority Byte Offset 39 " hexmask.long.byte 0x00 16.--23. 1. " INTID38 ,Interrupt ID38 Priority/Priority Byte Offset 38 " hexmask.long.byte 0x00 8.--15. 1. " INTID37 ,Interrupt ID37 Priority/Priority Byte Offset 37 " hexmask.long.byte 0x00 0.--7. 1. " INTID36 ,Interrupt ID36 Priority/Priority Byte Offset 36 " group.long 0x428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" hexmask.long.byte 0x00 24.--31. 1. " INTID43 ,Interrupt ID43 Priority/Priority Byte Offset 43 " hexmask.long.byte 0x00 16.--23. 1. " INTID42 ,Interrupt ID42 Priority/Priority Byte Offset 42 " hexmask.long.byte 0x00 8.--15. 1. " INTID41 ,Interrupt ID41 Priority/Priority Byte Offset 41 " hexmask.long.byte 0x00 0.--7. 1. " INTID40 ,Interrupt ID40 Priority/Priority Byte Offset 40 " group.long 0x42C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" hexmask.long.byte 0x00 24.--31. 1. " INTID47 ,Interrupt ID47 Priority/Priority Byte Offset 47 " hexmask.long.byte 0x00 16.--23. 1. " INTID46 ,Interrupt ID46 Priority/Priority Byte Offset 46 " hexmask.long.byte 0x00 8.--15. 1. " INTID45 ,Interrupt ID45 Priority/Priority Byte Offset 45 " hexmask.long.byte 0x00 0.--7. 1. " INTID44 ,Interrupt ID44 Priority/Priority Byte Offset 44 " group.long 0x430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" hexmask.long.byte 0x00 24.--31. 1. " INTID51 ,Interrupt ID51 Priority/Priority Byte Offset 51 " hexmask.long.byte 0x00 16.--23. 1. " INTID50 ,Interrupt ID50 Priority/Priority Byte Offset 50 " hexmask.long.byte 0x00 8.--15. 1. " INTID49 ,Interrupt ID49 Priority/Priority Byte Offset 49 " hexmask.long.byte 0x00 0.--7. 1. " INTID48 ,Interrupt ID48 Priority/Priority Byte Offset 48 " group.long 0x434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" hexmask.long.byte 0x00 24.--31. 1. " INTID55 ,Interrupt ID55 Priority/Priority Byte Offset 55 " hexmask.long.byte 0x00 16.--23. 1. " INTID54 ,Interrupt ID54 Priority/Priority Byte Offset 54 " hexmask.long.byte 0x00 8.--15. 1. " INTID53 ,Interrupt ID53 Priority/Priority Byte Offset 53 " hexmask.long.byte 0x00 0.--7. 1. " INTID52 ,Interrupt ID52 Priority/Priority Byte Offset 52 " group.long 0x438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" hexmask.long.byte 0x00 24.--31. 1. " INTID59 ,Interrupt ID59 Priority/Priority Byte Offset 59 " hexmask.long.byte 0x00 16.--23. 1. " INTID58 ,Interrupt ID58 Priority/Priority Byte Offset 58 " hexmask.long.byte 0x00 8.--15. 1. " INTID57 ,Interrupt ID57 Priority/Priority Byte Offset 57 " hexmask.long.byte 0x00 0.--7. 1. " INTID56 ,Interrupt ID56 Priority/Priority Byte Offset 56 " group.long 0x43C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" hexmask.long.byte 0x00 24.--31. 1. " INTID63 ,Interrupt ID63 Priority/Priority Byte Offset 63 " hexmask.long.byte 0x00 16.--23. 1. " INTID62 ,Interrupt ID62 Priority/Priority Byte Offset 62 " hexmask.long.byte 0x00 8.--15. 1. " INTID61 ,Interrupt ID61 Priority/Priority Byte Offset 61 " hexmask.long.byte 0x00 0.--7. 1. " INTID60 ,Interrupt ID60 Priority/Priority Byte Offset 60 " else rgroup.long 0x420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" rgroup.long 0x424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" rgroup.long 0x428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" rgroup.long 0x42C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" rgroup.long 0x430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" rgroup.long 0x434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" rgroup.long 0x438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" rgroup.long 0x43C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x02) group.long 0x440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" hexmask.long.byte 0x00 24.--31. 1. " INTID67 ,Interrupt ID67 Priority/Priority Byte Offset 67 " hexmask.long.byte 0x00 16.--23. 1. " INTID66 ,Interrupt ID66 Priority/Priority Byte Offset 66 " hexmask.long.byte 0x00 8.--15. 1. " INTID65 ,Interrupt ID65 Priority/Priority Byte Offset 65 " hexmask.long.byte 0x00 0.--7. 1. " INTID64 ,Interrupt ID64 Priority/Priority Byte Offset 64 " group.long 0x444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" hexmask.long.byte 0x00 24.--31. 1. " INTID71 ,Interrupt ID71 Priority/Priority Byte Offset 71 " hexmask.long.byte 0x00 16.--23. 1. " INTID70 ,Interrupt ID70 Priority/Priority Byte Offset 70 " hexmask.long.byte 0x00 8.--15. 1. " INTID69 ,Interrupt ID69 Priority/Priority Byte Offset 69 " hexmask.long.byte 0x00 0.--7. 1. " INTID68 ,Interrupt ID68 Priority/Priority Byte Offset 68 " group.long 0x448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" hexmask.long.byte 0x00 24.--31. 1. " INTID75 ,Interrupt ID75 Priority/Priority Byte Offset 75 " hexmask.long.byte 0x00 16.--23. 1. " INTID74 ,Interrupt ID74 Priority/Priority Byte Offset 74 " hexmask.long.byte 0x00 8.--15. 1. " INTID73 ,Interrupt ID73 Priority/Priority Byte Offset 73 " hexmask.long.byte 0x00 0.--7. 1. " INTID72 ,Interrupt ID72 Priority/Priority Byte Offset 72 " group.long 0x44C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" hexmask.long.byte 0x00 24.--31. 1. " INTID79 ,Interrupt ID79 Priority/Priority Byte Offset 79 " hexmask.long.byte 0x00 16.--23. 1. " INTID78 ,Interrupt ID78 Priority/Priority Byte Offset 78 " hexmask.long.byte 0x00 8.--15. 1. " INTID77 ,Interrupt ID77 Priority/Priority Byte Offset 77 " hexmask.long.byte 0x00 0.--7. 1. " INTID76 ,Interrupt ID76 Priority/Priority Byte Offset 76 " group.long 0x450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" hexmask.long.byte 0x00 24.--31. 1. " INTID83 ,Interrupt ID83 Priority/Priority Byte Offset 83 " hexmask.long.byte 0x00 16.--23. 1. " INTID82 ,Interrupt ID82 Priority/Priority Byte Offset 82 " hexmask.long.byte 0x00 8.--15. 1. " INTID81 ,Interrupt ID81 Priority/Priority Byte Offset 81 " hexmask.long.byte 0x00 0.--7. 1. " INTID80 ,Interrupt ID80 Priority/Priority Byte Offset 80 " group.long 0x454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" hexmask.long.byte 0x00 24.--31. 1. " INTID87 ,Interrupt ID87 Priority/Priority Byte Offset 87 " hexmask.long.byte 0x00 16.--23. 1. " INTID86 ,Interrupt ID86 Priority/Priority Byte Offset 86 " hexmask.long.byte 0x00 8.--15. 1. " INTID85 ,Interrupt ID85 Priority/Priority Byte Offset 85 " hexmask.long.byte 0x00 0.--7. 1. " INTID84 ,Interrupt ID84 Priority/Priority Byte Offset 84 " group.long 0x458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" hexmask.long.byte 0x00 24.--31. 1. " INTID91 ,Interrupt ID91 Priority/Priority Byte Offset 91 " hexmask.long.byte 0x00 16.--23. 1. " INTID90 ,Interrupt ID90 Priority/Priority Byte Offset 90 " hexmask.long.byte 0x00 8.--15. 1. " INTID89 ,Interrupt ID89 Priority/Priority Byte Offset 89 " hexmask.long.byte 0x00 0.--7. 1. " INTID88 ,Interrupt ID88 Priority/Priority Byte Offset 88 " group.long 0x45C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" hexmask.long.byte 0x00 24.--31. 1. " INTID95 ,Interrupt ID95 Priority/Priority Byte Offset 95 " hexmask.long.byte 0x00 16.--23. 1. " INTID94 ,Interrupt ID94 Priority/Priority Byte Offset 94 " hexmask.long.byte 0x00 8.--15. 1. " INTID93 ,Interrupt ID93 Priority/Priority Byte Offset 93 " hexmask.long.byte 0x00 0.--7. 1. " INTID92 ,Interrupt ID92 Priority/Priority Byte Offset 92 " else rgroup.long 0x440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" rgroup.long 0x444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" rgroup.long 0x448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" rgroup.long 0x44C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" rgroup.long 0x450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" rgroup.long 0x454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" rgroup.long 0x458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" rgroup.long 0x45C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x03) group.long 0x460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" hexmask.long.byte 0x00 24.--31. 1. " INTID99 ,Interrupt ID99 Priority/Priority Byte Offset 99 " hexmask.long.byte 0x00 16.--23. 1. " INTID98 ,Interrupt ID98 Priority/Priority Byte Offset 98 " hexmask.long.byte 0x00 8.--15. 1. " INTID97 ,Interrupt ID97 Priority/Priority Byte Offset 97 " hexmask.long.byte 0x00 0.--7. 1. " INTID96 ,Interrupt ID96 Priority/Priority Byte Offset 96 " group.long 0x464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" hexmask.long.byte 0x00 24.--31. 1. " INTID103 ,Interrupt ID103 Priority/Priority Byte Offset 103 " hexmask.long.byte 0x00 16.--23. 1. " INTID102 ,Interrupt ID102 Priority/Priority Byte Offset 102 " hexmask.long.byte 0x00 8.--15. 1. " INTID101 ,Interrupt ID101 Priority/Priority Byte Offset 101 " hexmask.long.byte 0x00 0.--7. 1. " INTID100 ,Interrupt ID100 Priority/Priority Byte Offset 100 " group.long 0x468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" hexmask.long.byte 0x00 24.--31. 1. " INTID107 ,Interrupt ID107 Priority/Priority Byte Offset 107 " hexmask.long.byte 0x00 16.--23. 1. " INTID106 ,Interrupt ID106 Priority/Priority Byte Offset 106 " hexmask.long.byte 0x00 8.--15. 1. " INTID105 ,Interrupt ID105 Priority/Priority Byte Offset 105 " hexmask.long.byte 0x00 0.--7. 1. " INTID104 ,Interrupt ID104 Priority/Priority Byte Offset 104 " group.long 0x46C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" hexmask.long.byte 0x00 24.--31. 1. " INTID111 ,Interrupt ID111 Priority/Priority Byte Offset 111 " hexmask.long.byte 0x00 16.--23. 1. " INTID110 ,Interrupt ID110 Priority/Priority Byte Offset 110 " hexmask.long.byte 0x00 8.--15. 1. " INTID109 ,Interrupt ID109 Priority/Priority Byte Offset 109 " hexmask.long.byte 0x00 0.--7. 1. " INTID108 ,Interrupt ID108 Priority/Priority Byte Offset 108 " group.long 0x470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" hexmask.long.byte 0x00 24.--31. 1. " INTID115 ,Interrupt ID115 Priority/Priority Byte Offset 115 " hexmask.long.byte 0x00 16.--23. 1. " INTID114 ,Interrupt ID114 Priority/Priority Byte Offset 114 " hexmask.long.byte 0x00 8.--15. 1. " INTID113 ,Interrupt ID113 Priority/Priority Byte Offset 113 " hexmask.long.byte 0x00 0.--7. 1. " INTID112 ,Interrupt ID112 Priority/Priority Byte Offset 112 " group.long 0x474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" hexmask.long.byte 0x00 24.--31. 1. " INTID119 ,Interrupt ID119 Priority/Priority Byte Offset 119 " hexmask.long.byte 0x00 16.--23. 1. " INTID118 ,Interrupt ID118 Priority/Priority Byte Offset 118 " hexmask.long.byte 0x00 8.--15. 1. " INTID117 ,Interrupt ID117 Priority/Priority Byte Offset 117 " hexmask.long.byte 0x00 0.--7. 1. " INTID116 ,Interrupt ID116 Priority/Priority Byte Offset 116 " group.long 0x478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" hexmask.long.byte 0x00 24.--31. 1. " INTID123 ,Interrupt ID123 Priority/Priority Byte Offset 123 " hexmask.long.byte 0x00 16.--23. 1. " INTID122 ,Interrupt ID122 Priority/Priority Byte Offset 122 " hexmask.long.byte 0x00 8.--15. 1. " INTID121 ,Interrupt ID121 Priority/Priority Byte Offset 121 " hexmask.long.byte 0x00 0.--7. 1. " INTID120 ,Interrupt ID120 Priority/Priority Byte Offset 120 " group.long 0x47C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" hexmask.long.byte 0x00 24.--31. 1. " INTID127 ,Interrupt ID127 Priority/Priority Byte Offset 127 " hexmask.long.byte 0x00 16.--23. 1. " INTID126 ,Interrupt ID126 Priority/Priority Byte Offset 126 " hexmask.long.byte 0x00 8.--15. 1. " INTID125 ,Interrupt ID125 Priority/Priority Byte Offset 125 " hexmask.long.byte 0x00 0.--7. 1. " INTID124 ,Interrupt ID124 Priority/Priority Byte Offset 124 " else rgroup.long 0x460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" rgroup.long 0x464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" rgroup.long 0x468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" rgroup.long 0x46C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" rgroup.long 0x470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" rgroup.long 0x474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" rgroup.long 0x478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" rgroup.long 0x47C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x04) group.long 0x480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" hexmask.long.byte 0x00 24.--31. 1. " INTID131 ,Interrupt ID131 Priority/Priority Byte Offset 131 " hexmask.long.byte 0x00 16.--23. 1. " INTID130 ,Interrupt ID130 Priority/Priority Byte Offset 130 " hexmask.long.byte 0x00 8.--15. 1. " INTID129 ,Interrupt ID129 Priority/Priority Byte Offset 129 " hexmask.long.byte 0x00 0.--7. 1. " INTID128 ,Interrupt ID128 Priority/Priority Byte Offset 128 " group.long 0x484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" hexmask.long.byte 0x00 24.--31. 1. " INTID135 ,Interrupt ID135 Priority/Priority Byte Offset 135 " hexmask.long.byte 0x00 16.--23. 1. " INTID134 ,Interrupt ID134 Priority/Priority Byte Offset 134 " hexmask.long.byte 0x00 8.--15. 1. " INTID133 ,Interrupt ID133 Priority/Priority Byte Offset 133 " hexmask.long.byte 0x00 0.--7. 1. " INTID132 ,Interrupt ID132 Priority/Priority Byte Offset 132 " group.long 0x488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" hexmask.long.byte 0x00 24.--31. 1. " INTID139 ,Interrupt ID139 Priority/Priority Byte Offset 139 " hexmask.long.byte 0x00 16.--23. 1. " INTID138 ,Interrupt ID138 Priority/Priority Byte Offset 138 " hexmask.long.byte 0x00 8.--15. 1. " INTID137 ,Interrupt ID137 Priority/Priority Byte Offset 137 " hexmask.long.byte 0x00 0.--7. 1. " INTID136 ,Interrupt ID136 Priority/Priority Byte Offset 136 " group.long 0x48C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" hexmask.long.byte 0x00 24.--31. 1. " INTID143 ,Interrupt ID143 Priority/Priority Byte Offset 143 " hexmask.long.byte 0x00 16.--23. 1. " INTID142 ,Interrupt ID142 Priority/Priority Byte Offset 142 " hexmask.long.byte 0x00 8.--15. 1. " INTID141 ,Interrupt ID141 Priority/Priority Byte Offset 141 " hexmask.long.byte 0x00 0.--7. 1. " INTID140 ,Interrupt ID140 Priority/Priority Byte Offset 140 " group.long 0x490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" hexmask.long.byte 0x00 24.--31. 1. " INTID147 ,Interrupt ID147 Priority/Priority Byte Offset 147 " hexmask.long.byte 0x00 16.--23. 1. " INTID146 ,Interrupt ID146 Priority/Priority Byte Offset 146 " hexmask.long.byte 0x00 8.--15. 1. " INTID145 ,Interrupt ID145 Priority/Priority Byte Offset 145 " hexmask.long.byte 0x00 0.--7. 1. " INTID144 ,Interrupt ID144 Priority/Priority Byte Offset 144 " group.long 0x494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" hexmask.long.byte 0x00 24.--31. 1. " INTID151 ,Interrupt ID151 Priority/Priority Byte Offset 151 " hexmask.long.byte 0x00 16.--23. 1. " INTID150 ,Interrupt ID150 Priority/Priority Byte Offset 150 " hexmask.long.byte 0x00 8.--15. 1. " INTID149 ,Interrupt ID149 Priority/Priority Byte Offset 149 " hexmask.long.byte 0x00 0.--7. 1. " INTID148 ,Interrupt ID148 Priority/Priority Byte Offset 148 " group.long 0x498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" hexmask.long.byte 0x00 24.--31. 1. " INTID155 ,Interrupt ID155 Priority/Priority Byte Offset 155 " hexmask.long.byte 0x00 16.--23. 1. " INTID154 ,Interrupt ID154 Priority/Priority Byte Offset 154 " hexmask.long.byte 0x00 8.--15. 1. " INTID153 ,Interrupt ID153 Priority/Priority Byte Offset 153 " hexmask.long.byte 0x00 0.--7. 1. " INTID152 ,Interrupt ID152 Priority/Priority Byte Offset 152 " group.long 0x49C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" hexmask.long.byte 0x00 24.--31. 1. " INTID159 ,Interrupt ID159 Priority/Priority Byte Offset 159 " hexmask.long.byte 0x00 16.--23. 1. " INTID158 ,Interrupt ID158 Priority/Priority Byte Offset 158 " hexmask.long.byte 0x00 8.--15. 1. " INTID157 ,Interrupt ID157 Priority/Priority Byte Offset 157 " hexmask.long.byte 0x00 0.--7. 1. " INTID156 ,Interrupt ID156 Priority/Priority Byte Offset 156 " else rgroup.long 0x480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" rgroup.long 0x484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" rgroup.long 0x488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" rgroup.long 0x48C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" rgroup.long 0x490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" rgroup.long 0x494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" rgroup.long 0x498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" rgroup.long 0x49C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x05) group.long 0x4A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" hexmask.long.byte 0x00 24.--31. 1. " INTID163 ,Interrupt ID163 Priority/Priority Byte Offset 163 " hexmask.long.byte 0x00 16.--23. 1. " INTID162 ,Interrupt ID162 Priority/Priority Byte Offset 162 " hexmask.long.byte 0x00 8.--15. 1. " INTID161 ,Interrupt ID161 Priority/Priority Byte Offset 161 " hexmask.long.byte 0x00 0.--7. 1. " INTID160 ,Interrupt ID160 Priority/Priority Byte Offset 160 " group.long 0x4A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" hexmask.long.byte 0x00 24.--31. 1. " INTID167 ,Interrupt ID167 Priority/Priority Byte Offset 167 " hexmask.long.byte 0x00 16.--23. 1. " INTID166 ,Interrupt ID166 Priority/Priority Byte Offset 166 " hexmask.long.byte 0x00 8.--15. 1. " INTID165 ,Interrupt ID165 Priority/Priority Byte Offset 165 " hexmask.long.byte 0x00 0.--7. 1. " INTID164 ,Interrupt ID164 Priority/Priority Byte Offset 164 " group.long 0x4A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" hexmask.long.byte 0x00 24.--31. 1. " INTID171 ,Interrupt ID171 Priority/Priority Byte Offset 171 " hexmask.long.byte 0x00 16.--23. 1. " INTID170 ,Interrupt ID170 Priority/Priority Byte Offset 170 " hexmask.long.byte 0x00 8.--15. 1. " INTID169 ,Interrupt ID169 Priority/Priority Byte Offset 169 " hexmask.long.byte 0x00 0.--7. 1. " INTID168 ,Interrupt ID168 Priority/Priority Byte Offset 168 " group.long 0x4AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" hexmask.long.byte 0x00 24.--31. 1. " INTID175 ,Interrupt ID175 Priority/Priority Byte Offset 175 " hexmask.long.byte 0x00 16.--23. 1. " INTID174 ,Interrupt ID174 Priority/Priority Byte Offset 174 " hexmask.long.byte 0x00 8.--15. 1. " INTID173 ,Interrupt ID173 Priority/Priority Byte Offset 173 " hexmask.long.byte 0x00 0.--7. 1. " INTID172 ,Interrupt ID172 Priority/Priority Byte Offset 172 " group.long 0x4B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" hexmask.long.byte 0x00 24.--31. 1. " INTID179 ,Interrupt ID179 Priority/Priority Byte Offset 179 " hexmask.long.byte 0x00 16.--23. 1. " INTID178 ,Interrupt ID178 Priority/Priority Byte Offset 178 " hexmask.long.byte 0x00 8.--15. 1. " INTID177 ,Interrupt ID177 Priority/Priority Byte Offset 177 " hexmask.long.byte 0x00 0.--7. 1. " INTID176 ,Interrupt ID176 Priority/Priority Byte Offset 176 " group.long 0x4B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" hexmask.long.byte 0x00 24.--31. 1. " INTID183 ,Interrupt ID183 Priority/Priority Byte Offset 183 " hexmask.long.byte 0x00 16.--23. 1. " INTID182 ,Interrupt ID182 Priority/Priority Byte Offset 182 " hexmask.long.byte 0x00 8.--15. 1. " INTID181 ,Interrupt ID181 Priority/Priority Byte Offset 181 " hexmask.long.byte 0x00 0.--7. 1. " INTID180 ,Interrupt ID180 Priority/Priority Byte Offset 180 " group.long 0x4B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" hexmask.long.byte 0x00 24.--31. 1. " INTID187 ,Interrupt ID187 Priority/Priority Byte Offset 187 " hexmask.long.byte 0x00 16.--23. 1. " INTID186 ,Interrupt ID186 Priority/Priority Byte Offset 186 " hexmask.long.byte 0x00 8.--15. 1. " INTID185 ,Interrupt ID185 Priority/Priority Byte Offset 185 " hexmask.long.byte 0x00 0.--7. 1. " INTID184 ,Interrupt ID184 Priority/Priority Byte Offset 184 " group.long 0x4BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" hexmask.long.byte 0x00 24.--31. 1. " INTID191 ,Interrupt ID191 Priority/Priority Byte Offset 191 " hexmask.long.byte 0x00 16.--23. 1. " INTID190 ,Interrupt ID190 Priority/Priority Byte Offset 190 " hexmask.long.byte 0x00 8.--15. 1. " INTID189 ,Interrupt ID189 Priority/Priority Byte Offset 189 " hexmask.long.byte 0x00 0.--7. 1. " INTID188 ,Interrupt ID188 Priority/Priority Byte Offset 188 " else rgroup.long 0x4A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" rgroup.long 0x4A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" rgroup.long 0x4A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" rgroup.long 0x4AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" rgroup.long 0x4B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" rgroup.long 0x4B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" rgroup.long 0x4B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" rgroup.long 0x4BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x06) group.long 0x4C0++0x03 line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" hexmask.long.byte 0x00 24.--31. 1. " INTID195 ,Interrupt ID195 Priority/Priority Byte Offset 195 " hexmask.long.byte 0x00 16.--23. 1. " INTID194 ,Interrupt ID194 Priority/Priority Byte Offset 194 " hexmask.long.byte 0x00 8.--15. 1. " INTID193 ,Interrupt ID193 Priority/Priority Byte Offset 193 " hexmask.long.byte 0x00 0.--7. 1. " INTID192 ,Interrupt ID192 Priority/Priority Byte Offset 192 " group.long 0x4C4++0x03 line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" hexmask.long.byte 0x00 24.--31. 1. " INTID199 ,Interrupt ID199 Priority/Priority Byte Offset 199 " hexmask.long.byte 0x00 16.--23. 1. " INTID198 ,Interrupt ID198 Priority/Priority Byte Offset 198 " hexmask.long.byte 0x00 8.--15. 1. " INTID197 ,Interrupt ID197 Priority/Priority Byte Offset 197 " hexmask.long.byte 0x00 0.--7. 1. " INTID196 ,Interrupt ID196 Priority/Priority Byte Offset 196 " group.long 0x4C8++0x03 line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" hexmask.long.byte 0x00 24.--31. 1. " INTID203 ,Interrupt ID203 Priority/Priority Byte Offset 203 " hexmask.long.byte 0x00 16.--23. 1. " INTID202 ,Interrupt ID202 Priority/Priority Byte Offset 202 " hexmask.long.byte 0x00 8.--15. 1. " INTID201 ,Interrupt ID201 Priority/Priority Byte Offset 201 " hexmask.long.byte 0x00 0.--7. 1. " INTID200 ,Interrupt ID200 Priority/Priority Byte Offset 200 " group.long 0x4CC++0x03 line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" hexmask.long.byte 0x00 24.--31. 1. " INTID207 ,Interrupt ID207 Priority/Priority Byte Offset 207 " hexmask.long.byte 0x00 16.--23. 1. " INTID206 ,Interrupt ID206 Priority/Priority Byte Offset 206 " hexmask.long.byte 0x00 8.--15. 1. " INTID205 ,Interrupt ID205 Priority/Priority Byte Offset 205 " hexmask.long.byte 0x00 0.--7. 1. " INTID204 ,Interrupt ID204 Priority/Priority Byte Offset 204 " group.long 0x4D0++0x03 line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" hexmask.long.byte 0x00 24.--31. 1. " INTID211 ,Interrupt ID211 Priority/Priority Byte Offset 211 " hexmask.long.byte 0x00 16.--23. 1. " INTID210 ,Interrupt ID210 Priority/Priority Byte Offset 210 " hexmask.long.byte 0x00 8.--15. 1. " INTID209 ,Interrupt ID209 Priority/Priority Byte Offset 209 " hexmask.long.byte 0x00 0.--7. 1. " INTID208 ,Interrupt ID208 Priority/Priority Byte Offset 208 " group.long 0x4D4++0x03 line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" hexmask.long.byte 0x00 24.--31. 1. " INTID215 ,Interrupt ID215 Priority/Priority Byte Offset 215 " hexmask.long.byte 0x00 16.--23. 1. " INTID214 ,Interrupt ID214 Priority/Priority Byte Offset 214 " hexmask.long.byte 0x00 8.--15. 1. " INTID213 ,Interrupt ID213 Priority/Priority Byte Offset 213 " hexmask.long.byte 0x00 0.--7. 1. " INTID212 ,Interrupt ID212 Priority/Priority Byte Offset 212 " group.long 0x4D8++0x03 line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" hexmask.long.byte 0x00 24.--31. 1. " INTID219 ,Interrupt ID219 Priority/Priority Byte Offset 219 " hexmask.long.byte 0x00 16.--23. 1. " INTID218 ,Interrupt ID218 Priority/Priority Byte Offset 218 " hexmask.long.byte 0x00 8.--15. 1. " INTID217 ,Interrupt ID217 Priority/Priority Byte Offset 217 " hexmask.long.byte 0x00 0.--7. 1. " INTID216 ,Interrupt ID216 Priority/Priority Byte Offset 216 " group.long 0x4DC++0x03 line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" hexmask.long.byte 0x00 24.--31. 1. " INTID223 ,Interrupt ID223 Priority/Priority Byte Offset 223 " hexmask.long.byte 0x00 16.--23. 1. " INTID222 ,Interrupt ID222 Priority/Priority Byte Offset 222 " hexmask.long.byte 0x00 8.--15. 1. " INTID221 ,Interrupt ID221 Priority/Priority Byte Offset 221 " hexmask.long.byte 0x00 0.--7. 1. " INTID220 ,Interrupt ID220 Priority/Priority Byte Offset 220 " else rgroup.long 0x4C0++0x03 line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" rgroup.long 0x4C4++0x03 line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" rgroup.long 0x4C8++0x03 line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" rgroup.long 0x4CC++0x03 line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" rgroup.long 0x4D0++0x03 line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" rgroup.long 0x4D4++0x03 line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" rgroup.long 0x4D8++0x03 line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" rgroup.long 0x4DC++0x03 line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x07) group.long 0x4E0++0x03 line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" hexmask.long.byte 0x00 24.--31. 1. " INTID227 ,Interrupt ID227 Priority/Priority Byte Offset 227 " hexmask.long.byte 0x00 16.--23. 1. " INTID226 ,Interrupt ID226 Priority/Priority Byte Offset 226 " hexmask.long.byte 0x00 8.--15. 1. " INTID225 ,Interrupt ID225 Priority/Priority Byte Offset 225 " hexmask.long.byte 0x00 0.--7. 1. " INTID224 ,Interrupt ID224 Priority/Priority Byte Offset 224 " group.long 0x4E4++0x03 line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" hexmask.long.byte 0x00 24.--31. 1. " INTID231 ,Interrupt ID231 Priority/Priority Byte Offset 231 " hexmask.long.byte 0x00 16.--23. 1. " INTID230 ,Interrupt ID230 Priority/Priority Byte Offset 230 " hexmask.long.byte 0x00 8.--15. 1. " INTID229 ,Interrupt ID229 Priority/Priority Byte Offset 229 " hexmask.long.byte 0x00 0.--7. 1. " INTID228 ,Interrupt ID228 Priority/Priority Byte Offset 228 " group.long 0x4E8++0x03 line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" hexmask.long.byte 0x00 24.--31. 1. " INTID235 ,Interrupt ID235 Priority/Priority Byte Offset 235 " hexmask.long.byte 0x00 16.--23. 1. " INTID234 ,Interrupt ID234 Priority/Priority Byte Offset 234 " hexmask.long.byte 0x00 8.--15. 1. " INTID233 ,Interrupt ID233 Priority/Priority Byte Offset 233 " hexmask.long.byte 0x00 0.--7. 1. " INTID232 ,Interrupt ID232 Priority/Priority Byte Offset 232 " group.long 0x4EC++0x03 line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" hexmask.long.byte 0x00 24.--31. 1. " INTID239 ,Interrupt ID239 Priority/Priority Byte Offset 239 " hexmask.long.byte 0x00 16.--23. 1. " INTID238 ,Interrupt ID238 Priority/Priority Byte Offset 238 " hexmask.long.byte 0x00 8.--15. 1. " INTID237 ,Interrupt ID237 Priority/Priority Byte Offset 237 " hexmask.long.byte 0x00 0.--7. 1. " INTID236 ,Interrupt ID236 Priority/Priority Byte Offset 236 " group.long 0x4F0++0x03 line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" hexmask.long.byte 0x00 24.--31. 1. " INTID243 ,Interrupt ID243 Priority/Priority Byte Offset 243 " hexmask.long.byte 0x00 16.--23. 1. " INTID242 ,Interrupt ID242 Priority/Priority Byte Offset 242 " hexmask.long.byte 0x00 8.--15. 1. " INTID241 ,Interrupt ID241 Priority/Priority Byte Offset 241 " hexmask.long.byte 0x00 0.--7. 1. " INTID240 ,Interrupt ID240 Priority/Priority Byte Offset 240 " group.long 0x4F4++0x03 line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" hexmask.long.byte 0x00 24.--31. 1. " INTID247 ,Interrupt ID247 Priority/Priority Byte Offset 247 " hexmask.long.byte 0x00 16.--23. 1. " INTID246 ,Interrupt ID246 Priority/Priority Byte Offset 246 " hexmask.long.byte 0x00 8.--15. 1. " INTID245 ,Interrupt ID245 Priority/Priority Byte Offset 245 " hexmask.long.byte 0x00 0.--7. 1. " INTID244 ,Interrupt ID244 Priority/Priority Byte Offset 244 " group.long 0x4F8++0x03 line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" hexmask.long.byte 0x00 24.--31. 1. " INTID251 ,Interrupt ID251 Priority/Priority Byte Offset 251 " hexmask.long.byte 0x00 16.--23. 1. " INTID250 ,Interrupt ID250 Priority/Priority Byte Offset 250 " hexmask.long.byte 0x00 8.--15. 1. " INTID249 ,Interrupt ID249 Priority/Priority Byte Offset 249 " hexmask.long.byte 0x00 0.--7. 1. " INTID248 ,Interrupt ID248 Priority/Priority Byte Offset 248 " group.long 0x4FC++0x03 line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" hexmask.long.byte 0x00 24.--31. 1. " INTID255 ,Interrupt ID255 Priority/Priority Byte Offset 255 " hexmask.long.byte 0x00 16.--23. 1. " INTID254 ,Interrupt ID254 Priority/Priority Byte Offset 254 " hexmask.long.byte 0x00 8.--15. 1. " INTID253 ,Interrupt ID253 Priority/Priority Byte Offset 253 " hexmask.long.byte 0x00 0.--7. 1. " INTID252 ,Interrupt ID252 Priority/Priority Byte Offset 252 " else rgroup.long 0x4E0++0x03 line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" rgroup.long 0x4E4++0x03 line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" rgroup.long 0x4E8++0x03 line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" rgroup.long 0x4EC++0x03 line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" rgroup.long 0x4F0++0x03 line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" rgroup.long 0x4F4++0x03 line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" rgroup.long 0x4F8++0x03 line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" rgroup.long 0x4FC++0x03 line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x08) group.long 0x500++0x03 line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" hexmask.long.byte 0x00 24.--31. 1. " INTID259 ,Interrupt ID259 Priority/Priority Byte Offset 259 " hexmask.long.byte 0x00 16.--23. 1. " INTID258 ,Interrupt ID258 Priority/Priority Byte Offset 258 " hexmask.long.byte 0x00 8.--15. 1. " INTID257 ,Interrupt ID257 Priority/Priority Byte Offset 257 " hexmask.long.byte 0x00 0.--7. 1. " INTID256 ,Interrupt ID256 Priority/Priority Byte Offset 256 " group.long 0x504++0x03 line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" hexmask.long.byte 0x00 24.--31. 1. " INTID263 ,Interrupt ID263 Priority/Priority Byte Offset 263 " hexmask.long.byte 0x00 16.--23. 1. " INTID262 ,Interrupt ID262 Priority/Priority Byte Offset 262 " hexmask.long.byte 0x00 8.--15. 1. " INTID261 ,Interrupt ID261 Priority/Priority Byte Offset 261 " hexmask.long.byte 0x00 0.--7. 1. " INTID260 ,Interrupt ID260 Priority/Priority Byte Offset 260 " group.long 0x508++0x03 line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" hexmask.long.byte 0x00 24.--31. 1. " INTID267 ,Interrupt ID267 Priority/Priority Byte Offset 267 " hexmask.long.byte 0x00 16.--23. 1. " INTID266 ,Interrupt ID266 Priority/Priority Byte Offset 266 " hexmask.long.byte 0x00 8.--15. 1. " INTID265 ,Interrupt ID265 Priority/Priority Byte Offset 265 " hexmask.long.byte 0x00 0.--7. 1. " INTID264 ,Interrupt ID264 Priority/Priority Byte Offset 264 " group.long 0x50C++0x03 line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" hexmask.long.byte 0x00 24.--31. 1. " INTID271 ,Interrupt ID271 Priority/Priority Byte Offset 271 " hexmask.long.byte 0x00 16.--23. 1. " INTID270 ,Interrupt ID270 Priority/Priority Byte Offset 270 " hexmask.long.byte 0x00 8.--15. 1. " INTID269 ,Interrupt ID269 Priority/Priority Byte Offset 269 " hexmask.long.byte 0x00 0.--7. 1. " INTID268 ,Interrupt ID268 Priority/Priority Byte Offset 268 " group.long 0x510++0x03 line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" hexmask.long.byte 0x00 24.--31. 1. " INTID275 ,Interrupt ID275 Priority/Priority Byte Offset 275 " hexmask.long.byte 0x00 16.--23. 1. " INTID274 ,Interrupt ID274 Priority/Priority Byte Offset 274 " hexmask.long.byte 0x00 8.--15. 1. " INTID273 ,Interrupt ID273 Priority/Priority Byte Offset 273 " hexmask.long.byte 0x00 0.--7. 1. " INTID272 ,Interrupt ID272 Priority/Priority Byte Offset 272 " group.long 0x514++0x03 line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" hexmask.long.byte 0x00 24.--31. 1. " INTID279 ,Interrupt ID279 Priority/Priority Byte Offset 279 " hexmask.long.byte 0x00 16.--23. 1. " INTID278 ,Interrupt ID278 Priority/Priority Byte Offset 278 " hexmask.long.byte 0x00 8.--15. 1. " INTID277 ,Interrupt ID277 Priority/Priority Byte Offset 277 " hexmask.long.byte 0x00 0.--7. 1. " INTID276 ,Interrupt ID276 Priority/Priority Byte Offset 276 " group.long 0x518++0x03 line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" hexmask.long.byte 0x00 24.--31. 1. " INTID283 ,Interrupt ID283 Priority/Priority Byte Offset 283 " hexmask.long.byte 0x00 16.--23. 1. " INTID282 ,Interrupt ID282 Priority/Priority Byte Offset 282 " hexmask.long.byte 0x00 8.--15. 1. " INTID281 ,Interrupt ID281 Priority/Priority Byte Offset 281 " hexmask.long.byte 0x00 0.--7. 1. " INTID280 ,Interrupt ID280 Priority/Priority Byte Offset 280 " group.long 0x51C++0x03 line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" hexmask.long.byte 0x00 24.--31. 1. " INTID287 ,Interrupt ID287 Priority/Priority Byte Offset 287 " hexmask.long.byte 0x00 16.--23. 1. " INTID286 ,Interrupt ID286 Priority/Priority Byte Offset 286 " hexmask.long.byte 0x00 8.--15. 1. " INTID285 ,Interrupt ID285 Priority/Priority Byte Offset 285 " hexmask.long.byte 0x00 0.--7. 1. " INTID284 ,Interrupt ID284 Priority/Priority Byte Offset 284 " else rgroup.long 0x500++0x03 line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" rgroup.long 0x504++0x03 line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" rgroup.long 0x508++0x03 line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" rgroup.long 0x50C++0x03 line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" rgroup.long 0x510++0x03 line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" rgroup.long 0x514++0x03 line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" rgroup.long 0x518++0x03 line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" rgroup.long 0x51C++0x03 line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x09) group.long 0x520++0x03 line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" hexmask.long.byte 0x00 24.--31. 1. " INTID291 ,Interrupt ID291 Priority/Priority Byte Offset 291 " hexmask.long.byte 0x00 16.--23. 1. " INTID290 ,Interrupt ID290 Priority/Priority Byte Offset 290 " hexmask.long.byte 0x00 8.--15. 1. " INTID289 ,Interrupt ID289 Priority/Priority Byte Offset 289 " hexmask.long.byte 0x00 0.--7. 1. " INTID288 ,Interrupt ID288 Priority/Priority Byte Offset 288 " group.long 0x524++0x03 line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" hexmask.long.byte 0x00 24.--31. 1. " INTID295 ,Interrupt ID295 Priority/Priority Byte Offset 295 " hexmask.long.byte 0x00 16.--23. 1. " INTID294 ,Interrupt ID294 Priority/Priority Byte Offset 294 " hexmask.long.byte 0x00 8.--15. 1. " INTID293 ,Interrupt ID293 Priority/Priority Byte Offset 293 " hexmask.long.byte 0x00 0.--7. 1. " INTID292 ,Interrupt ID292 Priority/Priority Byte Offset 292 " group.long 0x528++0x03 line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" hexmask.long.byte 0x00 24.--31. 1. " INTID299 ,Interrupt ID299 Priority/Priority Byte Offset 299 " hexmask.long.byte 0x00 16.--23. 1. " INTID298 ,Interrupt ID298 Priority/Priority Byte Offset 298 " hexmask.long.byte 0x00 8.--15. 1. " INTID297 ,Interrupt ID297 Priority/Priority Byte Offset 297 " hexmask.long.byte 0x00 0.--7. 1. " INTID296 ,Interrupt ID296 Priority/Priority Byte Offset 296 " group.long 0x52C++0x03 line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" hexmask.long.byte 0x00 24.--31. 1. " INTID303 ,Interrupt ID303 Priority/Priority Byte Offset 303 " hexmask.long.byte 0x00 16.--23. 1. " INTID302 ,Interrupt ID302 Priority/Priority Byte Offset 302 " hexmask.long.byte 0x00 8.--15. 1. " INTID301 ,Interrupt ID301 Priority/Priority Byte Offset 301 " hexmask.long.byte 0x00 0.--7. 1. " INTID300 ,Interrupt ID300 Priority/Priority Byte Offset 300 " group.long 0x530++0x03 line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" hexmask.long.byte 0x00 24.--31. 1. " INTID307 ,Interrupt ID307 Priority/Priority Byte Offset 307 " hexmask.long.byte 0x00 16.--23. 1. " INTID306 ,Interrupt ID306 Priority/Priority Byte Offset 306 " hexmask.long.byte 0x00 8.--15. 1. " INTID305 ,Interrupt ID305 Priority/Priority Byte Offset 305 " hexmask.long.byte 0x00 0.--7. 1. " INTID304 ,Interrupt ID304 Priority/Priority Byte Offset 304 " group.long 0x534++0x03 line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" hexmask.long.byte 0x00 24.--31. 1. " INTID311 ,Interrupt ID311 Priority/Priority Byte Offset 311 " hexmask.long.byte 0x00 16.--23. 1. " INTID310 ,Interrupt ID310 Priority/Priority Byte Offset 310 " hexmask.long.byte 0x00 8.--15. 1. " INTID309 ,Interrupt ID309 Priority/Priority Byte Offset 309 " hexmask.long.byte 0x00 0.--7. 1. " INTID308 ,Interrupt ID308 Priority/Priority Byte Offset 308 " group.long 0x538++0x03 line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" hexmask.long.byte 0x00 24.--31. 1. " INTID315 ,Interrupt ID315 Priority/Priority Byte Offset 315 " hexmask.long.byte 0x00 16.--23. 1. " INTID314 ,Interrupt ID314 Priority/Priority Byte Offset 314 " hexmask.long.byte 0x00 8.--15. 1. " INTID313 ,Interrupt ID313 Priority/Priority Byte Offset 313 " hexmask.long.byte 0x00 0.--7. 1. " INTID312 ,Interrupt ID312 Priority/Priority Byte Offset 312 " group.long 0x53C++0x03 line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" hexmask.long.byte 0x00 24.--31. 1. " INTID319 ,Interrupt ID319 Priority/Priority Byte Offset 319 " hexmask.long.byte 0x00 16.--23. 1. " INTID318 ,Interrupt ID318 Priority/Priority Byte Offset 318 " hexmask.long.byte 0x00 8.--15. 1. " INTID317 ,Interrupt ID317 Priority/Priority Byte Offset 317 " hexmask.long.byte 0x00 0.--7. 1. " INTID316 ,Interrupt ID316 Priority/Priority Byte Offset 316 " else rgroup.long 0x520++0x03 line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" rgroup.long 0x524++0x03 line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" rgroup.long 0x528++0x03 line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" rgroup.long 0x52C++0x03 line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" rgroup.long 0x530++0x03 line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" rgroup.long 0x534++0x03 line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" rgroup.long 0x538++0x03 line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" rgroup.long 0x53C++0x03 line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0A) group.long 0x540++0x03 line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" hexmask.long.byte 0x00 24.--31. 1. " INTID323 ,Interrupt ID323 Priority/Priority Byte Offset 323 " hexmask.long.byte 0x00 16.--23. 1. " INTID322 ,Interrupt ID322 Priority/Priority Byte Offset 322 " hexmask.long.byte 0x00 8.--15. 1. " INTID321 ,Interrupt ID321 Priority/Priority Byte Offset 321 " hexmask.long.byte 0x00 0.--7. 1. " INTID320 ,Interrupt ID320 Priority/Priority Byte Offset 320 " group.long 0x544++0x03 line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" hexmask.long.byte 0x00 24.--31. 1. " INTID327 ,Interrupt ID327 Priority/Priority Byte Offset 327 " hexmask.long.byte 0x00 16.--23. 1. " INTID326 ,Interrupt ID326 Priority/Priority Byte Offset 326 " hexmask.long.byte 0x00 8.--15. 1. " INTID325 ,Interrupt ID325 Priority/Priority Byte Offset 325 " hexmask.long.byte 0x00 0.--7. 1. " INTID324 ,Interrupt ID324 Priority/Priority Byte Offset 324 " group.long 0x548++0x03 line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" hexmask.long.byte 0x00 24.--31. 1. " INTID331 ,Interrupt ID331 Priority/Priority Byte Offset 331 " hexmask.long.byte 0x00 16.--23. 1. " INTID330 ,Interrupt ID330 Priority/Priority Byte Offset 330 " hexmask.long.byte 0x00 8.--15. 1. " INTID329 ,Interrupt ID329 Priority/Priority Byte Offset 329 " hexmask.long.byte 0x00 0.--7. 1. " INTID328 ,Interrupt ID328 Priority/Priority Byte Offset 328 " group.long 0x54C++0x03 line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" hexmask.long.byte 0x00 24.--31. 1. " INTID335 ,Interrupt ID335 Priority/Priority Byte Offset 335 " hexmask.long.byte 0x00 16.--23. 1. " INTID334 ,Interrupt ID334 Priority/Priority Byte Offset 334 " hexmask.long.byte 0x00 8.--15. 1. " INTID333 ,Interrupt ID333 Priority/Priority Byte Offset 333 " hexmask.long.byte 0x00 0.--7. 1. " INTID332 ,Interrupt ID332 Priority/Priority Byte Offset 332 " group.long 0x550++0x03 line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" hexmask.long.byte 0x00 24.--31. 1. " INTID339 ,Interrupt ID339 Priority/Priority Byte Offset 339 " hexmask.long.byte 0x00 16.--23. 1. " INTID338 ,Interrupt ID338 Priority/Priority Byte Offset 338 " hexmask.long.byte 0x00 8.--15. 1. " INTID337 ,Interrupt ID337 Priority/Priority Byte Offset 337 " hexmask.long.byte 0x00 0.--7. 1. " INTID336 ,Interrupt ID336 Priority/Priority Byte Offset 336 " group.long 0x554++0x03 line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" hexmask.long.byte 0x00 24.--31. 1. " INTID343 ,Interrupt ID343 Priority/Priority Byte Offset 343 " hexmask.long.byte 0x00 16.--23. 1. " INTID342 ,Interrupt ID342 Priority/Priority Byte Offset 342 " hexmask.long.byte 0x00 8.--15. 1. " INTID341 ,Interrupt ID341 Priority/Priority Byte Offset 341 " hexmask.long.byte 0x00 0.--7. 1. " INTID340 ,Interrupt ID340 Priority/Priority Byte Offset 340 " group.long 0x558++0x03 line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" hexmask.long.byte 0x00 24.--31. 1. " INTID347 ,Interrupt ID347 Priority/Priority Byte Offset 347 " hexmask.long.byte 0x00 16.--23. 1. " INTID346 ,Interrupt ID346 Priority/Priority Byte Offset 346 " hexmask.long.byte 0x00 8.--15. 1. " INTID345 ,Interrupt ID345 Priority/Priority Byte Offset 345 " hexmask.long.byte 0x00 0.--7. 1. " INTID344 ,Interrupt ID344 Priority/Priority Byte Offset 344 " group.long 0x55C++0x03 line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" hexmask.long.byte 0x00 24.--31. 1. " INTID351 ,Interrupt ID351 Priority/Priority Byte Offset 351 " hexmask.long.byte 0x00 16.--23. 1. " INTID350 ,Interrupt ID350 Priority/Priority Byte Offset 350 " hexmask.long.byte 0x00 8.--15. 1. " INTID349 ,Interrupt ID349 Priority/Priority Byte Offset 349 " hexmask.long.byte 0x00 0.--7. 1. " INTID348 ,Interrupt ID348 Priority/Priority Byte Offset 348 " else rgroup.long 0x540++0x03 line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" rgroup.long 0x544++0x03 line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" rgroup.long 0x548++0x03 line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" rgroup.long 0x54C++0x03 line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" rgroup.long 0x550++0x03 line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" rgroup.long 0x554++0x03 line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" rgroup.long 0x558++0x03 line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" rgroup.long 0x55C++0x03 line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0B) group.long 0x560++0x03 line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" hexmask.long.byte 0x00 24.--31. 1. " INTID355 ,Interrupt ID355 Priority/Priority Byte Offset 355 " hexmask.long.byte 0x00 16.--23. 1. " INTID354 ,Interrupt ID354 Priority/Priority Byte Offset 354 " hexmask.long.byte 0x00 8.--15. 1. " INTID353 ,Interrupt ID353 Priority/Priority Byte Offset 353 " hexmask.long.byte 0x00 0.--7. 1. " INTID352 ,Interrupt ID352 Priority/Priority Byte Offset 352 " group.long 0x564++0x03 line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" hexmask.long.byte 0x00 24.--31. 1. " INTID359 ,Interrupt ID359 Priority/Priority Byte Offset 359 " hexmask.long.byte 0x00 16.--23. 1. " INTID358 ,Interrupt ID358 Priority/Priority Byte Offset 358 " hexmask.long.byte 0x00 8.--15. 1. " INTID357 ,Interrupt ID357 Priority/Priority Byte Offset 357 " hexmask.long.byte 0x00 0.--7. 1. " INTID356 ,Interrupt ID356 Priority/Priority Byte Offset 356 " group.long 0x568++0x03 line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" hexmask.long.byte 0x00 24.--31. 1. " INTID363 ,Interrupt ID363 Priority/Priority Byte Offset 363 " hexmask.long.byte 0x00 16.--23. 1. " INTID362 ,Interrupt ID362 Priority/Priority Byte Offset 362 " hexmask.long.byte 0x00 8.--15. 1. " INTID361 ,Interrupt ID361 Priority/Priority Byte Offset 361 " hexmask.long.byte 0x00 0.--7. 1. " INTID360 ,Interrupt ID360 Priority/Priority Byte Offset 360 " group.long 0x56C++0x03 line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" hexmask.long.byte 0x00 24.--31. 1. " INTID367 ,Interrupt ID367 Priority/Priority Byte Offset 367 " hexmask.long.byte 0x00 16.--23. 1. " INTID366 ,Interrupt ID366 Priority/Priority Byte Offset 366 " hexmask.long.byte 0x00 8.--15. 1. " INTID365 ,Interrupt ID365 Priority/Priority Byte Offset 365 " hexmask.long.byte 0x00 0.--7. 1. " INTID364 ,Interrupt ID364 Priority/Priority Byte Offset 364 " group.long 0x570++0x03 line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" hexmask.long.byte 0x00 24.--31. 1. " INTID371 ,Interrupt ID371 Priority/Priority Byte Offset 371 " hexmask.long.byte 0x00 16.--23. 1. " INTID370 ,Interrupt ID370 Priority/Priority Byte Offset 370 " hexmask.long.byte 0x00 8.--15. 1. " INTID369 ,Interrupt ID369 Priority/Priority Byte Offset 369 " hexmask.long.byte 0x00 0.--7. 1. " INTID368 ,Interrupt ID368 Priority/Priority Byte Offset 368 " group.long 0x574++0x03 line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" hexmask.long.byte 0x00 24.--31. 1. " INTID375 ,Interrupt ID375 Priority/Priority Byte Offset 375 " hexmask.long.byte 0x00 16.--23. 1. " INTID374 ,Interrupt ID374 Priority/Priority Byte Offset 374 " hexmask.long.byte 0x00 8.--15. 1. " INTID373 ,Interrupt ID373 Priority/Priority Byte Offset 373 " hexmask.long.byte 0x00 0.--7. 1. " INTID372 ,Interrupt ID372 Priority/Priority Byte Offset 372 " group.long 0x578++0x03 line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" hexmask.long.byte 0x00 24.--31. 1. " INTID379 ,Interrupt ID379 Priority/Priority Byte Offset 379 " hexmask.long.byte 0x00 16.--23. 1. " INTID378 ,Interrupt ID378 Priority/Priority Byte Offset 378 " hexmask.long.byte 0x00 8.--15. 1. " INTID377 ,Interrupt ID377 Priority/Priority Byte Offset 377 " hexmask.long.byte 0x00 0.--7. 1. " INTID376 ,Interrupt ID376 Priority/Priority Byte Offset 376 " group.long 0x57C++0x03 line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" hexmask.long.byte 0x00 24.--31. 1. " INTID383 ,Interrupt ID383 Priority/Priority Byte Offset 383 " hexmask.long.byte 0x00 16.--23. 1. " INTID382 ,Interrupt ID382 Priority/Priority Byte Offset 382 " hexmask.long.byte 0x00 8.--15. 1. " INTID381 ,Interrupt ID381 Priority/Priority Byte Offset 381 " hexmask.long.byte 0x00 0.--7. 1. " INTID380 ,Interrupt ID380 Priority/Priority Byte Offset 380 " else rgroup.long 0x560++0x03 line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" rgroup.long 0x564++0x03 line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" rgroup.long 0x568++0x03 line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" rgroup.long 0x56C++0x03 line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" rgroup.long 0x570++0x03 line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" rgroup.long 0x574++0x03 line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" rgroup.long 0x578++0x03 line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" rgroup.long 0x57C++0x03 line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0C) group.long 0x580++0x03 line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" hexmask.long.byte 0x00 24.--31. 1. " INTID387 ,Interrupt ID387 Priority/Priority Byte Offset 387 " hexmask.long.byte 0x00 16.--23. 1. " INTID386 ,Interrupt ID386 Priority/Priority Byte Offset 386 " hexmask.long.byte 0x00 8.--15. 1. " INTID385 ,Interrupt ID385 Priority/Priority Byte Offset 385 " hexmask.long.byte 0x00 0.--7. 1. " INTID384 ,Interrupt ID384 Priority/Priority Byte Offset 384 " group.long 0x584++0x03 line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" hexmask.long.byte 0x00 24.--31. 1. " INTID391 ,Interrupt ID391 Priority/Priority Byte Offset 391 " hexmask.long.byte 0x00 16.--23. 1. " INTID390 ,Interrupt ID390 Priority/Priority Byte Offset 390 " hexmask.long.byte 0x00 8.--15. 1. " INTID389 ,Interrupt ID389 Priority/Priority Byte Offset 389 " hexmask.long.byte 0x00 0.--7. 1. " INTID388 ,Interrupt ID388 Priority/Priority Byte Offset 388 " group.long 0x588++0x03 line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" hexmask.long.byte 0x00 24.--31. 1. " INTID395 ,Interrupt ID395 Priority/Priority Byte Offset 395 " hexmask.long.byte 0x00 16.--23. 1. " INTID394 ,Interrupt ID394 Priority/Priority Byte Offset 394 " hexmask.long.byte 0x00 8.--15. 1. " INTID393 ,Interrupt ID393 Priority/Priority Byte Offset 393 " hexmask.long.byte 0x00 0.--7. 1. " INTID392 ,Interrupt ID392 Priority/Priority Byte Offset 392 " group.long 0x58C++0x03 line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" hexmask.long.byte 0x00 24.--31. 1. " INTID399 ,Interrupt ID399 Priority/Priority Byte Offset 399 " hexmask.long.byte 0x00 16.--23. 1. " INTID398 ,Interrupt ID398 Priority/Priority Byte Offset 398 " hexmask.long.byte 0x00 8.--15. 1. " INTID397 ,Interrupt ID397 Priority/Priority Byte Offset 397 " hexmask.long.byte 0x00 0.--7. 1. " INTID396 ,Interrupt ID396 Priority/Priority Byte Offset 396 " group.long 0x590++0x03 line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" hexmask.long.byte 0x00 24.--31. 1. " INTID403 ,Interrupt ID403 Priority/Priority Byte Offset 403 " hexmask.long.byte 0x00 16.--23. 1. " INTID402 ,Interrupt ID402 Priority/Priority Byte Offset 402 " hexmask.long.byte 0x00 8.--15. 1. " INTID401 ,Interrupt ID401 Priority/Priority Byte Offset 401 " hexmask.long.byte 0x00 0.--7. 1. " INTID400 ,Interrupt ID400 Priority/Priority Byte Offset 400 " group.long 0x594++0x03 line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" hexmask.long.byte 0x00 24.--31. 1. " INTID407 ,Interrupt ID407 Priority/Priority Byte Offset 407 " hexmask.long.byte 0x00 16.--23. 1. " INTID406 ,Interrupt ID406 Priority/Priority Byte Offset 406 " hexmask.long.byte 0x00 8.--15. 1. " INTID405 ,Interrupt ID405 Priority/Priority Byte Offset 405 " hexmask.long.byte 0x00 0.--7. 1. " INTID404 ,Interrupt ID404 Priority/Priority Byte Offset 404 " group.long 0x598++0x03 line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" hexmask.long.byte 0x00 24.--31. 1. " INTID411 ,Interrupt ID411 Priority/Priority Byte Offset 411 " hexmask.long.byte 0x00 16.--23. 1. " INTID410 ,Interrupt ID410 Priority/Priority Byte Offset 410 " hexmask.long.byte 0x00 8.--15. 1. " INTID409 ,Interrupt ID409 Priority/Priority Byte Offset 409 " hexmask.long.byte 0x00 0.--7. 1. " INTID408 ,Interrupt ID408 Priority/Priority Byte Offset 408 " group.long 0x59C++0x03 line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" hexmask.long.byte 0x00 24.--31. 1. " INTID415 ,Interrupt ID415 Priority/Priority Byte Offset 415 " hexmask.long.byte 0x00 16.--23. 1. " INTID414 ,Interrupt ID414 Priority/Priority Byte Offset 414 " hexmask.long.byte 0x00 8.--15. 1. " INTID413 ,Interrupt ID413 Priority/Priority Byte Offset 413 " hexmask.long.byte 0x00 0.--7. 1. " INTID412 ,Interrupt ID412 Priority/Priority Byte Offset 412 " else rgroup.long 0x580++0x03 line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" rgroup.long 0x584++0x03 line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" rgroup.long 0x588++0x03 line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" rgroup.long 0x58C++0x03 line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" rgroup.long 0x590++0x03 line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" rgroup.long 0x594++0x03 line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" rgroup.long 0x598++0x03 line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" rgroup.long 0x59C++0x03 line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0D) group.long 0x5A0++0x03 line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" hexmask.long.byte 0x00 24.--31. 1. " INTID419 ,Interrupt ID419 Priority/Priority Byte Offset 419 " hexmask.long.byte 0x00 16.--23. 1. " INTID418 ,Interrupt ID418 Priority/Priority Byte Offset 418 " hexmask.long.byte 0x00 8.--15. 1. " INTID417 ,Interrupt ID417 Priority/Priority Byte Offset 417 " hexmask.long.byte 0x00 0.--7. 1. " INTID416 ,Interrupt ID416 Priority/Priority Byte Offset 416 " group.long 0x5A4++0x03 line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" hexmask.long.byte 0x00 24.--31. 1. " INTID423 ,Interrupt ID423 Priority/Priority Byte Offset 423 " hexmask.long.byte 0x00 16.--23. 1. " INTID422 ,Interrupt ID422 Priority/Priority Byte Offset 422 " hexmask.long.byte 0x00 8.--15. 1. " INTID421 ,Interrupt ID421 Priority/Priority Byte Offset 421 " hexmask.long.byte 0x00 0.--7. 1. " INTID420 ,Interrupt ID420 Priority/Priority Byte Offset 420 " group.long 0x5A8++0x03 line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" hexmask.long.byte 0x00 24.--31. 1. " INTID427 ,Interrupt ID427 Priority/Priority Byte Offset 427 " hexmask.long.byte 0x00 16.--23. 1. " INTID426 ,Interrupt ID426 Priority/Priority Byte Offset 426 " hexmask.long.byte 0x00 8.--15. 1. " INTID425 ,Interrupt ID425 Priority/Priority Byte Offset 425 " hexmask.long.byte 0x00 0.--7. 1. " INTID424 ,Interrupt ID424 Priority/Priority Byte Offset 424 " group.long 0x5AC++0x03 line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" hexmask.long.byte 0x00 24.--31. 1. " INTID431 ,Interrupt ID431 Priority/Priority Byte Offset 431 " hexmask.long.byte 0x00 16.--23. 1. " INTID430 ,Interrupt ID430 Priority/Priority Byte Offset 430 " hexmask.long.byte 0x00 8.--15. 1. " INTID429 ,Interrupt ID429 Priority/Priority Byte Offset 429 " hexmask.long.byte 0x00 0.--7. 1. " INTID428 ,Interrupt ID428 Priority/Priority Byte Offset 428 " group.long 0x5B0++0x03 line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" hexmask.long.byte 0x00 24.--31. 1. " INTID435 ,Interrupt ID435 Priority/Priority Byte Offset 435 " hexmask.long.byte 0x00 16.--23. 1. " INTID434 ,Interrupt ID434 Priority/Priority Byte Offset 434 " hexmask.long.byte 0x00 8.--15. 1. " INTID433 ,Interrupt ID433 Priority/Priority Byte Offset 433 " hexmask.long.byte 0x00 0.--7. 1. " INTID432 ,Interrupt ID432 Priority/Priority Byte Offset 432 " group.long 0x5B4++0x03 line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" hexmask.long.byte 0x00 24.--31. 1. " INTID439 ,Interrupt ID439 Priority/Priority Byte Offset 439 " hexmask.long.byte 0x00 16.--23. 1. " INTID438 ,Interrupt ID438 Priority/Priority Byte Offset 438 " hexmask.long.byte 0x00 8.--15. 1. " INTID437 ,Interrupt ID437 Priority/Priority Byte Offset 437 " hexmask.long.byte 0x00 0.--7. 1. " INTID436 ,Interrupt ID436 Priority/Priority Byte Offset 436 " group.long 0x5B8++0x03 line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" hexmask.long.byte 0x00 24.--31. 1. " INTID443 ,Interrupt ID443 Priority/Priority Byte Offset 443 " hexmask.long.byte 0x00 16.--23. 1. " INTID442 ,Interrupt ID442 Priority/Priority Byte Offset 442 " hexmask.long.byte 0x00 8.--15. 1. " INTID441 ,Interrupt ID441 Priority/Priority Byte Offset 441 " hexmask.long.byte 0x00 0.--7. 1. " INTID440 ,Interrupt ID440 Priority/Priority Byte Offset 440 " group.long 0x5BC++0x03 line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" hexmask.long.byte 0x00 24.--31. 1. " INTID447 ,Interrupt ID447 Priority/Priority Byte Offset 447 " hexmask.long.byte 0x00 16.--23. 1. " INTID446 ,Interrupt ID446 Priority/Priority Byte Offset 446 " hexmask.long.byte 0x00 8.--15. 1. " INTID445 ,Interrupt ID445 Priority/Priority Byte Offset 445 " hexmask.long.byte 0x00 0.--7. 1. " INTID444 ,Interrupt ID444 Priority/Priority Byte Offset 444 " else rgroup.long 0x5A0++0x03 line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" rgroup.long 0x5A4++0x03 line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" rgroup.long 0x5A8++0x03 line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" rgroup.long 0x5AC++0x03 line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" rgroup.long 0x5B0++0x03 line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" rgroup.long 0x5B4++0x03 line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" rgroup.long 0x5B8++0x03 line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" rgroup.long 0x5BC++0x03 line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0E) group.long 0x5C0++0x03 line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" hexmask.long.byte 0x00 24.--31. 1. " INTID451 ,Interrupt ID451 Priority/Priority Byte Offset 451 " hexmask.long.byte 0x00 16.--23. 1. " INTID450 ,Interrupt ID450 Priority/Priority Byte Offset 450 " hexmask.long.byte 0x00 8.--15. 1. " INTID449 ,Interrupt ID449 Priority/Priority Byte Offset 449 " hexmask.long.byte 0x00 0.--7. 1. " INTID448 ,Interrupt ID448 Priority/Priority Byte Offset 448 " group.long 0x5C4++0x03 line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" hexmask.long.byte 0x00 24.--31. 1. " INTID455 ,Interrupt ID455 Priority/Priority Byte Offset 455 " hexmask.long.byte 0x00 16.--23. 1. " INTID454 ,Interrupt ID454 Priority/Priority Byte Offset 454 " hexmask.long.byte 0x00 8.--15. 1. " INTID453 ,Interrupt ID453 Priority/Priority Byte Offset 453 " hexmask.long.byte 0x00 0.--7. 1. " INTID452 ,Interrupt ID452 Priority/Priority Byte Offset 452 " group.long 0x5C8++0x03 line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" hexmask.long.byte 0x00 24.--31. 1. " INTID459 ,Interrupt ID459 Priority/Priority Byte Offset 459 " hexmask.long.byte 0x00 16.--23. 1. " INTID458 ,Interrupt ID458 Priority/Priority Byte Offset 458 " hexmask.long.byte 0x00 8.--15. 1. " INTID457 ,Interrupt ID457 Priority/Priority Byte Offset 457 " hexmask.long.byte 0x00 0.--7. 1. " INTID456 ,Interrupt ID456 Priority/Priority Byte Offset 456 " group.long 0x5CC++0x03 line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" hexmask.long.byte 0x00 24.--31. 1. " INTID463 ,Interrupt ID463 Priority/Priority Byte Offset 463 " hexmask.long.byte 0x00 16.--23. 1. " INTID462 ,Interrupt ID462 Priority/Priority Byte Offset 462 " hexmask.long.byte 0x00 8.--15. 1. " INTID461 ,Interrupt ID461 Priority/Priority Byte Offset 461 " hexmask.long.byte 0x00 0.--7. 1. " INTID460 ,Interrupt ID460 Priority/Priority Byte Offset 460 " group.long 0x5D0++0x03 line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" hexmask.long.byte 0x00 24.--31. 1. " INTID467 ,Interrupt ID467 Priority/Priority Byte Offset 467 " hexmask.long.byte 0x00 16.--23. 1. " INTID466 ,Interrupt ID466 Priority/Priority Byte Offset 466 " hexmask.long.byte 0x00 8.--15. 1. " INTID465 ,Interrupt ID465 Priority/Priority Byte Offset 465 " hexmask.long.byte 0x00 0.--7. 1. " INTID464 ,Interrupt ID464 Priority/Priority Byte Offset 464 " group.long 0x5D4++0x03 line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" hexmask.long.byte 0x00 24.--31. 1. " INTID471 ,Interrupt ID471 Priority/Priority Byte Offset 471 " hexmask.long.byte 0x00 16.--23. 1. " INTID470 ,Interrupt ID470 Priority/Priority Byte Offset 470 " hexmask.long.byte 0x00 8.--15. 1. " INTID469 ,Interrupt ID469 Priority/Priority Byte Offset 469 " hexmask.long.byte 0x00 0.--7. 1. " INTID468 ,Interrupt ID468 Priority/Priority Byte Offset 468 " group.long 0x5D8++0x03 line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" hexmask.long.byte 0x00 24.--31. 1. " INTID475 ,Interrupt ID475 Priority/Priority Byte Offset 475 " hexmask.long.byte 0x00 16.--23. 1. " INTID474 ,Interrupt ID474 Priority/Priority Byte Offset 474 " hexmask.long.byte 0x00 8.--15. 1. " INTID473 ,Interrupt ID473 Priority/Priority Byte Offset 473 " hexmask.long.byte 0x00 0.--7. 1. " INTID472 ,Interrupt ID472 Priority/Priority Byte Offset 472 " group.long 0x5DC++0x03 line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" hexmask.long.byte 0x00 24.--31. 1. " INTID479 ,Interrupt ID479 Priority/Priority Byte Offset 479 " hexmask.long.byte 0x00 16.--23. 1. " INTID478 ,Interrupt ID478 Priority/Priority Byte Offset 478 " hexmask.long.byte 0x00 8.--15. 1. " INTID477 ,Interrupt ID477 Priority/Priority Byte Offset 477 " hexmask.long.byte 0x00 0.--7. 1. " INTID476 ,Interrupt ID476 Priority/Priority Byte Offset 476 " else rgroup.long 0x5C0++0x03 line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" rgroup.long 0x5C4++0x03 line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" rgroup.long 0x5C8++0x03 line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" rgroup.long 0x5CC++0x03 line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" rgroup.long 0x5D0++0x03 line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" rgroup.long 0x5D4++0x03 line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" rgroup.long 0x5D8++0x03 line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" rgroup.long 0x5DC++0x03 line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0F) group.long 0x5E0++0x03 line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" hexmask.long.byte 0x00 24.--31. 1. " INTID483 ,Interrupt ID483 Priority/Priority Byte Offset 483 " hexmask.long.byte 0x00 16.--23. 1. " INTID482 ,Interrupt ID482 Priority/Priority Byte Offset 482 " hexmask.long.byte 0x00 8.--15. 1. " INTID481 ,Interrupt ID481 Priority/Priority Byte Offset 481 " hexmask.long.byte 0x00 0.--7. 1. " INTID480 ,Interrupt ID480 Priority/Priority Byte Offset 480 " group.long 0x5E4++0x03 line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" hexmask.long.byte 0x00 24.--31. 1. " INTID487 ,Interrupt ID487 Priority/Priority Byte Offset 487 " hexmask.long.byte 0x00 16.--23. 1. " INTID486 ,Interrupt ID486 Priority/Priority Byte Offset 486 " hexmask.long.byte 0x00 8.--15. 1. " INTID485 ,Interrupt ID485 Priority/Priority Byte Offset 485 " hexmask.long.byte 0x00 0.--7. 1. " INTID484 ,Interrupt ID484 Priority/Priority Byte Offset 484 " group.long 0x5E8++0x03 line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" hexmask.long.byte 0x00 24.--31. 1. " INTID491 ,Interrupt ID491 Priority/Priority Byte Offset 491 " hexmask.long.byte 0x00 16.--23. 1. " INTID490 ,Interrupt ID490 Priority/Priority Byte Offset 490 " hexmask.long.byte 0x00 8.--15. 1. " INTID489 ,Interrupt ID489 Priority/Priority Byte Offset 489 " hexmask.long.byte 0x00 0.--7. 1. " INTID488 ,Interrupt ID488 Priority/Priority Byte Offset 488 " group.long 0x5EC++0x03 line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" hexmask.long.byte 0x00 24.--31. 1. " INTID495 ,Interrupt ID495 Priority/Priority Byte Offset 495 " hexmask.long.byte 0x00 16.--23. 1. " INTID494 ,Interrupt ID494 Priority/Priority Byte Offset 494 " hexmask.long.byte 0x00 8.--15. 1. " INTID493 ,Interrupt ID493 Priority/Priority Byte Offset 493 " hexmask.long.byte 0x00 0.--7. 1. " INTID492 ,Interrupt ID492 Priority/Priority Byte Offset 492 " group.long 0x5F0++0x03 line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" hexmask.long.byte 0x00 24.--31. 1. " INTID499 ,Interrupt ID499 Priority/Priority Byte Offset 499 " hexmask.long.byte 0x00 16.--23. 1. " INTID498 ,Interrupt ID498 Priority/Priority Byte Offset 498 " hexmask.long.byte 0x00 8.--15. 1. " INTID497 ,Interrupt ID497 Priority/Priority Byte Offset 497 " hexmask.long.byte 0x00 0.--7. 1. " INTID496 ,Interrupt ID496 Priority/Priority Byte Offset 496 " group.long 0x5F4++0x03 line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" hexmask.long.byte 0x00 24.--31. 1. " INTID503 ,Interrupt ID503 Priority/Priority Byte Offset 503 " hexmask.long.byte 0x00 16.--23. 1. " INTID502 ,Interrupt ID502 Priority/Priority Byte Offset 502 " hexmask.long.byte 0x00 8.--15. 1. " INTID501 ,Interrupt ID501 Priority/Priority Byte Offset 501 " hexmask.long.byte 0x00 0.--7. 1. " INTID500 ,Interrupt ID500 Priority/Priority Byte Offset 500 " group.long 0x5F8++0x03 line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" hexmask.long.byte 0x00 24.--31. 1. " INTID507 ,Interrupt ID507 Priority/Priority Byte Offset 507 " hexmask.long.byte 0x00 16.--23. 1. " INTID506 ,Interrupt ID506 Priority/Priority Byte Offset 506 " hexmask.long.byte 0x00 8.--15. 1. " INTID505 ,Interrupt ID505 Priority/Priority Byte Offset 505 " hexmask.long.byte 0x00 0.--7. 1. " INTID504 ,Interrupt ID504 Priority/Priority Byte Offset 504 " group.long 0x5FC++0x03 line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" hexmask.long.byte 0x00 24.--31. 1. " INTID511 ,Interrupt ID511 Priority/Priority Byte Offset 511 " hexmask.long.byte 0x00 16.--23. 1. " INTID510 ,Interrupt ID510 Priority/Priority Byte Offset 510 " hexmask.long.byte 0x00 8.--15. 1. " INTID509 ,Interrupt ID509 Priority/Priority Byte Offset 509 " hexmask.long.byte 0x00 0.--7. 1. " INTID508 ,Interrupt ID508 Priority/Priority Byte Offset 508 " else rgroup.long 0x5E0++0x03 line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" rgroup.long 0x5E4++0x03 line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" rgroup.long 0x5E8++0x03 line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" rgroup.long 0x5EC++0x03 line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" rgroup.long 0x5F0++0x03 line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" rgroup.long 0x5F4++0x03 line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" rgroup.long 0x5F8++0x03 line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" rgroup.long 0x5FC++0x03 line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x10) group.long 0x600++0x03 line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" hexmask.long.byte 0x00 24.--31. 1. " INTID515 ,Interrupt ID515 Priority/Priority Byte Offset 515 " hexmask.long.byte 0x00 16.--23. 1. " INTID514 ,Interrupt ID514 Priority/Priority Byte Offset 514 " hexmask.long.byte 0x00 8.--15. 1. " INTID513 ,Interrupt ID513 Priority/Priority Byte Offset 513 " hexmask.long.byte 0x00 0.--7. 1. " INTID512 ,Interrupt ID512 Priority/Priority Byte Offset 512 " group.long 0x604++0x03 line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" hexmask.long.byte 0x00 24.--31. 1. " INTID519 ,Interrupt ID519 Priority/Priority Byte Offset 519 " hexmask.long.byte 0x00 16.--23. 1. " INTID518 ,Interrupt ID518 Priority/Priority Byte Offset 518 " hexmask.long.byte 0x00 8.--15. 1. " INTID517 ,Interrupt ID517 Priority/Priority Byte Offset 517 " hexmask.long.byte 0x00 0.--7. 1. " INTID516 ,Interrupt ID516 Priority/Priority Byte Offset 516 " group.long 0x608++0x03 line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" hexmask.long.byte 0x00 24.--31. 1. " INTID523 ,Interrupt ID523 Priority/Priority Byte Offset 523 " hexmask.long.byte 0x00 16.--23. 1. " INTID522 ,Interrupt ID522 Priority/Priority Byte Offset 522 " hexmask.long.byte 0x00 8.--15. 1. " INTID521 ,Interrupt ID521 Priority/Priority Byte Offset 521 " hexmask.long.byte 0x00 0.--7. 1. " INTID520 ,Interrupt ID520 Priority/Priority Byte Offset 520 " group.long 0x60C++0x03 line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" hexmask.long.byte 0x00 24.--31. 1. " INTID527 ,Interrupt ID527 Priority/Priority Byte Offset 527 " hexmask.long.byte 0x00 16.--23. 1. " INTID526 ,Interrupt ID526 Priority/Priority Byte Offset 526 " hexmask.long.byte 0x00 8.--15. 1. " INTID525 ,Interrupt ID525 Priority/Priority Byte Offset 525 " hexmask.long.byte 0x00 0.--7. 1. " INTID524 ,Interrupt ID524 Priority/Priority Byte Offset 524 " group.long 0x610++0x03 line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" hexmask.long.byte 0x00 24.--31. 1. " INTID531 ,Interrupt ID531 Priority/Priority Byte Offset 531 " hexmask.long.byte 0x00 16.--23. 1. " INTID530 ,Interrupt ID530 Priority/Priority Byte Offset 530 " hexmask.long.byte 0x00 8.--15. 1. " INTID529 ,Interrupt ID529 Priority/Priority Byte Offset 529 " hexmask.long.byte 0x00 0.--7. 1. " INTID528 ,Interrupt ID528 Priority/Priority Byte Offset 528 " group.long 0x614++0x03 line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" hexmask.long.byte 0x00 24.--31. 1. " INTID535 ,Interrupt ID535 Priority/Priority Byte Offset 535 " hexmask.long.byte 0x00 16.--23. 1. " INTID534 ,Interrupt ID534 Priority/Priority Byte Offset 534 " hexmask.long.byte 0x00 8.--15. 1. " INTID533 ,Interrupt ID533 Priority/Priority Byte Offset 533 " hexmask.long.byte 0x00 0.--7. 1. " INTID532 ,Interrupt ID532 Priority/Priority Byte Offset 532 " group.long 0x618++0x03 line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" hexmask.long.byte 0x00 24.--31. 1. " INTID539 ,Interrupt ID539 Priority/Priority Byte Offset 539 " hexmask.long.byte 0x00 16.--23. 1. " INTID538 ,Interrupt ID538 Priority/Priority Byte Offset 538 " hexmask.long.byte 0x00 8.--15. 1. " INTID537 ,Interrupt ID537 Priority/Priority Byte Offset 537 " hexmask.long.byte 0x00 0.--7. 1. " INTID536 ,Interrupt ID536 Priority/Priority Byte Offset 536 " group.long 0x61C++0x03 line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" hexmask.long.byte 0x00 24.--31. 1. " INTID543 ,Interrupt ID543 Priority/Priority Byte Offset 543 " hexmask.long.byte 0x00 16.--23. 1. " INTID542 ,Interrupt ID542 Priority/Priority Byte Offset 542 " hexmask.long.byte 0x00 8.--15. 1. " INTID541 ,Interrupt ID541 Priority/Priority Byte Offset 541 " hexmask.long.byte 0x00 0.--7. 1. " INTID540 ,Interrupt ID540 Priority/Priority Byte Offset 540 " else rgroup.long 0x600++0x03 line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" rgroup.long 0x604++0x03 line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" rgroup.long 0x608++0x03 line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" rgroup.long 0x60C++0x03 line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" rgroup.long 0x610++0x03 line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" rgroup.long 0x614++0x03 line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" rgroup.long 0x618++0x03 line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" rgroup.long 0x61C++0x03 line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x11) group.long 0x620++0x03 line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" hexmask.long.byte 0x00 24.--31. 1. " INTID547 ,Interrupt ID547 Priority/Priority Byte Offset 547 " hexmask.long.byte 0x00 16.--23. 1. " INTID546 ,Interrupt ID546 Priority/Priority Byte Offset 546 " hexmask.long.byte 0x00 8.--15. 1. " INTID545 ,Interrupt ID545 Priority/Priority Byte Offset 545 " hexmask.long.byte 0x00 0.--7. 1. " INTID544 ,Interrupt ID544 Priority/Priority Byte Offset 544 " group.long 0x624++0x03 line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" hexmask.long.byte 0x00 24.--31. 1. " INTID551 ,Interrupt ID551 Priority/Priority Byte Offset 551 " hexmask.long.byte 0x00 16.--23. 1. " INTID550 ,Interrupt ID550 Priority/Priority Byte Offset 550 " hexmask.long.byte 0x00 8.--15. 1. " INTID549 ,Interrupt ID549 Priority/Priority Byte Offset 549 " hexmask.long.byte 0x00 0.--7. 1. " INTID548 ,Interrupt ID548 Priority/Priority Byte Offset 548 " group.long 0x628++0x03 line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" hexmask.long.byte 0x00 24.--31. 1. " INTID555 ,Interrupt ID555 Priority/Priority Byte Offset 555 " hexmask.long.byte 0x00 16.--23. 1. " INTID554 ,Interrupt ID554 Priority/Priority Byte Offset 554 " hexmask.long.byte 0x00 8.--15. 1. " INTID553 ,Interrupt ID553 Priority/Priority Byte Offset 553 " hexmask.long.byte 0x00 0.--7. 1. " INTID552 ,Interrupt ID552 Priority/Priority Byte Offset 552 " group.long 0x62C++0x03 line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" hexmask.long.byte 0x00 24.--31. 1. " INTID559 ,Interrupt ID559 Priority/Priority Byte Offset 559 " hexmask.long.byte 0x00 16.--23. 1. " INTID558 ,Interrupt ID558 Priority/Priority Byte Offset 558 " hexmask.long.byte 0x00 8.--15. 1. " INTID557 ,Interrupt ID557 Priority/Priority Byte Offset 557 " hexmask.long.byte 0x00 0.--7. 1. " INTID556 ,Interrupt ID556 Priority/Priority Byte Offset 556 " group.long 0x630++0x03 line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" hexmask.long.byte 0x00 24.--31. 1. " INTID563 ,Interrupt ID563 Priority/Priority Byte Offset 563 " hexmask.long.byte 0x00 16.--23. 1. " INTID562 ,Interrupt ID562 Priority/Priority Byte Offset 562 " hexmask.long.byte 0x00 8.--15. 1. " INTID561 ,Interrupt ID561 Priority/Priority Byte Offset 561 " hexmask.long.byte 0x00 0.--7. 1. " INTID560 ,Interrupt ID560 Priority/Priority Byte Offset 560 " group.long 0x634++0x03 line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" hexmask.long.byte 0x00 24.--31. 1. " INTID567 ,Interrupt ID567 Priority/Priority Byte Offset 567 " hexmask.long.byte 0x00 16.--23. 1. " INTID566 ,Interrupt ID566 Priority/Priority Byte Offset 566 " hexmask.long.byte 0x00 8.--15. 1. " INTID565 ,Interrupt ID565 Priority/Priority Byte Offset 565 " hexmask.long.byte 0x00 0.--7. 1. " INTID564 ,Interrupt ID564 Priority/Priority Byte Offset 564 " group.long 0x638++0x03 line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" hexmask.long.byte 0x00 24.--31. 1. " INTID571 ,Interrupt ID571 Priority/Priority Byte Offset 571 " hexmask.long.byte 0x00 16.--23. 1. " INTID570 ,Interrupt ID570 Priority/Priority Byte Offset 570 " hexmask.long.byte 0x00 8.--15. 1. " INTID569 ,Interrupt ID569 Priority/Priority Byte Offset 569 " hexmask.long.byte 0x00 0.--7. 1. " INTID568 ,Interrupt ID568 Priority/Priority Byte Offset 568 " group.long 0x63C++0x03 line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" hexmask.long.byte 0x00 24.--31. 1. " INTID575 ,Interrupt ID575 Priority/Priority Byte Offset 575 " hexmask.long.byte 0x00 16.--23. 1. " INTID574 ,Interrupt ID574 Priority/Priority Byte Offset 574 " hexmask.long.byte 0x00 8.--15. 1. " INTID573 ,Interrupt ID573 Priority/Priority Byte Offset 573 " hexmask.long.byte 0x00 0.--7. 1. " INTID572 ,Interrupt ID572 Priority/Priority Byte Offset 572 " else rgroup.long 0x620++0x03 line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" rgroup.long 0x624++0x03 line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" rgroup.long 0x628++0x03 line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" rgroup.long 0x62C++0x03 line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" rgroup.long 0x630++0x03 line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" rgroup.long 0x634++0x03 line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" rgroup.long 0x638++0x03 line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" rgroup.long 0x63C++0x03 line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x12) group.long 0x640++0x03 line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" hexmask.long.byte 0x00 24.--31. 1. " INTID579 ,Interrupt ID579 Priority/Priority Byte Offset 579 " hexmask.long.byte 0x00 16.--23. 1. " INTID578 ,Interrupt ID578 Priority/Priority Byte Offset 578 " hexmask.long.byte 0x00 8.--15. 1. " INTID577 ,Interrupt ID577 Priority/Priority Byte Offset 577 " hexmask.long.byte 0x00 0.--7. 1. " INTID576 ,Interrupt ID576 Priority/Priority Byte Offset 576 " group.long 0x644++0x03 line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" hexmask.long.byte 0x00 24.--31. 1. " INTID583 ,Interrupt ID583 Priority/Priority Byte Offset 583 " hexmask.long.byte 0x00 16.--23. 1. " INTID582 ,Interrupt ID582 Priority/Priority Byte Offset 582 " hexmask.long.byte 0x00 8.--15. 1. " INTID581 ,Interrupt ID581 Priority/Priority Byte Offset 581 " hexmask.long.byte 0x00 0.--7. 1. " INTID580 ,Interrupt ID580 Priority/Priority Byte Offset 580 " group.long 0x648++0x03 line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" hexmask.long.byte 0x00 24.--31. 1. " INTID587 ,Interrupt ID587 Priority/Priority Byte Offset 587 " hexmask.long.byte 0x00 16.--23. 1. " INTID586 ,Interrupt ID586 Priority/Priority Byte Offset 586 " hexmask.long.byte 0x00 8.--15. 1. " INTID585 ,Interrupt ID585 Priority/Priority Byte Offset 585 " hexmask.long.byte 0x00 0.--7. 1. " INTID584 ,Interrupt ID584 Priority/Priority Byte Offset 584 " group.long 0x64C++0x03 line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" hexmask.long.byte 0x00 24.--31. 1. " INTID591 ,Interrupt ID591 Priority/Priority Byte Offset 591 " hexmask.long.byte 0x00 16.--23. 1. " INTID590 ,Interrupt ID590 Priority/Priority Byte Offset 590 " hexmask.long.byte 0x00 8.--15. 1. " INTID589 ,Interrupt ID589 Priority/Priority Byte Offset 589 " hexmask.long.byte 0x00 0.--7. 1. " INTID588 ,Interrupt ID588 Priority/Priority Byte Offset 588 " group.long 0x650++0x03 line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" hexmask.long.byte 0x00 24.--31. 1. " INTID595 ,Interrupt ID595 Priority/Priority Byte Offset 595 " hexmask.long.byte 0x00 16.--23. 1. " INTID594 ,Interrupt ID594 Priority/Priority Byte Offset 594 " hexmask.long.byte 0x00 8.--15. 1. " INTID593 ,Interrupt ID593 Priority/Priority Byte Offset 593 " hexmask.long.byte 0x00 0.--7. 1. " INTID592 ,Interrupt ID592 Priority/Priority Byte Offset 592 " group.long 0x654++0x03 line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" hexmask.long.byte 0x00 24.--31. 1. " INTID599 ,Interrupt ID599 Priority/Priority Byte Offset 599 " hexmask.long.byte 0x00 16.--23. 1. " INTID598 ,Interrupt ID598 Priority/Priority Byte Offset 598 " hexmask.long.byte 0x00 8.--15. 1. " INTID597 ,Interrupt ID597 Priority/Priority Byte Offset 597 " hexmask.long.byte 0x00 0.--7. 1. " INTID596 ,Interrupt ID596 Priority/Priority Byte Offset 596 " group.long 0x658++0x03 line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" hexmask.long.byte 0x00 24.--31. 1. " INTID603 ,Interrupt ID603 Priority/Priority Byte Offset 603 " hexmask.long.byte 0x00 16.--23. 1. " INTID602 ,Interrupt ID602 Priority/Priority Byte Offset 602 " hexmask.long.byte 0x00 8.--15. 1. " INTID601 ,Interrupt ID601 Priority/Priority Byte Offset 601 " hexmask.long.byte 0x00 0.--7. 1. " INTID600 ,Interrupt ID600 Priority/Priority Byte Offset 600 " group.long 0x65C++0x03 line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" hexmask.long.byte 0x00 24.--31. 1. " INTID607 ,Interrupt ID607 Priority/Priority Byte Offset 607 " hexmask.long.byte 0x00 16.--23. 1. " INTID606 ,Interrupt ID606 Priority/Priority Byte Offset 606 " hexmask.long.byte 0x00 8.--15. 1. " INTID605 ,Interrupt ID605 Priority/Priority Byte Offset 605 " hexmask.long.byte 0x00 0.--7. 1. " INTID604 ,Interrupt ID604 Priority/Priority Byte Offset 604 " else rgroup.long 0x640++0x03 line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" rgroup.long 0x644++0x03 line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" rgroup.long 0x648++0x03 line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" rgroup.long 0x64C++0x03 line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" rgroup.long 0x650++0x03 line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" rgroup.long 0x654++0x03 line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" rgroup.long 0x658++0x03 line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" rgroup.long 0x65C++0x03 line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x13) group.long 0x660++0x03 line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" hexmask.long.byte 0x00 24.--31. 1. " INTID611 ,Interrupt ID611 Priority/Priority Byte Offset 611 " hexmask.long.byte 0x00 16.--23. 1. " INTID610 ,Interrupt ID610 Priority/Priority Byte Offset 610 " hexmask.long.byte 0x00 8.--15. 1. " INTID609 ,Interrupt ID609 Priority/Priority Byte Offset 609 " hexmask.long.byte 0x00 0.--7. 1. " INTID608 ,Interrupt ID608 Priority/Priority Byte Offset 608 " group.long 0x664++0x03 line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" hexmask.long.byte 0x00 24.--31. 1. " INTID615 ,Interrupt ID615 Priority/Priority Byte Offset 615 " hexmask.long.byte 0x00 16.--23. 1. " INTID614 ,Interrupt ID614 Priority/Priority Byte Offset 614 " hexmask.long.byte 0x00 8.--15. 1. " INTID613 ,Interrupt ID613 Priority/Priority Byte Offset 613 " hexmask.long.byte 0x00 0.--7. 1. " INTID612 ,Interrupt ID612 Priority/Priority Byte Offset 612 " group.long 0x668++0x03 line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" hexmask.long.byte 0x00 24.--31. 1. " INTID619 ,Interrupt ID619 Priority/Priority Byte Offset 619 " hexmask.long.byte 0x00 16.--23. 1. " INTID618 ,Interrupt ID618 Priority/Priority Byte Offset 618 " hexmask.long.byte 0x00 8.--15. 1. " INTID617 ,Interrupt ID617 Priority/Priority Byte Offset 617 " hexmask.long.byte 0x00 0.--7. 1. " INTID616 ,Interrupt ID616 Priority/Priority Byte Offset 616 " group.long 0x66C++0x03 line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" hexmask.long.byte 0x00 24.--31. 1. " INTID623 ,Interrupt ID623 Priority/Priority Byte Offset 623 " hexmask.long.byte 0x00 16.--23. 1. " INTID622 ,Interrupt ID622 Priority/Priority Byte Offset 622 " hexmask.long.byte 0x00 8.--15. 1. " INTID621 ,Interrupt ID621 Priority/Priority Byte Offset 621 " hexmask.long.byte 0x00 0.--7. 1. " INTID620 ,Interrupt ID620 Priority/Priority Byte Offset 620 " group.long 0x670++0x03 line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" hexmask.long.byte 0x00 24.--31. 1. " INTID627 ,Interrupt ID627 Priority/Priority Byte Offset 627 " hexmask.long.byte 0x00 16.--23. 1. " INTID626 ,Interrupt ID626 Priority/Priority Byte Offset 626 " hexmask.long.byte 0x00 8.--15. 1. " INTID625 ,Interrupt ID625 Priority/Priority Byte Offset 625 " hexmask.long.byte 0x00 0.--7. 1. " INTID624 ,Interrupt ID624 Priority/Priority Byte Offset 624 " group.long 0x674++0x03 line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" hexmask.long.byte 0x00 24.--31. 1. " INTID631 ,Interrupt ID631 Priority/Priority Byte Offset 631 " hexmask.long.byte 0x00 16.--23. 1. " INTID630 ,Interrupt ID630 Priority/Priority Byte Offset 630 " hexmask.long.byte 0x00 8.--15. 1. " INTID629 ,Interrupt ID629 Priority/Priority Byte Offset 629 " hexmask.long.byte 0x00 0.--7. 1. " INTID628 ,Interrupt ID628 Priority/Priority Byte Offset 628 " group.long 0x678++0x03 line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" hexmask.long.byte 0x00 24.--31. 1. " INTID635 ,Interrupt ID635 Priority/Priority Byte Offset 635 " hexmask.long.byte 0x00 16.--23. 1. " INTID634 ,Interrupt ID634 Priority/Priority Byte Offset 634 " hexmask.long.byte 0x00 8.--15. 1. " INTID633 ,Interrupt ID633 Priority/Priority Byte Offset 633 " hexmask.long.byte 0x00 0.--7. 1. " INTID632 ,Interrupt ID632 Priority/Priority Byte Offset 632 " group.long 0x67C++0x03 line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" hexmask.long.byte 0x00 24.--31. 1. " INTID639 ,Interrupt ID639 Priority/Priority Byte Offset 639 " hexmask.long.byte 0x00 16.--23. 1. " INTID638 ,Interrupt ID638 Priority/Priority Byte Offset 638 " hexmask.long.byte 0x00 8.--15. 1. " INTID637 ,Interrupt ID637 Priority/Priority Byte Offset 637 " hexmask.long.byte 0x00 0.--7. 1. " INTID636 ,Interrupt ID636 Priority/Priority Byte Offset 636 " else rgroup.long 0x660++0x03 line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" rgroup.long 0x664++0x03 line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" rgroup.long 0x668++0x03 line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" rgroup.long 0x66C++0x03 line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" rgroup.long 0x670++0x03 line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" rgroup.long 0x674++0x03 line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" rgroup.long 0x678++0x03 line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" rgroup.long 0x67C++0x03 line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x14) group.long 0x680++0x03 line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" hexmask.long.byte 0x00 24.--31. 1. " INTID643 ,Interrupt ID643 Priority/Priority Byte Offset 643 " hexmask.long.byte 0x00 16.--23. 1. " INTID642 ,Interrupt ID642 Priority/Priority Byte Offset 642 " hexmask.long.byte 0x00 8.--15. 1. " INTID641 ,Interrupt ID641 Priority/Priority Byte Offset 641 " hexmask.long.byte 0x00 0.--7. 1. " INTID640 ,Interrupt ID640 Priority/Priority Byte Offset 640 " group.long 0x684++0x03 line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" hexmask.long.byte 0x00 24.--31. 1. " INTID647 ,Interrupt ID647 Priority/Priority Byte Offset 647 " hexmask.long.byte 0x00 16.--23. 1. " INTID646 ,Interrupt ID646 Priority/Priority Byte Offset 646 " hexmask.long.byte 0x00 8.--15. 1. " INTID645 ,Interrupt ID645 Priority/Priority Byte Offset 645 " hexmask.long.byte 0x00 0.--7. 1. " INTID644 ,Interrupt ID644 Priority/Priority Byte Offset 644 " group.long 0x688++0x03 line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" hexmask.long.byte 0x00 24.--31. 1. " INTID651 ,Interrupt ID651 Priority/Priority Byte Offset 651 " hexmask.long.byte 0x00 16.--23. 1. " INTID650 ,Interrupt ID650 Priority/Priority Byte Offset 650 " hexmask.long.byte 0x00 8.--15. 1. " INTID649 ,Interrupt ID649 Priority/Priority Byte Offset 649 " hexmask.long.byte 0x00 0.--7. 1. " INTID648 ,Interrupt ID648 Priority/Priority Byte Offset 648 " group.long 0x68C++0x03 line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" hexmask.long.byte 0x00 24.--31. 1. " INTID655 ,Interrupt ID655 Priority/Priority Byte Offset 655 " hexmask.long.byte 0x00 16.--23. 1. " INTID654 ,Interrupt ID654 Priority/Priority Byte Offset 654 " hexmask.long.byte 0x00 8.--15. 1. " INTID653 ,Interrupt ID653 Priority/Priority Byte Offset 653 " hexmask.long.byte 0x00 0.--7. 1. " INTID652 ,Interrupt ID652 Priority/Priority Byte Offset 652 " group.long 0x690++0x03 line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" hexmask.long.byte 0x00 24.--31. 1. " INTID659 ,Interrupt ID659 Priority/Priority Byte Offset 659 " hexmask.long.byte 0x00 16.--23. 1. " INTID658 ,Interrupt ID658 Priority/Priority Byte Offset 658 " hexmask.long.byte 0x00 8.--15. 1. " INTID657 ,Interrupt ID657 Priority/Priority Byte Offset 657 " hexmask.long.byte 0x00 0.--7. 1. " INTID656 ,Interrupt ID656 Priority/Priority Byte Offset 656 " group.long 0x694++0x03 line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" hexmask.long.byte 0x00 24.--31. 1. " INTID663 ,Interrupt ID663 Priority/Priority Byte Offset 663 " hexmask.long.byte 0x00 16.--23. 1. " INTID662 ,Interrupt ID662 Priority/Priority Byte Offset 662 " hexmask.long.byte 0x00 8.--15. 1. " INTID661 ,Interrupt ID661 Priority/Priority Byte Offset 661 " hexmask.long.byte 0x00 0.--7. 1. " INTID660 ,Interrupt ID660 Priority/Priority Byte Offset 660 " group.long 0x698++0x03 line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" hexmask.long.byte 0x00 24.--31. 1. " INTID667 ,Interrupt ID667 Priority/Priority Byte Offset 667 " hexmask.long.byte 0x00 16.--23. 1. " INTID666 ,Interrupt ID666 Priority/Priority Byte Offset 666 " hexmask.long.byte 0x00 8.--15. 1. " INTID665 ,Interrupt ID665 Priority/Priority Byte Offset 665 " hexmask.long.byte 0x00 0.--7. 1. " INTID664 ,Interrupt ID664 Priority/Priority Byte Offset 664 " group.long 0x69C++0x03 line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" hexmask.long.byte 0x00 24.--31. 1. " INTID671 ,Interrupt ID671 Priority/Priority Byte Offset 671 " hexmask.long.byte 0x00 16.--23. 1. " INTID670 ,Interrupt ID670 Priority/Priority Byte Offset 670 " hexmask.long.byte 0x00 8.--15. 1. " INTID669 ,Interrupt ID669 Priority/Priority Byte Offset 669 " hexmask.long.byte 0x00 0.--7. 1. " INTID668 ,Interrupt ID668 Priority/Priority Byte Offset 668 " else rgroup.long 0x680++0x03 line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" rgroup.long 0x684++0x03 line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" rgroup.long 0x688++0x03 line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" rgroup.long 0x68C++0x03 line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" rgroup.long 0x690++0x03 line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" rgroup.long 0x694++0x03 line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" rgroup.long 0x698++0x03 line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" rgroup.long 0x69C++0x03 line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x15) group.long 0x6A0++0x03 line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" hexmask.long.byte 0x00 24.--31. 1. " INTID675 ,Interrupt ID675 Priority/Priority Byte Offset 675 " hexmask.long.byte 0x00 16.--23. 1. " INTID674 ,Interrupt ID674 Priority/Priority Byte Offset 674 " hexmask.long.byte 0x00 8.--15. 1. " INTID673 ,Interrupt ID673 Priority/Priority Byte Offset 673 " hexmask.long.byte 0x00 0.--7. 1. " INTID672 ,Interrupt ID672 Priority/Priority Byte Offset 672 " group.long 0x6A4++0x03 line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" hexmask.long.byte 0x00 24.--31. 1. " INTID679 ,Interrupt ID679 Priority/Priority Byte Offset 679 " hexmask.long.byte 0x00 16.--23. 1. " INTID678 ,Interrupt ID678 Priority/Priority Byte Offset 678 " hexmask.long.byte 0x00 8.--15. 1. " INTID677 ,Interrupt ID677 Priority/Priority Byte Offset 677 " hexmask.long.byte 0x00 0.--7. 1. " INTID676 ,Interrupt ID676 Priority/Priority Byte Offset 676 " group.long 0x6A8++0x03 line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" hexmask.long.byte 0x00 24.--31. 1. " INTID683 ,Interrupt ID683 Priority/Priority Byte Offset 683 " hexmask.long.byte 0x00 16.--23. 1. " INTID682 ,Interrupt ID682 Priority/Priority Byte Offset 682 " hexmask.long.byte 0x00 8.--15. 1. " INTID681 ,Interrupt ID681 Priority/Priority Byte Offset 681 " hexmask.long.byte 0x00 0.--7. 1. " INTID680 ,Interrupt ID680 Priority/Priority Byte Offset 680 " group.long 0x6AC++0x03 line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" hexmask.long.byte 0x00 24.--31. 1. " INTID687 ,Interrupt ID687 Priority/Priority Byte Offset 687 " hexmask.long.byte 0x00 16.--23. 1. " INTID686 ,Interrupt ID686 Priority/Priority Byte Offset 686 " hexmask.long.byte 0x00 8.--15. 1. " INTID685 ,Interrupt ID685 Priority/Priority Byte Offset 685 " hexmask.long.byte 0x00 0.--7. 1. " INTID684 ,Interrupt ID684 Priority/Priority Byte Offset 684 " group.long 0x6B0++0x03 line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" hexmask.long.byte 0x00 24.--31. 1. " INTID691 ,Interrupt ID691 Priority/Priority Byte Offset 691 " hexmask.long.byte 0x00 16.--23. 1. " INTID690 ,Interrupt ID690 Priority/Priority Byte Offset 690 " hexmask.long.byte 0x00 8.--15. 1. " INTID689 ,Interrupt ID689 Priority/Priority Byte Offset 689 " hexmask.long.byte 0x00 0.--7. 1. " INTID688 ,Interrupt ID688 Priority/Priority Byte Offset 688 " group.long 0x6B4++0x03 line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" hexmask.long.byte 0x00 24.--31. 1. " INTID695 ,Interrupt ID695 Priority/Priority Byte Offset 695 " hexmask.long.byte 0x00 16.--23. 1. " INTID694 ,Interrupt ID694 Priority/Priority Byte Offset 694 " hexmask.long.byte 0x00 8.--15. 1. " INTID693 ,Interrupt ID693 Priority/Priority Byte Offset 693 " hexmask.long.byte 0x00 0.--7. 1. " INTID692 ,Interrupt ID692 Priority/Priority Byte Offset 692 " group.long 0x6B8++0x03 line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" hexmask.long.byte 0x00 24.--31. 1. " INTID699 ,Interrupt ID699 Priority/Priority Byte Offset 699 " hexmask.long.byte 0x00 16.--23. 1. " INTID698 ,Interrupt ID698 Priority/Priority Byte Offset 698 " hexmask.long.byte 0x00 8.--15. 1. " INTID697 ,Interrupt ID697 Priority/Priority Byte Offset 697 " hexmask.long.byte 0x00 0.--7. 1. " INTID696 ,Interrupt ID696 Priority/Priority Byte Offset 696 " group.long 0x6BC++0x03 line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" hexmask.long.byte 0x00 24.--31. 1. " INTID703 ,Interrupt ID703 Priority/Priority Byte Offset 703 " hexmask.long.byte 0x00 16.--23. 1. " INTID702 ,Interrupt ID702 Priority/Priority Byte Offset 702 " hexmask.long.byte 0x00 8.--15. 1. " INTID701 ,Interrupt ID701 Priority/Priority Byte Offset 701 " hexmask.long.byte 0x00 0.--7. 1. " INTID700 ,Interrupt ID700 Priority/Priority Byte Offset 700 " else rgroup.long 0x6A0++0x03 line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" rgroup.long 0x6A4++0x03 line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" rgroup.long 0x6A8++0x03 line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" rgroup.long 0x6AC++0x03 line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" rgroup.long 0x6B0++0x03 line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" rgroup.long 0x6B4++0x03 line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" rgroup.long 0x6B8++0x03 line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" rgroup.long 0x6BC++0x03 line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x16) group.long 0x6C0++0x03 line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" hexmask.long.byte 0x00 24.--31. 1. " INTID707 ,Interrupt ID707 Priority/Priority Byte Offset 707 " hexmask.long.byte 0x00 16.--23. 1. " INTID706 ,Interrupt ID706 Priority/Priority Byte Offset 706 " hexmask.long.byte 0x00 8.--15. 1. " INTID705 ,Interrupt ID705 Priority/Priority Byte Offset 705 " hexmask.long.byte 0x00 0.--7. 1. " INTID704 ,Interrupt ID704 Priority/Priority Byte Offset 704 " group.long 0x6C4++0x03 line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" hexmask.long.byte 0x00 24.--31. 1. " INTID711 ,Interrupt ID711 Priority/Priority Byte Offset 711 " hexmask.long.byte 0x00 16.--23. 1. " INTID710 ,Interrupt ID710 Priority/Priority Byte Offset 710 " hexmask.long.byte 0x00 8.--15. 1. " INTID709 ,Interrupt ID709 Priority/Priority Byte Offset 709 " hexmask.long.byte 0x00 0.--7. 1. " INTID708 ,Interrupt ID708 Priority/Priority Byte Offset 708 " group.long 0x6C8++0x03 line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" hexmask.long.byte 0x00 24.--31. 1. " INTID715 ,Interrupt ID715 Priority/Priority Byte Offset 715 " hexmask.long.byte 0x00 16.--23. 1. " INTID714 ,Interrupt ID714 Priority/Priority Byte Offset 714 " hexmask.long.byte 0x00 8.--15. 1. " INTID713 ,Interrupt ID713 Priority/Priority Byte Offset 713 " hexmask.long.byte 0x00 0.--7. 1. " INTID712 ,Interrupt ID712 Priority/Priority Byte Offset 712 " group.long 0x6CC++0x03 line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" hexmask.long.byte 0x00 24.--31. 1. " INTID719 ,Interrupt ID719 Priority/Priority Byte Offset 719 " hexmask.long.byte 0x00 16.--23. 1. " INTID718 ,Interrupt ID718 Priority/Priority Byte Offset 718 " hexmask.long.byte 0x00 8.--15. 1. " INTID717 ,Interrupt ID717 Priority/Priority Byte Offset 717 " hexmask.long.byte 0x00 0.--7. 1. " INTID716 ,Interrupt ID716 Priority/Priority Byte Offset 716 " group.long 0x6D0++0x03 line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" hexmask.long.byte 0x00 24.--31. 1. " INTID723 ,Interrupt ID723 Priority/Priority Byte Offset 723 " hexmask.long.byte 0x00 16.--23. 1. " INTID722 ,Interrupt ID722 Priority/Priority Byte Offset 722 " hexmask.long.byte 0x00 8.--15. 1. " INTID721 ,Interrupt ID721 Priority/Priority Byte Offset 721 " hexmask.long.byte 0x00 0.--7. 1. " INTID720 ,Interrupt ID720 Priority/Priority Byte Offset 720 " group.long 0x6D4++0x03 line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" hexmask.long.byte 0x00 24.--31. 1. " INTID727 ,Interrupt ID727 Priority/Priority Byte Offset 727 " hexmask.long.byte 0x00 16.--23. 1. " INTID726 ,Interrupt ID726 Priority/Priority Byte Offset 726 " hexmask.long.byte 0x00 8.--15. 1. " INTID725 ,Interrupt ID725 Priority/Priority Byte Offset 725 " hexmask.long.byte 0x00 0.--7. 1. " INTID724 ,Interrupt ID724 Priority/Priority Byte Offset 724 " group.long 0x6D8++0x03 line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" hexmask.long.byte 0x00 24.--31. 1. " INTID731 ,Interrupt ID731 Priority/Priority Byte Offset 731 " hexmask.long.byte 0x00 16.--23. 1. " INTID730 ,Interrupt ID730 Priority/Priority Byte Offset 730 " hexmask.long.byte 0x00 8.--15. 1. " INTID729 ,Interrupt ID729 Priority/Priority Byte Offset 729 " hexmask.long.byte 0x00 0.--7. 1. " INTID728 ,Interrupt ID728 Priority/Priority Byte Offset 728 " group.long 0x6DC++0x03 line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" hexmask.long.byte 0x00 24.--31. 1. " INTID735 ,Interrupt ID735 Priority/Priority Byte Offset 735 " hexmask.long.byte 0x00 16.--23. 1. " INTID734 ,Interrupt ID734 Priority/Priority Byte Offset 734 " hexmask.long.byte 0x00 8.--15. 1. " INTID733 ,Interrupt ID733 Priority/Priority Byte Offset 733 " hexmask.long.byte 0x00 0.--7. 1. " INTID732 ,Interrupt ID732 Priority/Priority Byte Offset 732 " else rgroup.long 0x6C0++0x03 line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" rgroup.long 0x6C4++0x03 line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" rgroup.long 0x6C8++0x03 line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" rgroup.long 0x6CC++0x03 line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" rgroup.long 0x6D0++0x03 line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" rgroup.long 0x6D4++0x03 line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" rgroup.long 0x6D8++0x03 line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" rgroup.long 0x6DC++0x03 line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x17) group.long 0x6E0++0x03 line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" hexmask.long.byte 0x00 24.--31. 1. " INTID739 ,Interrupt ID739 Priority/Priority Byte Offset 739 " hexmask.long.byte 0x00 16.--23. 1. " INTID738 ,Interrupt ID738 Priority/Priority Byte Offset 738 " hexmask.long.byte 0x00 8.--15. 1. " INTID737 ,Interrupt ID737 Priority/Priority Byte Offset 737 " hexmask.long.byte 0x00 0.--7. 1. " INTID736 ,Interrupt ID736 Priority/Priority Byte Offset 736 " group.long 0x6E4++0x03 line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" hexmask.long.byte 0x00 24.--31. 1. " INTID743 ,Interrupt ID743 Priority/Priority Byte Offset 743 " hexmask.long.byte 0x00 16.--23. 1. " INTID742 ,Interrupt ID742 Priority/Priority Byte Offset 742 " hexmask.long.byte 0x00 8.--15. 1. " INTID741 ,Interrupt ID741 Priority/Priority Byte Offset 741 " hexmask.long.byte 0x00 0.--7. 1. " INTID740 ,Interrupt ID740 Priority/Priority Byte Offset 740 " group.long 0x6E8++0x03 line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" hexmask.long.byte 0x00 24.--31. 1. " INTID747 ,Interrupt ID747 Priority/Priority Byte Offset 747 " hexmask.long.byte 0x00 16.--23. 1. " INTID746 ,Interrupt ID746 Priority/Priority Byte Offset 746 " hexmask.long.byte 0x00 8.--15. 1. " INTID745 ,Interrupt ID745 Priority/Priority Byte Offset 745 " hexmask.long.byte 0x00 0.--7. 1. " INTID744 ,Interrupt ID744 Priority/Priority Byte Offset 744 " group.long 0x6EC++0x03 line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" hexmask.long.byte 0x00 24.--31. 1. " INTID751 ,Interrupt ID751 Priority/Priority Byte Offset 751 " hexmask.long.byte 0x00 16.--23. 1. " INTID750 ,Interrupt ID750 Priority/Priority Byte Offset 750 " hexmask.long.byte 0x00 8.--15. 1. " INTID749 ,Interrupt ID749 Priority/Priority Byte Offset 749 " hexmask.long.byte 0x00 0.--7. 1. " INTID748 ,Interrupt ID748 Priority/Priority Byte Offset 748 " group.long 0x6F0++0x03 line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" hexmask.long.byte 0x00 24.--31. 1. " INTID755 ,Interrupt ID755 Priority/Priority Byte Offset 755 " hexmask.long.byte 0x00 16.--23. 1. " INTID754 ,Interrupt ID754 Priority/Priority Byte Offset 754 " hexmask.long.byte 0x00 8.--15. 1. " INTID753 ,Interrupt ID753 Priority/Priority Byte Offset 753 " hexmask.long.byte 0x00 0.--7. 1. " INTID752 ,Interrupt ID752 Priority/Priority Byte Offset 752 " group.long 0x6F4++0x03 line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" hexmask.long.byte 0x00 24.--31. 1. " INTID759 ,Interrupt ID759 Priority/Priority Byte Offset 759 " hexmask.long.byte 0x00 16.--23. 1. " INTID758 ,Interrupt ID758 Priority/Priority Byte Offset 758 " hexmask.long.byte 0x00 8.--15. 1. " INTID757 ,Interrupt ID757 Priority/Priority Byte Offset 757 " hexmask.long.byte 0x00 0.--7. 1. " INTID756 ,Interrupt ID756 Priority/Priority Byte Offset 756 " group.long 0x6F8++0x03 line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" hexmask.long.byte 0x00 24.--31. 1. " INTID763 ,Interrupt ID763 Priority/Priority Byte Offset 763 " hexmask.long.byte 0x00 16.--23. 1. " INTID762 ,Interrupt ID762 Priority/Priority Byte Offset 762 " hexmask.long.byte 0x00 8.--15. 1. " INTID761 ,Interrupt ID761 Priority/Priority Byte Offset 761 " hexmask.long.byte 0x00 0.--7. 1. " INTID760 ,Interrupt ID760 Priority/Priority Byte Offset 760 " group.long 0x6FC++0x03 line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" hexmask.long.byte 0x00 24.--31. 1. " INTID767 ,Interrupt ID767 Priority/Priority Byte Offset 767 " hexmask.long.byte 0x00 16.--23. 1. " INTID766 ,Interrupt ID766 Priority/Priority Byte Offset 766 " hexmask.long.byte 0x00 8.--15. 1. " INTID765 ,Interrupt ID765 Priority/Priority Byte Offset 765 " hexmask.long.byte 0x00 0.--7. 1. " INTID764 ,Interrupt ID764 Priority/Priority Byte Offset 764 " else rgroup.long 0x6E0++0x03 line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" rgroup.long 0x6E4++0x03 line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" rgroup.long 0x6E8++0x03 line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" rgroup.long 0x6EC++0x03 line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" rgroup.long 0x6F0++0x03 line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" rgroup.long 0x6F4++0x03 line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" rgroup.long 0x6F8++0x03 line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" rgroup.long 0x6FC++0x03 line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x18) group.long 0x700++0x03 line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" hexmask.long.byte 0x00 24.--31. 1. " INTID771 ,Interrupt ID771 Priority/Priority Byte Offset 771 " hexmask.long.byte 0x00 16.--23. 1. " INTID770 ,Interrupt ID770 Priority/Priority Byte Offset 770 " hexmask.long.byte 0x00 8.--15. 1. " INTID769 ,Interrupt ID769 Priority/Priority Byte Offset 769 " hexmask.long.byte 0x00 0.--7. 1. " INTID768 ,Interrupt ID768 Priority/Priority Byte Offset 768 " group.long 0x704++0x03 line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" hexmask.long.byte 0x00 24.--31. 1. " INTID775 ,Interrupt ID775 Priority/Priority Byte Offset 775 " hexmask.long.byte 0x00 16.--23. 1. " INTID774 ,Interrupt ID774 Priority/Priority Byte Offset 774 " hexmask.long.byte 0x00 8.--15. 1. " INTID773 ,Interrupt ID773 Priority/Priority Byte Offset 773 " hexmask.long.byte 0x00 0.--7. 1. " INTID772 ,Interrupt ID772 Priority/Priority Byte Offset 772 " group.long 0x708++0x03 line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" hexmask.long.byte 0x00 24.--31. 1. " INTID779 ,Interrupt ID779 Priority/Priority Byte Offset 779 " hexmask.long.byte 0x00 16.--23. 1. " INTID778 ,Interrupt ID778 Priority/Priority Byte Offset 778 " hexmask.long.byte 0x00 8.--15. 1. " INTID777 ,Interrupt ID777 Priority/Priority Byte Offset 777 " hexmask.long.byte 0x00 0.--7. 1. " INTID776 ,Interrupt ID776 Priority/Priority Byte Offset 776 " group.long 0x70C++0x03 line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" hexmask.long.byte 0x00 24.--31. 1. " INTID783 ,Interrupt ID783 Priority/Priority Byte Offset 783 " hexmask.long.byte 0x00 16.--23. 1. " INTID782 ,Interrupt ID782 Priority/Priority Byte Offset 782 " hexmask.long.byte 0x00 8.--15. 1. " INTID781 ,Interrupt ID781 Priority/Priority Byte Offset 781 " hexmask.long.byte 0x00 0.--7. 1. " INTID780 ,Interrupt ID780 Priority/Priority Byte Offset 780 " group.long 0x710++0x03 line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" hexmask.long.byte 0x00 24.--31. 1. " INTID787 ,Interrupt ID787 Priority/Priority Byte Offset 787 " hexmask.long.byte 0x00 16.--23. 1. " INTID786 ,Interrupt ID786 Priority/Priority Byte Offset 786 " hexmask.long.byte 0x00 8.--15. 1. " INTID785 ,Interrupt ID785 Priority/Priority Byte Offset 785 " hexmask.long.byte 0x00 0.--7. 1. " INTID784 ,Interrupt ID784 Priority/Priority Byte Offset 784 " group.long 0x714++0x03 line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" hexmask.long.byte 0x00 24.--31. 1. " INTID791 ,Interrupt ID791 Priority/Priority Byte Offset 791 " hexmask.long.byte 0x00 16.--23. 1. " INTID790 ,Interrupt ID790 Priority/Priority Byte Offset 790 " hexmask.long.byte 0x00 8.--15. 1. " INTID789 ,Interrupt ID789 Priority/Priority Byte Offset 789 " hexmask.long.byte 0x00 0.--7. 1. " INTID788 ,Interrupt ID788 Priority/Priority Byte Offset 788 " group.long 0x718++0x03 line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" hexmask.long.byte 0x00 24.--31. 1. " INTID795 ,Interrupt ID795 Priority/Priority Byte Offset 795 " hexmask.long.byte 0x00 16.--23. 1. " INTID794 ,Interrupt ID794 Priority/Priority Byte Offset 794 " hexmask.long.byte 0x00 8.--15. 1. " INTID793 ,Interrupt ID793 Priority/Priority Byte Offset 793 " hexmask.long.byte 0x00 0.--7. 1. " INTID792 ,Interrupt ID792 Priority/Priority Byte Offset 792 " group.long 0x71C++0x03 line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" hexmask.long.byte 0x00 24.--31. 1. " INTID799 ,Interrupt ID799 Priority/Priority Byte Offset 799 " hexmask.long.byte 0x00 16.--23. 1. " INTID798 ,Interrupt ID798 Priority/Priority Byte Offset 798 " hexmask.long.byte 0x00 8.--15. 1. " INTID797 ,Interrupt ID797 Priority/Priority Byte Offset 797 " hexmask.long.byte 0x00 0.--7. 1. " INTID796 ,Interrupt ID796 Priority/Priority Byte Offset 796 " else rgroup.long 0x700++0x03 line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" rgroup.long 0x704++0x03 line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" rgroup.long 0x708++0x03 line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" rgroup.long 0x70C++0x03 line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" rgroup.long 0x710++0x03 line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" rgroup.long 0x714++0x03 line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" rgroup.long 0x718++0x03 line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" rgroup.long 0x71C++0x03 line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x19) group.long 0x720++0x03 line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" hexmask.long.byte 0x00 24.--31. 1. " INTID803 ,Interrupt ID803 Priority/Priority Byte Offset 803 " hexmask.long.byte 0x00 16.--23. 1. " INTID802 ,Interrupt ID802 Priority/Priority Byte Offset 802 " hexmask.long.byte 0x00 8.--15. 1. " INTID801 ,Interrupt ID801 Priority/Priority Byte Offset 801 " hexmask.long.byte 0x00 0.--7. 1. " INTID800 ,Interrupt ID800 Priority/Priority Byte Offset 800 " group.long 0x724++0x03 line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" hexmask.long.byte 0x00 24.--31. 1. " INTID807 ,Interrupt ID807 Priority/Priority Byte Offset 807 " hexmask.long.byte 0x00 16.--23. 1. " INTID806 ,Interrupt ID806 Priority/Priority Byte Offset 806 " hexmask.long.byte 0x00 8.--15. 1. " INTID805 ,Interrupt ID805 Priority/Priority Byte Offset 805 " hexmask.long.byte 0x00 0.--7. 1. " INTID804 ,Interrupt ID804 Priority/Priority Byte Offset 804 " group.long 0x728++0x03 line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" hexmask.long.byte 0x00 24.--31. 1. " INTID811 ,Interrupt ID811 Priority/Priority Byte Offset 811 " hexmask.long.byte 0x00 16.--23. 1. " INTID810 ,Interrupt ID810 Priority/Priority Byte Offset 810 " hexmask.long.byte 0x00 8.--15. 1. " INTID809 ,Interrupt ID809 Priority/Priority Byte Offset 809 " hexmask.long.byte 0x00 0.--7. 1. " INTID808 ,Interrupt ID808 Priority/Priority Byte Offset 808 " group.long 0x72C++0x03 line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" hexmask.long.byte 0x00 24.--31. 1. " INTID815 ,Interrupt ID815 Priority/Priority Byte Offset 815 " hexmask.long.byte 0x00 16.--23. 1. " INTID814 ,Interrupt ID814 Priority/Priority Byte Offset 814 " hexmask.long.byte 0x00 8.--15. 1. " INTID813 ,Interrupt ID813 Priority/Priority Byte Offset 813 " hexmask.long.byte 0x00 0.--7. 1. " INTID812 ,Interrupt ID812 Priority/Priority Byte Offset 812 " group.long 0x730++0x03 line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" hexmask.long.byte 0x00 24.--31. 1. " INTID819 ,Interrupt ID819 Priority/Priority Byte Offset 819 " hexmask.long.byte 0x00 16.--23. 1. " INTID818 ,Interrupt ID818 Priority/Priority Byte Offset 818 " hexmask.long.byte 0x00 8.--15. 1. " INTID817 ,Interrupt ID817 Priority/Priority Byte Offset 817 " hexmask.long.byte 0x00 0.--7. 1. " INTID816 ,Interrupt ID816 Priority/Priority Byte Offset 816 " group.long 0x734++0x03 line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" hexmask.long.byte 0x00 24.--31. 1. " INTID823 ,Interrupt ID823 Priority/Priority Byte Offset 823 " hexmask.long.byte 0x00 16.--23. 1. " INTID822 ,Interrupt ID822 Priority/Priority Byte Offset 822 " hexmask.long.byte 0x00 8.--15. 1. " INTID821 ,Interrupt ID821 Priority/Priority Byte Offset 821 " hexmask.long.byte 0x00 0.--7. 1. " INTID820 ,Interrupt ID820 Priority/Priority Byte Offset 820 " group.long 0x738++0x03 line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" hexmask.long.byte 0x00 24.--31. 1. " INTID827 ,Interrupt ID827 Priority/Priority Byte Offset 827 " hexmask.long.byte 0x00 16.--23. 1. " INTID826 ,Interrupt ID826 Priority/Priority Byte Offset 826 " hexmask.long.byte 0x00 8.--15. 1. " INTID825 ,Interrupt ID825 Priority/Priority Byte Offset 825 " hexmask.long.byte 0x00 0.--7. 1. " INTID824 ,Interrupt ID824 Priority/Priority Byte Offset 824 " group.long 0x73C++0x03 line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" hexmask.long.byte 0x00 24.--31. 1. " INTID831 ,Interrupt ID831 Priority/Priority Byte Offset 831 " hexmask.long.byte 0x00 16.--23. 1. " INTID830 ,Interrupt ID830 Priority/Priority Byte Offset 830 " hexmask.long.byte 0x00 8.--15. 1. " INTID829 ,Interrupt ID829 Priority/Priority Byte Offset 829 " hexmask.long.byte 0x00 0.--7. 1. " INTID828 ,Interrupt ID828 Priority/Priority Byte Offset 828 " else rgroup.long 0x720++0x03 line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" rgroup.long 0x724++0x03 line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" rgroup.long 0x728++0x03 line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" rgroup.long 0x72C++0x03 line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" rgroup.long 0x730++0x03 line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" rgroup.long 0x734++0x03 line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" rgroup.long 0x738++0x03 line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" rgroup.long 0x73C++0x03 line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1A) group.long 0x740++0x03 line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" hexmask.long.byte 0x00 24.--31. 1. " INTID835 ,Interrupt ID835 Priority/Priority Byte Offset 835 " hexmask.long.byte 0x00 16.--23. 1. " INTID834 ,Interrupt ID834 Priority/Priority Byte Offset 834 " hexmask.long.byte 0x00 8.--15. 1. " INTID833 ,Interrupt ID833 Priority/Priority Byte Offset 833 " hexmask.long.byte 0x00 0.--7. 1. " INTID832 ,Interrupt ID832 Priority/Priority Byte Offset 832 " group.long 0x744++0x03 line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" hexmask.long.byte 0x00 24.--31. 1. " INTID839 ,Interrupt ID839 Priority/Priority Byte Offset 839 " hexmask.long.byte 0x00 16.--23. 1. " INTID838 ,Interrupt ID838 Priority/Priority Byte Offset 838 " hexmask.long.byte 0x00 8.--15. 1. " INTID837 ,Interrupt ID837 Priority/Priority Byte Offset 837 " hexmask.long.byte 0x00 0.--7. 1. " INTID836 ,Interrupt ID836 Priority/Priority Byte Offset 836 " group.long 0x748++0x03 line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" hexmask.long.byte 0x00 24.--31. 1. " INTID843 ,Interrupt ID843 Priority/Priority Byte Offset 843 " hexmask.long.byte 0x00 16.--23. 1. " INTID842 ,Interrupt ID842 Priority/Priority Byte Offset 842 " hexmask.long.byte 0x00 8.--15. 1. " INTID841 ,Interrupt ID841 Priority/Priority Byte Offset 841 " hexmask.long.byte 0x00 0.--7. 1. " INTID840 ,Interrupt ID840 Priority/Priority Byte Offset 840 " group.long 0x74C++0x03 line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" hexmask.long.byte 0x00 24.--31. 1. " INTID847 ,Interrupt ID847 Priority/Priority Byte Offset 847 " hexmask.long.byte 0x00 16.--23. 1. " INTID846 ,Interrupt ID846 Priority/Priority Byte Offset 846 " hexmask.long.byte 0x00 8.--15. 1. " INTID845 ,Interrupt ID845 Priority/Priority Byte Offset 845 " hexmask.long.byte 0x00 0.--7. 1. " INTID844 ,Interrupt ID844 Priority/Priority Byte Offset 844 " group.long 0x750++0x03 line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" hexmask.long.byte 0x00 24.--31. 1. " INTID851 ,Interrupt ID851 Priority/Priority Byte Offset 851 " hexmask.long.byte 0x00 16.--23. 1. " INTID850 ,Interrupt ID850 Priority/Priority Byte Offset 850 " hexmask.long.byte 0x00 8.--15. 1. " INTID849 ,Interrupt ID849 Priority/Priority Byte Offset 849 " hexmask.long.byte 0x00 0.--7. 1. " INTID848 ,Interrupt ID848 Priority/Priority Byte Offset 848 " group.long 0x754++0x03 line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" hexmask.long.byte 0x00 24.--31. 1. " INTID855 ,Interrupt ID855 Priority/Priority Byte Offset 855 " hexmask.long.byte 0x00 16.--23. 1. " INTID854 ,Interrupt ID854 Priority/Priority Byte Offset 854 " hexmask.long.byte 0x00 8.--15. 1. " INTID853 ,Interrupt ID853 Priority/Priority Byte Offset 853 " hexmask.long.byte 0x00 0.--7. 1. " INTID852 ,Interrupt ID852 Priority/Priority Byte Offset 852 " group.long 0x758++0x03 line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" hexmask.long.byte 0x00 24.--31. 1. " INTID859 ,Interrupt ID859 Priority/Priority Byte Offset 859 " hexmask.long.byte 0x00 16.--23. 1. " INTID858 ,Interrupt ID858 Priority/Priority Byte Offset 858 " hexmask.long.byte 0x00 8.--15. 1. " INTID857 ,Interrupt ID857 Priority/Priority Byte Offset 857 " hexmask.long.byte 0x00 0.--7. 1. " INTID856 ,Interrupt ID856 Priority/Priority Byte Offset 856 " group.long 0x75C++0x03 line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" hexmask.long.byte 0x00 24.--31. 1. " INTID863 ,Interrupt ID863 Priority/Priority Byte Offset 863 " hexmask.long.byte 0x00 16.--23. 1. " INTID862 ,Interrupt ID862 Priority/Priority Byte Offset 862 " hexmask.long.byte 0x00 8.--15. 1. " INTID861 ,Interrupt ID861 Priority/Priority Byte Offset 861 " hexmask.long.byte 0x00 0.--7. 1. " INTID860 ,Interrupt ID860 Priority/Priority Byte Offset 860 " else rgroup.long 0x740++0x03 line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" rgroup.long 0x744++0x03 line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" rgroup.long 0x748++0x03 line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" rgroup.long 0x74C++0x03 line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" rgroup.long 0x750++0x03 line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" rgroup.long 0x754++0x03 line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" rgroup.long 0x758++0x03 line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" rgroup.long 0x75C++0x03 line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1B) group.long 0x760++0x03 line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" hexmask.long.byte 0x00 24.--31. 1. " INTID867 ,Interrupt ID867 Priority/Priority Byte Offset 867 " hexmask.long.byte 0x00 16.--23. 1. " INTID866 ,Interrupt ID866 Priority/Priority Byte Offset 866 " hexmask.long.byte 0x00 8.--15. 1. " INTID865 ,Interrupt ID865 Priority/Priority Byte Offset 865 " hexmask.long.byte 0x00 0.--7. 1. " INTID864 ,Interrupt ID864 Priority/Priority Byte Offset 864 " group.long 0x764++0x03 line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" hexmask.long.byte 0x00 24.--31. 1. " INTID871 ,Interrupt ID871 Priority/Priority Byte Offset 871 " hexmask.long.byte 0x00 16.--23. 1. " INTID870 ,Interrupt ID870 Priority/Priority Byte Offset 870 " hexmask.long.byte 0x00 8.--15. 1. " INTID869 ,Interrupt ID869 Priority/Priority Byte Offset 869 " hexmask.long.byte 0x00 0.--7. 1. " INTID868 ,Interrupt ID868 Priority/Priority Byte Offset 868 " group.long 0x768++0x03 line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" hexmask.long.byte 0x00 24.--31. 1. " INTID875 ,Interrupt ID875 Priority/Priority Byte Offset 875 " hexmask.long.byte 0x00 16.--23. 1. " INTID874 ,Interrupt ID874 Priority/Priority Byte Offset 874 " hexmask.long.byte 0x00 8.--15. 1. " INTID873 ,Interrupt ID873 Priority/Priority Byte Offset 873 " hexmask.long.byte 0x00 0.--7. 1. " INTID872 ,Interrupt ID872 Priority/Priority Byte Offset 872 " group.long 0x76C++0x03 line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" hexmask.long.byte 0x00 24.--31. 1. " INTID879 ,Interrupt ID879 Priority/Priority Byte Offset 879 " hexmask.long.byte 0x00 16.--23. 1. " INTID878 ,Interrupt ID878 Priority/Priority Byte Offset 878 " hexmask.long.byte 0x00 8.--15. 1. " INTID877 ,Interrupt ID877 Priority/Priority Byte Offset 877 " hexmask.long.byte 0x00 0.--7. 1. " INTID876 ,Interrupt ID876 Priority/Priority Byte Offset 876 " group.long 0x770++0x03 line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" hexmask.long.byte 0x00 24.--31. 1. " INTID883 ,Interrupt ID883 Priority/Priority Byte Offset 883 " hexmask.long.byte 0x00 16.--23. 1. " INTID882 ,Interrupt ID882 Priority/Priority Byte Offset 882 " hexmask.long.byte 0x00 8.--15. 1. " INTID881 ,Interrupt ID881 Priority/Priority Byte Offset 881 " hexmask.long.byte 0x00 0.--7. 1. " INTID880 ,Interrupt ID880 Priority/Priority Byte Offset 880 " group.long 0x774++0x03 line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" hexmask.long.byte 0x00 24.--31. 1. " INTID887 ,Interrupt ID887 Priority/Priority Byte Offset 887 " hexmask.long.byte 0x00 16.--23. 1. " INTID886 ,Interrupt ID886 Priority/Priority Byte Offset 886 " hexmask.long.byte 0x00 8.--15. 1. " INTID885 ,Interrupt ID885 Priority/Priority Byte Offset 885 " hexmask.long.byte 0x00 0.--7. 1. " INTID884 ,Interrupt ID884 Priority/Priority Byte Offset 884 " group.long 0x778++0x03 line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" hexmask.long.byte 0x00 24.--31. 1. " INTID891 ,Interrupt ID891 Priority/Priority Byte Offset 891 " hexmask.long.byte 0x00 16.--23. 1. " INTID890 ,Interrupt ID890 Priority/Priority Byte Offset 890 " hexmask.long.byte 0x00 8.--15. 1. " INTID889 ,Interrupt ID889 Priority/Priority Byte Offset 889 " hexmask.long.byte 0x00 0.--7. 1. " INTID888 ,Interrupt ID888 Priority/Priority Byte Offset 888 " group.long 0x77C++0x03 line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" hexmask.long.byte 0x00 24.--31. 1. " INTID895 ,Interrupt ID895 Priority/Priority Byte Offset 895 " hexmask.long.byte 0x00 16.--23. 1. " INTID894 ,Interrupt ID894 Priority/Priority Byte Offset 894 " hexmask.long.byte 0x00 8.--15. 1. " INTID893 ,Interrupt ID893 Priority/Priority Byte Offset 893 " hexmask.long.byte 0x00 0.--7. 1. " INTID892 ,Interrupt ID892 Priority/Priority Byte Offset 892 " else rgroup.long 0x760++0x03 line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" rgroup.long 0x764++0x03 line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" rgroup.long 0x768++0x03 line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" rgroup.long 0x76C++0x03 line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" rgroup.long 0x770++0x03 line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" rgroup.long 0x774++0x03 line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" rgroup.long 0x778++0x03 line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" rgroup.long 0x77C++0x03 line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1C) group.long 0x780++0x03 line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" hexmask.long.byte 0x00 24.--31. 1. " INTID899 ,Interrupt ID899 Priority/Priority Byte Offset 899 " hexmask.long.byte 0x00 16.--23. 1. " INTID898 ,Interrupt ID898 Priority/Priority Byte Offset 898 " hexmask.long.byte 0x00 8.--15. 1. " INTID897 ,Interrupt ID897 Priority/Priority Byte Offset 897 " hexmask.long.byte 0x00 0.--7. 1. " INTID896 ,Interrupt ID896 Priority/Priority Byte Offset 896 " group.long 0x784++0x03 line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" hexmask.long.byte 0x00 24.--31. 1. " INTID903 ,Interrupt ID903 Priority/Priority Byte Offset 903 " hexmask.long.byte 0x00 16.--23. 1. " INTID902 ,Interrupt ID902 Priority/Priority Byte Offset 902 " hexmask.long.byte 0x00 8.--15. 1. " INTID901 ,Interrupt ID901 Priority/Priority Byte Offset 901 " hexmask.long.byte 0x00 0.--7. 1. " INTID900 ,Interrupt ID900 Priority/Priority Byte Offset 900 " group.long 0x788++0x03 line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" hexmask.long.byte 0x00 24.--31. 1. " INTID907 ,Interrupt ID907 Priority/Priority Byte Offset 907 " hexmask.long.byte 0x00 16.--23. 1. " INTID906 ,Interrupt ID906 Priority/Priority Byte Offset 906 " hexmask.long.byte 0x00 8.--15. 1. " INTID905 ,Interrupt ID905 Priority/Priority Byte Offset 905 " hexmask.long.byte 0x00 0.--7. 1. " INTID904 ,Interrupt ID904 Priority/Priority Byte Offset 904 " group.long 0x78C++0x03 line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" hexmask.long.byte 0x00 24.--31. 1. " INTID911 ,Interrupt ID911 Priority/Priority Byte Offset 911 " hexmask.long.byte 0x00 16.--23. 1. " INTID910 ,Interrupt ID910 Priority/Priority Byte Offset 910 " hexmask.long.byte 0x00 8.--15. 1. " INTID909 ,Interrupt ID909 Priority/Priority Byte Offset 909 " hexmask.long.byte 0x00 0.--7. 1. " INTID908 ,Interrupt ID908 Priority/Priority Byte Offset 908 " group.long 0x790++0x03 line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" hexmask.long.byte 0x00 24.--31. 1. " INTID915 ,Interrupt ID915 Priority/Priority Byte Offset 915 " hexmask.long.byte 0x00 16.--23. 1. " INTID914 ,Interrupt ID914 Priority/Priority Byte Offset 914 " hexmask.long.byte 0x00 8.--15. 1. " INTID913 ,Interrupt ID913 Priority/Priority Byte Offset 913 " hexmask.long.byte 0x00 0.--7. 1. " INTID912 ,Interrupt ID912 Priority/Priority Byte Offset 912 " group.long 0x794++0x03 line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" hexmask.long.byte 0x00 24.--31. 1. " INTID919 ,Interrupt ID919 Priority/Priority Byte Offset 919 " hexmask.long.byte 0x00 16.--23. 1. " INTID918 ,Interrupt ID918 Priority/Priority Byte Offset 918 " hexmask.long.byte 0x00 8.--15. 1. " INTID917 ,Interrupt ID917 Priority/Priority Byte Offset 917 " hexmask.long.byte 0x00 0.--7. 1. " INTID916 ,Interrupt ID916 Priority/Priority Byte Offset 916 " group.long 0x798++0x03 line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" hexmask.long.byte 0x00 24.--31. 1. " INTID923 ,Interrupt ID923 Priority/Priority Byte Offset 923 " hexmask.long.byte 0x00 16.--23. 1. " INTID922 ,Interrupt ID922 Priority/Priority Byte Offset 922 " hexmask.long.byte 0x00 8.--15. 1. " INTID921 ,Interrupt ID921 Priority/Priority Byte Offset 921 " hexmask.long.byte 0x00 0.--7. 1. " INTID920 ,Interrupt ID920 Priority/Priority Byte Offset 920 " group.long 0x79C++0x03 line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" hexmask.long.byte 0x00 24.--31. 1. " INTID927 ,Interrupt ID927 Priority/Priority Byte Offset 927 " hexmask.long.byte 0x00 16.--23. 1. " INTID926 ,Interrupt ID926 Priority/Priority Byte Offset 926 " hexmask.long.byte 0x00 8.--15. 1. " INTID925 ,Interrupt ID925 Priority/Priority Byte Offset 925 " hexmask.long.byte 0x00 0.--7. 1. " INTID924 ,Interrupt ID924 Priority/Priority Byte Offset 924 " else rgroup.long 0x780++0x03 line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" rgroup.long 0x784++0x03 line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" rgroup.long 0x788++0x03 line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" rgroup.long 0x78C++0x03 line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" rgroup.long 0x790++0x03 line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" rgroup.long 0x794++0x03 line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" rgroup.long 0x798++0x03 line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" rgroup.long 0x79C++0x03 line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1D) group.long 0x7A0++0x03 line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" hexmask.long.byte 0x00 24.--31. 1. " INTID931 ,Interrupt ID931 Priority/Priority Byte Offset 931 " hexmask.long.byte 0x00 16.--23. 1. " INTID930 ,Interrupt ID930 Priority/Priority Byte Offset 930 " hexmask.long.byte 0x00 8.--15. 1. " INTID929 ,Interrupt ID929 Priority/Priority Byte Offset 929 " hexmask.long.byte 0x00 0.--7. 1. " INTID928 ,Interrupt ID928 Priority/Priority Byte Offset 928 " group.long 0x7A4++0x03 line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" hexmask.long.byte 0x00 24.--31. 1. " INTID935 ,Interrupt ID935 Priority/Priority Byte Offset 935 " hexmask.long.byte 0x00 16.--23. 1. " INTID934 ,Interrupt ID934 Priority/Priority Byte Offset 934 " hexmask.long.byte 0x00 8.--15. 1. " INTID933 ,Interrupt ID933 Priority/Priority Byte Offset 933 " hexmask.long.byte 0x00 0.--7. 1. " INTID932 ,Interrupt ID932 Priority/Priority Byte Offset 932 " group.long 0x7A8++0x03 line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" hexmask.long.byte 0x00 24.--31. 1. " INTID939 ,Interrupt ID939 Priority/Priority Byte Offset 939 " hexmask.long.byte 0x00 16.--23. 1. " INTID938 ,Interrupt ID938 Priority/Priority Byte Offset 938 " hexmask.long.byte 0x00 8.--15. 1. " INTID937 ,Interrupt ID937 Priority/Priority Byte Offset 937 " hexmask.long.byte 0x00 0.--7. 1. " INTID936 ,Interrupt ID936 Priority/Priority Byte Offset 936 " group.long 0x7AC++0x03 line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" hexmask.long.byte 0x00 24.--31. 1. " INTID943 ,Interrupt ID943 Priority/Priority Byte Offset 943 " hexmask.long.byte 0x00 16.--23. 1. " INTID942 ,Interrupt ID942 Priority/Priority Byte Offset 942 " hexmask.long.byte 0x00 8.--15. 1. " INTID941 ,Interrupt ID941 Priority/Priority Byte Offset 941 " hexmask.long.byte 0x00 0.--7. 1. " INTID940 ,Interrupt ID940 Priority/Priority Byte Offset 940 " group.long 0x7B0++0x03 line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" hexmask.long.byte 0x00 24.--31. 1. " INTID947 ,Interrupt ID947 Priority/Priority Byte Offset 947 " hexmask.long.byte 0x00 16.--23. 1. " INTID946 ,Interrupt ID946 Priority/Priority Byte Offset 946 " hexmask.long.byte 0x00 8.--15. 1. " INTID945 ,Interrupt ID945 Priority/Priority Byte Offset 945 " hexmask.long.byte 0x00 0.--7. 1. " INTID944 ,Interrupt ID944 Priority/Priority Byte Offset 944 " group.long 0x7B4++0x03 line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" hexmask.long.byte 0x00 24.--31. 1. " INTID951 ,Interrupt ID951 Priority/Priority Byte Offset 951 " hexmask.long.byte 0x00 16.--23. 1. " INTID950 ,Interrupt ID950 Priority/Priority Byte Offset 950 " hexmask.long.byte 0x00 8.--15. 1. " INTID949 ,Interrupt ID949 Priority/Priority Byte Offset 949 " hexmask.long.byte 0x00 0.--7. 1. " INTID948 ,Interrupt ID948 Priority/Priority Byte Offset 948 " group.long 0x7B8++0x03 line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" hexmask.long.byte 0x00 24.--31. 1. " INTID955 ,Interrupt ID955 Priority/Priority Byte Offset 955 " hexmask.long.byte 0x00 16.--23. 1. " INTID954 ,Interrupt ID954 Priority/Priority Byte Offset 954 " hexmask.long.byte 0x00 8.--15. 1. " INTID953 ,Interrupt ID953 Priority/Priority Byte Offset 953 " hexmask.long.byte 0x00 0.--7. 1. " INTID952 ,Interrupt ID952 Priority/Priority Byte Offset 952 " group.long 0x7BC++0x03 line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" hexmask.long.byte 0x00 24.--31. 1. " INTID959 ,Interrupt ID959 Priority/Priority Byte Offset 959 " hexmask.long.byte 0x00 16.--23. 1. " INTID958 ,Interrupt ID958 Priority/Priority Byte Offset 958 " hexmask.long.byte 0x00 8.--15. 1. " INTID957 ,Interrupt ID957 Priority/Priority Byte Offset 957 " hexmask.long.byte 0x00 0.--7. 1. " INTID956 ,Interrupt ID956 Priority/Priority Byte Offset 956 " else rgroup.long 0x7A0++0x03 line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" rgroup.long 0x7A4++0x03 line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" rgroup.long 0x7A8++0x03 line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" rgroup.long 0x7AC++0x03 line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" rgroup.long 0x7B0++0x03 line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" rgroup.long 0x7B4++0x03 line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" rgroup.long 0x7B8++0x03 line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" rgroup.long 0x7BC++0x03 line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1E) group.long 0x7C0++0x03 line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" hexmask.long.byte 0x00 24.--31. 1. " INTID963 ,Interrupt ID963 Priority/Priority Byte Offset 963 " hexmask.long.byte 0x00 16.--23. 1. " INTID962 ,Interrupt ID962 Priority/Priority Byte Offset 962 " hexmask.long.byte 0x00 8.--15. 1. " INTID961 ,Interrupt ID961 Priority/Priority Byte Offset 961 " hexmask.long.byte 0x00 0.--7. 1. " INTID960 ,Interrupt ID960 Priority/Priority Byte Offset 960 " group.long 0x7C4++0x03 line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" hexmask.long.byte 0x00 24.--31. 1. " INTID967 ,Interrupt ID967 Priority/Priority Byte Offset 967 " hexmask.long.byte 0x00 16.--23. 1. " INTID966 ,Interrupt ID966 Priority/Priority Byte Offset 966 " hexmask.long.byte 0x00 8.--15. 1. " INTID965 ,Interrupt ID965 Priority/Priority Byte Offset 965 " hexmask.long.byte 0x00 0.--7. 1. " INTID964 ,Interrupt ID964 Priority/Priority Byte Offset 964 " group.long 0x7C8++0x03 line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" hexmask.long.byte 0x00 24.--31. 1. " INTID971 ,Interrupt ID971 Priority/Priority Byte Offset 971 " hexmask.long.byte 0x00 16.--23. 1. " INTID970 ,Interrupt ID970 Priority/Priority Byte Offset 970 " hexmask.long.byte 0x00 8.--15. 1. " INTID969 ,Interrupt ID969 Priority/Priority Byte Offset 969 " hexmask.long.byte 0x00 0.--7. 1. " INTID968 ,Interrupt ID968 Priority/Priority Byte Offset 968 " group.long 0x7CC++0x03 line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" hexmask.long.byte 0x00 24.--31. 1. " INTID975 ,Interrupt ID975 Priority/Priority Byte Offset 975 " hexmask.long.byte 0x00 16.--23. 1. " INTID974 ,Interrupt ID974 Priority/Priority Byte Offset 974 " hexmask.long.byte 0x00 8.--15. 1. " INTID973 ,Interrupt ID973 Priority/Priority Byte Offset 973 " hexmask.long.byte 0x00 0.--7. 1. " INTID972 ,Interrupt ID972 Priority/Priority Byte Offset 972 " group.long 0x7D0++0x03 line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" hexmask.long.byte 0x00 24.--31. 1. " INTID979 ,Interrupt ID979 Priority/Priority Byte Offset 979 " hexmask.long.byte 0x00 16.--23. 1. " INTID978 ,Interrupt ID978 Priority/Priority Byte Offset 978 " hexmask.long.byte 0x00 8.--15. 1. " INTID977 ,Interrupt ID977 Priority/Priority Byte Offset 977 " hexmask.long.byte 0x00 0.--7. 1. " INTID976 ,Interrupt ID976 Priority/Priority Byte Offset 976 " group.long 0x7D4++0x03 line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" hexmask.long.byte 0x00 24.--31. 1. " INTID983 ,Interrupt ID983 Priority/Priority Byte Offset 983 " hexmask.long.byte 0x00 16.--23. 1. " INTID982 ,Interrupt ID982 Priority/Priority Byte Offset 982 " hexmask.long.byte 0x00 8.--15. 1. " INTID981 ,Interrupt ID981 Priority/Priority Byte Offset 981 " hexmask.long.byte 0x00 0.--7. 1. " INTID980 ,Interrupt ID980 Priority/Priority Byte Offset 980 " group.long 0x7D8++0x03 line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" hexmask.long.byte 0x00 24.--31. 1. " INTID987 ,Interrupt ID987 Priority/Priority Byte Offset 987 " hexmask.long.byte 0x00 16.--23. 1. " INTID986 ,Interrupt ID986 Priority/Priority Byte Offset 986 " hexmask.long.byte 0x00 8.--15. 1. " INTID985 ,Interrupt ID985 Priority/Priority Byte Offset 985 " hexmask.long.byte 0x00 0.--7. 1. " INTID984 ,Interrupt ID984 Priority/Priority Byte Offset 984 " group.long 0x7DC++0x03 line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" hexmask.long.byte 0x00 24.--31. 1. " INTID991 ,Interrupt ID991 Priority/Priority Byte Offset 991 " hexmask.long.byte 0x00 16.--23. 1. " INTID990 ,Interrupt ID990 Priority/Priority Byte Offset 990 " hexmask.long.byte 0x00 8.--15. 1. " INTID989 ,Interrupt ID989 Priority/Priority Byte Offset 989 " hexmask.long.byte 0x00 0.--7. 1. " INTID988 ,Interrupt ID988 Priority/Priority Byte Offset 988 " else rgroup.long 0x7C0++0x03 line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" rgroup.long 0x7C4++0x03 line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" rgroup.long 0x7C8++0x03 line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" rgroup.long 0x7CC++0x03 line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" rgroup.long 0x7D0++0x03 line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" rgroup.long 0x7D4++0x03 line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" rgroup.long 0x7D8++0x03 line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" rgroup.long 0x7DC++0x03 line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1F) group.long 0x7E0++0x03 line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248" hexmask.long.byte 0x00 24.--31. 1. " INTID995 ,Interrupt ID995 Priority/Priority Byte Offset 995 " hexmask.long.byte 0x00 16.--23. 1. " INTID994 ,Interrupt ID994 Priority/Priority Byte Offset 994 " hexmask.long.byte 0x00 8.--15. 1. " INTID993 ,Interrupt ID993 Priority/Priority Byte Offset 993 " hexmask.long.byte 0x00 0.--7. 1. " INTID992 ,Interrupt ID992 Priority/Priority Byte Offset 992 " group.long 0x7E4++0x03 line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249" hexmask.long.byte 0x00 24.--31. 1. " INTID999 ,Interrupt ID999 Priority/Priority Byte Offset 999 " hexmask.long.byte 0x00 16.--23. 1. " INTID998 ,Interrupt ID998 Priority/Priority Byte Offset 998 " hexmask.long.byte 0x00 8.--15. 1. " INTID997 ,Interrupt ID997 Priority/Priority Byte Offset 997 " hexmask.long.byte 0x00 0.--7. 1. " INTID996 ,Interrupt ID996 Priority/Priority Byte Offset 996 " group.long 0x7E8++0x03 line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250" hexmask.long.byte 0x00 24.--31. 1. " INTID1003 ,Interrupt ID1003 Priority/Priority Byte Offset 1003" hexmask.long.byte 0x00 16.--23. 1. " INTID1002 ,Interrupt ID1002 Priority/Priority Byte Offset 1002" hexmask.long.byte 0x00 8.--15. 1. " INTID1001 ,Interrupt ID1001 Priority/Priority Byte Offset 1001" hexmask.long.byte 0x00 0.--7. 1. " INTID1000 ,Interrupt ID1000 Priority/Priority Byte Offset 1000" group.long 0x7EC++0x03 line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251" hexmask.long.byte 0x00 24.--31. 1. " INTID1007 ,Interrupt ID1007 Priority/Priority Byte Offset 1007" hexmask.long.byte 0x00 16.--23. 1. " INTID1006 ,Interrupt ID1006 Priority/Priority Byte Offset 1006" hexmask.long.byte 0x00 8.--15. 1. " INTID1005 ,Interrupt ID1005 Priority/Priority Byte Offset 1005" hexmask.long.byte 0x00 0.--7. 1. " INTID1004 ,Interrupt ID1004 Priority/Priority Byte Offset 1004" group.long 0x7F0++0x03 line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252" hexmask.long.byte 0x00 24.--31. 1. " INTID1011 ,Interrupt ID1011 Priority/Priority Byte Offset 1011" hexmask.long.byte 0x00 16.--23. 1. " INTID1010 ,Interrupt ID1010 Priority/Priority Byte Offset 1010" hexmask.long.byte 0x00 8.--15. 1. " INTID1009 ,Interrupt ID1009 Priority/Priority Byte Offset 1009" hexmask.long.byte 0x00 0.--7. 1. " INTID1008 ,Interrupt ID1008 Priority/Priority Byte Offset 1008" group.long 0x7F4++0x03 line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253" hexmask.long.byte 0x00 24.--31. 1. " INTID1015 ,Interrupt ID1015 Priority/Priority Byte Offset 1015" hexmask.long.byte 0x00 16.--23. 1. " INTID1014 ,Interrupt ID1014 Priority/Priority Byte Offset 1014" hexmask.long.byte 0x00 8.--15. 1. " INTID1013 ,Interrupt ID1013 Priority/Priority Byte Offset 1013" hexmask.long.byte 0x00 0.--7. 1. " INTID1012 ,Interrupt ID1012 Priority/Priority Byte Offset 1012" group.long 0x7F8++0x03 line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254" hexmask.long.byte 0x00 24.--31. 1. " INTID1019 ,Interrupt ID1019 Priority/Priority Byte Offset 1019" hexmask.long.byte 0x00 16.--23. 1. " INTID1018 ,Interrupt ID1018 Priority/Priority Byte Offset 1018" hexmask.long.byte 0x00 8.--15. 1. " INTID1017 ,Interrupt ID1017 Priority/Priority Byte Offset 1017" hexmask.long.byte 0x00 0.--7. 1. " INTID1016 ,Interrupt ID1016 Priority/Priority Byte Offset 1016" else rgroup.long 0x7E0++0x03 line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248" rgroup.long 0x7E4++0x03 line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249" rgroup.long 0x7E8++0x03 line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250" rgroup.long 0x7EC++0x03 line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251" rgroup.long 0x7F0++0x03 line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252" rgroup.long 0x7F4++0x03 line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253" rgroup.long 0x7F8++0x03 line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254" endif tree.end width 19. tree "Processor Targets Registers" if (((per.l(ad:0x4ac10000+0x04))&0x000000E0)>0x1) rgroup.long 0x800++0x03 line.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0 " rgroup.long 0x804++0x03 line.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO7 ,CPU Targets Byte Offset 7 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO6 ,CPU Targets Byte Offset 6 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO5 ,CPU Targets Byte Offset 5 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO4 ,CPU Targets Byte Offset 4 " rgroup.long 0x808++0x03 line.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO11 ,CPU Targets Byte Offset 11 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO10 ,CPU Targets Byte Offset 10 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO9 ,CPU Targets Byte Offset 9 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO8 ,CPU Targets Byte Offset 8 " rgroup.long 0x80C++0x03 line.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO15 ,CPU Targets Byte Offset 15 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO14 ,CPU Targets Byte Offset 14 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO13 ,CPU Targets Byte Offset 13 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO12 ,CPU Targets Byte Offset 12 " rgroup.long 0x810++0x03 line.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO19 ,CPU Targets Byte Offset 19 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO18 ,CPU Targets Byte Offset 18 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO17 ,CPU Targets Byte Offset 17 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO16 ,CPU Targets Byte Offset 16 " rgroup.long 0x814++0x03 line.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO23 ,CPU Targets Byte Offset 23 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO22 ,CPU Targets Byte Offset 22 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO21 ,CPU Targets Byte Offset 21 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO20 ,CPU Targets Byte Offset 20 " rgroup.long 0x818++0x03 line.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO27 ,CPU Targets Byte Offset 27 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO26 ,CPU Targets Byte Offset 26 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO25 ,CPU Targets Byte Offset 25 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO24 ,CPU Targets Byte Offset 24 " rgroup.long 0x81C++0x03 line.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO31 ,CPU Targets Byte Offset 31 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO30 ,CPU Targets Byte Offset 30 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO29 ,CPU Targets Byte Offset 29 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO28 ,CPU Targets Byte Offset 28 " if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x01) group.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35 ,CPU Targets Byte Offset 35 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO34 ,CPU Targets Byte Offset 34 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO33 ,CPU Targets Byte Offset 33 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO32 ,CPU Targets Byte Offset 32 " group.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39 ,CPU Targets Byte Offset 39 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO38 ,CPU Targets Byte Offset 38 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO37 ,CPU Targets Byte Offset 37 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO36 ,CPU Targets Byte Offset 36 " group.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43 ,CPU Targets Byte Offset 43 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO42 ,CPU Targets Byte Offset 42 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO41 ,CPU Targets Byte Offset 41 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO40 ,CPU Targets Byte Offset 40 " group.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47 ,CPU Targets Byte Offset 47 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO46 ,CPU Targets Byte Offset 46 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO45 ,CPU Targets Byte Offset 45 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO44 ,CPU Targets Byte Offset 44 " group.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51 ,CPU Targets Byte Offset 51 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO50 ,CPU Targets Byte Offset 50 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO49 ,CPU Targets Byte Offset 49 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO48 ,CPU Targets Byte Offset 48 " group.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55 ,CPU Targets Byte Offset 55 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO54 ,CPU Targets Byte Offset 54 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO53 ,CPU Targets Byte Offset 53 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO52 ,CPU Targets Byte Offset 52 " group.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59 ,CPU Targets Byte Offset 59 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO58 ,CPU Targets Byte Offset 58 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO57 ,CPU Targets Byte Offset 57 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO56 ,CPU Targets Byte Offset 56 " group.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63 ,CPU Targets Byte Offset 63 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO62 ,CPU Targets Byte Offset 62 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO61 ,CPU Targets Byte Offset 61 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO60 ,CPU Targets Byte Offset 60 " else rgroup.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" rgroup.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" rgroup.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" rgroup.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" rgroup.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" rgroup.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" rgroup.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" rgroup.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x02) group.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67 ,CPU Targets Byte Offset 67 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO66 ,CPU Targets Byte Offset 66 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO65 ,CPU Targets Byte Offset 65 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO64 ,CPU Targets Byte Offset 64 " group.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71 ,CPU Targets Byte Offset 71 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO70 ,CPU Targets Byte Offset 70 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO69 ,CPU Targets Byte Offset 69 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO68 ,CPU Targets Byte Offset 68 " group.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75 ,CPU Targets Byte Offset 75 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO74 ,CPU Targets Byte Offset 74 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO73 ,CPU Targets Byte Offset 73 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO72 ,CPU Targets Byte Offset 72 " group.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79 ,CPU Targets Byte Offset 79 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO78 ,CPU Targets Byte Offset 78 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO77 ,CPU Targets Byte Offset 77 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO76 ,CPU Targets Byte Offset 76 " group.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83 ,CPU Targets Byte Offset 83 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO82 ,CPU Targets Byte Offset 82 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO81 ,CPU Targets Byte Offset 81 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO80 ,CPU Targets Byte Offset 80 " group.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87 ,CPU Targets Byte Offset 87 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO86 ,CPU Targets Byte Offset 86 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO85 ,CPU Targets Byte Offset 85 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO84 ,CPU Targets Byte Offset 84 " group.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91 ,CPU Targets Byte Offset 91 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO90 ,CPU Targets Byte Offset 90 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO89 ,CPU Targets Byte Offset 89 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO88 ,CPU Targets Byte Offset 88 " group.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95 ,CPU Targets Byte Offset 95 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO94 ,CPU Targets Byte Offset 94 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO93 ,CPU Targets Byte Offset 93 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO92 ,CPU Targets Byte Offset 92 " else rgroup.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" rgroup.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" rgroup.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" rgroup.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" rgroup.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" rgroup.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" rgroup.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" rgroup.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x03) group.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99 ,CPU Targets Byte Offset 99 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO98 ,CPU Targets Byte Offset 98 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO97 ,CPU Targets Byte Offset 97 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO96 ,CPU Targets Byte Offset 96 " group.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103 ,CPU Targets Byte Offset 103 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO102 ,CPU Targets Byte Offset 102 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO101 ,CPU Targets Byte Offset 101 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO100 ,CPU Targets Byte Offset 100 " group.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107 ,CPU Targets Byte Offset 107 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO106 ,CPU Targets Byte Offset 106 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO105 ,CPU Targets Byte Offset 105 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO104 ,CPU Targets Byte Offset 104 " group.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111 ,CPU Targets Byte Offset 111 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO110 ,CPU Targets Byte Offset 110 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO109 ,CPU Targets Byte Offset 109 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO108 ,CPU Targets Byte Offset 108 " group.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115 ,CPU Targets Byte Offset 115 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO114 ,CPU Targets Byte Offset 114 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO113 ,CPU Targets Byte Offset 113 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO112 ,CPU Targets Byte Offset 112 " group.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119 ,CPU Targets Byte Offset 119 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO118 ,CPU Targets Byte Offset 118 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO117 ,CPU Targets Byte Offset 117 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO116 ,CPU Targets Byte Offset 116 " group.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123 ,CPU Targets Byte Offset 123 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO122 ,CPU Targets Byte Offset 122 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO121 ,CPU Targets Byte Offset 121 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO120 ,CPU Targets Byte Offset 120 " group.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127 ,CPU Targets Byte Offset 127 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO126 ,CPU Targets Byte Offset 126 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO125 ,CPU Targets Byte Offset 125 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO124 ,CPU Targets Byte Offset 124 " else rgroup.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" rgroup.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" rgroup.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" rgroup.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" rgroup.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" rgroup.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" rgroup.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" rgroup.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x04) group.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131 ,CPU Targets Byte Offset 131 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO130 ,CPU Targets Byte Offset 130 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO129 ,CPU Targets Byte Offset 129 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO128 ,CPU Targets Byte Offset 128 " group.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135 ,CPU Targets Byte Offset 135 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO134 ,CPU Targets Byte Offset 134 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO133 ,CPU Targets Byte Offset 133 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO132 ,CPU Targets Byte Offset 132 " group.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139 ,CPU Targets Byte Offset 139 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO138 ,CPU Targets Byte Offset 138 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO137 ,CPU Targets Byte Offset 137 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO136 ,CPU Targets Byte Offset 136 " group.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143 ,CPU Targets Byte Offset 143 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO142 ,CPU Targets Byte Offset 142 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO141 ,CPU Targets Byte Offset 141 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO140 ,CPU Targets Byte Offset 140 " group.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147 ,CPU Targets Byte Offset 147 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO146 ,CPU Targets Byte Offset 146 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO145 ,CPU Targets Byte Offset 145 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO144 ,CPU Targets Byte Offset 144 " group.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151 ,CPU Targets Byte Offset 151 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO150 ,CPU Targets Byte Offset 150 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO149 ,CPU Targets Byte Offset 149 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO148 ,CPU Targets Byte Offset 148 " group.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155 ,CPU Targets Byte Offset 155 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO154 ,CPU Targets Byte Offset 154 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO153 ,CPU Targets Byte Offset 153 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO152 ,CPU Targets Byte Offset 152 " group.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159 ,CPU Targets Byte Offset 159 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO158 ,CPU Targets Byte Offset 158 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO157 ,CPU Targets Byte Offset 157 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO156 ,CPU Targets Byte Offset 156 " else rgroup.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" rgroup.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" rgroup.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" rgroup.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" rgroup.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" rgroup.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" rgroup.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" rgroup.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x05) group.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163 ,CPU Targets Byte Offset 163 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO162 ,CPU Targets Byte Offset 162 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO161 ,CPU Targets Byte Offset 161 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO160 ,CPU Targets Byte Offset 160 " group.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167 ,CPU Targets Byte Offset 167 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO166 ,CPU Targets Byte Offset 166 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO165 ,CPU Targets Byte Offset 165 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO164 ,CPU Targets Byte Offset 164 " group.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171 ,CPU Targets Byte Offset 171 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO170 ,CPU Targets Byte Offset 170 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO169 ,CPU Targets Byte Offset 169 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO168 ,CPU Targets Byte Offset 168 " group.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175 ,CPU Targets Byte Offset 175 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO174 ,CPU Targets Byte Offset 174 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO173 ,CPU Targets Byte Offset 173 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO172 ,CPU Targets Byte Offset 172 " group.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179 ,CPU Targets Byte Offset 179 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO178 ,CPU Targets Byte Offset 178 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO177 ,CPU Targets Byte Offset 177 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO176 ,CPU Targets Byte Offset 176 " group.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183 ,CPU Targets Byte Offset 183 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO182 ,CPU Targets Byte Offset 182 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO181 ,CPU Targets Byte Offset 181 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO180 ,CPU Targets Byte Offset 180 " group.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187 ,CPU Targets Byte Offset 187 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO186 ,CPU Targets Byte Offset 186 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO185 ,CPU Targets Byte Offset 185 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO184 ,CPU Targets Byte Offset 184 " group.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191 ,CPU Targets Byte Offset 191 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO190 ,CPU Targets Byte Offset 190 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO189 ,CPU Targets Byte Offset 189 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO188 ,CPU Targets Byte Offset 188 " else rgroup.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" rgroup.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" rgroup.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" rgroup.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" rgroup.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" rgroup.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" rgroup.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" rgroup.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x06) group.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195 ,CPU Targets Byte Offset 195 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO194 ,CPU Targets Byte Offset 194 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO193 ,CPU Targets Byte Offset 193 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO192 ,CPU Targets Byte Offset 192 " group.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199 ,CPU Targets Byte Offset 199 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO198 ,CPU Targets Byte Offset 198 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO197 ,CPU Targets Byte Offset 197 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO196 ,CPU Targets Byte Offset 196 " group.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203 ,CPU Targets Byte Offset 203 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO202 ,CPU Targets Byte Offset 202 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO201 ,CPU Targets Byte Offset 201 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO200 ,CPU Targets Byte Offset 200 " group.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207 ,CPU Targets Byte Offset 207 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO206 ,CPU Targets Byte Offset 206 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO205 ,CPU Targets Byte Offset 205 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO204 ,CPU Targets Byte Offset 204 " group.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211 ,CPU Targets Byte Offset 211 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO210 ,CPU Targets Byte Offset 210 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO209 ,CPU Targets Byte Offset 209 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO208 ,CPU Targets Byte Offset 208 " group.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215 ,CPU Targets Byte Offset 215 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO214 ,CPU Targets Byte Offset 214 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO213 ,CPU Targets Byte Offset 213 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO212 ,CPU Targets Byte Offset 212 " group.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219 ,CPU Targets Byte Offset 219 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO218 ,CPU Targets Byte Offset 218 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO217 ,CPU Targets Byte Offset 217 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO216 ,CPU Targets Byte Offset 216 " group.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223 ,CPU Targets Byte Offset 223 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO222 ,CPU Targets Byte Offset 222 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO221 ,CPU Targets Byte Offset 221 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO220 ,CPU Targets Byte Offset 220 " else rgroup.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48" rgroup.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49" rgroup.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50" rgroup.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51" rgroup.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52" rgroup.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53" rgroup.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54" rgroup.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x07) group.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227 ,CPU Targets Byte Offset 227 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO226 ,CPU Targets Byte Offset 226 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO225 ,CPU Targets Byte Offset 225 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO224 ,CPU Targets Byte Offset 224 " group.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231 ,CPU Targets Byte Offset 231 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO230 ,CPU Targets Byte Offset 230 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO229 ,CPU Targets Byte Offset 229 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO228 ,CPU Targets Byte Offset 228 " group.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235 ,CPU Targets Byte Offset 235 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO234 ,CPU Targets Byte Offset 234 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO233 ,CPU Targets Byte Offset 233 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO232 ,CPU Targets Byte Offset 232 " group.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239 ,CPU Targets Byte Offset 239 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO238 ,CPU Targets Byte Offset 238 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO237 ,CPU Targets Byte Offset 237 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO236 ,CPU Targets Byte Offset 236 " group.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243 ,CPU Targets Byte Offset 243 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO242 ,CPU Targets Byte Offset 242 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO241 ,CPU Targets Byte Offset 241 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO240 ,CPU Targets Byte Offset 240 " group.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247 ,CPU Targets Byte Offset 247 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO246 ,CPU Targets Byte Offset 246 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO245 ,CPU Targets Byte Offset 245 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO244 ,CPU Targets Byte Offset 244 " group.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251 ,CPU Targets Byte Offset 251 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO250 ,CPU Targets Byte Offset 250 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO249 ,CPU Targets Byte Offset 249 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO248 ,CPU Targets Byte Offset 248 " group.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255 ,CPU Targets Byte Offset 255 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO254 ,CPU Targets Byte Offset 254 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO253 ,CPU Targets Byte Offset 253 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO252 ,CPU Targets Byte Offset 252 " else rgroup.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56" rgroup.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57" rgroup.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58" rgroup.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59" rgroup.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60" rgroup.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61" rgroup.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62" rgroup.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x08) group.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259 ,CPU Targets Byte Offset 259 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO258 ,CPU Targets Byte Offset 258 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO257 ,CPU Targets Byte Offset 257 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO256 ,CPU Targets Byte Offset 256 " group.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263 ,CPU Targets Byte Offset 263 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO262 ,CPU Targets Byte Offset 262 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO261 ,CPU Targets Byte Offset 261 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO260 ,CPU Targets Byte Offset 260 " group.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267 ,CPU Targets Byte Offset 267 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO266 ,CPU Targets Byte Offset 266 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO265 ,CPU Targets Byte Offset 265 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO264 ,CPU Targets Byte Offset 264 " group.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271 ,CPU Targets Byte Offset 271 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO270 ,CPU Targets Byte Offset 270 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO269 ,CPU Targets Byte Offset 269 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO268 ,CPU Targets Byte Offset 268 " group.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275 ,CPU Targets Byte Offset 275 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO274 ,CPU Targets Byte Offset 274 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO273 ,CPU Targets Byte Offset 273 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO272 ,CPU Targets Byte Offset 272 " group.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279 ,CPU Targets Byte Offset 279 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO278 ,CPU Targets Byte Offset 278 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO277 ,CPU Targets Byte Offset 277 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO276 ,CPU Targets Byte Offset 276 " group.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283 ,CPU Targets Byte Offset 283 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO282 ,CPU Targets Byte Offset 282 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO281 ,CPU Targets Byte Offset 281 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO280 ,CPU Targets Byte Offset 280 " group.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287 ,CPU Targets Byte Offset 287 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO286 ,CPU Targets Byte Offset 286 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO285 ,CPU Targets Byte Offset 285 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO284 ,CPU Targets Byte Offset 284 " else rgroup.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64" rgroup.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65" rgroup.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66" rgroup.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67" rgroup.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68" rgroup.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69" rgroup.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70" rgroup.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x09) group.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291 ,CPU Targets Byte Offset 291 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO290 ,CPU Targets Byte Offset 290 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO289 ,CPU Targets Byte Offset 289 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO288 ,CPU Targets Byte Offset 288 " group.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295 ,CPU Targets Byte Offset 295 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO294 ,CPU Targets Byte Offset 294 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO293 ,CPU Targets Byte Offset 293 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO292 ,CPU Targets Byte Offset 292 " group.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299 ,CPU Targets Byte Offset 299 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO298 ,CPU Targets Byte Offset 298 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO297 ,CPU Targets Byte Offset 297 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO296 ,CPU Targets Byte Offset 296 " group.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303 ,CPU Targets Byte Offset 303 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO302 ,CPU Targets Byte Offset 302 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO301 ,CPU Targets Byte Offset 301 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO300 ,CPU Targets Byte Offset 300 " group.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307 ,CPU Targets Byte Offset 307 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO306 ,CPU Targets Byte Offset 306 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO305 ,CPU Targets Byte Offset 305 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO304 ,CPU Targets Byte Offset 304 " group.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311 ,CPU Targets Byte Offset 311 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO310 ,CPU Targets Byte Offset 310 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO309 ,CPU Targets Byte Offset 309 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO308 ,CPU Targets Byte Offset 308 " group.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315 ,CPU Targets Byte Offset 315 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO314 ,CPU Targets Byte Offset 314 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO313 ,CPU Targets Byte Offset 313 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO312 ,CPU Targets Byte Offset 312 " group.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319 ,CPU Targets Byte Offset 319 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO318 ,CPU Targets Byte Offset 318 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO317 ,CPU Targets Byte Offset 317 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO316 ,CPU Targets Byte Offset 316 " else rgroup.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72" rgroup.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73" rgroup.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74" rgroup.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75" rgroup.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76" rgroup.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77" rgroup.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78" rgroup.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0A) group.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323 ,CPU Targets Byte Offset 323 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO322 ,CPU Targets Byte Offset 322 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO321 ,CPU Targets Byte Offset 321 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO320 ,CPU Targets Byte Offset 320 " group.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327 ,CPU Targets Byte Offset 327 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO326 ,CPU Targets Byte Offset 326 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO325 ,CPU Targets Byte Offset 325 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO324 ,CPU Targets Byte Offset 324 " group.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331 ,CPU Targets Byte Offset 331 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO330 ,CPU Targets Byte Offset 330 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO329 ,CPU Targets Byte Offset 329 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO328 ,CPU Targets Byte Offset 328 " group.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335 ,CPU Targets Byte Offset 335 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO334 ,CPU Targets Byte Offset 334 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO333 ,CPU Targets Byte Offset 333 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO332 ,CPU Targets Byte Offset 332 " group.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339 ,CPU Targets Byte Offset 339 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO338 ,CPU Targets Byte Offset 338 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO337 ,CPU Targets Byte Offset 337 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO336 ,CPU Targets Byte Offset 336 " group.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343 ,CPU Targets Byte Offset 343 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO342 ,CPU Targets Byte Offset 342 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO341 ,CPU Targets Byte Offset 341 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO340 ,CPU Targets Byte Offset 340 " group.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347 ,CPU Targets Byte Offset 347 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO346 ,CPU Targets Byte Offset 346 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO345 ,CPU Targets Byte Offset 345 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO344 ,CPU Targets Byte Offset 344 " group.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351 ,CPU Targets Byte Offset 351 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO350 ,CPU Targets Byte Offset 350 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO349 ,CPU Targets Byte Offset 349 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO348 ,CPU Targets Byte Offset 348 " else rgroup.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80" rgroup.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81" rgroup.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82" rgroup.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83" rgroup.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84" rgroup.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85" rgroup.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86" rgroup.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0B) group.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355 ,CPU Targets Byte Offset 355 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO354 ,CPU Targets Byte Offset 354 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO353 ,CPU Targets Byte Offset 353 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO352 ,CPU Targets Byte Offset 352 " group.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359 ,CPU Targets Byte Offset 359 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO358 ,CPU Targets Byte Offset 358 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO357 ,CPU Targets Byte Offset 357 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO356 ,CPU Targets Byte Offset 356 " group.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363 ,CPU Targets Byte Offset 363 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO362 ,CPU Targets Byte Offset 362 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO361 ,CPU Targets Byte Offset 361 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO360 ,CPU Targets Byte Offset 360 " group.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367 ,CPU Targets Byte Offset 367 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO366 ,CPU Targets Byte Offset 366 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO365 ,CPU Targets Byte Offset 365 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO364 ,CPU Targets Byte Offset 364 " group.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371 ,CPU Targets Byte Offset 371 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO370 ,CPU Targets Byte Offset 370 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO369 ,CPU Targets Byte Offset 369 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO368 ,CPU Targets Byte Offset 368 " group.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375 ,CPU Targets Byte Offset 375 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO374 ,CPU Targets Byte Offset 374 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO373 ,CPU Targets Byte Offset 373 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO372 ,CPU Targets Byte Offset 372 " group.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379 ,CPU Targets Byte Offset 379 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO378 ,CPU Targets Byte Offset 378 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO377 ,CPU Targets Byte Offset 377 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO376 ,CPU Targets Byte Offset 376 " group.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383 ,CPU Targets Byte Offset 383 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO382 ,CPU Targets Byte Offset 382 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO381 ,CPU Targets Byte Offset 381 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO380 ,CPU Targets Byte Offset 380 " else rgroup.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88" rgroup.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89" rgroup.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90" rgroup.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91" rgroup.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92" rgroup.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93" rgroup.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94" rgroup.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0C) group.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387 ,CPU Targets Byte Offset 387 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO386 ,CPU Targets Byte Offset 386 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO385 ,CPU Targets Byte Offset 385 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO384 ,CPU Targets Byte Offset 384 " group.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391 ,CPU Targets Byte Offset 391 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO390 ,CPU Targets Byte Offset 390 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO389 ,CPU Targets Byte Offset 389 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO388 ,CPU Targets Byte Offset 388 " group.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395 ,CPU Targets Byte Offset 395 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO394 ,CPU Targets Byte Offset 394 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO393 ,CPU Targets Byte Offset 393 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO392 ,CPU Targets Byte Offset 392 " group.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399 ,CPU Targets Byte Offset 399 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO398 ,CPU Targets Byte Offset 398 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO397 ,CPU Targets Byte Offset 397 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO396 ,CPU Targets Byte Offset 396 " group.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403 ,CPU Targets Byte Offset 403 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO402 ,CPU Targets Byte Offset 402 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO401 ,CPU Targets Byte Offset 401 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO400 ,CPU Targets Byte Offset 400 " group.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407 ,CPU Targets Byte Offset 407 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO406 ,CPU Targets Byte Offset 406 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO405 ,CPU Targets Byte Offset 405 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO404 ,CPU Targets Byte Offset 404 " group.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411 ,CPU Targets Byte Offset 411 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO410 ,CPU Targets Byte Offset 410 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO409 ,CPU Targets Byte Offset 409 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO408 ,CPU Targets Byte Offset 408 " group.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415 ,CPU Targets Byte Offset 415 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO414 ,CPU Targets Byte Offset 414 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO413 ,CPU Targets Byte Offset 413 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO412 ,CPU Targets Byte Offset 412 " else rgroup.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96" rgroup.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97" rgroup.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98" rgroup.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99" rgroup.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" rgroup.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" rgroup.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" rgroup.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0D) group.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419 ,CPU Targets Byte Offset 419 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO418 ,CPU Targets Byte Offset 418 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO417 ,CPU Targets Byte Offset 417 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO416 ,CPU Targets Byte Offset 416 " group.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423 ,CPU Targets Byte Offset 423 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO422 ,CPU Targets Byte Offset 422 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO421 ,CPU Targets Byte Offset 421 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO420 ,CPU Targets Byte Offset 420 " group.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427 ,CPU Targets Byte Offset 427 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO426 ,CPU Targets Byte Offset 426 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO425 ,CPU Targets Byte Offset 425 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO424 ,CPU Targets Byte Offset 424 " group.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431 ,CPU Targets Byte Offset 431 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO430 ,CPU Targets Byte Offset 430 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO429 ,CPU Targets Byte Offset 429 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO428 ,CPU Targets Byte Offset 428 " group.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435 ,CPU Targets Byte Offset 435 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO434 ,CPU Targets Byte Offset 434 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO433 ,CPU Targets Byte Offset 433 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO432 ,CPU Targets Byte Offset 432 " group.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439 ,CPU Targets Byte Offset 439 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO438 ,CPU Targets Byte Offset 438 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO437 ,CPU Targets Byte Offset 437 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO436 ,CPU Targets Byte Offset 436 " group.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443 ,CPU Targets Byte Offset 443 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO442 ,CPU Targets Byte Offset 442 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO441 ,CPU Targets Byte Offset 441 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO440 ,CPU Targets Byte Offset 440 " group.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447 ,CPU Targets Byte Offset 447 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO446 ,CPU Targets Byte Offset 446 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO445 ,CPU Targets Byte Offset 445 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO444 ,CPU Targets Byte Offset 444 " else rgroup.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" rgroup.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" rgroup.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" rgroup.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" rgroup.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" rgroup.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" rgroup.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" rgroup.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0E) group.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451 ,CPU Targets Byte Offset 451 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO450 ,CPU Targets Byte Offset 450 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO449 ,CPU Targets Byte Offset 449 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO448 ,CPU Targets Byte Offset 448 " group.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455 ,CPU Targets Byte Offset 455 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO454 ,CPU Targets Byte Offset 454 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO453 ,CPU Targets Byte Offset 453 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO452 ,CPU Targets Byte Offset 452 " group.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459 ,CPU Targets Byte Offset 459 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO458 ,CPU Targets Byte Offset 458 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO457 ,CPU Targets Byte Offset 457 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO456 ,CPU Targets Byte Offset 456 " group.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463 ,CPU Targets Byte Offset 463 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO462 ,CPU Targets Byte Offset 462 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO461 ,CPU Targets Byte Offset 461 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO460 ,CPU Targets Byte Offset 460 " group.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467 ,CPU Targets Byte Offset 467 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO466 ,CPU Targets Byte Offset 466 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO465 ,CPU Targets Byte Offset 465 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO464 ,CPU Targets Byte Offset 464 " group.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471 ,CPU Targets Byte Offset 471 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO470 ,CPU Targets Byte Offset 470 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO469 ,CPU Targets Byte Offset 469 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO468 ,CPU Targets Byte Offset 468 " group.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475 ,CPU Targets Byte Offset 475 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO474 ,CPU Targets Byte Offset 474 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO473 ,CPU Targets Byte Offset 473 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO472 ,CPU Targets Byte Offset 472 " group.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479 ,CPU Targets Byte Offset 479 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO478 ,CPU Targets Byte Offset 478 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO477 ,CPU Targets Byte Offset 477 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO476 ,CPU Targets Byte Offset 476 " else rgroup.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" rgroup.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" rgroup.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" rgroup.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" rgroup.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" rgroup.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" rgroup.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" rgroup.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0F) group.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483 ,CPU Targets Byte Offset 483 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO482 ,CPU Targets Byte Offset 482 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO481 ,CPU Targets Byte Offset 481 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO480 ,CPU Targets Byte Offset 480 " group.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487 ,CPU Targets Byte Offset 487 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO486 ,CPU Targets Byte Offset 486 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO485 ,CPU Targets Byte Offset 485 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO484 ,CPU Targets Byte Offset 484 " group.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491 ,CPU Targets Byte Offset 491 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO490 ,CPU Targets Byte Offset 490 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO489 ,CPU Targets Byte Offset 489 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO488 ,CPU Targets Byte Offset 488 " group.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495 ,CPU Targets Byte Offset 495 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO494 ,CPU Targets Byte Offset 494 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO493 ,CPU Targets Byte Offset 493 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO492 ,CPU Targets Byte Offset 492 " group.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499 ,CPU Targets Byte Offset 499 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO498 ,CPU Targets Byte Offset 498 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO497 ,CPU Targets Byte Offset 497 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO496 ,CPU Targets Byte Offset 496 " group.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503 ,CPU Targets Byte Offset 503 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO502 ,CPU Targets Byte Offset 502 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO501 ,CPU Targets Byte Offset 501 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO500 ,CPU Targets Byte Offset 500 " group.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507 ,CPU Targets Byte Offset 507 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO506 ,CPU Targets Byte Offset 506 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO505 ,CPU Targets Byte Offset 505 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO504 ,CPU Targets Byte Offset 504 " group.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511 ,CPU Targets Byte Offset 511 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO510 ,CPU Targets Byte Offset 510 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO509 ,CPU Targets Byte Offset 509 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO508 ,CPU Targets Byte Offset 508 " else rgroup.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" rgroup.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" rgroup.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" rgroup.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" rgroup.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" rgroup.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" rgroup.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" rgroup.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x10) group.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515 ,CPU Targets Byte Offset 515 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO514 ,CPU Targets Byte Offset 514 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO513 ,CPU Targets Byte Offset 513 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO512 ,CPU Targets Byte Offset 512 " group.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519 ,CPU Targets Byte Offset 519 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO518 ,CPU Targets Byte Offset 518 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO517 ,CPU Targets Byte Offset 517 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO516 ,CPU Targets Byte Offset 516 " group.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523 ,CPU Targets Byte Offset 523 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO522 ,CPU Targets Byte Offset 522 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO521 ,CPU Targets Byte Offset 521 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO520 ,CPU Targets Byte Offset 520 " group.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527 ,CPU Targets Byte Offset 527 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO526 ,CPU Targets Byte Offset 526 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO525 ,CPU Targets Byte Offset 525 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO524 ,CPU Targets Byte Offset 524 " group.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531 ,CPU Targets Byte Offset 531 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO530 ,CPU Targets Byte Offset 530 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO529 ,CPU Targets Byte Offset 529 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO528 ,CPU Targets Byte Offset 528 " group.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535 ,CPU Targets Byte Offset 535 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO534 ,CPU Targets Byte Offset 534 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO533 ,CPU Targets Byte Offset 533 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO532 ,CPU Targets Byte Offset 532 " group.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539 ,CPU Targets Byte Offset 539 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO538 ,CPU Targets Byte Offset 538 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO537 ,CPU Targets Byte Offset 537 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO536 ,CPU Targets Byte Offset 536 " group.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543 ,CPU Targets Byte Offset 543 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO542 ,CPU Targets Byte Offset 542 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO541 ,CPU Targets Byte Offset 541 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO540 ,CPU Targets Byte Offset 540 " else rgroup.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" rgroup.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" rgroup.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" rgroup.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" rgroup.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" rgroup.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" rgroup.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" rgroup.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x11) group.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547 ,CPU Targets Byte Offset 547 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO546 ,CPU Targets Byte Offset 546 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO545 ,CPU Targets Byte Offset 545 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO544 ,CPU Targets Byte Offset 544 " group.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551 ,CPU Targets Byte Offset 551 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO550 ,CPU Targets Byte Offset 550 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO549 ,CPU Targets Byte Offset 549 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO548 ,CPU Targets Byte Offset 548 " group.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555 ,CPU Targets Byte Offset 555 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO554 ,CPU Targets Byte Offset 554 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO553 ,CPU Targets Byte Offset 553 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO552 ,CPU Targets Byte Offset 552 " group.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559 ,CPU Targets Byte Offset 559 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO558 ,CPU Targets Byte Offset 558 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO557 ,CPU Targets Byte Offset 557 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO556 ,CPU Targets Byte Offset 556 " group.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563 ,CPU Targets Byte Offset 563 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO562 ,CPU Targets Byte Offset 562 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO561 ,CPU Targets Byte Offset 561 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO560 ,CPU Targets Byte Offset 560 " group.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567 ,CPU Targets Byte Offset 567 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO566 ,CPU Targets Byte Offset 566 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO565 ,CPU Targets Byte Offset 565 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO564 ,CPU Targets Byte Offset 564 " group.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571 ,CPU Targets Byte Offset 571 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO570 ,CPU Targets Byte Offset 570 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO569 ,CPU Targets Byte Offset 569 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO568 ,CPU Targets Byte Offset 568 " group.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575 ,CPU Targets Byte Offset 575 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO574 ,CPU Targets Byte Offset 574 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO573 ,CPU Targets Byte Offset 573 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO572 ,CPU Targets Byte Offset 572 " else rgroup.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" rgroup.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" rgroup.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" rgroup.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" rgroup.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" rgroup.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" rgroup.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" rgroup.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x12) group.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579 ,CPU Targets Byte Offset 579 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO578 ,CPU Targets Byte Offset 578 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO577 ,CPU Targets Byte Offset 577 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO576 ,CPU Targets Byte Offset 576 " group.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583 ,CPU Targets Byte Offset 583 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO582 ,CPU Targets Byte Offset 582 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO581 ,CPU Targets Byte Offset 581 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO580 ,CPU Targets Byte Offset 580 " group.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587 ,CPU Targets Byte Offset 587 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO586 ,CPU Targets Byte Offset 586 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO585 ,CPU Targets Byte Offset 585 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO584 ,CPU Targets Byte Offset 584 " group.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591 ,CPU Targets Byte Offset 591 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO590 ,CPU Targets Byte Offset 590 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO589 ,CPU Targets Byte Offset 589 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO588 ,CPU Targets Byte Offset 588 " group.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595 ,CPU Targets Byte Offset 595 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO594 ,CPU Targets Byte Offset 594 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO593 ,CPU Targets Byte Offset 593 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO592 ,CPU Targets Byte Offset 592 " group.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599 ,CPU Targets Byte Offset 599 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO598 ,CPU Targets Byte Offset 598 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO597 ,CPU Targets Byte Offset 597 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO596 ,CPU Targets Byte Offset 596 " group.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603 ,CPU Targets Byte Offset 603 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO602 ,CPU Targets Byte Offset 602 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO601 ,CPU Targets Byte Offset 601 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO600 ,CPU Targets Byte Offset 600 " group.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607 ,CPU Targets Byte Offset 607 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO606 ,CPU Targets Byte Offset 606 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO605 ,CPU Targets Byte Offset 605 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO604 ,CPU Targets Byte Offset 604 " else rgroup.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" rgroup.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" rgroup.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" rgroup.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" rgroup.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" rgroup.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" rgroup.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" rgroup.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x13) group.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611 ,CPU Targets Byte Offset 611 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO610 ,CPU Targets Byte Offset 610 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO609 ,CPU Targets Byte Offset 609 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO608 ,CPU Targets Byte Offset 608 " group.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615 ,CPU Targets Byte Offset 615 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO614 ,CPU Targets Byte Offset 614 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO613 ,CPU Targets Byte Offset 613 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO612 ,CPU Targets Byte Offset 612 " group.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619 ,CPU Targets Byte Offset 619 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO618 ,CPU Targets Byte Offset 618 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO617 ,CPU Targets Byte Offset 617 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO616 ,CPU Targets Byte Offset 616 " group.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623 ,CPU Targets Byte Offset 623 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO622 ,CPU Targets Byte Offset 622 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO621 ,CPU Targets Byte Offset 621 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO620 ,CPU Targets Byte Offset 620 " group.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627 ,CPU Targets Byte Offset 627 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO626 ,CPU Targets Byte Offset 626 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO625 ,CPU Targets Byte Offset 625 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO624 ,CPU Targets Byte Offset 624 " group.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631 ,CPU Targets Byte Offset 631 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO630 ,CPU Targets Byte Offset 630 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO629 ,CPU Targets Byte Offset 629 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO628 ,CPU Targets Byte Offset 628 " group.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635 ,CPU Targets Byte Offset 635 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO634 ,CPU Targets Byte Offset 634 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO633 ,CPU Targets Byte Offset 633 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO632 ,CPU Targets Byte Offset 632 " group.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639 ,CPU Targets Byte Offset 639 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO638 ,CPU Targets Byte Offset 638 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO637 ,CPU Targets Byte Offset 637 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO636 ,CPU Targets Byte Offset 636 " else rgroup.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" rgroup.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" rgroup.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" rgroup.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" rgroup.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" rgroup.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" rgroup.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" rgroup.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x14) group.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643 ,CPU Targets Byte Offset 643 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO642 ,CPU Targets Byte Offset 642 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO641 ,CPU Targets Byte Offset 641 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO640 ,CPU Targets Byte Offset 640 " group.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647 ,CPU Targets Byte Offset 647 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO646 ,CPU Targets Byte Offset 646 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO645 ,CPU Targets Byte Offset 645 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO644 ,CPU Targets Byte Offset 644 " group.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651 ,CPU Targets Byte Offset 651 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO650 ,CPU Targets Byte Offset 650 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO649 ,CPU Targets Byte Offset 649 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO648 ,CPU Targets Byte Offset 648 " group.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655 ,CPU Targets Byte Offset 655 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO654 ,CPU Targets Byte Offset 654 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO653 ,CPU Targets Byte Offset 653 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO652 ,CPU Targets Byte Offset 652 " group.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659 ,CPU Targets Byte Offset 659 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO658 ,CPU Targets Byte Offset 658 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO657 ,CPU Targets Byte Offset 657 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO656 ,CPU Targets Byte Offset 656 " group.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663 ,CPU Targets Byte Offset 663 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO662 ,CPU Targets Byte Offset 662 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO661 ,CPU Targets Byte Offset 661 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO660 ,CPU Targets Byte Offset 660 " group.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667 ,CPU Targets Byte Offset 667 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO666 ,CPU Targets Byte Offset 666 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO665 ,CPU Targets Byte Offset 665 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO664 ,CPU Targets Byte Offset 664 " group.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671 ,CPU Targets Byte Offset 671 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO670 ,CPU Targets Byte Offset 670 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO669 ,CPU Targets Byte Offset 669 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO668 ,CPU Targets Byte Offset 668 " else rgroup.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" rgroup.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" rgroup.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" rgroup.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" rgroup.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" rgroup.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" rgroup.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" rgroup.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x15) group.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675 ,CPU Targets Byte Offset 675 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO674 ,CPU Targets Byte Offset 674 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO673 ,CPU Targets Byte Offset 673 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO672 ,CPU Targets Byte Offset 672 " group.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679 ,CPU Targets Byte Offset 679 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO678 ,CPU Targets Byte Offset 678 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO677 ,CPU Targets Byte Offset 677 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO676 ,CPU Targets Byte Offset 676 " group.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683 ,CPU Targets Byte Offset 683 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO682 ,CPU Targets Byte Offset 682 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO681 ,CPU Targets Byte Offset 681 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO680 ,CPU Targets Byte Offset 680 " group.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687 ,CPU Targets Byte Offset 687 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO686 ,CPU Targets Byte Offset 686 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO685 ,CPU Targets Byte Offset 685 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO684 ,CPU Targets Byte Offset 684 " group.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691 ,CPU Targets Byte Offset 691 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO690 ,CPU Targets Byte Offset 690 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO689 ,CPU Targets Byte Offset 689 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO688 ,CPU Targets Byte Offset 688 " group.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695 ,CPU Targets Byte Offset 695 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO694 ,CPU Targets Byte Offset 694 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO693 ,CPU Targets Byte Offset 693 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO692 ,CPU Targets Byte Offset 692 " group.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699 ,CPU Targets Byte Offset 699 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO698 ,CPU Targets Byte Offset 698 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO697 ,CPU Targets Byte Offset 697 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO696 ,CPU Targets Byte Offset 696 " group.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703 ,CPU Targets Byte Offset 703 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO702 ,CPU Targets Byte Offset 702 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO701 ,CPU Targets Byte Offset 701 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO700 ,CPU Targets Byte Offset 700 " else rgroup.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" rgroup.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" rgroup.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" rgroup.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" rgroup.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" rgroup.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" rgroup.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" rgroup.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x16) group.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707 ,CPU Targets Byte Offset 707 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO706 ,CPU Targets Byte Offset 706 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO705 ,CPU Targets Byte Offset 705 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO704 ,CPU Targets Byte Offset 704 " group.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711 ,CPU Targets Byte Offset 711 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO710 ,CPU Targets Byte Offset 710 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO709 ,CPU Targets Byte Offset 709 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO708 ,CPU Targets Byte Offset 708 " group.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715 ,CPU Targets Byte Offset 715 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO714 ,CPU Targets Byte Offset 714 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO713 ,CPU Targets Byte Offset 713 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO712 ,CPU Targets Byte Offset 712 " group.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719 ,CPU Targets Byte Offset 719 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO718 ,CPU Targets Byte Offset 718 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO717 ,CPU Targets Byte Offset 717 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO716 ,CPU Targets Byte Offset 716 " group.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723 ,CPU Targets Byte Offset 723 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO722 ,CPU Targets Byte Offset 722 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO721 ,CPU Targets Byte Offset 721 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO720 ,CPU Targets Byte Offset 720 " group.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727 ,CPU Targets Byte Offset 727 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO726 ,CPU Targets Byte Offset 726 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO725 ,CPU Targets Byte Offset 725 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO724 ,CPU Targets Byte Offset 724 " group.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731 ,CPU Targets Byte Offset 731 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO730 ,CPU Targets Byte Offset 730 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO729 ,CPU Targets Byte Offset 729 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO728 ,CPU Targets Byte Offset 728 " group.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735 ,CPU Targets Byte Offset 735 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO734 ,CPU Targets Byte Offset 734 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO733 ,CPU Targets Byte Offset 733 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO732 ,CPU Targets Byte Offset 732 " else rgroup.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" rgroup.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" rgroup.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" rgroup.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" rgroup.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" rgroup.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" rgroup.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" rgroup.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x17) group.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739 ,CPU Targets Byte Offset 739 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO738 ,CPU Targets Byte Offset 738 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO737 ,CPU Targets Byte Offset 737 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO736 ,CPU Targets Byte Offset 736 " group.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743 ,CPU Targets Byte Offset 743 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO742 ,CPU Targets Byte Offset 742 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO741 ,CPU Targets Byte Offset 741 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO740 ,CPU Targets Byte Offset 740 " group.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747 ,CPU Targets Byte Offset 747 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO746 ,CPU Targets Byte Offset 746 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO745 ,CPU Targets Byte Offset 745 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO744 ,CPU Targets Byte Offset 744 " group.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751 ,CPU Targets Byte Offset 751 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO750 ,CPU Targets Byte Offset 750 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO749 ,CPU Targets Byte Offset 749 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO748 ,CPU Targets Byte Offset 748 " group.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755 ,CPU Targets Byte Offset 755 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO754 ,CPU Targets Byte Offset 754 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO753 ,CPU Targets Byte Offset 753 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO752 ,CPU Targets Byte Offset 752 " group.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759 ,CPU Targets Byte Offset 759 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO758 ,CPU Targets Byte Offset 758 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO757 ,CPU Targets Byte Offset 757 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO756 ,CPU Targets Byte Offset 756 " group.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763 ,CPU Targets Byte Offset 763 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO762 ,CPU Targets Byte Offset 762 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO761 ,CPU Targets Byte Offset 761 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO760 ,CPU Targets Byte Offset 760 " group.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767 ,CPU Targets Byte Offset 767 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO766 ,CPU Targets Byte Offset 766 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO765 ,CPU Targets Byte Offset 765 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO764 ,CPU Targets Byte Offset 764 " else rgroup.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" rgroup.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" rgroup.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" rgroup.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" rgroup.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" rgroup.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" rgroup.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" rgroup.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x18) group.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771 ,CPU Targets Byte Offset 771 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO770 ,CPU Targets Byte Offset 770 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO769 ,CPU Targets Byte Offset 769 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO768 ,CPU Targets Byte Offset 768 " group.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775 ,CPU Targets Byte Offset 775 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO774 ,CPU Targets Byte Offset 774 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO773 ,CPU Targets Byte Offset 773 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO772 ,CPU Targets Byte Offset 772 " group.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779 ,CPU Targets Byte Offset 779 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO778 ,CPU Targets Byte Offset 778 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO777 ,CPU Targets Byte Offset 777 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO776 ,CPU Targets Byte Offset 776 " group.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783 ,CPU Targets Byte Offset 783 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO782 ,CPU Targets Byte Offset 782 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO781 ,CPU Targets Byte Offset 781 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO780 ,CPU Targets Byte Offset 780 " group.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787 ,CPU Targets Byte Offset 787 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO786 ,CPU Targets Byte Offset 786 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO785 ,CPU Targets Byte Offset 785 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO784 ,CPU Targets Byte Offset 784 " group.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791 ,CPU Targets Byte Offset 791 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO790 ,CPU Targets Byte Offset 790 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO789 ,CPU Targets Byte Offset 789 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO788 ,CPU Targets Byte Offset 788 " group.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795 ,CPU Targets Byte Offset 795 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO794 ,CPU Targets Byte Offset 794 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO793 ,CPU Targets Byte Offset 793 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO792 ,CPU Targets Byte Offset 792 " group.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799 ,CPU Targets Byte Offset 799 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO798 ,CPU Targets Byte Offset 798 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO797 ,CPU Targets Byte Offset 797 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO796 ,CPU Targets Byte Offset 796 " else rgroup.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" rgroup.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" rgroup.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" rgroup.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" rgroup.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" rgroup.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" rgroup.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" rgroup.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x19) group.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803 ,CPU Targets Byte Offset 803 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO802 ,CPU Targets Byte Offset 802 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO801 ,CPU Targets Byte Offset 801 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO800 ,CPU Targets Byte Offset 800 " group.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807 ,CPU Targets Byte Offset 807 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO806 ,CPU Targets Byte Offset 806 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO805 ,CPU Targets Byte Offset 805 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO804 ,CPU Targets Byte Offset 804 " group.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811 ,CPU Targets Byte Offset 811 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO810 ,CPU Targets Byte Offset 810 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO809 ,CPU Targets Byte Offset 809 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO808 ,CPU Targets Byte Offset 808 " group.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815 ,CPU Targets Byte Offset 815 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO814 ,CPU Targets Byte Offset 814 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO813 ,CPU Targets Byte Offset 813 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO812 ,CPU Targets Byte Offset 812 " group.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819 ,CPU Targets Byte Offset 819 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO818 ,CPU Targets Byte Offset 818 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO817 ,CPU Targets Byte Offset 817 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO816 ,CPU Targets Byte Offset 816 " group.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823 ,CPU Targets Byte Offset 823 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO822 ,CPU Targets Byte Offset 822 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO821 ,CPU Targets Byte Offset 821 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO820 ,CPU Targets Byte Offset 820 " group.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827 ,CPU Targets Byte Offset 827 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO826 ,CPU Targets Byte Offset 826 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO825 ,CPU Targets Byte Offset 825 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO824 ,CPU Targets Byte Offset 824 " group.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831 ,CPU Targets Byte Offset 831 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO830 ,CPU Targets Byte Offset 830 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO829 ,CPU Targets Byte Offset 829 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO828 ,CPU Targets Byte Offset 828 " else rgroup.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" rgroup.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" rgroup.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" rgroup.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" rgroup.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" rgroup.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" rgroup.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" rgroup.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1A) group.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835 ,CPU Targets Byte Offset 835 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO834 ,CPU Targets Byte Offset 834 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO833 ,CPU Targets Byte Offset 833 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO832 ,CPU Targets Byte Offset 832 " group.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839 ,CPU Targets Byte Offset 839 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO838 ,CPU Targets Byte Offset 838 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO837 ,CPU Targets Byte Offset 837 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO836 ,CPU Targets Byte Offset 836 " group.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843 ,CPU Targets Byte Offset 843 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO842 ,CPU Targets Byte Offset 842 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO841 ,CPU Targets Byte Offset 841 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO840 ,CPU Targets Byte Offset 840 " group.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847 ,CPU Targets Byte Offset 847 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO846 ,CPU Targets Byte Offset 846 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO845 ,CPU Targets Byte Offset 845 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO844 ,CPU Targets Byte Offset 844 " group.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851 ,CPU Targets Byte Offset 851 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO850 ,CPU Targets Byte Offset 850 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO849 ,CPU Targets Byte Offset 849 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO848 ,CPU Targets Byte Offset 848 " group.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855 ,CPU Targets Byte Offset 855 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO854 ,CPU Targets Byte Offset 854 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO853 ,CPU Targets Byte Offset 853 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO852 ,CPU Targets Byte Offset 852 " group.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859 ,CPU Targets Byte Offset 859 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO858 ,CPU Targets Byte Offset 858 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO857 ,CPU Targets Byte Offset 857 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO856 ,CPU Targets Byte Offset 856 " group.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863 ,CPU Targets Byte Offset 863 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO862 ,CPU Targets Byte Offset 862 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO861 ,CPU Targets Byte Offset 861 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO860 ,CPU Targets Byte Offset 860 " else rgroup.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" rgroup.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" rgroup.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" rgroup.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" rgroup.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" rgroup.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" rgroup.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" rgroup.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1B) group.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867 ,CPU Targets Byte Offset 867 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO866 ,CPU Targets Byte Offset 866 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO865 ,CPU Targets Byte Offset 865 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO864 ,CPU Targets Byte Offset 864 " group.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871 ,CPU Targets Byte Offset 871 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO870 ,CPU Targets Byte Offset 870 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO869 ,CPU Targets Byte Offset 869 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO868 ,CPU Targets Byte Offset 868 " group.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875 ,CPU Targets Byte Offset 875 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO874 ,CPU Targets Byte Offset 874 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO873 ,CPU Targets Byte Offset 873 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO872 ,CPU Targets Byte Offset 872 " group.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879 ,CPU Targets Byte Offset 879 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO878 ,CPU Targets Byte Offset 878 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO877 ,CPU Targets Byte Offset 877 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO876 ,CPU Targets Byte Offset 876 " group.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883 ,CPU Targets Byte Offset 883 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO882 ,CPU Targets Byte Offset 882 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO881 ,CPU Targets Byte Offset 881 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO880 ,CPU Targets Byte Offset 880 " group.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887 ,CPU Targets Byte Offset 887 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO886 ,CPU Targets Byte Offset 886 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO885 ,CPU Targets Byte Offset 885 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO884 ,CPU Targets Byte Offset 884 " group.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891 ,CPU Targets Byte Offset 891 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO890 ,CPU Targets Byte Offset 890 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO889 ,CPU Targets Byte Offset 889 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO888 ,CPU Targets Byte Offset 888 " group.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895 ,CPU Targets Byte Offset 895 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO894 ,CPU Targets Byte Offset 894 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO893 ,CPU Targets Byte Offset 893 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO892 ,CPU Targets Byte Offset 892 " else rgroup.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" rgroup.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" rgroup.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" rgroup.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" rgroup.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" rgroup.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" rgroup.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" rgroup.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1C) group.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899 ,CPU Targets Byte Offset 899 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO898 ,CPU Targets Byte Offset 898 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO897 ,CPU Targets Byte Offset 897 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO896 ,CPU Targets Byte Offset 896 " group.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903 ,CPU Targets Byte Offset 903 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO902 ,CPU Targets Byte Offset 902 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO901 ,CPU Targets Byte Offset 901 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO900 ,CPU Targets Byte Offset 900 " group.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907 ,CPU Targets Byte Offset 907 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO906 ,CPU Targets Byte Offset 906 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO905 ,CPU Targets Byte Offset 905 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO904 ,CPU Targets Byte Offset 904 " group.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911 ,CPU Targets Byte Offset 911 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO910 ,CPU Targets Byte Offset 910 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO909 ,CPU Targets Byte Offset 909 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO908 ,CPU Targets Byte Offset 908 " group.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915 ,CPU Targets Byte Offset 915 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO914 ,CPU Targets Byte Offset 914 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO913 ,CPU Targets Byte Offset 913 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO912 ,CPU Targets Byte Offset 912 " group.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919 ,CPU Targets Byte Offset 919 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO918 ,CPU Targets Byte Offset 918 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO917 ,CPU Targets Byte Offset 917 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO916 ,CPU Targets Byte Offset 916 " group.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923 ,CPU Targets Byte Offset 923 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO922 ,CPU Targets Byte Offset 922 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO921 ,CPU Targets Byte Offset 921 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO920 ,CPU Targets Byte Offset 920 " group.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927 ,CPU Targets Byte Offset 927 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO926 ,CPU Targets Byte Offset 926 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO925 ,CPU Targets Byte Offset 925 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO924 ,CPU Targets Byte Offset 924 " else rgroup.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" rgroup.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" rgroup.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" rgroup.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" rgroup.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" rgroup.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" rgroup.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" rgroup.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1D) group.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931 ,CPU Targets Byte Offset 931 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO930 ,CPU Targets Byte Offset 930 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO929 ,CPU Targets Byte Offset 929 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO928 ,CPU Targets Byte Offset 928 " group.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935 ,CPU Targets Byte Offset 935 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO934 ,CPU Targets Byte Offset 934 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO933 ,CPU Targets Byte Offset 933 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO932 ,CPU Targets Byte Offset 932 " group.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939 ,CPU Targets Byte Offset 939 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO938 ,CPU Targets Byte Offset 938 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO937 ,CPU Targets Byte Offset 937 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO936 ,CPU Targets Byte Offset 936 " group.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943 ,CPU Targets Byte Offset 943 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO942 ,CPU Targets Byte Offset 942 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO941 ,CPU Targets Byte Offset 941 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO940 ,CPU Targets Byte Offset 940 " group.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947 ,CPU Targets Byte Offset 947 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO946 ,CPU Targets Byte Offset 946 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO945 ,CPU Targets Byte Offset 945 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO944 ,CPU Targets Byte Offset 944 " group.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951 ,CPU Targets Byte Offset 951 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO950 ,CPU Targets Byte Offset 950 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO949 ,CPU Targets Byte Offset 949 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO948 ,CPU Targets Byte Offset 948 " group.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955 ,CPU Targets Byte Offset 955 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO954 ,CPU Targets Byte Offset 954 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO953 ,CPU Targets Byte Offset 953 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO952 ,CPU Targets Byte Offset 952 " group.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959 ,CPU Targets Byte Offset 959 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO958 ,CPU Targets Byte Offset 958 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO957 ,CPU Targets Byte Offset 957 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO956 ,CPU Targets Byte Offset 956 " else rgroup.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" rgroup.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" rgroup.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" rgroup.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" rgroup.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" rgroup.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" rgroup.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" rgroup.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1E) group.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963 ,CPU Targets Byte Offset 963 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO962 ,CPU Targets Byte Offset 962 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO961 ,CPU Targets Byte Offset 961 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO960 ,CPU Targets Byte Offset 960 " group.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967 ,CPU Targets Byte Offset 967 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO966 ,CPU Targets Byte Offset 966 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO965 ,CPU Targets Byte Offset 965 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO964 ,CPU Targets Byte Offset 964 " group.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971 ,CPU Targets Byte Offset 971 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO970 ,CPU Targets Byte Offset 970 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO969 ,CPU Targets Byte Offset 969 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO968 ,CPU Targets Byte Offset 968 " group.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975 ,CPU Targets Byte Offset 975 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO974 ,CPU Targets Byte Offset 974 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO973 ,CPU Targets Byte Offset 973 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO972 ,CPU Targets Byte Offset 972 " group.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979 ,CPU Targets Byte Offset 979 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO978 ,CPU Targets Byte Offset 978 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO977 ,CPU Targets Byte Offset 977 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO976 ,CPU Targets Byte Offset 976 " group.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983 ,CPU Targets Byte Offset 983 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO982 ,CPU Targets Byte Offset 982 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO981 ,CPU Targets Byte Offset 981 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO980 ,CPU Targets Byte Offset 980 " group.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987 ,CPU Targets Byte Offset 987 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO986 ,CPU Targets Byte Offset 986 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO985 ,CPU Targets Byte Offset 985 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO984 ,CPU Targets Byte Offset 984 " group.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991 ,CPU Targets Byte Offset 991 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO990 ,CPU Targets Byte Offset 990 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO989 ,CPU Targets Byte Offset 989 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO988 ,CPU Targets Byte Offset 988 " else rgroup.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" rgroup.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" rgroup.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" rgroup.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" rgroup.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" rgroup.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" rgroup.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" rgroup.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1F) group.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO995 ,CPU Targets Byte Offset 995 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO994 ,CPU Targets Byte Offset 994 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO993 ,CPU Targets Byte Offset 993 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO992 ,CPU Targets Byte Offset 992 " group.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO999 ,CPU Targets Byte Offset 999 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO998 ,CPU Targets Byte Offset 998 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO997 ,CPU Targets Byte Offset 997 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO996 ,CPU Targets Byte Offset 996 " group.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1003 ,CPU Targets Byte Offset 1003" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1002 ,CPU Targets Byte Offset 1002" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1001 ,CPU Targets Byte Offset 1001" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1000 ,CPU Targets Byte Offset 1000" group.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1007 ,CPU Targets Byte Offset 1007" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1006 ,CPU Targets Byte Offset 1006" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1005 ,CPU Targets Byte Offset 1005" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1004 ,CPU Targets Byte Offset 1004" group.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1011 ,CPU Targets Byte Offset 1011" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1010 ,CPU Targets Byte Offset 1010" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1009 ,CPU Targets Byte Offset 1009" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1008 ,CPU Targets Byte Offset 1008" group.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1015 ,CPU Targets Byte Offset 1015" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1014 ,CPU Targets Byte Offset 1014" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1013 ,CPU Targets Byte Offset 1013" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1012 ,CPU Targets Byte Offset 1012" group.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1019 ,CPU Targets Byte Offset 1019" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1018 ,CPU Targets Byte Offset 1018" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1017 ,CPU Targets Byte Offset 1017" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1016 ,CPU Targets Byte Offset 1016" else rgroup.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" rgroup.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" rgroup.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" rgroup.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" rgroup.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" rgroup.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" rgroup.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" endif else rgroup.long 0x800++0x03 line.long 0x00 "GICD_ITARGETSR0 ,Interrupt Processor Targets Register 0 " rgroup.long 0x804++0x03 line.long 0x00 "GICD_ITARGETSR1 ,Interrupt Processor Targets Register 1 " rgroup.long 0x808++0x03 line.long 0x00 "GICD_ITARGETSR2 ,Interrupt Processor Targets Register 2 " rgroup.long 0x80C++0x03 line.long 0x00 "GICD_ITARGETSR3 ,Interrupt Processor Targets Register 3 " rgroup.long 0x810++0x03 line.long 0x00 "GICD_ITARGETSR4 ,Interrupt Processor Targets Register 4 " rgroup.long 0x814++0x03 line.long 0x00 "GICD_ITARGETSR5 ,Interrupt Processor Targets Register 5 " rgroup.long 0x818++0x03 line.long 0x00 "GICD_ITARGETSR6 ,Interrupt Processor Targets Register 6 " rgroup.long 0x81C++0x03 line.long 0x00 "GICD_ITARGETSR7 ,Interrupt Processor Targets Register 7 " rgroup.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8 ,Interrupt Processor Targets Register 8 " rgroup.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9 ,Interrupt Processor Targets Register 9 " rgroup.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 " rgroup.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 " rgroup.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 " rgroup.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 " rgroup.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 " rgroup.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 " rgroup.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 " rgroup.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 " rgroup.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 " rgroup.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 " rgroup.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 " rgroup.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 " rgroup.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 " rgroup.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 " rgroup.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 " rgroup.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 " rgroup.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 " rgroup.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 " rgroup.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 " rgroup.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 " rgroup.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 " rgroup.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 " rgroup.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 " rgroup.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 " rgroup.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 " rgroup.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 " rgroup.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 " rgroup.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 " rgroup.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 " rgroup.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 " rgroup.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 " rgroup.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 " rgroup.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 " rgroup.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 " rgroup.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 " rgroup.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 " rgroup.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 " rgroup.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 " rgroup.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 " rgroup.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 " rgroup.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 " rgroup.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 " rgroup.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 " rgroup.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 " rgroup.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 " rgroup.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 " rgroup.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 " rgroup.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 " rgroup.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 " rgroup.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 " rgroup.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 " rgroup.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 " rgroup.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 " rgroup.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 " rgroup.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 " rgroup.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 " rgroup.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 " rgroup.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 " rgroup.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 " rgroup.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 " rgroup.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 " rgroup.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 " rgroup.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 " rgroup.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 " rgroup.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 " rgroup.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 " rgroup.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 " rgroup.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 " rgroup.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 " rgroup.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 " rgroup.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 " rgroup.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 " rgroup.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 " rgroup.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 " rgroup.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 " rgroup.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 " rgroup.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 " rgroup.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 " rgroup.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 " rgroup.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 " rgroup.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 " rgroup.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 " rgroup.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 " rgroup.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 " rgroup.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 " rgroup.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 " rgroup.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 " rgroup.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 " rgroup.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 " rgroup.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 " rgroup.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" rgroup.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" rgroup.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" rgroup.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" rgroup.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" rgroup.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" rgroup.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" rgroup.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" rgroup.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" rgroup.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" rgroup.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" rgroup.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" rgroup.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" rgroup.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" rgroup.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" rgroup.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" rgroup.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" rgroup.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" rgroup.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" rgroup.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" rgroup.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" rgroup.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" rgroup.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" rgroup.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" rgroup.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" rgroup.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" rgroup.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" rgroup.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" rgroup.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" rgroup.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" rgroup.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" rgroup.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" rgroup.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" rgroup.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" rgroup.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" rgroup.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" rgroup.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" rgroup.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" rgroup.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" rgroup.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" rgroup.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" rgroup.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" rgroup.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" rgroup.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" rgroup.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" rgroup.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" rgroup.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" rgroup.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" rgroup.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" rgroup.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" rgroup.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" rgroup.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" rgroup.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" rgroup.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" rgroup.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" rgroup.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" rgroup.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" rgroup.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" rgroup.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" rgroup.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" rgroup.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" rgroup.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" rgroup.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" rgroup.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" rgroup.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" rgroup.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" rgroup.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" rgroup.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" rgroup.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" rgroup.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" rgroup.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" rgroup.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" rgroup.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" rgroup.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" rgroup.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" rgroup.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" rgroup.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" rgroup.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" rgroup.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" rgroup.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" rgroup.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" rgroup.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" rgroup.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" rgroup.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" rgroup.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" rgroup.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" rgroup.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" rgroup.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" rgroup.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" rgroup.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" rgroup.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" rgroup.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" rgroup.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" rgroup.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" rgroup.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" rgroup.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" rgroup.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" rgroup.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" rgroup.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" rgroup.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" rgroup.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" rgroup.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" rgroup.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" rgroup.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" rgroup.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" rgroup.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" rgroup.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" rgroup.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" rgroup.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" rgroup.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" rgroup.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" rgroup.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" rgroup.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" rgroup.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" rgroup.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" rgroup.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" rgroup.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" rgroup.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" rgroup.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" rgroup.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" rgroup.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" rgroup.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" rgroup.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" rgroup.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" rgroup.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" rgroup.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" rgroup.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" rgroup.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" rgroup.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" rgroup.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" rgroup.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" rgroup.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" rgroup.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" rgroup.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" rgroup.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" rgroup.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" rgroup.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" rgroup.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" rgroup.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" rgroup.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" rgroup.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" rgroup.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" rgroup.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" rgroup.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" rgroup.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" rgroup.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" rgroup.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" rgroup.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" rgroup.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" rgroup.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" rgroup.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" rgroup.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" rgroup.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" rgroup.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" rgroup.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" endif tree.end width 14. tree "Configuration Registers" rgroup.long 0xC00++0x03 line.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register" textline " " rgroup.long 0xC04++0x03 line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1) group.long 0xC08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" rgroup.long 0xC0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x2) group.long 0xC10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" rgroup.long 0xC14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x3) group.long 0xC18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" rgroup.long 0xC1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x4) group.long 0xC20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" rgroup.long 0xC24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x5) group.long 0xC28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" rgroup.long 0xC2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x6) group.long 0xC30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" rgroup.long 0xC34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x7) group.long 0xC38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" rgroup.long 0xC3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x8) group.long 0xC40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" rgroup.long 0xC44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x9) group.long 0xC48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" rgroup.long 0xC4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0xA) group.long 0xC50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" rgroup.long 0xC54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0xB) group.long 0xC58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" rgroup.long 0xC5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0xC) group.long 0xC60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" rgroup.long 0xC64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0xD) group.long 0xC68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" rgroup.long 0xC6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0xE) group.long 0xC70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" rgroup.long 0xC74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0xF) group.long 0xC78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" rgroup.long 0xC7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x10) group.long 0xC80++0x03 line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC84++0x03 line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC80++0x03 line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" rgroup.long 0xC84++0x03 line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x11) group.long 0xC88++0x03 line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC8C++0x03 line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC88++0x03 line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" rgroup.long 0xC8C++0x03 line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x12) group.long 0xC90++0x03 line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC94++0x03 line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC90++0x03 line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" rgroup.long 0xC94++0x03 line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x13) group.long 0xC98++0x03 line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC9C++0x03 line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC98++0x03 line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" rgroup.long 0xC9C++0x03 line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x14) group.long 0xCA0++0x03 line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCA4++0x03 line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCA0++0x03 line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" rgroup.long 0xCA4++0x03 line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x15) group.long 0xCA8++0x03 line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCAC++0x03 line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCA8++0x03 line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" rgroup.long 0xCAC++0x03 line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x16) group.long 0xCB0++0x03 line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCB4++0x03 line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCB0++0x03 line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" rgroup.long 0xCB4++0x03 line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x17) group.long 0xCB8++0x03 line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCBC++0x03 line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCB8++0x03 line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" rgroup.long 0xCBC++0x03 line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x18) group.long 0xCC0++0x03 line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCC4++0x03 line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCC0++0x03 line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" rgroup.long 0xCC4++0x03 line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x19) group.long 0xCC8++0x03 line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCCC++0x03 line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCC8++0x03 line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" rgroup.long 0xCCC++0x03 line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1A) group.long 0xCD0++0x03 line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCD4++0x03 line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCD0++0x03 line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" rgroup.long 0xCD4++0x03 line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1B) group.long 0xCD8++0x03 line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCDC++0x03 line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCD8++0x03 line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" rgroup.long 0xCDC++0x03 line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1C) group.long 0xCE0++0x03 line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCE4++0x03 line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCE0++0x03 line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" rgroup.long 0xCE4++0x03 line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1D) group.long 0xCE8++0x03 line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCEC++0x03 line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCE8++0x03 line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" rgroup.long 0xCEC++0x03 line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1E) group.long 0xCF0++0x03 line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCF4++0x03 line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCF0++0x03 line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" rgroup.long 0xCF4++0x03 line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1F) group.long 0xCF8++0x03 line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCFC++0x03 line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCF8++0x03 line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62" rgroup.long 0xCFC++0x03 line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63" endif tree.end width 12. tree "Peripheral Interrupt Status Registers" rgroup.long 0x0D00++0x03 line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register" bitfld.long 0x00 15. " PPI3S ,nIRQ pin status" "No interrupt,Interrupt" bitfld.long 0x00 14. " PPI2S ,Non-secure Physical Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " PPI1S ,Secure Physical Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 12. " PPI0S ,nFIQ pin status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " PPI4S ,Virtual Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 10. " PPI5S ,Hypervisor Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " PPI6S ,Virtual Maintenance Status" "No interrupt,Interrupt" textline " " width 22. if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x01) rgroup.long 0x0D04++0x03 line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0" bitfld.long 0x00 31. " IRQS31 ,IRQS Status Bit 31" "Low,High" bitfld.long 0x00 30. " IRQS30 ,IRQS Status Bit 30" "Low,High" bitfld.long 0x00 29. " IRQS29 ,IRQS Status Bit 29" "Low,High" textline " " bitfld.long 0x00 28. " IRQS28 ,IRQS Status Bit 28" "Low,High" bitfld.long 0x00 27. " IRQS27 ,IRQS Status Bit 27" "Low,High" bitfld.long 0x00 26. " IRQS26 ,IRQS Status Bit 26" "Low,High" textline " " bitfld.long 0x00 25. " IRQS25 ,IRQS Status Bit 25" "Low,High" bitfld.long 0x00 24. " IRQS24 ,IRQS Status Bit 24" "Low,High" bitfld.long 0x00 23. " IRQS23 ,IRQS Status Bit 23" "Low,High" textline " " bitfld.long 0x00 22. " IRQS22 ,IRQS Status Bit 22" "Low,High" bitfld.long 0x00 21. " IRQS21 ,IRQS Status Bit 21" "Low,High" bitfld.long 0x00 20. " IRQS20 ,IRQS Status Bit 20" "Low,High" textline " " bitfld.long 0x00 19. " IRQS19 ,IRQS Status Bit 19" "Low,High" bitfld.long 0x00 18. " IRQS18 ,IRQS Status Bit 18" "Low,High" bitfld.long 0x00 17. " IRQS17 ,IRQS Status Bit 17" "Low,High" textline " " bitfld.long 0x00 16. " IRQS16 ,IRQS Status Bit 16" "Low,High" bitfld.long 0x00 15. " IRQS15 ,IRQS Status Bit 15" "Low,High" bitfld.long 0x00 14. " IRQS14 ,IRQS Status Bit 14" "Low,High" textline " " bitfld.long 0x00 13. " IRQS13 ,IRQS Status Bit 13" "Low,High" bitfld.long 0x00 12. " IRQS12 ,IRQS Status Bit 12" "Low,High" bitfld.long 0x00 11. " IRQS11 ,IRQS Status Bit 11" "Low,High" textline " " bitfld.long 0x00 10. " IRQS10 ,IRQS Status Bit 10" "Low,High" bitfld.long 0x00 9. " IRQS9 ,IRQS Status Bit 9" "Low,High" bitfld.long 0x00 8. " IRQS8 ,IRQS Status Bit 8" "Low,High" textline " " bitfld.long 0x00 7. " IRQS7 ,IRQS Status Bit 7" "Low,High" bitfld.long 0x00 6. " IRQS6 ,IRQS Status Bit 6" "Low,High" bitfld.long 0x00 5. " IRQS5 ,IRQS Status Bit 5" "Low,High" textline " " bitfld.long 0x00 4. " IRQS4 ,IRQS Status Bit 4" "Low,High" bitfld.long 0x00 3. " IRQS3 ,IRQS Status Bit 3" "Low,High" bitfld.long 0x00 2. " IRQS2 ,IRQS Status Bit 2" "Low,High" textline " " bitfld.long 0x00 1. " IRQS1 ,IRQS Status Bit 1" "Low,High" bitfld.long 0x00 0. " IRQS0 ,IRQS Status Bit 0" "Low,High" else rgroup.long 0x0D04++0x03 line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x02) rgroup.long 0x0D08++0x03 line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" bitfld.long 0x00 31. " IRQS63 ,IRQS Status Bit 63" "Low,High" bitfld.long 0x00 30. " IRQS62 ,IRQS Status Bit 62" "Low,High" bitfld.long 0x00 29. " IRQS61 ,IRQS Status Bit 61" "Low,High" textline " " bitfld.long 0x00 28. " IRQS60 ,IRQS Status Bit 60" "Low,High" bitfld.long 0x00 27. " IRQS59 ,IRQS Status Bit 59" "Low,High" bitfld.long 0x00 26. " IRQS58 ,IRQS Status Bit 58" "Low,High" textline " " bitfld.long 0x00 25. " IRQS57 ,IRQS Status Bit 57" "Low,High" bitfld.long 0x00 24. " IRQS56 ,IRQS Status Bit 56" "Low,High" bitfld.long 0x00 23. " IRQS55 ,IRQS Status Bit 55" "Low,High" textline " " bitfld.long 0x00 22. " IRQS54 ,IRQS Status Bit 54" "Low,High" bitfld.long 0x00 21. " IRQS53 ,IRQS Status Bit 53" "Low,High" bitfld.long 0x00 20. " IRQS52 ,IRQS Status Bit 52" "Low,High" textline " " bitfld.long 0x00 19. " IRQS51 ,IRQS Status Bit 51" "Low,High" bitfld.long 0x00 18. " IRQS50 ,IRQS Status Bit 50" "Low,High" bitfld.long 0x00 17. " IRQS49 ,IRQS Status Bit 49" "Low,High" textline " " bitfld.long 0x00 16. " IRQS48 ,IRQS Status Bit 48" "Low,High" bitfld.long 0x00 15. " IRQS47 ,IRQS Status Bit 47" "Low,High" bitfld.long 0x00 14. " IRQS46 ,IRQS Status Bit 46" "Low,High" textline " " bitfld.long 0x00 13. " IRQS45 ,IRQS Status Bit 45" "Low,High" bitfld.long 0x00 12. " IRQS44 ,IRQS Status Bit 44" "Low,High" bitfld.long 0x00 11. " IRQS43 ,IRQS Status Bit 43" "Low,High" textline " " bitfld.long 0x00 10. " IRQS42 ,IRQS Status Bit 42" "Low,High" bitfld.long 0x00 9. " IRQS41 ,IRQS Status Bit 41" "Low,High" bitfld.long 0x00 8. " IRQS40 ,IRQS Status Bit 40" "Low,High" textline " " bitfld.long 0x00 7. " IRQS39 ,IRQS Status Bit 39" "Low,High" bitfld.long 0x00 6. " IRQS38 ,IRQS Status Bit 38" "Low,High" bitfld.long 0x00 5. " IRQS37 ,IRQS Status Bit 37" "Low,High" textline " " bitfld.long 0x00 4. " IRQS36 ,IRQS Status Bit 36" "Low,High" bitfld.long 0x00 3. " IRQS35 ,IRQS Status Bit 35" "Low,High" bitfld.long 0x00 2. " IRQS34 ,IRQS Status Bit 34" "Low,High" textline " " bitfld.long 0x00 1. " IRQS33 ,IRQS Status Bit 33" "Low,High" bitfld.long 0x00 0. " IRQS32 ,IRQS Status Bit 32" "Low,High" else rgroup.long 0x0D08++0x03 line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x03) rgroup.long 0x0D0C++0x03 line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" bitfld.long 0x00 31. " IRQS95 ,IRQS Status Bit 95" "Low,High" bitfld.long 0x00 30. " IRQS94 ,IRQS Status Bit 94" "Low,High" bitfld.long 0x00 29. " IRQS93 ,IRQS Status Bit 93" "Low,High" textline " " bitfld.long 0x00 28. " IRQS92 ,IRQS Status Bit 92" "Low,High" bitfld.long 0x00 27. " IRQS91 ,IRQS Status Bit 91" "Low,High" bitfld.long 0x00 26. " IRQS90 ,IRQS Status Bit 90" "Low,High" textline " " bitfld.long 0x00 25. " IRQS89 ,IRQS Status Bit 89" "Low,High" bitfld.long 0x00 24. " IRQS88 ,IRQS Status Bit 88" "Low,High" bitfld.long 0x00 23. " IRQS87 ,IRQS Status Bit 87" "Low,High" textline " " bitfld.long 0x00 22. " IRQS86 ,IRQS Status Bit 86" "Low,High" bitfld.long 0x00 21. " IRQS85 ,IRQS Status Bit 85" "Low,High" bitfld.long 0x00 20. " IRQS84 ,IRQS Status Bit 84" "Low,High" textline " " bitfld.long 0x00 19. " IRQS83 ,IRQS Status Bit 83" "Low,High" bitfld.long 0x00 18. " IRQS82 ,IRQS Status Bit 82" "Low,High" bitfld.long 0x00 17. " IRQS81 ,IRQS Status Bit 81" "Low,High" textline " " bitfld.long 0x00 16. " IRQS80 ,IRQS Status Bit 80" "Low,High" bitfld.long 0x00 15. " IRQS79 ,IRQS Status Bit 79" "Low,High" bitfld.long 0x00 14. " IRQS78 ,IRQS Status Bit 78" "Low,High" textline " " bitfld.long 0x00 13. " IRQS77 ,IRQS Status Bit 77" "Low,High" bitfld.long 0x00 12. " IRQS76 ,IRQS Status Bit 76" "Low,High" bitfld.long 0x00 11. " IRQS75 ,IRQS Status Bit 75" "Low,High" textline " " bitfld.long 0x00 10. " IRQS74 ,IRQS Status Bit 74" "Low,High" bitfld.long 0x00 9. " IRQS73 ,IRQS Status Bit 73" "Low,High" bitfld.long 0x00 8. " IRQS72 ,IRQS Status Bit 72" "Low,High" textline " " bitfld.long 0x00 7. " IRQS71 ,IRQS Status Bit 71" "Low,High" bitfld.long 0x00 6. " IRQS70 ,IRQS Status Bit 70" "Low,High" bitfld.long 0x00 5. " IRQS69 ,IRQS Status Bit 69" "Low,High" textline " " bitfld.long 0x00 4. " IRQS68 ,IRQS Status Bit 68" "Low,High" bitfld.long 0x00 3. " IRQS67 ,IRQS Status Bit 67" "Low,High" bitfld.long 0x00 2. " IRQS66 ,IRQS Status Bit 66" "Low,High" textline " " bitfld.long 0x00 1. " IRQS65 ,IRQS Status Bit 65" "Low,High" bitfld.long 0x00 0. " IRQS64 ,IRQS Status Bit 64" "Low,High" else rgroup.long 0x0D0C++0x03 line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x04) rgroup.long 0x0D10++0x03 line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" bitfld.long 0x00 31. " IRQS127 ,IRQS Status Bit 127" "Low,High" bitfld.long 0x00 30. " IRQS126 ,IRQS Status Bit 126" "Low,High" bitfld.long 0x00 29. " IRQS125 ,IRQS Status Bit 125" "Low,High" textline " " bitfld.long 0x00 28. " IRQS124 ,IRQS Status Bit 124" "Low,High" bitfld.long 0x00 27. " IRQS123 ,IRQS Status Bit 123" "Low,High" bitfld.long 0x00 26. " IRQS122 ,IRQS Status Bit 122" "Low,High" textline " " bitfld.long 0x00 25. " IRQS121 ,IRQS Status Bit 121" "Low,High" bitfld.long 0x00 24. " IRQS120 ,IRQS Status Bit 120" "Low,High" bitfld.long 0x00 23. " IRQS119 ,IRQS Status Bit 119" "Low,High" textline " " bitfld.long 0x00 22. " IRQS118 ,IRQS Status Bit 118" "Low,High" bitfld.long 0x00 21. " IRQS117 ,IRQS Status Bit 117" "Low,High" bitfld.long 0x00 20. " IRQS116 ,IRQS Status Bit 116" "Low,High" textline " " bitfld.long 0x00 19. " IRQS115 ,IRQS Status Bit 115" "Low,High" bitfld.long 0x00 18. " IRQS114 ,IRQS Status Bit 114" "Low,High" bitfld.long 0x00 17. " IRQS113 ,IRQS Status Bit 113" "Low,High" textline " " bitfld.long 0x00 16. " IRQS112 ,IRQS Status Bit 112" "Low,High" bitfld.long 0x00 15. " IRQS111 ,IRQS Status Bit 111" "Low,High" bitfld.long 0x00 14. " IRQS110 ,IRQS Status Bit 110" "Low,High" textline " " bitfld.long 0x00 13. " IRQS109 ,IRQS Status Bit 109" "Low,High" bitfld.long 0x00 12. " IRQS108 ,IRQS Status Bit 108" "Low,High" bitfld.long 0x00 11. " IRQS107 ,IRQS Status Bit 107" "Low,High" textline " " bitfld.long 0x00 10. " IRQS106 ,IRQS Status Bit 106" "Low,High" bitfld.long 0x00 9. " IRQS105 ,IRQS Status Bit 105" "Low,High" bitfld.long 0x00 8. " IRQS104 ,IRQS Status Bit 104" "Low,High" textline " " bitfld.long 0x00 7. " IRQS103 ,IRQS Status Bit 103" "Low,High" bitfld.long 0x00 6. " IRQS102 ,IRQS Status Bit 102" "Low,High" bitfld.long 0x00 5. " IRQS101 ,IRQS Status Bit 101" "Low,High" textline " " bitfld.long 0x00 4. " IRQS100 ,IRQS Status Bit 100" "Low,High" bitfld.long 0x00 3. " IRQS99 ,IRQS Status Bit 99" "Low,High" bitfld.long 0x00 2. " IRQS98 ,IRQS Status Bit 98" "Low,High" textline " " bitfld.long 0x00 1. " IRQS97 ,IRQS Status Bit 97" "Low,High" bitfld.long 0x00 0. " IRQS96 ,IRQS Status Bit 96" "Low,High" else rgroup.long 0x0D10++0x03 line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x05) rgroup.long 0x0D14++0x03 line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" bitfld.long 0x00 31. " IRQS159 ,IRQS Status Bit 159" "Low,High" bitfld.long 0x00 30. " IRQS158 ,IRQS Status Bit 158" "Low,High" bitfld.long 0x00 29. " IRQS157 ,IRQS Status Bit 157" "Low,High" textline " " bitfld.long 0x00 28. " IRQS156 ,IRQS Status Bit 156" "Low,High" bitfld.long 0x00 27. " IRQS155 ,IRQS Status Bit 155" "Low,High" bitfld.long 0x00 26. " IRQS154 ,IRQS Status Bit 154" "Low,High" textline " " bitfld.long 0x00 25. " IRQS153 ,IRQS Status Bit 153" "Low,High" bitfld.long 0x00 24. " IRQS152 ,IRQS Status Bit 152" "Low,High" bitfld.long 0x00 23. " IRQS151 ,IRQS Status Bit 151" "Low,High" textline " " bitfld.long 0x00 22. " IRQS150 ,IRQS Status Bit 150" "Low,High" bitfld.long 0x00 21. " IRQS149 ,IRQS Status Bit 149" "Low,High" bitfld.long 0x00 20. " IRQS148 ,IRQS Status Bit 148" "Low,High" textline " " bitfld.long 0x00 19. " IRQS147 ,IRQS Status Bit 147" "Low,High" bitfld.long 0x00 18. " IRQS146 ,IRQS Status Bit 146" "Low,High" bitfld.long 0x00 17. " IRQS145 ,IRQS Status Bit 145" "Low,High" textline " " bitfld.long 0x00 16. " IRQS144 ,IRQS Status Bit 144" "Low,High" bitfld.long 0x00 15. " IRQS143 ,IRQS Status Bit 143" "Low,High" bitfld.long 0x00 14. " IRQS142 ,IRQS Status Bit 142" "Low,High" textline " " bitfld.long 0x00 13. " IRQS141 ,IRQS Status Bit 141" "Low,High" bitfld.long 0x00 12. " IRQS140 ,IRQS Status Bit 140" "Low,High" bitfld.long 0x00 11. " IRQS139 ,IRQS Status Bit 139" "Low,High" textline " " bitfld.long 0x00 10. " IRQS138 ,IRQS Status Bit 138" "Low,High" bitfld.long 0x00 9. " IRQS137 ,IRQS Status Bit 137" "Low,High" bitfld.long 0x00 8. " IRQS136 ,IRQS Status Bit 136" "Low,High" textline " " bitfld.long 0x00 7. " IRQS135 ,IRQS Status Bit 135" "Low,High" bitfld.long 0x00 6. " IRQS134 ,IRQS Status Bit 134" "Low,High" bitfld.long 0x00 5. " IRQS133 ,IRQS Status Bit 133" "Low,High" textline " " bitfld.long 0x00 4. " IRQS132 ,IRQS Status Bit 132" "Low,High" bitfld.long 0x00 3. " IRQS131 ,IRQS Status Bit 131" "Low,High" bitfld.long 0x00 2. " IRQS130 ,IRQS Status Bit 130" "Low,High" textline " " bitfld.long 0x00 1. " IRQS129 ,IRQS Status Bit 129" "Low,High" bitfld.long 0x00 0. " IRQS128 ,IRQS Status Bit 128" "Low,High" else rgroup.long 0x0D14++0x03 line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x06) rgroup.long 0x0D18++0x03 line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5" bitfld.long 0x00 31. " IRQS191 ,IRQS Status Bit 191" "Low,High" bitfld.long 0x00 30. " IRQS190 ,IRQS Status Bit 190" "Low,High" bitfld.long 0x00 29. " IRQS189 ,IRQS Status Bit 189" "Low,High" textline " " bitfld.long 0x00 28. " IRQS188 ,IRQS Status Bit 188" "Low,High" bitfld.long 0x00 27. " IRQS187 ,IRQS Status Bit 187" "Low,High" bitfld.long 0x00 26. " IRQS186 ,IRQS Status Bit 186" "Low,High" textline " " bitfld.long 0x00 25. " IRQS185 ,IRQS Status Bit 185" "Low,High" bitfld.long 0x00 24. " IRQS184 ,IRQS Status Bit 184" "Low,High" bitfld.long 0x00 23. " IRQS183 ,IRQS Status Bit 183" "Low,High" textline " " bitfld.long 0x00 22. " IRQS182 ,IRQS Status Bit 182" "Low,High" bitfld.long 0x00 21. " IRQS181 ,IRQS Status Bit 181" "Low,High" bitfld.long 0x00 20. " IRQS180 ,IRQS Status Bit 180" "Low,High" textline " " bitfld.long 0x00 19. " IRQS179 ,IRQS Status Bit 179" "Low,High" bitfld.long 0x00 18. " IRQS178 ,IRQS Status Bit 178" "Low,High" bitfld.long 0x00 17. " IRQS177 ,IRQS Status Bit 177" "Low,High" textline " " bitfld.long 0x00 16. " IRQS176 ,IRQS Status Bit 176" "Low,High" bitfld.long 0x00 15. " IRQS175 ,IRQS Status Bit 175" "Low,High" bitfld.long 0x00 14. " IRQS174 ,IRQS Status Bit 174" "Low,High" textline " " bitfld.long 0x00 13. " IRQS173 ,IRQS Status Bit 173" "Low,High" bitfld.long 0x00 12. " IRQS172 ,IRQS Status Bit 172" "Low,High" bitfld.long 0x00 11. " IRQS171 ,IRQS Status Bit 171" "Low,High" textline " " bitfld.long 0x00 10. " IRQS170 ,IRQS Status Bit 170" "Low,High" bitfld.long 0x00 9. " IRQS169 ,IRQS Status Bit 169" "Low,High" bitfld.long 0x00 8. " IRQS168 ,IRQS Status Bit 168" "Low,High" textline " " bitfld.long 0x00 7. " IRQS167 ,IRQS Status Bit 167" "Low,High" bitfld.long 0x00 6. " IRQS166 ,IRQS Status Bit 166" "Low,High" bitfld.long 0x00 5. " IRQS165 ,IRQS Status Bit 165" "Low,High" textline " " bitfld.long 0x00 4. " IRQS164 ,IRQS Status Bit 164" "Low,High" bitfld.long 0x00 3. " IRQS163 ,IRQS Status Bit 163" "Low,High" bitfld.long 0x00 2. " IRQS162 ,IRQS Status Bit 162" "Low,High" textline " " bitfld.long 0x00 1. " IRQS161 ,IRQS Status Bit 161" "Low,High" bitfld.long 0x00 0. " IRQS160 ,IRQS Status Bit 160" "Low,High" else rgroup.long 0x0D18++0x03 line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x07) rgroup.long 0x0D1C++0x03 line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6" bitfld.long 0x00 31. " IRQS223 ,IRQS Status Bit 223" "Low,High" bitfld.long 0x00 30. " IRQS222 ,IRQS Status Bit 222" "Low,High" bitfld.long 0x00 29. " IRQS221 ,IRQS Status Bit 221" "Low,High" textline " " bitfld.long 0x00 28. " IRQS220 ,IRQS Status Bit 220" "Low,High" bitfld.long 0x00 27. " IRQS219 ,IRQS Status Bit 219" "Low,High" bitfld.long 0x00 26. " IRQS218 ,IRQS Status Bit 218" "Low,High" textline " " bitfld.long 0x00 25. " IRQS217 ,IRQS Status Bit 217" "Low,High" bitfld.long 0x00 24. " IRQS216 ,IRQS Status Bit 216" "Low,High" bitfld.long 0x00 23. " IRQS215 ,IRQS Status Bit 215" "Low,High" textline " " bitfld.long 0x00 22. " IRQS214 ,IRQS Status Bit 214" "Low,High" bitfld.long 0x00 21. " IRQS213 ,IRQS Status Bit 213" "Low,High" bitfld.long 0x00 20. " IRQS212 ,IRQS Status Bit 212" "Low,High" textline " " bitfld.long 0x00 19. " IRQS211 ,IRQS Status Bit 211" "Low,High" bitfld.long 0x00 18. " IRQS210 ,IRQS Status Bit 210" "Low,High" bitfld.long 0x00 17. " IRQS209 ,IRQS Status Bit 209" "Low,High" textline " " bitfld.long 0x00 16. " IRQS208 ,IRQS Status Bit 208" "Low,High" bitfld.long 0x00 15. " IRQS207 ,IRQS Status Bit 207" "Low,High" bitfld.long 0x00 14. " IRQS206 ,IRQS Status Bit 206" "Low,High" textline " " bitfld.long 0x00 13. " IRQS205 ,IRQS Status Bit 205" "Low,High" bitfld.long 0x00 12. " IRQS204 ,IRQS Status Bit 204" "Low,High" bitfld.long 0x00 11. " IRQS203 ,IRQS Status Bit 203" "Low,High" textline " " bitfld.long 0x00 10. " IRQS202 ,IRQS Status Bit 202" "Low,High" bitfld.long 0x00 9. " IRQS201 ,IRQS Status Bit 201" "Low,High" bitfld.long 0x00 8. " IRQS200 ,IRQS Status Bit 200" "Low,High" textline " " bitfld.long 0x00 7. " IRQS199 ,IRQS Status Bit 199" "Low,High" bitfld.long 0x00 6. " IRQS198 ,IRQS Status Bit 198" "Low,High" bitfld.long 0x00 5. " IRQS197 ,IRQS Status Bit 197" "Low,High" textline " " bitfld.long 0x00 4. " IRQS196 ,IRQS Status Bit 196" "Low,High" bitfld.long 0x00 3. " IRQS195 ,IRQS Status Bit 195" "Low,High" bitfld.long 0x00 2. " IRQS194 ,IRQS Status Bit 194" "Low,High" textline " " bitfld.long 0x00 1. " IRQS193 ,IRQS Status Bit 193" "Low,High" bitfld.long 0x00 0. " IRQS192 ,IRQS Status Bit 192" "Low,High" else rgroup.long 0x0D1C++0x03 line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x08) rgroup.long 0x0D20++0x03 line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7" bitfld.long 0x00 31. " IRQS255 ,IRQS Status Bit 255" "Low,High" bitfld.long 0x00 30. " IRQS254 ,IRQS Status Bit 254" "Low,High" bitfld.long 0x00 29. " IRQS253 ,IRQS Status Bit 253" "Low,High" textline " " bitfld.long 0x00 28. " IRQS252 ,IRQS Status Bit 252" "Low,High" bitfld.long 0x00 27. " IRQS251 ,IRQS Status Bit 251" "Low,High" bitfld.long 0x00 26. " IRQS250 ,IRQS Status Bit 250" "Low,High" textline " " bitfld.long 0x00 25. " IRQS249 ,IRQS Status Bit 249" "Low,High" bitfld.long 0x00 24. " IRQS248 ,IRQS Status Bit 248" "Low,High" bitfld.long 0x00 23. " IRQS247 ,IRQS Status Bit 247" "Low,High" textline " " bitfld.long 0x00 22. " IRQS246 ,IRQS Status Bit 246" "Low,High" bitfld.long 0x00 21. " IRQS245 ,IRQS Status Bit 245" "Low,High" bitfld.long 0x00 20. " IRQS244 ,IRQS Status Bit 244" "Low,High" textline " " bitfld.long 0x00 19. " IRQS243 ,IRQS Status Bit 243" "Low,High" bitfld.long 0x00 18. " IRQS242 ,IRQS Status Bit 242" "Low,High" bitfld.long 0x00 17. " IRQS241 ,IRQS Status Bit 241" "Low,High" textline " " bitfld.long 0x00 16. " IRQS240 ,IRQS Status Bit 240" "Low,High" bitfld.long 0x00 15. " IRQS239 ,IRQS Status Bit 239" "Low,High" bitfld.long 0x00 14. " IRQS238 ,IRQS Status Bit 238" "Low,High" textline " " bitfld.long 0x00 13. " IRQS237 ,IRQS Status Bit 237" "Low,High" bitfld.long 0x00 12. " IRQS236 ,IRQS Status Bit 236" "Low,High" bitfld.long 0x00 11. " IRQS235 ,IRQS Status Bit 235" "Low,High" textline " " bitfld.long 0x00 10. " IRQS234 ,IRQS Status Bit 234" "Low,High" bitfld.long 0x00 9. " IRQS233 ,IRQS Status Bit 233" "Low,High" bitfld.long 0x00 8. " IRQS232 ,IRQS Status Bit 232" "Low,High" textline " " bitfld.long 0x00 7. " IRQS231 ,IRQS Status Bit 231" "Low,High" bitfld.long 0x00 6. " IRQS230 ,IRQS Status Bit 230" "Low,High" bitfld.long 0x00 5. " IRQS229 ,IRQS Status Bit 229" "Low,High" textline " " bitfld.long 0x00 4. " IRQS228 ,IRQS Status Bit 228" "Low,High" bitfld.long 0x00 3. " IRQS227 ,IRQS Status Bit 227" "Low,High" bitfld.long 0x00 2. " IRQS226 ,IRQS Status Bit 226" "Low,High" textline " " bitfld.long 0x00 1. " IRQS225 ,IRQS Status Bit 225" "Low,High" bitfld.long 0x00 0. " IRQS224 ,IRQS Status Bit 224" "Low,High" else rgroup.long 0x0D20++0x03 line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x09) rgroup.long 0x0D24++0x03 line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8" bitfld.long 0x00 31. " IRQS287 ,IRQS Status Bit 287" "Low,High" bitfld.long 0x00 30. " IRQS286 ,IRQS Status Bit 286" "Low,High" bitfld.long 0x00 29. " IRQS285 ,IRQS Status Bit 285" "Low,High" textline " " bitfld.long 0x00 28. " IRQS284 ,IRQS Status Bit 284" "Low,High" bitfld.long 0x00 27. " IRQS283 ,IRQS Status Bit 283" "Low,High" bitfld.long 0x00 26. " IRQS282 ,IRQS Status Bit 282" "Low,High" textline " " bitfld.long 0x00 25. " IRQS281 ,IRQS Status Bit 281" "Low,High" bitfld.long 0x00 24. " IRQS280 ,IRQS Status Bit 280" "Low,High" bitfld.long 0x00 23. " IRQS279 ,IRQS Status Bit 279" "Low,High" textline " " bitfld.long 0x00 22. " IRQS278 ,IRQS Status Bit 278" "Low,High" bitfld.long 0x00 21. " IRQS277 ,IRQS Status Bit 277" "Low,High" bitfld.long 0x00 20. " IRQS276 ,IRQS Status Bit 276" "Low,High" textline " " bitfld.long 0x00 19. " IRQS275 ,IRQS Status Bit 275" "Low,High" bitfld.long 0x00 18. " IRQS274 ,IRQS Status Bit 274" "Low,High" bitfld.long 0x00 17. " IRQS273 ,IRQS Status Bit 273" "Low,High" textline " " bitfld.long 0x00 16. " IRQS272 ,IRQS Status Bit 272" "Low,High" bitfld.long 0x00 15. " IRQS271 ,IRQS Status Bit 271" "Low,High" bitfld.long 0x00 14. " IRQS270 ,IRQS Status Bit 270" "Low,High" textline " " bitfld.long 0x00 13. " IRQS269 ,IRQS Status Bit 269" "Low,High" bitfld.long 0x00 12. " IRQS268 ,IRQS Status Bit 268" "Low,High" bitfld.long 0x00 11. " IRQS267 ,IRQS Status Bit 267" "Low,High" textline " " bitfld.long 0x00 10. " IRQS266 ,IRQS Status Bit 266" "Low,High" bitfld.long 0x00 9. " IRQS265 ,IRQS Status Bit 265" "Low,High" bitfld.long 0x00 8. " IRQS264 ,IRQS Status Bit 264" "Low,High" textline " " bitfld.long 0x00 7. " IRQS263 ,IRQS Status Bit 263" "Low,High" bitfld.long 0x00 6. " IRQS262 ,IRQS Status Bit 262" "Low,High" bitfld.long 0x00 5. " IRQS261 ,IRQS Status Bit 261" "Low,High" textline " " bitfld.long 0x00 4. " IRQS260 ,IRQS Status Bit 260" "Low,High" bitfld.long 0x00 3. " IRQS259 ,IRQS Status Bit 259" "Low,High" bitfld.long 0x00 2. " IRQS258 ,IRQS Status Bit 258" "Low,High" textline " " bitfld.long 0x00 1. " IRQS257 ,IRQS Status Bit 257" "Low,High" bitfld.long 0x00 0. " IRQS256 ,IRQS Status Bit 256" "Low,High" else rgroup.long 0x0D24++0x03 line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0A) rgroup.long 0x0D28++0x03 line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9" bitfld.long 0x00 31. " IRQS319 ,IRQS Status Bit 319" "Low,High" bitfld.long 0x00 30. " IRQS318 ,IRQS Status Bit 318" "Low,High" bitfld.long 0x00 29. " IRQS317 ,IRQS Status Bit 317" "Low,High" textline " " bitfld.long 0x00 28. " IRQS316 ,IRQS Status Bit 316" "Low,High" bitfld.long 0x00 27. " IRQS315 ,IRQS Status Bit 315" "Low,High" bitfld.long 0x00 26. " IRQS314 ,IRQS Status Bit 314" "Low,High" textline " " bitfld.long 0x00 25. " IRQS313 ,IRQS Status Bit 313" "Low,High" bitfld.long 0x00 24. " IRQS312 ,IRQS Status Bit 312" "Low,High" bitfld.long 0x00 23. " IRQS311 ,IRQS Status Bit 311" "Low,High" textline " " bitfld.long 0x00 22. " IRQS310 ,IRQS Status Bit 310" "Low,High" bitfld.long 0x00 21. " IRQS309 ,IRQS Status Bit 309" "Low,High" bitfld.long 0x00 20. " IRQS308 ,IRQS Status Bit 308" "Low,High" textline " " bitfld.long 0x00 19. " IRQS307 ,IRQS Status Bit 307" "Low,High" bitfld.long 0x00 18. " IRQS306 ,IRQS Status Bit 306" "Low,High" bitfld.long 0x00 17. " IRQS305 ,IRQS Status Bit 305" "Low,High" textline " " bitfld.long 0x00 16. " IRQS304 ,IRQS Status Bit 304" "Low,High" bitfld.long 0x00 15. " IRQS303 ,IRQS Status Bit 303" "Low,High" bitfld.long 0x00 14. " IRQS302 ,IRQS Status Bit 302" "Low,High" textline " " bitfld.long 0x00 13. " IRQS301 ,IRQS Status Bit 301" "Low,High" bitfld.long 0x00 12. " IRQS300 ,IRQS Status Bit 300" "Low,High" bitfld.long 0x00 11. " IRQS299 ,IRQS Status Bit 299" "Low,High" textline " " bitfld.long 0x00 10. " IRQS298 ,IRQS Status Bit 298" "Low,High" bitfld.long 0x00 9. " IRQS297 ,IRQS Status Bit 297" "Low,High" bitfld.long 0x00 8. " IRQS296 ,IRQS Status Bit 296" "Low,High" textline " " bitfld.long 0x00 7. " IRQS295 ,IRQS Status Bit 295" "Low,High" bitfld.long 0x00 6. " IRQS294 ,IRQS Status Bit 294" "Low,High" bitfld.long 0x00 5. " IRQS293 ,IRQS Status Bit 293" "Low,High" textline " " bitfld.long 0x00 4. " IRQS292 ,IRQS Status Bit 292" "Low,High" bitfld.long 0x00 3. " IRQS291 ,IRQS Status Bit 291" "Low,High" bitfld.long 0x00 2. " IRQS290 ,IRQS Status Bit 290" "Low,High" textline " " bitfld.long 0x00 1. " IRQS289 ,IRQS Status Bit 289" "Low,High" bitfld.long 0x00 0. " IRQS288 ,IRQS Status Bit 288" "Low,High" else rgroup.long 0x0D28++0x03 line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0B) rgroup.long 0x0D2C++0x03 line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10" bitfld.long 0x00 31. " IRQS351 ,IRQS Status Bit 351" "Low,High" bitfld.long 0x00 30. " IRQS350 ,IRQS Status Bit 350" "Low,High" bitfld.long 0x00 29. " IRQS349 ,IRQS Status Bit 349" "Low,High" textline " " bitfld.long 0x00 28. " IRQS348 ,IRQS Status Bit 348" "Low,High" bitfld.long 0x00 27. " IRQS347 ,IRQS Status Bit 347" "Low,High" bitfld.long 0x00 26. " IRQS346 ,IRQS Status Bit 346" "Low,High" textline " " bitfld.long 0x00 25. " IRQS345 ,IRQS Status Bit 345" "Low,High" bitfld.long 0x00 24. " IRQS344 ,IRQS Status Bit 344" "Low,High" bitfld.long 0x00 23. " IRQS343 ,IRQS Status Bit 343" "Low,High" textline " " bitfld.long 0x00 22. " IRQS342 ,IRQS Status Bit 342" "Low,High" bitfld.long 0x00 21. " IRQS341 ,IRQS Status Bit 341" "Low,High" bitfld.long 0x00 20. " IRQS340 ,IRQS Status Bit 340" "Low,High" textline " " bitfld.long 0x00 19. " IRQS339 ,IRQS Status Bit 339" "Low,High" bitfld.long 0x00 18. " IRQS338 ,IRQS Status Bit 338" "Low,High" bitfld.long 0x00 17. " IRQS337 ,IRQS Status Bit 337" "Low,High" textline " " bitfld.long 0x00 16. " IRQS336 ,IRQS Status Bit 336" "Low,High" bitfld.long 0x00 15. " IRQS335 ,IRQS Status Bit 335" "Low,High" bitfld.long 0x00 14. " IRQS334 ,IRQS Status Bit 334" "Low,High" textline " " bitfld.long 0x00 13. " IRQS333 ,IRQS Status Bit 333" "Low,High" bitfld.long 0x00 12. " IRQS332 ,IRQS Status Bit 332" "Low,High" bitfld.long 0x00 11. " IRQS331 ,IRQS Status Bit 331" "Low,High" textline " " bitfld.long 0x00 10. " IRQS330 ,IRQS Status Bit 330" "Low,High" bitfld.long 0x00 9. " IRQS329 ,IRQS Status Bit 329" "Low,High" bitfld.long 0x00 8. " IRQS328 ,IRQS Status Bit 328" "Low,High" textline " " bitfld.long 0x00 7. " IRQS327 ,IRQS Status Bit 327" "Low,High" bitfld.long 0x00 6. " IRQS326 ,IRQS Status Bit 326" "Low,High" bitfld.long 0x00 5. " IRQS325 ,IRQS Status Bit 325" "Low,High" textline " " bitfld.long 0x00 4. " IRQS324 ,IRQS Status Bit 324" "Low,High" bitfld.long 0x00 3. " IRQS323 ,IRQS Status Bit 323" "Low,High" bitfld.long 0x00 2. " IRQS322 ,IRQS Status Bit 322" "Low,High" textline " " bitfld.long 0x00 1. " IRQS321 ,IRQS Status Bit 321" "Low,High" bitfld.long 0x00 0. " IRQS320 ,IRQS Status Bit 320" "Low,High" else rgroup.long 0x0D2C++0x03 line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0C) rgroup.long 0x0D30++0x03 line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11" bitfld.long 0x00 31. " IRQS383 ,IRQS Status Bit 383" "Low,High" bitfld.long 0x00 30. " IRQS382 ,IRQS Status Bit 382" "Low,High" bitfld.long 0x00 29. " IRQS381 ,IRQS Status Bit 381" "Low,High" textline " " bitfld.long 0x00 28. " IRQS380 ,IRQS Status Bit 380" "Low,High" bitfld.long 0x00 27. " IRQS379 ,IRQS Status Bit 379" "Low,High" bitfld.long 0x00 26. " IRQS378 ,IRQS Status Bit 378" "Low,High" textline " " bitfld.long 0x00 25. " IRQS377 ,IRQS Status Bit 377" "Low,High" bitfld.long 0x00 24. " IRQS376 ,IRQS Status Bit 376" "Low,High" bitfld.long 0x00 23. " IRQS375 ,IRQS Status Bit 375" "Low,High" textline " " bitfld.long 0x00 22. " IRQS374 ,IRQS Status Bit 374" "Low,High" bitfld.long 0x00 21. " IRQS373 ,IRQS Status Bit 373" "Low,High" bitfld.long 0x00 20. " IRQS372 ,IRQS Status Bit 372" "Low,High" textline " " bitfld.long 0x00 19. " IRQS371 ,IRQS Status Bit 371" "Low,High" bitfld.long 0x00 18. " IRQS370 ,IRQS Status Bit 370" "Low,High" bitfld.long 0x00 17. " IRQS369 ,IRQS Status Bit 369" "Low,High" textline " " bitfld.long 0x00 16. " IRQS368 ,IRQS Status Bit 368" "Low,High" bitfld.long 0x00 15. " IRQS367 ,IRQS Status Bit 367" "Low,High" bitfld.long 0x00 14. " IRQS366 ,IRQS Status Bit 366" "Low,High" textline " " bitfld.long 0x00 13. " IRQS365 ,IRQS Status Bit 365" "Low,High" bitfld.long 0x00 12. " IRQS364 ,IRQS Status Bit 364" "Low,High" bitfld.long 0x00 11. " IRQS363 ,IRQS Status Bit 363" "Low,High" textline " " bitfld.long 0x00 10. " IRQS362 ,IRQS Status Bit 362" "Low,High" bitfld.long 0x00 9. " IRQS361 ,IRQS Status Bit 361" "Low,High" bitfld.long 0x00 8. " IRQS360 ,IRQS Status Bit 360" "Low,High" textline " " bitfld.long 0x00 7. " IRQS359 ,IRQS Status Bit 359" "Low,High" bitfld.long 0x00 6. " IRQS358 ,IRQS Status Bit 358" "Low,High" bitfld.long 0x00 5. " IRQS357 ,IRQS Status Bit 357" "Low,High" textline " " bitfld.long 0x00 4. " IRQS356 ,IRQS Status Bit 356" "Low,High" bitfld.long 0x00 3. " IRQS355 ,IRQS Status Bit 355" "Low,High" bitfld.long 0x00 2. " IRQS354 ,IRQS Status Bit 354" "Low,High" textline " " bitfld.long 0x00 1. " IRQS353 ,IRQS Status Bit 353" "Low,High" bitfld.long 0x00 0. " IRQS352 ,IRQS Status Bit 352" "Low,High" else rgroup.long 0x0D30++0x03 line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0D) rgroup.long 0x0D34++0x03 line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12" bitfld.long 0x00 31. " IRQS415 ,IRQS Status Bit 415" "Low,High" bitfld.long 0x00 30. " IRQS414 ,IRQS Status Bit 414" "Low,High" bitfld.long 0x00 29. " IRQS413 ,IRQS Status Bit 413" "Low,High" textline " " bitfld.long 0x00 28. " IRQS412 ,IRQS Status Bit 412" "Low,High" bitfld.long 0x00 27. " IRQS411 ,IRQS Status Bit 411" "Low,High" bitfld.long 0x00 26. " IRQS410 ,IRQS Status Bit 410" "Low,High" textline " " bitfld.long 0x00 25. " IRQS409 ,IRQS Status Bit 409" "Low,High" bitfld.long 0x00 24. " IRQS408 ,IRQS Status Bit 408" "Low,High" bitfld.long 0x00 23. " IRQS407 ,IRQS Status Bit 407" "Low,High" textline " " bitfld.long 0x00 22. " IRQS406 ,IRQS Status Bit 406" "Low,High" bitfld.long 0x00 21. " IRQS405 ,IRQS Status Bit 405" "Low,High" bitfld.long 0x00 20. " IRQS404 ,IRQS Status Bit 404" "Low,High" textline " " bitfld.long 0x00 19. " IRQS403 ,IRQS Status Bit 403" "Low,High" bitfld.long 0x00 18. " IRQS402 ,IRQS Status Bit 402" "Low,High" bitfld.long 0x00 17. " IRQS401 ,IRQS Status Bit 401" "Low,High" textline " " bitfld.long 0x00 16. " IRQS400 ,IRQS Status Bit 400" "Low,High" bitfld.long 0x00 15. " IRQS399 ,IRQS Status Bit 399" "Low,High" bitfld.long 0x00 14. " IRQS398 ,IRQS Status Bit 398" "Low,High" textline " " bitfld.long 0x00 13. " IRQS397 ,IRQS Status Bit 397" "Low,High" bitfld.long 0x00 12. " IRQS396 ,IRQS Status Bit 396" "Low,High" bitfld.long 0x00 11. " IRQS395 ,IRQS Status Bit 395" "Low,High" textline " " bitfld.long 0x00 10. " IRQS394 ,IRQS Status Bit 394" "Low,High" bitfld.long 0x00 9. " IRQS393 ,IRQS Status Bit 393" "Low,High" bitfld.long 0x00 8. " IRQS392 ,IRQS Status Bit 392" "Low,High" textline " " bitfld.long 0x00 7. " IRQS391 ,IRQS Status Bit 391" "Low,High" bitfld.long 0x00 6. " IRQS390 ,IRQS Status Bit 390" "Low,High" bitfld.long 0x00 5. " IRQS389 ,IRQS Status Bit 389" "Low,High" textline " " bitfld.long 0x00 4. " IRQS388 ,IRQS Status Bit 388" "Low,High" bitfld.long 0x00 3. " IRQS387 ,IRQS Status Bit 387" "Low,High" bitfld.long 0x00 2. " IRQS386 ,IRQS Status Bit 386" "Low,High" textline " " bitfld.long 0x00 1. " IRQS385 ,IRQS Status Bit 385" "Low,High" bitfld.long 0x00 0. " IRQS384 ,IRQS Status Bit 384" "Low,High" else rgroup.long 0x0D34++0x03 line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0E) rgroup.long 0x0D38++0x03 line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13" bitfld.long 0x00 31. " IRQS447 ,IRQS Status Bit 447" "Low,High" bitfld.long 0x00 30. " IRQS446 ,IRQS Status Bit 446" "Low,High" bitfld.long 0x00 29. " IRQS445 ,IRQS Status Bit 445" "Low,High" textline " " bitfld.long 0x00 28. " IRQS444 ,IRQS Status Bit 444" "Low,High" bitfld.long 0x00 27. " IRQS443 ,IRQS Status Bit 443" "Low,High" bitfld.long 0x00 26. " IRQS442 ,IRQS Status Bit 442" "Low,High" textline " " bitfld.long 0x00 25. " IRQS441 ,IRQS Status Bit 441" "Low,High" bitfld.long 0x00 24. " IRQS440 ,IRQS Status Bit 440" "Low,High" bitfld.long 0x00 23. " IRQS439 ,IRQS Status Bit 439" "Low,High" textline " " bitfld.long 0x00 22. " IRQS438 ,IRQS Status Bit 438" "Low,High" bitfld.long 0x00 21. " IRQS437 ,IRQS Status Bit 437" "Low,High" bitfld.long 0x00 20. " IRQS436 ,IRQS Status Bit 436" "Low,High" textline " " bitfld.long 0x00 19. " IRQS435 ,IRQS Status Bit 435" "Low,High" bitfld.long 0x00 18. " IRQS434 ,IRQS Status Bit 434" "Low,High" bitfld.long 0x00 17. " IRQS433 ,IRQS Status Bit 433" "Low,High" textline " " bitfld.long 0x00 16. " IRQS432 ,IRQS Status Bit 432" "Low,High" bitfld.long 0x00 15. " IRQS431 ,IRQS Status Bit 431" "Low,High" bitfld.long 0x00 14. " IRQS430 ,IRQS Status Bit 430" "Low,High" textline " " bitfld.long 0x00 13. " IRQS429 ,IRQS Status Bit 429" "Low,High" bitfld.long 0x00 12. " IRQS428 ,IRQS Status Bit 428" "Low,High" bitfld.long 0x00 11. " IRQS427 ,IRQS Status Bit 427" "Low,High" textline " " bitfld.long 0x00 10. " IRQS426 ,IRQS Status Bit 426" "Low,High" bitfld.long 0x00 9. " IRQS425 ,IRQS Status Bit 425" "Low,High" bitfld.long 0x00 8. " IRQS424 ,IRQS Status Bit 424" "Low,High" textline " " bitfld.long 0x00 7. " IRQS423 ,IRQS Status Bit 423" "Low,High" bitfld.long 0x00 6. " IRQS422 ,IRQS Status Bit 422" "Low,High" bitfld.long 0x00 5. " IRQS421 ,IRQS Status Bit 421" "Low,High" textline " " bitfld.long 0x00 4. " IRQS420 ,IRQS Status Bit 420" "Low,High" bitfld.long 0x00 3. " IRQS419 ,IRQS Status Bit 419" "Low,High" bitfld.long 0x00 2. " IRQS418 ,IRQS Status Bit 418" "Low,High" textline " " bitfld.long 0x00 1. " IRQS417 ,IRQS Status Bit 417" "Low,High" bitfld.long 0x00 0. " IRQS416 ,IRQS Status Bit 416" "Low,High" else rgroup.long 0x0D38++0x03 line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x0F) rgroup.long 0x0D3C++0x03 line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14" bitfld.long 0x00 31. " IRQS479 ,IRQS Status Bit 479" "Low,High" bitfld.long 0x00 30. " IRQS478 ,IRQS Status Bit 478" "Low,High" bitfld.long 0x00 29. " IRQS477 ,IRQS Status Bit 477" "Low,High" textline " " bitfld.long 0x00 28. " IRQS476 ,IRQS Status Bit 476" "Low,High" bitfld.long 0x00 27. " IRQS475 ,IRQS Status Bit 475" "Low,High" bitfld.long 0x00 26. " IRQS474 ,IRQS Status Bit 474" "Low,High" textline " " bitfld.long 0x00 25. " IRQS473 ,IRQS Status Bit 473" "Low,High" bitfld.long 0x00 24. " IRQS472 ,IRQS Status Bit 472" "Low,High" bitfld.long 0x00 23. " IRQS471 ,IRQS Status Bit 471" "Low,High" textline " " bitfld.long 0x00 22. " IRQS470 ,IRQS Status Bit 470" "Low,High" bitfld.long 0x00 21. " IRQS469 ,IRQS Status Bit 469" "Low,High" bitfld.long 0x00 20. " IRQS468 ,IRQS Status Bit 468" "Low,High" textline " " bitfld.long 0x00 19. " IRQS467 ,IRQS Status Bit 467" "Low,High" bitfld.long 0x00 18. " IRQS466 ,IRQS Status Bit 466" "Low,High" bitfld.long 0x00 17. " IRQS465 ,IRQS Status Bit 465" "Low,High" textline " " bitfld.long 0x00 16. " IRQS464 ,IRQS Status Bit 464" "Low,High" bitfld.long 0x00 15. " IRQS463 ,IRQS Status Bit 463" "Low,High" bitfld.long 0x00 14. " IRQS462 ,IRQS Status Bit 462" "Low,High" textline " " bitfld.long 0x00 13. " IRQS461 ,IRQS Status Bit 461" "Low,High" bitfld.long 0x00 12. " IRQS460 ,IRQS Status Bit 460" "Low,High" bitfld.long 0x00 11. " IRQS459 ,IRQS Status Bit 459" "Low,High" textline " " bitfld.long 0x00 10. " IRQS458 ,IRQS Status Bit 458" "Low,High" bitfld.long 0x00 9. " IRQS457 ,IRQS Status Bit 457" "Low,High" bitfld.long 0x00 8. " IRQS456 ,IRQS Status Bit 456" "Low,High" textline " " bitfld.long 0x00 7. " IRQS455 ,IRQS Status Bit 455" "Low,High" bitfld.long 0x00 6. " IRQS454 ,IRQS Status Bit 454" "Low,High" bitfld.long 0x00 5. " IRQS453 ,IRQS Status Bit 453" "Low,High" textline " " bitfld.long 0x00 4. " IRQS452 ,IRQS Status Bit 452" "Low,High" bitfld.long 0x00 3. " IRQS451 ,IRQS Status Bit 451" "Low,High" bitfld.long 0x00 2. " IRQS450 ,IRQS Status Bit 450" "Low,High" textline " " bitfld.long 0x00 1. " IRQS449 ,IRQS Status Bit 449" "Low,High" bitfld.long 0x00 0. " IRQS448 ,IRQS Status Bit 448" "Low,High" else rgroup.long 0x0D3C++0x03 line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x10) rgroup.long 0x0D40++0x03 line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15" bitfld.long 0x00 31. " IRQS511 ,IRQS Status Bit 511" "Low,High" bitfld.long 0x00 30. " IRQS510 ,IRQS Status Bit 510" "Low,High" bitfld.long 0x00 29. " IRQS509 ,IRQS Status Bit 509" "Low,High" textline " " bitfld.long 0x00 28. " IRQS508 ,IRQS Status Bit 508" "Low,High" bitfld.long 0x00 27. " IRQS507 ,IRQS Status Bit 507" "Low,High" bitfld.long 0x00 26. " IRQS506 ,IRQS Status Bit 506" "Low,High" textline " " bitfld.long 0x00 25. " IRQS505 ,IRQS Status Bit 505" "Low,High" bitfld.long 0x00 24. " IRQS504 ,IRQS Status Bit 504" "Low,High" bitfld.long 0x00 23. " IRQS503 ,IRQS Status Bit 503" "Low,High" textline " " bitfld.long 0x00 22. " IRQS502 ,IRQS Status Bit 502" "Low,High" bitfld.long 0x00 21. " IRQS501 ,IRQS Status Bit 501" "Low,High" bitfld.long 0x00 20. " IRQS500 ,IRQS Status Bit 500" "Low,High" textline " " bitfld.long 0x00 19. " IRQS499 ,IRQS Status Bit 499" "Low,High" bitfld.long 0x00 18. " IRQS498 ,IRQS Status Bit 498" "Low,High" bitfld.long 0x00 17. " IRQS497 ,IRQS Status Bit 497" "Low,High" textline " " bitfld.long 0x00 16. " IRQS496 ,IRQS Status Bit 496" "Low,High" bitfld.long 0x00 15. " IRQS495 ,IRQS Status Bit 495" "Low,High" bitfld.long 0x00 14. " IRQS494 ,IRQS Status Bit 494" "Low,High" textline " " bitfld.long 0x00 13. " IRQS493 ,IRQS Status Bit 493" "Low,High" bitfld.long 0x00 12. " IRQS492 ,IRQS Status Bit 492" "Low,High" bitfld.long 0x00 11. " IRQS491 ,IRQS Status Bit 491" "Low,High" textline " " bitfld.long 0x00 10. " IRQS490 ,IRQS Status Bit 490" "Low,High" bitfld.long 0x00 9. " IRQS489 ,IRQS Status Bit 489" "Low,High" bitfld.long 0x00 8. " IRQS488 ,IRQS Status Bit 488" "Low,High" textline " " bitfld.long 0x00 7. " IRQS487 ,IRQS Status Bit 487" "Low,High" bitfld.long 0x00 6. " IRQS486 ,IRQS Status Bit 486" "Low,High" bitfld.long 0x00 5. " IRQS485 ,IRQS Status Bit 485" "Low,High" textline " " bitfld.long 0x00 4. " IRQS484 ,IRQS Status Bit 484" "Low,High" bitfld.long 0x00 3. " IRQS483 ,IRQS Status Bit 483" "Low,High" bitfld.long 0x00 2. " IRQS482 ,IRQS Status Bit 482" "Low,High" textline " " bitfld.long 0x00 1. " IRQS481 ,IRQS Status Bit 481" "Low,High" bitfld.long 0x00 0. " IRQS480 ,IRQS Status Bit 480" "Low,High" else rgroup.long 0x0D40++0x03 line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x11) rgroup.long 0x0D44++0x03 line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16" bitfld.long 0x00 31. " IRQS543 ,IRQS Status Bit 543" "Low,High" bitfld.long 0x00 30. " IRQS542 ,IRQS Status Bit 542" "Low,High" bitfld.long 0x00 29. " IRQS541 ,IRQS Status Bit 541" "Low,High" textline " " bitfld.long 0x00 28. " IRQS540 ,IRQS Status Bit 540" "Low,High" bitfld.long 0x00 27. " IRQS539 ,IRQS Status Bit 539" "Low,High" bitfld.long 0x00 26. " IRQS538 ,IRQS Status Bit 538" "Low,High" textline " " bitfld.long 0x00 25. " IRQS537 ,IRQS Status Bit 537" "Low,High" bitfld.long 0x00 24. " IRQS536 ,IRQS Status Bit 536" "Low,High" bitfld.long 0x00 23. " IRQS535 ,IRQS Status Bit 535" "Low,High" textline " " bitfld.long 0x00 22. " IRQS534 ,IRQS Status Bit 534" "Low,High" bitfld.long 0x00 21. " IRQS533 ,IRQS Status Bit 533" "Low,High" bitfld.long 0x00 20. " IRQS532 ,IRQS Status Bit 532" "Low,High" textline " " bitfld.long 0x00 19. " IRQS531 ,IRQS Status Bit 531" "Low,High" bitfld.long 0x00 18. " IRQS530 ,IRQS Status Bit 530" "Low,High" bitfld.long 0x00 17. " IRQS529 ,IRQS Status Bit 529" "Low,High" textline " " bitfld.long 0x00 16. " IRQS528 ,IRQS Status Bit 528" "Low,High" bitfld.long 0x00 15. " IRQS527 ,IRQS Status Bit 527" "Low,High" bitfld.long 0x00 14. " IRQS526 ,IRQS Status Bit 526" "Low,High" textline " " bitfld.long 0x00 13. " IRQS525 ,IRQS Status Bit 525" "Low,High" bitfld.long 0x00 12. " IRQS524 ,IRQS Status Bit 524" "Low,High" bitfld.long 0x00 11. " IRQS523 ,IRQS Status Bit 523" "Low,High" textline " " bitfld.long 0x00 10. " IRQS522 ,IRQS Status Bit 522" "Low,High" bitfld.long 0x00 9. " IRQS521 ,IRQS Status Bit 521" "Low,High" bitfld.long 0x00 8. " IRQS520 ,IRQS Status Bit 520" "Low,High" textline " " bitfld.long 0x00 7. " IRQS519 ,IRQS Status Bit 519" "Low,High" bitfld.long 0x00 6. " IRQS518 ,IRQS Status Bit 518" "Low,High" bitfld.long 0x00 5. " IRQS517 ,IRQS Status Bit 517" "Low,High" textline " " bitfld.long 0x00 4. " IRQS516 ,IRQS Status Bit 516" "Low,High" bitfld.long 0x00 3. " IRQS515 ,IRQS Status Bit 515" "Low,High" bitfld.long 0x00 2. " IRQS514 ,IRQS Status Bit 514" "Low,High" textline " " bitfld.long 0x00 1. " IRQS513 ,IRQS Status Bit 513" "Low,High" bitfld.long 0x00 0. " IRQS512 ,IRQS Status Bit 512" "Low,High" else rgroup.long 0x0D44++0x03 line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x12) rgroup.long 0x0D48++0x03 line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17" bitfld.long 0x00 31. " IRQS575 ,IRQS Status Bit 575" "Low,High" bitfld.long 0x00 30. " IRQS574 ,IRQS Status Bit 574" "Low,High" bitfld.long 0x00 29. " IRQS573 ,IRQS Status Bit 573" "Low,High" textline " " bitfld.long 0x00 28. " IRQS572 ,IRQS Status Bit 572" "Low,High" bitfld.long 0x00 27. " IRQS571 ,IRQS Status Bit 571" "Low,High" bitfld.long 0x00 26. " IRQS570 ,IRQS Status Bit 570" "Low,High" textline " " bitfld.long 0x00 25. " IRQS569 ,IRQS Status Bit 569" "Low,High" bitfld.long 0x00 24. " IRQS568 ,IRQS Status Bit 568" "Low,High" bitfld.long 0x00 23. " IRQS567 ,IRQS Status Bit 567" "Low,High" textline " " bitfld.long 0x00 22. " IRQS566 ,IRQS Status Bit 566" "Low,High" bitfld.long 0x00 21. " IRQS565 ,IRQS Status Bit 565" "Low,High" bitfld.long 0x00 20. " IRQS564 ,IRQS Status Bit 564" "Low,High" textline " " bitfld.long 0x00 19. " IRQS563 ,IRQS Status Bit 563" "Low,High" bitfld.long 0x00 18. " IRQS562 ,IRQS Status Bit 562" "Low,High" bitfld.long 0x00 17. " IRQS561 ,IRQS Status Bit 561" "Low,High" textline " " bitfld.long 0x00 16. " IRQS560 ,IRQS Status Bit 560" "Low,High" bitfld.long 0x00 15. " IRQS559 ,IRQS Status Bit 559" "Low,High" bitfld.long 0x00 14. " IRQS558 ,IRQS Status Bit 558" "Low,High" textline " " bitfld.long 0x00 13. " IRQS557 ,IRQS Status Bit 557" "Low,High" bitfld.long 0x00 12. " IRQS556 ,IRQS Status Bit 556" "Low,High" bitfld.long 0x00 11. " IRQS555 ,IRQS Status Bit 555" "Low,High" textline " " bitfld.long 0x00 10. " IRQS554 ,IRQS Status Bit 554" "Low,High" bitfld.long 0x00 9. " IRQS553 ,IRQS Status Bit 553" "Low,High" bitfld.long 0x00 8. " IRQS552 ,IRQS Status Bit 552" "Low,High" textline " " bitfld.long 0x00 7. " IRQS551 ,IRQS Status Bit 551" "Low,High" bitfld.long 0x00 6. " IRQS550 ,IRQS Status Bit 550" "Low,High" bitfld.long 0x00 5. " IRQS549 ,IRQS Status Bit 549" "Low,High" textline " " bitfld.long 0x00 4. " IRQS548 ,IRQS Status Bit 548" "Low,High" bitfld.long 0x00 3. " IRQS547 ,IRQS Status Bit 547" "Low,High" bitfld.long 0x00 2. " IRQS546 ,IRQS Status Bit 546" "Low,High" textline " " bitfld.long 0x00 1. " IRQS545 ,IRQS Status Bit 545" "Low,High" bitfld.long 0x00 0. " IRQS544 ,IRQS Status Bit 544" "Low,High" else rgroup.long 0x0D48++0x03 line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x13) rgroup.long 0x0D4C++0x03 line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18" bitfld.long 0x00 31. " IRQS607 ,IRQS Status Bit 607" "Low,High" bitfld.long 0x00 30. " IRQS606 ,IRQS Status Bit 606" "Low,High" bitfld.long 0x00 29. " IRQS605 ,IRQS Status Bit 605" "Low,High" textline " " bitfld.long 0x00 28. " IRQS604 ,IRQS Status Bit 604" "Low,High" bitfld.long 0x00 27. " IRQS603 ,IRQS Status Bit 603" "Low,High" bitfld.long 0x00 26. " IRQS602 ,IRQS Status Bit 602" "Low,High" textline " " bitfld.long 0x00 25. " IRQS601 ,IRQS Status Bit 601" "Low,High" bitfld.long 0x00 24. " IRQS600 ,IRQS Status Bit 600" "Low,High" bitfld.long 0x00 23. " IRQS599 ,IRQS Status Bit 599" "Low,High" textline " " bitfld.long 0x00 22. " IRQS598 ,IRQS Status Bit 598" "Low,High" bitfld.long 0x00 21. " IRQS597 ,IRQS Status Bit 597" "Low,High" bitfld.long 0x00 20. " IRQS596 ,IRQS Status Bit 596" "Low,High" textline " " bitfld.long 0x00 19. " IRQS595 ,IRQS Status Bit 595" "Low,High" bitfld.long 0x00 18. " IRQS594 ,IRQS Status Bit 594" "Low,High" bitfld.long 0x00 17. " IRQS593 ,IRQS Status Bit 593" "Low,High" textline " " bitfld.long 0x00 16. " IRQS592 ,IRQS Status Bit 592" "Low,High" bitfld.long 0x00 15. " IRQS591 ,IRQS Status Bit 591" "Low,High" bitfld.long 0x00 14. " IRQS590 ,IRQS Status Bit 590" "Low,High" textline " " bitfld.long 0x00 13. " IRQS589 ,IRQS Status Bit 589" "Low,High" bitfld.long 0x00 12. " IRQS588 ,IRQS Status Bit 588" "Low,High" bitfld.long 0x00 11. " IRQS587 ,IRQS Status Bit 587" "Low,High" textline " " bitfld.long 0x00 10. " IRQS586 ,IRQS Status Bit 586" "Low,High" bitfld.long 0x00 9. " IRQS585 ,IRQS Status Bit 585" "Low,High" bitfld.long 0x00 8. " IRQS584 ,IRQS Status Bit 584" "Low,High" textline " " bitfld.long 0x00 7. " IRQS583 ,IRQS Status Bit 583" "Low,High" bitfld.long 0x00 6. " IRQS582 ,IRQS Status Bit 582" "Low,High" bitfld.long 0x00 5. " IRQS581 ,IRQS Status Bit 581" "Low,High" textline " " bitfld.long 0x00 4. " IRQS580 ,IRQS Status Bit 580" "Low,High" bitfld.long 0x00 3. " IRQS579 ,IRQS Status Bit 579" "Low,High" bitfld.long 0x00 2. " IRQS578 ,IRQS Status Bit 578" "Low,High" textline " " bitfld.long 0x00 1. " IRQS577 ,IRQS Status Bit 577" "Low,High" bitfld.long 0x00 0. " IRQS576 ,IRQS Status Bit 576" "Low,High" else rgroup.long 0x0D4C++0x03 line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x14) rgroup.long 0x0D50++0x03 line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19" bitfld.long 0x00 31. " IRQS639 ,IRQS Status Bit 639" "Low,High" bitfld.long 0x00 30. " IRQS638 ,IRQS Status Bit 638" "Low,High" bitfld.long 0x00 29. " IRQS637 ,IRQS Status Bit 637" "Low,High" textline " " bitfld.long 0x00 28. " IRQS636 ,IRQS Status Bit 636" "Low,High" bitfld.long 0x00 27. " IRQS635 ,IRQS Status Bit 635" "Low,High" bitfld.long 0x00 26. " IRQS634 ,IRQS Status Bit 634" "Low,High" textline " " bitfld.long 0x00 25. " IRQS633 ,IRQS Status Bit 633" "Low,High" bitfld.long 0x00 24. " IRQS632 ,IRQS Status Bit 632" "Low,High" bitfld.long 0x00 23. " IRQS631 ,IRQS Status Bit 631" "Low,High" textline " " bitfld.long 0x00 22. " IRQS630 ,IRQS Status Bit 630" "Low,High" bitfld.long 0x00 21. " IRQS629 ,IRQS Status Bit 629" "Low,High" bitfld.long 0x00 20. " IRQS628 ,IRQS Status Bit 628" "Low,High" textline " " bitfld.long 0x00 19. " IRQS627 ,IRQS Status Bit 627" "Low,High" bitfld.long 0x00 18. " IRQS626 ,IRQS Status Bit 626" "Low,High" bitfld.long 0x00 17. " IRQS625 ,IRQS Status Bit 625" "Low,High" textline " " bitfld.long 0x00 16. " IRQS624 ,IRQS Status Bit 624" "Low,High" bitfld.long 0x00 15. " IRQS623 ,IRQS Status Bit 623" "Low,High" bitfld.long 0x00 14. " IRQS622 ,IRQS Status Bit 622" "Low,High" textline " " bitfld.long 0x00 13. " IRQS621 ,IRQS Status Bit 621" "Low,High" bitfld.long 0x00 12. " IRQS620 ,IRQS Status Bit 620" "Low,High" bitfld.long 0x00 11. " IRQS619 ,IRQS Status Bit 619" "Low,High" textline " " bitfld.long 0x00 10. " IRQS618 ,IRQS Status Bit 618" "Low,High" bitfld.long 0x00 9. " IRQS617 ,IRQS Status Bit 617" "Low,High" bitfld.long 0x00 8. " IRQS616 ,IRQS Status Bit 616" "Low,High" textline " " bitfld.long 0x00 7. " IRQS615 ,IRQS Status Bit 615" "Low,High" bitfld.long 0x00 6. " IRQS614 ,IRQS Status Bit 614" "Low,High" bitfld.long 0x00 5. " IRQS613 ,IRQS Status Bit 613" "Low,High" textline " " bitfld.long 0x00 4. " IRQS612 ,IRQS Status Bit 612" "Low,High" bitfld.long 0x00 3. " IRQS611 ,IRQS Status Bit 611" "Low,High" bitfld.long 0x00 2. " IRQS610 ,IRQS Status Bit 610" "Low,High" textline " " bitfld.long 0x00 1. " IRQS609 ,IRQS Status Bit 609" "Low,High" bitfld.long 0x00 0. " IRQS608 ,IRQS Status Bit 608" "Low,High" else rgroup.long 0x0D50++0x03 line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x15) rgroup.long 0x0D54++0x03 line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20" bitfld.long 0x00 31. " IRQS671 ,IRQS Status Bit 671" "Low,High" bitfld.long 0x00 30. " IRQS670 ,IRQS Status Bit 670" "Low,High" bitfld.long 0x00 29. " IRQS669 ,IRQS Status Bit 669" "Low,High" textline " " bitfld.long 0x00 28. " IRQS668 ,IRQS Status Bit 668" "Low,High" bitfld.long 0x00 27. " IRQS667 ,IRQS Status Bit 667" "Low,High" bitfld.long 0x00 26. " IRQS666 ,IRQS Status Bit 666" "Low,High" textline " " bitfld.long 0x00 25. " IRQS665 ,IRQS Status Bit 665" "Low,High" bitfld.long 0x00 24. " IRQS664 ,IRQS Status Bit 664" "Low,High" bitfld.long 0x00 23. " IRQS663 ,IRQS Status Bit 663" "Low,High" textline " " bitfld.long 0x00 22. " IRQS662 ,IRQS Status Bit 662" "Low,High" bitfld.long 0x00 21. " IRQS661 ,IRQS Status Bit 661" "Low,High" bitfld.long 0x00 20. " IRQS660 ,IRQS Status Bit 660" "Low,High" textline " " bitfld.long 0x00 19. " IRQS659 ,IRQS Status Bit 659" "Low,High" bitfld.long 0x00 18. " IRQS658 ,IRQS Status Bit 658" "Low,High" bitfld.long 0x00 17. " IRQS657 ,IRQS Status Bit 657" "Low,High" textline " " bitfld.long 0x00 16. " IRQS656 ,IRQS Status Bit 656" "Low,High" bitfld.long 0x00 15. " IRQS655 ,IRQS Status Bit 655" "Low,High" bitfld.long 0x00 14. " IRQS654 ,IRQS Status Bit 654" "Low,High" textline " " bitfld.long 0x00 13. " IRQS653 ,IRQS Status Bit 653" "Low,High" bitfld.long 0x00 12. " IRQS652 ,IRQS Status Bit 652" "Low,High" bitfld.long 0x00 11. " IRQS651 ,IRQS Status Bit 651" "Low,High" textline " " bitfld.long 0x00 10. " IRQS650 ,IRQS Status Bit 650" "Low,High" bitfld.long 0x00 9. " IRQS649 ,IRQS Status Bit 649" "Low,High" bitfld.long 0x00 8. " IRQS648 ,IRQS Status Bit 648" "Low,High" textline " " bitfld.long 0x00 7. " IRQS647 ,IRQS Status Bit 647" "Low,High" bitfld.long 0x00 6. " IRQS646 ,IRQS Status Bit 646" "Low,High" bitfld.long 0x00 5. " IRQS645 ,IRQS Status Bit 645" "Low,High" textline " " bitfld.long 0x00 4. " IRQS644 ,IRQS Status Bit 644" "Low,High" bitfld.long 0x00 3. " IRQS643 ,IRQS Status Bit 643" "Low,High" bitfld.long 0x00 2. " IRQS642 ,IRQS Status Bit 642" "Low,High" textline " " bitfld.long 0x00 1. " IRQS641 ,IRQS Status Bit 641" "Low,High" bitfld.long 0x00 0. " IRQS640 ,IRQS Status Bit 640" "Low,High" else rgroup.long 0x0D54++0x03 line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x16) rgroup.long 0x0D58++0x03 line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21" bitfld.long 0x00 31. " IRQS703 ,IRQS Status Bit 703" "Low,High" bitfld.long 0x00 30. " IRQS702 ,IRQS Status Bit 702" "Low,High" bitfld.long 0x00 29. " IRQS701 ,IRQS Status Bit 701" "Low,High" textline " " bitfld.long 0x00 28. " IRQS700 ,IRQS Status Bit 700" "Low,High" bitfld.long 0x00 27. " IRQS699 ,IRQS Status Bit 699" "Low,High" bitfld.long 0x00 26. " IRQS698 ,IRQS Status Bit 698" "Low,High" textline " " bitfld.long 0x00 25. " IRQS697 ,IRQS Status Bit 697" "Low,High" bitfld.long 0x00 24. " IRQS696 ,IRQS Status Bit 696" "Low,High" bitfld.long 0x00 23. " IRQS695 ,IRQS Status Bit 695" "Low,High" textline " " bitfld.long 0x00 22. " IRQS694 ,IRQS Status Bit 694" "Low,High" bitfld.long 0x00 21. " IRQS693 ,IRQS Status Bit 693" "Low,High" bitfld.long 0x00 20. " IRQS692 ,IRQS Status Bit 692" "Low,High" textline " " bitfld.long 0x00 19. " IRQS691 ,IRQS Status Bit 691" "Low,High" bitfld.long 0x00 18. " IRQS690 ,IRQS Status Bit 690" "Low,High" bitfld.long 0x00 17. " IRQS689 ,IRQS Status Bit 689" "Low,High" textline " " bitfld.long 0x00 16. " IRQS688 ,IRQS Status Bit 688" "Low,High" bitfld.long 0x00 15. " IRQS687 ,IRQS Status Bit 687" "Low,High" bitfld.long 0x00 14. " IRQS686 ,IRQS Status Bit 686" "Low,High" textline " " bitfld.long 0x00 13. " IRQS685 ,IRQS Status Bit 685" "Low,High" bitfld.long 0x00 12. " IRQS684 ,IRQS Status Bit 684" "Low,High" bitfld.long 0x00 11. " IRQS683 ,IRQS Status Bit 683" "Low,High" textline " " bitfld.long 0x00 10. " IRQS682 ,IRQS Status Bit 682" "Low,High" bitfld.long 0x00 9. " IRQS681 ,IRQS Status Bit 681" "Low,High" bitfld.long 0x00 8. " IRQS680 ,IRQS Status Bit 680" "Low,High" textline " " bitfld.long 0x00 7. " IRQS679 ,IRQS Status Bit 679" "Low,High" bitfld.long 0x00 6. " IRQS678 ,IRQS Status Bit 678" "Low,High" bitfld.long 0x00 5. " IRQS677 ,IRQS Status Bit 677" "Low,High" textline " " bitfld.long 0x00 4. " IRQS676 ,IRQS Status Bit 676" "Low,High" bitfld.long 0x00 3. " IRQS675 ,IRQS Status Bit 675" "Low,High" bitfld.long 0x00 2. " IRQS674 ,IRQS Status Bit 674" "Low,High" textline " " bitfld.long 0x00 1. " IRQS673 ,IRQS Status Bit 673" "Low,High" bitfld.long 0x00 0. " IRQS672 ,IRQS Status Bit 672" "Low,High" else rgroup.long 0x0D58++0x03 line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x17) rgroup.long 0x0D5C++0x03 line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22" bitfld.long 0x00 31. " IRQS735 ,IRQS Status Bit 735" "Low,High" bitfld.long 0x00 30. " IRQS734 ,IRQS Status Bit 734" "Low,High" bitfld.long 0x00 29. " IRQS733 ,IRQS Status Bit 733" "Low,High" textline " " bitfld.long 0x00 28. " IRQS732 ,IRQS Status Bit 732" "Low,High" bitfld.long 0x00 27. " IRQS731 ,IRQS Status Bit 731" "Low,High" bitfld.long 0x00 26. " IRQS730 ,IRQS Status Bit 730" "Low,High" textline " " bitfld.long 0x00 25. " IRQS729 ,IRQS Status Bit 729" "Low,High" bitfld.long 0x00 24. " IRQS728 ,IRQS Status Bit 728" "Low,High" bitfld.long 0x00 23. " IRQS727 ,IRQS Status Bit 727" "Low,High" textline " " bitfld.long 0x00 22. " IRQS726 ,IRQS Status Bit 726" "Low,High" bitfld.long 0x00 21. " IRQS725 ,IRQS Status Bit 725" "Low,High" bitfld.long 0x00 20. " IRQS724 ,IRQS Status Bit 724" "Low,High" textline " " bitfld.long 0x00 19. " IRQS723 ,IRQS Status Bit 723" "Low,High" bitfld.long 0x00 18. " IRQS722 ,IRQS Status Bit 722" "Low,High" bitfld.long 0x00 17. " IRQS721 ,IRQS Status Bit 721" "Low,High" textline " " bitfld.long 0x00 16. " IRQS720 ,IRQS Status Bit 720" "Low,High" bitfld.long 0x00 15. " IRQS719 ,IRQS Status Bit 719" "Low,High" bitfld.long 0x00 14. " IRQS718 ,IRQS Status Bit 718" "Low,High" textline " " bitfld.long 0x00 13. " IRQS717 ,IRQS Status Bit 717" "Low,High" bitfld.long 0x00 12. " IRQS716 ,IRQS Status Bit 716" "Low,High" bitfld.long 0x00 11. " IRQS715 ,IRQS Status Bit 715" "Low,High" textline " " bitfld.long 0x00 10. " IRQS714 ,IRQS Status Bit 714" "Low,High" bitfld.long 0x00 9. " IRQS713 ,IRQS Status Bit 713" "Low,High" bitfld.long 0x00 8. " IRQS712 ,IRQS Status Bit 712" "Low,High" textline " " bitfld.long 0x00 7. " IRQS711 ,IRQS Status Bit 711" "Low,High" bitfld.long 0x00 6. " IRQS710 ,IRQS Status Bit 710" "Low,High" bitfld.long 0x00 5. " IRQS709 ,IRQS Status Bit 709" "Low,High" textline " " bitfld.long 0x00 4. " IRQS708 ,IRQS Status Bit 708" "Low,High" bitfld.long 0x00 3. " IRQS707 ,IRQS Status Bit 707" "Low,High" bitfld.long 0x00 2. " IRQS706 ,IRQS Status Bit 706" "Low,High" textline " " bitfld.long 0x00 1. " IRQS705 ,IRQS Status Bit 705" "Low,High" bitfld.long 0x00 0. " IRQS704 ,IRQS Status Bit 704" "Low,High" else rgroup.long 0x0D5C++0x03 line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x18) rgroup.long 0x060++0x03 line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23" bitfld.long 0x00 31. " IRQS767 ,IRQS Status Bit 767" "Low,High" bitfld.long 0x00 30. " IRQS766 ,IRQS Status Bit 766" "Low,High" bitfld.long 0x00 29. " IRQS765 ,IRQS Status Bit 765" "Low,High" textline " " bitfld.long 0x00 28. " IRQS764 ,IRQS Status Bit 764" "Low,High" bitfld.long 0x00 27. " IRQS763 ,IRQS Status Bit 763" "Low,High" bitfld.long 0x00 26. " IRQS762 ,IRQS Status Bit 762" "Low,High" textline " " bitfld.long 0x00 25. " IRQS761 ,IRQS Status Bit 761" "Low,High" bitfld.long 0x00 24. " IRQS760 ,IRQS Status Bit 760" "Low,High" bitfld.long 0x00 23. " IRQS759 ,IRQS Status Bit 759" "Low,High" textline " " bitfld.long 0x00 22. " IRQS758 ,IRQS Status Bit 758" "Low,High" bitfld.long 0x00 21. " IRQS757 ,IRQS Status Bit 757" "Low,High" bitfld.long 0x00 20. " IRQS756 ,IRQS Status Bit 756" "Low,High" textline " " bitfld.long 0x00 19. " IRQS755 ,IRQS Status Bit 755" "Low,High" bitfld.long 0x00 18. " IRQS754 ,IRQS Status Bit 754" "Low,High" bitfld.long 0x00 17. " IRQS753 ,IRQS Status Bit 753" "Low,High" textline " " bitfld.long 0x00 16. " IRQS752 ,IRQS Status Bit 752" "Low,High" bitfld.long 0x00 15. " IRQS751 ,IRQS Status Bit 751" "Low,High" bitfld.long 0x00 14. " IRQS750 ,IRQS Status Bit 750" "Low,High" textline " " bitfld.long 0x00 13. " IRQS749 ,IRQS Status Bit 749" "Low,High" bitfld.long 0x00 12. " IRQS748 ,IRQS Status Bit 748" "Low,High" bitfld.long 0x00 11. " IRQS747 ,IRQS Status Bit 747" "Low,High" textline " " bitfld.long 0x00 10. " IRQS746 ,IRQS Status Bit 746" "Low,High" bitfld.long 0x00 9. " IRQS745 ,IRQS Status Bit 745" "Low,High" bitfld.long 0x00 8. " IRQS744 ,IRQS Status Bit 744" "Low,High" textline " " bitfld.long 0x00 7. " IRQS743 ,IRQS Status Bit 743" "Low,High" bitfld.long 0x00 6. " IRQS742 ,IRQS Status Bit 742" "Low,High" bitfld.long 0x00 5. " IRQS741 ,IRQS Status Bit 741" "Low,High" textline " " bitfld.long 0x00 4. " IRQS740 ,IRQS Status Bit 740" "Low,High" bitfld.long 0x00 3. " IRQS739 ,IRQS Status Bit 739" "Low,High" bitfld.long 0x00 2. " IRQS738 ,IRQS Status Bit 738" "Low,High" textline " " bitfld.long 0x00 1. " IRQS737 ,IRQS Status Bit 737" "Low,High" bitfld.long 0x00 0. " IRQS736 ,IRQS Status Bit 736" "Low,High" else rgroup.long 0x0D60++0x03 line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x19) rgroup.long 0x0D64++0x03 line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24" bitfld.long 0x00 31. " IRQS799 ,IRQS Status Bit 799" "Low,High" bitfld.long 0x00 30. " IRQS798 ,IRQS Status Bit 798" "Low,High" bitfld.long 0x00 29. " IRQS797 ,IRQS Status Bit 797" "Low,High" textline " " bitfld.long 0x00 28. " IRQS796 ,IRQS Status Bit 796" "Low,High" bitfld.long 0x00 27. " IRQS795 ,IRQS Status Bit 795" "Low,High" bitfld.long 0x00 26. " IRQS794 ,IRQS Status Bit 794" "Low,High" textline " " bitfld.long 0x00 25. " IRQS793 ,IRQS Status Bit 793" "Low,High" bitfld.long 0x00 24. " IRQS792 ,IRQS Status Bit 792" "Low,High" bitfld.long 0x00 23. " IRQS791 ,IRQS Status Bit 791" "Low,High" textline " " bitfld.long 0x00 22. " IRQS790 ,IRQS Status Bit 790" "Low,High" bitfld.long 0x00 21. " IRQS789 ,IRQS Status Bit 789" "Low,High" bitfld.long 0x00 20. " IRQS788 ,IRQS Status Bit 788" "Low,High" textline " " bitfld.long 0x00 19. " IRQS787 ,IRQS Status Bit 787" "Low,High" bitfld.long 0x00 18. " IRQS786 ,IRQS Status Bit 786" "Low,High" bitfld.long 0x00 17. " IRQS785 ,IRQS Status Bit 785" "Low,High" textline " " bitfld.long 0x00 16. " IRQS784 ,IRQS Status Bit 784" "Low,High" bitfld.long 0x00 15. " IRQS783 ,IRQS Status Bit 783" "Low,High" bitfld.long 0x00 14. " IRQS782 ,IRQS Status Bit 782" "Low,High" textline " " bitfld.long 0x00 13. " IRQS781 ,IRQS Status Bit 781" "Low,High" bitfld.long 0x00 12. " IRQS780 ,IRQS Status Bit 780" "Low,High" bitfld.long 0x00 11. " IRQS779 ,IRQS Status Bit 779" "Low,High" textline " " bitfld.long 0x00 10. " IRQS778 ,IRQS Status Bit 778" "Low,High" bitfld.long 0x00 9. " IRQS777 ,IRQS Status Bit 777" "Low,High" bitfld.long 0x00 8. " IRQS776 ,IRQS Status Bit 776" "Low,High" textline " " bitfld.long 0x00 7. " IRQS775 ,IRQS Status Bit 775" "Low,High" bitfld.long 0x00 6. " IRQS774 ,IRQS Status Bit 774" "Low,High" bitfld.long 0x00 5. " IRQS773 ,IRQS Status Bit 773" "Low,High" textline " " bitfld.long 0x00 4. " IRQS772 ,IRQS Status Bit 772" "Low,High" bitfld.long 0x00 3. " IRQS771 ,IRQS Status Bit 771" "Low,High" bitfld.long 0x00 2. " IRQS770 ,IRQS Status Bit 770" "Low,High" textline " " bitfld.long 0x00 1. " IRQS769 ,IRQS Status Bit 769" "Low,High" bitfld.long 0x00 0. " IRQS768 ,IRQS Status Bit 768" "Low,High" else rgroup.long 0x0D64++0x03 line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1A) rgroup.long 0x0D68++0x03 line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25" bitfld.long 0x00 31. " IRQS831 ,IRQS Status Bit 831" "Low,High" bitfld.long 0x00 30. " IRQS830 ,IRQS Status Bit 830" "Low,High" bitfld.long 0x00 29. " IRQS829 ,IRQS Status Bit 829" "Low,High" textline " " bitfld.long 0x00 28. " IRQS828 ,IRQS Status Bit 828" "Low,High" bitfld.long 0x00 27. " IRQS827 ,IRQS Status Bit 827" "Low,High" bitfld.long 0x00 26. " IRQS826 ,IRQS Status Bit 826" "Low,High" textline " " bitfld.long 0x00 25. " IRQS825 ,IRQS Status Bit 825" "Low,High" bitfld.long 0x00 24. " IRQS824 ,IRQS Status Bit 824" "Low,High" bitfld.long 0x00 23. " IRQS823 ,IRQS Status Bit 823" "Low,High" textline " " bitfld.long 0x00 22. " IRQS822 ,IRQS Status Bit 822" "Low,High" bitfld.long 0x00 21. " IRQS821 ,IRQS Status Bit 821" "Low,High" bitfld.long 0x00 20. " IRQS820 ,IRQS Status Bit 820" "Low,High" textline " " bitfld.long 0x00 19. " IRQS819 ,IRQS Status Bit 819" "Low,High" bitfld.long 0x00 18. " IRQS818 ,IRQS Status Bit 818" "Low,High" bitfld.long 0x00 17. " IRQS817 ,IRQS Status Bit 817" "Low,High" textline " " bitfld.long 0x00 16. " IRQS816 ,IRQS Status Bit 816" "Low,High" bitfld.long 0x00 15. " IRQS815 ,IRQS Status Bit 815" "Low,High" bitfld.long 0x00 14. " IRQS814 ,IRQS Status Bit 814" "Low,High" textline " " bitfld.long 0x00 13. " IRQS813 ,IRQS Status Bit 813" "Low,High" bitfld.long 0x00 12. " IRQS812 ,IRQS Status Bit 812" "Low,High" bitfld.long 0x00 11. " IRQS811 ,IRQS Status Bit 811" "Low,High" textline " " bitfld.long 0x00 10. " IRQS810 ,IRQS Status Bit 810" "Low,High" bitfld.long 0x00 9. " IRQS809 ,IRQS Status Bit 809" "Low,High" bitfld.long 0x00 8. " IRQS808 ,IRQS Status Bit 808" "Low,High" textline " " bitfld.long 0x00 7. " IRQS807 ,IRQS Status Bit 807" "Low,High" bitfld.long 0x00 6. " IRQS806 ,IRQS Status Bit 806" "Low,High" bitfld.long 0x00 5. " IRQS805 ,IRQS Status Bit 805" "Low,High" textline " " bitfld.long 0x00 4. " IRQS804 ,IRQS Status Bit 804" "Low,High" bitfld.long 0x00 3. " IRQS803 ,IRQS Status Bit 803" "Low,High" bitfld.long 0x00 2. " IRQS802 ,IRQS Status Bit 802" "Low,High" textline " " bitfld.long 0x00 1. " IRQS801 ,IRQS Status Bit 801" "Low,High" bitfld.long 0x00 0. " IRQS800 ,IRQS Status Bit 800" "Low,High" else rgroup.long 0x0D68++0x03 line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1B) rgroup.long 0x0D6C++0x03 line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26" bitfld.long 0x00 31. " IRQS863 ,IRQS Status Bit 863" "Low,High" bitfld.long 0x00 30. " IRQS862 ,IRQS Status Bit 862" "Low,High" bitfld.long 0x00 29. " IRQS861 ,IRQS Status Bit 861" "Low,High" textline " " bitfld.long 0x00 28. " IRQS860 ,IRQS Status Bit 860" "Low,High" bitfld.long 0x00 27. " IRQS859 ,IRQS Status Bit 859" "Low,High" bitfld.long 0x00 26. " IRQS858 ,IRQS Status Bit 858" "Low,High" textline " " bitfld.long 0x00 25. " IRQS857 ,IRQS Status Bit 857" "Low,High" bitfld.long 0x00 24. " IRQS856 ,IRQS Status Bit 856" "Low,High" bitfld.long 0x00 23. " IRQS855 ,IRQS Status Bit 855" "Low,High" textline " " bitfld.long 0x00 22. " IRQS854 ,IRQS Status Bit 854" "Low,High" bitfld.long 0x00 21. " IRQS853 ,IRQS Status Bit 853" "Low,High" bitfld.long 0x00 20. " IRQS852 ,IRQS Status Bit 852" "Low,High" textline " " bitfld.long 0x00 19. " IRQS851 ,IRQS Status Bit 851" "Low,High" bitfld.long 0x00 18. " IRQS850 ,IRQS Status Bit 850" "Low,High" bitfld.long 0x00 17. " IRQS849 ,IRQS Status Bit 849" "Low,High" textline " " bitfld.long 0x00 16. " IRQS848 ,IRQS Status Bit 848" "Low,High" bitfld.long 0x00 15. " IRQS847 ,IRQS Status Bit 847" "Low,High" bitfld.long 0x00 14. " IRQS846 ,IRQS Status Bit 846" "Low,High" textline " " bitfld.long 0x00 13. " IRQS845 ,IRQS Status Bit 845" "Low,High" bitfld.long 0x00 12. " IRQS844 ,IRQS Status Bit 844" "Low,High" bitfld.long 0x00 11. " IRQS843 ,IRQS Status Bit 843" "Low,High" textline " " bitfld.long 0x00 10. " IRQS842 ,IRQS Status Bit 842" "Low,High" bitfld.long 0x00 9. " IRQS841 ,IRQS Status Bit 841" "Low,High" bitfld.long 0x00 8. " IRQS840 ,IRQS Status Bit 840" "Low,High" textline " " bitfld.long 0x00 7. " IRQS839 ,IRQS Status Bit 839" "Low,High" bitfld.long 0x00 6. " IRQS838 ,IRQS Status Bit 838" "Low,High" bitfld.long 0x00 5. " IRQS837 ,IRQS Status Bit 837" "Low,High" textline " " bitfld.long 0x00 4. " IRQS836 ,IRQS Status Bit 836" "Low,High" bitfld.long 0x00 3. " IRQS835 ,IRQS Status Bit 835" "Low,High" bitfld.long 0x00 2. " IRQS834 ,IRQS Status Bit 834" "Low,High" textline " " bitfld.long 0x00 1. " IRQS833 ,IRQS Status Bit 833" "Low,High" bitfld.long 0x00 0. " IRQS832 ,IRQS Status Bit 832" "Low,High" else rgroup.long 0x0D6C++0x03 line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1C) rgroup.long 0x0D70++0x03 line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27" bitfld.long 0x00 31. " IRQS895 ,IRQS Status Bit 895" "Low,High" bitfld.long 0x00 30. " IRQS894 ,IRQS Status Bit 894" "Low,High" bitfld.long 0x00 29. " IRQS893 ,IRQS Status Bit 893" "Low,High" textline " " bitfld.long 0x00 28. " IRQS892 ,IRQS Status Bit 892" "Low,High" bitfld.long 0x00 27. " IRQS891 ,IRQS Status Bit 891" "Low,High" bitfld.long 0x00 26. " IRQS890 ,IRQS Status Bit 890" "Low,High" textline " " bitfld.long 0x00 25. " IRQS889 ,IRQS Status Bit 889" "Low,High" bitfld.long 0x00 24. " IRQS888 ,IRQS Status Bit 888" "Low,High" bitfld.long 0x00 23. " IRQS887 ,IRQS Status Bit 887" "Low,High" textline " " bitfld.long 0x00 22. " IRQS886 ,IRQS Status Bit 886" "Low,High" bitfld.long 0x00 21. " IRQS885 ,IRQS Status Bit 885" "Low,High" bitfld.long 0x00 20. " IRQS884 ,IRQS Status Bit 884" "Low,High" textline " " bitfld.long 0x00 19. " IRQS883 ,IRQS Status Bit 883" "Low,High" bitfld.long 0x00 18. " IRQS882 ,IRQS Status Bit 882" "Low,High" bitfld.long 0x00 17. " IRQS881 ,IRQS Status Bit 881" "Low,High" textline " " bitfld.long 0x00 16. " IRQS880 ,IRQS Status Bit 880" "Low,High" bitfld.long 0x00 15. " IRQS879 ,IRQS Status Bit 879" "Low,High" bitfld.long 0x00 14. " IRQS878 ,IRQS Status Bit 878" "Low,High" textline " " bitfld.long 0x00 13. " IRQS877 ,IRQS Status Bit 877" "Low,High" bitfld.long 0x00 12. " IRQS876 ,IRQS Status Bit 876" "Low,High" bitfld.long 0x00 11. " IRQS875 ,IRQS Status Bit 875" "Low,High" textline " " bitfld.long 0x00 10. " IRQS874 ,IRQS Status Bit 874" "Low,High" bitfld.long 0x00 9. " IRQS873 ,IRQS Status Bit 873" "Low,High" bitfld.long 0x00 8. " IRQS872 ,IRQS Status Bit 872" "Low,High" textline " " bitfld.long 0x00 7. " IRQS871 ,IRQS Status Bit 871" "Low,High" bitfld.long 0x00 6. " IRQS870 ,IRQS Status Bit 870" "Low,High" bitfld.long 0x00 5. " IRQS869 ,IRQS Status Bit 869" "Low,High" textline " " bitfld.long 0x00 4. " IRQS868 ,IRQS Status Bit 868" "Low,High" bitfld.long 0x00 3. " IRQS867 ,IRQS Status Bit 867" "Low,High" bitfld.long 0x00 2. " IRQS866 ,IRQS Status Bit 866" "Low,High" textline " " bitfld.long 0x00 1. " IRQS865 ,IRQS Status Bit 865" "Low,High" bitfld.long 0x00 0. " IRQS864 ,IRQS Status Bit 864" "Low,High" else rgroup.long 0x0D70++0x03 line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1D) rgroup.long 0x0D74++0x03 line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28" bitfld.long 0x00 31. " IRQS927 ,IRQS Status Bit 927" "Low,High" bitfld.long 0x00 30. " IRQS926 ,IRQS Status Bit 926" "Low,High" bitfld.long 0x00 29. " IRQS925 ,IRQS Status Bit 925" "Low,High" textline " " bitfld.long 0x00 28. " IRQS924 ,IRQS Status Bit 924" "Low,High" bitfld.long 0x00 27. " IRQS923 ,IRQS Status Bit 923" "Low,High" bitfld.long 0x00 26. " IRQS922 ,IRQS Status Bit 922" "Low,High" textline " " bitfld.long 0x00 25. " IRQS921 ,IRQS Status Bit 921" "Low,High" bitfld.long 0x00 24. " IRQS920 ,IRQS Status Bit 920" "Low,High" bitfld.long 0x00 23. " IRQS919 ,IRQS Status Bit 919" "Low,High" textline " " bitfld.long 0x00 22. " IRQS918 ,IRQS Status Bit 918" "Low,High" bitfld.long 0x00 21. " IRQS917 ,IRQS Status Bit 917" "Low,High" bitfld.long 0x00 20. " IRQS916 ,IRQS Status Bit 916" "Low,High" textline " " bitfld.long 0x00 19. " IRQS915 ,IRQS Status Bit 915" "Low,High" bitfld.long 0x00 18. " IRQS914 ,IRQS Status Bit 914" "Low,High" bitfld.long 0x00 17. " IRQS913 ,IRQS Status Bit 913" "Low,High" textline " " bitfld.long 0x00 16. " IRQS912 ,IRQS Status Bit 912" "Low,High" bitfld.long 0x00 15. " IRQS911 ,IRQS Status Bit 911" "Low,High" bitfld.long 0x00 14. " IRQS910 ,IRQS Status Bit 910" "Low,High" textline " " bitfld.long 0x00 13. " IRQS909 ,IRQS Status Bit 909" "Low,High" bitfld.long 0x00 12. " IRQS908 ,IRQS Status Bit 908" "Low,High" bitfld.long 0x00 11. " IRQS907 ,IRQS Status Bit 907" "Low,High" textline " " bitfld.long 0x00 10. " IRQS906 ,IRQS Status Bit 906" "Low,High" bitfld.long 0x00 9. " IRQS905 ,IRQS Status Bit 905" "Low,High" bitfld.long 0x00 8. " IRQS904 ,IRQS Status Bit 904" "Low,High" textline " " bitfld.long 0x00 7. " IRQS903 ,IRQS Status Bit 903" "Low,High" bitfld.long 0x00 6. " IRQS902 ,IRQS Status Bit 902" "Low,High" bitfld.long 0x00 5. " IRQS901 ,IRQS Status Bit 901" "Low,High" textline " " bitfld.long 0x00 4. " IRQS900 ,IRQS Status Bit 900" "Low,High" bitfld.long 0x00 3. " IRQS899 ,IRQS Status Bit 899" "Low,High" bitfld.long 0x00 2. " IRQS898 ,IRQS Status Bit 898" "Low,High" textline " " bitfld.long 0x00 1. " IRQS897 ,IRQS Status Bit 897" "Low,High" bitfld.long 0x00 0. " IRQS896 ,IRQS Status Bit 896" "Low,High" else rgroup.long 0x0D74++0x03 line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1E) rgroup.long 0x0D78++0x03 line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29" bitfld.long 0x00 31. " IRQS959 ,IRQS Status Bit 959" "Low,High" bitfld.long 0x00 30. " IRQS958 ,IRQS Status Bit 958" "Low,High" bitfld.long 0x00 29. " IRQS957 ,IRQS Status Bit 957" "Low,High" textline " " bitfld.long 0x00 28. " IRQS956 ,IRQS Status Bit 956" "Low,High" bitfld.long 0x00 27. " IRQS955 ,IRQS Status Bit 955" "Low,High" bitfld.long 0x00 26. " IRQS954 ,IRQS Status Bit 954" "Low,High" textline " " bitfld.long 0x00 25. " IRQS953 ,IRQS Status Bit 953" "Low,High" bitfld.long 0x00 24. " IRQS952 ,IRQS Status Bit 952" "Low,High" bitfld.long 0x00 23. " IRQS951 ,IRQS Status Bit 951" "Low,High" textline " " bitfld.long 0x00 22. " IRQS950 ,IRQS Status Bit 950" "Low,High" bitfld.long 0x00 21. " IRQS949 ,IRQS Status Bit 949" "Low,High" bitfld.long 0x00 20. " IRQS948 ,IRQS Status Bit 948" "Low,High" textline " " bitfld.long 0x00 19. " IRQS947 ,IRQS Status Bit 947" "Low,High" bitfld.long 0x00 18. " IRQS946 ,IRQS Status Bit 946" "Low,High" bitfld.long 0x00 17. " IRQS945 ,IRQS Status Bit 945" "Low,High" textline " " bitfld.long 0x00 16. " IRQS944 ,IRQS Status Bit 944" "Low,High" bitfld.long 0x00 15. " IRQS943 ,IRQS Status Bit 943" "Low,High" bitfld.long 0x00 14. " IRQS942 ,IRQS Status Bit 942" "Low,High" textline " " bitfld.long 0x00 13. " IRQS941 ,IRQS Status Bit 941" "Low,High" bitfld.long 0x00 12. " IRQS940 ,IRQS Status Bit 940" "Low,High" bitfld.long 0x00 11. " IRQS939 ,IRQS Status Bit 939" "Low,High" textline " " bitfld.long 0x00 10. " IRQS938 ,IRQS Status Bit 938" "Low,High" bitfld.long 0x00 9. " IRQS937 ,IRQS Status Bit 937" "Low,High" bitfld.long 0x00 8. " IRQS936 ,IRQS Status Bit 936" "Low,High" textline " " bitfld.long 0x00 7. " IRQS935 ,IRQS Status Bit 935" "Low,High" bitfld.long 0x00 6. " IRQS934 ,IRQS Status Bit 934" "Low,High" bitfld.long 0x00 5. " IRQS933 ,IRQS Status Bit 933" "Low,High" textline " " bitfld.long 0x00 4. " IRQS932 ,IRQS Status Bit 932" "Low,High" bitfld.long 0x00 3. " IRQS931 ,IRQS Status Bit 931" "Low,High" bitfld.long 0x00 2. " IRQS930 ,IRQS Status Bit 930" "Low,High" textline " " bitfld.long 0x00 1. " IRQS929 ,IRQS Status Bit 929" "Low,High" bitfld.long 0x00 0. " IRQS928 ,IRQS Status Bit 928" "Low,High" else rgroup.long 0x0D78++0x03 line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x4ac10000+0x04))&0x0000001F)>=0x1F) rgroup.long 0x0D7C++0x03 line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30" bitfld.long 0x00 27. " IRQS987 ,IRQS Status Bit 987" "Low,High" bitfld.long 0x00 26. " IRQS986 ,IRQS Status Bit 986" "Low,High" textline " " bitfld.long 0x00 25. " IRQS985 ,IRQS Status Bit 985" "Low,High" bitfld.long 0x00 24. " IRQS984 ,IRQS Status Bit 984" "Low,High" bitfld.long 0x00 23. " IRQS983 ,IRQS Status Bit 983" "Low,High" textline " " bitfld.long 0x00 22. " IRQS982 ,IRQS Status Bit 982" "Low,High" bitfld.long 0x00 21. " IRQS981 ,IRQS Status Bit 981" "Low,High" bitfld.long 0x00 20. " IRQS980 ,IRQS Status Bit 980" "Low,High" textline " " bitfld.long 0x00 19. " IRQS979 ,IRQS Status Bit 979" "Low,High" bitfld.long 0x00 18. " IRQS978 ,IRQS Status Bit 978" "Low,High" bitfld.long 0x00 17. " IRQS977 ,IRQS Status Bit 977" "Low,High" textline " " bitfld.long 0x00 16. " IRQS976 ,IRQS Status Bit 976" "Low,High" bitfld.long 0x00 15. " IRQS975 ,IRQS Status Bit 975" "Low,High" bitfld.long 0x00 14. " IRQS974 ,IRQS Status Bit 974" "Low,High" textline " " bitfld.long 0x00 13. " IRQS973 ,IRQS Status Bit 973" "Low,High" bitfld.long 0x00 12. " IRQS972 ,IRQS Status Bit 972" "Low,High" bitfld.long 0x00 11. " IRQS971 ,IRQS Status Bit 971" "Low,High" textline " " bitfld.long 0x00 10. " IRQS970 ,IRQS Status Bit 970" "Low,High" bitfld.long 0x00 9. " IRQS969 ,IRQS Status Bit 969" "Low,High" bitfld.long 0x00 8. " IRQS968 ,IRQS Status Bit 968" "Low,High" textline " " bitfld.long 0x00 7. " IRQS967 ,IRQS Status Bit 967" "Low,High" bitfld.long 0x00 6. " IRQS966 ,IRQS Status Bit 966" "Low,High" bitfld.long 0x00 5. " IRQS965 ,IRQS Status Bit 965" "Low,High" textline " " bitfld.long 0x00 4. " IRQS964 ,IRQS Status Bit 964" "Low,High" bitfld.long 0x00 3. " IRQS963 ,IRQS Status Bit 963" "Low,High" bitfld.long 0x00 2. " IRQS962 ,IRQS Status Bit 962" "Low,High" textline " " bitfld.long 0x00 1. " IRQS961 ,IRQS Status Bit 961" "Low,High" bitfld.long 0x00 0. " IRQS960 ,IRQS Status Bit 960" "Low,High" else rgroup.long 0x0D7C++0x03 line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 25. tree "Software Generated Interrupt" if (((per.l(ad:0x4ac10000+0x04))&0x400)==0x400) wgroup.long 0x0F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 15. " NSATT ,NSATT" "Secure,Non-secure" bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else wgroup.long 0x0F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x0F20++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR0,SGI Set/Clear Pending Register 0" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F24++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR1,SGI Set/Clear Pending Register 1" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F28++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 2" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F2C++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 3" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" tree.end width 12. tree "Peripheral/Component ID Registers" rgroup.byte 0x0FE0++0x00 line.byte 0x00 "GICD_PIDR0,Peripheral ID0 Register" hexmask.byte 0x00 0.--7. 1. " DEVID ,DevID field" rgroup.byte 0x0FE4++0x00 line.byte 0x00 "GICD_PIDR1,Peripheral ID1 Register" bitfld.byte 0x00 4.--7. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " DEVID ,DevID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FE8++0x00 line.byte 0x00 "GICD_PIDR2,Peripheral ID2 Register" bitfld.byte 0x00 4.--7. " ARCHREV ,ArchRev field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 3. " UJEPCODE ,UsesJEPcode field" "Low,High" bitfld.byte 0x00 0.--2. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7" rgroup.byte 0x0FEC++0x00 line.byte 0x00 "GICD_PIDR3,Peripheral ID3 Register" bitfld.byte 0x00 4.--7. " REVID ,Revision field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FD0++0x00 line.byte 0x00 "GICD_PIDR4,Peripheral ID4 Register" bitfld.byte 0x00 0.--3. " CC ,ContinuationCode field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0xFD4++0x00 line.byte 0x00 "GICD_PIDR5,Peripheral ID5 Register" rgroup.byte 0xFD8++0x00 line.byte 0x00 "GICD_PIDR6,Peripheral ID6 Register" rgroup.byte 0xFDC++0x00 line.byte 0x00 "GICD_PIDR7,Peripheral ID7 Register" textline " " rgroup.byte 0xFF0++0x00 line.byte 0x00 "GICD_CIDR0,Component ID0 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFF4++0x00 line.byte 0x00 "GICD_CIDR1,Component ID1 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFF8++0x00 line.byte 0x00 "GICD_CIDR2,Component ID2 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFFC++0x00 line.byte 0x00 "GICD_CIDR3,Component ID3 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" textline " " tree.end tree.end width 0x0B base ad:0x4ac20000 width 17. tree "CPU Interface" if (((per.l(ad:0x4ac10000+0x04))&0x400)==0x0) group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register" bitfld.long 0x00 9. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 6. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 0. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " else if PER.ADDRESS.isSECUREEX(ad:0x4ac20000) group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Secure access)" bitfld.long 0x00 10. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 9. " EOIMODES ,Controls the behavior of accesses to GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 8. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 7. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 6. " IRQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 4. " CBPR ,Controls whether the GICC_BPR provides common control to Group 0 and Group 1 interrupts" "BPR/ABPR split,BPR common" bitfld.long 0x00 3. " FIQEN ,Controls whether the CPU interface signals Group 0 interrupts to a target processor using the FIQ or the IRQ signal" "IRQ,FIQ" bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt" textline " " bitfld.long 0x00 1. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Enable for the signaling of Group 0 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" else group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Non-secure access)" bitfld.long 0x00 9. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 6. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 0. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " endif endif group.long 0x0004++0x03 line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface" if (((per.l(ad:0x4ac10000+0x04))&0x400)==0x400) if PER.ADDRESS.isSECUREEX(ad:0x4ac20000+0x0008) group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register (Secure access)" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" else group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register (Non-secure access)" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" endif else group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" endif hgroup.long 0x000C++0x03 hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register" in wgroup.long 0x0010++0x03 line.long 0x00 "GICC_EOIR,End Of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0014++0x03 line.long 0x00 "GICC_RPR,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the CPU interface" rgroup.long 0x0018++0x03 line.long 0x00 "GICC_HPIR,Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" if (((per.l(ad:0x4ac10000+0x04))&0x400)==0x400) group.long 0x001C++0x03 line.long 0x00 "GICC_ABPR,Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" else hgroup.long 0x001C++0x03 hide.long 0x00 "GICC_ABPR,Aliased Binary Point Register" endif hgroup.long 0x0020++0x003 hide.long 0x00 "GICC_AIAR,Aliased Interrupt Acknowledge Register" in if (((per.l(ad:0x4ac10000+0x04))&0x400)==0x400) wgroup.long 0x0024++0x03 line.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0028++0x03 line.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" else hgroup.long 0x0024++0x03 hide.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register" hgroup.long 0x0028++0x03 hide.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register" endif group.long 0x00D0++0x03 line.long 0x00 "GICC_APR0,Active Priorities Register" if (((per.l(ad:0x4ac10000+0x04))&0x400)==0x400) group.long 0x00E0++0x03 line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register" else hgroup.long 0x00E0++0x03 hide.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register" endif rgroup.long 0x00FC++0x03 line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv1,GICv2,GICv2,?..." textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" wgroup.long 0x1000++0x03 line.long 0x00 "GICC_DIR,Deactivate Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID" tree.end sif CPU.FEATURE(hypervisor) base ad:0x4ac40000 width 12. tree "Virtual CPU Control Interface" group.long 0x0000++0x03 line.long 0x00 "GICH_HCR,Hypervisor Control Register" bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " VGRP1DIE ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " VGRP1EIE ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VGRP0DIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " VGRP0EIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NPIE ,No Pending Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LRENPIE ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " UIE ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" rgroup.long 0x0004++0x03 line.long 0x00 "GICH_VTR,VGIC Type Register" bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..." textline " " bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..." textline " " bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..." group.long 0x008++0x03 line.long 0x00 "GICH_VMCR,Virtual Machine Control Register" bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " VMBP ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " VMABP ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " VEM ,Alias of GICV_CTLR.EOImode" "0,1" bitfld.long 0x00 4. " VMCBPR ,Alias of GICV_CTLR.CBPR" "0,1" bitfld.long 0x00 3. " VMFIQEN ,Alias of GICV_CTLR.FIQEn" "0,1" textline " " bitfld.long 0x00 2. " VMACKCTL ,Alias of GICV_CTLR.AckCtl" "0,1" bitfld.long 0x00 1. " VMGRP1EN ,Alias of GICV_CTLR.EnableGrp1" "0,1" bitfld.long 0x00 0. " VMGRP0EN ,Alias of GICV_CTLR.EnableGrp0" "0,1" rgroup.long 0x0010++0x03 line.long 0x00 "GICH_MISR,Maintenance Interrupt Status Register" bitfld.long 0x00 7. " VGRP1D ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VGRP1E ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VGRP0D ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " VGRP0E ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " NP ,No Pending maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " LRENP ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "No interrupt,Interrupt" rgroup.long 0x020++0x03 line.long 0x00 "GICH_EISR0,End of Interrupt Status Register" bitfld.long 0x00 3. " STATUS3 ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " STATUS2 ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " STATUS1 ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " STATUS0 ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt" rgroup.long 0x0030++0x03 line.long 0x00 "GICH_ELSR0,Empty List register Status Register" bitfld.long 0x00 3. " STATUS3 ,Emptiness status bit for List register 3" "Not empty,Empty" bitfld.long 0x00 2. " STATUS2 ,Emptiness status bit for List register 2" "Not empty,Empty" bitfld.long 0x00 1. " STATUS1 ,Emptiness status bit for List register 1" "Not empty,Empty" textline " " bitfld.long 0x00 0. " STATUS0 ,Emptiness status bit for List register 0" "Not empty,Empty" group.long 0x00F0++0x03 line.long 0x00 "GICH_APR0,Active Priorities Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" if (((per.l(ad:0x4ac40000+0x100))&0x80000000)==0x80000000) group.long 0x100++0x03 line.long 0x00 "GICH_LR0,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x100++0x03 line.long 0x00 "GICH_LR0,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0x4ac40000+0x104))&0x80000000)==0x80000000) group.long 0x104++0x03 line.long 0x00 "GICH_LR1,List Register 1" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x104++0x03 line.long 0x00 "GICH_LR1,List Register 1" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0x4ac40000+0x108))&0x80000000)==0x80000000) group.long 0x108++0x03 line.long 0x00 "GICH_LR2,List Register 2" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x108++0x03 line.long 0x00 "GICH_LR2,List Register 2" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0x4ac40000+0x10C))&0x80000000)==0x80000000) group.long 0x10C++0x03 line.long 0x00 "GICH_LR3,List Register 3" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x10C++0x03 line.long 0x00 "GICH_LR3,List Register 3" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif tree.end base ad:0x4ac60000 width 12. tree "Virtual CPU Interface" group.long 0x0000++0x03 line.long 0x00 "GICV_CTLR,Virtual Machine Control Register" bitfld.long 0x00 9. " EOIMODE ,Controls the behavior associated with the GICV_EOIR GICV_AEOIR and GICV_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 4. " CBPR ,Controls whether the GICV_BPR controls both Group 0 and Group 1 virtual interrupts" "BPR/ABPR split,BPR common" bitfld.long 0x00 3. " FIQEN ,Controls whether interrupts marked as Group 0 are presented as virtual FIQs" "IRQs,FIQs" textline " " bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt" bitfld.long 0x00 1. " ENABLEGRP1 ,Enables the signaling of Group 1 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Enables the signaling of Group 0 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled" group.long 0x0004++0x03 line.long 0x00 "GICV_PMR,VM Priority Mask Register" bitfld.long 0x00 3.--7. " PRIORITY ,Priority mask level for CPU interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x0008++0x03 line.long 0x00 "GICV_BPR,VM Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" hgroup.long 0x000C++0x03 hide.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register" in wgroup.long 0x0010++0x03 line.long 0x00 "GICV_EOIR,VM End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0014++0x03 line.long 0x00 "GICV_RPR,VM Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the Virtual CPU interface" rgroup.long 0x0018++0x03 line.long 0x00 "GICV_HPPIR,VM Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" group.long 0x001C++0x03 line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" hgroup.long 0x0020++0x03 hide.long 0x00 "GICV_AIAR,VM Aliased Interrupt Acknowledge Register" in wgroup.long 0x0024++0x03 line.long 0x00 "GICV_AEOIR,VM Aliased End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0028++0x03 line.long 0x00 "GICV_AHPPIR,VM Aliased Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" group.long 0x00D0++0x03 line.long 0x00 "GICV_APR0,VM Active Priority Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" rgroup.long 0x00FC++0x03 line.long 0x00 "GICV_IIDR,VM CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv2,?..." textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" wgroup.long 0x1000++0x03 line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID" tree.end endif width 0x0B tree.end tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "ADC (Analog-to-Digital Converter)" base ad:0x0 tree "ADC" base ad:0x404E0000 group.long 0x0++0x1F line.long 0x0 "ADC_ISR,ADC interrupt and status register" bitfld.long 0x0 9. "AWD3,Analog watchdog 3 flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "AWD2,Analog watchdog 2 flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "AWD1,Analog watchdog 1 flag" "B_0x0,B_0x1" bitfld.long 0x0 6. "JEOS,Injected channel end of sequence flag" "B_0x0,B_0x1" bitfld.long 0x0 5. "JEOC,Injected channel end of conversion flag" "B_0x0,B_0x1" bitfld.long 0x0 4. "OVR,ADC overrun" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "EOS,End of regular sequence flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "EOC,End of conversion flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "EOSMP,End of sampling flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "ADRDY,ADC ready" "B_0x0,B_0x1" line.long 0x4 "ADC_IER,ADC interrupt enable register" bitfld.long 0x4 9. "AWD3IE,Analog watchdog 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "AWD2IE,Analog watchdog 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "AWD1IE,Analog watchdog 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "JEOSIE,End of injected sequence of conversions interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "JEOCIE,End of injected conversion interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "OVRIE,Overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "EOSIE,End of regular sequence of conversions interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "EOCIE,End of regular conversion interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "EOSMPIE,End of sampling flag interrupt enable for regular conversions" "B_0x0,B_0x1" bitfld.long 0x4 0. "ADRDYIE,ADC ready interrupt enable" "B_0x0,B_0x1" line.long 0x8 "ADC_CR,ADC control register" bitfld.long 0x8 31. "ADCAL,ADC calibration" "B_0x0,B_0x1" bitfld.long 0x8 30. "ADCALDIF,Differential mode for calibration" "B_0x0,B_0x1" bitfld.long 0x8 29. "DEEPPWD,Deep-power-down enable" "B_0x0,B_0x1" bitfld.long 0x8 5. "JADSTP,ADC stop of injected conversion command" "B_0x0,B_0x1" bitfld.long 0x8 4. "ADSTP,ADC stop of regular conversion command" "B_0x0,B_0x1" bitfld.long 0x8 3. "JADSTART,ADC start of injected conversion" "B_0x0,B_0x1" newline bitfld.long 0x8 2. "ADSTART,ADC start of regular conversion" "B_0x0,B_0x1" bitfld.long 0x8 1. "ADDIS,ADC disable command" "B_0x0,B_0x1" bitfld.long 0x8 0. "ADEN,ADC enable control" "B_0x0,B_0x1" line.long 0xC "ADC_CFGR1,ADC configuration register" hexmask.long.byte 0xC 26.--30. 1. "AWD1CH,Analog watchdog 1 channel selection" bitfld.long 0xC 25. "JAUTO,Automatic injected group conversion" "B_0x0,B_0x1" bitfld.long 0xC 24. "JAWD1EN,Analog watchdog 1 enable on injected channels" "B_0x0,B_0x1" bitfld.long 0xC 23. "AWD1EN,Analog watchdog 1 enable on regular channels" "B_0x0,B_0x1" bitfld.long 0xC 22. "AWD1SGL,Enable the watchdog 1 on a single channel or on all channels" "B_0x0,B_0x1" bitfld.long 0xC 20. "JDISCEN,Discontinuous mode on injected channels" "B_0x0,B_0x1" newline bitfld.long 0xC 17.--19. "DISCNUM,Discontinuous mode channel count" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" bitfld.long 0xC 16. "DISCEN,Discontinuous mode for regular channels" "B_0x0,B_0x1" bitfld.long 0xC 14. "AUTDLY,Delayed conversion mode" "B_0x0,B_0x1" bitfld.long 0xC 13. "CONT,Single / continuous conversion mode for regular conversions" "B_0x0,B_0x1" bitfld.long 0xC 12. "OVRMOD,Overrun mode" "B_0x0,B_0x1" bitfld.long 0xC 10.--11. "EXTEN,External trigger enable and polarity selection for regular channels" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0xC 5.--9. 1. "EXTSEL,External trigger selection for regular group" bitfld.long 0xC 2.--3. "RES,Data resolution" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0.--1. "DMNGT,Data management configuration" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x10 "ADC_CFGR2,ADC configuration register 2" hexmask.long.byte 0x10 28.--31. 1. "LSHIFT,Left shift factor" hexmask.long.word 0x10 16.--25. 1. "OVSR,Oversampling ratio" bitfld.long 0x10 15. "SMPTRIG,Sampling time control trigger mode" "B_0x0,B_0x1" bitfld.long 0x10 14. "SWTRIG,Software trigger bit for sampling time control trigger mode" "B_0x0,B_0x1" bitfld.long 0x10 13. "BULB,Bulb sampling mode" "B_0x0,B_0x1" bitfld.long 0x10 10. "ROVSM,Regular oversampling mode" "B_0x0,B_0x1" newline bitfld.long 0x10 9. "TROVS,Triggered regular oversampling" "B_0x0,B_0x1" hexmask.long.byte 0x10 5.--8. 1. "OVSS,Oversampling shift" bitfld.long 0x10 1. "JOVSE,Injected oversampling enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "ROVSE,Regular oversampling enable" "B_0x0,B_0x1" line.long 0x14 "ADC_SMPR1,ADC sample time register 1" bitfld.long 0x14 27.--29. "SMP9,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 24.--26. "SMP8,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 21.--23. "SMP7,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 18.--20. "SMP6,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 15.--17. "SMP5,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 12.--14. "SMP4,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x14 9.--11. "SMP3,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 6.--8. "SMP2,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 3.--5. "SMP1,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 0.--2. "SMP0,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x18 "ADC_SMPR2,ADC sample time register 2" bitfld.long 0x18 27.--29. "SMP19,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 24.--26. "SMP18,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 21.--23. "SMP17,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 18.--20. "SMP16,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 15.--17. "SMP15,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 12.--14. "SMP14,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x18 9.--11. "SMP13,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 6.--8. "SMP12,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 3.--5. "SMP11,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 0.--2. "SMP10,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x1C "ADC_PCSEL,ADC channel preselection register" hexmask.long.tbyte 0x1C 0.--19. 1. "PCSEL,Channel i (VsubINP/sub[i]) preselection" group.long 0x30++0xF line.long 0x0 "ADC_SQR1,ADC regular sequence register 1" hexmask.long.byte 0x0 24.--28. 1. "SQ4,4th conversion in regular sequence" hexmask.long.byte 0x0 18.--22. 1. "SQ3,3rd conversion in regular sequence" hexmask.long.byte 0x0 12.--16. 1. "SQ2,2nd conversion in regular sequence" hexmask.long.byte 0x0 6.--10. 1. "SQ1,1st conversion in regular sequence" hexmask.long.byte 0x0 0.--3. 1. "L,Regular channel sequence length" line.long 0x4 "ADC_SQR2,ADC regular sequence register 2" hexmask.long.byte 0x4 24.--28. 1. "SQ9,9th conversion in regular sequence" hexmask.long.byte 0x4 18.--22. 1. "SQ8,8th conversion in regular sequence" hexmask.long.byte 0x4 12.--16. 1. "SQ7,7th conversion in regular sequence" hexmask.long.byte 0x4 6.--10. 1. "SQ6,6th conversion in regular sequence" hexmask.long.byte 0x4 0.--4. 1. "SQ5,5th conversion in regular sequence" line.long 0x8 "ADC_SQR3,ADC regular sequence register 3" hexmask.long.byte 0x8 24.--28. 1. "SQ14,14th conversion in regular sequence" hexmask.long.byte 0x8 18.--22. 1. "SQ13,13th conversion in regular sequence" hexmask.long.byte 0x8 12.--16. 1. "SQ12,12th conversion in regular sequence" hexmask.long.byte 0x8 6.--10. 1. "SQ11,11th conversion in regular sequence" hexmask.long.byte 0x8 0.--4. 1. "SQ10,10th conversion in regular sequence" line.long 0xC "ADC_SQR4,ADC regular sequence register 4" hexmask.long.byte 0xC 6.--10. 1. "SQ16,16th conversion in regular sequence" hexmask.long.byte 0xC 0.--4. 1. "SQ15,15th conversion in regular sequence" rgroup.long 0x40++0x3 line.long 0x0 "ADC_DR,ADC regular data register" hexmask.long 0x0 0.--31. 1. "RDATA,Regular data converted" group.long 0x4C++0x27 line.long 0x0 "ADC_JSQR,ADC injected sequence register" hexmask.long.byte 0x0 27.--31. 1. "JSQ4,4th conversion in the injected sequence" hexmask.long.byte 0x0 21.--25. 1. "JSQ3,3rd conversion in the injected sequence" hexmask.long.byte 0x0 15.--19. 1. "JSQ2,2nd conversion in the injected sequence" hexmask.long.byte 0x0 9.--13. 1. "JSQ1,1st conversion in the injected sequence" bitfld.long 0x0 7.--8. "JEXTEN,External trigger enable and polarity selection for injected channels" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 2.--6. 1. "JEXTSEL,External trigger selection for injected group" newline bitfld.long 0x0 0.--1. "JL,Injected channel sequence length" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "ADC_OFCFGR1,ADC offset 1 configuration register" hexmask.long.byte 0x4 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0x4 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0x4 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0x8 "ADC_OFCFGR2,ADC offset 2 configuration register" hexmask.long.byte 0x8 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0x8 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0x8 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0x8 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0xC "ADC_OFCFGR3,ADC offset 3 configuration register" hexmask.long.byte 0xC 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0xC 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0xC 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0xC 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0x10 "ADC_OFCFGR4,ADC offset 4 configuration register" hexmask.long.byte 0x10 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0x10 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0x10 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0x10 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0x14 "ADC_OFR1,ADC offset 1 register" hexmask.long.tbyte 0x14 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x18 "ADC_OFR2,ADC offset 2 register" hexmask.long.tbyte 0x18 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x1C "ADC_OFR3,ADC offset 3 register" hexmask.long.tbyte 0x1C 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x20 "ADC_OFR4,ADC offset 4 register" hexmask.long.tbyte 0x20 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x24 "ADC_GCOMP,ADC gain compensation register" bitfld.long 0x24 31. "GCOMP,Gain compensation mode" "B_0x0,B_0x1" hexmask.long.word 0x24 0.--13. 1. "GCOMPCOEFF,Gain compensation coefficient" rgroup.long 0x80++0xF line.long 0x0 "ADC_JDR1,ADC injected channel 1 data register" hexmask.long 0x0 0.--31. 1. "JDATA,Injected data" line.long 0x4 "ADC_JDR2,ADC injected channel 2 data register" hexmask.long 0x4 0.--31. 1. "JDATA,Injected data" line.long 0x8 "ADC_JDR3,ADC injected channel 3 data register" hexmask.long 0x8 0.--31. 1. "JDATA,Injected data" line.long 0xC "ADC_JDR4,ADC injected channel 4 data register" hexmask.long 0xC 0.--31. 1. "JDATA,Injected data" group.long 0xA0++0x27 line.long 0x0 "ADC_AWD2CR,ADC Analog Watchdog 2 Configuration Register" hexmask.long.tbyte 0x0 0.--19. 1. "AWDCH,Analog watchdog 2 channel selection" line.long 0x4 "ADC_AWD3CR,ADC Analog Watchdog 3 Configuration Register" hexmask.long.tbyte 0x4 0.--19. 1. "AWDCH,Analog watchdog 3 channel selection" line.long 0x8 "ADC_AWD1LTR,ADC analog watchdog 1 lower threshold register" hexmask.long.tbyte 0x8 0.--22. 1. "LTR,Analog watchdog 1 lower threshold" line.long 0xC "ADC_AWD1HTR,ADC analog watchdog 1 higher threshold register" bitfld.long 0xC 29.--31. "AWDFILT,Analog watchdog filtering parameter" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" hexmask.long.tbyte 0xC 0.--22. 1. "HTR,Analog watchdog 1 higher threshold" line.long 0x10 "ADC_AWD2LTR,ADC analog watchdog 2 lower threshold register" hexmask.long.tbyte 0x10 0.--22. 1. "LTR,Analog watchdog 2 lower threshold" line.long 0x14 "ADC_AWD2HTR,ADC analog watchdog 2 higher threshold register" hexmask.long.tbyte 0x14 0.--22. 1. "HTR,Analog watchdog 2 higher threshold" line.long 0x18 "ADC_AWD3LTR,ADC analog watchdog 3 lower threshold register" hexmask.long.tbyte 0x18 0.--22. 1. "LTR,Analog watchdog 3 lower threshold" line.long 0x1C "ADC_AWD3HTR,ADC analog watchdog 3 higher threshold register" hexmask.long.tbyte 0x1C 0.--22. 1. "HTR,Analog watchdog 3 higher threshold" line.long 0x20 "ADC_DIFSEL,ADC differential mode selection register" hexmask.long.tbyte 0x20 0.--19. 1. "DIFSEL,Differential mode for channels 19 to 0." line.long 0x24 "ADC_CALFACT,ADC calibration factors" bitfld.long 0x24 31. "CALADDOS,Calibration additional offset" "B_0x0,B_0x1" hexmask.long.word 0x24 16.--24. 1. "CALFACT_D,Calibration factors in differential mode" hexmask.long.word 0x24 0.--8. 1. "CALFACT_S,Calibration factors In single-ended mode" group.long 0xD0++0x3 line.long 0x0 "ADC_OR,ADC option register" bitfld.long 0x0 4. "OP4,Option bit 4" "B_0x0,B_0x1" bitfld.long 0x0 3. "OP3,Option bit 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "OP2,Option bit 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "OP1,Option bit 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "OP0,Option bit 0" "B_0x0,B_0x1" tree.end tree "ADC1_S" base ad:0x504E0000 group.long 0x0++0x1F line.long 0x0 "ADC_ISR,ADC interrupt and status register" bitfld.long 0x0 9. "AWD3,Analog watchdog 3 flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "AWD2,Analog watchdog 2 flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "AWD1,Analog watchdog 1 flag" "B_0x0,B_0x1" bitfld.long 0x0 6. "JEOS,Injected channel end of sequence flag" "B_0x0,B_0x1" bitfld.long 0x0 5. "JEOC,Injected channel end of conversion flag" "B_0x0,B_0x1" bitfld.long 0x0 4. "OVR,ADC overrun" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "EOS,End of regular sequence flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "EOC,End of conversion flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "EOSMP,End of sampling flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "ADRDY,ADC ready" "B_0x0,B_0x1" line.long 0x4 "ADC_IER,ADC interrupt enable register" bitfld.long 0x4 9. "AWD3IE,Analog watchdog 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "AWD2IE,Analog watchdog 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "AWD1IE,Analog watchdog 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "JEOSIE,End of injected sequence of conversions interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "JEOCIE,End of injected conversion interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "OVRIE,Overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "EOSIE,End of regular sequence of conversions interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "EOCIE,End of regular conversion interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "EOSMPIE,End of sampling flag interrupt enable for regular conversions" "B_0x0,B_0x1" bitfld.long 0x4 0. "ADRDYIE,ADC ready interrupt enable" "B_0x0,B_0x1" line.long 0x8 "ADC_CR,ADC control register" bitfld.long 0x8 31. "ADCAL,ADC calibration" "B_0x0,B_0x1" bitfld.long 0x8 30. "ADCALDIF,Differential mode for calibration" "B_0x0,B_0x1" bitfld.long 0x8 29. "DEEPPWD,Deep-power-down enable" "B_0x0,B_0x1" bitfld.long 0x8 5. "JADSTP,ADC stop of injected conversion command" "B_0x0,B_0x1" bitfld.long 0x8 4. "ADSTP,ADC stop of regular conversion command" "B_0x0,B_0x1" bitfld.long 0x8 3. "JADSTART,ADC start of injected conversion" "B_0x0,B_0x1" newline bitfld.long 0x8 2. "ADSTART,ADC start of regular conversion" "B_0x0,B_0x1" bitfld.long 0x8 1. "ADDIS,ADC disable command" "B_0x0,B_0x1" bitfld.long 0x8 0. "ADEN,ADC enable control" "B_0x0,B_0x1" line.long 0xC "ADC_CFGR1,ADC configuration register" hexmask.long.byte 0xC 26.--30. 1. "AWD1CH,Analog watchdog 1 channel selection" bitfld.long 0xC 25. "JAUTO,Automatic injected group conversion" "B_0x0,B_0x1" bitfld.long 0xC 24. "JAWD1EN,Analog watchdog 1 enable on injected channels" "B_0x0,B_0x1" bitfld.long 0xC 23. "AWD1EN,Analog watchdog 1 enable on regular channels" "B_0x0,B_0x1" bitfld.long 0xC 22. "AWD1SGL,Enable the watchdog 1 on a single channel or on all channels" "B_0x0,B_0x1" bitfld.long 0xC 20. "JDISCEN,Discontinuous mode on injected channels" "B_0x0,B_0x1" newline bitfld.long 0xC 17.--19. "DISCNUM,Discontinuous mode channel count" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" bitfld.long 0xC 16. "DISCEN,Discontinuous mode for regular channels" "B_0x0,B_0x1" bitfld.long 0xC 14. "AUTDLY,Delayed conversion mode" "B_0x0,B_0x1" bitfld.long 0xC 13. "CONT,Single / continuous conversion mode for regular conversions" "B_0x0,B_0x1" bitfld.long 0xC 12. "OVRMOD,Overrun mode" "B_0x0,B_0x1" bitfld.long 0xC 10.--11. "EXTEN,External trigger enable and polarity selection for regular channels" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0xC 5.--9. 1. "EXTSEL,External trigger selection for regular group" bitfld.long 0xC 2.--3. "RES,Data resolution" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0.--1. "DMNGT,Data management configuration" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x10 "ADC_CFGR2,ADC configuration register 2" hexmask.long.byte 0x10 28.--31. 1. "LSHIFT,Left shift factor" hexmask.long.word 0x10 16.--25. 1. "OVSR,Oversampling ratio" bitfld.long 0x10 15. "SMPTRIG,Sampling time control trigger mode" "B_0x0,B_0x1" bitfld.long 0x10 14. "SWTRIG,Software trigger bit for sampling time control trigger mode" "B_0x0,B_0x1" bitfld.long 0x10 13. "BULB,Bulb sampling mode" "B_0x0,B_0x1" bitfld.long 0x10 10. "ROVSM,Regular oversampling mode" "B_0x0,B_0x1" newline bitfld.long 0x10 9. "TROVS,Triggered regular oversampling" "B_0x0,B_0x1" hexmask.long.byte 0x10 5.--8. 1. "OVSS,Oversampling shift" bitfld.long 0x10 1. "JOVSE,Injected oversampling enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "ROVSE,Regular oversampling enable" "B_0x0,B_0x1" line.long 0x14 "ADC_SMPR1,ADC sample time register 1" bitfld.long 0x14 27.--29. "SMP9,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 24.--26. "SMP8,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 21.--23. "SMP7,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 18.--20. "SMP6,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 15.--17. "SMP5,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 12.--14. "SMP4,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x14 9.--11. "SMP3,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 6.--8. "SMP2,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 3.--5. "SMP1,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 0.--2. "SMP0,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x18 "ADC_SMPR2,ADC sample time register 2" bitfld.long 0x18 27.--29. "SMP19,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 24.--26. "SMP18,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 21.--23. "SMP17,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 18.--20. "SMP16,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 15.--17. "SMP15,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 12.--14. "SMP14,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x18 9.--11. "SMP13,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 6.--8. "SMP12,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 3.--5. "SMP11,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 0.--2. "SMP10,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x1C "ADC_PCSEL,ADC channel preselection register" hexmask.long.tbyte 0x1C 0.--19. 1. "PCSEL,Channel i (VsubINP/sub[i]) preselection" group.long 0x30++0xF line.long 0x0 "ADC_SQR1,ADC regular sequence register 1" hexmask.long.byte 0x0 24.--28. 1. "SQ4,4th conversion in regular sequence" hexmask.long.byte 0x0 18.--22. 1. "SQ3,3rd conversion in regular sequence" hexmask.long.byte 0x0 12.--16. 1. "SQ2,2nd conversion in regular sequence" hexmask.long.byte 0x0 6.--10. 1. "SQ1,1st conversion in regular sequence" hexmask.long.byte 0x0 0.--3. 1. "L,Regular channel sequence length" line.long 0x4 "ADC_SQR2,ADC regular sequence register 2" hexmask.long.byte 0x4 24.--28. 1. "SQ9,9th conversion in regular sequence" hexmask.long.byte 0x4 18.--22. 1. "SQ8,8th conversion in regular sequence" hexmask.long.byte 0x4 12.--16. 1. "SQ7,7th conversion in regular sequence" hexmask.long.byte 0x4 6.--10. 1. "SQ6,6th conversion in regular sequence" hexmask.long.byte 0x4 0.--4. 1. "SQ5,5th conversion in regular sequence" line.long 0x8 "ADC_SQR3,ADC regular sequence register 3" hexmask.long.byte 0x8 24.--28. 1. "SQ14,14th conversion in regular sequence" hexmask.long.byte 0x8 18.--22. 1. "SQ13,13th conversion in regular sequence" hexmask.long.byte 0x8 12.--16. 1. "SQ12,12th conversion in regular sequence" hexmask.long.byte 0x8 6.--10. 1. "SQ11,11th conversion in regular sequence" hexmask.long.byte 0x8 0.--4. 1. "SQ10,10th conversion in regular sequence" line.long 0xC "ADC_SQR4,ADC regular sequence register 4" hexmask.long.byte 0xC 6.--10. 1. "SQ16,16th conversion in regular sequence" hexmask.long.byte 0xC 0.--4. 1. "SQ15,15th conversion in regular sequence" rgroup.long 0x40++0x3 line.long 0x0 "ADC_DR,ADC regular data register" hexmask.long 0x0 0.--31. 1. "RDATA,Regular data converted" group.long 0x4C++0x27 line.long 0x0 "ADC_JSQR,ADC injected sequence register" hexmask.long.byte 0x0 27.--31. 1. "JSQ4,4th conversion in the injected sequence" hexmask.long.byte 0x0 21.--25. 1. "JSQ3,3rd conversion in the injected sequence" hexmask.long.byte 0x0 15.--19. 1. "JSQ2,2nd conversion in the injected sequence" hexmask.long.byte 0x0 9.--13. 1. "JSQ1,1st conversion in the injected sequence" bitfld.long 0x0 7.--8. "JEXTEN,External trigger enable and polarity selection for injected channels" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 2.--6. 1. "JEXTSEL,External trigger selection for injected group" newline bitfld.long 0x0 0.--1. "JL,Injected channel sequence length" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "ADC_OFCFGR1,ADC offset 1 configuration register" hexmask.long.byte 0x4 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0x4 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0x4 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0x8 "ADC_OFCFGR2,ADC offset 2 configuration register" hexmask.long.byte 0x8 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0x8 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0x8 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0x8 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0xC "ADC_OFCFGR3,ADC offset 3 configuration register" hexmask.long.byte 0xC 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0xC 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0xC 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0xC 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0x10 "ADC_OFCFGR4,ADC offset 4 configuration register" hexmask.long.byte 0x10 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0x10 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0x10 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0x10 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0x14 "ADC_OFR1,ADC offset 1 register" hexmask.long.tbyte 0x14 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x18 "ADC_OFR2,ADC offset 2 register" hexmask.long.tbyte 0x18 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x1C "ADC_OFR3,ADC offset 3 register" hexmask.long.tbyte 0x1C 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x20 "ADC_OFR4,ADC offset 4 register" hexmask.long.tbyte 0x20 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x24 "ADC_GCOMP,ADC gain compensation register" bitfld.long 0x24 31. "GCOMP,Gain compensation mode" "B_0x0,B_0x1" hexmask.long.word 0x24 0.--13. 1. "GCOMPCOEFF,Gain compensation coefficient" rgroup.long 0x80++0xF line.long 0x0 "ADC_JDR1,ADC injected channel 1 data register" hexmask.long 0x0 0.--31. 1. "JDATA,Injected data" line.long 0x4 "ADC_JDR2,ADC injected channel 2 data register" hexmask.long 0x4 0.--31. 1. "JDATA,Injected data" line.long 0x8 "ADC_JDR3,ADC injected channel 3 data register" hexmask.long 0x8 0.--31. 1. "JDATA,Injected data" line.long 0xC "ADC_JDR4,ADC injected channel 4 data register" hexmask.long 0xC 0.--31. 1. "JDATA,Injected data" group.long 0xA0++0x27 line.long 0x0 "ADC_AWD2CR,ADC Analog Watchdog 2 Configuration Register" hexmask.long.tbyte 0x0 0.--19. 1. "AWDCH,Analog watchdog 2 channel selection" line.long 0x4 "ADC_AWD3CR,ADC Analog Watchdog 3 Configuration Register" hexmask.long.tbyte 0x4 0.--19. 1. "AWDCH,Analog watchdog 3 channel selection" line.long 0x8 "ADC_AWD1LTR,ADC analog watchdog 1 lower threshold register" hexmask.long.tbyte 0x8 0.--22. 1. "LTR,Analog watchdog 1 lower threshold" line.long 0xC "ADC_AWD1HTR,ADC analog watchdog 1 higher threshold register" bitfld.long 0xC 29.--31. "AWDFILT,Analog watchdog filtering parameter" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" hexmask.long.tbyte 0xC 0.--22. 1. "HTR,Analog watchdog 1 higher threshold" line.long 0x10 "ADC_AWD2LTR,ADC analog watchdog 2 lower threshold register" hexmask.long.tbyte 0x10 0.--22. 1. "LTR,Analog watchdog 2 lower threshold" line.long 0x14 "ADC_AWD2HTR,ADC analog watchdog 2 higher threshold register" hexmask.long.tbyte 0x14 0.--22. 1. "HTR,Analog watchdog 2 higher threshold" line.long 0x18 "ADC_AWD3LTR,ADC analog watchdog 3 lower threshold register" hexmask.long.tbyte 0x18 0.--22. 1. "LTR,Analog watchdog 3 lower threshold" line.long 0x1C "ADC_AWD3HTR,ADC analog watchdog 3 higher threshold register" hexmask.long.tbyte 0x1C 0.--22. 1. "HTR,Analog watchdog 3 higher threshold" line.long 0x20 "ADC_DIFSEL,ADC differential mode selection register" hexmask.long.tbyte 0x20 0.--19. 1. "DIFSEL,Differential mode for channels 19 to 0." line.long 0x24 "ADC_CALFACT,ADC calibration factors" bitfld.long 0x24 31. "CALADDOS,Calibration additional offset" "B_0x0,B_0x1" hexmask.long.word 0x24 16.--24. 1. "CALFACT_D,Calibration factors in differential mode" hexmask.long.word 0x24 0.--8. 1. "CALFACT_S,Calibration factors In single-ended mode" group.long 0xD0++0x3 line.long 0x0 "ADC_OR,ADC option register" bitfld.long 0x0 4. "OP4,Option bit 4" "B_0x0,B_0x1" bitfld.long 0x0 3. "OP3,Option bit 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "OP2,Option bit 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "OP1,Option bit 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "OP0,Option bit 0" "B_0x0,B_0x1" tree.end tree "ADC2" base ad:0x404E0100 group.long 0x0++0x1F line.long 0x0 "ADC_ISR,ADC interrupt and status register" bitfld.long 0x0 9. "AWD3,Analog watchdog 3 flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "AWD2,Analog watchdog 2 flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "AWD1,Analog watchdog 1 flag" "B_0x0,B_0x1" bitfld.long 0x0 6. "JEOS,Injected channel end of sequence flag" "B_0x0,B_0x1" bitfld.long 0x0 5. "JEOC,Injected channel end of conversion flag" "B_0x0,B_0x1" bitfld.long 0x0 4. "OVR,ADC overrun" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "EOS,End of regular sequence flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "EOC,End of conversion flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "EOSMP,End of sampling flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "ADRDY,ADC ready" "B_0x0,B_0x1" line.long 0x4 "ADC_IER,ADC interrupt enable register" bitfld.long 0x4 9. "AWD3IE,Analog watchdog 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "AWD2IE,Analog watchdog 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "AWD1IE,Analog watchdog 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "JEOSIE,End of injected sequence of conversions interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "JEOCIE,End of injected conversion interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "OVRIE,Overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "EOSIE,End of regular sequence of conversions interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "EOCIE,End of regular conversion interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "EOSMPIE,End of sampling flag interrupt enable for regular conversions" "B_0x0,B_0x1" bitfld.long 0x4 0. "ADRDYIE,ADC ready interrupt enable" "B_0x0,B_0x1" line.long 0x8 "ADC_CR,ADC control register" bitfld.long 0x8 31. "ADCAL,ADC calibration" "B_0x0,B_0x1" bitfld.long 0x8 30. "ADCALDIF,Differential mode for calibration" "B_0x0,B_0x1" bitfld.long 0x8 29. "DEEPPWD,Deep-power-down enable" "B_0x0,B_0x1" bitfld.long 0x8 5. "JADSTP,ADC stop of injected conversion command" "B_0x0,B_0x1" bitfld.long 0x8 4. "ADSTP,ADC stop of regular conversion command" "B_0x0,B_0x1" bitfld.long 0x8 3. "JADSTART,ADC start of injected conversion" "B_0x0,B_0x1" newline bitfld.long 0x8 2. "ADSTART,ADC start of regular conversion" "B_0x0,B_0x1" bitfld.long 0x8 1. "ADDIS,ADC disable command" "B_0x0,B_0x1" bitfld.long 0x8 0. "ADEN,ADC enable control" "B_0x0,B_0x1" line.long 0xC "ADC_CFGR1,ADC configuration register" hexmask.long.byte 0xC 26.--30. 1. "AWD1CH,Analog watchdog 1 channel selection" bitfld.long 0xC 25. "JAUTO,Automatic injected group conversion" "B_0x0,B_0x1" bitfld.long 0xC 24. "JAWD1EN,Analog watchdog 1 enable on injected channels" "B_0x0,B_0x1" bitfld.long 0xC 23. "AWD1EN,Analog watchdog 1 enable on regular channels" "B_0x0,B_0x1" bitfld.long 0xC 22. "AWD1SGL,Enable the watchdog 1 on a single channel or on all channels" "B_0x0,B_0x1" bitfld.long 0xC 20. "JDISCEN,Discontinuous mode on injected channels" "B_0x0,B_0x1" newline bitfld.long 0xC 17.--19. "DISCNUM,Discontinuous mode channel count" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" bitfld.long 0xC 16. "DISCEN,Discontinuous mode for regular channels" "B_0x0,B_0x1" bitfld.long 0xC 14. "AUTDLY,Delayed conversion mode" "B_0x0,B_0x1" bitfld.long 0xC 13. "CONT,Single / continuous conversion mode for regular conversions" "B_0x0,B_0x1" bitfld.long 0xC 12. "OVRMOD,Overrun mode" "B_0x0,B_0x1" bitfld.long 0xC 10.--11. "EXTEN,External trigger enable and polarity selection for regular channels" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0xC 5.--9. 1. "EXTSEL,External trigger selection for regular group" bitfld.long 0xC 2.--3. "RES,Data resolution" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0.--1. "DMNGT,Data management configuration" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x10 "ADC_CFGR2,ADC configuration register 2" hexmask.long.byte 0x10 28.--31. 1. "LSHIFT,Left shift factor" hexmask.long.word 0x10 16.--25. 1. "OVSR,Oversampling ratio" bitfld.long 0x10 15. "SMPTRIG,Sampling time control trigger mode" "B_0x0,B_0x1" bitfld.long 0x10 14. "SWTRIG,Software trigger bit for sampling time control trigger mode" "B_0x0,B_0x1" bitfld.long 0x10 13. "BULB,Bulb sampling mode" "B_0x0,B_0x1" bitfld.long 0x10 10. "ROVSM,Regular oversampling mode" "B_0x0,B_0x1" newline bitfld.long 0x10 9. "TROVS,Triggered regular oversampling" "B_0x0,B_0x1" hexmask.long.byte 0x10 5.--8. 1. "OVSS,Oversampling shift" bitfld.long 0x10 1. "JOVSE,Injected oversampling enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "ROVSE,Regular oversampling enable" "B_0x0,B_0x1" line.long 0x14 "ADC_SMPR1,ADC sample time register 1" bitfld.long 0x14 27.--29. "SMP9,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 24.--26. "SMP8,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 21.--23. "SMP7,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 18.--20. "SMP6,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 15.--17. "SMP5,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 12.--14. "SMP4,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x14 9.--11. "SMP3,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 6.--8. "SMP2,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 3.--5. "SMP1,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 0.--2. "SMP0,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x18 "ADC_SMPR2,ADC sample time register 2" bitfld.long 0x18 27.--29. "SMP19,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 24.--26. "SMP18,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 21.--23. "SMP17,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 18.--20. "SMP16,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 15.--17. "SMP15,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 12.--14. "SMP14,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x18 9.--11. "SMP13,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 6.--8. "SMP12,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 3.--5. "SMP11,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 0.--2. "SMP10,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x1C "ADC_PCSEL,ADC channel preselection register" hexmask.long.tbyte 0x1C 0.--19. 1. "PCSEL,Channel i (VsubINP/sub[i]) preselection" group.long 0x30++0xF line.long 0x0 "ADC_SQR1,ADC regular sequence register 1" hexmask.long.byte 0x0 24.--28. 1. "SQ4,4th conversion in regular sequence" hexmask.long.byte 0x0 18.--22. 1. "SQ3,3rd conversion in regular sequence" hexmask.long.byte 0x0 12.--16. 1. "SQ2,2nd conversion in regular sequence" hexmask.long.byte 0x0 6.--10. 1. "SQ1,1st conversion in regular sequence" hexmask.long.byte 0x0 0.--3. 1. "L,Regular channel sequence length" line.long 0x4 "ADC_SQR2,ADC regular sequence register 2" hexmask.long.byte 0x4 24.--28. 1. "SQ9,9th conversion in regular sequence" hexmask.long.byte 0x4 18.--22. 1. "SQ8,8th conversion in regular sequence" hexmask.long.byte 0x4 12.--16. 1. "SQ7,7th conversion in regular sequence" hexmask.long.byte 0x4 6.--10. 1. "SQ6,6th conversion in regular sequence" hexmask.long.byte 0x4 0.--4. 1. "SQ5,5th conversion in regular sequence" line.long 0x8 "ADC_SQR3,ADC regular sequence register 3" hexmask.long.byte 0x8 24.--28. 1. "SQ14,14th conversion in regular sequence" hexmask.long.byte 0x8 18.--22. 1. "SQ13,13th conversion in regular sequence" hexmask.long.byte 0x8 12.--16. 1. "SQ12,12th conversion in regular sequence" hexmask.long.byte 0x8 6.--10. 1. "SQ11,11th conversion in regular sequence" hexmask.long.byte 0x8 0.--4. 1. "SQ10,10th conversion in regular sequence" line.long 0xC "ADC_SQR4,ADC regular sequence register 4" hexmask.long.byte 0xC 6.--10. 1. "SQ16,16th conversion in regular sequence" hexmask.long.byte 0xC 0.--4. 1. "SQ15,15th conversion in regular sequence" rgroup.long 0x40++0x3 line.long 0x0 "ADC_DR,ADC regular data register" hexmask.long 0x0 0.--31. 1. "RDATA,Regular data converted" group.long 0x4C++0x27 line.long 0x0 "ADC_JSQR,ADC injected sequence register" hexmask.long.byte 0x0 27.--31. 1. "JSQ4,4th conversion in the injected sequence" hexmask.long.byte 0x0 21.--25. 1. "JSQ3,3rd conversion in the injected sequence" hexmask.long.byte 0x0 15.--19. 1. "JSQ2,2nd conversion in the injected sequence" hexmask.long.byte 0x0 9.--13. 1. "JSQ1,1st conversion in the injected sequence" bitfld.long 0x0 7.--8. "JEXTEN,External trigger enable and polarity selection for injected channels" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 2.--6. 1. "JEXTSEL,External trigger selection for injected group" newline bitfld.long 0x0 0.--1. "JL,Injected channel sequence length" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "ADC_OFCFGR1,ADC offset 1 configuration register" hexmask.long.byte 0x4 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0x4 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0x4 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0x8 "ADC_OFCFGR2,ADC offset 2 configuration register" hexmask.long.byte 0x8 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0x8 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0x8 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0x8 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0xC "ADC_OFCFGR3,ADC offset 3 configuration register" hexmask.long.byte 0xC 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0xC 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0xC 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0xC 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0x10 "ADC_OFCFGR4,ADC offset 4 configuration register" hexmask.long.byte 0x10 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0x10 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0x10 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0x10 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0x14 "ADC_OFR1,ADC offset 1 register" hexmask.long.tbyte 0x14 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x18 "ADC_OFR2,ADC offset 2 register" hexmask.long.tbyte 0x18 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x1C "ADC_OFR3,ADC offset 3 register" hexmask.long.tbyte 0x1C 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x20 "ADC_OFR4,ADC offset 4 register" hexmask.long.tbyte 0x20 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x24 "ADC_GCOMP,ADC gain compensation register" bitfld.long 0x24 31. "GCOMP,Gain compensation mode" "B_0x0,B_0x1" hexmask.long.word 0x24 0.--13. 1. "GCOMPCOEFF,Gain compensation coefficient" rgroup.long 0x80++0xF line.long 0x0 "ADC_JDR1,ADC injected channel 1 data register" hexmask.long 0x0 0.--31. 1. "JDATA,Injected data" line.long 0x4 "ADC_JDR2,ADC injected channel 2 data register" hexmask.long 0x4 0.--31. 1. "JDATA,Injected data" line.long 0x8 "ADC_JDR3,ADC injected channel 3 data register" hexmask.long 0x8 0.--31. 1. "JDATA,Injected data" line.long 0xC "ADC_JDR4,ADC injected channel 4 data register" hexmask.long 0xC 0.--31. 1. "JDATA,Injected data" group.long 0xA0++0x27 line.long 0x0 "ADC_AWD2CR,ADC Analog Watchdog 2 Configuration Register" hexmask.long.tbyte 0x0 0.--19. 1. "AWDCH,Analog watchdog 2 channel selection" line.long 0x4 "ADC_AWD3CR,ADC Analog Watchdog 3 Configuration Register" hexmask.long.tbyte 0x4 0.--19. 1. "AWDCH,Analog watchdog 3 channel selection" line.long 0x8 "ADC_AWD1LTR,ADC analog watchdog 1 lower threshold register" hexmask.long.tbyte 0x8 0.--22. 1. "LTR,Analog watchdog 1 lower threshold" line.long 0xC "ADC_AWD1HTR,ADC analog watchdog 1 higher threshold register" bitfld.long 0xC 29.--31. "AWDFILT,Analog watchdog filtering parameter" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" hexmask.long.tbyte 0xC 0.--22. 1. "HTR,Analog watchdog 1 higher threshold" line.long 0x10 "ADC_AWD2LTR,ADC analog watchdog 2 lower threshold register" hexmask.long.tbyte 0x10 0.--22. 1. "LTR,Analog watchdog 2 lower threshold" line.long 0x14 "ADC_AWD2HTR,ADC analog watchdog 2 higher threshold register" hexmask.long.tbyte 0x14 0.--22. 1. "HTR,Analog watchdog 2 higher threshold" line.long 0x18 "ADC_AWD3LTR,ADC analog watchdog 3 lower threshold register" hexmask.long.tbyte 0x18 0.--22. 1. "LTR,Analog watchdog 3 lower threshold" line.long 0x1C "ADC_AWD3HTR,ADC analog watchdog 3 higher threshold register" hexmask.long.tbyte 0x1C 0.--22. 1. "HTR,Analog watchdog 3 higher threshold" line.long 0x20 "ADC_DIFSEL,ADC differential mode selection register" hexmask.long.tbyte 0x20 0.--19. 1. "DIFSEL,Differential mode for channels 19 to 0." line.long 0x24 "ADC_CALFACT,ADC calibration factors" bitfld.long 0x24 31. "CALADDOS,Calibration additional offset" "B_0x0,B_0x1" hexmask.long.word 0x24 16.--24. 1. "CALFACT_D,Calibration factors in differential mode" hexmask.long.word 0x24 0.--8. 1. "CALFACT_S,Calibration factors In single-ended mode" group.long 0xD0++0x3 line.long 0x0 "ADC_OR,ADC option register" bitfld.long 0x0 4. "OP4,Option bit 4" "B_0x0,B_0x1" bitfld.long 0x0 3. "OP3,Option bit 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "OP2,Option bit 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "OP1,Option bit 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "OP0,Option bit 0" "B_0x0,B_0x1" tree.end tree "ADC2_S" base ad:0x504E0100 group.long 0x0++0x1F line.long 0x0 "ADC_ISR,ADC interrupt and status register" bitfld.long 0x0 9. "AWD3,Analog watchdog 3 flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "AWD2,Analog watchdog 2 flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "AWD1,Analog watchdog 1 flag" "B_0x0,B_0x1" bitfld.long 0x0 6. "JEOS,Injected channel end of sequence flag" "B_0x0,B_0x1" bitfld.long 0x0 5. "JEOC,Injected channel end of conversion flag" "B_0x0,B_0x1" bitfld.long 0x0 4. "OVR,ADC overrun" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "EOS,End of regular sequence flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "EOC,End of conversion flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "EOSMP,End of sampling flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "ADRDY,ADC ready" "B_0x0,B_0x1" line.long 0x4 "ADC_IER,ADC interrupt enable register" bitfld.long 0x4 9. "AWD3IE,Analog watchdog 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "AWD2IE,Analog watchdog 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "AWD1IE,Analog watchdog 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "JEOSIE,End of injected sequence of conversions interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "JEOCIE,End of injected conversion interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "OVRIE,Overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "EOSIE,End of regular sequence of conversions interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "EOCIE,End of regular conversion interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "EOSMPIE,End of sampling flag interrupt enable for regular conversions" "B_0x0,B_0x1" bitfld.long 0x4 0. "ADRDYIE,ADC ready interrupt enable" "B_0x0,B_0x1" line.long 0x8 "ADC_CR,ADC control register" bitfld.long 0x8 31. "ADCAL,ADC calibration" "B_0x0,B_0x1" bitfld.long 0x8 30. "ADCALDIF,Differential mode for calibration" "B_0x0,B_0x1" bitfld.long 0x8 29. "DEEPPWD,Deep-power-down enable" "B_0x0,B_0x1" bitfld.long 0x8 5. "JADSTP,ADC stop of injected conversion command" "B_0x0,B_0x1" bitfld.long 0x8 4. "ADSTP,ADC stop of regular conversion command" "B_0x0,B_0x1" bitfld.long 0x8 3. "JADSTART,ADC start of injected conversion" "B_0x0,B_0x1" newline bitfld.long 0x8 2. "ADSTART,ADC start of regular conversion" "B_0x0,B_0x1" bitfld.long 0x8 1. "ADDIS,ADC disable command" "B_0x0,B_0x1" bitfld.long 0x8 0. "ADEN,ADC enable control" "B_0x0,B_0x1" line.long 0xC "ADC_CFGR1,ADC configuration register" hexmask.long.byte 0xC 26.--30. 1. "AWD1CH,Analog watchdog 1 channel selection" bitfld.long 0xC 25. "JAUTO,Automatic injected group conversion" "B_0x0,B_0x1" bitfld.long 0xC 24. "JAWD1EN,Analog watchdog 1 enable on injected channels" "B_0x0,B_0x1" bitfld.long 0xC 23. "AWD1EN,Analog watchdog 1 enable on regular channels" "B_0x0,B_0x1" bitfld.long 0xC 22. "AWD1SGL,Enable the watchdog 1 on a single channel or on all channels" "B_0x0,B_0x1" bitfld.long 0xC 20. "JDISCEN,Discontinuous mode on injected channels" "B_0x0,B_0x1" newline bitfld.long 0xC 17.--19. "DISCNUM,Discontinuous mode channel count" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" bitfld.long 0xC 16. "DISCEN,Discontinuous mode for regular channels" "B_0x0,B_0x1" bitfld.long 0xC 14. "AUTDLY,Delayed conversion mode" "B_0x0,B_0x1" bitfld.long 0xC 13. "CONT,Single / continuous conversion mode for regular conversions" "B_0x0,B_0x1" bitfld.long 0xC 12. "OVRMOD,Overrun mode" "B_0x0,B_0x1" bitfld.long 0xC 10.--11. "EXTEN,External trigger enable and polarity selection for regular channels" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0xC 5.--9. 1. "EXTSEL,External trigger selection for regular group" bitfld.long 0xC 2.--3. "RES,Data resolution" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0.--1. "DMNGT,Data management configuration" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x10 "ADC_CFGR2,ADC configuration register 2" hexmask.long.byte 0x10 28.--31. 1. "LSHIFT,Left shift factor" hexmask.long.word 0x10 16.--25. 1. "OVSR,Oversampling ratio" bitfld.long 0x10 15. "SMPTRIG,Sampling time control trigger mode" "B_0x0,B_0x1" bitfld.long 0x10 14. "SWTRIG,Software trigger bit for sampling time control trigger mode" "B_0x0,B_0x1" bitfld.long 0x10 13. "BULB,Bulb sampling mode" "B_0x0,B_0x1" bitfld.long 0x10 10. "ROVSM,Regular oversampling mode" "B_0x0,B_0x1" newline bitfld.long 0x10 9. "TROVS,Triggered regular oversampling" "B_0x0,B_0x1" hexmask.long.byte 0x10 5.--8. 1. "OVSS,Oversampling shift" bitfld.long 0x10 1. "JOVSE,Injected oversampling enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "ROVSE,Regular oversampling enable" "B_0x0,B_0x1" line.long 0x14 "ADC_SMPR1,ADC sample time register 1" bitfld.long 0x14 27.--29. "SMP9,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 24.--26. "SMP8,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 21.--23. "SMP7,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 18.--20. "SMP6,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 15.--17. "SMP5,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 12.--14. "SMP4,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x14 9.--11. "SMP3,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 6.--8. "SMP2,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 3.--5. "SMP1,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 0.--2. "SMP0,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x18 "ADC_SMPR2,ADC sample time register 2" bitfld.long 0x18 27.--29. "SMP19,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 24.--26. "SMP18,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 21.--23. "SMP17,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 18.--20. "SMP16,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 15.--17. "SMP15,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 12.--14. "SMP14,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x18 9.--11. "SMP13,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 6.--8. "SMP12,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 3.--5. "SMP11,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 0.--2. "SMP10,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x1C "ADC_PCSEL,ADC channel preselection register" hexmask.long.tbyte 0x1C 0.--19. 1. "PCSEL,Channel i (VsubINP/sub[i]) preselection" group.long 0x30++0xF line.long 0x0 "ADC_SQR1,ADC regular sequence register 1" hexmask.long.byte 0x0 24.--28. 1. "SQ4,4th conversion in regular sequence" hexmask.long.byte 0x0 18.--22. 1. "SQ3,3rd conversion in regular sequence" hexmask.long.byte 0x0 12.--16. 1. "SQ2,2nd conversion in regular sequence" hexmask.long.byte 0x0 6.--10. 1. "SQ1,1st conversion in regular sequence" hexmask.long.byte 0x0 0.--3. 1. "L,Regular channel sequence length" line.long 0x4 "ADC_SQR2,ADC regular sequence register 2" hexmask.long.byte 0x4 24.--28. 1. "SQ9,9th conversion in regular sequence" hexmask.long.byte 0x4 18.--22. 1. "SQ8,8th conversion in regular sequence" hexmask.long.byte 0x4 12.--16. 1. "SQ7,7th conversion in regular sequence" hexmask.long.byte 0x4 6.--10. 1. "SQ6,6th conversion in regular sequence" hexmask.long.byte 0x4 0.--4. 1. "SQ5,5th conversion in regular sequence" line.long 0x8 "ADC_SQR3,ADC regular sequence register 3" hexmask.long.byte 0x8 24.--28. 1. "SQ14,14th conversion in regular sequence" hexmask.long.byte 0x8 18.--22. 1. "SQ13,13th conversion in regular sequence" hexmask.long.byte 0x8 12.--16. 1. "SQ12,12th conversion in regular sequence" hexmask.long.byte 0x8 6.--10. 1. "SQ11,11th conversion in regular sequence" hexmask.long.byte 0x8 0.--4. 1. "SQ10,10th conversion in regular sequence" line.long 0xC "ADC_SQR4,ADC regular sequence register 4" hexmask.long.byte 0xC 6.--10. 1. "SQ16,16th conversion in regular sequence" hexmask.long.byte 0xC 0.--4. 1. "SQ15,15th conversion in regular sequence" rgroup.long 0x40++0x3 line.long 0x0 "ADC_DR,ADC regular data register" hexmask.long 0x0 0.--31. 1. "RDATA,Regular data converted" group.long 0x4C++0x27 line.long 0x0 "ADC_JSQR,ADC injected sequence register" hexmask.long.byte 0x0 27.--31. 1. "JSQ4,4th conversion in the injected sequence" hexmask.long.byte 0x0 21.--25. 1. "JSQ3,3rd conversion in the injected sequence" hexmask.long.byte 0x0 15.--19. 1. "JSQ2,2nd conversion in the injected sequence" hexmask.long.byte 0x0 9.--13. 1. "JSQ1,1st conversion in the injected sequence" bitfld.long 0x0 7.--8. "JEXTEN,External trigger enable and polarity selection for injected channels" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 2.--6. 1. "JEXTSEL,External trigger selection for injected group" newline bitfld.long 0x0 0.--1. "JL,Injected channel sequence length" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "ADC_OFCFGR1,ADC offset 1 configuration register" hexmask.long.byte 0x4 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0x4 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0x4 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0x8 "ADC_OFCFGR2,ADC offset 2 configuration register" hexmask.long.byte 0x8 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0x8 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0x8 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0x8 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0xC "ADC_OFCFGR3,ADC offset 3 configuration register" hexmask.long.byte 0xC 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0xC 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0xC 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0xC 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0x10 "ADC_OFCFGR4,ADC offset 4 configuration register" hexmask.long.byte 0x10 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0x10 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0x10 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0x10 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0x14 "ADC_OFR1,ADC offset 1 register" hexmask.long.tbyte 0x14 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x18 "ADC_OFR2,ADC offset 2 register" hexmask.long.tbyte 0x18 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x1C "ADC_OFR3,ADC offset 3 register" hexmask.long.tbyte 0x1C 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x20 "ADC_OFR4,ADC offset 4 register" hexmask.long.tbyte 0x20 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x24 "ADC_GCOMP,ADC gain compensation register" bitfld.long 0x24 31. "GCOMP,Gain compensation mode" "B_0x0,B_0x1" hexmask.long.word 0x24 0.--13. 1. "GCOMPCOEFF,Gain compensation coefficient" rgroup.long 0x80++0xF line.long 0x0 "ADC_JDR1,ADC injected channel 1 data register" hexmask.long 0x0 0.--31. 1. "JDATA,Injected data" line.long 0x4 "ADC_JDR2,ADC injected channel 2 data register" hexmask.long 0x4 0.--31. 1. "JDATA,Injected data" line.long 0x8 "ADC_JDR3,ADC injected channel 3 data register" hexmask.long 0x8 0.--31. 1. "JDATA,Injected data" line.long 0xC "ADC_JDR4,ADC injected channel 4 data register" hexmask.long 0xC 0.--31. 1. "JDATA,Injected data" group.long 0xA0++0x27 line.long 0x0 "ADC_AWD2CR,ADC Analog Watchdog 2 Configuration Register" hexmask.long.tbyte 0x0 0.--19. 1. "AWDCH,Analog watchdog 2 channel selection" line.long 0x4 "ADC_AWD3CR,ADC Analog Watchdog 3 Configuration Register" hexmask.long.tbyte 0x4 0.--19. 1. "AWDCH,Analog watchdog 3 channel selection" line.long 0x8 "ADC_AWD1LTR,ADC analog watchdog 1 lower threshold register" hexmask.long.tbyte 0x8 0.--22. 1. "LTR,Analog watchdog 1 lower threshold" line.long 0xC "ADC_AWD1HTR,ADC analog watchdog 1 higher threshold register" bitfld.long 0xC 29.--31. "AWDFILT,Analog watchdog filtering parameter" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" hexmask.long.tbyte 0xC 0.--22. 1. "HTR,Analog watchdog 1 higher threshold" line.long 0x10 "ADC_AWD2LTR,ADC analog watchdog 2 lower threshold register" hexmask.long.tbyte 0x10 0.--22. 1. "LTR,Analog watchdog 2 lower threshold" line.long 0x14 "ADC_AWD2HTR,ADC analog watchdog 2 higher threshold register" hexmask.long.tbyte 0x14 0.--22. 1. "HTR,Analog watchdog 2 higher threshold" line.long 0x18 "ADC_AWD3LTR,ADC analog watchdog 3 lower threshold register" hexmask.long.tbyte 0x18 0.--22. 1. "LTR,Analog watchdog 3 lower threshold" line.long 0x1C "ADC_AWD3HTR,ADC analog watchdog 3 higher threshold register" hexmask.long.tbyte 0x1C 0.--22. 1. "HTR,Analog watchdog 3 higher threshold" line.long 0x20 "ADC_DIFSEL,ADC differential mode selection register" hexmask.long.tbyte 0x20 0.--19. 1. "DIFSEL,Differential mode for channels 19 to 0." line.long 0x24 "ADC_CALFACT,ADC calibration factors" bitfld.long 0x24 31. "CALADDOS,Calibration additional offset" "B_0x0,B_0x1" hexmask.long.word 0x24 16.--24. 1. "CALFACT_D,Calibration factors in differential mode" hexmask.long.word 0x24 0.--8. 1. "CALFACT_S,Calibration factors In single-ended mode" group.long 0xD0++0x3 line.long 0x0 "ADC_OR,ADC option register" bitfld.long 0x0 4. "OP4,Option bit 4" "B_0x0,B_0x1" bitfld.long 0x0 3. "OP3,Option bit 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "OP2,Option bit 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "OP1,Option bit 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "OP0,Option bit 0" "B_0x0,B_0x1" tree.end tree "ADC3_S" base ad:0x504F0000 rgroup.long 0x0++0x3 line.long 0x0 "ADCC3_CSR,ADC3 common status register" bitfld.long 0x0 25. "AWD3_SLV,Analog watchdog 3 flag of the slave ADC" "0,1" bitfld.long 0x0 24. "AWD2_SLV,Analog watchdog 2 flag of the slave ADC" "0,1" bitfld.long 0x0 23. "AWD1_SLV,Analog watchdog 1 flag of the slave ADC" "0,1" bitfld.long 0x0 22. "JEOS_SLV,End of injected sequence flag of the slave ADC" "0,1" bitfld.long 0x0 21. "JEOC_SLV,End of injected conversion flag of the slave ADC" "0,1" bitfld.long 0x0 20. "OVR_SLV,Overrun flag of the slave ADC" "0,1" bitfld.long 0x0 19. "EOS_SLV,End of regular sequence flag of the slave ADC. This bit is a copy of the EOS bit in the corresponding ADC_ISR register." "0,1" bitfld.long 0x0 18. "EOC_SLV,End of regular conversion of the slave ADC" "0,1" newline bitfld.long 0x0 17. "EOSMP_SLV,End of sampling phase flag of the slave ADC" "0,1" bitfld.long 0x0 16. "ADRDY_SLV,Slave ADC ready" "0,1" bitfld.long 0x0 9. "AWD3_MST,Analog watchdog 3 flag of the master ADC" "0,1" bitfld.long 0x0 8. "AWD2_MST,Analog watchdog 2 flag of the master ADC" "0,1" bitfld.long 0x0 7. "AWD1_MST,Analog watchdog 1 flag of the master ADC" "0,1" bitfld.long 0x0 6. "JEOS_MST,End of injected sequence flag of the master ADC" "0,1" bitfld.long 0x0 5. "JEOC_MST,End of injected conversion flag of the master ADC" "0,1" bitfld.long 0x0 4. "OVR_MST,Overrun flag of the master ADC" "0,1" newline bitfld.long 0x0 3. "EOS_MST,End of regular sequence flag of the master ADC" "0,1" bitfld.long 0x0 2. "EOC_MST,End of regular conversion of the master ADC" "0,1" bitfld.long 0x0 1. "EOSMP_MST,End of Sampling phase flag of the master ADC" "0,1" bitfld.long 0x0 0. "ADRDY_MST,Master ADC ready" "0,1" group.long 0x8++0x3 line.long 0x0 "ADCC3_CCR,ADC3 common control register" bitfld.long 0x0 24. "VBATEN,VBAT enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "VREFEN,VsubREFINT/sub enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 18.--21. 1. "PRESC,ADC prescaler" bitfld.long 0x0 12. "SPRES,Single prescaler mode" "B_0x0,B_0x1" rgroup.long 0xF0++0xF line.long 0x0 "ADCC3_HWCFGR1,ADC3 hardware configuration register" hexmask.long.byte 0x0 8.--11. 1. "ANAIP,Analog IP compatibility" hexmask.long.byte 0x0 4.--7. 1. "OPBITS,Number of option bits" hexmask.long.byte 0x0 0.--3. 1. "ADCNUM,Number of ADCs implemented" line.long 0x4 "ADCC3_VERR,ADC3 version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "ADCC3_IPIDR,ADC3 identification register" hexmask.long 0x8 0.--31. 1. "ID,Peripheral identifier" line.long 0xC "ADCC3_SIDR,ADC3 size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size Identification" tree.end tree "ADC12_Common_S" base ad:0x504E0300 group.long 0x0++0x1F line.long 0x0 "ADC_ISR,ADC interrupt and status register" bitfld.long 0x0 9. "AWD3,Analog watchdog 3 flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "AWD2,Analog watchdog 2 flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "AWD1,Analog watchdog 1 flag" "B_0x0,B_0x1" bitfld.long 0x0 6. "JEOS,Injected channel end of sequence flag" "B_0x0,B_0x1" bitfld.long 0x0 5. "JEOC,Injected channel end of conversion flag" "B_0x0,B_0x1" bitfld.long 0x0 4. "OVR,ADC overrun" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "EOS,End of regular sequence flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "EOC,End of conversion flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "EOSMP,End of sampling flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "ADRDY,ADC ready" "B_0x0,B_0x1" line.long 0x4 "ADC_IER,ADC interrupt enable register" bitfld.long 0x4 9. "AWD3IE,Analog watchdog 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "AWD2IE,Analog watchdog 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "AWD1IE,Analog watchdog 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "JEOSIE,End of injected sequence of conversions interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "JEOCIE,End of injected conversion interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "OVRIE,Overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "EOSIE,End of regular sequence of conversions interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "EOCIE,End of regular conversion interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "EOSMPIE,End of sampling flag interrupt enable for regular conversions" "B_0x0,B_0x1" bitfld.long 0x4 0. "ADRDYIE,ADC ready interrupt enable" "B_0x0,B_0x1" line.long 0x8 "ADC_CR,ADC control register" bitfld.long 0x8 31. "ADCAL,ADC calibration" "B_0x0,B_0x1" bitfld.long 0x8 30. "ADCALDIF,Differential mode for calibration" "B_0x0,B_0x1" bitfld.long 0x8 29. "DEEPPWD,Deep-power-down enable" "B_0x0,B_0x1" bitfld.long 0x8 5. "JADSTP,ADC stop of injected conversion command" "B_0x0,B_0x1" bitfld.long 0x8 4. "ADSTP,ADC stop of regular conversion command" "B_0x0,B_0x1" bitfld.long 0x8 3. "JADSTART,ADC start of injected conversion" "B_0x0,B_0x1" newline bitfld.long 0x8 2. "ADSTART,ADC start of regular conversion" "B_0x0,B_0x1" bitfld.long 0x8 1. "ADDIS,ADC disable command" "B_0x0,B_0x1" bitfld.long 0x8 0. "ADEN,ADC enable control" "B_0x0,B_0x1" line.long 0xC "ADC_CFGR1,ADC configuration register" hexmask.long.byte 0xC 26.--30. 1. "AWD1CH,Analog watchdog 1 channel selection" bitfld.long 0xC 25. "JAUTO,Automatic injected group conversion" "B_0x0,B_0x1" bitfld.long 0xC 24. "JAWD1EN,Analog watchdog 1 enable on injected channels" "B_0x0,B_0x1" bitfld.long 0xC 23. "AWD1EN,Analog watchdog 1 enable on regular channels" "B_0x0,B_0x1" bitfld.long 0xC 22. "AWD1SGL,Enable the watchdog 1 on a single channel or on all channels" "B_0x0,B_0x1" bitfld.long 0xC 20. "JDISCEN,Discontinuous mode on injected channels" "B_0x0,B_0x1" newline bitfld.long 0xC 17.--19. "DISCNUM,Discontinuous mode channel count" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" bitfld.long 0xC 16. "DISCEN,Discontinuous mode for regular channels" "B_0x0,B_0x1" bitfld.long 0xC 14. "AUTDLY,Delayed conversion mode" "B_0x0,B_0x1" bitfld.long 0xC 13. "CONT,Single / continuous conversion mode for regular conversions" "B_0x0,B_0x1" bitfld.long 0xC 12. "OVRMOD,Overrun mode" "B_0x0,B_0x1" bitfld.long 0xC 10.--11. "EXTEN,External trigger enable and polarity selection for regular channels" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0xC 5.--9. 1. "EXTSEL,External trigger selection for regular group" bitfld.long 0xC 2.--3. "RES,Data resolution" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0.--1. "DMNGT,Data management configuration" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x10 "ADC_CFGR2,ADC configuration register 2" hexmask.long.byte 0x10 28.--31. 1. "LSHIFT,Left shift factor" hexmask.long.word 0x10 16.--25. 1. "OVSR,Oversampling ratio" bitfld.long 0x10 15. "SMPTRIG,Sampling time control trigger mode" "B_0x0,B_0x1" bitfld.long 0x10 14. "SWTRIG,Software trigger bit for sampling time control trigger mode" "B_0x0,B_0x1" bitfld.long 0x10 13. "BULB,Bulb sampling mode" "B_0x0,B_0x1" bitfld.long 0x10 10. "ROVSM,Regular oversampling mode" "B_0x0,B_0x1" newline bitfld.long 0x10 9. "TROVS,Triggered regular oversampling" "B_0x0,B_0x1" hexmask.long.byte 0x10 5.--8. 1. "OVSS,Oversampling shift" bitfld.long 0x10 1. "JOVSE,Injected oversampling enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "ROVSE,Regular oversampling enable" "B_0x0,B_0x1" line.long 0x14 "ADC_SMPR1,ADC sample time register 1" bitfld.long 0x14 27.--29. "SMP9,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 24.--26. "SMP8,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 21.--23. "SMP7,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 18.--20. "SMP6,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 15.--17. "SMP5,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 12.--14. "SMP4,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x14 9.--11. "SMP3,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 6.--8. "SMP2,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 3.--5. "SMP1,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 0.--2. "SMP0,Channel x sampling time selection (x=9 to 0)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x18 "ADC_SMPR2,ADC sample time register 2" bitfld.long 0x18 27.--29. "SMP19,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 24.--26. "SMP18,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 21.--23. "SMP17,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 18.--20. "SMP16,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 15.--17. "SMP15,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 12.--14. "SMP14,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x18 9.--11. "SMP13,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 6.--8. "SMP12,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 3.--5. "SMP11,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x18 0.--2. "SMP10,Channel x sampling time selection (x=19 to 10)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x1C "ADC_PCSEL,ADC channel preselection register" hexmask.long.tbyte 0x1C 0.--19. 1. "PCSEL,Channel i (VsubINP/sub[i]) preselection" group.long 0x30++0xF line.long 0x0 "ADC_SQR1,ADC regular sequence register 1" hexmask.long.byte 0x0 24.--28. 1. "SQ4,4th conversion in regular sequence" hexmask.long.byte 0x0 18.--22. 1. "SQ3,3rd conversion in regular sequence" hexmask.long.byte 0x0 12.--16. 1. "SQ2,2nd conversion in regular sequence" hexmask.long.byte 0x0 6.--10. 1. "SQ1,1st conversion in regular sequence" hexmask.long.byte 0x0 0.--3. 1. "L,Regular channel sequence length" line.long 0x4 "ADC_SQR2,ADC regular sequence register 2" hexmask.long.byte 0x4 24.--28. 1. "SQ9,9th conversion in regular sequence" hexmask.long.byte 0x4 18.--22. 1. "SQ8,8th conversion in regular sequence" hexmask.long.byte 0x4 12.--16. 1. "SQ7,7th conversion in regular sequence" hexmask.long.byte 0x4 6.--10. 1. "SQ6,6th conversion in regular sequence" hexmask.long.byte 0x4 0.--4. 1. "SQ5,5th conversion in regular sequence" line.long 0x8 "ADC_SQR3,ADC regular sequence register 3" hexmask.long.byte 0x8 24.--28. 1. "SQ14,14th conversion in regular sequence" hexmask.long.byte 0x8 18.--22. 1. "SQ13,13th conversion in regular sequence" hexmask.long.byte 0x8 12.--16. 1. "SQ12,12th conversion in regular sequence" hexmask.long.byte 0x8 6.--10. 1. "SQ11,11th conversion in regular sequence" hexmask.long.byte 0x8 0.--4. 1. "SQ10,10th conversion in regular sequence" line.long 0xC "ADC_SQR4,ADC regular sequence register 4" hexmask.long.byte 0xC 6.--10. 1. "SQ16,16th conversion in regular sequence" hexmask.long.byte 0xC 0.--4. 1. "SQ15,15th conversion in regular sequence" rgroup.long 0x40++0x3 line.long 0x0 "ADC_DR,ADC regular data register" hexmask.long 0x0 0.--31. 1. "RDATA,Regular data converted" group.long 0x4C++0x27 line.long 0x0 "ADC_JSQR,ADC injected sequence register" hexmask.long.byte 0x0 27.--31. 1. "JSQ4,4th conversion in the injected sequence" hexmask.long.byte 0x0 21.--25. 1. "JSQ3,3rd conversion in the injected sequence" hexmask.long.byte 0x0 15.--19. 1. "JSQ2,2nd conversion in the injected sequence" hexmask.long.byte 0x0 9.--13. 1. "JSQ1,1st conversion in the injected sequence" bitfld.long 0x0 7.--8. "JEXTEN,External trigger enable and polarity selection for injected channels" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 2.--6. 1. "JEXTSEL,External trigger selection for injected group" newline bitfld.long 0x0 0.--1. "JL,Injected channel sequence length" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "ADC_OFCFGR1,ADC offset 1 configuration register" hexmask.long.byte 0x4 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0x4 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0x4 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0x8 "ADC_OFCFGR2,ADC offset 2 configuration register" hexmask.long.byte 0x8 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0x8 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0x8 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0x8 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0xC "ADC_OFCFGR3,ADC offset 3 configuration register" hexmask.long.byte 0xC 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0xC 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0xC 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0xC 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0x10 "ADC_OFCFGR4,ADC offset 4 configuration register" hexmask.long.byte 0x10 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y" bitfld.long 0x10 26. "SSAT,Signed saturation enable" "B_0x0,B_0x1" bitfld.long 0x10 25. "USAT,Unsigned saturation enable" "B_0x0,B_0x1" bitfld.long 0x10 24. "POSOFF,Positive offset enable" "B_0x0,B_0x1" line.long 0x14 "ADC_OFR1,ADC offset 1 register" hexmask.long.tbyte 0x14 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x18 "ADC_OFR2,ADC offset 2 register" hexmask.long.tbyte 0x18 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x1C "ADC_OFR3,ADC offset 3 register" hexmask.long.tbyte 0x1C 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x20 "ADC_OFR4,ADC offset 4 register" hexmask.long.tbyte 0x20 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits" line.long 0x24 "ADC_GCOMP,ADC gain compensation register" bitfld.long 0x24 31. "GCOMP,Gain compensation mode" "B_0x0,B_0x1" hexmask.long.word 0x24 0.--13. 1. "GCOMPCOEFF,Gain compensation coefficient" rgroup.long 0x80++0xF line.long 0x0 "ADC_JDR1,ADC injected channel 1 data register" hexmask.long 0x0 0.--31. 1. "JDATA,Injected data" line.long 0x4 "ADC_JDR2,ADC injected channel 2 data register" hexmask.long 0x4 0.--31. 1. "JDATA,Injected data" line.long 0x8 "ADC_JDR3,ADC injected channel 3 data register" hexmask.long 0x8 0.--31. 1. "JDATA,Injected data" line.long 0xC "ADC_JDR4,ADC injected channel 4 data register" hexmask.long 0xC 0.--31. 1. "JDATA,Injected data" group.long 0xA0++0x27 line.long 0x0 "ADC_AWD2CR,ADC Analog Watchdog 2 Configuration Register" hexmask.long.tbyte 0x0 0.--19. 1. "AWDCH,Analog watchdog 2 channel selection" line.long 0x4 "ADC_AWD3CR,ADC Analog Watchdog 3 Configuration Register" hexmask.long.tbyte 0x4 0.--19. 1. "AWDCH,Analog watchdog 3 channel selection" line.long 0x8 "ADC_AWD1LTR,ADC analog watchdog 1 lower threshold register" hexmask.long.tbyte 0x8 0.--22. 1. "LTR,Analog watchdog 1 lower threshold" line.long 0xC "ADC_AWD1HTR,ADC analog watchdog 1 higher threshold register" bitfld.long 0xC 29.--31. "AWDFILT,Analog watchdog filtering parameter" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" hexmask.long.tbyte 0xC 0.--22. 1. "HTR,Analog watchdog 1 higher threshold" line.long 0x10 "ADC_AWD2LTR,ADC analog watchdog 2 lower threshold register" hexmask.long.tbyte 0x10 0.--22. 1. "LTR,Analog watchdog 2 lower threshold" line.long 0x14 "ADC_AWD2HTR,ADC analog watchdog 2 higher threshold register" hexmask.long.tbyte 0x14 0.--22. 1. "HTR,Analog watchdog 2 higher threshold" line.long 0x18 "ADC_AWD3LTR,ADC analog watchdog 3 lower threshold register" hexmask.long.tbyte 0x18 0.--22. 1. "LTR,Analog watchdog 3 lower threshold" line.long 0x1C "ADC_AWD3HTR,ADC analog watchdog 3 higher threshold register" hexmask.long.tbyte 0x1C 0.--22. 1. "HTR,Analog watchdog 3 higher threshold" line.long 0x20 "ADC_DIFSEL,ADC differential mode selection register" hexmask.long.tbyte 0x20 0.--19. 1. "DIFSEL,Differential mode for channels 19 to 0." line.long 0x24 "ADC_CALFACT,ADC calibration factors" bitfld.long 0x24 31. "CALADDOS,Calibration additional offset" "B_0x0,B_0x1" hexmask.long.word 0x24 16.--24. 1. "CALFACT_D,Calibration factors in differential mode" hexmask.long.word 0x24 0.--8. 1. "CALFACT_S,Calibration factors In single-ended mode" group.long 0xD0++0x3 line.long 0x0 "ADC_OR,ADC option register" bitfld.long 0x0 4. "OP4,Option bit 4" "B_0x0,B_0x1" bitfld.long 0x0 3. "OP3,Option bit 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "OP2,Option bit 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "OP1,Option bit 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "OP0,Option bit 0" "B_0x0,B_0x1" tree.end tree "ADCC3" base ad:0x404F0000 rgroup.long 0x0++0x3 line.long 0x0 "ADCC3_CSR,ADC3 common status register" bitfld.long 0x0 25. "AWD3_SLV,Analog watchdog 3 flag of the slave ADC" "0,1" bitfld.long 0x0 24. "AWD2_SLV,Analog watchdog 2 flag of the slave ADC" "0,1" bitfld.long 0x0 23. "AWD1_SLV,Analog watchdog 1 flag of the slave ADC" "0,1" bitfld.long 0x0 22. "JEOS_SLV,End of injected sequence flag of the slave ADC" "0,1" bitfld.long 0x0 21. "JEOC_SLV,End of injected conversion flag of the slave ADC" "0,1" bitfld.long 0x0 20. "OVR_SLV,Overrun flag of the slave ADC" "0,1" bitfld.long 0x0 19. "EOS_SLV,End of regular sequence flag of the slave ADC. This bit is a copy of the EOS bit in the corresponding ADC_ISR register." "0,1" bitfld.long 0x0 18. "EOC_SLV,End of regular conversion of the slave ADC" "0,1" newline bitfld.long 0x0 17. "EOSMP_SLV,End of sampling phase flag of the slave ADC" "0,1" bitfld.long 0x0 16. "ADRDY_SLV,Slave ADC ready" "0,1" bitfld.long 0x0 9. "AWD3_MST,Analog watchdog 3 flag of the master ADC" "0,1" bitfld.long 0x0 8. "AWD2_MST,Analog watchdog 2 flag of the master ADC" "0,1" bitfld.long 0x0 7. "AWD1_MST,Analog watchdog 1 flag of the master ADC" "0,1" bitfld.long 0x0 6. "JEOS_MST,End of injected sequence flag of the master ADC" "0,1" bitfld.long 0x0 5. "JEOC_MST,End of injected conversion flag of the master ADC" "0,1" bitfld.long 0x0 4. "OVR_MST,Overrun flag of the master ADC" "0,1" newline bitfld.long 0x0 3. "EOS_MST,End of regular sequence flag of the master ADC" "0,1" bitfld.long 0x0 2. "EOC_MST,End of regular conversion of the master ADC" "0,1" bitfld.long 0x0 1. "EOSMP_MST,End of Sampling phase flag of the master ADC" "0,1" bitfld.long 0x0 0. "ADRDY_MST,Master ADC ready" "0,1" group.long 0x8++0x3 line.long 0x0 "ADCC3_CCR,ADC3 common control register" bitfld.long 0x0 24. "VBATEN,VBAT enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "VREFEN,VsubREFINT/sub enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 18.--21. 1. "PRESC,ADC prescaler" bitfld.long 0x0 12. "SPRES,Single prescaler mode" "B_0x0,B_0x1" rgroup.long 0xF0++0xF line.long 0x0 "ADCC3_HWCFGR1,ADC3 hardware configuration register" hexmask.long.byte 0x0 8.--11. 1. "ANAIP,Analog IP compatibility" hexmask.long.byte 0x0 4.--7. 1. "OPBITS,Number of option bits" hexmask.long.byte 0x0 0.--3. 1. "ADCNUM,Number of ADCs implemented" line.long 0x4 "ADCC3_VERR,ADC3 version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "ADCC3_IPIDR,ADC3 identification register" hexmask.long 0x8 0.--31. 1. "ID,Peripheral identifier" line.long 0xC "ADCC3_SIDR,ADC3 size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size Identification" tree.end tree "ADCC12" base ad:0x404E0300 rgroup.long 0x0++0x3 line.long 0x0 "ADCC12_CSR,ADC12 common status register" bitfld.long 0x0 25. "AWD3_SLV,Analog watchdog 3 flag of the slave ADC" "0,1" bitfld.long 0x0 24. "AWD2_SLV,Analog watchdog 2 flag of the slave ADC" "0,1" bitfld.long 0x0 23. "AWD1_SLV,Analog watchdog 1 flag of the slave ADC" "0,1" bitfld.long 0x0 22. "JEOS_SLV,End of injected sequence flag of the slave ADC" "0,1" bitfld.long 0x0 21. "JEOC_SLV,End of injected conversion flag of the slave ADC" "0,1" bitfld.long 0x0 20. "OVR_SLV,Overrun flag of the slave ADC" "0,1" bitfld.long 0x0 19. "EOS_SLV,End of regular sequence flag of the slave ADC. This bit is a copy of the EOS bit in the corresponding ADC_ISR register." "0,1" bitfld.long 0x0 18. "EOC_SLV,End of regular conversion of the slave ADC" "0,1" newline bitfld.long 0x0 17. "EOSMP_SLV,End of sampling phase flag of the slave ADC" "0,1" bitfld.long 0x0 16. "ADRDY_SLV,Slave ADC ready" "0,1" bitfld.long 0x0 9. "AWD3_MST,Analog watchdog 3 flag of the master ADC" "0,1" bitfld.long 0x0 8. "AWD2_MST,Analog watchdog 2 flag of the master ADC" "0,1" bitfld.long 0x0 7. "AWD1_MST,Analog watchdog 1 flag of the master ADC" "0,1" bitfld.long 0x0 6. "JEOS_MST,End of injected sequence flag of the master ADC" "0,1" bitfld.long 0x0 5. "JEOC_MST,End of injected conversion flag of the master ADC" "0,1" bitfld.long 0x0 4. "OVR_MST,Overrun flag of the master ADC" "0,1" newline bitfld.long 0x0 3. "EOS_MST,End of regular sequence flag of the master ADC" "0,1" bitfld.long 0x0 2. "EOC_MST,End of regular conversion of the master ADC" "0,1" bitfld.long 0x0 1. "EOSMP_MST,End of Sampling phase flag of the master ADC" "0,1" bitfld.long 0x0 0. "ADRDY_MST,Master ADC ready" "0,1" group.long 0x8++0x3 line.long 0x0 "ADCC12_CCR,ADC12 common control register" bitfld.long 0x0 24. "VBATEN,VBAT enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "VREFEN,VsubREFINT/sub enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 18.--21. 1. "PRESC,ADC prescaler" bitfld.long 0x0 12. "SPRES,Single prescaler mode" "B_0x0,B_0x1" rgroup.long 0xF0++0xF line.long 0x0 "ADCC12_HWCFGR1,ADC12 hardware configuration register" hexmask.long.byte 0x0 8.--11. 1. "ANAIP,Analog IP compatibility" hexmask.long.byte 0x0 4.--7. 1. "OPBITS,Number of option bits" hexmask.long.byte 0x0 0.--3. 1. "ADCNUM,Number of ADCs implemented" line.long 0x4 "ADCC12_VERR,ADC12 version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "ADCC12_IPIDR,ADC12 identification register" hexmask.long 0x8 0.--31. 1. "ID,Peripheral identifier" line.long 0xC "ADCC12_SIDR,ADC12 size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size Identification" tree.end tree.end endif tree "ADF (Audio Digital Filter)" base ad:0x0 tree "ADF" base ad:0x46220000 group.long 0x0++0x7 line.long 0x0 "ADF_GCR,ADF global control register" bitfld.long 0x0 0. "TRGO,Trigger output control" "B_0x0,B_0x1" line.long 0x4 "ADF_CKGCR,ADF clock generator control register" rbitfld.long 0x4 31. "CKGACTIVE,Clock generator active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 24.--30. 1. "PROCDIV,Divider to control the serial interface clock" hexmask.long.byte 0x4 16.--19. 1. "CCKDIV,Divider to control the ADF_CCK clock" hexmask.long.byte 0x4 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x4 8. "TRGSENS,CKGEN trigger sensitivity selection" "B_0x0,B_0x1" bitfld.long 0x4 6. "CCK1DIR,ADF_CCK1 direction" "B_0x0,B_0x1" newline bitfld.long 0x4 5. "CCK0DIR,ADF_CCK0 direction" "B_0x0,B_0x1" bitfld.long 0x4 4. "CKGMOD,Clock generator mode" "B_0x0,B_0x1" bitfld.long 0x4 2. "CCK1EN,ADF_CCK1 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CCK0EN,ADF_CCK0 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CKGDEN,CKGEN dividers enable" "B_0x0,B_0x1" group.long 0x80++0x13 line.long 0x0 "ADF_SITF0CR,ADF serial interface control register 0" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "ADF_BSMX0CR,ADF bitstream matrix control register 0" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream selection" line.long 0x8 "ADF_DFLT0CR,ADF digital filter control register 0" rbitfld.long 0x8 31. "DFLTACTIVE,DFLT0 active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,DFLT0 run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,DFLT0 trigger signal selection" bitfld.long 0x8 8. "TRGSENS,DFLT0 trigger sensitivity selection" "B_0x0,B_0x1" bitfld.long 0x8 4.--6. "ACQMOD,DFLT0 trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,DFLT0 enable" "B_0x0,B_0x1" line.long 0xC "ADF_DFLT0CICR,ADF digital filer configuration register 0" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC order" "?,?,?,?,B_0x4,B_0x5,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "ADF_DFLT0RSFR,ADF reshape filter configuration register 0" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" group.long 0xA4++0x3 line.long 0x0 "ADF_DLY0CR,ADF delay control register 0" rbitfld.long 0x0 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" group.long 0xAC++0x7 line.long 0x0 "ADF_DFLT0IER,ADF DFLT0 interrupt enable register" bitfld.long 0x0 13. "SDLVLIE,SAD sound-level value ready enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "SDDETIE,Sound activity detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x4 "ADF_DFLT0ISR,ADF DFLT0 interrupt status register 0" bitfld.long 0x4 13. "SDLVLF,Sound level value ready flag" "B_0x0,B_0x1" bitfld.long 0x4 12. "SDDETF,Sound activity detection flag" "B_0x0,B_0x1" bitfld.long 0x4 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x4 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x4 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" rbitfld.long 0x4 3. "RXNEF,RXFIFO not empty flag" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x4 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" group.long 0xB8++0x7 line.long 0x0 "ADF_SADCR,ADF SAD control register" rbitfld.long 0x0 31. "SADACTIVE,SAD Active flag" "B_0x0,B_0x1" bitfld.long 0x0 12.--13. "SADMOD,SAD working mode" "B_0x0,B_0x1,?,?" bitfld.long 0x0 8.--10. "FRSIZE,Frame size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 7. "HYSTEN,Hysteresis enable" "B_0x0,B_0x1" rbitfld.long 0x0 4.--5. "SADST,SAD state" "B_0x0,B_0x1,?,B_0x3" bitfld.long 0x0 3. "DETCFG,Sound trigger event configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 1.--2. "DATCAP,Data capture mode" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SADEN,Sound activity detector enable" "B_0x0,B_0x1" line.long 0x4 "ADF_SADCFGR,ADF SAD configuration register" hexmask.long.word 0x4 16.--28. 1. "ANMIN,Minimum noise level" bitfld.long 0x4 12.--14. "HGOVR,Hangover time window" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 8.--10. "LFRNB,Number of learning frames" "B_0x0,B_0x1,B_0x2,B_0x3,?,?,?,?" bitfld.long 0x4 4.--6. "ANSLP,Ambient noise slope control" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--3. 1. "SNTHR,Signal to noise threshold" rgroup.long 0xC0++0x7 line.long 0x0 "ADF_SADSDLVR,ADF SAD sound level register" hexmask.long.word 0x0 0.--14. 1. "SDLVL,Short term sound level" line.long 0x4 "ADF_SADANLVR,ADF SAD ambient noise level register" hexmask.long.word 0x4 0.--14. 1. "ANLVL,Ambient noise level estimation" rgroup.long 0xF0++0x3 line.long 0x0 "ADF_DFLT0DR,ADF digital filter data register 0" hexmask.long.tbyte 0x0 8.--31. 1. "DR,Data processed by DFT0" rgroup.long 0xFF0++0xF line.long 0x0 "ADF_HWCFGR,ADF hardware configuration register" hexmask.long.byte 0x0 24.--31. 1. "OPTION_REGOUT,Support of ADF_OR register" hexmask.long.byte 0x0 20.--23. 1. "SAD,Sound activity detection" hexmask.long.byte 0x0 16.--19. 1. "FLT_CFG,Digital filter configuration" hexmask.long.byte 0x0 8.--15. 1. "NBF,Number of digital filter paths and serial interfaces" hexmask.long.byte 0x0 0.--7. 1. "FIFO_SIZE,FIFO size for ADF" line.long 0x4 "ADF_VERR,ADF version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,ADF major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,ADF minor revision" line.long 0x8 "ADF_IPIDR,ADF identification register" hexmask.long 0x8 0.--31. 1. "ID,ADF identifier value" line.long 0xC "ADF_SIDR,ADF size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification" tree.end sif (cpuis("*CA35")) tree "ADF_S" base ad:0x56220000 group.long 0x0++0x7 line.long 0x0 "ADF_GCR,ADF global control register" bitfld.long 0x0 0. "TRGO,Trigger output control" "B_0x0,B_0x1" line.long 0x4 "ADF_CKGCR,ADF clock generator control register" rbitfld.long 0x4 31. "CKGACTIVE,Clock generator active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 24.--30. 1. "PROCDIV,Divider to control the serial interface clock" hexmask.long.byte 0x4 16.--19. 1. "CCKDIV,Divider to control the ADF_CCK clock" hexmask.long.byte 0x4 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x4 8. "TRGSENS,CKGEN trigger sensitivity selection" "B_0x0,B_0x1" bitfld.long 0x4 6. "CCK1DIR,ADF_CCK1 direction" "B_0x0,B_0x1" newline bitfld.long 0x4 5. "CCK0DIR,ADF_CCK0 direction" "B_0x0,B_0x1" bitfld.long 0x4 4. "CKGMOD,Clock generator mode" "B_0x0,B_0x1" bitfld.long 0x4 2. "CCK1EN,ADF_CCK1 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CCK0EN,ADF_CCK0 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CKGDEN,CKGEN dividers enable" "B_0x0,B_0x1" group.long 0x80++0x13 line.long 0x0 "ADF_SITF0CR,ADF serial interface control register 0" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "ADF_BSMX0CR,ADF bitstream matrix control register 0" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream selection" line.long 0x8 "ADF_DFLT0CR,ADF digital filter control register 0" rbitfld.long 0x8 31. "DFLTACTIVE,DFLT0 active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,DFLT0 run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,DFLT0 trigger signal selection" bitfld.long 0x8 8. "TRGSENS,DFLT0 trigger sensitivity selection" "B_0x0,B_0x1" bitfld.long 0x8 4.--6. "ACQMOD,DFLT0 trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,DFLT0 enable" "B_0x0,B_0x1" line.long 0xC "ADF_DFLT0CICR,ADF digital filer configuration register 0" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC order" "?,?,?,?,B_0x4,B_0x5,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "ADF_DFLT0RSFR,ADF reshape filter configuration register 0" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" group.long 0xA4++0x3 line.long 0x0 "ADF_DLY0CR,ADF delay control register 0" rbitfld.long 0x0 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" group.long 0xAC++0x7 line.long 0x0 "ADF_DFLT0IER,ADF DFLT0 interrupt enable register" bitfld.long 0x0 13. "SDLVLIE,SAD sound-level value ready enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "SDDETIE,Sound activity detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x4 "ADF_DFLT0ISR,ADF DFLT0 interrupt status register 0" bitfld.long 0x4 13. "SDLVLF,Sound level value ready flag" "B_0x0,B_0x1" bitfld.long 0x4 12. "SDDETF,Sound activity detection flag" "B_0x0,B_0x1" bitfld.long 0x4 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x4 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x4 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" rbitfld.long 0x4 3. "RXNEF,RXFIFO not empty flag" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x4 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" group.long 0xB8++0x7 line.long 0x0 "ADF_SADCR,ADF SAD control register" rbitfld.long 0x0 31. "SADACTIVE,SAD Active flag" "B_0x0,B_0x1" bitfld.long 0x0 12.--13. "SADMOD,SAD working mode" "B_0x0,B_0x1,?,?" bitfld.long 0x0 8.--10. "FRSIZE,Frame size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 7. "HYSTEN,Hysteresis enable" "B_0x0,B_0x1" rbitfld.long 0x0 4.--5. "SADST,SAD state" "B_0x0,B_0x1,?,B_0x3" bitfld.long 0x0 3. "DETCFG,Sound trigger event configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 1.--2. "DATCAP,Data capture mode" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SADEN,Sound activity detector enable" "B_0x0,B_0x1" line.long 0x4 "ADF_SADCFGR,ADF SAD configuration register" hexmask.long.word 0x4 16.--28. 1. "ANMIN,Minimum noise level" bitfld.long 0x4 12.--14. "HGOVR,Hangover time window" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 8.--10. "LFRNB,Number of learning frames" "B_0x0,B_0x1,B_0x2,B_0x3,?,?,?,?" bitfld.long 0x4 4.--6. "ANSLP,Ambient noise slope control" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--3. 1. "SNTHR,Signal to noise threshold" rgroup.long 0xC0++0x7 line.long 0x0 "ADF_SADSDLVR,ADF SAD sound level register" hexmask.long.word 0x0 0.--14. 1. "SDLVL,Short term sound level" line.long 0x4 "ADF_SADANLVR,ADF SAD ambient noise level register" hexmask.long.word 0x4 0.--14. 1. "ANLVL,Ambient noise level estimation" rgroup.long 0xF0++0x3 line.long 0x0 "ADF_DFLT0DR,ADF digital filter data register 0" hexmask.long.tbyte 0x0 8.--31. 1. "DR,Data processed by DFT0" rgroup.long 0xFF0++0xF line.long 0x0 "ADF_HWCFGR,ADF hardware configuration register" hexmask.long.byte 0x0 24.--31. 1. "OPTION_REGOUT,Support of ADF_OR register" hexmask.long.byte 0x0 20.--23. 1. "SAD,Sound activity detection" hexmask.long.byte 0x0 16.--19. 1. "FLT_CFG,Digital filter configuration" hexmask.long.byte 0x0 8.--15. 1. "NBF,Number of digital filter paths and serial interfaces" hexmask.long.byte 0x0 0.--7. 1. "FIFO_SIZE,FIFO size for ADF" line.long 0x4 "ADF_VERR,ADF version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,ADF major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,ADF minor revision" line.long 0x8 "ADF_IPIDR,ADF identification register" hexmask.long 0x8 0.--31. 1. "ID,ADF identifier value" line.long 0xC "ADF_SIDR,ADF size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CM33F")) tree "ADF_S" base ad:0x56220000 group.long 0x0++0x7 line.long 0x0 "ADF_GCR,ADF global control register" bitfld.long 0x0 0. "TRGO,Trigger output control" "B_0x0,B_0x1" line.long 0x4 "ADF_CKGCR,ADF clock generator control register" rbitfld.long 0x4 31. "CKGACTIVE,Clock generator active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 24.--30. 1. "PROCDIV,Divider to control the serial interface clock" hexmask.long.byte 0x4 16.--19. 1. "CCKDIV,Divider to control the ADF_CCK clock" hexmask.long.byte 0x4 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x4 8. "TRGSENS,CKGEN trigger sensitivity selection" "B_0x0,B_0x1" bitfld.long 0x4 6. "CCK1DIR,ADF_CCK1 direction" "B_0x0,B_0x1" newline bitfld.long 0x4 5. "CCK0DIR,ADF_CCK0 direction" "B_0x0,B_0x1" bitfld.long 0x4 4. "CKGMOD,Clock generator mode" "B_0x0,B_0x1" bitfld.long 0x4 2. "CCK1EN,ADF_CCK1 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CCK0EN,ADF_CCK0 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CKGDEN,CKGEN dividers enable" "B_0x0,B_0x1" group.long 0x80++0x13 line.long 0x0 "ADF_SITF0CR,ADF serial interface control register 0" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "ADF_BSMX0CR,ADF bitstream matrix control register 0" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream selection" line.long 0x8 "ADF_DFLT0CR,ADF digital filter control register 0" rbitfld.long 0x8 31. "DFLTACTIVE,DFLT0 active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,DFLT0 run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,DFLT0 trigger signal selection" bitfld.long 0x8 8. "TRGSENS,DFLT0 trigger sensitivity selection" "B_0x0,B_0x1" bitfld.long 0x8 4.--6. "ACQMOD,DFLT0 trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,DFLT0 enable" "B_0x0,B_0x1" line.long 0xC "ADF_DFLT0CICR,ADF digital filer configuration register 0" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC order" "?,?,?,?,B_0x4,B_0x5,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "ADF_DFLT0RSFR,ADF reshape filter configuration register 0" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" group.long 0xA4++0x3 line.long 0x0 "ADF_DLY0CR,ADF delay control register 0" rbitfld.long 0x0 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" group.long 0xAC++0x7 line.long 0x0 "ADF_DFLT0IER,ADF DFLT0 interrupt enable register" bitfld.long 0x0 13. "SDLVLIE,SAD sound-level value ready enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "SDDETIE,Sound activity detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x4 "ADF_DFLT0ISR,ADF DFLT0 interrupt status register 0" bitfld.long 0x4 13. "SDLVLF,Sound level value ready flag" "B_0x0,B_0x1" bitfld.long 0x4 12. "SDDETF,Sound activity detection flag" "B_0x0,B_0x1" bitfld.long 0x4 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x4 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x4 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" rbitfld.long 0x4 3. "RXNEF,RXFIFO not empty flag" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x4 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" group.long 0xB8++0x7 line.long 0x0 "ADF_SADCR,ADF SAD control register" rbitfld.long 0x0 31. "SADACTIVE,SAD Active flag" "B_0x0,B_0x1" bitfld.long 0x0 12.--13. "SADMOD,SAD working mode" "B_0x0,B_0x1,?,?" bitfld.long 0x0 8.--10. "FRSIZE,Frame size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 7. "HYSTEN,Hysteresis enable" "B_0x0,B_0x1" rbitfld.long 0x0 4.--5. "SADST,SAD state" "B_0x0,B_0x1,?,B_0x3" bitfld.long 0x0 3. "DETCFG,Sound trigger event configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 1.--2. "DATCAP,Data capture mode" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SADEN,Sound activity detector enable" "B_0x0,B_0x1" line.long 0x4 "ADF_SADCFGR,ADF SAD configuration register" hexmask.long.word 0x4 16.--28. 1. "ANMIN,Minimum noise level" bitfld.long 0x4 12.--14. "HGOVR,Hangover time window" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 8.--10. "LFRNB,Number of learning frames" "B_0x0,B_0x1,B_0x2,B_0x3,?,?,?,?" bitfld.long 0x4 4.--6. "ANSLP,Ambient noise slope control" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 0.--3. 1. "SNTHR,Signal to noise threshold" rgroup.long 0xC0++0x7 line.long 0x0 "ADF_SADSDLVR,ADF SAD sound level register" hexmask.long.word 0x0 0.--14. 1. "SDLVL,Short term sound level" line.long 0x4 "ADF_SADANLVR,ADF SAD ambient noise level register" hexmask.long.word 0x4 0.--14. 1. "ANLVL,Ambient noise level estimation" rgroup.long 0xF0++0x3 line.long 0x0 "ADF_DFLT0DR,ADF digital filter data register 0" hexmask.long.tbyte 0x0 8.--31. 1. "DR,Data processed by DFT0" rgroup.long 0xFF0++0xF line.long 0x0 "ADF_HWCFGR,ADF hardware configuration register" hexmask.long.byte 0x0 24.--31. 1. "OPTION_REGOUT,Support of ADF_OR register" hexmask.long.byte 0x0 20.--23. 1. "SAD,Sound activity detection" hexmask.long.byte 0x0 16.--19. 1. "FLT_CFG,Digital filter configuration" hexmask.long.byte 0x0 8.--15. 1. "NBF,Number of digital filter paths and serial interfaces" hexmask.long.byte 0x0 0.--7. 1. "FIFO_SIZE,FIFO size for ADF" line.long 0x4 "ADF_VERR,ADF version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,ADF major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,ADF minor revision" line.long 0x8 "ADF_IPIDR,ADF identification register" hexmask.long 0x8 0.--31. 1. "ID,ADF identifier value" line.long 0xC "ADF_SIDR,ADF size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification" tree.end endif tree.end sif (cpuis("*CA35")||cpuis("*CM33F")) tree "BSEC (Boot and Security Control)" base ad:0x0 tree "BSEC" base ad:0x44000000 group.long 0x0++0x5DF line.long 0x0 "BSEC_FVR0,BSEC fuse word 0 value register" hexmask.long 0x0 0.--31. 1. "FV,fuse value" line.long 0x4 "BSEC_FVR1,BSEC fuse word 1 value register" hexmask.long 0x4 0.--31. 1. "FV,fuse value" line.long 0x8 "BSEC_FVR2,BSEC fuse word 2 value register" hexmask.long 0x8 0.--31. 1. "FV,fuse value" line.long 0xC "BSEC_FVR3,BSEC fuse word 3 value register" hexmask.long 0xC 0.--31. 1. "FV,fuse value" line.long 0x10 "BSEC_FVR4,BSEC fuse word 4 value register" hexmask.long 0x10 0.--31. 1. "FV,fuse value" line.long 0x14 "BSEC_FVR5,BSEC fuse word 5 value register" hexmask.long 0x14 0.--31. 1. "FV,fuse value" line.long 0x18 "BSEC_FVR6,BSEC fuse word 6 value register" hexmask.long 0x18 0.--31. 1. "FV,fuse value" line.long 0x1C "BSEC_FVR7,BSEC fuse word 7 value register" hexmask.long 0x1C 0.--31. 1. "FV,fuse value" line.long 0x20 "BSEC_FVR8,BSEC fuse word 8 value register" hexmask.long 0x20 0.--31. 1. "FV,fuse value" line.long 0x24 "BSEC_FVR9,BSEC fuse word 9 value register" hexmask.long 0x24 0.--31. 1. "FV,fuse value" line.long 0x28 "BSEC_FVR10,BSEC fuse word 10 value register" hexmask.long 0x28 0.--31. 1. "FV,fuse value" line.long 0x2C "BSEC_FVR11,BSEC fuse word 11 value register" hexmask.long 0x2C 0.--31. 1. "FV,fuse value" line.long 0x30 "BSEC_FVR12,BSEC fuse word 12 value register" hexmask.long 0x30 0.--31. 1. "FV,fuse value" line.long 0x34 "BSEC_FVR13,BSEC fuse word 13 value register" hexmask.long 0x34 0.--31. 1. "FV,fuse value" line.long 0x38 "BSEC_FVR14,BSEC fuse word 14 value register" hexmask.long 0x38 0.--31. 1. "FV,fuse value" line.long 0x3C "BSEC_FVR15,BSEC fuse word 15 value register" hexmask.long 0x3C 0.--31. 1. "FV,fuse value" line.long 0x40 "BSEC_FVR16,BSEC fuse word 16 value register" hexmask.long 0x40 0.--31. 1. "FV,fuse value" line.long 0x44 "BSEC_FVR17,BSEC fuse word 17 value register" hexmask.long 0x44 0.--31. 1. "FV,fuse value" line.long 0x48 "BSEC_FVR18,BSEC fuse word 18 value register" hexmask.long 0x48 0.--31. 1. "FV,fuse value" line.long 0x4C "BSEC_FVR19,BSEC fuse word 19 value register" hexmask.long 0x4C 0.--31. 1. "FV,fuse value" line.long 0x50 "BSEC_FVR20,BSEC fuse word 20 value register" hexmask.long 0x50 0.--31. 1. "FV,fuse value" line.long 0x54 "BSEC_FVR21,BSEC fuse word 21 value register" hexmask.long 0x54 0.--31. 1. "FV,fuse value" line.long 0x58 "BSEC_FVR22,BSEC fuse word 22 value register" hexmask.long 0x58 0.--31. 1. "FV,fuse value" line.long 0x5C "BSEC_FVR23,BSEC fuse word 23 value register" hexmask.long 0x5C 0.--31. 1. "FV,fuse value" line.long 0x60 "BSEC_FVR24,BSEC fuse word 24 value register" hexmask.long 0x60 0.--31. 1. "FV,fuse value" line.long 0x64 "BSEC_FVR25,BSEC fuse word 25 value register" hexmask.long 0x64 0.--31. 1. "FV,fuse value" line.long 0x68 "BSEC_FVR26,BSEC fuse word 26 value register" hexmask.long 0x68 0.--31. 1. "FV,fuse value" line.long 0x6C "BSEC_FVR27,BSEC fuse word 27 value register" hexmask.long 0x6C 0.--31. 1. "FV,fuse value" line.long 0x70 "BSEC_FVR28,BSEC fuse word 28 value register" hexmask.long 0x70 0.--31. 1. "FV,fuse value" line.long 0x74 "BSEC_FVR29,BSEC fuse word 29 value register" hexmask.long 0x74 0.--31. 1. "FV,fuse value" line.long 0x78 "BSEC_FVR30,BSEC fuse word 30 value register" hexmask.long 0x78 0.--31. 1. "FV,fuse value" line.long 0x7C "BSEC_FVR31,BSEC fuse word 31 value register" hexmask.long 0x7C 0.--31. 1. "FV,fuse value" line.long 0x80 "BSEC_FVR32,BSEC fuse word 32 value register" hexmask.long 0x80 0.--31. 1. "FV,fuse value" line.long 0x84 "BSEC_FVR33,BSEC fuse word 33 value register" hexmask.long 0x84 0.--31. 1. "FV,fuse value" line.long 0x88 "BSEC_FVR34,BSEC fuse word 34 value register" hexmask.long 0x88 0.--31. 1. "FV,fuse value" line.long 0x8C "BSEC_FVR35,BSEC fuse word 35 value register" hexmask.long 0x8C 0.--31. 1. "FV,fuse value" line.long 0x90 "BSEC_FVR36,BSEC fuse word 36 value register" hexmask.long 0x90 0.--31. 1. "FV,fuse value" line.long 0x94 "BSEC_FVR37,BSEC fuse word 37 value register" hexmask.long 0x94 0.--31. 1. "FV,fuse value" line.long 0x98 "BSEC_FVR38,BSEC fuse word 38 value register" hexmask.long 0x98 0.--31. 1. "FV,fuse value" line.long 0x9C "BSEC_FVR39,BSEC fuse word 39 value register" hexmask.long 0x9C 0.--31. 1. "FV,fuse value" line.long 0xA0 "BSEC_FVR40,BSEC fuse word 40 value register" hexmask.long 0xA0 0.--31. 1. "FV,fuse value" line.long 0xA4 "BSEC_FVR41,BSEC fuse word 41 value register" hexmask.long 0xA4 0.--31. 1. "FV,fuse value" line.long 0xA8 "BSEC_FVR42,BSEC fuse word 42 value register" hexmask.long 0xA8 0.--31. 1. "FV,fuse value" line.long 0xAC "BSEC_FVR43,BSEC fuse word 43 value register" hexmask.long 0xAC 0.--31. 1. "FV,fuse value" line.long 0xB0 "BSEC_FVR44,BSEC fuse word 44 value register" hexmask.long 0xB0 0.--31. 1. "FV,fuse value" line.long 0xB4 "BSEC_FVR45,BSEC fuse word 45 value register" hexmask.long 0xB4 0.--31. 1. "FV,fuse value" line.long 0xB8 "BSEC_FVR46,BSEC fuse word 46 value register" hexmask.long 0xB8 0.--31. 1. "FV,fuse value" line.long 0xBC "BSEC_FVR47,BSEC fuse word 47 value register" hexmask.long 0xBC 0.--31. 1. "FV,fuse value" line.long 0xC0 "BSEC_FVR48,BSEC fuse word 48 value register" hexmask.long 0xC0 0.--31. 1. "FV,fuse value" line.long 0xC4 "BSEC_FVR49,BSEC fuse word 49 value register" hexmask.long 0xC4 0.--31. 1. "FV,fuse value" line.long 0xC8 "BSEC_FVR50,BSEC fuse word 50 value register" hexmask.long 0xC8 0.--31. 1. "FV,fuse value" line.long 0xCC "BSEC_FVR51,BSEC fuse word 51 value register" hexmask.long 0xCC 0.--31. 1. "FV,fuse value" line.long 0xD0 "BSEC_FVR52,BSEC fuse word 52 value register" hexmask.long 0xD0 0.--31. 1. "FV,fuse value" line.long 0xD4 "BSEC_FVR53,BSEC fuse word 53 value register" hexmask.long 0xD4 0.--31. 1. "FV,fuse value" line.long 0xD8 "BSEC_FVR54,BSEC fuse word 54 value register" hexmask.long 0xD8 0.--31. 1. "FV,fuse value" line.long 0xDC "BSEC_FVR55,BSEC fuse word 55 value register" hexmask.long 0xDC 0.--31. 1. "FV,fuse value" line.long 0xE0 "BSEC_FVR56,BSEC fuse word 56 value register" hexmask.long 0xE0 0.--31. 1. "FV,fuse value" line.long 0xE4 "BSEC_FVR57,BSEC fuse word 57 value register" hexmask.long 0xE4 0.--31. 1. "FV,fuse value" line.long 0xE8 "BSEC_FVR58,BSEC fuse word 58 value register" hexmask.long 0xE8 0.--31. 1. "FV,fuse value" line.long 0xEC "BSEC_FVR59,BSEC fuse word 59 value register" hexmask.long 0xEC 0.--31. 1. "FV,fuse value" line.long 0xF0 "BSEC_FVR60,BSEC fuse word 60 value register" hexmask.long 0xF0 0.--31. 1. "FV,fuse value" line.long 0xF4 "BSEC_FVR61,BSEC fuse word 61 value register" hexmask.long 0xF4 0.--31. 1. "FV,fuse value" line.long 0xF8 "BSEC_FVR62,BSEC fuse word 62 value register" hexmask.long 0xF8 0.--31. 1. "FV,fuse value" line.long 0xFC "BSEC_FVR63,BSEC fuse word 63 value register" hexmask.long 0xFC 0.--31. 1. "FV,fuse value" line.long 0x100 "BSEC_FVR64,BSEC fuse word 64 value register" hexmask.long 0x100 0.--31. 1. "FV,fuse value" line.long 0x104 "BSEC_FVR65,BSEC fuse word 65 value register" hexmask.long 0x104 0.--31. 1. "FV,fuse value" line.long 0x108 "BSEC_FVR66,BSEC fuse word 66 value register" hexmask.long 0x108 0.--31. 1. "FV,fuse value" line.long 0x10C "BSEC_FVR67,BSEC fuse word 67 value register" hexmask.long 0x10C 0.--31. 1. "FV,fuse value" line.long 0x110 "BSEC_FVR68,BSEC fuse word 68 value register" hexmask.long 0x110 0.--31. 1. "FV,fuse value" line.long 0x114 "BSEC_FVR69,BSEC fuse word 69 value register" hexmask.long 0x114 0.--31. 1. "FV,fuse value" line.long 0x118 "BSEC_FVR70,BSEC fuse word 70 value register" hexmask.long 0x118 0.--31. 1. "FV,fuse value" line.long 0x11C "BSEC_FVR71,BSEC fuse word 71 value register" hexmask.long 0x11C 0.--31. 1. "FV,fuse value" line.long 0x120 "BSEC_FVR72,BSEC fuse word 72 value register" hexmask.long 0x120 0.--31. 1. "FV,fuse value" line.long 0x124 "BSEC_FVR73,BSEC fuse word 73 value register" hexmask.long 0x124 0.--31. 1. "FV,fuse value" line.long 0x128 "BSEC_FVR74,BSEC fuse word 74 value register" hexmask.long 0x128 0.--31. 1. "FV,fuse value" line.long 0x12C "BSEC_FVR75,BSEC fuse word 75 value register" hexmask.long 0x12C 0.--31. 1. "FV,fuse value" line.long 0x130 "BSEC_FVR76,BSEC fuse word 76 value register" hexmask.long 0x130 0.--31. 1. "FV,fuse value" line.long 0x134 "BSEC_FVR77,BSEC fuse word 77 value register" hexmask.long 0x134 0.--31. 1. "FV,fuse value" line.long 0x138 "BSEC_FVR78,BSEC fuse word 78 value register" hexmask.long 0x138 0.--31. 1. "FV,fuse value" line.long 0x13C "BSEC_FVR79,BSEC fuse word 79 value register" hexmask.long 0x13C 0.--31. 1. "FV,fuse value" line.long 0x140 "BSEC_FVR80,BSEC fuse word 80 value register" hexmask.long 0x140 0.--31. 1. "FV,fuse value" line.long 0x144 "BSEC_FVR81,BSEC fuse word 81 value register" hexmask.long 0x144 0.--31. 1. "FV,fuse value" line.long 0x148 "BSEC_FVR82,BSEC fuse word 82 value register" hexmask.long 0x148 0.--31. 1. "FV,fuse value" line.long 0x14C "BSEC_FVR83,BSEC fuse word 83 value register" hexmask.long 0x14C 0.--31. 1. "FV,fuse value" line.long 0x150 "BSEC_FVR84,BSEC fuse word 84 value register" hexmask.long 0x150 0.--31. 1. "FV,fuse value" line.long 0x154 "BSEC_FVR85,BSEC fuse word 85 value register" hexmask.long 0x154 0.--31. 1. "FV,fuse value" line.long 0x158 "BSEC_FVR86,BSEC fuse word 86 value register" hexmask.long 0x158 0.--31. 1. "FV,fuse value" line.long 0x15C "BSEC_FVR87,BSEC fuse word 87 value register" hexmask.long 0x15C 0.--31. 1. "FV,fuse value" line.long 0x160 "BSEC_FVR88,BSEC fuse word 88 value register" hexmask.long 0x160 0.--31. 1. "FV,fuse value" line.long 0x164 "BSEC_FVR89,BSEC fuse word 89 value register" hexmask.long 0x164 0.--31. 1. "FV,fuse value" line.long 0x168 "BSEC_FVR90,BSEC fuse word 90 value register" hexmask.long 0x168 0.--31. 1. "FV,fuse value" line.long 0x16C "BSEC_FVR91,BSEC fuse word 91 value register" hexmask.long 0x16C 0.--31. 1. "FV,fuse value" line.long 0x170 "BSEC_FVR92,BSEC fuse word 92 value register" hexmask.long 0x170 0.--31. 1. "FV,fuse value" line.long 0x174 "BSEC_FVR93,BSEC fuse word 93 value register" hexmask.long 0x174 0.--31. 1. "FV,fuse value" line.long 0x178 "BSEC_FVR94,BSEC fuse word 94 value register" hexmask.long 0x178 0.--31. 1. "FV,fuse value" line.long 0x17C "BSEC_FVR95,BSEC fuse word 95 value register" hexmask.long 0x17C 0.--31. 1. "FV,fuse value" line.long 0x180 "BSEC_FVR96,BSEC fuse word 96 value register" hexmask.long 0x180 0.--31. 1. "FV,fuse value" line.long 0x184 "BSEC_FVR97,BSEC fuse word 97 value register" hexmask.long 0x184 0.--31. 1. "FV,fuse value" line.long 0x188 "BSEC_FVR98,BSEC fuse word 98 value register" hexmask.long 0x188 0.--31. 1. "FV,fuse value" line.long 0x18C "BSEC_FVR99,BSEC fuse word 99 value register" hexmask.long 0x18C 0.--31. 1. "FV,fuse value" line.long 0x190 "BSEC_FVR100,BSEC fuse word 100 value register" hexmask.long 0x190 0.--31. 1. "FV,fuse value" line.long 0x194 "BSEC_FVR101,BSEC fuse word 101 value register" hexmask.long 0x194 0.--31. 1. "FV,fuse value" line.long 0x198 "BSEC_FVR102,BSEC fuse word 102 value register" hexmask.long 0x198 0.--31. 1. "FV,fuse value" line.long 0x19C "BSEC_FVR103,BSEC fuse word 103 value register" hexmask.long 0x19C 0.--31. 1. "FV,fuse value" line.long 0x1A0 "BSEC_FVR104,BSEC fuse word 104 value register" hexmask.long 0x1A0 0.--31. 1. "FV,fuse value" line.long 0x1A4 "BSEC_FVR105,BSEC fuse word 105 value register" hexmask.long 0x1A4 0.--31. 1. "FV,fuse value" line.long 0x1A8 "BSEC_FVR106,BSEC fuse word 106 value register" hexmask.long 0x1A8 0.--31. 1. "FV,fuse value" line.long 0x1AC "BSEC_FVR107,BSEC fuse word 107 value register" hexmask.long 0x1AC 0.--31. 1. "FV,fuse value" line.long 0x1B0 "BSEC_FVR108,BSEC fuse word 108 value register" hexmask.long 0x1B0 0.--31. 1. "FV,fuse value" line.long 0x1B4 "BSEC_FVR109,BSEC fuse word 109 value register" hexmask.long 0x1B4 0.--31. 1. "FV,fuse value" line.long 0x1B8 "BSEC_FVR110,BSEC fuse word 110 value register" hexmask.long 0x1B8 0.--31. 1. "FV,fuse value" line.long 0x1BC "BSEC_FVR111,BSEC fuse word 111 value register" hexmask.long 0x1BC 0.--31. 1. "FV,fuse value" line.long 0x1C0 "BSEC_FVR112,BSEC fuse word 112 value register" hexmask.long 0x1C0 0.--31. 1. "FV,fuse value" line.long 0x1C4 "BSEC_FVR113,BSEC fuse word 113 value register" hexmask.long 0x1C4 0.--31. 1. "FV,fuse value" line.long 0x1C8 "BSEC_FVR114,BSEC fuse word 114 value register" hexmask.long 0x1C8 0.--31. 1. "FV,fuse value" line.long 0x1CC "BSEC_FVR115,BSEC fuse word 115 value register" hexmask.long 0x1CC 0.--31. 1. "FV,fuse value" line.long 0x1D0 "BSEC_FVR116,BSEC fuse word 116 value register" hexmask.long 0x1D0 0.--31. 1. "FV,fuse value" line.long 0x1D4 "BSEC_FVR117,BSEC fuse word 117 value register" hexmask.long 0x1D4 0.--31. 1. "FV,fuse value" line.long 0x1D8 "BSEC_FVR118,BSEC fuse word 118 value register" hexmask.long 0x1D8 0.--31. 1. "FV,fuse value" line.long 0x1DC "BSEC_FVR119,BSEC fuse word 119 value register" hexmask.long 0x1DC 0.--31. 1. "FV,fuse value" line.long 0x1E0 "BSEC_FVR120,BSEC fuse word 120 value register" hexmask.long 0x1E0 0.--31. 1. "FV,fuse value" line.long 0x1E4 "BSEC_FVR121,BSEC fuse word 121 value register" hexmask.long 0x1E4 0.--31. 1. "FV,fuse value" line.long 0x1E8 "BSEC_FVR122,BSEC fuse word 122 value register" hexmask.long 0x1E8 0.--31. 1. "FV,fuse value" line.long 0x1EC "BSEC_FVR123,BSEC fuse word 123 value register" hexmask.long 0x1EC 0.--31. 1. "FV,fuse value" line.long 0x1F0 "BSEC_FVR124,BSEC fuse word 124 value register" hexmask.long 0x1F0 0.--31. 1. "FV,fuse value" line.long 0x1F4 "BSEC_FVR125,BSEC fuse word 125 value register" hexmask.long 0x1F4 0.--31. 1. "FV,fuse value" line.long 0x1F8 "BSEC_FVR126,BSEC fuse word 126 value register" hexmask.long 0x1F8 0.--31. 1. "FV,fuse value" line.long 0x1FC "BSEC_FVR127,BSEC fuse word 127 value register" hexmask.long 0x1FC 0.--31. 1. "FV,fuse value" line.long 0x200 "BSEC_FVR128,BSEC fuse word 128 value register" hexmask.long 0x200 0.--31. 1. "FV,fuse value" line.long 0x204 "BSEC_FVR129,BSEC fuse word 129 value register" hexmask.long 0x204 0.--31. 1. "FV,fuse value" line.long 0x208 "BSEC_FVR130,BSEC fuse word 130 value register" hexmask.long 0x208 0.--31. 1. "FV,fuse value" line.long 0x20C "BSEC_FVR131,BSEC fuse word 131 value register" hexmask.long 0x20C 0.--31. 1. "FV,fuse value" line.long 0x210 "BSEC_FVR132,BSEC fuse word 132 value register" hexmask.long 0x210 0.--31. 1. "FV,fuse value" line.long 0x214 "BSEC_FVR133,BSEC fuse word 133 value register" hexmask.long 0x214 0.--31. 1. "FV,fuse value" line.long 0x218 "BSEC_FVR134,BSEC fuse word 134 value register" hexmask.long 0x218 0.--31. 1. "FV,fuse value" line.long 0x21C "BSEC_FVR135,BSEC fuse word 135 value register" hexmask.long 0x21C 0.--31. 1. "FV,fuse value" line.long 0x220 "BSEC_FVR136,BSEC fuse word 136 value register" hexmask.long 0x220 0.--31. 1. "FV,fuse value" line.long 0x224 "BSEC_FVR137,BSEC fuse word 137 value register" hexmask.long 0x224 0.--31. 1. "FV,fuse value" line.long 0x228 "BSEC_FVR138,BSEC fuse word 138 value register" hexmask.long 0x228 0.--31. 1. "FV,fuse value" line.long 0x22C "BSEC_FVR139,BSEC fuse word 139 value register" hexmask.long 0x22C 0.--31. 1. "FV,fuse value" line.long 0x230 "BSEC_FVR140,BSEC fuse word 140 value register" hexmask.long 0x230 0.--31. 1. "FV,fuse value" line.long 0x234 "BSEC_FVR141,BSEC fuse word 141 value register" hexmask.long 0x234 0.--31. 1. "FV,fuse value" line.long 0x238 "BSEC_FVR142,BSEC fuse word 142 value register" hexmask.long 0x238 0.--31. 1. "FV,fuse value" line.long 0x23C "BSEC_FVR143,BSEC fuse word 143 value register" hexmask.long 0x23C 0.--31. 1. "FV,fuse value" line.long 0x240 "BSEC_FVR144,BSEC fuse word 144 value register" hexmask.long 0x240 0.--31. 1. "FV,fuse value" line.long 0x244 "BSEC_FVR145,BSEC fuse word 145 value register" hexmask.long 0x244 0.--31. 1. "FV,fuse value" line.long 0x248 "BSEC_FVR146,BSEC fuse word 146 value register" hexmask.long 0x248 0.--31. 1. "FV,fuse value" line.long 0x24C "BSEC_FVR147,BSEC fuse word 147 value register" hexmask.long 0x24C 0.--31. 1. "FV,fuse value" line.long 0x250 "BSEC_FVR148,BSEC fuse word 148 value register" hexmask.long 0x250 0.--31. 1. "FV,fuse value" line.long 0x254 "BSEC_FVR149,BSEC fuse word 149 value register" hexmask.long 0x254 0.--31. 1. "FV,fuse value" line.long 0x258 "BSEC_FVR150,BSEC fuse word 150 value register" hexmask.long 0x258 0.--31. 1. "FV,fuse value" line.long 0x25C "BSEC_FVR151,BSEC fuse word 151 value register" hexmask.long 0x25C 0.--31. 1. "FV,fuse value" line.long 0x260 "BSEC_FVR152,BSEC fuse word 152 value register" hexmask.long 0x260 0.--31. 1. "FV,fuse value" line.long 0x264 "BSEC_FVR153,BSEC fuse word 153 value register" hexmask.long 0x264 0.--31. 1. "FV,fuse value" line.long 0x268 "BSEC_FVR154,BSEC fuse word 154 value register" hexmask.long 0x268 0.--31. 1. "FV,fuse value" line.long 0x26C "BSEC_FVR155,BSEC fuse word 155 value register" hexmask.long 0x26C 0.--31. 1. "FV,fuse value" line.long 0x270 "BSEC_FVR156,BSEC fuse word 156 value register" hexmask.long 0x270 0.--31. 1. "FV,fuse value" line.long 0x274 "BSEC_FVR157,BSEC fuse word 157 value register" hexmask.long 0x274 0.--31. 1. "FV,fuse value" line.long 0x278 "BSEC_FVR158,BSEC fuse word 158 value register" hexmask.long 0x278 0.--31. 1. "FV,fuse value" line.long 0x27C "BSEC_FVR159,BSEC fuse word 159 value register" hexmask.long 0x27C 0.--31. 1. "FV,fuse value" line.long 0x280 "BSEC_FVR160,BSEC fuse word 160 value register" hexmask.long 0x280 0.--31. 1. "FV,fuse value" line.long 0x284 "BSEC_FVR161,BSEC fuse word 161 value register" hexmask.long 0x284 0.--31. 1. "FV,fuse value" line.long 0x288 "BSEC_FVR162,BSEC fuse word 162 value register" hexmask.long 0x288 0.--31. 1. "FV,fuse value" line.long 0x28C "BSEC_FVR163,BSEC fuse word 163 value register" hexmask.long 0x28C 0.--31. 1. "FV,fuse value" line.long 0x290 "BSEC_FVR164,BSEC fuse word 164 value register" hexmask.long 0x290 0.--31. 1. "FV,fuse value" line.long 0x294 "BSEC_FVR165,BSEC fuse word 165 value register" hexmask.long 0x294 0.--31. 1. "FV,fuse value" line.long 0x298 "BSEC_FVR166,BSEC fuse word 166 value register" hexmask.long 0x298 0.--31. 1. "FV,fuse value" line.long 0x29C "BSEC_FVR167,BSEC fuse word 167 value register" hexmask.long 0x29C 0.--31. 1. "FV,fuse value" line.long 0x2A0 "BSEC_FVR168,BSEC fuse word 168 value register" hexmask.long 0x2A0 0.--31. 1. "FV,fuse value" line.long 0x2A4 "BSEC_FVR169,BSEC fuse word 169 value register" hexmask.long 0x2A4 0.--31. 1. "FV,fuse value" line.long 0x2A8 "BSEC_FVR170,BSEC fuse word 170 value register" hexmask.long 0x2A8 0.--31. 1. "FV,fuse value" line.long 0x2AC "BSEC_FVR171,BSEC fuse word 171 value register" hexmask.long 0x2AC 0.--31. 1. "FV,fuse value" line.long 0x2B0 "BSEC_FVR172,BSEC fuse word 172 value register" hexmask.long 0x2B0 0.--31. 1. "FV,fuse value" line.long 0x2B4 "BSEC_FVR173,BSEC fuse word 173 value register" hexmask.long 0x2B4 0.--31. 1. "FV,fuse value" line.long 0x2B8 "BSEC_FVR174,BSEC fuse word 174 value register" hexmask.long 0x2B8 0.--31. 1. "FV,fuse value" line.long 0x2BC "BSEC_FVR175,BSEC fuse word 175 value register" hexmask.long 0x2BC 0.--31. 1. "FV,fuse value" line.long 0x2C0 "BSEC_FVR176,BSEC fuse word 176 value register" hexmask.long 0x2C0 0.--31. 1. "FV,fuse value" line.long 0x2C4 "BSEC_FVR177,BSEC fuse word 177 value register" hexmask.long 0x2C4 0.--31. 1. "FV,fuse value" line.long 0x2C8 "BSEC_FVR178,BSEC fuse word 178 value register" hexmask.long 0x2C8 0.--31. 1. "FV,fuse value" line.long 0x2CC "BSEC_FVR179,BSEC fuse word 179 value register" hexmask.long 0x2CC 0.--31. 1. "FV,fuse value" line.long 0x2D0 "BSEC_FVR180,BSEC fuse word 180 value register" hexmask.long 0x2D0 0.--31. 1. "FV,fuse value" line.long 0x2D4 "BSEC_FVR181,BSEC fuse word 181 value register" hexmask.long 0x2D4 0.--31. 1. "FV,fuse value" line.long 0x2D8 "BSEC_FVR182,BSEC fuse word 182 value register" hexmask.long 0x2D8 0.--31. 1. "FV,fuse value" line.long 0x2DC "BSEC_FVR183,BSEC fuse word 183 value register" hexmask.long 0x2DC 0.--31. 1. "FV,fuse value" line.long 0x2E0 "BSEC_FVR184,BSEC fuse word 184 value register" hexmask.long 0x2E0 0.--31. 1. "FV,fuse value" line.long 0x2E4 "BSEC_FVR185,BSEC fuse word 185 value register" hexmask.long 0x2E4 0.--31. 1. "FV,fuse value" line.long 0x2E8 "BSEC_FVR186,BSEC fuse word 186 value register" hexmask.long 0x2E8 0.--31. 1. "FV,fuse value" line.long 0x2EC "BSEC_FVR187,BSEC fuse word 187 value register" hexmask.long 0x2EC 0.--31. 1. "FV,fuse value" line.long 0x2F0 "BSEC_FVR188,BSEC fuse word 188 value register" hexmask.long 0x2F0 0.--31. 1. "FV,fuse value" line.long 0x2F4 "BSEC_FVR189,BSEC fuse word 189 value register" hexmask.long 0x2F4 0.--31. 1. "FV,fuse value" line.long 0x2F8 "BSEC_FVR190,BSEC fuse word 190 value register" hexmask.long 0x2F8 0.--31. 1. "FV,fuse value" line.long 0x2FC "BSEC_FVR191,BSEC fuse word 191 value register" hexmask.long 0x2FC 0.--31. 1. "FV,fuse value" line.long 0x300 "BSEC_FVR192,BSEC fuse word 192 value register" hexmask.long 0x300 0.--31. 1. "FV,fuse value" line.long 0x304 "BSEC_FVR193,BSEC fuse word 193 value register" hexmask.long 0x304 0.--31. 1. "FV,fuse value" line.long 0x308 "BSEC_FVR194,BSEC fuse word 194 value register" hexmask.long 0x308 0.--31. 1. "FV,fuse value" line.long 0x30C "BSEC_FVR195,BSEC fuse word 195 value register" hexmask.long 0x30C 0.--31. 1. "FV,fuse value" line.long 0x310 "BSEC_FVR196,BSEC fuse word 196 value register" hexmask.long 0x310 0.--31. 1. "FV,fuse value" line.long 0x314 "BSEC_FVR197,BSEC fuse word 197 value register" hexmask.long 0x314 0.--31. 1. "FV,fuse value" line.long 0x318 "BSEC_FVR198,BSEC fuse word 198 value register" hexmask.long 0x318 0.--31. 1. "FV,fuse value" line.long 0x31C "BSEC_FVR199,BSEC fuse word 199 value register" hexmask.long 0x31C 0.--31. 1. "FV,fuse value" line.long 0x320 "BSEC_FVR200,BSEC fuse word 200 value register" hexmask.long 0x320 0.--31. 1. "FV,fuse value" line.long 0x324 "BSEC_FVR201,BSEC fuse word 201 value register" hexmask.long 0x324 0.--31. 1. "FV,fuse value" line.long 0x328 "BSEC_FVR202,BSEC fuse word 202 value register" hexmask.long 0x328 0.--31. 1. "FV,fuse value" line.long 0x32C "BSEC_FVR203,BSEC fuse word 203 value register" hexmask.long 0x32C 0.--31. 1. "FV,fuse value" line.long 0x330 "BSEC_FVR204,BSEC fuse word 204 value register" hexmask.long 0x330 0.--31. 1. "FV,fuse value" line.long 0x334 "BSEC_FVR205,BSEC fuse word 205 value register" hexmask.long 0x334 0.--31. 1. "FV,fuse value" line.long 0x338 "BSEC_FVR206,BSEC fuse word 206 value register" hexmask.long 0x338 0.--31. 1. "FV,fuse value" line.long 0x33C "BSEC_FVR207,BSEC fuse word 207 value register" hexmask.long 0x33C 0.--31. 1. "FV,fuse value" line.long 0x340 "BSEC_FVR208,BSEC fuse word 208 value register" hexmask.long 0x340 0.--31. 1. "FV,fuse value" line.long 0x344 "BSEC_FVR209,BSEC fuse word 209 value register" hexmask.long 0x344 0.--31. 1. "FV,fuse value" line.long 0x348 "BSEC_FVR210,BSEC fuse word 210 value register" hexmask.long 0x348 0.--31. 1. "FV,fuse value" line.long 0x34C "BSEC_FVR211,BSEC fuse word 211 value register" hexmask.long 0x34C 0.--31. 1. "FV,fuse value" line.long 0x350 "BSEC_FVR212,BSEC fuse word 212 value register" hexmask.long 0x350 0.--31. 1. "FV,fuse value" line.long 0x354 "BSEC_FVR213,BSEC fuse word 213 value register" hexmask.long 0x354 0.--31. 1. "FV,fuse value" line.long 0x358 "BSEC_FVR214,BSEC fuse word 214 value register" hexmask.long 0x358 0.--31. 1. "FV,fuse value" line.long 0x35C "BSEC_FVR215,BSEC fuse word 215 value register" hexmask.long 0x35C 0.--31. 1. "FV,fuse value" line.long 0x360 "BSEC_FVR216,BSEC fuse word 216 value register" hexmask.long 0x360 0.--31. 1. "FV,fuse value" line.long 0x364 "BSEC_FVR217,BSEC fuse word 217 value register" hexmask.long 0x364 0.--31. 1. "FV,fuse value" line.long 0x368 "BSEC_FVR218,BSEC fuse word 218 value register" hexmask.long 0x368 0.--31. 1. "FV,fuse value" line.long 0x36C "BSEC_FVR219,BSEC fuse word 219 value register" hexmask.long 0x36C 0.--31. 1. "FV,fuse value" line.long 0x370 "BSEC_FVR220,BSEC fuse word 220 value register" hexmask.long 0x370 0.--31. 1. "FV,fuse value" line.long 0x374 "BSEC_FVR221,BSEC fuse word 221 value register" hexmask.long 0x374 0.--31. 1. "FV,fuse value" line.long 0x378 "BSEC_FVR222,BSEC fuse word 222 value register" hexmask.long 0x378 0.--31. 1. "FV,fuse value" line.long 0x37C "BSEC_FVR223,BSEC fuse word 223 value register" hexmask.long 0x37C 0.--31. 1. "FV,fuse value" line.long 0x380 "BSEC_FVR224,BSEC fuse word 224 value register" hexmask.long 0x380 0.--31. 1. "FV,fuse value" line.long 0x384 "BSEC_FVR225,BSEC fuse word 225 value register" hexmask.long 0x384 0.--31. 1. "FV,fuse value" line.long 0x388 "BSEC_FVR226,BSEC fuse word 226 value register" hexmask.long 0x388 0.--31. 1. "FV,fuse value" line.long 0x38C "BSEC_FVR227,BSEC fuse word 227 value register" hexmask.long 0x38C 0.--31. 1. "FV,fuse value" line.long 0x390 "BSEC_FVR228,BSEC fuse word 228 value register" hexmask.long 0x390 0.--31. 1. "FV,fuse value" line.long 0x394 "BSEC_FVR229,BSEC fuse word 229 value register" hexmask.long 0x394 0.--31. 1. "FV,fuse value" line.long 0x398 "BSEC_FVR230,BSEC fuse word 230 value register" hexmask.long 0x398 0.--31. 1. "FV,fuse value" line.long 0x39C "BSEC_FVR231,BSEC fuse word 231 value register" hexmask.long 0x39C 0.--31. 1. "FV,fuse value" line.long 0x3A0 "BSEC_FVR232,BSEC fuse word 232 value register" hexmask.long 0x3A0 0.--31. 1. "FV,fuse value" line.long 0x3A4 "BSEC_FVR233,BSEC fuse word 233 value register" hexmask.long 0x3A4 0.--31. 1. "FV,fuse value" line.long 0x3A8 "BSEC_FVR234,BSEC fuse word 234 value register" hexmask.long 0x3A8 0.--31. 1. "FV,fuse value" line.long 0x3AC "BSEC_FVR235,BSEC fuse word 235 value register" hexmask.long 0x3AC 0.--31. 1. "FV,fuse value" line.long 0x3B0 "BSEC_FVR236,BSEC fuse word 236 value register" hexmask.long 0x3B0 0.--31. 1. "FV,fuse value" line.long 0x3B4 "BSEC_FVR237,BSEC fuse word 237 value register" hexmask.long 0x3B4 0.--31. 1. "FV,fuse value" line.long 0x3B8 "BSEC_FVR238,BSEC fuse word 238 value register" hexmask.long 0x3B8 0.--31. 1. "FV,fuse value" line.long 0x3BC "BSEC_FVR239,BSEC fuse word 239 value register" hexmask.long 0x3BC 0.--31. 1. "FV,fuse value" line.long 0x3C0 "BSEC_FVR240,BSEC fuse word 240 value register" hexmask.long 0x3C0 0.--31. 1. "FV,fuse value" line.long 0x3C4 "BSEC_FVR241,BSEC fuse word 241 value register" hexmask.long 0x3C4 0.--31. 1. "FV,fuse value" line.long 0x3C8 "BSEC_FVR242,BSEC fuse word 242 value register" hexmask.long 0x3C8 0.--31. 1. "FV,fuse value" line.long 0x3CC "BSEC_FVR243,BSEC fuse word 243 value register" hexmask.long 0x3CC 0.--31. 1. "FV,fuse value" line.long 0x3D0 "BSEC_FVR244,BSEC fuse word 244 value register" hexmask.long 0x3D0 0.--31. 1. "FV,fuse value" line.long 0x3D4 "BSEC_FVR245,BSEC fuse word 245 value register" hexmask.long 0x3D4 0.--31. 1. "FV,fuse value" line.long 0x3D8 "BSEC_FVR246,BSEC fuse word 246 value register" hexmask.long 0x3D8 0.--31. 1. "FV,fuse value" line.long 0x3DC "BSEC_FVR247,BSEC fuse word 247 value register" hexmask.long 0x3DC 0.--31. 1. "FV,fuse value" line.long 0x3E0 "BSEC_FVR248,BSEC fuse word 248 value register" hexmask.long 0x3E0 0.--31. 1. "FV,fuse value" line.long 0x3E4 "BSEC_FVR249,BSEC fuse word 249 value register" hexmask.long 0x3E4 0.--31. 1. "FV,fuse value" line.long 0x3E8 "BSEC_FVR250,BSEC fuse word 250 value register" hexmask.long 0x3E8 0.--31. 1. "FV,fuse value" line.long 0x3EC "BSEC_FVR251,BSEC fuse word 251 value register" hexmask.long 0x3EC 0.--31. 1. "FV,fuse value" line.long 0x3F0 "BSEC_FVR252,BSEC fuse word 252 value register" hexmask.long 0x3F0 0.--31. 1. "FV,fuse value" line.long 0x3F4 "BSEC_FVR253,BSEC fuse word 253 value register" hexmask.long 0x3F4 0.--31. 1. "FV,fuse value" line.long 0x3F8 "BSEC_FVR254,BSEC fuse word 254 value register" hexmask.long 0x3F8 0.--31. 1. "FV,fuse value" line.long 0x3FC "BSEC_FVR255,BSEC fuse word 255 value register" hexmask.long 0x3FC 0.--31. 1. "FV,fuse value" line.long 0x400 "BSEC_FVR256,BSEC fuse word 256 value register" hexmask.long 0x400 0.--31. 1. "FV,fuse value" line.long 0x404 "BSEC_FVR257,BSEC fuse word 257 value register" hexmask.long 0x404 0.--31. 1. "FV,fuse value" line.long 0x408 "BSEC_FVR258,BSEC fuse word 258 value register" hexmask.long 0x408 0.--31. 1. "FV,fuse value" line.long 0x40C "BSEC_FVR259,BSEC fuse word 259 value register" hexmask.long 0x40C 0.--31. 1. "FV,fuse value" line.long 0x410 "BSEC_FVR260,BSEC fuse word 260 value register" hexmask.long 0x410 0.--31. 1. "FV,fuse value" line.long 0x414 "BSEC_FVR261,BSEC fuse word 261 value register" hexmask.long 0x414 0.--31. 1. "FV,fuse value" line.long 0x418 "BSEC_FVR262,BSEC fuse word 262 value register" hexmask.long 0x418 0.--31. 1. "FV,fuse value" line.long 0x41C "BSEC_FVR263,BSEC fuse word 263 value register" hexmask.long 0x41C 0.--31. 1. "FV,fuse value" line.long 0x420 "BSEC_FVR264,BSEC fuse word 264 value register" hexmask.long 0x420 0.--31. 1. "FV,fuse value" line.long 0x424 "BSEC_FVR265,BSEC fuse word 265 value register" hexmask.long 0x424 0.--31. 1. "FV,fuse value" line.long 0x428 "BSEC_FVR266,BSEC fuse word 266 value register" hexmask.long 0x428 0.--31. 1. "FV,fuse value" line.long 0x42C "BSEC_FVR267,BSEC fuse word 267 value register" hexmask.long 0x42C 0.--31. 1. "FV,fuse value" line.long 0x430 "BSEC_FVR268,BSEC fuse word 268 value register" hexmask.long 0x430 0.--31. 1. "FV,fuse value" line.long 0x434 "BSEC_FVR269,BSEC fuse word 269 value register" hexmask.long 0x434 0.--31. 1. "FV,fuse value" line.long 0x438 "BSEC_FVR270,BSEC fuse word 270 value register" hexmask.long 0x438 0.--31. 1. "FV,fuse value" line.long 0x43C "BSEC_FVR271,BSEC fuse word 271 value register" hexmask.long 0x43C 0.--31. 1. "FV,fuse value" line.long 0x440 "BSEC_FVR272,BSEC fuse word 272 value register" hexmask.long 0x440 0.--31. 1. "FV,fuse value" line.long 0x444 "BSEC_FVR273,BSEC fuse word 273 value register" hexmask.long 0x444 0.--31. 1. "FV,fuse value" line.long 0x448 "BSEC_FVR274,BSEC fuse word 274 value register" hexmask.long 0x448 0.--31. 1. "FV,fuse value" line.long 0x44C "BSEC_FVR275,BSEC fuse word 275 value register" hexmask.long 0x44C 0.--31. 1. "FV,fuse value" line.long 0x450 "BSEC_FVR276,BSEC fuse word 276 value register" hexmask.long 0x450 0.--31. 1. "FV,fuse value" line.long 0x454 "BSEC_FVR277,BSEC fuse word 277 value register" hexmask.long 0x454 0.--31. 1. "FV,fuse value" line.long 0x458 "BSEC_FVR278,BSEC fuse word 278 value register" hexmask.long 0x458 0.--31. 1. "FV,fuse value" line.long 0x45C "BSEC_FVR279,BSEC fuse word 279 value register" hexmask.long 0x45C 0.--31. 1. "FV,fuse value" line.long 0x460 "BSEC_FVR280,BSEC fuse word 280 value register" hexmask.long 0x460 0.--31. 1. "FV,fuse value" line.long 0x464 "BSEC_FVR281,BSEC fuse word 281 value register" hexmask.long 0x464 0.--31. 1. "FV,fuse value" line.long 0x468 "BSEC_FVR282,BSEC fuse word 282 value register" hexmask.long 0x468 0.--31. 1. "FV,fuse value" line.long 0x46C "BSEC_FVR283,BSEC fuse word 283 value register" hexmask.long 0x46C 0.--31. 1. "FV,fuse value" line.long 0x470 "BSEC_FVR284,BSEC fuse word 284 value register" hexmask.long 0x470 0.--31. 1. "FV,fuse value" line.long 0x474 "BSEC_FVR285,BSEC fuse word 285 value register" hexmask.long 0x474 0.--31. 1. "FV,fuse value" line.long 0x478 "BSEC_FVR286,BSEC fuse word 286 value register" hexmask.long 0x478 0.--31. 1. "FV,fuse value" line.long 0x47C "BSEC_FVR287,BSEC fuse word 287 value register" hexmask.long 0x47C 0.--31. 1. "FV,fuse value" line.long 0x480 "BSEC_FVR288,BSEC fuse word 288 value register" hexmask.long 0x480 0.--31. 1. "FV,fuse value" line.long 0x484 "BSEC_FVR289,BSEC fuse word 289 value register" hexmask.long 0x484 0.--31. 1. "FV,fuse value" line.long 0x488 "BSEC_FVR290,BSEC fuse word 290 value register" hexmask.long 0x488 0.--31. 1. "FV,fuse value" line.long 0x48C "BSEC_FVR291,BSEC fuse word 291 value register" hexmask.long 0x48C 0.--31. 1. "FV,fuse value" line.long 0x490 "BSEC_FVR292,BSEC fuse word 292 value register" hexmask.long 0x490 0.--31. 1. "FV,fuse value" line.long 0x494 "BSEC_FVR293,BSEC fuse word 293 value register" hexmask.long 0x494 0.--31. 1. "FV,fuse value" line.long 0x498 "BSEC_FVR294,BSEC fuse word 294 value register" hexmask.long 0x498 0.--31. 1. "FV,fuse value" line.long 0x49C "BSEC_FVR295,BSEC fuse word 295 value register" hexmask.long 0x49C 0.--31. 1. "FV,fuse value" line.long 0x4A0 "BSEC_FVR296,BSEC fuse word 296 value register" hexmask.long 0x4A0 0.--31. 1. "FV,fuse value" line.long 0x4A4 "BSEC_FVR297,BSEC fuse word 297 value register" hexmask.long 0x4A4 0.--31. 1. "FV,fuse value" line.long 0x4A8 "BSEC_FVR298,BSEC fuse word 298 value register" hexmask.long 0x4A8 0.--31. 1. "FV,fuse value" line.long 0x4AC "BSEC_FVR299,BSEC fuse word 299 value register" hexmask.long 0x4AC 0.--31. 1. "FV,fuse value" line.long 0x4B0 "BSEC_FVR300,BSEC fuse word 300 value register" hexmask.long 0x4B0 0.--31. 1. "FV,fuse value" line.long 0x4B4 "BSEC_FVR301,BSEC fuse word 301 value register" hexmask.long 0x4B4 0.--31. 1. "FV,fuse value" line.long 0x4B8 "BSEC_FVR302,BSEC fuse word 302 value register" hexmask.long 0x4B8 0.--31. 1. "FV,fuse value" line.long 0x4BC "BSEC_FVR303,BSEC fuse word 303 value register" hexmask.long 0x4BC 0.--31. 1. "FV,fuse value" line.long 0x4C0 "BSEC_FVR304,BSEC fuse word 304 value register" hexmask.long 0x4C0 0.--31. 1. "FV,fuse value" line.long 0x4C4 "BSEC_FVR305,BSEC fuse word 305 value register" hexmask.long 0x4C4 0.--31. 1. "FV,fuse value" line.long 0x4C8 "BSEC_FVR306,BSEC fuse word 306 value register" hexmask.long 0x4C8 0.--31. 1. "FV,fuse value" line.long 0x4CC "BSEC_FVR307,BSEC fuse word 307 value register" hexmask.long 0x4CC 0.--31. 1. "FV,fuse value" line.long 0x4D0 "BSEC_FVR308,BSEC fuse word 308 value register" hexmask.long 0x4D0 0.--31. 1. "FV,fuse value" line.long 0x4D4 "BSEC_FVR309,BSEC fuse word 309 value register" hexmask.long 0x4D4 0.--31. 1. "FV,fuse value" line.long 0x4D8 "BSEC_FVR310,BSEC fuse word 310 value register" hexmask.long 0x4D8 0.--31. 1. "FV,fuse value" line.long 0x4DC "BSEC_FVR311,BSEC fuse word 311 value register" hexmask.long 0x4DC 0.--31. 1. "FV,fuse value" line.long 0x4E0 "BSEC_FVR312,BSEC fuse word 312 value register" hexmask.long 0x4E0 0.--31. 1. "FV,fuse value" line.long 0x4E4 "BSEC_FVR313,BSEC fuse word 313 value register" hexmask.long 0x4E4 0.--31. 1. "FV,fuse value" line.long 0x4E8 "BSEC_FVR314,BSEC fuse word 314 value register" hexmask.long 0x4E8 0.--31. 1. "FV,fuse value" line.long 0x4EC "BSEC_FVR315,BSEC fuse word 315 value register" hexmask.long 0x4EC 0.--31. 1. "FV,fuse value" line.long 0x4F0 "BSEC_FVR316,BSEC fuse word 316 value register" hexmask.long 0x4F0 0.--31. 1. "FV,fuse value" line.long 0x4F4 "BSEC_FVR317,BSEC fuse word 317 value register" hexmask.long 0x4F4 0.--31. 1. "FV,fuse value" line.long 0x4F8 "BSEC_FVR318,BSEC fuse word 318 value register" hexmask.long 0x4F8 0.--31. 1. "FV,fuse value" line.long 0x4FC "BSEC_FVR319,BSEC fuse word 319 value register" hexmask.long 0x4FC 0.--31. 1. "FV,fuse value" line.long 0x500 "BSEC_FVR320,BSEC fuse word 320 value register" hexmask.long 0x500 0.--31. 1. "FV,fuse value" line.long 0x504 "BSEC_FVR321,BSEC fuse word 321 value register" hexmask.long 0x504 0.--31. 1. "FV,fuse value" line.long 0x508 "BSEC_FVR322,BSEC fuse word 322 value register" hexmask.long 0x508 0.--31. 1. "FV,fuse value" line.long 0x50C "BSEC_FVR323,BSEC fuse word 323 value register" hexmask.long 0x50C 0.--31. 1. "FV,fuse value" line.long 0x510 "BSEC_FVR324,BSEC fuse word 324 value register" hexmask.long 0x510 0.--31. 1. "FV,fuse value" line.long 0x514 "BSEC_FVR325,BSEC fuse word 325 value register" hexmask.long 0x514 0.--31. 1. "FV,fuse value" line.long 0x518 "BSEC_FVR326,BSEC fuse word 326 value register" hexmask.long 0x518 0.--31. 1. "FV,fuse value" line.long 0x51C "BSEC_FVR327,BSEC fuse word 327 value register" hexmask.long 0x51C 0.--31. 1. "FV,fuse value" line.long 0x520 "BSEC_FVR328,BSEC fuse word 328 value register" hexmask.long 0x520 0.--31. 1. "FV,fuse value" line.long 0x524 "BSEC_FVR329,BSEC fuse word 329 value register" hexmask.long 0x524 0.--31. 1. "FV,fuse value" line.long 0x528 "BSEC_FVR330,BSEC fuse word 330 value register" hexmask.long 0x528 0.--31. 1. "FV,fuse value" line.long 0x52C "BSEC_FVR331,BSEC fuse word 331 value register" hexmask.long 0x52C 0.--31. 1. "FV,fuse value" line.long 0x530 "BSEC_FVR332,BSEC fuse word 332 value register" hexmask.long 0x530 0.--31. 1. "FV,fuse value" line.long 0x534 "BSEC_FVR333,BSEC fuse word 333 value register" hexmask.long 0x534 0.--31. 1. "FV,fuse value" line.long 0x538 "BSEC_FVR334,BSEC fuse word 334 value register" hexmask.long 0x538 0.--31. 1. "FV,fuse value" line.long 0x53C "BSEC_FVR335,BSEC fuse word 335 value register" hexmask.long 0x53C 0.--31. 1. "FV,fuse value" line.long 0x540 "BSEC_FVR336,BSEC fuse word 336 value register" hexmask.long 0x540 0.--31. 1. "FV,fuse value" line.long 0x544 "BSEC_FVR337,BSEC fuse word 337 value register" hexmask.long 0x544 0.--31. 1. "FV,fuse value" line.long 0x548 "BSEC_FVR338,BSEC fuse word 338 value register" hexmask.long 0x548 0.--31. 1. "FV,fuse value" line.long 0x54C "BSEC_FVR339,BSEC fuse word 339 value register" hexmask.long 0x54C 0.--31. 1. "FV,fuse value" line.long 0x550 "BSEC_FVR340,BSEC fuse word 340 value register" hexmask.long 0x550 0.--31. 1. "FV,fuse value" line.long 0x554 "BSEC_FVR341,BSEC fuse word 341 value register" hexmask.long 0x554 0.--31. 1. "FV,fuse value" line.long 0x558 "BSEC_FVR342,BSEC fuse word 342 value register" hexmask.long 0x558 0.--31. 1. "FV,fuse value" line.long 0x55C "BSEC_FVR343,BSEC fuse word 343 value register" hexmask.long 0x55C 0.--31. 1. "FV,fuse value" line.long 0x560 "BSEC_FVR344,BSEC fuse word 344 value register" hexmask.long 0x560 0.--31. 1. "FV,fuse value" line.long 0x564 "BSEC_FVR345,BSEC fuse word 345 value register" hexmask.long 0x564 0.--31. 1. "FV,fuse value" line.long 0x568 "BSEC_FVR346,BSEC fuse word 346 value register" hexmask.long 0x568 0.--31. 1. "FV,fuse value" line.long 0x56C "BSEC_FVR347,BSEC fuse word 347 value register" hexmask.long 0x56C 0.--31. 1. "FV,fuse value" line.long 0x570 "BSEC_FVR348,BSEC fuse word 348 value register" hexmask.long 0x570 0.--31. 1. "FV,fuse value" line.long 0x574 "BSEC_FVR349,BSEC fuse word 349 value register" hexmask.long 0x574 0.--31. 1. "FV,fuse value" line.long 0x578 "BSEC_FVR350,BSEC fuse word 350 value register" hexmask.long 0x578 0.--31. 1. "FV,fuse value" line.long 0x57C "BSEC_FVR351,BSEC fuse word 351 value register" hexmask.long 0x57C 0.--31. 1. "FV,fuse value" line.long 0x580 "BSEC_FVR352,BSEC fuse word 352 value register" hexmask.long 0x580 0.--31. 1. "FV,fuse value" line.long 0x584 "BSEC_FVR353,BSEC fuse word 353 value register" hexmask.long 0x584 0.--31. 1. "FV,fuse value" line.long 0x588 "BSEC_FVR354,BSEC fuse word 354 value register" hexmask.long 0x588 0.--31. 1. "FV,fuse value" line.long 0x58C "BSEC_FVR355,BSEC fuse word 355 value register" hexmask.long 0x58C 0.--31. 1. "FV,fuse value" line.long 0x590 "BSEC_FVR356,BSEC fuse word 356 value register" hexmask.long 0x590 0.--31. 1. "FV,fuse value" line.long 0x594 "BSEC_FVR357,BSEC fuse word 357 value register" hexmask.long 0x594 0.--31. 1. "FV,fuse value" line.long 0x598 "BSEC_FVR358,BSEC fuse word 358 value register" hexmask.long 0x598 0.--31. 1. "FV,fuse value" line.long 0x59C "BSEC_FVR359,BSEC fuse word 359 value register" hexmask.long 0x59C 0.--31. 1. "FV,fuse value" line.long 0x5A0 "BSEC_FVR360,BSEC fuse word 360 value register" hexmask.long 0x5A0 0.--31. 1. "FV,fuse value" line.long 0x5A4 "BSEC_FVR361,BSEC fuse word 361 value register" hexmask.long 0x5A4 0.--31. 1. "FV,fuse value" line.long 0x5A8 "BSEC_FVR362,BSEC fuse word 362 value register" hexmask.long 0x5A8 0.--31. 1. "FV,fuse value" line.long 0x5AC "BSEC_FVR363,BSEC fuse word 363 value register" hexmask.long 0x5AC 0.--31. 1. "FV,fuse value" line.long 0x5B0 "BSEC_FVR364,BSEC fuse word 364 value register" hexmask.long 0x5B0 0.--31. 1. "FV,fuse value" line.long 0x5B4 "BSEC_FVR365,BSEC fuse word 365 value register" hexmask.long 0x5B4 0.--31. 1. "FV,fuse value" line.long 0x5B8 "BSEC_FVR366,BSEC fuse word 366 value register" hexmask.long 0x5B8 0.--31. 1. "FV,fuse value" line.long 0x5BC "BSEC_FVR367,BSEC fuse word 367 value register" hexmask.long 0x5BC 0.--31. 1. "FV,fuse value" line.long 0x5C0 "BSEC_FVR368,BSEC fuse word 368 value register" hexmask.long 0x5C0 0.--31. 1. "FV,fuse value" line.long 0x5C4 "BSEC_FVR369,BSEC fuse word 369 value register" hexmask.long 0x5C4 0.--31. 1. "FV,fuse value" line.long 0x5C8 "BSEC_FVR370,BSEC fuse word 370 value register" hexmask.long 0x5C8 0.--31. 1. "FV,fuse value" line.long 0x5CC "BSEC_FVR371,BSEC fuse word 371 value register" hexmask.long 0x5CC 0.--31. 1. "FV,fuse value" line.long 0x5D0 "BSEC_FVR372,BSEC fuse word 372 value register" hexmask.long 0x5D0 0.--31. 1. "FV,fuse value" line.long 0x5D4 "BSEC_FVR373,BSEC fuse word 373 value register" hexmask.long 0x5D4 0.--31. 1. "FV,fuse value" line.long 0x5D8 "BSEC_FVR374,BSEC fuse word 374 value register" hexmask.long 0x5D8 0.--31. 1. "FV,fuse value" line.long 0x5DC "BSEC_FVR375,BSEC fuse word 375 value register" hexmask.long 0x5DC 0.--31. 1. "FV,fuse value" group.long 0x800++0x2F line.long 0x0 "BSEC_SPLOCK0,BSEC sticky programming lock register 0" bitfld.long 0x0 31. "SPLOCK31,Sticky programming lock for word 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "SPLOCK30,Sticky programming lock for word 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "SPLOCK29,Sticky programming lock for word 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "SPLOCK28,Sticky programming lock for word 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "SPLOCK27,Sticky programming lock for word 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "SPLOCK26,Sticky programming lock for word 26" "B_0x0,B_0x1" bitfld.long 0x0 25. "SPLOCK25,Sticky programming lock for word 25" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "SPLOCK24,Sticky programming lock for word 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "SPLOCK23,Sticky programming lock for word 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "SPLOCK22,Sticky programming lock for word 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "SPLOCK21,Sticky programming lock for word 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "SPLOCK20,Sticky programming lock for word 20" "B_0x0,B_0x1" bitfld.long 0x0 19. "SPLOCK19,Sticky programming lock for word 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "SPLOCK18,Sticky programming lock for word 18" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "SPLOCK17,Sticky programming lock for word 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "SPLOCK16,Sticky programming lock for word 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "SPLOCK15,Sticky programming lock for word 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "SPLOCK14,Sticky programming lock for word 14" "B_0x0,B_0x1" bitfld.long 0x0 13. "SPLOCK13,Sticky programming lock for word 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "SPLOCK12,Sticky programming lock for word 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "SPLOCK11,Sticky programming lock for word 11" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "SPLOCK10,Sticky programming lock for word 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "SPLOCK9,Sticky programming lock for word 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "SPLOCK8,Sticky programming lock for word 8" "B_0x0,B_0x1" bitfld.long 0x0 7. "SPLOCK7,Sticky programming lock for word 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "SPLOCK6,Sticky programming lock for word 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "SPLOCK5,Sticky programming lock for word 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "SPLOCK4,Sticky programming lock for word 4" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SPLOCK3,Sticky programming lock for word 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "SPLOCK2,Sticky programming lock for word 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "SPLOCK1,Sticky programming lock for word 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPLOCK0,Sticky programming lock for word 0" "B_0x0,B_0x1" line.long 0x4 "BSEC_SPLOCK1,BSEC sticky programming lock register 1" bitfld.long 0x4 31. "SPLOCK63,Sticky programming lock for word 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "SPLOCK62,Sticky programming lock for word 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "SPLOCK61,Sticky programming lock for word 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "SPLOCK60,Sticky programming lock for word 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "SPLOCK59,Sticky programming lock for word 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "SPLOCK58,Sticky programming lock for word 58" "B_0x0,B_0x1" bitfld.long 0x4 25. "SPLOCK57,Sticky programming lock for word 57" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "SPLOCK56,Sticky programming lock for word 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "SPLOCK55,Sticky programming lock for word 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "SPLOCK54,Sticky programming lock for word 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "SPLOCK53,Sticky programming lock for word 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "SPLOCK52,Sticky programming lock for word 52" "B_0x0,B_0x1" bitfld.long 0x4 19. "SPLOCK51,Sticky programming lock for word 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "SPLOCK50,Sticky programming lock for word 50" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "SPLOCK49,Sticky programming lock for word 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "SPLOCK48,Sticky programming lock for word 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "SPLOCK47,Sticky programming lock for word 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "SPLOCK46,Sticky programming lock for word 46" "B_0x0,B_0x1" bitfld.long 0x4 13. "SPLOCK45,Sticky programming lock for word 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "SPLOCK44,Sticky programming lock for word 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "SPLOCK43,Sticky programming lock for word 43" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "SPLOCK42,Sticky programming lock for word 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "SPLOCK41,Sticky programming lock for word 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "SPLOCK40,Sticky programming lock for word 40" "B_0x0,B_0x1" bitfld.long 0x4 7. "SPLOCK39,Sticky programming lock for word 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "SPLOCK38,Sticky programming lock for word 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "SPLOCK37,Sticky programming lock for word 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "SPLOCK36,Sticky programming lock for word 36" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "SPLOCK35,Sticky programming lock for word 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "SPLOCK34,Sticky programming lock for word 34" "B_0x0,B_0x1" bitfld.long 0x4 1. "SPLOCK33,Sticky programming lock for word 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "SPLOCK32,Sticky programming lock for word 32" "B_0x0,B_0x1" line.long 0x8 "BSEC_SPLOCK2,BSEC sticky programming lock register 2" bitfld.long 0x8 31. "SPLOCK95,Sticky programming lock for word 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "SPLOCK94,Sticky programming lock for word 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "SPLOCK93,Sticky programming lock for word 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "SPLOCK92,Sticky programming lock for word 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "SPLOCK91,Sticky programming lock for word 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "SPLOCK90,Sticky programming lock for word 90" "B_0x0,B_0x1" bitfld.long 0x8 25. "SPLOCK89,Sticky programming lock for word 89" "B_0x0,B_0x1" newline bitfld.long 0x8 24. "SPLOCK88,Sticky programming lock for word 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "SPLOCK87,Sticky programming lock for word 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "SPLOCK86,Sticky programming lock for word 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "SPLOCK85,Sticky programming lock for word 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "SPLOCK84,Sticky programming lock for word 84" "B_0x0,B_0x1" bitfld.long 0x8 19. "SPLOCK83,Sticky programming lock for word 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "SPLOCK82,Sticky programming lock for word 82" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "SPLOCK81,Sticky programming lock for word 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "SPLOCK80,Sticky programming lock for word 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "SPLOCK79,Sticky programming lock for word 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "SPLOCK78,Sticky programming lock for word 78" "B_0x0,B_0x1" bitfld.long 0x8 13. "SPLOCK77,Sticky programming lock for word 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "SPLOCK76,Sticky programming lock for word 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "SPLOCK75,Sticky programming lock for word 75" "B_0x0,B_0x1" newline bitfld.long 0x8 10. "SPLOCK74,Sticky programming lock for word 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "SPLOCK73,Sticky programming lock for word 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "SPLOCK72,Sticky programming lock for word 72" "B_0x0,B_0x1" bitfld.long 0x8 7. "SPLOCK71,Sticky programming lock for word 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "SPLOCK70,Sticky programming lock for word 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "SPLOCK69,Sticky programming lock for word 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "SPLOCK68,Sticky programming lock for word 68" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "SPLOCK67,Sticky programming lock for word 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "SPLOCK66,Sticky programming lock for word 66" "B_0x0,B_0x1" bitfld.long 0x8 1. "SPLOCK65,Sticky programming lock for word 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "SPLOCK64,Sticky programming lock for word 64" "B_0x0,B_0x1" line.long 0xC "BSEC_SPLOCK3,BSEC sticky programming lock register 3" bitfld.long 0xC 31. "SPLOCK127,Sticky programming lock for word 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "SPLOCK126,Sticky programming lock for word 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "SPLOCK125,Sticky programming lock for word 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "SPLOCK124,Sticky programming lock for word 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "SPLOCK123,Sticky programming lock for word 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "SPLOCK122,Sticky programming lock for word 122" "B_0x0,B_0x1" bitfld.long 0xC 25. "SPLOCK121,Sticky programming lock for word 121" "B_0x0,B_0x1" newline bitfld.long 0xC 24. "SPLOCK120,Sticky programming lock for word 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "SPLOCK119,Sticky programming lock for word 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "SPLOCK118,Sticky programming lock for word 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "SPLOCK117,Sticky programming lock for word 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "SPLOCK116,Sticky programming lock for word 116" "B_0x0,B_0x1" bitfld.long 0xC 19. "SPLOCK115,Sticky programming lock for word 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "SPLOCK114,Sticky programming lock for word 114" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "SPLOCK113,Sticky programming lock for word 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "SPLOCK112,Sticky programming lock for word 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "SPLOCK111,Sticky programming lock for word 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "SPLOCK110,Sticky programming lock for word 110" "B_0x0,B_0x1" bitfld.long 0xC 13. "SPLOCK109,Sticky programming lock for word 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "SPLOCK108,Sticky programming lock for word 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "SPLOCK107,Sticky programming lock for word 107" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "SPLOCK106,Sticky programming lock for word 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "SPLOCK105,Sticky programming lock for word 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "SPLOCK104,Sticky programming lock for word 104" "B_0x0,B_0x1" bitfld.long 0xC 7. "SPLOCK103,Sticky programming lock for word 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "SPLOCK102,Sticky programming lock for word 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "SPLOCK101,Sticky programming lock for word 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "SPLOCK100,Sticky programming lock for word 100" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "SPLOCK99,Sticky programming lock for word 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "SPLOCK98,Sticky programming lock for word 98" "B_0x0,B_0x1" bitfld.long 0xC 1. "SPLOCK97,Sticky programming lock for word 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "SPLOCK96,Sticky programming lock for word 96" "B_0x0,B_0x1" line.long 0x10 "BSEC_SPLOCK4,BSEC sticky programming lock register 4" bitfld.long 0x10 31. "SPLOCK159,Sticky programming lock for word 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "SPLOCK158,Sticky programming lock for word 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "SPLOCK157,Sticky programming lock for word 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "SPLOCK156,Sticky programming lock for word 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "SPLOCK155,Sticky programming lock for word 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "SPLOCK154,Sticky programming lock for word 154" "B_0x0,B_0x1" bitfld.long 0x10 25. "SPLOCK153,Sticky programming lock for word 153" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "SPLOCK152,Sticky programming lock for word 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "SPLOCK151,Sticky programming lock for word 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "SPLOCK150,Sticky programming lock for word 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "SPLOCK149,Sticky programming lock for word 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "SPLOCK148,Sticky programming lock for word 148" "B_0x0,B_0x1" bitfld.long 0x10 19. "SPLOCK147,Sticky programming lock for word 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "SPLOCK146,Sticky programming lock for word 146" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "SPLOCK145,Sticky programming lock for word 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "SPLOCK144,Sticky programming lock for word 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "SPLOCK143,Sticky programming lock for word 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "SPLOCK142,Sticky programming lock for word 142" "B_0x0,B_0x1" bitfld.long 0x10 13. "SPLOCK141,Sticky programming lock for word 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "SPLOCK140,Sticky programming lock for word 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "SPLOCK139,Sticky programming lock for word 139" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "SPLOCK138,Sticky programming lock for word 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "SPLOCK137,Sticky programming lock for word 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "SPLOCK136,Sticky programming lock for word 136" "B_0x0,B_0x1" bitfld.long 0x10 7. "SPLOCK135,Sticky programming lock for word 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "SPLOCK134,Sticky programming lock for word 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "SPLOCK133,Sticky programming lock for word 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "SPLOCK132,Sticky programming lock for word 132" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "SPLOCK131,Sticky programming lock for word 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "SPLOCK130,Sticky programming lock for word 130" "B_0x0,B_0x1" bitfld.long 0x10 1. "SPLOCK129,Sticky programming lock for word 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "SPLOCK128,Sticky programming lock for word 128" "B_0x0,B_0x1" line.long 0x14 "BSEC_SPLOCK5,BSEC sticky programming lock register 5" bitfld.long 0x14 31. "SPLOCK191,Sticky programming lock for word 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "SPLOCK190,Sticky programming lock for word 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "SPLOCK189,Sticky programming lock for word 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "SPLOCK188,Sticky programming lock for word 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "SPLOCK187,Sticky programming lock for word 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "SPLOCK186,Sticky programming lock for word 186" "B_0x0,B_0x1" bitfld.long 0x14 25. "SPLOCK185,Sticky programming lock for word 185" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "SPLOCK184,Sticky programming lock for word 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "SPLOCK183,Sticky programming lock for word 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "SPLOCK182,Sticky programming lock for word 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "SPLOCK181,Sticky programming lock for word 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "SPLOCK180,Sticky programming lock for word 180" "B_0x0,B_0x1" bitfld.long 0x14 19. "SPLOCK179,Sticky programming lock for word 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "SPLOCK178,Sticky programming lock for word 178" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "SPLOCK177,Sticky programming lock for word 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "SPLOCK176,Sticky programming lock for word 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "SPLOCK175,Sticky programming lock for word 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "SPLOCK174,Sticky programming lock for word 174" "B_0x0,B_0x1" bitfld.long 0x14 13. "SPLOCK173,Sticky programming lock for word 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "SPLOCK172,Sticky programming lock for word 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "SPLOCK171,Sticky programming lock for word 171" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "SPLOCK170,Sticky programming lock for word 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "SPLOCK169,Sticky programming lock for word 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "SPLOCK168,Sticky programming lock for word 168" "B_0x0,B_0x1" bitfld.long 0x14 7. "SPLOCK167,Sticky programming lock for word 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "SPLOCK166,Sticky programming lock for word 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "SPLOCK165,Sticky programming lock for word 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "SPLOCK164,Sticky programming lock for word 164" "B_0x0,B_0x1" newline bitfld.long 0x14 3. "SPLOCK163,Sticky programming lock for word 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "SPLOCK162,Sticky programming lock for word 162" "B_0x0,B_0x1" bitfld.long 0x14 1. "SPLOCK161,Sticky programming lock for word 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "SPLOCK160,Sticky programming lock for word 160" "B_0x0,B_0x1" line.long 0x18 "BSEC_SPLOCK6,BSEC sticky programming lock register 6" bitfld.long 0x18 31. "SPLOCK223,Sticky programming lock for word 223" "B_0x0,B_0x1" bitfld.long 0x18 30. "SPLOCK222,Sticky programming lock for word 222" "B_0x0,B_0x1" bitfld.long 0x18 29. "SPLOCK221,Sticky programming lock for word 221" "B_0x0,B_0x1" bitfld.long 0x18 28. "SPLOCK220,Sticky programming lock for word 220" "B_0x0,B_0x1" bitfld.long 0x18 27. "SPLOCK219,Sticky programming lock for word 219" "B_0x0,B_0x1" bitfld.long 0x18 26. "SPLOCK218,Sticky programming lock for word 218" "B_0x0,B_0x1" bitfld.long 0x18 25. "SPLOCK217,Sticky programming lock for word 217" "B_0x0,B_0x1" newline bitfld.long 0x18 24. "SPLOCK216,Sticky programming lock for word 216" "B_0x0,B_0x1" bitfld.long 0x18 23. "SPLOCK215,Sticky programming lock for word 215" "B_0x0,B_0x1" bitfld.long 0x18 22. "SPLOCK214,Sticky programming lock for word 214" "B_0x0,B_0x1" bitfld.long 0x18 21. "SPLOCK213,Sticky programming lock for word 213" "B_0x0,B_0x1" bitfld.long 0x18 20. "SPLOCK212,Sticky programming lock for word 212" "B_0x0,B_0x1" bitfld.long 0x18 19. "SPLOCK211,Sticky programming lock for word 211" "B_0x0,B_0x1" bitfld.long 0x18 18. "SPLOCK210,Sticky programming lock for word 210" "B_0x0,B_0x1" newline bitfld.long 0x18 17. "SPLOCK209,Sticky programming lock for word 209" "B_0x0,B_0x1" bitfld.long 0x18 16. "SPLOCK208,Sticky programming lock for word 208" "B_0x0,B_0x1" bitfld.long 0x18 15. "SPLOCK207,Sticky programming lock for word 207" "B_0x0,B_0x1" bitfld.long 0x18 14. "SPLOCK206,Sticky programming lock for word 206" "B_0x0,B_0x1" bitfld.long 0x18 13. "SPLOCK205,Sticky programming lock for word 205" "B_0x0,B_0x1" bitfld.long 0x18 12. "SPLOCK204,Sticky programming lock for word 204" "B_0x0,B_0x1" bitfld.long 0x18 11. "SPLOCK203,Sticky programming lock for word 203" "B_0x0,B_0x1" newline bitfld.long 0x18 10. "SPLOCK202,Sticky programming lock for word 202" "B_0x0,B_0x1" bitfld.long 0x18 9. "SPLOCK201,Sticky programming lock for word 201" "B_0x0,B_0x1" bitfld.long 0x18 8. "SPLOCK200,Sticky programming lock for word 200" "B_0x0,B_0x1" bitfld.long 0x18 7. "SPLOCK199,Sticky programming lock for word 199" "B_0x0,B_0x1" bitfld.long 0x18 6. "SPLOCK198,Sticky programming lock for word 198" "B_0x0,B_0x1" bitfld.long 0x18 5. "SPLOCK197,Sticky programming lock for word 197" "B_0x0,B_0x1" bitfld.long 0x18 4. "SPLOCK196,Sticky programming lock for word 196" "B_0x0,B_0x1" newline bitfld.long 0x18 3. "SPLOCK195,Sticky programming lock for word 195" "B_0x0,B_0x1" bitfld.long 0x18 2. "SPLOCK194,Sticky programming lock for word 194" "B_0x0,B_0x1" bitfld.long 0x18 1. "SPLOCK193,Sticky programming lock for word 193" "B_0x0,B_0x1" bitfld.long 0x18 0. "SPLOCK192,Sticky programming lock for word 192" "B_0x0,B_0x1" line.long 0x1C "BSEC_SPLOCK7,BSEC sticky programming lock register 7" bitfld.long 0x1C 31. "SPLOCK255,Sticky programming lock for word 255" "B_0x0,B_0x1" bitfld.long 0x1C 30. "SPLOCK254,Sticky programming lock for word 254" "B_0x0,B_0x1" bitfld.long 0x1C 29. "SPLOCK253,Sticky programming lock for word 253" "B_0x0,B_0x1" bitfld.long 0x1C 28. "SPLOCK252,Sticky programming lock for word 252" "B_0x0,B_0x1" bitfld.long 0x1C 27. "SPLOCK251,Sticky programming lock for word 251" "B_0x0,B_0x1" bitfld.long 0x1C 26. "SPLOCK250,Sticky programming lock for word 250" "B_0x0,B_0x1" bitfld.long 0x1C 25. "SPLOCK249,Sticky programming lock for word 249" "B_0x0,B_0x1" newline bitfld.long 0x1C 24. "SPLOCK248,Sticky programming lock for word 248" "B_0x0,B_0x1" bitfld.long 0x1C 23. "SPLOCK247,Sticky programming lock for word 247" "B_0x0,B_0x1" bitfld.long 0x1C 22. "SPLOCK246,Sticky programming lock for word 246" "B_0x0,B_0x1" bitfld.long 0x1C 21. "SPLOCK245,Sticky programming lock for word 245" "B_0x0,B_0x1" bitfld.long 0x1C 20. "SPLOCK244,Sticky programming lock for word 244" "B_0x0,B_0x1" bitfld.long 0x1C 19. "SPLOCK243,Sticky programming lock for word 243" "B_0x0,B_0x1" bitfld.long 0x1C 18. "SPLOCK242,Sticky programming lock for word 242" "B_0x0,B_0x1" newline bitfld.long 0x1C 17. "SPLOCK241,Sticky programming lock for word 241" "B_0x0,B_0x1" bitfld.long 0x1C 16. "SPLOCK240,Sticky programming lock for word 240" "B_0x0,B_0x1" bitfld.long 0x1C 15. "SPLOCK239,Sticky programming lock for word 239" "B_0x0,B_0x1" bitfld.long 0x1C 14. "SPLOCK238,Sticky programming lock for word 238" "B_0x0,B_0x1" bitfld.long 0x1C 13. "SPLOCK237,Sticky programming lock for word 237" "B_0x0,B_0x1" bitfld.long 0x1C 12. "SPLOCK236,Sticky programming lock for word 236" "B_0x0,B_0x1" bitfld.long 0x1C 11. "SPLOCK235,Sticky programming lock for word 235" "B_0x0,B_0x1" newline bitfld.long 0x1C 10. "SPLOCK234,Sticky programming lock for word 234" "B_0x0,B_0x1" bitfld.long 0x1C 9. "SPLOCK233,Sticky programming lock for word 233" "B_0x0,B_0x1" bitfld.long 0x1C 8. "SPLOCK232,Sticky programming lock for word 232" "B_0x0,B_0x1" bitfld.long 0x1C 7. "SPLOCK231,Sticky programming lock for word 231" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SPLOCK230,Sticky programming lock for word 230" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SPLOCK229,Sticky programming lock for word 229" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SPLOCK228,Sticky programming lock for word 228" "B_0x0,B_0x1" newline bitfld.long 0x1C 3. "SPLOCK227,Sticky programming lock for word 227" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SPLOCK226,Sticky programming lock for word 226" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SPLOCK225,Sticky programming lock for word 225" "B_0x0,B_0x1" bitfld.long 0x1C 0. "SPLOCK224,Sticky programming lock for word 224" "B_0x0,B_0x1" line.long 0x20 "BSEC_SPLOCK8,BSEC sticky programming lock register 8" bitfld.long 0x20 31. "SPLOCK287,Sticky programming lock for word 287" "B_0x0,B_0x1" bitfld.long 0x20 30. "SPLOCK286,Sticky programming lock for word 286" "B_0x0,B_0x1" bitfld.long 0x20 29. "SPLOCK285,Sticky programming lock for word 285" "B_0x0,B_0x1" bitfld.long 0x20 28. "SPLOCK284,Sticky programming lock for word 284" "B_0x0,B_0x1" bitfld.long 0x20 27. "SPLOCK283,Sticky programming lock for word 283" "B_0x0,B_0x1" bitfld.long 0x20 26. "SPLOCK282,Sticky programming lock for word 282" "B_0x0,B_0x1" bitfld.long 0x20 25. "SPLOCK281,Sticky programming lock for word 281" "B_0x0,B_0x1" newline bitfld.long 0x20 24. "SPLOCK280,Sticky programming lock for word 280" "B_0x0,B_0x1" bitfld.long 0x20 23. "SPLOCK279,Sticky programming lock for word 279" "B_0x0,B_0x1" bitfld.long 0x20 22. "SPLOCK278,Sticky programming lock for word 278" "B_0x0,B_0x1" bitfld.long 0x20 21. "SPLOCK277,Sticky programming lock for word 277" "B_0x0,B_0x1" bitfld.long 0x20 20. "SPLOCK276,Sticky programming lock for word 276" "B_0x0,B_0x1" bitfld.long 0x20 19. "SPLOCK275,Sticky programming lock for word 275" "B_0x0,B_0x1" bitfld.long 0x20 18. "SPLOCK274,Sticky programming lock for word 274" "B_0x0,B_0x1" newline bitfld.long 0x20 17. "SPLOCK273,Sticky programming lock for word 273" "B_0x0,B_0x1" bitfld.long 0x20 16. "SPLOCK272,Sticky programming lock for word 272" "B_0x0,B_0x1" bitfld.long 0x20 15. "SPLOCK271,Sticky programming lock for word 271" "B_0x0,B_0x1" bitfld.long 0x20 14. "SPLOCK270,Sticky programming lock for word 270" "B_0x0,B_0x1" bitfld.long 0x20 13. "SPLOCK269,Sticky programming lock for word 269" "B_0x0,B_0x1" bitfld.long 0x20 12. "SPLOCK268,Sticky programming lock for word 268" "B_0x0,B_0x1" bitfld.long 0x20 11. "SPLOCK267,Sticky programming lock for word 267" "B_0x0,B_0x1" newline bitfld.long 0x20 10. "SPLOCK266,Sticky programming lock for word 266" "B_0x0,B_0x1" bitfld.long 0x20 9. "SPLOCK265,Sticky programming lock for word 265" "B_0x0,B_0x1" bitfld.long 0x20 8. "SPLOCK264,Sticky programming lock for word 264" "B_0x0,B_0x1" bitfld.long 0x20 7. "SPLOCK263,Sticky programming lock for word 263" "B_0x0,B_0x1" bitfld.long 0x20 6. "SPLOCK262,Sticky programming lock for word 262" "B_0x0,B_0x1" bitfld.long 0x20 5. "SPLOCK261,Sticky programming lock for word 261" "B_0x0,B_0x1" bitfld.long 0x20 4. "SPLOCK260,Sticky programming lock for word 260" "B_0x0,B_0x1" newline bitfld.long 0x20 3. "SPLOCK259,Sticky programming lock for word 259" "B_0x0,B_0x1" bitfld.long 0x20 2. "SPLOCK258,Sticky programming lock for word 258" "B_0x0,B_0x1" bitfld.long 0x20 1. "SPLOCK257,Sticky programming lock for word 257" "B_0x0,B_0x1" bitfld.long 0x20 0. "SPLOCK256,Sticky programming lock for word 256" "B_0x0,B_0x1" line.long 0x24 "BSEC_SPLOCK9,BSEC sticky programming lock register 9" bitfld.long 0x24 31. "SPLOCK319,Sticky programming lock for word 319" "B_0x0,B_0x1" bitfld.long 0x24 30. "SPLOCK318,Sticky programming lock for word 318" "B_0x0,B_0x1" bitfld.long 0x24 29. "SPLOCK317,Sticky programming lock for word 317" "B_0x0,B_0x1" bitfld.long 0x24 28. "SPLOCK316,Sticky programming lock for word 316" "B_0x0,B_0x1" bitfld.long 0x24 27. "SPLOCK315,Sticky programming lock for word 315" "B_0x0,B_0x1" bitfld.long 0x24 26. "SPLOCK314,Sticky programming lock for word 314" "B_0x0,B_0x1" bitfld.long 0x24 25. "SPLOCK313,Sticky programming lock for word 313" "B_0x0,B_0x1" newline bitfld.long 0x24 24. "SPLOCK312,Sticky programming lock for word 312" "B_0x0,B_0x1" bitfld.long 0x24 23. "SPLOCK311,Sticky programming lock for word 311" "B_0x0,B_0x1" bitfld.long 0x24 22. "SPLOCK310,Sticky programming lock for word 310" "B_0x0,B_0x1" bitfld.long 0x24 21. "SPLOCK309,Sticky programming lock for word 309" "B_0x0,B_0x1" bitfld.long 0x24 20. "SPLOCK308,Sticky programming lock for word 308" "B_0x0,B_0x1" bitfld.long 0x24 19. "SPLOCK307,Sticky programming lock for word 307" "B_0x0,B_0x1" bitfld.long 0x24 18. "SPLOCK306,Sticky programming lock for word 306" "B_0x0,B_0x1" newline bitfld.long 0x24 17. "SPLOCK305,Sticky programming lock for word 305" "B_0x0,B_0x1" bitfld.long 0x24 16. "SPLOCK304,Sticky programming lock for word 304" "B_0x0,B_0x1" bitfld.long 0x24 15. "SPLOCK303,Sticky programming lock for word 303" "B_0x0,B_0x1" bitfld.long 0x24 14. "SPLOCK302,Sticky programming lock for word 302" "B_0x0,B_0x1" bitfld.long 0x24 13. "SPLOCK301,Sticky programming lock for word 301" "B_0x0,B_0x1" bitfld.long 0x24 12. "SPLOCK300,Sticky programming lock for word 300" "B_0x0,B_0x1" bitfld.long 0x24 11. "SPLOCK299,Sticky programming lock for word 299" "B_0x0,B_0x1" newline bitfld.long 0x24 10. "SPLOCK298,Sticky programming lock for word 298" "B_0x0,B_0x1" bitfld.long 0x24 9. "SPLOCK297,Sticky programming lock for word 297" "B_0x0,B_0x1" bitfld.long 0x24 8. "SPLOCK296,Sticky programming lock for word 296" "B_0x0,B_0x1" bitfld.long 0x24 7. "SPLOCK295,Sticky programming lock for word 295" "B_0x0,B_0x1" bitfld.long 0x24 6. "SPLOCK294,Sticky programming lock for word 294" "B_0x0,B_0x1" bitfld.long 0x24 5. "SPLOCK293,Sticky programming lock for word 293" "B_0x0,B_0x1" bitfld.long 0x24 4. "SPLOCK292,Sticky programming lock for word 292" "B_0x0,B_0x1" newline bitfld.long 0x24 3. "SPLOCK291,Sticky programming lock for word 291" "B_0x0,B_0x1" bitfld.long 0x24 2. "SPLOCK290,Sticky programming lock for word 290" "B_0x0,B_0x1" bitfld.long 0x24 1. "SPLOCK289,Sticky programming lock for word 289" "B_0x0,B_0x1" bitfld.long 0x24 0. "SPLOCK288,Sticky programming lock for word 288" "B_0x0,B_0x1" line.long 0x28 "BSEC_SPLOCK10,BSEC sticky programming lock register 10" bitfld.long 0x28 31. "SPLOCK351,Sticky programming lock for word 351" "B_0x0,B_0x1" bitfld.long 0x28 30. "SPLOCK350,Sticky programming lock for word 350" "B_0x0,B_0x1" bitfld.long 0x28 29. "SPLOCK349,Sticky programming lock for word 349" "B_0x0,B_0x1" bitfld.long 0x28 28. "SPLOCK348,Sticky programming lock for word 348" "B_0x0,B_0x1" bitfld.long 0x28 27. "SPLOCK347,Sticky programming lock for word 347" "B_0x0,B_0x1" bitfld.long 0x28 26. "SPLOCK346,Sticky programming lock for word 346" "B_0x0,B_0x1" bitfld.long 0x28 25. "SPLOCK345,Sticky programming lock for word 345" "B_0x0,B_0x1" newline bitfld.long 0x28 24. "SPLOCK344,Sticky programming lock for word 344" "B_0x0,B_0x1" bitfld.long 0x28 23. "SPLOCK343,Sticky programming lock for word 343" "B_0x0,B_0x1" bitfld.long 0x28 22. "SPLOCK342,Sticky programming lock for word 342" "B_0x0,B_0x1" bitfld.long 0x28 21. "SPLOCK341,Sticky programming lock for word 341" "B_0x0,B_0x1" bitfld.long 0x28 20. "SPLOCK340,Sticky programming lock for word 340" "B_0x0,B_0x1" bitfld.long 0x28 19. "SPLOCK339,Sticky programming lock for word 339" "B_0x0,B_0x1" bitfld.long 0x28 18. "SPLOCK338,Sticky programming lock for word 338" "B_0x0,B_0x1" newline bitfld.long 0x28 17. "SPLOCK337,Sticky programming lock for word 337" "B_0x0,B_0x1" bitfld.long 0x28 16. "SPLOCK336,Sticky programming lock for word 336" "B_0x0,B_0x1" bitfld.long 0x28 15. "SPLOCK335,Sticky programming lock for word 335" "B_0x0,B_0x1" bitfld.long 0x28 14. "SPLOCK334,Sticky programming lock for word 334" "B_0x0,B_0x1" bitfld.long 0x28 13. "SPLOCK333,Sticky programming lock for word 333" "B_0x0,B_0x1" bitfld.long 0x28 12. "SPLOCK332,Sticky programming lock for word 332" "B_0x0,B_0x1" bitfld.long 0x28 11. "SPLOCK331,Sticky programming lock for word 331" "B_0x0,B_0x1" newline bitfld.long 0x28 10. "SPLOCK330,Sticky programming lock for word 330" "B_0x0,B_0x1" bitfld.long 0x28 9. "SPLOCK329,Sticky programming lock for word 329" "B_0x0,B_0x1" bitfld.long 0x28 8. "SPLOCK328,Sticky programming lock for word 328" "B_0x0,B_0x1" bitfld.long 0x28 7. "SPLOCK327,Sticky programming lock for word 327" "B_0x0,B_0x1" bitfld.long 0x28 6. "SPLOCK326,Sticky programming lock for word 326" "B_0x0,B_0x1" bitfld.long 0x28 5. "SPLOCK325,Sticky programming lock for word 325" "B_0x0,B_0x1" bitfld.long 0x28 4. "SPLOCK324,Sticky programming lock for word 324" "B_0x0,B_0x1" newline bitfld.long 0x28 3. "SPLOCK323,Sticky programming lock for word 323" "B_0x0,B_0x1" bitfld.long 0x28 2. "SPLOCK322,Sticky programming lock for word 322" "B_0x0,B_0x1" bitfld.long 0x28 1. "SPLOCK321,Sticky programming lock for word 321" "B_0x0,B_0x1" bitfld.long 0x28 0. "SPLOCK320,Sticky programming lock for word 320" "B_0x0,B_0x1" line.long 0x2C "BSEC_SPLOCK11,BSEC sticky programming lock register 11" bitfld.long 0x2C 31. "SPLOCK383,Sticky programming lock for word 383" "B_0x0,B_0x1" bitfld.long 0x2C 30. "SPLOCK382,Sticky programming lock for word 382" "B_0x0,B_0x1" bitfld.long 0x2C 29. "SPLOCK381,Sticky programming lock for word 381" "B_0x0,B_0x1" bitfld.long 0x2C 28. "SPLOCK380,Sticky programming lock for word 380" "B_0x0,B_0x1" bitfld.long 0x2C 27. "SPLOCK379,Sticky programming lock for word 379" "B_0x0,B_0x1" bitfld.long 0x2C 26. "SPLOCK378,Sticky programming lock for word 378" "B_0x0,B_0x1" bitfld.long 0x2C 25. "SPLOCK377,Sticky programming lock for word 377" "B_0x0,B_0x1" newline bitfld.long 0x2C 24. "SPLOCK376,Sticky programming lock for word 376" "B_0x0,B_0x1" bitfld.long 0x2C 23. "SPLOCK375,Sticky programming lock for word 375" "B_0x0,B_0x1" bitfld.long 0x2C 22. "SPLOCK374,Sticky programming lock for word 374" "B_0x0,B_0x1" bitfld.long 0x2C 21. "SPLOCK373,Sticky programming lock for word 373" "B_0x0,B_0x1" bitfld.long 0x2C 20. "SPLOCK372,Sticky programming lock for word 372" "B_0x0,B_0x1" bitfld.long 0x2C 19. "SPLOCK371,Sticky programming lock for word 371" "B_0x0,B_0x1" bitfld.long 0x2C 18. "SPLOCK370,Sticky programming lock for word 370" "B_0x0,B_0x1" newline bitfld.long 0x2C 17. "SPLOCK369,Sticky programming lock for word 369" "B_0x0,B_0x1" bitfld.long 0x2C 16. "SPLOCK368,Sticky programming lock for word 368" "B_0x0,B_0x1" bitfld.long 0x2C 15. "SPLOCK367,Sticky programming lock for word 367" "B_0x0,B_0x1" bitfld.long 0x2C 14. "SPLOCK366,Sticky programming lock for word 366" "B_0x0,B_0x1" bitfld.long 0x2C 13. "SPLOCK365,Sticky programming lock for word 365" "B_0x0,B_0x1" bitfld.long 0x2C 12. "SPLOCK364,Sticky programming lock for word 364" "B_0x0,B_0x1" bitfld.long 0x2C 11. "SPLOCK363,Sticky programming lock for word 363" "B_0x0,B_0x1" newline bitfld.long 0x2C 10. "SPLOCK362,Sticky programming lock for word 362" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SPLOCK361,Sticky programming lock for word 361" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SPLOCK360,Sticky programming lock for word 360" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SPLOCK359,Sticky programming lock for word 359" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SPLOCK358,Sticky programming lock for word 358" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SPLOCK357,Sticky programming lock for word 357" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SPLOCK356,Sticky programming lock for word 356" "B_0x0,B_0x1" newline bitfld.long 0x2C 3. "SPLOCK355,Sticky programming lock for word 355" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SPLOCK354,Sticky programming lock for word 354" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SPLOCK353,Sticky programming lock for word 353" "B_0x0,B_0x1" bitfld.long 0x2C 0. "SPLOCK352,Sticky programming lock for word 352" "B_0x0,B_0x1" group.long 0x840++0x2F line.long 0x0 "BSEC_SWLOCK0,BSEC sticky write lock register 0" bitfld.long 0x0 31. "SWLOCK31,sticky write lock for shadow register 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "SWLOCK30,sticky write lock for shadow register 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "SWLOCK29,sticky write lock for shadow register 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "SWLOCK28,sticky write lock for shadow register 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "SWLOCK27,sticky write lock for shadow register 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "SWLOCK26,sticky write lock for shadow register 26" "B_0x0,B_0x1" bitfld.long 0x0 25. "SWLOCK25,sticky write lock for shadow register 25" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "SWLOCK24,sticky write lock for shadow register 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "SWLOCK23,sticky write lock for shadow register 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "SWLOCK22,sticky write lock for shadow register 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "SWLOCK21,sticky write lock for shadow register 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "SWLOCK20,sticky write lock for shadow register 20" "B_0x0,B_0x1" bitfld.long 0x0 19. "SWLOCK19,sticky write lock for shadow register 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "SWLOCK18,sticky write lock for shadow register 18" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "SWLOCK17,sticky write lock for shadow register 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "SWLOCK16,sticky write lock for shadow register 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "SWLOCK15,sticky write lock for shadow register 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "SWLOCK14,sticky write lock for shadow register 14" "B_0x0,B_0x1" bitfld.long 0x0 13. "SWLOCK13,sticky write lock for shadow register 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "SWLOCK12,sticky write lock for shadow register 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "SWLOCK11,sticky write lock for shadow register 11" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "SWLOCK10,sticky write lock for shadow register 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "SWLOCK9,sticky write lock for shadow register 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "SWLOCK8,sticky write lock for shadow register 8" "B_0x0,B_0x1" bitfld.long 0x0 7. "SWLOCK7,sticky write lock for shadow register 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "SWLOCK6,sticky write lock for shadow register 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "SWLOCK5,sticky write lock for shadow register 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "SWLOCK4,sticky write lock for shadow register 4" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SWLOCK3,sticky write lock for shadow register 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "SWLOCK2,sticky write lock for shadow register 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "SWLOCK1,sticky write lock for shadow register 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "SWLOCK0,sticky write lock for shadow register 0" "B_0x0,B_0x1" line.long 0x4 "BSEC_SWLOCK1,BSEC sticky write lock register 1" bitfld.long 0x4 31. "SWLOCK63,sticky write lock for shadow register 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "SWLOCK62,sticky write lock for shadow register 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "SWLOCK61,sticky write lock for shadow register 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "SWLOCK60,sticky write lock for shadow register 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "SWLOCK59,sticky write lock for shadow register 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "SWLOCK58,sticky write lock for shadow register 58" "B_0x0,B_0x1" bitfld.long 0x4 25. "SWLOCK57,sticky write lock for shadow register 57" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "SWLOCK56,sticky write lock for shadow register 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "SWLOCK55,sticky write lock for shadow register 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "SWLOCK54,sticky write lock for shadow register 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "SWLOCK53,sticky write lock for shadow register 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "SWLOCK52,sticky write lock for shadow register 52" "B_0x0,B_0x1" bitfld.long 0x4 19. "SWLOCK51,sticky write lock for shadow register 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "SWLOCK50,sticky write lock for shadow register 50" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "SWLOCK49,sticky write lock for shadow register 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "SWLOCK48,sticky write lock for shadow register 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWLOCK47,sticky write lock for shadow register 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "SWLOCK46,sticky write lock for shadow register 46" "B_0x0,B_0x1" bitfld.long 0x4 13. "SWLOCK45,sticky write lock for shadow register 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "SWLOCK44,sticky write lock for shadow register 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "SWLOCK43,sticky write lock for shadow register 43" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "SWLOCK42,sticky write lock for shadow register 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWLOCK41,sticky write lock for shadow register 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "SWLOCK40,sticky write lock for shadow register 40" "B_0x0,B_0x1" bitfld.long 0x4 7. "SWLOCK39,sticky write lock for shadow register 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "SWLOCK38,sticky write lock for shadow register 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "SWLOCK37,sticky write lock for shadow register 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "SWLOCK36,sticky write lock for shadow register 36" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "SWLOCK35,sticky write lock for shadow register 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "SWLOCK34,sticky write lock for shadow register 34" "B_0x0,B_0x1" bitfld.long 0x4 1. "SWLOCK33,sticky write lock for shadow register 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "SWLOCK32,sticky write lock for shadow register 32" "B_0x0,B_0x1" line.long 0x8 "BSEC_SWLOCK2,BSEC sticky write lock register 2" bitfld.long 0x8 31. "SWLOCK95,sticky write lock for shadow register 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "SWLOCK94,sticky write lock for shadow register 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "SWLOCK93,sticky write lock for shadow register 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "SWLOCK92,sticky write lock for shadow register 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "SWLOCK91,sticky write lock for shadow register 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "SWLOCK90,sticky write lock for shadow register 90" "B_0x0,B_0x1" bitfld.long 0x8 25. "SWLOCK89,sticky write lock for shadow register 89" "B_0x0,B_0x1" newline bitfld.long 0x8 24. "SWLOCK88,sticky write lock for shadow register 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "SWLOCK87,sticky write lock for shadow register 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "SWLOCK86,sticky write lock for shadow register 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "SWLOCK85,sticky write lock for shadow register 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "SWLOCK84,sticky write lock for shadow register 84" "B_0x0,B_0x1" bitfld.long 0x8 19. "SWLOCK83,sticky write lock for shadow register 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "SWLOCK82,sticky write lock for shadow register 82" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "SWLOCK81,sticky write lock for shadow register 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "SWLOCK80,sticky write lock for shadow register 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "SWLOCK79,sticky write lock for shadow register 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "SWLOCK78,sticky write lock for shadow register 78" "B_0x0,B_0x1" bitfld.long 0x8 13. "SWLOCK77,sticky write lock for shadow register 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "SWLOCK76,sticky write lock for shadow register 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "SWLOCK75,sticky write lock for shadow register 75" "B_0x0,B_0x1" newline bitfld.long 0x8 10. "SWLOCK74,sticky write lock for shadow register 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "SWLOCK73,sticky write lock for shadow register 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "SWLOCK72,sticky write lock for shadow register 72" "B_0x0,B_0x1" bitfld.long 0x8 7. "SWLOCK71,sticky write lock for shadow register 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "SWLOCK70,sticky write lock for shadow register 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "SWLOCK69,sticky write lock for shadow register 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "SWLOCK68,sticky write lock for shadow register 68" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "SWLOCK67,sticky write lock for shadow register 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "SWLOCK66,sticky write lock for shadow register 66" "B_0x0,B_0x1" bitfld.long 0x8 1. "SWLOCK65,sticky write lock for shadow register 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "SWLOCK64,sticky write lock for shadow register 64" "B_0x0,B_0x1" line.long 0xC "BSEC_SWLOCK3,BSEC sticky write lock register 3" bitfld.long 0xC 31. "SWLOCK127,sticky write lock for shadow register 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "SWLOCK126,sticky write lock for shadow register 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "SWLOCK125,sticky write lock for shadow register 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "SWLOCK124,sticky write lock for shadow register 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "SWLOCK123,sticky write lock for shadow register 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "SWLOCK122,sticky write lock for shadow register 122" "B_0x0,B_0x1" bitfld.long 0xC 25. "SWLOCK121,sticky write lock for shadow register 121" "B_0x0,B_0x1" newline bitfld.long 0xC 24. "SWLOCK120,sticky write lock for shadow register 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "SWLOCK119,sticky write lock for shadow register 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "SWLOCK118,sticky write lock for shadow register 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "SWLOCK117,sticky write lock for shadow register 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "SWLOCK116,sticky write lock for shadow register 116" "B_0x0,B_0x1" bitfld.long 0xC 19. "SWLOCK115,sticky write lock for shadow register 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "SWLOCK114,sticky write lock for shadow register 114" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "SWLOCK113,sticky write lock for shadow register 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "SWLOCK112,sticky write lock for shadow register 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "SWLOCK111,sticky write lock for shadow register 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "SWLOCK110,sticky write lock for shadow register 110" "B_0x0,B_0x1" bitfld.long 0xC 13. "SWLOCK109,sticky write lock for shadow register 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "SWLOCK108,sticky write lock for shadow register 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "SWLOCK107,sticky write lock for shadow register 107" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "SWLOCK106,sticky write lock for shadow register 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "SWLOCK105,sticky write lock for shadow register 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "SWLOCK104,sticky write lock for shadow register 104" "B_0x0,B_0x1" bitfld.long 0xC 7. "SWLOCK103,sticky write lock for shadow register 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "SWLOCK102,sticky write lock for shadow register 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "SWLOCK101,sticky write lock for shadow register 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "SWLOCK100,sticky write lock for shadow register 100" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "SWLOCK99,sticky write lock for shadow register 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "SWLOCK98,sticky write lock for shadow register 98" "B_0x0,B_0x1" bitfld.long 0xC 1. "SWLOCK97,sticky write lock for shadow register 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "SWLOCK96,sticky write lock for shadow register 96" "B_0x0,B_0x1" line.long 0x10 "BSEC_SWLOCK4,BSEC sticky write lock register 4" bitfld.long 0x10 31. "SWLOCK159,sticky write lock for shadow register 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "SWLOCK158,sticky write lock for shadow register 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "SWLOCK157,sticky write lock for shadow register 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "SWLOCK156,sticky write lock for shadow register 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "SWLOCK155,sticky write lock for shadow register 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "SWLOCK154,sticky write lock for shadow register 154" "B_0x0,B_0x1" bitfld.long 0x10 25. "SWLOCK153,sticky write lock for shadow register 153" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "SWLOCK152,sticky write lock for shadow register 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "SWLOCK151,sticky write lock for shadow register 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "SWLOCK150,sticky write lock for shadow register 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "SWLOCK149,sticky write lock for shadow register 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "SWLOCK148,sticky write lock for shadow register 148" "B_0x0,B_0x1" bitfld.long 0x10 19. "SWLOCK147,sticky write lock for shadow register 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "SWLOCK146,sticky write lock for shadow register 146" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "SWLOCK145,sticky write lock for shadow register 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "SWLOCK144,sticky write lock for shadow register 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "SWLOCK143,sticky write lock for shadow register 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "SWLOCK142,sticky write lock for shadow register 142" "B_0x0,B_0x1" bitfld.long 0x10 13. "SWLOCK141,sticky write lock for shadow register 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "SWLOCK140,sticky write lock for shadow register 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "SWLOCK139,sticky write lock for shadow register 139" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "SWLOCK138,sticky write lock for shadow register 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "SWLOCK137,sticky write lock for shadow register 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "SWLOCK136,sticky write lock for shadow register 136" "B_0x0,B_0x1" bitfld.long 0x10 7. "SWLOCK135,sticky write lock for shadow register 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "SWLOCK134,sticky write lock for shadow register 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "SWLOCK133,sticky write lock for shadow register 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "SWLOCK132,sticky write lock for shadow register 132" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "SWLOCK131,sticky write lock for shadow register 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "SWLOCK130,sticky write lock for shadow register 130" "B_0x0,B_0x1" bitfld.long 0x10 1. "SWLOCK129,sticky write lock for shadow register 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "SWLOCK128,sticky write lock for shadow register 128" "B_0x0,B_0x1" line.long 0x14 "BSEC_SWLOCK5,BSEC sticky write lock register 5" bitfld.long 0x14 31. "SWLOCK191,sticky write lock for shadow register 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "SWLOCK190,sticky write lock for shadow register 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "SWLOCK189,sticky write lock for shadow register 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "SWLOCK188,sticky write lock for shadow register 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "SWLOCK187,sticky write lock for shadow register 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "SWLOCK186,sticky write lock for shadow register 186" "B_0x0,B_0x1" bitfld.long 0x14 25. "SWLOCK185,sticky write lock for shadow register 185" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "SWLOCK184,sticky write lock for shadow register 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "SWLOCK183,sticky write lock for shadow register 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "SWLOCK182,sticky write lock for shadow register 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "SWLOCK181,sticky write lock for shadow register 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "SWLOCK180,sticky write lock for shadow register 180" "B_0x0,B_0x1" bitfld.long 0x14 19. "SWLOCK179,sticky write lock for shadow register 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "SWLOCK178,sticky write lock for shadow register 178" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "SWLOCK177,sticky write lock for shadow register 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "SWLOCK176,sticky write lock for shadow register 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "SWLOCK175,sticky write lock for shadow register 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "SWLOCK174,sticky write lock for shadow register 174" "B_0x0,B_0x1" bitfld.long 0x14 13. "SWLOCK173,sticky write lock for shadow register 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "SWLOCK172,sticky write lock for shadow register 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "SWLOCK171,sticky write lock for shadow register 171" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "SWLOCK170,sticky write lock for shadow register 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "SWLOCK169,sticky write lock for shadow register 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "SWLOCK168,sticky write lock for shadow register 168" "B_0x0,B_0x1" bitfld.long 0x14 7. "SWLOCK167,sticky write lock for shadow register 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "SWLOCK166,sticky write lock for shadow register 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "SWLOCK165,sticky write lock for shadow register 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "SWLOCK164,sticky write lock for shadow register 164" "B_0x0,B_0x1" newline bitfld.long 0x14 3. "SWLOCK163,sticky write lock for shadow register 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "SWLOCK162,sticky write lock for shadow register 162" "B_0x0,B_0x1" bitfld.long 0x14 1. "SWLOCK161,sticky write lock for shadow register 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "SWLOCK160,sticky write lock for shadow register 160" "B_0x0,B_0x1" line.long 0x18 "BSEC_SWLOCK6,BSEC sticky write lock register 6" bitfld.long 0x18 31. "SWLOCK223,sticky write lock for shadow register 223" "B_0x0,B_0x1" bitfld.long 0x18 30. "SWLOCK222,sticky write lock for shadow register 222" "B_0x0,B_0x1" bitfld.long 0x18 29. "SWLOCK221,sticky write lock for shadow register 221" "B_0x0,B_0x1" bitfld.long 0x18 28. "SWLOCK220,sticky write lock for shadow register 220" "B_0x0,B_0x1" bitfld.long 0x18 27. "SWLOCK219,sticky write lock for shadow register 219" "B_0x0,B_0x1" bitfld.long 0x18 26. "SWLOCK218,sticky write lock for shadow register 218" "B_0x0,B_0x1" bitfld.long 0x18 25. "SWLOCK217,sticky write lock for shadow register 217" "B_0x0,B_0x1" newline bitfld.long 0x18 24. "SWLOCK216,sticky write lock for shadow register 216" "B_0x0,B_0x1" bitfld.long 0x18 23. "SWLOCK215,sticky write lock for shadow register 215" "B_0x0,B_0x1" bitfld.long 0x18 22. "SWLOCK214,sticky write lock for shadow register 214" "B_0x0,B_0x1" bitfld.long 0x18 21. "SWLOCK213,sticky write lock for shadow register 213" "B_0x0,B_0x1" bitfld.long 0x18 20. "SWLOCK212,sticky write lock for shadow register 212" "B_0x0,B_0x1" bitfld.long 0x18 19. "SWLOCK211,sticky write lock for shadow register 211" "B_0x0,B_0x1" bitfld.long 0x18 18. "SWLOCK210,sticky write lock for shadow register 210" "B_0x0,B_0x1" newline bitfld.long 0x18 17. "SWLOCK209,sticky write lock for shadow register 209" "B_0x0,B_0x1" bitfld.long 0x18 16. "SWLOCK208,sticky write lock for shadow register 208" "B_0x0,B_0x1" bitfld.long 0x18 15. "SWLOCK207,sticky write lock for shadow register 207" "B_0x0,B_0x1" bitfld.long 0x18 14. "SWLOCK206,sticky write lock for shadow register 206" "B_0x0,B_0x1" bitfld.long 0x18 13. "SWLOCK205,sticky write lock for shadow register 205" "B_0x0,B_0x1" bitfld.long 0x18 12. "SWLOCK204,sticky write lock for shadow register 204" "B_0x0,B_0x1" bitfld.long 0x18 11. "SWLOCK203,sticky write lock for shadow register 203" "B_0x0,B_0x1" newline bitfld.long 0x18 10. "SWLOCK202,sticky write lock for shadow register 202" "B_0x0,B_0x1" bitfld.long 0x18 9. "SWLOCK201,sticky write lock for shadow register 201" "B_0x0,B_0x1" bitfld.long 0x18 8. "SWLOCK200,sticky write lock for shadow register 200" "B_0x0,B_0x1" bitfld.long 0x18 7. "SWLOCK199,sticky write lock for shadow register 199" "B_0x0,B_0x1" bitfld.long 0x18 6. "SWLOCK198,sticky write lock for shadow register 198" "B_0x0,B_0x1" bitfld.long 0x18 5. "SWLOCK197,sticky write lock for shadow register 197" "B_0x0,B_0x1" bitfld.long 0x18 4. "SWLOCK196,sticky write lock for shadow register 196" "B_0x0,B_0x1" newline bitfld.long 0x18 3. "SWLOCK195,sticky write lock for shadow register 195" "B_0x0,B_0x1" bitfld.long 0x18 2. "SWLOCK194,sticky write lock for shadow register 194" "B_0x0,B_0x1" bitfld.long 0x18 1. "SWLOCK193,sticky write lock for shadow register 193" "B_0x0,B_0x1" bitfld.long 0x18 0. "SWLOCK192,sticky write lock for shadow register 192" "B_0x0,B_0x1" line.long 0x1C "BSEC_SWLOCK7,BSEC sticky write lock register 7" bitfld.long 0x1C 31. "SWLOCK255,sticky write lock for shadow register 255" "B_0x0,B_0x1" bitfld.long 0x1C 30. "SWLOCK254,sticky write lock for shadow register 254" "B_0x0,B_0x1" bitfld.long 0x1C 29. "SWLOCK253,sticky write lock for shadow register 253" "B_0x0,B_0x1" bitfld.long 0x1C 28. "SWLOCK252,sticky write lock for shadow register 252" "B_0x0,B_0x1" bitfld.long 0x1C 27. "SWLOCK251,sticky write lock for shadow register 251" "B_0x0,B_0x1" bitfld.long 0x1C 26. "SWLOCK250,sticky write lock for shadow register 250" "B_0x0,B_0x1" bitfld.long 0x1C 25. "SWLOCK249,sticky write lock for shadow register 249" "B_0x0,B_0x1" newline bitfld.long 0x1C 24. "SWLOCK248,sticky write lock for shadow register 248" "B_0x0,B_0x1" bitfld.long 0x1C 23. "SWLOCK247,sticky write lock for shadow register 247" "B_0x0,B_0x1" bitfld.long 0x1C 22. "SWLOCK246,sticky write lock for shadow register 246" "B_0x0,B_0x1" bitfld.long 0x1C 21. "SWLOCK245,sticky write lock for shadow register 245" "B_0x0,B_0x1" bitfld.long 0x1C 20. "SWLOCK244,sticky write lock for shadow register 244" "B_0x0,B_0x1" bitfld.long 0x1C 19. "SWLOCK243,sticky write lock for shadow register 243" "B_0x0,B_0x1" bitfld.long 0x1C 18. "SWLOCK242,sticky write lock for shadow register 242" "B_0x0,B_0x1" newline bitfld.long 0x1C 17. "SWLOCK241,sticky write lock for shadow register 241" "B_0x0,B_0x1" bitfld.long 0x1C 16. "SWLOCK240,sticky write lock for shadow register 240" "B_0x0,B_0x1" bitfld.long 0x1C 15. "SWLOCK239,sticky write lock for shadow register 239" "B_0x0,B_0x1" bitfld.long 0x1C 14. "SWLOCK238,sticky write lock for shadow register 238" "B_0x0,B_0x1" bitfld.long 0x1C 13. "SWLOCK237,sticky write lock for shadow register 237" "B_0x0,B_0x1" bitfld.long 0x1C 12. "SWLOCK236,sticky write lock for shadow register 236" "B_0x0,B_0x1" bitfld.long 0x1C 11. "SWLOCK235,sticky write lock for shadow register 235" "B_0x0,B_0x1" newline bitfld.long 0x1C 10. "SWLOCK234,sticky write lock for shadow register 234" "B_0x0,B_0x1" bitfld.long 0x1C 9. "SWLOCK233,sticky write lock for shadow register 233" "B_0x0,B_0x1" bitfld.long 0x1C 8. "SWLOCK232,sticky write lock for shadow register 232" "B_0x0,B_0x1" bitfld.long 0x1C 7. "SWLOCK231,sticky write lock for shadow register 231" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SWLOCK230,sticky write lock for shadow register 230" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SWLOCK229,sticky write lock for shadow register 229" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SWLOCK228,sticky write lock for shadow register 228" "B_0x0,B_0x1" newline bitfld.long 0x1C 3. "SWLOCK227,sticky write lock for shadow register 227" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SWLOCK226,sticky write lock for shadow register 226" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SWLOCK225,sticky write lock for shadow register 225" "B_0x0,B_0x1" bitfld.long 0x1C 0. "SWLOCK224,sticky write lock for shadow register 224" "B_0x0,B_0x1" line.long 0x20 "BSEC_SWLOCK8,BSEC sticky write lock register 8" bitfld.long 0x20 31. "SWLOCK287,sticky write lock for shadow register 287" "B_0x0,B_0x1" bitfld.long 0x20 30. "SWLOCK286,sticky write lock for shadow register 286" "B_0x0,B_0x1" bitfld.long 0x20 29. "SWLOCK285,sticky write lock for shadow register 285" "B_0x0,B_0x1" bitfld.long 0x20 28. "SWLOCK284,sticky write lock for shadow register 284" "B_0x0,B_0x1" bitfld.long 0x20 27. "SWLOCK283,sticky write lock for shadow register 283" "B_0x0,B_0x1" bitfld.long 0x20 26. "SWLOCK282,sticky write lock for shadow register 282" "B_0x0,B_0x1" bitfld.long 0x20 25. "SWLOCK281,sticky write lock for shadow register 281" "B_0x0,B_0x1" newline bitfld.long 0x20 24. "SWLOCK280,sticky write lock for shadow register 280" "B_0x0,B_0x1" bitfld.long 0x20 23. "SWLOCK279,sticky write lock for shadow register 279" "B_0x0,B_0x1" bitfld.long 0x20 22. "SWLOCK278,sticky write lock for shadow register 278" "B_0x0,B_0x1" bitfld.long 0x20 21. "SWLOCK277,sticky write lock for shadow register 277" "B_0x0,B_0x1" bitfld.long 0x20 20. "SWLOCK276,sticky write lock for shadow register 276" "B_0x0,B_0x1" bitfld.long 0x20 19. "SWLOCK275,sticky write lock for shadow register 275" "B_0x0,B_0x1" bitfld.long 0x20 18. "SWLOCK274,sticky write lock for shadow register 274" "B_0x0,B_0x1" newline bitfld.long 0x20 17. "SWLOCK273,sticky write lock for shadow register 273" "B_0x0,B_0x1" bitfld.long 0x20 16. "SWLOCK272,sticky write lock for shadow register 272" "B_0x0,B_0x1" bitfld.long 0x20 15. "SWLOCK271,sticky write lock for shadow register 271" "B_0x0,B_0x1" bitfld.long 0x20 14. "SWLOCK270,sticky write lock for shadow register 270" "B_0x0,B_0x1" bitfld.long 0x20 13. "SWLOCK269,sticky write lock for shadow register 269" "B_0x0,B_0x1" bitfld.long 0x20 12. "SWLOCK268,sticky write lock for shadow register 268" "B_0x0,B_0x1" bitfld.long 0x20 11. "SWLOCK267,sticky write lock for shadow register 267" "B_0x0,B_0x1" newline bitfld.long 0x20 10. "SWLOCK266,sticky write lock for shadow register 266" "B_0x0,B_0x1" bitfld.long 0x20 9. "SWLOCK265,sticky write lock for shadow register 265" "B_0x0,B_0x1" bitfld.long 0x20 8. "SWLOCK264,sticky write lock for shadow register 264" "B_0x0,B_0x1" bitfld.long 0x20 7. "SWLOCK263,sticky write lock for shadow register 263" "B_0x0,B_0x1" bitfld.long 0x20 6. "SWLOCK262,sticky write lock for shadow register 262" "B_0x0,B_0x1" bitfld.long 0x20 5. "SWLOCK261,sticky write lock for shadow register 261" "B_0x0,B_0x1" bitfld.long 0x20 4. "SWLOCK260,sticky write lock for shadow register 260" "B_0x0,B_0x1" newline bitfld.long 0x20 3. "SWLOCK259,sticky write lock for shadow register 259" "B_0x0,B_0x1" bitfld.long 0x20 2. "SWLOCK258,sticky write lock for shadow register 258" "B_0x0,B_0x1" bitfld.long 0x20 1. "SWLOCK257,sticky write lock for shadow register 257" "B_0x0,B_0x1" bitfld.long 0x20 0. "SWLOCK256,sticky write lock for shadow register 256" "B_0x0,B_0x1" line.long 0x24 "BSEC_SWLOCK9,BSEC sticky write lock register 9" bitfld.long 0x24 31. "SWLOCK319,sticky write lock for shadow register 319" "B_0x0,B_0x1" bitfld.long 0x24 30. "SWLOCK318,sticky write lock for shadow register 318" "B_0x0,B_0x1" bitfld.long 0x24 29. "SWLOCK317,sticky write lock for shadow register 317" "B_0x0,B_0x1" bitfld.long 0x24 28. "SWLOCK316,sticky write lock for shadow register 316" "B_0x0,B_0x1" bitfld.long 0x24 27. "SWLOCK315,sticky write lock for shadow register 315" "B_0x0,B_0x1" bitfld.long 0x24 26. "SWLOCK314,sticky write lock for shadow register 314" "B_0x0,B_0x1" bitfld.long 0x24 25. "SWLOCK313,sticky write lock for shadow register 313" "B_0x0,B_0x1" newline bitfld.long 0x24 24. "SWLOCK312,sticky write lock for shadow register 312" "B_0x0,B_0x1" bitfld.long 0x24 23. "SWLOCK311,sticky write lock for shadow register 311" "B_0x0,B_0x1" bitfld.long 0x24 22. "SWLOCK310,sticky write lock for shadow register 310" "B_0x0,B_0x1" bitfld.long 0x24 21. "SWLOCK309,sticky write lock for shadow register 309" "B_0x0,B_0x1" bitfld.long 0x24 20. "SWLOCK308,sticky write lock for shadow register 308" "B_0x0,B_0x1" bitfld.long 0x24 19. "SWLOCK307,sticky write lock for shadow register 307" "B_0x0,B_0x1" bitfld.long 0x24 18. "SWLOCK306,sticky write lock for shadow register 306" "B_0x0,B_0x1" newline bitfld.long 0x24 17. "SWLOCK305,sticky write lock for shadow register 305" "B_0x0,B_0x1" bitfld.long 0x24 16. "SWLOCK304,sticky write lock for shadow register 304" "B_0x0,B_0x1" bitfld.long 0x24 15. "SWLOCK303,sticky write lock for shadow register 303" "B_0x0,B_0x1" bitfld.long 0x24 14. "SWLOCK302,sticky write lock for shadow register 302" "B_0x0,B_0x1" bitfld.long 0x24 13. "SWLOCK301,sticky write lock for shadow register 301" "B_0x0,B_0x1" bitfld.long 0x24 12. "SWLOCK300,sticky write lock for shadow register 300" "B_0x0,B_0x1" bitfld.long 0x24 11. "SWLOCK299,sticky write lock for shadow register 299" "B_0x0,B_0x1" newline bitfld.long 0x24 10. "SWLOCK298,sticky write lock for shadow register 298" "B_0x0,B_0x1" bitfld.long 0x24 9. "SWLOCK297,sticky write lock for shadow register 297" "B_0x0,B_0x1" bitfld.long 0x24 8. "SWLOCK296,sticky write lock for shadow register 296" "B_0x0,B_0x1" bitfld.long 0x24 7. "SWLOCK295,sticky write lock for shadow register 295" "B_0x0,B_0x1" bitfld.long 0x24 6. "SWLOCK294,sticky write lock for shadow register 294" "B_0x0,B_0x1" bitfld.long 0x24 5. "SWLOCK293,sticky write lock for shadow register 293" "B_0x0,B_0x1" bitfld.long 0x24 4. "SWLOCK292,sticky write lock for shadow register 292" "B_0x0,B_0x1" newline bitfld.long 0x24 3. "SWLOCK291,sticky write lock for shadow register 291" "B_0x0,B_0x1" bitfld.long 0x24 2. "SWLOCK290,sticky write lock for shadow register 290" "B_0x0,B_0x1" bitfld.long 0x24 1. "SWLOCK289,sticky write lock for shadow register 289" "B_0x0,B_0x1" bitfld.long 0x24 0. "SWLOCK288,sticky write lock for shadow register 288" "B_0x0,B_0x1" line.long 0x28 "BSEC_SWLOCK10,BSEC sticky write lock register 10" bitfld.long 0x28 31. "SWLOCK351,sticky write lock for shadow register 351" "B_0x0,B_0x1" bitfld.long 0x28 30. "SWLOCK350,sticky write lock for shadow register 350" "B_0x0,B_0x1" bitfld.long 0x28 29. "SWLOCK349,sticky write lock for shadow register 349" "B_0x0,B_0x1" bitfld.long 0x28 28. "SWLOCK348,sticky write lock for shadow register 348" "B_0x0,B_0x1" bitfld.long 0x28 27. "SWLOCK347,sticky write lock for shadow register 347" "B_0x0,B_0x1" bitfld.long 0x28 26. "SWLOCK346,sticky write lock for shadow register 346" "B_0x0,B_0x1" bitfld.long 0x28 25. "SWLOCK345,sticky write lock for shadow register 345" "B_0x0,B_0x1" newline bitfld.long 0x28 24. "SWLOCK344,sticky write lock for shadow register 344" "B_0x0,B_0x1" bitfld.long 0x28 23. "SWLOCK343,sticky write lock for shadow register 343" "B_0x0,B_0x1" bitfld.long 0x28 22. "SWLOCK342,sticky write lock for shadow register 342" "B_0x0,B_0x1" bitfld.long 0x28 21. "SWLOCK341,sticky write lock for shadow register 341" "B_0x0,B_0x1" bitfld.long 0x28 20. "SWLOCK340,sticky write lock for shadow register 340" "B_0x0,B_0x1" bitfld.long 0x28 19. "SWLOCK339,sticky write lock for shadow register 339" "B_0x0,B_0x1" bitfld.long 0x28 18. "SWLOCK338,sticky write lock for shadow register 338" "B_0x0,B_0x1" newline bitfld.long 0x28 17. "SWLOCK337,sticky write lock for shadow register 337" "B_0x0,B_0x1" bitfld.long 0x28 16. "SWLOCK336,sticky write lock for shadow register 336" "B_0x0,B_0x1" bitfld.long 0x28 15. "SWLOCK335,sticky write lock for shadow register 335" "B_0x0,B_0x1" bitfld.long 0x28 14. "SWLOCK334,sticky write lock for shadow register 334" "B_0x0,B_0x1" bitfld.long 0x28 13. "SWLOCK333,sticky write lock for shadow register 333" "B_0x0,B_0x1" bitfld.long 0x28 12. "SWLOCK332,sticky write lock for shadow register 332" "B_0x0,B_0x1" bitfld.long 0x28 11. "SWLOCK331,sticky write lock for shadow register 331" "B_0x0,B_0x1" newline bitfld.long 0x28 10. "SWLOCK330,sticky write lock for shadow register 330" "B_0x0,B_0x1" bitfld.long 0x28 9. "SWLOCK329,sticky write lock for shadow register 329" "B_0x0,B_0x1" bitfld.long 0x28 8. "SWLOCK328,sticky write lock for shadow register 328" "B_0x0,B_0x1" bitfld.long 0x28 7. "SWLOCK327,sticky write lock for shadow register 327" "B_0x0,B_0x1" bitfld.long 0x28 6. "SWLOCK326,sticky write lock for shadow register 326" "B_0x0,B_0x1" bitfld.long 0x28 5. "SWLOCK325,sticky write lock for shadow register 325" "B_0x0,B_0x1" bitfld.long 0x28 4. "SWLOCK324,sticky write lock for shadow register 324" "B_0x0,B_0x1" newline bitfld.long 0x28 3. "SWLOCK323,sticky write lock for shadow register 323" "B_0x0,B_0x1" bitfld.long 0x28 2. "SWLOCK322,sticky write lock for shadow register 322" "B_0x0,B_0x1" bitfld.long 0x28 1. "SWLOCK321,sticky write lock for shadow register 321" "B_0x0,B_0x1" bitfld.long 0x28 0. "SWLOCK320,sticky write lock for shadow register 320" "B_0x0,B_0x1" line.long 0x2C "BSEC_SWLOCK11,BSEC sticky write lock register 11" bitfld.long 0x2C 31. "SWLOCK383,sticky write lock for shadow register 383" "B_0x0,B_0x1" bitfld.long 0x2C 30. "SWLOCK382,sticky write lock for shadow register 382" "B_0x0,B_0x1" bitfld.long 0x2C 29. "SWLOCK381,sticky write lock for shadow register 381" "B_0x0,B_0x1" bitfld.long 0x2C 28. "SWLOCK380,sticky write lock for shadow register 380" "B_0x0,B_0x1" bitfld.long 0x2C 27. "SWLOCK379,sticky write lock for shadow register 379" "B_0x0,B_0x1" bitfld.long 0x2C 26. "SWLOCK378,sticky write lock for shadow register 378" "B_0x0,B_0x1" bitfld.long 0x2C 25. "SWLOCK377,sticky write lock for shadow register 377" "B_0x0,B_0x1" newline bitfld.long 0x2C 24. "SWLOCK376,sticky write lock for shadow register 376" "B_0x0,B_0x1" bitfld.long 0x2C 23. "SWLOCK375,sticky write lock for shadow register 375" "B_0x0,B_0x1" bitfld.long 0x2C 22. "SWLOCK374,sticky write lock for shadow register 374" "B_0x0,B_0x1" bitfld.long 0x2C 21. "SWLOCK373,sticky write lock for shadow register 373" "B_0x0,B_0x1" bitfld.long 0x2C 20. "SWLOCK372,sticky write lock for shadow register 372" "B_0x0,B_0x1" bitfld.long 0x2C 19. "SWLOCK371,sticky write lock for shadow register 371" "B_0x0,B_0x1" bitfld.long 0x2C 18. "SWLOCK370,sticky write lock for shadow register 370" "B_0x0,B_0x1" newline bitfld.long 0x2C 17. "SWLOCK369,sticky write lock for shadow register 369" "B_0x0,B_0x1" bitfld.long 0x2C 16. "SWLOCK368,sticky write lock for shadow register 368" "B_0x0,B_0x1" bitfld.long 0x2C 15. "SWLOCK367,sticky write lock for shadow register 367" "B_0x0,B_0x1" bitfld.long 0x2C 14. "SWLOCK366,sticky write lock for shadow register 366" "B_0x0,B_0x1" bitfld.long 0x2C 13. "SWLOCK365,sticky write lock for shadow register 365" "B_0x0,B_0x1" bitfld.long 0x2C 12. "SWLOCK364,sticky write lock for shadow register 364" "B_0x0,B_0x1" bitfld.long 0x2C 11. "SWLOCK363,sticky write lock for shadow register 363" "B_0x0,B_0x1" newline bitfld.long 0x2C 10. "SWLOCK362,sticky write lock for shadow register 362" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SWLOCK361,sticky write lock for shadow register 361" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SWLOCK360,sticky write lock for shadow register 360" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SWLOCK359,sticky write lock for shadow register 359" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SWLOCK358,sticky write lock for shadow register 358" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SWLOCK357,sticky write lock for shadow register 357" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SWLOCK356,sticky write lock for shadow register 356" "B_0x0,B_0x1" newline bitfld.long 0x2C 3. "SWLOCK355,sticky write lock for shadow register 355" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SWLOCK354,sticky write lock for shadow register 354" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SWLOCK353,sticky write lock for shadow register 353" "B_0x0,B_0x1" bitfld.long 0x2C 0. "SWLOCK352,sticky write lock for shadow register 352" "B_0x0,B_0x1" group.long 0x880++0x2F line.long 0x0 "BSEC_SRLOCK0,BSEC sticky reload lock register 0" bitfld.long 0x0 31. "SRLOCK31,sticky reload lock for fuse word 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "SRLOCK30,sticky reload lock for fuse word 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "SRLOCK29,sticky reload lock for fuse word 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "SRLOCK28,sticky reload lock for fuse word 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "SRLOCK27,sticky reload lock for fuse word 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "SRLOCK26,sticky reload lock for fuse word 26" "B_0x0,B_0x1" bitfld.long 0x0 25. "SRLOCK25,sticky reload lock for fuse word 25" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "SRLOCK24,sticky reload lock for fuse word 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "SRLOCK23,sticky reload lock for fuse word 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "SRLOCK22,sticky reload lock for fuse word 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "SRLOCK21,sticky reload lock for fuse word 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "SRLOCK20,sticky reload lock for fuse word 20" "B_0x0,B_0x1" bitfld.long 0x0 19. "SRLOCK19,sticky reload lock for fuse word 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "SRLOCK18,sticky reload lock for fuse word 18" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "SRLOCK17,sticky reload lock for fuse word 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "SRLOCK16,sticky reload lock for fuse word 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "SRLOCK15,sticky reload lock for fuse word 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "SRLOCK14,sticky reload lock for fuse word 14" "B_0x0,B_0x1" bitfld.long 0x0 13. "SRLOCK13,sticky reload lock for fuse word 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "SRLOCK12,sticky reload lock for fuse word 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "SRLOCK11,sticky reload lock for fuse word 11" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "SRLOCK10,sticky reload lock for fuse word 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "SRLOCK9,sticky reload lock for fuse word 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "SRLOCK8,sticky reload lock for fuse word 8" "B_0x0,B_0x1" bitfld.long 0x0 7. "SRLOCK7,sticky reload lock for fuse word 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "SRLOCK6,sticky reload lock for fuse word 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "SRLOCK5,sticky reload lock for fuse word 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "SRLOCK4,sticky reload lock for fuse word 4" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SRLOCK3,sticky reload lock for fuse word 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "SRLOCK2,sticky reload lock for fuse word 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "SRLOCK1,sticky reload lock for fuse word 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "SRLOCK0,sticky reload lock for fuse word 0" "B_0x0,B_0x1" line.long 0x4 "BSEC_SRLOCK1,BSEC sticky reload lock register 1" bitfld.long 0x4 31. "SRLOCK63,sticky reload lock for fuse word 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "SRLOCK62,sticky reload lock for fuse word 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "SRLOCK61,sticky reload lock for fuse word 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "SRLOCK60,sticky reload lock for fuse word 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "SRLOCK59,sticky reload lock for fuse word 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "SRLOCK58,sticky reload lock for fuse word 58" "B_0x0,B_0x1" bitfld.long 0x4 25. "SRLOCK57,sticky reload lock for fuse word 57" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "SRLOCK56,sticky reload lock for fuse word 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "SRLOCK55,sticky reload lock for fuse word 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "SRLOCK54,sticky reload lock for fuse word 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "SRLOCK53,sticky reload lock for fuse word 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "SRLOCK52,sticky reload lock for fuse word 52" "B_0x0,B_0x1" bitfld.long 0x4 19. "SRLOCK51,sticky reload lock for fuse word 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "SRLOCK50,sticky reload lock for fuse word 50" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "SRLOCK49,sticky reload lock for fuse word 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "SRLOCK48,sticky reload lock for fuse word 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "SRLOCK47,sticky reload lock for fuse word 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "SRLOCK46,sticky reload lock for fuse word 46" "B_0x0,B_0x1" bitfld.long 0x4 13. "SRLOCK45,sticky reload lock for fuse word 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "SRLOCK44,sticky reload lock for fuse word 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "SRLOCK43,sticky reload lock for fuse word 43" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "SRLOCK42,sticky reload lock for fuse word 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "SRLOCK41,sticky reload lock for fuse word 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "SRLOCK40,sticky reload lock for fuse word 40" "B_0x0,B_0x1" bitfld.long 0x4 7. "SRLOCK39,sticky reload lock for fuse word 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "SRLOCK38,sticky reload lock for fuse word 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "SRLOCK37,sticky reload lock for fuse word 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "SRLOCK36,sticky reload lock for fuse word 36" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "SRLOCK35,sticky reload lock for fuse word 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "SRLOCK34,sticky reload lock for fuse word 34" "B_0x0,B_0x1" bitfld.long 0x4 1. "SRLOCK33,sticky reload lock for fuse word 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "SRLOCK32,sticky reload lock for fuse word 32" "B_0x0,B_0x1" line.long 0x8 "BSEC_SRLOCK2,BSEC sticky reload lock register 2" bitfld.long 0x8 31. "SRLOCK95,sticky reload lock for fuse word 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "SRLOCK94,sticky reload lock for fuse word 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "SRLOCK93,sticky reload lock for fuse word 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "SRLOCK92,sticky reload lock for fuse word 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "SRLOCK91,sticky reload lock for fuse word 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "SRLOCK90,sticky reload lock for fuse word 90" "B_0x0,B_0x1" bitfld.long 0x8 25. "SRLOCK89,sticky reload lock for fuse word 89" "B_0x0,B_0x1" newline bitfld.long 0x8 24. "SRLOCK88,sticky reload lock for fuse word 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "SRLOCK87,sticky reload lock for fuse word 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "SRLOCK86,sticky reload lock for fuse word 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "SRLOCK85,sticky reload lock for fuse word 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "SRLOCK84,sticky reload lock for fuse word 84" "B_0x0,B_0x1" bitfld.long 0x8 19. "SRLOCK83,sticky reload lock for fuse word 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "SRLOCK82,sticky reload lock for fuse word 82" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "SRLOCK81,sticky reload lock for fuse word 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "SRLOCK80,sticky reload lock for fuse word 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "SRLOCK79,sticky reload lock for fuse word 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "SRLOCK78,sticky reload lock for fuse word 78" "B_0x0,B_0x1" bitfld.long 0x8 13. "SRLOCK77,sticky reload lock for fuse word 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "SRLOCK76,sticky reload lock for fuse word 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "SRLOCK75,sticky reload lock for fuse word 75" "B_0x0,B_0x1" newline bitfld.long 0x8 10. "SRLOCK74,sticky reload lock for fuse word 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "SRLOCK73,sticky reload lock for fuse word 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "SRLOCK72,sticky reload lock for fuse word 72" "B_0x0,B_0x1" bitfld.long 0x8 7. "SRLOCK71,sticky reload lock for fuse word 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "SRLOCK70,sticky reload lock for fuse word 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "SRLOCK69,sticky reload lock for fuse word 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "SRLOCK68,sticky reload lock for fuse word 68" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "SRLOCK67,sticky reload lock for fuse word 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "SRLOCK66,sticky reload lock for fuse word 66" "B_0x0,B_0x1" bitfld.long 0x8 1. "SRLOCK65,sticky reload lock for fuse word 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "SRLOCK64,sticky reload lock for fuse word 64" "B_0x0,B_0x1" line.long 0xC "BSEC_SRLOCK3,BSEC sticky reload lock register 3" bitfld.long 0xC 31. "SRLOCK127,sticky reload lock for fuse word 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "SRLOCK126,sticky reload lock for fuse word 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "SRLOCK125,sticky reload lock for fuse word 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "SRLOCK124,sticky reload lock for fuse word 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "SRLOCK123,sticky reload lock for fuse word 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "SRLOCK122,sticky reload lock for fuse word 122" "B_0x0,B_0x1" bitfld.long 0xC 25. "SRLOCK121,sticky reload lock for fuse word 121" "B_0x0,B_0x1" newline bitfld.long 0xC 24. "SRLOCK120,sticky reload lock for fuse word 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "SRLOCK119,sticky reload lock for fuse word 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "SRLOCK118,sticky reload lock for fuse word 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "SRLOCK117,sticky reload lock for fuse word 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "SRLOCK116,sticky reload lock for fuse word 116" "B_0x0,B_0x1" bitfld.long 0xC 19. "SRLOCK115,sticky reload lock for fuse word 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "SRLOCK114,sticky reload lock for fuse word 114" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "SRLOCK113,sticky reload lock for fuse word 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "SRLOCK112,sticky reload lock for fuse word 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "SRLOCK111,sticky reload lock for fuse word 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "SRLOCK110,sticky reload lock for fuse word 110" "B_0x0,B_0x1" bitfld.long 0xC 13. "SRLOCK109,sticky reload lock for fuse word 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "SRLOCK108,sticky reload lock for fuse word 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "SRLOCK107,sticky reload lock for fuse word 107" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "SRLOCK106,sticky reload lock for fuse word 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "SRLOCK105,sticky reload lock for fuse word 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "SRLOCK104,sticky reload lock for fuse word 104" "B_0x0,B_0x1" bitfld.long 0xC 7. "SRLOCK103,sticky reload lock for fuse word 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "SRLOCK102,sticky reload lock for fuse word 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "SRLOCK101,sticky reload lock for fuse word 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "SRLOCK100,sticky reload lock for fuse word 100" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "SRLOCK99,sticky reload lock for fuse word 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "SRLOCK98,sticky reload lock for fuse word 98" "B_0x0,B_0x1" bitfld.long 0xC 1. "SRLOCK97,sticky reload lock for fuse word 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "SRLOCK96,sticky reload lock for fuse word 96" "B_0x0,B_0x1" line.long 0x10 "BSEC_SRLOCK4,BSEC sticky reload lock register 4" bitfld.long 0x10 31. "SRLOCK159,sticky reload lock for fuse word 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "SRLOCK158,sticky reload lock for fuse word 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "SRLOCK157,sticky reload lock for fuse word 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "SRLOCK156,sticky reload lock for fuse word 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "SRLOCK155,sticky reload lock for fuse word 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "SRLOCK154,sticky reload lock for fuse word 154" "B_0x0,B_0x1" bitfld.long 0x10 25. "SRLOCK153,sticky reload lock for fuse word 153" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "SRLOCK152,sticky reload lock for fuse word 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "SRLOCK151,sticky reload lock for fuse word 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "SRLOCK150,sticky reload lock for fuse word 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "SRLOCK149,sticky reload lock for fuse word 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "SRLOCK148,sticky reload lock for fuse word 148" "B_0x0,B_0x1" bitfld.long 0x10 19. "SRLOCK147,sticky reload lock for fuse word 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "SRLOCK146,sticky reload lock for fuse word 146" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "SRLOCK145,sticky reload lock for fuse word 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "SRLOCK144,sticky reload lock for fuse word 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "SRLOCK143,sticky reload lock for fuse word 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "SRLOCK142,sticky reload lock for fuse word 142" "B_0x0,B_0x1" bitfld.long 0x10 13. "SRLOCK141,sticky reload lock for fuse word 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "SRLOCK140,sticky reload lock for fuse word 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "SRLOCK139,sticky reload lock for fuse word 139" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "SRLOCK138,sticky reload lock for fuse word 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "SRLOCK137,sticky reload lock for fuse word 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "SRLOCK136,sticky reload lock for fuse word 136" "B_0x0,B_0x1" bitfld.long 0x10 7. "SRLOCK135,sticky reload lock for fuse word 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "SRLOCK134,sticky reload lock for fuse word 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "SRLOCK133,sticky reload lock for fuse word 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "SRLOCK132,sticky reload lock for fuse word 132" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "SRLOCK131,sticky reload lock for fuse word 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "SRLOCK130,sticky reload lock for fuse word 130" "B_0x0,B_0x1" bitfld.long 0x10 1. "SRLOCK129,sticky reload lock for fuse word 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "SRLOCK128,sticky reload lock for fuse word 128" "B_0x0,B_0x1" line.long 0x14 "BSEC_SRLOCK5,BSEC sticky reload lock register 5" bitfld.long 0x14 31. "SRLOCK191,sticky reload lock for fuse word 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "SRLOCK190,sticky reload lock for fuse word 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "SRLOCK189,sticky reload lock for fuse word 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "SRLOCK188,sticky reload lock for fuse word 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "SRLOCK187,sticky reload lock for fuse word 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "SRLOCK186,sticky reload lock for fuse word 186" "B_0x0,B_0x1" bitfld.long 0x14 25. "SRLOCK185,sticky reload lock for fuse word 185" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "SRLOCK184,sticky reload lock for fuse word 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "SRLOCK183,sticky reload lock for fuse word 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "SRLOCK182,sticky reload lock for fuse word 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "SRLOCK181,sticky reload lock for fuse word 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "SRLOCK180,sticky reload lock for fuse word 180" "B_0x0,B_0x1" bitfld.long 0x14 19. "SRLOCK179,sticky reload lock for fuse word 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "SRLOCK178,sticky reload lock for fuse word 178" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "SRLOCK177,sticky reload lock for fuse word 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "SRLOCK176,sticky reload lock for fuse word 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "SRLOCK175,sticky reload lock for fuse word 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "SRLOCK174,sticky reload lock for fuse word 174" "B_0x0,B_0x1" bitfld.long 0x14 13. "SRLOCK173,sticky reload lock for fuse word 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "SRLOCK172,sticky reload lock for fuse word 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "SRLOCK171,sticky reload lock for fuse word 171" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "SRLOCK170,sticky reload lock for fuse word 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "SRLOCK169,sticky reload lock for fuse word 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "SRLOCK168,sticky reload lock for fuse word 168" "B_0x0,B_0x1" bitfld.long 0x14 7. "SRLOCK167,sticky reload lock for fuse word 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "SRLOCK166,sticky reload lock for fuse word 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "SRLOCK165,sticky reload lock for fuse word 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "SRLOCK164,sticky reload lock for fuse word 164" "B_0x0,B_0x1" newline bitfld.long 0x14 3. "SRLOCK163,sticky reload lock for fuse word 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "SRLOCK162,sticky reload lock for fuse word 162" "B_0x0,B_0x1" bitfld.long 0x14 1. "SRLOCK161,sticky reload lock for fuse word 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "SRLOCK160,sticky reload lock for fuse word 160" "B_0x0,B_0x1" line.long 0x18 "BSEC_SRLOCK6,BSEC sticky reload lock register 6" bitfld.long 0x18 31. "SRLOCK223,sticky reload lock for fuse word 223" "B_0x0,B_0x1" bitfld.long 0x18 30. "SRLOCK222,sticky reload lock for fuse word 222" "B_0x0,B_0x1" bitfld.long 0x18 29. "SRLOCK221,sticky reload lock for fuse word 221" "B_0x0,B_0x1" bitfld.long 0x18 28. "SRLOCK220,sticky reload lock for fuse word 220" "B_0x0,B_0x1" bitfld.long 0x18 27. "SRLOCK219,sticky reload lock for fuse word 219" "B_0x0,B_0x1" bitfld.long 0x18 26. "SRLOCK218,sticky reload lock for fuse word 218" "B_0x0,B_0x1" bitfld.long 0x18 25. "SRLOCK217,sticky reload lock for fuse word 217" "B_0x0,B_0x1" newline bitfld.long 0x18 24. "SRLOCK216,sticky reload lock for fuse word 216" "B_0x0,B_0x1" bitfld.long 0x18 23. "SRLOCK215,sticky reload lock for fuse word 215" "B_0x0,B_0x1" bitfld.long 0x18 22. "SRLOCK214,sticky reload lock for fuse word 214" "B_0x0,B_0x1" bitfld.long 0x18 21. "SRLOCK213,sticky reload lock for fuse word 213" "B_0x0,B_0x1" bitfld.long 0x18 20. "SRLOCK212,sticky reload lock for fuse word 212" "B_0x0,B_0x1" bitfld.long 0x18 19. "SRLOCK211,sticky reload lock for fuse word 211" "B_0x0,B_0x1" bitfld.long 0x18 18. "SRLOCK210,sticky reload lock for fuse word 210" "B_0x0,B_0x1" newline bitfld.long 0x18 17. "SRLOCK209,sticky reload lock for fuse word 209" "B_0x0,B_0x1" bitfld.long 0x18 16. "SRLOCK208,sticky reload lock for fuse word 208" "B_0x0,B_0x1" bitfld.long 0x18 15. "SRLOCK207,sticky reload lock for fuse word 207" "B_0x0,B_0x1" bitfld.long 0x18 14. "SRLOCK206,sticky reload lock for fuse word 206" "B_0x0,B_0x1" bitfld.long 0x18 13. "SRLOCK205,sticky reload lock for fuse word 205" "B_0x0,B_0x1" bitfld.long 0x18 12. "SRLOCK204,sticky reload lock for fuse word 204" "B_0x0,B_0x1" bitfld.long 0x18 11. "SRLOCK203,sticky reload lock for fuse word 203" "B_0x0,B_0x1" newline bitfld.long 0x18 10. "SRLOCK202,sticky reload lock for fuse word 202" "B_0x0,B_0x1" bitfld.long 0x18 9. "SRLOCK201,sticky reload lock for fuse word 201" "B_0x0,B_0x1" bitfld.long 0x18 8. "SRLOCK200,sticky reload lock for fuse word 200" "B_0x0,B_0x1" bitfld.long 0x18 7. "SRLOCK199,sticky reload lock for fuse word 199" "B_0x0,B_0x1" bitfld.long 0x18 6. "SRLOCK198,sticky reload lock for fuse word 198" "B_0x0,B_0x1" bitfld.long 0x18 5. "SRLOCK197,sticky reload lock for fuse word 197" "B_0x0,B_0x1" bitfld.long 0x18 4. "SRLOCK196,sticky reload lock for fuse word 196" "B_0x0,B_0x1" newline bitfld.long 0x18 3. "SRLOCK195,sticky reload lock for fuse word 195" "B_0x0,B_0x1" bitfld.long 0x18 2. "SRLOCK194,sticky reload lock for fuse word 194" "B_0x0,B_0x1" bitfld.long 0x18 1. "SRLOCK193,sticky reload lock for fuse word 193" "B_0x0,B_0x1" bitfld.long 0x18 0. "SRLOCK192,sticky reload lock for fuse word 192" "B_0x0,B_0x1" line.long 0x1C "BSEC_SRLOCK7,BSEC sticky reload lock register 7" bitfld.long 0x1C 31. "SRLOCK255,sticky reload lock for fuse word 255" "B_0x0,B_0x1" bitfld.long 0x1C 30. "SRLOCK254,sticky reload lock for fuse word 254" "B_0x0,B_0x1" bitfld.long 0x1C 29. "SRLOCK253,sticky reload lock for fuse word 253" "B_0x0,B_0x1" bitfld.long 0x1C 28. "SRLOCK252,sticky reload lock for fuse word 252" "B_0x0,B_0x1" bitfld.long 0x1C 27. "SRLOCK251,sticky reload lock for fuse word 251" "B_0x0,B_0x1" bitfld.long 0x1C 26. "SRLOCK250,sticky reload lock for fuse word 250" "B_0x0,B_0x1" bitfld.long 0x1C 25. "SRLOCK249,sticky reload lock for fuse word 249" "B_0x0,B_0x1" newline bitfld.long 0x1C 24. "SRLOCK248,sticky reload lock for fuse word 248" "B_0x0,B_0x1" bitfld.long 0x1C 23. "SRLOCK247,sticky reload lock for fuse word 247" "B_0x0,B_0x1" bitfld.long 0x1C 22. "SRLOCK246,sticky reload lock for fuse word 246" "B_0x0,B_0x1" bitfld.long 0x1C 21. "SRLOCK245,sticky reload lock for fuse word 245" "B_0x0,B_0x1" bitfld.long 0x1C 20. "SRLOCK244,sticky reload lock for fuse word 244" "B_0x0,B_0x1" bitfld.long 0x1C 19. "SRLOCK243,sticky reload lock for fuse word 243" "B_0x0,B_0x1" bitfld.long 0x1C 18. "SRLOCK242,sticky reload lock for fuse word 242" "B_0x0,B_0x1" newline bitfld.long 0x1C 17. "SRLOCK241,sticky reload lock for fuse word 241" "B_0x0,B_0x1" bitfld.long 0x1C 16. "SRLOCK240,sticky reload lock for fuse word 240" "B_0x0,B_0x1" bitfld.long 0x1C 15. "SRLOCK239,sticky reload lock for fuse word 239" "B_0x0,B_0x1" bitfld.long 0x1C 14. "SRLOCK238,sticky reload lock for fuse word 238" "B_0x0,B_0x1" bitfld.long 0x1C 13. "SRLOCK237,sticky reload lock for fuse word 237" "B_0x0,B_0x1" bitfld.long 0x1C 12. "SRLOCK236,sticky reload lock for fuse word 236" "B_0x0,B_0x1" bitfld.long 0x1C 11. "SRLOCK235,sticky reload lock for fuse word 235" "B_0x0,B_0x1" newline bitfld.long 0x1C 10. "SRLOCK234,sticky reload lock for fuse word 234" "B_0x0,B_0x1" bitfld.long 0x1C 9. "SRLOCK233,sticky reload lock for fuse word 233" "B_0x0,B_0x1" bitfld.long 0x1C 8. "SRLOCK232,sticky reload lock for fuse word 232" "B_0x0,B_0x1" bitfld.long 0x1C 7. "SRLOCK231,sticky reload lock for fuse word 231" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SRLOCK230,sticky reload lock for fuse word 230" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SRLOCK229,sticky reload lock for fuse word 229" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SRLOCK228,sticky reload lock for fuse word 228" "B_0x0,B_0x1" newline bitfld.long 0x1C 3. "SRLOCK227,sticky reload lock for fuse word 227" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SRLOCK226,sticky reload lock for fuse word 226" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SRLOCK225,sticky reload lock for fuse word 225" "B_0x0,B_0x1" bitfld.long 0x1C 0. "SRLOCK224,sticky reload lock for fuse word 224" "B_0x0,B_0x1" line.long 0x20 "BSEC_SRLOCK8,BSEC sticky reload lock register 8" bitfld.long 0x20 31. "SRLOCK287,sticky reload lock for fuse word 287" "B_0x0,B_0x1" bitfld.long 0x20 30. "SRLOCK286,sticky reload lock for fuse word 286" "B_0x0,B_0x1" bitfld.long 0x20 29. "SRLOCK285,sticky reload lock for fuse word 285" "B_0x0,B_0x1" bitfld.long 0x20 28. "SRLOCK284,sticky reload lock for fuse word 284" "B_0x0,B_0x1" bitfld.long 0x20 27. "SRLOCK283,sticky reload lock for fuse word 283" "B_0x0,B_0x1" bitfld.long 0x20 26. "SRLOCK282,sticky reload lock for fuse word 282" "B_0x0,B_0x1" bitfld.long 0x20 25. "SRLOCK281,sticky reload lock for fuse word 281" "B_0x0,B_0x1" newline bitfld.long 0x20 24. "SRLOCK280,sticky reload lock for fuse word 280" "B_0x0,B_0x1" bitfld.long 0x20 23. "SRLOCK279,sticky reload lock for fuse word 279" "B_0x0,B_0x1" bitfld.long 0x20 22. "SRLOCK278,sticky reload lock for fuse word 278" "B_0x0,B_0x1" bitfld.long 0x20 21. "SRLOCK277,sticky reload lock for fuse word 277" "B_0x0,B_0x1" bitfld.long 0x20 20. "SRLOCK276,sticky reload lock for fuse word 276" "B_0x0,B_0x1" bitfld.long 0x20 19. "SRLOCK275,sticky reload lock for fuse word 275" "B_0x0,B_0x1" bitfld.long 0x20 18. "SRLOCK274,sticky reload lock for fuse word 274" "B_0x0,B_0x1" newline bitfld.long 0x20 17. "SRLOCK273,sticky reload lock for fuse word 273" "B_0x0,B_0x1" bitfld.long 0x20 16. "SRLOCK272,sticky reload lock for fuse word 272" "B_0x0,B_0x1" bitfld.long 0x20 15. "SRLOCK271,sticky reload lock for fuse word 271" "B_0x0,B_0x1" bitfld.long 0x20 14. "SRLOCK270,sticky reload lock for fuse word 270" "B_0x0,B_0x1" bitfld.long 0x20 13. "SRLOCK269,sticky reload lock for fuse word 269" "B_0x0,B_0x1" bitfld.long 0x20 12. "SRLOCK268,sticky reload lock for fuse word 268" "B_0x0,B_0x1" bitfld.long 0x20 11. "SRLOCK267,sticky reload lock for fuse word 267" "B_0x0,B_0x1" newline bitfld.long 0x20 10. "SRLOCK266,sticky reload lock for fuse word 266" "B_0x0,B_0x1" bitfld.long 0x20 9. "SRLOCK265,sticky reload lock for fuse word 265" "B_0x0,B_0x1" bitfld.long 0x20 8. "SRLOCK264,sticky reload lock for fuse word 264" "B_0x0,B_0x1" bitfld.long 0x20 7. "SRLOCK263,sticky reload lock for fuse word 263" "B_0x0,B_0x1" bitfld.long 0x20 6. "SRLOCK262,sticky reload lock for fuse word 262" "B_0x0,B_0x1" bitfld.long 0x20 5. "SRLOCK261,sticky reload lock for fuse word 261" "B_0x0,B_0x1" bitfld.long 0x20 4. "SRLOCK260,sticky reload lock for fuse word 260" "B_0x0,B_0x1" newline bitfld.long 0x20 3. "SRLOCK259,sticky reload lock for fuse word 259" "B_0x0,B_0x1" bitfld.long 0x20 2. "SRLOCK258,sticky reload lock for fuse word 258" "B_0x0,B_0x1" bitfld.long 0x20 1. "SRLOCK257,sticky reload lock for fuse word 257" "B_0x0,B_0x1" bitfld.long 0x20 0. "SRLOCK256,sticky reload lock for fuse word 256" "B_0x0,B_0x1" line.long 0x24 "BSEC_SRLOCK9,BSEC sticky reload lock register 9" bitfld.long 0x24 31. "SRLOCK319,sticky reload lock for fuse word 319" "B_0x0,B_0x1" bitfld.long 0x24 30. "SRLOCK318,sticky reload lock for fuse word 318" "B_0x0,B_0x1" bitfld.long 0x24 29. "SRLOCK317,sticky reload lock for fuse word 317" "B_0x0,B_0x1" bitfld.long 0x24 28. "SRLOCK316,sticky reload lock for fuse word 316" "B_0x0,B_0x1" bitfld.long 0x24 27. "SRLOCK315,sticky reload lock for fuse word 315" "B_0x0,B_0x1" bitfld.long 0x24 26. "SRLOCK314,sticky reload lock for fuse word 314" "B_0x0,B_0x1" bitfld.long 0x24 25. "SRLOCK313,sticky reload lock for fuse word 313" "B_0x0,B_0x1" newline bitfld.long 0x24 24. "SRLOCK312,sticky reload lock for fuse word 312" "B_0x0,B_0x1" bitfld.long 0x24 23. "SRLOCK311,sticky reload lock for fuse word 311" "B_0x0,B_0x1" bitfld.long 0x24 22. "SRLOCK310,sticky reload lock for fuse word 310" "B_0x0,B_0x1" bitfld.long 0x24 21. "SRLOCK309,sticky reload lock for fuse word 309" "B_0x0,B_0x1" bitfld.long 0x24 20. "SRLOCK308,sticky reload lock for fuse word 308" "B_0x0,B_0x1" bitfld.long 0x24 19. "SRLOCK307,sticky reload lock for fuse word 307" "B_0x0,B_0x1" bitfld.long 0x24 18. "SRLOCK306,sticky reload lock for fuse word 306" "B_0x0,B_0x1" newline bitfld.long 0x24 17. "SRLOCK305,sticky reload lock for fuse word 305" "B_0x0,B_0x1" bitfld.long 0x24 16. "SRLOCK304,sticky reload lock for fuse word 304" "B_0x0,B_0x1" bitfld.long 0x24 15. "SRLOCK303,sticky reload lock for fuse word 303" "B_0x0,B_0x1" bitfld.long 0x24 14. "SRLOCK302,sticky reload lock for fuse word 302" "B_0x0,B_0x1" bitfld.long 0x24 13. "SRLOCK301,sticky reload lock for fuse word 301" "B_0x0,B_0x1" bitfld.long 0x24 12. "SRLOCK300,sticky reload lock for fuse word 300" "B_0x0,B_0x1" bitfld.long 0x24 11. "SRLOCK299,sticky reload lock for fuse word 299" "B_0x0,B_0x1" newline bitfld.long 0x24 10. "SRLOCK298,sticky reload lock for fuse word 298" "B_0x0,B_0x1" bitfld.long 0x24 9. "SRLOCK297,sticky reload lock for fuse word 297" "B_0x0,B_0x1" bitfld.long 0x24 8. "SRLOCK296,sticky reload lock for fuse word 296" "B_0x0,B_0x1" bitfld.long 0x24 7. "SRLOCK295,sticky reload lock for fuse word 295" "B_0x0,B_0x1" bitfld.long 0x24 6. "SRLOCK294,sticky reload lock for fuse word 294" "B_0x0,B_0x1" bitfld.long 0x24 5. "SRLOCK293,sticky reload lock for fuse word 293" "B_0x0,B_0x1" bitfld.long 0x24 4. "SRLOCK292,sticky reload lock for fuse word 292" "B_0x0,B_0x1" newline bitfld.long 0x24 3. "SRLOCK291,sticky reload lock for fuse word 291" "B_0x0,B_0x1" bitfld.long 0x24 2. "SRLOCK290,sticky reload lock for fuse word 290" "B_0x0,B_0x1" bitfld.long 0x24 1. "SRLOCK289,sticky reload lock for fuse word 289" "B_0x0,B_0x1" bitfld.long 0x24 0. "SRLOCK288,sticky reload lock for fuse word 288" "B_0x0,B_0x1" line.long 0x28 "BSEC_SRLOCK10,BSEC sticky reload lock register 10" bitfld.long 0x28 31. "SRLOCK351,sticky reload lock for fuse word 351" "B_0x0,B_0x1" bitfld.long 0x28 30. "SRLOCK350,sticky reload lock for fuse word 350" "B_0x0,B_0x1" bitfld.long 0x28 29. "SRLOCK349,sticky reload lock for fuse word 349" "B_0x0,B_0x1" bitfld.long 0x28 28. "SRLOCK348,sticky reload lock for fuse word 348" "B_0x0,B_0x1" bitfld.long 0x28 27. "SRLOCK347,sticky reload lock for fuse word 347" "B_0x0,B_0x1" bitfld.long 0x28 26. "SRLOCK346,sticky reload lock for fuse word 346" "B_0x0,B_0x1" bitfld.long 0x28 25. "SRLOCK345,sticky reload lock for fuse word 345" "B_0x0,B_0x1" newline bitfld.long 0x28 24. "SRLOCK344,sticky reload lock for fuse word 344" "B_0x0,B_0x1" bitfld.long 0x28 23. "SRLOCK343,sticky reload lock for fuse word 343" "B_0x0,B_0x1" bitfld.long 0x28 22. "SRLOCK342,sticky reload lock for fuse word 342" "B_0x0,B_0x1" bitfld.long 0x28 21. "SRLOCK341,sticky reload lock for fuse word 341" "B_0x0,B_0x1" bitfld.long 0x28 20. "SRLOCK340,sticky reload lock for fuse word 340" "B_0x0,B_0x1" bitfld.long 0x28 19. "SRLOCK339,sticky reload lock for fuse word 339" "B_0x0,B_0x1" bitfld.long 0x28 18. "SRLOCK338,sticky reload lock for fuse word 338" "B_0x0,B_0x1" newline bitfld.long 0x28 17. "SRLOCK337,sticky reload lock for fuse word 337" "B_0x0,B_0x1" bitfld.long 0x28 16. "SRLOCK336,sticky reload lock for fuse word 336" "B_0x0,B_0x1" bitfld.long 0x28 15. "SRLOCK335,sticky reload lock for fuse word 335" "B_0x0,B_0x1" bitfld.long 0x28 14. "SRLOCK334,sticky reload lock for fuse word 334" "B_0x0,B_0x1" bitfld.long 0x28 13. "SRLOCK333,sticky reload lock for fuse word 333" "B_0x0,B_0x1" bitfld.long 0x28 12. "SRLOCK332,sticky reload lock for fuse word 332" "B_0x0,B_0x1" bitfld.long 0x28 11. "SRLOCK331,sticky reload lock for fuse word 331" "B_0x0,B_0x1" newline bitfld.long 0x28 10. "SRLOCK330,sticky reload lock for fuse word 330" "B_0x0,B_0x1" bitfld.long 0x28 9. "SRLOCK329,sticky reload lock for fuse word 329" "B_0x0,B_0x1" bitfld.long 0x28 8. "SRLOCK328,sticky reload lock for fuse word 328" "B_0x0,B_0x1" bitfld.long 0x28 7. "SRLOCK327,sticky reload lock for fuse word 327" "B_0x0,B_0x1" bitfld.long 0x28 6. "SRLOCK326,sticky reload lock for fuse word 326" "B_0x0,B_0x1" bitfld.long 0x28 5. "SRLOCK325,sticky reload lock for fuse word 325" "B_0x0,B_0x1" bitfld.long 0x28 4. "SRLOCK324,sticky reload lock for fuse word 324" "B_0x0,B_0x1" newline bitfld.long 0x28 3. "SRLOCK323,sticky reload lock for fuse word 323" "B_0x0,B_0x1" bitfld.long 0x28 2. "SRLOCK322,sticky reload lock for fuse word 322" "B_0x0,B_0x1" bitfld.long 0x28 1. "SRLOCK321,sticky reload lock for fuse word 321" "B_0x0,B_0x1" bitfld.long 0x28 0. "SRLOCK320,sticky reload lock for fuse word 320" "B_0x0,B_0x1" line.long 0x2C "BSEC_SRLOCK11,BSEC sticky reload lock register 11" bitfld.long 0x2C 31. "SRLOCK383,sticky reload lock for fuse word 383" "B_0x0,B_0x1" bitfld.long 0x2C 30. "SRLOCK382,sticky reload lock for fuse word 382" "B_0x0,B_0x1" bitfld.long 0x2C 29. "SRLOCK381,sticky reload lock for fuse word 381" "B_0x0,B_0x1" bitfld.long 0x2C 28. "SRLOCK380,sticky reload lock for fuse word 380" "B_0x0,B_0x1" bitfld.long 0x2C 27. "SRLOCK379,sticky reload lock for fuse word 379" "B_0x0,B_0x1" bitfld.long 0x2C 26. "SRLOCK378,sticky reload lock for fuse word 378" "B_0x0,B_0x1" bitfld.long 0x2C 25. "SRLOCK377,sticky reload lock for fuse word 377" "B_0x0,B_0x1" newline bitfld.long 0x2C 24. "SRLOCK376,sticky reload lock for fuse word 376" "B_0x0,B_0x1" bitfld.long 0x2C 23. "SRLOCK375,sticky reload lock for fuse word 375" "B_0x0,B_0x1" bitfld.long 0x2C 22. "SRLOCK374,sticky reload lock for fuse word 374" "B_0x0,B_0x1" bitfld.long 0x2C 21. "SRLOCK373,sticky reload lock for fuse word 373" "B_0x0,B_0x1" bitfld.long 0x2C 20. "SRLOCK372,sticky reload lock for fuse word 372" "B_0x0,B_0x1" bitfld.long 0x2C 19. "SRLOCK371,sticky reload lock for fuse word 371" "B_0x0,B_0x1" bitfld.long 0x2C 18. "SRLOCK370,sticky reload lock for fuse word 370" "B_0x0,B_0x1" newline bitfld.long 0x2C 17. "SRLOCK369,sticky reload lock for fuse word 369" "B_0x0,B_0x1" bitfld.long 0x2C 16. "SRLOCK368,sticky reload lock for fuse word 368" "B_0x0,B_0x1" bitfld.long 0x2C 15. "SRLOCK367,sticky reload lock for fuse word 367" "B_0x0,B_0x1" bitfld.long 0x2C 14. "SRLOCK366,sticky reload lock for fuse word 366" "B_0x0,B_0x1" bitfld.long 0x2C 13. "SRLOCK365,sticky reload lock for fuse word 365" "B_0x0,B_0x1" bitfld.long 0x2C 12. "SRLOCK364,sticky reload lock for fuse word 364" "B_0x0,B_0x1" bitfld.long 0x2C 11. "SRLOCK363,sticky reload lock for fuse word 363" "B_0x0,B_0x1" newline bitfld.long 0x2C 10. "SRLOCK362,sticky reload lock for fuse word 362" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SRLOCK361,sticky reload lock for fuse word 361" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SRLOCK360,sticky reload lock for fuse word 360" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SRLOCK359,sticky reload lock for fuse word 359" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SRLOCK358,sticky reload lock for fuse word 358" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SRLOCK357,sticky reload lock for fuse word 357" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SRLOCK356,sticky reload lock for fuse word 356" "B_0x0,B_0x1" newline bitfld.long 0x2C 3. "SRLOCK355,sticky reload lock for fuse word 355" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SRLOCK354,sticky reload lock for fuse word 354" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SRLOCK353,sticky reload lock for fuse word 353" "B_0x0,B_0x1" bitfld.long 0x2C 0. "SRLOCK352,sticky reload lock for fuse word 352" "B_0x0,B_0x1" rgroup.long 0x8C0++0x2F line.long 0x0 "BSEC_OTPVLDR0,BSEC OTP valid register 0" bitfld.long 0x0 31. "VLDF31,Valid flag for shadow register 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "VLDF30,Valid flag for shadow register 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "VLDF29,Valid flag for shadow register 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "VLDF28,Valid flag for shadow register 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "VLDF27,Valid flag for shadow register 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "VLDF26,Valid flag for shadow register 26" "B_0x0,B_0x1" bitfld.long 0x0 25. "VLDF25,Valid flag for shadow register 25" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "VLDF24,Valid flag for shadow register 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "VLDF23,Valid flag for shadow register 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "VLDF22,Valid flag for shadow register 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "VLDF21,Valid flag for shadow register 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "VLDF20,Valid flag for shadow register 20" "B_0x0,B_0x1" bitfld.long 0x0 19. "VLDF19,Valid flag for shadow register 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "VLDF18,Valid flag for shadow register 18" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "VLDF17,Valid flag for shadow register 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "VLDF16,Valid flag for shadow register 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "VLDF15,Valid flag for shadow register 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "VLDF14,Valid flag for shadow register 14" "B_0x0,B_0x1" bitfld.long 0x0 13. "VLDF13,Valid flag for shadow register 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "VLDF12,Valid flag for shadow register 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "VLDF11,Valid flag for shadow register 11" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "VLDF10,Valid flag for shadow register 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "VLDF9,Valid flag for shadow register 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "VLDF8,Valid flag for shadow register 8" "B_0x0,B_0x1" bitfld.long 0x0 7. "VLDF7,Valid flag for shadow register 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "VLDF6,Valid flag for shadow register 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "VLDF5,Valid flag for shadow register 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "VLDF4,Valid flag for shadow register 4" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "VLDF3,Valid flag for shadow register 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "VLDF2,Valid flag for shadow register 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "VLDF1,Valid flag for shadow register 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "VLDF0,Valid flag for shadow register 0" "B_0x0,B_0x1" line.long 0x4 "BSEC_OTPVLDR1,BSEC OTP valid register 1" bitfld.long 0x4 31. "VLDF63,Valid flag for shadow register 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "VLDF62,Valid flag for shadow register 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "VLDF61,Valid flag for shadow register 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "VLDF60,Valid flag for shadow register 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "VLDF59,Valid flag for shadow register 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "VLDF58,Valid flag for shadow register 58" "B_0x0,B_0x1" bitfld.long 0x4 25. "VLDF57,Valid flag for shadow register 57" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "VLDF56,Valid flag for shadow register 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "VLDF55,Valid flag for shadow register 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "VLDF54,Valid flag for shadow register 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "VLDF53,Valid flag for shadow register 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "VLDF52,Valid flag for shadow register 52" "B_0x0,B_0x1" bitfld.long 0x4 19. "VLDF51,Valid flag for shadow register 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "VLDF50,Valid flag for shadow register 50" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "VLDF49,Valid flag for shadow register 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "VLDF48,Valid flag for shadow register 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "VLDF47,Valid flag for shadow register 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "VLDF46,Valid flag for shadow register 46" "B_0x0,B_0x1" bitfld.long 0x4 13. "VLDF45,Valid flag for shadow register 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "VLDF44,Valid flag for shadow register 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "VLDF43,Valid flag for shadow register 43" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "VLDF42,Valid flag for shadow register 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "VLDF41,Valid flag for shadow register 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "VLDF40,Valid flag for shadow register 40" "B_0x0,B_0x1" bitfld.long 0x4 7. "VLDF39,Valid flag for shadow register 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "VLDF38,Valid flag for shadow register 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "VLDF37,Valid flag for shadow register 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "VLDF36,Valid flag for shadow register 36" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "VLDF35,Valid flag for shadow register 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "VLDF34,Valid flag for shadow register 34" "B_0x0,B_0x1" bitfld.long 0x4 1. "VLDF33,Valid flag for shadow register 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "VLDF32,Valid flag for shadow register 32" "B_0x0,B_0x1" line.long 0x8 "BSEC_OTPVLDR2,BSEC OTP valid register 2" bitfld.long 0x8 31. "VLDF95,Valid flag for shadow register 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "VLDF94,Valid flag for shadow register 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "VLDF93,Valid flag for shadow register 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "VLDF92,Valid flag for shadow register 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "VLDF91,Valid flag for shadow register 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "VLDF90,Valid flag for shadow register 90" "B_0x0,B_0x1" bitfld.long 0x8 25. "VLDF89,Valid flag for shadow register 89" "B_0x0,B_0x1" newline bitfld.long 0x8 24. "VLDF88,Valid flag for shadow register 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "VLDF87,Valid flag for shadow register 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "VLDF86,Valid flag for shadow register 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "VLDF85,Valid flag for shadow register 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "VLDF84,Valid flag for shadow register 84" "B_0x0,B_0x1" bitfld.long 0x8 19. "VLDF83,Valid flag for shadow register 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "VLDF82,Valid flag for shadow register 82" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "VLDF81,Valid flag for shadow register 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "VLDF80,Valid flag for shadow register 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "VLDF79,Valid flag for shadow register 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "VLDF78,Valid flag for shadow register 78" "B_0x0,B_0x1" bitfld.long 0x8 13. "VLDF77,Valid flag for shadow register 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "VLDF76,Valid flag for shadow register 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "VLDF75,Valid flag for shadow register 75" "B_0x0,B_0x1" newline bitfld.long 0x8 10. "VLDF74,Valid flag for shadow register 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "VLDF73,Valid flag for shadow register 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "VLDF72,Valid flag for shadow register 72" "B_0x0,B_0x1" bitfld.long 0x8 7. "VLDF71,Valid flag for shadow register 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "VLDF70,Valid flag for shadow register 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "VLDF69,Valid flag for shadow register 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "VLDF68,Valid flag for shadow register 68" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "VLDF67,Valid flag for shadow register 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "VLDF66,Valid flag for shadow register 66" "B_0x0,B_0x1" bitfld.long 0x8 1. "VLDF65,Valid flag for shadow register 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "VLDF64,Valid flag for shadow register 64" "B_0x0,B_0x1" line.long 0xC "BSEC_OTPVLDR3,BSEC OTP valid register 3" bitfld.long 0xC 31. "VLDF127,Valid flag for shadow register 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "VLDF126,Valid flag for shadow register 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "VLDF125,Valid flag for shadow register 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "VLDF124,Valid flag for shadow register 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "VLDF123,Valid flag for shadow register 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "VLDF122,Valid flag for shadow register 122" "B_0x0,B_0x1" bitfld.long 0xC 25. "VLDF121,Valid flag for shadow register 121" "B_0x0,B_0x1" newline bitfld.long 0xC 24. "VLDF120,Valid flag for shadow register 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "VLDF119,Valid flag for shadow register 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "VLDF118,Valid flag for shadow register 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "VLDF117,Valid flag for shadow register 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "VLDF116,Valid flag for shadow register 116" "B_0x0,B_0x1" bitfld.long 0xC 19. "VLDF115,Valid flag for shadow register 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "VLDF114,Valid flag for shadow register 114" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "VLDF113,Valid flag for shadow register 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "VLDF112,Valid flag for shadow register 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "VLDF111,Valid flag for shadow register 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "VLDF110,Valid flag for shadow register 110" "B_0x0,B_0x1" bitfld.long 0xC 13. "VLDF109,Valid flag for shadow register 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "VLDF108,Valid flag for shadow register 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "VLDF107,Valid flag for shadow register 107" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "VLDF106,Valid flag for shadow register 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "VLDF105,Valid flag for shadow register 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "VLDF104,Valid flag for shadow register 104" "B_0x0,B_0x1" bitfld.long 0xC 7. "VLDF103,Valid flag for shadow register 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "VLDF102,Valid flag for shadow register 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "VLDF101,Valid flag for shadow register 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "VLDF100,Valid flag for shadow register 100" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "VLDF99,Valid flag for shadow register 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "VLDF98,Valid flag for shadow register 98" "B_0x0,B_0x1" bitfld.long 0xC 1. "VLDF97,Valid flag for shadow register 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "VLDF96,Valid flag for shadow register 96" "B_0x0,B_0x1" line.long 0x10 "BSEC_OTPVLDR4,BSEC OTP valid register 4" bitfld.long 0x10 31. "VLDF159,Valid flag for shadow register 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "VLDF158,Valid flag for shadow register 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "VLDF157,Valid flag for shadow register 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "VLDF156,Valid flag for shadow register 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "VLDF155,Valid flag for shadow register 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "VLDF154,Valid flag for shadow register 154" "B_0x0,B_0x1" bitfld.long 0x10 25. "VLDF153,Valid flag for shadow register 153" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "VLDF152,Valid flag for shadow register 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "VLDF151,Valid flag for shadow register 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "VLDF150,Valid flag for shadow register 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "VLDF149,Valid flag for shadow register 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "VLDF148,Valid flag for shadow register 148" "B_0x0,B_0x1" bitfld.long 0x10 19. "VLDF147,Valid flag for shadow register 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "VLDF146,Valid flag for shadow register 146" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "VLDF145,Valid flag for shadow register 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "VLDF144,Valid flag for shadow register 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "VLDF143,Valid flag for shadow register 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "VLDF142,Valid flag for shadow register 142" "B_0x0,B_0x1" bitfld.long 0x10 13. "VLDF141,Valid flag for shadow register 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "VLDF140,Valid flag for shadow register 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "VLDF139,Valid flag for shadow register 139" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "VLDF138,Valid flag for shadow register 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "VLDF137,Valid flag for shadow register 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "VLDF136,Valid flag for shadow register 136" "B_0x0,B_0x1" bitfld.long 0x10 7. "VLDF135,Valid flag for shadow register 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "VLDF134,Valid flag for shadow register 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "VLDF133,Valid flag for shadow register 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "VLDF132,Valid flag for shadow register 132" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "VLDF131,Valid flag for shadow register 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "VLDF130,Valid flag for shadow register 130" "B_0x0,B_0x1" bitfld.long 0x10 1. "VLDF129,Valid flag for shadow register 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "VLDF128,Valid flag for shadow register 128" "B_0x0,B_0x1" line.long 0x14 "BSEC_OTPVLDR5,BSEC OTP valid register 5" bitfld.long 0x14 31. "VLDF191,Valid flag for shadow register 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "VLDF190,Valid flag for shadow register 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "VLDF189,Valid flag for shadow register 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "VLDF188,Valid flag for shadow register 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "VLDF187,Valid flag for shadow register 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "VLDF186,Valid flag for shadow register 186" "B_0x0,B_0x1" bitfld.long 0x14 25. "VLDF185,Valid flag for shadow register 185" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "VLDF184,Valid flag for shadow register 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "VLDF183,Valid flag for shadow register 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "VLDF182,Valid flag for shadow register 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "VLDF181,Valid flag for shadow register 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "VLDF180,Valid flag for shadow register 180" "B_0x0,B_0x1" bitfld.long 0x14 19. "VLDF179,Valid flag for shadow register 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "VLDF178,Valid flag for shadow register 178" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "VLDF177,Valid flag for shadow register 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "VLDF176,Valid flag for shadow register 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "VLDF175,Valid flag for shadow register 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "VLDF174,Valid flag for shadow register 174" "B_0x0,B_0x1" bitfld.long 0x14 13. "VLDF173,Valid flag for shadow register 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "VLDF172,Valid flag for shadow register 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "VLDF171,Valid flag for shadow register 171" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "VLDF170,Valid flag for shadow register 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "VLDF169,Valid flag for shadow register 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "VLDF168,Valid flag for shadow register 168" "B_0x0,B_0x1" bitfld.long 0x14 7. "VLDF167,Valid flag for shadow register 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "VLDF166,Valid flag for shadow register 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "VLDF165,Valid flag for shadow register 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "VLDF164,Valid flag for shadow register 164" "B_0x0,B_0x1" newline bitfld.long 0x14 3. "VLDF163,Valid flag for shadow register 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "VLDF162,Valid flag for shadow register 162" "B_0x0,B_0x1" bitfld.long 0x14 1. "VLDF161,Valid flag for shadow register 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "VLDF160,Valid flag for shadow register 160" "B_0x0,B_0x1" line.long 0x18 "BSEC_OTPVLDR6,BSEC OTP valid register 6" bitfld.long 0x18 31. "VLDF223,Valid flag for shadow register 223" "B_0x0,B_0x1" bitfld.long 0x18 30. "VLDF222,Valid flag for shadow register 222" "B_0x0,B_0x1" bitfld.long 0x18 29. "VLDF221,Valid flag for shadow register 221" "B_0x0,B_0x1" bitfld.long 0x18 28. "VLDF220,Valid flag for shadow register 220" "B_0x0,B_0x1" bitfld.long 0x18 27. "VLDF219,Valid flag for shadow register 219" "B_0x0,B_0x1" bitfld.long 0x18 26. "VLDF218,Valid flag for shadow register 218" "B_0x0,B_0x1" bitfld.long 0x18 25. "VLDF217,Valid flag for shadow register 217" "B_0x0,B_0x1" newline bitfld.long 0x18 24. "VLDF216,Valid flag for shadow register 216" "B_0x0,B_0x1" bitfld.long 0x18 23. "VLDF215,Valid flag for shadow register 215" "B_0x0,B_0x1" bitfld.long 0x18 22. "VLDF214,Valid flag for shadow register 214" "B_0x0,B_0x1" bitfld.long 0x18 21. "VLDF213,Valid flag for shadow register 213" "B_0x0,B_0x1" bitfld.long 0x18 20. "VLDF212,Valid flag for shadow register 212" "B_0x0,B_0x1" bitfld.long 0x18 19. "VLDF211,Valid flag for shadow register 211" "B_0x0,B_0x1" bitfld.long 0x18 18. "VLDF210,Valid flag for shadow register 210" "B_0x0,B_0x1" newline bitfld.long 0x18 17. "VLDF209,Valid flag for shadow register 209" "B_0x0,B_0x1" bitfld.long 0x18 16. "VLDF208,Valid flag for shadow register 208" "B_0x0,B_0x1" bitfld.long 0x18 15. "VLDF207,Valid flag for shadow register 207" "B_0x0,B_0x1" bitfld.long 0x18 14. "VLDF206,Valid flag for shadow register 206" "B_0x0,B_0x1" bitfld.long 0x18 13. "VLDF205,Valid flag for shadow register 205" "B_0x0,B_0x1" bitfld.long 0x18 12. "VLDF204,Valid flag for shadow register 204" "B_0x0,B_0x1" bitfld.long 0x18 11. "VLDF203,Valid flag for shadow register 203" "B_0x0,B_0x1" newline bitfld.long 0x18 10. "VLDF202,Valid flag for shadow register 202" "B_0x0,B_0x1" bitfld.long 0x18 9. "VLDF201,Valid flag for shadow register 201" "B_0x0,B_0x1" bitfld.long 0x18 8. "VLDF200,Valid flag for shadow register 200" "B_0x0,B_0x1" bitfld.long 0x18 7. "VLDF199,Valid flag for shadow register 199" "B_0x0,B_0x1" bitfld.long 0x18 6. "VLDF198,Valid flag for shadow register 198" "B_0x0,B_0x1" bitfld.long 0x18 5. "VLDF197,Valid flag for shadow register 197" "B_0x0,B_0x1" bitfld.long 0x18 4. "VLDF196,Valid flag for shadow register 196" "B_0x0,B_0x1" newline bitfld.long 0x18 3. "VLDF195,Valid flag for shadow register 195" "B_0x0,B_0x1" bitfld.long 0x18 2. "VLDF194,Valid flag for shadow register 194" "B_0x0,B_0x1" bitfld.long 0x18 1. "VLDF193,Valid flag for shadow register 193" "B_0x0,B_0x1" bitfld.long 0x18 0. "VLDF192,Valid flag for shadow register 192" "B_0x0,B_0x1" line.long 0x1C "BSEC_OTPVLDR7,BSEC OTP valid register 7" bitfld.long 0x1C 31. "VLDF255,Valid flag for shadow register 255" "B_0x0,B_0x1" bitfld.long 0x1C 30. "VLDF254,Valid flag for shadow register 254" "B_0x0,B_0x1" bitfld.long 0x1C 29. "VLDF253,Valid flag for shadow register 253" "B_0x0,B_0x1" bitfld.long 0x1C 28. "VLDF252,Valid flag for shadow register 252" "B_0x0,B_0x1" bitfld.long 0x1C 27. "VLDF251,Valid flag for shadow register 251" "B_0x0,B_0x1" bitfld.long 0x1C 26. "VLDF250,Valid flag for shadow register 250" "B_0x0,B_0x1" bitfld.long 0x1C 25. "VLDF249,Valid flag for shadow register 249" "B_0x0,B_0x1" newline bitfld.long 0x1C 24. "VLDF248,Valid flag for shadow register 248" "B_0x0,B_0x1" bitfld.long 0x1C 23. "VLDF247,Valid flag for shadow register 247" "B_0x0,B_0x1" bitfld.long 0x1C 22. "VLDF246,Valid flag for shadow register 246" "B_0x0,B_0x1" bitfld.long 0x1C 21. "VLDF245,Valid flag for shadow register 245" "B_0x0,B_0x1" bitfld.long 0x1C 20. "VLDF244,Valid flag for shadow register 244" "B_0x0,B_0x1" bitfld.long 0x1C 19. "VLDF243,Valid flag for shadow register 243" "B_0x0,B_0x1" bitfld.long 0x1C 18. "VLDF242,Valid flag for shadow register 242" "B_0x0,B_0x1" newline bitfld.long 0x1C 17. "VLDF241,Valid flag for shadow register 241" "B_0x0,B_0x1" bitfld.long 0x1C 16. "VLDF240,Valid flag for shadow register 240" "B_0x0,B_0x1" bitfld.long 0x1C 15. "VLDF239,Valid flag for shadow register 239" "B_0x0,B_0x1" bitfld.long 0x1C 14. "VLDF238,Valid flag for shadow register 238" "B_0x0,B_0x1" bitfld.long 0x1C 13. "VLDF237,Valid flag for shadow register 237" "B_0x0,B_0x1" bitfld.long 0x1C 12. "VLDF236,Valid flag for shadow register 236" "B_0x0,B_0x1" bitfld.long 0x1C 11. "VLDF235,Valid flag for shadow register 235" "B_0x0,B_0x1" newline bitfld.long 0x1C 10. "VLDF234,Valid flag for shadow register 234" "B_0x0,B_0x1" bitfld.long 0x1C 9. "VLDF233,Valid flag for shadow register 233" "B_0x0,B_0x1" bitfld.long 0x1C 8. "VLDF232,Valid flag for shadow register 232" "B_0x0,B_0x1" bitfld.long 0x1C 7. "VLDF231,Valid flag for shadow register 231" "B_0x0,B_0x1" bitfld.long 0x1C 6. "VLDF230,Valid flag for shadow register 230" "B_0x0,B_0x1" bitfld.long 0x1C 5. "VLDF229,Valid flag for shadow register 229" "B_0x0,B_0x1" bitfld.long 0x1C 4. "VLDF228,Valid flag for shadow register 228" "B_0x0,B_0x1" newline bitfld.long 0x1C 3. "VLDF227,Valid flag for shadow register 227" "B_0x0,B_0x1" bitfld.long 0x1C 2. "VLDF226,Valid flag for shadow register 226" "B_0x0,B_0x1" bitfld.long 0x1C 1. "VLDF225,Valid flag for shadow register 225" "B_0x0,B_0x1" bitfld.long 0x1C 0. "VLDF224,Valid flag for shadow register 224" "B_0x0,B_0x1" line.long 0x20 "BSEC_OTPVLDR8,BSEC OTP valid register 8" bitfld.long 0x20 31. "VLDF287,Valid flag for shadow register 287" "B_0x0,B_0x1" bitfld.long 0x20 30. "VLDF286,Valid flag for shadow register 286" "B_0x0,B_0x1" bitfld.long 0x20 29. "VLDF285,Valid flag for shadow register 285" "B_0x0,B_0x1" bitfld.long 0x20 28. "VLDF284,Valid flag for shadow register 284" "B_0x0,B_0x1" bitfld.long 0x20 27. "VLDF283,Valid flag for shadow register 283" "B_0x0,B_0x1" bitfld.long 0x20 26. "VLDF282,Valid flag for shadow register 282" "B_0x0,B_0x1" bitfld.long 0x20 25. "VLDF281,Valid flag for shadow register 281" "B_0x0,B_0x1" newline bitfld.long 0x20 24. "VLDF280,Valid flag for shadow register 280" "B_0x0,B_0x1" bitfld.long 0x20 23. "VLDF279,Valid flag for shadow register 279" "B_0x0,B_0x1" bitfld.long 0x20 22. "VLDF278,Valid flag for shadow register 278" "B_0x0,B_0x1" bitfld.long 0x20 21. "VLDF277,Valid flag for shadow register 277" "B_0x0,B_0x1" bitfld.long 0x20 20. "VLDF276,Valid flag for shadow register 276" "B_0x0,B_0x1" bitfld.long 0x20 19. "VLDF275,Valid flag for shadow register 275" "B_0x0,B_0x1" bitfld.long 0x20 18. "VLDF274,Valid flag for shadow register 274" "B_0x0,B_0x1" newline bitfld.long 0x20 17. "VLDF273,Valid flag for shadow register 273" "B_0x0,B_0x1" bitfld.long 0x20 16. "VLDF272,Valid flag for shadow register 272" "B_0x0,B_0x1" bitfld.long 0x20 15. "VLDF271,Valid flag for shadow register 271" "B_0x0,B_0x1" bitfld.long 0x20 14. "VLDF270,Valid flag for shadow register 270" "B_0x0,B_0x1" bitfld.long 0x20 13. "VLDF269,Valid flag for shadow register 269" "B_0x0,B_0x1" bitfld.long 0x20 12. "VLDF268,Valid flag for shadow register 268" "B_0x0,B_0x1" bitfld.long 0x20 11. "VLDF267,Valid flag for shadow register 267" "B_0x0,B_0x1" newline bitfld.long 0x20 10. "VLDF266,Valid flag for shadow register 266" "B_0x0,B_0x1" bitfld.long 0x20 9. "VLDF265,Valid flag for shadow register 265" "B_0x0,B_0x1" bitfld.long 0x20 8. "VLDF264,Valid flag for shadow register 264" "B_0x0,B_0x1" bitfld.long 0x20 7. "VLDF263,Valid flag for shadow register 263" "B_0x0,B_0x1" bitfld.long 0x20 6. "VLDF262,Valid flag for shadow register 262" "B_0x0,B_0x1" bitfld.long 0x20 5. "VLDF261,Valid flag for shadow register 261" "B_0x0,B_0x1" bitfld.long 0x20 4. "VLDF260,Valid flag for shadow register 260" "B_0x0,B_0x1" newline bitfld.long 0x20 3. "VLDF259,Valid flag for shadow register 259" "B_0x0,B_0x1" bitfld.long 0x20 2. "VLDF258,Valid flag for shadow register 258" "B_0x0,B_0x1" bitfld.long 0x20 1. "VLDF257,Valid flag for shadow register 257" "B_0x0,B_0x1" bitfld.long 0x20 0. "VLDF256,Valid flag for shadow register 256" "B_0x0,B_0x1" line.long 0x24 "BSEC_OTPVLDR9,BSEC OTP valid register 9" bitfld.long 0x24 31. "VLDF319,Valid flag for shadow register 319" "B_0x0,B_0x1" bitfld.long 0x24 30. "VLDF318,Valid flag for shadow register 318" "B_0x0,B_0x1" bitfld.long 0x24 29. "VLDF317,Valid flag for shadow register 317" "B_0x0,B_0x1" bitfld.long 0x24 28. "VLDF316,Valid flag for shadow register 316" "B_0x0,B_0x1" bitfld.long 0x24 27. "VLDF315,Valid flag for shadow register 315" "B_0x0,B_0x1" bitfld.long 0x24 26. "VLDF314,Valid flag for shadow register 314" "B_0x0,B_0x1" bitfld.long 0x24 25. "VLDF313,Valid flag for shadow register 313" "B_0x0,B_0x1" newline bitfld.long 0x24 24. "VLDF312,Valid flag for shadow register 312" "B_0x0,B_0x1" bitfld.long 0x24 23. "VLDF311,Valid flag for shadow register 311" "B_0x0,B_0x1" bitfld.long 0x24 22. "VLDF310,Valid flag for shadow register 310" "B_0x0,B_0x1" bitfld.long 0x24 21. "VLDF309,Valid flag for shadow register 309" "B_0x0,B_0x1" bitfld.long 0x24 20. "VLDF308,Valid flag for shadow register 308" "B_0x0,B_0x1" bitfld.long 0x24 19. "VLDF307,Valid flag for shadow register 307" "B_0x0,B_0x1" bitfld.long 0x24 18. "VLDF306,Valid flag for shadow register 306" "B_0x0,B_0x1" newline bitfld.long 0x24 17. "VLDF305,Valid flag for shadow register 305" "B_0x0,B_0x1" bitfld.long 0x24 16. "VLDF304,Valid flag for shadow register 304" "B_0x0,B_0x1" bitfld.long 0x24 15. "VLDF303,Valid flag for shadow register 303" "B_0x0,B_0x1" bitfld.long 0x24 14. "VLDF302,Valid flag for shadow register 302" "B_0x0,B_0x1" bitfld.long 0x24 13. "VLDF301,Valid flag for shadow register 301" "B_0x0,B_0x1" bitfld.long 0x24 12. "VLDF300,Valid flag for shadow register 300" "B_0x0,B_0x1" bitfld.long 0x24 11. "VLDF299,Valid flag for shadow register 299" "B_0x0,B_0x1" newline bitfld.long 0x24 10. "VLDF298,Valid flag for shadow register 298" "B_0x0,B_0x1" bitfld.long 0x24 9. "VLDF297,Valid flag for shadow register 297" "B_0x0,B_0x1" bitfld.long 0x24 8. "VLDF296,Valid flag for shadow register 296" "B_0x0,B_0x1" bitfld.long 0x24 7. "VLDF295,Valid flag for shadow register 295" "B_0x0,B_0x1" bitfld.long 0x24 6. "VLDF294,Valid flag for shadow register 294" "B_0x0,B_0x1" bitfld.long 0x24 5. "VLDF293,Valid flag for shadow register 293" "B_0x0,B_0x1" bitfld.long 0x24 4. "VLDF292,Valid flag for shadow register 292" "B_0x0,B_0x1" newline bitfld.long 0x24 3. "VLDF291,Valid flag for shadow register 291" "B_0x0,B_0x1" bitfld.long 0x24 2. "VLDF290,Valid flag for shadow register 290" "B_0x0,B_0x1" bitfld.long 0x24 1. "VLDF289,Valid flag for shadow register 289" "B_0x0,B_0x1" bitfld.long 0x24 0. "VLDF288,Valid flag for shadow register 288" "B_0x0,B_0x1" line.long 0x28 "BSEC_OTPVLDR10,BSEC OTP valid register 10" bitfld.long 0x28 31. "VLDF351,Valid flag for shadow register 351" "B_0x0,B_0x1" bitfld.long 0x28 30. "VLDF350,Valid flag for shadow register 350" "B_0x0,B_0x1" bitfld.long 0x28 29. "VLDF349,Valid flag for shadow register 349" "B_0x0,B_0x1" bitfld.long 0x28 28. "VLDF348,Valid flag for shadow register 348" "B_0x0,B_0x1" bitfld.long 0x28 27. "VLDF347,Valid flag for shadow register 347" "B_0x0,B_0x1" bitfld.long 0x28 26. "VLDF346,Valid flag for shadow register 346" "B_0x0,B_0x1" bitfld.long 0x28 25. "VLDF345,Valid flag for shadow register 345" "B_0x0,B_0x1" newline bitfld.long 0x28 24. "VLDF344,Valid flag for shadow register 344" "B_0x0,B_0x1" bitfld.long 0x28 23. "VLDF343,Valid flag for shadow register 343" "B_0x0,B_0x1" bitfld.long 0x28 22. "VLDF342,Valid flag for shadow register 342" "B_0x0,B_0x1" bitfld.long 0x28 21. "VLDF341,Valid flag for shadow register 341" "B_0x0,B_0x1" bitfld.long 0x28 20. "VLDF340,Valid flag for shadow register 340" "B_0x0,B_0x1" bitfld.long 0x28 19. "VLDF339,Valid flag for shadow register 339" "B_0x0,B_0x1" bitfld.long 0x28 18. "VLDF338,Valid flag for shadow register 338" "B_0x0,B_0x1" newline bitfld.long 0x28 17. "VLDF337,Valid flag for shadow register 337" "B_0x0,B_0x1" bitfld.long 0x28 16. "VLDF336,Valid flag for shadow register 336" "B_0x0,B_0x1" bitfld.long 0x28 15. "VLDF335,Valid flag for shadow register 335" "B_0x0,B_0x1" bitfld.long 0x28 14. "VLDF334,Valid flag for shadow register 334" "B_0x0,B_0x1" bitfld.long 0x28 13. "VLDF333,Valid flag for shadow register 333" "B_0x0,B_0x1" bitfld.long 0x28 12. "VLDF332,Valid flag for shadow register 332" "B_0x0,B_0x1" bitfld.long 0x28 11. "VLDF331,Valid flag for shadow register 331" "B_0x0,B_0x1" newline bitfld.long 0x28 10. "VLDF330,Valid flag for shadow register 330" "B_0x0,B_0x1" bitfld.long 0x28 9. "VLDF329,Valid flag for shadow register 329" "B_0x0,B_0x1" bitfld.long 0x28 8. "VLDF328,Valid flag for shadow register 328" "B_0x0,B_0x1" bitfld.long 0x28 7. "VLDF327,Valid flag for shadow register 327" "B_0x0,B_0x1" bitfld.long 0x28 6. "VLDF326,Valid flag for shadow register 326" "B_0x0,B_0x1" bitfld.long 0x28 5. "VLDF325,Valid flag for shadow register 325" "B_0x0,B_0x1" bitfld.long 0x28 4. "VLDF324,Valid flag for shadow register 324" "B_0x0,B_0x1" newline bitfld.long 0x28 3. "VLDF323,Valid flag for shadow register 323" "B_0x0,B_0x1" bitfld.long 0x28 2. "VLDF322,Valid flag for shadow register 322" "B_0x0,B_0x1" bitfld.long 0x28 1. "VLDF321,Valid flag for shadow register 321" "B_0x0,B_0x1" bitfld.long 0x28 0. "VLDF320,Valid flag for shadow register 320" "B_0x0,B_0x1" line.long 0x2C "BSEC_OTPVLDR11,BSEC OTP valid register 11" bitfld.long 0x2C 31. "VLDF383,Valid flag for shadow register 383" "B_0x0,B_0x1" bitfld.long 0x2C 30. "VLDF382,Valid flag for shadow register 382" "B_0x0,B_0x1" bitfld.long 0x2C 29. "VLDF381,Valid flag for shadow register 381" "B_0x0,B_0x1" bitfld.long 0x2C 28. "VLDF380,Valid flag for shadow register 380" "B_0x0,B_0x1" bitfld.long 0x2C 27. "VLDF379,Valid flag for shadow register 379" "B_0x0,B_0x1" bitfld.long 0x2C 26. "VLDF378,Valid flag for shadow register 378" "B_0x0,B_0x1" bitfld.long 0x2C 25. "VLDF377,Valid flag for shadow register 377" "B_0x0,B_0x1" newline bitfld.long 0x2C 24. "VLDF376,Valid flag for shadow register 376" "B_0x0,B_0x1" bitfld.long 0x2C 23. "VLDF375,Valid flag for shadow register 375" "B_0x0,B_0x1" bitfld.long 0x2C 22. "VLDF374,Valid flag for shadow register 374" "B_0x0,B_0x1" bitfld.long 0x2C 21. "VLDF373,Valid flag for shadow register 373" "B_0x0,B_0x1" bitfld.long 0x2C 20. "VLDF372,Valid flag for shadow register 372" "B_0x0,B_0x1" bitfld.long 0x2C 19. "VLDF371,Valid flag for shadow register 371" "B_0x0,B_0x1" bitfld.long 0x2C 18. "VLDF370,Valid flag for shadow register 370" "B_0x0,B_0x1" newline bitfld.long 0x2C 17. "VLDF369,Valid flag for shadow register 369" "B_0x0,B_0x1" bitfld.long 0x2C 16. "VLDF368,Valid flag for shadow register 368" "B_0x0,B_0x1" bitfld.long 0x2C 15. "VLDF367,Valid flag for shadow register 367" "B_0x0,B_0x1" bitfld.long 0x2C 14. "VLDF366,Valid flag for shadow register 366" "B_0x0,B_0x1" bitfld.long 0x2C 13. "VLDF365,Valid flag for shadow register 365" "B_0x0,B_0x1" bitfld.long 0x2C 12. "VLDF364,Valid flag for shadow register 364" "B_0x0,B_0x1" bitfld.long 0x2C 11. "VLDF363,Valid flag for shadow register 363" "B_0x0,B_0x1" newline bitfld.long 0x2C 10. "VLDF362,Valid flag for shadow register 362" "B_0x0,B_0x1" bitfld.long 0x2C 9. "VLDF361,Valid flag for shadow register 361" "B_0x0,B_0x1" bitfld.long 0x2C 8. "VLDF360,Valid flag for shadow register 360" "B_0x0,B_0x1" bitfld.long 0x2C 7. "VLDF359,Valid flag for shadow register 359" "B_0x0,B_0x1" bitfld.long 0x2C 6. "VLDF358,Valid flag for shadow register 358" "B_0x0,B_0x1" bitfld.long 0x2C 5. "VLDF357,Valid flag for shadow register 357" "B_0x0,B_0x1" bitfld.long 0x2C 4. "VLDF356,Valid flag for shadow register 356" "B_0x0,B_0x1" newline bitfld.long 0x2C 3. "VLDF355,Valid flag for shadow register 355" "B_0x0,B_0x1" bitfld.long 0x2C 2. "VLDF354,Valid flag for shadow register 354" "B_0x0,B_0x1" bitfld.long 0x2C 1. "VLDF353,Valid flag for shadow register 353" "B_0x0,B_0x1" bitfld.long 0x2C 0. "VLDF352,Valid flag for shadow register 352" "B_0x0,B_0x1" rgroup.long 0x940++0x2F line.long 0x0 "BSEC_SFSR0,BSEC shadowed fuses status register 0" bitfld.long 0x0 31. "SFW31,Shadowed fuse word 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "SFW30,Shadowed fuse word 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "SFW29,Shadowed fuse word 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "SFW28,Shadowed fuse word 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "SFW27,Shadowed fuse word 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "SFW26,Shadowed fuse word 26" "B_0x0,B_0x1" bitfld.long 0x0 25. "SFW25,Shadowed fuse word 25" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "SFW24,Shadowed fuse word 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "SFW23,Shadowed fuse word 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "SFW22,Shadowed fuse word 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "SFW21,Shadowed fuse word 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "SFW20,Shadowed fuse word 20" "B_0x0,B_0x1" bitfld.long 0x0 19. "SFW19,Shadowed fuse word 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "SFW18,Shadowed fuse word 18" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "SFW17,Shadowed fuse word 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "SFW16,Shadowed fuse word 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "SFW15,Shadowed fuse word 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "SFW14,Shadowed fuse word 14" "B_0x0,B_0x1" bitfld.long 0x0 13. "SFW13,Shadowed fuse word 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "SFW12,Shadowed fuse word 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "SFW11,Shadowed fuse word 11" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "SFW10,Shadowed fuse word 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "SFW9,Shadowed fuse word 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "SFW8,Shadowed fuse word 8" "B_0x0,B_0x1" bitfld.long 0x0 7. "SFW7,Shadowed fuse word 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "SFW6,Shadowed fuse word 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "SFW5,Shadowed fuse word 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "SFW4,Shadowed fuse word 4" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SFW3,Shadowed fuse word 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "SFW2,Shadowed fuse word 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "SFW1,Shadowed fuse word 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "SFW0,Shadowed fuse word 0" "B_0x0,B_0x1" line.long 0x4 "BSEC_SFSR1,BSEC shadowed fuses status register 1" bitfld.long 0x4 31. "SFW63,Shadowed fuse word 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "SFW62,Shadowed fuse word 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "SFW61,Shadowed fuse word 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "SFW60,Shadowed fuse word 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "SFW59,Shadowed fuse word 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "SFW58,Shadowed fuse word 58" "B_0x0,B_0x1" bitfld.long 0x4 25. "SFW57,Shadowed fuse word 57" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "SFW56,Shadowed fuse word 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "SFW55,Shadowed fuse word 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "SFW54,Shadowed fuse word 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "SFW53,Shadowed fuse word 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "SFW52,Shadowed fuse word 52" "B_0x0,B_0x1" bitfld.long 0x4 19. "SFW51,Shadowed fuse word 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "SFW50,Shadowed fuse word 50" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "SFW49,Shadowed fuse word 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "SFW48,Shadowed fuse word 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "SFW47,Shadowed fuse word 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "SFW46,Shadowed fuse word 46" "B_0x0,B_0x1" bitfld.long 0x4 13. "SFW45,Shadowed fuse word 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "SFW44,Shadowed fuse word 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "SFW43,Shadowed fuse word 43" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "SFW42,Shadowed fuse word 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "SFW41,Shadowed fuse word 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "SFW40,Shadowed fuse word 40" "B_0x0,B_0x1" bitfld.long 0x4 7. "SFW39,Shadowed fuse word 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "SFW38,Shadowed fuse word 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "SFW37,Shadowed fuse word 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "SFW36,Shadowed fuse word 36" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "SFW35,Shadowed fuse word 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "SFW34,Shadowed fuse word 34" "B_0x0,B_0x1" bitfld.long 0x4 1. "SFW33,Shadowed fuse word 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "SFW32,Shadowed fuse word 32" "B_0x0,B_0x1" line.long 0x8 "BSEC_SFSR2,BSEC shadowed fuses status register 2" bitfld.long 0x8 31. "SFW95,Shadowed fuse word 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "SFW94,Shadowed fuse word 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "SFW93,Shadowed fuse word 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "SFW92,Shadowed fuse word 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "SFW91,Shadowed fuse word 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "SFW90,Shadowed fuse word 90" "B_0x0,B_0x1" bitfld.long 0x8 25. "SFW89,Shadowed fuse word 89" "B_0x0,B_0x1" newline bitfld.long 0x8 24. "SFW88,Shadowed fuse word 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "SFW87,Shadowed fuse word 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "SFW86,Shadowed fuse word 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "SFW85,Shadowed fuse word 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "SFW84,Shadowed fuse word 84" "B_0x0,B_0x1" bitfld.long 0x8 19. "SFW83,Shadowed fuse word 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "SFW82,Shadowed fuse word 82" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "SFW81,Shadowed fuse word 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "SFW80,Shadowed fuse word 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "SFW79,Shadowed fuse word 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "SFW78,Shadowed fuse word 78" "B_0x0,B_0x1" bitfld.long 0x8 13. "SFW77,Shadowed fuse word 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "SFW76,Shadowed fuse word 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "SFW75,Shadowed fuse word 75" "B_0x0,B_0x1" newline bitfld.long 0x8 10. "SFW74,Shadowed fuse word 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "SFW73,Shadowed fuse word 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "SFW72,Shadowed fuse word 72" "B_0x0,B_0x1" bitfld.long 0x8 7. "SFW71,Shadowed fuse word 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "SFW70,Shadowed fuse word 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "SFW69,Shadowed fuse word 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "SFW68,Shadowed fuse word 68" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "SFW67,Shadowed fuse word 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "SFW66,Shadowed fuse word 66" "B_0x0,B_0x1" bitfld.long 0x8 1. "SFW65,Shadowed fuse word 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "SFW64,Shadowed fuse word 64" "B_0x0,B_0x1" line.long 0xC "BSEC_SFSR3,BSEC shadowed fuses status register 3" bitfld.long 0xC 31. "SFW127,Shadowed fuse word 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "SFW126,Shadowed fuse word 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "SFW125,Shadowed fuse word 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "SFW124,Shadowed fuse word 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "SFW123,Shadowed fuse word 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "SFW122,Shadowed fuse word 122" "B_0x0,B_0x1" bitfld.long 0xC 25. "SFW121,Shadowed fuse word 121" "B_0x0,B_0x1" newline bitfld.long 0xC 24. "SFW120,Shadowed fuse word 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "SFW119,Shadowed fuse word 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "SFW118,Shadowed fuse word 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "SFW117,Shadowed fuse word 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "SFW116,Shadowed fuse word 116" "B_0x0,B_0x1" bitfld.long 0xC 19. "SFW115,Shadowed fuse word 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "SFW114,Shadowed fuse word 114" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "SFW113,Shadowed fuse word 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "SFW112,Shadowed fuse word 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "SFW111,Shadowed fuse word 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "SFW110,Shadowed fuse word 110" "B_0x0,B_0x1" bitfld.long 0xC 13. "SFW109,Shadowed fuse word 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "SFW108,Shadowed fuse word 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "SFW107,Shadowed fuse word 107" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "SFW106,Shadowed fuse word 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "SFW105,Shadowed fuse word 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "SFW104,Shadowed fuse word 104" "B_0x0,B_0x1" bitfld.long 0xC 7. "SFW103,Shadowed fuse word 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "SFW102,Shadowed fuse word 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "SFW101,Shadowed fuse word 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "SFW100,Shadowed fuse word 100" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "SFW99,Shadowed fuse word 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "SFW98,Shadowed fuse word 98" "B_0x0,B_0x1" bitfld.long 0xC 1. "SFW97,Shadowed fuse word 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "SFW96,Shadowed fuse word 96" "B_0x0,B_0x1" line.long 0x10 "BSEC_SFSR4,BSEC shadowed fuses status register 4" bitfld.long 0x10 31. "SFW159,Shadowed fuse word 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "SFW158,Shadowed fuse word 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "SFW157,Shadowed fuse word 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "SFW156,Shadowed fuse word 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "SFW155,Shadowed fuse word 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "SFW154,Shadowed fuse word 154" "B_0x0,B_0x1" bitfld.long 0x10 25. "SFW153,Shadowed fuse word 153" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "SFW152,Shadowed fuse word 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "SFW151,Shadowed fuse word 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "SFW150,Shadowed fuse word 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "SFW149,Shadowed fuse word 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "SFW148,Shadowed fuse word 148" "B_0x0,B_0x1" bitfld.long 0x10 19. "SFW147,Shadowed fuse word 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "SFW146,Shadowed fuse word 146" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "SFW145,Shadowed fuse word 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "SFW144,Shadowed fuse word 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "SFW143,Shadowed fuse word 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "SFW142,Shadowed fuse word 142" "B_0x0,B_0x1" bitfld.long 0x10 13. "SFW141,Shadowed fuse word 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "SFW140,Shadowed fuse word 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "SFW139,Shadowed fuse word 139" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "SFW138,Shadowed fuse word 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "SFW137,Shadowed fuse word 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "SFW136,Shadowed fuse word 136" "B_0x0,B_0x1" bitfld.long 0x10 7. "SFW135,Shadowed fuse word 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "SFW134,Shadowed fuse word 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "SFW133,Shadowed fuse word 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "SFW132,Shadowed fuse word 132" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "SFW131,Shadowed fuse word 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "SFW130,Shadowed fuse word 130" "B_0x0,B_0x1" bitfld.long 0x10 1. "SFW129,Shadowed fuse word 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "SFW128,Shadowed fuse word 128" "B_0x0,B_0x1" line.long 0x14 "BSEC_SFSR5,BSEC shadowed fuses status register 5" bitfld.long 0x14 31. "SFW191,Shadowed fuse word 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "SFW190,Shadowed fuse word 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "SFW189,Shadowed fuse word 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "SFW188,Shadowed fuse word 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "SFW187,Shadowed fuse word 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "SFW186,Shadowed fuse word 186" "B_0x0,B_0x1" bitfld.long 0x14 25. "SFW185,Shadowed fuse word 185" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "SFW184,Shadowed fuse word 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "SFW183,Shadowed fuse word 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "SFW182,Shadowed fuse word 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "SFW181,Shadowed fuse word 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "SFW180,Shadowed fuse word 180" "B_0x0,B_0x1" bitfld.long 0x14 19. "SFW179,Shadowed fuse word 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "SFW178,Shadowed fuse word 178" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "SFW177,Shadowed fuse word 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "SFW176,Shadowed fuse word 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "SFW175,Shadowed fuse word 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "SFW174,Shadowed fuse word 174" "B_0x0,B_0x1" bitfld.long 0x14 13. "SFW173,Shadowed fuse word 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "SFW172,Shadowed fuse word 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "SFW171,Shadowed fuse word 171" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "SFW170,Shadowed fuse word 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "SFW169,Shadowed fuse word 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "SFW168,Shadowed fuse word 168" "B_0x0,B_0x1" bitfld.long 0x14 7. "SFW167,Shadowed fuse word 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "SFW166,Shadowed fuse word 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "SFW165,Shadowed fuse word 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "SFW164,Shadowed fuse word 164" "B_0x0,B_0x1" newline bitfld.long 0x14 3. "SFW163,Shadowed fuse word 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "SFW162,Shadowed fuse word 162" "B_0x0,B_0x1" bitfld.long 0x14 1. "SFW161,Shadowed fuse word 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "SFW160,Shadowed fuse word 160" "B_0x0,B_0x1" line.long 0x18 "BSEC_SFSR6,BSEC shadowed fuses status register 6" bitfld.long 0x18 31. "SFW223,Shadowed fuse word 223" "B_0x0,B_0x1" bitfld.long 0x18 30. "SFW222,Shadowed fuse word 222" "B_0x0,B_0x1" bitfld.long 0x18 29. "SFW221,Shadowed fuse word 221" "B_0x0,B_0x1" bitfld.long 0x18 28. "SFW220,Shadowed fuse word 220" "B_0x0,B_0x1" bitfld.long 0x18 27. "SFW219,Shadowed fuse word 219" "B_0x0,B_0x1" bitfld.long 0x18 26. "SFW218,Shadowed fuse word 218" "B_0x0,B_0x1" bitfld.long 0x18 25. "SFW217,Shadowed fuse word 217" "B_0x0,B_0x1" newline bitfld.long 0x18 24. "SFW216,Shadowed fuse word 216" "B_0x0,B_0x1" bitfld.long 0x18 23. "SFW215,Shadowed fuse word 215" "B_0x0,B_0x1" bitfld.long 0x18 22. "SFW214,Shadowed fuse word 214" "B_0x0,B_0x1" bitfld.long 0x18 21. "SFW213,Shadowed fuse word 213" "B_0x0,B_0x1" bitfld.long 0x18 20. "SFW212,Shadowed fuse word 212" "B_0x0,B_0x1" bitfld.long 0x18 19. "SFW211,Shadowed fuse word 211" "B_0x0,B_0x1" bitfld.long 0x18 18. "SFW210,Shadowed fuse word 210" "B_0x0,B_0x1" newline bitfld.long 0x18 17. "SFW209,Shadowed fuse word 209" "B_0x0,B_0x1" bitfld.long 0x18 16. "SFW208,Shadowed fuse word 208" "B_0x0,B_0x1" bitfld.long 0x18 15. "SFW207,Shadowed fuse word 207" "B_0x0,B_0x1" bitfld.long 0x18 14. "SFW206,Shadowed fuse word 206" "B_0x0,B_0x1" bitfld.long 0x18 13. "SFW205,Shadowed fuse word 205" "B_0x0,B_0x1" bitfld.long 0x18 12. "SFW204,Shadowed fuse word 204" "B_0x0,B_0x1" bitfld.long 0x18 11. "SFW203,Shadowed fuse word 203" "B_0x0,B_0x1" newline bitfld.long 0x18 10. "SFW202,Shadowed fuse word 202" "B_0x0,B_0x1" bitfld.long 0x18 9. "SFW201,Shadowed fuse word 201" "B_0x0,B_0x1" bitfld.long 0x18 8. "SFW200,Shadowed fuse word 200" "B_0x0,B_0x1" bitfld.long 0x18 7. "SFW199,Shadowed fuse word 199" "B_0x0,B_0x1" bitfld.long 0x18 6. "SFW198,Shadowed fuse word 198" "B_0x0,B_0x1" bitfld.long 0x18 5. "SFW197,Shadowed fuse word 197" "B_0x0,B_0x1" bitfld.long 0x18 4. "SFW196,Shadowed fuse word 196" "B_0x0,B_0x1" newline bitfld.long 0x18 3. "SFW195,Shadowed fuse word 195" "B_0x0,B_0x1" bitfld.long 0x18 2. "SFW194,Shadowed fuse word 194" "B_0x0,B_0x1" bitfld.long 0x18 1. "SFW193,Shadowed fuse word 193" "B_0x0,B_0x1" bitfld.long 0x18 0. "SFW192,Shadowed fuse word 192" "B_0x0,B_0x1" line.long 0x1C "BSEC_SFSR7,BSEC shadowed fuses status register 7" bitfld.long 0x1C 31. "SFW255,Shadowed fuse word 255" "B_0x0,B_0x1" bitfld.long 0x1C 30. "SFW254,Shadowed fuse word 254" "B_0x0,B_0x1" bitfld.long 0x1C 29. "SFW253,Shadowed fuse word 253" "B_0x0,B_0x1" bitfld.long 0x1C 28. "SFW252,Shadowed fuse word 252" "B_0x0,B_0x1" bitfld.long 0x1C 27. "SFW251,Shadowed fuse word 251" "B_0x0,B_0x1" bitfld.long 0x1C 26. "SFW250,Shadowed fuse word 250" "B_0x0,B_0x1" bitfld.long 0x1C 25. "SFW249,Shadowed fuse word 249" "B_0x0,B_0x1" newline bitfld.long 0x1C 24. "SFW248,Shadowed fuse word 248" "B_0x0,B_0x1" bitfld.long 0x1C 23. "SFW247,Shadowed fuse word 247" "B_0x0,B_0x1" bitfld.long 0x1C 22. "SFW246,Shadowed fuse word 246" "B_0x0,B_0x1" bitfld.long 0x1C 21. "SFW245,Shadowed fuse word 245" "B_0x0,B_0x1" bitfld.long 0x1C 20. "SFW244,Shadowed fuse word 244" "B_0x0,B_0x1" bitfld.long 0x1C 19. "SFW243,Shadowed fuse word 243" "B_0x0,B_0x1" bitfld.long 0x1C 18. "SFW242,Shadowed fuse word 242" "B_0x0,B_0x1" newline bitfld.long 0x1C 17. "SFW241,Shadowed fuse word 241" "B_0x0,B_0x1" bitfld.long 0x1C 16. "SFW240,Shadowed fuse word 240" "B_0x0,B_0x1" bitfld.long 0x1C 15. "SFW239,Shadowed fuse word 239" "B_0x0,B_0x1" bitfld.long 0x1C 14. "SFW238,Shadowed fuse word 238" "B_0x0,B_0x1" bitfld.long 0x1C 13. "SFW237,Shadowed fuse word 237" "B_0x0,B_0x1" bitfld.long 0x1C 12. "SFW236,Shadowed fuse word 236" "B_0x0,B_0x1" bitfld.long 0x1C 11. "SFW235,Shadowed fuse word 235" "B_0x0,B_0x1" newline bitfld.long 0x1C 10. "SFW234,Shadowed fuse word 234" "B_0x0,B_0x1" bitfld.long 0x1C 9. "SFW233,Shadowed fuse word 233" "B_0x0,B_0x1" bitfld.long 0x1C 8. "SFW232,Shadowed fuse word 232" "B_0x0,B_0x1" bitfld.long 0x1C 7. "SFW231,Shadowed fuse word 231" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SFW230,Shadowed fuse word 230" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SFW229,Shadowed fuse word 229" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SFW228,Shadowed fuse word 228" "B_0x0,B_0x1" newline bitfld.long 0x1C 3. "SFW227,Shadowed fuse word 227" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SFW226,Shadowed fuse word 226" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SFW225,Shadowed fuse word 225" "B_0x0,B_0x1" bitfld.long 0x1C 0. "SFW224,Shadowed fuse word 224" "B_0x0,B_0x1" line.long 0x20 "BSEC_SFSR8,BSEC shadowed fuses status register 8" bitfld.long 0x20 31. "SFW287,Shadowed fuse word 287" "B_0x0,B_0x1" bitfld.long 0x20 30. "SFW286,Shadowed fuse word 286" "B_0x0,B_0x1" bitfld.long 0x20 29. "SFW285,Shadowed fuse word 285" "B_0x0,B_0x1" bitfld.long 0x20 28. "SFW284,Shadowed fuse word 284" "B_0x0,B_0x1" bitfld.long 0x20 27. "SFW283,Shadowed fuse word 283" "B_0x0,B_0x1" bitfld.long 0x20 26. "SFW282,Shadowed fuse word 282" "B_0x0,B_0x1" bitfld.long 0x20 25. "SFW281,Shadowed fuse word 281" "B_0x0,B_0x1" newline bitfld.long 0x20 24. "SFW280,Shadowed fuse word 280" "B_0x0,B_0x1" bitfld.long 0x20 23. "SFW279,Shadowed fuse word 279" "B_0x0,B_0x1" bitfld.long 0x20 22. "SFW278,Shadowed fuse word 278" "B_0x0,B_0x1" bitfld.long 0x20 21. "SFW277,Shadowed fuse word 277" "B_0x0,B_0x1" bitfld.long 0x20 20. "SFW276,Shadowed fuse word 276" "B_0x0,B_0x1" bitfld.long 0x20 19. "SFW275,Shadowed fuse word 275" "B_0x0,B_0x1" bitfld.long 0x20 18. "SFW274,Shadowed fuse word 274" "B_0x0,B_0x1" newline bitfld.long 0x20 17. "SFW273,Shadowed fuse word 273" "B_0x0,B_0x1" bitfld.long 0x20 16. "SFW272,Shadowed fuse word 272" "B_0x0,B_0x1" bitfld.long 0x20 15. "SFW271,Shadowed fuse word 271" "B_0x0,B_0x1" bitfld.long 0x20 14. "SFW270,Shadowed fuse word 270" "B_0x0,B_0x1" bitfld.long 0x20 13. "SFW269,Shadowed fuse word 269" "B_0x0,B_0x1" bitfld.long 0x20 12. "SFW268,Shadowed fuse word 268" "B_0x0,B_0x1" bitfld.long 0x20 11. "SFW267,Shadowed fuse word 267" "B_0x0,B_0x1" newline bitfld.long 0x20 10. "SFW266,Shadowed fuse word 266" "B_0x0,B_0x1" bitfld.long 0x20 9. "SFW265,Shadowed fuse word 265" "B_0x0,B_0x1" bitfld.long 0x20 8. "SFW264,Shadowed fuse word 264" "B_0x0,B_0x1" bitfld.long 0x20 7. "SFW263,Shadowed fuse word 263" "B_0x0,B_0x1" bitfld.long 0x20 6. "SFW262,Shadowed fuse word 262" "B_0x0,B_0x1" bitfld.long 0x20 5. "SFW261,Shadowed fuse word 261" "B_0x0,B_0x1" bitfld.long 0x20 4. "SFW260,Shadowed fuse word 260" "B_0x0,B_0x1" newline bitfld.long 0x20 3. "SFW259,Shadowed fuse word 259" "B_0x0,B_0x1" bitfld.long 0x20 2. "SFW258,Shadowed fuse word 258" "B_0x0,B_0x1" bitfld.long 0x20 1. "SFW257,Shadowed fuse word 257" "B_0x0,B_0x1" bitfld.long 0x20 0. "SFW256,Shadowed fuse word 256" "B_0x0,B_0x1" line.long 0x24 "BSEC_SFSR9,BSEC shadowed fuses status register 9" bitfld.long 0x24 31. "SFW319,Shadowed fuse word 319" "B_0x0,B_0x1" bitfld.long 0x24 30. "SFW318,Shadowed fuse word 318" "B_0x0,B_0x1" bitfld.long 0x24 29. "SFW317,Shadowed fuse word 317" "B_0x0,B_0x1" bitfld.long 0x24 28. "SFW316,Shadowed fuse word 316" "B_0x0,B_0x1" bitfld.long 0x24 27. "SFW315,Shadowed fuse word 315" "B_0x0,B_0x1" bitfld.long 0x24 26. "SFW314,Shadowed fuse word 314" "B_0x0,B_0x1" bitfld.long 0x24 25. "SFW313,Shadowed fuse word 313" "B_0x0,B_0x1" newline bitfld.long 0x24 24. "SFW312,Shadowed fuse word 312" "B_0x0,B_0x1" bitfld.long 0x24 23. "SFW311,Shadowed fuse word 311" "B_0x0,B_0x1" bitfld.long 0x24 22. "SFW310,Shadowed fuse word 310" "B_0x0,B_0x1" bitfld.long 0x24 21. "SFW309,Shadowed fuse word 309" "B_0x0,B_0x1" bitfld.long 0x24 20. "SFW308,Shadowed fuse word 308" "B_0x0,B_0x1" bitfld.long 0x24 19. "SFW307,Shadowed fuse word 307" "B_0x0,B_0x1" bitfld.long 0x24 18. "SFW306,Shadowed fuse word 306" "B_0x0,B_0x1" newline bitfld.long 0x24 17. "SFW305,Shadowed fuse word 305" "B_0x0,B_0x1" bitfld.long 0x24 16. "SFW304,Shadowed fuse word 304" "B_0x0,B_0x1" bitfld.long 0x24 15. "SFW303,Shadowed fuse word 303" "B_0x0,B_0x1" bitfld.long 0x24 14. "SFW302,Shadowed fuse word 302" "B_0x0,B_0x1" bitfld.long 0x24 13. "SFW301,Shadowed fuse word 301" "B_0x0,B_0x1" bitfld.long 0x24 12. "SFW300,Shadowed fuse word 300" "B_0x0,B_0x1" bitfld.long 0x24 11. "SFW299,Shadowed fuse word 299" "B_0x0,B_0x1" newline bitfld.long 0x24 10. "SFW298,Shadowed fuse word 298" "B_0x0,B_0x1" bitfld.long 0x24 9. "SFW297,Shadowed fuse word 297" "B_0x0,B_0x1" bitfld.long 0x24 8. "SFW296,Shadowed fuse word 296" "B_0x0,B_0x1" bitfld.long 0x24 7. "SFW295,Shadowed fuse word 295" "B_0x0,B_0x1" bitfld.long 0x24 6. "SFW294,Shadowed fuse word 294" "B_0x0,B_0x1" bitfld.long 0x24 5. "SFW293,Shadowed fuse word 293" "B_0x0,B_0x1" bitfld.long 0x24 4. "SFW292,Shadowed fuse word 292" "B_0x0,B_0x1" newline bitfld.long 0x24 3. "SFW291,Shadowed fuse word 291" "B_0x0,B_0x1" bitfld.long 0x24 2. "SFW290,Shadowed fuse word 290" "B_0x0,B_0x1" bitfld.long 0x24 1. "SFW289,Shadowed fuse word 289" "B_0x0,B_0x1" bitfld.long 0x24 0. "SFW288,Shadowed fuse word 288" "B_0x0,B_0x1" line.long 0x28 "BSEC_SFSR10,BSEC shadowed fuses status register 10" bitfld.long 0x28 31. "SFW351,Shadowed fuse word 351" "B_0x0,B_0x1" bitfld.long 0x28 30. "SFW350,Shadowed fuse word 350" "B_0x0,B_0x1" bitfld.long 0x28 29. "SFW349,Shadowed fuse word 349" "B_0x0,B_0x1" bitfld.long 0x28 28. "SFW348,Shadowed fuse word 348" "B_0x0,B_0x1" bitfld.long 0x28 27. "SFW347,Shadowed fuse word 347" "B_0x0,B_0x1" bitfld.long 0x28 26. "SFW346,Shadowed fuse word 346" "B_0x0,B_0x1" bitfld.long 0x28 25. "SFW345,Shadowed fuse word 345" "B_0x0,B_0x1" newline bitfld.long 0x28 24. "SFW344,Shadowed fuse word 344" "B_0x0,B_0x1" bitfld.long 0x28 23. "SFW343,Shadowed fuse word 343" "B_0x0,B_0x1" bitfld.long 0x28 22. "SFW342,Shadowed fuse word 342" "B_0x0,B_0x1" bitfld.long 0x28 21. "SFW341,Shadowed fuse word 341" "B_0x0,B_0x1" bitfld.long 0x28 20. "SFW340,Shadowed fuse word 340" "B_0x0,B_0x1" bitfld.long 0x28 19. "SFW339,Shadowed fuse word 339" "B_0x0,B_0x1" bitfld.long 0x28 18. "SFW338,Shadowed fuse word 338" "B_0x0,B_0x1" newline bitfld.long 0x28 17. "SFW337,Shadowed fuse word 337" "B_0x0,B_0x1" bitfld.long 0x28 16. "SFW336,Shadowed fuse word 336" "B_0x0,B_0x1" bitfld.long 0x28 15. "SFW335,Shadowed fuse word 335" "B_0x0,B_0x1" bitfld.long 0x28 14. "SFW334,Shadowed fuse word 334" "B_0x0,B_0x1" bitfld.long 0x28 13. "SFW333,Shadowed fuse word 333" "B_0x0,B_0x1" bitfld.long 0x28 12. "SFW332,Shadowed fuse word 332" "B_0x0,B_0x1" bitfld.long 0x28 11. "SFW331,Shadowed fuse word 331" "B_0x0,B_0x1" newline bitfld.long 0x28 10. "SFW330,Shadowed fuse word 330" "B_0x0,B_0x1" bitfld.long 0x28 9. "SFW329,Shadowed fuse word 329" "B_0x0,B_0x1" bitfld.long 0x28 8. "SFW328,Shadowed fuse word 328" "B_0x0,B_0x1" bitfld.long 0x28 7. "SFW327,Shadowed fuse word 327" "B_0x0,B_0x1" bitfld.long 0x28 6. "SFW326,Shadowed fuse word 326" "B_0x0,B_0x1" bitfld.long 0x28 5. "SFW325,Shadowed fuse word 325" "B_0x0,B_0x1" bitfld.long 0x28 4. "SFW324,Shadowed fuse word 324" "B_0x0,B_0x1" newline bitfld.long 0x28 3. "SFW323,Shadowed fuse word 323" "B_0x0,B_0x1" bitfld.long 0x28 2. "SFW322,Shadowed fuse word 322" "B_0x0,B_0x1" bitfld.long 0x28 1. "SFW321,Shadowed fuse word 321" "B_0x0,B_0x1" bitfld.long 0x28 0. "SFW320,Shadowed fuse word 320" "B_0x0,B_0x1" line.long 0x2C "BSEC_SFSR11,BSEC shadowed fuses status register 11" bitfld.long 0x2C 31. "SFW383,Shadowed fuse word 383" "B_0x0,B_0x1" bitfld.long 0x2C 30. "SFW382,Shadowed fuse word 382" "B_0x0,B_0x1" bitfld.long 0x2C 29. "SFW381,Shadowed fuse word 381" "B_0x0,B_0x1" bitfld.long 0x2C 28. "SFW380,Shadowed fuse word 380" "B_0x0,B_0x1" bitfld.long 0x2C 27. "SFW379,Shadowed fuse word 379" "B_0x0,B_0x1" bitfld.long 0x2C 26. "SFW378,Shadowed fuse word 378" "B_0x0,B_0x1" bitfld.long 0x2C 25. "SFW377,Shadowed fuse word 377" "B_0x0,B_0x1" newline bitfld.long 0x2C 24. "SFW376,Shadowed fuse word 376" "B_0x0,B_0x1" bitfld.long 0x2C 23. "SFW375,Shadowed fuse word 375" "B_0x0,B_0x1" bitfld.long 0x2C 22. "SFW374,Shadowed fuse word 374" "B_0x0,B_0x1" bitfld.long 0x2C 21. "SFW373,Shadowed fuse word 373" "B_0x0,B_0x1" bitfld.long 0x2C 20. "SFW372,Shadowed fuse word 372" "B_0x0,B_0x1" bitfld.long 0x2C 19. "SFW371,Shadowed fuse word 371" "B_0x0,B_0x1" bitfld.long 0x2C 18. "SFW370,Shadowed fuse word 370" "B_0x0,B_0x1" newline bitfld.long 0x2C 17. "SFW369,Shadowed fuse word 369" "B_0x0,B_0x1" bitfld.long 0x2C 16. "SFW368,Shadowed fuse word 368" "B_0x0,B_0x1" bitfld.long 0x2C 15. "SFW367,Shadowed fuse word 367" "B_0x0,B_0x1" bitfld.long 0x2C 14. "SFW366,Shadowed fuse word 366" "B_0x0,B_0x1" bitfld.long 0x2C 13. "SFW365,Shadowed fuse word 365" "B_0x0,B_0x1" bitfld.long 0x2C 12. "SFW364,Shadowed fuse word 364" "B_0x0,B_0x1" bitfld.long 0x2C 11. "SFW363,Shadowed fuse word 363" "B_0x0,B_0x1" newline bitfld.long 0x2C 10. "SFW362,Shadowed fuse word 362" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SFW361,Shadowed fuse word 361" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SFW360,Shadowed fuse word 360" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SFW359,Shadowed fuse word 359" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SFW358,Shadowed fuse word 358" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SFW357,Shadowed fuse word 357" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SFW356,Shadowed fuse word 356" "B_0x0,B_0x1" newline bitfld.long 0x2C 3. "SFW355,Shadowed fuse word 355" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SFW354,Shadowed fuse word 354" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SFW353,Shadowed fuse word 353" "B_0x0,B_0x1" bitfld.long 0x2C 0. "SFW352,Shadowed fuse word 352" "B_0x0,B_0x1" group.long 0xC04++0x3 line.long 0x0 "BSEC_OTPCR,BSEC OTP control register" rbitfld.long 0x0 19.--21. "LASTCID,Last CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 14. "PPLOCK,Permanent programming lock" "B_0x0,B_0x1" bitfld.long 0x0 13. "PROG,Fuse word programming" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--8. 1. "ADDR,Fuse word address" wgroup.long 0xC08++0x3 line.long 0x0 "BSEC_WDR,BSEC write data register" hexmask.long 0x0 0.--31. 1. "WRDATA,OTP write data" group.long 0xE00++0x13 line.long 0x0 "BSEC_SCRATCHR0,BSEC scratch register 0" hexmask.long 0x0 0.--31. 1. "SDATA,Scratch data" line.long 0x4 "BSEC_SCRATCHR1,BSEC scratch register 1" hexmask.long 0x4 0.--31. 1. "SDATA,Scratch data" line.long 0x8 "BSEC_SCRATCHR2,BSEC scratch register 2" hexmask.long 0x8 0.--31. 1. "SDATA,Scratch data" line.long 0xC "BSEC_SCRATCHR3,BSEC scratch register 3" hexmask.long 0xC 0.--31. 1. "SDATA,Scratch data" line.long 0x10 "BSEC_LOCKR,BSEC lock register" bitfld.long 0x10 2. "HKLOCK,Hardware key lock" "B_0x0,B_0x1" bitfld.long 0x10 1. "DENLOCK,Debug enable register sticky lock" "B_0x0,B_0x1" bitfld.long 0x10 0. "GWLOCK,Global write lock" "B_0x0,B_0x1" rgroup.long 0xE14++0x3 line.long 0x0 "BSEC_JTAGINR,BSEC JTAG input register" hexmask.long 0x0 0.--31. 1. "JDATAIN,JTAG input data" wgroup.long 0xE18++0x3 line.long 0x0 "BSEC_JTAGOUTR,BSEC JTAG output register" hexmask.long 0x0 0.--31. 1. "JDATAOUT,JTAG output data" group.long 0xE20++0x7 line.long 0x0 "BSEC_DENR,BSEC debug enable register" bitfld.long 0x0 13.--14. "CP15SDIS,CP15SDISABLE for core x (x = 0 or 1)" "B_0x0,B_0x1,?,?" bitfld.long 0x0 12. "CFGSDIS,CFGSDISABLE" "B_0x0,B_0x1" bitfld.long 0x0 11. "SPNIDENM,Secure privilege non-invasive debug enable for Cortex-M" "B_0x0,B_0x1" bitfld.long 0x0 10. "SPIDENM,Secure privilege invasive debug enable for Cortex-M" "B_0x0,B_0x1" bitfld.long 0x0 9. "NIDENM,Non invasive debug enable for Cortex-M" "B_0x0,B_0x1" bitfld.long 0x0 8. "DBGENM,Debug enable for Cortex-M" "B_0x0,B_0x1" bitfld.long 0x0 7. "DBGSWEN,Self-hosted debug enable" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "SPNIDENA,Secure privilege non-invasive debug enable for Cortex-A" "B_0x0,B_0x1" bitfld.long 0x0 5. "SPIDENA,Secure privilege invasive debug enable for Cortex-A" "B_0x0,B_0x1" bitfld.long 0x0 4. "HDPEN,Hardware debug port enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "DEVICEEN,Device debug enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "NIDENA,Non invasive debug enable for Cortex-A" "B_0x0,B_0x1" bitfld.long 0x0 1. "DBGENA,Debug enable for Cortex-A" "B_0x0,B_0x1" line.long 0x4 "BSEC_UNMAPR,BSEC unmap register" hexmask.long 0x4 0.--31. 1. "UNMAP,Unmap key" rgroup.long 0xE40++0x7 line.long 0x0 "BSEC_SR,BSEC status register" hexmask.long.byte 0x0 26.--31. 1. "NVSTATE,Non-volatile state" bitfld.long 0x0 1. "HVALID,Hardware key valid" "B_0x0,B_0x1" line.long 0x4 "BSEC_OTPSR,BSEC OTP status register" bitfld.long 0x4 22. "AMEF,Addresses mismatch error flag" "0,1" bitfld.long 0x4 21. "PPLMF,Permanent programming lock mismatch flag" "0,1" bitfld.long 0x4 20. "PPLF,Permanent programming lock flag" "0,1" bitfld.long 0x4 19. "SECF,Single error correction flag" "0,1" bitfld.long 0x4 18. "DEDF,Double error detection flag" "0,1" bitfld.long 0x4 17. "DISTURBF,Disturb flag" "0,1" bitfld.long 0x4 16. "PROGFAIL,Programming failed" "0,1" newline bitfld.long 0x4 6. "OTPSEC,OTP with single error correction" "0,1" bitfld.long 0x4 5. "OTPERR,OTP with error" "0,1" bitfld.long 0x4 4. "OTPNVIR,OTP not virgin" "0,1" bitfld.long 0x4 2. "HIDEUP,Hide upper fuse words" "0,1" bitfld.long 0x4 1. "INIT_DONE,Initialization done" "0,1" bitfld.long 0x4 0. "BUSY,Busy flag" "B_0x0,B_0x1" group.long 0xF40++0x1F line.long 0x0 "BSEC_WOSCR0,BSEC write once scratch register 0" hexmask.long 0x0 0.--31. 1. "WOSDATA,Write once scratch data" line.long 0x4 "BSEC_WOSCR1,BSEC write once scratch register 1" hexmask.long 0x4 0.--31. 1. "WOSDATA,Write once scratch data" line.long 0x8 "BSEC_WOSCR2,BSEC write once scratch register 2" hexmask.long 0x8 0.--31. 1. "WOSDATA,Write once scratch data" line.long 0xC "BSEC_WOSCR3,BSEC write once scratch register 3" hexmask.long 0xC 0.--31. 1. "WOSDATA,Write once scratch data" line.long 0x10 "BSEC_WOSCR4,BSEC write once scratch register 4" hexmask.long 0x10 0.--31. 1. "WOSDATA,Write once scratch data" line.long 0x14 "BSEC_WOSCR5,BSEC write once scratch register 5" hexmask.long 0x14 0.--31. 1. "WOSDATA,Write once scratch data" line.long 0x18 "BSEC_WOSCR6,BSEC write once scratch register 6" hexmask.long 0x18 0.--31. 1. "WOSDATA,Write once scratch data" line.long 0x1C "BSEC_WOSCR7,BSEC write once scratch register 7" hexmask.long 0x1C 0.--31. 1. "WOSDATA,Write once scratch data" rgroup.long 0xFE8++0x7 line.long 0x0 "BSEC_HRCR,BSEC hot reset count register" hexmask.long 0x0 0.--31. 1. "HRC,Hot reset counter" line.long 0x4 "BSEC_WRCR,BSEC warm reset count register" hexmask.long 0x4 0.--31. 1. "WRC,Warm reset counter" rgroup.long 0xFF4++0xB line.long 0x0 "BSEC_VERR,BSEC version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x0 0.--3. 1. "MINREV,Minor revision" line.long 0x4 "BSEC_IPIDR,BSEC identification register" hexmask.long 0x4 0.--31. 1. "ID,BSEC identification" line.long 0x8 "BSEC_SIDR,BSEC size identification register" hexmask.long 0x8 0.--31. 1. "SID,BSEC size identification" tree.end tree "BSEC_S" base ad:0x54000000 group.long 0x0++0x5DF line.long 0x0 "BSEC_FVR0,BSEC fuse word 0 value register" hexmask.long 0x0 0.--31. 1. "FV,fuse value" line.long 0x4 "BSEC_FVR1,BSEC fuse word 1 value register" hexmask.long 0x4 0.--31. 1. "FV,fuse value" line.long 0x8 "BSEC_FVR2,BSEC fuse word 2 value register" hexmask.long 0x8 0.--31. 1. "FV,fuse value" line.long 0xC "BSEC_FVR3,BSEC fuse word 3 value register" hexmask.long 0xC 0.--31. 1. "FV,fuse value" line.long 0x10 "BSEC_FVR4,BSEC fuse word 4 value register" hexmask.long 0x10 0.--31. 1. "FV,fuse value" line.long 0x14 "BSEC_FVR5,BSEC fuse word 5 value register" hexmask.long 0x14 0.--31. 1. "FV,fuse value" line.long 0x18 "BSEC_FVR6,BSEC fuse word 6 value register" hexmask.long 0x18 0.--31. 1. "FV,fuse value" line.long 0x1C "BSEC_FVR7,BSEC fuse word 7 value register" hexmask.long 0x1C 0.--31. 1. "FV,fuse value" line.long 0x20 "BSEC_FVR8,BSEC fuse word 8 value register" hexmask.long 0x20 0.--31. 1. "FV,fuse value" line.long 0x24 "BSEC_FVR9,BSEC fuse word 9 value register" hexmask.long 0x24 0.--31. 1. "FV,fuse value" line.long 0x28 "BSEC_FVR10,BSEC fuse word 10 value register" hexmask.long 0x28 0.--31. 1. "FV,fuse value" line.long 0x2C "BSEC_FVR11,BSEC fuse word 11 value register" hexmask.long 0x2C 0.--31. 1. "FV,fuse value" line.long 0x30 "BSEC_FVR12,BSEC fuse word 12 value register" hexmask.long 0x30 0.--31. 1. "FV,fuse value" line.long 0x34 "BSEC_FVR13,BSEC fuse word 13 value register" hexmask.long 0x34 0.--31. 1. "FV,fuse value" line.long 0x38 "BSEC_FVR14,BSEC fuse word 14 value register" hexmask.long 0x38 0.--31. 1. "FV,fuse value" line.long 0x3C "BSEC_FVR15,BSEC fuse word 15 value register" hexmask.long 0x3C 0.--31. 1. "FV,fuse value" line.long 0x40 "BSEC_FVR16,BSEC fuse word 16 value register" hexmask.long 0x40 0.--31. 1. "FV,fuse value" line.long 0x44 "BSEC_FVR17,BSEC fuse word 17 value register" hexmask.long 0x44 0.--31. 1. "FV,fuse value" line.long 0x48 "BSEC_FVR18,BSEC fuse word 18 value register" hexmask.long 0x48 0.--31. 1. "FV,fuse value" line.long 0x4C "BSEC_FVR19,BSEC fuse word 19 value register" hexmask.long 0x4C 0.--31. 1. "FV,fuse value" line.long 0x50 "BSEC_FVR20,BSEC fuse word 20 value register" hexmask.long 0x50 0.--31. 1. "FV,fuse value" line.long 0x54 "BSEC_FVR21,BSEC fuse word 21 value register" hexmask.long 0x54 0.--31. 1. "FV,fuse value" line.long 0x58 "BSEC_FVR22,BSEC fuse word 22 value register" hexmask.long 0x58 0.--31. 1. "FV,fuse value" line.long 0x5C "BSEC_FVR23,BSEC fuse word 23 value register" hexmask.long 0x5C 0.--31. 1. "FV,fuse value" line.long 0x60 "BSEC_FVR24,BSEC fuse word 24 value register" hexmask.long 0x60 0.--31. 1. "FV,fuse value" line.long 0x64 "BSEC_FVR25,BSEC fuse word 25 value register" hexmask.long 0x64 0.--31. 1. "FV,fuse value" line.long 0x68 "BSEC_FVR26,BSEC fuse word 26 value register" hexmask.long 0x68 0.--31. 1. "FV,fuse value" line.long 0x6C "BSEC_FVR27,BSEC fuse word 27 value register" hexmask.long 0x6C 0.--31. 1. "FV,fuse value" line.long 0x70 "BSEC_FVR28,BSEC fuse word 28 value register" hexmask.long 0x70 0.--31. 1. "FV,fuse value" line.long 0x74 "BSEC_FVR29,BSEC fuse word 29 value register" hexmask.long 0x74 0.--31. 1. "FV,fuse value" line.long 0x78 "BSEC_FVR30,BSEC fuse word 30 value register" hexmask.long 0x78 0.--31. 1. "FV,fuse value" line.long 0x7C "BSEC_FVR31,BSEC fuse word 31 value register" hexmask.long 0x7C 0.--31. 1. "FV,fuse value" line.long 0x80 "BSEC_FVR32,BSEC fuse word 32 value register" hexmask.long 0x80 0.--31. 1. "FV,fuse value" line.long 0x84 "BSEC_FVR33,BSEC fuse word 33 value register" hexmask.long 0x84 0.--31. 1. "FV,fuse value" line.long 0x88 "BSEC_FVR34,BSEC fuse word 34 value register" hexmask.long 0x88 0.--31. 1. "FV,fuse value" line.long 0x8C "BSEC_FVR35,BSEC fuse word 35 value register" hexmask.long 0x8C 0.--31. 1. "FV,fuse value" line.long 0x90 "BSEC_FVR36,BSEC fuse word 36 value register" hexmask.long 0x90 0.--31. 1. "FV,fuse value" line.long 0x94 "BSEC_FVR37,BSEC fuse word 37 value register" hexmask.long 0x94 0.--31. 1. "FV,fuse value" line.long 0x98 "BSEC_FVR38,BSEC fuse word 38 value register" hexmask.long 0x98 0.--31. 1. "FV,fuse value" line.long 0x9C "BSEC_FVR39,BSEC fuse word 39 value register" hexmask.long 0x9C 0.--31. 1. "FV,fuse value" line.long 0xA0 "BSEC_FVR40,BSEC fuse word 40 value register" hexmask.long 0xA0 0.--31. 1. "FV,fuse value" line.long 0xA4 "BSEC_FVR41,BSEC fuse word 41 value register" hexmask.long 0xA4 0.--31. 1. "FV,fuse value" line.long 0xA8 "BSEC_FVR42,BSEC fuse word 42 value register" hexmask.long 0xA8 0.--31. 1. "FV,fuse value" line.long 0xAC "BSEC_FVR43,BSEC fuse word 43 value register" hexmask.long 0xAC 0.--31. 1. "FV,fuse value" line.long 0xB0 "BSEC_FVR44,BSEC fuse word 44 value register" hexmask.long 0xB0 0.--31. 1. "FV,fuse value" line.long 0xB4 "BSEC_FVR45,BSEC fuse word 45 value register" hexmask.long 0xB4 0.--31. 1. "FV,fuse value" line.long 0xB8 "BSEC_FVR46,BSEC fuse word 46 value register" hexmask.long 0xB8 0.--31. 1. "FV,fuse value" line.long 0xBC "BSEC_FVR47,BSEC fuse word 47 value register" hexmask.long 0xBC 0.--31. 1. "FV,fuse value" line.long 0xC0 "BSEC_FVR48,BSEC fuse word 48 value register" hexmask.long 0xC0 0.--31. 1. "FV,fuse value" line.long 0xC4 "BSEC_FVR49,BSEC fuse word 49 value register" hexmask.long 0xC4 0.--31. 1. "FV,fuse value" line.long 0xC8 "BSEC_FVR50,BSEC fuse word 50 value register" hexmask.long 0xC8 0.--31. 1. "FV,fuse value" line.long 0xCC "BSEC_FVR51,BSEC fuse word 51 value register" hexmask.long 0xCC 0.--31. 1. "FV,fuse value" line.long 0xD0 "BSEC_FVR52,BSEC fuse word 52 value register" hexmask.long 0xD0 0.--31. 1. "FV,fuse value" line.long 0xD4 "BSEC_FVR53,BSEC fuse word 53 value register" hexmask.long 0xD4 0.--31. 1. "FV,fuse value" line.long 0xD8 "BSEC_FVR54,BSEC fuse word 54 value register" hexmask.long 0xD8 0.--31. 1. "FV,fuse value" line.long 0xDC "BSEC_FVR55,BSEC fuse word 55 value register" hexmask.long 0xDC 0.--31. 1. "FV,fuse value" line.long 0xE0 "BSEC_FVR56,BSEC fuse word 56 value register" hexmask.long 0xE0 0.--31. 1. "FV,fuse value" line.long 0xE4 "BSEC_FVR57,BSEC fuse word 57 value register" hexmask.long 0xE4 0.--31. 1. "FV,fuse value" line.long 0xE8 "BSEC_FVR58,BSEC fuse word 58 value register" hexmask.long 0xE8 0.--31. 1. "FV,fuse value" line.long 0xEC "BSEC_FVR59,BSEC fuse word 59 value register" hexmask.long 0xEC 0.--31. 1. "FV,fuse value" line.long 0xF0 "BSEC_FVR60,BSEC fuse word 60 value register" hexmask.long 0xF0 0.--31. 1. "FV,fuse value" line.long 0xF4 "BSEC_FVR61,BSEC fuse word 61 value register" hexmask.long 0xF4 0.--31. 1. "FV,fuse value" line.long 0xF8 "BSEC_FVR62,BSEC fuse word 62 value register" hexmask.long 0xF8 0.--31. 1. "FV,fuse value" line.long 0xFC "BSEC_FVR63,BSEC fuse word 63 value register" hexmask.long 0xFC 0.--31. 1. "FV,fuse value" line.long 0x100 "BSEC_FVR64,BSEC fuse word 64 value register" hexmask.long 0x100 0.--31. 1. "FV,fuse value" line.long 0x104 "BSEC_FVR65,BSEC fuse word 65 value register" hexmask.long 0x104 0.--31. 1. "FV,fuse value" line.long 0x108 "BSEC_FVR66,BSEC fuse word 66 value register" hexmask.long 0x108 0.--31. 1. "FV,fuse value" line.long 0x10C "BSEC_FVR67,BSEC fuse word 67 value register" hexmask.long 0x10C 0.--31. 1. "FV,fuse value" line.long 0x110 "BSEC_FVR68,BSEC fuse word 68 value register" hexmask.long 0x110 0.--31. 1. "FV,fuse value" line.long 0x114 "BSEC_FVR69,BSEC fuse word 69 value register" hexmask.long 0x114 0.--31. 1. "FV,fuse value" line.long 0x118 "BSEC_FVR70,BSEC fuse word 70 value register" hexmask.long 0x118 0.--31. 1. "FV,fuse value" line.long 0x11C "BSEC_FVR71,BSEC fuse word 71 value register" hexmask.long 0x11C 0.--31. 1. "FV,fuse value" line.long 0x120 "BSEC_FVR72,BSEC fuse word 72 value register" hexmask.long 0x120 0.--31. 1. "FV,fuse value" line.long 0x124 "BSEC_FVR73,BSEC fuse word 73 value register" hexmask.long 0x124 0.--31. 1. "FV,fuse value" line.long 0x128 "BSEC_FVR74,BSEC fuse word 74 value register" hexmask.long 0x128 0.--31. 1. "FV,fuse value" line.long 0x12C "BSEC_FVR75,BSEC fuse word 75 value register" hexmask.long 0x12C 0.--31. 1. "FV,fuse value" line.long 0x130 "BSEC_FVR76,BSEC fuse word 76 value register" hexmask.long 0x130 0.--31. 1. "FV,fuse value" line.long 0x134 "BSEC_FVR77,BSEC fuse word 77 value register" hexmask.long 0x134 0.--31. 1. "FV,fuse value" line.long 0x138 "BSEC_FVR78,BSEC fuse word 78 value register" hexmask.long 0x138 0.--31. 1. "FV,fuse value" line.long 0x13C "BSEC_FVR79,BSEC fuse word 79 value register" hexmask.long 0x13C 0.--31. 1. "FV,fuse value" line.long 0x140 "BSEC_FVR80,BSEC fuse word 80 value register" hexmask.long 0x140 0.--31. 1. "FV,fuse value" line.long 0x144 "BSEC_FVR81,BSEC fuse word 81 value register" hexmask.long 0x144 0.--31. 1. "FV,fuse value" line.long 0x148 "BSEC_FVR82,BSEC fuse word 82 value register" hexmask.long 0x148 0.--31. 1. "FV,fuse value" line.long 0x14C "BSEC_FVR83,BSEC fuse word 83 value register" hexmask.long 0x14C 0.--31. 1. "FV,fuse value" line.long 0x150 "BSEC_FVR84,BSEC fuse word 84 value register" hexmask.long 0x150 0.--31. 1. "FV,fuse value" line.long 0x154 "BSEC_FVR85,BSEC fuse word 85 value register" hexmask.long 0x154 0.--31. 1. "FV,fuse value" line.long 0x158 "BSEC_FVR86,BSEC fuse word 86 value register" hexmask.long 0x158 0.--31. 1. "FV,fuse value" line.long 0x15C "BSEC_FVR87,BSEC fuse word 87 value register" hexmask.long 0x15C 0.--31. 1. "FV,fuse value" line.long 0x160 "BSEC_FVR88,BSEC fuse word 88 value register" hexmask.long 0x160 0.--31. 1. "FV,fuse value" line.long 0x164 "BSEC_FVR89,BSEC fuse word 89 value register" hexmask.long 0x164 0.--31. 1. "FV,fuse value" line.long 0x168 "BSEC_FVR90,BSEC fuse word 90 value register" hexmask.long 0x168 0.--31. 1. "FV,fuse value" line.long 0x16C "BSEC_FVR91,BSEC fuse word 91 value register" hexmask.long 0x16C 0.--31. 1. "FV,fuse value" line.long 0x170 "BSEC_FVR92,BSEC fuse word 92 value register" hexmask.long 0x170 0.--31. 1. "FV,fuse value" line.long 0x174 "BSEC_FVR93,BSEC fuse word 93 value register" hexmask.long 0x174 0.--31. 1. "FV,fuse value" line.long 0x178 "BSEC_FVR94,BSEC fuse word 94 value register" hexmask.long 0x178 0.--31. 1. "FV,fuse value" line.long 0x17C "BSEC_FVR95,BSEC fuse word 95 value register" hexmask.long 0x17C 0.--31. 1. "FV,fuse value" line.long 0x180 "BSEC_FVR96,BSEC fuse word 96 value register" hexmask.long 0x180 0.--31. 1. "FV,fuse value" line.long 0x184 "BSEC_FVR97,BSEC fuse word 97 value register" hexmask.long 0x184 0.--31. 1. "FV,fuse value" line.long 0x188 "BSEC_FVR98,BSEC fuse word 98 value register" hexmask.long 0x188 0.--31. 1. "FV,fuse value" line.long 0x18C "BSEC_FVR99,BSEC fuse word 99 value register" hexmask.long 0x18C 0.--31. 1. "FV,fuse value" line.long 0x190 "BSEC_FVR100,BSEC fuse word 100 value register" hexmask.long 0x190 0.--31. 1. "FV,fuse value" line.long 0x194 "BSEC_FVR101,BSEC fuse word 101 value register" hexmask.long 0x194 0.--31. 1. "FV,fuse value" line.long 0x198 "BSEC_FVR102,BSEC fuse word 102 value register" hexmask.long 0x198 0.--31. 1. "FV,fuse value" line.long 0x19C "BSEC_FVR103,BSEC fuse word 103 value register" hexmask.long 0x19C 0.--31. 1. "FV,fuse value" line.long 0x1A0 "BSEC_FVR104,BSEC fuse word 104 value register" hexmask.long 0x1A0 0.--31. 1. "FV,fuse value" line.long 0x1A4 "BSEC_FVR105,BSEC fuse word 105 value register" hexmask.long 0x1A4 0.--31. 1. "FV,fuse value" line.long 0x1A8 "BSEC_FVR106,BSEC fuse word 106 value register" hexmask.long 0x1A8 0.--31. 1. "FV,fuse value" line.long 0x1AC "BSEC_FVR107,BSEC fuse word 107 value register" hexmask.long 0x1AC 0.--31. 1. "FV,fuse value" line.long 0x1B0 "BSEC_FVR108,BSEC fuse word 108 value register" hexmask.long 0x1B0 0.--31. 1. "FV,fuse value" line.long 0x1B4 "BSEC_FVR109,BSEC fuse word 109 value register" hexmask.long 0x1B4 0.--31. 1. "FV,fuse value" line.long 0x1B8 "BSEC_FVR110,BSEC fuse word 110 value register" hexmask.long 0x1B8 0.--31. 1. "FV,fuse value" line.long 0x1BC "BSEC_FVR111,BSEC fuse word 111 value register" hexmask.long 0x1BC 0.--31. 1. "FV,fuse value" line.long 0x1C0 "BSEC_FVR112,BSEC fuse word 112 value register" hexmask.long 0x1C0 0.--31. 1. "FV,fuse value" line.long 0x1C4 "BSEC_FVR113,BSEC fuse word 113 value register" hexmask.long 0x1C4 0.--31. 1. "FV,fuse value" line.long 0x1C8 "BSEC_FVR114,BSEC fuse word 114 value register" hexmask.long 0x1C8 0.--31. 1. "FV,fuse value" line.long 0x1CC "BSEC_FVR115,BSEC fuse word 115 value register" hexmask.long 0x1CC 0.--31. 1. "FV,fuse value" line.long 0x1D0 "BSEC_FVR116,BSEC fuse word 116 value register" hexmask.long 0x1D0 0.--31. 1. "FV,fuse value" line.long 0x1D4 "BSEC_FVR117,BSEC fuse word 117 value register" hexmask.long 0x1D4 0.--31. 1. "FV,fuse value" line.long 0x1D8 "BSEC_FVR118,BSEC fuse word 118 value register" hexmask.long 0x1D8 0.--31. 1. "FV,fuse value" line.long 0x1DC "BSEC_FVR119,BSEC fuse word 119 value register" hexmask.long 0x1DC 0.--31. 1. "FV,fuse value" line.long 0x1E0 "BSEC_FVR120,BSEC fuse word 120 value register" hexmask.long 0x1E0 0.--31. 1. "FV,fuse value" line.long 0x1E4 "BSEC_FVR121,BSEC fuse word 121 value register" hexmask.long 0x1E4 0.--31. 1. "FV,fuse value" line.long 0x1E8 "BSEC_FVR122,BSEC fuse word 122 value register" hexmask.long 0x1E8 0.--31. 1. "FV,fuse value" line.long 0x1EC "BSEC_FVR123,BSEC fuse word 123 value register" hexmask.long 0x1EC 0.--31. 1. "FV,fuse value" line.long 0x1F0 "BSEC_FVR124,BSEC fuse word 124 value register" hexmask.long 0x1F0 0.--31. 1. "FV,fuse value" line.long 0x1F4 "BSEC_FVR125,BSEC fuse word 125 value register" hexmask.long 0x1F4 0.--31. 1. "FV,fuse value" line.long 0x1F8 "BSEC_FVR126,BSEC fuse word 126 value register" hexmask.long 0x1F8 0.--31. 1. "FV,fuse value" line.long 0x1FC "BSEC_FVR127,BSEC fuse word 127 value register" hexmask.long 0x1FC 0.--31. 1. "FV,fuse value" line.long 0x200 "BSEC_FVR128,BSEC fuse word 128 value register" hexmask.long 0x200 0.--31. 1. "FV,fuse value" line.long 0x204 "BSEC_FVR129,BSEC fuse word 129 value register" hexmask.long 0x204 0.--31. 1. "FV,fuse value" line.long 0x208 "BSEC_FVR130,BSEC fuse word 130 value register" hexmask.long 0x208 0.--31. 1. "FV,fuse value" line.long 0x20C "BSEC_FVR131,BSEC fuse word 131 value register" hexmask.long 0x20C 0.--31. 1. "FV,fuse value" line.long 0x210 "BSEC_FVR132,BSEC fuse word 132 value register" hexmask.long 0x210 0.--31. 1. "FV,fuse value" line.long 0x214 "BSEC_FVR133,BSEC fuse word 133 value register" hexmask.long 0x214 0.--31. 1. "FV,fuse value" line.long 0x218 "BSEC_FVR134,BSEC fuse word 134 value register" hexmask.long 0x218 0.--31. 1. "FV,fuse value" line.long 0x21C "BSEC_FVR135,BSEC fuse word 135 value register" hexmask.long 0x21C 0.--31. 1. "FV,fuse value" line.long 0x220 "BSEC_FVR136,BSEC fuse word 136 value register" hexmask.long 0x220 0.--31. 1. "FV,fuse value" line.long 0x224 "BSEC_FVR137,BSEC fuse word 137 value register" hexmask.long 0x224 0.--31. 1. "FV,fuse value" line.long 0x228 "BSEC_FVR138,BSEC fuse word 138 value register" hexmask.long 0x228 0.--31. 1. "FV,fuse value" line.long 0x22C "BSEC_FVR139,BSEC fuse word 139 value register" hexmask.long 0x22C 0.--31. 1. "FV,fuse value" line.long 0x230 "BSEC_FVR140,BSEC fuse word 140 value register" hexmask.long 0x230 0.--31. 1. "FV,fuse value" line.long 0x234 "BSEC_FVR141,BSEC fuse word 141 value register" hexmask.long 0x234 0.--31. 1. "FV,fuse value" line.long 0x238 "BSEC_FVR142,BSEC fuse word 142 value register" hexmask.long 0x238 0.--31. 1. "FV,fuse value" line.long 0x23C "BSEC_FVR143,BSEC fuse word 143 value register" hexmask.long 0x23C 0.--31. 1. "FV,fuse value" line.long 0x240 "BSEC_FVR144,BSEC fuse word 144 value register" hexmask.long 0x240 0.--31. 1. "FV,fuse value" line.long 0x244 "BSEC_FVR145,BSEC fuse word 145 value register" hexmask.long 0x244 0.--31. 1. "FV,fuse value" line.long 0x248 "BSEC_FVR146,BSEC fuse word 146 value register" hexmask.long 0x248 0.--31. 1. "FV,fuse value" line.long 0x24C "BSEC_FVR147,BSEC fuse word 147 value register" hexmask.long 0x24C 0.--31. 1. "FV,fuse value" line.long 0x250 "BSEC_FVR148,BSEC fuse word 148 value register" hexmask.long 0x250 0.--31. 1. "FV,fuse value" line.long 0x254 "BSEC_FVR149,BSEC fuse word 149 value register" hexmask.long 0x254 0.--31. 1. "FV,fuse value" line.long 0x258 "BSEC_FVR150,BSEC fuse word 150 value register" hexmask.long 0x258 0.--31. 1. "FV,fuse value" line.long 0x25C "BSEC_FVR151,BSEC fuse word 151 value register" hexmask.long 0x25C 0.--31. 1. "FV,fuse value" line.long 0x260 "BSEC_FVR152,BSEC fuse word 152 value register" hexmask.long 0x260 0.--31. 1. "FV,fuse value" line.long 0x264 "BSEC_FVR153,BSEC fuse word 153 value register" hexmask.long 0x264 0.--31. 1. "FV,fuse value" line.long 0x268 "BSEC_FVR154,BSEC fuse word 154 value register" hexmask.long 0x268 0.--31. 1. "FV,fuse value" line.long 0x26C "BSEC_FVR155,BSEC fuse word 155 value register" hexmask.long 0x26C 0.--31. 1. "FV,fuse value" line.long 0x270 "BSEC_FVR156,BSEC fuse word 156 value register" hexmask.long 0x270 0.--31. 1. "FV,fuse value" line.long 0x274 "BSEC_FVR157,BSEC fuse word 157 value register" hexmask.long 0x274 0.--31. 1. "FV,fuse value" line.long 0x278 "BSEC_FVR158,BSEC fuse word 158 value register" hexmask.long 0x278 0.--31. 1. "FV,fuse value" line.long 0x27C "BSEC_FVR159,BSEC fuse word 159 value register" hexmask.long 0x27C 0.--31. 1. "FV,fuse value" line.long 0x280 "BSEC_FVR160,BSEC fuse word 160 value register" hexmask.long 0x280 0.--31. 1. "FV,fuse value" line.long 0x284 "BSEC_FVR161,BSEC fuse word 161 value register" hexmask.long 0x284 0.--31. 1. "FV,fuse value" line.long 0x288 "BSEC_FVR162,BSEC fuse word 162 value register" hexmask.long 0x288 0.--31. 1. "FV,fuse value" line.long 0x28C "BSEC_FVR163,BSEC fuse word 163 value register" hexmask.long 0x28C 0.--31. 1. "FV,fuse value" line.long 0x290 "BSEC_FVR164,BSEC fuse word 164 value register" hexmask.long 0x290 0.--31. 1. "FV,fuse value" line.long 0x294 "BSEC_FVR165,BSEC fuse word 165 value register" hexmask.long 0x294 0.--31. 1. "FV,fuse value" line.long 0x298 "BSEC_FVR166,BSEC fuse word 166 value register" hexmask.long 0x298 0.--31. 1. "FV,fuse value" line.long 0x29C "BSEC_FVR167,BSEC fuse word 167 value register" hexmask.long 0x29C 0.--31. 1. "FV,fuse value" line.long 0x2A0 "BSEC_FVR168,BSEC fuse word 168 value register" hexmask.long 0x2A0 0.--31. 1. "FV,fuse value" line.long 0x2A4 "BSEC_FVR169,BSEC fuse word 169 value register" hexmask.long 0x2A4 0.--31. 1. "FV,fuse value" line.long 0x2A8 "BSEC_FVR170,BSEC fuse word 170 value register" hexmask.long 0x2A8 0.--31. 1. "FV,fuse value" line.long 0x2AC "BSEC_FVR171,BSEC fuse word 171 value register" hexmask.long 0x2AC 0.--31. 1. "FV,fuse value" line.long 0x2B0 "BSEC_FVR172,BSEC fuse word 172 value register" hexmask.long 0x2B0 0.--31. 1. "FV,fuse value" line.long 0x2B4 "BSEC_FVR173,BSEC fuse word 173 value register" hexmask.long 0x2B4 0.--31. 1. "FV,fuse value" line.long 0x2B8 "BSEC_FVR174,BSEC fuse word 174 value register" hexmask.long 0x2B8 0.--31. 1. "FV,fuse value" line.long 0x2BC "BSEC_FVR175,BSEC fuse word 175 value register" hexmask.long 0x2BC 0.--31. 1. "FV,fuse value" line.long 0x2C0 "BSEC_FVR176,BSEC fuse word 176 value register" hexmask.long 0x2C0 0.--31. 1. "FV,fuse value" line.long 0x2C4 "BSEC_FVR177,BSEC fuse word 177 value register" hexmask.long 0x2C4 0.--31. 1. "FV,fuse value" line.long 0x2C8 "BSEC_FVR178,BSEC fuse word 178 value register" hexmask.long 0x2C8 0.--31. 1. "FV,fuse value" line.long 0x2CC "BSEC_FVR179,BSEC fuse word 179 value register" hexmask.long 0x2CC 0.--31. 1. "FV,fuse value" line.long 0x2D0 "BSEC_FVR180,BSEC fuse word 180 value register" hexmask.long 0x2D0 0.--31. 1. "FV,fuse value" line.long 0x2D4 "BSEC_FVR181,BSEC fuse word 181 value register" hexmask.long 0x2D4 0.--31. 1. "FV,fuse value" line.long 0x2D8 "BSEC_FVR182,BSEC fuse word 182 value register" hexmask.long 0x2D8 0.--31. 1. "FV,fuse value" line.long 0x2DC "BSEC_FVR183,BSEC fuse word 183 value register" hexmask.long 0x2DC 0.--31. 1. "FV,fuse value" line.long 0x2E0 "BSEC_FVR184,BSEC fuse word 184 value register" hexmask.long 0x2E0 0.--31. 1. "FV,fuse value" line.long 0x2E4 "BSEC_FVR185,BSEC fuse word 185 value register" hexmask.long 0x2E4 0.--31. 1. "FV,fuse value" line.long 0x2E8 "BSEC_FVR186,BSEC fuse word 186 value register" hexmask.long 0x2E8 0.--31. 1. "FV,fuse value" line.long 0x2EC "BSEC_FVR187,BSEC fuse word 187 value register" hexmask.long 0x2EC 0.--31. 1. "FV,fuse value" line.long 0x2F0 "BSEC_FVR188,BSEC fuse word 188 value register" hexmask.long 0x2F0 0.--31. 1. "FV,fuse value" line.long 0x2F4 "BSEC_FVR189,BSEC fuse word 189 value register" hexmask.long 0x2F4 0.--31. 1. "FV,fuse value" line.long 0x2F8 "BSEC_FVR190,BSEC fuse word 190 value register" hexmask.long 0x2F8 0.--31. 1. "FV,fuse value" line.long 0x2FC "BSEC_FVR191,BSEC fuse word 191 value register" hexmask.long 0x2FC 0.--31. 1. "FV,fuse value" line.long 0x300 "BSEC_FVR192,BSEC fuse word 192 value register" hexmask.long 0x300 0.--31. 1. "FV,fuse value" line.long 0x304 "BSEC_FVR193,BSEC fuse word 193 value register" hexmask.long 0x304 0.--31. 1. "FV,fuse value" line.long 0x308 "BSEC_FVR194,BSEC fuse word 194 value register" hexmask.long 0x308 0.--31. 1. "FV,fuse value" line.long 0x30C "BSEC_FVR195,BSEC fuse word 195 value register" hexmask.long 0x30C 0.--31. 1. "FV,fuse value" line.long 0x310 "BSEC_FVR196,BSEC fuse word 196 value register" hexmask.long 0x310 0.--31. 1. "FV,fuse value" line.long 0x314 "BSEC_FVR197,BSEC fuse word 197 value register" hexmask.long 0x314 0.--31. 1. "FV,fuse value" line.long 0x318 "BSEC_FVR198,BSEC fuse word 198 value register" hexmask.long 0x318 0.--31. 1. "FV,fuse value" line.long 0x31C "BSEC_FVR199,BSEC fuse word 199 value register" hexmask.long 0x31C 0.--31. 1. "FV,fuse value" line.long 0x320 "BSEC_FVR200,BSEC fuse word 200 value register" hexmask.long 0x320 0.--31. 1. "FV,fuse value" line.long 0x324 "BSEC_FVR201,BSEC fuse word 201 value register" hexmask.long 0x324 0.--31. 1. "FV,fuse value" line.long 0x328 "BSEC_FVR202,BSEC fuse word 202 value register" hexmask.long 0x328 0.--31. 1. "FV,fuse value" line.long 0x32C "BSEC_FVR203,BSEC fuse word 203 value register" hexmask.long 0x32C 0.--31. 1. "FV,fuse value" line.long 0x330 "BSEC_FVR204,BSEC fuse word 204 value register" hexmask.long 0x330 0.--31. 1. "FV,fuse value" line.long 0x334 "BSEC_FVR205,BSEC fuse word 205 value register" hexmask.long 0x334 0.--31. 1. "FV,fuse value" line.long 0x338 "BSEC_FVR206,BSEC fuse word 206 value register" hexmask.long 0x338 0.--31. 1. "FV,fuse value" line.long 0x33C "BSEC_FVR207,BSEC fuse word 207 value register" hexmask.long 0x33C 0.--31. 1. "FV,fuse value" line.long 0x340 "BSEC_FVR208,BSEC fuse word 208 value register" hexmask.long 0x340 0.--31. 1. "FV,fuse value" line.long 0x344 "BSEC_FVR209,BSEC fuse word 209 value register" hexmask.long 0x344 0.--31. 1. "FV,fuse value" line.long 0x348 "BSEC_FVR210,BSEC fuse word 210 value register" hexmask.long 0x348 0.--31. 1. "FV,fuse value" line.long 0x34C "BSEC_FVR211,BSEC fuse word 211 value register" hexmask.long 0x34C 0.--31. 1. "FV,fuse value" line.long 0x350 "BSEC_FVR212,BSEC fuse word 212 value register" hexmask.long 0x350 0.--31. 1. "FV,fuse value" line.long 0x354 "BSEC_FVR213,BSEC fuse word 213 value register" hexmask.long 0x354 0.--31. 1. "FV,fuse value" line.long 0x358 "BSEC_FVR214,BSEC fuse word 214 value register" hexmask.long 0x358 0.--31. 1. "FV,fuse value" line.long 0x35C "BSEC_FVR215,BSEC fuse word 215 value register" hexmask.long 0x35C 0.--31. 1. "FV,fuse value" line.long 0x360 "BSEC_FVR216,BSEC fuse word 216 value register" hexmask.long 0x360 0.--31. 1. "FV,fuse value" line.long 0x364 "BSEC_FVR217,BSEC fuse word 217 value register" hexmask.long 0x364 0.--31. 1. "FV,fuse value" line.long 0x368 "BSEC_FVR218,BSEC fuse word 218 value register" hexmask.long 0x368 0.--31. 1. "FV,fuse value" line.long 0x36C "BSEC_FVR219,BSEC fuse word 219 value register" hexmask.long 0x36C 0.--31. 1. "FV,fuse value" line.long 0x370 "BSEC_FVR220,BSEC fuse word 220 value register" hexmask.long 0x370 0.--31. 1. "FV,fuse value" line.long 0x374 "BSEC_FVR221,BSEC fuse word 221 value register" hexmask.long 0x374 0.--31. 1. "FV,fuse value" line.long 0x378 "BSEC_FVR222,BSEC fuse word 222 value register" hexmask.long 0x378 0.--31. 1. "FV,fuse value" line.long 0x37C "BSEC_FVR223,BSEC fuse word 223 value register" hexmask.long 0x37C 0.--31. 1. "FV,fuse value" line.long 0x380 "BSEC_FVR224,BSEC fuse word 224 value register" hexmask.long 0x380 0.--31. 1. "FV,fuse value" line.long 0x384 "BSEC_FVR225,BSEC fuse word 225 value register" hexmask.long 0x384 0.--31. 1. "FV,fuse value" line.long 0x388 "BSEC_FVR226,BSEC fuse word 226 value register" hexmask.long 0x388 0.--31. 1. "FV,fuse value" line.long 0x38C "BSEC_FVR227,BSEC fuse word 227 value register" hexmask.long 0x38C 0.--31. 1. "FV,fuse value" line.long 0x390 "BSEC_FVR228,BSEC fuse word 228 value register" hexmask.long 0x390 0.--31. 1. "FV,fuse value" line.long 0x394 "BSEC_FVR229,BSEC fuse word 229 value register" hexmask.long 0x394 0.--31. 1. "FV,fuse value" line.long 0x398 "BSEC_FVR230,BSEC fuse word 230 value register" hexmask.long 0x398 0.--31. 1. "FV,fuse value" line.long 0x39C "BSEC_FVR231,BSEC fuse word 231 value register" hexmask.long 0x39C 0.--31. 1. "FV,fuse value" line.long 0x3A0 "BSEC_FVR232,BSEC fuse word 232 value register" hexmask.long 0x3A0 0.--31. 1. "FV,fuse value" line.long 0x3A4 "BSEC_FVR233,BSEC fuse word 233 value register" hexmask.long 0x3A4 0.--31. 1. "FV,fuse value" line.long 0x3A8 "BSEC_FVR234,BSEC fuse word 234 value register" hexmask.long 0x3A8 0.--31. 1. "FV,fuse value" line.long 0x3AC "BSEC_FVR235,BSEC fuse word 235 value register" hexmask.long 0x3AC 0.--31. 1. "FV,fuse value" line.long 0x3B0 "BSEC_FVR236,BSEC fuse word 236 value register" hexmask.long 0x3B0 0.--31. 1. "FV,fuse value" line.long 0x3B4 "BSEC_FVR237,BSEC fuse word 237 value register" hexmask.long 0x3B4 0.--31. 1. "FV,fuse value" line.long 0x3B8 "BSEC_FVR238,BSEC fuse word 238 value register" hexmask.long 0x3B8 0.--31. 1. "FV,fuse value" line.long 0x3BC "BSEC_FVR239,BSEC fuse word 239 value register" hexmask.long 0x3BC 0.--31. 1. "FV,fuse value" line.long 0x3C0 "BSEC_FVR240,BSEC fuse word 240 value register" hexmask.long 0x3C0 0.--31. 1. "FV,fuse value" line.long 0x3C4 "BSEC_FVR241,BSEC fuse word 241 value register" hexmask.long 0x3C4 0.--31. 1. "FV,fuse value" line.long 0x3C8 "BSEC_FVR242,BSEC fuse word 242 value register" hexmask.long 0x3C8 0.--31. 1. "FV,fuse value" line.long 0x3CC "BSEC_FVR243,BSEC fuse word 243 value register" hexmask.long 0x3CC 0.--31. 1. "FV,fuse value" line.long 0x3D0 "BSEC_FVR244,BSEC fuse word 244 value register" hexmask.long 0x3D0 0.--31. 1. "FV,fuse value" line.long 0x3D4 "BSEC_FVR245,BSEC fuse word 245 value register" hexmask.long 0x3D4 0.--31. 1. "FV,fuse value" line.long 0x3D8 "BSEC_FVR246,BSEC fuse word 246 value register" hexmask.long 0x3D8 0.--31. 1. "FV,fuse value" line.long 0x3DC "BSEC_FVR247,BSEC fuse word 247 value register" hexmask.long 0x3DC 0.--31. 1. "FV,fuse value" line.long 0x3E0 "BSEC_FVR248,BSEC fuse word 248 value register" hexmask.long 0x3E0 0.--31. 1. "FV,fuse value" line.long 0x3E4 "BSEC_FVR249,BSEC fuse word 249 value register" hexmask.long 0x3E4 0.--31. 1. "FV,fuse value" line.long 0x3E8 "BSEC_FVR250,BSEC fuse word 250 value register" hexmask.long 0x3E8 0.--31. 1. "FV,fuse value" line.long 0x3EC "BSEC_FVR251,BSEC fuse word 251 value register" hexmask.long 0x3EC 0.--31. 1. "FV,fuse value" line.long 0x3F0 "BSEC_FVR252,BSEC fuse word 252 value register" hexmask.long 0x3F0 0.--31. 1. "FV,fuse value" line.long 0x3F4 "BSEC_FVR253,BSEC fuse word 253 value register" hexmask.long 0x3F4 0.--31. 1. "FV,fuse value" line.long 0x3F8 "BSEC_FVR254,BSEC fuse word 254 value register" hexmask.long 0x3F8 0.--31. 1. "FV,fuse value" line.long 0x3FC "BSEC_FVR255,BSEC fuse word 255 value register" hexmask.long 0x3FC 0.--31. 1. "FV,fuse value" line.long 0x400 "BSEC_FVR256,BSEC fuse word 256 value register" hexmask.long 0x400 0.--31. 1. "FV,fuse value" line.long 0x404 "BSEC_FVR257,BSEC fuse word 257 value register" hexmask.long 0x404 0.--31. 1. "FV,fuse value" line.long 0x408 "BSEC_FVR258,BSEC fuse word 258 value register" hexmask.long 0x408 0.--31. 1. "FV,fuse value" line.long 0x40C "BSEC_FVR259,BSEC fuse word 259 value register" hexmask.long 0x40C 0.--31. 1. "FV,fuse value" line.long 0x410 "BSEC_FVR260,BSEC fuse word 260 value register" hexmask.long 0x410 0.--31. 1. "FV,fuse value" line.long 0x414 "BSEC_FVR261,BSEC fuse word 261 value register" hexmask.long 0x414 0.--31. 1. "FV,fuse value" line.long 0x418 "BSEC_FVR262,BSEC fuse word 262 value register" hexmask.long 0x418 0.--31. 1. "FV,fuse value" line.long 0x41C "BSEC_FVR263,BSEC fuse word 263 value register" hexmask.long 0x41C 0.--31. 1. "FV,fuse value" line.long 0x420 "BSEC_FVR264,BSEC fuse word 264 value register" hexmask.long 0x420 0.--31. 1. "FV,fuse value" line.long 0x424 "BSEC_FVR265,BSEC fuse word 265 value register" hexmask.long 0x424 0.--31. 1. "FV,fuse value" line.long 0x428 "BSEC_FVR266,BSEC fuse word 266 value register" hexmask.long 0x428 0.--31. 1. "FV,fuse value" line.long 0x42C "BSEC_FVR267,BSEC fuse word 267 value register" hexmask.long 0x42C 0.--31. 1. "FV,fuse value" line.long 0x430 "BSEC_FVR268,BSEC fuse word 268 value register" hexmask.long 0x430 0.--31. 1. "FV,fuse value" line.long 0x434 "BSEC_FVR269,BSEC fuse word 269 value register" hexmask.long 0x434 0.--31. 1. "FV,fuse value" line.long 0x438 "BSEC_FVR270,BSEC fuse word 270 value register" hexmask.long 0x438 0.--31. 1. "FV,fuse value" line.long 0x43C "BSEC_FVR271,BSEC fuse word 271 value register" hexmask.long 0x43C 0.--31. 1. "FV,fuse value" line.long 0x440 "BSEC_FVR272,BSEC fuse word 272 value register" hexmask.long 0x440 0.--31. 1. "FV,fuse value" line.long 0x444 "BSEC_FVR273,BSEC fuse word 273 value register" hexmask.long 0x444 0.--31. 1. "FV,fuse value" line.long 0x448 "BSEC_FVR274,BSEC fuse word 274 value register" hexmask.long 0x448 0.--31. 1. "FV,fuse value" line.long 0x44C "BSEC_FVR275,BSEC fuse word 275 value register" hexmask.long 0x44C 0.--31. 1. "FV,fuse value" line.long 0x450 "BSEC_FVR276,BSEC fuse word 276 value register" hexmask.long 0x450 0.--31. 1. "FV,fuse value" line.long 0x454 "BSEC_FVR277,BSEC fuse word 277 value register" hexmask.long 0x454 0.--31. 1. "FV,fuse value" line.long 0x458 "BSEC_FVR278,BSEC fuse word 278 value register" hexmask.long 0x458 0.--31. 1. "FV,fuse value" line.long 0x45C "BSEC_FVR279,BSEC fuse word 279 value register" hexmask.long 0x45C 0.--31. 1. "FV,fuse value" line.long 0x460 "BSEC_FVR280,BSEC fuse word 280 value register" hexmask.long 0x460 0.--31. 1. "FV,fuse value" line.long 0x464 "BSEC_FVR281,BSEC fuse word 281 value register" hexmask.long 0x464 0.--31. 1. "FV,fuse value" line.long 0x468 "BSEC_FVR282,BSEC fuse word 282 value register" hexmask.long 0x468 0.--31. 1. "FV,fuse value" line.long 0x46C "BSEC_FVR283,BSEC fuse word 283 value register" hexmask.long 0x46C 0.--31. 1. "FV,fuse value" line.long 0x470 "BSEC_FVR284,BSEC fuse word 284 value register" hexmask.long 0x470 0.--31. 1. "FV,fuse value" line.long 0x474 "BSEC_FVR285,BSEC fuse word 285 value register" hexmask.long 0x474 0.--31. 1. "FV,fuse value" line.long 0x478 "BSEC_FVR286,BSEC fuse word 286 value register" hexmask.long 0x478 0.--31. 1. "FV,fuse value" line.long 0x47C "BSEC_FVR287,BSEC fuse word 287 value register" hexmask.long 0x47C 0.--31. 1. "FV,fuse value" line.long 0x480 "BSEC_FVR288,BSEC fuse word 288 value register" hexmask.long 0x480 0.--31. 1. "FV,fuse value" line.long 0x484 "BSEC_FVR289,BSEC fuse word 289 value register" hexmask.long 0x484 0.--31. 1. "FV,fuse value" line.long 0x488 "BSEC_FVR290,BSEC fuse word 290 value register" hexmask.long 0x488 0.--31. 1. "FV,fuse value" line.long 0x48C "BSEC_FVR291,BSEC fuse word 291 value register" hexmask.long 0x48C 0.--31. 1. "FV,fuse value" line.long 0x490 "BSEC_FVR292,BSEC fuse word 292 value register" hexmask.long 0x490 0.--31. 1. "FV,fuse value" line.long 0x494 "BSEC_FVR293,BSEC fuse word 293 value register" hexmask.long 0x494 0.--31. 1. "FV,fuse value" line.long 0x498 "BSEC_FVR294,BSEC fuse word 294 value register" hexmask.long 0x498 0.--31. 1. "FV,fuse value" line.long 0x49C "BSEC_FVR295,BSEC fuse word 295 value register" hexmask.long 0x49C 0.--31. 1. "FV,fuse value" line.long 0x4A0 "BSEC_FVR296,BSEC fuse word 296 value register" hexmask.long 0x4A0 0.--31. 1. "FV,fuse value" line.long 0x4A4 "BSEC_FVR297,BSEC fuse word 297 value register" hexmask.long 0x4A4 0.--31. 1. "FV,fuse value" line.long 0x4A8 "BSEC_FVR298,BSEC fuse word 298 value register" hexmask.long 0x4A8 0.--31. 1. "FV,fuse value" line.long 0x4AC "BSEC_FVR299,BSEC fuse word 299 value register" hexmask.long 0x4AC 0.--31. 1. "FV,fuse value" line.long 0x4B0 "BSEC_FVR300,BSEC fuse word 300 value register" hexmask.long 0x4B0 0.--31. 1. "FV,fuse value" line.long 0x4B4 "BSEC_FVR301,BSEC fuse word 301 value register" hexmask.long 0x4B4 0.--31. 1. "FV,fuse value" line.long 0x4B8 "BSEC_FVR302,BSEC fuse word 302 value register" hexmask.long 0x4B8 0.--31. 1. "FV,fuse value" line.long 0x4BC "BSEC_FVR303,BSEC fuse word 303 value register" hexmask.long 0x4BC 0.--31. 1. "FV,fuse value" line.long 0x4C0 "BSEC_FVR304,BSEC fuse word 304 value register" hexmask.long 0x4C0 0.--31. 1. "FV,fuse value" line.long 0x4C4 "BSEC_FVR305,BSEC fuse word 305 value register" hexmask.long 0x4C4 0.--31. 1. "FV,fuse value" line.long 0x4C8 "BSEC_FVR306,BSEC fuse word 306 value register" hexmask.long 0x4C8 0.--31. 1. "FV,fuse value" line.long 0x4CC "BSEC_FVR307,BSEC fuse word 307 value register" hexmask.long 0x4CC 0.--31. 1. "FV,fuse value" line.long 0x4D0 "BSEC_FVR308,BSEC fuse word 308 value register" hexmask.long 0x4D0 0.--31. 1. "FV,fuse value" line.long 0x4D4 "BSEC_FVR309,BSEC fuse word 309 value register" hexmask.long 0x4D4 0.--31. 1. "FV,fuse value" line.long 0x4D8 "BSEC_FVR310,BSEC fuse word 310 value register" hexmask.long 0x4D8 0.--31. 1. "FV,fuse value" line.long 0x4DC "BSEC_FVR311,BSEC fuse word 311 value register" hexmask.long 0x4DC 0.--31. 1. "FV,fuse value" line.long 0x4E0 "BSEC_FVR312,BSEC fuse word 312 value register" hexmask.long 0x4E0 0.--31. 1. "FV,fuse value" line.long 0x4E4 "BSEC_FVR313,BSEC fuse word 313 value register" hexmask.long 0x4E4 0.--31. 1. "FV,fuse value" line.long 0x4E8 "BSEC_FVR314,BSEC fuse word 314 value register" hexmask.long 0x4E8 0.--31. 1. "FV,fuse value" line.long 0x4EC "BSEC_FVR315,BSEC fuse word 315 value register" hexmask.long 0x4EC 0.--31. 1. "FV,fuse value" line.long 0x4F0 "BSEC_FVR316,BSEC fuse word 316 value register" hexmask.long 0x4F0 0.--31. 1. "FV,fuse value" line.long 0x4F4 "BSEC_FVR317,BSEC fuse word 317 value register" hexmask.long 0x4F4 0.--31. 1. "FV,fuse value" line.long 0x4F8 "BSEC_FVR318,BSEC fuse word 318 value register" hexmask.long 0x4F8 0.--31. 1. "FV,fuse value" line.long 0x4FC "BSEC_FVR319,BSEC fuse word 319 value register" hexmask.long 0x4FC 0.--31. 1. "FV,fuse value" line.long 0x500 "BSEC_FVR320,BSEC fuse word 320 value register" hexmask.long 0x500 0.--31. 1. "FV,fuse value" line.long 0x504 "BSEC_FVR321,BSEC fuse word 321 value register" hexmask.long 0x504 0.--31. 1. "FV,fuse value" line.long 0x508 "BSEC_FVR322,BSEC fuse word 322 value register" hexmask.long 0x508 0.--31. 1. "FV,fuse value" line.long 0x50C "BSEC_FVR323,BSEC fuse word 323 value register" hexmask.long 0x50C 0.--31. 1. "FV,fuse value" line.long 0x510 "BSEC_FVR324,BSEC fuse word 324 value register" hexmask.long 0x510 0.--31. 1. "FV,fuse value" line.long 0x514 "BSEC_FVR325,BSEC fuse word 325 value register" hexmask.long 0x514 0.--31. 1. "FV,fuse value" line.long 0x518 "BSEC_FVR326,BSEC fuse word 326 value register" hexmask.long 0x518 0.--31. 1. "FV,fuse value" line.long 0x51C "BSEC_FVR327,BSEC fuse word 327 value register" hexmask.long 0x51C 0.--31. 1. "FV,fuse value" line.long 0x520 "BSEC_FVR328,BSEC fuse word 328 value register" hexmask.long 0x520 0.--31. 1. "FV,fuse value" line.long 0x524 "BSEC_FVR329,BSEC fuse word 329 value register" hexmask.long 0x524 0.--31. 1. "FV,fuse value" line.long 0x528 "BSEC_FVR330,BSEC fuse word 330 value register" hexmask.long 0x528 0.--31. 1. "FV,fuse value" line.long 0x52C "BSEC_FVR331,BSEC fuse word 331 value register" hexmask.long 0x52C 0.--31. 1. "FV,fuse value" line.long 0x530 "BSEC_FVR332,BSEC fuse word 332 value register" hexmask.long 0x530 0.--31. 1. "FV,fuse value" line.long 0x534 "BSEC_FVR333,BSEC fuse word 333 value register" hexmask.long 0x534 0.--31. 1. "FV,fuse value" line.long 0x538 "BSEC_FVR334,BSEC fuse word 334 value register" hexmask.long 0x538 0.--31. 1. "FV,fuse value" line.long 0x53C "BSEC_FVR335,BSEC fuse word 335 value register" hexmask.long 0x53C 0.--31. 1. "FV,fuse value" line.long 0x540 "BSEC_FVR336,BSEC fuse word 336 value register" hexmask.long 0x540 0.--31. 1. "FV,fuse value" line.long 0x544 "BSEC_FVR337,BSEC fuse word 337 value register" hexmask.long 0x544 0.--31. 1. "FV,fuse value" line.long 0x548 "BSEC_FVR338,BSEC fuse word 338 value register" hexmask.long 0x548 0.--31. 1. "FV,fuse value" line.long 0x54C "BSEC_FVR339,BSEC fuse word 339 value register" hexmask.long 0x54C 0.--31. 1. "FV,fuse value" line.long 0x550 "BSEC_FVR340,BSEC fuse word 340 value register" hexmask.long 0x550 0.--31. 1. "FV,fuse value" line.long 0x554 "BSEC_FVR341,BSEC fuse word 341 value register" hexmask.long 0x554 0.--31. 1. "FV,fuse value" line.long 0x558 "BSEC_FVR342,BSEC fuse word 342 value register" hexmask.long 0x558 0.--31. 1. "FV,fuse value" line.long 0x55C "BSEC_FVR343,BSEC fuse word 343 value register" hexmask.long 0x55C 0.--31. 1. "FV,fuse value" line.long 0x560 "BSEC_FVR344,BSEC fuse word 344 value register" hexmask.long 0x560 0.--31. 1. "FV,fuse value" line.long 0x564 "BSEC_FVR345,BSEC fuse word 345 value register" hexmask.long 0x564 0.--31. 1. "FV,fuse value" line.long 0x568 "BSEC_FVR346,BSEC fuse word 346 value register" hexmask.long 0x568 0.--31. 1. "FV,fuse value" line.long 0x56C "BSEC_FVR347,BSEC fuse word 347 value register" hexmask.long 0x56C 0.--31. 1. "FV,fuse value" line.long 0x570 "BSEC_FVR348,BSEC fuse word 348 value register" hexmask.long 0x570 0.--31. 1. "FV,fuse value" line.long 0x574 "BSEC_FVR349,BSEC fuse word 349 value register" hexmask.long 0x574 0.--31. 1. "FV,fuse value" line.long 0x578 "BSEC_FVR350,BSEC fuse word 350 value register" hexmask.long 0x578 0.--31. 1. "FV,fuse value" line.long 0x57C "BSEC_FVR351,BSEC fuse word 351 value register" hexmask.long 0x57C 0.--31. 1. "FV,fuse value" line.long 0x580 "BSEC_FVR352,BSEC fuse word 352 value register" hexmask.long 0x580 0.--31. 1. "FV,fuse value" line.long 0x584 "BSEC_FVR353,BSEC fuse word 353 value register" hexmask.long 0x584 0.--31. 1. "FV,fuse value" line.long 0x588 "BSEC_FVR354,BSEC fuse word 354 value register" hexmask.long 0x588 0.--31. 1. "FV,fuse value" line.long 0x58C "BSEC_FVR355,BSEC fuse word 355 value register" hexmask.long 0x58C 0.--31. 1. "FV,fuse value" line.long 0x590 "BSEC_FVR356,BSEC fuse word 356 value register" hexmask.long 0x590 0.--31. 1. "FV,fuse value" line.long 0x594 "BSEC_FVR357,BSEC fuse word 357 value register" hexmask.long 0x594 0.--31. 1. "FV,fuse value" line.long 0x598 "BSEC_FVR358,BSEC fuse word 358 value register" hexmask.long 0x598 0.--31. 1. "FV,fuse value" line.long 0x59C "BSEC_FVR359,BSEC fuse word 359 value register" hexmask.long 0x59C 0.--31. 1. "FV,fuse value" line.long 0x5A0 "BSEC_FVR360,BSEC fuse word 360 value register" hexmask.long 0x5A0 0.--31. 1. "FV,fuse value" line.long 0x5A4 "BSEC_FVR361,BSEC fuse word 361 value register" hexmask.long 0x5A4 0.--31. 1. "FV,fuse value" line.long 0x5A8 "BSEC_FVR362,BSEC fuse word 362 value register" hexmask.long 0x5A8 0.--31. 1. "FV,fuse value" line.long 0x5AC "BSEC_FVR363,BSEC fuse word 363 value register" hexmask.long 0x5AC 0.--31. 1. "FV,fuse value" line.long 0x5B0 "BSEC_FVR364,BSEC fuse word 364 value register" hexmask.long 0x5B0 0.--31. 1. "FV,fuse value" line.long 0x5B4 "BSEC_FVR365,BSEC fuse word 365 value register" hexmask.long 0x5B4 0.--31. 1. "FV,fuse value" line.long 0x5B8 "BSEC_FVR366,BSEC fuse word 366 value register" hexmask.long 0x5B8 0.--31. 1. "FV,fuse value" line.long 0x5BC "BSEC_FVR367,BSEC fuse word 367 value register" hexmask.long 0x5BC 0.--31. 1. "FV,fuse value" line.long 0x5C0 "BSEC_FVR368,BSEC fuse word 368 value register" hexmask.long 0x5C0 0.--31. 1. "FV,fuse value" line.long 0x5C4 "BSEC_FVR369,BSEC fuse word 369 value register" hexmask.long 0x5C4 0.--31. 1. "FV,fuse value" line.long 0x5C8 "BSEC_FVR370,BSEC fuse word 370 value register" hexmask.long 0x5C8 0.--31. 1. "FV,fuse value" line.long 0x5CC "BSEC_FVR371,BSEC fuse word 371 value register" hexmask.long 0x5CC 0.--31. 1. "FV,fuse value" line.long 0x5D0 "BSEC_FVR372,BSEC fuse word 372 value register" hexmask.long 0x5D0 0.--31. 1. "FV,fuse value" line.long 0x5D4 "BSEC_FVR373,BSEC fuse word 373 value register" hexmask.long 0x5D4 0.--31. 1. "FV,fuse value" line.long 0x5D8 "BSEC_FVR374,BSEC fuse word 374 value register" hexmask.long 0x5D8 0.--31. 1. "FV,fuse value" line.long 0x5DC "BSEC_FVR375,BSEC fuse word 375 value register" hexmask.long 0x5DC 0.--31. 1. "FV,fuse value" group.long 0x800++0x2F line.long 0x0 "BSEC_SPLOCK0,BSEC sticky programming lock register 0" bitfld.long 0x0 31. "SPLOCK31,Sticky programming lock for word 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "SPLOCK30,Sticky programming lock for word 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "SPLOCK29,Sticky programming lock for word 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "SPLOCK28,Sticky programming lock for word 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "SPLOCK27,Sticky programming lock for word 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "SPLOCK26,Sticky programming lock for word 26" "B_0x0,B_0x1" bitfld.long 0x0 25. "SPLOCK25,Sticky programming lock for word 25" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "SPLOCK24,Sticky programming lock for word 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "SPLOCK23,Sticky programming lock for word 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "SPLOCK22,Sticky programming lock for word 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "SPLOCK21,Sticky programming lock for word 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "SPLOCK20,Sticky programming lock for word 20" "B_0x0,B_0x1" bitfld.long 0x0 19. "SPLOCK19,Sticky programming lock for word 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "SPLOCK18,Sticky programming lock for word 18" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "SPLOCK17,Sticky programming lock for word 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "SPLOCK16,Sticky programming lock for word 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "SPLOCK15,Sticky programming lock for word 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "SPLOCK14,Sticky programming lock for word 14" "B_0x0,B_0x1" bitfld.long 0x0 13. "SPLOCK13,Sticky programming lock for word 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "SPLOCK12,Sticky programming lock for word 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "SPLOCK11,Sticky programming lock for word 11" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "SPLOCK10,Sticky programming lock for word 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "SPLOCK9,Sticky programming lock for word 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "SPLOCK8,Sticky programming lock for word 8" "B_0x0,B_0x1" bitfld.long 0x0 7. "SPLOCK7,Sticky programming lock for word 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "SPLOCK6,Sticky programming lock for word 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "SPLOCK5,Sticky programming lock for word 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "SPLOCK4,Sticky programming lock for word 4" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SPLOCK3,Sticky programming lock for word 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "SPLOCK2,Sticky programming lock for word 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "SPLOCK1,Sticky programming lock for word 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPLOCK0,Sticky programming lock for word 0" "B_0x0,B_0x1" line.long 0x4 "BSEC_SPLOCK1,BSEC sticky programming lock register 1" bitfld.long 0x4 31. "SPLOCK63,Sticky programming lock for word 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "SPLOCK62,Sticky programming lock for word 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "SPLOCK61,Sticky programming lock for word 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "SPLOCK60,Sticky programming lock for word 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "SPLOCK59,Sticky programming lock for word 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "SPLOCK58,Sticky programming lock for word 58" "B_0x0,B_0x1" bitfld.long 0x4 25. "SPLOCK57,Sticky programming lock for word 57" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "SPLOCK56,Sticky programming lock for word 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "SPLOCK55,Sticky programming lock for word 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "SPLOCK54,Sticky programming lock for word 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "SPLOCK53,Sticky programming lock for word 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "SPLOCK52,Sticky programming lock for word 52" "B_0x0,B_0x1" bitfld.long 0x4 19. "SPLOCK51,Sticky programming lock for word 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "SPLOCK50,Sticky programming lock for word 50" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "SPLOCK49,Sticky programming lock for word 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "SPLOCK48,Sticky programming lock for word 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "SPLOCK47,Sticky programming lock for word 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "SPLOCK46,Sticky programming lock for word 46" "B_0x0,B_0x1" bitfld.long 0x4 13. "SPLOCK45,Sticky programming lock for word 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "SPLOCK44,Sticky programming lock for word 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "SPLOCK43,Sticky programming lock for word 43" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "SPLOCK42,Sticky programming lock for word 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "SPLOCK41,Sticky programming lock for word 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "SPLOCK40,Sticky programming lock for word 40" "B_0x0,B_0x1" bitfld.long 0x4 7. "SPLOCK39,Sticky programming lock for word 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "SPLOCK38,Sticky programming lock for word 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "SPLOCK37,Sticky programming lock for word 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "SPLOCK36,Sticky programming lock for word 36" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "SPLOCK35,Sticky programming lock for word 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "SPLOCK34,Sticky programming lock for word 34" "B_0x0,B_0x1" bitfld.long 0x4 1. "SPLOCK33,Sticky programming lock for word 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "SPLOCK32,Sticky programming lock for word 32" "B_0x0,B_0x1" line.long 0x8 "BSEC_SPLOCK2,BSEC sticky programming lock register 2" bitfld.long 0x8 31. "SPLOCK95,Sticky programming lock for word 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "SPLOCK94,Sticky programming lock for word 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "SPLOCK93,Sticky programming lock for word 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "SPLOCK92,Sticky programming lock for word 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "SPLOCK91,Sticky programming lock for word 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "SPLOCK90,Sticky programming lock for word 90" "B_0x0,B_0x1" bitfld.long 0x8 25. "SPLOCK89,Sticky programming lock for word 89" "B_0x0,B_0x1" newline bitfld.long 0x8 24. "SPLOCK88,Sticky programming lock for word 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "SPLOCK87,Sticky programming lock for word 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "SPLOCK86,Sticky programming lock for word 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "SPLOCK85,Sticky programming lock for word 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "SPLOCK84,Sticky programming lock for word 84" "B_0x0,B_0x1" bitfld.long 0x8 19. "SPLOCK83,Sticky programming lock for word 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "SPLOCK82,Sticky programming lock for word 82" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "SPLOCK81,Sticky programming lock for word 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "SPLOCK80,Sticky programming lock for word 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "SPLOCK79,Sticky programming lock for word 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "SPLOCK78,Sticky programming lock for word 78" "B_0x0,B_0x1" bitfld.long 0x8 13. "SPLOCK77,Sticky programming lock for word 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "SPLOCK76,Sticky programming lock for word 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "SPLOCK75,Sticky programming lock for word 75" "B_0x0,B_0x1" newline bitfld.long 0x8 10. "SPLOCK74,Sticky programming lock for word 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "SPLOCK73,Sticky programming lock for word 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "SPLOCK72,Sticky programming lock for word 72" "B_0x0,B_0x1" bitfld.long 0x8 7. "SPLOCK71,Sticky programming lock for word 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "SPLOCK70,Sticky programming lock for word 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "SPLOCK69,Sticky programming lock for word 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "SPLOCK68,Sticky programming lock for word 68" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "SPLOCK67,Sticky programming lock for word 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "SPLOCK66,Sticky programming lock for word 66" "B_0x0,B_0x1" bitfld.long 0x8 1. "SPLOCK65,Sticky programming lock for word 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "SPLOCK64,Sticky programming lock for word 64" "B_0x0,B_0x1" line.long 0xC "BSEC_SPLOCK3,BSEC sticky programming lock register 3" bitfld.long 0xC 31. "SPLOCK127,Sticky programming lock for word 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "SPLOCK126,Sticky programming lock for word 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "SPLOCK125,Sticky programming lock for word 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "SPLOCK124,Sticky programming lock for word 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "SPLOCK123,Sticky programming lock for word 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "SPLOCK122,Sticky programming lock for word 122" "B_0x0,B_0x1" bitfld.long 0xC 25. "SPLOCK121,Sticky programming lock for word 121" "B_0x0,B_0x1" newline bitfld.long 0xC 24. "SPLOCK120,Sticky programming lock for word 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "SPLOCK119,Sticky programming lock for word 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "SPLOCK118,Sticky programming lock for word 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "SPLOCK117,Sticky programming lock for word 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "SPLOCK116,Sticky programming lock for word 116" "B_0x0,B_0x1" bitfld.long 0xC 19. "SPLOCK115,Sticky programming lock for word 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "SPLOCK114,Sticky programming lock for word 114" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "SPLOCK113,Sticky programming lock for word 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "SPLOCK112,Sticky programming lock for word 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "SPLOCK111,Sticky programming lock for word 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "SPLOCK110,Sticky programming lock for word 110" "B_0x0,B_0x1" bitfld.long 0xC 13. "SPLOCK109,Sticky programming lock for word 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "SPLOCK108,Sticky programming lock for word 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "SPLOCK107,Sticky programming lock for word 107" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "SPLOCK106,Sticky programming lock for word 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "SPLOCK105,Sticky programming lock for word 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "SPLOCK104,Sticky programming lock for word 104" "B_0x0,B_0x1" bitfld.long 0xC 7. "SPLOCK103,Sticky programming lock for word 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "SPLOCK102,Sticky programming lock for word 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "SPLOCK101,Sticky programming lock for word 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "SPLOCK100,Sticky programming lock for word 100" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "SPLOCK99,Sticky programming lock for word 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "SPLOCK98,Sticky programming lock for word 98" "B_0x0,B_0x1" bitfld.long 0xC 1. "SPLOCK97,Sticky programming lock for word 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "SPLOCK96,Sticky programming lock for word 96" "B_0x0,B_0x1" line.long 0x10 "BSEC_SPLOCK4,BSEC sticky programming lock register 4" bitfld.long 0x10 31. "SPLOCK159,Sticky programming lock for word 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "SPLOCK158,Sticky programming lock for word 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "SPLOCK157,Sticky programming lock for word 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "SPLOCK156,Sticky programming lock for word 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "SPLOCK155,Sticky programming lock for word 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "SPLOCK154,Sticky programming lock for word 154" "B_0x0,B_0x1" bitfld.long 0x10 25. "SPLOCK153,Sticky programming lock for word 153" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "SPLOCK152,Sticky programming lock for word 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "SPLOCK151,Sticky programming lock for word 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "SPLOCK150,Sticky programming lock for word 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "SPLOCK149,Sticky programming lock for word 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "SPLOCK148,Sticky programming lock for word 148" "B_0x0,B_0x1" bitfld.long 0x10 19. "SPLOCK147,Sticky programming lock for word 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "SPLOCK146,Sticky programming lock for word 146" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "SPLOCK145,Sticky programming lock for word 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "SPLOCK144,Sticky programming lock for word 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "SPLOCK143,Sticky programming lock for word 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "SPLOCK142,Sticky programming lock for word 142" "B_0x0,B_0x1" bitfld.long 0x10 13. "SPLOCK141,Sticky programming lock for word 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "SPLOCK140,Sticky programming lock for word 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "SPLOCK139,Sticky programming lock for word 139" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "SPLOCK138,Sticky programming lock for word 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "SPLOCK137,Sticky programming lock for word 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "SPLOCK136,Sticky programming lock for word 136" "B_0x0,B_0x1" bitfld.long 0x10 7. "SPLOCK135,Sticky programming lock for word 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "SPLOCK134,Sticky programming lock for word 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "SPLOCK133,Sticky programming lock for word 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "SPLOCK132,Sticky programming lock for word 132" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "SPLOCK131,Sticky programming lock for word 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "SPLOCK130,Sticky programming lock for word 130" "B_0x0,B_0x1" bitfld.long 0x10 1. "SPLOCK129,Sticky programming lock for word 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "SPLOCK128,Sticky programming lock for word 128" "B_0x0,B_0x1" line.long 0x14 "BSEC_SPLOCK5,BSEC sticky programming lock register 5" bitfld.long 0x14 31. "SPLOCK191,Sticky programming lock for word 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "SPLOCK190,Sticky programming lock for word 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "SPLOCK189,Sticky programming lock for word 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "SPLOCK188,Sticky programming lock for word 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "SPLOCK187,Sticky programming lock for word 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "SPLOCK186,Sticky programming lock for word 186" "B_0x0,B_0x1" bitfld.long 0x14 25. "SPLOCK185,Sticky programming lock for word 185" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "SPLOCK184,Sticky programming lock for word 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "SPLOCK183,Sticky programming lock for word 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "SPLOCK182,Sticky programming lock for word 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "SPLOCK181,Sticky programming lock for word 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "SPLOCK180,Sticky programming lock for word 180" "B_0x0,B_0x1" bitfld.long 0x14 19. "SPLOCK179,Sticky programming lock for word 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "SPLOCK178,Sticky programming lock for word 178" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "SPLOCK177,Sticky programming lock for word 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "SPLOCK176,Sticky programming lock for word 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "SPLOCK175,Sticky programming lock for word 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "SPLOCK174,Sticky programming lock for word 174" "B_0x0,B_0x1" bitfld.long 0x14 13. "SPLOCK173,Sticky programming lock for word 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "SPLOCK172,Sticky programming lock for word 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "SPLOCK171,Sticky programming lock for word 171" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "SPLOCK170,Sticky programming lock for word 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "SPLOCK169,Sticky programming lock for word 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "SPLOCK168,Sticky programming lock for word 168" "B_0x0,B_0x1" bitfld.long 0x14 7. "SPLOCK167,Sticky programming lock for word 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "SPLOCK166,Sticky programming lock for word 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "SPLOCK165,Sticky programming lock for word 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "SPLOCK164,Sticky programming lock for word 164" "B_0x0,B_0x1" newline bitfld.long 0x14 3. "SPLOCK163,Sticky programming lock for word 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "SPLOCK162,Sticky programming lock for word 162" "B_0x0,B_0x1" bitfld.long 0x14 1. "SPLOCK161,Sticky programming lock for word 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "SPLOCK160,Sticky programming lock for word 160" "B_0x0,B_0x1" line.long 0x18 "BSEC_SPLOCK6,BSEC sticky programming lock register 6" bitfld.long 0x18 31. "SPLOCK223,Sticky programming lock for word 223" "B_0x0,B_0x1" bitfld.long 0x18 30. "SPLOCK222,Sticky programming lock for word 222" "B_0x0,B_0x1" bitfld.long 0x18 29. "SPLOCK221,Sticky programming lock for word 221" "B_0x0,B_0x1" bitfld.long 0x18 28. "SPLOCK220,Sticky programming lock for word 220" "B_0x0,B_0x1" bitfld.long 0x18 27. "SPLOCK219,Sticky programming lock for word 219" "B_0x0,B_0x1" bitfld.long 0x18 26. "SPLOCK218,Sticky programming lock for word 218" "B_0x0,B_0x1" bitfld.long 0x18 25. "SPLOCK217,Sticky programming lock for word 217" "B_0x0,B_0x1" newline bitfld.long 0x18 24. "SPLOCK216,Sticky programming lock for word 216" "B_0x0,B_0x1" bitfld.long 0x18 23. "SPLOCK215,Sticky programming lock for word 215" "B_0x0,B_0x1" bitfld.long 0x18 22. "SPLOCK214,Sticky programming lock for word 214" "B_0x0,B_0x1" bitfld.long 0x18 21. "SPLOCK213,Sticky programming lock for word 213" "B_0x0,B_0x1" bitfld.long 0x18 20. "SPLOCK212,Sticky programming lock for word 212" "B_0x0,B_0x1" bitfld.long 0x18 19. "SPLOCK211,Sticky programming lock for word 211" "B_0x0,B_0x1" bitfld.long 0x18 18. "SPLOCK210,Sticky programming lock for word 210" "B_0x0,B_0x1" newline bitfld.long 0x18 17. "SPLOCK209,Sticky programming lock for word 209" "B_0x0,B_0x1" bitfld.long 0x18 16. "SPLOCK208,Sticky programming lock for word 208" "B_0x0,B_0x1" bitfld.long 0x18 15. "SPLOCK207,Sticky programming lock for word 207" "B_0x0,B_0x1" bitfld.long 0x18 14. "SPLOCK206,Sticky programming lock for word 206" "B_0x0,B_0x1" bitfld.long 0x18 13. "SPLOCK205,Sticky programming lock for word 205" "B_0x0,B_0x1" bitfld.long 0x18 12. "SPLOCK204,Sticky programming lock for word 204" "B_0x0,B_0x1" bitfld.long 0x18 11. "SPLOCK203,Sticky programming lock for word 203" "B_0x0,B_0x1" newline bitfld.long 0x18 10. "SPLOCK202,Sticky programming lock for word 202" "B_0x0,B_0x1" bitfld.long 0x18 9. "SPLOCK201,Sticky programming lock for word 201" "B_0x0,B_0x1" bitfld.long 0x18 8. "SPLOCK200,Sticky programming lock for word 200" "B_0x0,B_0x1" bitfld.long 0x18 7. "SPLOCK199,Sticky programming lock for word 199" "B_0x0,B_0x1" bitfld.long 0x18 6. "SPLOCK198,Sticky programming lock for word 198" "B_0x0,B_0x1" bitfld.long 0x18 5. "SPLOCK197,Sticky programming lock for word 197" "B_0x0,B_0x1" bitfld.long 0x18 4. "SPLOCK196,Sticky programming lock for word 196" "B_0x0,B_0x1" newline bitfld.long 0x18 3. "SPLOCK195,Sticky programming lock for word 195" "B_0x0,B_0x1" bitfld.long 0x18 2. "SPLOCK194,Sticky programming lock for word 194" "B_0x0,B_0x1" bitfld.long 0x18 1. "SPLOCK193,Sticky programming lock for word 193" "B_0x0,B_0x1" bitfld.long 0x18 0. "SPLOCK192,Sticky programming lock for word 192" "B_0x0,B_0x1" line.long 0x1C "BSEC_SPLOCK7,BSEC sticky programming lock register 7" bitfld.long 0x1C 31. "SPLOCK255,Sticky programming lock for word 255" "B_0x0,B_0x1" bitfld.long 0x1C 30. "SPLOCK254,Sticky programming lock for word 254" "B_0x0,B_0x1" bitfld.long 0x1C 29. "SPLOCK253,Sticky programming lock for word 253" "B_0x0,B_0x1" bitfld.long 0x1C 28. "SPLOCK252,Sticky programming lock for word 252" "B_0x0,B_0x1" bitfld.long 0x1C 27. "SPLOCK251,Sticky programming lock for word 251" "B_0x0,B_0x1" bitfld.long 0x1C 26. "SPLOCK250,Sticky programming lock for word 250" "B_0x0,B_0x1" bitfld.long 0x1C 25. "SPLOCK249,Sticky programming lock for word 249" "B_0x0,B_0x1" newline bitfld.long 0x1C 24. "SPLOCK248,Sticky programming lock for word 248" "B_0x0,B_0x1" bitfld.long 0x1C 23. "SPLOCK247,Sticky programming lock for word 247" "B_0x0,B_0x1" bitfld.long 0x1C 22. "SPLOCK246,Sticky programming lock for word 246" "B_0x0,B_0x1" bitfld.long 0x1C 21. "SPLOCK245,Sticky programming lock for word 245" "B_0x0,B_0x1" bitfld.long 0x1C 20. "SPLOCK244,Sticky programming lock for word 244" "B_0x0,B_0x1" bitfld.long 0x1C 19. "SPLOCK243,Sticky programming lock for word 243" "B_0x0,B_0x1" bitfld.long 0x1C 18. "SPLOCK242,Sticky programming lock for word 242" "B_0x0,B_0x1" newline bitfld.long 0x1C 17. "SPLOCK241,Sticky programming lock for word 241" "B_0x0,B_0x1" bitfld.long 0x1C 16. "SPLOCK240,Sticky programming lock for word 240" "B_0x0,B_0x1" bitfld.long 0x1C 15. "SPLOCK239,Sticky programming lock for word 239" "B_0x0,B_0x1" bitfld.long 0x1C 14. "SPLOCK238,Sticky programming lock for word 238" "B_0x0,B_0x1" bitfld.long 0x1C 13. "SPLOCK237,Sticky programming lock for word 237" "B_0x0,B_0x1" bitfld.long 0x1C 12. "SPLOCK236,Sticky programming lock for word 236" "B_0x0,B_0x1" bitfld.long 0x1C 11. "SPLOCK235,Sticky programming lock for word 235" "B_0x0,B_0x1" newline bitfld.long 0x1C 10. "SPLOCK234,Sticky programming lock for word 234" "B_0x0,B_0x1" bitfld.long 0x1C 9. "SPLOCK233,Sticky programming lock for word 233" "B_0x0,B_0x1" bitfld.long 0x1C 8. "SPLOCK232,Sticky programming lock for word 232" "B_0x0,B_0x1" bitfld.long 0x1C 7. "SPLOCK231,Sticky programming lock for word 231" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SPLOCK230,Sticky programming lock for word 230" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SPLOCK229,Sticky programming lock for word 229" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SPLOCK228,Sticky programming lock for word 228" "B_0x0,B_0x1" newline bitfld.long 0x1C 3. "SPLOCK227,Sticky programming lock for word 227" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SPLOCK226,Sticky programming lock for word 226" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SPLOCK225,Sticky programming lock for word 225" "B_0x0,B_0x1" bitfld.long 0x1C 0. "SPLOCK224,Sticky programming lock for word 224" "B_0x0,B_0x1" line.long 0x20 "BSEC_SPLOCK8,BSEC sticky programming lock register 8" bitfld.long 0x20 31. "SPLOCK287,Sticky programming lock for word 287" "B_0x0,B_0x1" bitfld.long 0x20 30. "SPLOCK286,Sticky programming lock for word 286" "B_0x0,B_0x1" bitfld.long 0x20 29. "SPLOCK285,Sticky programming lock for word 285" "B_0x0,B_0x1" bitfld.long 0x20 28. "SPLOCK284,Sticky programming lock for word 284" "B_0x0,B_0x1" bitfld.long 0x20 27. "SPLOCK283,Sticky programming lock for word 283" "B_0x0,B_0x1" bitfld.long 0x20 26. "SPLOCK282,Sticky programming lock for word 282" "B_0x0,B_0x1" bitfld.long 0x20 25. "SPLOCK281,Sticky programming lock for word 281" "B_0x0,B_0x1" newline bitfld.long 0x20 24. "SPLOCK280,Sticky programming lock for word 280" "B_0x0,B_0x1" bitfld.long 0x20 23. "SPLOCK279,Sticky programming lock for word 279" "B_0x0,B_0x1" bitfld.long 0x20 22. "SPLOCK278,Sticky programming lock for word 278" "B_0x0,B_0x1" bitfld.long 0x20 21. "SPLOCK277,Sticky programming lock for word 277" "B_0x0,B_0x1" bitfld.long 0x20 20. "SPLOCK276,Sticky programming lock for word 276" "B_0x0,B_0x1" bitfld.long 0x20 19. "SPLOCK275,Sticky programming lock for word 275" "B_0x0,B_0x1" bitfld.long 0x20 18. "SPLOCK274,Sticky programming lock for word 274" "B_0x0,B_0x1" newline bitfld.long 0x20 17. "SPLOCK273,Sticky programming lock for word 273" "B_0x0,B_0x1" bitfld.long 0x20 16. "SPLOCK272,Sticky programming lock for word 272" "B_0x0,B_0x1" bitfld.long 0x20 15. "SPLOCK271,Sticky programming lock for word 271" "B_0x0,B_0x1" bitfld.long 0x20 14. "SPLOCK270,Sticky programming lock for word 270" "B_0x0,B_0x1" bitfld.long 0x20 13. "SPLOCK269,Sticky programming lock for word 269" "B_0x0,B_0x1" bitfld.long 0x20 12. "SPLOCK268,Sticky programming lock for word 268" "B_0x0,B_0x1" bitfld.long 0x20 11. "SPLOCK267,Sticky programming lock for word 267" "B_0x0,B_0x1" newline bitfld.long 0x20 10. "SPLOCK266,Sticky programming lock for word 266" "B_0x0,B_0x1" bitfld.long 0x20 9. "SPLOCK265,Sticky programming lock for word 265" "B_0x0,B_0x1" bitfld.long 0x20 8. "SPLOCK264,Sticky programming lock for word 264" "B_0x0,B_0x1" bitfld.long 0x20 7. "SPLOCK263,Sticky programming lock for word 263" "B_0x0,B_0x1" bitfld.long 0x20 6. "SPLOCK262,Sticky programming lock for word 262" "B_0x0,B_0x1" bitfld.long 0x20 5. "SPLOCK261,Sticky programming lock for word 261" "B_0x0,B_0x1" bitfld.long 0x20 4. "SPLOCK260,Sticky programming lock for word 260" "B_0x0,B_0x1" newline bitfld.long 0x20 3. "SPLOCK259,Sticky programming lock for word 259" "B_0x0,B_0x1" bitfld.long 0x20 2. "SPLOCK258,Sticky programming lock for word 258" "B_0x0,B_0x1" bitfld.long 0x20 1. "SPLOCK257,Sticky programming lock for word 257" "B_0x0,B_0x1" bitfld.long 0x20 0. "SPLOCK256,Sticky programming lock for word 256" "B_0x0,B_0x1" line.long 0x24 "BSEC_SPLOCK9,BSEC sticky programming lock register 9" bitfld.long 0x24 31. "SPLOCK319,Sticky programming lock for word 319" "B_0x0,B_0x1" bitfld.long 0x24 30. "SPLOCK318,Sticky programming lock for word 318" "B_0x0,B_0x1" bitfld.long 0x24 29. "SPLOCK317,Sticky programming lock for word 317" "B_0x0,B_0x1" bitfld.long 0x24 28. "SPLOCK316,Sticky programming lock for word 316" "B_0x0,B_0x1" bitfld.long 0x24 27. "SPLOCK315,Sticky programming lock for word 315" "B_0x0,B_0x1" bitfld.long 0x24 26. "SPLOCK314,Sticky programming lock for word 314" "B_0x0,B_0x1" bitfld.long 0x24 25. "SPLOCK313,Sticky programming lock for word 313" "B_0x0,B_0x1" newline bitfld.long 0x24 24. "SPLOCK312,Sticky programming lock for word 312" "B_0x0,B_0x1" bitfld.long 0x24 23. "SPLOCK311,Sticky programming lock for word 311" "B_0x0,B_0x1" bitfld.long 0x24 22. "SPLOCK310,Sticky programming lock for word 310" "B_0x0,B_0x1" bitfld.long 0x24 21. "SPLOCK309,Sticky programming lock for word 309" "B_0x0,B_0x1" bitfld.long 0x24 20. "SPLOCK308,Sticky programming lock for word 308" "B_0x0,B_0x1" bitfld.long 0x24 19. "SPLOCK307,Sticky programming lock for word 307" "B_0x0,B_0x1" bitfld.long 0x24 18. "SPLOCK306,Sticky programming lock for word 306" "B_0x0,B_0x1" newline bitfld.long 0x24 17. "SPLOCK305,Sticky programming lock for word 305" "B_0x0,B_0x1" bitfld.long 0x24 16. "SPLOCK304,Sticky programming lock for word 304" "B_0x0,B_0x1" bitfld.long 0x24 15. "SPLOCK303,Sticky programming lock for word 303" "B_0x0,B_0x1" bitfld.long 0x24 14. "SPLOCK302,Sticky programming lock for word 302" "B_0x0,B_0x1" bitfld.long 0x24 13. "SPLOCK301,Sticky programming lock for word 301" "B_0x0,B_0x1" bitfld.long 0x24 12. "SPLOCK300,Sticky programming lock for word 300" "B_0x0,B_0x1" bitfld.long 0x24 11. "SPLOCK299,Sticky programming lock for word 299" "B_0x0,B_0x1" newline bitfld.long 0x24 10. "SPLOCK298,Sticky programming lock for word 298" "B_0x0,B_0x1" bitfld.long 0x24 9. "SPLOCK297,Sticky programming lock for word 297" "B_0x0,B_0x1" bitfld.long 0x24 8. "SPLOCK296,Sticky programming lock for word 296" "B_0x0,B_0x1" bitfld.long 0x24 7. "SPLOCK295,Sticky programming lock for word 295" "B_0x0,B_0x1" bitfld.long 0x24 6. "SPLOCK294,Sticky programming lock for word 294" "B_0x0,B_0x1" bitfld.long 0x24 5. "SPLOCK293,Sticky programming lock for word 293" "B_0x0,B_0x1" bitfld.long 0x24 4. "SPLOCK292,Sticky programming lock for word 292" "B_0x0,B_0x1" newline bitfld.long 0x24 3. "SPLOCK291,Sticky programming lock for word 291" "B_0x0,B_0x1" bitfld.long 0x24 2. "SPLOCK290,Sticky programming lock for word 290" "B_0x0,B_0x1" bitfld.long 0x24 1. "SPLOCK289,Sticky programming lock for word 289" "B_0x0,B_0x1" bitfld.long 0x24 0. "SPLOCK288,Sticky programming lock for word 288" "B_0x0,B_0x1" line.long 0x28 "BSEC_SPLOCK10,BSEC sticky programming lock register 10" bitfld.long 0x28 31. "SPLOCK351,Sticky programming lock for word 351" "B_0x0,B_0x1" bitfld.long 0x28 30. "SPLOCK350,Sticky programming lock for word 350" "B_0x0,B_0x1" bitfld.long 0x28 29. "SPLOCK349,Sticky programming lock for word 349" "B_0x0,B_0x1" bitfld.long 0x28 28. "SPLOCK348,Sticky programming lock for word 348" "B_0x0,B_0x1" bitfld.long 0x28 27. "SPLOCK347,Sticky programming lock for word 347" "B_0x0,B_0x1" bitfld.long 0x28 26. "SPLOCK346,Sticky programming lock for word 346" "B_0x0,B_0x1" bitfld.long 0x28 25. "SPLOCK345,Sticky programming lock for word 345" "B_0x0,B_0x1" newline bitfld.long 0x28 24. "SPLOCK344,Sticky programming lock for word 344" "B_0x0,B_0x1" bitfld.long 0x28 23. "SPLOCK343,Sticky programming lock for word 343" "B_0x0,B_0x1" bitfld.long 0x28 22. "SPLOCK342,Sticky programming lock for word 342" "B_0x0,B_0x1" bitfld.long 0x28 21. "SPLOCK341,Sticky programming lock for word 341" "B_0x0,B_0x1" bitfld.long 0x28 20. "SPLOCK340,Sticky programming lock for word 340" "B_0x0,B_0x1" bitfld.long 0x28 19. "SPLOCK339,Sticky programming lock for word 339" "B_0x0,B_0x1" bitfld.long 0x28 18. "SPLOCK338,Sticky programming lock for word 338" "B_0x0,B_0x1" newline bitfld.long 0x28 17. "SPLOCK337,Sticky programming lock for word 337" "B_0x0,B_0x1" bitfld.long 0x28 16. "SPLOCK336,Sticky programming lock for word 336" "B_0x0,B_0x1" bitfld.long 0x28 15. "SPLOCK335,Sticky programming lock for word 335" "B_0x0,B_0x1" bitfld.long 0x28 14. "SPLOCK334,Sticky programming lock for word 334" "B_0x0,B_0x1" bitfld.long 0x28 13. "SPLOCK333,Sticky programming lock for word 333" "B_0x0,B_0x1" bitfld.long 0x28 12. "SPLOCK332,Sticky programming lock for word 332" "B_0x0,B_0x1" bitfld.long 0x28 11. "SPLOCK331,Sticky programming lock for word 331" "B_0x0,B_0x1" newline bitfld.long 0x28 10. "SPLOCK330,Sticky programming lock for word 330" "B_0x0,B_0x1" bitfld.long 0x28 9. "SPLOCK329,Sticky programming lock for word 329" "B_0x0,B_0x1" bitfld.long 0x28 8. "SPLOCK328,Sticky programming lock for word 328" "B_0x0,B_0x1" bitfld.long 0x28 7. "SPLOCK327,Sticky programming lock for word 327" "B_0x0,B_0x1" bitfld.long 0x28 6. "SPLOCK326,Sticky programming lock for word 326" "B_0x0,B_0x1" bitfld.long 0x28 5. "SPLOCK325,Sticky programming lock for word 325" "B_0x0,B_0x1" bitfld.long 0x28 4. "SPLOCK324,Sticky programming lock for word 324" "B_0x0,B_0x1" newline bitfld.long 0x28 3. "SPLOCK323,Sticky programming lock for word 323" "B_0x0,B_0x1" bitfld.long 0x28 2. "SPLOCK322,Sticky programming lock for word 322" "B_0x0,B_0x1" bitfld.long 0x28 1. "SPLOCK321,Sticky programming lock for word 321" "B_0x0,B_0x1" bitfld.long 0x28 0. "SPLOCK320,Sticky programming lock for word 320" "B_0x0,B_0x1" line.long 0x2C "BSEC_SPLOCK11,BSEC sticky programming lock register 11" bitfld.long 0x2C 31. "SPLOCK383,Sticky programming lock for word 383" "B_0x0,B_0x1" bitfld.long 0x2C 30. "SPLOCK382,Sticky programming lock for word 382" "B_0x0,B_0x1" bitfld.long 0x2C 29. "SPLOCK381,Sticky programming lock for word 381" "B_0x0,B_0x1" bitfld.long 0x2C 28. "SPLOCK380,Sticky programming lock for word 380" "B_0x0,B_0x1" bitfld.long 0x2C 27. "SPLOCK379,Sticky programming lock for word 379" "B_0x0,B_0x1" bitfld.long 0x2C 26. "SPLOCK378,Sticky programming lock for word 378" "B_0x0,B_0x1" bitfld.long 0x2C 25. "SPLOCK377,Sticky programming lock for word 377" "B_0x0,B_0x1" newline bitfld.long 0x2C 24. "SPLOCK376,Sticky programming lock for word 376" "B_0x0,B_0x1" bitfld.long 0x2C 23. "SPLOCK375,Sticky programming lock for word 375" "B_0x0,B_0x1" bitfld.long 0x2C 22. "SPLOCK374,Sticky programming lock for word 374" "B_0x0,B_0x1" bitfld.long 0x2C 21. "SPLOCK373,Sticky programming lock for word 373" "B_0x0,B_0x1" bitfld.long 0x2C 20. "SPLOCK372,Sticky programming lock for word 372" "B_0x0,B_0x1" bitfld.long 0x2C 19. "SPLOCK371,Sticky programming lock for word 371" "B_0x0,B_0x1" bitfld.long 0x2C 18. "SPLOCK370,Sticky programming lock for word 370" "B_0x0,B_0x1" newline bitfld.long 0x2C 17. "SPLOCK369,Sticky programming lock for word 369" "B_0x0,B_0x1" bitfld.long 0x2C 16. "SPLOCK368,Sticky programming lock for word 368" "B_0x0,B_0x1" bitfld.long 0x2C 15. "SPLOCK367,Sticky programming lock for word 367" "B_0x0,B_0x1" bitfld.long 0x2C 14. "SPLOCK366,Sticky programming lock for word 366" "B_0x0,B_0x1" bitfld.long 0x2C 13. "SPLOCK365,Sticky programming lock for word 365" "B_0x0,B_0x1" bitfld.long 0x2C 12. "SPLOCK364,Sticky programming lock for word 364" "B_0x0,B_0x1" bitfld.long 0x2C 11. "SPLOCK363,Sticky programming lock for word 363" "B_0x0,B_0x1" newline bitfld.long 0x2C 10. "SPLOCK362,Sticky programming lock for word 362" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SPLOCK361,Sticky programming lock for word 361" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SPLOCK360,Sticky programming lock for word 360" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SPLOCK359,Sticky programming lock for word 359" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SPLOCK358,Sticky programming lock for word 358" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SPLOCK357,Sticky programming lock for word 357" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SPLOCK356,Sticky programming lock for word 356" "B_0x0,B_0x1" newline bitfld.long 0x2C 3. "SPLOCK355,Sticky programming lock for word 355" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SPLOCK354,Sticky programming lock for word 354" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SPLOCK353,Sticky programming lock for word 353" "B_0x0,B_0x1" bitfld.long 0x2C 0. "SPLOCK352,Sticky programming lock for word 352" "B_0x0,B_0x1" group.long 0x840++0x2F line.long 0x0 "BSEC_SWLOCK0,BSEC sticky write lock register 0" bitfld.long 0x0 31. "SWLOCK31,sticky write lock for shadow register 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "SWLOCK30,sticky write lock for shadow register 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "SWLOCK29,sticky write lock for shadow register 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "SWLOCK28,sticky write lock for shadow register 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "SWLOCK27,sticky write lock for shadow register 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "SWLOCK26,sticky write lock for shadow register 26" "B_0x0,B_0x1" bitfld.long 0x0 25. "SWLOCK25,sticky write lock for shadow register 25" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "SWLOCK24,sticky write lock for shadow register 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "SWLOCK23,sticky write lock for shadow register 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "SWLOCK22,sticky write lock for shadow register 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "SWLOCK21,sticky write lock for shadow register 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "SWLOCK20,sticky write lock for shadow register 20" "B_0x0,B_0x1" bitfld.long 0x0 19. "SWLOCK19,sticky write lock for shadow register 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "SWLOCK18,sticky write lock for shadow register 18" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "SWLOCK17,sticky write lock for shadow register 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "SWLOCK16,sticky write lock for shadow register 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "SWLOCK15,sticky write lock for shadow register 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "SWLOCK14,sticky write lock for shadow register 14" "B_0x0,B_0x1" bitfld.long 0x0 13. "SWLOCK13,sticky write lock for shadow register 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "SWLOCK12,sticky write lock for shadow register 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "SWLOCK11,sticky write lock for shadow register 11" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "SWLOCK10,sticky write lock for shadow register 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "SWLOCK9,sticky write lock for shadow register 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "SWLOCK8,sticky write lock for shadow register 8" "B_0x0,B_0x1" bitfld.long 0x0 7. "SWLOCK7,sticky write lock for shadow register 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "SWLOCK6,sticky write lock for shadow register 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "SWLOCK5,sticky write lock for shadow register 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "SWLOCK4,sticky write lock for shadow register 4" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SWLOCK3,sticky write lock for shadow register 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "SWLOCK2,sticky write lock for shadow register 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "SWLOCK1,sticky write lock for shadow register 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "SWLOCK0,sticky write lock for shadow register 0" "B_0x0,B_0x1" line.long 0x4 "BSEC_SWLOCK1,BSEC sticky write lock register 1" bitfld.long 0x4 31. "SWLOCK63,sticky write lock for shadow register 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "SWLOCK62,sticky write lock for shadow register 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "SWLOCK61,sticky write lock for shadow register 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "SWLOCK60,sticky write lock for shadow register 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "SWLOCK59,sticky write lock for shadow register 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "SWLOCK58,sticky write lock for shadow register 58" "B_0x0,B_0x1" bitfld.long 0x4 25. "SWLOCK57,sticky write lock for shadow register 57" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "SWLOCK56,sticky write lock for shadow register 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "SWLOCK55,sticky write lock for shadow register 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "SWLOCK54,sticky write lock for shadow register 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "SWLOCK53,sticky write lock for shadow register 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "SWLOCK52,sticky write lock for shadow register 52" "B_0x0,B_0x1" bitfld.long 0x4 19. "SWLOCK51,sticky write lock for shadow register 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "SWLOCK50,sticky write lock for shadow register 50" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "SWLOCK49,sticky write lock for shadow register 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "SWLOCK48,sticky write lock for shadow register 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWLOCK47,sticky write lock for shadow register 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "SWLOCK46,sticky write lock for shadow register 46" "B_0x0,B_0x1" bitfld.long 0x4 13. "SWLOCK45,sticky write lock for shadow register 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "SWLOCK44,sticky write lock for shadow register 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "SWLOCK43,sticky write lock for shadow register 43" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "SWLOCK42,sticky write lock for shadow register 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWLOCK41,sticky write lock for shadow register 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "SWLOCK40,sticky write lock for shadow register 40" "B_0x0,B_0x1" bitfld.long 0x4 7. "SWLOCK39,sticky write lock for shadow register 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "SWLOCK38,sticky write lock for shadow register 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "SWLOCK37,sticky write lock for shadow register 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "SWLOCK36,sticky write lock for shadow register 36" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "SWLOCK35,sticky write lock for shadow register 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "SWLOCK34,sticky write lock for shadow register 34" "B_0x0,B_0x1" bitfld.long 0x4 1. "SWLOCK33,sticky write lock for shadow register 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "SWLOCK32,sticky write lock for shadow register 32" "B_0x0,B_0x1" line.long 0x8 "BSEC_SWLOCK2,BSEC sticky write lock register 2" bitfld.long 0x8 31. "SWLOCK95,sticky write lock for shadow register 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "SWLOCK94,sticky write lock for shadow register 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "SWLOCK93,sticky write lock for shadow register 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "SWLOCK92,sticky write lock for shadow register 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "SWLOCK91,sticky write lock for shadow register 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "SWLOCK90,sticky write lock for shadow register 90" "B_0x0,B_0x1" bitfld.long 0x8 25. "SWLOCK89,sticky write lock for shadow register 89" "B_0x0,B_0x1" newline bitfld.long 0x8 24. "SWLOCK88,sticky write lock for shadow register 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "SWLOCK87,sticky write lock for shadow register 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "SWLOCK86,sticky write lock for shadow register 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "SWLOCK85,sticky write lock for shadow register 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "SWLOCK84,sticky write lock for shadow register 84" "B_0x0,B_0x1" bitfld.long 0x8 19. "SWLOCK83,sticky write lock for shadow register 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "SWLOCK82,sticky write lock for shadow register 82" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "SWLOCK81,sticky write lock for shadow register 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "SWLOCK80,sticky write lock for shadow register 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "SWLOCK79,sticky write lock for shadow register 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "SWLOCK78,sticky write lock for shadow register 78" "B_0x0,B_0x1" bitfld.long 0x8 13. "SWLOCK77,sticky write lock for shadow register 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "SWLOCK76,sticky write lock for shadow register 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "SWLOCK75,sticky write lock for shadow register 75" "B_0x0,B_0x1" newline bitfld.long 0x8 10. "SWLOCK74,sticky write lock for shadow register 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "SWLOCK73,sticky write lock for shadow register 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "SWLOCK72,sticky write lock for shadow register 72" "B_0x0,B_0x1" bitfld.long 0x8 7. "SWLOCK71,sticky write lock for shadow register 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "SWLOCK70,sticky write lock for shadow register 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "SWLOCK69,sticky write lock for shadow register 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "SWLOCK68,sticky write lock for shadow register 68" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "SWLOCK67,sticky write lock for shadow register 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "SWLOCK66,sticky write lock for shadow register 66" "B_0x0,B_0x1" bitfld.long 0x8 1. "SWLOCK65,sticky write lock for shadow register 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "SWLOCK64,sticky write lock for shadow register 64" "B_0x0,B_0x1" line.long 0xC "BSEC_SWLOCK3,BSEC sticky write lock register 3" bitfld.long 0xC 31. "SWLOCK127,sticky write lock for shadow register 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "SWLOCK126,sticky write lock for shadow register 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "SWLOCK125,sticky write lock for shadow register 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "SWLOCK124,sticky write lock for shadow register 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "SWLOCK123,sticky write lock for shadow register 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "SWLOCK122,sticky write lock for shadow register 122" "B_0x0,B_0x1" bitfld.long 0xC 25. "SWLOCK121,sticky write lock for shadow register 121" "B_0x0,B_0x1" newline bitfld.long 0xC 24. "SWLOCK120,sticky write lock for shadow register 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "SWLOCK119,sticky write lock for shadow register 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "SWLOCK118,sticky write lock for shadow register 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "SWLOCK117,sticky write lock for shadow register 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "SWLOCK116,sticky write lock for shadow register 116" "B_0x0,B_0x1" bitfld.long 0xC 19. "SWLOCK115,sticky write lock for shadow register 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "SWLOCK114,sticky write lock for shadow register 114" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "SWLOCK113,sticky write lock for shadow register 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "SWLOCK112,sticky write lock for shadow register 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "SWLOCK111,sticky write lock for shadow register 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "SWLOCK110,sticky write lock for shadow register 110" "B_0x0,B_0x1" bitfld.long 0xC 13. "SWLOCK109,sticky write lock for shadow register 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "SWLOCK108,sticky write lock for shadow register 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "SWLOCK107,sticky write lock for shadow register 107" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "SWLOCK106,sticky write lock for shadow register 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "SWLOCK105,sticky write lock for shadow register 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "SWLOCK104,sticky write lock for shadow register 104" "B_0x0,B_0x1" bitfld.long 0xC 7. "SWLOCK103,sticky write lock for shadow register 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "SWLOCK102,sticky write lock for shadow register 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "SWLOCK101,sticky write lock for shadow register 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "SWLOCK100,sticky write lock for shadow register 100" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "SWLOCK99,sticky write lock for shadow register 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "SWLOCK98,sticky write lock for shadow register 98" "B_0x0,B_0x1" bitfld.long 0xC 1. "SWLOCK97,sticky write lock for shadow register 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "SWLOCK96,sticky write lock for shadow register 96" "B_0x0,B_0x1" line.long 0x10 "BSEC_SWLOCK4,BSEC sticky write lock register 4" bitfld.long 0x10 31. "SWLOCK159,sticky write lock for shadow register 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "SWLOCK158,sticky write lock for shadow register 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "SWLOCK157,sticky write lock for shadow register 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "SWLOCK156,sticky write lock for shadow register 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "SWLOCK155,sticky write lock for shadow register 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "SWLOCK154,sticky write lock for shadow register 154" "B_0x0,B_0x1" bitfld.long 0x10 25. "SWLOCK153,sticky write lock for shadow register 153" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "SWLOCK152,sticky write lock for shadow register 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "SWLOCK151,sticky write lock for shadow register 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "SWLOCK150,sticky write lock for shadow register 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "SWLOCK149,sticky write lock for shadow register 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "SWLOCK148,sticky write lock for shadow register 148" "B_0x0,B_0x1" bitfld.long 0x10 19. "SWLOCK147,sticky write lock for shadow register 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "SWLOCK146,sticky write lock for shadow register 146" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "SWLOCK145,sticky write lock for shadow register 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "SWLOCK144,sticky write lock for shadow register 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "SWLOCK143,sticky write lock for shadow register 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "SWLOCK142,sticky write lock for shadow register 142" "B_0x0,B_0x1" bitfld.long 0x10 13. "SWLOCK141,sticky write lock for shadow register 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "SWLOCK140,sticky write lock for shadow register 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "SWLOCK139,sticky write lock for shadow register 139" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "SWLOCK138,sticky write lock for shadow register 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "SWLOCK137,sticky write lock for shadow register 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "SWLOCK136,sticky write lock for shadow register 136" "B_0x0,B_0x1" bitfld.long 0x10 7. "SWLOCK135,sticky write lock for shadow register 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "SWLOCK134,sticky write lock for shadow register 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "SWLOCK133,sticky write lock for shadow register 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "SWLOCK132,sticky write lock for shadow register 132" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "SWLOCK131,sticky write lock for shadow register 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "SWLOCK130,sticky write lock for shadow register 130" "B_0x0,B_0x1" bitfld.long 0x10 1. "SWLOCK129,sticky write lock for shadow register 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "SWLOCK128,sticky write lock for shadow register 128" "B_0x0,B_0x1" line.long 0x14 "BSEC_SWLOCK5,BSEC sticky write lock register 5" bitfld.long 0x14 31. "SWLOCK191,sticky write lock for shadow register 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "SWLOCK190,sticky write lock for shadow register 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "SWLOCK189,sticky write lock for shadow register 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "SWLOCK188,sticky write lock for shadow register 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "SWLOCK187,sticky write lock for shadow register 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "SWLOCK186,sticky write lock for shadow register 186" "B_0x0,B_0x1" bitfld.long 0x14 25. "SWLOCK185,sticky write lock for shadow register 185" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "SWLOCK184,sticky write lock for shadow register 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "SWLOCK183,sticky write lock for shadow register 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "SWLOCK182,sticky write lock for shadow register 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "SWLOCK181,sticky write lock for shadow register 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "SWLOCK180,sticky write lock for shadow register 180" "B_0x0,B_0x1" bitfld.long 0x14 19. "SWLOCK179,sticky write lock for shadow register 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "SWLOCK178,sticky write lock for shadow register 178" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "SWLOCK177,sticky write lock for shadow register 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "SWLOCK176,sticky write lock for shadow register 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "SWLOCK175,sticky write lock for shadow register 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "SWLOCK174,sticky write lock for shadow register 174" "B_0x0,B_0x1" bitfld.long 0x14 13. "SWLOCK173,sticky write lock for shadow register 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "SWLOCK172,sticky write lock for shadow register 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "SWLOCK171,sticky write lock for shadow register 171" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "SWLOCK170,sticky write lock for shadow register 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "SWLOCK169,sticky write lock for shadow register 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "SWLOCK168,sticky write lock for shadow register 168" "B_0x0,B_0x1" bitfld.long 0x14 7. "SWLOCK167,sticky write lock for shadow register 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "SWLOCK166,sticky write lock for shadow register 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "SWLOCK165,sticky write lock for shadow register 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "SWLOCK164,sticky write lock for shadow register 164" "B_0x0,B_0x1" newline bitfld.long 0x14 3. "SWLOCK163,sticky write lock for shadow register 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "SWLOCK162,sticky write lock for shadow register 162" "B_0x0,B_0x1" bitfld.long 0x14 1. "SWLOCK161,sticky write lock for shadow register 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "SWLOCK160,sticky write lock for shadow register 160" "B_0x0,B_0x1" line.long 0x18 "BSEC_SWLOCK6,BSEC sticky write lock register 6" bitfld.long 0x18 31. "SWLOCK223,sticky write lock for shadow register 223" "B_0x0,B_0x1" bitfld.long 0x18 30. "SWLOCK222,sticky write lock for shadow register 222" "B_0x0,B_0x1" bitfld.long 0x18 29. "SWLOCK221,sticky write lock for shadow register 221" "B_0x0,B_0x1" bitfld.long 0x18 28. "SWLOCK220,sticky write lock for shadow register 220" "B_0x0,B_0x1" bitfld.long 0x18 27. "SWLOCK219,sticky write lock for shadow register 219" "B_0x0,B_0x1" bitfld.long 0x18 26. "SWLOCK218,sticky write lock for shadow register 218" "B_0x0,B_0x1" bitfld.long 0x18 25. "SWLOCK217,sticky write lock for shadow register 217" "B_0x0,B_0x1" newline bitfld.long 0x18 24. "SWLOCK216,sticky write lock for shadow register 216" "B_0x0,B_0x1" bitfld.long 0x18 23. "SWLOCK215,sticky write lock for shadow register 215" "B_0x0,B_0x1" bitfld.long 0x18 22. "SWLOCK214,sticky write lock for shadow register 214" "B_0x0,B_0x1" bitfld.long 0x18 21. "SWLOCK213,sticky write lock for shadow register 213" "B_0x0,B_0x1" bitfld.long 0x18 20. "SWLOCK212,sticky write lock for shadow register 212" "B_0x0,B_0x1" bitfld.long 0x18 19. "SWLOCK211,sticky write lock for shadow register 211" "B_0x0,B_0x1" bitfld.long 0x18 18. "SWLOCK210,sticky write lock for shadow register 210" "B_0x0,B_0x1" newline bitfld.long 0x18 17. "SWLOCK209,sticky write lock for shadow register 209" "B_0x0,B_0x1" bitfld.long 0x18 16. "SWLOCK208,sticky write lock for shadow register 208" "B_0x0,B_0x1" bitfld.long 0x18 15. "SWLOCK207,sticky write lock for shadow register 207" "B_0x0,B_0x1" bitfld.long 0x18 14. "SWLOCK206,sticky write lock for shadow register 206" "B_0x0,B_0x1" bitfld.long 0x18 13. "SWLOCK205,sticky write lock for shadow register 205" "B_0x0,B_0x1" bitfld.long 0x18 12. "SWLOCK204,sticky write lock for shadow register 204" "B_0x0,B_0x1" bitfld.long 0x18 11. "SWLOCK203,sticky write lock for shadow register 203" "B_0x0,B_0x1" newline bitfld.long 0x18 10. "SWLOCK202,sticky write lock for shadow register 202" "B_0x0,B_0x1" bitfld.long 0x18 9. "SWLOCK201,sticky write lock for shadow register 201" "B_0x0,B_0x1" bitfld.long 0x18 8. "SWLOCK200,sticky write lock for shadow register 200" "B_0x0,B_0x1" bitfld.long 0x18 7. "SWLOCK199,sticky write lock for shadow register 199" "B_0x0,B_0x1" bitfld.long 0x18 6. "SWLOCK198,sticky write lock for shadow register 198" "B_0x0,B_0x1" bitfld.long 0x18 5. "SWLOCK197,sticky write lock for shadow register 197" "B_0x0,B_0x1" bitfld.long 0x18 4. "SWLOCK196,sticky write lock for shadow register 196" "B_0x0,B_0x1" newline bitfld.long 0x18 3. "SWLOCK195,sticky write lock for shadow register 195" "B_0x0,B_0x1" bitfld.long 0x18 2. "SWLOCK194,sticky write lock for shadow register 194" "B_0x0,B_0x1" bitfld.long 0x18 1. "SWLOCK193,sticky write lock for shadow register 193" "B_0x0,B_0x1" bitfld.long 0x18 0. "SWLOCK192,sticky write lock for shadow register 192" "B_0x0,B_0x1" line.long 0x1C "BSEC_SWLOCK7,BSEC sticky write lock register 7" bitfld.long 0x1C 31. "SWLOCK255,sticky write lock for shadow register 255" "B_0x0,B_0x1" bitfld.long 0x1C 30. "SWLOCK254,sticky write lock for shadow register 254" "B_0x0,B_0x1" bitfld.long 0x1C 29. "SWLOCK253,sticky write lock for shadow register 253" "B_0x0,B_0x1" bitfld.long 0x1C 28. "SWLOCK252,sticky write lock for shadow register 252" "B_0x0,B_0x1" bitfld.long 0x1C 27. "SWLOCK251,sticky write lock for shadow register 251" "B_0x0,B_0x1" bitfld.long 0x1C 26. "SWLOCK250,sticky write lock for shadow register 250" "B_0x0,B_0x1" bitfld.long 0x1C 25. "SWLOCK249,sticky write lock for shadow register 249" "B_0x0,B_0x1" newline bitfld.long 0x1C 24. "SWLOCK248,sticky write lock for shadow register 248" "B_0x0,B_0x1" bitfld.long 0x1C 23. "SWLOCK247,sticky write lock for shadow register 247" "B_0x0,B_0x1" bitfld.long 0x1C 22. "SWLOCK246,sticky write lock for shadow register 246" "B_0x0,B_0x1" bitfld.long 0x1C 21. "SWLOCK245,sticky write lock for shadow register 245" "B_0x0,B_0x1" bitfld.long 0x1C 20. "SWLOCK244,sticky write lock for shadow register 244" "B_0x0,B_0x1" bitfld.long 0x1C 19. "SWLOCK243,sticky write lock for shadow register 243" "B_0x0,B_0x1" bitfld.long 0x1C 18. "SWLOCK242,sticky write lock for shadow register 242" "B_0x0,B_0x1" newline bitfld.long 0x1C 17. "SWLOCK241,sticky write lock for shadow register 241" "B_0x0,B_0x1" bitfld.long 0x1C 16. "SWLOCK240,sticky write lock for shadow register 240" "B_0x0,B_0x1" bitfld.long 0x1C 15. "SWLOCK239,sticky write lock for shadow register 239" "B_0x0,B_0x1" bitfld.long 0x1C 14. "SWLOCK238,sticky write lock for shadow register 238" "B_0x0,B_0x1" bitfld.long 0x1C 13. "SWLOCK237,sticky write lock for shadow register 237" "B_0x0,B_0x1" bitfld.long 0x1C 12. "SWLOCK236,sticky write lock for shadow register 236" "B_0x0,B_0x1" bitfld.long 0x1C 11. "SWLOCK235,sticky write lock for shadow register 235" "B_0x0,B_0x1" newline bitfld.long 0x1C 10. "SWLOCK234,sticky write lock for shadow register 234" "B_0x0,B_0x1" bitfld.long 0x1C 9. "SWLOCK233,sticky write lock for shadow register 233" "B_0x0,B_0x1" bitfld.long 0x1C 8. "SWLOCK232,sticky write lock for shadow register 232" "B_0x0,B_0x1" bitfld.long 0x1C 7. "SWLOCK231,sticky write lock for shadow register 231" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SWLOCK230,sticky write lock for shadow register 230" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SWLOCK229,sticky write lock for shadow register 229" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SWLOCK228,sticky write lock for shadow register 228" "B_0x0,B_0x1" newline bitfld.long 0x1C 3. "SWLOCK227,sticky write lock for shadow register 227" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SWLOCK226,sticky write lock for shadow register 226" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SWLOCK225,sticky write lock for shadow register 225" "B_0x0,B_0x1" bitfld.long 0x1C 0. "SWLOCK224,sticky write lock for shadow register 224" "B_0x0,B_0x1" line.long 0x20 "BSEC_SWLOCK8,BSEC sticky write lock register 8" bitfld.long 0x20 31. "SWLOCK287,sticky write lock for shadow register 287" "B_0x0,B_0x1" bitfld.long 0x20 30. "SWLOCK286,sticky write lock for shadow register 286" "B_0x0,B_0x1" bitfld.long 0x20 29. "SWLOCK285,sticky write lock for shadow register 285" "B_0x0,B_0x1" bitfld.long 0x20 28. "SWLOCK284,sticky write lock for shadow register 284" "B_0x0,B_0x1" bitfld.long 0x20 27. "SWLOCK283,sticky write lock for shadow register 283" "B_0x0,B_0x1" bitfld.long 0x20 26. "SWLOCK282,sticky write lock for shadow register 282" "B_0x0,B_0x1" bitfld.long 0x20 25. "SWLOCK281,sticky write lock for shadow register 281" "B_0x0,B_0x1" newline bitfld.long 0x20 24. "SWLOCK280,sticky write lock for shadow register 280" "B_0x0,B_0x1" bitfld.long 0x20 23. "SWLOCK279,sticky write lock for shadow register 279" "B_0x0,B_0x1" bitfld.long 0x20 22. "SWLOCK278,sticky write lock for shadow register 278" "B_0x0,B_0x1" bitfld.long 0x20 21. "SWLOCK277,sticky write lock for shadow register 277" "B_0x0,B_0x1" bitfld.long 0x20 20. "SWLOCK276,sticky write lock for shadow register 276" "B_0x0,B_0x1" bitfld.long 0x20 19. "SWLOCK275,sticky write lock for shadow register 275" "B_0x0,B_0x1" bitfld.long 0x20 18. "SWLOCK274,sticky write lock for shadow register 274" "B_0x0,B_0x1" newline bitfld.long 0x20 17. "SWLOCK273,sticky write lock for shadow register 273" "B_0x0,B_0x1" bitfld.long 0x20 16. "SWLOCK272,sticky write lock for shadow register 272" "B_0x0,B_0x1" bitfld.long 0x20 15. "SWLOCK271,sticky write lock for shadow register 271" "B_0x0,B_0x1" bitfld.long 0x20 14. "SWLOCK270,sticky write lock for shadow register 270" "B_0x0,B_0x1" bitfld.long 0x20 13. "SWLOCK269,sticky write lock for shadow register 269" "B_0x0,B_0x1" bitfld.long 0x20 12. "SWLOCK268,sticky write lock for shadow register 268" "B_0x0,B_0x1" bitfld.long 0x20 11. "SWLOCK267,sticky write lock for shadow register 267" "B_0x0,B_0x1" newline bitfld.long 0x20 10. "SWLOCK266,sticky write lock for shadow register 266" "B_0x0,B_0x1" bitfld.long 0x20 9. "SWLOCK265,sticky write lock for shadow register 265" "B_0x0,B_0x1" bitfld.long 0x20 8. "SWLOCK264,sticky write lock for shadow register 264" "B_0x0,B_0x1" bitfld.long 0x20 7. "SWLOCK263,sticky write lock for shadow register 263" "B_0x0,B_0x1" bitfld.long 0x20 6. "SWLOCK262,sticky write lock for shadow register 262" "B_0x0,B_0x1" bitfld.long 0x20 5. "SWLOCK261,sticky write lock for shadow register 261" "B_0x0,B_0x1" bitfld.long 0x20 4. "SWLOCK260,sticky write lock for shadow register 260" "B_0x0,B_0x1" newline bitfld.long 0x20 3. "SWLOCK259,sticky write lock for shadow register 259" "B_0x0,B_0x1" bitfld.long 0x20 2. "SWLOCK258,sticky write lock for shadow register 258" "B_0x0,B_0x1" bitfld.long 0x20 1. "SWLOCK257,sticky write lock for shadow register 257" "B_0x0,B_0x1" bitfld.long 0x20 0. "SWLOCK256,sticky write lock for shadow register 256" "B_0x0,B_0x1" line.long 0x24 "BSEC_SWLOCK9,BSEC sticky write lock register 9" bitfld.long 0x24 31. "SWLOCK319,sticky write lock for shadow register 319" "B_0x0,B_0x1" bitfld.long 0x24 30. "SWLOCK318,sticky write lock for shadow register 318" "B_0x0,B_0x1" bitfld.long 0x24 29. "SWLOCK317,sticky write lock for shadow register 317" "B_0x0,B_0x1" bitfld.long 0x24 28. "SWLOCK316,sticky write lock for shadow register 316" "B_0x0,B_0x1" bitfld.long 0x24 27. "SWLOCK315,sticky write lock for shadow register 315" "B_0x0,B_0x1" bitfld.long 0x24 26. "SWLOCK314,sticky write lock for shadow register 314" "B_0x0,B_0x1" bitfld.long 0x24 25. "SWLOCK313,sticky write lock for shadow register 313" "B_0x0,B_0x1" newline bitfld.long 0x24 24. "SWLOCK312,sticky write lock for shadow register 312" "B_0x0,B_0x1" bitfld.long 0x24 23. "SWLOCK311,sticky write lock for shadow register 311" "B_0x0,B_0x1" bitfld.long 0x24 22. "SWLOCK310,sticky write lock for shadow register 310" "B_0x0,B_0x1" bitfld.long 0x24 21. "SWLOCK309,sticky write lock for shadow register 309" "B_0x0,B_0x1" bitfld.long 0x24 20. "SWLOCK308,sticky write lock for shadow register 308" "B_0x0,B_0x1" bitfld.long 0x24 19. "SWLOCK307,sticky write lock for shadow register 307" "B_0x0,B_0x1" bitfld.long 0x24 18. "SWLOCK306,sticky write lock for shadow register 306" "B_0x0,B_0x1" newline bitfld.long 0x24 17. "SWLOCK305,sticky write lock for shadow register 305" "B_0x0,B_0x1" bitfld.long 0x24 16. "SWLOCK304,sticky write lock for shadow register 304" "B_0x0,B_0x1" bitfld.long 0x24 15. "SWLOCK303,sticky write lock for shadow register 303" "B_0x0,B_0x1" bitfld.long 0x24 14. "SWLOCK302,sticky write lock for shadow register 302" "B_0x0,B_0x1" bitfld.long 0x24 13. "SWLOCK301,sticky write lock for shadow register 301" "B_0x0,B_0x1" bitfld.long 0x24 12. "SWLOCK300,sticky write lock for shadow register 300" "B_0x0,B_0x1" bitfld.long 0x24 11. "SWLOCK299,sticky write lock for shadow register 299" "B_0x0,B_0x1" newline bitfld.long 0x24 10. "SWLOCK298,sticky write lock for shadow register 298" "B_0x0,B_0x1" bitfld.long 0x24 9. "SWLOCK297,sticky write lock for shadow register 297" "B_0x0,B_0x1" bitfld.long 0x24 8. "SWLOCK296,sticky write lock for shadow register 296" "B_0x0,B_0x1" bitfld.long 0x24 7. "SWLOCK295,sticky write lock for shadow register 295" "B_0x0,B_0x1" bitfld.long 0x24 6. "SWLOCK294,sticky write lock for shadow register 294" "B_0x0,B_0x1" bitfld.long 0x24 5. "SWLOCK293,sticky write lock for shadow register 293" "B_0x0,B_0x1" bitfld.long 0x24 4. "SWLOCK292,sticky write lock for shadow register 292" "B_0x0,B_0x1" newline bitfld.long 0x24 3. "SWLOCK291,sticky write lock for shadow register 291" "B_0x0,B_0x1" bitfld.long 0x24 2. "SWLOCK290,sticky write lock for shadow register 290" "B_0x0,B_0x1" bitfld.long 0x24 1. "SWLOCK289,sticky write lock for shadow register 289" "B_0x0,B_0x1" bitfld.long 0x24 0. "SWLOCK288,sticky write lock for shadow register 288" "B_0x0,B_0x1" line.long 0x28 "BSEC_SWLOCK10,BSEC sticky write lock register 10" bitfld.long 0x28 31. "SWLOCK351,sticky write lock for shadow register 351" "B_0x0,B_0x1" bitfld.long 0x28 30. "SWLOCK350,sticky write lock for shadow register 350" "B_0x0,B_0x1" bitfld.long 0x28 29. "SWLOCK349,sticky write lock for shadow register 349" "B_0x0,B_0x1" bitfld.long 0x28 28. "SWLOCK348,sticky write lock for shadow register 348" "B_0x0,B_0x1" bitfld.long 0x28 27. "SWLOCK347,sticky write lock for shadow register 347" "B_0x0,B_0x1" bitfld.long 0x28 26. "SWLOCK346,sticky write lock for shadow register 346" "B_0x0,B_0x1" bitfld.long 0x28 25. "SWLOCK345,sticky write lock for shadow register 345" "B_0x0,B_0x1" newline bitfld.long 0x28 24. "SWLOCK344,sticky write lock for shadow register 344" "B_0x0,B_0x1" bitfld.long 0x28 23. "SWLOCK343,sticky write lock for shadow register 343" "B_0x0,B_0x1" bitfld.long 0x28 22. "SWLOCK342,sticky write lock for shadow register 342" "B_0x0,B_0x1" bitfld.long 0x28 21. "SWLOCK341,sticky write lock for shadow register 341" "B_0x0,B_0x1" bitfld.long 0x28 20. "SWLOCK340,sticky write lock for shadow register 340" "B_0x0,B_0x1" bitfld.long 0x28 19. "SWLOCK339,sticky write lock for shadow register 339" "B_0x0,B_0x1" bitfld.long 0x28 18. "SWLOCK338,sticky write lock for shadow register 338" "B_0x0,B_0x1" newline bitfld.long 0x28 17. "SWLOCK337,sticky write lock for shadow register 337" "B_0x0,B_0x1" bitfld.long 0x28 16. "SWLOCK336,sticky write lock for shadow register 336" "B_0x0,B_0x1" bitfld.long 0x28 15. "SWLOCK335,sticky write lock for shadow register 335" "B_0x0,B_0x1" bitfld.long 0x28 14. "SWLOCK334,sticky write lock for shadow register 334" "B_0x0,B_0x1" bitfld.long 0x28 13. "SWLOCK333,sticky write lock for shadow register 333" "B_0x0,B_0x1" bitfld.long 0x28 12. "SWLOCK332,sticky write lock for shadow register 332" "B_0x0,B_0x1" bitfld.long 0x28 11. "SWLOCK331,sticky write lock for shadow register 331" "B_0x0,B_0x1" newline bitfld.long 0x28 10. "SWLOCK330,sticky write lock for shadow register 330" "B_0x0,B_0x1" bitfld.long 0x28 9. "SWLOCK329,sticky write lock for shadow register 329" "B_0x0,B_0x1" bitfld.long 0x28 8. "SWLOCK328,sticky write lock for shadow register 328" "B_0x0,B_0x1" bitfld.long 0x28 7. "SWLOCK327,sticky write lock for shadow register 327" "B_0x0,B_0x1" bitfld.long 0x28 6. "SWLOCK326,sticky write lock for shadow register 326" "B_0x0,B_0x1" bitfld.long 0x28 5. "SWLOCK325,sticky write lock for shadow register 325" "B_0x0,B_0x1" bitfld.long 0x28 4. "SWLOCK324,sticky write lock for shadow register 324" "B_0x0,B_0x1" newline bitfld.long 0x28 3. "SWLOCK323,sticky write lock for shadow register 323" "B_0x0,B_0x1" bitfld.long 0x28 2. "SWLOCK322,sticky write lock for shadow register 322" "B_0x0,B_0x1" bitfld.long 0x28 1. "SWLOCK321,sticky write lock for shadow register 321" "B_0x0,B_0x1" bitfld.long 0x28 0. "SWLOCK320,sticky write lock for shadow register 320" "B_0x0,B_0x1" line.long 0x2C "BSEC_SWLOCK11,BSEC sticky write lock register 11" bitfld.long 0x2C 31. "SWLOCK383,sticky write lock for shadow register 383" "B_0x0,B_0x1" bitfld.long 0x2C 30. "SWLOCK382,sticky write lock for shadow register 382" "B_0x0,B_0x1" bitfld.long 0x2C 29. "SWLOCK381,sticky write lock for shadow register 381" "B_0x0,B_0x1" bitfld.long 0x2C 28. "SWLOCK380,sticky write lock for shadow register 380" "B_0x0,B_0x1" bitfld.long 0x2C 27. "SWLOCK379,sticky write lock for shadow register 379" "B_0x0,B_0x1" bitfld.long 0x2C 26. "SWLOCK378,sticky write lock for shadow register 378" "B_0x0,B_0x1" bitfld.long 0x2C 25. "SWLOCK377,sticky write lock for shadow register 377" "B_0x0,B_0x1" newline bitfld.long 0x2C 24. "SWLOCK376,sticky write lock for shadow register 376" "B_0x0,B_0x1" bitfld.long 0x2C 23. "SWLOCK375,sticky write lock for shadow register 375" "B_0x0,B_0x1" bitfld.long 0x2C 22. "SWLOCK374,sticky write lock for shadow register 374" "B_0x0,B_0x1" bitfld.long 0x2C 21. "SWLOCK373,sticky write lock for shadow register 373" "B_0x0,B_0x1" bitfld.long 0x2C 20. "SWLOCK372,sticky write lock for shadow register 372" "B_0x0,B_0x1" bitfld.long 0x2C 19. "SWLOCK371,sticky write lock for shadow register 371" "B_0x0,B_0x1" bitfld.long 0x2C 18. "SWLOCK370,sticky write lock for shadow register 370" "B_0x0,B_0x1" newline bitfld.long 0x2C 17. "SWLOCK369,sticky write lock for shadow register 369" "B_0x0,B_0x1" bitfld.long 0x2C 16. "SWLOCK368,sticky write lock for shadow register 368" "B_0x0,B_0x1" bitfld.long 0x2C 15. "SWLOCK367,sticky write lock for shadow register 367" "B_0x0,B_0x1" bitfld.long 0x2C 14. "SWLOCK366,sticky write lock for shadow register 366" "B_0x0,B_0x1" bitfld.long 0x2C 13. "SWLOCK365,sticky write lock for shadow register 365" "B_0x0,B_0x1" bitfld.long 0x2C 12. "SWLOCK364,sticky write lock for shadow register 364" "B_0x0,B_0x1" bitfld.long 0x2C 11. "SWLOCK363,sticky write lock for shadow register 363" "B_0x0,B_0x1" newline bitfld.long 0x2C 10. "SWLOCK362,sticky write lock for shadow register 362" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SWLOCK361,sticky write lock for shadow register 361" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SWLOCK360,sticky write lock for shadow register 360" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SWLOCK359,sticky write lock for shadow register 359" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SWLOCK358,sticky write lock for shadow register 358" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SWLOCK357,sticky write lock for shadow register 357" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SWLOCK356,sticky write lock for shadow register 356" "B_0x0,B_0x1" newline bitfld.long 0x2C 3. "SWLOCK355,sticky write lock for shadow register 355" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SWLOCK354,sticky write lock for shadow register 354" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SWLOCK353,sticky write lock for shadow register 353" "B_0x0,B_0x1" bitfld.long 0x2C 0. "SWLOCK352,sticky write lock for shadow register 352" "B_0x0,B_0x1" group.long 0x880++0x2F line.long 0x0 "BSEC_SRLOCK0,BSEC sticky reload lock register 0" bitfld.long 0x0 31. "SRLOCK31,sticky reload lock for fuse word 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "SRLOCK30,sticky reload lock for fuse word 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "SRLOCK29,sticky reload lock for fuse word 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "SRLOCK28,sticky reload lock for fuse word 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "SRLOCK27,sticky reload lock for fuse word 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "SRLOCK26,sticky reload lock for fuse word 26" "B_0x0,B_0x1" bitfld.long 0x0 25. "SRLOCK25,sticky reload lock for fuse word 25" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "SRLOCK24,sticky reload lock for fuse word 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "SRLOCK23,sticky reload lock for fuse word 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "SRLOCK22,sticky reload lock for fuse word 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "SRLOCK21,sticky reload lock for fuse word 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "SRLOCK20,sticky reload lock for fuse word 20" "B_0x0,B_0x1" bitfld.long 0x0 19. "SRLOCK19,sticky reload lock for fuse word 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "SRLOCK18,sticky reload lock for fuse word 18" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "SRLOCK17,sticky reload lock for fuse word 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "SRLOCK16,sticky reload lock for fuse word 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "SRLOCK15,sticky reload lock for fuse word 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "SRLOCK14,sticky reload lock for fuse word 14" "B_0x0,B_0x1" bitfld.long 0x0 13. "SRLOCK13,sticky reload lock for fuse word 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "SRLOCK12,sticky reload lock for fuse word 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "SRLOCK11,sticky reload lock for fuse word 11" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "SRLOCK10,sticky reload lock for fuse word 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "SRLOCK9,sticky reload lock for fuse word 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "SRLOCK8,sticky reload lock for fuse word 8" "B_0x0,B_0x1" bitfld.long 0x0 7. "SRLOCK7,sticky reload lock for fuse word 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "SRLOCK6,sticky reload lock for fuse word 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "SRLOCK5,sticky reload lock for fuse word 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "SRLOCK4,sticky reload lock for fuse word 4" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SRLOCK3,sticky reload lock for fuse word 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "SRLOCK2,sticky reload lock for fuse word 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "SRLOCK1,sticky reload lock for fuse word 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "SRLOCK0,sticky reload lock for fuse word 0" "B_0x0,B_0x1" line.long 0x4 "BSEC_SRLOCK1,BSEC sticky reload lock register 1" bitfld.long 0x4 31. "SRLOCK63,sticky reload lock for fuse word 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "SRLOCK62,sticky reload lock for fuse word 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "SRLOCK61,sticky reload lock for fuse word 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "SRLOCK60,sticky reload lock for fuse word 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "SRLOCK59,sticky reload lock for fuse word 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "SRLOCK58,sticky reload lock for fuse word 58" "B_0x0,B_0x1" bitfld.long 0x4 25. "SRLOCK57,sticky reload lock for fuse word 57" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "SRLOCK56,sticky reload lock for fuse word 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "SRLOCK55,sticky reload lock for fuse word 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "SRLOCK54,sticky reload lock for fuse word 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "SRLOCK53,sticky reload lock for fuse word 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "SRLOCK52,sticky reload lock for fuse word 52" "B_0x0,B_0x1" bitfld.long 0x4 19. "SRLOCK51,sticky reload lock for fuse word 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "SRLOCK50,sticky reload lock for fuse word 50" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "SRLOCK49,sticky reload lock for fuse word 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "SRLOCK48,sticky reload lock for fuse word 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "SRLOCK47,sticky reload lock for fuse word 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "SRLOCK46,sticky reload lock for fuse word 46" "B_0x0,B_0x1" bitfld.long 0x4 13. "SRLOCK45,sticky reload lock for fuse word 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "SRLOCK44,sticky reload lock for fuse word 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "SRLOCK43,sticky reload lock for fuse word 43" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "SRLOCK42,sticky reload lock for fuse word 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "SRLOCK41,sticky reload lock for fuse word 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "SRLOCK40,sticky reload lock for fuse word 40" "B_0x0,B_0x1" bitfld.long 0x4 7. "SRLOCK39,sticky reload lock for fuse word 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "SRLOCK38,sticky reload lock for fuse word 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "SRLOCK37,sticky reload lock for fuse word 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "SRLOCK36,sticky reload lock for fuse word 36" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "SRLOCK35,sticky reload lock for fuse word 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "SRLOCK34,sticky reload lock for fuse word 34" "B_0x0,B_0x1" bitfld.long 0x4 1. "SRLOCK33,sticky reload lock for fuse word 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "SRLOCK32,sticky reload lock for fuse word 32" "B_0x0,B_0x1" line.long 0x8 "BSEC_SRLOCK2,BSEC sticky reload lock register 2" bitfld.long 0x8 31. "SRLOCK95,sticky reload lock for fuse word 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "SRLOCK94,sticky reload lock for fuse word 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "SRLOCK93,sticky reload lock for fuse word 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "SRLOCK92,sticky reload lock for fuse word 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "SRLOCK91,sticky reload lock for fuse word 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "SRLOCK90,sticky reload lock for fuse word 90" "B_0x0,B_0x1" bitfld.long 0x8 25. "SRLOCK89,sticky reload lock for fuse word 89" "B_0x0,B_0x1" newline bitfld.long 0x8 24. "SRLOCK88,sticky reload lock for fuse word 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "SRLOCK87,sticky reload lock for fuse word 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "SRLOCK86,sticky reload lock for fuse word 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "SRLOCK85,sticky reload lock for fuse word 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "SRLOCK84,sticky reload lock for fuse word 84" "B_0x0,B_0x1" bitfld.long 0x8 19. "SRLOCK83,sticky reload lock for fuse word 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "SRLOCK82,sticky reload lock for fuse word 82" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "SRLOCK81,sticky reload lock for fuse word 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "SRLOCK80,sticky reload lock for fuse word 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "SRLOCK79,sticky reload lock for fuse word 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "SRLOCK78,sticky reload lock for fuse word 78" "B_0x0,B_0x1" bitfld.long 0x8 13. "SRLOCK77,sticky reload lock for fuse word 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "SRLOCK76,sticky reload lock for fuse word 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "SRLOCK75,sticky reload lock for fuse word 75" "B_0x0,B_0x1" newline bitfld.long 0x8 10. "SRLOCK74,sticky reload lock for fuse word 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "SRLOCK73,sticky reload lock for fuse word 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "SRLOCK72,sticky reload lock for fuse word 72" "B_0x0,B_0x1" bitfld.long 0x8 7. "SRLOCK71,sticky reload lock for fuse word 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "SRLOCK70,sticky reload lock for fuse word 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "SRLOCK69,sticky reload lock for fuse word 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "SRLOCK68,sticky reload lock for fuse word 68" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "SRLOCK67,sticky reload lock for fuse word 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "SRLOCK66,sticky reload lock for fuse word 66" "B_0x0,B_0x1" bitfld.long 0x8 1. "SRLOCK65,sticky reload lock for fuse word 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "SRLOCK64,sticky reload lock for fuse word 64" "B_0x0,B_0x1" line.long 0xC "BSEC_SRLOCK3,BSEC sticky reload lock register 3" bitfld.long 0xC 31. "SRLOCK127,sticky reload lock for fuse word 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "SRLOCK126,sticky reload lock for fuse word 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "SRLOCK125,sticky reload lock for fuse word 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "SRLOCK124,sticky reload lock for fuse word 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "SRLOCK123,sticky reload lock for fuse word 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "SRLOCK122,sticky reload lock for fuse word 122" "B_0x0,B_0x1" bitfld.long 0xC 25. "SRLOCK121,sticky reload lock for fuse word 121" "B_0x0,B_0x1" newline bitfld.long 0xC 24. "SRLOCK120,sticky reload lock for fuse word 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "SRLOCK119,sticky reload lock for fuse word 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "SRLOCK118,sticky reload lock for fuse word 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "SRLOCK117,sticky reload lock for fuse word 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "SRLOCK116,sticky reload lock for fuse word 116" "B_0x0,B_0x1" bitfld.long 0xC 19. "SRLOCK115,sticky reload lock for fuse word 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "SRLOCK114,sticky reload lock for fuse word 114" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "SRLOCK113,sticky reload lock for fuse word 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "SRLOCK112,sticky reload lock for fuse word 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "SRLOCK111,sticky reload lock for fuse word 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "SRLOCK110,sticky reload lock for fuse word 110" "B_0x0,B_0x1" bitfld.long 0xC 13. "SRLOCK109,sticky reload lock for fuse word 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "SRLOCK108,sticky reload lock for fuse word 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "SRLOCK107,sticky reload lock for fuse word 107" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "SRLOCK106,sticky reload lock for fuse word 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "SRLOCK105,sticky reload lock for fuse word 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "SRLOCK104,sticky reload lock for fuse word 104" "B_0x0,B_0x1" bitfld.long 0xC 7. "SRLOCK103,sticky reload lock for fuse word 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "SRLOCK102,sticky reload lock for fuse word 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "SRLOCK101,sticky reload lock for fuse word 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "SRLOCK100,sticky reload lock for fuse word 100" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "SRLOCK99,sticky reload lock for fuse word 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "SRLOCK98,sticky reload lock for fuse word 98" "B_0x0,B_0x1" bitfld.long 0xC 1. "SRLOCK97,sticky reload lock for fuse word 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "SRLOCK96,sticky reload lock for fuse word 96" "B_0x0,B_0x1" line.long 0x10 "BSEC_SRLOCK4,BSEC sticky reload lock register 4" bitfld.long 0x10 31. "SRLOCK159,sticky reload lock for fuse word 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "SRLOCK158,sticky reload lock for fuse word 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "SRLOCK157,sticky reload lock for fuse word 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "SRLOCK156,sticky reload lock for fuse word 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "SRLOCK155,sticky reload lock for fuse word 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "SRLOCK154,sticky reload lock for fuse word 154" "B_0x0,B_0x1" bitfld.long 0x10 25. "SRLOCK153,sticky reload lock for fuse word 153" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "SRLOCK152,sticky reload lock for fuse word 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "SRLOCK151,sticky reload lock for fuse word 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "SRLOCK150,sticky reload lock for fuse word 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "SRLOCK149,sticky reload lock for fuse word 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "SRLOCK148,sticky reload lock for fuse word 148" "B_0x0,B_0x1" bitfld.long 0x10 19. "SRLOCK147,sticky reload lock for fuse word 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "SRLOCK146,sticky reload lock for fuse word 146" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "SRLOCK145,sticky reload lock for fuse word 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "SRLOCK144,sticky reload lock for fuse word 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "SRLOCK143,sticky reload lock for fuse word 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "SRLOCK142,sticky reload lock for fuse word 142" "B_0x0,B_0x1" bitfld.long 0x10 13. "SRLOCK141,sticky reload lock for fuse word 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "SRLOCK140,sticky reload lock for fuse word 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "SRLOCK139,sticky reload lock for fuse word 139" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "SRLOCK138,sticky reload lock for fuse word 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "SRLOCK137,sticky reload lock for fuse word 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "SRLOCK136,sticky reload lock for fuse word 136" "B_0x0,B_0x1" bitfld.long 0x10 7. "SRLOCK135,sticky reload lock for fuse word 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "SRLOCK134,sticky reload lock for fuse word 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "SRLOCK133,sticky reload lock for fuse word 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "SRLOCK132,sticky reload lock for fuse word 132" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "SRLOCK131,sticky reload lock for fuse word 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "SRLOCK130,sticky reload lock for fuse word 130" "B_0x0,B_0x1" bitfld.long 0x10 1. "SRLOCK129,sticky reload lock for fuse word 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "SRLOCK128,sticky reload lock for fuse word 128" "B_0x0,B_0x1" line.long 0x14 "BSEC_SRLOCK5,BSEC sticky reload lock register 5" bitfld.long 0x14 31. "SRLOCK191,sticky reload lock for fuse word 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "SRLOCK190,sticky reload lock for fuse word 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "SRLOCK189,sticky reload lock for fuse word 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "SRLOCK188,sticky reload lock for fuse word 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "SRLOCK187,sticky reload lock for fuse word 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "SRLOCK186,sticky reload lock for fuse word 186" "B_0x0,B_0x1" bitfld.long 0x14 25. "SRLOCK185,sticky reload lock for fuse word 185" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "SRLOCK184,sticky reload lock for fuse word 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "SRLOCK183,sticky reload lock for fuse word 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "SRLOCK182,sticky reload lock for fuse word 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "SRLOCK181,sticky reload lock for fuse word 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "SRLOCK180,sticky reload lock for fuse word 180" "B_0x0,B_0x1" bitfld.long 0x14 19. "SRLOCK179,sticky reload lock for fuse word 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "SRLOCK178,sticky reload lock for fuse word 178" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "SRLOCK177,sticky reload lock for fuse word 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "SRLOCK176,sticky reload lock for fuse word 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "SRLOCK175,sticky reload lock for fuse word 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "SRLOCK174,sticky reload lock for fuse word 174" "B_0x0,B_0x1" bitfld.long 0x14 13. "SRLOCK173,sticky reload lock for fuse word 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "SRLOCK172,sticky reload lock for fuse word 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "SRLOCK171,sticky reload lock for fuse word 171" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "SRLOCK170,sticky reload lock for fuse word 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "SRLOCK169,sticky reload lock for fuse word 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "SRLOCK168,sticky reload lock for fuse word 168" "B_0x0,B_0x1" bitfld.long 0x14 7. "SRLOCK167,sticky reload lock for fuse word 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "SRLOCK166,sticky reload lock for fuse word 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "SRLOCK165,sticky reload lock for fuse word 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "SRLOCK164,sticky reload lock for fuse word 164" "B_0x0,B_0x1" newline bitfld.long 0x14 3. "SRLOCK163,sticky reload lock for fuse word 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "SRLOCK162,sticky reload lock for fuse word 162" "B_0x0,B_0x1" bitfld.long 0x14 1. "SRLOCK161,sticky reload lock for fuse word 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "SRLOCK160,sticky reload lock for fuse word 160" "B_0x0,B_0x1" line.long 0x18 "BSEC_SRLOCK6,BSEC sticky reload lock register 6" bitfld.long 0x18 31. "SRLOCK223,sticky reload lock for fuse word 223" "B_0x0,B_0x1" bitfld.long 0x18 30. "SRLOCK222,sticky reload lock for fuse word 222" "B_0x0,B_0x1" bitfld.long 0x18 29. "SRLOCK221,sticky reload lock for fuse word 221" "B_0x0,B_0x1" bitfld.long 0x18 28. "SRLOCK220,sticky reload lock for fuse word 220" "B_0x0,B_0x1" bitfld.long 0x18 27. "SRLOCK219,sticky reload lock for fuse word 219" "B_0x0,B_0x1" bitfld.long 0x18 26. "SRLOCK218,sticky reload lock for fuse word 218" "B_0x0,B_0x1" bitfld.long 0x18 25. "SRLOCK217,sticky reload lock for fuse word 217" "B_0x0,B_0x1" newline bitfld.long 0x18 24. "SRLOCK216,sticky reload lock for fuse word 216" "B_0x0,B_0x1" bitfld.long 0x18 23. "SRLOCK215,sticky reload lock for fuse word 215" "B_0x0,B_0x1" bitfld.long 0x18 22. "SRLOCK214,sticky reload lock for fuse word 214" "B_0x0,B_0x1" bitfld.long 0x18 21. "SRLOCK213,sticky reload lock for fuse word 213" "B_0x0,B_0x1" bitfld.long 0x18 20. "SRLOCK212,sticky reload lock for fuse word 212" "B_0x0,B_0x1" bitfld.long 0x18 19. "SRLOCK211,sticky reload lock for fuse word 211" "B_0x0,B_0x1" bitfld.long 0x18 18. "SRLOCK210,sticky reload lock for fuse word 210" "B_0x0,B_0x1" newline bitfld.long 0x18 17. "SRLOCK209,sticky reload lock for fuse word 209" "B_0x0,B_0x1" bitfld.long 0x18 16. "SRLOCK208,sticky reload lock for fuse word 208" "B_0x0,B_0x1" bitfld.long 0x18 15. "SRLOCK207,sticky reload lock for fuse word 207" "B_0x0,B_0x1" bitfld.long 0x18 14. "SRLOCK206,sticky reload lock for fuse word 206" "B_0x0,B_0x1" bitfld.long 0x18 13. "SRLOCK205,sticky reload lock for fuse word 205" "B_0x0,B_0x1" bitfld.long 0x18 12. "SRLOCK204,sticky reload lock for fuse word 204" "B_0x0,B_0x1" bitfld.long 0x18 11. "SRLOCK203,sticky reload lock for fuse word 203" "B_0x0,B_0x1" newline bitfld.long 0x18 10. "SRLOCK202,sticky reload lock for fuse word 202" "B_0x0,B_0x1" bitfld.long 0x18 9. "SRLOCK201,sticky reload lock for fuse word 201" "B_0x0,B_0x1" bitfld.long 0x18 8. "SRLOCK200,sticky reload lock for fuse word 200" "B_0x0,B_0x1" bitfld.long 0x18 7. "SRLOCK199,sticky reload lock for fuse word 199" "B_0x0,B_0x1" bitfld.long 0x18 6. "SRLOCK198,sticky reload lock for fuse word 198" "B_0x0,B_0x1" bitfld.long 0x18 5. "SRLOCK197,sticky reload lock for fuse word 197" "B_0x0,B_0x1" bitfld.long 0x18 4. "SRLOCK196,sticky reload lock for fuse word 196" "B_0x0,B_0x1" newline bitfld.long 0x18 3. "SRLOCK195,sticky reload lock for fuse word 195" "B_0x0,B_0x1" bitfld.long 0x18 2. "SRLOCK194,sticky reload lock for fuse word 194" "B_0x0,B_0x1" bitfld.long 0x18 1. "SRLOCK193,sticky reload lock for fuse word 193" "B_0x0,B_0x1" bitfld.long 0x18 0. "SRLOCK192,sticky reload lock for fuse word 192" "B_0x0,B_0x1" line.long 0x1C "BSEC_SRLOCK7,BSEC sticky reload lock register 7" bitfld.long 0x1C 31. "SRLOCK255,sticky reload lock for fuse word 255" "B_0x0,B_0x1" bitfld.long 0x1C 30. "SRLOCK254,sticky reload lock for fuse word 254" "B_0x0,B_0x1" bitfld.long 0x1C 29. "SRLOCK253,sticky reload lock for fuse word 253" "B_0x0,B_0x1" bitfld.long 0x1C 28. "SRLOCK252,sticky reload lock for fuse word 252" "B_0x0,B_0x1" bitfld.long 0x1C 27. "SRLOCK251,sticky reload lock for fuse word 251" "B_0x0,B_0x1" bitfld.long 0x1C 26. "SRLOCK250,sticky reload lock for fuse word 250" "B_0x0,B_0x1" bitfld.long 0x1C 25. "SRLOCK249,sticky reload lock for fuse word 249" "B_0x0,B_0x1" newline bitfld.long 0x1C 24. "SRLOCK248,sticky reload lock for fuse word 248" "B_0x0,B_0x1" bitfld.long 0x1C 23. "SRLOCK247,sticky reload lock for fuse word 247" "B_0x0,B_0x1" bitfld.long 0x1C 22. "SRLOCK246,sticky reload lock for fuse word 246" "B_0x0,B_0x1" bitfld.long 0x1C 21. "SRLOCK245,sticky reload lock for fuse word 245" "B_0x0,B_0x1" bitfld.long 0x1C 20. "SRLOCK244,sticky reload lock for fuse word 244" "B_0x0,B_0x1" bitfld.long 0x1C 19. "SRLOCK243,sticky reload lock for fuse word 243" "B_0x0,B_0x1" bitfld.long 0x1C 18. "SRLOCK242,sticky reload lock for fuse word 242" "B_0x0,B_0x1" newline bitfld.long 0x1C 17. "SRLOCK241,sticky reload lock for fuse word 241" "B_0x0,B_0x1" bitfld.long 0x1C 16. "SRLOCK240,sticky reload lock for fuse word 240" "B_0x0,B_0x1" bitfld.long 0x1C 15. "SRLOCK239,sticky reload lock for fuse word 239" "B_0x0,B_0x1" bitfld.long 0x1C 14. "SRLOCK238,sticky reload lock for fuse word 238" "B_0x0,B_0x1" bitfld.long 0x1C 13. "SRLOCK237,sticky reload lock for fuse word 237" "B_0x0,B_0x1" bitfld.long 0x1C 12. "SRLOCK236,sticky reload lock for fuse word 236" "B_0x0,B_0x1" bitfld.long 0x1C 11. "SRLOCK235,sticky reload lock for fuse word 235" "B_0x0,B_0x1" newline bitfld.long 0x1C 10. "SRLOCK234,sticky reload lock for fuse word 234" "B_0x0,B_0x1" bitfld.long 0x1C 9. "SRLOCK233,sticky reload lock for fuse word 233" "B_0x0,B_0x1" bitfld.long 0x1C 8. "SRLOCK232,sticky reload lock for fuse word 232" "B_0x0,B_0x1" bitfld.long 0x1C 7. "SRLOCK231,sticky reload lock for fuse word 231" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SRLOCK230,sticky reload lock for fuse word 230" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SRLOCK229,sticky reload lock for fuse word 229" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SRLOCK228,sticky reload lock for fuse word 228" "B_0x0,B_0x1" newline bitfld.long 0x1C 3. "SRLOCK227,sticky reload lock for fuse word 227" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SRLOCK226,sticky reload lock for fuse word 226" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SRLOCK225,sticky reload lock for fuse word 225" "B_0x0,B_0x1" bitfld.long 0x1C 0. "SRLOCK224,sticky reload lock for fuse word 224" "B_0x0,B_0x1" line.long 0x20 "BSEC_SRLOCK8,BSEC sticky reload lock register 8" bitfld.long 0x20 31. "SRLOCK287,sticky reload lock for fuse word 287" "B_0x0,B_0x1" bitfld.long 0x20 30. "SRLOCK286,sticky reload lock for fuse word 286" "B_0x0,B_0x1" bitfld.long 0x20 29. "SRLOCK285,sticky reload lock for fuse word 285" "B_0x0,B_0x1" bitfld.long 0x20 28. "SRLOCK284,sticky reload lock for fuse word 284" "B_0x0,B_0x1" bitfld.long 0x20 27. "SRLOCK283,sticky reload lock for fuse word 283" "B_0x0,B_0x1" bitfld.long 0x20 26. "SRLOCK282,sticky reload lock for fuse word 282" "B_0x0,B_0x1" bitfld.long 0x20 25. "SRLOCK281,sticky reload lock for fuse word 281" "B_0x0,B_0x1" newline bitfld.long 0x20 24. "SRLOCK280,sticky reload lock for fuse word 280" "B_0x0,B_0x1" bitfld.long 0x20 23. "SRLOCK279,sticky reload lock for fuse word 279" "B_0x0,B_0x1" bitfld.long 0x20 22. "SRLOCK278,sticky reload lock for fuse word 278" "B_0x0,B_0x1" bitfld.long 0x20 21. "SRLOCK277,sticky reload lock for fuse word 277" "B_0x0,B_0x1" bitfld.long 0x20 20. "SRLOCK276,sticky reload lock for fuse word 276" "B_0x0,B_0x1" bitfld.long 0x20 19. "SRLOCK275,sticky reload lock for fuse word 275" "B_0x0,B_0x1" bitfld.long 0x20 18. "SRLOCK274,sticky reload lock for fuse word 274" "B_0x0,B_0x1" newline bitfld.long 0x20 17. "SRLOCK273,sticky reload lock for fuse word 273" "B_0x0,B_0x1" bitfld.long 0x20 16. "SRLOCK272,sticky reload lock for fuse word 272" "B_0x0,B_0x1" bitfld.long 0x20 15. "SRLOCK271,sticky reload lock for fuse word 271" "B_0x0,B_0x1" bitfld.long 0x20 14. "SRLOCK270,sticky reload lock for fuse word 270" "B_0x0,B_0x1" bitfld.long 0x20 13. "SRLOCK269,sticky reload lock for fuse word 269" "B_0x0,B_0x1" bitfld.long 0x20 12. "SRLOCK268,sticky reload lock for fuse word 268" "B_0x0,B_0x1" bitfld.long 0x20 11. "SRLOCK267,sticky reload lock for fuse word 267" "B_0x0,B_0x1" newline bitfld.long 0x20 10. "SRLOCK266,sticky reload lock for fuse word 266" "B_0x0,B_0x1" bitfld.long 0x20 9. "SRLOCK265,sticky reload lock for fuse word 265" "B_0x0,B_0x1" bitfld.long 0x20 8. "SRLOCK264,sticky reload lock for fuse word 264" "B_0x0,B_0x1" bitfld.long 0x20 7. "SRLOCK263,sticky reload lock for fuse word 263" "B_0x0,B_0x1" bitfld.long 0x20 6. "SRLOCK262,sticky reload lock for fuse word 262" "B_0x0,B_0x1" bitfld.long 0x20 5. "SRLOCK261,sticky reload lock for fuse word 261" "B_0x0,B_0x1" bitfld.long 0x20 4. "SRLOCK260,sticky reload lock for fuse word 260" "B_0x0,B_0x1" newline bitfld.long 0x20 3. "SRLOCK259,sticky reload lock for fuse word 259" "B_0x0,B_0x1" bitfld.long 0x20 2. "SRLOCK258,sticky reload lock for fuse word 258" "B_0x0,B_0x1" bitfld.long 0x20 1. "SRLOCK257,sticky reload lock for fuse word 257" "B_0x0,B_0x1" bitfld.long 0x20 0. "SRLOCK256,sticky reload lock for fuse word 256" "B_0x0,B_0x1" line.long 0x24 "BSEC_SRLOCK9,BSEC sticky reload lock register 9" bitfld.long 0x24 31. "SRLOCK319,sticky reload lock for fuse word 319" "B_0x0,B_0x1" bitfld.long 0x24 30. "SRLOCK318,sticky reload lock for fuse word 318" "B_0x0,B_0x1" bitfld.long 0x24 29. "SRLOCK317,sticky reload lock for fuse word 317" "B_0x0,B_0x1" bitfld.long 0x24 28. "SRLOCK316,sticky reload lock for fuse word 316" "B_0x0,B_0x1" bitfld.long 0x24 27. "SRLOCK315,sticky reload lock for fuse word 315" "B_0x0,B_0x1" bitfld.long 0x24 26. "SRLOCK314,sticky reload lock for fuse word 314" "B_0x0,B_0x1" bitfld.long 0x24 25. "SRLOCK313,sticky reload lock for fuse word 313" "B_0x0,B_0x1" newline bitfld.long 0x24 24. "SRLOCK312,sticky reload lock for fuse word 312" "B_0x0,B_0x1" bitfld.long 0x24 23. "SRLOCK311,sticky reload lock for fuse word 311" "B_0x0,B_0x1" bitfld.long 0x24 22. "SRLOCK310,sticky reload lock for fuse word 310" "B_0x0,B_0x1" bitfld.long 0x24 21. "SRLOCK309,sticky reload lock for fuse word 309" "B_0x0,B_0x1" bitfld.long 0x24 20. "SRLOCK308,sticky reload lock for fuse word 308" "B_0x0,B_0x1" bitfld.long 0x24 19. "SRLOCK307,sticky reload lock for fuse word 307" "B_0x0,B_0x1" bitfld.long 0x24 18. "SRLOCK306,sticky reload lock for fuse word 306" "B_0x0,B_0x1" newline bitfld.long 0x24 17. "SRLOCK305,sticky reload lock for fuse word 305" "B_0x0,B_0x1" bitfld.long 0x24 16. "SRLOCK304,sticky reload lock for fuse word 304" "B_0x0,B_0x1" bitfld.long 0x24 15. "SRLOCK303,sticky reload lock for fuse word 303" "B_0x0,B_0x1" bitfld.long 0x24 14. "SRLOCK302,sticky reload lock for fuse word 302" "B_0x0,B_0x1" bitfld.long 0x24 13. "SRLOCK301,sticky reload lock for fuse word 301" "B_0x0,B_0x1" bitfld.long 0x24 12. "SRLOCK300,sticky reload lock for fuse word 300" "B_0x0,B_0x1" bitfld.long 0x24 11. "SRLOCK299,sticky reload lock for fuse word 299" "B_0x0,B_0x1" newline bitfld.long 0x24 10. "SRLOCK298,sticky reload lock for fuse word 298" "B_0x0,B_0x1" bitfld.long 0x24 9. "SRLOCK297,sticky reload lock for fuse word 297" "B_0x0,B_0x1" bitfld.long 0x24 8. "SRLOCK296,sticky reload lock for fuse word 296" "B_0x0,B_0x1" bitfld.long 0x24 7. "SRLOCK295,sticky reload lock for fuse word 295" "B_0x0,B_0x1" bitfld.long 0x24 6. "SRLOCK294,sticky reload lock for fuse word 294" "B_0x0,B_0x1" bitfld.long 0x24 5. "SRLOCK293,sticky reload lock for fuse word 293" "B_0x0,B_0x1" bitfld.long 0x24 4. "SRLOCK292,sticky reload lock for fuse word 292" "B_0x0,B_0x1" newline bitfld.long 0x24 3. "SRLOCK291,sticky reload lock for fuse word 291" "B_0x0,B_0x1" bitfld.long 0x24 2. "SRLOCK290,sticky reload lock for fuse word 290" "B_0x0,B_0x1" bitfld.long 0x24 1. "SRLOCK289,sticky reload lock for fuse word 289" "B_0x0,B_0x1" bitfld.long 0x24 0. "SRLOCK288,sticky reload lock for fuse word 288" "B_0x0,B_0x1" line.long 0x28 "BSEC_SRLOCK10,BSEC sticky reload lock register 10" bitfld.long 0x28 31. "SRLOCK351,sticky reload lock for fuse word 351" "B_0x0,B_0x1" bitfld.long 0x28 30. "SRLOCK350,sticky reload lock for fuse word 350" "B_0x0,B_0x1" bitfld.long 0x28 29. "SRLOCK349,sticky reload lock for fuse word 349" "B_0x0,B_0x1" bitfld.long 0x28 28. "SRLOCK348,sticky reload lock for fuse word 348" "B_0x0,B_0x1" bitfld.long 0x28 27. "SRLOCK347,sticky reload lock for fuse word 347" "B_0x0,B_0x1" bitfld.long 0x28 26. "SRLOCK346,sticky reload lock for fuse word 346" "B_0x0,B_0x1" bitfld.long 0x28 25. "SRLOCK345,sticky reload lock for fuse word 345" "B_0x0,B_0x1" newline bitfld.long 0x28 24. "SRLOCK344,sticky reload lock for fuse word 344" "B_0x0,B_0x1" bitfld.long 0x28 23. "SRLOCK343,sticky reload lock for fuse word 343" "B_0x0,B_0x1" bitfld.long 0x28 22. "SRLOCK342,sticky reload lock for fuse word 342" "B_0x0,B_0x1" bitfld.long 0x28 21. "SRLOCK341,sticky reload lock for fuse word 341" "B_0x0,B_0x1" bitfld.long 0x28 20. "SRLOCK340,sticky reload lock for fuse word 340" "B_0x0,B_0x1" bitfld.long 0x28 19. "SRLOCK339,sticky reload lock for fuse word 339" "B_0x0,B_0x1" bitfld.long 0x28 18. "SRLOCK338,sticky reload lock for fuse word 338" "B_0x0,B_0x1" newline bitfld.long 0x28 17. "SRLOCK337,sticky reload lock for fuse word 337" "B_0x0,B_0x1" bitfld.long 0x28 16. "SRLOCK336,sticky reload lock for fuse word 336" "B_0x0,B_0x1" bitfld.long 0x28 15. "SRLOCK335,sticky reload lock for fuse word 335" "B_0x0,B_0x1" bitfld.long 0x28 14. "SRLOCK334,sticky reload lock for fuse word 334" "B_0x0,B_0x1" bitfld.long 0x28 13. "SRLOCK333,sticky reload lock for fuse word 333" "B_0x0,B_0x1" bitfld.long 0x28 12. "SRLOCK332,sticky reload lock for fuse word 332" "B_0x0,B_0x1" bitfld.long 0x28 11. "SRLOCK331,sticky reload lock for fuse word 331" "B_0x0,B_0x1" newline bitfld.long 0x28 10. "SRLOCK330,sticky reload lock for fuse word 330" "B_0x0,B_0x1" bitfld.long 0x28 9. "SRLOCK329,sticky reload lock for fuse word 329" "B_0x0,B_0x1" bitfld.long 0x28 8. "SRLOCK328,sticky reload lock for fuse word 328" "B_0x0,B_0x1" bitfld.long 0x28 7. "SRLOCK327,sticky reload lock for fuse word 327" "B_0x0,B_0x1" bitfld.long 0x28 6. "SRLOCK326,sticky reload lock for fuse word 326" "B_0x0,B_0x1" bitfld.long 0x28 5. "SRLOCK325,sticky reload lock for fuse word 325" "B_0x0,B_0x1" bitfld.long 0x28 4. "SRLOCK324,sticky reload lock for fuse word 324" "B_0x0,B_0x1" newline bitfld.long 0x28 3. "SRLOCK323,sticky reload lock for fuse word 323" "B_0x0,B_0x1" bitfld.long 0x28 2. "SRLOCK322,sticky reload lock for fuse word 322" "B_0x0,B_0x1" bitfld.long 0x28 1. "SRLOCK321,sticky reload lock for fuse word 321" "B_0x0,B_0x1" bitfld.long 0x28 0. "SRLOCK320,sticky reload lock for fuse word 320" "B_0x0,B_0x1" line.long 0x2C "BSEC_SRLOCK11,BSEC sticky reload lock register 11" bitfld.long 0x2C 31. "SRLOCK383,sticky reload lock for fuse word 383" "B_0x0,B_0x1" bitfld.long 0x2C 30. "SRLOCK382,sticky reload lock for fuse word 382" "B_0x0,B_0x1" bitfld.long 0x2C 29. "SRLOCK381,sticky reload lock for fuse word 381" "B_0x0,B_0x1" bitfld.long 0x2C 28. "SRLOCK380,sticky reload lock for fuse word 380" "B_0x0,B_0x1" bitfld.long 0x2C 27. "SRLOCK379,sticky reload lock for fuse word 379" "B_0x0,B_0x1" bitfld.long 0x2C 26. "SRLOCK378,sticky reload lock for fuse word 378" "B_0x0,B_0x1" bitfld.long 0x2C 25. "SRLOCK377,sticky reload lock for fuse word 377" "B_0x0,B_0x1" newline bitfld.long 0x2C 24. "SRLOCK376,sticky reload lock for fuse word 376" "B_0x0,B_0x1" bitfld.long 0x2C 23. "SRLOCK375,sticky reload lock for fuse word 375" "B_0x0,B_0x1" bitfld.long 0x2C 22. "SRLOCK374,sticky reload lock for fuse word 374" "B_0x0,B_0x1" bitfld.long 0x2C 21. "SRLOCK373,sticky reload lock for fuse word 373" "B_0x0,B_0x1" bitfld.long 0x2C 20. "SRLOCK372,sticky reload lock for fuse word 372" "B_0x0,B_0x1" bitfld.long 0x2C 19. "SRLOCK371,sticky reload lock for fuse word 371" "B_0x0,B_0x1" bitfld.long 0x2C 18. "SRLOCK370,sticky reload lock for fuse word 370" "B_0x0,B_0x1" newline bitfld.long 0x2C 17. "SRLOCK369,sticky reload lock for fuse word 369" "B_0x0,B_0x1" bitfld.long 0x2C 16. "SRLOCK368,sticky reload lock for fuse word 368" "B_0x0,B_0x1" bitfld.long 0x2C 15. "SRLOCK367,sticky reload lock for fuse word 367" "B_0x0,B_0x1" bitfld.long 0x2C 14. "SRLOCK366,sticky reload lock for fuse word 366" "B_0x0,B_0x1" bitfld.long 0x2C 13. "SRLOCK365,sticky reload lock for fuse word 365" "B_0x0,B_0x1" bitfld.long 0x2C 12. "SRLOCK364,sticky reload lock for fuse word 364" "B_0x0,B_0x1" bitfld.long 0x2C 11. "SRLOCK363,sticky reload lock for fuse word 363" "B_0x0,B_0x1" newline bitfld.long 0x2C 10. "SRLOCK362,sticky reload lock for fuse word 362" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SRLOCK361,sticky reload lock for fuse word 361" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SRLOCK360,sticky reload lock for fuse word 360" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SRLOCK359,sticky reload lock for fuse word 359" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SRLOCK358,sticky reload lock for fuse word 358" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SRLOCK357,sticky reload lock for fuse word 357" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SRLOCK356,sticky reload lock for fuse word 356" "B_0x0,B_0x1" newline bitfld.long 0x2C 3. "SRLOCK355,sticky reload lock for fuse word 355" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SRLOCK354,sticky reload lock for fuse word 354" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SRLOCK353,sticky reload lock for fuse word 353" "B_0x0,B_0x1" bitfld.long 0x2C 0. "SRLOCK352,sticky reload lock for fuse word 352" "B_0x0,B_0x1" rgroup.long 0x8C0++0x2F line.long 0x0 "BSEC_OTPVLDR0,BSEC OTP valid register 0" bitfld.long 0x0 31. "VLDF31,Valid flag for shadow register 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "VLDF30,Valid flag for shadow register 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "VLDF29,Valid flag for shadow register 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "VLDF28,Valid flag for shadow register 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "VLDF27,Valid flag for shadow register 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "VLDF26,Valid flag for shadow register 26" "B_0x0,B_0x1" bitfld.long 0x0 25. "VLDF25,Valid flag for shadow register 25" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "VLDF24,Valid flag for shadow register 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "VLDF23,Valid flag for shadow register 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "VLDF22,Valid flag for shadow register 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "VLDF21,Valid flag for shadow register 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "VLDF20,Valid flag for shadow register 20" "B_0x0,B_0x1" bitfld.long 0x0 19. "VLDF19,Valid flag for shadow register 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "VLDF18,Valid flag for shadow register 18" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "VLDF17,Valid flag for shadow register 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "VLDF16,Valid flag for shadow register 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "VLDF15,Valid flag for shadow register 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "VLDF14,Valid flag for shadow register 14" "B_0x0,B_0x1" bitfld.long 0x0 13. "VLDF13,Valid flag for shadow register 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "VLDF12,Valid flag for shadow register 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "VLDF11,Valid flag for shadow register 11" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "VLDF10,Valid flag for shadow register 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "VLDF9,Valid flag for shadow register 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "VLDF8,Valid flag for shadow register 8" "B_0x0,B_0x1" bitfld.long 0x0 7. "VLDF7,Valid flag for shadow register 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "VLDF6,Valid flag for shadow register 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "VLDF5,Valid flag for shadow register 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "VLDF4,Valid flag for shadow register 4" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "VLDF3,Valid flag for shadow register 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "VLDF2,Valid flag for shadow register 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "VLDF1,Valid flag for shadow register 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "VLDF0,Valid flag for shadow register 0" "B_0x0,B_0x1" line.long 0x4 "BSEC_OTPVLDR1,BSEC OTP valid register 1" bitfld.long 0x4 31. "VLDF63,Valid flag for shadow register 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "VLDF62,Valid flag for shadow register 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "VLDF61,Valid flag for shadow register 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "VLDF60,Valid flag for shadow register 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "VLDF59,Valid flag for shadow register 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "VLDF58,Valid flag for shadow register 58" "B_0x0,B_0x1" bitfld.long 0x4 25. "VLDF57,Valid flag for shadow register 57" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "VLDF56,Valid flag for shadow register 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "VLDF55,Valid flag for shadow register 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "VLDF54,Valid flag for shadow register 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "VLDF53,Valid flag for shadow register 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "VLDF52,Valid flag for shadow register 52" "B_0x0,B_0x1" bitfld.long 0x4 19. "VLDF51,Valid flag for shadow register 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "VLDF50,Valid flag for shadow register 50" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "VLDF49,Valid flag for shadow register 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "VLDF48,Valid flag for shadow register 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "VLDF47,Valid flag for shadow register 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "VLDF46,Valid flag for shadow register 46" "B_0x0,B_0x1" bitfld.long 0x4 13. "VLDF45,Valid flag for shadow register 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "VLDF44,Valid flag for shadow register 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "VLDF43,Valid flag for shadow register 43" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "VLDF42,Valid flag for shadow register 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "VLDF41,Valid flag for shadow register 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "VLDF40,Valid flag for shadow register 40" "B_0x0,B_0x1" bitfld.long 0x4 7. "VLDF39,Valid flag for shadow register 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "VLDF38,Valid flag for shadow register 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "VLDF37,Valid flag for shadow register 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "VLDF36,Valid flag for shadow register 36" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "VLDF35,Valid flag for shadow register 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "VLDF34,Valid flag for shadow register 34" "B_0x0,B_0x1" bitfld.long 0x4 1. "VLDF33,Valid flag for shadow register 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "VLDF32,Valid flag for shadow register 32" "B_0x0,B_0x1" line.long 0x8 "BSEC_OTPVLDR2,BSEC OTP valid register 2" bitfld.long 0x8 31. "VLDF95,Valid flag for shadow register 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "VLDF94,Valid flag for shadow register 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "VLDF93,Valid flag for shadow register 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "VLDF92,Valid flag for shadow register 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "VLDF91,Valid flag for shadow register 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "VLDF90,Valid flag for shadow register 90" "B_0x0,B_0x1" bitfld.long 0x8 25. "VLDF89,Valid flag for shadow register 89" "B_0x0,B_0x1" newline bitfld.long 0x8 24. "VLDF88,Valid flag for shadow register 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "VLDF87,Valid flag for shadow register 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "VLDF86,Valid flag for shadow register 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "VLDF85,Valid flag for shadow register 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "VLDF84,Valid flag for shadow register 84" "B_0x0,B_0x1" bitfld.long 0x8 19. "VLDF83,Valid flag for shadow register 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "VLDF82,Valid flag for shadow register 82" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "VLDF81,Valid flag for shadow register 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "VLDF80,Valid flag for shadow register 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "VLDF79,Valid flag for shadow register 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "VLDF78,Valid flag for shadow register 78" "B_0x0,B_0x1" bitfld.long 0x8 13. "VLDF77,Valid flag for shadow register 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "VLDF76,Valid flag for shadow register 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "VLDF75,Valid flag for shadow register 75" "B_0x0,B_0x1" newline bitfld.long 0x8 10. "VLDF74,Valid flag for shadow register 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "VLDF73,Valid flag for shadow register 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "VLDF72,Valid flag for shadow register 72" "B_0x0,B_0x1" bitfld.long 0x8 7. "VLDF71,Valid flag for shadow register 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "VLDF70,Valid flag for shadow register 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "VLDF69,Valid flag for shadow register 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "VLDF68,Valid flag for shadow register 68" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "VLDF67,Valid flag for shadow register 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "VLDF66,Valid flag for shadow register 66" "B_0x0,B_0x1" bitfld.long 0x8 1. "VLDF65,Valid flag for shadow register 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "VLDF64,Valid flag for shadow register 64" "B_0x0,B_0x1" line.long 0xC "BSEC_OTPVLDR3,BSEC OTP valid register 3" bitfld.long 0xC 31. "VLDF127,Valid flag for shadow register 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "VLDF126,Valid flag for shadow register 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "VLDF125,Valid flag for shadow register 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "VLDF124,Valid flag for shadow register 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "VLDF123,Valid flag for shadow register 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "VLDF122,Valid flag for shadow register 122" "B_0x0,B_0x1" bitfld.long 0xC 25. "VLDF121,Valid flag for shadow register 121" "B_0x0,B_0x1" newline bitfld.long 0xC 24. "VLDF120,Valid flag for shadow register 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "VLDF119,Valid flag for shadow register 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "VLDF118,Valid flag for shadow register 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "VLDF117,Valid flag for shadow register 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "VLDF116,Valid flag for shadow register 116" "B_0x0,B_0x1" bitfld.long 0xC 19. "VLDF115,Valid flag for shadow register 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "VLDF114,Valid flag for shadow register 114" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "VLDF113,Valid flag for shadow register 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "VLDF112,Valid flag for shadow register 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "VLDF111,Valid flag for shadow register 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "VLDF110,Valid flag for shadow register 110" "B_0x0,B_0x1" bitfld.long 0xC 13. "VLDF109,Valid flag for shadow register 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "VLDF108,Valid flag for shadow register 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "VLDF107,Valid flag for shadow register 107" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "VLDF106,Valid flag for shadow register 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "VLDF105,Valid flag for shadow register 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "VLDF104,Valid flag for shadow register 104" "B_0x0,B_0x1" bitfld.long 0xC 7. "VLDF103,Valid flag for shadow register 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "VLDF102,Valid flag for shadow register 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "VLDF101,Valid flag for shadow register 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "VLDF100,Valid flag for shadow register 100" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "VLDF99,Valid flag for shadow register 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "VLDF98,Valid flag for shadow register 98" "B_0x0,B_0x1" bitfld.long 0xC 1. "VLDF97,Valid flag for shadow register 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "VLDF96,Valid flag for shadow register 96" "B_0x0,B_0x1" line.long 0x10 "BSEC_OTPVLDR4,BSEC OTP valid register 4" bitfld.long 0x10 31. "VLDF159,Valid flag for shadow register 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "VLDF158,Valid flag for shadow register 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "VLDF157,Valid flag for shadow register 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "VLDF156,Valid flag for shadow register 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "VLDF155,Valid flag for shadow register 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "VLDF154,Valid flag for shadow register 154" "B_0x0,B_0x1" bitfld.long 0x10 25. "VLDF153,Valid flag for shadow register 153" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "VLDF152,Valid flag for shadow register 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "VLDF151,Valid flag for shadow register 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "VLDF150,Valid flag for shadow register 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "VLDF149,Valid flag for shadow register 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "VLDF148,Valid flag for shadow register 148" "B_0x0,B_0x1" bitfld.long 0x10 19. "VLDF147,Valid flag for shadow register 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "VLDF146,Valid flag for shadow register 146" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "VLDF145,Valid flag for shadow register 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "VLDF144,Valid flag for shadow register 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "VLDF143,Valid flag for shadow register 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "VLDF142,Valid flag for shadow register 142" "B_0x0,B_0x1" bitfld.long 0x10 13. "VLDF141,Valid flag for shadow register 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "VLDF140,Valid flag for shadow register 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "VLDF139,Valid flag for shadow register 139" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "VLDF138,Valid flag for shadow register 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "VLDF137,Valid flag for shadow register 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "VLDF136,Valid flag for shadow register 136" "B_0x0,B_0x1" bitfld.long 0x10 7. "VLDF135,Valid flag for shadow register 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "VLDF134,Valid flag for shadow register 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "VLDF133,Valid flag for shadow register 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "VLDF132,Valid flag for shadow register 132" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "VLDF131,Valid flag for shadow register 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "VLDF130,Valid flag for shadow register 130" "B_0x0,B_0x1" bitfld.long 0x10 1. "VLDF129,Valid flag for shadow register 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "VLDF128,Valid flag for shadow register 128" "B_0x0,B_0x1" line.long 0x14 "BSEC_OTPVLDR5,BSEC OTP valid register 5" bitfld.long 0x14 31. "VLDF191,Valid flag for shadow register 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "VLDF190,Valid flag for shadow register 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "VLDF189,Valid flag for shadow register 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "VLDF188,Valid flag for shadow register 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "VLDF187,Valid flag for shadow register 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "VLDF186,Valid flag for shadow register 186" "B_0x0,B_0x1" bitfld.long 0x14 25. "VLDF185,Valid flag for shadow register 185" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "VLDF184,Valid flag for shadow register 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "VLDF183,Valid flag for shadow register 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "VLDF182,Valid flag for shadow register 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "VLDF181,Valid flag for shadow register 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "VLDF180,Valid flag for shadow register 180" "B_0x0,B_0x1" bitfld.long 0x14 19. "VLDF179,Valid flag for shadow register 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "VLDF178,Valid flag for shadow register 178" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "VLDF177,Valid flag for shadow register 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "VLDF176,Valid flag for shadow register 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "VLDF175,Valid flag for shadow register 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "VLDF174,Valid flag for shadow register 174" "B_0x0,B_0x1" bitfld.long 0x14 13. "VLDF173,Valid flag for shadow register 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "VLDF172,Valid flag for shadow register 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "VLDF171,Valid flag for shadow register 171" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "VLDF170,Valid flag for shadow register 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "VLDF169,Valid flag for shadow register 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "VLDF168,Valid flag for shadow register 168" "B_0x0,B_0x1" bitfld.long 0x14 7. "VLDF167,Valid flag for shadow register 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "VLDF166,Valid flag for shadow register 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "VLDF165,Valid flag for shadow register 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "VLDF164,Valid flag for shadow register 164" "B_0x0,B_0x1" newline bitfld.long 0x14 3. "VLDF163,Valid flag for shadow register 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "VLDF162,Valid flag for shadow register 162" "B_0x0,B_0x1" bitfld.long 0x14 1. "VLDF161,Valid flag for shadow register 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "VLDF160,Valid flag for shadow register 160" "B_0x0,B_0x1" line.long 0x18 "BSEC_OTPVLDR6,BSEC OTP valid register 6" bitfld.long 0x18 31. "VLDF223,Valid flag for shadow register 223" "B_0x0,B_0x1" bitfld.long 0x18 30. "VLDF222,Valid flag for shadow register 222" "B_0x0,B_0x1" bitfld.long 0x18 29. "VLDF221,Valid flag for shadow register 221" "B_0x0,B_0x1" bitfld.long 0x18 28. "VLDF220,Valid flag for shadow register 220" "B_0x0,B_0x1" bitfld.long 0x18 27. "VLDF219,Valid flag for shadow register 219" "B_0x0,B_0x1" bitfld.long 0x18 26. "VLDF218,Valid flag for shadow register 218" "B_0x0,B_0x1" bitfld.long 0x18 25. "VLDF217,Valid flag for shadow register 217" "B_0x0,B_0x1" newline bitfld.long 0x18 24. "VLDF216,Valid flag for shadow register 216" "B_0x0,B_0x1" bitfld.long 0x18 23. "VLDF215,Valid flag for shadow register 215" "B_0x0,B_0x1" bitfld.long 0x18 22. "VLDF214,Valid flag for shadow register 214" "B_0x0,B_0x1" bitfld.long 0x18 21. "VLDF213,Valid flag for shadow register 213" "B_0x0,B_0x1" bitfld.long 0x18 20. "VLDF212,Valid flag for shadow register 212" "B_0x0,B_0x1" bitfld.long 0x18 19. "VLDF211,Valid flag for shadow register 211" "B_0x0,B_0x1" bitfld.long 0x18 18. "VLDF210,Valid flag for shadow register 210" "B_0x0,B_0x1" newline bitfld.long 0x18 17. "VLDF209,Valid flag for shadow register 209" "B_0x0,B_0x1" bitfld.long 0x18 16. "VLDF208,Valid flag for shadow register 208" "B_0x0,B_0x1" bitfld.long 0x18 15. "VLDF207,Valid flag for shadow register 207" "B_0x0,B_0x1" bitfld.long 0x18 14. "VLDF206,Valid flag for shadow register 206" "B_0x0,B_0x1" bitfld.long 0x18 13. "VLDF205,Valid flag for shadow register 205" "B_0x0,B_0x1" bitfld.long 0x18 12. "VLDF204,Valid flag for shadow register 204" "B_0x0,B_0x1" bitfld.long 0x18 11. "VLDF203,Valid flag for shadow register 203" "B_0x0,B_0x1" newline bitfld.long 0x18 10. "VLDF202,Valid flag for shadow register 202" "B_0x0,B_0x1" bitfld.long 0x18 9. "VLDF201,Valid flag for shadow register 201" "B_0x0,B_0x1" bitfld.long 0x18 8. "VLDF200,Valid flag for shadow register 200" "B_0x0,B_0x1" bitfld.long 0x18 7. "VLDF199,Valid flag for shadow register 199" "B_0x0,B_0x1" bitfld.long 0x18 6. "VLDF198,Valid flag for shadow register 198" "B_0x0,B_0x1" bitfld.long 0x18 5. "VLDF197,Valid flag for shadow register 197" "B_0x0,B_0x1" bitfld.long 0x18 4. "VLDF196,Valid flag for shadow register 196" "B_0x0,B_0x1" newline bitfld.long 0x18 3. "VLDF195,Valid flag for shadow register 195" "B_0x0,B_0x1" bitfld.long 0x18 2. "VLDF194,Valid flag for shadow register 194" "B_0x0,B_0x1" bitfld.long 0x18 1. "VLDF193,Valid flag for shadow register 193" "B_0x0,B_0x1" bitfld.long 0x18 0. "VLDF192,Valid flag for shadow register 192" "B_0x0,B_0x1" line.long 0x1C "BSEC_OTPVLDR7,BSEC OTP valid register 7" bitfld.long 0x1C 31. "VLDF255,Valid flag for shadow register 255" "B_0x0,B_0x1" bitfld.long 0x1C 30. "VLDF254,Valid flag for shadow register 254" "B_0x0,B_0x1" bitfld.long 0x1C 29. "VLDF253,Valid flag for shadow register 253" "B_0x0,B_0x1" bitfld.long 0x1C 28. "VLDF252,Valid flag for shadow register 252" "B_0x0,B_0x1" bitfld.long 0x1C 27. "VLDF251,Valid flag for shadow register 251" "B_0x0,B_0x1" bitfld.long 0x1C 26. "VLDF250,Valid flag for shadow register 250" "B_0x0,B_0x1" bitfld.long 0x1C 25. "VLDF249,Valid flag for shadow register 249" "B_0x0,B_0x1" newline bitfld.long 0x1C 24. "VLDF248,Valid flag for shadow register 248" "B_0x0,B_0x1" bitfld.long 0x1C 23. "VLDF247,Valid flag for shadow register 247" "B_0x0,B_0x1" bitfld.long 0x1C 22. "VLDF246,Valid flag for shadow register 246" "B_0x0,B_0x1" bitfld.long 0x1C 21. "VLDF245,Valid flag for shadow register 245" "B_0x0,B_0x1" bitfld.long 0x1C 20. "VLDF244,Valid flag for shadow register 244" "B_0x0,B_0x1" bitfld.long 0x1C 19. "VLDF243,Valid flag for shadow register 243" "B_0x0,B_0x1" bitfld.long 0x1C 18. "VLDF242,Valid flag for shadow register 242" "B_0x0,B_0x1" newline bitfld.long 0x1C 17. "VLDF241,Valid flag for shadow register 241" "B_0x0,B_0x1" bitfld.long 0x1C 16. "VLDF240,Valid flag for shadow register 240" "B_0x0,B_0x1" bitfld.long 0x1C 15. "VLDF239,Valid flag for shadow register 239" "B_0x0,B_0x1" bitfld.long 0x1C 14. "VLDF238,Valid flag for shadow register 238" "B_0x0,B_0x1" bitfld.long 0x1C 13. "VLDF237,Valid flag for shadow register 237" "B_0x0,B_0x1" bitfld.long 0x1C 12. "VLDF236,Valid flag for shadow register 236" "B_0x0,B_0x1" bitfld.long 0x1C 11. "VLDF235,Valid flag for shadow register 235" "B_0x0,B_0x1" newline bitfld.long 0x1C 10. "VLDF234,Valid flag for shadow register 234" "B_0x0,B_0x1" bitfld.long 0x1C 9. "VLDF233,Valid flag for shadow register 233" "B_0x0,B_0x1" bitfld.long 0x1C 8. "VLDF232,Valid flag for shadow register 232" "B_0x0,B_0x1" bitfld.long 0x1C 7. "VLDF231,Valid flag for shadow register 231" "B_0x0,B_0x1" bitfld.long 0x1C 6. "VLDF230,Valid flag for shadow register 230" "B_0x0,B_0x1" bitfld.long 0x1C 5. "VLDF229,Valid flag for shadow register 229" "B_0x0,B_0x1" bitfld.long 0x1C 4. "VLDF228,Valid flag for shadow register 228" "B_0x0,B_0x1" newline bitfld.long 0x1C 3. "VLDF227,Valid flag for shadow register 227" "B_0x0,B_0x1" bitfld.long 0x1C 2. "VLDF226,Valid flag for shadow register 226" "B_0x0,B_0x1" bitfld.long 0x1C 1. "VLDF225,Valid flag for shadow register 225" "B_0x0,B_0x1" bitfld.long 0x1C 0. "VLDF224,Valid flag for shadow register 224" "B_0x0,B_0x1" line.long 0x20 "BSEC_OTPVLDR8,BSEC OTP valid register 8" bitfld.long 0x20 31. "VLDF287,Valid flag for shadow register 287" "B_0x0,B_0x1" bitfld.long 0x20 30. "VLDF286,Valid flag for shadow register 286" "B_0x0,B_0x1" bitfld.long 0x20 29. "VLDF285,Valid flag for shadow register 285" "B_0x0,B_0x1" bitfld.long 0x20 28. "VLDF284,Valid flag for shadow register 284" "B_0x0,B_0x1" bitfld.long 0x20 27. "VLDF283,Valid flag for shadow register 283" "B_0x0,B_0x1" bitfld.long 0x20 26. "VLDF282,Valid flag for shadow register 282" "B_0x0,B_0x1" bitfld.long 0x20 25. "VLDF281,Valid flag for shadow register 281" "B_0x0,B_0x1" newline bitfld.long 0x20 24. "VLDF280,Valid flag for shadow register 280" "B_0x0,B_0x1" bitfld.long 0x20 23. "VLDF279,Valid flag for shadow register 279" "B_0x0,B_0x1" bitfld.long 0x20 22. "VLDF278,Valid flag for shadow register 278" "B_0x0,B_0x1" bitfld.long 0x20 21. "VLDF277,Valid flag for shadow register 277" "B_0x0,B_0x1" bitfld.long 0x20 20. "VLDF276,Valid flag for shadow register 276" "B_0x0,B_0x1" bitfld.long 0x20 19. "VLDF275,Valid flag for shadow register 275" "B_0x0,B_0x1" bitfld.long 0x20 18. "VLDF274,Valid flag for shadow register 274" "B_0x0,B_0x1" newline bitfld.long 0x20 17. "VLDF273,Valid flag for shadow register 273" "B_0x0,B_0x1" bitfld.long 0x20 16. "VLDF272,Valid flag for shadow register 272" "B_0x0,B_0x1" bitfld.long 0x20 15. "VLDF271,Valid flag for shadow register 271" "B_0x0,B_0x1" bitfld.long 0x20 14. "VLDF270,Valid flag for shadow register 270" "B_0x0,B_0x1" bitfld.long 0x20 13. "VLDF269,Valid flag for shadow register 269" "B_0x0,B_0x1" bitfld.long 0x20 12. "VLDF268,Valid flag for shadow register 268" "B_0x0,B_0x1" bitfld.long 0x20 11. "VLDF267,Valid flag for shadow register 267" "B_0x0,B_0x1" newline bitfld.long 0x20 10. "VLDF266,Valid flag for shadow register 266" "B_0x0,B_0x1" bitfld.long 0x20 9. "VLDF265,Valid flag for shadow register 265" "B_0x0,B_0x1" bitfld.long 0x20 8. "VLDF264,Valid flag for shadow register 264" "B_0x0,B_0x1" bitfld.long 0x20 7. "VLDF263,Valid flag for shadow register 263" "B_0x0,B_0x1" bitfld.long 0x20 6. "VLDF262,Valid flag for shadow register 262" "B_0x0,B_0x1" bitfld.long 0x20 5. "VLDF261,Valid flag for shadow register 261" "B_0x0,B_0x1" bitfld.long 0x20 4. "VLDF260,Valid flag for shadow register 260" "B_0x0,B_0x1" newline bitfld.long 0x20 3. "VLDF259,Valid flag for shadow register 259" "B_0x0,B_0x1" bitfld.long 0x20 2. "VLDF258,Valid flag for shadow register 258" "B_0x0,B_0x1" bitfld.long 0x20 1. "VLDF257,Valid flag for shadow register 257" "B_0x0,B_0x1" bitfld.long 0x20 0. "VLDF256,Valid flag for shadow register 256" "B_0x0,B_0x1" line.long 0x24 "BSEC_OTPVLDR9,BSEC OTP valid register 9" bitfld.long 0x24 31. "VLDF319,Valid flag for shadow register 319" "B_0x0,B_0x1" bitfld.long 0x24 30. "VLDF318,Valid flag for shadow register 318" "B_0x0,B_0x1" bitfld.long 0x24 29. "VLDF317,Valid flag for shadow register 317" "B_0x0,B_0x1" bitfld.long 0x24 28. "VLDF316,Valid flag for shadow register 316" "B_0x0,B_0x1" bitfld.long 0x24 27. "VLDF315,Valid flag for shadow register 315" "B_0x0,B_0x1" bitfld.long 0x24 26. "VLDF314,Valid flag for shadow register 314" "B_0x0,B_0x1" bitfld.long 0x24 25. "VLDF313,Valid flag for shadow register 313" "B_0x0,B_0x1" newline bitfld.long 0x24 24. "VLDF312,Valid flag for shadow register 312" "B_0x0,B_0x1" bitfld.long 0x24 23. "VLDF311,Valid flag for shadow register 311" "B_0x0,B_0x1" bitfld.long 0x24 22. "VLDF310,Valid flag for shadow register 310" "B_0x0,B_0x1" bitfld.long 0x24 21. "VLDF309,Valid flag for shadow register 309" "B_0x0,B_0x1" bitfld.long 0x24 20. "VLDF308,Valid flag for shadow register 308" "B_0x0,B_0x1" bitfld.long 0x24 19. "VLDF307,Valid flag for shadow register 307" "B_0x0,B_0x1" bitfld.long 0x24 18. "VLDF306,Valid flag for shadow register 306" "B_0x0,B_0x1" newline bitfld.long 0x24 17. "VLDF305,Valid flag for shadow register 305" "B_0x0,B_0x1" bitfld.long 0x24 16. "VLDF304,Valid flag for shadow register 304" "B_0x0,B_0x1" bitfld.long 0x24 15. "VLDF303,Valid flag for shadow register 303" "B_0x0,B_0x1" bitfld.long 0x24 14. "VLDF302,Valid flag for shadow register 302" "B_0x0,B_0x1" bitfld.long 0x24 13. "VLDF301,Valid flag for shadow register 301" "B_0x0,B_0x1" bitfld.long 0x24 12. "VLDF300,Valid flag for shadow register 300" "B_0x0,B_0x1" bitfld.long 0x24 11. "VLDF299,Valid flag for shadow register 299" "B_0x0,B_0x1" newline bitfld.long 0x24 10. "VLDF298,Valid flag for shadow register 298" "B_0x0,B_0x1" bitfld.long 0x24 9. "VLDF297,Valid flag for shadow register 297" "B_0x0,B_0x1" bitfld.long 0x24 8. "VLDF296,Valid flag for shadow register 296" "B_0x0,B_0x1" bitfld.long 0x24 7. "VLDF295,Valid flag for shadow register 295" "B_0x0,B_0x1" bitfld.long 0x24 6. "VLDF294,Valid flag for shadow register 294" "B_0x0,B_0x1" bitfld.long 0x24 5. "VLDF293,Valid flag for shadow register 293" "B_0x0,B_0x1" bitfld.long 0x24 4. "VLDF292,Valid flag for shadow register 292" "B_0x0,B_0x1" newline bitfld.long 0x24 3. "VLDF291,Valid flag for shadow register 291" "B_0x0,B_0x1" bitfld.long 0x24 2. "VLDF290,Valid flag for shadow register 290" "B_0x0,B_0x1" bitfld.long 0x24 1. "VLDF289,Valid flag for shadow register 289" "B_0x0,B_0x1" bitfld.long 0x24 0. "VLDF288,Valid flag for shadow register 288" "B_0x0,B_0x1" line.long 0x28 "BSEC_OTPVLDR10,BSEC OTP valid register 10" bitfld.long 0x28 31. "VLDF351,Valid flag for shadow register 351" "B_0x0,B_0x1" bitfld.long 0x28 30. "VLDF350,Valid flag for shadow register 350" "B_0x0,B_0x1" bitfld.long 0x28 29. "VLDF349,Valid flag for shadow register 349" "B_0x0,B_0x1" bitfld.long 0x28 28. "VLDF348,Valid flag for shadow register 348" "B_0x0,B_0x1" bitfld.long 0x28 27. "VLDF347,Valid flag for shadow register 347" "B_0x0,B_0x1" bitfld.long 0x28 26. "VLDF346,Valid flag for shadow register 346" "B_0x0,B_0x1" bitfld.long 0x28 25. "VLDF345,Valid flag for shadow register 345" "B_0x0,B_0x1" newline bitfld.long 0x28 24. "VLDF344,Valid flag for shadow register 344" "B_0x0,B_0x1" bitfld.long 0x28 23. "VLDF343,Valid flag for shadow register 343" "B_0x0,B_0x1" bitfld.long 0x28 22. "VLDF342,Valid flag for shadow register 342" "B_0x0,B_0x1" bitfld.long 0x28 21. "VLDF341,Valid flag for shadow register 341" "B_0x0,B_0x1" bitfld.long 0x28 20. "VLDF340,Valid flag for shadow register 340" "B_0x0,B_0x1" bitfld.long 0x28 19. "VLDF339,Valid flag for shadow register 339" "B_0x0,B_0x1" bitfld.long 0x28 18. "VLDF338,Valid flag for shadow register 338" "B_0x0,B_0x1" newline bitfld.long 0x28 17. "VLDF337,Valid flag for shadow register 337" "B_0x0,B_0x1" bitfld.long 0x28 16. "VLDF336,Valid flag for shadow register 336" "B_0x0,B_0x1" bitfld.long 0x28 15. "VLDF335,Valid flag for shadow register 335" "B_0x0,B_0x1" bitfld.long 0x28 14. "VLDF334,Valid flag for shadow register 334" "B_0x0,B_0x1" bitfld.long 0x28 13. "VLDF333,Valid flag for shadow register 333" "B_0x0,B_0x1" bitfld.long 0x28 12. "VLDF332,Valid flag for shadow register 332" "B_0x0,B_0x1" bitfld.long 0x28 11. "VLDF331,Valid flag for shadow register 331" "B_0x0,B_0x1" newline bitfld.long 0x28 10. "VLDF330,Valid flag for shadow register 330" "B_0x0,B_0x1" bitfld.long 0x28 9. "VLDF329,Valid flag for shadow register 329" "B_0x0,B_0x1" bitfld.long 0x28 8. "VLDF328,Valid flag for shadow register 328" "B_0x0,B_0x1" bitfld.long 0x28 7. "VLDF327,Valid flag for shadow register 327" "B_0x0,B_0x1" bitfld.long 0x28 6. "VLDF326,Valid flag for shadow register 326" "B_0x0,B_0x1" bitfld.long 0x28 5. "VLDF325,Valid flag for shadow register 325" "B_0x0,B_0x1" bitfld.long 0x28 4. "VLDF324,Valid flag for shadow register 324" "B_0x0,B_0x1" newline bitfld.long 0x28 3. "VLDF323,Valid flag for shadow register 323" "B_0x0,B_0x1" bitfld.long 0x28 2. "VLDF322,Valid flag for shadow register 322" "B_0x0,B_0x1" bitfld.long 0x28 1. "VLDF321,Valid flag for shadow register 321" "B_0x0,B_0x1" bitfld.long 0x28 0. "VLDF320,Valid flag for shadow register 320" "B_0x0,B_0x1" line.long 0x2C "BSEC_OTPVLDR11,BSEC OTP valid register 11" bitfld.long 0x2C 31. "VLDF383,Valid flag for shadow register 383" "B_0x0,B_0x1" bitfld.long 0x2C 30. "VLDF382,Valid flag for shadow register 382" "B_0x0,B_0x1" bitfld.long 0x2C 29. "VLDF381,Valid flag for shadow register 381" "B_0x0,B_0x1" bitfld.long 0x2C 28. "VLDF380,Valid flag for shadow register 380" "B_0x0,B_0x1" bitfld.long 0x2C 27. "VLDF379,Valid flag for shadow register 379" "B_0x0,B_0x1" bitfld.long 0x2C 26. "VLDF378,Valid flag for shadow register 378" "B_0x0,B_0x1" bitfld.long 0x2C 25. "VLDF377,Valid flag for shadow register 377" "B_0x0,B_0x1" newline bitfld.long 0x2C 24. "VLDF376,Valid flag for shadow register 376" "B_0x0,B_0x1" bitfld.long 0x2C 23. "VLDF375,Valid flag for shadow register 375" "B_0x0,B_0x1" bitfld.long 0x2C 22. "VLDF374,Valid flag for shadow register 374" "B_0x0,B_0x1" bitfld.long 0x2C 21. "VLDF373,Valid flag for shadow register 373" "B_0x0,B_0x1" bitfld.long 0x2C 20. "VLDF372,Valid flag for shadow register 372" "B_0x0,B_0x1" bitfld.long 0x2C 19. "VLDF371,Valid flag for shadow register 371" "B_0x0,B_0x1" bitfld.long 0x2C 18. "VLDF370,Valid flag for shadow register 370" "B_0x0,B_0x1" newline bitfld.long 0x2C 17. "VLDF369,Valid flag for shadow register 369" "B_0x0,B_0x1" bitfld.long 0x2C 16. "VLDF368,Valid flag for shadow register 368" "B_0x0,B_0x1" bitfld.long 0x2C 15. "VLDF367,Valid flag for shadow register 367" "B_0x0,B_0x1" bitfld.long 0x2C 14. "VLDF366,Valid flag for shadow register 366" "B_0x0,B_0x1" bitfld.long 0x2C 13. "VLDF365,Valid flag for shadow register 365" "B_0x0,B_0x1" bitfld.long 0x2C 12. "VLDF364,Valid flag for shadow register 364" "B_0x0,B_0x1" bitfld.long 0x2C 11. "VLDF363,Valid flag for shadow register 363" "B_0x0,B_0x1" newline bitfld.long 0x2C 10. "VLDF362,Valid flag for shadow register 362" "B_0x0,B_0x1" bitfld.long 0x2C 9. "VLDF361,Valid flag for shadow register 361" "B_0x0,B_0x1" bitfld.long 0x2C 8. "VLDF360,Valid flag for shadow register 360" "B_0x0,B_0x1" bitfld.long 0x2C 7. "VLDF359,Valid flag for shadow register 359" "B_0x0,B_0x1" bitfld.long 0x2C 6. "VLDF358,Valid flag for shadow register 358" "B_0x0,B_0x1" bitfld.long 0x2C 5. "VLDF357,Valid flag for shadow register 357" "B_0x0,B_0x1" bitfld.long 0x2C 4. "VLDF356,Valid flag for shadow register 356" "B_0x0,B_0x1" newline bitfld.long 0x2C 3. "VLDF355,Valid flag for shadow register 355" "B_0x0,B_0x1" bitfld.long 0x2C 2. "VLDF354,Valid flag for shadow register 354" "B_0x0,B_0x1" bitfld.long 0x2C 1. "VLDF353,Valid flag for shadow register 353" "B_0x0,B_0x1" bitfld.long 0x2C 0. "VLDF352,Valid flag for shadow register 352" "B_0x0,B_0x1" rgroup.long 0x940++0x2F line.long 0x0 "BSEC_SFSR0,BSEC shadowed fuses status register 0" bitfld.long 0x0 31. "SFW31,Shadowed fuse word 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "SFW30,Shadowed fuse word 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "SFW29,Shadowed fuse word 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "SFW28,Shadowed fuse word 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "SFW27,Shadowed fuse word 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "SFW26,Shadowed fuse word 26" "B_0x0,B_0x1" bitfld.long 0x0 25. "SFW25,Shadowed fuse word 25" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "SFW24,Shadowed fuse word 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "SFW23,Shadowed fuse word 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "SFW22,Shadowed fuse word 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "SFW21,Shadowed fuse word 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "SFW20,Shadowed fuse word 20" "B_0x0,B_0x1" bitfld.long 0x0 19. "SFW19,Shadowed fuse word 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "SFW18,Shadowed fuse word 18" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "SFW17,Shadowed fuse word 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "SFW16,Shadowed fuse word 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "SFW15,Shadowed fuse word 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "SFW14,Shadowed fuse word 14" "B_0x0,B_0x1" bitfld.long 0x0 13. "SFW13,Shadowed fuse word 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "SFW12,Shadowed fuse word 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "SFW11,Shadowed fuse word 11" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "SFW10,Shadowed fuse word 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "SFW9,Shadowed fuse word 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "SFW8,Shadowed fuse word 8" "B_0x0,B_0x1" bitfld.long 0x0 7. "SFW7,Shadowed fuse word 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "SFW6,Shadowed fuse word 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "SFW5,Shadowed fuse word 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "SFW4,Shadowed fuse word 4" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SFW3,Shadowed fuse word 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "SFW2,Shadowed fuse word 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "SFW1,Shadowed fuse word 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "SFW0,Shadowed fuse word 0" "B_0x0,B_0x1" line.long 0x4 "BSEC_SFSR1,BSEC shadowed fuses status register 1" bitfld.long 0x4 31. "SFW63,Shadowed fuse word 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "SFW62,Shadowed fuse word 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "SFW61,Shadowed fuse word 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "SFW60,Shadowed fuse word 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "SFW59,Shadowed fuse word 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "SFW58,Shadowed fuse word 58" "B_0x0,B_0x1" bitfld.long 0x4 25. "SFW57,Shadowed fuse word 57" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "SFW56,Shadowed fuse word 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "SFW55,Shadowed fuse word 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "SFW54,Shadowed fuse word 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "SFW53,Shadowed fuse word 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "SFW52,Shadowed fuse word 52" "B_0x0,B_0x1" bitfld.long 0x4 19. "SFW51,Shadowed fuse word 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "SFW50,Shadowed fuse word 50" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "SFW49,Shadowed fuse word 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "SFW48,Shadowed fuse word 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "SFW47,Shadowed fuse word 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "SFW46,Shadowed fuse word 46" "B_0x0,B_0x1" bitfld.long 0x4 13. "SFW45,Shadowed fuse word 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "SFW44,Shadowed fuse word 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "SFW43,Shadowed fuse word 43" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "SFW42,Shadowed fuse word 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "SFW41,Shadowed fuse word 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "SFW40,Shadowed fuse word 40" "B_0x0,B_0x1" bitfld.long 0x4 7. "SFW39,Shadowed fuse word 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "SFW38,Shadowed fuse word 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "SFW37,Shadowed fuse word 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "SFW36,Shadowed fuse word 36" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "SFW35,Shadowed fuse word 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "SFW34,Shadowed fuse word 34" "B_0x0,B_0x1" bitfld.long 0x4 1. "SFW33,Shadowed fuse word 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "SFW32,Shadowed fuse word 32" "B_0x0,B_0x1" line.long 0x8 "BSEC_SFSR2,BSEC shadowed fuses status register 2" bitfld.long 0x8 31. "SFW95,Shadowed fuse word 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "SFW94,Shadowed fuse word 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "SFW93,Shadowed fuse word 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "SFW92,Shadowed fuse word 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "SFW91,Shadowed fuse word 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "SFW90,Shadowed fuse word 90" "B_0x0,B_0x1" bitfld.long 0x8 25. "SFW89,Shadowed fuse word 89" "B_0x0,B_0x1" newline bitfld.long 0x8 24. "SFW88,Shadowed fuse word 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "SFW87,Shadowed fuse word 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "SFW86,Shadowed fuse word 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "SFW85,Shadowed fuse word 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "SFW84,Shadowed fuse word 84" "B_0x0,B_0x1" bitfld.long 0x8 19. "SFW83,Shadowed fuse word 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "SFW82,Shadowed fuse word 82" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "SFW81,Shadowed fuse word 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "SFW80,Shadowed fuse word 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "SFW79,Shadowed fuse word 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "SFW78,Shadowed fuse word 78" "B_0x0,B_0x1" bitfld.long 0x8 13. "SFW77,Shadowed fuse word 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "SFW76,Shadowed fuse word 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "SFW75,Shadowed fuse word 75" "B_0x0,B_0x1" newline bitfld.long 0x8 10. "SFW74,Shadowed fuse word 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "SFW73,Shadowed fuse word 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "SFW72,Shadowed fuse word 72" "B_0x0,B_0x1" bitfld.long 0x8 7. "SFW71,Shadowed fuse word 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "SFW70,Shadowed fuse word 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "SFW69,Shadowed fuse word 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "SFW68,Shadowed fuse word 68" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "SFW67,Shadowed fuse word 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "SFW66,Shadowed fuse word 66" "B_0x0,B_0x1" bitfld.long 0x8 1. "SFW65,Shadowed fuse word 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "SFW64,Shadowed fuse word 64" "B_0x0,B_0x1" line.long 0xC "BSEC_SFSR3,BSEC shadowed fuses status register 3" bitfld.long 0xC 31. "SFW127,Shadowed fuse word 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "SFW126,Shadowed fuse word 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "SFW125,Shadowed fuse word 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "SFW124,Shadowed fuse word 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "SFW123,Shadowed fuse word 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "SFW122,Shadowed fuse word 122" "B_0x0,B_0x1" bitfld.long 0xC 25. "SFW121,Shadowed fuse word 121" "B_0x0,B_0x1" newline bitfld.long 0xC 24. "SFW120,Shadowed fuse word 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "SFW119,Shadowed fuse word 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "SFW118,Shadowed fuse word 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "SFW117,Shadowed fuse word 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "SFW116,Shadowed fuse word 116" "B_0x0,B_0x1" bitfld.long 0xC 19. "SFW115,Shadowed fuse word 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "SFW114,Shadowed fuse word 114" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "SFW113,Shadowed fuse word 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "SFW112,Shadowed fuse word 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "SFW111,Shadowed fuse word 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "SFW110,Shadowed fuse word 110" "B_0x0,B_0x1" bitfld.long 0xC 13. "SFW109,Shadowed fuse word 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "SFW108,Shadowed fuse word 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "SFW107,Shadowed fuse word 107" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "SFW106,Shadowed fuse word 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "SFW105,Shadowed fuse word 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "SFW104,Shadowed fuse word 104" "B_0x0,B_0x1" bitfld.long 0xC 7. "SFW103,Shadowed fuse word 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "SFW102,Shadowed fuse word 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "SFW101,Shadowed fuse word 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "SFW100,Shadowed fuse word 100" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "SFW99,Shadowed fuse word 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "SFW98,Shadowed fuse word 98" "B_0x0,B_0x1" bitfld.long 0xC 1. "SFW97,Shadowed fuse word 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "SFW96,Shadowed fuse word 96" "B_0x0,B_0x1" line.long 0x10 "BSEC_SFSR4,BSEC shadowed fuses status register 4" bitfld.long 0x10 31. "SFW159,Shadowed fuse word 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "SFW158,Shadowed fuse word 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "SFW157,Shadowed fuse word 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "SFW156,Shadowed fuse word 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "SFW155,Shadowed fuse word 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "SFW154,Shadowed fuse word 154" "B_0x0,B_0x1" bitfld.long 0x10 25. "SFW153,Shadowed fuse word 153" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "SFW152,Shadowed fuse word 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "SFW151,Shadowed fuse word 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "SFW150,Shadowed fuse word 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "SFW149,Shadowed fuse word 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "SFW148,Shadowed fuse word 148" "B_0x0,B_0x1" bitfld.long 0x10 19. "SFW147,Shadowed fuse word 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "SFW146,Shadowed fuse word 146" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "SFW145,Shadowed fuse word 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "SFW144,Shadowed fuse word 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "SFW143,Shadowed fuse word 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "SFW142,Shadowed fuse word 142" "B_0x0,B_0x1" bitfld.long 0x10 13. "SFW141,Shadowed fuse word 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "SFW140,Shadowed fuse word 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "SFW139,Shadowed fuse word 139" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "SFW138,Shadowed fuse word 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "SFW137,Shadowed fuse word 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "SFW136,Shadowed fuse word 136" "B_0x0,B_0x1" bitfld.long 0x10 7. "SFW135,Shadowed fuse word 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "SFW134,Shadowed fuse word 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "SFW133,Shadowed fuse word 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "SFW132,Shadowed fuse word 132" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "SFW131,Shadowed fuse word 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "SFW130,Shadowed fuse word 130" "B_0x0,B_0x1" bitfld.long 0x10 1. "SFW129,Shadowed fuse word 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "SFW128,Shadowed fuse word 128" "B_0x0,B_0x1" line.long 0x14 "BSEC_SFSR5,BSEC shadowed fuses status register 5" bitfld.long 0x14 31. "SFW191,Shadowed fuse word 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "SFW190,Shadowed fuse word 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "SFW189,Shadowed fuse word 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "SFW188,Shadowed fuse word 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "SFW187,Shadowed fuse word 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "SFW186,Shadowed fuse word 186" "B_0x0,B_0x1" bitfld.long 0x14 25. "SFW185,Shadowed fuse word 185" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "SFW184,Shadowed fuse word 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "SFW183,Shadowed fuse word 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "SFW182,Shadowed fuse word 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "SFW181,Shadowed fuse word 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "SFW180,Shadowed fuse word 180" "B_0x0,B_0x1" bitfld.long 0x14 19. "SFW179,Shadowed fuse word 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "SFW178,Shadowed fuse word 178" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "SFW177,Shadowed fuse word 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "SFW176,Shadowed fuse word 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "SFW175,Shadowed fuse word 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "SFW174,Shadowed fuse word 174" "B_0x0,B_0x1" bitfld.long 0x14 13. "SFW173,Shadowed fuse word 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "SFW172,Shadowed fuse word 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "SFW171,Shadowed fuse word 171" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "SFW170,Shadowed fuse word 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "SFW169,Shadowed fuse word 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "SFW168,Shadowed fuse word 168" "B_0x0,B_0x1" bitfld.long 0x14 7. "SFW167,Shadowed fuse word 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "SFW166,Shadowed fuse word 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "SFW165,Shadowed fuse word 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "SFW164,Shadowed fuse word 164" "B_0x0,B_0x1" newline bitfld.long 0x14 3. "SFW163,Shadowed fuse word 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "SFW162,Shadowed fuse word 162" "B_0x0,B_0x1" bitfld.long 0x14 1. "SFW161,Shadowed fuse word 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "SFW160,Shadowed fuse word 160" "B_0x0,B_0x1" line.long 0x18 "BSEC_SFSR6,BSEC shadowed fuses status register 6" bitfld.long 0x18 31. "SFW223,Shadowed fuse word 223" "B_0x0,B_0x1" bitfld.long 0x18 30. "SFW222,Shadowed fuse word 222" "B_0x0,B_0x1" bitfld.long 0x18 29. "SFW221,Shadowed fuse word 221" "B_0x0,B_0x1" bitfld.long 0x18 28. "SFW220,Shadowed fuse word 220" "B_0x0,B_0x1" bitfld.long 0x18 27. "SFW219,Shadowed fuse word 219" "B_0x0,B_0x1" bitfld.long 0x18 26. "SFW218,Shadowed fuse word 218" "B_0x0,B_0x1" bitfld.long 0x18 25. "SFW217,Shadowed fuse word 217" "B_0x0,B_0x1" newline bitfld.long 0x18 24. "SFW216,Shadowed fuse word 216" "B_0x0,B_0x1" bitfld.long 0x18 23. "SFW215,Shadowed fuse word 215" "B_0x0,B_0x1" bitfld.long 0x18 22. "SFW214,Shadowed fuse word 214" "B_0x0,B_0x1" bitfld.long 0x18 21. "SFW213,Shadowed fuse word 213" "B_0x0,B_0x1" bitfld.long 0x18 20. "SFW212,Shadowed fuse word 212" "B_0x0,B_0x1" bitfld.long 0x18 19. "SFW211,Shadowed fuse word 211" "B_0x0,B_0x1" bitfld.long 0x18 18. "SFW210,Shadowed fuse word 210" "B_0x0,B_0x1" newline bitfld.long 0x18 17. "SFW209,Shadowed fuse word 209" "B_0x0,B_0x1" bitfld.long 0x18 16. "SFW208,Shadowed fuse word 208" "B_0x0,B_0x1" bitfld.long 0x18 15. "SFW207,Shadowed fuse word 207" "B_0x0,B_0x1" bitfld.long 0x18 14. "SFW206,Shadowed fuse word 206" "B_0x0,B_0x1" bitfld.long 0x18 13. "SFW205,Shadowed fuse word 205" "B_0x0,B_0x1" bitfld.long 0x18 12. "SFW204,Shadowed fuse word 204" "B_0x0,B_0x1" bitfld.long 0x18 11. "SFW203,Shadowed fuse word 203" "B_0x0,B_0x1" newline bitfld.long 0x18 10. "SFW202,Shadowed fuse word 202" "B_0x0,B_0x1" bitfld.long 0x18 9. "SFW201,Shadowed fuse word 201" "B_0x0,B_0x1" bitfld.long 0x18 8. "SFW200,Shadowed fuse word 200" "B_0x0,B_0x1" bitfld.long 0x18 7. "SFW199,Shadowed fuse word 199" "B_0x0,B_0x1" bitfld.long 0x18 6. "SFW198,Shadowed fuse word 198" "B_0x0,B_0x1" bitfld.long 0x18 5. "SFW197,Shadowed fuse word 197" "B_0x0,B_0x1" bitfld.long 0x18 4. "SFW196,Shadowed fuse word 196" "B_0x0,B_0x1" newline bitfld.long 0x18 3. "SFW195,Shadowed fuse word 195" "B_0x0,B_0x1" bitfld.long 0x18 2. "SFW194,Shadowed fuse word 194" "B_0x0,B_0x1" bitfld.long 0x18 1. "SFW193,Shadowed fuse word 193" "B_0x0,B_0x1" bitfld.long 0x18 0. "SFW192,Shadowed fuse word 192" "B_0x0,B_0x1" line.long 0x1C "BSEC_SFSR7,BSEC shadowed fuses status register 7" bitfld.long 0x1C 31. "SFW255,Shadowed fuse word 255" "B_0x0,B_0x1" bitfld.long 0x1C 30. "SFW254,Shadowed fuse word 254" "B_0x0,B_0x1" bitfld.long 0x1C 29. "SFW253,Shadowed fuse word 253" "B_0x0,B_0x1" bitfld.long 0x1C 28. "SFW252,Shadowed fuse word 252" "B_0x0,B_0x1" bitfld.long 0x1C 27. "SFW251,Shadowed fuse word 251" "B_0x0,B_0x1" bitfld.long 0x1C 26. "SFW250,Shadowed fuse word 250" "B_0x0,B_0x1" bitfld.long 0x1C 25. "SFW249,Shadowed fuse word 249" "B_0x0,B_0x1" newline bitfld.long 0x1C 24. "SFW248,Shadowed fuse word 248" "B_0x0,B_0x1" bitfld.long 0x1C 23. "SFW247,Shadowed fuse word 247" "B_0x0,B_0x1" bitfld.long 0x1C 22. "SFW246,Shadowed fuse word 246" "B_0x0,B_0x1" bitfld.long 0x1C 21. "SFW245,Shadowed fuse word 245" "B_0x0,B_0x1" bitfld.long 0x1C 20. "SFW244,Shadowed fuse word 244" "B_0x0,B_0x1" bitfld.long 0x1C 19. "SFW243,Shadowed fuse word 243" "B_0x0,B_0x1" bitfld.long 0x1C 18. "SFW242,Shadowed fuse word 242" "B_0x0,B_0x1" newline bitfld.long 0x1C 17. "SFW241,Shadowed fuse word 241" "B_0x0,B_0x1" bitfld.long 0x1C 16. "SFW240,Shadowed fuse word 240" "B_0x0,B_0x1" bitfld.long 0x1C 15. "SFW239,Shadowed fuse word 239" "B_0x0,B_0x1" bitfld.long 0x1C 14. "SFW238,Shadowed fuse word 238" "B_0x0,B_0x1" bitfld.long 0x1C 13. "SFW237,Shadowed fuse word 237" "B_0x0,B_0x1" bitfld.long 0x1C 12. "SFW236,Shadowed fuse word 236" "B_0x0,B_0x1" bitfld.long 0x1C 11. "SFW235,Shadowed fuse word 235" "B_0x0,B_0x1" newline bitfld.long 0x1C 10. "SFW234,Shadowed fuse word 234" "B_0x0,B_0x1" bitfld.long 0x1C 9. "SFW233,Shadowed fuse word 233" "B_0x0,B_0x1" bitfld.long 0x1C 8. "SFW232,Shadowed fuse word 232" "B_0x0,B_0x1" bitfld.long 0x1C 7. "SFW231,Shadowed fuse word 231" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SFW230,Shadowed fuse word 230" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SFW229,Shadowed fuse word 229" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SFW228,Shadowed fuse word 228" "B_0x0,B_0x1" newline bitfld.long 0x1C 3. "SFW227,Shadowed fuse word 227" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SFW226,Shadowed fuse word 226" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SFW225,Shadowed fuse word 225" "B_0x0,B_0x1" bitfld.long 0x1C 0. "SFW224,Shadowed fuse word 224" "B_0x0,B_0x1" line.long 0x20 "BSEC_SFSR8,BSEC shadowed fuses status register 8" bitfld.long 0x20 31. "SFW287,Shadowed fuse word 287" "B_0x0,B_0x1" bitfld.long 0x20 30. "SFW286,Shadowed fuse word 286" "B_0x0,B_0x1" bitfld.long 0x20 29. "SFW285,Shadowed fuse word 285" "B_0x0,B_0x1" bitfld.long 0x20 28. "SFW284,Shadowed fuse word 284" "B_0x0,B_0x1" bitfld.long 0x20 27. "SFW283,Shadowed fuse word 283" "B_0x0,B_0x1" bitfld.long 0x20 26. "SFW282,Shadowed fuse word 282" "B_0x0,B_0x1" bitfld.long 0x20 25. "SFW281,Shadowed fuse word 281" "B_0x0,B_0x1" newline bitfld.long 0x20 24. "SFW280,Shadowed fuse word 280" "B_0x0,B_0x1" bitfld.long 0x20 23. "SFW279,Shadowed fuse word 279" "B_0x0,B_0x1" bitfld.long 0x20 22. "SFW278,Shadowed fuse word 278" "B_0x0,B_0x1" bitfld.long 0x20 21. "SFW277,Shadowed fuse word 277" "B_0x0,B_0x1" bitfld.long 0x20 20. "SFW276,Shadowed fuse word 276" "B_0x0,B_0x1" bitfld.long 0x20 19. "SFW275,Shadowed fuse word 275" "B_0x0,B_0x1" bitfld.long 0x20 18. "SFW274,Shadowed fuse word 274" "B_0x0,B_0x1" newline bitfld.long 0x20 17. "SFW273,Shadowed fuse word 273" "B_0x0,B_0x1" bitfld.long 0x20 16. "SFW272,Shadowed fuse word 272" "B_0x0,B_0x1" bitfld.long 0x20 15. "SFW271,Shadowed fuse word 271" "B_0x0,B_0x1" bitfld.long 0x20 14. "SFW270,Shadowed fuse word 270" "B_0x0,B_0x1" bitfld.long 0x20 13. "SFW269,Shadowed fuse word 269" "B_0x0,B_0x1" bitfld.long 0x20 12. "SFW268,Shadowed fuse word 268" "B_0x0,B_0x1" bitfld.long 0x20 11. "SFW267,Shadowed fuse word 267" "B_0x0,B_0x1" newline bitfld.long 0x20 10. "SFW266,Shadowed fuse word 266" "B_0x0,B_0x1" bitfld.long 0x20 9. "SFW265,Shadowed fuse word 265" "B_0x0,B_0x1" bitfld.long 0x20 8. "SFW264,Shadowed fuse word 264" "B_0x0,B_0x1" bitfld.long 0x20 7. "SFW263,Shadowed fuse word 263" "B_0x0,B_0x1" bitfld.long 0x20 6. "SFW262,Shadowed fuse word 262" "B_0x0,B_0x1" bitfld.long 0x20 5. "SFW261,Shadowed fuse word 261" "B_0x0,B_0x1" bitfld.long 0x20 4. "SFW260,Shadowed fuse word 260" "B_0x0,B_0x1" newline bitfld.long 0x20 3. "SFW259,Shadowed fuse word 259" "B_0x0,B_0x1" bitfld.long 0x20 2. "SFW258,Shadowed fuse word 258" "B_0x0,B_0x1" bitfld.long 0x20 1. "SFW257,Shadowed fuse word 257" "B_0x0,B_0x1" bitfld.long 0x20 0. "SFW256,Shadowed fuse word 256" "B_0x0,B_0x1" line.long 0x24 "BSEC_SFSR9,BSEC shadowed fuses status register 9" bitfld.long 0x24 31. "SFW319,Shadowed fuse word 319" "B_0x0,B_0x1" bitfld.long 0x24 30. "SFW318,Shadowed fuse word 318" "B_0x0,B_0x1" bitfld.long 0x24 29. "SFW317,Shadowed fuse word 317" "B_0x0,B_0x1" bitfld.long 0x24 28. "SFW316,Shadowed fuse word 316" "B_0x0,B_0x1" bitfld.long 0x24 27. "SFW315,Shadowed fuse word 315" "B_0x0,B_0x1" bitfld.long 0x24 26. "SFW314,Shadowed fuse word 314" "B_0x0,B_0x1" bitfld.long 0x24 25. "SFW313,Shadowed fuse word 313" "B_0x0,B_0x1" newline bitfld.long 0x24 24. "SFW312,Shadowed fuse word 312" "B_0x0,B_0x1" bitfld.long 0x24 23. "SFW311,Shadowed fuse word 311" "B_0x0,B_0x1" bitfld.long 0x24 22. "SFW310,Shadowed fuse word 310" "B_0x0,B_0x1" bitfld.long 0x24 21. "SFW309,Shadowed fuse word 309" "B_0x0,B_0x1" bitfld.long 0x24 20. "SFW308,Shadowed fuse word 308" "B_0x0,B_0x1" bitfld.long 0x24 19. "SFW307,Shadowed fuse word 307" "B_0x0,B_0x1" bitfld.long 0x24 18. "SFW306,Shadowed fuse word 306" "B_0x0,B_0x1" newline bitfld.long 0x24 17. "SFW305,Shadowed fuse word 305" "B_0x0,B_0x1" bitfld.long 0x24 16. "SFW304,Shadowed fuse word 304" "B_0x0,B_0x1" bitfld.long 0x24 15. "SFW303,Shadowed fuse word 303" "B_0x0,B_0x1" bitfld.long 0x24 14. "SFW302,Shadowed fuse word 302" "B_0x0,B_0x1" bitfld.long 0x24 13. "SFW301,Shadowed fuse word 301" "B_0x0,B_0x1" bitfld.long 0x24 12. "SFW300,Shadowed fuse word 300" "B_0x0,B_0x1" bitfld.long 0x24 11. "SFW299,Shadowed fuse word 299" "B_0x0,B_0x1" newline bitfld.long 0x24 10. "SFW298,Shadowed fuse word 298" "B_0x0,B_0x1" bitfld.long 0x24 9. "SFW297,Shadowed fuse word 297" "B_0x0,B_0x1" bitfld.long 0x24 8. "SFW296,Shadowed fuse word 296" "B_0x0,B_0x1" bitfld.long 0x24 7. "SFW295,Shadowed fuse word 295" "B_0x0,B_0x1" bitfld.long 0x24 6. "SFW294,Shadowed fuse word 294" "B_0x0,B_0x1" bitfld.long 0x24 5. "SFW293,Shadowed fuse word 293" "B_0x0,B_0x1" bitfld.long 0x24 4. "SFW292,Shadowed fuse word 292" "B_0x0,B_0x1" newline bitfld.long 0x24 3. "SFW291,Shadowed fuse word 291" "B_0x0,B_0x1" bitfld.long 0x24 2. "SFW290,Shadowed fuse word 290" "B_0x0,B_0x1" bitfld.long 0x24 1. "SFW289,Shadowed fuse word 289" "B_0x0,B_0x1" bitfld.long 0x24 0. "SFW288,Shadowed fuse word 288" "B_0x0,B_0x1" line.long 0x28 "BSEC_SFSR10,BSEC shadowed fuses status register 10" bitfld.long 0x28 31. "SFW351,Shadowed fuse word 351" "B_0x0,B_0x1" bitfld.long 0x28 30. "SFW350,Shadowed fuse word 350" "B_0x0,B_0x1" bitfld.long 0x28 29. "SFW349,Shadowed fuse word 349" "B_0x0,B_0x1" bitfld.long 0x28 28. "SFW348,Shadowed fuse word 348" "B_0x0,B_0x1" bitfld.long 0x28 27. "SFW347,Shadowed fuse word 347" "B_0x0,B_0x1" bitfld.long 0x28 26. "SFW346,Shadowed fuse word 346" "B_0x0,B_0x1" bitfld.long 0x28 25. "SFW345,Shadowed fuse word 345" "B_0x0,B_0x1" newline bitfld.long 0x28 24. "SFW344,Shadowed fuse word 344" "B_0x0,B_0x1" bitfld.long 0x28 23. "SFW343,Shadowed fuse word 343" "B_0x0,B_0x1" bitfld.long 0x28 22. "SFW342,Shadowed fuse word 342" "B_0x0,B_0x1" bitfld.long 0x28 21. "SFW341,Shadowed fuse word 341" "B_0x0,B_0x1" bitfld.long 0x28 20. "SFW340,Shadowed fuse word 340" "B_0x0,B_0x1" bitfld.long 0x28 19. "SFW339,Shadowed fuse word 339" "B_0x0,B_0x1" bitfld.long 0x28 18. "SFW338,Shadowed fuse word 338" "B_0x0,B_0x1" newline bitfld.long 0x28 17. "SFW337,Shadowed fuse word 337" "B_0x0,B_0x1" bitfld.long 0x28 16. "SFW336,Shadowed fuse word 336" "B_0x0,B_0x1" bitfld.long 0x28 15. "SFW335,Shadowed fuse word 335" "B_0x0,B_0x1" bitfld.long 0x28 14. "SFW334,Shadowed fuse word 334" "B_0x0,B_0x1" bitfld.long 0x28 13. "SFW333,Shadowed fuse word 333" "B_0x0,B_0x1" bitfld.long 0x28 12. "SFW332,Shadowed fuse word 332" "B_0x0,B_0x1" bitfld.long 0x28 11. "SFW331,Shadowed fuse word 331" "B_0x0,B_0x1" newline bitfld.long 0x28 10. "SFW330,Shadowed fuse word 330" "B_0x0,B_0x1" bitfld.long 0x28 9. "SFW329,Shadowed fuse word 329" "B_0x0,B_0x1" bitfld.long 0x28 8. "SFW328,Shadowed fuse word 328" "B_0x0,B_0x1" bitfld.long 0x28 7. "SFW327,Shadowed fuse word 327" "B_0x0,B_0x1" bitfld.long 0x28 6. "SFW326,Shadowed fuse word 326" "B_0x0,B_0x1" bitfld.long 0x28 5. "SFW325,Shadowed fuse word 325" "B_0x0,B_0x1" bitfld.long 0x28 4. "SFW324,Shadowed fuse word 324" "B_0x0,B_0x1" newline bitfld.long 0x28 3. "SFW323,Shadowed fuse word 323" "B_0x0,B_0x1" bitfld.long 0x28 2. "SFW322,Shadowed fuse word 322" "B_0x0,B_0x1" bitfld.long 0x28 1. "SFW321,Shadowed fuse word 321" "B_0x0,B_0x1" bitfld.long 0x28 0. "SFW320,Shadowed fuse word 320" "B_0x0,B_0x1" line.long 0x2C "BSEC_SFSR11,BSEC shadowed fuses status register 11" bitfld.long 0x2C 31. "SFW383,Shadowed fuse word 383" "B_0x0,B_0x1" bitfld.long 0x2C 30. "SFW382,Shadowed fuse word 382" "B_0x0,B_0x1" bitfld.long 0x2C 29. "SFW381,Shadowed fuse word 381" "B_0x0,B_0x1" bitfld.long 0x2C 28. "SFW380,Shadowed fuse word 380" "B_0x0,B_0x1" bitfld.long 0x2C 27. "SFW379,Shadowed fuse word 379" "B_0x0,B_0x1" bitfld.long 0x2C 26. "SFW378,Shadowed fuse word 378" "B_0x0,B_0x1" bitfld.long 0x2C 25. "SFW377,Shadowed fuse word 377" "B_0x0,B_0x1" newline bitfld.long 0x2C 24. "SFW376,Shadowed fuse word 376" "B_0x0,B_0x1" bitfld.long 0x2C 23. "SFW375,Shadowed fuse word 375" "B_0x0,B_0x1" bitfld.long 0x2C 22. "SFW374,Shadowed fuse word 374" "B_0x0,B_0x1" bitfld.long 0x2C 21. "SFW373,Shadowed fuse word 373" "B_0x0,B_0x1" bitfld.long 0x2C 20. "SFW372,Shadowed fuse word 372" "B_0x0,B_0x1" bitfld.long 0x2C 19. "SFW371,Shadowed fuse word 371" "B_0x0,B_0x1" bitfld.long 0x2C 18. "SFW370,Shadowed fuse word 370" "B_0x0,B_0x1" newline bitfld.long 0x2C 17. "SFW369,Shadowed fuse word 369" "B_0x0,B_0x1" bitfld.long 0x2C 16. "SFW368,Shadowed fuse word 368" "B_0x0,B_0x1" bitfld.long 0x2C 15. "SFW367,Shadowed fuse word 367" "B_0x0,B_0x1" bitfld.long 0x2C 14. "SFW366,Shadowed fuse word 366" "B_0x0,B_0x1" bitfld.long 0x2C 13. "SFW365,Shadowed fuse word 365" "B_0x0,B_0x1" bitfld.long 0x2C 12. "SFW364,Shadowed fuse word 364" "B_0x0,B_0x1" bitfld.long 0x2C 11. "SFW363,Shadowed fuse word 363" "B_0x0,B_0x1" newline bitfld.long 0x2C 10. "SFW362,Shadowed fuse word 362" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SFW361,Shadowed fuse word 361" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SFW360,Shadowed fuse word 360" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SFW359,Shadowed fuse word 359" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SFW358,Shadowed fuse word 358" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SFW357,Shadowed fuse word 357" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SFW356,Shadowed fuse word 356" "B_0x0,B_0x1" newline bitfld.long 0x2C 3. "SFW355,Shadowed fuse word 355" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SFW354,Shadowed fuse word 354" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SFW353,Shadowed fuse word 353" "B_0x0,B_0x1" bitfld.long 0x2C 0. "SFW352,Shadowed fuse word 352" "B_0x0,B_0x1" group.long 0xC04++0x3 line.long 0x0 "BSEC_OTPCR,BSEC OTP control register" rbitfld.long 0x0 19.--21. "LASTCID,Last CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 14. "PPLOCK,Permanent programming lock" "B_0x0,B_0x1" bitfld.long 0x0 13. "PROG,Fuse word programming" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--8. 1. "ADDR,Fuse word address" wgroup.long 0xC08++0x3 line.long 0x0 "BSEC_WDR,BSEC write data register" hexmask.long 0x0 0.--31. 1. "WRDATA,OTP write data" group.long 0xE00++0x13 line.long 0x0 "BSEC_SCRATCHR0,BSEC scratch register 0" hexmask.long 0x0 0.--31. 1. "SDATA,Scratch data" line.long 0x4 "BSEC_SCRATCHR1,BSEC scratch register 1" hexmask.long 0x4 0.--31. 1. "SDATA,Scratch data" line.long 0x8 "BSEC_SCRATCHR2,BSEC scratch register 2" hexmask.long 0x8 0.--31. 1. "SDATA,Scratch data" line.long 0xC "BSEC_SCRATCHR3,BSEC scratch register 3" hexmask.long 0xC 0.--31. 1. "SDATA,Scratch data" line.long 0x10 "BSEC_LOCKR,BSEC lock register" bitfld.long 0x10 2. "HKLOCK,Hardware key lock" "B_0x0,B_0x1" bitfld.long 0x10 1. "DENLOCK,Debug enable register sticky lock" "B_0x0,B_0x1" bitfld.long 0x10 0. "GWLOCK,Global write lock" "B_0x0,B_0x1" rgroup.long 0xE14++0x3 line.long 0x0 "BSEC_JTAGINR,BSEC JTAG input register" hexmask.long 0x0 0.--31. 1. "JDATAIN,JTAG input data" wgroup.long 0xE18++0x3 line.long 0x0 "BSEC_JTAGOUTR,BSEC JTAG output register" hexmask.long 0x0 0.--31. 1. "JDATAOUT,JTAG output data" group.long 0xE20++0x7 line.long 0x0 "BSEC_DENR,BSEC debug enable register" bitfld.long 0x0 13.--14. "CP15SDIS,CP15SDISABLE for core x (x = 0 or 1)" "B_0x0,B_0x1,?,?" bitfld.long 0x0 12. "CFGSDIS,CFGSDISABLE" "B_0x0,B_0x1" bitfld.long 0x0 11. "SPNIDENM,Secure privilege non-invasive debug enable for Cortex-M" "B_0x0,B_0x1" bitfld.long 0x0 10. "SPIDENM,Secure privilege invasive debug enable for Cortex-M" "B_0x0,B_0x1" bitfld.long 0x0 9. "NIDENM,Non invasive debug enable for Cortex-M" "B_0x0,B_0x1" bitfld.long 0x0 8. "DBGENM,Debug enable for Cortex-M" "B_0x0,B_0x1" bitfld.long 0x0 7. "DBGSWEN,Self-hosted debug enable" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "SPNIDENA,Secure privilege non-invasive debug enable for Cortex-A" "B_0x0,B_0x1" bitfld.long 0x0 5. "SPIDENA,Secure privilege invasive debug enable for Cortex-A" "B_0x0,B_0x1" bitfld.long 0x0 4. "HDPEN,Hardware debug port enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "DEVICEEN,Device debug enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "NIDENA,Non invasive debug enable for Cortex-A" "B_0x0,B_0x1" bitfld.long 0x0 1. "DBGENA,Debug enable for Cortex-A" "B_0x0,B_0x1" line.long 0x4 "BSEC_UNMAPR,BSEC unmap register" hexmask.long 0x4 0.--31. 1. "UNMAP,Unmap key" rgroup.long 0xE40++0x7 line.long 0x0 "BSEC_SR,BSEC status register" hexmask.long.byte 0x0 26.--31. 1. "NVSTATE,Non-volatile state" bitfld.long 0x0 1. "HVALID,Hardware key valid" "B_0x0,B_0x1" line.long 0x4 "BSEC_OTPSR,BSEC OTP status register" bitfld.long 0x4 22. "AMEF,Addresses mismatch error flag" "0,1" bitfld.long 0x4 21. "PPLMF,Permanent programming lock mismatch flag" "0,1" bitfld.long 0x4 20. "PPLF,Permanent programming lock flag" "0,1" bitfld.long 0x4 19. "SECF,Single error correction flag" "0,1" bitfld.long 0x4 18. "DEDF,Double error detection flag" "0,1" bitfld.long 0x4 17. "DISTURBF,Disturb flag" "0,1" bitfld.long 0x4 16. "PROGFAIL,Programming failed" "0,1" newline bitfld.long 0x4 6. "OTPSEC,OTP with single error correction" "0,1" bitfld.long 0x4 5. "OTPERR,OTP with error" "0,1" bitfld.long 0x4 4. "OTPNVIR,OTP not virgin" "0,1" bitfld.long 0x4 2. "HIDEUP,Hide upper fuse words" "0,1" bitfld.long 0x4 1. "INIT_DONE,Initialization done" "0,1" bitfld.long 0x4 0. "BUSY,Busy flag" "B_0x0,B_0x1" group.long 0xF40++0x1F line.long 0x0 "BSEC_WOSCR0,BSEC write once scratch register 0" hexmask.long 0x0 0.--31. 1. "WOSDATA,Write once scratch data" line.long 0x4 "BSEC_WOSCR1,BSEC write once scratch register 1" hexmask.long 0x4 0.--31. 1. "WOSDATA,Write once scratch data" line.long 0x8 "BSEC_WOSCR2,BSEC write once scratch register 2" hexmask.long 0x8 0.--31. 1. "WOSDATA,Write once scratch data" line.long 0xC "BSEC_WOSCR3,BSEC write once scratch register 3" hexmask.long 0xC 0.--31. 1. "WOSDATA,Write once scratch data" line.long 0x10 "BSEC_WOSCR4,BSEC write once scratch register 4" hexmask.long 0x10 0.--31. 1. "WOSDATA,Write once scratch data" line.long 0x14 "BSEC_WOSCR5,BSEC write once scratch register 5" hexmask.long 0x14 0.--31. 1. "WOSDATA,Write once scratch data" line.long 0x18 "BSEC_WOSCR6,BSEC write once scratch register 6" hexmask.long 0x18 0.--31. 1. "WOSDATA,Write once scratch data" line.long 0x1C "BSEC_WOSCR7,BSEC write once scratch register 7" hexmask.long 0x1C 0.--31. 1. "WOSDATA,Write once scratch data" rgroup.long 0xFE8++0x7 line.long 0x0 "BSEC_HRCR,BSEC hot reset count register" hexmask.long 0x0 0.--31. 1. "HRC,Hot reset counter" line.long 0x4 "BSEC_WRCR,BSEC warm reset count register" hexmask.long 0x4 0.--31. 1. "WRC,Warm reset counter" rgroup.long 0xFF4++0xB line.long 0x0 "BSEC_VERR,BSEC version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x0 0.--3. 1. "MINREV,Minor revision" line.long 0x4 "BSEC_IPIDR,BSEC identification register" hexmask.long 0x4 0.--31. 1. "ID,BSEC identification" line.long 0x8 "BSEC_SIDR,BSEC size identification register" hexmask.long 0x8 0.--31. 1. "SID,BSEC size identification" tree.end tree.end tree "CA35SS (Cortex-A35 Subsystem)" base ad:0x0 tree "CA35SS" base ad:0x48800000 group.long 0x0++0x1F line.long 0x0 "CA35SS_SSC_CHGCLKREQ0,CA35SS SSC CHGCLKREQ register" rbitfld.long 0x0 17. "ARM_DIVSELACK,Defines if ck_cpu_ext2f clock is divided by 2 or not." "B_0x0,B_0x1" bitfld.long 0x0 16. "ARM_DIVSEL,Selects divider by 2 for ck_cpu1_ext2f clock." "B_0x0,B_0x1" rbitfld.long 0x0 1. "ARM_CHGCLKACK,Indicates clock source." "B_0x0,B_0x1" bitfld.long 0x0 0. "ARM_CHGCLKREQ,Selects clock source." "B_0x0,B_0x1" line.long 0x4 "CA35SS_SSC_CHGCLKREQ1,CA35SS SSC CHGCLKREQ register" rbitfld.long 0x4 17. "ARM_DIVSELACK,Defines if ck_cpu_ext2f clock is divided by 2 or not." "B_0x0,B_0x1" bitfld.long 0x4 16. "ARM_DIVSEL,Selects divider by 2 for ck_cpu1_ext2f clock." "B_0x0,B_0x1" rbitfld.long 0x4 1. "ARM_CHGCLKACK,Indicates clock source." "B_0x0,B_0x1" bitfld.long 0x4 0. "ARM_CHGCLKREQ,Selects clock source." "B_0x0,B_0x1" line.long 0x8 "CA35SS_SSC_CHGCLKREQ2,CA35SS SSC CHGCLKREQ register" rbitfld.long 0x8 17. "ARM_DIVSELACK,Defines if ck_cpu_ext2f clock is divided by 2 or not." "B_0x0,B_0x1" bitfld.long 0x8 16. "ARM_DIVSEL,Selects divider by 2 for ck_cpu1_ext2f clock." "B_0x0,B_0x1" rbitfld.long 0x8 1. "ARM_CHGCLKACK,Indicates clock source." "B_0x0,B_0x1" bitfld.long 0x8 0. "ARM_CHGCLKREQ,Selects clock source." "B_0x0,B_0x1" line.long 0xC "CA35SS_SSC_CHGCLKREQ3,CA35SS SSC CHGCLKREQ register" rbitfld.long 0xC 17. "ARM_DIVSELACK,Defines if ck_cpu_ext2f clock is divided by 2 or not." "B_0x0,B_0x1" bitfld.long 0xC 16. "ARM_DIVSEL,Selects divider by 2 for ck_cpu1_ext2f clock." "B_0x0,B_0x1" rbitfld.long 0xC 1. "ARM_CHGCLKACK,Indicates clock source." "B_0x0,B_0x1" bitfld.long 0xC 0. "ARM_CHGCLKREQ,Selects clock source." "B_0x0,B_0x1" line.long 0x10 "CA35SS_SSC_BRM0,CA35SS SSC BRM register" bitfld.long 0x10 24.--25. "BRM_IDLEDIV,BRM rate when idle mode is entered" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 16. "BRM_IDLEDIVEN,Defines BRM_RATE behaviour in idle mode." "B_0x0,B_0x1" hexmask.long.byte 0x10 8.--13. 1. "BRM_RATE,BRM rate in normal or idle mode when BRM_IDLEDIVEN = 0" rbitfld.long 0x10 1. "BRM_RATEACK,BRM_RATE status" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "BRM_RATEVAL,BRM_RATE operation" "B_0x0,B_0x1" line.long 0x14 "CA35SS_SSC_BRM1,CA35SS SSC BRM register" bitfld.long 0x14 24.--25. "BRM_IDLEDIV,BRM rate when idle mode is entered" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 16. "BRM_IDLEDIVEN,Defines BRM_RATE behaviour in idle mode." "B_0x0,B_0x1" hexmask.long.byte 0x14 8.--13. 1. "BRM_RATE,BRM rate in normal or idle mode when BRM_IDLEDIVEN = 0" rbitfld.long 0x14 1. "BRM_RATEACK,BRM_RATE status" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "BRM_RATEVAL,BRM_RATE operation" "B_0x0,B_0x1" line.long 0x18 "CA35SS_SSC_BRM2,CA35SS SSC BRM register" bitfld.long 0x18 24.--25. "BRM_IDLEDIV,BRM rate when idle mode is entered" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x18 16. "BRM_IDLEDIVEN,Defines BRM_RATE behaviour in idle mode." "B_0x0,B_0x1" hexmask.long.byte 0x18 8.--13. 1. "BRM_RATE,BRM rate in normal or idle mode when BRM_IDLEDIVEN = 0" rbitfld.long 0x18 1. "BRM_RATEACK,BRM_RATE status" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "BRM_RATEVAL,BRM_RATE operation" "B_0x0,B_0x1" line.long 0x1C "CA35SS_SSC_BRM3,CA35SS SSC BRM register" bitfld.long 0x1C 24.--25. "BRM_IDLEDIV,BRM rate when idle mode is entered" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x1C 16. "BRM_IDLEDIVEN,Defines BRM_RATE behaviour in idle mode." "B_0x0,B_0x1" hexmask.long.byte 0x1C 8.--13. 1. "BRM_RATE,BRM rate in normal or idle mode when BRM_IDLEDIVEN = 0" rbitfld.long 0x1C 1. "BRM_RATEACK,BRM_RATE status" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "BRM_RATEVAL,BRM_RATE operation" "B_0x0,B_0x1" group.long 0x80++0x2F line.long 0x0 "CA35SS_SSC_PLL_FREQ1_0,CA35SS SSC PLL FREQ1 register" hexmask.long.byte 0x0 16.--21. 1. "FREFDIV,Reference divide value" hexmask.long.word 0x0 0.--11. 1. "FBDIV,Feedback divide value" line.long 0x4 "CA35SS_SSC_PLL_FREQ1_1,CA35SS SSC PLL FREQ1 register" hexmask.long.byte 0x4 16.--21. 1. "FREFDIV,Reference divide value" hexmask.long.word 0x4 0.--11. 1. "FBDIV,Feedback divide value" line.long 0x8 "CA35SS_SSC_PLL_FREQ1_2,CA35SS SSC PLL FREQ1 register" hexmask.long.byte 0x8 16.--21. 1. "FREFDIV,Reference divide value" hexmask.long.word 0x8 0.--11. 1. "FBDIV,Feedback divide value" line.long 0xC "CA35SS_SSC_PLL_FREQ1_3,CA35SS SSC PLL FREQ1 register" hexmask.long.byte 0xC 16.--21. 1. "FREFDIV,Reference divide value" hexmask.long.word 0xC 0.--11. 1. "FBDIV,Feedback divide value" line.long 0x10 "CA35SS_SSC_PLL_FREQ2_0,CA35SS SSC PLL FREQ2 register" bitfld.long 0x10 3.--5. "POSTDIV2,PLL post divide 2 setting (1 to 7)" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "POSTDIV1,PLL post divide 1 setting (1 to 7)" "0,1,2,3,4,5,6,7" line.long 0x14 "CA35SS_SSC_PLL_FREQ2_1,CA35SS SSC PLL FREQ2 register" bitfld.long 0x14 3.--5. "POSTDIV2,PLL post divide 2 setting (1 to 7)" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0.--2. "POSTDIV1,PLL post divide 1 setting (1 to 7)" "0,1,2,3,4,5,6,7" line.long 0x18 "CA35SS_SSC_PLL_FREQ2_2,CA35SS SSC PLL FREQ2 register" bitfld.long 0x18 3.--5. "POSTDIV2,PLL post divide 2 setting (1 to 7)" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "POSTDIV1,PLL post divide 1 setting (1 to 7)" "0,1,2,3,4,5,6,7" line.long 0x1C "CA35SS_SSC_PLL_FREQ2_3,CA35SS SSC PLL FREQ2 register" bitfld.long 0x1C 3.--5. "POSTDIV2,PLL post divide 2 setting (1 to 7)" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0.--2. "POSTDIV1,PLL post divide 1 setting (1 to 7)" "0,1,2,3,4,5,6,7" line.long 0x20 "CA35SS_SSC_PLL_EN0,CA35SS SSC PLL enable register" bitfld.long 0x20 31. "EN_PLL_OBS,PLL observation output status" "B_0x0,B_0x1" bitfld.long 0x20 2. "NRESET_SWPLL,Clock switcher reset state" "B_0x0,B_0x1" rbitfld.long 0x20 1. "LOCKP,PLLL lock state" "B_0x0,B_0x1" bitfld.long 0x20 0. "PLL_EN,PLL enable for Cortex-A35" "B_0x0,B_0x1" line.long 0x24 "CA35SS_SSC_PLL_EN1,CA35SS SSC PLL enable register" bitfld.long 0x24 31. "EN_PLL_OBS,PLL observation output status" "B_0x0,B_0x1" bitfld.long 0x24 2. "NRESET_SWPLL,Clock switcher reset state" "B_0x0,B_0x1" rbitfld.long 0x24 1. "LOCKP,PLLL lock state" "B_0x0,B_0x1" bitfld.long 0x24 0. "PLL_EN,PLL enable for Cortex-A35" "B_0x0,B_0x1" line.long 0x28 "CA35SS_SSC_PLL_EN2,CA35SS SSC PLL enable register" bitfld.long 0x28 31. "EN_PLL_OBS,PLL observation output status" "B_0x0,B_0x1" bitfld.long 0x28 2. "NRESET_SWPLL,Clock switcher reset state" "B_0x0,B_0x1" rbitfld.long 0x28 1. "LOCKP,PLLL lock state" "B_0x0,B_0x1" bitfld.long 0x28 0. "PLL_EN,PLL enable for Cortex-A35" "B_0x0,B_0x1" line.long 0x2C "CA35SS_SSC_PLL_EN3,CA35SS SSC PLL enable register" bitfld.long 0x2C 31. "EN_PLL_OBS,PLL observation output status" "B_0x0,B_0x1" bitfld.long 0x2C 2. "NRESET_SWPLL,Clock switcher reset state" "B_0x0,B_0x1" rbitfld.long 0x2C 1. "LOCKP,PLLL lock state" "B_0x0,B_0x1" bitfld.long 0x2C 0. "PLL_EN,PLL enable for Cortex-A35" "B_0x0,B_0x1" group.long 0xD0++0xF line.long 0x0 "CA35SS_SSC_LPI_TSGEN_NTS_CR0,CA35SS SSC LPI TSGEN NTS CR register" rbitfld.long 0x0 9. "TS_CSYSACK,Timestamp asynchronous bridge power status" "B_0x0,B_0x1" bitfld.long 0x0 8. "TS_CSYSREQ,Timestamp asynchronous bridge power request" "B_0x0,B_0x1" line.long 0x4 "CA35SS_SSC_LPI_TSGEN_NTS_CR1,CA35SS SSC LPI TSGEN NTS CR register" rbitfld.long 0x4 9. "TS_CSYSACK,Timestamp asynchronous bridge power status" "B_0x0,B_0x1" bitfld.long 0x4 8. "TS_CSYSREQ,Timestamp asynchronous bridge power request" "B_0x0,B_0x1" line.long 0x8 "CA35SS_SSC_LPI_TSGEN_NTS_CR2,CA35SS SSC LPI TSGEN NTS CR register" rbitfld.long 0x8 9. "TS_CSYSACK,Timestamp asynchronous bridge power status" "B_0x0,B_0x1" bitfld.long 0x8 8. "TS_CSYSREQ,Timestamp asynchronous bridge power request" "B_0x0,B_0x1" line.long 0xC "CA35SS_SSC_LPI_TSGEN_NTS_CR3,CA35SS SSC LPI TSGEN NTS CR register" rbitfld.long 0xC 9. "TS_CSYSACK,Timestamp asynchronous bridge power status" "B_0x0,B_0x1" bitfld.long 0xC 8. "TS_CSYSREQ,Timestamp asynchronous bridge power request" "B_0x0,B_0x1" rgroup.long 0x100++0x3 line.long 0x0 "CA35SS_SSC_C0_SMP,CA35SS SSC core 0 SMP register" bitfld.long 0x0 16. "SMPEN,Indicates whether core 0 takes part in coherency." "B_0x0,B_0x1" rgroup.long 0x110++0x3 line.long 0x0 "CA35SS_SSC_C1_SMP,CA35SS SSC core 1 SMP register" bitfld.long 0x0 16. "SMPEN,Indicates whether core 1 takes part in coherency." "B_0x0,B_0x1" group.long 0x140++0xF line.long 0x0 "CA35SS_SSC_LPI_STGEN_NTS_CR0,CA35SS SSC LPI STGEN NTS CR register" rbitfld.long 0x0 25. "STGEN_CSYSACK,STGEN asynchronous bridge power status" "B_0x0,B_0x1" bitfld.long 0x0 24. "STGEN_CSYSREQ,STGEN asynchronous bridge power request" "B_0x0,B_0x1" line.long 0x4 "CA35SS_SSC_LPI_STGEN_NTS_CR1,CA35SS SSC LPI STGEN NTS CR register" rbitfld.long 0x4 25. "STGEN_CSYSACK,STGEN asynchronous bridge power status" "B_0x0,B_0x1" bitfld.long 0x4 24. "STGEN_CSYSREQ,STGEN asynchronous bridge power request" "B_0x0,B_0x1" line.long 0x8 "CA35SS_SSC_LPI_STGEN_NTS_CR2,CA35SS SSC LPI STGEN NTS CR register" rbitfld.long 0x8 25. "STGEN_CSYSACK,STGEN asynchronous bridge power status" "B_0x0,B_0x1" bitfld.long 0x8 24. "STGEN_CSYSREQ,STGEN asynchronous bridge power request" "B_0x0,B_0x1" line.long 0xC "CA35SS_SSC_LPI_STGEN_NTS_CR3,CA35SS SSC LPI STGEN NTS CR register" rbitfld.long 0xC 25. "STGEN_CSYSACK,STGEN asynchronous bridge power status" "B_0x0,B_0x1" bitfld.long 0xC 24. "STGEN_CSYSREQ,STGEN asynchronous bridge power request" "B_0x0,B_0x1" group.long 0x3C0++0xF line.long 0x0 "CA35SS_SSC_NS_E0R0,CA35SS SSC NS enable 0 register" bitfld.long 0x0 31. "ALLOW_NONSEC31,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 30. "ALLOW_NONSEC30,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 29. "ALLOW_NONSEC29,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 28. "ALLOW_NONSEC28,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "ALLOW_NONSEC27,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 26. "ALLOW_NONSEC26,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 25. "ALLOW_NONSEC25,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 24. "ALLOW_NONSEC24,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x0 23. "ALLOW_NONSEC23,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALLOW_NONSEC22,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 21. "ALLOW_NONSEC21,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 20. "ALLOW_NONSEC20,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "ALLOW_NONSEC19,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 18. "ALLOW_NONSEC18,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 17. "ALLOW_NONSEC17,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 16. "ALLOW_NONSEC16,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x0 15. "ALLOW_NONSEC15,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 14. "ALLOW_NONSEC14,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 13. "ALLOW_NONSEC13,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 12. "ALLOW_NONSEC12,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ALLOW_NONSEC11,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 10. "ALLOW_NONSEC10,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 9. "ALLOW_NONSEC9,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 8. "ALLOW_NONSEC8,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "ALLOW_NONSEC7,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 6. "ALLOW_NONSEC6,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 5. "ALLOW_NONSEC5,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 4. "ALLOW_NONSEC4,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "ALLOW_NONSEC3,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 2. "ALLOW_NONSEC2,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 1. "ALLOW_NONSEC1,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 0. "ALLOW_NONSEC0,SSC register security settings" "B_0x0,B_0x1" line.long 0x4 "CA35SS_SSC_NS_E0R1,CA35SS SSC NS enable 0 register" bitfld.long 0x4 31. "ALLOW_NONSEC31,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 30. "ALLOW_NONSEC30,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 29. "ALLOW_NONSEC29,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 28. "ALLOW_NONSEC28,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x4 27. "ALLOW_NONSEC27,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 26. "ALLOW_NONSEC26,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 25. "ALLOW_NONSEC25,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 24. "ALLOW_NONSEC24,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x4 23. "ALLOW_NONSEC23,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 22. "ALLOW_NONSEC22,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 21. "ALLOW_NONSEC21,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 20. "ALLOW_NONSEC20,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x4 19. "ALLOW_NONSEC19,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 18. "ALLOW_NONSEC18,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 17. "ALLOW_NONSEC17,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 16. "ALLOW_NONSEC16,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x4 15. "ALLOW_NONSEC15,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 14. "ALLOW_NONSEC14,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 13. "ALLOW_NONSEC13,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 12. "ALLOW_NONSEC12,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "ALLOW_NONSEC11,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 10. "ALLOW_NONSEC10,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 9. "ALLOW_NONSEC9,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 8. "ALLOW_NONSEC8,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "ALLOW_NONSEC7,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 6. "ALLOW_NONSEC6,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 5. "ALLOW_NONSEC5,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 4. "ALLOW_NONSEC4,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "ALLOW_NONSEC3,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 2. "ALLOW_NONSEC2,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 1. "ALLOW_NONSEC1,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 0. "ALLOW_NONSEC0,SSC register security settings" "B_0x0,B_0x1" line.long 0x8 "CA35SS_SSC_NS_E0R2,CA35SS SSC NS enable 0 register" bitfld.long 0x8 31. "ALLOW_NONSEC31,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 30. "ALLOW_NONSEC30,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 29. "ALLOW_NONSEC29,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 28. "ALLOW_NONSEC28,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x8 27. "ALLOW_NONSEC27,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 26. "ALLOW_NONSEC26,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 25. "ALLOW_NONSEC25,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 24. "ALLOW_NONSEC24,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x8 23. "ALLOW_NONSEC23,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 22. "ALLOW_NONSEC22,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 21. "ALLOW_NONSEC21,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 20. "ALLOW_NONSEC20,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "ALLOW_NONSEC19,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 18. "ALLOW_NONSEC18,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 17. "ALLOW_NONSEC17,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 16. "ALLOW_NONSEC16,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x8 15. "ALLOW_NONSEC15,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 14. "ALLOW_NONSEC14,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 13. "ALLOW_NONSEC13,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 12. "ALLOW_NONSEC12,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x8 11. "ALLOW_NONSEC11,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 10. "ALLOW_NONSEC10,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 9. "ALLOW_NONSEC9,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 8. "ALLOW_NONSEC8,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "ALLOW_NONSEC7,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 6. "ALLOW_NONSEC6,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 5. "ALLOW_NONSEC5,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 4. "ALLOW_NONSEC4,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "ALLOW_NONSEC3,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 2. "ALLOW_NONSEC2,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 1. "ALLOW_NONSEC1,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 0. "ALLOW_NONSEC0,SSC register security settings" "B_0x0,B_0x1" line.long 0xC "CA35SS_SSC_NS_E0R3,CA35SS SSC NS enable 0 register" bitfld.long 0xC 31. "ALLOW_NONSEC31,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 30. "ALLOW_NONSEC30,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 29. "ALLOW_NONSEC29,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 28. "ALLOW_NONSEC28,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0xC 27. "ALLOW_NONSEC27,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 26. "ALLOW_NONSEC26,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 25. "ALLOW_NONSEC25,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 24. "ALLOW_NONSEC24,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0xC 23. "ALLOW_NONSEC23,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 22. "ALLOW_NONSEC22,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 21. "ALLOW_NONSEC21,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 20. "ALLOW_NONSEC20,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "ALLOW_NONSEC19,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 18. "ALLOW_NONSEC18,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 17. "ALLOW_NONSEC17,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 16. "ALLOW_NONSEC16,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0xC 15. "ALLOW_NONSEC15,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 14. "ALLOW_NONSEC14,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 13. "ALLOW_NONSEC13,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 12. "ALLOW_NONSEC12,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0xC 11. "ALLOW_NONSEC11,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 10. "ALLOW_NONSEC10,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 9. "ALLOW_NONSEC9,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 8. "ALLOW_NONSEC8,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "ALLOW_NONSEC7,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 6. "ALLOW_NONSEC6,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 5. "ALLOW_NONSEC5,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 4. "ALLOW_NONSEC4,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "ALLOW_NONSEC3,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 2. "ALLOW_NONSEC2,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 1. "ALLOW_NONSEC1,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 0. "ALLOW_NONSEC0,SSC register security settings" "B_0x0,B_0x1" rgroup.long 0x3D0++0x3 line.long 0x0 "CA35SS_SSC_NS_ENABLE_1,CA35SS SSC NS enable 1 register" bitfld.long 0x0 31. "ALLOW_NONSEC_RO3,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 30. "ALLOW_NONSEC_RO2,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 29. "ALLOW_NONSEC_RO1,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 28. "ALLOW_NONSEC_RO0,SSC register security settings" "B_0x0,B_0x1" group.long 0x2000++0x3 line.long 0x0 "CA35SS_SYSCFG_ETR_LPI_CR,CA35SS ETR low-power interface control register" bitfld.long 0x0 0. "ETR_CSYSREQ,None" "B_0x0,B_0x1" rgroup.long 0x2004++0x3 line.long 0x0 "CA35SS_SYSCFG_ETR_LPI_SR,CA35SS ETR low-power interface status register" bitfld.long 0x0 0. "ETR_CSYSACK,None" "B_0x0,B_0x1" group.long 0x2008++0xF line.long 0x0 "CA35SS_SYSCFG_STM_NSGUAREN_CR,CA35SS STM non-secure guaranteed access register" bitfld.long 0x0 0. "STM_NSGUAREN,None" "B_0x0,B_0x1" line.long 0x4 "CA35SS_SYSCFG_TRACE_CLK_DIV_CR,CA35SS TPIU export clock divider register" hexmask.long.byte 0x4 0.--5. 1. "TRACE_CLK_DIV_VALUE,0x1 to 0x3F: Divider ratio from 2 to 64" line.long 0x8 "CA35SS_SYSCFG_DBGPWR_CR,CA35SS Cortex-A35 core debug power mode register" bitfld.long 0x8 1. "DBGPWRUP1,None" "B_0x0,B_0x1" bitfld.long 0x8 0. "DBGPWRUP0,None" "B_0x0,B_0x1" line.long 0xC "CA35SS_SYSCFG_DBGL1RSTDISABLE_CR,CA35SS Cortex-A35 L1 data cache register" bitfld.long 0xC 0. "DBGL1RSTDIS,None" "B_0x0,B_0x1" rgroup.long 0x2018++0x7 line.long 0x0 "CA35SS_SYSCFG_DBGPWR_SR,CA35SS Cortex-A35 debug power register" bitfld.long 0x0 3. "DBGPWRUPREQ1,None" "B_0x0,B_0x1" bitfld.long 0x0 2. "DBGPWRUPREQ0,None" "B_0x0,B_0x1" bitfld.long 0x0 1. "DBGNOPWRDWN1,None" "B_0x0,B_0x1" bitfld.long 0x0 0. "DBGNOPWRDWN0,None" "B_0x0,B_0x1" line.long 0x4 "CA35SS_SYSCFG_EDBGACK_SR,CA35SS Cortex-A35 debug mode status register" bitfld.long 0x4 1. "DBGACK_C1,None" "B_0x0,B_0x1" bitfld.long 0x4 0. "DBGACK_C0,None" "B_0x0,B_0x1" group.long 0x2020++0x3 line.long 0x0 "CA35SS_SYSCFG_GIC_CFGR,GIC configuration register" bitfld.long 0x0 0. "GIC_4KNOT64K,None" "B_0x0,B_0x1" rgroup.long 0x2024++0x7 line.long 0x0 "CA35SS_SYSCFG_LP_SR,Cortex-A35 low-power status register" bitfld.long 0x0 4. "STANDBYWFIL2,None" "B_0x0,B_0x1" bitfld.long 0x0 3. "STANDBYWFI_1,None" "B_0x0,B_0x1" bitfld.long 0x0 2. "STANDBYWFI_0,None" "B_0x0,B_0x1" bitfld.long 0x0 1. "STANDBYWFE_1,None" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "STANDBYWFE_0,None" "B_0x0,B_0x1" line.long 0x4 "CA35SS_SYSCFG_RSTACK_SR,Cortex-A35 reset status register" bitfld.long 0x4 1. "NRESET_FCT_ACK,None" "B_0x0,B_0x1" bitfld.long 0x4 0. "NRESET_DBG_ACK,None" "B_0x0,B_0x1" group.long 0x2080++0xB line.long 0x0 "CA35SS_SYSCFG_AARCH_MODE_CR,CA35SS architecture mode register" bitfld.long 0x0 0. "AA64NAA32,None" "B_0x0,B_0x1" line.long 0x4 "CA35SS_SYSCFG_VBAR_CR,CA35SS reset vector register" hexmask.long 0x4 2.--31. 1. "RVBARADDRL,Set the value of reset vector at the boundaries of the Cortex-A35 cores." line.long 0x8 "CA35SS_SYSCFG_M33_ACCESS_CR,Cortex-M33 boot register access rights register" bitfld.long 0x8 1. "M33CFG_PRIV,None" "B_0x0,B_0x1" bitfld.long 0x8 0. "M33CFG_SEC,None" "B_0x0,B_0x1" group.long 0x20A0++0xB line.long 0x0 "CA35SS_SYSCFG_M33_TZEN_CR,Cortex-M33 secure extension enable register" bitfld.long 0x0 0. "CFG_SECEXT,None" "B_0x0,B_0x1" line.long 0x4 "CA35SS_SYSCFG_M33_INITSVTOR_CR,Cortex-M33 secure vector address register" hexmask.long 0x4 7.--31. 1. "INITSVTOR,Secure vector table offset" line.long 0x8 "CA35SS_SYSCFG_M33_INITNSVTOR_CR,Cortex-M33 non-secure vector address register" hexmask.long 0x8 7.--31. 1. "INITNSVTOR,Non-secure vector table offset" tree.end tree "CA35SS_S" base ad:0x58800000 group.long 0x0++0x1F line.long 0x0 "CA35SS_SSC_CHGCLKREQ0,CA35SS SSC CHGCLKREQ register" rbitfld.long 0x0 17. "ARM_DIVSELACK,Defines if ck_cpu_ext2f clock is divided by 2 or not." "B_0x0,B_0x1" bitfld.long 0x0 16. "ARM_DIVSEL,Selects divider by 2 for ck_cpu1_ext2f clock." "B_0x0,B_0x1" rbitfld.long 0x0 1. "ARM_CHGCLKACK,Indicates clock source." "B_0x0,B_0x1" bitfld.long 0x0 0. "ARM_CHGCLKREQ,Selects clock source." "B_0x0,B_0x1" line.long 0x4 "CA35SS_SSC_CHGCLKREQ1,CA35SS SSC CHGCLKREQ register" rbitfld.long 0x4 17. "ARM_DIVSELACK,Defines if ck_cpu_ext2f clock is divided by 2 or not." "B_0x0,B_0x1" bitfld.long 0x4 16. "ARM_DIVSEL,Selects divider by 2 for ck_cpu1_ext2f clock." "B_0x0,B_0x1" rbitfld.long 0x4 1. "ARM_CHGCLKACK,Indicates clock source." "B_0x0,B_0x1" bitfld.long 0x4 0. "ARM_CHGCLKREQ,Selects clock source." "B_0x0,B_0x1" line.long 0x8 "CA35SS_SSC_CHGCLKREQ2,CA35SS SSC CHGCLKREQ register" rbitfld.long 0x8 17. "ARM_DIVSELACK,Defines if ck_cpu_ext2f clock is divided by 2 or not." "B_0x0,B_0x1" bitfld.long 0x8 16. "ARM_DIVSEL,Selects divider by 2 for ck_cpu1_ext2f clock." "B_0x0,B_0x1" rbitfld.long 0x8 1. "ARM_CHGCLKACK,Indicates clock source." "B_0x0,B_0x1" bitfld.long 0x8 0. "ARM_CHGCLKREQ,Selects clock source." "B_0x0,B_0x1" line.long 0xC "CA35SS_SSC_CHGCLKREQ3,CA35SS SSC CHGCLKREQ register" rbitfld.long 0xC 17. "ARM_DIVSELACK,Defines if ck_cpu_ext2f clock is divided by 2 or not." "B_0x0,B_0x1" bitfld.long 0xC 16. "ARM_DIVSEL,Selects divider by 2 for ck_cpu1_ext2f clock." "B_0x0,B_0x1" rbitfld.long 0xC 1. "ARM_CHGCLKACK,Indicates clock source." "B_0x0,B_0x1" bitfld.long 0xC 0. "ARM_CHGCLKREQ,Selects clock source." "B_0x0,B_0x1" line.long 0x10 "CA35SS_SSC_BRM0,CA35SS SSC BRM register" bitfld.long 0x10 24.--25. "BRM_IDLEDIV,BRM rate when idle mode is entered" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 16. "BRM_IDLEDIVEN,Defines BRM_RATE behaviour in idle mode." "B_0x0,B_0x1" hexmask.long.byte 0x10 8.--13. 1. "BRM_RATE,BRM rate in normal or idle mode when BRM_IDLEDIVEN = 0" rbitfld.long 0x10 1. "BRM_RATEACK,BRM_RATE status" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "BRM_RATEVAL,BRM_RATE operation" "B_0x0,B_0x1" line.long 0x14 "CA35SS_SSC_BRM1,CA35SS SSC BRM register" bitfld.long 0x14 24.--25. "BRM_IDLEDIV,BRM rate when idle mode is entered" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 16. "BRM_IDLEDIVEN,Defines BRM_RATE behaviour in idle mode." "B_0x0,B_0x1" hexmask.long.byte 0x14 8.--13. 1. "BRM_RATE,BRM rate in normal or idle mode when BRM_IDLEDIVEN = 0" rbitfld.long 0x14 1. "BRM_RATEACK,BRM_RATE status" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "BRM_RATEVAL,BRM_RATE operation" "B_0x0,B_0x1" line.long 0x18 "CA35SS_SSC_BRM2,CA35SS SSC BRM register" bitfld.long 0x18 24.--25. "BRM_IDLEDIV,BRM rate when idle mode is entered" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x18 16. "BRM_IDLEDIVEN,Defines BRM_RATE behaviour in idle mode." "B_0x0,B_0x1" hexmask.long.byte 0x18 8.--13. 1. "BRM_RATE,BRM rate in normal or idle mode when BRM_IDLEDIVEN = 0" rbitfld.long 0x18 1. "BRM_RATEACK,BRM_RATE status" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "BRM_RATEVAL,BRM_RATE operation" "B_0x0,B_0x1" line.long 0x1C "CA35SS_SSC_BRM3,CA35SS SSC BRM register" bitfld.long 0x1C 24.--25. "BRM_IDLEDIV,BRM rate when idle mode is entered" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x1C 16. "BRM_IDLEDIVEN,Defines BRM_RATE behaviour in idle mode." "B_0x0,B_0x1" hexmask.long.byte 0x1C 8.--13. 1. "BRM_RATE,BRM rate in normal or idle mode when BRM_IDLEDIVEN = 0" rbitfld.long 0x1C 1. "BRM_RATEACK,BRM_RATE status" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "BRM_RATEVAL,BRM_RATE operation" "B_0x0,B_0x1" group.long 0x80++0x2F line.long 0x0 "CA35SS_SSC_PLL_FREQ1_0,CA35SS SSC PLL FREQ1 register" hexmask.long.byte 0x0 16.--21. 1. "FREFDIV,Reference divide value" hexmask.long.word 0x0 0.--11. 1. "FBDIV,Feedback divide value" line.long 0x4 "CA35SS_SSC_PLL_FREQ1_1,CA35SS SSC PLL FREQ1 register" hexmask.long.byte 0x4 16.--21. 1. "FREFDIV,Reference divide value" hexmask.long.word 0x4 0.--11. 1. "FBDIV,Feedback divide value" line.long 0x8 "CA35SS_SSC_PLL_FREQ1_2,CA35SS SSC PLL FREQ1 register" hexmask.long.byte 0x8 16.--21. 1. "FREFDIV,Reference divide value" hexmask.long.word 0x8 0.--11. 1. "FBDIV,Feedback divide value" line.long 0xC "CA35SS_SSC_PLL_FREQ1_3,CA35SS SSC PLL FREQ1 register" hexmask.long.byte 0xC 16.--21. 1. "FREFDIV,Reference divide value" hexmask.long.word 0xC 0.--11. 1. "FBDIV,Feedback divide value" line.long 0x10 "CA35SS_SSC_PLL_FREQ2_0,CA35SS SSC PLL FREQ2 register" bitfld.long 0x10 3.--5. "POSTDIV2,PLL post divide 2 setting (1 to 7)" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "POSTDIV1,PLL post divide 1 setting (1 to 7)" "0,1,2,3,4,5,6,7" line.long 0x14 "CA35SS_SSC_PLL_FREQ2_1,CA35SS SSC PLL FREQ2 register" bitfld.long 0x14 3.--5. "POSTDIV2,PLL post divide 2 setting (1 to 7)" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0.--2. "POSTDIV1,PLL post divide 1 setting (1 to 7)" "0,1,2,3,4,5,6,7" line.long 0x18 "CA35SS_SSC_PLL_FREQ2_2,CA35SS SSC PLL FREQ2 register" bitfld.long 0x18 3.--5. "POSTDIV2,PLL post divide 2 setting (1 to 7)" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "POSTDIV1,PLL post divide 1 setting (1 to 7)" "0,1,2,3,4,5,6,7" line.long 0x1C "CA35SS_SSC_PLL_FREQ2_3,CA35SS SSC PLL FREQ2 register" bitfld.long 0x1C 3.--5. "POSTDIV2,PLL post divide 2 setting (1 to 7)" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0.--2. "POSTDIV1,PLL post divide 1 setting (1 to 7)" "0,1,2,3,4,5,6,7" line.long 0x20 "CA35SS_SSC_PLL_EN0,CA35SS SSC PLL enable register" bitfld.long 0x20 31. "EN_PLL_OBS,PLL observation output status" "B_0x0,B_0x1" bitfld.long 0x20 2. "NRESET_SWPLL,Clock switcher reset state" "B_0x0,B_0x1" rbitfld.long 0x20 1. "LOCKP,PLLL lock state" "B_0x0,B_0x1" bitfld.long 0x20 0. "PLL_EN,PLL enable for Cortex-A35" "B_0x0,B_0x1" line.long 0x24 "CA35SS_SSC_PLL_EN1,CA35SS SSC PLL enable register" bitfld.long 0x24 31. "EN_PLL_OBS,PLL observation output status" "B_0x0,B_0x1" bitfld.long 0x24 2. "NRESET_SWPLL,Clock switcher reset state" "B_0x0,B_0x1" rbitfld.long 0x24 1. "LOCKP,PLLL lock state" "B_0x0,B_0x1" bitfld.long 0x24 0. "PLL_EN,PLL enable for Cortex-A35" "B_0x0,B_0x1" line.long 0x28 "CA35SS_SSC_PLL_EN2,CA35SS SSC PLL enable register" bitfld.long 0x28 31. "EN_PLL_OBS,PLL observation output status" "B_0x0,B_0x1" bitfld.long 0x28 2. "NRESET_SWPLL,Clock switcher reset state" "B_0x0,B_0x1" rbitfld.long 0x28 1. "LOCKP,PLLL lock state" "B_0x0,B_0x1" bitfld.long 0x28 0. "PLL_EN,PLL enable for Cortex-A35" "B_0x0,B_0x1" line.long 0x2C "CA35SS_SSC_PLL_EN3,CA35SS SSC PLL enable register" bitfld.long 0x2C 31. "EN_PLL_OBS,PLL observation output status" "B_0x0,B_0x1" bitfld.long 0x2C 2. "NRESET_SWPLL,Clock switcher reset state" "B_0x0,B_0x1" rbitfld.long 0x2C 1. "LOCKP,PLLL lock state" "B_0x0,B_0x1" bitfld.long 0x2C 0. "PLL_EN,PLL enable for Cortex-A35" "B_0x0,B_0x1" group.long 0xD0++0xF line.long 0x0 "CA35SS_SSC_LPI_TSGEN_NTS_CR0,CA35SS SSC LPI TSGEN NTS CR register" rbitfld.long 0x0 9. "TS_CSYSACK,Timestamp asynchronous bridge power status" "B_0x0,B_0x1" bitfld.long 0x0 8. "TS_CSYSREQ,Timestamp asynchronous bridge power request" "B_0x0,B_0x1" line.long 0x4 "CA35SS_SSC_LPI_TSGEN_NTS_CR1,CA35SS SSC LPI TSGEN NTS CR register" rbitfld.long 0x4 9. "TS_CSYSACK,Timestamp asynchronous bridge power status" "B_0x0,B_0x1" bitfld.long 0x4 8. "TS_CSYSREQ,Timestamp asynchronous bridge power request" "B_0x0,B_0x1" line.long 0x8 "CA35SS_SSC_LPI_TSGEN_NTS_CR2,CA35SS SSC LPI TSGEN NTS CR register" rbitfld.long 0x8 9. "TS_CSYSACK,Timestamp asynchronous bridge power status" "B_0x0,B_0x1" bitfld.long 0x8 8. "TS_CSYSREQ,Timestamp asynchronous bridge power request" "B_0x0,B_0x1" line.long 0xC "CA35SS_SSC_LPI_TSGEN_NTS_CR3,CA35SS SSC LPI TSGEN NTS CR register" rbitfld.long 0xC 9. "TS_CSYSACK,Timestamp asynchronous bridge power status" "B_0x0,B_0x1" bitfld.long 0xC 8. "TS_CSYSREQ,Timestamp asynchronous bridge power request" "B_0x0,B_0x1" rgroup.long 0x100++0x3 line.long 0x0 "CA35SS_SSC_C0_SMP,CA35SS SSC core 0 SMP register" bitfld.long 0x0 16. "SMPEN,Indicates whether core 0 takes part in coherency." "B_0x0,B_0x1" rgroup.long 0x110++0x3 line.long 0x0 "CA35SS_SSC_C1_SMP,CA35SS SSC core 1 SMP register" bitfld.long 0x0 16. "SMPEN,Indicates whether core 1 takes part in coherency." "B_0x0,B_0x1" group.long 0x140++0xF line.long 0x0 "CA35SS_SSC_LPI_STGEN_NTS_CR0,CA35SS SSC LPI STGEN NTS CR register" rbitfld.long 0x0 25. "STGEN_CSYSACK,STGEN asynchronous bridge power status" "B_0x0,B_0x1" bitfld.long 0x0 24. "STGEN_CSYSREQ,STGEN asynchronous bridge power request" "B_0x0,B_0x1" line.long 0x4 "CA35SS_SSC_LPI_STGEN_NTS_CR1,CA35SS SSC LPI STGEN NTS CR register" rbitfld.long 0x4 25. "STGEN_CSYSACK,STGEN asynchronous bridge power status" "B_0x0,B_0x1" bitfld.long 0x4 24. "STGEN_CSYSREQ,STGEN asynchronous bridge power request" "B_0x0,B_0x1" line.long 0x8 "CA35SS_SSC_LPI_STGEN_NTS_CR2,CA35SS SSC LPI STGEN NTS CR register" rbitfld.long 0x8 25. "STGEN_CSYSACK,STGEN asynchronous bridge power status" "B_0x0,B_0x1" bitfld.long 0x8 24. "STGEN_CSYSREQ,STGEN asynchronous bridge power request" "B_0x0,B_0x1" line.long 0xC "CA35SS_SSC_LPI_STGEN_NTS_CR3,CA35SS SSC LPI STGEN NTS CR register" rbitfld.long 0xC 25. "STGEN_CSYSACK,STGEN asynchronous bridge power status" "B_0x0,B_0x1" bitfld.long 0xC 24. "STGEN_CSYSREQ,STGEN asynchronous bridge power request" "B_0x0,B_0x1" group.long 0x3C0++0xF line.long 0x0 "CA35SS_SSC_NS_E0R0,CA35SS SSC NS enable 0 register" bitfld.long 0x0 31. "ALLOW_NONSEC31,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 30. "ALLOW_NONSEC30,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 29. "ALLOW_NONSEC29,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 28. "ALLOW_NONSEC28,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "ALLOW_NONSEC27,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 26. "ALLOW_NONSEC26,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 25. "ALLOW_NONSEC25,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 24. "ALLOW_NONSEC24,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x0 23. "ALLOW_NONSEC23,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALLOW_NONSEC22,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 21. "ALLOW_NONSEC21,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 20. "ALLOW_NONSEC20,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "ALLOW_NONSEC19,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 18. "ALLOW_NONSEC18,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 17. "ALLOW_NONSEC17,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 16. "ALLOW_NONSEC16,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x0 15. "ALLOW_NONSEC15,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 14. "ALLOW_NONSEC14,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 13. "ALLOW_NONSEC13,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 12. "ALLOW_NONSEC12,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ALLOW_NONSEC11,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 10. "ALLOW_NONSEC10,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 9. "ALLOW_NONSEC9,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 8. "ALLOW_NONSEC8,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "ALLOW_NONSEC7,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 6. "ALLOW_NONSEC6,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 5. "ALLOW_NONSEC5,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 4. "ALLOW_NONSEC4,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "ALLOW_NONSEC3,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 2. "ALLOW_NONSEC2,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 1. "ALLOW_NONSEC1,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 0. "ALLOW_NONSEC0,SSC register security settings" "B_0x0,B_0x1" line.long 0x4 "CA35SS_SSC_NS_E0R1,CA35SS SSC NS enable 0 register" bitfld.long 0x4 31. "ALLOW_NONSEC31,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 30. "ALLOW_NONSEC30,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 29. "ALLOW_NONSEC29,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 28. "ALLOW_NONSEC28,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x4 27. "ALLOW_NONSEC27,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 26. "ALLOW_NONSEC26,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 25. "ALLOW_NONSEC25,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 24. "ALLOW_NONSEC24,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x4 23. "ALLOW_NONSEC23,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 22. "ALLOW_NONSEC22,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 21. "ALLOW_NONSEC21,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 20. "ALLOW_NONSEC20,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x4 19. "ALLOW_NONSEC19,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 18. "ALLOW_NONSEC18,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 17. "ALLOW_NONSEC17,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 16. "ALLOW_NONSEC16,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x4 15. "ALLOW_NONSEC15,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 14. "ALLOW_NONSEC14,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 13. "ALLOW_NONSEC13,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 12. "ALLOW_NONSEC12,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "ALLOW_NONSEC11,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 10. "ALLOW_NONSEC10,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 9. "ALLOW_NONSEC9,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 8. "ALLOW_NONSEC8,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "ALLOW_NONSEC7,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 6. "ALLOW_NONSEC6,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 5. "ALLOW_NONSEC5,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 4. "ALLOW_NONSEC4,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "ALLOW_NONSEC3,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 2. "ALLOW_NONSEC2,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 1. "ALLOW_NONSEC1,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x4 0. "ALLOW_NONSEC0,SSC register security settings" "B_0x0,B_0x1" line.long 0x8 "CA35SS_SSC_NS_E0R2,CA35SS SSC NS enable 0 register" bitfld.long 0x8 31. "ALLOW_NONSEC31,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 30. "ALLOW_NONSEC30,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 29. "ALLOW_NONSEC29,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 28. "ALLOW_NONSEC28,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x8 27. "ALLOW_NONSEC27,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 26. "ALLOW_NONSEC26,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 25. "ALLOW_NONSEC25,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 24. "ALLOW_NONSEC24,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x8 23. "ALLOW_NONSEC23,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 22. "ALLOW_NONSEC22,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 21. "ALLOW_NONSEC21,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 20. "ALLOW_NONSEC20,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "ALLOW_NONSEC19,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 18. "ALLOW_NONSEC18,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 17. "ALLOW_NONSEC17,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 16. "ALLOW_NONSEC16,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x8 15. "ALLOW_NONSEC15,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 14. "ALLOW_NONSEC14,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 13. "ALLOW_NONSEC13,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 12. "ALLOW_NONSEC12,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x8 11. "ALLOW_NONSEC11,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 10. "ALLOW_NONSEC10,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 9. "ALLOW_NONSEC9,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 8. "ALLOW_NONSEC8,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "ALLOW_NONSEC7,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 6. "ALLOW_NONSEC6,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 5. "ALLOW_NONSEC5,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 4. "ALLOW_NONSEC4,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "ALLOW_NONSEC3,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 2. "ALLOW_NONSEC2,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 1. "ALLOW_NONSEC1,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x8 0. "ALLOW_NONSEC0,SSC register security settings" "B_0x0,B_0x1" line.long 0xC "CA35SS_SSC_NS_E0R3,CA35SS SSC NS enable 0 register" bitfld.long 0xC 31. "ALLOW_NONSEC31,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 30. "ALLOW_NONSEC30,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 29. "ALLOW_NONSEC29,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 28. "ALLOW_NONSEC28,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0xC 27. "ALLOW_NONSEC27,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 26. "ALLOW_NONSEC26,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 25. "ALLOW_NONSEC25,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 24. "ALLOW_NONSEC24,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0xC 23. "ALLOW_NONSEC23,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 22. "ALLOW_NONSEC22,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 21. "ALLOW_NONSEC21,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 20. "ALLOW_NONSEC20,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "ALLOW_NONSEC19,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 18. "ALLOW_NONSEC18,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 17. "ALLOW_NONSEC17,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 16. "ALLOW_NONSEC16,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0xC 15. "ALLOW_NONSEC15,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 14. "ALLOW_NONSEC14,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 13. "ALLOW_NONSEC13,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 12. "ALLOW_NONSEC12,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0xC 11. "ALLOW_NONSEC11,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 10. "ALLOW_NONSEC10,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 9. "ALLOW_NONSEC9,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 8. "ALLOW_NONSEC8,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "ALLOW_NONSEC7,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 6. "ALLOW_NONSEC6,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 5. "ALLOW_NONSEC5,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 4. "ALLOW_NONSEC4,SSC register security settings" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "ALLOW_NONSEC3,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 2. "ALLOW_NONSEC2,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 1. "ALLOW_NONSEC1,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0xC 0. "ALLOW_NONSEC0,SSC register security settings" "B_0x0,B_0x1" rgroup.long 0x3D0++0x3 line.long 0x0 "CA35SS_SSC_NS_ENABLE_1,CA35SS SSC NS enable 1 register" bitfld.long 0x0 31. "ALLOW_NONSEC_RO3,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 30. "ALLOW_NONSEC_RO2,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 29. "ALLOW_NONSEC_RO1,SSC register security settings" "B_0x0,B_0x1" bitfld.long 0x0 28. "ALLOW_NONSEC_RO0,SSC register security settings" "B_0x0,B_0x1" group.long 0x2000++0x3 line.long 0x0 "CA35SS_SYSCFG_ETR_LPI_CR,CA35SS ETR low-power interface control register" bitfld.long 0x0 0. "ETR_CSYSREQ,None" "B_0x0,B_0x1" rgroup.long 0x2004++0x3 line.long 0x0 "CA35SS_SYSCFG_ETR_LPI_SR,CA35SS ETR low-power interface status register" bitfld.long 0x0 0. "ETR_CSYSACK,None" "B_0x0,B_0x1" group.long 0x2008++0xF line.long 0x0 "CA35SS_SYSCFG_STM_NSGUAREN_CR,CA35SS STM non-secure guaranteed access register" bitfld.long 0x0 0. "STM_NSGUAREN,None" "B_0x0,B_0x1" line.long 0x4 "CA35SS_SYSCFG_TRACE_CLK_DIV_CR,CA35SS TPIU export clock divider register" hexmask.long.byte 0x4 0.--5. 1. "TRACE_CLK_DIV_VALUE,0x1 to 0x3F: Divider ratio from 2 to 64" line.long 0x8 "CA35SS_SYSCFG_DBGPWR_CR,CA35SS Cortex-A35 core debug power mode register" bitfld.long 0x8 1. "DBGPWRUP1,None" "B_0x0,B_0x1" bitfld.long 0x8 0. "DBGPWRUP0,None" "B_0x0,B_0x1" line.long 0xC "CA35SS_SYSCFG_DBGL1RSTDISABLE_CR,CA35SS Cortex-A35 L1 data cache register" bitfld.long 0xC 0. "DBGL1RSTDIS,None" "B_0x0,B_0x1" rgroup.long 0x2018++0x7 line.long 0x0 "CA35SS_SYSCFG_DBGPWR_SR,CA35SS Cortex-A35 debug power register" bitfld.long 0x0 3. "DBGPWRUPREQ1,None" "B_0x0,B_0x1" bitfld.long 0x0 2. "DBGPWRUPREQ0,None" "B_0x0,B_0x1" bitfld.long 0x0 1. "DBGNOPWRDWN1,None" "B_0x0,B_0x1" bitfld.long 0x0 0. "DBGNOPWRDWN0,None" "B_0x0,B_0x1" line.long 0x4 "CA35SS_SYSCFG_EDBGACK_SR,CA35SS Cortex-A35 debug mode status register" bitfld.long 0x4 1. "DBGACK_C1,None" "B_0x0,B_0x1" bitfld.long 0x4 0. "DBGACK_C0,None" "B_0x0,B_0x1" group.long 0x2020++0x3 line.long 0x0 "CA35SS_SYSCFG_GIC_CFGR,GIC configuration register" bitfld.long 0x0 0. "GIC_4KNOT64K,None" "B_0x0,B_0x1" rgroup.long 0x2024++0x7 line.long 0x0 "CA35SS_SYSCFG_LP_SR,Cortex-A35 low-power status register" bitfld.long 0x0 4. "STANDBYWFIL2,None" "B_0x0,B_0x1" bitfld.long 0x0 3. "STANDBYWFI_1,None" "B_0x0,B_0x1" bitfld.long 0x0 2. "STANDBYWFI_0,None" "B_0x0,B_0x1" bitfld.long 0x0 1. "STANDBYWFE_1,None" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "STANDBYWFE_0,None" "B_0x0,B_0x1" line.long 0x4 "CA35SS_SYSCFG_RSTACK_SR,Cortex-A35 reset status register" bitfld.long 0x4 1. "NRESET_FCT_ACK,None" "B_0x0,B_0x1" bitfld.long 0x4 0. "NRESET_DBG_ACK,None" "B_0x0,B_0x1" group.long 0x2080++0xB line.long 0x0 "CA35SS_SYSCFG_AARCH_MODE_CR,CA35SS architecture mode register" bitfld.long 0x0 0. "AA64NAA32,None" "B_0x0,B_0x1" line.long 0x4 "CA35SS_SYSCFG_VBAR_CR,CA35SS reset vector register" hexmask.long 0x4 2.--31. 1. "RVBARADDRL,Set the value of reset vector at the boundaries of the Cortex-A35 cores." line.long 0x8 "CA35SS_SYSCFG_M33_ACCESS_CR,Cortex-M33 boot register access rights register" bitfld.long 0x8 1. "M33CFG_PRIV,None" "B_0x0,B_0x1" bitfld.long 0x8 0. "M33CFG_SEC,None" "B_0x0,B_0x1" group.long 0x20A0++0xB line.long 0x0 "CA35SS_SYSCFG_M33_TZEN_CR,Cortex-M33 secure extension enable register" bitfld.long 0x0 0. "CFG_SECEXT,None" "B_0x0,B_0x1" line.long 0x4 "CA35SS_SYSCFG_M33_INITSVTOR_CR,Cortex-M33 secure vector address register" hexmask.long 0x4 7.--31. 1. "INITSVTOR,Secure vector table offset" line.long 0x8 "CA35SS_SYSCFG_M33_INITNSVTOR_CR,Cortex-M33 non-secure vector address register" hexmask.long 0x8 7.--31. 1. "INITNSVTOR,Non-secure vector table offset" tree.end tree.end tree "CRC (Cyclic Redundancy Check Calculation Unit)" base ad:0x0 tree "CRC" base ad:0x404C0000 group.long 0x0++0xB line.long 0x0 "CRC_DR,CRC data register" hexmask.long 0x0 0.--31. 1. "DR,Data register bits" line.long 0x4 "CRC_IDR,CRC independent data register" hexmask.long 0x4 0.--31. 1. "IDR,General-purpose 32-bit data register bits" line.long 0x8 "CRC_CR,CRC control register" bitfld.long 0x8 7. "REV_OUT,Reverse output data" "B_0x0,B_0x1" bitfld.long 0x8 5.--6. "REV_IN,Reverse input data" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 3.--4. "POLYSIZE,Polynomial size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0. "RESET,RESET bit" "0,1" group.long 0x10++0x7 line.long 0x0 "CRC_INIT,CRC initial value" hexmask.long 0x0 0.--31. 1. "CRC_INIT,Programmable initial CRC value" line.long 0x4 "CRC_POL,CRC polynomial" hexmask.long 0x4 0.--31. 1. "POL,Programmable polynomial" rgroup.long 0x3F0++0xF line.long 0x0 "CRC_HWCFGR,CRC hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "FULL_POLY,Polynomial type" line.long 0x4 "CRC_VERR,CRC version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "CRC_IPIDR,CRC identification register" hexmask.long 0x8 0.--31. 1. "ID,Peripheral identifier" line.long 0xC "CRC_SIDR,CRC size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification" tree.end tree "CRC_S" base ad:0x504C0000 group.long 0x0++0xB line.long 0x0 "CRC_DR,CRC data register" hexmask.long 0x0 0.--31. 1. "DR,Data register bits" line.long 0x4 "CRC_IDR,CRC independent data register" hexmask.long 0x4 0.--31. 1. "IDR,General-purpose 32-bit data register bits" line.long 0x8 "CRC_CR,CRC control register" bitfld.long 0x8 7. "REV_OUT,Reverse output data" "B_0x0,B_0x1" bitfld.long 0x8 5.--6. "REV_IN,Reverse input data" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 3.--4. "POLYSIZE,Polynomial size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0. "RESET,RESET bit" "0,1" group.long 0x10++0x7 line.long 0x0 "CRC_INIT,CRC initial value" hexmask.long 0x0 0.--31. 1. "CRC_INIT,Programmable initial CRC value" line.long 0x4 "CRC_POL,CRC polynomial" hexmask.long 0x4 0.--31. 1. "POL,Programmable polynomial" rgroup.long 0x3F0++0xF line.long 0x0 "CRC_HWCFGR,CRC hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "FULL_POLY,Polynomial type" line.long 0x4 "CRC_VERR,CRC version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "CRC_IPIDR,CRC identification register" hexmask.long 0x8 0.--31. 1. "ID,Peripheral identifier" line.long 0xC "CRC_SIDR,CRC size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification" tree.end tree.end tree "CRYP (Cryptographic Processor)" base ad:0x0 tree "CRYP" base ad:0x42030000 group.long 0x0++0x3 line.long 0x0 "CRYP_CR,CRYP control register" bitfld.long 0x0 31. "IPRST,CRYP peripheral software reset" "0,1" bitfld.long 0x0 24.--25. "KMOD,Key mode selection" "B_0x0,?,B_0x2,?" hexmask.long.byte 0x0 20.--23. 1. "NPBLB,Number of padding bytes in last block" bitfld.long 0x0 19. "ALGOMODE_1,ALGOMODE[3]" "0,1" bitfld.long 0x0 16.--17. "GCM_CCMPH,GCM or CCM phase selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 15. "CRYPEN,CRYP enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "FFLUSH,FIFO flush" "B_0x0,B_0x1" newline bitfld.long 0x0 8.--9. "KEYSIZE,Key size selection" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 6.--7. "DATATYPE,Data type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3.--5. "ALGOMODE,ALGOMODE[2:0]: Algorithm mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 2. "ALGODIR,Algorithm direction" "B_0x0,B_0x1" rgroup.long 0x4++0x3 line.long 0x0 "CRYP_SR,CRYP status register" bitfld.long 0x0 7. "KEYVALID,Key valid flag" "B_0x0,B_0x1" bitfld.long 0x0 6. "KERF,Key error flag" "B_0x0,B_0x1" bitfld.long 0x0 4. "BUSY,Busy bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "OFFU,Output FIFO full flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "OFNE,Output FIFO not empty flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "IFNF,Input FIFO not full flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "IFEM,Input FIFO empty flag" "B_0x0,B_0x1" group.long 0x8++0x3 line.long 0x0 "CRYP_DINR,CRYP data input register" hexmask.long 0x0 0.--31. 1. "DIN,Data input" rgroup.long 0xC++0x3 line.long 0x0 "CRYP_DOUTR,CRYP data output register" hexmask.long 0x0 0.--31. 1. "DOUT,Data output" group.long 0x10++0x7 line.long 0x0 "CRYP_DMACR,CRYP DMA control register" bitfld.long 0x0 1. "DOEN,DMA output enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "DIEN,DMA input enable" "B_0x0,B_0x1" line.long 0x4 "CRYP_IMSCR,CRYP interrupt mask set/clear register" bitfld.long 0x4 1. "OUTIM,Output FIFO service interrupt mask" "B_0x0,B_0x1" bitfld.long 0x4 0. "INIM,Input FIFO service interrupt mask" "B_0x0,B_0x1" rgroup.long 0x18++0x7 line.long 0x0 "CRYP_RISR,CRYP raw interrupt status register" bitfld.long 0x0 1. "OUTRIS,Output FIFO service raw interrupt status" "B_0x0,B_0x1" bitfld.long 0x0 0. "INRIS,Input FIFO service raw interrupt status" "B_0x0,B_0x1" line.long 0x4 "CRYP_MISR,CRYP masked interrupt status register" bitfld.long 0x4 1. "OUTMIS,Output FIFO service masked interrupt status" "B_0x0,B_0x1" bitfld.long 0x4 0. "INMIS,Input FIFO service masked interrupt status" "B_0x0,B_0x1" wgroup.long 0x20++0x1F line.long 0x0 "CRYP_K0LR,CRYP key register 0L" hexmask.long 0x0 0.--31. 1. "K,Key bit x (x= 255 to 224)" line.long 0x4 "CRYP_K0RR,CRYP key register 0R" hexmask.long 0x4 0.--31. 1. "K,Key bit x (x= 223 to 192)" line.long 0x8 "CRYP_K1LR,CRYP key register 1L" hexmask.long 0x8 0.--31. 1. "K,Key bit x (x= 191 to 160)" line.long 0xC "CRYP_K1RR,CRYP key register 1R" hexmask.long 0xC 0.--31. 1. "K,Key bit x (x= 159 to 128)" line.long 0x10 "CRYP_K2LR,CRYP key register 2L" hexmask.long 0x10 0.--31. 1. "K,Key bit x (x= 127 to 96)" line.long 0x14 "CRYP_K2RR,CRYP key register 2R" hexmask.long 0x14 0.--31. 1. "K,Key bit x (x= 95 to 64)" line.long 0x18 "CRYP_K3LR,CRYP key register 3L" hexmask.long 0x18 0.--31. 1. "K,Key bit x (x= 63 to 32)" line.long 0x1C "CRYP_K3RR,CRYP key register 3R" hexmask.long 0x1C 0.--31. 1. "K,Key bit x (x= 31 to 0)" group.long 0x40++0x4F line.long 0x0 "CRYP_IV0LR,CRYP initialization vector register 0L" hexmask.long 0x0 0.--31. 1. "IVI,Initialization vector bit x (x= 127 to 96)" line.long 0x4 "CRYP_IV0RR,CRYP initialization vector register 0R" hexmask.long 0x4 0.--31. 1. "IVI,Initialization vector bit x (x= 95 to 64)" line.long 0x8 "CRYP_IV1LR,CRYP initialization vector register 1L" hexmask.long 0x8 0.--31. 1. "IVI,Initialization vector bit x (x= 63 to 32)" line.long 0xC "CRYP_IV1RR,CRYP initialization vector register 1R" hexmask.long 0xC 0.--31. 1. "IVI,Initialization vector bit x (x= 31 to 0)" line.long 0x10 "CRYP_CSGCMCCM0R,CRYP context swap GCM-CCM registers" hexmask.long 0x10 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x14 "CRYP_CSGCMCCM1R,CRYP context swap GCM-CCM registers" hexmask.long 0x14 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x18 "CRYP_CSGCMCCM2R,CRYP context swap GCM-CCM registers" hexmask.long 0x18 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x1C "CRYP_CSGCMCCM3R,CRYP context swap GCM-CCM registers" hexmask.long 0x1C 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x20 "CRYP_CSGCMCCM4R,CRYP context swap GCM-CCM registers" hexmask.long 0x20 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x24 "CRYP_CSGCMCCM5R,CRYP context swap GCM-CCM registers" hexmask.long 0x24 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x28 "CRYP_CSGCMCCM6R,CRYP context swap GCM-CCM registers" hexmask.long 0x28 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x2C "CRYP_CSGCMCCM7R,CRYP context swap GCM-CCM registers" hexmask.long 0x2C 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x30 "CRYP_CSGCM0R,CRYP context swap GCM registers" hexmask.long 0x30 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x34 "CRYP_CSGCM1R,CRYP context swap GCM registers" hexmask.long 0x34 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x38 "CRYP_CSGCM2R,CRYP context swap GCM registers" hexmask.long 0x38 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x3C "CRYP_CSGCM3R,CRYP context swap GCM registers" hexmask.long 0x3C 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x40 "CRYP_CSGCM4R,CRYP context swap GCM registers" hexmask.long 0x40 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x44 "CRYP_CSGCM5R,CRYP context swap GCM registers" hexmask.long 0x44 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x48 "CRYP_CSGCM6R,CRYP context swap GCM registers" hexmask.long 0x48 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x4C "CRYP_CSGCM7R,CRYP context swap GCM registers" hexmask.long 0x4C 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" rgroup.long 0x3F0++0xF line.long 0x0 "CRYP_HWCFGR,CRYP hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "CFG4,Hardware Generic 4" hexmask.long.byte 0x0 8.--11. 1. "CFG3,Hardware Generic 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,Hardware Generic 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,Hardware Generic 1" line.long 0x4 "CRYP_VERR,CRYP version register" hexmask.long.byte 0x4 4.--7. 1. "MAJVER,CRYP processor major version" hexmask.long.byte 0x4 0.--3. 1. "MINVER,CRYP processor minor version" line.long 0x8 "CRYP_IPIDR,CRYP identification" hexmask.long 0x8 0.--31. 1. "ID,Identification code" line.long 0xC "CRYP_SIDR,CRYP size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code" tree.end tree "CRYP1_S" base ad:0x52030000 group.long 0x0++0x3 line.long 0x0 "CRYP_CR,CRYP control register" bitfld.long 0x0 31. "IPRST,CRYP peripheral software reset" "0,1" bitfld.long 0x0 24.--25. "KMOD,Key mode selection" "B_0x0,?,B_0x2,?" hexmask.long.byte 0x0 20.--23. 1. "NPBLB,Number of padding bytes in last block" bitfld.long 0x0 19. "ALGOMODE_1,ALGOMODE[3]" "0,1" bitfld.long 0x0 16.--17. "GCM_CCMPH,GCM or CCM phase selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 15. "CRYPEN,CRYP enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "FFLUSH,FIFO flush" "B_0x0,B_0x1" newline bitfld.long 0x0 8.--9. "KEYSIZE,Key size selection" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 6.--7. "DATATYPE,Data type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3.--5. "ALGOMODE,ALGOMODE[2:0]: Algorithm mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 2. "ALGODIR,Algorithm direction" "B_0x0,B_0x1" rgroup.long 0x4++0x3 line.long 0x0 "CRYP_SR,CRYP status register" bitfld.long 0x0 7. "KEYVALID,Key valid flag" "B_0x0,B_0x1" bitfld.long 0x0 6. "KERF,Key error flag" "B_0x0,B_0x1" bitfld.long 0x0 4. "BUSY,Busy bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "OFFU,Output FIFO full flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "OFNE,Output FIFO not empty flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "IFNF,Input FIFO not full flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "IFEM,Input FIFO empty flag" "B_0x0,B_0x1" group.long 0x8++0x3 line.long 0x0 "CRYP_DINR,CRYP data input register" hexmask.long 0x0 0.--31. 1. "DIN,Data input" rgroup.long 0xC++0x3 line.long 0x0 "CRYP_DOUTR,CRYP data output register" hexmask.long 0x0 0.--31. 1. "DOUT,Data output" group.long 0x10++0x7 line.long 0x0 "CRYP_DMACR,CRYP DMA control register" bitfld.long 0x0 1. "DOEN,DMA output enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "DIEN,DMA input enable" "B_0x0,B_0x1" line.long 0x4 "CRYP_IMSCR,CRYP interrupt mask set/clear register" bitfld.long 0x4 1. "OUTIM,Output FIFO service interrupt mask" "B_0x0,B_0x1" bitfld.long 0x4 0. "INIM,Input FIFO service interrupt mask" "B_0x0,B_0x1" rgroup.long 0x18++0x7 line.long 0x0 "CRYP_RISR,CRYP raw interrupt status register" bitfld.long 0x0 1. "OUTRIS,Output FIFO service raw interrupt status" "B_0x0,B_0x1" bitfld.long 0x0 0. "INRIS,Input FIFO service raw interrupt status" "B_0x0,B_0x1" line.long 0x4 "CRYP_MISR,CRYP masked interrupt status register" bitfld.long 0x4 1. "OUTMIS,Output FIFO service masked interrupt status" "B_0x0,B_0x1" bitfld.long 0x4 0. "INMIS,Input FIFO service masked interrupt status" "B_0x0,B_0x1" wgroup.long 0x20++0x1F line.long 0x0 "CRYP_K0LR,CRYP key register 0L" hexmask.long 0x0 0.--31. 1. "K,Key bit x (x= 255 to 224)" line.long 0x4 "CRYP_K0RR,CRYP key register 0R" hexmask.long 0x4 0.--31. 1. "K,Key bit x (x= 223 to 192)" line.long 0x8 "CRYP_K1LR,CRYP key register 1L" hexmask.long 0x8 0.--31. 1. "K,Key bit x (x= 191 to 160)" line.long 0xC "CRYP_K1RR,CRYP key register 1R" hexmask.long 0xC 0.--31. 1. "K,Key bit x (x= 159 to 128)" line.long 0x10 "CRYP_K2LR,CRYP key register 2L" hexmask.long 0x10 0.--31. 1. "K,Key bit x (x= 127 to 96)" line.long 0x14 "CRYP_K2RR,CRYP key register 2R" hexmask.long 0x14 0.--31. 1. "K,Key bit x (x= 95 to 64)" line.long 0x18 "CRYP_K3LR,CRYP key register 3L" hexmask.long 0x18 0.--31. 1. "K,Key bit x (x= 63 to 32)" line.long 0x1C "CRYP_K3RR,CRYP key register 3R" hexmask.long 0x1C 0.--31. 1. "K,Key bit x (x= 31 to 0)" group.long 0x40++0x4F line.long 0x0 "CRYP_IV0LR,CRYP initialization vector register 0L" hexmask.long 0x0 0.--31. 1. "IVI,Initialization vector bit x (x= 127 to 96)" line.long 0x4 "CRYP_IV0RR,CRYP initialization vector register 0R" hexmask.long 0x4 0.--31. 1. "IVI,Initialization vector bit x (x= 95 to 64)" line.long 0x8 "CRYP_IV1LR,CRYP initialization vector register 1L" hexmask.long 0x8 0.--31. 1. "IVI,Initialization vector bit x (x= 63 to 32)" line.long 0xC "CRYP_IV1RR,CRYP initialization vector register 1R" hexmask.long 0xC 0.--31. 1. "IVI,Initialization vector bit x (x= 31 to 0)" line.long 0x10 "CRYP_CSGCMCCM0R,CRYP context swap GCM-CCM registers" hexmask.long 0x10 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x14 "CRYP_CSGCMCCM1R,CRYP context swap GCM-CCM registers" hexmask.long 0x14 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x18 "CRYP_CSGCMCCM2R,CRYP context swap GCM-CCM registers" hexmask.long 0x18 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x1C "CRYP_CSGCMCCM3R,CRYP context swap GCM-CCM registers" hexmask.long 0x1C 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x20 "CRYP_CSGCMCCM4R,CRYP context swap GCM-CCM registers" hexmask.long 0x20 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x24 "CRYP_CSGCMCCM5R,CRYP context swap GCM-CCM registers" hexmask.long 0x24 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x28 "CRYP_CSGCMCCM6R,CRYP context swap GCM-CCM registers" hexmask.long 0x28 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x2C "CRYP_CSGCMCCM7R,CRYP context swap GCM-CCM registers" hexmask.long 0x2C 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x30 "CRYP_CSGCM0R,CRYP context swap GCM registers" hexmask.long 0x30 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x34 "CRYP_CSGCM1R,CRYP context swap GCM registers" hexmask.long 0x34 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x38 "CRYP_CSGCM2R,CRYP context swap GCM registers" hexmask.long 0x38 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x3C "CRYP_CSGCM3R,CRYP context swap GCM registers" hexmask.long 0x3C 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x40 "CRYP_CSGCM4R,CRYP context swap GCM registers" hexmask.long 0x40 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x44 "CRYP_CSGCM5R,CRYP context swap GCM registers" hexmask.long 0x44 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x48 "CRYP_CSGCM6R,CRYP context swap GCM registers" hexmask.long 0x48 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x4C "CRYP_CSGCM7R,CRYP context swap GCM registers" hexmask.long 0x4C 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" rgroup.long 0x3F0++0xF line.long 0x0 "CRYP_HWCFGR,CRYP hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "CFG4,Hardware Generic 4" hexmask.long.byte 0x0 8.--11. 1. "CFG3,Hardware Generic 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,Hardware Generic 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,Hardware Generic 1" line.long 0x4 "CRYP_VERR,CRYP version register" hexmask.long.byte 0x4 4.--7. 1. "MAJVER,CRYP processor major version" hexmask.long.byte 0x4 0.--3. 1. "MINVER,CRYP processor minor version" line.long 0x8 "CRYP_IPIDR,CRYP identification" hexmask.long 0x8 0.--31. 1. "ID,Identification code" line.long 0xC "CRYP_SIDR,CRYP size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code" tree.end tree "CRYP2" base ad:0x42040000 group.long 0x0++0x3 line.long 0x0 "CRYP_CR,CRYP control register" bitfld.long 0x0 31. "IPRST,CRYP peripheral software reset" "0,1" bitfld.long 0x0 24.--25. "KMOD,Key mode selection" "B_0x0,?,B_0x2,?" hexmask.long.byte 0x0 20.--23. 1. "NPBLB,Number of padding bytes in last block" bitfld.long 0x0 19. "ALGOMODE_1,ALGOMODE[3]" "0,1" bitfld.long 0x0 16.--17. "GCM_CCMPH,GCM or CCM phase selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 15. "CRYPEN,CRYP enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "FFLUSH,FIFO flush" "B_0x0,B_0x1" newline bitfld.long 0x0 8.--9. "KEYSIZE,Key size selection" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 6.--7. "DATATYPE,Data type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3.--5. "ALGOMODE,ALGOMODE[2:0]: Algorithm mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 2. "ALGODIR,Algorithm direction" "B_0x0,B_0x1" rgroup.long 0x4++0x3 line.long 0x0 "CRYP_SR,CRYP status register" bitfld.long 0x0 7. "KEYVALID,Key valid flag" "B_0x0,B_0x1" bitfld.long 0x0 6. "KERF,Key error flag" "B_0x0,B_0x1" bitfld.long 0x0 4. "BUSY,Busy bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "OFFU,Output FIFO full flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "OFNE,Output FIFO not empty flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "IFNF,Input FIFO not full flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "IFEM,Input FIFO empty flag" "B_0x0,B_0x1" group.long 0x8++0x3 line.long 0x0 "CRYP_DINR,CRYP data input register" hexmask.long 0x0 0.--31. 1. "DIN,Data input" rgroup.long 0xC++0x3 line.long 0x0 "CRYP_DOUTR,CRYP data output register" hexmask.long 0x0 0.--31. 1. "DOUT,Data output" group.long 0x10++0x7 line.long 0x0 "CRYP_DMACR,CRYP DMA control register" bitfld.long 0x0 1. "DOEN,DMA output enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "DIEN,DMA input enable" "B_0x0,B_0x1" line.long 0x4 "CRYP_IMSCR,CRYP interrupt mask set/clear register" bitfld.long 0x4 1. "OUTIM,Output FIFO service interrupt mask" "B_0x0,B_0x1" bitfld.long 0x4 0. "INIM,Input FIFO service interrupt mask" "B_0x0,B_0x1" rgroup.long 0x18++0x7 line.long 0x0 "CRYP_RISR,CRYP raw interrupt status register" bitfld.long 0x0 1. "OUTRIS,Output FIFO service raw interrupt status" "B_0x0,B_0x1" bitfld.long 0x0 0. "INRIS,Input FIFO service raw interrupt status" "B_0x0,B_0x1" line.long 0x4 "CRYP_MISR,CRYP masked interrupt status register" bitfld.long 0x4 1. "OUTMIS,Output FIFO service masked interrupt status" "B_0x0,B_0x1" bitfld.long 0x4 0. "INMIS,Input FIFO service masked interrupt status" "B_0x0,B_0x1" wgroup.long 0x20++0x1F line.long 0x0 "CRYP_K0LR,CRYP key register 0L" hexmask.long 0x0 0.--31. 1. "K,Key bit x (x= 255 to 224)" line.long 0x4 "CRYP_K0RR,CRYP key register 0R" hexmask.long 0x4 0.--31. 1. "K,Key bit x (x= 223 to 192)" line.long 0x8 "CRYP_K1LR,CRYP key register 1L" hexmask.long 0x8 0.--31. 1. "K,Key bit x (x= 191 to 160)" line.long 0xC "CRYP_K1RR,CRYP key register 1R" hexmask.long 0xC 0.--31. 1. "K,Key bit x (x= 159 to 128)" line.long 0x10 "CRYP_K2LR,CRYP key register 2L" hexmask.long 0x10 0.--31. 1. "K,Key bit x (x= 127 to 96)" line.long 0x14 "CRYP_K2RR,CRYP key register 2R" hexmask.long 0x14 0.--31. 1. "K,Key bit x (x= 95 to 64)" line.long 0x18 "CRYP_K3LR,CRYP key register 3L" hexmask.long 0x18 0.--31. 1. "K,Key bit x (x= 63 to 32)" line.long 0x1C "CRYP_K3RR,CRYP key register 3R" hexmask.long 0x1C 0.--31. 1. "K,Key bit x (x= 31 to 0)" group.long 0x40++0x4F line.long 0x0 "CRYP_IV0LR,CRYP initialization vector register 0L" hexmask.long 0x0 0.--31. 1. "IVI,Initialization vector bit x (x= 127 to 96)" line.long 0x4 "CRYP_IV0RR,CRYP initialization vector register 0R" hexmask.long 0x4 0.--31. 1. "IVI,Initialization vector bit x (x= 95 to 64)" line.long 0x8 "CRYP_IV1LR,CRYP initialization vector register 1L" hexmask.long 0x8 0.--31. 1. "IVI,Initialization vector bit x (x= 63 to 32)" line.long 0xC "CRYP_IV1RR,CRYP initialization vector register 1R" hexmask.long 0xC 0.--31. 1. "IVI,Initialization vector bit x (x= 31 to 0)" line.long 0x10 "CRYP_CSGCMCCM0R,CRYP context swap GCM-CCM registers" hexmask.long 0x10 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x14 "CRYP_CSGCMCCM1R,CRYP context swap GCM-CCM registers" hexmask.long 0x14 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x18 "CRYP_CSGCMCCM2R,CRYP context swap GCM-CCM registers" hexmask.long 0x18 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x1C "CRYP_CSGCMCCM3R,CRYP context swap GCM-CCM registers" hexmask.long 0x1C 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x20 "CRYP_CSGCMCCM4R,CRYP context swap GCM-CCM registers" hexmask.long 0x20 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x24 "CRYP_CSGCMCCM5R,CRYP context swap GCM-CCM registers" hexmask.long 0x24 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x28 "CRYP_CSGCMCCM6R,CRYP context swap GCM-CCM registers" hexmask.long 0x28 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x2C "CRYP_CSGCMCCM7R,CRYP context swap GCM-CCM registers" hexmask.long 0x2C 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x30 "CRYP_CSGCM0R,CRYP context swap GCM registers" hexmask.long 0x30 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x34 "CRYP_CSGCM1R,CRYP context swap GCM registers" hexmask.long 0x34 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x38 "CRYP_CSGCM2R,CRYP context swap GCM registers" hexmask.long 0x38 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x3C "CRYP_CSGCM3R,CRYP context swap GCM registers" hexmask.long 0x3C 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x40 "CRYP_CSGCM4R,CRYP context swap GCM registers" hexmask.long 0x40 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x44 "CRYP_CSGCM5R,CRYP context swap GCM registers" hexmask.long 0x44 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x48 "CRYP_CSGCM6R,CRYP context swap GCM registers" hexmask.long 0x48 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x4C "CRYP_CSGCM7R,CRYP context swap GCM registers" hexmask.long 0x4C 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" rgroup.long 0x3F0++0xF line.long 0x0 "CRYP_HWCFGR,CRYP hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "CFG4,Hardware Generic 4" hexmask.long.byte 0x0 8.--11. 1. "CFG3,Hardware Generic 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,Hardware Generic 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,Hardware Generic 1" line.long 0x4 "CRYP_VERR,CRYP version register" hexmask.long.byte 0x4 4.--7. 1. "MAJVER,CRYP processor major version" hexmask.long.byte 0x4 0.--3. 1. "MINVER,CRYP processor minor version" line.long 0x8 "CRYP_IPIDR,CRYP identification" hexmask.long 0x8 0.--31. 1. "ID,Identification code" line.long 0xC "CRYP_SIDR,CRYP size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code" tree.end tree "CRYP2_S" base ad:0x52040000 group.long 0x0++0x3 line.long 0x0 "CRYP_CR,CRYP control register" bitfld.long 0x0 31. "IPRST,CRYP peripheral software reset" "0,1" bitfld.long 0x0 24.--25. "KMOD,Key mode selection" "B_0x0,?,B_0x2,?" hexmask.long.byte 0x0 20.--23. 1. "NPBLB,Number of padding bytes in last block" bitfld.long 0x0 19. "ALGOMODE_1,ALGOMODE[3]" "0,1" bitfld.long 0x0 16.--17. "GCM_CCMPH,GCM or CCM phase selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 15. "CRYPEN,CRYP enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "FFLUSH,FIFO flush" "B_0x0,B_0x1" newline bitfld.long 0x0 8.--9. "KEYSIZE,Key size selection" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 6.--7. "DATATYPE,Data type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3.--5. "ALGOMODE,ALGOMODE[2:0]: Algorithm mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 2. "ALGODIR,Algorithm direction" "B_0x0,B_0x1" rgroup.long 0x4++0x3 line.long 0x0 "CRYP_SR,CRYP status register" bitfld.long 0x0 7. "KEYVALID,Key valid flag" "B_0x0,B_0x1" bitfld.long 0x0 6. "KERF,Key error flag" "B_0x0,B_0x1" bitfld.long 0x0 4. "BUSY,Busy bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "OFFU,Output FIFO full flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "OFNE,Output FIFO not empty flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "IFNF,Input FIFO not full flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "IFEM,Input FIFO empty flag" "B_0x0,B_0x1" group.long 0x8++0x3 line.long 0x0 "CRYP_DINR,CRYP data input register" hexmask.long 0x0 0.--31. 1. "DIN,Data input" rgroup.long 0xC++0x3 line.long 0x0 "CRYP_DOUTR,CRYP data output register" hexmask.long 0x0 0.--31. 1. "DOUT,Data output" group.long 0x10++0x7 line.long 0x0 "CRYP_DMACR,CRYP DMA control register" bitfld.long 0x0 1. "DOEN,DMA output enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "DIEN,DMA input enable" "B_0x0,B_0x1" line.long 0x4 "CRYP_IMSCR,CRYP interrupt mask set/clear register" bitfld.long 0x4 1. "OUTIM,Output FIFO service interrupt mask" "B_0x0,B_0x1" bitfld.long 0x4 0. "INIM,Input FIFO service interrupt mask" "B_0x0,B_0x1" rgroup.long 0x18++0x7 line.long 0x0 "CRYP_RISR,CRYP raw interrupt status register" bitfld.long 0x0 1. "OUTRIS,Output FIFO service raw interrupt status" "B_0x0,B_0x1" bitfld.long 0x0 0. "INRIS,Input FIFO service raw interrupt status" "B_0x0,B_0x1" line.long 0x4 "CRYP_MISR,CRYP masked interrupt status register" bitfld.long 0x4 1. "OUTMIS,Output FIFO service masked interrupt status" "B_0x0,B_0x1" bitfld.long 0x4 0. "INMIS,Input FIFO service masked interrupt status" "B_0x0,B_0x1" wgroup.long 0x20++0x1F line.long 0x0 "CRYP_K0LR,CRYP key register 0L" hexmask.long 0x0 0.--31. 1. "K,Key bit x (x= 255 to 224)" line.long 0x4 "CRYP_K0RR,CRYP key register 0R" hexmask.long 0x4 0.--31. 1. "K,Key bit x (x= 223 to 192)" line.long 0x8 "CRYP_K1LR,CRYP key register 1L" hexmask.long 0x8 0.--31. 1. "K,Key bit x (x= 191 to 160)" line.long 0xC "CRYP_K1RR,CRYP key register 1R" hexmask.long 0xC 0.--31. 1. "K,Key bit x (x= 159 to 128)" line.long 0x10 "CRYP_K2LR,CRYP key register 2L" hexmask.long 0x10 0.--31. 1. "K,Key bit x (x= 127 to 96)" line.long 0x14 "CRYP_K2RR,CRYP key register 2R" hexmask.long 0x14 0.--31. 1. "K,Key bit x (x= 95 to 64)" line.long 0x18 "CRYP_K3LR,CRYP key register 3L" hexmask.long 0x18 0.--31. 1. "K,Key bit x (x= 63 to 32)" line.long 0x1C "CRYP_K3RR,CRYP key register 3R" hexmask.long 0x1C 0.--31. 1. "K,Key bit x (x= 31 to 0)" group.long 0x40++0x4F line.long 0x0 "CRYP_IV0LR,CRYP initialization vector register 0L" hexmask.long 0x0 0.--31. 1. "IVI,Initialization vector bit x (x= 127 to 96)" line.long 0x4 "CRYP_IV0RR,CRYP initialization vector register 0R" hexmask.long 0x4 0.--31. 1. "IVI,Initialization vector bit x (x= 95 to 64)" line.long 0x8 "CRYP_IV1LR,CRYP initialization vector register 1L" hexmask.long 0x8 0.--31. 1. "IVI,Initialization vector bit x (x= 63 to 32)" line.long 0xC "CRYP_IV1RR,CRYP initialization vector register 1R" hexmask.long 0xC 0.--31. 1. "IVI,Initialization vector bit x (x= 31 to 0)" line.long 0x10 "CRYP_CSGCMCCM0R,CRYP context swap GCM-CCM registers" hexmask.long 0x10 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x14 "CRYP_CSGCMCCM1R,CRYP context swap GCM-CCM registers" hexmask.long 0x14 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x18 "CRYP_CSGCMCCM2R,CRYP context swap GCM-CCM registers" hexmask.long 0x18 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x1C "CRYP_CSGCMCCM3R,CRYP context swap GCM-CCM registers" hexmask.long 0x1C 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x20 "CRYP_CSGCMCCM4R,CRYP context swap GCM-CCM registers" hexmask.long 0x20 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x24 "CRYP_CSGCMCCM5R,CRYP context swap GCM-CCM registers" hexmask.long 0x24 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x28 "CRYP_CSGCMCCM6R,CRYP context swap GCM-CCM registers" hexmask.long 0x28 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x2C "CRYP_CSGCMCCM7R,CRYP context swap GCM-CCM registers" hexmask.long 0x2C 0.--31. 1. "CSGCMCCM,Context swap for GCM/GMAC and CCM modes" line.long 0x30 "CRYP_CSGCM0R,CRYP context swap GCM registers" hexmask.long 0x30 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x34 "CRYP_CSGCM1R,CRYP context swap GCM registers" hexmask.long 0x34 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x38 "CRYP_CSGCM2R,CRYP context swap GCM registers" hexmask.long 0x38 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x3C "CRYP_CSGCM3R,CRYP context swap GCM registers" hexmask.long 0x3C 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x40 "CRYP_CSGCM4R,CRYP context swap GCM registers" hexmask.long 0x40 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x44 "CRYP_CSGCM5R,CRYP context swap GCM registers" hexmask.long 0x44 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x48 "CRYP_CSGCM6R,CRYP context swap GCM registers" hexmask.long 0x48 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" line.long 0x4C "CRYP_CSGCM7R,CRYP context swap GCM registers" hexmask.long 0x4C 0.--31. 1. "CSGCM,Context swap for GCM/GMAC modes" rgroup.long 0x3F0++0xF line.long 0x0 "CRYP_HWCFGR,CRYP hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "CFG4,Hardware Generic 4" hexmask.long.byte 0x0 8.--11. 1. "CFG3,Hardware Generic 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,Hardware Generic 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,Hardware Generic 1" line.long 0x4 "CRYP_VERR,CRYP version register" hexmask.long.byte 0x4 4.--7. 1. "MAJVER,CRYP processor major version" hexmask.long.byte 0x4 0.--3. 1. "MINVER,CRYP processor minor version" line.long 0x8 "CRYP_IPIDR,CRYP identification" hexmask.long 0x8 0.--31. 1. "ID,Identification code" line.long 0xC "CRYP_SIDR,CRYP size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code" tree.end tree.end tree "CSI (CSI-2 Host)" base ad:0x0 tree "CSI" base ad:0x48020000 group.long 0x0++0x7 line.long 0x0 "CSI_CR,CSI-2 Host control register" bitfld.long 0x0 15. "VC3STOP,Virtual channel 3 stop" "B_0x0,B_0x1" bitfld.long 0x0 14. "VC3START,Virtual channel 3 start" "B_0x0,B_0x1" bitfld.long 0x0 11. "VC2STOP,Virtual channel 2 stop" "B_0x0,B_0x1" bitfld.long 0x0 10. "VC2START,Virtual channel 2 start" "B_0x0,B_0x1" bitfld.long 0x0 7. "VC1STOP,Virtual channel 1 stop" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "VC1START,Virtual channel 1 start" "B_0x0,B_0x1" bitfld.long 0x0 3. "VC0STOP,Virtual channel 0 stop" "B_0x0,B_0x1" bitfld.long 0x0 2. "VC0START,Virtual channel 0 start" "B_0x0,B_0x1" bitfld.long 0x0 0. "CSIEN,CSI-2 enable" "B_0x0,B_0x1" line.long 0x4 "CSI_PCR,CSI-2 Host DPHY_RX control register" bitfld.long 0x4 3. "DL1EN,D-PHY_RX data lane 1 enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "DL0EN,D-PHY_RX data lane 0 enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CLEN,Clock lane enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "PWRDOWN,Power down" "B_0x0,B_0x1" group.long 0x10++0x6B line.long 0x0 "CSI_VC0CFGR1,CSI-2 Host virtual channel 0 configuration register 1" hexmask.long.byte 0x0 24.--28. 1. "DT0FT,Data type 0 format" hexmask.long.byte 0x0 16.--21. 1. "DT0,Data type 0 class selection for virtual channel x" hexmask.long.byte 0x0 8.--12. 1. "CDTFT,Common format for all data types" bitfld.long 0x0 7. "DT6EN,Data type 6 enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "DT5EN,Data type 5 enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "DT4EN,Data type 4 enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "DT3EN,Data type 3 enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "DT2EN,Data type 2 enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "DT1EN,Data type 1 enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "DT0EN,Data type 0 enable" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "ALLDT,All data types enable for the virtual channel x" "B_0x0,B_0x1" line.long 0x4 "CSI_VC0CFGR2,CSI-2 Host virtual channel 0 configuration register 2" hexmask.long.byte 0x4 24.--28. 1. "DT2FT,Data type 2 format" hexmask.long.byte 0x4 16.--21. 1. "DT2,Data type 2 class selection for virtual channel x" hexmask.long.byte 0x4 8.--12. 1. "DT1FT,Data type 1 format" hexmask.long.byte 0x4 0.--5. 1. "DT1,Data type 1 class selection for virtual channel x" line.long 0x8 "CSI_VC0CFGR3,CSI-2 Host virtual channel 0 configuration register 3" hexmask.long.byte 0x8 24.--28. 1. "DT4FT,Data type 4 format" hexmask.long.byte 0x8 16.--21. 1. "DT4,Data type 4 class selection for virtual channel x" hexmask.long.byte 0x8 8.--12. 1. "DT3FT,Data type 3 format" hexmask.long.byte 0x8 0.--5. 1. "DT3,Data type 3 class selection for virtual channel x" line.long 0xC "CSI_VC0CFGR4,CSI-2 Host virtual channel 0 configuration register 4" hexmask.long.byte 0xC 24.--28. 1. "DT6FT,Data type 6 format" hexmask.long.byte 0xC 16.--21. 1. "DT6,Data type 6 class selection for virtual channel x" hexmask.long.byte 0xC 8.--12. 1. "DT5FT,Data type 5 format" hexmask.long.byte 0xC 0.--5. 1. "DT5,Data type 5 class selection for virtual channel x" line.long 0x10 "CSI_VC1CFGR1,CSI-2 Host virtual channel 1 configuration register 1" hexmask.long.byte 0x10 24.--28. 1. "DT0FT,Data type 0 format" hexmask.long.byte 0x10 16.--21. 1. "DT0,Data type 0 class selection for virtual channel x" hexmask.long.byte 0x10 8.--12. 1. "CDTFT,Common format for all data types" bitfld.long 0x10 7. "DT6EN,Data type 6 enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "DT5EN,Data type 5 enable" "B_0x0,B_0x1" newline bitfld.long 0x10 5. "DT4EN,Data type 4 enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "DT3EN,Data type 3 enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "DT2EN,Data type 2 enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DT1EN,Data type 1 enable" "B_0x0,B_0x1" bitfld.long 0x10 1. "DT0EN,Data type 0 enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "ALLDT,All data types enable for the virtual channel x" "B_0x0,B_0x1" line.long 0x14 "CSI_VC1CFGR2,CSI-2 Host virtual channel 1 configuration register 2" hexmask.long.byte 0x14 24.--28. 1. "DT2FT,Data type 2 format" hexmask.long.byte 0x14 16.--21. 1. "DT2,Data type 2 class selection for virtual channel x" hexmask.long.byte 0x14 8.--12. 1. "DT1FT,Data type 1 format" hexmask.long.byte 0x14 0.--5. 1. "DT1,Data type 1 class selection for virtual channel x" line.long 0x18 "CSI_VC1CFGR3,CSI-2 Host virtual channel 1 configuration register 3" hexmask.long.byte 0x18 24.--28. 1. "DT4FT,Data type 4 format" hexmask.long.byte 0x18 16.--21. 1. "DT4,Data type 4 class selection for virtual channel x" hexmask.long.byte 0x18 8.--12. 1. "DT3FT,Data type 3 format" hexmask.long.byte 0x18 0.--5. 1. "DT3,Data type 3 class selection for virtual channel x" line.long 0x1C "CSI_VC1CFGR4,CSI-2 Host virtual channel 1 configuration register 4" hexmask.long.byte 0x1C 24.--28. 1. "DT6FT,Data type 6 format" hexmask.long.byte 0x1C 16.--21. 1. "DT6,Data type 6 class selection for virtual channel x" hexmask.long.byte 0x1C 8.--12. 1. "DT5FT,Data type 5 format" hexmask.long.byte 0x1C 0.--5. 1. "DT5,Data type 5 class selection for virtual channel x" line.long 0x20 "CSI_VC2CFGR1,CSI-2 Host virtual channel 2 configuration register 1" hexmask.long.byte 0x20 24.--28. 1. "DT0FT,Data type 0 format" hexmask.long.byte 0x20 16.--21. 1. "DT0,Data type 0 class selection for virtual channel x" hexmask.long.byte 0x20 8.--12. 1. "CDTFT,Common format for all data types" bitfld.long 0x20 7. "DT6EN,Data type 6 enable" "B_0x0,B_0x1" bitfld.long 0x20 6. "DT5EN,Data type 5 enable" "B_0x0,B_0x1" newline bitfld.long 0x20 5. "DT4EN,Data type 4 enable" "B_0x0,B_0x1" bitfld.long 0x20 4. "DT3EN,Data type 3 enable" "B_0x0,B_0x1" bitfld.long 0x20 3. "DT2EN,Data type 2 enable" "B_0x0,B_0x1" bitfld.long 0x20 2. "DT1EN,Data type 1 enable" "B_0x0,B_0x1" bitfld.long 0x20 1. "DT0EN,Data type 0 enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "ALLDT,All data types enable for the virtual channel x" "B_0x0,B_0x1" line.long 0x24 "CSI_VC2CFGR2,CSI-2 Host virtual channel 2 configuration register 2" hexmask.long.byte 0x24 24.--28. 1. "DT2FT,Data type 2 format" hexmask.long.byte 0x24 16.--21. 1. "DT2,Data type 2 class selection for virtual channel x" hexmask.long.byte 0x24 8.--12. 1. "DT1FT,Data type 1 format" hexmask.long.byte 0x24 0.--5. 1. "DT1,Data type 1 class selection for virtual channel x" line.long 0x28 "CSI_VC2CFGR3,CSI-2 Host virtual channel 2 configuration register 3" hexmask.long.byte 0x28 24.--28. 1. "DT4FT,Data type 4 format" hexmask.long.byte 0x28 16.--21. 1. "DT4,Data type 4 class selection for virtual channel x" hexmask.long.byte 0x28 8.--12. 1. "DT3FT,Data type 3 format" hexmask.long.byte 0x28 0.--5. 1. "DT3,Data type 3 class selection for virtual channel x" line.long 0x2C "CSI_VC2CFGR4,CSI-2 Host virtual channel 2 configuration register 4" hexmask.long.byte 0x2C 24.--28. 1. "DT6FT,Data type 6 format" hexmask.long.byte 0x2C 16.--21. 1. "DT6,Data type 6 class selection for virtual channel x" hexmask.long.byte 0x2C 8.--12. 1. "DT5FT,Data type 5 format" hexmask.long.byte 0x2C 0.--5. 1. "DT5,Data type 5 class selection for virtual channel x" line.long 0x30 "CSI_VC3CFGR1,CSI-2 Host virtual channel 3 configuration register 1" hexmask.long.byte 0x30 24.--28. 1. "DT0FT,Data type 0 format" hexmask.long.byte 0x30 16.--21. 1. "DT0,Data type 0 class selection for virtual channel x" hexmask.long.byte 0x30 8.--12. 1. "CDTFT,Common format for all data types" bitfld.long 0x30 7. "DT6EN,Data type 6 enable" "B_0x0,B_0x1" bitfld.long 0x30 6. "DT5EN,Data type 5 enable" "B_0x0,B_0x1" newline bitfld.long 0x30 5. "DT4EN,Data type 4 enable" "B_0x0,B_0x1" bitfld.long 0x30 4. "DT3EN,Data type 3 enable" "B_0x0,B_0x1" bitfld.long 0x30 3. "DT2EN,Data type 2 enable" "B_0x0,B_0x1" bitfld.long 0x30 2. "DT1EN,Data type 1 enable" "B_0x0,B_0x1" bitfld.long 0x30 1. "DT0EN,Data type 0 enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "ALLDT,All data types enable for the virtual channel x" "B_0x0,B_0x1" line.long 0x34 "CSI_VC3CFGR2,CSI-2 Host virtual channel 3 configuration register 2" hexmask.long.byte 0x34 24.--28. 1. "DT2FT,Data type 2 format" hexmask.long.byte 0x34 16.--21. 1. "DT2,Data type 2 class selection for virtual channel x" hexmask.long.byte 0x34 8.--12. 1. "DT1FT,Data type 1 format" hexmask.long.byte 0x34 0.--5. 1. "DT1,Data type 1 class selection for virtual channel x" line.long 0x38 "CSI_VC3CFGR3,CSI-2 Host virtual channel 3 configuration register 3" hexmask.long.byte 0x38 24.--28. 1. "DT4FT,Data type 4 format" hexmask.long.byte 0x38 16.--21. 1. "DT4,Data type 4 class selection for virtual channel x" hexmask.long.byte 0x38 8.--12. 1. "DT3FT,Data type 3 format" hexmask.long.byte 0x38 0.--5. 1. "DT3,Data type 3 class selection for virtual channel x" line.long 0x3C "CSI_VC3CFGR4,CSI-2 Host virtual channel 3 configuration register 4" hexmask.long.byte 0x3C 24.--28. 1. "DT6FT,Data type 6 format" hexmask.long.byte 0x3C 16.--21. 1. "DT6,Data type 6 class selection for virtual channel x" hexmask.long.byte 0x3C 8.--12. 1. "DT5FT,Data type 5 format" hexmask.long.byte 0x3C 0.--5. 1. "DT5,Data type 5 class selection for virtual channel x" line.long 0x40 "CSI_LB0CFGR,CSI-2 Host line byte 0 configuration register" hexmask.long.word 0x40 16.--31. 1. "LINECNT,Line counter" hexmask.long.word 0x40 0.--15. 1. "BYTECNT,Byte counter" line.long 0x44 "CSI_LB1CFGR,CSI-2 Host line byte 1 configuration register" hexmask.long.word 0x44 16.--31. 1. "LINECNT,Line counter" hexmask.long.word 0x44 0.--15. 1. "BYTECNT,Byte counter" line.long 0x48 "CSI_LB2CFGR,CSI-2 Host line byte 2 configuration register" hexmask.long.word 0x48 16.--31. 1. "LINECNT,Line counter" hexmask.long.word 0x48 0.--15. 1. "BYTECNT,Byte counter" line.long 0x4C "CSI_LB3CFGR,CSI-2 Host line byte 3 configuration register" hexmask.long.word 0x4C 16.--31. 1. "LINECNT,Line counter" hexmask.long.word 0x4C 0.--15. 1. "BYTECNT,Byte counter" line.long 0x50 "CSI_TIM0CFGR,CSI-2 Host timer 0 configuration register" hexmask.long 0x50 0.--24. 1. "COUNT,Clock cycle counter" line.long 0x54 "CSI_TIM1CFGR,CSI-2 Host timer 1 configuration register" hexmask.long 0x54 0.--24. 1. "COUNT,Clock cycle counter" line.long 0x58 "CSI_TIM2CFGR,CSI-2 Host timer 2 configuration register" hexmask.long 0x58 0.--24. 1. "COUNT,Clock cycle counter" line.long 0x5C "CSI_TIM3CFGR,CSI-2 Host timer 3 configuration register" hexmask.long 0x5C 0.--24. 1. "COUNT,Clock cycle counter" line.long 0x60 "CSI_LMCFGR,CSI-2 Host lane merger configuration register" bitfld.long 0x60 20.--22. "DL1MAP,Physical mapping of logical data lane 1" "?,B_0x1,B_0x2,?,?,?,?,?" bitfld.long 0x60 16.--18. "DL0MAP,Physical mapping of logical data lane 0" "?,B_0x1,B_0x2,?,?,?,?,?" bitfld.long 0x60 8.--10. "LANENB,Number of lanes" "?,B_0x1,B_0x2,?,?,?,?,?" line.long 0x64 "CSI_PRGITR,CSI-2 Host program interrupt register" bitfld.long 0x64 31. "TIM3EN,TIM3 base time enable" "B_0x0,B_0x1" bitfld.long 0x64 30. "TIM3EOF,TIM3 base time starting from the EOF" "B_0x0,B_0x1" bitfld.long 0x64 28.--29. "TIM3VC,TIM3 base time linked to a virtual channel" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x64 27. "TIM2EN,TIM2 base time enable" "B_0x0,B_0x1" bitfld.long 0x64 26. "TIM2EOF,TIM2 base time starting from the EOF" "B_0x0,B_0x1" newline bitfld.long 0x64 24.--25. "TIM2VC,TIM2 base time linked to a virtual channel" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x64 23. "TIM1EN,TIM1 base time enable" "B_0x0,B_0x1" bitfld.long 0x64 22. "TIM1EOF,TIM1 base time starting from the EOF" "B_0x0,B_0x1" bitfld.long 0x64 20.--21. "TIM1VC,TIM1 base time linked to a virtual channel" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x64 19. "TIM0EN,TIM0 base time enable" "B_0x0,B_0x1" newline bitfld.long 0x64 18. "TIM0EOF,TIM0 base time starting from the EOF" "B_0x0,B_0x1" bitfld.long 0x64 16.--17. "TIM0VC,TIM0 base time linked to a virtual channel" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x64 15. "LB3EN,Line/byte 3 counter enable" "B_0x0,B_0x1" bitfld.long 0x64 12.--13. "LB3VC,Line/byte counter 3 linked to a virtual channel" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x64 11. "LB2EN,Line/byte 2 counter enable" "B_0x0,B_0x1" newline bitfld.long 0x64 8.--9. "LB2VC,Line/byte counter 2 linked to a virtual channel" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x64 7. "LB1EN,Line/byte 1 counter enable" "B_0x0,B_0x1" bitfld.long 0x64 4.--5. "LB1VC,Line/byte counter 1 linked to a virtual channel" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x64 3. "LB0EN,Line/byte 0 counter enable" "B_0x0,B_0x1" bitfld.long 0x64 0.--1. "LB0VC,Line/byte counter 0 linked to a virtual channel" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x68 "CSI_WDR,CSI-2 Host watchdog register" hexmask.long 0x68 0.--31. 1. "CNT,Watchdog counter" group.long 0x80++0x7 line.long 0x0 "CSI_IER0,CSI-2 Host interrupt enable register 0" bitfld.long 0x0 30. "SYNCERRIE,Invalid synchronization error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "WDERRIE,Watchdog error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "SPKTERRIE,Short packet error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "IDERRIE,Data type ID error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "CECCERRIE,Corrected ECC error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "ECCERRIE,ECC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 24. "CRCERRIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "CCFIFOFIE,Clock changer FIFO full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SPKTIE,Short packet interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 15. "EOF3IE,EOF for virtual channel 3 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 14. "EOF2IE,EOF for virtual channel 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "EOF1IE,EOF for virtual channel 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOF0IE,EOF for virtual channel 0 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "SOF3IE,SOF for virtual channel 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "SOF2IE,SOF for virtual channel 2 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SOF1IE,SOF for virtual channel 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "SOF0IE,SOF for virtual channel 0 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TIM3IE,Timer 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TIM2IE,Timer 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "TIM1IE,Timer 1 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "TIM0IE,Timer 0 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "LB3IE,Line/byte counter 3 interrupt enable" "0,1" bitfld.long 0x0 2. "LB2IE,Line/byte counter 2 interrupt enable" "0,1" bitfld.long 0x0 1. "LB1IE,Line/byte counter 1 interrupt enable" "0,1" bitfld.long 0x0 0. "LB0IE,Line/byte counter 0 interrupt enable" "0,1" line.long 0x4 "CSI_IER1,CSI-2 Host interrupt enable register 1" bitfld.long 0x4 12. "ECTRLDL1IE,D-PHY_RX lane 1 control error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "ESYNCESCDL1IE,D-PHY_RX lane 1 low-power data transmission synchronization error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 10. "EESCDL1IE,D-PHY_RX lane 1 escape entry error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "ESOTSYNCDL1IE,SOT synchronization interrupt error enable on lane 1" "B_0x0,B_0x1" bitfld.long 0x4 8. "ESOTDL1IE,SOT error interrupt enable on lane 1" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "ECTRLDL0IE,D-PHY_RX lane 0 control error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "ESYNCESCDL0IE,D-PHY_RX lane 0 low power data transmission synchronization error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "EESCDL0IE,D-PHY_RX lane 0 escape entry error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "ESOTSYNCDL0IE,SOT synchronization interrupt error enable on lane 0" "B_0x0,B_0x1" bitfld.long 0x4 0. "ESOTDL0IE,SOT error interrupt enable on lane 0" "B_0x0,B_0x1" rgroup.long 0x90++0x7 line.long 0x0 "CSI_SR0,CSI-2 Host status register 0" bitfld.long 0x0 30. "SYNCERRF,Invalid synchronization error flag" "0,1" bitfld.long 0x0 29. "WDERRF,Watchdog error flag" "0,1" bitfld.long 0x0 28. "SPKTERRF,Short packet error flag" "0,1" bitfld.long 0x0 27. "IDERRF,Data type ID error flag" "0,1" bitfld.long 0x0 26. "CECCERRF,Corrected ECC error flag" "0,1" newline bitfld.long 0x0 25. "ECCERRF,ECC error flag" "0,1" bitfld.long 0x0 24. "CRCERRF,CRC error flag" "0,1" bitfld.long 0x0 21. "CCFIFOFF,Clock changer FIFO full flag" "0,1" bitfld.long 0x0 20. "VC3STATEF,Virtual channel 3 state flag" "B_0x0,B_0x1" bitfld.long 0x0 19. "VC2STATEF,Virtual channel 2 state flag" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "VC1STATEF,Virtual channel 1 state flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "VC0STATEF,Virtual channel 0 state flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "SPKTF,Short packet flag" "0,1" bitfld.long 0x0 15. "EOF3F,EOF flag for virtual channel 3" "0,1" bitfld.long 0x0 14. "EOF2F,EOF flag for virtual channel 2" "0,1" newline bitfld.long 0x0 13. "EOF1F,EOF flag for virtual channel 1" "0,1" bitfld.long 0x0 12. "EOF0F,EOF flag for virtual channel 0" "0,1" bitfld.long 0x0 11. "SOF3F,SOF flag for virtual channel 3" "0,1" bitfld.long 0x0 10. "SOF2F,SOF flag for virtual channel 2" "0,1" bitfld.long 0x0 9. "SOF1F,SOF flag for virtual channel 1" "0,1" newline bitfld.long 0x0 8. "SOF0F,SOF flag for virtual channel 0" "0,1" bitfld.long 0x0 7. "TIM3F,Timer 3 flag" "0,1" bitfld.long 0x0 6. "TIM2F,Timer 2 flag" "0,1" bitfld.long 0x0 5. "TIM1F,Timer 1 flag" "0,1" bitfld.long 0x0 4. "TIM0F,Timer 0 flag" "0,1" newline bitfld.long 0x0 3. "LB3F,Line/byte counter 3 flag" "0,1" bitfld.long 0x0 2. "LB2F,Line/byte counter 2 flag" "0,1" bitfld.long 0x0 1. "LB1F,Line/byte counter 1 flag" "0,1" bitfld.long 0x0 0. "LB0F,Line/byte counter 0 flag" "0,1" line.long 0x4 "CSI_SR1,CSI-2 Host status register 1" bitfld.long 0x4 31. "ACTCLF,D-PHY_RX receiver clock active flag" "0,1" bitfld.long 0x4 30. "ULPNCLF,D-PHY_RX receiver Ultra-Low power state (not) on clock lane." "0,1" bitfld.long 0x4 29. "ULPNACTF,D-PHY_RX receiver ULP state (not) active" "0,1" bitfld.long 0x4 28. "STOPCLF,D-PHY_RX receiver in stop state for the clock lane" "0,1" bitfld.long 0x4 26. "ULPNDL1F,D-PHY_RX receiver ultra-low-power state (not) active on data lane 1" "0,1" newline bitfld.long 0x4 25. "STOPDL1F,D-PHY_RX receiver data lane 1 in stop state" "0,1" bitfld.long 0x4 24. "SKCALDL1F,D-PHY_RX lane 1 high-speed skew calibration" "0,1" bitfld.long 0x4 23. "SYNCDL1F,D-PHY_RX lane 1 receiver synchronization observed" "0,1" bitfld.long 0x4 22. "ACTDL1F,D-PHY_RX lane 1 high-speed reception active" "0,1" bitfld.long 0x4 20. "ULPNDL0F,D-PHY_RX receiver ultra-low-power state (not) active on data lane 0" "0,1" newline bitfld.long 0x4 19. "STOPDL0F,D-PHY_RX receiver data lane 0 in stop state" "0,1" bitfld.long 0x4 18. "SKCALDL0F,D-PHY_RX lane 0 high-speed skew calibration" "0,1" bitfld.long 0x4 17. "SYNCDL0F,D-PHY_RX lane 0 receiver synchronization observed" "0,1" bitfld.long 0x4 16. "ACTDL0F,D-PHY_RX lane 0 high-speed reception active" "0,1" bitfld.long 0x4 12. "ECTRLDL1F,D-PHY_RX lane 1 control error flag" "0,1" newline bitfld.long 0x4 11. "ESYNCESCDL1F,D-PHY_RX lane 1 low-power data transmission synchronization error flag" "0,1" bitfld.long 0x4 10. "EESCDL1F,D-PHY_RX lane 1 escape entry error flag" "0,1" bitfld.long 0x4 9. "ESOTSYNCDL1F,SOT synchronization error flag on lane 1" "0,1" bitfld.long 0x4 8. "ESOTDL1F,SOT error flag on lane 1" "0,1" bitfld.long 0x4 4. "ECTRLDL0F,D-PHY_RX lane 0 control error flag" "0,1" newline bitfld.long 0x4 3. "ESYNCESCDL0F,D-PHY_RX lane 0 low-power data transmission synchronization error flag" "0,1" bitfld.long 0x4 2. "EESCDL0F,D-PHY_RX lane 0 escape entry error flag" "0,1" bitfld.long 0x4 1. "ESOTSYNCDL0F,SOT synchronization error flag on lane 0" "0,1" bitfld.long 0x4 0. "ESOTDL0F,SOT error flag on lane 0" "0,1" wgroup.long 0x100++0x7 line.long 0x0 "CSI_FCR0,CSI-2 Host flag clear register 0" bitfld.long 0x0 30. "CSYNCERRF,Clear invalid synchronization error flag" "0,1" bitfld.long 0x0 29. "CWDERRF,Clear watchdog error flag" "0,1" bitfld.long 0x0 28. "CSPKTERRF,Clear short packet error flag" "0,1" bitfld.long 0x0 27. "CIDERRF,Clear data type ID error flag" "0,1" bitfld.long 0x0 26. "CCECCERRF,Clear corrected ECC error flag" "0,1" newline bitfld.long 0x0 25. "CECCERRF,Clear ECC error flag" "0,1" bitfld.long 0x0 24. "CCRCERRF,Clear CRC error flag" "0,1" bitfld.long 0x0 21. "CCCFIFOFF,Clear clock changer FIFO full flag" "0,1" bitfld.long 0x0 16. "CSPKTF,Clear short packet flag" "0,1" bitfld.long 0x0 15. "CEOF3F,Clear EOF flag for virtual channel 3" "0,1" newline bitfld.long 0x0 14. "CEOF2F,Clear EOF flag for virtual channel 2" "0,1" bitfld.long 0x0 13. "CEOF1F,Clear EOF flag for virtual channel 1" "0,1" bitfld.long 0x0 12. "CEOF0F,Clear EOF flag for virtual channel 0" "0,1" bitfld.long 0x0 11. "CSOF3F,Clear SOF flag for virtual channel 3" "0,1" bitfld.long 0x0 10. "CSOF2F,Clear SOF flag for virtual channel 2" "0,1" newline bitfld.long 0x0 9. "CSOF1F,Clear SOF flag for virtual channel 1" "0,1" bitfld.long 0x0 8. "CSOF0F,Clear SOF flag for virtual channel 0" "0,1" bitfld.long 0x0 7. "CTIM3F,Clear timer 3 flag" "0,1" bitfld.long 0x0 6. "CTIM2F,Clear timer 2 flag" "0,1" bitfld.long 0x0 5. "CTIM1F,Clear timer 1 flag" "0,1" newline bitfld.long 0x0 4. "CTIM0F,Clear timer 0 flag" "0,1" bitfld.long 0x0 3. "CLB3F,Clear line/byte counter 3 flag" "0,1" bitfld.long 0x0 2. "CLB2F,Clear line/byte counter 2 flag" "0,1" bitfld.long 0x0 1. "CLB1F,Clear line/byte counter 1 flag" "0,1" bitfld.long 0x0 0. "CLB0F,Clear line/byte counter 0 flag" "0,1" line.long 0x4 "CSI_FCR1,CSI-2 Host flag clear register 1" bitfld.long 0x4 12. "CECTRLDL1F,Clear D-PHY_RX lane 1 control error flag" "0,1" bitfld.long 0x4 11. "CESYNCESCDL1F,Clear D-PHY_RX lane 1 low-power data transmission synchronization error flag" "0,1" bitfld.long 0x4 10. "CEESCDL1F,Clear D-PHY_RX lane 1 escape entry error flag" "0,1" bitfld.long 0x4 9. "CESOTSYNCDL1F,Clear SOT synchronization error flag on lane 1" "0,1" bitfld.long 0x4 8. "CESOTDL1F,Clear SOT error flag on lane 1" "0,1" newline bitfld.long 0x4 4. "CECTRLDL0F,Clear D-PHY_RX lane 0 control error flag" "0,1" bitfld.long 0x4 3. "CESYNCESCDL0F,Clear D-PHY_RX lane 0 low-power data transmission synchronization error flag" "0,1" bitfld.long 0x4 2. "CEESCDL0F,Clear D-PHY_RX lane 0 escape entry error flag" "0,1" bitfld.long 0x4 1. "CESOTSYNCDL0F,Clear SOT synchronization error flag on lane 0" "0,1" bitfld.long 0x4 0. "CESOTDL0F,Clear SOT error flag on lane 0" "0,1" rgroup.long 0x110++0xB line.long 0x0 "CSI_SPDFR,CSI-2 Host short packet data field register" bitfld.long 0x0 22.--23. "VCHANNEL,Virtual channel" "0,1,2,3" hexmask.long.byte 0x0 16.--21. 1. "DATATYPE,Data type class" hexmask.long.word 0x0 0.--15. 1. "DATAFIELD,Data field" line.long 0x4 "CSI_ERR1,CSI-2 Host error register 1" bitfld.long 0x4 22.--23. "IDVCERR,Virtual channel having ID error" "0,1,2,3" hexmask.long.byte 0x4 16.--21. 1. "IDDTERR,Data type in error" bitfld.long 0x4 14.--15. "CECCVCERR,Virtual channel having a corrected ECC error" "0,1,2,3" hexmask.long.byte 0x4 8.--13. 1. "CECCDTERR,Data type having a corrected ECC error" bitfld.long 0x4 6.--7. "CRCVCERR,Virtual channel having a CRC error" "0,1,2,3" newline hexmask.long.byte 0x4 0.--5. 1. "CRCDTERR,Data type having a CRC error" line.long 0x8 "CSI_ERR2,CSI-2 Host error register 2" bitfld.long 0x8 18.--19. "SYNCVCERR,Virtual channel having synchronization error" "0,1,2,3" bitfld.long 0x8 16.--17. "WDVCERR,Virtual channel having a watchdog error" "0,1,2,3" bitfld.long 0x8 6.--7. "SPKTVCERR,Virtual channel having a short packet error" "0,1,2,3" hexmask.long.byte 0x8 0.--5. 1. "SPKTDTERR,Data type having a short packet error" rgroup.long 0xFF0++0xF line.long 0x0 "CSI_HHWCFGR,CSI-2 Host hardware configuration register" hexmask.long.byte 0x0 0.--3. 1. "TECHNO,Technology" line.long 0x4 "CSI_HVERR,CSI-2 Host version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Major revision" line.long 0x8 "CSI_HIPIDR,CSI-2 Host identification register" hexmask.long 0x8 0.--31. 1. "ID,Identification code" line.long 0xC "CSI_HSIDR,CSI-2 Host size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size and ID" group.long 0x1000++0xB line.long 0x0 "CSI_PRCR,CSI PHY reset control register" bitfld.long 0x0 1. "PEN,When set to 0 this bit places the digital section of the D-PHY in the reset state." "B_0x0,B_0x1" line.long 0x4 "CSI_PMCR,CSI PHY mode control register" bitfld.long 0x4 16. "TUEXDL0,Tx ULP exit sequence data lane 0" "0,1" bitfld.long 0x4 12. "TUESDL0,Tx ULP escape-mode data lane 0" "0,1" bitfld.long 0x4 8. "RTDL0,Turn-around request data lane 0" "B_0x0,B_0x1" bitfld.long 0x4 4. "DTDL,Disable turn-around data lane 0" "B_0x0,B_0x1" bitfld.long 0x4 2. "FTXSMDL0,Force to Tx Stop mode the data lane 0" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "FRXMDL1,Force to Rx mode the data lane 1" "B_0x0,B_0x1" bitfld.long 0x4 0. "FRXMDL0,Force to Rx mode the data lane 0" "B_0x0,B_0x1" line.long 0x8 "CSI_PFCR,CSI PHY frequency control register" bitfld.long 0x8 16. "DLD,Data lane direction of lane 0" "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--14. 1. "HSFR,PHY high-speed frequency range selection" hexmask.long.byte 0x8 0.--5. 1. "CCFR,Configuration clock frequency range selection" group.long 0x1010++0x7 line.long 0x0 "CSI_PTCR0,CSI PHY test control register 0" bitfld.long 0x0 1. "TRSEN,Test-interface reset enable for the TDI bus into the PHY" "0,1" bitfld.long 0x0 0. "TCKEN,Test-interface clock enable for the TDI bus into the PHY" "0,1" line.long 0x4 "CSI_PTCR1,CSI PHY test control register 1" bitfld.long 0x4 16. "TWM,Test-interface write mode selector" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--7. 1. "TDI,Test-interface data in" rgroup.long 0x1018++0x3 line.long 0x0 "CSI_PTSR,CSI PHY test status register" hexmask.long.byte 0x0 0.--7. 1. "TDO,CSI PHY test interface data output bus for read-back and internal probing functionalities" rgroup.long 0x1FF0++0xF line.long 0x0 "CSI_HWCFGR,CSI-2 Host hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "LANES,Amount of CSI data lanes (excluding the clock lane)" hexmask.long.byte 0x0 0.--3. 1. "TECHNO,Technology" line.long 0x4 "CSI_VERR,CSI-2 Host version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Major revision" line.long 0x8 "CSI_IPIDR,CSI-2 Host identification register" hexmask.long 0x8 0.--31. 1. "ID,Identification code" line.long 0xC "CSI_SIDR,CSI-2 Host size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size and ID" tree.end tree "CSI_S" base ad:0x58020000 group.long 0x0++0x7 line.long 0x0 "CSI_CR,CSI-2 Host control register" bitfld.long 0x0 15. "VC3STOP,Virtual channel 3 stop" "B_0x0,B_0x1" bitfld.long 0x0 14. "VC3START,Virtual channel 3 start" "B_0x0,B_0x1" bitfld.long 0x0 11. "VC2STOP,Virtual channel 2 stop" "B_0x0,B_0x1" bitfld.long 0x0 10. "VC2START,Virtual channel 2 start" "B_0x0,B_0x1" bitfld.long 0x0 7. "VC1STOP,Virtual channel 1 stop" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "VC1START,Virtual channel 1 start" "B_0x0,B_0x1" bitfld.long 0x0 3. "VC0STOP,Virtual channel 0 stop" "B_0x0,B_0x1" bitfld.long 0x0 2. "VC0START,Virtual channel 0 start" "B_0x0,B_0x1" bitfld.long 0x0 0. "CSIEN,CSI-2 enable" "B_0x0,B_0x1" line.long 0x4 "CSI_PCR,CSI-2 Host DPHY_RX control register" bitfld.long 0x4 3. "DL1EN,D-PHY_RX data lane 1 enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "DL0EN,D-PHY_RX data lane 0 enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CLEN,Clock lane enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "PWRDOWN,Power down" "B_0x0,B_0x1" group.long 0x10++0x6B line.long 0x0 "CSI_VC0CFGR1,CSI-2 Host virtual channel 0 configuration register 1" hexmask.long.byte 0x0 24.--28. 1. "DT0FT,Data type 0 format" hexmask.long.byte 0x0 16.--21. 1. "DT0,Data type 0 class selection for virtual channel x" hexmask.long.byte 0x0 8.--12. 1. "CDTFT,Common format for all data types" bitfld.long 0x0 7. "DT6EN,Data type 6 enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "DT5EN,Data type 5 enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "DT4EN,Data type 4 enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "DT3EN,Data type 3 enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "DT2EN,Data type 2 enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "DT1EN,Data type 1 enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "DT0EN,Data type 0 enable" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "ALLDT,All data types enable for the virtual channel x" "B_0x0,B_0x1" line.long 0x4 "CSI_VC0CFGR2,CSI-2 Host virtual channel 0 configuration register 2" hexmask.long.byte 0x4 24.--28. 1. "DT2FT,Data type 2 format" hexmask.long.byte 0x4 16.--21. 1. "DT2,Data type 2 class selection for virtual channel x" hexmask.long.byte 0x4 8.--12. 1. "DT1FT,Data type 1 format" hexmask.long.byte 0x4 0.--5. 1. "DT1,Data type 1 class selection for virtual channel x" line.long 0x8 "CSI_VC0CFGR3,CSI-2 Host virtual channel 0 configuration register 3" hexmask.long.byte 0x8 24.--28. 1. "DT4FT,Data type 4 format" hexmask.long.byte 0x8 16.--21. 1. "DT4,Data type 4 class selection for virtual channel x" hexmask.long.byte 0x8 8.--12. 1. "DT3FT,Data type 3 format" hexmask.long.byte 0x8 0.--5. 1. "DT3,Data type 3 class selection for virtual channel x" line.long 0xC "CSI_VC0CFGR4,CSI-2 Host virtual channel 0 configuration register 4" hexmask.long.byte 0xC 24.--28. 1. "DT6FT,Data type 6 format" hexmask.long.byte 0xC 16.--21. 1. "DT6,Data type 6 class selection for virtual channel x" hexmask.long.byte 0xC 8.--12. 1. "DT5FT,Data type 5 format" hexmask.long.byte 0xC 0.--5. 1. "DT5,Data type 5 class selection for virtual channel x" line.long 0x10 "CSI_VC1CFGR1,CSI-2 Host virtual channel 1 configuration register 1" hexmask.long.byte 0x10 24.--28. 1. "DT0FT,Data type 0 format" hexmask.long.byte 0x10 16.--21. 1. "DT0,Data type 0 class selection for virtual channel x" hexmask.long.byte 0x10 8.--12. 1. "CDTFT,Common format for all data types" bitfld.long 0x10 7. "DT6EN,Data type 6 enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "DT5EN,Data type 5 enable" "B_0x0,B_0x1" newline bitfld.long 0x10 5. "DT4EN,Data type 4 enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "DT3EN,Data type 3 enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "DT2EN,Data type 2 enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DT1EN,Data type 1 enable" "B_0x0,B_0x1" bitfld.long 0x10 1. "DT0EN,Data type 0 enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "ALLDT,All data types enable for the virtual channel x" "B_0x0,B_0x1" line.long 0x14 "CSI_VC1CFGR2,CSI-2 Host virtual channel 1 configuration register 2" hexmask.long.byte 0x14 24.--28. 1. "DT2FT,Data type 2 format" hexmask.long.byte 0x14 16.--21. 1. "DT2,Data type 2 class selection for virtual channel x" hexmask.long.byte 0x14 8.--12. 1. "DT1FT,Data type 1 format" hexmask.long.byte 0x14 0.--5. 1. "DT1,Data type 1 class selection for virtual channel x" line.long 0x18 "CSI_VC1CFGR3,CSI-2 Host virtual channel 1 configuration register 3" hexmask.long.byte 0x18 24.--28. 1. "DT4FT,Data type 4 format" hexmask.long.byte 0x18 16.--21. 1. "DT4,Data type 4 class selection for virtual channel x" hexmask.long.byte 0x18 8.--12. 1. "DT3FT,Data type 3 format" hexmask.long.byte 0x18 0.--5. 1. "DT3,Data type 3 class selection for virtual channel x" line.long 0x1C "CSI_VC1CFGR4,CSI-2 Host virtual channel 1 configuration register 4" hexmask.long.byte 0x1C 24.--28. 1. "DT6FT,Data type 6 format" hexmask.long.byte 0x1C 16.--21. 1. "DT6,Data type 6 class selection for virtual channel x" hexmask.long.byte 0x1C 8.--12. 1. "DT5FT,Data type 5 format" hexmask.long.byte 0x1C 0.--5. 1. "DT5,Data type 5 class selection for virtual channel x" line.long 0x20 "CSI_VC2CFGR1,CSI-2 Host virtual channel 2 configuration register 1" hexmask.long.byte 0x20 24.--28. 1. "DT0FT,Data type 0 format" hexmask.long.byte 0x20 16.--21. 1. "DT0,Data type 0 class selection for virtual channel x" hexmask.long.byte 0x20 8.--12. 1. "CDTFT,Common format for all data types" bitfld.long 0x20 7. "DT6EN,Data type 6 enable" "B_0x0,B_0x1" bitfld.long 0x20 6. "DT5EN,Data type 5 enable" "B_0x0,B_0x1" newline bitfld.long 0x20 5. "DT4EN,Data type 4 enable" "B_0x0,B_0x1" bitfld.long 0x20 4. "DT3EN,Data type 3 enable" "B_0x0,B_0x1" bitfld.long 0x20 3. "DT2EN,Data type 2 enable" "B_0x0,B_0x1" bitfld.long 0x20 2. "DT1EN,Data type 1 enable" "B_0x0,B_0x1" bitfld.long 0x20 1. "DT0EN,Data type 0 enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "ALLDT,All data types enable for the virtual channel x" "B_0x0,B_0x1" line.long 0x24 "CSI_VC2CFGR2,CSI-2 Host virtual channel 2 configuration register 2" hexmask.long.byte 0x24 24.--28. 1. "DT2FT,Data type 2 format" hexmask.long.byte 0x24 16.--21. 1. "DT2,Data type 2 class selection for virtual channel x" hexmask.long.byte 0x24 8.--12. 1. "DT1FT,Data type 1 format" hexmask.long.byte 0x24 0.--5. 1. "DT1,Data type 1 class selection for virtual channel x" line.long 0x28 "CSI_VC2CFGR3,CSI-2 Host virtual channel 2 configuration register 3" hexmask.long.byte 0x28 24.--28. 1. "DT4FT,Data type 4 format" hexmask.long.byte 0x28 16.--21. 1. "DT4,Data type 4 class selection for virtual channel x" hexmask.long.byte 0x28 8.--12. 1. "DT3FT,Data type 3 format" hexmask.long.byte 0x28 0.--5. 1. "DT3,Data type 3 class selection for virtual channel x" line.long 0x2C "CSI_VC2CFGR4,CSI-2 Host virtual channel 2 configuration register 4" hexmask.long.byte 0x2C 24.--28. 1. "DT6FT,Data type 6 format" hexmask.long.byte 0x2C 16.--21. 1. "DT6,Data type 6 class selection for virtual channel x" hexmask.long.byte 0x2C 8.--12. 1. "DT5FT,Data type 5 format" hexmask.long.byte 0x2C 0.--5. 1. "DT5,Data type 5 class selection for virtual channel x" line.long 0x30 "CSI_VC3CFGR1,CSI-2 Host virtual channel 3 configuration register 1" hexmask.long.byte 0x30 24.--28. 1. "DT0FT,Data type 0 format" hexmask.long.byte 0x30 16.--21. 1. "DT0,Data type 0 class selection for virtual channel x" hexmask.long.byte 0x30 8.--12. 1. "CDTFT,Common format for all data types" bitfld.long 0x30 7. "DT6EN,Data type 6 enable" "B_0x0,B_0x1" bitfld.long 0x30 6. "DT5EN,Data type 5 enable" "B_0x0,B_0x1" newline bitfld.long 0x30 5. "DT4EN,Data type 4 enable" "B_0x0,B_0x1" bitfld.long 0x30 4. "DT3EN,Data type 3 enable" "B_0x0,B_0x1" bitfld.long 0x30 3. "DT2EN,Data type 2 enable" "B_0x0,B_0x1" bitfld.long 0x30 2. "DT1EN,Data type 1 enable" "B_0x0,B_0x1" bitfld.long 0x30 1. "DT0EN,Data type 0 enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "ALLDT,All data types enable for the virtual channel x" "B_0x0,B_0x1" line.long 0x34 "CSI_VC3CFGR2,CSI-2 Host virtual channel 3 configuration register 2" hexmask.long.byte 0x34 24.--28. 1. "DT2FT,Data type 2 format" hexmask.long.byte 0x34 16.--21. 1. "DT2,Data type 2 class selection for virtual channel x" hexmask.long.byte 0x34 8.--12. 1. "DT1FT,Data type 1 format" hexmask.long.byte 0x34 0.--5. 1. "DT1,Data type 1 class selection for virtual channel x" line.long 0x38 "CSI_VC3CFGR3,CSI-2 Host virtual channel 3 configuration register 3" hexmask.long.byte 0x38 24.--28. 1. "DT4FT,Data type 4 format" hexmask.long.byte 0x38 16.--21. 1. "DT4,Data type 4 class selection for virtual channel x" hexmask.long.byte 0x38 8.--12. 1. "DT3FT,Data type 3 format" hexmask.long.byte 0x38 0.--5. 1. "DT3,Data type 3 class selection for virtual channel x" line.long 0x3C "CSI_VC3CFGR4,CSI-2 Host virtual channel 3 configuration register 4" hexmask.long.byte 0x3C 24.--28. 1. "DT6FT,Data type 6 format" hexmask.long.byte 0x3C 16.--21. 1. "DT6,Data type 6 class selection for virtual channel x" hexmask.long.byte 0x3C 8.--12. 1. "DT5FT,Data type 5 format" hexmask.long.byte 0x3C 0.--5. 1. "DT5,Data type 5 class selection for virtual channel x" line.long 0x40 "CSI_LB0CFGR,CSI-2 Host line byte 0 configuration register" hexmask.long.word 0x40 16.--31. 1. "LINECNT,Line counter" hexmask.long.word 0x40 0.--15. 1. "BYTECNT,Byte counter" line.long 0x44 "CSI_LB1CFGR,CSI-2 Host line byte 1 configuration register" hexmask.long.word 0x44 16.--31. 1. "LINECNT,Line counter" hexmask.long.word 0x44 0.--15. 1. "BYTECNT,Byte counter" line.long 0x48 "CSI_LB2CFGR,CSI-2 Host line byte 2 configuration register" hexmask.long.word 0x48 16.--31. 1. "LINECNT,Line counter" hexmask.long.word 0x48 0.--15. 1. "BYTECNT,Byte counter" line.long 0x4C "CSI_LB3CFGR,CSI-2 Host line byte 3 configuration register" hexmask.long.word 0x4C 16.--31. 1. "LINECNT,Line counter" hexmask.long.word 0x4C 0.--15. 1. "BYTECNT,Byte counter" line.long 0x50 "CSI_TIM0CFGR,CSI-2 Host timer 0 configuration register" hexmask.long 0x50 0.--24. 1. "COUNT,Clock cycle counter" line.long 0x54 "CSI_TIM1CFGR,CSI-2 Host timer 1 configuration register" hexmask.long 0x54 0.--24. 1. "COUNT,Clock cycle counter" line.long 0x58 "CSI_TIM2CFGR,CSI-2 Host timer 2 configuration register" hexmask.long 0x58 0.--24. 1. "COUNT,Clock cycle counter" line.long 0x5C "CSI_TIM3CFGR,CSI-2 Host timer 3 configuration register" hexmask.long 0x5C 0.--24. 1. "COUNT,Clock cycle counter" line.long 0x60 "CSI_LMCFGR,CSI-2 Host lane merger configuration register" bitfld.long 0x60 20.--22. "DL1MAP,Physical mapping of logical data lane 1" "?,B_0x1,B_0x2,?,?,?,?,?" bitfld.long 0x60 16.--18. "DL0MAP,Physical mapping of logical data lane 0" "?,B_0x1,B_0x2,?,?,?,?,?" bitfld.long 0x60 8.--10. "LANENB,Number of lanes" "?,B_0x1,B_0x2,?,?,?,?,?" line.long 0x64 "CSI_PRGITR,CSI-2 Host program interrupt register" bitfld.long 0x64 31. "TIM3EN,TIM3 base time enable" "B_0x0,B_0x1" bitfld.long 0x64 30. "TIM3EOF,TIM3 base time starting from the EOF" "B_0x0,B_0x1" bitfld.long 0x64 28.--29. "TIM3VC,TIM3 base time linked to a virtual channel" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x64 27. "TIM2EN,TIM2 base time enable" "B_0x0,B_0x1" bitfld.long 0x64 26. "TIM2EOF,TIM2 base time starting from the EOF" "B_0x0,B_0x1" newline bitfld.long 0x64 24.--25. "TIM2VC,TIM2 base time linked to a virtual channel" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x64 23. "TIM1EN,TIM1 base time enable" "B_0x0,B_0x1" bitfld.long 0x64 22. "TIM1EOF,TIM1 base time starting from the EOF" "B_0x0,B_0x1" bitfld.long 0x64 20.--21. "TIM1VC,TIM1 base time linked to a virtual channel" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x64 19. "TIM0EN,TIM0 base time enable" "B_0x0,B_0x1" newline bitfld.long 0x64 18. "TIM0EOF,TIM0 base time starting from the EOF" "B_0x0,B_0x1" bitfld.long 0x64 16.--17. "TIM0VC,TIM0 base time linked to a virtual channel" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x64 15. "LB3EN,Line/byte 3 counter enable" "B_0x0,B_0x1" bitfld.long 0x64 12.--13. "LB3VC,Line/byte counter 3 linked to a virtual channel" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x64 11. "LB2EN,Line/byte 2 counter enable" "B_0x0,B_0x1" newline bitfld.long 0x64 8.--9. "LB2VC,Line/byte counter 2 linked to a virtual channel" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x64 7. "LB1EN,Line/byte 1 counter enable" "B_0x0,B_0x1" bitfld.long 0x64 4.--5. "LB1VC,Line/byte counter 1 linked to a virtual channel" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x64 3. "LB0EN,Line/byte 0 counter enable" "B_0x0,B_0x1" bitfld.long 0x64 0.--1. "LB0VC,Line/byte counter 0 linked to a virtual channel" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x68 "CSI_WDR,CSI-2 Host watchdog register" hexmask.long 0x68 0.--31. 1. "CNT,Watchdog counter" group.long 0x80++0x7 line.long 0x0 "CSI_IER0,CSI-2 Host interrupt enable register 0" bitfld.long 0x0 30. "SYNCERRIE,Invalid synchronization error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "WDERRIE,Watchdog error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "SPKTERRIE,Short packet error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "IDERRIE,Data type ID error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "CECCERRIE,Corrected ECC error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "ECCERRIE,ECC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 24. "CRCERRIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "CCFIFOFIE,Clock changer FIFO full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SPKTIE,Short packet interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 15. "EOF3IE,EOF for virtual channel 3 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 14. "EOF2IE,EOF for virtual channel 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "EOF1IE,EOF for virtual channel 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOF0IE,EOF for virtual channel 0 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "SOF3IE,SOF for virtual channel 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "SOF2IE,SOF for virtual channel 2 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SOF1IE,SOF for virtual channel 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "SOF0IE,SOF for virtual channel 0 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TIM3IE,Timer 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TIM2IE,Timer 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "TIM1IE,Timer 1 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "TIM0IE,Timer 0 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "LB3IE,Line/byte counter 3 interrupt enable" "0,1" bitfld.long 0x0 2. "LB2IE,Line/byte counter 2 interrupt enable" "0,1" bitfld.long 0x0 1. "LB1IE,Line/byte counter 1 interrupt enable" "0,1" bitfld.long 0x0 0. "LB0IE,Line/byte counter 0 interrupt enable" "0,1" line.long 0x4 "CSI_IER1,CSI-2 Host interrupt enable register 1" bitfld.long 0x4 12. "ECTRLDL1IE,D-PHY_RX lane 1 control error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "ESYNCESCDL1IE,D-PHY_RX lane 1 low-power data transmission synchronization error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 10. "EESCDL1IE,D-PHY_RX lane 1 escape entry error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "ESOTSYNCDL1IE,SOT synchronization interrupt error enable on lane 1" "B_0x0,B_0x1" bitfld.long 0x4 8. "ESOTDL1IE,SOT error interrupt enable on lane 1" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "ECTRLDL0IE,D-PHY_RX lane 0 control error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "ESYNCESCDL0IE,D-PHY_RX lane 0 low power data transmission synchronization error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "EESCDL0IE,D-PHY_RX lane 0 escape entry error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "ESOTSYNCDL0IE,SOT synchronization interrupt error enable on lane 0" "B_0x0,B_0x1" bitfld.long 0x4 0. "ESOTDL0IE,SOT error interrupt enable on lane 0" "B_0x0,B_0x1" rgroup.long 0x90++0x7 line.long 0x0 "CSI_SR0,CSI-2 Host status register 0" bitfld.long 0x0 30. "SYNCERRF,Invalid synchronization error flag" "0,1" bitfld.long 0x0 29. "WDERRF,Watchdog error flag" "0,1" bitfld.long 0x0 28. "SPKTERRF,Short packet error flag" "0,1" bitfld.long 0x0 27. "IDERRF,Data type ID error flag" "0,1" bitfld.long 0x0 26. "CECCERRF,Corrected ECC error flag" "0,1" newline bitfld.long 0x0 25. "ECCERRF,ECC error flag" "0,1" bitfld.long 0x0 24. "CRCERRF,CRC error flag" "0,1" bitfld.long 0x0 21. "CCFIFOFF,Clock changer FIFO full flag" "0,1" bitfld.long 0x0 20. "VC3STATEF,Virtual channel 3 state flag" "B_0x0,B_0x1" bitfld.long 0x0 19. "VC2STATEF,Virtual channel 2 state flag" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "VC1STATEF,Virtual channel 1 state flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "VC0STATEF,Virtual channel 0 state flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "SPKTF,Short packet flag" "0,1" bitfld.long 0x0 15. "EOF3F,EOF flag for virtual channel 3" "0,1" bitfld.long 0x0 14. "EOF2F,EOF flag for virtual channel 2" "0,1" newline bitfld.long 0x0 13. "EOF1F,EOF flag for virtual channel 1" "0,1" bitfld.long 0x0 12. "EOF0F,EOF flag for virtual channel 0" "0,1" bitfld.long 0x0 11. "SOF3F,SOF flag for virtual channel 3" "0,1" bitfld.long 0x0 10. "SOF2F,SOF flag for virtual channel 2" "0,1" bitfld.long 0x0 9. "SOF1F,SOF flag for virtual channel 1" "0,1" newline bitfld.long 0x0 8. "SOF0F,SOF flag for virtual channel 0" "0,1" bitfld.long 0x0 7. "TIM3F,Timer 3 flag" "0,1" bitfld.long 0x0 6. "TIM2F,Timer 2 flag" "0,1" bitfld.long 0x0 5. "TIM1F,Timer 1 flag" "0,1" bitfld.long 0x0 4. "TIM0F,Timer 0 flag" "0,1" newline bitfld.long 0x0 3. "LB3F,Line/byte counter 3 flag" "0,1" bitfld.long 0x0 2. "LB2F,Line/byte counter 2 flag" "0,1" bitfld.long 0x0 1. "LB1F,Line/byte counter 1 flag" "0,1" bitfld.long 0x0 0. "LB0F,Line/byte counter 0 flag" "0,1" line.long 0x4 "CSI_SR1,CSI-2 Host status register 1" bitfld.long 0x4 31. "ACTCLF,D-PHY_RX receiver clock active flag" "0,1" bitfld.long 0x4 30. "ULPNCLF,D-PHY_RX receiver Ultra-Low power state (not) on clock lane." "0,1" bitfld.long 0x4 29. "ULPNACTF,D-PHY_RX receiver ULP state (not) active" "0,1" bitfld.long 0x4 28. "STOPCLF,D-PHY_RX receiver in stop state for the clock lane" "0,1" bitfld.long 0x4 26. "ULPNDL1F,D-PHY_RX receiver ultra-low-power state (not) active on data lane 1" "0,1" newline bitfld.long 0x4 25. "STOPDL1F,D-PHY_RX receiver data lane 1 in stop state" "0,1" bitfld.long 0x4 24. "SKCALDL1F,D-PHY_RX lane 1 high-speed skew calibration" "0,1" bitfld.long 0x4 23. "SYNCDL1F,D-PHY_RX lane 1 receiver synchronization observed" "0,1" bitfld.long 0x4 22. "ACTDL1F,D-PHY_RX lane 1 high-speed reception active" "0,1" bitfld.long 0x4 20. "ULPNDL0F,D-PHY_RX receiver ultra-low-power state (not) active on data lane 0" "0,1" newline bitfld.long 0x4 19. "STOPDL0F,D-PHY_RX receiver data lane 0 in stop state" "0,1" bitfld.long 0x4 18. "SKCALDL0F,D-PHY_RX lane 0 high-speed skew calibration" "0,1" bitfld.long 0x4 17. "SYNCDL0F,D-PHY_RX lane 0 receiver synchronization observed" "0,1" bitfld.long 0x4 16. "ACTDL0F,D-PHY_RX lane 0 high-speed reception active" "0,1" bitfld.long 0x4 12. "ECTRLDL1F,D-PHY_RX lane 1 control error flag" "0,1" newline bitfld.long 0x4 11. "ESYNCESCDL1F,D-PHY_RX lane 1 low-power data transmission synchronization error flag" "0,1" bitfld.long 0x4 10. "EESCDL1F,D-PHY_RX lane 1 escape entry error flag" "0,1" bitfld.long 0x4 9. "ESOTSYNCDL1F,SOT synchronization error flag on lane 1" "0,1" bitfld.long 0x4 8. "ESOTDL1F,SOT error flag on lane 1" "0,1" bitfld.long 0x4 4. "ECTRLDL0F,D-PHY_RX lane 0 control error flag" "0,1" newline bitfld.long 0x4 3. "ESYNCESCDL0F,D-PHY_RX lane 0 low-power data transmission synchronization error flag" "0,1" bitfld.long 0x4 2. "EESCDL0F,D-PHY_RX lane 0 escape entry error flag" "0,1" bitfld.long 0x4 1. "ESOTSYNCDL0F,SOT synchronization error flag on lane 0" "0,1" bitfld.long 0x4 0. "ESOTDL0F,SOT error flag on lane 0" "0,1" wgroup.long 0x100++0x7 line.long 0x0 "CSI_FCR0,CSI-2 Host flag clear register 0" bitfld.long 0x0 30. "CSYNCERRF,Clear invalid synchronization error flag" "0,1" bitfld.long 0x0 29. "CWDERRF,Clear watchdog error flag" "0,1" bitfld.long 0x0 28. "CSPKTERRF,Clear short packet error flag" "0,1" bitfld.long 0x0 27. "CIDERRF,Clear data type ID error flag" "0,1" bitfld.long 0x0 26. "CCECCERRF,Clear corrected ECC error flag" "0,1" newline bitfld.long 0x0 25. "CECCERRF,Clear ECC error flag" "0,1" bitfld.long 0x0 24. "CCRCERRF,Clear CRC error flag" "0,1" bitfld.long 0x0 21. "CCCFIFOFF,Clear clock changer FIFO full flag" "0,1" bitfld.long 0x0 16. "CSPKTF,Clear short packet flag" "0,1" bitfld.long 0x0 15. "CEOF3F,Clear EOF flag for virtual channel 3" "0,1" newline bitfld.long 0x0 14. "CEOF2F,Clear EOF flag for virtual channel 2" "0,1" bitfld.long 0x0 13. "CEOF1F,Clear EOF flag for virtual channel 1" "0,1" bitfld.long 0x0 12. "CEOF0F,Clear EOF flag for virtual channel 0" "0,1" bitfld.long 0x0 11. "CSOF3F,Clear SOF flag for virtual channel 3" "0,1" bitfld.long 0x0 10. "CSOF2F,Clear SOF flag for virtual channel 2" "0,1" newline bitfld.long 0x0 9. "CSOF1F,Clear SOF flag for virtual channel 1" "0,1" bitfld.long 0x0 8. "CSOF0F,Clear SOF flag for virtual channel 0" "0,1" bitfld.long 0x0 7. "CTIM3F,Clear timer 3 flag" "0,1" bitfld.long 0x0 6. "CTIM2F,Clear timer 2 flag" "0,1" bitfld.long 0x0 5. "CTIM1F,Clear timer 1 flag" "0,1" newline bitfld.long 0x0 4. "CTIM0F,Clear timer 0 flag" "0,1" bitfld.long 0x0 3. "CLB3F,Clear line/byte counter 3 flag" "0,1" bitfld.long 0x0 2. "CLB2F,Clear line/byte counter 2 flag" "0,1" bitfld.long 0x0 1. "CLB1F,Clear line/byte counter 1 flag" "0,1" bitfld.long 0x0 0. "CLB0F,Clear line/byte counter 0 flag" "0,1" line.long 0x4 "CSI_FCR1,CSI-2 Host flag clear register 1" bitfld.long 0x4 12. "CECTRLDL1F,Clear D-PHY_RX lane 1 control error flag" "0,1" bitfld.long 0x4 11. "CESYNCESCDL1F,Clear D-PHY_RX lane 1 low-power data transmission synchronization error flag" "0,1" bitfld.long 0x4 10. "CEESCDL1F,Clear D-PHY_RX lane 1 escape entry error flag" "0,1" bitfld.long 0x4 9. "CESOTSYNCDL1F,Clear SOT synchronization error flag on lane 1" "0,1" bitfld.long 0x4 8. "CESOTDL1F,Clear SOT error flag on lane 1" "0,1" newline bitfld.long 0x4 4. "CECTRLDL0F,Clear D-PHY_RX lane 0 control error flag" "0,1" bitfld.long 0x4 3. "CESYNCESCDL0F,Clear D-PHY_RX lane 0 low-power data transmission synchronization error flag" "0,1" bitfld.long 0x4 2. "CEESCDL0F,Clear D-PHY_RX lane 0 escape entry error flag" "0,1" bitfld.long 0x4 1. "CESOTSYNCDL0F,Clear SOT synchronization error flag on lane 0" "0,1" bitfld.long 0x4 0. "CESOTDL0F,Clear SOT error flag on lane 0" "0,1" rgroup.long 0x110++0xB line.long 0x0 "CSI_SPDFR,CSI-2 Host short packet data field register" bitfld.long 0x0 22.--23. "VCHANNEL,Virtual channel" "0,1,2,3" hexmask.long.byte 0x0 16.--21. 1. "DATATYPE,Data type class" hexmask.long.word 0x0 0.--15. 1. "DATAFIELD,Data field" line.long 0x4 "CSI_ERR1,CSI-2 Host error register 1" bitfld.long 0x4 22.--23. "IDVCERR,Virtual channel having ID error" "0,1,2,3" hexmask.long.byte 0x4 16.--21. 1. "IDDTERR,Data type in error" bitfld.long 0x4 14.--15. "CECCVCERR,Virtual channel having a corrected ECC error" "0,1,2,3" hexmask.long.byte 0x4 8.--13. 1. "CECCDTERR,Data type having a corrected ECC error" bitfld.long 0x4 6.--7. "CRCVCERR,Virtual channel having a CRC error" "0,1,2,3" newline hexmask.long.byte 0x4 0.--5. 1. "CRCDTERR,Data type having a CRC error" line.long 0x8 "CSI_ERR2,CSI-2 Host error register 2" bitfld.long 0x8 18.--19. "SYNCVCERR,Virtual channel having synchronization error" "0,1,2,3" bitfld.long 0x8 16.--17. "WDVCERR,Virtual channel having a watchdog error" "0,1,2,3" bitfld.long 0x8 6.--7. "SPKTVCERR,Virtual channel having a short packet error" "0,1,2,3" hexmask.long.byte 0x8 0.--5. 1. "SPKTDTERR,Data type having a short packet error" rgroup.long 0xFF0++0xF line.long 0x0 "CSI_HHWCFGR,CSI-2 Host hardware configuration register" hexmask.long.byte 0x0 0.--3. 1. "TECHNO,Technology" line.long 0x4 "CSI_HVERR,CSI-2 Host version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Major revision" line.long 0x8 "CSI_HIPIDR,CSI-2 Host identification register" hexmask.long 0x8 0.--31. 1. "ID,Identification code" line.long 0xC "CSI_HSIDR,CSI-2 Host size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size and ID" group.long 0x1000++0xB line.long 0x0 "CSI_PRCR,CSI PHY reset control register" bitfld.long 0x0 1. "PEN,When set to 0 this bit places the digital section of the D-PHY in the reset state." "B_0x0,B_0x1" line.long 0x4 "CSI_PMCR,CSI PHY mode control register" bitfld.long 0x4 16. "TUEXDL0,Tx ULP exit sequence data lane 0" "0,1" bitfld.long 0x4 12. "TUESDL0,Tx ULP escape-mode data lane 0" "0,1" bitfld.long 0x4 8. "RTDL0,Turn-around request data lane 0" "B_0x0,B_0x1" bitfld.long 0x4 4. "DTDL,Disable turn-around data lane 0" "B_0x0,B_0x1" bitfld.long 0x4 2. "FTXSMDL0,Force to Tx Stop mode the data lane 0" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "FRXMDL1,Force to Rx mode the data lane 1" "B_0x0,B_0x1" bitfld.long 0x4 0. "FRXMDL0,Force to Rx mode the data lane 0" "B_0x0,B_0x1" line.long 0x8 "CSI_PFCR,CSI PHY frequency control register" bitfld.long 0x8 16. "DLD,Data lane direction of lane 0" "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--14. 1. "HSFR,PHY high-speed frequency range selection" hexmask.long.byte 0x8 0.--5. 1. "CCFR,Configuration clock frequency range selection" group.long 0x1010++0x7 line.long 0x0 "CSI_PTCR0,CSI PHY test control register 0" bitfld.long 0x0 1. "TRSEN,Test-interface reset enable for the TDI bus into the PHY" "0,1" bitfld.long 0x0 0. "TCKEN,Test-interface clock enable for the TDI bus into the PHY" "0,1" line.long 0x4 "CSI_PTCR1,CSI PHY test control register 1" bitfld.long 0x4 16. "TWM,Test-interface write mode selector" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--7. 1. "TDI,Test-interface data in" rgroup.long 0x1018++0x3 line.long 0x0 "CSI_PTSR,CSI PHY test status register" hexmask.long.byte 0x0 0.--7. 1. "TDO,CSI PHY test interface data output bus for read-back and internal probing functionalities" rgroup.long 0x1FF0++0xF line.long 0x0 "CSI_HWCFGR,CSI-2 Host hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "LANES,Amount of CSI data lanes (excluding the clock lane)" hexmask.long.byte 0x0 0.--3. 1. "TECHNO,Technology" line.long 0x4 "CSI_VERR,CSI-2 Host version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Major revision" line.long 0x8 "CSI_IPIDR,CSI-2 Host identification register" hexmask.long 0x8 0.--31. 1. "ID,Identification code" line.long 0xC "CSI_SIDR,CSI-2 Host size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size and ID" tree.end tree.end tree "DBGMCU (Debug Support)" base ad:0x0 tree "DBGMCU" base ad:0x4A010000 rgroup.long 0x0++0x3 line.long 0x0 "DBGMCU_IDC,DBGMCU identity code register" hexmask.long.word 0x0 16.--31. 1. "MAJOR_REV_ID,Revision" hexmask.long.word 0x0 0.--11. 1. "DEV_ID,Device identifier" group.long 0x4++0x7 line.long 0x0 "DBGMCU_CR,DBGMCU configuration register" bitfld.long 0x0 4. "DBG_SWD_SEL_N,Cortex-M0+ debug interface selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "DBG_STANDBY,Debug enable in Standby mode" "B_0x0,B_0x1" bitfld.long 0x0 1. "DBG_STOP,Debug enable in Stop mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "DBG_SLEEP,Debug enable in Sleep mode" "B_0x0,B_0x1" line.long 0x4 "DBGMCU_CRA35,DBGMCU configuration register CPU1" bitfld.long 0x4 1. "DBG_STGEN_STOP,STGEN behavior when debug is enabled" "B_0x0,B_0x1" bitfld.long 0x4 0. "WDFZCTL,IWDG1 behavior when secure debug is enabled" "B_0x0,B_0x1" group.long 0x10++0x3F line.long 0x0 "DBGMCU_AHB2LFZ1,DBGMCU AHB2 - lowest part - peripheral freeze register CPU1" bitfld.long 0x0 31. "DBG_HPDMA2_CH15_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 30. "DBG_HPDMA2_CH14_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 29. "DBG_HPDMA2_CH13_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 28. "DBG_HPDMA2_CH12_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "DBG_HPDMA2_CH11_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 26. "DBG_HPDMA2_CH10_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 25. "DBG_HPDMA2_CH9_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 24. "DBG_HPDMA2_CH8_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x0 23. "DBG_HPDMA2_CH7_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 22. "DBG_HPDMA2_CH6_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 21. "DBG_HPDMA2_CH5_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 20. "DBG_HPDMA2_CH4_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "DBG_HPDMA2_CH3_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 18. "DBG_HPDMA2_CH2_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 17. "DBG_HPDMA2_CH1_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 16. "DBG_HPDMA2_CH0_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x0 15. "DBG_HPDMA1_CH15_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 14. "DBG_HPDMA1_CH14_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 13. "DBG_HPDMA1_CH13_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 12. "DBG_HPDMA1_CH12_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "DBG_HPDMA1_CH11_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 10. "DBG_HPDMA1_CH10_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 9. "DBG_HPDMA1_CH9_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 8. "DBG_HPDMA1_CH8_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "DBG_HPDMA1_CH7_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 6. "DBG_HPDMA1_CH6_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 5. "DBG_HPDMA1_CH5_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 4. "DBG_HPDMA1_CH4_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "DBG_HPDMA1_CH3_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 2. "DBG_HPDMA1_CH2_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 1. "DBG_HPDMA1_CH1_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 0. "DBG_HPDMA1_CH0_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" line.long 0x4 "DBGMCU_AHB2HFZ1,DBGMCU AHB2 - highest part- peripheral freeze register CPU1" bitfld.long 0x4 15. "DBG_HPDMA3_CH15_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 14. "DBG_HPDMA3_CH14_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 13. "DBG_HPDMA3_CH13_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 12. "DBG_HPDMA3_CH12_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "DBG_HPDMA3_CH11_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 10. "DBG_HPDMA3_CH10_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 9. "DBG_HPDMA3_CH9_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 8. "DBG_HPDMA3_CH8_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "DBG_HPDMA3_CH7_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 6. "DBG_HPDMA3_CH6_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 5. "DBG_HPDMA3_CH5_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 4. "DBG_HPDMA3_CH4_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DBG_HPDMA3_CH3_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 2. "DBG_HPDMA3_CH2_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 1. "DBG_HPDMA3_CH1_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 0. "DBG_HPDMA3_CH0_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" line.long 0x8 "DBGMCU_AHB2LFZ2,DBGMCU AHB2 - lowest part - peripheral freeze register CPU2" bitfld.long 0x8 31. "DBG_HPDMA2_CH15_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 30. "DBG_HPDMA2_CH14_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 29. "DBG_HPDMA2_CH13_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 28. "DBG_HPDMA2_CH12_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x8 27. "DBG_HPDMA2_CH11_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 26. "DBG_HPDMA2_CH10_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 25. "DBG_HPDMA2_CH9_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 24. "DBG_HPDMA2_CH8_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x8 23. "DBG_HPDMA2_CH7_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 22. "DBG_HPDMA2_CH6_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 21. "DBG_HPDMA2_CH5_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 20. "DBG_HPDMA2_CH4_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "DBG_HPDMA2_CH3_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 18. "DBG_HPDMA2_CH2_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 17. "DBG_HPDMA2_CH1_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 16. "DBG_HPDMA2_CH0_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x8 15. "DBG_HPDMA1_CH15_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 14. "DBG_HPDMA1_CH14_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 13. "DBG_HPDMA1_CH13_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 12. "DBG_HPDMA1_CH12_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x8 11. "DBG_HPDMA1_CH11_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 10. "DBG_HPDMA1_CH10_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 9. "DBG_HPDMA1_CH9_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 8. "DBG_HPDMA1_CH8_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "DBG_HPDMA1_CH7_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 6. "DBG_HPDMA1_CH6_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 5. "DBG_HPDMA1_CH5_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 4. "DBG_HPDMA1_CH4_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "DBG_HPDMA1_CH3_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 2. "DBG_HPDMA1_CH2_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 1. "DBG_HPDMA1_CH1_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 0. "DBG_HPDMA1_CH0_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" line.long 0xC "DBGMCU_AHB2HFZ2,DBGMCU AHB2 - highest part- peripheral freeze register CPU2" bitfld.long 0xC 15. "DBG_HPDMA3_CH15_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 14. "DBG_HPDMA3_CH14_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 13. "DBG_HPDMA3_CH13_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 12. "DBG_HPDMA3_CH12_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0xC 11. "DBG_HPDMA3_CH11_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 10. "DBG_HPDMA3_CH10_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 9. "DBG_HPDMA3_CH9_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 8. "DBG_HPDMA3_CH8_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "DBG_HPDMA3_CH7_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 6. "DBG_HPDMA3_CH6_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 5. "DBG_HPDMA3_CH5_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 4. "DBG_HPDMA3_CH4_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "DBG_HPDMA3_CH3_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 2. "DBG_HPDMA3_CH2_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 1. "DBG_HPDMA3_CH1_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 0. "DBG_HPDMA3_CH0_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" line.long 0x10 "DBGMCU_AHBSRFZ1,DBGMCU AHBSR peripheral freeze register CPU1" bitfld.long 0x10 3. "DBG_LPDMA1_CH3_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x10 2. "DBG_LPDMA1_CH2_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x10 1. "DBG_LPDMA1_CH1_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x10 0. "DBG_LPDMA1_CH0_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" line.long 0x14 "DBGMCU_AHBSRFZ2,DBGMCU AHBSR peripheral freeze register CPU2" bitfld.long 0x14 3. "DBG_LPDMA1_CH3_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x14 2. "DBG_LPDMA1_CH2_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x14 1. "DBG_LPDMA1_CH1_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x14 0. "DBG_LPDMA1_CH0_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" line.long 0x18 "DBGMCU_AHBSRFZ3,DBGMCU AHBSR peripheral freeze register CPU3" bitfld.long 0x18 3. "DBG_LPDMA1_CH3_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x18 2. "DBG_LPDMA1_CH2_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x18 1. "DBG_LPDMA1_CH1_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x18 0. "DBG_LPDMA1_CH0_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" line.long 0x1C "DBGMCU_APB1FZ1,DBGMCU APB1 peripheral freeze register CPU1" bitfld.long 0x1C 29. "DBG_TIM11_STOP,TIM11 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 28. "DBG_TIM10_STOP,TIM10 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 27. "DBG_I3C3_STOP,I3C3 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 26. "DBG_I3C2_STOP,I3C2 SMBUS timeout stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x1C 25. "DBG_I3C1_STOP,I3C1 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 24. "DBG_I2C7_STOP,I2C7 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 23. "DBG_I2C6_STOP,I2C6 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 22. "DBG_I2C5_STOP,I2C5 SMBUS timeout stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x1C 21. "DBG_I2C4_STOP,I2C4 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 20. "DBG_I2C3_STOP,I2C3 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 19. "DBG_I2C2_STOP,I2C2 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 18. "DBG_I2C1_STOP,I2C1 SMBUS timeout stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x1C 10. "DBG_LPTIM2_STOP,LPTIM2 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 9. "DBG_LPTIM1_STOP,LPTIM1 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 8. "DBG_TIM14_STOP,TIM14 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 7. "DBG_TIM13_STOP,TIM13 stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x1C 6. "DBG_TIM12_STOP,TIM12 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 5. "DBG_TIM7_STOP,TIM7 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 4. "DBG_TIM6_STOP,TIM6 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 3. "DBG_TIM5_STOP,TIM5 stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x1C 2. "DBG_TIM4_STOP,TIM4 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 1. "DBG_TIM3_STOP,TIM3 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 0. "DBG_TIM2_STOP,TIM2 stop in debug" "B_0x0,B_0x1" line.long 0x20 "DBGMCU_APB1FZ2,DBGMCU APB1 peripheral freeze register CPU2" bitfld.long 0x20 29. "DBG_TIM11_STOP,TIM11 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 28. "DBG_TIM10_STOP,TIM10 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 27. "DBG_I3C3_STOP,I3C3 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 26. "DBG_I3C2_STOP,I3C2 SMBUS timeout stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x20 25. "DBG_I3C1_STOP,I3C1 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 24. "DBG_I2C7_STOP,I2C7 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 23. "DBG_I2C6_STOP,I2C6 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 22. "DBG_I2C5_STOP,I2C5 SMBUS timeout stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x20 21. "DBG_I2C4_STOP,I2C4 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 20. "DBG_I2C3_STOP,I2C3 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 19. "DBG_I2C2_STOP,I2C2 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 18. "DBG_I2C1_STOP,I2C1 SMBUS timeout stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x20 10. "DBG_LPTIM2_STOP,LPTIM2 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 9. "DBG_LPTIM1_STOP,LPTIM1 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 8. "DBG_TIM14_STOP,TIM14 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 7. "DBG_TIM13_STOP,TIM13 stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x20 6. "DBG_TIM12_STOP,TIM12 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 5. "DBG_TIM7_STOP,TIM7 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 4. "DBG_TIM6_STOP,TIM6 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 3. "DBG_TIM5_STOP,TIM5 stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x20 2. "DBG_TIM4_STOP,TIM4 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 1. "DBG_TIM3_STOP,TIM3 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 0. "DBG_TIM2_STOP,TIM2 stop in debug" "B_0x0,B_0x1" line.long 0x24 "DBGMCU_APB2FZ1,DBGMCU APB2 peripheral freeze register CPU1" bitfld.long 0x24 18. "DBG_TIM20_STOP,TIM20 stop in debug" "B_0x0,B_0x1" bitfld.long 0x24 13. "DBG_FDCAN_STOP,FDCAN stop in debug" "B_0x0,B_0x1" bitfld.long 0x24 7. "DBG_TIM17_STOP,TIM17 stop in debug" "B_0x0,B_0x1" bitfld.long 0x24 6. "DBG_TIM16_STOP,TIM16 stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x24 5. "DBG_TIM15_STOP,TIM15 stop in debug" "B_0x0,B_0x1" bitfld.long 0x24 1. "DBG_TIM8_STOP,TIM8 stop in debug" "B_0x0,B_0x1" bitfld.long 0x24 0. "DBG_TIM1_STOP,TIM1 stop in debug" "B_0x0,B_0x1" line.long 0x28 "DBGMCU_APB2FZ2,DBGMCU APB2 peripheral freeze register CPU2" bitfld.long 0x28 18. "DBG_TIM20_STOP,TIM20 stop in debug" "B_0x0,B_0x1" bitfld.long 0x28 13. "DBG_FDCAN_STOP,FDCAN stop in debug" "B_0x0,B_0x1" bitfld.long 0x28 7. "DBG_TIM17_STOP,TIM17 stop in debug" "B_0x0,B_0x1" bitfld.long 0x28 6. "DBG_TIM16_STOP,TIM16 stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x28 5. "DBG_TIM15_STOP,TIM15 stop in debug" "B_0x0,B_0x1" bitfld.long 0x28 1. "DBG_TIM8_STOP,TIM8 stop in debug" "B_0x0,B_0x1" bitfld.long 0x28 0. "DBG_TIM1_STOP,TIM1 stop in debug" "B_0x0,B_0x1" line.long 0x2C "DBGMCU_APB3FZ1,DBGMCU APB3 peripheral freeze register CPU1" bitfld.long 0x2C 5. "DBG_WWDG1_STOP,WWDG1 stop in debug" "B_0x0,B_0x1" bitfld.long 0x2C 2. "DBG_IWDG2_STOP,IWDG2 stop in debug" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DBG_IWDG1_STOP,IWDG1 stop in debug" "B_0x0,B_0x1" line.long 0x30 "DBGMCU_APB3FZ2,DBGMCU APB3 peripheral freeze register CPU2" bitfld.long 0x30 5. "DBG_WWDG1_STOP,WWDG1 stop in debug" "B_0x0,B_0x1" bitfld.long 0x30 4. "DBG_IWDG4_STOP,IWDG4 stop in debug" "B_0x0,B_0x1" bitfld.long 0x30 3. "DBG_IWDG3_STOP,IWDG3 stop in debug" "B_0x0,B_0x1" line.long 0x34 "DBGMCU_APBSRFZ1,DBGMCU APBSR peripheral freeze register CPU1" bitfld.long 0x34 10. "DBG_WWDG2_STOP,WWDG2 stop in debug" "B_0x0,B_0x1" bitfld.long 0x34 8. "DBG_I3C4_STOP,I3C4 stop in debug" "B_0x0,B_0x1" bitfld.long 0x34 7. "DBG_LPTIM5_STOP,LPTIM5 stop in debug" "B_0x0,B_0x1" bitfld.long 0x34 6. "DBG_LPTIM4_STOP,LPTIM4 stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x34 5. "DBG_LPTIM3_STOP,LPTIM3 stop in debug" "B_0x0,B_0x1" bitfld.long 0x34 4. "DBG_I2C8_STOP,I2C8 stop in debug" "B_0x0,B_0x1" bitfld.long 0x34 0. "DBG_RTC_STOP,RTC clock is suspended in debug" "B_0x0,B_0x1" line.long 0x38 "DBGMCU_APBSRFZ2,DBGMCU APBSR peripheral freeze register CPU2" bitfld.long 0x38 10. "DBG_WWDG2_STOP,WWDG2 stop in debug" "B_0x0,B_0x1" bitfld.long 0x38 8. "DBG_I3C4_STOP,I3C4 stop in debug" "B_0x0,B_0x1" bitfld.long 0x38 7. "DBG_LPTIM5_STOP,LPTIM5 stop in debug" "B_0x0,B_0x1" bitfld.long 0x38 6. "DBG_LPTIM4_STOP,LPTIM4 stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x38 5. "DBG_LPTIM3_STOP,LPTIM3 stop in debug" "B_0x0,B_0x1" bitfld.long 0x38 4. "DBG_I2C8_STOP,I2C8 stop in debug" "B_0x0,B_0x1" bitfld.long 0x38 0. "DBG_RTC_STOP,RTC clock is suspended in debug" "B_0x0,B_0x1" line.long 0x3C "DBGMCU_APBSRFZ3,DBGMCU APB5 peripheral freeze register CPU3" bitfld.long 0x3C 10. "DBG_WWDG2_STOP,WWDG2 stop in debug" "B_0x0,B_0x1" bitfld.long 0x3C 9. "DBG_IWDG5_STOP,IWDG5 stop in debug" "B_0x0,B_0x1" bitfld.long 0x3C 8. "DBG_I3C4_STOP,I3C4 stop in debug" "B_0x0,B_0x1" bitfld.long 0x3C 7. "DBG_LPTIM5_STOP,LPTIM5 stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x3C 6. "DBG_LPTIM4_STOP,LPTIM4 stop in debug" "B_0x0,B_0x1" bitfld.long 0x3C 5. "DBG_LPTIM3_STOP,LPTIM3 stop in debug" "B_0x0,B_0x1" bitfld.long 0x3C 4. "DBG_I2C8_STOP,I2C8 stop in debug" "B_0x0,B_0x1" bitfld.long 0x3C 0. "DBG_RTC_STOP,RTC clock is suspended in debug" "B_0x0,B_0x1" tree.end tree "DBGMCU_S" base ad:0x5A010000 rgroup.long 0x0++0x3 line.long 0x0 "DBGMCU_IDC,DBGMCU identity code register" hexmask.long.word 0x0 16.--31. 1. "MAJOR_REV_ID,Revision" hexmask.long.word 0x0 0.--11. 1. "DEV_ID,Device identifier" group.long 0x4++0x7 line.long 0x0 "DBGMCU_CR,DBGMCU configuration register" bitfld.long 0x0 4. "DBG_SWD_SEL_N,Cortex-M0+ debug interface selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "DBG_STANDBY,Debug enable in Standby mode" "B_0x0,B_0x1" bitfld.long 0x0 1. "DBG_STOP,Debug enable in Stop mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "DBG_SLEEP,Debug enable in Sleep mode" "B_0x0,B_0x1" line.long 0x4 "DBGMCU_CRA35,DBGMCU configuration register CPU1" bitfld.long 0x4 1. "DBG_STGEN_STOP,STGEN behavior when debug is enabled" "B_0x0,B_0x1" bitfld.long 0x4 0. "WDFZCTL,IWDG1 behavior when secure debug is enabled" "B_0x0,B_0x1" group.long 0x10++0x3F line.long 0x0 "DBGMCU_AHB2LFZ1,DBGMCU AHB2 - lowest part - peripheral freeze register CPU1" bitfld.long 0x0 31. "DBG_HPDMA2_CH15_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 30. "DBG_HPDMA2_CH14_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 29. "DBG_HPDMA2_CH13_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 28. "DBG_HPDMA2_CH12_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "DBG_HPDMA2_CH11_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 26. "DBG_HPDMA2_CH10_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 25. "DBG_HPDMA2_CH9_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 24. "DBG_HPDMA2_CH8_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x0 23. "DBG_HPDMA2_CH7_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 22. "DBG_HPDMA2_CH6_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 21. "DBG_HPDMA2_CH5_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 20. "DBG_HPDMA2_CH4_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "DBG_HPDMA2_CH3_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 18. "DBG_HPDMA2_CH2_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 17. "DBG_HPDMA2_CH1_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 16. "DBG_HPDMA2_CH0_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x0 15. "DBG_HPDMA1_CH15_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 14. "DBG_HPDMA1_CH14_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 13. "DBG_HPDMA1_CH13_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 12. "DBG_HPDMA1_CH12_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "DBG_HPDMA1_CH11_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 10. "DBG_HPDMA1_CH10_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 9. "DBG_HPDMA1_CH9_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 8. "DBG_HPDMA1_CH8_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "DBG_HPDMA1_CH7_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 6. "DBG_HPDMA1_CH6_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 5. "DBG_HPDMA1_CH5_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 4. "DBG_HPDMA1_CH4_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "DBG_HPDMA1_CH3_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 2. "DBG_HPDMA1_CH2_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 1. "DBG_HPDMA1_CH1_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x0 0. "DBG_HPDMA1_CH0_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" line.long 0x4 "DBGMCU_AHB2HFZ1,DBGMCU AHB2 - highest part- peripheral freeze register CPU1" bitfld.long 0x4 15. "DBG_HPDMA3_CH15_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 14. "DBG_HPDMA3_CH14_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 13. "DBG_HPDMA3_CH13_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 12. "DBG_HPDMA3_CH12_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "DBG_HPDMA3_CH11_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 10. "DBG_HPDMA3_CH10_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 9. "DBG_HPDMA3_CH9_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 8. "DBG_HPDMA3_CH8_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "DBG_HPDMA3_CH7_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 6. "DBG_HPDMA3_CH6_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 5. "DBG_HPDMA3_CH5_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 4. "DBG_HPDMA3_CH4_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DBG_HPDMA3_CH3_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 2. "DBG_HPDMA3_CH2_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 1. "DBG_HPDMA3_CH1_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x4 0. "DBG_HPDMA3_CH0_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" line.long 0x8 "DBGMCU_AHB2LFZ2,DBGMCU AHB2 - lowest part - peripheral freeze register CPU2" bitfld.long 0x8 31. "DBG_HPDMA2_CH15_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 30. "DBG_HPDMA2_CH14_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 29. "DBG_HPDMA2_CH13_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 28. "DBG_HPDMA2_CH12_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x8 27. "DBG_HPDMA2_CH11_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 26. "DBG_HPDMA2_CH10_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 25. "DBG_HPDMA2_CH9_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 24. "DBG_HPDMA2_CH8_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x8 23. "DBG_HPDMA2_CH7_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 22. "DBG_HPDMA2_CH6_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 21. "DBG_HPDMA2_CH5_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 20. "DBG_HPDMA2_CH4_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "DBG_HPDMA2_CH3_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 18. "DBG_HPDMA2_CH2_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 17. "DBG_HPDMA2_CH1_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 16. "DBG_HPDMA2_CH0_STOP,HPDMA2_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x8 15. "DBG_HPDMA1_CH15_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 14. "DBG_HPDMA1_CH14_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 13. "DBG_HPDMA1_CH13_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 12. "DBG_HPDMA1_CH12_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x8 11. "DBG_HPDMA1_CH11_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 10. "DBG_HPDMA1_CH10_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 9. "DBG_HPDMA1_CH9_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 8. "DBG_HPDMA1_CH8_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "DBG_HPDMA1_CH7_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 6. "DBG_HPDMA1_CH6_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 5. "DBG_HPDMA1_CH5_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 4. "DBG_HPDMA1_CH4_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "DBG_HPDMA1_CH3_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 2. "DBG_HPDMA1_CH2_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 1. "DBG_HPDMA1_CH1_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x8 0. "DBG_HPDMA1_CH0_STOP,HPDMA1_CHn suspend in debug" "B_0x0,B_0x1" line.long 0xC "DBGMCU_AHB2HFZ2,DBGMCU AHB2 - highest part- peripheral freeze register CPU2" bitfld.long 0xC 15. "DBG_HPDMA3_CH15_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 14. "DBG_HPDMA3_CH14_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 13. "DBG_HPDMA3_CH13_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 12. "DBG_HPDMA3_CH12_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0xC 11. "DBG_HPDMA3_CH11_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 10. "DBG_HPDMA3_CH10_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 9. "DBG_HPDMA3_CH9_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 8. "DBG_HPDMA3_CH8_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "DBG_HPDMA3_CH7_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 6. "DBG_HPDMA3_CH6_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 5. "DBG_HPDMA3_CH5_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 4. "DBG_HPDMA3_CH4_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "DBG_HPDMA3_CH3_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 2. "DBG_HPDMA3_CH2_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 1. "DBG_HPDMA3_CH1_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0xC 0. "DBG_HPDMA3_CH0_STOP,HPDMA3_CHn suspend in debug" "B_0x0,B_0x1" line.long 0x10 "DBGMCU_AHBSRFZ1,DBGMCU AHBSR peripheral freeze register CPU1" bitfld.long 0x10 3. "DBG_LPDMA1_CH3_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x10 2. "DBG_LPDMA1_CH2_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x10 1. "DBG_LPDMA1_CH1_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x10 0. "DBG_LPDMA1_CH0_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" line.long 0x14 "DBGMCU_AHBSRFZ2,DBGMCU AHBSR peripheral freeze register CPU2" bitfld.long 0x14 3. "DBG_LPDMA1_CH3_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x14 2. "DBG_LPDMA1_CH2_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x14 1. "DBG_LPDMA1_CH1_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x14 0. "DBG_LPDMA1_CH0_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" line.long 0x18 "DBGMCU_AHBSRFZ3,DBGMCU AHBSR peripheral freeze register CPU3" bitfld.long 0x18 3. "DBG_LPDMA1_CH3_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x18 2. "DBG_LPDMA1_CH2_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x18 1. "DBG_LPDMA1_CH1_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" bitfld.long 0x18 0. "DBG_LPDMA1_CH0_STOP,LPDMA1_CHn suspend in debug" "B_0x0,B_0x1" line.long 0x1C "DBGMCU_APB1FZ1,DBGMCU APB1 peripheral freeze register CPU1" bitfld.long 0x1C 29. "DBG_TIM11_STOP,TIM11 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 28. "DBG_TIM10_STOP,TIM10 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 27. "DBG_I3C3_STOP,I3C3 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 26. "DBG_I3C2_STOP,I3C2 SMBUS timeout stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x1C 25. "DBG_I3C1_STOP,I3C1 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 24. "DBG_I2C7_STOP,I2C7 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 23. "DBG_I2C6_STOP,I2C6 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 22. "DBG_I2C5_STOP,I2C5 SMBUS timeout stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x1C 21. "DBG_I2C4_STOP,I2C4 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 20. "DBG_I2C3_STOP,I2C3 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 19. "DBG_I2C2_STOP,I2C2 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 18. "DBG_I2C1_STOP,I2C1 SMBUS timeout stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x1C 10. "DBG_LPTIM2_STOP,LPTIM2 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 9. "DBG_LPTIM1_STOP,LPTIM1 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 8. "DBG_TIM14_STOP,TIM14 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 7. "DBG_TIM13_STOP,TIM13 stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x1C 6. "DBG_TIM12_STOP,TIM12 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 5. "DBG_TIM7_STOP,TIM7 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 4. "DBG_TIM6_STOP,TIM6 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 3. "DBG_TIM5_STOP,TIM5 stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x1C 2. "DBG_TIM4_STOP,TIM4 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 1. "DBG_TIM3_STOP,TIM3 stop in debug" "B_0x0,B_0x1" bitfld.long 0x1C 0. "DBG_TIM2_STOP,TIM2 stop in debug" "B_0x0,B_0x1" line.long 0x20 "DBGMCU_APB1FZ2,DBGMCU APB1 peripheral freeze register CPU2" bitfld.long 0x20 29. "DBG_TIM11_STOP,TIM11 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 28. "DBG_TIM10_STOP,TIM10 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 27. "DBG_I3C3_STOP,I3C3 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 26. "DBG_I3C2_STOP,I3C2 SMBUS timeout stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x20 25. "DBG_I3C1_STOP,I3C1 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 24. "DBG_I2C7_STOP,I2C7 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 23. "DBG_I2C6_STOP,I2C6 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 22. "DBG_I2C5_STOP,I2C5 SMBUS timeout stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x20 21. "DBG_I2C4_STOP,I2C4 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 20. "DBG_I2C3_STOP,I2C3 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 19. "DBG_I2C2_STOP,I2C2 SMBUS timeout stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 18. "DBG_I2C1_STOP,I2C1 SMBUS timeout stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x20 10. "DBG_LPTIM2_STOP,LPTIM2 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 9. "DBG_LPTIM1_STOP,LPTIM1 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 8. "DBG_TIM14_STOP,TIM14 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 7. "DBG_TIM13_STOP,TIM13 stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x20 6. "DBG_TIM12_STOP,TIM12 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 5. "DBG_TIM7_STOP,TIM7 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 4. "DBG_TIM6_STOP,TIM6 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 3. "DBG_TIM5_STOP,TIM5 stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x20 2. "DBG_TIM4_STOP,TIM4 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 1. "DBG_TIM3_STOP,TIM3 stop in debug" "B_0x0,B_0x1" bitfld.long 0x20 0. "DBG_TIM2_STOP,TIM2 stop in debug" "B_0x0,B_0x1" line.long 0x24 "DBGMCU_APB2FZ1,DBGMCU APB2 peripheral freeze register CPU1" bitfld.long 0x24 18. "DBG_TIM20_STOP,TIM20 stop in debug" "B_0x0,B_0x1" bitfld.long 0x24 13. "DBG_FDCAN_STOP,FDCAN stop in debug" "B_0x0,B_0x1" bitfld.long 0x24 7. "DBG_TIM17_STOP,TIM17 stop in debug" "B_0x0,B_0x1" bitfld.long 0x24 6. "DBG_TIM16_STOP,TIM16 stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x24 5. "DBG_TIM15_STOP,TIM15 stop in debug" "B_0x0,B_0x1" bitfld.long 0x24 1. "DBG_TIM8_STOP,TIM8 stop in debug" "B_0x0,B_0x1" bitfld.long 0x24 0. "DBG_TIM1_STOP,TIM1 stop in debug" "B_0x0,B_0x1" line.long 0x28 "DBGMCU_APB2FZ2,DBGMCU APB2 peripheral freeze register CPU2" bitfld.long 0x28 18. "DBG_TIM20_STOP,TIM20 stop in debug" "B_0x0,B_0x1" bitfld.long 0x28 13. "DBG_FDCAN_STOP,FDCAN stop in debug" "B_0x0,B_0x1" bitfld.long 0x28 7. "DBG_TIM17_STOP,TIM17 stop in debug" "B_0x0,B_0x1" bitfld.long 0x28 6. "DBG_TIM16_STOP,TIM16 stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x28 5. "DBG_TIM15_STOP,TIM15 stop in debug" "B_0x0,B_0x1" bitfld.long 0x28 1. "DBG_TIM8_STOP,TIM8 stop in debug" "B_0x0,B_0x1" bitfld.long 0x28 0. "DBG_TIM1_STOP,TIM1 stop in debug" "B_0x0,B_0x1" line.long 0x2C "DBGMCU_APB3FZ1,DBGMCU APB3 peripheral freeze register CPU1" bitfld.long 0x2C 5. "DBG_WWDG1_STOP,WWDG1 stop in debug" "B_0x0,B_0x1" bitfld.long 0x2C 2. "DBG_IWDG2_STOP,IWDG2 stop in debug" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DBG_IWDG1_STOP,IWDG1 stop in debug" "B_0x0,B_0x1" line.long 0x30 "DBGMCU_APB3FZ2,DBGMCU APB3 peripheral freeze register CPU2" bitfld.long 0x30 5. "DBG_WWDG1_STOP,WWDG1 stop in debug" "B_0x0,B_0x1" bitfld.long 0x30 4. "DBG_IWDG4_STOP,IWDG4 stop in debug" "B_0x0,B_0x1" bitfld.long 0x30 3. "DBG_IWDG3_STOP,IWDG3 stop in debug" "B_0x0,B_0x1" line.long 0x34 "DBGMCU_APBSRFZ1,DBGMCU APBSR peripheral freeze register CPU1" bitfld.long 0x34 10. "DBG_WWDG2_STOP,WWDG2 stop in debug" "B_0x0,B_0x1" bitfld.long 0x34 8. "DBG_I3C4_STOP,I3C4 stop in debug" "B_0x0,B_0x1" bitfld.long 0x34 7. "DBG_LPTIM5_STOP,LPTIM5 stop in debug" "B_0x0,B_0x1" bitfld.long 0x34 6. "DBG_LPTIM4_STOP,LPTIM4 stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x34 5. "DBG_LPTIM3_STOP,LPTIM3 stop in debug" "B_0x0,B_0x1" bitfld.long 0x34 4. "DBG_I2C8_STOP,I2C8 stop in debug" "B_0x0,B_0x1" bitfld.long 0x34 0. "DBG_RTC_STOP,RTC clock is suspended in debug" "B_0x0,B_0x1" line.long 0x38 "DBGMCU_APBSRFZ2,DBGMCU APBSR peripheral freeze register CPU2" bitfld.long 0x38 10. "DBG_WWDG2_STOP,WWDG2 stop in debug" "B_0x0,B_0x1" bitfld.long 0x38 8. "DBG_I3C4_STOP,I3C4 stop in debug" "B_0x0,B_0x1" bitfld.long 0x38 7. "DBG_LPTIM5_STOP,LPTIM5 stop in debug" "B_0x0,B_0x1" bitfld.long 0x38 6. "DBG_LPTIM4_STOP,LPTIM4 stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x38 5. "DBG_LPTIM3_STOP,LPTIM3 stop in debug" "B_0x0,B_0x1" bitfld.long 0x38 4. "DBG_I2C8_STOP,I2C8 stop in debug" "B_0x0,B_0x1" bitfld.long 0x38 0. "DBG_RTC_STOP,RTC clock is suspended in debug" "B_0x0,B_0x1" line.long 0x3C "DBGMCU_APBSRFZ3,DBGMCU APB5 peripheral freeze register CPU3" bitfld.long 0x3C 10. "DBG_WWDG2_STOP,WWDG2 stop in debug" "B_0x0,B_0x1" bitfld.long 0x3C 9. "DBG_IWDG5_STOP,IWDG5 stop in debug" "B_0x0,B_0x1" bitfld.long 0x3C 8. "DBG_I3C4_STOP,I3C4 stop in debug" "B_0x0,B_0x1" bitfld.long 0x3C 7. "DBG_LPTIM5_STOP,LPTIM5 stop in debug" "B_0x0,B_0x1" newline bitfld.long 0x3C 6. "DBG_LPTIM4_STOP,LPTIM4 stop in debug" "B_0x0,B_0x1" bitfld.long 0x3C 5. "DBG_LPTIM3_STOP,LPTIM3 stop in debug" "B_0x0,B_0x1" bitfld.long 0x3C 4. "DBG_I2C8_STOP,I2C8 stop in debug" "B_0x0,B_0x1" bitfld.long 0x3C 0. "DBG_RTC_STOP,RTC clock is suspended in debug" "B_0x0,B_0x1" tree.end tree.end tree "DCACHE (Data Cache)" base ad:0x0 tree "DCACHE" base ad:0x40480000 group.long 0x0++0x3 line.long 0x0 "DCACHE_CR,DCACHE control register" bitfld.long 0x0 31. "HBURST,output burst type for cache master port read accesses" "B_0x0,B_0x1" bitfld.long 0x0 23. "WMISSMRST,write-miss monitor reset" "B_0x0,B_0x1" bitfld.long 0x0 22. "WHITMRST,write-hit monitor reset" "B_0x0,B_0x1" bitfld.long 0x0 21. "WMISSMEN,write-miss monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "WHITMEN,write-hit monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 19. "RMISSMRST,read-miss monitor reset" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "RHITMRST,read-hit monitor reset" "B_0x0,B_0x1" bitfld.long 0x0 17. "RMISSMEN,read-miss monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "RHITMEN,read-hit monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "STARTCMD,starts maintenance command (maintenance operation defined in CACHECMD)." "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "CACHECMD,cache command maintenance operation (cleans and/or invalidates anaddress range)" "B_0x0,B_0x1,B_0x2,B_0x3,?,?,?,?" bitfld.long 0x0 1. "CACHEINV,full cache invalidation" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,enable" "B_0x0,B_0x1" rgroup.long 0x4++0x3 line.long 0x0 "DCACHE_SR,DCACHE status register" bitfld.long 0x0 4. "CMDENDF,command end flag" "B_0x0,B_0x1" bitfld.long 0x0 3. "BUSYCMDF,command busy flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "ERRF,cache error flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "BSYENDF,full invalidate busy end flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "BUSYF,full invalidate busy flag" "B_0x0,B_0x1" group.long 0x8++0x3 line.long 0x0 "DCACHE_IER,DCACHE interrupt enable register" bitfld.long 0x0 4. "CMDENDIE,interrupt enable on command end" "B_0x0,B_0x1" bitfld.long 0x0 2. "ERRIE,interrupt enable on cache error" "B_0x0,B_0x1" bitfld.long 0x0 1. "BSYENDIE,interrupt enable on busy end" "B_0x0,B_0x1" wgroup.long 0xC++0x3 line.long 0x0 "DCACHE_FCR,DCACHE flag clear register" bitfld.long 0x0 4. "CCMDENDF,clear command end flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "CERRF,clear cache error flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "CBSYENDF,clear full invalidate busy end flag" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "DCACHE_RHMONR,DCACHE read-hit monitor register" hexmask.long 0x0 0.--31. 1. "RHITMON,cache read-hit monitor counter" line.long 0x4 "DCACHE_RMMONR,DCACHE read-miss monitor register" hexmask.long.word 0x4 0.--15. 1. "RMISSMON,cache read-miss monitor counter" rgroup.long 0x20++0x7 line.long 0x0 "DCACHE_WHMONR,DCACHE write-hit monitor register" hexmask.long 0x0 0.--31. 1. "WHITMON,cache write-hit monitor counter" line.long 0x4 "DCACHE_WMMONR,DCACHE write-miss monitor register" hexmask.long.word 0x4 0.--15. 1. "WMISSMON,cache write-miss monitor counter" group.long 0x28++0x7 line.long 0x0 "DCACHE_CMDRSADDRR,DCACHE command range start address register" hexmask.long 0x0 5.--31. 1. "CMDSTARTADDR,start address of range to which the cache maintenance command specified in DCACHE_CR." line.long 0x4 "DCACHE_CMDREADDRR,DCACHE command range end address register" hexmask.long 0x4 5.--31. 1. "CMDENDADDR,end address of range to which the cache maintenance command specified in DCACHE_CR." rgroup.long 0x3F0++0xF line.long 0x0 "DCACHE_HWCFGR,DCACHE hardware configuration register" bitfld.long 0x0 31. "ECC,error detection and correction support" "B_0x0,B_0x1" bitfld.long 0x0 23.--24. "MASTERSIZE,data size of AHB master interface" "?,B_0x1,B_0x2,?" bitfld.long 0x0 9.--10. "LWIDTH,cache line width" "?,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--6. "SIZE,cache size" "?,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 0.--1. "WAYS,cache associativity number of ways" "?,B_0x1,B_0x2,?" line.long 0x4 "DCACHE_VERR,DCACHE version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,DCACHE major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,DCACHE minor revision" line.long 0x8 "DCACHE_IPIDR,DCACHE identification register" hexmask.long 0x8 0.--31. 1. "ID,DCACHE identification" line.long 0xC "DCACHE_SIDR,DCACHE size identification register" hexmask.long 0xC 0.--31. 1. "SID,DCACHE address space size identification" tree.end tree "DCACHE_S" base ad:0x50480000 group.long 0x0++0x3 line.long 0x0 "DCACHE_CR,DCACHE control register" bitfld.long 0x0 31. "HBURST,output burst type for cache master port read accesses" "B_0x0,B_0x1" bitfld.long 0x0 23. "WMISSMRST,write-miss monitor reset" "B_0x0,B_0x1" bitfld.long 0x0 22. "WHITMRST,write-hit monitor reset" "B_0x0,B_0x1" bitfld.long 0x0 21. "WMISSMEN,write-miss monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "WHITMEN,write-hit monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 19. "RMISSMRST,read-miss monitor reset" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "RHITMRST,read-hit monitor reset" "B_0x0,B_0x1" bitfld.long 0x0 17. "RMISSMEN,read-miss monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "RHITMEN,read-hit monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "STARTCMD,starts maintenance command (maintenance operation defined in CACHECMD)." "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "CACHECMD,cache command maintenance operation (cleans and/or invalidates anaddress range)" "B_0x0,B_0x1,B_0x2,B_0x3,?,?,?,?" bitfld.long 0x0 1. "CACHEINV,full cache invalidation" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,enable" "B_0x0,B_0x1" rgroup.long 0x4++0x3 line.long 0x0 "DCACHE_SR,DCACHE status register" bitfld.long 0x0 4. "CMDENDF,command end flag" "B_0x0,B_0x1" bitfld.long 0x0 3. "BUSYCMDF,command busy flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "ERRF,cache error flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "BSYENDF,full invalidate busy end flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "BUSYF,full invalidate busy flag" "B_0x0,B_0x1" group.long 0x8++0x3 line.long 0x0 "DCACHE_IER,DCACHE interrupt enable register" bitfld.long 0x0 4. "CMDENDIE,interrupt enable on command end" "B_0x0,B_0x1" bitfld.long 0x0 2. "ERRIE,interrupt enable on cache error" "B_0x0,B_0x1" bitfld.long 0x0 1. "BSYENDIE,interrupt enable on busy end" "B_0x0,B_0x1" wgroup.long 0xC++0x3 line.long 0x0 "DCACHE_FCR,DCACHE flag clear register" bitfld.long 0x0 4. "CCMDENDF,clear command end flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "CERRF,clear cache error flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "CBSYENDF,clear full invalidate busy end flag" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "DCACHE_RHMONR,DCACHE read-hit monitor register" hexmask.long 0x0 0.--31. 1. "RHITMON,cache read-hit monitor counter" line.long 0x4 "DCACHE_RMMONR,DCACHE read-miss monitor register" hexmask.long.word 0x4 0.--15. 1. "RMISSMON,cache read-miss monitor counter" rgroup.long 0x20++0x7 line.long 0x0 "DCACHE_WHMONR,DCACHE write-hit monitor register" hexmask.long 0x0 0.--31. 1. "WHITMON,cache write-hit monitor counter" line.long 0x4 "DCACHE_WMMONR,DCACHE write-miss monitor register" hexmask.long.word 0x4 0.--15. 1. "WMISSMON,cache write-miss monitor counter" group.long 0x28++0x7 line.long 0x0 "DCACHE_CMDRSADDRR,DCACHE command range start address register" hexmask.long 0x0 5.--31. 1. "CMDSTARTADDR,start address of range to which the cache maintenance command specified in DCACHE_CR." line.long 0x4 "DCACHE_CMDREADDRR,DCACHE command range end address register" hexmask.long 0x4 5.--31. 1. "CMDENDADDR,end address of range to which the cache maintenance command specified in DCACHE_CR." rgroup.long 0x3F0++0xF line.long 0x0 "DCACHE_HWCFGR,DCACHE hardware configuration register" bitfld.long 0x0 31. "ECC,error detection and correction support" "B_0x0,B_0x1" bitfld.long 0x0 23.--24. "MASTERSIZE,data size of AHB master interface" "?,B_0x1,B_0x2,?" bitfld.long 0x0 9.--10. "LWIDTH,cache line width" "?,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--6. "SIZE,cache size" "?,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 0.--1. "WAYS,cache associativity number of ways" "?,B_0x1,B_0x2,?" line.long 0x4 "DCACHE_VERR,DCACHE version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,DCACHE major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,DCACHE minor revision" line.long 0x8 "DCACHE_IPIDR,DCACHE identification register" hexmask.long 0x8 0.--31. 1. "ID,DCACHE identification" line.long 0xC "DCACHE_SIDR,DCACHE size identification register" hexmask.long 0xC 0.--31. 1. "SID,DCACHE address space size identification" tree.end tree.end tree "DCMI (Digital Camera Interface)" base ad:0x0 tree "DCMI" base ad:0x404A0000 group.long 0x0++0x3 line.long 0x0 "DCMI_CR,DCMI control register" bitfld.long 0x0 20. "OELS,Odd/Even Line Select (Line Select Start)" "B_0x0,B_0x1" bitfld.long 0x0 19. "LSM,Line Select mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "OEBS,Odd/Even Byte Select (Byte Select Start)" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "BSM,Byte Select mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14. "ENABLE,DCMI enable" "B_0x0,B_0x1" bitfld.long 0x0 10.--11. "EDM,Extended data mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "FCRC,Frame capture rate control" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 7. "VSPOL,Vertical synchronization polarity" "B_0x0,B_0x1" bitfld.long 0x0 6. "HSPOL,Horizontal synchronization polarity" "B_0x0,B_0x1" bitfld.long 0x0 5. "PCKPOL,Pixel clock polarity" "B_0x0,B_0x1" bitfld.long 0x0 4. "ESS,Embedded synchronization select" "B_0x0,B_0x1" bitfld.long 0x0 3. "JPEG,JPEG format" "B_0x0,B_0x1" bitfld.long 0x0 2. "CROP,Crop feature" "B_0x0,B_0x1" bitfld.long 0x0 1. "CM,Capture mode" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "CAPTURE,Capture enable" "B_0x0,B_0x1" rgroup.long 0x4++0x7 line.long 0x0 "DCMI_SR,DCMI status register" bitfld.long 0x0 2. "FNE,FIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 1. "VSYNC,Vertical synchronization" "B_0x0,B_0x1" bitfld.long 0x0 0. "HSYNC,Horizontal synchronization" "B_0x0,B_0x1" line.long 0x4 "DCMI_RIS,DCMI raw interrupt status register" bitfld.long 0x4 4. "LINE_RIS,Line raw interrupt status" "0,1" bitfld.long 0x4 3. "VSYNC_RIS,DCMI_VSYNC raw interrupt status" "0,1" bitfld.long 0x4 2. "ERR_RIS,Synchronization error raw interrupt status" "B_0x0,B_0x1" bitfld.long 0x4 1. "OVR_RIS,Overrun raw interrupt status" "B_0x0,B_0x1" bitfld.long 0x4 0. "FRAME_RIS,Capture complete raw interrupt status" "B_0x0,B_0x1" group.long 0xC++0x3 line.long 0x0 "DCMI_IER,DCMI interrupt enable register" bitfld.long 0x0 4. "LINE_IE,Line interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "VSYNC_IE,DCMI_VSYNC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "ERR_IE,Synchronization error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "OVR_IE,Overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "FRAME_IE,Capture complete interrupt enable" "B_0x0,B_0x1" rgroup.long 0x10++0x3 line.long 0x0 "DCMI_MIS,DCMI masked interrupt status register" bitfld.long 0x0 4. "LINE_MIS,Line masked interrupt status" "B_0x0,B_0x1" bitfld.long 0x0 3. "VSYNC_MIS,VSYNC masked interrupt status" "B_0x0,B_0x1" bitfld.long 0x0 2. "ERR_MIS,Synchronization error masked interrupt status" "B_0x0,B_0x1" bitfld.long 0x0 1. "OVR_MIS,Overrun masked interrupt status" "B_0x0,B_0x1" bitfld.long 0x0 0. "FRAME_MIS,Capture complete masked interrupt status" "B_0x0,B_0x1" wgroup.long 0x14++0x3 line.long 0x0 "DCMI_ICR,DCMI interrupt clear register" bitfld.long 0x0 4. "LINE_ISC,line interrupt status clear" "0,1" bitfld.long 0x0 3. "VSYNC_ISC,Vertical Synchronization interrupt status clear" "0,1" bitfld.long 0x0 2. "ERR_ISC,Synchronization error interrupt status clear" "0,1" bitfld.long 0x0 1. "OVR_ISC,Overrun interrupt status clear" "0,1" bitfld.long 0x0 0. "FRAME_ISC,Capture complete interrupt status clear" "0,1" group.long 0x18++0xF line.long 0x0 "DCMI_ESCR,DCMI embedded synchronization code register" hexmask.long.byte 0x0 24.--31. 1. "FEC,Frame end delimiter code" hexmask.long.byte 0x0 16.--23. 1. "LEC,Line end delimiter code" hexmask.long.byte 0x0 8.--15. 1. "LSC,Line start delimiter code" hexmask.long.byte 0x0 0.--7. 1. "FSC,Frame start delimiter code" line.long 0x4 "DCMI_ESUR,DCMI embedded synchronization unmask register" hexmask.long.byte 0x4 24.--31. 1. "FEU,Frame end delimiter unmask" hexmask.long.byte 0x4 16.--23. 1. "LEU,Line end delimiter unmask" hexmask.long.byte 0x4 8.--15. 1. "LSU,Line start delimiter unmask" hexmask.long.byte 0x4 0.--7. 1. "FSU,Frame start delimiter unmask" line.long 0x8 "DCMI_CWSTRT,DCMI crop window start" hexmask.long.word 0x8 16.--28. 1. "VST,Vertical start line count" hexmask.long.word 0x8 0.--13. 1. "HOFFCNT,Horizontal offset count" line.long 0xC "DCMI_CWSIZE,DCMI crop window size" hexmask.long.word 0xC 16.--29. 1. "VLINE,Vertical line count" hexmask.long.word 0xC 0.--13. 1. "CAPCNT,Capture count" rgroup.long 0x28++0x3 line.long 0x0 "DCMI_DR,DCMI data register" hexmask.long.byte 0x0 24.--31. 1. "BYTE3,Data byte 3" hexmask.long.byte 0x0 16.--23. 1. "BYTE2,Data byte 2" hexmask.long.byte 0x0 8.--15. 1. "BYTE1,Data byte 1" hexmask.long.byte 0x0 0.--7. 1. "BYTE0,Data byte 0" rgroup.long 0x3F0++0xF line.long 0x0 "DCMI_HWCFGR,DCMI hardware configuration register" hexmask.long.byte 0x0 0.--3. 1. "FIFO_8,FIFO size" line.long 0x4 "DCMI_VERR,DCMI version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IP version major revision information" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IP version minor revision information" line.long 0x8 "DCMI_IPIDR,DCMI identification register" hexmask.long 0x8 0.--31. 1. "IP_ID,0x0016 0011" line.long 0xC "DCMI_SIDR,DCMI size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code" tree.end tree "DCMI_S" base ad:0x504A0000 group.long 0x0++0x3 line.long 0x0 "DCMI_CR,DCMI control register" bitfld.long 0x0 20. "OELS,Odd/Even Line Select (Line Select Start)" "B_0x0,B_0x1" bitfld.long 0x0 19. "LSM,Line Select mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "OEBS,Odd/Even Byte Select (Byte Select Start)" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "BSM,Byte Select mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14. "ENABLE,DCMI enable" "B_0x0,B_0x1" bitfld.long 0x0 10.--11. "EDM,Extended data mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "FCRC,Frame capture rate control" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 7. "VSPOL,Vertical synchronization polarity" "B_0x0,B_0x1" bitfld.long 0x0 6. "HSPOL,Horizontal synchronization polarity" "B_0x0,B_0x1" bitfld.long 0x0 5. "PCKPOL,Pixel clock polarity" "B_0x0,B_0x1" bitfld.long 0x0 4. "ESS,Embedded synchronization select" "B_0x0,B_0x1" bitfld.long 0x0 3. "JPEG,JPEG format" "B_0x0,B_0x1" bitfld.long 0x0 2. "CROP,Crop feature" "B_0x0,B_0x1" bitfld.long 0x0 1. "CM,Capture mode" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "CAPTURE,Capture enable" "B_0x0,B_0x1" rgroup.long 0x4++0x7 line.long 0x0 "DCMI_SR,DCMI status register" bitfld.long 0x0 2. "FNE,FIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 1. "VSYNC,Vertical synchronization" "B_0x0,B_0x1" bitfld.long 0x0 0. "HSYNC,Horizontal synchronization" "B_0x0,B_0x1" line.long 0x4 "DCMI_RIS,DCMI raw interrupt status register" bitfld.long 0x4 4. "LINE_RIS,Line raw interrupt status" "0,1" bitfld.long 0x4 3. "VSYNC_RIS,DCMI_VSYNC raw interrupt status" "0,1" bitfld.long 0x4 2. "ERR_RIS,Synchronization error raw interrupt status" "B_0x0,B_0x1" bitfld.long 0x4 1. "OVR_RIS,Overrun raw interrupt status" "B_0x0,B_0x1" bitfld.long 0x4 0. "FRAME_RIS,Capture complete raw interrupt status" "B_0x0,B_0x1" group.long 0xC++0x3 line.long 0x0 "DCMI_IER,DCMI interrupt enable register" bitfld.long 0x0 4. "LINE_IE,Line interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "VSYNC_IE,DCMI_VSYNC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "ERR_IE,Synchronization error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "OVR_IE,Overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "FRAME_IE,Capture complete interrupt enable" "B_0x0,B_0x1" rgroup.long 0x10++0x3 line.long 0x0 "DCMI_MIS,DCMI masked interrupt status register" bitfld.long 0x0 4. "LINE_MIS,Line masked interrupt status" "B_0x0,B_0x1" bitfld.long 0x0 3. "VSYNC_MIS,VSYNC masked interrupt status" "B_0x0,B_0x1" bitfld.long 0x0 2. "ERR_MIS,Synchronization error masked interrupt status" "B_0x0,B_0x1" bitfld.long 0x0 1. "OVR_MIS,Overrun masked interrupt status" "B_0x0,B_0x1" bitfld.long 0x0 0. "FRAME_MIS,Capture complete masked interrupt status" "B_0x0,B_0x1" wgroup.long 0x14++0x3 line.long 0x0 "DCMI_ICR,DCMI interrupt clear register" bitfld.long 0x0 4. "LINE_ISC,line interrupt status clear" "0,1" bitfld.long 0x0 3. "VSYNC_ISC,Vertical Synchronization interrupt status clear" "0,1" bitfld.long 0x0 2. "ERR_ISC,Synchronization error interrupt status clear" "0,1" bitfld.long 0x0 1. "OVR_ISC,Overrun interrupt status clear" "0,1" bitfld.long 0x0 0. "FRAME_ISC,Capture complete interrupt status clear" "0,1" group.long 0x18++0xF line.long 0x0 "DCMI_ESCR,DCMI embedded synchronization code register" hexmask.long.byte 0x0 24.--31. 1. "FEC,Frame end delimiter code" hexmask.long.byte 0x0 16.--23. 1. "LEC,Line end delimiter code" hexmask.long.byte 0x0 8.--15. 1. "LSC,Line start delimiter code" hexmask.long.byte 0x0 0.--7. 1. "FSC,Frame start delimiter code" line.long 0x4 "DCMI_ESUR,DCMI embedded synchronization unmask register" hexmask.long.byte 0x4 24.--31. 1. "FEU,Frame end delimiter unmask" hexmask.long.byte 0x4 16.--23. 1. "LEU,Line end delimiter unmask" hexmask.long.byte 0x4 8.--15. 1. "LSU,Line start delimiter unmask" hexmask.long.byte 0x4 0.--7. 1. "FSU,Frame start delimiter unmask" line.long 0x8 "DCMI_CWSTRT,DCMI crop window start" hexmask.long.word 0x8 16.--28. 1. "VST,Vertical start line count" hexmask.long.word 0x8 0.--13. 1. "HOFFCNT,Horizontal offset count" line.long 0xC "DCMI_CWSIZE,DCMI crop window size" hexmask.long.word 0xC 16.--29. 1. "VLINE,Vertical line count" hexmask.long.word 0xC 0.--13. 1. "CAPCNT,Capture count" rgroup.long 0x28++0x3 line.long 0x0 "DCMI_DR,DCMI data register" hexmask.long.byte 0x0 24.--31. 1. "BYTE3,Data byte 3" hexmask.long.byte 0x0 16.--23. 1. "BYTE2,Data byte 2" hexmask.long.byte 0x0 8.--15. 1. "BYTE1,Data byte 1" hexmask.long.byte 0x0 0.--7. 1. "BYTE0,Data byte 0" rgroup.long 0x3F0++0xF line.long 0x0 "DCMI_HWCFGR,DCMI hardware configuration register" hexmask.long.byte 0x0 0.--3. 1. "FIFO_8,FIFO size" line.long 0x4 "DCMI_VERR,DCMI version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IP version major revision information" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IP version minor revision information" line.long 0x8 "DCMI_IPIDR,DCMI identification register" hexmask.long 0x8 0.--31. 1. "IP_ID,0x0016 0011" line.long 0xC "DCMI_SIDR,DCMI size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code" tree.end tree.end tree "DCMIPP (Digital Camera Interface Pixel Pipeline)" base ad:0x0 tree "DCMIPP" base ad:0x48030000 group.long 0x0++0x7 line.long 0x0 "DCMIPP_IPGR1,DCMIPP IP-Plug global register 1" bitfld.long 0x0 24. "QOS_MODE,Quality of service" "0,1" bitfld.long 0x0 0.--2. "MEMORYPAGE,Memory page size as power of 2 of 64-byte units:" "?,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x4 "DCMIPP_IPGR2,DCMIPP IP-Plug global register 2" bitfld.long 0x4 0. "PSTART,Request to lock the IP-Plug to allow reconfiguration." "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "DCMIPP_IPGR3,DCMIPP IP-Plug global register 3" bitfld.long 0x0 0. "IDLE,Status of IP-Plug" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "DCMIPP_IPGR8,DCMIPP IP-Plug identification register" hexmask.long.byte 0x0 24.--31. 1. "IPPID,IP identifier (0xAA)" hexmask.long.byte 0x0 16.--20. 1. "ARCHIID,Architecture identifier (0x04)" hexmask.long.byte 0x0 8.--12. 1. "REVID,Revision identifier (0x03)" hexmask.long.byte 0x0 0.--5. 1. "DID,Division identifier (0x14)" group.long 0x20++0xB line.long 0x0 "DCMIPP_IPC1R1,DCMIPP IP-Plug Clientx register 1" hexmask.long.byte 0x0 8.--11. 1. "OTR,Maximum outstanding transactions" bitfld.long 0x0 0.--2. "TRAFFIC,Burst size as power of 2 of 8-byte units" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x4 "DCMIPP_IPC1R2,DCMIPP IP-Plug Clientx register 2" hexmask.long.byte 0x4 16.--19. 1. "WLRU,Ratio for WLRU[3:0] arbitration" line.long 0x8 "DCMIPP_IPC1R3,DCMIPP IP-Plug Clientx register 3" hexmask.long.word 0x8 16.--26. 1. "DPREGEND,End word (AXI width = 64 bits) of the FIFO of Clientx." hexmask.long.word 0x8 0.--10. 1. "DPREGSTART,Start word (AXI width = 64 bits) of the FIFO of Clientx." group.long 0x30++0xB line.long 0x0 "DCMIPP_IPC2R1,DCMIPP IP-Plug Clientx register 1" hexmask.long.byte 0x0 8.--11. 1. "OTR,Maximum outstanding transactions" bitfld.long 0x0 0.--2. "TRAFFIC,Burst size as power of 2 of 8-byte units" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x4 "DCMIPP_IPC2R2,DCMIPP IP-Plug Clientx register 2" hexmask.long.byte 0x4 16.--19. 1. "WLRU,Ratio for WLRU[3:0] arbitration" line.long 0x8 "DCMIPP_IPC2R3,DCMIPP IP-Plug Clientx register 3" hexmask.long.word 0x8 16.--26. 1. "DPREGEND,End word (AXI width = 64 bits) of the FIFO of Clientx." hexmask.long.word 0x8 0.--10. 1. "DPREGSTART,Start word (AXI width = 64 bits) of the FIFO of Clientx." group.long 0x40++0xB line.long 0x0 "DCMIPP_IPC3R1,DCMIPP IP-Plug Clientx register 1" hexmask.long.byte 0x0 8.--11. 1. "OTR,Maximum outstanding transactions" bitfld.long 0x0 0.--2. "TRAFFIC,Burst size as power of 2 of 8-byte units" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x4 "DCMIPP_IPC3R2,DCMIPP IP-Plug Clientx register 2" hexmask.long.byte 0x4 16.--19. 1. "WLRU,Ratio for WLRU[3:0] arbitration" line.long 0x8 "DCMIPP_IPC3R3,DCMIPP IP-Plug Clientx register 3" hexmask.long.word 0x8 16.--26. 1. "DPREGEND,End word (AXI width = 64 bits) of the FIFO of Clientx." hexmask.long.word 0x8 0.--10. 1. "DPREGSTART,Start word (AXI width = 64 bits) of the FIFO of Clientx." group.long 0x50++0xB line.long 0x0 "DCMIPP_IPC4R1,DCMIPP IP-Plug Clientx register 1" hexmask.long.byte 0x0 8.--11. 1. "OTR,Maximum outstanding transactions" bitfld.long 0x0 0.--2. "TRAFFIC,Burst size as power of 2 of 8-byte units" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x4 "DCMIPP_IPC4R2,DCMIPP IP-Plug Clientx register 2" hexmask.long.byte 0x4 16.--19. 1. "WLRU,Ratio for WLRU[3:0] arbitration" line.long 0x8 "DCMIPP_IPC4R3,DCMIPP IP-Plug Clientx register 3" hexmask.long.word 0x8 16.--26. 1. "DPREGEND,End word (AXI width = 64 bits) of the FIFO of Clientx." hexmask.long.word 0x8 0.--10. 1. "DPREGSTART,Start word (AXI width = 64 bits) of the FIFO of Clientx." group.long 0x60++0xB line.long 0x0 "DCMIPP_IPC5R1,DCMIPP IP-Plug Clientx register 1" hexmask.long.byte 0x0 8.--11. 1. "OTR,Maximum outstanding transactions" bitfld.long 0x0 0.--2. "TRAFFIC,Burst size as power of 2 of 8-byte units" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x4 "DCMIPP_IPC5R2,DCMIPP IP-Plug Clientx register 2" hexmask.long.byte 0x4 16.--19. 1. "WLRU,Ratio for WLRU[3:0] arbitration" line.long 0x8 "DCMIPP_IPC5R3,DCMIPP IP-Plug Clientx register 3" hexmask.long.word 0x8 16.--26. 1. "DPREGEND,End word (AXI width = 64 bits) of the FIFO of Clientx." hexmask.long.word 0x8 0.--10. 1. "DPREGSTART,Start word (AXI width = 64 bits) of the FIFO of Clientx." group.long 0x104++0xB line.long 0x0 "DCMIPP_PRCR,DCMIPP parallel interface control register" bitfld.long 0x0 26. "SWAPBITS,Swap LSB vs." "B_0x0,B_0x1" bitfld.long 0x0 25. "SWAPCYCLES,Swap data (cycle 0 vs." "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--23. 1. "FORMAT,Other values: data are captured and output as-is only through the data/dump pipeline (forexample JPEG or byte input format)." bitfld.long 0x0 14. "ENABLE,Parallel interface enable" "B_0x0,B_0x1" newline bitfld.long 0x0 10.--12. "EDM,Extended data mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 7. "VSPOL,Vertical synchronization polarity" "B_0x0,B_0x1" bitfld.long 0x0 6. "HSPOL,Horizontal synchronization polarity" "B_0x0,B_0x1" bitfld.long 0x0 5. "PCKPOL,Pixel clock polarity" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "ESS,Embedded synchronization select" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_PRESCR,DCMIPP parallel interface embedded synchronization code register" hexmask.long.byte 0x4 24.--31. 1. "FEC,Frame end delimiter code" hexmask.long.byte 0x4 16.--23. 1. "LEC,Line end delimiter code" hexmask.long.byte 0x4 8.--15. 1. "LSC,Line start delimiter code" hexmask.long.byte 0x4 0.--7. 1. "FSC,Frame start delimiter code" line.long 0x8 "DCMIPP_PRESUR,DCMIPP parallel interface embedded synchronization unmask register" hexmask.long.byte 0x8 24.--31. 1. "FEU,Frame end delimiter unmask" hexmask.long.byte 0x8 16.--23. 1. "LEU,Line end delimiter unmask" hexmask.long.byte 0x8 8.--15. 1. "LSU,Line start delimiter unmask" hexmask.long.byte 0x8 0.--7. 1. "FSU,Frame start delimiter unmask" group.long 0x1F4++0x3 line.long 0x0 "DCMIPP_PRIER,DCMIPP parallel interface interrupt enable register" bitfld.long 0x0 6. "ERRIE,Synchronization error interrupt enable" "B_0x0,B_0x1" rgroup.long 0x1F8++0x3 line.long 0x0 "DCMIPP_PRSR,DCMIPP parallel interface status register" bitfld.long 0x0 17. "VSYNC,This bit gives the state of the VSYNC pin with the correct programmed polarity if ENABLE bit is set into the DCMIPP_PRCR register and if the pixel clock is received." "B_0x0,B_0x1" bitfld.long 0x0 16. "HSYNC,This bit gives the state of the HSYNC pin with the correct programmed polarity if ENABLE bit is set into the DCMIPP_PRCR register and if the pixel clock is received." "B_0x0,B_0x1" bitfld.long 0x0 6. "ERRF,Synchronization error raw interrupt status" "B_0x0,B_0x1" wgroup.long 0x1FC++0x3 line.long 0x0 "DCMIPP_PRFCR,DCMIPP parallel interface interrupt clear register" bitfld.long 0x0 6. "CERRF,Synchronization error interrupt status clear" "0,1" rgroup.long 0x200++0x3 line.long 0x0 "DCMIPP_CMHWCFGR,DCMIPP common IP HW configuration register" bitfld.long 0x0 5. "CCSI,Presence of the CSI-2 host interface" "B_0x0,B_0x1" bitfld.long 0x0 4. "CPAR,Presence of the parallel interface" "B_0x0,B_0x1" bitfld.long 0x0 2.--3. "CPIPES,Amount of instantiated pipes (either dump or pixel pipes)" "0,1,2,3" group.long 0x204++0x3 line.long 0x0 "DCMIPP_CMCR,DCMIPP common configuration register" bitfld.long 0x0 7. "SWAPRB,Swap R/U and B/V" "B_0x0,B_0x1" bitfld.long 0x0 4. "CFC,Clear frame counter" "0,1" bitfld.long 0x0 1.--2. "PSFC,Pipe selection for the frame counter" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 0. "INSEL,input selection" "B_0x0,B_0x1" rgroup.long 0x208++0x3 line.long 0x0 "DCMIPP_CMFRCR,DCMIPP common frame counter register" hexmask.long 0x0 0.--31. 1. "FRMCNT,Frame counter read-only loops around." group.long 0x210++0x7 line.long 0x0 "DCMIPP_CMTPGCR1,DCMIPP common test pattern generator configuration register 1" hexmask.long.word 0x0 16.--29. 1. "HEIGHT,Height of the visible pixels of the generated frame" hexmask.long.word 0x0 0.--13. 1. "WIDTH,Width of the visible pixels of the generated frame" line.long 0x4 "DCMIPP_CMTPGCR2,DCMIPP common test pattern generator configuration register 2" hexmask.long.word 0x4 16.--31. 1. "VBL,Amount of lines of the vertical blanking" hexmask.long.byte 0x4 8.--15. 1. "FORMAT,Pixel format generated:" bitfld.long 0x4 6.--7. "RT,Raw Bayer type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 4.--5. "YT,YUV type" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 3. "PATTERN,Pattern selection between color bars and color squares" "B_0x0,B_0x1" bitfld.long 0x4 2. "GSEN,Gray scale enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "LFLEN,Lifeline enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "TPGEN,Test pattern generator enable" "B_0x0,B_0x1" group.long 0x3F0++0x3 line.long 0x0 "DCMIPP_CMIER,DCMIPP common interrupt enable register" bitfld.long 0x0 31. "P2OVRIE,Overrun interrupt status enable for Pipe2" "B_0x0,B_0x1" bitfld.long 0x0 26. "P2VSYNCIE,Vertical sync interrupt enable for Pipe2" "B_0x0,B_0x1" bitfld.long 0x0 25. "P2FRAMEIE,Frame capture complete interrupt enable for Pipe2" "B_0x0,B_0x1" bitfld.long 0x0 24. "P2LINEIE,Multi-line capture complete interrupt enable for Pipe2" "B_0x0,B_0x1" newline bitfld.long 0x0 23. "P1OVRIE,Overrun interrupt enable for Pipe1" "0,1" bitfld.long 0x0 18. "P1VSYNCIE,Vertical sync interrupt enable for Pipe1" "B_0x0,B_0x1" bitfld.long 0x0 17. "P1FRAMEIE,Frame capture complete interrupt enable for Pipe1" "B_0x0,B_0x1" bitfld.long 0x0 16. "P1LINEIE,Multi-line capture complete interrupt status clear for Pipe1" "B_0x0,B_0x1" newline bitfld.long 0x0 15. "P0OVRIE,Overrun interrupt enable for Pipe0" "B_0x0,B_0x1" bitfld.long 0x0 14. "P0LIMITIE,Limit interrupt enable for Pipe0" "B_0x0,B_0x1" bitfld.long 0x0 10. "P0VSYNCIE,Vertical sync interrupt enable for Pipe0" "B_0x0,B_0x1" bitfld.long 0x0 9. "P0FRAMEIE,Frame capture complete interrupt enable for Pipe0" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "P0LINEIE,Multi-line capture complete interrupt enable for Pipe0" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRERRIE,Limit interrupt enable for the parallel Interface" "B_0x0,B_0x1" bitfld.long 0x0 5. "ATXERRIE,AXI transfer error interrupt enable for IP-Plug" "B_0x0,B_0x1" rgroup.long 0x3F4++0x7 line.long 0x0 "DCMIPP_CMSR1,DCMIPP common status register 1" bitfld.long 0x0 31. "P2CPTACT,Active frame capture (active from start-of-frame to frame complete) for Pipe2" "B_0x0,B_0x1" bitfld.long 0x0 25. "P2LSTFRM,Last frame LSB bit sampled at frame capture complete event for Pipe2" "0,1" bitfld.long 0x0 24. "P2LSTLINE,Last line LSB bit sampled at frame capture complete event for Pipe2" "0,1" bitfld.long 0x0 23. "P1CPTACT,Active frame capture (active from start-of-frame to frame complete) for Pipe1" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "P1LSTFRM,Last frame LSB bit sampled at frame capture complete event for Pipe1" "0,1" bitfld.long 0x0 16. "P1LSTLINE,Last line LSB bit sampled at Frame capture complete event for Pipe1" "0,1" bitfld.long 0x0 15. "P0CPTACT,Active frame capture (active from start-of-frame to frame complete) for Pipe0" "B_0x0,B_0x1" bitfld.long 0x0 9. "P0LSTFRM,Last frame LSB bit sampled at Frame capture complete event for Pipe0" "0,1" newline bitfld.long 0x0 8. "P0LSTLINE,Last line LSB bit sampled at Frame capture complete event for Pipe0" "0,1" bitfld.long 0x0 1. "PRVSYNC,This bit gives the state of the VSYNC pin with the correct programmed polarity on the parallel interface if ENABLE bit is set into the DCMIPP_PRCR register and if the pixel clock is received." "B_0x0,B_0x1" bitfld.long 0x0 0. "PRHSYNC,This bit gives the state of the HSYNC pin with the correct programmed polarity on the parallel interface if ENABLE bit is set into the DCMIPP_PRCR register and if the pixel clock is received." "B_0x0,B_0x1" line.long 0x4 "DCMIPP_CMSR2,DCMIPP common status register 2" bitfld.long 0x4 31. "P2OVRF,Overrun raw interrupt status for Pipe2" "B_0x0,B_0x1" bitfld.long 0x4 26. "P2VSYNCF,VSYNC raw interrupt status for Pipe2" "0,1" bitfld.long 0x4 25. "P2FRAMEF,Frame capture completed raw interrupt status for Pipe2" "B_0x0,B_0x1" bitfld.long 0x4 24. "P2LINEF,Multi-line capture completed raw interrupt status for Pipe2" "0,1" newline bitfld.long 0x4 23. "P1OVRF,Overrun raw interrupt status for Pipe1" "B_0x0,B_0x1" bitfld.long 0x4 18. "P1VSYNCF,VSYNC raw interrupt status for Pipe1" "0,1" bitfld.long 0x4 17. "P1FRAMEF,Frame capture completed raw interrupt status for Pipe1" "B_0x0,B_0x1" bitfld.long 0x4 16. "P1LINEF,Multi-line capture completed raw interrupt status for Pipe1" "0,1" newline bitfld.long 0x4 15. "P0OVRF,Overrun raw interrupt status for Pipe0" "B_0x0,B_0x1" bitfld.long 0x4 14. "P0LIMITF,Limit raw interrupt status for Pipe0" "0,1" bitfld.long 0x4 10. "P0VSYNCF,VSYNC raw interrupt status for Pipe0" "0,1" bitfld.long 0x4 9. "P0FRAMEF,Frame capture completed raw interrupt status for Pipe0" "B_0x0,B_0x1" newline bitfld.long 0x4 8. "P0LINEF,Multi-line capture completed raw interrupt status for Pipe0" "0,1" bitfld.long 0x4 6. "PRERRF,Synchronization error raw interrupt status for the parallel interface." "B_0x0,B_0x1" bitfld.long 0x4 5. "ATXERRF,AXI transfer error interrupt status flag for the IP-Plug." "B_0x0,B_0x1" wgroup.long 0x3FC++0x3 line.long 0x0 "DCMIPP_CMFCR,DCMIPP common interrupt clear register" bitfld.long 0x0 31. "CP2OVRF,Overrun interrupt status clear" "0,1" bitfld.long 0x0 26. "CP2VSYNCF,Vertical synchronization interrupt status clear" "0,1" bitfld.long 0x0 25. "CP2FRAMEF,Frame capture complete interrupt status clear" "0,1" bitfld.long 0x0 24. "CP2LINEF,Multi-line capture complete interrupt status clear" "0,1" newline bitfld.long 0x0 23. "CP1OVRF,Overrun interrupt status clear" "0,1" bitfld.long 0x0 18. "CP1VSYNCF,Vertical synchronization interrupt status clear" "0,1" bitfld.long 0x0 17. "CP1FRAMEF,Frame capture complete interrupt status clear" "0,1" bitfld.long 0x0 16. "CP1LINEF,Multi-line capture complete interrupt status clear" "0,1" newline bitfld.long 0x0 15. "CP0OVRF,Overrun interrupt status clear" "0,1" bitfld.long 0x0 14. "CP0LIMITF,limit interrupt status clear" "0,1" bitfld.long 0x0 10. "CP0VSYNCF,Vertical synchronization interrupt status clear" "0,1" bitfld.long 0x0 9. "CP0FRAMEF,Frame capture complete interrupt status clear" "0,1" newline bitfld.long 0x0 8. "CP0LINEF,Multi-line capture complete interrupt status clear" "0,1" bitfld.long 0x0 6. "CPRERRF,Synchronization error interrupt status clear" "0,1" bitfld.long 0x0 5. "CATXERRF,AXI transfer error interrupt status clear" "0,1" rgroup.long 0x400++0x3 line.long 0x0 "DCMIPP_P0HWCFGR,DCMIPP Pipe0 HW configuration register" bitfld.long 0x0 13. "CVP,Capability for pipeline virtualization" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--11. 1. "CROI,Capability for ROI: defines the number of ROIs in the pipe" bitfld.long 0x0 6.--7. "CGM,Capability for gamma conversions" "B_0x0,B_0x1,?,?" bitfld.long 0x0 4.--5. "CRB,Capability for demosaicing" "B_0x0,B_0x1,?,?" newline bitfld.long 0x0 3. "DBM,Double buffer mode" "B_0x0,B_0x1" bitfld.long 0x0 2. "CDS,Capability for downsize filter" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CPLA,Capability for planar buffers" "B_0x0,B_0x1,B_0x2,?" group.long 0x404++0x3 line.long 0x0 "DCMIPP_P0FSCR,DCMIPP Pipe0 flow selection configuration register" bitfld.long 0x0 31. "PIPEN,Activation of PipeN" "B_0x0,B_0x1" bitfld.long 0x0 19.--20. "VC,Flow selection mode" "0,1,2,3" bitfld.long 0x0 16.--17. "DTMODE,Flow selection mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 8.--13. 1. "DTIDB,Data type selection ID B" newline hexmask.long.byte 0x0 0.--5. 1. "DTIDA,Data type selection ID A" group.long 0x500++0xB line.long 0x0 "DCMIPP_P0FCTCR,DCMIPP Pipe0 flow control configuration register" bitfld.long 0x0 3. "CPTREQ,Capture requested" "B_0x0,B_0x1" bitfld.long 0x0 2. "CPTMODE,Capture mode" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "FRATE,Frame capture rate control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "DCMIPP_P0SCSTR,DCMIPP Pipe0 statistic/crop start register" hexmask.long.word 0x4 16.--27. 1. "VSTART,Vertical start from 0 to 4094 pixels high" hexmask.long.word 0x4 0.--11. 1. "HSTART,Horizontal start from 0 to 4094 words wide" line.long 0x8 "DCMIPP_P0SCSZR,DCMIPP Pipe0 statistic/crop size register" bitfld.long 0x8 31. "ENABLE,This bit is set and cleared by software." "B_0x0,B_0x1" bitfld.long 0x8 30. "POSNEG,This bit is set and cleared by software." "B_0x0,B_0x1" hexmask.long.word 0x8 16.--27. 1. "VSIZE,Vertical size from 0 to 4094 pixels high" hexmask.long.word 0x8 0.--11. 1. "HSIZE,Horizontal size from 0 to 4094 word wide (data 32-bit)" rgroup.long 0x5B0++0x3 line.long 0x0 "DCMIPP_P0DCCNTR,DCMIPP Pipe0 dump counter register" hexmask.long 0x0 0.--25. 1. "CNT,Number of data dumped during the frame." group.long 0x5B4++0x3 line.long 0x0 "DCMIPP_P0DCLMTR,DCMIPP Pipe0 dump limit register" bitfld.long 0x0 31. "ENABLE,None" "B_0x0,B_0x1" hexmask.long.tbyte 0x0 0.--23. 1. "LIMIT,Maximum number of 32-bit data that can be dumped during a frame after the crop 2D operation." group.long 0x5C0++0x7 line.long 0x0 "DCMIPP_P0PPCR,DCMIPP Pipe0 pixel packer configuration register" bitfld.long 0x0 13.--15. "LINEMULT,Amount of capture completed lines for LINE event and interrupt" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 11. "OELS,Odd/even line select (line select start)" "B_0x0,B_0x1" bitfld.long 0x0 10. "LSM,Line select mode" "B_0x0,B_0x1" bitfld.long 0x0 9. "OEBS,Odd/even byte select (byte select start)" "B_0x0,B_0x1" newline bitfld.long 0x0 7.--8. "BSM,Byte select mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 6. "HEADEREN,CSI header dump enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "PAD,Pad mode for monochrome and raw Bayer 10/12/14 bpp (MSB vs." "B_0x0,B_0x1" bitfld.long 0x0 0. "SWAPYUV,Swaps within a 32-bit word byte 0-vs-1 and byte 2-vs-3." "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P0PPM0AR1,DCMIPP Pipe0 pixel packer Memory0 address register 1" hexmask.long 0x4 0.--31. 1. "M0A,Memory0 address" rgroup.long 0x5D0++0x3 line.long 0x0 "DCMIPP_P0STM0AR,DCMIPP Pipe0 status Memory0 address register" hexmask.long 0x0 0.--31. 1. "M0A,Memory0 address" group.long 0x5F4++0x3 line.long 0x0 "DCMIPP_P0IER,DCMIPP Pipe0 interrupt enable register" bitfld.long 0x0 7. "OVRIE,Overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "LIMITIE,Limit interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "VSYNCIE,VSYNC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "FRAMEIE,Frame capture completed interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "LINEIE,Multi-line capture completed interrupt enable" "B_0x0,B_0x1" rgroup.long 0x5F8++0x3 line.long 0x0 "DCMIPP_P0SR,DCMIPP Pipe0 status register" bitfld.long 0x0 23. "CPTACT,Capture immediate status" "B_0x0,B_0x1" bitfld.long 0x0 17. "LSTFRM,Last frame LSB bit sampled at frame capture complete event." "0,1" bitfld.long 0x0 16. "LSTLINE,Last line LSB bit sampled at frame capture complete event." "0,1" bitfld.long 0x0 7. "OVRF,Overrun raw interrupt status" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "LIMITF,Limit raw interrupt status" "0,1" bitfld.long 0x0 2. "VSYNCF,VSYNC raw interrupt status" "0,1" bitfld.long 0x0 1. "FRAMEF,Frame capture completed raw interrupt status" "B_0x0,B_0x1" bitfld.long 0x0 0. "LINEF,Multi-line capture completed raw interrupt status" "0,1" wgroup.long 0x5FC++0x3 line.long 0x0 "DCMIPP_P0FCR,DCMIPP Pipe0 interrupt clear register" bitfld.long 0x0 7. "COVRF,Overrun interrupt status clear" "0,1" bitfld.long 0x0 6. "CLIMITF,limit interrupt status clear" "0,1" bitfld.long 0x0 2. "CVSYNCF,Vertical synchronization interrupt status clear" "0,1" bitfld.long 0x0 1. "CFRAMEF,Frame capture complete interrupt status clear" "0,1" newline bitfld.long 0x0 0. "CLINEF,Multi-line capture complete interrupt status clear" "0,1" rgroup.long 0x604++0x3 line.long 0x0 "DCMIPP_P0CFSCR,DCMIPP Pipe0 current flow selection configuration register" bitfld.long 0x0 31. "PIPEN,Current activation of PipeN" "B_0x0,B_0x1" bitfld.long 0x0 19.--20. "VC,Current flow selection mode" "0,1,2,3" bitfld.long 0x0 16.--17. "DTMODE,Flow selection mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 8.--13. 1. "DTIDB,Current data type selection ID B" newline hexmask.long.byte 0x0 0.--5. 1. "DTIDA,Current data type selection ID A" rgroup.long 0x700++0xB line.long 0x0 "DCMIPP_P0CFCTCR,DCMIPP Pipe0 current flow control configuration register" bitfld.long 0x0 3. "CPTREQ,Capture requested" "B_0x0,B_0x1" bitfld.long 0x0 2. "CPTMODE,Capture mode" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "FRATE,Frame capture rate control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "DCMIPP_P0CSCSTR,DCMIPP Pipe0 current statistic/crop start register" hexmask.long.word 0x4 16.--27. 1. "VSTART,Current vertical start from 0 to 4094 pixels high" hexmask.long.word 0x4 0.--11. 1. "HSTART,Current horizontal start from 0 to 4094 words wide" line.long 0x8 "DCMIPP_P0CSCSZR,DCMIPP Pipe0 current statistic/crop size register" bitfld.long 0x8 31. "ENABLE,Current value of the ENABLE bit" "B_0x0,B_0x1" bitfld.long 0x8 30. "POSNEG,Current value of the POSNEG bit" "B_0x0,B_0x1" hexmask.long.word 0x8 16.--27. 1. "VSIZE,Current vertical size from 0 to 4094 pixels high." hexmask.long.word 0x8 0.--11. 1. "HSIZE,Current horizontal size from 0 to 4094 word wide (data 32-bit)." rgroup.long 0x7C0++0x7 line.long 0x0 "DCMIPP_P0CPPCR,DCMIPP Pipe0 current pixel packer configuration register" bitfld.long 0x0 13.--15. "LINEMULT,Current amount of capture completed lines for LINE event and interrupt" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 11. "OELS,Current odd/even line select (ine select start)" "B_0x0,B_0x1" bitfld.long 0x0 10. "LSM,Current Line select mode" "B_0x0,B_0x1" bitfld.long 0x0 9. "OEBS,Current odd/even byte select (byte select start)" "B_0x0,B_0x1" newline bitfld.long 0x0 7.--8. "BSM,Current Byte select mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 6. "HEADEREN,Current CSI header dump enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "PAD,Current Pad mode for monochrome and raw Bayer 10/12/14 bpp (MSB vs." "B_0x0,B_0x1" bitfld.long 0x0 0. "SWAPYUV,Swaps within a 32-bit word byte 0 vs." "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P0CPPM0AR1,DCMIPP Pipe0 current pixel packer Memory0 address register 1" hexmask.long 0x4 0.--31. 1. "M0A,Memory0 address" rgroup.long 0x800++0x3 line.long 0x0 "DCMIPP_P1HWCFGR,DCMIPP Pipex HW configuration register" bitfld.long 0x0 18. "CFOC,Capability for focus extraction" "B_0x0,B_0x1" bitfld.long 0x0 17. "CLS,Capability for lens shading" "B_0x0,B_0x1" bitfld.long 0x0 16. "CHS,Capability to extract histograms" "B_0x0,B_0x1" bitfld.long 0x0 13. "CVP,Capability for pipeline virtualization" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "CROI,Capability for ROI: defines the number of ROIs in the pipe" bitfld.long 0x0 6.--7. "CGM,Capability for gamma conversions" "B_0x0,B_0x1,?,?" bitfld.long 0x0 4.--5. "CRB,Capability for demosaicing" "B_0x0,B_0x1,?,?" bitfld.long 0x0 3. "DBM,Double buffer mode" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "CDS,Capability for downsize filter" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CPLA,Capability for planar buffers" "B_0x0,B_0x1,B_0x2,?" group.long 0x804++0x3 line.long 0x0 "DCMIPP_P1FSCR,DCMIPP Pipe1 flow selection configuration register" bitfld.long 0x0 31. "PIPEN,Activation of PipeN" "B_0x0,B_0x1" bitfld.long 0x0 30. "FDTFEN,Force Datatype format enable" "B_0x0,?" hexmask.long.byte 0x0 24.--29. 1. "FDTF,Force Datatype format" bitfld.long 0x0 19.--20. "VC,Flow selection mode" "0,1,2,3" newline bitfld.long 0x0 18. "PIPEDIFF,Differentiates Pipe2 from Pipe1" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DTMODE,Flow selection mode" "B_0x0,B_0x1,?,?" hexmask.long.byte 0x0 8.--13. 1. "DTIDB,Data type selection ID B" hexmask.long.byte 0x0 0.--5. 1. "DTIDA,Data type selection ID A" group.long 0x820++0x7 line.long 0x0 "DCMIPP_P1SRCR,DCMIPP Pipe1 stat removal configuration register" bitfld.long 0x0 15. "CROPEN,Crop line enable" "B_0x0,B_0x1" bitfld.long 0x0 12.--14. "FIRSTLINEDEL,Amount of first lines to delete when CROPEN = 1" "0,1,2,3,4,5,6,7" hexmask.long.word 0x0 0.--11. 1. "LASTLINE,Amount of following lines to keep when CROPEN = 1." line.long 0x4 "DCMIPP_P1BPRCR,DCMIPP Pipe1 bad pixel removal control register" bitfld.long 0x4 1.--3. "STRENGTH,Strength (aggressiveness) of the bad pixel detection" "B_0x0,?,?,?,?,?,?,B_0x7" bitfld.long 0x4 0. "ENABLE,Bad pixel detection must be enabled only for raw Bayer flows as it corrupts RGB flows." "B_0x0,B_0x1" rgroup.long 0x828++0x3 line.long 0x0 "DCMIPP_P1BPRSR,DCMIPP Pipe1 bad pixel removal status register" hexmask.long.word 0x0 0.--11. 1. "BADCNT,Amount of detected bad pixels" group.long 0x830++0x3 line.long 0x0 "DCMIPP_P1DECR,DCMIPP Pipe1 decimation register" bitfld.long 0x0 3.--4. "VDEC,Vertical decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "HDEC,Horizontal decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0. "ENABLE,None" "B_0x0,B_0x1" group.long 0x840++0xB line.long 0x0 "DCMIPP_P1BLCCR,DCMIPP Pipe1 black level calibration control register" hexmask.long.byte 0x0 24.--31. 1. "BLCR,Black level calibration - Red" hexmask.long.byte 0x0 16.--23. 1. "BLCG,Black level calibration - Green" hexmask.long.byte 0x0 8.--15. 1. "BLCB,Black level calibration - Blue" bitfld.long 0x0 0. "ENABLE,Black level calibration" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P1EXCR1,DCMIPP Pipe1 exposure control register 1" bitfld.long 0x4 28.--30. "SHFR,Exposure shift - Red" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 20.--27. 1. "MULTR,Exposure multiplier - Red" bitfld.long 0x4 0. "ENABLE,Exposure control (multiplication and shift) of all red green and blue" "B_0x0,B_0x1" line.long 0x8 "DCMIPP_P1EXCR2,DCMIPP Pipe1 exposure control register 2" bitfld.long 0x8 28.--30. "SHFG,Exposure shift - Green" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 20.--27. 1. "MULTG,Exposure multiplier - Green" bitfld.long 0x8 12.--14. "SHFB,Exposure shift - Blue" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 4.--11. 1. "MULTB,Exposure multiplier - Blue" group.long 0x850++0x13 line.long 0x0 "DCMIPP_P1ST1CR,DCMIPP Pipe1 statistics1 control register" bitfld.long 0x0 7. "MODE,Statistics mode" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRC,Statistics source" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2.--3. "BINS,Current bin definition" "B_0x0_MODE__EQUAL_BINS,B_0x1_MODE__EQUAL_BINS,B_0x2_MODE__EQUAL_BINS,B_0x3_MODE__EQUAL_BINS" bitfld.long 0x0 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P1ST2CR,DCMIPP Pipe1 statistics 2 control register" bitfld.long 0x4 7. "MODE,Statistics mode" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "SRC,Statistics source" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2.--3. "BINS,Bin definition" "B_0x0_MODE__EQUAL_BINS,B_0x1_MODE__EQUAL_BINS,B_0x2_MODE__EQUAL_BINS,B_0x3_MODE__EQUAL_BINS" bitfld.long 0x4 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x8 "DCMIPP_P1ST3CR,DCMIPP Pipe1 statistics 3 control register" bitfld.long 0x8 7. "MODE,Statistics mode" "B_0x0,B_0x1" bitfld.long 0x8 4.--6. "SRC,Statistics source" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2.--3. "BINS,Bin definition" "B_0x0_MODE__EQUAL_BINS,B_0x1_MODE__EQUAL_BINS,B_0x2_MODE__EQUAL_BINS,B_0x3_MODE__EQUAL_BINS" bitfld.long 0x8 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0xC "DCMIPP_P1STSTR,DCMIPP Pipe1 statistics window start register" hexmask.long.word 0xC 16.--27. 1. "VSTART,Vertical start from 0 to 4094 pixels high" hexmask.long.word 0xC 0.--11. 1. "HSTART,Horizontal start from 0 to 4094 pixels wide" line.long 0x10 "DCMIPP_P1STSZR,DCMIPP Pipe1 statistics window size register" bitfld.long 0x10 31. "CROPEN,None" "B_0x0,B_0x1" hexmask.long.word 0x10 16.--27. 1. "VSIZE,Vertical size from 0 to 4094 pixels high" hexmask.long.word 0x10 0.--11. 1. "HSIZE,Horizontal size from 0 to 4094 pixels wide" rgroup.long 0x864++0xB line.long 0x0 "DCMIPP_P1ST1SR,DCMIPP Pipe1 statistics 1 status register" hexmask.long.tbyte 0x0 0.--23. 1. "ACCU,Accumulation result divided by 256." line.long 0x4 "DCMIPP_P1ST2SR,DCMIPP Pipe1 statistics 2 status register" hexmask.long.tbyte 0x4 0.--23. 1. "ACCU,accumulation result divided by 256." line.long 0x8 "DCMIPP_P1ST3SR,DCMIPP Pipe1 statistics 3 status register" hexmask.long.tbyte 0x8 0.--23. 1. "ACCU,accumulation result divided by 256." group.long 0x870++0x3 line.long 0x0 "DCMIPP_P1DMCR,DCMIPP Pipe1 demosaicing configuration register" bitfld.long 0x0 28.--30. "EDGE,Strength of the edge detection" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 24.--26. "LINEH,Strength of the horizontal line detection" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 20.--22. "LINEV,Strength of the vertical line detection" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 16.--18. "PEAK,Strength of the peak detection" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x0 1.--2. "TYPE,Raw Bayer type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0. "ENABLE,None" "B_0x0,B_0x1" group.long 0x880++0x1B line.long 0x0 "DCMIPP_P1CCCR,DCMIPP Pipe1 ColorConv configuration register" bitfld.long 0x0 2. "CLAMP,Clamp the output samples" "B_0x0,B_0x1" bitfld.long 0x0 1. "TYPE,output samples type used while CLAMP is activated" "B_0x0,B_0x1" bitfld.long 0x0 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P1CCRR1,DCMIPP Pipe1 ColorConv red coefficient register 1" hexmask.long.word 0x4 16.--26. 1. "RG,Coefficient row 1 column 2 of the matrix" hexmask.long.word 0x4 0.--10. 1. "RR,Coefficient row 1 column 1 of the matrix" line.long 0x8 "DCMIPP_P1CCRR2,DCMIPP Pipe1 ColorConv red coefficient register 2" hexmask.long.word 0x8 16.--25. 1. "RA,Coefficient row 1 of the added column (signed integer value)" hexmask.long.word 0x8 0.--10. 1. "RB,Coefficient row 1 column 3 of the matrix" line.long 0xC "DCMIPP_P1CCGR1,DCMIPP Pipe1 ColorConv green coefficient register 1" hexmask.long.word 0xC 16.--26. 1. "GG,Coefficient row 2 column 2 of the matrix" hexmask.long.word 0xC 0.--10. 1. "GR,Coefficient row 2 column 1 of the matrix" line.long 0x10 "DCMIPP_P1CCGR2,DCMIPP Pipe1 ColorConv green coefficient register 2" hexmask.long.word 0x10 16.--25. 1. "GA,Coefficient row 2 of the added column (signed integer value)" hexmask.long.word 0x10 0.--10. 1. "GB,Coefficient row 2 column 3 of the matrix" line.long 0x14 "DCMIPP_P1CCBR1,DCMIPP Pipex ColorConv blue coefficient register 1" hexmask.long.word 0x14 16.--26. 1. "BG,Coefficient row 3 column 2 of the matrix" hexmask.long.word 0x14 0.--10. 1. "BR,Coefficient row 3 column 1 of the matrix" line.long 0x18 "DCMIPP_P1CCBR2,DCMIPP Pipe1 ColorConv blue coefficient register 2" hexmask.long.word 0x18 16.--25. 1. "BA,Coefficient row 3 of the added column (signed integer value)" hexmask.long.word 0x18 0.--10. 1. "BB,Coefficient row 3 column 3 of the matrix" group.long 0x8A0++0xB line.long 0x0 "DCMIPP_P1CTCR1,DCMIPP Pipe1 contrast control register 1" hexmask.long.byte 0x0 9.--14. 1. "LUM0,Luminance increase for input luminance of 0 (increase is idle with LUMx = 16)" bitfld.long 0x0 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P1CTCR2,DCMIPP Pipe1 contrast control register 2" hexmask.long.byte 0x4 25.--30. 1. "LUM1,Luminance increase for input luminance of 32 (increase is idle with LUMx = 16)" hexmask.long.byte 0x4 17.--22. 1. "LUM2,Luminance increase for input luminance of 64 (increase is idle with LUMx = 16)" hexmask.long.byte 0x4 9.--14. 1. "LUM3,Luminance increase for input luminance of 96 (increase is idle with LUMx = 16)" hexmask.long.byte 0x4 1.--6. 1. "LUM4,Luminance increase for input luminance of 128 (increase is idle with LUMx = 16)" line.long 0x8 "DCMIPP_P1CTCR3,DCMIPP Pipe1 contrast control register 3" hexmask.long.byte 0x8 25.--30. 1. "LUM5,Luminance increase for input luminance of 160 (increase is idle with LUMx = 16)" hexmask.long.byte 0x8 17.--22. 1. "LUM6,Luminance increase for input luminance of 192 (increase is idle with LUMx = 16)" hexmask.long.byte 0x8 9.--14. 1. "LUM7,Luminance increase for input luminance of 224 (increase is idle with LUMx = 16)" hexmask.long.byte 0x8 1.--6. 1. "LUM8,Luminance increase for input luminance of 256 (increase is idle with LUMx = 16)" group.long 0x900++0x1B line.long 0x0 "DCMIPP_P1FCTCR,DCMIPP Pipex flow control configuration register" bitfld.long 0x0 3. "CPTREQ,Capture requested" "B_0x0,B_0x1" bitfld.long 0x0 2. "CPTMODE,Capture mode" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "FRATE,Frame capture rate control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "DCMIPP_P1CRSTR,DCMIPP Pipex crop window start register" hexmask.long.word 0x4 16.--27. 1. "VSTART,Vertical start from 0 to 4094 pixels high" hexmask.long.word 0x4 0.--11. 1. "HSTART,Horizontal start from 0 to 4094 pixels wide" line.long 0x8 "DCMIPP_P1CRSZR,DCMIPP Pipex crop window size register" bitfld.long 0x8 31. "ENABLE,None" "B_0x0,B_0x1" hexmask.long.word 0x8 16.--27. 1. "VSIZE,Vertical size from 0 to 4094 pixels high." hexmask.long.word 0x8 0.--11. 1. "HSIZE,Horizontal size from 0 to 4094 pixels wide." line.long 0xC "DCMIPP_P1DCCR,DCMIPP Pipex decimation register" bitfld.long 0xC 3.--4. "VDEC,Vertical decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 1.--2. "HDEC,Horizontal decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x10 "DCMIPP_P1DSCR,DCMIPP Pipex downsize configuration register" bitfld.long 0x10 31. "ENABLE,None" "B_0x0,B_0x1" hexmask.long.word 0x10 16.--25. 1. "VDIV,Vertical division factor from 128 (8x) to 1023 (1x)" hexmask.long.word 0x10 0.--9. 1. "HDIV,Horizontal division factor from 128 (8x) to 1023 (1x)" line.long 0x14 "DCMIPP_P1DSRTIOR,DCMIPP Pipex downsize ratio register" hexmask.long.word 0x14 16.--31. 1. "VRATIO,Vertical ratio from 8192 (1x) to 65535 (8x)" hexmask.long.word 0x14 0.--15. 1. "HRATIO,Horizontal ratio from 8192 (1x) to 65535 (8x)" line.long 0x18 "DCMIPP_P1DSSZR,DCMIPP Pipex downsize destination size register" hexmask.long.word 0x18 16.--27. 1. "VSIZE,Vertical size from 0 to 4094 pixels high" hexmask.long.word 0x18 0.--11. 1. "HSIZE,Horizontal size from 0 to 4094 pixels wide" group.long 0x970++0x3 line.long 0x0 "DCMIPP_P1GMCR,DCMIPP Pipex gamma configuration register" bitfld.long 0x0 0. "ENABLE,None" "B_0x0,B_0x1" group.long 0x980++0x1B line.long 0x0 "DCMIPP_P1YUVCR,DCMIPP Pipe1 YUVConv configuration register" bitfld.long 0x0 2. "CLAMP,Clamp the output samples" "B_0x0,B_0x1" bitfld.long 0x0 1. "TYPE,Output samples type used while CLAMP is activated" "B_0x0,B_0x1" bitfld.long 0x0 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P1YUVRR1,DCMIPP Pipe1 YUVConv red coefficient register 1" hexmask.long.word 0x4 16.--26. 1. "RG,Coefficient row 1 column 2 of the matrix" hexmask.long.word 0x4 0.--10. 1. "RR,Coefficient row 1 column 1 of the matrix" line.long 0x8 "DCMIPP_P1YUVRR2,DCMIPP Pipe1 YUVConv red coefficient register 2" hexmask.long.word 0x8 16.--25. 1. "RA,Coefficient row 1 of the added column (signed integer value)" hexmask.long.word 0x8 0.--10. 1. "RB,Coefficient row 1 column 3 of the matrix" line.long 0xC "DCMIPP_P1YUVGR1,DCMIPP Pipe1 YUVConv green coefficient register 1" hexmask.long.word 0xC 16.--26. 1. "GG,Coefficient row 2 column 2 of the matrix" hexmask.long.word 0xC 0.--10. 1. "GR,Coefficient row 2 column 1 of the matrix" line.long 0x10 "DCMIPP_P1YUVGR2,DCMIPP Pipe1 YUVConv green coefficient register 2" hexmask.long.word 0x10 16.--25. 1. "GA,Coefficient row 2 of the added column (signed integer value)" hexmask.long.word 0x10 0.--10. 1. "GB,Coefficient row 2 column 3 of the matrix" line.long 0x14 "DCMIPP_P1YUVBR1,DCMIPP Pipe1 YUVConv blue coefficient register 1" hexmask.long.word 0x14 16.--26. 1. "BG,Coefficient row 3 column 2 of the matrix" hexmask.long.word 0x14 0.--10. 1. "BR,Coefficient row 3 column 1 of the matrix" line.long 0x18 "DCMIPP_P1YUVBR2,DCMIPP Pipe1 YUV blue coefficient register 2" hexmask.long.word 0x18 16.--25. 1. "BA,Coefficient row 3 of the added column (signed integer value)" hexmask.long.word 0x18 0.--10. 1. "BB,Coefficient row 3 column 3 of the matrix" group.long 0x9C0++0x7 line.long 0x0 "DCMIPP_P1PPCR,DCMIPP Pipe1 pixel packer configuration register" bitfld.long 0x0 13.--15. "LINEMULT,Amount of capture completed lines for LINE Event and Interrupt" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 4. "SWAPRB,Swaps R-vs-B components if RGB and U-vs-V components if YUV" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--3. 1. "FORMAT,Memory format" line.long 0x4 "DCMIPP_P1PPM0AR1,DCMIPP Pipe1 pixel packer Memory0 address register 1" hexmask.long 0x4 0.--31. 1. "M0A,Memory0 address" group.long 0x9CC++0x3 line.long 0x0 "DCMIPP_P1PPM0PR,DCMIPP Pipex pixel packer Memory0 pitch register" hexmask.long.word 0x0 0.--14. 1. "PITCH,Number of bytes between the address of two consecutive lines." rgroup.long 0x9D0++0x3 line.long 0x0 "DCMIPP_P1STM0AR,DCMIPP Pipex status Memory0 address register" hexmask.long 0x0 0.--31. 1. "M0A,Memory0 address" group.long 0x9D4++0x3 line.long 0x0 "DCMIPP_P1PPM1AR1,DCMIPP Pipex pixel packer Memory1 address register 1" hexmask.long 0x0 0.--31. 1. "M1A,Memory1 address" group.long 0x9DC++0x3 line.long 0x0 "DCMIPP_P1PPM1PR,DCMIPP Pipex pixel packer Memory1 pitch register" hexmask.long.word 0x0 0.--14. 1. "PITCH,Number of bytes between the address of two consecutive lines." rgroup.long 0x9E0++0x3 line.long 0x0 "DCMIPP_P1STM1AR,DCMIPP Pipex status Memory1 address register" hexmask.long 0x0 0.--31. 1. "M1A,Memory1 address" group.long 0x9E4++0x3 line.long 0x0 "DCMIPP_P1PPM2AR1,DCMIPP Pipex pixel packer memory2 address register 1" hexmask.long 0x0 0.--31. 1. "M2A,Memory 2 address" rgroup.long 0x9F0++0x3 line.long 0x0 "DCMIPP_P1STM2AR,DCMIPP Pipex status Memory2 address register" hexmask.long 0x0 0.--31. 1. "M2A,Memory2 address" group.long 0x9F4++0x3 line.long 0x0 "DCMIPP_P1IER,DCMIPP Pipe1 interrupt enable register" bitfld.long 0x0 7. "OVRIE,Overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "VSYNCIE,VSYNC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "FRAMEIE,Frame capture completed interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "LINEIE,Multi-line capture completed interrupt enable" "B_0x0,B_0x1" rgroup.long 0x9F8++0x3 line.long 0x0 "DCMIPP_P1SR,DCMIPP Pipe1 status register" bitfld.long 0x0 23. "CPTACT,Capture immediate status" "B_0x0,B_0x1" bitfld.long 0x0 17. "LSTFRM,Last frame LSB bit sampled at frame capture complete event." "0,1" bitfld.long 0x0 16. "LSTLINE,Last line LSB bit sampled at frame capture complete event." "0,1" bitfld.long 0x0 7. "OVRF,Overrun raw interrupt status" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "VSYNCF,VSYNC raw interrupt status" "0,1" bitfld.long 0x0 1. "FRAMEF,Frame capture completed raw interrupt status" "B_0x0,B_0x1" bitfld.long 0x0 0. "LINEF,Multi-line capture completed raw interrupt status" "0,1" wgroup.long 0x9FC++0x3 line.long 0x0 "DCMIPP_P1FCR,DCMIPP Pipe1 interrupt clear register" bitfld.long 0x0 7. "COVRF,Overrun interrupt status clear" "0,1" bitfld.long 0x0 2. "CVSYNCF,Vertical synchronization interrupt status clear" "0,1" bitfld.long 0x0 1. "CFRAMEF,Frame capture complete interrupt status clear" "0,1" bitfld.long 0x0 0. "CLINEF,Multi-line capture complete interrupt status clear" "0,1" rgroup.long 0xA04++0x3 line.long 0x0 "DCMIPP_P1CFSCR,DCMIPP Pipe1 current flow selection configuration register" bitfld.long 0x0 31. "PIPEN,Current activation of PipeN" "B_0x0,B_0x1" bitfld.long 0x0 30. "FDTFEN,Current force data type format enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 24.--29. 1. "FDTF,Current force data type format" bitfld.long 0x0 19.--20. "VC,Current flow selection mode" "0,1,2,3" newline bitfld.long 0x0 18. "PIPEDIFF,Current differentiates Pipe2 vs." "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DTMODE,Flow selection mode" "B_0x0,B_0x1,?,?" hexmask.long.byte 0x0 8.--13. 1. "DTIDB,Current data type ID B" hexmask.long.byte 0x0 0.--5. 1. "DTIDA,Current data type ID A" rgroup.long 0xA24++0x3 line.long 0x0 "DCMIPP_P1CBPRCR,DCMIPP Pipe1 current bad pixel removal register" bitfld.long 0x0 1.--3. "STRENGTH,Current strength (aggressiveness) of the bad pixel detection:" "B_0x0,?,?,?,?,?,?,B_0x7" bitfld.long 0x0 0. "ENABLE,Current status of enable bit" "B_0x0,B_0x1" rgroup.long 0xA40++0xB line.long 0x0 "DCMIPP_P1CBLCCR,DCMIPP Pipe1 current black level calibration control register" hexmask.long.byte 0x0 24.--31. 1. "BLCR,Current black level calibration - Red" hexmask.long.byte 0x0 16.--23. 1. "BLCG,Current black level calibration - Green" hexmask.long.byte 0x0 8.--15. 1. "BLCB,Current black level calibration - Blue" bitfld.long 0x0 0. "ENABLE,For current black level calibration" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P1CEXCR1,DCMIPP Pipe1 current exposure control register 1" bitfld.long 0x4 28.--30. "SHFR,Current exposure shift - Red" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 20.--27. 1. "MULTR,Current exposure multiplier - Red" bitfld.long 0x4 0. "ENABLE,for exposure control (multiplication and shift)" "B_0x0,B_0x1" line.long 0x8 "DCMIPP_P1CEXCR2,DCMIPP Pipe1 current exposure control register 2" bitfld.long 0x8 28.--30. "SHFG,Current exposure shift - Green" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 20.--27. 1. "MULTG,Current exposure multiplier - Green" bitfld.long 0x8 12.--14. "SHFB,Current exposure shift - Blue" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 4.--11. 1. "MULTB,Current exposure multiplier - Blue" rgroup.long 0xA50++0x13 line.long 0x0 "DCMIPP_P1CST1CR,DCMIPP Pipe1 current statistics 1 control register" hexmask.long.tbyte 0x0 8.--31. 1. "ACCU,Current accumulation result divided by 256." bitfld.long 0x0 7. "MODE,Current statistics mode" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRC,Current source of statistics" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2.--3. "BINS,Current bin definition" "B_0x0_MODE__EQUAL_BINS,B_0x1_MODE__EQUAL_BINS,B_0x2_MODE__EQUAL_BINS,B_0x3_MODE__EQUAL_BINS" newline bitfld.long 0x0 0. "ENABLE,Current enable bit value" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P1CST2CR,DCMIPP Pipe1 current statistics 2 control register" hexmask.long.tbyte 0x4 8.--31. 1. "ACCU,Accumulation result divided by 256." bitfld.long 0x4 7. "MODE,Statistics mode" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "SRC,Statistics source" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2.--3. "BINS,Bin definition" "B_0x0_MODE__EQUAL_BINS,B_0x1_MODE__EQUAL_BINS,B_0x2_MODE__EQUAL_BINS,B_0x3_MODE__EQUAL_BINS" newline bitfld.long 0x4 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x8 "DCMIPP_P1CST3CR,DCMIPP Pipe1 current statistics 3 control register" hexmask.long.tbyte 0x8 8.--31. 1. "ACCU,Accumulation result divided by 256." bitfld.long 0x8 7. "MODE,Statistics mode" "B_0x0,B_0x1" bitfld.long 0x8 4.--6. "SRC,Statistics source" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2.--3. "BINS,Current bin definition" "B_0x0_MODE__EQUAL_BINS,B_0x1_MODE__EQUAL_BINS,B_0x2_MODE__EQUAL_BINS,B_0x3_MODE__EQUAL_BINS" newline bitfld.long 0x8 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0xC "DCMIPP_P1CSTSTR,DCMIPP Pipe1 current statistics window start register" hexmask.long.word 0xC 16.--27. 1. "VSTART,Current vertical start from 0 to 4094 pixels high" hexmask.long.word 0xC 0.--11. 1. "HSTART,Current horizontal start from 0 to 4094 pixels wide" line.long 0x10 "DCMIPP_P1CSTSZR,DCMIPP Pipe1 current statistics window size register" bitfld.long 0x10 31. "CROPEN,Current CROPEN bit value" "B_0x0,B_0x1" hexmask.long.word 0x10 16.--27. 1. "VSIZE,Current vertical size from 0 to 4094 pixels high" hexmask.long.word 0x10 0.--11. 1. "HSIZE,Current horizontal size from 0 to 4094 pixels wide" rgroup.long 0xA80++0x1B line.long 0x0 "DCMIPP_P1CCCCR,DCMIPP Pipe1 current ColorConv configuration register" bitfld.long 0x0 2. "CLAMP,Clamp the output samples" "B_0x0,B_0x1" bitfld.long 0x0 1. "TYPE,Output samples type used while CLAMP is activated" "B_0x0,B_0x1" bitfld.long 0x0 0. "ENABLE,Current value applied" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P1CCCRR1,DCMIPP Pipe1 current ColorConv red coefficient register 1" hexmask.long.word 0x4 16.--26. 1. "RG,Current coefficient row 1 column 2 of the matrix" hexmask.long.word 0x4 0.--10. 1. "RR,Current coefficient row 1 column 1 of the matrix" line.long 0x8 "DCMIPP_P1CCCRR2,DCMIPP Pipe1 current ColorConv red coefficient register 2" hexmask.long.word 0x8 16.--25. 1. "RA,Current coefficient row 1 of the added column (signed integer value)" hexmask.long.word 0x8 0.--10. 1. "RB,Current coefficient row 1 column 3 of the matrix" line.long 0xC "DCMIPP_P1CCCGR1,DCMIPP Pipe1 current ColorConv green coefficient register 1" hexmask.long.word 0xC 16.--26. 1. "GG,Current coefficient row 2 column 2 of the matrix" hexmask.long.word 0xC 0.--10. 1. "GR,Current coefficient row 2 column 1 of the matrix" line.long 0x10 "DCMIPP_P1CCCGR2,DCMIPP Pipe1 current ColorConv green coefficient register 2" hexmask.long.word 0x10 16.--25. 1. "GA,Current coefficient row 2 of the added column (signed integer value)" hexmask.long.word 0x10 0.--10. 1. "GB,Current coefficient row 2 column 3 of the matrix" line.long 0x14 "DCMIPP_P1CCCBR1,DCMIPP Pipex current ColorConv blue coefficient register 1" hexmask.long.word 0x14 16.--26. 1. "BG,Current coefficient row 3 column 2 of the matrix" hexmask.long.word 0x14 0.--10. 1. "BR,Current coefficient row 3 column 1 of the matrix" line.long 0x18 "DCMIPP_P1CCCBR2,DCMIPP Pipe1 current ColorConv blue coefficient register 2" hexmask.long.word 0x18 16.--25. 1. "BA,Current coefficient row 3 of the added column (signed integer value)" hexmask.long.word 0x18 0.--10. 1. "BB,Current coefficient row 3 column 3 of the matrix" rgroup.long 0xAA0++0xB line.long 0x0 "DCMIPP_P1CCTCR1,DCMIPP Pipe1 current contrast control register 1" hexmask.long.byte 0x0 9.--14. 1. "LUM0,Current luminance increase for input luminance of 0 (increase is idle with LUMx=16)" bitfld.long 0x0 0. "ENABLE,Current ENABLE bit value" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P1CCTCR2,DCMIPP Pipe1 current contrast control register 2" hexmask.long.byte 0x4 25.--30. 1. "LUM1,Current luminance increase for input luminance of 32 (increase is idle with LUMx=16)" hexmask.long.byte 0x4 17.--22. 1. "LUM2,Current luminance increase for input luminance of 64 (increase is idle with LUMx=16)" hexmask.long.byte 0x4 9.--14. 1. "LUM3,Current luminance increase for input luminance of 96 (increase is idle with LUMx=16)" hexmask.long.byte 0x4 1.--6. 1. "LUM4,Current luminance increase for input luminance of 128 (increase is idle with LUMx=16)" line.long 0x8 "DCMIPP_P1CCTCR3,DCMIPP Pipe1 current contrast control register 3" hexmask.long.byte 0x8 25.--30. 1. "LUM5,Luminance increase for input luminance of 160 (increase is idle with LUMx = 16)" hexmask.long.byte 0x8 17.--22. 1. "LUM6,Luminance increase for input luminance of 192 (increase is idle with LUMx = 16)" hexmask.long.byte 0x8 9.--14. 1. "LUM7,Luminance increase for input luminance of 224 (increase is idle with LUMx = 16)" hexmask.long.byte 0x8 1.--6. 1. "LUM8,Luminance increase for input luminance of 256 (increase is idle with LUMx = 16)" rgroup.long 0xB00++0x1B line.long 0x0 "DCMIPP_P1CFCTCR,DCMIPP Pipex current flow control configuration register" bitfld.long 0x0 3. "CPTREQ,Capture requested" "B_0x0,B_0x1" bitfld.long 0x0 2. "CPTMODE,Capture mode" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "FRATE,Frame capture rate control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "DCMIPP_P1CCRSTR,DCMIPP Pipex current crop window start register" hexmask.long.word 0x4 16.--27. 1. "VSTART,Current vertical start from 0 to 4094 pixels high" hexmask.long.word 0x4 0.--11. 1. "HSTART,Current horizontal start from 0 to 4094 pixels wide" line.long 0x8 "DCMIPP_P1CCRSZR,DCMIPP Pipex current crop window size register" bitfld.long 0x8 31. "ENABLE,Current ENABLE bit value." "B_0x0,B_0x1" hexmask.long.word 0x8 16.--27. 1. "VSIZE,Current vertical size from 0 to 4094 pixels high" hexmask.long.word 0x8 0.--11. 1. "HSIZE,Current horizontal size from 0 to 4094 pixels wide" line.long 0xC "DCMIPP_P1CDCCR,DCMIPP Pipex current decimation register" bitfld.long 0xC 3.--4. "VDEC,Vertical decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 1.--2. "HDEC,Horizontal decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x10 "DCMIPP_P1CDSCR,DCMIPP Pipex current downsize configuration register" bitfld.long 0x10 31. "ENABLE,Current value of bit ENABLE" "B_0x0,B_0x1" hexmask.long.word 0x10 16.--25. 1. "VDIV,Current vertical division factor from 128 (8x) to 1023 (1x)" hexmask.long.word 0x10 0.--9. 1. "HDIV,Current horizontal division factor from 128 (8x) to 1023 (1x)" line.long 0x14 "DCMIPP_P1CDSRTIOR,DCMIPP Pipex current downsize ratio register" hexmask.long.word 0x14 16.--31. 1. "VRATIO,Current vertical ratio from 8192 (1x) to 65535 (8x)" hexmask.long.word 0x14 0.--15. 1. "HRATIO,Current horizontal ratio from 8192 (1x) to 65535 (8x)" line.long 0x18 "DCMIPP_P1CDSSZR,DCMIPP Pipex current downsize destination size register" hexmask.long.word 0x18 16.--27. 1. "VSIZE,Current vertical size from 0 to 4094 pixels high" hexmask.long.word 0x18 0.--11. 1. "HSIZE,Current horizontal size from 0 to 4094 pixels wide" rgroup.long 0xBC0++0x7 line.long 0x0 "DCMIPP_P1CPPCR,DCMIPP Pipe1 current pixel packer configuration register" bitfld.long 0x0 13.--15. "LINEMULT,Amount of capture completed lines for LINE Event and Interrupt" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 4. "SWAPRB,Swaps R-vs-B components if RGB and U-vs-V components if YUV" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--3. 1. "FORMAT,Memory format" line.long 0x4 "DCMIPP_P1CPPM0AR1,DCMIPP Pipe1 current pixel packer Memory0 address register 1" hexmask.long 0x4 0.--31. 1. "M0A,Memory0 address" rgroup.long 0xBCC++0x3 line.long 0x0 "DCMIPP_P1CPPM0PR,DCMIPP Pipex current pixel packer Memory0 pitch register" hexmask.long.word 0x0 0.--14. 1. "PITCH,Current number of bytes between the address of two consecutive lines." rgroup.long 0xBD4++0x3 line.long 0x0 "DCMIPP_P1CPPM1AR1,DCMIPP Pipex current pixel packer Memory1 address register 1" hexmask.long 0x0 0.--31. 1. "M1A,Memory1 address" rgroup.long 0xBDC++0x3 line.long 0x0 "DCMIPP_P1CPPM1PR,DCMIPP Pipex current pixel packer Memory1 pitch register" hexmask.long.word 0x0 0.--14. 1. "PITCH,Current number of bytes between the address of two consecutive lines" rgroup.long 0xBE4++0x3 line.long 0x0 "DCMIPP_P1CPPM2AR1,DCMIPP Pipex current pixel packer Memory2 address register 1" hexmask.long 0x0 0.--31. 1. "M2A,Memory 2 address" rgroup.long 0xC00++0x3 line.long 0x0 "DCMIPP_P2HWCFGR,DCMIPP Pipex HW configuration register" bitfld.long 0x0 18. "CFOC,Capability for focus extraction" "B_0x0,B_0x1" bitfld.long 0x0 17. "CLS,Capability for lens shading" "B_0x0,B_0x1" bitfld.long 0x0 16. "CHS,Capability to extract histograms" "B_0x0,B_0x1" bitfld.long 0x0 13. "CVP,Capability for pipeline virtualization" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "CROI,Capability for ROI: defines the number of ROIs in the pipe" bitfld.long 0x0 6.--7. "CGM,Capability for gamma conversions" "B_0x0,B_0x1,?,?" bitfld.long 0x0 4.--5. "CRB,Capability for demosaicing" "B_0x0,B_0x1,?,?" bitfld.long 0x0 3. "DBM,Double buffer mode" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "CDS,Capability for downsize filter" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CPLA,Capability for planar buffers" "B_0x0,B_0x1,B_0x2,?" group.long 0xC04++0x3 line.long 0x0 "DCMIPP_P2FSCR,DCMIPP Pipe2 flow selection configuration register" bitfld.long 0x0 31. "PIPEN,Activation of PipeN" "B_0x0,B_0x1" bitfld.long 0x0 30. "FDTFEN,Force data type format enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 24.--29. 1. "FDTF,Force data type format" bitfld.long 0x0 19.--20. "VC,Flow selection mode" "0,1,2,3" newline hexmask.long.byte 0x0 0.--5. 1. "DTIDA,Data type ID" group.long 0xD00++0x1B line.long 0x0 "DCMIPP_P2FCTCR,DCMIPP Pipex flow control configuration register" bitfld.long 0x0 3. "CPTREQ,Capture requested" "B_0x0,B_0x1" bitfld.long 0x0 2. "CPTMODE,Capture mode" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "FRATE,Frame capture rate control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "DCMIPP_P2CRSTR,DCMIPP Pipex crop window start register" hexmask.long.word 0x4 16.--27. 1. "VSTART,Vertical start from 0 to 4094 pixels high" hexmask.long.word 0x4 0.--11. 1. "HSTART,Horizontal start from 0 to 4094 pixels wide" line.long 0x8 "DCMIPP_P2CRSZR,DCMIPP Pipex crop window size register" bitfld.long 0x8 31. "ENABLE,None" "B_0x0,B_0x1" hexmask.long.word 0x8 16.--27. 1. "VSIZE,Vertical size from 0 to 4094 pixels high." hexmask.long.word 0x8 0.--11. 1. "HSIZE,Horizontal size from 0 to 4094 pixels wide." line.long 0xC "DCMIPP_P2DCCR,DCMIPP Pipex decimation register" bitfld.long 0xC 3.--4. "VDEC,Vertical decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 1.--2. "HDEC,Horizontal decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x10 "DCMIPP_P2DSCR,DCMIPP Pipex downsize configuration register" bitfld.long 0x10 31. "ENABLE,None" "B_0x0,B_0x1" hexmask.long.word 0x10 16.--25. 1. "VDIV,Vertical division factor from 128 (8x) to 1023 (1x)" hexmask.long.word 0x10 0.--9. 1. "HDIV,Horizontal division factor from 128 (8x) to 1023 (1x)" line.long 0x14 "DCMIPP_P2DSRTIOR,DCMIPP Pipex downsize ratio register" hexmask.long.word 0x14 16.--31. 1. "VRATIO,Vertical ratio from 8192 (1x) to 65535 (8x)" hexmask.long.word 0x14 0.--15. 1. "HRATIO,Horizontal ratio from 8192 (1x) to 65535 (8x)" line.long 0x18 "DCMIPP_P2DSSZR,DCMIPP Pipex downsize destination size register" hexmask.long.word 0x18 16.--27. 1. "VSIZE,Vertical size from 0 to 4094 pixels high" hexmask.long.word 0x18 0.--11. 1. "HSIZE,Horizontal size from 0 to 4094 pixels wide" group.long 0xD70++0x3 line.long 0x0 "DCMIPP_P2GMCR,DCMIPP Pipex gamma configuration register" bitfld.long 0x0 0. "ENABLE,None" "B_0x0,B_0x1" group.long 0xDC0++0x7 line.long 0x0 "DCMIPP_P2PPCR,DCMIPP Pipe2 pixel packer configuration register" bitfld.long 0x0 13.--15. "LINEMULT,Amount of capture completed lines for LINE event and interrupt" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 4. "SWAPRB,Swaps R-vs-B components if RGB and if YUV swaps U-vs-V components" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--3. 1. "FORMAT,Memory format (only coplanar formats are supported in Pipe2)" line.long 0x4 "DCMIPP_P2PPM0AR1,DCMIPP Pipe2 pixel packer Memory0 address register 1" hexmask.long 0x4 0.--31. 1. "M0A,Memory0 address" group.long 0xDCC++0x3 line.long 0x0 "DCMIPP_P2PPM0PR,DCMIPP Pipex pixel packer Memory0 pitch register" hexmask.long.word 0x0 0.--14. 1. "PITCH,Number of bytes between the address of two consecutive lines." rgroup.long 0xDD0++0x3 line.long 0x0 "DCMIPP_P2STM0AR,DCMIPP Pipex status Memory0 address register" hexmask.long 0x0 0.--31. 1. "M0A,Memory0 address" group.long 0xDF4++0x3 line.long 0x0 "DCMIPP_P2IER,DCMIPP Pipe2 interrupt enable register" bitfld.long 0x0 7. "OVRIE,Overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "VSYNCIE,VSYNC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "FRAMEIE,Frame capture completed interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "LINEIE,Multi-line capture completed interrupt enable" "B_0x0,B_0x1" rgroup.long 0xDF8++0x3 line.long 0x0 "DCMIPP_P2SR,DCMIPP Pipe2 status register" bitfld.long 0x0 23. "CPTACT,Capture immediate status" "B_0x0,B_0x1" bitfld.long 0x0 17. "LSTFRM,Last frame LSB bit sampled at frame capture complete event." "0,1" bitfld.long 0x0 16. "LSTLINE,Last line LSB bit sampled at frame capture complete event." "0,1" bitfld.long 0x0 7. "OVRF,Overrun raw interrupt status" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "VSYNCF,VSYNC raw interrupt status" "0,1" bitfld.long 0x0 1. "FRAMEF,Frame capture completed raw interrupt status" "B_0x0,B_0x1" bitfld.long 0x0 0. "LINEF,Multi-line capture completed raw interrupt status" "0,1" wgroup.long 0xDFC++0x3 line.long 0x0 "DCMIPP_P2FCR,DCMIPP Pipe2 interrupt clear register" bitfld.long 0x0 7. "COVRF,Overrun interrupt status clear" "0,1" bitfld.long 0x0 2. "CVSYNCF,Vertical synchronization interrupt status clear" "0,1" bitfld.long 0x0 1. "CFRAMEF,Frame capture complete interrupt status clear" "0,1" bitfld.long 0x0 0. "CLINEF,Multi-line capture complete interrupt status clear" "0,1" rgroup.long 0xE04++0x3 line.long 0x0 "DCMIPP_P2CFSCR,DCMIPP Pipe2 current flow selection configuration register" bitfld.long 0x0 31. "PIPEN,Current activation of PipeN" "B_0x0,B_0x1" bitfld.long 0x0 30. "FDTFEN,Current force data type format enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 24.--29. 1. "FDTF,Current force data type format" bitfld.long 0x0 19.--20. "VC,Current flow selection mode" "0,1,2,3" newline hexmask.long.byte 0x0 0.--5. 1. "DTIDA,Current data type ID" rgroup.long 0xF00++0x1B line.long 0x0 "DCMIPP_P2CFCTCR,DCMIPP Pipex current flow control configuration register" bitfld.long 0x0 3. "CPTREQ,Capture requested" "B_0x0,B_0x1" bitfld.long 0x0 2. "CPTMODE,Capture mode" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "FRATE,Frame capture rate control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "DCMIPP_P2CCRSTR,DCMIPP Pipex current crop window start register" hexmask.long.word 0x4 16.--27. 1. "VSTART,Current vertical start from 0 to 4094 pixels high" hexmask.long.word 0x4 0.--11. 1. "HSTART,Current horizontal start from 0 to 4094 pixels wide" line.long 0x8 "DCMIPP_P2CCRSZR,DCMIPP Pipex current crop window size register" bitfld.long 0x8 31. "ENABLE,Current ENABLE bit value." "B_0x0,B_0x1" hexmask.long.word 0x8 16.--27. 1. "VSIZE,Current vertical size from 0 to 4094 pixels high" hexmask.long.word 0x8 0.--11. 1. "HSIZE,Current horizontal size from 0 to 4094 pixels wide" line.long 0xC "DCMIPP_P2CDCCR,DCMIPP Pipex current decimation register" bitfld.long 0xC 3.--4. "VDEC,Vertical decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 1.--2. "HDEC,Horizontal decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x10 "DCMIPP_P2CDSCR,DCMIPP Pipex current downsize configuration register" bitfld.long 0x10 31. "ENABLE,Current value of bit ENABLE" "B_0x0,B_0x1" hexmask.long.word 0x10 16.--25. 1. "VDIV,Current vertical division factor from 128 (8x) to 1023 (1x)" hexmask.long.word 0x10 0.--9. 1. "HDIV,Current horizontal division factor from 128 (8x) to 1023 (1x)" line.long 0x14 "DCMIPP_P2CDSRTIOR,DCMIPP Pipex current downsize ratio register" hexmask.long.word 0x14 16.--31. 1. "VRATIO,Current vertical ratio from 8192 (1x) to 65535 (8x)" hexmask.long.word 0x14 0.--15. 1. "HRATIO,Current horizontal ratio from 8192 (1x) to 65535 (8x)" line.long 0x18 "DCMIPP_P2CDSSZR,DCMIPP Pipex current downsize destination size register" hexmask.long.word 0x18 16.--27. 1. "VSIZE,Current vertical size from 0 to 4094 pixels high" hexmask.long.word 0x18 0.--11. 1. "HSIZE,Current horizontal size from 0 to 4094 pixels wide" rgroup.long 0xFC0++0x7 line.long 0x0 "DCMIPP_P2CPPCR,DCMIPP Pipe2 current pixel packer configuration register" bitfld.long 0x0 13.--15. "LINEMULT,Amount of capture completed lines for LINE event and interrupt" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 4. "SWAPRB,Swaps R-vs-B components if RGB and if YUV swaps U-vs-V components" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--3. 1. "FORMAT,Memory format (only coplanar formats are supported in Pipe2)" line.long 0x4 "DCMIPP_P2CPPM0AR1,DCMIPP Pipe2 current pixel packer Memory0 address register 1" hexmask.long 0x4 0.--31. 1. "M0A,Memory0 address" rgroup.long 0xFCC++0x3 line.long 0x0 "DCMIPP_P2CPPM0PR,DCMIPP Pipex current pixel packer Memory0 pitch register" hexmask.long.word 0x0 0.--14. 1. "PITCH,Current number of bytes between the address of two consecutive lines." rgroup.long 0xFE8++0x17 line.long 0x0 "DCMIPP_HWCFGR3,DCMIPP hardware configuration register 3" bitfld.long 0x0 0. "LSF,Lens shading" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_HWCFGR2,DCMIPP hardware configuration register 2" bitfld.long 0x4 28. "STV,Statistic version" "B_0x0,B_0x1" bitfld.long 0x4 24. "TPG,Test pattern generator" "B_0x0,B_0x1" bitfld.long 0x4 20. "MCU,Macroblock unit as pixel format" "B_0x0,B_0x1" bitfld.long 0x4 12. "ADDMOD,Address modulo computation to access a small buffer in streaming featured" "B_0x0,B_0x1" newline bitfld.long 0x4 8. "PROCCLK,Processing clock linked to AXI clock featured" "B_0x0,B_0x1" bitfld.long 0x4 4. "DBMFT,Double buffer mode featured" "0,1" bitfld.long 0x4 0.--2. "VPFT,Virtual pipe function" "0,1,2,3,4,5,6,7" line.long 0x8 "DCMIPP_HWCFGR1,DCMIPP hardware configuration register 1" hexmask.long.byte 0x8 28.--31. 1. "ROI2NB,Number of ROIs for Pipe2" hexmask.long.byte 0x8 24.--27. 1. "ROI1NB,Number of ROIs for Pipe1" bitfld.long 0x8 20.--21. "PLANARFT,Buffer features for Pipe1" "B_0x0,B_0x1,?,B_0x3" bitfld.long 0x8 16. "RB2RGB,Raw Bayer to RGB feature (demosaicer)" "0,1" newline bitfld.long 0x8 13. "DSP2FT,Down-sampling feature for the pixel Pipe2" "0,1" bitfld.long 0x8 12. "DSP1FT,Down-sampling feature for the pixel Pipe1" "0,1" bitfld.long 0x8 8. "IPPLUGCFG,IP-Plug configuration" "0,1" bitfld.long 0x8 4.--5. "PIPENB,Number of pipes" "0,1,2,3" newline bitfld.long 0x8 0. "CSIFT,CSI2 host protocol compliant" "0,1" line.long 0xC "DCMIPP_VERR,DCMIPP version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,DCMIPP major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,DCMIPP minor revision" line.long 0x10 "DCMIPP_IPIDR,DCMIPP identification register" hexmask.long 0x10 0.--31. 1. "IDR,Parallel camera interface (DCMI) and optional pixel processing (PP)" line.long 0x14 "DCMIPP_SIDR,DCMIPP size identification register" hexmask.long 0x14 0.--31. 1. "SID,4-Kbyte decoding space" tree.end tree "DCMIPP_S" base ad:0x58030000 group.long 0x0++0x7 line.long 0x0 "DCMIPP_IPGR1,DCMIPP IP-Plug global register 1" bitfld.long 0x0 24. "QOS_MODE,Quality of service" "0,1" bitfld.long 0x0 0.--2. "MEMORYPAGE,Memory page size as power of 2 of 64-byte units:" "?,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x4 "DCMIPP_IPGR2,DCMIPP IP-Plug global register 2" bitfld.long 0x4 0. "PSTART,Request to lock the IP-Plug to allow reconfiguration." "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "DCMIPP_IPGR3,DCMIPP IP-Plug global register 3" bitfld.long 0x0 0. "IDLE,Status of IP-Plug" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "DCMIPP_IPGR8,DCMIPP IP-Plug identification register" hexmask.long.byte 0x0 24.--31. 1. "IPPID,IP identifier (0xAA)" hexmask.long.byte 0x0 16.--20. 1. "ARCHIID,Architecture identifier (0x04)" hexmask.long.byte 0x0 8.--12. 1. "REVID,Revision identifier (0x03)" hexmask.long.byte 0x0 0.--5. 1. "DID,Division identifier (0x14)" group.long 0x20++0xB line.long 0x0 "DCMIPP_IPC1R1,DCMIPP IP-Plug Clientx register 1" hexmask.long.byte 0x0 8.--11. 1. "OTR,Maximum outstanding transactions" bitfld.long 0x0 0.--2. "TRAFFIC,Burst size as power of 2 of 8-byte units" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x4 "DCMIPP_IPC1R2,DCMIPP IP-Plug Clientx register 2" hexmask.long.byte 0x4 16.--19. 1. "WLRU,Ratio for WLRU[3:0] arbitration" line.long 0x8 "DCMIPP_IPC1R3,DCMIPP IP-Plug Clientx register 3" hexmask.long.word 0x8 16.--26. 1. "DPREGEND,End word (AXI width = 64 bits) of the FIFO of Clientx." hexmask.long.word 0x8 0.--10. 1. "DPREGSTART,Start word (AXI width = 64 bits) of the FIFO of Clientx." group.long 0x30++0xB line.long 0x0 "DCMIPP_IPC2R1,DCMIPP IP-Plug Clientx register 1" hexmask.long.byte 0x0 8.--11. 1. "OTR,Maximum outstanding transactions" bitfld.long 0x0 0.--2. "TRAFFIC,Burst size as power of 2 of 8-byte units" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x4 "DCMIPP_IPC2R2,DCMIPP IP-Plug Clientx register 2" hexmask.long.byte 0x4 16.--19. 1. "WLRU,Ratio for WLRU[3:0] arbitration" line.long 0x8 "DCMIPP_IPC2R3,DCMIPP IP-Plug Clientx register 3" hexmask.long.word 0x8 16.--26. 1. "DPREGEND,End word (AXI width = 64 bits) of the FIFO of Clientx." hexmask.long.word 0x8 0.--10. 1. "DPREGSTART,Start word (AXI width = 64 bits) of the FIFO of Clientx." group.long 0x40++0xB line.long 0x0 "DCMIPP_IPC3R1,DCMIPP IP-Plug Clientx register 1" hexmask.long.byte 0x0 8.--11. 1. "OTR,Maximum outstanding transactions" bitfld.long 0x0 0.--2. "TRAFFIC,Burst size as power of 2 of 8-byte units" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x4 "DCMIPP_IPC3R2,DCMIPP IP-Plug Clientx register 2" hexmask.long.byte 0x4 16.--19. 1. "WLRU,Ratio for WLRU[3:0] arbitration" line.long 0x8 "DCMIPP_IPC3R3,DCMIPP IP-Plug Clientx register 3" hexmask.long.word 0x8 16.--26. 1. "DPREGEND,End word (AXI width = 64 bits) of the FIFO of Clientx." hexmask.long.word 0x8 0.--10. 1. "DPREGSTART,Start word (AXI width = 64 bits) of the FIFO of Clientx." group.long 0x50++0xB line.long 0x0 "DCMIPP_IPC4R1,DCMIPP IP-Plug Clientx register 1" hexmask.long.byte 0x0 8.--11. 1. "OTR,Maximum outstanding transactions" bitfld.long 0x0 0.--2. "TRAFFIC,Burst size as power of 2 of 8-byte units" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x4 "DCMIPP_IPC4R2,DCMIPP IP-Plug Clientx register 2" hexmask.long.byte 0x4 16.--19. 1. "WLRU,Ratio for WLRU[3:0] arbitration" line.long 0x8 "DCMIPP_IPC4R3,DCMIPP IP-Plug Clientx register 3" hexmask.long.word 0x8 16.--26. 1. "DPREGEND,End word (AXI width = 64 bits) of the FIFO of Clientx." hexmask.long.word 0x8 0.--10. 1. "DPREGSTART,Start word (AXI width = 64 bits) of the FIFO of Clientx." group.long 0x60++0xB line.long 0x0 "DCMIPP_IPC5R1,DCMIPP IP-Plug Clientx register 1" hexmask.long.byte 0x0 8.--11. 1. "OTR,Maximum outstanding transactions" bitfld.long 0x0 0.--2. "TRAFFIC,Burst size as power of 2 of 8-byte units" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x4 "DCMIPP_IPC5R2,DCMIPP IP-Plug Clientx register 2" hexmask.long.byte 0x4 16.--19. 1. "WLRU,Ratio for WLRU[3:0] arbitration" line.long 0x8 "DCMIPP_IPC5R3,DCMIPP IP-Plug Clientx register 3" hexmask.long.word 0x8 16.--26. 1. "DPREGEND,End word (AXI width = 64 bits) of the FIFO of Clientx." hexmask.long.word 0x8 0.--10. 1. "DPREGSTART,Start word (AXI width = 64 bits) of the FIFO of Clientx." group.long 0x104++0xB line.long 0x0 "DCMIPP_PRCR,DCMIPP parallel interface control register" bitfld.long 0x0 26. "SWAPBITS,Swap LSB vs." "B_0x0,B_0x1" bitfld.long 0x0 25. "SWAPCYCLES,Swap data (cycle 0 vs." "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--23. 1. "FORMAT,Other values: data are captured and output as-is only through the data/dump pipeline (forexample JPEG or byte input format)." bitfld.long 0x0 14. "ENABLE,Parallel interface enable" "B_0x0,B_0x1" newline bitfld.long 0x0 10.--12. "EDM,Extended data mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 7. "VSPOL,Vertical synchronization polarity" "B_0x0,B_0x1" bitfld.long 0x0 6. "HSPOL,Horizontal synchronization polarity" "B_0x0,B_0x1" bitfld.long 0x0 5. "PCKPOL,Pixel clock polarity" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "ESS,Embedded synchronization select" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_PRESCR,DCMIPP parallel interface embedded synchronization code register" hexmask.long.byte 0x4 24.--31. 1. "FEC,Frame end delimiter code" hexmask.long.byte 0x4 16.--23. 1. "LEC,Line end delimiter code" hexmask.long.byte 0x4 8.--15. 1. "LSC,Line start delimiter code" hexmask.long.byte 0x4 0.--7. 1. "FSC,Frame start delimiter code" line.long 0x8 "DCMIPP_PRESUR,DCMIPP parallel interface embedded synchronization unmask register" hexmask.long.byte 0x8 24.--31. 1. "FEU,Frame end delimiter unmask" hexmask.long.byte 0x8 16.--23. 1. "LEU,Line end delimiter unmask" hexmask.long.byte 0x8 8.--15. 1. "LSU,Line start delimiter unmask" hexmask.long.byte 0x8 0.--7. 1. "FSU,Frame start delimiter unmask" group.long 0x1F4++0x3 line.long 0x0 "DCMIPP_PRIER,DCMIPP parallel interface interrupt enable register" bitfld.long 0x0 6. "ERRIE,Synchronization error interrupt enable" "B_0x0,B_0x1" rgroup.long 0x1F8++0x3 line.long 0x0 "DCMIPP_PRSR,DCMIPP parallel interface status register" bitfld.long 0x0 17. "VSYNC,This bit gives the state of the VSYNC pin with the correct programmed polarity if ENABLE bit is set into the DCMIPP_PRCR register and if the pixel clock is received." "B_0x0,B_0x1" bitfld.long 0x0 16. "HSYNC,This bit gives the state of the HSYNC pin with the correct programmed polarity if ENABLE bit is set into the DCMIPP_PRCR register and if the pixel clock is received." "B_0x0,B_0x1" bitfld.long 0x0 6. "ERRF,Synchronization error raw interrupt status" "B_0x0,B_0x1" wgroup.long 0x1FC++0x3 line.long 0x0 "DCMIPP_PRFCR,DCMIPP parallel interface interrupt clear register" bitfld.long 0x0 6. "CERRF,Synchronization error interrupt status clear" "0,1" rgroup.long 0x200++0x3 line.long 0x0 "DCMIPP_CMHWCFGR,DCMIPP common IP HW configuration register" bitfld.long 0x0 5. "CCSI,Presence of the CSI-2 host interface" "B_0x0,B_0x1" bitfld.long 0x0 4. "CPAR,Presence of the parallel interface" "B_0x0,B_0x1" bitfld.long 0x0 2.--3. "CPIPES,Amount of instantiated pipes (either dump or pixel pipes)" "0,1,2,3" group.long 0x204++0x3 line.long 0x0 "DCMIPP_CMCR,DCMIPP common configuration register" bitfld.long 0x0 7. "SWAPRB,Swap R/U and B/V" "B_0x0,B_0x1" bitfld.long 0x0 4. "CFC,Clear frame counter" "0,1" bitfld.long 0x0 1.--2. "PSFC,Pipe selection for the frame counter" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 0. "INSEL,input selection" "B_0x0,B_0x1" rgroup.long 0x208++0x3 line.long 0x0 "DCMIPP_CMFRCR,DCMIPP common frame counter register" hexmask.long 0x0 0.--31. 1. "FRMCNT,Frame counter read-only loops around." group.long 0x210++0x7 line.long 0x0 "DCMIPP_CMTPGCR1,DCMIPP common test pattern generator configuration register 1" hexmask.long.word 0x0 16.--29. 1. "HEIGHT,Height of the visible pixels of the generated frame" hexmask.long.word 0x0 0.--13. 1. "WIDTH,Width of the visible pixels of the generated frame" line.long 0x4 "DCMIPP_CMTPGCR2,DCMIPP common test pattern generator configuration register 2" hexmask.long.word 0x4 16.--31. 1. "VBL,Amount of lines of the vertical blanking" hexmask.long.byte 0x4 8.--15. 1. "FORMAT,Pixel format generated:" bitfld.long 0x4 6.--7. "RT,Raw Bayer type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 4.--5. "YT,YUV type" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 3. "PATTERN,Pattern selection between color bars and color squares" "B_0x0,B_0x1" bitfld.long 0x4 2. "GSEN,Gray scale enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "LFLEN,Lifeline enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "TPGEN,Test pattern generator enable" "B_0x0,B_0x1" group.long 0x3F0++0x3 line.long 0x0 "DCMIPP_CMIER,DCMIPP common interrupt enable register" bitfld.long 0x0 31. "P2OVRIE,Overrun interrupt status enable for Pipe2" "B_0x0,B_0x1" bitfld.long 0x0 26. "P2VSYNCIE,Vertical sync interrupt enable for Pipe2" "B_0x0,B_0x1" bitfld.long 0x0 25. "P2FRAMEIE,Frame capture complete interrupt enable for Pipe2" "B_0x0,B_0x1" bitfld.long 0x0 24. "P2LINEIE,Multi-line capture complete interrupt enable for Pipe2" "B_0x0,B_0x1" newline bitfld.long 0x0 23. "P1OVRIE,Overrun interrupt enable for Pipe1" "0,1" bitfld.long 0x0 18. "P1VSYNCIE,Vertical sync interrupt enable for Pipe1" "B_0x0,B_0x1" bitfld.long 0x0 17. "P1FRAMEIE,Frame capture complete interrupt enable for Pipe1" "B_0x0,B_0x1" bitfld.long 0x0 16. "P1LINEIE,Multi-line capture complete interrupt status clear for Pipe1" "B_0x0,B_0x1" newline bitfld.long 0x0 15. "P0OVRIE,Overrun interrupt enable for Pipe0" "B_0x0,B_0x1" bitfld.long 0x0 14. "P0LIMITIE,Limit interrupt enable for Pipe0" "B_0x0,B_0x1" bitfld.long 0x0 10. "P0VSYNCIE,Vertical sync interrupt enable for Pipe0" "B_0x0,B_0x1" bitfld.long 0x0 9. "P0FRAMEIE,Frame capture complete interrupt enable for Pipe0" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "P0LINEIE,Multi-line capture complete interrupt enable for Pipe0" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRERRIE,Limit interrupt enable for the parallel Interface" "B_0x0,B_0x1" bitfld.long 0x0 5. "ATXERRIE,AXI transfer error interrupt enable for IP-Plug" "B_0x0,B_0x1" rgroup.long 0x3F4++0x7 line.long 0x0 "DCMIPP_CMSR1,DCMIPP common status register 1" bitfld.long 0x0 31. "P2CPTACT,Active frame capture (active from start-of-frame to frame complete) for Pipe2" "B_0x0,B_0x1" bitfld.long 0x0 25. "P2LSTFRM,Last frame LSB bit sampled at frame capture complete event for Pipe2" "0,1" bitfld.long 0x0 24. "P2LSTLINE,Last line LSB bit sampled at frame capture complete event for Pipe2" "0,1" bitfld.long 0x0 23. "P1CPTACT,Active frame capture (active from start-of-frame to frame complete) for Pipe1" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "P1LSTFRM,Last frame LSB bit sampled at frame capture complete event for Pipe1" "0,1" bitfld.long 0x0 16. "P1LSTLINE,Last line LSB bit sampled at Frame capture complete event for Pipe1" "0,1" bitfld.long 0x0 15. "P0CPTACT,Active frame capture (active from start-of-frame to frame complete) for Pipe0" "B_0x0,B_0x1" bitfld.long 0x0 9. "P0LSTFRM,Last frame LSB bit sampled at Frame capture complete event for Pipe0" "0,1" newline bitfld.long 0x0 8. "P0LSTLINE,Last line LSB bit sampled at Frame capture complete event for Pipe0" "0,1" bitfld.long 0x0 1. "PRVSYNC,This bit gives the state of the VSYNC pin with the correct programmed polarity on the parallel interface if ENABLE bit is set into the DCMIPP_PRCR register and if the pixel clock is received." "B_0x0,B_0x1" bitfld.long 0x0 0. "PRHSYNC,This bit gives the state of the HSYNC pin with the correct programmed polarity on the parallel interface if ENABLE bit is set into the DCMIPP_PRCR register and if the pixel clock is received." "B_0x0,B_0x1" line.long 0x4 "DCMIPP_CMSR2,DCMIPP common status register 2" bitfld.long 0x4 31. "P2OVRF,Overrun raw interrupt status for Pipe2" "B_0x0,B_0x1" bitfld.long 0x4 26. "P2VSYNCF,VSYNC raw interrupt status for Pipe2" "0,1" bitfld.long 0x4 25. "P2FRAMEF,Frame capture completed raw interrupt status for Pipe2" "B_0x0,B_0x1" bitfld.long 0x4 24. "P2LINEF,Multi-line capture completed raw interrupt status for Pipe2" "0,1" newline bitfld.long 0x4 23. "P1OVRF,Overrun raw interrupt status for Pipe1" "B_0x0,B_0x1" bitfld.long 0x4 18. "P1VSYNCF,VSYNC raw interrupt status for Pipe1" "0,1" bitfld.long 0x4 17. "P1FRAMEF,Frame capture completed raw interrupt status for Pipe1" "B_0x0,B_0x1" bitfld.long 0x4 16. "P1LINEF,Multi-line capture completed raw interrupt status for Pipe1" "0,1" newline bitfld.long 0x4 15. "P0OVRF,Overrun raw interrupt status for Pipe0" "B_0x0,B_0x1" bitfld.long 0x4 14. "P0LIMITF,Limit raw interrupt status for Pipe0" "0,1" bitfld.long 0x4 10. "P0VSYNCF,VSYNC raw interrupt status for Pipe0" "0,1" bitfld.long 0x4 9. "P0FRAMEF,Frame capture completed raw interrupt status for Pipe0" "B_0x0,B_0x1" newline bitfld.long 0x4 8. "P0LINEF,Multi-line capture completed raw interrupt status for Pipe0" "0,1" bitfld.long 0x4 6. "PRERRF,Synchronization error raw interrupt status for the parallel interface." "B_0x0,B_0x1" bitfld.long 0x4 5. "ATXERRF,AXI transfer error interrupt status flag for the IP-Plug." "B_0x0,B_0x1" wgroup.long 0x3FC++0x3 line.long 0x0 "DCMIPP_CMFCR,DCMIPP common interrupt clear register" bitfld.long 0x0 31. "CP2OVRF,Overrun interrupt status clear" "0,1" bitfld.long 0x0 26. "CP2VSYNCF,Vertical synchronization interrupt status clear" "0,1" bitfld.long 0x0 25. "CP2FRAMEF,Frame capture complete interrupt status clear" "0,1" bitfld.long 0x0 24. "CP2LINEF,Multi-line capture complete interrupt status clear" "0,1" newline bitfld.long 0x0 23. "CP1OVRF,Overrun interrupt status clear" "0,1" bitfld.long 0x0 18. "CP1VSYNCF,Vertical synchronization interrupt status clear" "0,1" bitfld.long 0x0 17. "CP1FRAMEF,Frame capture complete interrupt status clear" "0,1" bitfld.long 0x0 16. "CP1LINEF,Multi-line capture complete interrupt status clear" "0,1" newline bitfld.long 0x0 15. "CP0OVRF,Overrun interrupt status clear" "0,1" bitfld.long 0x0 14. "CP0LIMITF,limit interrupt status clear" "0,1" bitfld.long 0x0 10. "CP0VSYNCF,Vertical synchronization interrupt status clear" "0,1" bitfld.long 0x0 9. "CP0FRAMEF,Frame capture complete interrupt status clear" "0,1" newline bitfld.long 0x0 8. "CP0LINEF,Multi-line capture complete interrupt status clear" "0,1" bitfld.long 0x0 6. "CPRERRF,Synchronization error interrupt status clear" "0,1" bitfld.long 0x0 5. "CATXERRF,AXI transfer error interrupt status clear" "0,1" rgroup.long 0x400++0x3 line.long 0x0 "DCMIPP_P0HWCFGR,DCMIPP Pipe0 HW configuration register" bitfld.long 0x0 13. "CVP,Capability for pipeline virtualization" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--11. 1. "CROI,Capability for ROI: defines the number of ROIs in the pipe" bitfld.long 0x0 6.--7. "CGM,Capability for gamma conversions" "B_0x0,B_0x1,?,?" bitfld.long 0x0 4.--5. "CRB,Capability for demosaicing" "B_0x0,B_0x1,?,?" newline bitfld.long 0x0 3. "DBM,Double buffer mode" "B_0x0,B_0x1" bitfld.long 0x0 2. "CDS,Capability for downsize filter" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CPLA,Capability for planar buffers" "B_0x0,B_0x1,B_0x2,?" group.long 0x404++0x3 line.long 0x0 "DCMIPP_P0FSCR,DCMIPP Pipe0 flow selection configuration register" bitfld.long 0x0 31. "PIPEN,Activation of PipeN" "B_0x0,B_0x1" bitfld.long 0x0 19.--20. "VC,Flow selection mode" "0,1,2,3" bitfld.long 0x0 16.--17. "DTMODE,Flow selection mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 8.--13. 1. "DTIDB,Data type selection ID B" newline hexmask.long.byte 0x0 0.--5. 1. "DTIDA,Data type selection ID A" group.long 0x500++0xB line.long 0x0 "DCMIPP_P0FCTCR,DCMIPP Pipe0 flow control configuration register" bitfld.long 0x0 3. "CPTREQ,Capture requested" "B_0x0,B_0x1" bitfld.long 0x0 2. "CPTMODE,Capture mode" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "FRATE,Frame capture rate control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "DCMIPP_P0SCSTR,DCMIPP Pipe0 statistic/crop start register" hexmask.long.word 0x4 16.--27. 1. "VSTART,Vertical start from 0 to 4094 pixels high" hexmask.long.word 0x4 0.--11. 1. "HSTART,Horizontal start from 0 to 4094 words wide" line.long 0x8 "DCMIPP_P0SCSZR,DCMIPP Pipe0 statistic/crop size register" bitfld.long 0x8 31. "ENABLE,This bit is set and cleared by software." "B_0x0,B_0x1" bitfld.long 0x8 30. "POSNEG,This bit is set and cleared by software." "B_0x0,B_0x1" hexmask.long.word 0x8 16.--27. 1. "VSIZE,Vertical size from 0 to 4094 pixels high" hexmask.long.word 0x8 0.--11. 1. "HSIZE,Horizontal size from 0 to 4094 word wide (data 32-bit)" rgroup.long 0x5B0++0x3 line.long 0x0 "DCMIPP_P0DCCNTR,DCMIPP Pipe0 dump counter register" hexmask.long 0x0 0.--25. 1. "CNT,Number of data dumped during the frame." group.long 0x5B4++0x3 line.long 0x0 "DCMIPP_P0DCLMTR,DCMIPP Pipe0 dump limit register" bitfld.long 0x0 31. "ENABLE,None" "B_0x0,B_0x1" hexmask.long.tbyte 0x0 0.--23. 1. "LIMIT,Maximum number of 32-bit data that can be dumped during a frame after the crop 2D operation." group.long 0x5C0++0x7 line.long 0x0 "DCMIPP_P0PPCR,DCMIPP Pipe0 pixel packer configuration register" bitfld.long 0x0 13.--15. "LINEMULT,Amount of capture completed lines for LINE event and interrupt" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 11. "OELS,Odd/even line select (line select start)" "B_0x0,B_0x1" bitfld.long 0x0 10. "LSM,Line select mode" "B_0x0,B_0x1" bitfld.long 0x0 9. "OEBS,Odd/even byte select (byte select start)" "B_0x0,B_0x1" newline bitfld.long 0x0 7.--8. "BSM,Byte select mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 6. "HEADEREN,CSI header dump enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "PAD,Pad mode for monochrome and raw Bayer 10/12/14 bpp (MSB vs." "B_0x0,B_0x1" bitfld.long 0x0 0. "SWAPYUV,Swaps within a 32-bit word byte 0-vs-1 and byte 2-vs-3." "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P0PPM0AR1,DCMIPP Pipe0 pixel packer Memory0 address register 1" hexmask.long 0x4 0.--31. 1. "M0A,Memory0 address" rgroup.long 0x5D0++0x3 line.long 0x0 "DCMIPP_P0STM0AR,DCMIPP Pipe0 status Memory0 address register" hexmask.long 0x0 0.--31. 1. "M0A,Memory0 address" group.long 0x5F4++0x3 line.long 0x0 "DCMIPP_P0IER,DCMIPP Pipe0 interrupt enable register" bitfld.long 0x0 7. "OVRIE,Overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "LIMITIE,Limit interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "VSYNCIE,VSYNC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "FRAMEIE,Frame capture completed interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "LINEIE,Multi-line capture completed interrupt enable" "B_0x0,B_0x1" rgroup.long 0x5F8++0x3 line.long 0x0 "DCMIPP_P0SR,DCMIPP Pipe0 status register" bitfld.long 0x0 23. "CPTACT,Capture immediate status" "B_0x0,B_0x1" bitfld.long 0x0 17. "LSTFRM,Last frame LSB bit sampled at frame capture complete event." "0,1" bitfld.long 0x0 16. "LSTLINE,Last line LSB bit sampled at frame capture complete event." "0,1" bitfld.long 0x0 7. "OVRF,Overrun raw interrupt status" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "LIMITF,Limit raw interrupt status" "0,1" bitfld.long 0x0 2. "VSYNCF,VSYNC raw interrupt status" "0,1" bitfld.long 0x0 1. "FRAMEF,Frame capture completed raw interrupt status" "B_0x0,B_0x1" bitfld.long 0x0 0. "LINEF,Multi-line capture completed raw interrupt status" "0,1" wgroup.long 0x5FC++0x3 line.long 0x0 "DCMIPP_P0FCR,DCMIPP Pipe0 interrupt clear register" bitfld.long 0x0 7. "COVRF,Overrun interrupt status clear" "0,1" bitfld.long 0x0 6. "CLIMITF,limit interrupt status clear" "0,1" bitfld.long 0x0 2. "CVSYNCF,Vertical synchronization interrupt status clear" "0,1" bitfld.long 0x0 1. "CFRAMEF,Frame capture complete interrupt status clear" "0,1" newline bitfld.long 0x0 0. "CLINEF,Multi-line capture complete interrupt status clear" "0,1" rgroup.long 0x604++0x3 line.long 0x0 "DCMIPP_P0CFSCR,DCMIPP Pipe0 current flow selection configuration register" bitfld.long 0x0 31. "PIPEN,Current activation of PipeN" "B_0x0,B_0x1" bitfld.long 0x0 19.--20. "VC,Current flow selection mode" "0,1,2,3" bitfld.long 0x0 16.--17. "DTMODE,Flow selection mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 8.--13. 1. "DTIDB,Current data type selection ID B" newline hexmask.long.byte 0x0 0.--5. 1. "DTIDA,Current data type selection ID A" rgroup.long 0x700++0xB line.long 0x0 "DCMIPP_P0CFCTCR,DCMIPP Pipe0 current flow control configuration register" bitfld.long 0x0 3. "CPTREQ,Capture requested" "B_0x0,B_0x1" bitfld.long 0x0 2. "CPTMODE,Capture mode" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "FRATE,Frame capture rate control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "DCMIPP_P0CSCSTR,DCMIPP Pipe0 current statistic/crop start register" hexmask.long.word 0x4 16.--27. 1. "VSTART,Current vertical start from 0 to 4094 pixels high" hexmask.long.word 0x4 0.--11. 1. "HSTART,Current horizontal start from 0 to 4094 words wide" line.long 0x8 "DCMIPP_P0CSCSZR,DCMIPP Pipe0 current statistic/crop size register" bitfld.long 0x8 31. "ENABLE,Current value of the ENABLE bit" "B_0x0,B_0x1" bitfld.long 0x8 30. "POSNEG,Current value of the POSNEG bit" "B_0x0,B_0x1" hexmask.long.word 0x8 16.--27. 1. "VSIZE,Current vertical size from 0 to 4094 pixels high." hexmask.long.word 0x8 0.--11. 1. "HSIZE,Current horizontal size from 0 to 4094 word wide (data 32-bit)." rgroup.long 0x7C0++0x7 line.long 0x0 "DCMIPP_P0CPPCR,DCMIPP Pipe0 current pixel packer configuration register" bitfld.long 0x0 13.--15. "LINEMULT,Current amount of capture completed lines for LINE event and interrupt" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 11. "OELS,Current odd/even line select (ine select start)" "B_0x0,B_0x1" bitfld.long 0x0 10. "LSM,Current Line select mode" "B_0x0,B_0x1" bitfld.long 0x0 9. "OEBS,Current odd/even byte select (byte select start)" "B_0x0,B_0x1" newline bitfld.long 0x0 7.--8. "BSM,Current Byte select mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 6. "HEADEREN,Current CSI header dump enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "PAD,Current Pad mode for monochrome and raw Bayer 10/12/14 bpp (MSB vs." "B_0x0,B_0x1" bitfld.long 0x0 0. "SWAPYUV,Swaps within a 32-bit word byte 0 vs." "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P0CPPM0AR1,DCMIPP Pipe0 current pixel packer Memory0 address register 1" hexmask.long 0x4 0.--31. 1. "M0A,Memory0 address" rgroup.long 0x800++0x3 line.long 0x0 "DCMIPP_P1HWCFGR,DCMIPP Pipex HW configuration register" bitfld.long 0x0 18. "CFOC,Capability for focus extraction" "B_0x0,B_0x1" bitfld.long 0x0 17. "CLS,Capability for lens shading" "B_0x0,B_0x1" bitfld.long 0x0 16. "CHS,Capability to extract histograms" "B_0x0,B_0x1" bitfld.long 0x0 13. "CVP,Capability for pipeline virtualization" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "CROI,Capability for ROI: defines the number of ROIs in the pipe" bitfld.long 0x0 6.--7. "CGM,Capability for gamma conversions" "B_0x0,B_0x1,?,?" bitfld.long 0x0 4.--5. "CRB,Capability for demosaicing" "B_0x0,B_0x1,?,?" bitfld.long 0x0 3. "DBM,Double buffer mode" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "CDS,Capability for downsize filter" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CPLA,Capability for planar buffers" "B_0x0,B_0x1,B_0x2,?" group.long 0x804++0x3 line.long 0x0 "DCMIPP_P1FSCR,DCMIPP Pipe1 flow selection configuration register" bitfld.long 0x0 31. "PIPEN,Activation of PipeN" "B_0x0,B_0x1" bitfld.long 0x0 30. "FDTFEN,Force Datatype format enable" "B_0x0,?" hexmask.long.byte 0x0 24.--29. 1. "FDTF,Force Datatype format" bitfld.long 0x0 19.--20. "VC,Flow selection mode" "0,1,2,3" newline bitfld.long 0x0 18. "PIPEDIFF,Differentiates Pipe2 from Pipe1" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DTMODE,Flow selection mode" "B_0x0,B_0x1,?,?" hexmask.long.byte 0x0 8.--13. 1. "DTIDB,Data type selection ID B" hexmask.long.byte 0x0 0.--5. 1. "DTIDA,Data type selection ID A" group.long 0x820++0x7 line.long 0x0 "DCMIPP_P1SRCR,DCMIPP Pipe1 stat removal configuration register" bitfld.long 0x0 15. "CROPEN,Crop line enable" "B_0x0,B_0x1" bitfld.long 0x0 12.--14. "FIRSTLINEDEL,Amount of first lines to delete when CROPEN = 1" "0,1,2,3,4,5,6,7" hexmask.long.word 0x0 0.--11. 1. "LASTLINE,Amount of following lines to keep when CROPEN = 1." line.long 0x4 "DCMIPP_P1BPRCR,DCMIPP Pipe1 bad pixel removal control register" bitfld.long 0x4 1.--3. "STRENGTH,Strength (aggressiveness) of the bad pixel detection" "B_0x0,?,?,?,?,?,?,B_0x7" bitfld.long 0x4 0. "ENABLE,Bad pixel detection must be enabled only for raw Bayer flows as it corrupts RGB flows." "B_0x0,B_0x1" rgroup.long 0x828++0x3 line.long 0x0 "DCMIPP_P1BPRSR,DCMIPP Pipe1 bad pixel removal status register" hexmask.long.word 0x0 0.--11. 1. "BADCNT,Amount of detected bad pixels" group.long 0x830++0x3 line.long 0x0 "DCMIPP_P1DECR,DCMIPP Pipe1 decimation register" bitfld.long 0x0 3.--4. "VDEC,Vertical decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "HDEC,Horizontal decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0. "ENABLE,None" "B_0x0,B_0x1" group.long 0x840++0xB line.long 0x0 "DCMIPP_P1BLCCR,DCMIPP Pipe1 black level calibration control register" hexmask.long.byte 0x0 24.--31. 1. "BLCR,Black level calibration - Red" hexmask.long.byte 0x0 16.--23. 1. "BLCG,Black level calibration - Green" hexmask.long.byte 0x0 8.--15. 1. "BLCB,Black level calibration - Blue" bitfld.long 0x0 0. "ENABLE,Black level calibration" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P1EXCR1,DCMIPP Pipe1 exposure control register 1" bitfld.long 0x4 28.--30. "SHFR,Exposure shift - Red" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 20.--27. 1. "MULTR,Exposure multiplier - Red" bitfld.long 0x4 0. "ENABLE,Exposure control (multiplication and shift) of all red green and blue" "B_0x0,B_0x1" line.long 0x8 "DCMIPP_P1EXCR2,DCMIPP Pipe1 exposure control register 2" bitfld.long 0x8 28.--30. "SHFG,Exposure shift - Green" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 20.--27. 1. "MULTG,Exposure multiplier - Green" bitfld.long 0x8 12.--14. "SHFB,Exposure shift - Blue" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 4.--11. 1. "MULTB,Exposure multiplier - Blue" group.long 0x850++0x13 line.long 0x0 "DCMIPP_P1ST1CR,DCMIPP Pipe1 statistics1 control register" bitfld.long 0x0 7. "MODE,Statistics mode" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRC,Statistics source" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2.--3. "BINS,Current bin definition" "B_0x0_MODE__EQUAL_BINS,B_0x1_MODE__EQUAL_BINS,B_0x2_MODE__EQUAL_BINS,B_0x3_MODE__EQUAL_BINS" bitfld.long 0x0 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P1ST2CR,DCMIPP Pipe1 statistics 2 control register" bitfld.long 0x4 7. "MODE,Statistics mode" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "SRC,Statistics source" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2.--3. "BINS,Bin definition" "B_0x0_MODE__EQUAL_BINS,B_0x1_MODE__EQUAL_BINS,B_0x2_MODE__EQUAL_BINS,B_0x3_MODE__EQUAL_BINS" bitfld.long 0x4 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x8 "DCMIPP_P1ST3CR,DCMIPP Pipe1 statistics 3 control register" bitfld.long 0x8 7. "MODE,Statistics mode" "B_0x0,B_0x1" bitfld.long 0x8 4.--6. "SRC,Statistics source" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2.--3. "BINS,Bin definition" "B_0x0_MODE__EQUAL_BINS,B_0x1_MODE__EQUAL_BINS,B_0x2_MODE__EQUAL_BINS,B_0x3_MODE__EQUAL_BINS" bitfld.long 0x8 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0xC "DCMIPP_P1STSTR,DCMIPP Pipe1 statistics window start register" hexmask.long.word 0xC 16.--27. 1. "VSTART,Vertical start from 0 to 4094 pixels high" hexmask.long.word 0xC 0.--11. 1. "HSTART,Horizontal start from 0 to 4094 pixels wide" line.long 0x10 "DCMIPP_P1STSZR,DCMIPP Pipe1 statistics window size register" bitfld.long 0x10 31. "CROPEN,None" "B_0x0,B_0x1" hexmask.long.word 0x10 16.--27. 1. "VSIZE,Vertical size from 0 to 4094 pixels high" hexmask.long.word 0x10 0.--11. 1. "HSIZE,Horizontal size from 0 to 4094 pixels wide" rgroup.long 0x864++0xB line.long 0x0 "DCMIPP_P1ST1SR,DCMIPP Pipe1 statistics 1 status register" hexmask.long.tbyte 0x0 0.--23. 1. "ACCU,Accumulation result divided by 256." line.long 0x4 "DCMIPP_P1ST2SR,DCMIPP Pipe1 statistics 2 status register" hexmask.long.tbyte 0x4 0.--23. 1. "ACCU,accumulation result divided by 256." line.long 0x8 "DCMIPP_P1ST3SR,DCMIPP Pipe1 statistics 3 status register" hexmask.long.tbyte 0x8 0.--23. 1. "ACCU,accumulation result divided by 256." group.long 0x870++0x3 line.long 0x0 "DCMIPP_P1DMCR,DCMIPP Pipe1 demosaicing configuration register" bitfld.long 0x0 28.--30. "EDGE,Strength of the edge detection" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 24.--26. "LINEH,Strength of the horizontal line detection" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 20.--22. "LINEV,Strength of the vertical line detection" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 16.--18. "PEAK,Strength of the peak detection" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x0 1.--2. "TYPE,Raw Bayer type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0. "ENABLE,None" "B_0x0,B_0x1" group.long 0x880++0x1B line.long 0x0 "DCMIPP_P1CCCR,DCMIPP Pipe1 ColorConv configuration register" bitfld.long 0x0 2. "CLAMP,Clamp the output samples" "B_0x0,B_0x1" bitfld.long 0x0 1. "TYPE,output samples type used while CLAMP is activated" "B_0x0,B_0x1" bitfld.long 0x0 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P1CCRR1,DCMIPP Pipe1 ColorConv red coefficient register 1" hexmask.long.word 0x4 16.--26. 1. "RG,Coefficient row 1 column 2 of the matrix" hexmask.long.word 0x4 0.--10. 1. "RR,Coefficient row 1 column 1 of the matrix" line.long 0x8 "DCMIPP_P1CCRR2,DCMIPP Pipe1 ColorConv red coefficient register 2" hexmask.long.word 0x8 16.--25. 1. "RA,Coefficient row 1 of the added column (signed integer value)" hexmask.long.word 0x8 0.--10. 1. "RB,Coefficient row 1 column 3 of the matrix" line.long 0xC "DCMIPP_P1CCGR1,DCMIPP Pipe1 ColorConv green coefficient register 1" hexmask.long.word 0xC 16.--26. 1. "GG,Coefficient row 2 column 2 of the matrix" hexmask.long.word 0xC 0.--10. 1. "GR,Coefficient row 2 column 1 of the matrix" line.long 0x10 "DCMIPP_P1CCGR2,DCMIPP Pipe1 ColorConv green coefficient register 2" hexmask.long.word 0x10 16.--25. 1. "GA,Coefficient row 2 of the added column (signed integer value)" hexmask.long.word 0x10 0.--10. 1. "GB,Coefficient row 2 column 3 of the matrix" line.long 0x14 "DCMIPP_P1CCBR1,DCMIPP Pipex ColorConv blue coefficient register 1" hexmask.long.word 0x14 16.--26. 1. "BG,Coefficient row 3 column 2 of the matrix" hexmask.long.word 0x14 0.--10. 1. "BR,Coefficient row 3 column 1 of the matrix" line.long 0x18 "DCMIPP_P1CCBR2,DCMIPP Pipe1 ColorConv blue coefficient register 2" hexmask.long.word 0x18 16.--25. 1. "BA,Coefficient row 3 of the added column (signed integer value)" hexmask.long.word 0x18 0.--10. 1. "BB,Coefficient row 3 column 3 of the matrix" group.long 0x8A0++0xB line.long 0x0 "DCMIPP_P1CTCR1,DCMIPP Pipe1 contrast control register 1" hexmask.long.byte 0x0 9.--14. 1. "LUM0,Luminance increase for input luminance of 0 (increase is idle with LUMx = 16)" bitfld.long 0x0 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P1CTCR2,DCMIPP Pipe1 contrast control register 2" hexmask.long.byte 0x4 25.--30. 1. "LUM1,Luminance increase for input luminance of 32 (increase is idle with LUMx = 16)" hexmask.long.byte 0x4 17.--22. 1. "LUM2,Luminance increase for input luminance of 64 (increase is idle with LUMx = 16)" hexmask.long.byte 0x4 9.--14. 1. "LUM3,Luminance increase for input luminance of 96 (increase is idle with LUMx = 16)" hexmask.long.byte 0x4 1.--6. 1. "LUM4,Luminance increase for input luminance of 128 (increase is idle with LUMx = 16)" line.long 0x8 "DCMIPP_P1CTCR3,DCMIPP Pipe1 contrast control register 3" hexmask.long.byte 0x8 25.--30. 1. "LUM5,Luminance increase for input luminance of 160 (increase is idle with LUMx = 16)" hexmask.long.byte 0x8 17.--22. 1. "LUM6,Luminance increase for input luminance of 192 (increase is idle with LUMx = 16)" hexmask.long.byte 0x8 9.--14. 1. "LUM7,Luminance increase for input luminance of 224 (increase is idle with LUMx = 16)" hexmask.long.byte 0x8 1.--6. 1. "LUM8,Luminance increase for input luminance of 256 (increase is idle with LUMx = 16)" group.long 0x900++0x1B line.long 0x0 "DCMIPP_P1FCTCR,DCMIPP Pipex flow control configuration register" bitfld.long 0x0 3. "CPTREQ,Capture requested" "B_0x0,B_0x1" bitfld.long 0x0 2. "CPTMODE,Capture mode" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "FRATE,Frame capture rate control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "DCMIPP_P1CRSTR,DCMIPP Pipex crop window start register" hexmask.long.word 0x4 16.--27. 1. "VSTART,Vertical start from 0 to 4094 pixels high" hexmask.long.word 0x4 0.--11. 1. "HSTART,Horizontal start from 0 to 4094 pixels wide" line.long 0x8 "DCMIPP_P1CRSZR,DCMIPP Pipex crop window size register" bitfld.long 0x8 31. "ENABLE,None" "B_0x0,B_0x1" hexmask.long.word 0x8 16.--27. 1. "VSIZE,Vertical size from 0 to 4094 pixels high." hexmask.long.word 0x8 0.--11. 1. "HSIZE,Horizontal size from 0 to 4094 pixels wide." line.long 0xC "DCMIPP_P1DCCR,DCMIPP Pipex decimation register" bitfld.long 0xC 3.--4. "VDEC,Vertical decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 1.--2. "HDEC,Horizontal decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x10 "DCMIPP_P1DSCR,DCMIPP Pipex downsize configuration register" bitfld.long 0x10 31. "ENABLE,None" "B_0x0,B_0x1" hexmask.long.word 0x10 16.--25. 1. "VDIV,Vertical division factor from 128 (8x) to 1023 (1x)" hexmask.long.word 0x10 0.--9. 1. "HDIV,Horizontal division factor from 128 (8x) to 1023 (1x)" line.long 0x14 "DCMIPP_P1DSRTIOR,DCMIPP Pipex downsize ratio register" hexmask.long.word 0x14 16.--31. 1. "VRATIO,Vertical ratio from 8192 (1x) to 65535 (8x)" hexmask.long.word 0x14 0.--15. 1. "HRATIO,Horizontal ratio from 8192 (1x) to 65535 (8x)" line.long 0x18 "DCMIPP_P1DSSZR,DCMIPP Pipex downsize destination size register" hexmask.long.word 0x18 16.--27. 1. "VSIZE,Vertical size from 0 to 4094 pixels high" hexmask.long.word 0x18 0.--11. 1. "HSIZE,Horizontal size from 0 to 4094 pixels wide" group.long 0x970++0x3 line.long 0x0 "DCMIPP_P1GMCR,DCMIPP Pipex gamma configuration register" bitfld.long 0x0 0. "ENABLE,None" "B_0x0,B_0x1" group.long 0x980++0x1B line.long 0x0 "DCMIPP_P1YUVCR,DCMIPP Pipe1 YUVConv configuration register" bitfld.long 0x0 2. "CLAMP,Clamp the output samples" "B_0x0,B_0x1" bitfld.long 0x0 1. "TYPE,Output samples type used while CLAMP is activated" "B_0x0,B_0x1" bitfld.long 0x0 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P1YUVRR1,DCMIPP Pipe1 YUVConv red coefficient register 1" hexmask.long.word 0x4 16.--26. 1. "RG,Coefficient row 1 column 2 of the matrix" hexmask.long.word 0x4 0.--10. 1. "RR,Coefficient row 1 column 1 of the matrix" line.long 0x8 "DCMIPP_P1YUVRR2,DCMIPP Pipe1 YUVConv red coefficient register 2" hexmask.long.word 0x8 16.--25. 1. "RA,Coefficient row 1 of the added column (signed integer value)" hexmask.long.word 0x8 0.--10. 1. "RB,Coefficient row 1 column 3 of the matrix" line.long 0xC "DCMIPP_P1YUVGR1,DCMIPP Pipe1 YUVConv green coefficient register 1" hexmask.long.word 0xC 16.--26. 1. "GG,Coefficient row 2 column 2 of the matrix" hexmask.long.word 0xC 0.--10. 1. "GR,Coefficient row 2 column 1 of the matrix" line.long 0x10 "DCMIPP_P1YUVGR2,DCMIPP Pipe1 YUVConv green coefficient register 2" hexmask.long.word 0x10 16.--25. 1. "GA,Coefficient row 2 of the added column (signed integer value)" hexmask.long.word 0x10 0.--10. 1. "GB,Coefficient row 2 column 3 of the matrix" line.long 0x14 "DCMIPP_P1YUVBR1,DCMIPP Pipe1 YUVConv blue coefficient register 1" hexmask.long.word 0x14 16.--26. 1. "BG,Coefficient row 3 column 2 of the matrix" hexmask.long.word 0x14 0.--10. 1. "BR,Coefficient row 3 column 1 of the matrix" line.long 0x18 "DCMIPP_P1YUVBR2,DCMIPP Pipe1 YUV blue coefficient register 2" hexmask.long.word 0x18 16.--25. 1. "BA,Coefficient row 3 of the added column (signed integer value)" hexmask.long.word 0x18 0.--10. 1. "BB,Coefficient row 3 column 3 of the matrix" group.long 0x9C0++0x7 line.long 0x0 "DCMIPP_P1PPCR,DCMIPP Pipe1 pixel packer configuration register" bitfld.long 0x0 13.--15. "LINEMULT,Amount of capture completed lines for LINE Event and Interrupt" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 4. "SWAPRB,Swaps R-vs-B components if RGB and U-vs-V components if YUV" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--3. 1. "FORMAT,Memory format" line.long 0x4 "DCMIPP_P1PPM0AR1,DCMIPP Pipe1 pixel packer Memory0 address register 1" hexmask.long 0x4 0.--31. 1. "M0A,Memory0 address" group.long 0x9CC++0x3 line.long 0x0 "DCMIPP_P1PPM0PR,DCMIPP Pipex pixel packer Memory0 pitch register" hexmask.long.word 0x0 0.--14. 1. "PITCH,Number of bytes between the address of two consecutive lines." rgroup.long 0x9D0++0x3 line.long 0x0 "DCMIPP_P1STM0AR,DCMIPP Pipex status Memory0 address register" hexmask.long 0x0 0.--31. 1. "M0A,Memory0 address" group.long 0x9D4++0x3 line.long 0x0 "DCMIPP_P1PPM1AR1,DCMIPP Pipex pixel packer Memory1 address register 1" hexmask.long 0x0 0.--31. 1. "M1A,Memory1 address" group.long 0x9DC++0x3 line.long 0x0 "DCMIPP_P1PPM1PR,DCMIPP Pipex pixel packer Memory1 pitch register" hexmask.long.word 0x0 0.--14. 1. "PITCH,Number of bytes between the address of two consecutive lines." rgroup.long 0x9E0++0x3 line.long 0x0 "DCMIPP_P1STM1AR,DCMIPP Pipex status Memory1 address register" hexmask.long 0x0 0.--31. 1. "M1A,Memory1 address" group.long 0x9E4++0x3 line.long 0x0 "DCMIPP_P1PPM2AR1,DCMIPP Pipex pixel packer memory2 address register 1" hexmask.long 0x0 0.--31. 1. "M2A,Memory 2 address" rgroup.long 0x9F0++0x3 line.long 0x0 "DCMIPP_P1STM2AR,DCMIPP Pipex status Memory2 address register" hexmask.long 0x0 0.--31. 1. "M2A,Memory2 address" group.long 0x9F4++0x3 line.long 0x0 "DCMIPP_P1IER,DCMIPP Pipe1 interrupt enable register" bitfld.long 0x0 7. "OVRIE,Overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "VSYNCIE,VSYNC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "FRAMEIE,Frame capture completed interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "LINEIE,Multi-line capture completed interrupt enable" "B_0x0,B_0x1" rgroup.long 0x9F8++0x3 line.long 0x0 "DCMIPP_P1SR,DCMIPP Pipe1 status register" bitfld.long 0x0 23. "CPTACT,Capture immediate status" "B_0x0,B_0x1" bitfld.long 0x0 17. "LSTFRM,Last frame LSB bit sampled at frame capture complete event." "0,1" bitfld.long 0x0 16. "LSTLINE,Last line LSB bit sampled at frame capture complete event." "0,1" bitfld.long 0x0 7. "OVRF,Overrun raw interrupt status" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "VSYNCF,VSYNC raw interrupt status" "0,1" bitfld.long 0x0 1. "FRAMEF,Frame capture completed raw interrupt status" "B_0x0,B_0x1" bitfld.long 0x0 0. "LINEF,Multi-line capture completed raw interrupt status" "0,1" wgroup.long 0x9FC++0x3 line.long 0x0 "DCMIPP_P1FCR,DCMIPP Pipe1 interrupt clear register" bitfld.long 0x0 7. "COVRF,Overrun interrupt status clear" "0,1" bitfld.long 0x0 2. "CVSYNCF,Vertical synchronization interrupt status clear" "0,1" bitfld.long 0x0 1. "CFRAMEF,Frame capture complete interrupt status clear" "0,1" bitfld.long 0x0 0. "CLINEF,Multi-line capture complete interrupt status clear" "0,1" rgroup.long 0xA04++0x3 line.long 0x0 "DCMIPP_P1CFSCR,DCMIPP Pipe1 current flow selection configuration register" bitfld.long 0x0 31. "PIPEN,Current activation of PipeN" "B_0x0,B_0x1" bitfld.long 0x0 30. "FDTFEN,Current force data type format enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 24.--29. 1. "FDTF,Current force data type format" bitfld.long 0x0 19.--20. "VC,Current flow selection mode" "0,1,2,3" newline bitfld.long 0x0 18. "PIPEDIFF,Current differentiates Pipe2 vs." "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DTMODE,Flow selection mode" "B_0x0,B_0x1,?,?" hexmask.long.byte 0x0 8.--13. 1. "DTIDB,Current data type ID B" hexmask.long.byte 0x0 0.--5. 1. "DTIDA,Current data type ID A" rgroup.long 0xA24++0x3 line.long 0x0 "DCMIPP_P1CBPRCR,DCMIPP Pipe1 current bad pixel removal register" bitfld.long 0x0 1.--3. "STRENGTH,Current strength (aggressiveness) of the bad pixel detection:" "B_0x0,?,?,?,?,?,?,B_0x7" bitfld.long 0x0 0. "ENABLE,Current status of enable bit" "B_0x0,B_0x1" rgroup.long 0xA40++0xB line.long 0x0 "DCMIPP_P1CBLCCR,DCMIPP Pipe1 current black level calibration control register" hexmask.long.byte 0x0 24.--31. 1. "BLCR,Current black level calibration - Red" hexmask.long.byte 0x0 16.--23. 1. "BLCG,Current black level calibration - Green" hexmask.long.byte 0x0 8.--15. 1. "BLCB,Current black level calibration - Blue" bitfld.long 0x0 0. "ENABLE,For current black level calibration" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P1CEXCR1,DCMIPP Pipe1 current exposure control register 1" bitfld.long 0x4 28.--30. "SHFR,Current exposure shift - Red" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 20.--27. 1. "MULTR,Current exposure multiplier - Red" bitfld.long 0x4 0. "ENABLE,for exposure control (multiplication and shift)" "B_0x0,B_0x1" line.long 0x8 "DCMIPP_P1CEXCR2,DCMIPP Pipe1 current exposure control register 2" bitfld.long 0x8 28.--30. "SHFG,Current exposure shift - Green" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 20.--27. 1. "MULTG,Current exposure multiplier - Green" bitfld.long 0x8 12.--14. "SHFB,Current exposure shift - Blue" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 4.--11. 1. "MULTB,Current exposure multiplier - Blue" rgroup.long 0xA50++0x13 line.long 0x0 "DCMIPP_P1CST1CR,DCMIPP Pipe1 current statistics 1 control register" hexmask.long.tbyte 0x0 8.--31. 1. "ACCU,Current accumulation result divided by 256." bitfld.long 0x0 7. "MODE,Current statistics mode" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRC,Current source of statistics" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2.--3. "BINS,Current bin definition" "B_0x0_MODE__EQUAL_BINS,B_0x1_MODE__EQUAL_BINS,B_0x2_MODE__EQUAL_BINS,B_0x3_MODE__EQUAL_BINS" newline bitfld.long 0x0 0. "ENABLE,Current enable bit value" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P1CST2CR,DCMIPP Pipe1 current statistics 2 control register" hexmask.long.tbyte 0x4 8.--31. 1. "ACCU,Accumulation result divided by 256." bitfld.long 0x4 7. "MODE,Statistics mode" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "SRC,Statistics source" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2.--3. "BINS,Bin definition" "B_0x0_MODE__EQUAL_BINS,B_0x1_MODE__EQUAL_BINS,B_0x2_MODE__EQUAL_BINS,B_0x3_MODE__EQUAL_BINS" newline bitfld.long 0x4 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x8 "DCMIPP_P1CST3CR,DCMIPP Pipe1 current statistics 3 control register" hexmask.long.tbyte 0x8 8.--31. 1. "ACCU,Accumulation result divided by 256." bitfld.long 0x8 7. "MODE,Statistics mode" "B_0x0,B_0x1" bitfld.long 0x8 4.--6. "SRC,Statistics source" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2.--3. "BINS,Current bin definition" "B_0x0_MODE__EQUAL_BINS,B_0x1_MODE__EQUAL_BINS,B_0x2_MODE__EQUAL_BINS,B_0x3_MODE__EQUAL_BINS" newline bitfld.long 0x8 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0xC "DCMIPP_P1CSTSTR,DCMIPP Pipe1 current statistics window start register" hexmask.long.word 0xC 16.--27. 1. "VSTART,Current vertical start from 0 to 4094 pixels high" hexmask.long.word 0xC 0.--11. 1. "HSTART,Current horizontal start from 0 to 4094 pixels wide" line.long 0x10 "DCMIPP_P1CSTSZR,DCMIPP Pipe1 current statistics window size register" bitfld.long 0x10 31. "CROPEN,Current CROPEN bit value" "B_0x0,B_0x1" hexmask.long.word 0x10 16.--27. 1. "VSIZE,Current vertical size from 0 to 4094 pixels high" hexmask.long.word 0x10 0.--11. 1. "HSIZE,Current horizontal size from 0 to 4094 pixels wide" rgroup.long 0xA80++0x1B line.long 0x0 "DCMIPP_P1CCCCR,DCMIPP Pipe1 current ColorConv configuration register" bitfld.long 0x0 2. "CLAMP,Clamp the output samples" "B_0x0,B_0x1" bitfld.long 0x0 1. "TYPE,Output samples type used while CLAMP is activated" "B_0x0,B_0x1" bitfld.long 0x0 0. "ENABLE,Current value applied" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P1CCCRR1,DCMIPP Pipe1 current ColorConv red coefficient register 1" hexmask.long.word 0x4 16.--26. 1. "RG,Current coefficient row 1 column 2 of the matrix" hexmask.long.word 0x4 0.--10. 1. "RR,Current coefficient row 1 column 1 of the matrix" line.long 0x8 "DCMIPP_P1CCCRR2,DCMIPP Pipe1 current ColorConv red coefficient register 2" hexmask.long.word 0x8 16.--25. 1. "RA,Current coefficient row 1 of the added column (signed integer value)" hexmask.long.word 0x8 0.--10. 1. "RB,Current coefficient row 1 column 3 of the matrix" line.long 0xC "DCMIPP_P1CCCGR1,DCMIPP Pipe1 current ColorConv green coefficient register 1" hexmask.long.word 0xC 16.--26. 1. "GG,Current coefficient row 2 column 2 of the matrix" hexmask.long.word 0xC 0.--10. 1. "GR,Current coefficient row 2 column 1 of the matrix" line.long 0x10 "DCMIPP_P1CCCGR2,DCMIPP Pipe1 current ColorConv green coefficient register 2" hexmask.long.word 0x10 16.--25. 1. "GA,Current coefficient row 2 of the added column (signed integer value)" hexmask.long.word 0x10 0.--10. 1. "GB,Current coefficient row 2 column 3 of the matrix" line.long 0x14 "DCMIPP_P1CCCBR1,DCMIPP Pipex current ColorConv blue coefficient register 1" hexmask.long.word 0x14 16.--26. 1. "BG,Current coefficient row 3 column 2 of the matrix" hexmask.long.word 0x14 0.--10. 1. "BR,Current coefficient row 3 column 1 of the matrix" line.long 0x18 "DCMIPP_P1CCCBR2,DCMIPP Pipe1 current ColorConv blue coefficient register 2" hexmask.long.word 0x18 16.--25. 1. "BA,Current coefficient row 3 of the added column (signed integer value)" hexmask.long.word 0x18 0.--10. 1. "BB,Current coefficient row 3 column 3 of the matrix" rgroup.long 0xAA0++0xB line.long 0x0 "DCMIPP_P1CCTCR1,DCMIPP Pipe1 current contrast control register 1" hexmask.long.byte 0x0 9.--14. 1. "LUM0,Current luminance increase for input luminance of 0 (increase is idle with LUMx=16)" bitfld.long 0x0 0. "ENABLE,Current ENABLE bit value" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_P1CCTCR2,DCMIPP Pipe1 current contrast control register 2" hexmask.long.byte 0x4 25.--30. 1. "LUM1,Current luminance increase for input luminance of 32 (increase is idle with LUMx=16)" hexmask.long.byte 0x4 17.--22. 1. "LUM2,Current luminance increase for input luminance of 64 (increase is idle with LUMx=16)" hexmask.long.byte 0x4 9.--14. 1. "LUM3,Current luminance increase for input luminance of 96 (increase is idle with LUMx=16)" hexmask.long.byte 0x4 1.--6. 1. "LUM4,Current luminance increase for input luminance of 128 (increase is idle with LUMx=16)" line.long 0x8 "DCMIPP_P1CCTCR3,DCMIPP Pipe1 current contrast control register 3" hexmask.long.byte 0x8 25.--30. 1. "LUM5,Luminance increase for input luminance of 160 (increase is idle with LUMx = 16)" hexmask.long.byte 0x8 17.--22. 1. "LUM6,Luminance increase for input luminance of 192 (increase is idle with LUMx = 16)" hexmask.long.byte 0x8 9.--14. 1. "LUM7,Luminance increase for input luminance of 224 (increase is idle with LUMx = 16)" hexmask.long.byte 0x8 1.--6. 1. "LUM8,Luminance increase for input luminance of 256 (increase is idle with LUMx = 16)" rgroup.long 0xB00++0x1B line.long 0x0 "DCMIPP_P1CFCTCR,DCMIPP Pipex current flow control configuration register" bitfld.long 0x0 3. "CPTREQ,Capture requested" "B_0x0,B_0x1" bitfld.long 0x0 2. "CPTMODE,Capture mode" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "FRATE,Frame capture rate control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "DCMIPP_P1CCRSTR,DCMIPP Pipex current crop window start register" hexmask.long.word 0x4 16.--27. 1. "VSTART,Current vertical start from 0 to 4094 pixels high" hexmask.long.word 0x4 0.--11. 1. "HSTART,Current horizontal start from 0 to 4094 pixels wide" line.long 0x8 "DCMIPP_P1CCRSZR,DCMIPP Pipex current crop window size register" bitfld.long 0x8 31. "ENABLE,Current ENABLE bit value." "B_0x0,B_0x1" hexmask.long.word 0x8 16.--27. 1. "VSIZE,Current vertical size from 0 to 4094 pixels high" hexmask.long.word 0x8 0.--11. 1. "HSIZE,Current horizontal size from 0 to 4094 pixels wide" line.long 0xC "DCMIPP_P1CDCCR,DCMIPP Pipex current decimation register" bitfld.long 0xC 3.--4. "VDEC,Vertical decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 1.--2. "HDEC,Horizontal decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x10 "DCMIPP_P1CDSCR,DCMIPP Pipex current downsize configuration register" bitfld.long 0x10 31. "ENABLE,Current value of bit ENABLE" "B_0x0,B_0x1" hexmask.long.word 0x10 16.--25. 1. "VDIV,Current vertical division factor from 128 (8x) to 1023 (1x)" hexmask.long.word 0x10 0.--9. 1. "HDIV,Current horizontal division factor from 128 (8x) to 1023 (1x)" line.long 0x14 "DCMIPP_P1CDSRTIOR,DCMIPP Pipex current downsize ratio register" hexmask.long.word 0x14 16.--31. 1. "VRATIO,Current vertical ratio from 8192 (1x) to 65535 (8x)" hexmask.long.word 0x14 0.--15. 1. "HRATIO,Current horizontal ratio from 8192 (1x) to 65535 (8x)" line.long 0x18 "DCMIPP_P1CDSSZR,DCMIPP Pipex current downsize destination size register" hexmask.long.word 0x18 16.--27. 1. "VSIZE,Current vertical size from 0 to 4094 pixels high" hexmask.long.word 0x18 0.--11. 1. "HSIZE,Current horizontal size from 0 to 4094 pixels wide" rgroup.long 0xBC0++0x7 line.long 0x0 "DCMIPP_P1CPPCR,DCMIPP Pipe1 current pixel packer configuration register" bitfld.long 0x0 13.--15. "LINEMULT,Amount of capture completed lines for LINE Event and Interrupt" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 4. "SWAPRB,Swaps R-vs-B components if RGB and U-vs-V components if YUV" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--3. 1. "FORMAT,Memory format" line.long 0x4 "DCMIPP_P1CPPM0AR1,DCMIPP Pipe1 current pixel packer Memory0 address register 1" hexmask.long 0x4 0.--31. 1. "M0A,Memory0 address" rgroup.long 0xBCC++0x3 line.long 0x0 "DCMIPP_P1CPPM0PR,DCMIPP Pipex current pixel packer Memory0 pitch register" hexmask.long.word 0x0 0.--14. 1. "PITCH,Current number of bytes between the address of two consecutive lines." rgroup.long 0xBD4++0x3 line.long 0x0 "DCMIPP_P1CPPM1AR1,DCMIPP Pipex current pixel packer Memory1 address register 1" hexmask.long 0x0 0.--31. 1. "M1A,Memory1 address" rgroup.long 0xBDC++0x3 line.long 0x0 "DCMIPP_P1CPPM1PR,DCMIPP Pipex current pixel packer Memory1 pitch register" hexmask.long.word 0x0 0.--14. 1. "PITCH,Current number of bytes between the address of two consecutive lines" rgroup.long 0xBE4++0x3 line.long 0x0 "DCMIPP_P1CPPM2AR1,DCMIPP Pipex current pixel packer Memory2 address register 1" hexmask.long 0x0 0.--31. 1. "M2A,Memory 2 address" rgroup.long 0xC00++0x3 line.long 0x0 "DCMIPP_P2HWCFGR,DCMIPP Pipex HW configuration register" bitfld.long 0x0 18. "CFOC,Capability for focus extraction" "B_0x0,B_0x1" bitfld.long 0x0 17. "CLS,Capability for lens shading" "B_0x0,B_0x1" bitfld.long 0x0 16. "CHS,Capability to extract histograms" "B_0x0,B_0x1" bitfld.long 0x0 13. "CVP,Capability for pipeline virtualization" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "CROI,Capability for ROI: defines the number of ROIs in the pipe" bitfld.long 0x0 6.--7. "CGM,Capability for gamma conversions" "B_0x0,B_0x1,?,?" bitfld.long 0x0 4.--5. "CRB,Capability for demosaicing" "B_0x0,B_0x1,?,?" bitfld.long 0x0 3. "DBM,Double buffer mode" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "CDS,Capability for downsize filter" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CPLA,Capability for planar buffers" "B_0x0,B_0x1,B_0x2,?" group.long 0xC04++0x3 line.long 0x0 "DCMIPP_P2FSCR,DCMIPP Pipe2 flow selection configuration register" bitfld.long 0x0 31. "PIPEN,Activation of PipeN" "B_0x0,B_0x1" bitfld.long 0x0 30. "FDTFEN,Force data type format enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 24.--29. 1. "FDTF,Force data type format" bitfld.long 0x0 19.--20. "VC,Flow selection mode" "0,1,2,3" newline hexmask.long.byte 0x0 0.--5. 1. "DTIDA,Data type ID" group.long 0xD00++0x1B line.long 0x0 "DCMIPP_P2FCTCR,DCMIPP Pipex flow control configuration register" bitfld.long 0x0 3. "CPTREQ,Capture requested" "B_0x0,B_0x1" bitfld.long 0x0 2. "CPTMODE,Capture mode" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "FRATE,Frame capture rate control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "DCMIPP_P2CRSTR,DCMIPP Pipex crop window start register" hexmask.long.word 0x4 16.--27. 1. "VSTART,Vertical start from 0 to 4094 pixels high" hexmask.long.word 0x4 0.--11. 1. "HSTART,Horizontal start from 0 to 4094 pixels wide" line.long 0x8 "DCMIPP_P2CRSZR,DCMIPP Pipex crop window size register" bitfld.long 0x8 31. "ENABLE,None" "B_0x0,B_0x1" hexmask.long.word 0x8 16.--27. 1. "VSIZE,Vertical size from 0 to 4094 pixels high." hexmask.long.word 0x8 0.--11. 1. "HSIZE,Horizontal size from 0 to 4094 pixels wide." line.long 0xC "DCMIPP_P2DCCR,DCMIPP Pipex decimation register" bitfld.long 0xC 3.--4. "VDEC,Vertical decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 1.--2. "HDEC,Horizontal decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x10 "DCMIPP_P2DSCR,DCMIPP Pipex downsize configuration register" bitfld.long 0x10 31. "ENABLE,None" "B_0x0,B_0x1" hexmask.long.word 0x10 16.--25. 1. "VDIV,Vertical division factor from 128 (8x) to 1023 (1x)" hexmask.long.word 0x10 0.--9. 1. "HDIV,Horizontal division factor from 128 (8x) to 1023 (1x)" line.long 0x14 "DCMIPP_P2DSRTIOR,DCMIPP Pipex downsize ratio register" hexmask.long.word 0x14 16.--31. 1. "VRATIO,Vertical ratio from 8192 (1x) to 65535 (8x)" hexmask.long.word 0x14 0.--15. 1. "HRATIO,Horizontal ratio from 8192 (1x) to 65535 (8x)" line.long 0x18 "DCMIPP_P2DSSZR,DCMIPP Pipex downsize destination size register" hexmask.long.word 0x18 16.--27. 1. "VSIZE,Vertical size from 0 to 4094 pixels high" hexmask.long.word 0x18 0.--11. 1. "HSIZE,Horizontal size from 0 to 4094 pixels wide" group.long 0xD70++0x3 line.long 0x0 "DCMIPP_P2GMCR,DCMIPP Pipex gamma configuration register" bitfld.long 0x0 0. "ENABLE,None" "B_0x0,B_0x1" group.long 0xDC0++0x7 line.long 0x0 "DCMIPP_P2PPCR,DCMIPP Pipe2 pixel packer configuration register" bitfld.long 0x0 13.--15. "LINEMULT,Amount of capture completed lines for LINE event and interrupt" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 4. "SWAPRB,Swaps R-vs-B components if RGB and if YUV swaps U-vs-V components" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--3. 1. "FORMAT,Memory format (only coplanar formats are supported in Pipe2)" line.long 0x4 "DCMIPP_P2PPM0AR1,DCMIPP Pipe2 pixel packer Memory0 address register 1" hexmask.long 0x4 0.--31. 1. "M0A,Memory0 address" group.long 0xDCC++0x3 line.long 0x0 "DCMIPP_P2PPM0PR,DCMIPP Pipex pixel packer Memory0 pitch register" hexmask.long.word 0x0 0.--14. 1. "PITCH,Number of bytes between the address of two consecutive lines." rgroup.long 0xDD0++0x3 line.long 0x0 "DCMIPP_P2STM0AR,DCMIPP Pipex status Memory0 address register" hexmask.long 0x0 0.--31. 1. "M0A,Memory0 address" group.long 0xDF4++0x3 line.long 0x0 "DCMIPP_P2IER,DCMIPP Pipe2 interrupt enable register" bitfld.long 0x0 7. "OVRIE,Overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "VSYNCIE,VSYNC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "FRAMEIE,Frame capture completed interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "LINEIE,Multi-line capture completed interrupt enable" "B_0x0,B_0x1" rgroup.long 0xDF8++0x3 line.long 0x0 "DCMIPP_P2SR,DCMIPP Pipe2 status register" bitfld.long 0x0 23. "CPTACT,Capture immediate status" "B_0x0,B_0x1" bitfld.long 0x0 17. "LSTFRM,Last frame LSB bit sampled at frame capture complete event." "0,1" bitfld.long 0x0 16. "LSTLINE,Last line LSB bit sampled at frame capture complete event." "0,1" bitfld.long 0x0 7. "OVRF,Overrun raw interrupt status" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "VSYNCF,VSYNC raw interrupt status" "0,1" bitfld.long 0x0 1. "FRAMEF,Frame capture completed raw interrupt status" "B_0x0,B_0x1" bitfld.long 0x0 0. "LINEF,Multi-line capture completed raw interrupt status" "0,1" wgroup.long 0xDFC++0x3 line.long 0x0 "DCMIPP_P2FCR,DCMIPP Pipe2 interrupt clear register" bitfld.long 0x0 7. "COVRF,Overrun interrupt status clear" "0,1" bitfld.long 0x0 2. "CVSYNCF,Vertical synchronization interrupt status clear" "0,1" bitfld.long 0x0 1. "CFRAMEF,Frame capture complete interrupt status clear" "0,1" bitfld.long 0x0 0. "CLINEF,Multi-line capture complete interrupt status clear" "0,1" rgroup.long 0xE04++0x3 line.long 0x0 "DCMIPP_P2CFSCR,DCMIPP Pipe2 current flow selection configuration register" bitfld.long 0x0 31. "PIPEN,Current activation of PipeN" "B_0x0,B_0x1" bitfld.long 0x0 30. "FDTFEN,Current force data type format enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 24.--29. 1. "FDTF,Current force data type format" bitfld.long 0x0 19.--20. "VC,Current flow selection mode" "0,1,2,3" newline hexmask.long.byte 0x0 0.--5. 1. "DTIDA,Current data type ID" rgroup.long 0xF00++0x1B line.long 0x0 "DCMIPP_P2CFCTCR,DCMIPP Pipex current flow control configuration register" bitfld.long 0x0 3. "CPTREQ,Capture requested" "B_0x0,B_0x1" bitfld.long 0x0 2. "CPTMODE,Capture mode" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "FRATE,Frame capture rate control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "DCMIPP_P2CCRSTR,DCMIPP Pipex current crop window start register" hexmask.long.word 0x4 16.--27. 1. "VSTART,Current vertical start from 0 to 4094 pixels high" hexmask.long.word 0x4 0.--11. 1. "HSTART,Current horizontal start from 0 to 4094 pixels wide" line.long 0x8 "DCMIPP_P2CCRSZR,DCMIPP Pipex current crop window size register" bitfld.long 0x8 31. "ENABLE,Current ENABLE bit value." "B_0x0,B_0x1" hexmask.long.word 0x8 16.--27. 1. "VSIZE,Current vertical size from 0 to 4094 pixels high" hexmask.long.word 0x8 0.--11. 1. "HSIZE,Current horizontal size from 0 to 4094 pixels wide" line.long 0xC "DCMIPP_P2CDCCR,DCMIPP Pipex current decimation register" bitfld.long 0xC 3.--4. "VDEC,Vertical decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 1.--2. "HDEC,Horizontal decimation ratio" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x10 "DCMIPP_P2CDSCR,DCMIPP Pipex current downsize configuration register" bitfld.long 0x10 31. "ENABLE,Current value of bit ENABLE" "B_0x0,B_0x1" hexmask.long.word 0x10 16.--25. 1. "VDIV,Current vertical division factor from 128 (8x) to 1023 (1x)" hexmask.long.word 0x10 0.--9. 1. "HDIV,Current horizontal division factor from 128 (8x) to 1023 (1x)" line.long 0x14 "DCMIPP_P2CDSRTIOR,DCMIPP Pipex current downsize ratio register" hexmask.long.word 0x14 16.--31. 1. "VRATIO,Current vertical ratio from 8192 (1x) to 65535 (8x)" hexmask.long.word 0x14 0.--15. 1. "HRATIO,Current horizontal ratio from 8192 (1x) to 65535 (8x)" line.long 0x18 "DCMIPP_P2CDSSZR,DCMIPP Pipex current downsize destination size register" hexmask.long.word 0x18 16.--27. 1. "VSIZE,Current vertical size from 0 to 4094 pixels high" hexmask.long.word 0x18 0.--11. 1. "HSIZE,Current horizontal size from 0 to 4094 pixels wide" rgroup.long 0xFC0++0x7 line.long 0x0 "DCMIPP_P2CPPCR,DCMIPP Pipe2 current pixel packer configuration register" bitfld.long 0x0 13.--15. "LINEMULT,Amount of capture completed lines for LINE event and interrupt" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 4. "SWAPRB,Swaps R-vs-B components if RGB and if YUV swaps U-vs-V components" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--3. 1. "FORMAT,Memory format (only coplanar formats are supported in Pipe2)" line.long 0x4 "DCMIPP_P2CPPM0AR1,DCMIPP Pipe2 current pixel packer Memory0 address register 1" hexmask.long 0x4 0.--31. 1. "M0A,Memory0 address" rgroup.long 0xFCC++0x3 line.long 0x0 "DCMIPP_P2CPPM0PR,DCMIPP Pipex current pixel packer Memory0 pitch register" hexmask.long.word 0x0 0.--14. 1. "PITCH,Current number of bytes between the address of two consecutive lines." rgroup.long 0xFE8++0x17 line.long 0x0 "DCMIPP_HWCFGR3,DCMIPP hardware configuration register 3" bitfld.long 0x0 0. "LSF,Lens shading" "B_0x0,B_0x1" line.long 0x4 "DCMIPP_HWCFGR2,DCMIPP hardware configuration register 2" bitfld.long 0x4 28. "STV,Statistic version" "B_0x0,B_0x1" bitfld.long 0x4 24. "TPG,Test pattern generator" "B_0x0,B_0x1" bitfld.long 0x4 20. "MCU,Macroblock unit as pixel format" "B_0x0,B_0x1" bitfld.long 0x4 12. "ADDMOD,Address modulo computation to access a small buffer in streaming featured" "B_0x0,B_0x1" newline bitfld.long 0x4 8. "PROCCLK,Processing clock linked to AXI clock featured" "B_0x0,B_0x1" bitfld.long 0x4 4. "DBMFT,Double buffer mode featured" "0,1" bitfld.long 0x4 0.--2. "VPFT,Virtual pipe function" "0,1,2,3,4,5,6,7" line.long 0x8 "DCMIPP_HWCFGR1,DCMIPP hardware configuration register 1" hexmask.long.byte 0x8 28.--31. 1. "ROI2NB,Number of ROIs for Pipe2" hexmask.long.byte 0x8 24.--27. 1. "ROI1NB,Number of ROIs for Pipe1" bitfld.long 0x8 20.--21. "PLANARFT,Buffer features for Pipe1" "B_0x0,B_0x1,?,B_0x3" bitfld.long 0x8 16. "RB2RGB,Raw Bayer to RGB feature (demosaicer)" "0,1" newline bitfld.long 0x8 13. "DSP2FT,Down-sampling feature for the pixel Pipe2" "0,1" bitfld.long 0x8 12. "DSP1FT,Down-sampling feature for the pixel Pipe1" "0,1" bitfld.long 0x8 8. "IPPLUGCFG,IP-Plug configuration" "0,1" bitfld.long 0x8 4.--5. "PIPENB,Number of pipes" "0,1,2,3" newline bitfld.long 0x8 0. "CSIFT,CSI2 host protocol compliant" "0,1" line.long 0xC "DCMIPP_VERR,DCMIPP version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,DCMIPP major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,DCMIPP minor revision" line.long 0x10 "DCMIPP_IPIDR,DCMIPP identification register" hexmask.long 0x10 0.--31. 1. "IDR,Parallel camera interface (DCMI) and optional pixel processing (PP)" line.long 0x14 "DCMIPP_SIDR,DCMIPP size identification register" hexmask.long 0x14 0.--31. 1. "SID,4-Kbyte decoding space" tree.end tree.end tree "DDRSS (DDR Subsystem)" base ad:0x0 tree "DDRCTRL (DDR3L/DDR4/LPDDR4 Controller)" tree "DDRCTRL" base ad:0x48040000 group.long 0x0++0x3 line.long 0x0 "DDRCTRL_REGS_MSTR,DDRCTRL master0 register" bitfld.long 0x0 30.--31. "DEVICE_CONFIG,Device configuration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "ACTIVE_RANKS,Only present for multi-rank configurations" "B_0x0,B_0x1,?,B_0x3" newline hexmask.long.byte 0x0 16.--19. 1. "BURST_RDWR,SDRAM burst length" bitfld.long 0x0 15. "DLL_OFF_MODE,Note: Programming mode: Quasi-dynamic Group 2." "B_0x0,B_0x1" newline bitfld.long 0x0 12.--13. "DATA_BUS_WIDTH,Proportion of DQ bus width that is used by the SDRAM" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 10. "EN_2T_TIMING_MODE,In 2T timing all command signals (except chip select) are held for two clocks on the SDRAM bus." "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BURSTCHOP,Burst chop (BC4 or 8 on-the-fly) enable in DDR3L/DDR4" "0,1" bitfld.long 0x0 5. "LPDDR4,Selects LPDDR4 SDRAM" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "DDR4,Selects DDR4 SDRAM" "B_0x0,B_0x1" bitfld.long 0x0 0. "DDR3L,Selects DDR3L SDRAM" "B_0x0,B_0x1" rgroup.long 0x4++0x3 line.long 0x0 "DDRCTRL_REGS_STAT,DDRCTRL operating mode status register" bitfld.long 0x0 12. "SELFREF_CAM_NOT_EMPTY,Self-refresh (SR) with CAMs not empty" "0,1" bitfld.long 0x0 8.--9. "SELFREF_STATE,SR or SRPD (SR power-down) for LPDDR4" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 4.--5. "SELFREF_TYPE,Flags if SR (except LPDDR4) or SRPD (LPDDR4) is entered and if it is under automatic SR control only or not" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--2. "OPERATING_MODE,DDR3L design:" "B_0x0,B_0x1,B_0x2,B_0x3,?,?,?,?" group.long 0x10++0x7 line.long 0x0 "DDRCTRL_REGS_MRCTRL0,DDRCTRL mode read/write control 0 register" bitfld.long 0x0 31. "MR_WR,Mode register (MR) read or write" "0,1" bitfld.long 0x0 30. "PBA_MODE,PBA access execution" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 12.--15. 1. "MR_ADDR,MR address to be written to" bitfld.long 0x0 4.--5. "MR_RANK,Rank accessed by MR_WR in this register" "?,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 3. "SW_INIT_INT,Software intervention enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "PDA_EN,Mode register operation is MRS in PDA mode or not" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "MPR_EN,Mode register operation is MRS or WR/RD for MPR (only supported for DDR4)" "B_0x0,B_0x1" bitfld.long 0x0 0. "MR_TYPE,Mode register operation is read or write (only for LPDDR4/DDR4)" "B_0x0,B_0x1" line.long 0x4 "DDRCTRL_REGS_MRCTRL1,DDRCTRL mode read/write control 1 register" hexmask.long.tbyte 0x4 0.--17. 1. "MR_DATA,Mode register write data for all non-LPDDR4 modes" rgroup.long 0x18++0x3 line.long 0x0 "DDRCTRL_REGS_MRSTAT,DDRCTRL mode register read/write status register" bitfld.long 0x0 8. "PDA_DONE,Initiate an MR write operation in PDA/PBA mode only if this bit is low" "B_0x0,B_0x1" bitfld.long 0x0 0. "MR_WR_BUSY,Initiate an MR write operation only if this bit is low" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "DDRCTRL_REGS_MRCTRL2,DDRCTRL mode register read/write control 2 register" hexmask.long 0x0 0.--31. 1. "MR_DEVICE_SEL,Device selection during the MRS that happens in PDA mode" line.long 0x4 "DDRCTRL_REGS_DERATEEN,DDRCTRL temperature derate enable register" bitfld.long 0x4 13. "DERATE_MR4_PAUSE_FC,Pauses MR4 reads" "0,1" bitfld.long 0x4 12. "DERATE_MR4_TUF_DIS,Disables use of MR4 TUF flag (MR4[7])" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--10. "RC_DERATE_VALUE,Derate value of tless thansub>RCless than/sub> for LPDDR4" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0x4 4.--7. 1. "DERATE_BYTE,MRR data used for derating" newline bitfld.long 0x4 1.--2. "DERATE_VALUE,Derate value" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0. "DERATE_ENABLE,Enables derating" "B_0x0,B_0x1" line.long 0x8 "DDRCTRL_REGS_DERATEINT,DDRCTRL temperature derate interval register" hexmask.long 0x8 0.--31. 1. "MR4_READ_INTERVAL,Interval between two MR4 reads" group.long 0x2C++0xF line.long 0x0 "DDRCTRL_REGS_DERATECTL,DDRCTRL temperature derate control register" bitfld.long 0x0 2. "DERATE_TEMP_LIMIT_INTR_FORCE,Interrupt force bit for DERATE_TEMP_LIMIT_INTR" "0,1" bitfld.long 0x0 1. "DERATE_TEMP_LIMIT_INTR_CLR,Interrupt clear bit for DERATE_TEMP_LIMIT_INTR" "0,1" newline bitfld.long 0x0 0. "DERATE_TEMP_LIMIT_INTR_EN,Interrupt enable bit for DERATE_TEMP_LIMIT_INTR" "B_0x0,B_0x1" line.long 0x4 "DDRCTRL_REGS_PWRCTL,DDRCTRL low-power control register" bitfld.long 0x4 8. "LPDDR4_SR_ALLOWED,Transition from SRPD to SR and back to SRPD allowed" "B_0x0,B_0x1" bitfld.long 0x4 7. "DIS_CAM_DRAIN_SELFREF,Skipping CAM draining allowed when entering SR" "B_0x0,B_0x1" newline bitfld.long 0x4 6. "STAY_IN_SELFREF,SR state transition" "B_0x0,B_0x1" bitfld.long 0x4 5. "SELFREF_SW,SR state entry" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "EN_DFI_DRAM_CLK_DISABLE,dfi_dram_clk_disable enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "POWERDOWN_EN,PDN enable" "0,1" newline bitfld.long 0x4 0. "SELFREF_EN,SDRAM into SR enable" "0,1" line.long 0x8 "DDRCTRL_REGS_PWRTMG,DDRCTRL low-power timing register" hexmask.long.byte 0x8 16.--23. 1. "SELFREF_TO_X32,Maximum idle clocks before SR" hexmask.long.byte 0x8 0.--4. 1. "POWERDOWN_TO_X32,Maximum idle clocks before PDN" line.long 0xC "DDRCTRL_REGS_HWLPCTL,DDRCTRL hardware low-power control register" hexmask.long.word 0xC 16.--27. 1. "HW_LP_IDLE_X32,Hardware idle period" bitfld.long 0xC 1. "HW_LP_EXIT_IDLE_EN,CACTIVE_IN_DDRC pin enable" "0,1" newline bitfld.long 0xC 0. "HW_LP_EN,Hardware low-power interface enable" "0,1" group.long 0x50++0x7 line.long 0x0 "DDRCTRL_REGS_RFSHCTL0,DDRCTRL refresh control 0 register" hexmask.long.byte 0x0 27.--31. 1. "REFRESH_TO_AB_X32,When the DDRCTRL switches automatically from per-bank to all-bank refresh (if enabled by AUTO_REFAB_EN[1:0]) it will use this register to determine when to perform speculative all-bank refreshes." hexmask.long.byte 0x0 20.--23. 1. "REFRESH_MARGIN,DFI clock cycles before the critical refresh or page timer expires" newline hexmask.long.byte 0x0 12.--16. 1. "REFRESH_TO_X1_X32,If the refresh timer (tless thansub>RFCnomless than/sub> also known as tless thansub>REFIless than/sub>) has expired at least once a speculative refresh can be performed." hexmask.long.byte 0x0 4.--9. 1. "REFRESH_BURST,This bit field + 1 is the number of refresh timeouts that can be accumulated before traffic is blocked and refreshes are forced to execute." newline bitfld.long 0x0 2. "PER_BANK_REFRESH,Per bank refresh allows traffic to flow to other banks (supported by all LPDDR4 devices)." "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "AUTO_REFAB_EN,Enables automatic switching from per-bank to all-bank refresh when the derated refresh period is small." "B_0x0,B_0x1,B_0x2,?" line.long 0x4 "DDRCTRL_REGS_RFSHCTL1,DDRCTRL refresh control 1 register" hexmask.long.word 0x4 16.--27. 1. "REFRESH_TIMER1_START_VALUE_X32,Refresh timer start for rank 1 (only present in multirank configurations)" hexmask.long.word 0x4 0.--11. 1. "REFRESH_TIMER0_START_VALUE_X32,Refresh timer start for rank 0 (only present in multirank configurations)" group.long 0x60++0xB line.long 0x0 "DDRCTRL_REGS_RFSHCTL3,DDRCTRL refresh control 3 register" bitfld.long 0x0 4.--6. "REFRESH_MODE,Fine granularity refresh mode" "B_0x0,B_0x1,B_0x2,?,?,B_0x5,B_0x6,?" bitfld.long 0x0 1. "REFRESH_UPDATE_LEVEL,Refresh register update" "0,1" newline bitfld.long 0x0 0. "DIS_AUTO_REFRESH,Auto-refresh disable" "0,1" line.long 0x4 "DDRCTRL_REGS_RFSHTMG,DDRCTRL refresh timing register" bitfld.long 0x4 31. "T_RFC_NOM_X1_SEL,This bit specifies whether values of T_RFC_NOM_X1_X32 in this register and REFRESH_TO_X1_X32 in DDRCTRL_REGS_RFSHCTL0 are x1 or x32." "B_0x0,B_0x1" hexmask.long.word 0x4 16.--27. 1. "T_RFC_NOM_X1_X32,Average time interval between refreshes per rank" newline hexmask.long.word 0x4 0.--9. 1. "T_RFC_MIN,tless thansub>RFCminless than/sub> minimum time from refresh to refresh or activate" line.long 0x8 "DDRCTRL_REGS_RFSHTMG1,DDRCTRL refresh timing1 register" hexmask.long.byte 0x8 16.--23. 1. "T_PBR2PBR,tless thansub>pbR2pbRless than/sub> for LPDDR4" group.long 0xD0++0x7 line.long 0x0 "DDRCTRL_REGS_INIT0,DDRCTRL SDRAM initialization 0 register" bitfld.long 0x0 30.--31. "SKIP_DRAM_INIT,SDRAM initialization routine" "B_0x0,B_0x1,?,B_0x3" hexmask.long.word 0x0 16.--25. 1. "POST_CKE_X1024,Number of cycles to wait after driving CKE high to start the SDRAM initialization sequence" newline hexmask.long.word 0x0 0.--11. 1. "PRE_CKE_X1024,Number of cycles to wait after reset before driving CKE high to start the SDRAM initialization sequence" line.long 0x4 "DDRCTRL_REGS_INIT1,DDRCTRL SDRAM initialization 1 register" hexmask.long.word 0x4 16.--24. 1. "DRAM_RSTN_X1024,Number of cycles to assert SDRAM reset signal during" hexmask.long.byte 0x4 0.--3. 1. "PRE_OCD_X32,Wait period before driving the OCD complete command to SDRAM" group.long 0xDC++0x13 line.long 0x0 "DDRCTRL_REGS_INIT3,DDRCTRL SDRAM initialization 3 register" hexmask.long.word 0x0 16.--31. 1. "MR,DDR3L/DDR4: Value loaded into MR0 register" hexmask.long.word 0x0 0.--15. 1. "EMR,DDR3L/DDR4: Value to write to MR1 register (set bit 7 to 0)" line.long 0x4 "DDRCTRL_REGS_INIT4,DDRCTRL SDRAM initialization 4 register" hexmask.long.word 0x4 16.--31. 1. "EMR2,DDR3L/DDR4: Value to write to MR2 register" hexmask.long.word 0x4 0.--15. 1. "EMR3,DDR3L/DDR4: Value to write to MR3 register" line.long 0x8 "DDRCTRL_REGS_INIT5,DDRCTRL SDRAM initialization 5 register" hexmask.long.byte 0x8 16.--23. 1. "DEV_ZQINIT_X32,tless thansub>ZQINITless than/sub> ZQ initial calibration" line.long 0xC "DDRCTRL_REGS_INIT6,DDRCTRL SDRAM initialization 6 register" hexmask.long.word 0xC 16.--31. 1. "MR4,DDR4: Value to be loaded into SDRAM MR4 registers" hexmask.long.word 0xC 0.--15. 1. "MR5,DDR4: Value to be loaded into SDRAM MR5 registers" line.long 0x10 "DDRCTRL_REGS_INIT7,DDRCTRL SDRAM initialization 7 register" hexmask.long.word 0x10 16.--31. 1. "MR22,LPDDR4: Value to be loaded into SDRAM MR22 registers" hexmask.long.word 0x10 0.--15. 1. "MR6,DDR4: Value to be loaded into SDRAM MR6 registers" group.long 0xF4++0x7 line.long 0x0 "DDRCTRL_REGS_RANKCTL,DDRCTRL rank control register" bitfld.long 0x0 26. "DIFF_RANK_WR_GAP_MSB,1-bit extension to be used when DIFF_RANK_WR_GAP in this register needs to be set" "0,1" bitfld.long 0x0 24. "DIFF_RANK_RD_GAP_MSB,1-bit extension to be used when DIFF_RANK_RD_GAP in this register needs to be set" "0,1" newline hexmask.long.byte 0x0 12.--15. 1. "MAX_RANK_WR,Maximum number of writes that can be scheduled consecutively" hexmask.long.byte 0x0 8.--11. 1. "DIFF_RANK_WR_GAP,Number of clocks of gap in data responses when performing consecutive writes to different ranks (only present for multirank configurations)" newline hexmask.long.byte 0x0 4.--7. 1. "DIFF_RANK_RD_GAP,Number of clocks of gap in data responses when performing consecutive reads to different ranks (only present for multi-rank configurations)" hexmask.long.byte 0x0 0.--3. 1. "MAX_RANK_RD,Maximum number of reads that can be scheduled consecutively" line.long 0x4 "DDRCTRL_REGS_RANKCTL1,Rank control 1 register" hexmask.long.byte 0x4 0.--5. 1. "WR2RD_DR,Minimum time from write command to read command on different physical ranks." group.long 0x100++0x3F line.long 0x0 "DDRCTRL_REGS_DRAMTMG0,DDRCTRL SDRAM timing 0 register" hexmask.long.byte 0x0 24.--30. 1. "WR2PRE,Minimum time between write and precharge to same bank" hexmask.long.byte 0x0 16.--21. 1. "T_FAW,tless thansub>FAWless than/sub> valid only when 8 or more banks (or banks x bank groups) are present" newline hexmask.long.byte 0x0 8.--14. 1. "T_RAS_MAX,tless thansub>RASmaxless than/sub> max time between activate and precharge to same bank" hexmask.long.byte 0x0 0.--5. 1. "T_RAS_MIN,tless thansub>RASminless than/sub> minimum time between activate and precharge to same bank" line.long 0x4 "DDRCTRL_REGS_DRAMTMG1,DDRCTRL SDRAM timing 1 register" hexmask.long.byte 0x4 16.--20. 1. "T_XP,tless thansub>XPless than/sub> minimum time after PDN exit to any operation" hexmask.long.byte 0x4 8.--13. 1. "RD2PRE,tless thansub>RTPless than/sub> minimum time from read to precharge of same bank" newline hexmask.long.byte 0x4 0.--6. 1. "T_RC,tless thansub>RCless than/sub> minimum time between activates to same bank" line.long 0x8 "DDRCTRL_REGS_DRAMTMG2,DDRCTRL SDRAM timing 2 register" hexmask.long.byte 0x8 24.--29. 1. "WRITE_LATENCY,Time from write command to write data on SDRAM interface" hexmask.long.byte 0x8 16.--21. 1. "READ_LATENCY,Time from read command to read data on SDRAM interface" newline hexmask.long.byte 0x8 8.--13. 1. "RD2WR,Minimum time from read command to write command" hexmask.long.byte 0x8 0.--5. 1. "WR2RD,In DDR4 minimum time from write command to read command for same bank group." line.long 0xC "DDRCTRL_REGS_DRAMTMG3,DDRCTRL SDRAM timing 3 register" hexmask.long.word 0xC 20.--29. 1. "T_MRW,Time to wait after a mode register write or read (MRW or MRR)" hexmask.long.byte 0xC 12.--17. 1. "T_MRD,tless thansub>MRDless than/sub> number of cycles to wait after a mode register write or read" newline hexmask.long.word 0xC 0.--9. 1. "T_MOD,tless thansub>MODless than/sub> number of cycles between load mode command and following non-load mode command (only in DDR3L and DDR4)" line.long 0x10 "DDRCTRL_REGS_DRAMTMG4,DDRCTRL SDRAM timing 4 register" hexmask.long.byte 0x10 24.--28. 1. "T_RCD,tless thansub>RCDless than/sub> - tless thansub>ALless than/sub> minimum time from activate to read or write command to same bank" hexmask.long.byte 0x10 16.--19. 1. "T_CCD,For DDR4 tless thansub>CCD_Lless than/sub> minimum time between two reads or two writes for same bank group." newline hexmask.long.byte 0x10 8.--11. 1. "T_RRD,For DDR4 tless thansub>RRD_Lless than/sub> minimum time between activates from bank a to bank b for same bank." hexmask.long.byte 0x10 0.--4. 1. "T_RP,tless thansub>RPless than/sub> minimum time from single-bank precharge to activate of same bank" line.long 0x14 "DDRCTRL_REGS_DRAMTMG5,DDRCTRL SDRAM timing 5 register" hexmask.long.byte 0x14 24.--27. 1. "T_CKSRX,Time before SR exit that CK is maintained as a valid clock before issuing SRX" hexmask.long.byte 0x14 16.--22. 1. "T_CKSRE,Time after SR entry that CK is maintained as a valid clock" newline hexmask.long.byte 0x14 8.--13. 1. "T_CKESR,Minimum CKE low width for SR or SRPD entry to exit timing" hexmask.long.byte 0x14 0.--4. 1. "T_CKE,Minimum number of cycles of CKE high/low during PDN and SR" line.long 0x18 "DDRCTRL_REGS_DRAMTMG6,DDRCTRL SDRAM timing 6 register" hexmask.long.byte 0x18 0.--3. 1. "T_CKCSX,time before clock Stop exit that CK is maintained as a valid clock before issuing clock Stop exit" line.long 0x1C "DDRCTRL_REGS_DRAMTMG7,DDRCTRL SDRAM timing 7 register" hexmask.long.byte 0x1C 8.--11. 1. "T_CKPDE,Time after PDN entry that CK is maintained as a valid clock" hexmask.long.byte 0x1C 0.--3. 1. "T_CKPDX,Time before PDN exit that CK is maintained as a valid clock" line.long 0x20 "DDRCTRL_REGS_DRAMTMG8,DDRCTRL SDRAM timing 8 register" hexmask.long.byte 0x20 24.--30. 1. "T_XS_FAST_X32,tless thansub>XS_FASTless than/sub> exit SR to ZQCL ZQCS and MRS (only CL WR RTP mode)" hexmask.long.byte 0x20 16.--22. 1. "T_XS_ABORT_X32,tless thansub>XS_ABORTless than/sub> exit SR to commands not requiring a locked DLL" newline hexmask.long.byte 0x20 8.--14. 1. "T_XS_DLL_X32,tless thansub>XSDLLless than/sub> exit SR to commands requiring a locked DLL (only for DDR3L and DDR4 SDRAMs)" hexmask.long.byte 0x20 0.--6. 1. "T_XS_X32,tless thansub>XSless than/sub> exit SR to commands not requiring a locked DLL (only for DDR3L and DDR4 SDRAMs)" line.long 0x24 "DDRCTRL_REGS_DRAMTMG9,DDRCTRL SDRAM timing 9 register" bitfld.long 0x24 30. "DDR4_WR_PREAMBLE,DDR4 write preamble mode" "B_0x0,B_0x1" bitfld.long 0x24 16.--18. "T_CCD_S,tless thansub>CCD_Sless than/sub> minimum time between two reads/writes for different bank group" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x24 8.--11. 1. "T_RRD_S,tless thansub>RRD_Sless than/sub> minimum time between activates for different bank group" hexmask.long.byte 0x24 0.--5. 1. "WR2RD_S,Minimum time from write command to read command for different bank group" line.long 0x28 "DDRCTRL_REGS_DRAMTMG10,DDRCTRL SDRAM timing 10 register" hexmask.long.byte 0x28 16.--20. 1. "T_SYNC_GEAR,Time between MRS command and the sync pulse time" hexmask.long.byte 0x28 8.--12. 1. "T_CMD_GEAR,sync pulse to first valid command" newline bitfld.long 0x28 2.--3. "T_GEAR_SETUP,Geardown setup time" "0,1,2,3" bitfld.long 0x28 0.--1. "T_GEAR_HOLD,Geardown hold time" "0,1,2,3" line.long 0x2C "DDRCTRL_REGS_DRAMTMG11,DDRCTRL SDRAM timing 11 register" hexmask.long.byte 0x2C 24.--30. 1. "POST_MPSM_GAP_X32,tless thansub>XMPDLLless than/sub> minimum exit MPSM to commands requiring" hexmask.long.byte 0x2C 16.--20. 1. "T_MPX_LH,tless thansub>MPX_LHless than/sub> minimum CS_n low hold time to CKE rising edge" newline bitfld.long 0x2C 8.--9. "T_MPX_S,tless thansub>MPX_Sless than/sub> minimum time CS setup time to CKE" "0,1,2,3" hexmask.long.byte 0x2C 0.--4. 1. "T_CKMPE,tless thansub>CKMPEless than/sub> minimum valid clock requirement after MPSM entry" line.long 0x30 "DDRCTRL_REGS_DRAMTMG12,DDRCTRL SDRAM timing 12 register" hexmask.long.byte 0x30 24.--29. 1. "T_WR_MPR,Cycles between MPR write and other commands (DDR4 only)" bitfld.long 0x30 16.--17. "T_CMDCKE,tless thansub>CMDCKEless than/sub> delay from valid command to CKE input low" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "T_MRD_PDA,tless thansub>MRD_PDAless than/sub> cycle time of mode register set command in PDA mode" line.long 0x34 "DDRCTRL_REGS_DRAMTMG13,DDRCTRL SDRAM timing 13 register" hexmask.long.byte 0x34 24.--30. 1. "ODTLOFF,ODTLoff latency from CAS-2 command to ODToff reference (only LPDDR4)" hexmask.long.byte 0x34 16.--21. 1. "T_CCD_MW,tless thansub>CCDMWless than/sub> minimum time from write or masked write to masked write command for same bank (only LPDDR4)" newline bitfld.long 0x34 0.--2. "T_PPD,tless thansub>PPDless than/sub> minimum time from precharge to precharge command (only LPDDR4)" "0,1,2,3,4,5,6,7" line.long 0x38 "DDRCTRL_REGS_DRAMTMG14,DDRCTRL SDRAM timing 14 register" hexmask.long.word 0x38 0.--11. 1. "T_XSR,tless thansub>XSRless than/sub> exit SR time to any command (only LPDDR4)" line.long 0x3C "DDRCTRL_REGS_DRAMTMG15,DDRCTRL SDRAM timing 15 register" bitfld.long 0x3C 31. "EN_DFI_LP_T_STAB,Note: Programming mode: Quasi-dynamic Group 2 Group 4." "B_0x0,B_0x1" hexmask.long.byte 0x3C 0.--7. 1. "T_STAB_X32,tless thansub>STABless than/sub> stabilization time" group.long 0x180++0xB line.long 0x0 "DDRCTRL_REGS_ZQCTL0,DDRCTRL ZQ control 0 register" bitfld.long 0x0 31. "DIS_AUTO_ZQ,Note: Programming mode: Dynamic." "B_0x0,B_0x1" bitfld.long 0x0 30. "DIS_SRX_ZQCL,Note: Programming mode: Quasi-dynamic Group 2 Group 4." "B_0x0,B_0x1" newline bitfld.long 0x0 29. "ZQ_RESISTOR_SHARED,ZQinit/ZQCL/ZQCS/MPC(ZQ calibration) commands are sent to one rank at a time with tless thansub>ZQinitless than/sub> tless thansub>ZQCLless than/sub> tless thansub>ZQCSless than/sub> tless thansub>ZQCALless than/sub> and tless.." "B_0x0,B_0x1" bitfld.long 0x0 28. "DIS_MPSMX_ZQCL,Only for DDR4" "B_0x0,B_0x1" newline hexmask.long.word 0x0 16.--26. 1. "T_ZQ_LONG_NOP,DFI clock cycles of NOP required after ZQCL (ZQcalibration long)" hexmask.long.word 0x0 0.--9. 1. "T_ZQ_SHORT_NOP,DFI clock cycles of NOP required after ZQCS (ZQ calibration short)" line.long 0x4 "DDRCTRL_REGS_ZQCTL1,DDRCTRL ZQ control 1 register" hexmask.long.word 0x4 20.--29. 1. "T_ZQ_RESET_NOP,tless thansub>ZQResetless than/sub> DFI clock cycles of NOP required after ZQReset" hexmask.long.tbyte 0x4 0.--19. 1. "T_ZQ_SHORT_INTERVAL_X1024,Average interval to wait between automatically issuing ZQCS (ZQ calibration short) and MPC(ZQ calibration) commands" line.long 0x8 "DDRCTRL_REGS_ZQCTL2,DDRCTRL ZQ control 2 register" bitfld.long 0x8 0. "ZQ_RESET,ZQ Reset operation" "0,1" rgroup.long 0x18C++0x3 line.long 0x0 "DDRCTRL_REGS_ZQSTAT,DDRCTRL ZQ status register" bitfld.long 0x0 0. "ZQ_RESET_BUSY,ZQ Reset operation possible only if this bit is low" "B_0x0,B_0x1" group.long 0x190++0xB line.long 0x0 "DDRCTRL_REGS_DFITMG0,DDRCTRL DFI timing 0 register" hexmask.long.byte 0x0 24.--28. 1. "DFI_T_CTRL_DELAY,DFI clock cycles after an assertion or deassertion" bitfld.long 0x0 23. "DFI_RDDATA_USE_DFI_PHY_CLK,dfi_rddata_en dfi_rddata or dfi_rddata_valid generated" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 16.--22. 1. "DFI_T_RDDATA_EN,Time from the assertion of a read command on the DFI interface" bitfld.long 0x0 15. "DFI_WRDATA_USE_DFI_PHY_CLK,dfi_wrdata_en dfi_wrdata or dfi_wrdata_mask generated" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--13. 1. "DFI_TPHY_WRDATA,tless thansub>PHY_WRDATA less than/sub>number of clock cycles between dfi_wrdata_en assertion and associated write data driven on dfi_wrdata" hexmask.long.byte 0x0 0.--5. 1. "DFI_TPHY_WRLAT,tless thansub>PHY_WRLATless than/sub> write latency" line.long 0x4 "DDRCTRL_REGS_DFITMG1,DDRCTRL DFI timing 1 register" hexmask.long.byte 0x4 28.--31. 1. "DFI_T_CMD_LAT,Number of DFI PHY clock cycles between when dfi_cs assertion and when the associated command is driven" hexmask.long.byte 0x4 16.--20. 1. "DFI_T_WRDATA_DELAY,tless thansub>WRDATA_DELAYless than/sub> DFI clock cycles between dfi_wrdata_en assertion and when the corresponding write data transfer is completed on the DRAM bus" newline hexmask.long.byte 0x4 8.--12. 1. "DFI_T_DRAM_CLK_DISABLE,DFI clock cycles from dfi_dram_clk_disable assertion on the DFI until the clock to the DRAM memory devices at the PHY-DRAM boundary" hexmask.long.byte 0x4 0.--4. 1. "DFI_T_DRAM_CLK_ENABLE,DFI clock cycles from dfi_dram_clk_disable deassertion on the DFI until the first valid rising edge of the clock to the DRAM memory devices " line.long 0x8 "DDRCTRL_REGS_DFILPCFG0,DDRCTRL DFI low-power configuration 0 register" hexmask.long.byte 0x8 24.--28. 1. "DFI_TLP_RESP,tless thansub>LP_RESPless than/sub> DFI clock cycles setting for DFI" hexmask.long.byte 0x8 12.--15. 1. "DFI_LP_WAKEUP_SR,tless thansub>LP_WAKEUPless than/sub> DFI clock cycles to drive on dfi_lp_wakeup signal" newline bitfld.long 0x8 8. "DFI_LP_EN_SR,DFI low-power interface handshaking during SR entry/exit" "B_0x0,B_0x1" hexmask.long.byte 0x8 4.--7. 1. "DFI_LP_WAKEUP_PD,tless thansub>LP_WAKEUPless than/sub> DFI clock cycles to drive on dfi_lp_wakeup signal when PDN is entered" newline bitfld.long 0x8 0. "DFI_LP_EN_PD,DFI low-power interface handshaking during PDN entry/exit" "B_0x0,B_0x1" group.long 0x1A0++0xB line.long 0x0 "DDRCTRL_REGS_DFIUPD0,DDRCTRL DFI update 0 register" bitfld.long 0x0 31. "DIS_AUTO_CTRLUPD,Note: Programming mode: Quasi-dynamic Group 3." "B_0x0,B_0x1" bitfld.long 0x0 30. "DIS_AUTO_CTRLUPD_SRX,Note: Programming mode: Static." "B_0x0,B_0x1" newline bitfld.long 0x0 29. "CTRLUPD_PRE_SRX,DFI_CTRLUPD_REQ requirements at SRX" "B_0x0,B_0x1" hexmask.long.word 0x0 16.--25. 1. "DFI_T_CTRLUP_MAX,Maximum number of DFI clock cycles that" newline hexmask.long.word 0x0 0.--9. 1. "DFI_T_CTRLUP_MIN,Minimum number of DFI clock cycles to which" line.long 0x4 "DDRCTRL_REGS_DFIUPD1,DDRCTRL DFI update 1 register" hexmask.long.byte 0x4 16.--23. 1. "DFI_T_CTRLUPD_INTERVAL_MIN_X1024,Minimum amount of time between DDRCTRL initiated DFI update requests (which is executed whenever the DDRCTRL is idle)" hexmask.long.byte 0x4 0.--7. 1. "DFI_T_CTRLUPD_INTERVAL_MAX_X1024,Maximum amount of time between DDRCTRL initiated DFI update requests" line.long 0x8 "DDRCTRL_REGS_DFIUPD2,DDRCTRL DFI update 2 register" bitfld.long 0x8 31. "DFI_PHYUPD_EN,Enables the support for acknowledging PHY-initiated updates" "B_0x0,B_0x1" group.long 0x1B0++0xB line.long 0x0 "DDRCTRL_REGS_DFIMISC,DDRCTRL DFI miscellaneous control register" hexmask.long.byte 0x0 8.--12. 1. "DFI_FREQUENCY,System operating frequency" bitfld.long 0x0 7. "LP_OPTIMIZED_WRITE,Note: Programming mode: Quasi-dynamic Group 3" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "DIS_DYN_ADR_TRI,the PHY can detect it to turn the command/address bus Hi-Z." "B_0x0,B_0x1" bitfld.long 0x0 5. "DFI_INIT_START,PHY init start request" "0,1" newline bitfld.long 0x0 4. "CTL_IDLE_EN,Enables support of ctl_idle signal (non-DFI related pin specific to certain Synopsys PHYs)" "0,1" bitfld.long 0x0 2. "DFI_DATA_CS_POLARITY,Polarity of dfi_wrdata_cs and dfi_rddata_cs signals" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "PHY_DBI_MODE,DBI implemented in DDRC or PHY" "B_0x0,B_0x1" bitfld.long 0x0 0. "DFI_INIT_COMPLETE_EN,PHY initialization complete enable" "0,1" line.long 0x4 "DDRCTRL_REGS_DFITMG2,DDRCTRL DFI timing 2 register" hexmask.long.byte 0x4 8.--14. 1. "DFI_TPHY_RDCSLAT,tless thansub>PHY_RDCSLAT less than/sub>DFI PHY clock cycles between read command sent on the DFI control interface and associated dfi_rddata_cs signal asserted" hexmask.long.byte 0x4 0.--5. 1. "DFI_TPHY_WRCSLAT,tless thansub>PHY_WRCSLATless than/sub> DFI PHY clock cycles between write command sent on the DFI control interface and associated dfi_wrdata_cs signal asserted." line.long 0x8 "DDRCTRL_REGS_DFITMG3,DDRCTRL DFI timing 3 register" hexmask.long.byte 0x8 0.--4. 1. "DFI_T_GEARDOWN_DELAY,Delay from dfi_geardown_en assertion to the time of t" rgroup.long 0x1BC++0x3 line.long 0x0 "DDRCTRL_REGS_DFISTAT,DDRCTRL DFI status register" bitfld.long 0x0 1. "DFI_LP_ACK,Stores the value of dfi_lp_ack input to the controller" "0,1" bitfld.long 0x0 0. "DFI_INIT_COMPLETE,Status flag that announces when DFI initialization is completed" "0,1" group.long 0x1C0++0x7 line.long 0x0 "DDRCTRL_REGS_DBICTL,DDRCTRL DM/DBI control register" bitfld.long 0x0 2. "RD_DBI_EN,Read DBI enable signal in DDRC" "B_0x0,B_0x1" bitfld.long 0x0 1. "WR_DBI_EN,Write DBI enable signal in DDRC" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "DM_EN,DM enable signal in DDRC" "B_0x0,B_0x1" line.long 0x4 "DDRCTRL_REGS_DFIPHYMSTR,DDRCTRL DFI PHY master register" hexmask.long.byte 0x4 24.--31. 1. "DFI_PHYMSTR_BLK_REF_X32,Maximum number of DFI clock cycles that are needed to send pending refreshes before starting SR entry process" bitfld.long 0x4 0. "DFI_PHYMSTR_EN,PHY master interface enable" "B_0x0,B_0x1" group.long 0x200++0x2F line.long 0x0 "DDRCTRL_REGS_ADDRMAP0,DDRCTRL address map 0 register" hexmask.long.byte 0x0 0.--4. 1. "ADDRMAP_CS_BIT0,This bit field selects the HIF address bit used as rank address bit 0." line.long 0x4 "DDRCTRL_REGS_ADDRMAP1,DDRCTRL address map 1 register" hexmask.long.byte 0x4 16.--21. 1. "ADDRMAP_BANK_B2,This bit field selects the HIF address bit used as bank address bit 2." hexmask.long.byte 0x4 8.--13. 1. "ADDRMAP_BANK_B1,This bit field selects the HIF address bits used as bank address bit 1." newline hexmask.long.byte 0x4 0.--5. 1. "ADDRMAP_BANK_B0,This bit field selects the HIF address bits used as bank address bit 0." line.long 0x8 "DDRCTRL_REGS_ADDRMAP2,DDRCTRL address map 2 register" hexmask.long.byte 0x8 24.--27. 1. "ADDRMAP_COL_B5,Full bus width mode: selects the HIF address bit used as columnaddress bit 5." hexmask.long.byte 0x8 16.--19. 1. "ADDRMAP_COL_B4,Full bus width mode: selects the HIF address bit used as column address bit 4." newline hexmask.long.byte 0x8 8.--12. 1. "ADDRMAP_COL_B3,Full bus width mode: selects the HIF address bit used as column address bit 3." hexmask.long.byte 0x8 0.--3. 1. "ADDRMAP_COL_B2,Full bus width mode: selects the HIF address bit used as column address bit 2." line.long 0xC "DDRCTRL_REGS_ADDRMAP3,DDRCTRL address map 3 register" hexmask.long.byte 0xC 24.--28. 1. "ADDRMAP_COL_B9,Full bus width mode: selects the HIF address bit used as column address bit 9." hexmask.long.byte 0xC 16.--20. 1. "ADDRMAP_COL_B8,Full bus width mode: selects the HIF address bit used as column address bit 8." newline hexmask.long.byte 0xC 8.--12. 1. "ADDRMAP_COL_B7,Full bus width mode: selects the HIF address bit used as column address bit 7." hexmask.long.byte 0xC 0.--4. 1. "ADDRMAP_COL_B6,Full bus width mode: selects the HIF address bit used as column address bit 6." line.long 0x10 "DDRCTRL_REGS_ADDRMAP4,DDRCTRL address map 4 register" hexmask.long.byte 0x10 8.--12. 1. "ADDRMAP_COL_B11,Full bus width mode: selects the HIF address bit used as column address bit 13." hexmask.long.byte 0x10 0.--4. 1. "ADDRMAP_COL_B10,Full bus width mode: selects the HIF address bit used as column address bit 11." line.long 0x14 "DDRCTRL_REGS_ADDRMAP5,DDRCTRL address map 5 register" hexmask.long.byte 0x14 24.--27. 1. "ADDRMAP_ROW_B11,This bit field selects the HIF address bit used as row address bit 11." hexmask.long.byte 0x14 16.--19. 1. "ADDRMAP_ROW_B2_10,This bit field selects the HIF address bits used as row address bits 2 to 10." newline hexmask.long.byte 0x14 8.--11. 1. "ADDRMAP_ROW_B1,This bit field selects the HIF address bits used as row address bit 1." hexmask.long.byte 0x14 0.--3. 1. "ADDRMAP_ROW_B0,This bit field selects the HIF address bits used as row address bit 0." line.long 0x18 "DDRCTRL_REGS_ADDRMAP6,DDRCTRL address map 6 register" bitfld.long 0x18 29.--31. "LPDDR34_3GB_6GB_12GB,Density size/channel for LPDDR4 SDRAM device in use" "B_0x0,B_0x1,B_0x2,B_0x3,?,B_0x5,?,?" hexmask.long.byte 0x18 24.--27. 1. "ADDRMAP_ROW_B15,This bit field selects the HIF address bit used as row address bit 15." newline hexmask.long.byte 0x18 16.--19. 1. "ADDRMAP_ROW_B14,This bit field selects the HIF address bit used as row address bit 14." hexmask.long.byte 0x18 8.--11. 1. "ADDRMAP_ROW_B13,This bit field selects the HIF address bit used as row address bit 13." newline hexmask.long.byte 0x18 0.--3. 1. "ADDRMAP_ROW_B12,This bit field selects the HIF address bit used as row address bit 12" line.long 0x1C "DDRCTRL_REGS_ADDRMAP7,DDRCTRL address map 7 register" hexmask.long.byte 0x1C 8.--11. 1. "ADDRMAP_ROW_B17,This bit field selects the HIF address bit used as row address bit 17." hexmask.long.byte 0x1C 0.--3. 1. "ADDRMAP_ROW_B16,This bit field selects the HIF address bit used as row address bit 16." line.long 0x20 "DDRCTRL_REGS_ADDRMAP8,DDRCTRL address map 8 register" hexmask.long.byte 0x20 8.--13. 1. "ADDRMAP_BG_B1,This bit field selects the HIF address bits used as bank group address bit 1." hexmask.long.byte 0x20 0.--5. 1. "ADDRMAP_BG_B0,This bit field selects the HIF address bits used as bank group address bit 0" line.long 0x24 "DDRCTRL_REGS_ADDRMAP9,DDRCTRL address map 9 register" hexmask.long.byte 0x24 24.--27. 1. "ADDRMAP_ROW_B5,This bit field selects the HIF address bits used as row address bit 5." hexmask.long.byte 0x24 16.--19. 1. "ADDRMAP_ROW_B4,This bit field selects the HIF address bits used as row address bit 4" newline hexmask.long.byte 0x24 8.--11. 1. "ADDRMAP_ROW_B3,This bit field selects the HIF address bits used as row address bit 3" hexmask.long.byte 0x24 0.--3. 1. "ADDRMAP_ROW_B2,This bit field selects the HIF address bits used as row address bit 2" line.long 0x28 "DDRCTRL_REGS_ADDRMAP10,DDRCTRL address map 10 register" hexmask.long.byte 0x28 24.--27. 1. "ADDRMAP_ROW_B9,This bit field selects the HIF address bits used as row address bit 9" hexmask.long.byte 0x28 16.--19. 1. "ADDRMAP_ROW_B8,This bit field selects the HIF address bits used as row address bit 8" newline hexmask.long.byte 0x28 8.--11. 1. "ADDRMAP_ROW_B7,This bit field selects the HIF address bits used as row address bit 7" hexmask.long.byte 0x28 0.--3. 1. "ADDRMAP_ROW_B6,This bit field selects the HIF address bits used as row address bit 6" line.long 0x2C "DDRCTRL_REGS_ADDRMAP11,DDRCTRL address map 11 register" hexmask.long.byte 0x2C 0.--3. 1. "ADDRMAP_ROW_B10,This bit field selects the HIF address bits used as row address bit 10" group.long 0x240++0x7 line.long 0x0 "DDRCTRL_REGS_ODTCFG,DDRCTRL ODT configuration register" hexmask.long.byte 0x0 24.--27. 1. "WR_ODT_HOLD,DFI PHY clock cycles to hold ODT for a write command" hexmask.long.byte 0x0 16.--20. 1. "WR_ODT_DELAY,DFI PHY clock cycles from issuing a write command to setting ODT values associated with this command" newline hexmask.long.byte 0x0 8.--11. 1. "RD_ODT_HOLD,DFI PHY clock cycles to hold ODT for a read command" hexmask.long.byte 0x0 2.--6. 1. "RD_ODT_DELAY,DFI PHY clock cycles from issuing a read command to setting ODT values associated with that command" line.long 0x4 "DDRCTRL_REGS_ODTMAP,DDRCTRL ODT/rank map register" bitfld.long 0x4 12.--13. "RANK1_RD_ODT,Remote ODTs to turn on during a read from rank 1" "0,1,2,3" bitfld.long 0x4 8.--9. "RANK1_WR_ODT,Remote ODTs to turn on during a write to rank 1" "0,1,2,3" newline bitfld.long 0x4 4.--5. "RANK0_RD_ODT,Remote ODTs to turn on during a read from rank 0" "0,1,2,3" bitfld.long 0x4 0.--1. "RANK0_WR_ODT,Remote ODTs to turn on during a write to rank 0" "0,1,2,3" group.long 0x250++0x7 line.long 0x0 "DDRCTRL_REGS_SCHED,DDRCTRL scheduler control register" bitfld.long 0x0 31. "OPT_VPRW_SCH,Optimize exVPR/exVPW scheduling." "B_0x0,B_0x1" hexmask.long.byte 0x0 24.--30. 1. "RDWR_IDLE_GAP,When the preferred transaction store is empty for these many clock cycles switch to the alternate transaction store if it is non-empty." newline hexmask.long.byte 0x0 16.--23. 1. "GO2CRITICAL_HYSTERESIS,Not used" bitfld.long 0x0 15. "LPDDR4_OPT_ACT_TIMING,Optimized ACT timing control for LPDDR4" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--12. 1. "LPR_NUM_ENTRIES,Number of entries in the low-priority transaction store" bitfld.long 0x0 7. "AUTOPRE_RMW,Selection of the hif_cmd_autopre behavior if a RMW is received on HIF" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "OPT_WRCAM_FILL_LEVEL,Enable the feature of optimized write CAM fill level by switching to write when write CAM reaches certain fill level set in DDRCTRL_REGS_SCHED3." "B_0x0,B_0x1" bitfld.long 0x0 3. "RDWR_SWITCH_POLICY_SEL,Selects read write switching policy." "B_0x0,B_0x1" newline bitfld.long 0x0 2. "PAGECLOSE,to this bank." "B_0x0,B_0x1" bitfld.long 0x0 1. "PREFER_WRITE,If this bit is set the bank selector prefers writes over reads." "0,1" line.long 0x4 "DDRCTRL_REGS_SCHED1,DDRCTRL scheduler control 1 register" bitfld.long 0x4 31. "OPT_HIT_GT_HPR,Optimize the priority between page-hit LPR and page-miss HPR." "B_0x0,B_0x1" bitfld.long 0x4 28.--30. "PAGE_HIT_LIMIT_RD,Page-hit limiter for read." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x4 24.--26. "PAGE_HIT_LIMIT_WR,Page-hit limiter for write." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x4 20.--22. "VISIBLE_WINDOW_LIMIT_RD,Visible window limiter for read." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x4 16.--18. "VISIBLE_WINDOW_LIMIT_WR,Visible window limiter for write." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.byte 0x4 12.--15. 1. "DELAY_SWITCH_WRITE,Indicates the number of cycles to delay switching read to write mode when write page-hit request is there and no read page-hit request is there." newline hexmask.long.byte 0x4 0.--7. 1. "PAGECLOSE_TIMER,This bit field works in conjunction with PAGECLOSE in DDRCTRL_REGS_SCHED." group.long 0x25C++0x3 line.long 0x0 "DDRCTRL_REGS_PERFHPR1,DDRCTRL high priority read CAM 1 register" hexmask.long.byte 0x0 24.--31. 1. "HPR_XACT_RUN_LENGTH,Transactions serviced once HPR queue goes critical" hexmask.long.word 0x0 0.--15. 1. "HPR_MAX_STARVE,DFI clocks that HPR queue can be starved before it goes critical" group.long 0x264++0x3 line.long 0x0 "DDRCTRL_REGS_PERFLPR1,DDRCTRL low-priority read CAM 1 register" hexmask.long.byte 0x0 24.--31. 1. "LPR_XACT_RUN_LENGTH,Transactions serviced once LPR queue goes critical" hexmask.long.word 0x0 0.--15. 1. "LPR_MAX_STARVE,DFI clocks that LPR queue can be starved before it goes critical" group.long 0x26C++0xB line.long 0x0 "DDRCTRL_REGS_PERFWR1,DDRCTRL write CAM 1 register" hexmask.long.byte 0x0 24.--31. 1. "W_XACT_RUN_LENGTH,Transactions serviced once the WR queue goes critical" hexmask.long.word 0x0 0.--15. 1. "W_MAX_STARVE,DFI clocks that the WR queue can be starved before it goes critical" line.long 0x4 "DDRCTRL_REGS_SCHED3,Scheduler control 3 register" hexmask.long.byte 0x4 24.--28. 1. "RD_PGHIT_NUM_THRESH,Switch to read mode once number of read page-hit request exceeds the threshold set in the register during waiting tless thansub>W2Rless than/sub>." hexmask.long.byte 0x4 16.--20. 1. "WR_PGHIT_NUM_THRESH,Switch to write mode once number of write page-hit request exceeds threshold set in this register during waiting delay_switch_write timeout." newline hexmask.long.byte 0x4 8.--12. 1. "WRCAM_HIGHTHRESH,The high threshold used in optimized write CAM fill level." hexmask.long.byte 0x4 0.--4. 1. "WRCAM_LOWTHRESH,The low threshold used in optimized write CAM fill level." line.long 0x8 "DDRCTRL_REGS_SCHED4,Scheduler control 4 register" hexmask.long.byte 0x8 24.--31. 1. "WR_PAGE_EXP_CYCLES,Indicates the number of cycles to keep the bank opened for write direction in read mode when both directions has request to the bank." hexmask.long.byte 0x8 16.--23. 1. "RD_PAGE_EXP_CYCLES,Indicates the number of cycles to keep the bank opened for read direction in write mode when both directions has request to the bank." newline hexmask.long.byte 0x8 8.--15. 1. "WR_ACT_IDLE_GAP,Indicates the number of cycles when write direction has no request to start preparing bank for read direction." hexmask.long.byte 0x8 0.--7. 1. "RD_ACT_IDLE_GAP,Indicates the number of cycles when read direction has no request to start preparing bank for write direction." group.long 0x300++0x7 line.long 0x0 "DDRCTRL_REGS_DBG0,DDRCTRL debug 0 register" bitfld.long 0x0 7. "DIS_MAX_RANK_WR_OPT,Disable optimized max_rank_wr and max_logical_rank_wr" "0,1" bitfld.long 0x0 6. "DIS_MAX_RANK_RD_OPT,Disable optimized max_rank_rd and max_logical_rank_rd." "0,1" newline bitfld.long 0x0 4. "DIS_COLLISION_PAGE_OPT,Collision cases are write followed by read to the same address read followed by write to the same address or write followed by write to same address with DIS_WC = 1 in this register (where same address comparisons exclude the two.." "B_0x0,?" bitfld.long 0x0 2. "DIS_ACT_BYPASS,Only present in designs supporting activate bypass." "?,B_0x1" newline bitfld.long 0x0 1. "DIS_RD_BYPASS,Only present in designs supporting read bypass." "?,B_0x1" bitfld.long 0x0 0. "DIS_WC,For debug purpose only." "?,B_0x1" line.long 0x4 "DDRCTRL_REGS_DBG1,DDRCTRL debug 1 register" bitfld.long 0x4 1. "DIS_HIF,This bit is intended to be switched on-the-fly." "?,B_0x1" bitfld.long 0x4 0. "DIS_DQ,All transactions are queued in the CAM." "?,B_0x1" rgroup.long 0x308++0x3 line.long 0x0 "DDRCTRL_REGS_DBGCAM,DDRCTRL CAM debug register" bitfld.long 0x0 29. "WR_DATA_PIPELINE_EMPTY,Empty write data pipeline on the DFI interface" "0,1" bitfld.long 0x0 28. "RD_DATA_PIPELINE_EMPTY,Empty read data pipeline on the DFI interface" "0,1" newline bitfld.long 0x0 26. "DBG_WR_Q_EMPTY,Use-case: When the DDRCTRL enters SR using the low-power entry sequence the following is expected:" "?,B_0x1" bitfld.long 0x0 25. "DBG_RD_Q_EMPTY,Use-case: When the DDRCTRL enters SR using the low-power entry sequence the following is expected:" "?,B_0x1" newline bitfld.long 0x0 24. "DBG_STALL,Stall (for debug purpose only)" "0,1" hexmask.long.byte 0x0 16.--21. 1. "DBG_W_Q_DEPTH,Write queue depth (for debug purpose only)" newline hexmask.long.byte 0x0 8.--13. 1. "DBG_LPR_Q_DEPTH,Low-priority read queue depth (for debug purpose only)" hexmask.long.byte 0x0 0.--5. 1. "DBG_HPR_Q_DEPTH,High-priority read queue depth (for debug purpose only)" group.long 0x30C++0x3 line.long 0x0 "DDRCTRL_REGS_DBGCMD,DDRCTRL command debug register" bitfld.long 0x0 5. "CTRLUPD,dfi_ctrlupd_req to the PHY" "?,B_0x1" bitfld.long 0x0 4. "ZQ_CALIB_SHORT,ZQCS/MPC command to the SDRAM" "?,B_0x1" newline bitfld.long 0x0 1. "RANK1_REFRESH,Refresh to rank 1" "?,B_0x1" bitfld.long 0x0 0. "RANK0_REFRESH,Refresh to rank 0" "?,B_0x1" rgroup.long 0x310++0x3 line.long 0x0 "DDRCTRL_REGS_DBGSTAT,DDRCTRL status debug register" bitfld.long 0x0 5. "CTRLUPD_BUSY,CTRLUPD operation" "B_0x0,B_0x1" bitfld.long 0x0 4. "ZQ_CALIB_SHORT_BUSY,ZQCS operation" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "RANK1_REFRESH_BUSY,rank1_refresh operation" "B_0x0,B_0x1" bitfld.long 0x0 0. "RANK0_REFRESH_BUSY,rank0_refresh operation" "B_0x0,B_0x1" group.long 0x320++0x3 line.long 0x0 "DDRCTRL_REGS_SWCTL,DDRCTRL software programming control enable register" bitfld.long 0x0 0. "SW_DONE,Enable quasi-dynamic register programming outside reset" "B_0x0,?" rgroup.long 0x324++0x3 line.long 0x0 "DDRCTRL_REGS_SWSTAT,DDRCTRL software programming control status register" bitfld.long 0x0 0. "SW_DONE_ACK,Register programming done" "0,1" group.long 0x328++0x3 line.long 0x0 "DDRCTRL_REGS_SWCTLSTATIC,DDRCTRL statics write enable register" bitfld.long 0x0 0. "SW_STATIC_UNLOCK,Enables static register programming outside reset" "?,B_0x1" group.long 0x36C++0x3 line.long 0x0 "DDRCTRL_REGS_POISONCFG,DDRCTRL AXI poison configuration register" bitfld.long 0x0 24. "RD_POISON_INTR_CLR,Interrupt clear for read transaction poisoning" "0,1" bitfld.long 0x0 20. "RD_POISON_INTR_EN,Interrupts for read transaction poisoning enable" "?,B_0x1" newline bitfld.long 0x0 16. "RD_POISON_SLVERR_EN,SLVERR response for read transaction poisoning enable" "?,B_0x1" bitfld.long 0x0 8. "WR_POISON_INTR_CLR,Interrupt clear for write transaction poisoning" "0,1" newline bitfld.long 0x0 4. "WR_POISON_INTR_EN,Interrupts for write transaction poisoning enable" "?,B_0x1" bitfld.long 0x0 0. "WR_POISON_SLVERR_EN,SLVERR response for write transaction poisoning enable" "?,B_0x1" rgroup.long 0x370++0x3 line.long 0x0 "DDRCTRL_REGS_POISONSTAT,DDRCTRL AXI poison status register" bitfld.long 0x0 17. "RD_POISON_INTR_1,Read transaction poisoning error interrupt for port 1" "0,1" bitfld.long 0x0 16. "RD_POISON_INTR_0,Read transaction poisoning error interrupt for port 0" "0,1" newline bitfld.long 0x0 1. "WR_POISON_INTR_1,Write transaction poisoning error interrupt for port 1" "0,1" bitfld.long 0x0 0. "WR_POISON_INTR_0,Write transaction poisoning error interrupt for port 0" "0,1" rgroup.long 0x3F0++0x3 line.long 0x0 "DDRCTRL_REGS_DERATESTAT,DDRCTRL temperature derate status register" bitfld.long 0x0 0. "DERATE_TEMP_LIMIT_INTR,Derate temperature interrupt" "0,1" rgroup.long 0x3FC++0x3 line.long 0x0 "DDRCTRL_MP_PSTAT,DDRCTRL port status register" bitfld.long 0x0 17. "WR_PORT_BUSY_1,Indicates if there are outstanding writes for AXI port 1." "0,1" bitfld.long 0x0 16. "WR_PORT_BUSY_0,Indicates if there are outstanding writes for AXI port 0." "0,1" newline bitfld.long 0x0 1. "RD_PORT_BUSY_1,Indicates if there are outstanding reads for AXI port 1." "0,1" bitfld.long 0x0 0. "RD_PORT_BUSY_0,Indicates if there are outstanding reads for AXI port 0." "0,1" group.long 0x400++0xB line.long 0x0 "DDRCTRL_MP_PCCFG,DDRCTRL port common configuration register" bitfld.long 0x0 8. "BL_EXP_MODE,Burst length expansion mode" "B_0x0,B_0x1" bitfld.long 0x0 4. "PAGEMATCH_LIMIT,Page match four limit" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "GO2CRITICAL_EN,Note: Programming mode: Static." "disabled,enabled" line.long 0x4 "DDRCTRL_MP_PCFGR_0,DDRCTRL port 0 configuration read register" hexmask.long.byte 0x4 20.--23. 1. "RRB_LOCK_THRESHOLD,Specifies the RRB lock threshold in configurations that disable read data interleaving." bitfld.long 0x4 14. "RD_PORT_PAGEMATCH_EN,Page match feature enable" "?,B_0x1" newline bitfld.long 0x4 13. "RD_PORT_URGENT_EN,AXI urgent sideband signal (arurgent) enable" "?,B_0x1" bitfld.long 0x4 12. "RD_PORT_AGING_EN,Aging function for the read channel enable" "?,B_0x1" newline hexmask.long.word 0x4 0.--9. 1. "RD_PORT_PRIORITY,Initial load value of read aging counters" line.long 0x8 "DDRCTRL_MP_PCFGW_0,DDRCTRL port 0 configuration write register" bitfld.long 0x8 14. "WR_PORT_PAGEMATCH_EN,Page match feature enable" "?,B_0x1" bitfld.long 0x8 13. "WR_PORT_URGENT_EN,AXI urgent sideband signal (awurgent) enable" "?,B_0x1" newline bitfld.long 0x8 12. "WR_PORT_AGING_EN,Aging function enable for the write channel" "?,B_0x1" hexmask.long.word 0x8 0.--9. 1. "WR_PORT_PRIORITY,Initial load value of write aging counters" group.long 0x490++0x13 line.long 0x0 "DDRCTRL_MP_PCTRL_0,DDRCTRL port 0 control register" bitfld.long 0x0 0. "PORT_EN,Enable the AXI port x." "0,1" line.long 0x4 "DDRCTRL_MP_PCFGQOS0_0,DDRCTRL port 0 read QoS configuration 0 register" bitfld.long 0x4 20.--21. "RQOS_MAP_REGION1,Traffic class of region 1" "B_0x0,B_0x1,?,?" bitfld.long 0x4 16.--17. "RQOS_MAP_REGION0,Traffic class of region 0" "?,B_0x1,?,?" newline hexmask.long.byte 0x4 0.--3. 1. "RQOS_MAP_LEVEL1,Separation level1 that gives the end of region 0 mapping" line.long 0x8 "DDRCTRL_MP_PCFGQOS1_0,DDRCTRL port 0 read QoS configuration 1 register" hexmask.long.word 0x8 16.--26. 1. "RQOS_MAP_TIMEOUTR,Timeout value for transactions mapped to red address queue" hexmask.long.word 0x8 0.--10. 1. "RQOS_MAP_TIMEOUTB,Timeout value for transactions mapped to blue address queue" line.long 0xC "DDRCTRL_MP_PCFGWQOS0_0,DDRCTRL port 0 write QoS configuration 0 register" bitfld.long 0xC 24.--25. "WQOS_MAP_REGION2,Traffic class of region 2" "B_0x0,B_0x1,?,?" bitfld.long 0xC 20.--21. "WQOS_MAP_REGION1,Traffic class of region 1" "B_0x0,B_0x1,?,?" newline bitfld.long 0xC 16.--17. "WQOS_MAP_REGION0,Traffic class of region 0" "?,B_0x1,?,?" hexmask.long.byte 0xC 8.--11. 1. "WQOS_MAP_LEVEL2,Separation level2 that indicates the end of region 1 mapping" newline hexmask.long.byte 0xC 0.--3. 1. "WQOS_MAP_LEVEL1,Separation level indicating the end of region 0 mapping" line.long 0x10 "DDRCTRL_MP_PCFGWQOS1_0,DDRCTRL port 0 write QoS configuration 1 register" hexmask.long.word 0x10 16.--26. 1. "WQOS_MAP_TIMEOUT2,Timeout value for write transactions in region 2" hexmask.long.word 0x10 0.--10. 1. "WQOS_MAP_TIMEOUT1,Timeout value for write transactions in region 0 and 1" group.long 0x4B4++0x7 line.long 0x0 "DDRCTRL_MP_PCFGR_1,DDRCTRL port 1 configuration read register" hexmask.long.byte 0x0 20.--23. 1. "RRB_LOCK_THRESHOLD,Specifies the RRB lock threshold in configurations that disable read data interleaving." bitfld.long 0x0 14. "RD_PORT_PAGEMATCH_EN,Page match feature enable" "?,B_0x1" newline bitfld.long 0x0 13. "RD_PORT_URGENT_EN,AXI urgent sideband signal (arurgent) enable" "?,B_0x1" bitfld.long 0x0 12. "RD_PORT_AGING_EN,Aging function for the read channel enable" "?,B_0x1" newline hexmask.long.word 0x0 0.--9. 1. "RD_PORT_PRIORITY,Initial load value of read aging counters" line.long 0x4 "DDRCTRL_MP_PCFGW_1,DDRCTRL port 1 configuration write register" bitfld.long 0x4 14. "WR_PORT_PAGEMATCH_EN,Page match feature enable" "?,B_0x1" bitfld.long 0x4 13. "WR_PORT_URGENT_EN,AXI urgent sideband signal (awurgent) enable" "?,B_0x1" newline bitfld.long 0x4 12. "WR_PORT_AGING_EN,Aging function enable for the write channel" "?,B_0x1" hexmask.long.word 0x4 0.--9. 1. "WR_PORT_PRIORITY,Initial load value of write aging counters" group.long 0x540++0x13 line.long 0x0 "DDRCTRL_MP_PCTRL_1,DDRCTRL port 1 control register" bitfld.long 0x0 0. "PORT_EN,Enable the AXI port x." "0,1" line.long 0x4 "DDRCTRL_MP_PCFGQOS0_1,DDRCTRL port 1 read QoS configuration 0 register" bitfld.long 0x4 20.--21. "RQOS_MAP_REGION1,Traffic class of region 1" "B_0x0,B_0x1,?,?" bitfld.long 0x4 16.--17. "RQOS_MAP_REGION0,Traffic class of region 0" "?,B_0x1,?,?" newline hexmask.long.byte 0x4 0.--3. 1. "RQOS_MAP_LEVEL1,Separation level1 that gives the end of region 0 mapping" line.long 0x8 "DDRCTRL_MP_PCFGQOS1_1,DDRCTRL port 1 read QoS configuration 1 register" hexmask.long.word 0x8 16.--26. 1. "RQOS_MAP_TIMEOUTR,Timeout value for transactions mapped to red address queue" hexmask.long.word 0x8 0.--10. 1. "RQOS_MAP_TIMEOUTB,Timeout value for transactions mapped to blue address queue" line.long 0xC "DDRCTRL_MP_PCFGWQOS0_1,DDRCTRL port 1 write QoS configuration 0 register" bitfld.long 0xC 24.--25. "WQOS_MAP_REGION2,Traffic class of region 2" "B_0x0,B_0x1,?,?" bitfld.long 0xC 20.--21. "WQOS_MAP_REGION1,Traffic class of region 1" "B_0x0,B_0x1,?,?" newline bitfld.long 0xC 16.--17. "WQOS_MAP_REGION0,Traffic class of region 0" "?,B_0x1,?,?" hexmask.long.byte 0xC 8.--11. 1. "WQOS_MAP_LEVEL2,Separation level2 that indicates the end of region 1 mapping" newline hexmask.long.byte 0xC 0.--3. 1. "WQOS_MAP_LEVEL1,Separation level indicating the end of region 0 mapping" line.long 0x10 "DDRCTRL_MP_PCFGWQOS1_1,DDRCTRL port 1 write QoS configuration 1 register" hexmask.long.word 0x10 16.--26. 1. "WQOS_MAP_TIMEOUT2,Timeout value for write transactions in region 2" hexmask.long.word 0x10 0.--10. 1. "WQOS_MAP_TIMEOUT1,Timeout value for write transactions in region 0 and 1" rgroup.long 0xFF0++0x7 line.long 0x0 "DDRCTRL_MP_DDRCTRL_VER_NUMBER,DDRCTRL version number register" hexmask.long 0x0 0.--31. 1. "VER_NUMBER,Device version number" line.long 0x4 "DDRCTRL_MP_DDRCTRL_VER_TYPE,DDRCTRL version type register" hexmask.long 0x4 0.--31. 1. "VER_TYPE,Device version type value" tree.end tree "DDRCTRL_S" base ad:0x58040000 group.long 0x0++0x3 line.long 0x0 "DDRCTRL_REGS_MSTR,DDRCTRL master0 register" bitfld.long 0x0 30.--31. "DEVICE_CONFIG,Device configuration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "ACTIVE_RANKS,Only present for multi-rank configurations" "B_0x0,B_0x1,?,B_0x3" newline hexmask.long.byte 0x0 16.--19. 1. "BURST_RDWR,SDRAM burst length" bitfld.long 0x0 15. "DLL_OFF_MODE,Note: Programming mode: Quasi-dynamic Group 2." "B_0x0,B_0x1" newline bitfld.long 0x0 12.--13. "DATA_BUS_WIDTH,Proportion of DQ bus width that is used by the SDRAM" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 10. "EN_2T_TIMING_MODE,In 2T timing all command signals (except chip select) are held for two clocks on the SDRAM bus." "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BURSTCHOP,Burst chop (BC4 or 8 on-the-fly) enable in DDR3L/DDR4" "0,1" bitfld.long 0x0 5. "LPDDR4,Selects LPDDR4 SDRAM" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "DDR4,Selects DDR4 SDRAM" "B_0x0,B_0x1" bitfld.long 0x0 0. "DDR3L,Selects DDR3L SDRAM" "B_0x0,B_0x1" rgroup.long 0x4++0x3 line.long 0x0 "DDRCTRL_REGS_STAT,DDRCTRL operating mode status register" bitfld.long 0x0 12. "SELFREF_CAM_NOT_EMPTY,Self-refresh (SR) with CAMs not empty" "0,1" bitfld.long 0x0 8.--9. "SELFREF_STATE,SR or SRPD (SR power-down) for LPDDR4" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 4.--5. "SELFREF_TYPE,Flags if SR (except LPDDR4) or SRPD (LPDDR4) is entered and if it is under automatic SR control only or not" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--2. "OPERATING_MODE,DDR3L design:" "B_0x0,B_0x1,B_0x2,B_0x3,?,?,?,?" group.long 0x10++0x7 line.long 0x0 "DDRCTRL_REGS_MRCTRL0,DDRCTRL mode read/write control 0 register" bitfld.long 0x0 31. "MR_WR,Mode register (MR) read or write" "0,1" bitfld.long 0x0 30. "PBA_MODE,PBA access execution" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 12.--15. 1. "MR_ADDR,MR address to be written to" bitfld.long 0x0 4.--5. "MR_RANK,Rank accessed by MR_WR in this register" "?,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 3. "SW_INIT_INT,Software intervention enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "PDA_EN,Mode register operation is MRS in PDA mode or not" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "MPR_EN,Mode register operation is MRS or WR/RD for MPR (only supported for DDR4)" "B_0x0,B_0x1" bitfld.long 0x0 0. "MR_TYPE,Mode register operation is read or write (only for LPDDR4/DDR4)" "B_0x0,B_0x1" line.long 0x4 "DDRCTRL_REGS_MRCTRL1,DDRCTRL mode read/write control 1 register" hexmask.long.tbyte 0x4 0.--17. 1. "MR_DATA,Mode register write data for all non-LPDDR4 modes" rgroup.long 0x18++0x3 line.long 0x0 "DDRCTRL_REGS_MRSTAT,DDRCTRL mode register read/write status register" bitfld.long 0x0 8. "PDA_DONE,Initiate an MR write operation in PDA/PBA mode only if this bit is low" "B_0x0,B_0x1" bitfld.long 0x0 0. "MR_WR_BUSY,Initiate an MR write operation only if this bit is low" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "DDRCTRL_REGS_MRCTRL2,DDRCTRL mode register read/write control 2 register" hexmask.long 0x0 0.--31. 1. "MR_DEVICE_SEL,Device selection during the MRS that happens in PDA mode" line.long 0x4 "DDRCTRL_REGS_DERATEEN,DDRCTRL temperature derate enable register" bitfld.long 0x4 13. "DERATE_MR4_PAUSE_FC,Pauses MR4 reads" "0,1" bitfld.long 0x4 12. "DERATE_MR4_TUF_DIS,Disables use of MR4 TUF flag (MR4[7])" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--10. "RC_DERATE_VALUE,Derate value of tless thansub>RCless than/sub> for LPDDR4" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0x4 4.--7. 1. "DERATE_BYTE,MRR data used for derating" newline bitfld.long 0x4 1.--2. "DERATE_VALUE,Derate value" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0. "DERATE_ENABLE,Enables derating" "B_0x0,B_0x1" line.long 0x8 "DDRCTRL_REGS_DERATEINT,DDRCTRL temperature derate interval register" hexmask.long 0x8 0.--31. 1. "MR4_READ_INTERVAL,Interval between two MR4 reads" group.long 0x2C++0xF line.long 0x0 "DDRCTRL_REGS_DERATECTL,DDRCTRL temperature derate control register" bitfld.long 0x0 2. "DERATE_TEMP_LIMIT_INTR_FORCE,Interrupt force bit for DERATE_TEMP_LIMIT_INTR" "0,1" bitfld.long 0x0 1. "DERATE_TEMP_LIMIT_INTR_CLR,Interrupt clear bit for DERATE_TEMP_LIMIT_INTR" "0,1" newline bitfld.long 0x0 0. "DERATE_TEMP_LIMIT_INTR_EN,Interrupt enable bit for DERATE_TEMP_LIMIT_INTR" "B_0x0,B_0x1" line.long 0x4 "DDRCTRL_REGS_PWRCTL,DDRCTRL low-power control register" bitfld.long 0x4 8. "LPDDR4_SR_ALLOWED,Transition from SRPD to SR and back to SRPD allowed" "B_0x0,B_0x1" bitfld.long 0x4 7. "DIS_CAM_DRAIN_SELFREF,Skipping CAM draining allowed when entering SR" "B_0x0,B_0x1" newline bitfld.long 0x4 6. "STAY_IN_SELFREF,SR state transition" "B_0x0,B_0x1" bitfld.long 0x4 5. "SELFREF_SW,SR state entry" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "EN_DFI_DRAM_CLK_DISABLE,dfi_dram_clk_disable enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "POWERDOWN_EN,PDN enable" "0,1" newline bitfld.long 0x4 0. "SELFREF_EN,SDRAM into SR enable" "0,1" line.long 0x8 "DDRCTRL_REGS_PWRTMG,DDRCTRL low-power timing register" hexmask.long.byte 0x8 16.--23. 1. "SELFREF_TO_X32,Maximum idle clocks before SR" hexmask.long.byte 0x8 0.--4. 1. "POWERDOWN_TO_X32,Maximum idle clocks before PDN" line.long 0xC "DDRCTRL_REGS_HWLPCTL,DDRCTRL hardware low-power control register" hexmask.long.word 0xC 16.--27. 1. "HW_LP_IDLE_X32,Hardware idle period" bitfld.long 0xC 1. "HW_LP_EXIT_IDLE_EN,CACTIVE_IN_DDRC pin enable" "0,1" newline bitfld.long 0xC 0. "HW_LP_EN,Hardware low-power interface enable" "0,1" group.long 0x50++0x7 line.long 0x0 "DDRCTRL_REGS_RFSHCTL0,DDRCTRL refresh control 0 register" hexmask.long.byte 0x0 27.--31. 1. "REFRESH_TO_AB_X32,When the DDRCTRL switches automatically from per-bank to all-bank refresh (if enabled by AUTO_REFAB_EN[1:0]) it will use this register to determine when to perform speculative all-bank refreshes." hexmask.long.byte 0x0 20.--23. 1. "REFRESH_MARGIN,DFI clock cycles before the critical refresh or page timer expires" newline hexmask.long.byte 0x0 12.--16. 1. "REFRESH_TO_X1_X32,If the refresh timer (tless thansub>RFCnomless than/sub> also known as tless thansub>REFIless than/sub>) has expired at least once a speculative refresh can be performed." hexmask.long.byte 0x0 4.--9. 1. "REFRESH_BURST,This bit field + 1 is the number of refresh timeouts that can be accumulated before traffic is blocked and refreshes are forced to execute." newline bitfld.long 0x0 2. "PER_BANK_REFRESH,Per bank refresh allows traffic to flow to other banks (supported by all LPDDR4 devices)." "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "AUTO_REFAB_EN,Enables automatic switching from per-bank to all-bank refresh when the derated refresh period is small." "B_0x0,B_0x1,B_0x2,?" line.long 0x4 "DDRCTRL_REGS_RFSHCTL1,DDRCTRL refresh control 1 register" hexmask.long.word 0x4 16.--27. 1. "REFRESH_TIMER1_START_VALUE_X32,Refresh timer start for rank 1 (only present in multirank configurations)" hexmask.long.word 0x4 0.--11. 1. "REFRESH_TIMER0_START_VALUE_X32,Refresh timer start for rank 0 (only present in multirank configurations)" group.long 0x60++0xB line.long 0x0 "DDRCTRL_REGS_RFSHCTL3,DDRCTRL refresh control 3 register" bitfld.long 0x0 4.--6. "REFRESH_MODE,Fine granularity refresh mode" "B_0x0,B_0x1,B_0x2,?,?,B_0x5,B_0x6,?" bitfld.long 0x0 1. "REFRESH_UPDATE_LEVEL,Refresh register update" "0,1" newline bitfld.long 0x0 0. "DIS_AUTO_REFRESH,Auto-refresh disable" "0,1" line.long 0x4 "DDRCTRL_REGS_RFSHTMG,DDRCTRL refresh timing register" bitfld.long 0x4 31. "T_RFC_NOM_X1_SEL,This bit specifies whether values of T_RFC_NOM_X1_X32 in this register and REFRESH_TO_X1_X32 in DDRCTRL_REGS_RFSHCTL0 are x1 or x32." "B_0x0,B_0x1" hexmask.long.word 0x4 16.--27. 1. "T_RFC_NOM_X1_X32,Average time interval between refreshes per rank" newline hexmask.long.word 0x4 0.--9. 1. "T_RFC_MIN,tless thansub>RFCminless than/sub> minimum time from refresh to refresh or activate" line.long 0x8 "DDRCTRL_REGS_RFSHTMG1,DDRCTRL refresh timing1 register" hexmask.long.byte 0x8 16.--23. 1. "T_PBR2PBR,tless thansub>pbR2pbRless than/sub> for LPDDR4" group.long 0xD0++0x7 line.long 0x0 "DDRCTRL_REGS_INIT0,DDRCTRL SDRAM initialization 0 register" bitfld.long 0x0 30.--31. "SKIP_DRAM_INIT,SDRAM initialization routine" "B_0x0,B_0x1,?,B_0x3" hexmask.long.word 0x0 16.--25. 1. "POST_CKE_X1024,Number of cycles to wait after driving CKE high to start the SDRAM initialization sequence" newline hexmask.long.word 0x0 0.--11. 1. "PRE_CKE_X1024,Number of cycles to wait after reset before driving CKE high to start the SDRAM initialization sequence" line.long 0x4 "DDRCTRL_REGS_INIT1,DDRCTRL SDRAM initialization 1 register" hexmask.long.word 0x4 16.--24. 1. "DRAM_RSTN_X1024,Number of cycles to assert SDRAM reset signal during" hexmask.long.byte 0x4 0.--3. 1. "PRE_OCD_X32,Wait period before driving the OCD complete command to SDRAM" group.long 0xDC++0x13 line.long 0x0 "DDRCTRL_REGS_INIT3,DDRCTRL SDRAM initialization 3 register" hexmask.long.word 0x0 16.--31. 1. "MR,DDR3L/DDR4: Value loaded into MR0 register" hexmask.long.word 0x0 0.--15. 1. "EMR,DDR3L/DDR4: Value to write to MR1 register (set bit 7 to 0)" line.long 0x4 "DDRCTRL_REGS_INIT4,DDRCTRL SDRAM initialization 4 register" hexmask.long.word 0x4 16.--31. 1. "EMR2,DDR3L/DDR4: Value to write to MR2 register" hexmask.long.word 0x4 0.--15. 1. "EMR3,DDR3L/DDR4: Value to write to MR3 register" line.long 0x8 "DDRCTRL_REGS_INIT5,DDRCTRL SDRAM initialization 5 register" hexmask.long.byte 0x8 16.--23. 1. "DEV_ZQINIT_X32,tless thansub>ZQINITless than/sub> ZQ initial calibration" line.long 0xC "DDRCTRL_REGS_INIT6,DDRCTRL SDRAM initialization 6 register" hexmask.long.word 0xC 16.--31. 1. "MR4,DDR4: Value to be loaded into SDRAM MR4 registers" hexmask.long.word 0xC 0.--15. 1. "MR5,DDR4: Value to be loaded into SDRAM MR5 registers" line.long 0x10 "DDRCTRL_REGS_INIT7,DDRCTRL SDRAM initialization 7 register" hexmask.long.word 0x10 16.--31. 1. "MR22,LPDDR4: Value to be loaded into SDRAM MR22 registers" hexmask.long.word 0x10 0.--15. 1. "MR6,DDR4: Value to be loaded into SDRAM MR6 registers" group.long 0xF4++0x7 line.long 0x0 "DDRCTRL_REGS_RANKCTL,DDRCTRL rank control register" bitfld.long 0x0 26. "DIFF_RANK_WR_GAP_MSB,1-bit extension to be used when DIFF_RANK_WR_GAP in this register needs to be set" "0,1" bitfld.long 0x0 24. "DIFF_RANK_RD_GAP_MSB,1-bit extension to be used when DIFF_RANK_RD_GAP in this register needs to be set" "0,1" newline hexmask.long.byte 0x0 12.--15. 1. "MAX_RANK_WR,Maximum number of writes that can be scheduled consecutively" hexmask.long.byte 0x0 8.--11. 1. "DIFF_RANK_WR_GAP,Number of clocks of gap in data responses when performing consecutive writes to different ranks (only present for multirank configurations)" newline hexmask.long.byte 0x0 4.--7. 1. "DIFF_RANK_RD_GAP,Number of clocks of gap in data responses when performing consecutive reads to different ranks (only present for multi-rank configurations)" hexmask.long.byte 0x0 0.--3. 1. "MAX_RANK_RD,Maximum number of reads that can be scheduled consecutively" line.long 0x4 "DDRCTRL_REGS_RANKCTL1,Rank control 1 register" hexmask.long.byte 0x4 0.--5. 1. "WR2RD_DR,Minimum time from write command to read command on different physical ranks." group.long 0x100++0x3F line.long 0x0 "DDRCTRL_REGS_DRAMTMG0,DDRCTRL SDRAM timing 0 register" hexmask.long.byte 0x0 24.--30. 1. "WR2PRE,Minimum time between write and precharge to same bank" hexmask.long.byte 0x0 16.--21. 1. "T_FAW,tless thansub>FAWless than/sub> valid only when 8 or more banks (or banks x bank groups) are present" newline hexmask.long.byte 0x0 8.--14. 1. "T_RAS_MAX,tless thansub>RASmaxless than/sub> max time between activate and precharge to same bank" hexmask.long.byte 0x0 0.--5. 1. "T_RAS_MIN,tless thansub>RASminless than/sub> minimum time between activate and precharge to same bank" line.long 0x4 "DDRCTRL_REGS_DRAMTMG1,DDRCTRL SDRAM timing 1 register" hexmask.long.byte 0x4 16.--20. 1. "T_XP,tless thansub>XPless than/sub> minimum time after PDN exit to any operation" hexmask.long.byte 0x4 8.--13. 1. "RD2PRE,tless thansub>RTPless than/sub> minimum time from read to precharge of same bank" newline hexmask.long.byte 0x4 0.--6. 1. "T_RC,tless thansub>RCless than/sub> minimum time between activates to same bank" line.long 0x8 "DDRCTRL_REGS_DRAMTMG2,DDRCTRL SDRAM timing 2 register" hexmask.long.byte 0x8 24.--29. 1. "WRITE_LATENCY,Time from write command to write data on SDRAM interface" hexmask.long.byte 0x8 16.--21. 1. "READ_LATENCY,Time from read command to read data on SDRAM interface" newline hexmask.long.byte 0x8 8.--13. 1. "RD2WR,Minimum time from read command to write command" hexmask.long.byte 0x8 0.--5. 1. "WR2RD,In DDR4 minimum time from write command to read command for same bank group." line.long 0xC "DDRCTRL_REGS_DRAMTMG3,DDRCTRL SDRAM timing 3 register" hexmask.long.word 0xC 20.--29. 1. "T_MRW,Time to wait after a mode register write or read (MRW or MRR)" hexmask.long.byte 0xC 12.--17. 1. "T_MRD,tless thansub>MRDless than/sub> number of cycles to wait after a mode register write or read" newline hexmask.long.word 0xC 0.--9. 1. "T_MOD,tless thansub>MODless than/sub> number of cycles between load mode command and following non-load mode command (only in DDR3L and DDR4)" line.long 0x10 "DDRCTRL_REGS_DRAMTMG4,DDRCTRL SDRAM timing 4 register" hexmask.long.byte 0x10 24.--28. 1. "T_RCD,tless thansub>RCDless than/sub> - tless thansub>ALless than/sub> minimum time from activate to read or write command to same bank" hexmask.long.byte 0x10 16.--19. 1. "T_CCD,For DDR4 tless thansub>CCD_Lless than/sub> minimum time between two reads or two writes for same bank group." newline hexmask.long.byte 0x10 8.--11. 1. "T_RRD,For DDR4 tless thansub>RRD_Lless than/sub> minimum time between activates from bank a to bank b for same bank." hexmask.long.byte 0x10 0.--4. 1. "T_RP,tless thansub>RPless than/sub> minimum time from single-bank precharge to activate of same bank" line.long 0x14 "DDRCTRL_REGS_DRAMTMG5,DDRCTRL SDRAM timing 5 register" hexmask.long.byte 0x14 24.--27. 1. "T_CKSRX,Time before SR exit that CK is maintained as a valid clock before issuing SRX" hexmask.long.byte 0x14 16.--22. 1. "T_CKSRE,Time after SR entry that CK is maintained as a valid clock" newline hexmask.long.byte 0x14 8.--13. 1. "T_CKESR,Minimum CKE low width for SR or SRPD entry to exit timing" hexmask.long.byte 0x14 0.--4. 1. "T_CKE,Minimum number of cycles of CKE high/low during PDN and SR" line.long 0x18 "DDRCTRL_REGS_DRAMTMG6,DDRCTRL SDRAM timing 6 register" hexmask.long.byte 0x18 0.--3. 1. "T_CKCSX,time before clock Stop exit that CK is maintained as a valid clock before issuing clock Stop exit" line.long 0x1C "DDRCTRL_REGS_DRAMTMG7,DDRCTRL SDRAM timing 7 register" hexmask.long.byte 0x1C 8.--11. 1. "T_CKPDE,Time after PDN entry that CK is maintained as a valid clock" hexmask.long.byte 0x1C 0.--3. 1. "T_CKPDX,Time before PDN exit that CK is maintained as a valid clock" line.long 0x20 "DDRCTRL_REGS_DRAMTMG8,DDRCTRL SDRAM timing 8 register" hexmask.long.byte 0x20 24.--30. 1. "T_XS_FAST_X32,tless thansub>XS_FASTless than/sub> exit SR to ZQCL ZQCS and MRS (only CL WR RTP mode)" hexmask.long.byte 0x20 16.--22. 1. "T_XS_ABORT_X32,tless thansub>XS_ABORTless than/sub> exit SR to commands not requiring a locked DLL" newline hexmask.long.byte 0x20 8.--14. 1. "T_XS_DLL_X32,tless thansub>XSDLLless than/sub> exit SR to commands requiring a locked DLL (only for DDR3L and DDR4 SDRAMs)" hexmask.long.byte 0x20 0.--6. 1. "T_XS_X32,tless thansub>XSless than/sub> exit SR to commands not requiring a locked DLL (only for DDR3L and DDR4 SDRAMs)" line.long 0x24 "DDRCTRL_REGS_DRAMTMG9,DDRCTRL SDRAM timing 9 register" bitfld.long 0x24 30. "DDR4_WR_PREAMBLE,DDR4 write preamble mode" "B_0x0,B_0x1" bitfld.long 0x24 16.--18. "T_CCD_S,tless thansub>CCD_Sless than/sub> minimum time between two reads/writes for different bank group" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x24 8.--11. 1. "T_RRD_S,tless thansub>RRD_Sless than/sub> minimum time between activates for different bank group" hexmask.long.byte 0x24 0.--5. 1. "WR2RD_S,Minimum time from write command to read command for different bank group" line.long 0x28 "DDRCTRL_REGS_DRAMTMG10,DDRCTRL SDRAM timing 10 register" hexmask.long.byte 0x28 16.--20. 1. "T_SYNC_GEAR,Time between MRS command and the sync pulse time" hexmask.long.byte 0x28 8.--12. 1. "T_CMD_GEAR,sync pulse to first valid command" newline bitfld.long 0x28 2.--3. "T_GEAR_SETUP,Geardown setup time" "0,1,2,3" bitfld.long 0x28 0.--1. "T_GEAR_HOLD,Geardown hold time" "0,1,2,3" line.long 0x2C "DDRCTRL_REGS_DRAMTMG11,DDRCTRL SDRAM timing 11 register" hexmask.long.byte 0x2C 24.--30. 1. "POST_MPSM_GAP_X32,tless thansub>XMPDLLless than/sub> minimum exit MPSM to commands requiring" hexmask.long.byte 0x2C 16.--20. 1. "T_MPX_LH,tless thansub>MPX_LHless than/sub> minimum CS_n low hold time to CKE rising edge" newline bitfld.long 0x2C 8.--9. "T_MPX_S,tless thansub>MPX_Sless than/sub> minimum time CS setup time to CKE" "0,1,2,3" hexmask.long.byte 0x2C 0.--4. 1. "T_CKMPE,tless thansub>CKMPEless than/sub> minimum valid clock requirement after MPSM entry" line.long 0x30 "DDRCTRL_REGS_DRAMTMG12,DDRCTRL SDRAM timing 12 register" hexmask.long.byte 0x30 24.--29. 1. "T_WR_MPR,Cycles between MPR write and other commands (DDR4 only)" bitfld.long 0x30 16.--17. "T_CMDCKE,tless thansub>CMDCKEless than/sub> delay from valid command to CKE input low" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "T_MRD_PDA,tless thansub>MRD_PDAless than/sub> cycle time of mode register set command in PDA mode" line.long 0x34 "DDRCTRL_REGS_DRAMTMG13,DDRCTRL SDRAM timing 13 register" hexmask.long.byte 0x34 24.--30. 1. "ODTLOFF,ODTLoff latency from CAS-2 command to ODToff reference (only LPDDR4)" hexmask.long.byte 0x34 16.--21. 1. "T_CCD_MW,tless thansub>CCDMWless than/sub> minimum time from write or masked write to masked write command for same bank (only LPDDR4)" newline bitfld.long 0x34 0.--2. "T_PPD,tless thansub>PPDless than/sub> minimum time from precharge to precharge command (only LPDDR4)" "0,1,2,3,4,5,6,7" line.long 0x38 "DDRCTRL_REGS_DRAMTMG14,DDRCTRL SDRAM timing 14 register" hexmask.long.word 0x38 0.--11. 1. "T_XSR,tless thansub>XSRless than/sub> exit SR time to any command (only LPDDR4)" line.long 0x3C "DDRCTRL_REGS_DRAMTMG15,DDRCTRL SDRAM timing 15 register" bitfld.long 0x3C 31. "EN_DFI_LP_T_STAB,Note: Programming mode: Quasi-dynamic Group 2 Group 4." "B_0x0,B_0x1" hexmask.long.byte 0x3C 0.--7. 1. "T_STAB_X32,tless thansub>STABless than/sub> stabilization time" group.long 0x180++0xB line.long 0x0 "DDRCTRL_REGS_ZQCTL0,DDRCTRL ZQ control 0 register" bitfld.long 0x0 31. "DIS_AUTO_ZQ,Note: Programming mode: Dynamic." "B_0x0,B_0x1" bitfld.long 0x0 30. "DIS_SRX_ZQCL,Note: Programming mode: Quasi-dynamic Group 2 Group 4." "B_0x0,B_0x1" newline bitfld.long 0x0 29. "ZQ_RESISTOR_SHARED,ZQinit/ZQCL/ZQCS/MPC(ZQ calibration) commands are sent to one rank at a time with tless thansub>ZQinitless than/sub> tless thansub>ZQCLless than/sub> tless thansub>ZQCSless than/sub> tless thansub>ZQCALless than/sub> and tless.." "B_0x0,B_0x1" bitfld.long 0x0 28. "DIS_MPSMX_ZQCL,Only for DDR4" "B_0x0,B_0x1" newline hexmask.long.word 0x0 16.--26. 1. "T_ZQ_LONG_NOP,DFI clock cycles of NOP required after ZQCL (ZQcalibration long)" hexmask.long.word 0x0 0.--9. 1. "T_ZQ_SHORT_NOP,DFI clock cycles of NOP required after ZQCS (ZQ calibration short)" line.long 0x4 "DDRCTRL_REGS_ZQCTL1,DDRCTRL ZQ control 1 register" hexmask.long.word 0x4 20.--29. 1. "T_ZQ_RESET_NOP,tless thansub>ZQResetless than/sub> DFI clock cycles of NOP required after ZQReset" hexmask.long.tbyte 0x4 0.--19. 1. "T_ZQ_SHORT_INTERVAL_X1024,Average interval to wait between automatically issuing ZQCS (ZQ calibration short) and MPC(ZQ calibration) commands" line.long 0x8 "DDRCTRL_REGS_ZQCTL2,DDRCTRL ZQ control 2 register" bitfld.long 0x8 0. "ZQ_RESET,ZQ Reset operation" "0,1" rgroup.long 0x18C++0x3 line.long 0x0 "DDRCTRL_REGS_ZQSTAT,DDRCTRL ZQ status register" bitfld.long 0x0 0. "ZQ_RESET_BUSY,ZQ Reset operation possible only if this bit is low" "B_0x0,B_0x1" group.long 0x190++0xB line.long 0x0 "DDRCTRL_REGS_DFITMG0,DDRCTRL DFI timing 0 register" hexmask.long.byte 0x0 24.--28. 1. "DFI_T_CTRL_DELAY,DFI clock cycles after an assertion or deassertion" bitfld.long 0x0 23. "DFI_RDDATA_USE_DFI_PHY_CLK,dfi_rddata_en dfi_rddata or dfi_rddata_valid generated" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 16.--22. 1. "DFI_T_RDDATA_EN,Time from the assertion of a read command on the DFI interface" bitfld.long 0x0 15. "DFI_WRDATA_USE_DFI_PHY_CLK,dfi_wrdata_en dfi_wrdata or dfi_wrdata_mask generated" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--13. 1. "DFI_TPHY_WRDATA,tless thansub>PHY_WRDATA less than/sub>number of clock cycles between dfi_wrdata_en assertion and associated write data driven on dfi_wrdata" hexmask.long.byte 0x0 0.--5. 1. "DFI_TPHY_WRLAT,tless thansub>PHY_WRLATless than/sub> write latency" line.long 0x4 "DDRCTRL_REGS_DFITMG1,DDRCTRL DFI timing 1 register" hexmask.long.byte 0x4 28.--31. 1. "DFI_T_CMD_LAT,Number of DFI PHY clock cycles between when dfi_cs assertion and when the associated command is driven" hexmask.long.byte 0x4 16.--20. 1. "DFI_T_WRDATA_DELAY,tless thansub>WRDATA_DELAYless than/sub> DFI clock cycles between dfi_wrdata_en assertion and when the corresponding write data transfer is completed on the DRAM bus" newline hexmask.long.byte 0x4 8.--12. 1. "DFI_T_DRAM_CLK_DISABLE,DFI clock cycles from dfi_dram_clk_disable assertion on the DFI until the clock to the DRAM memory devices at the PHY-DRAM boundary" hexmask.long.byte 0x4 0.--4. 1. "DFI_T_DRAM_CLK_ENABLE,DFI clock cycles from dfi_dram_clk_disable deassertion on the DFI until the first valid rising edge of the clock to the DRAM memory devices " line.long 0x8 "DDRCTRL_REGS_DFILPCFG0,DDRCTRL DFI low-power configuration 0 register" hexmask.long.byte 0x8 24.--28. 1. "DFI_TLP_RESP,tless thansub>LP_RESPless than/sub> DFI clock cycles setting for DFI" hexmask.long.byte 0x8 12.--15. 1. "DFI_LP_WAKEUP_SR,tless thansub>LP_WAKEUPless than/sub> DFI clock cycles to drive on dfi_lp_wakeup signal" newline bitfld.long 0x8 8. "DFI_LP_EN_SR,DFI low-power interface handshaking during SR entry/exit" "B_0x0,B_0x1" hexmask.long.byte 0x8 4.--7. 1. "DFI_LP_WAKEUP_PD,tless thansub>LP_WAKEUPless than/sub> DFI clock cycles to drive on dfi_lp_wakeup signal when PDN is entered" newline bitfld.long 0x8 0. "DFI_LP_EN_PD,DFI low-power interface handshaking during PDN entry/exit" "B_0x0,B_0x1" group.long 0x1A0++0xB line.long 0x0 "DDRCTRL_REGS_DFIUPD0,DDRCTRL DFI update 0 register" bitfld.long 0x0 31. "DIS_AUTO_CTRLUPD,Note: Programming mode: Quasi-dynamic Group 3." "B_0x0,B_0x1" bitfld.long 0x0 30. "DIS_AUTO_CTRLUPD_SRX,Note: Programming mode: Static." "B_0x0,B_0x1" newline bitfld.long 0x0 29. "CTRLUPD_PRE_SRX,DFI_CTRLUPD_REQ requirements at SRX" "B_0x0,B_0x1" hexmask.long.word 0x0 16.--25. 1. "DFI_T_CTRLUP_MAX,Maximum number of DFI clock cycles that" newline hexmask.long.word 0x0 0.--9. 1. "DFI_T_CTRLUP_MIN,Minimum number of DFI clock cycles to which" line.long 0x4 "DDRCTRL_REGS_DFIUPD1,DDRCTRL DFI update 1 register" hexmask.long.byte 0x4 16.--23. 1. "DFI_T_CTRLUPD_INTERVAL_MIN_X1024,Minimum amount of time between DDRCTRL initiated DFI update requests (which is executed whenever the DDRCTRL is idle)" hexmask.long.byte 0x4 0.--7. 1. "DFI_T_CTRLUPD_INTERVAL_MAX_X1024,Maximum amount of time between DDRCTRL initiated DFI update requests" line.long 0x8 "DDRCTRL_REGS_DFIUPD2,DDRCTRL DFI update 2 register" bitfld.long 0x8 31. "DFI_PHYUPD_EN,Enables the support for acknowledging PHY-initiated updates" "B_0x0,B_0x1" group.long 0x1B0++0xB line.long 0x0 "DDRCTRL_REGS_DFIMISC,DDRCTRL DFI miscellaneous control register" hexmask.long.byte 0x0 8.--12. 1. "DFI_FREQUENCY,System operating frequency" bitfld.long 0x0 7. "LP_OPTIMIZED_WRITE,Note: Programming mode: Quasi-dynamic Group 3" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "DIS_DYN_ADR_TRI,the PHY can detect it to turn the command/address bus Hi-Z." "B_0x0,B_0x1" bitfld.long 0x0 5. "DFI_INIT_START,PHY init start request" "0,1" newline bitfld.long 0x0 4. "CTL_IDLE_EN,Enables support of ctl_idle signal (non-DFI related pin specific to certain Synopsys PHYs)" "0,1" bitfld.long 0x0 2. "DFI_DATA_CS_POLARITY,Polarity of dfi_wrdata_cs and dfi_rddata_cs signals" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "PHY_DBI_MODE,DBI implemented in DDRC or PHY" "B_0x0,B_0x1" bitfld.long 0x0 0. "DFI_INIT_COMPLETE_EN,PHY initialization complete enable" "0,1" line.long 0x4 "DDRCTRL_REGS_DFITMG2,DDRCTRL DFI timing 2 register" hexmask.long.byte 0x4 8.--14. 1. "DFI_TPHY_RDCSLAT,tless thansub>PHY_RDCSLAT less than/sub>DFI PHY clock cycles between read command sent on the DFI control interface and associated dfi_rddata_cs signal asserted" hexmask.long.byte 0x4 0.--5. 1. "DFI_TPHY_WRCSLAT,tless thansub>PHY_WRCSLATless than/sub> DFI PHY clock cycles between write command sent on the DFI control interface and associated dfi_wrdata_cs signal asserted." line.long 0x8 "DDRCTRL_REGS_DFITMG3,DDRCTRL DFI timing 3 register" hexmask.long.byte 0x8 0.--4. 1. "DFI_T_GEARDOWN_DELAY,Delay from dfi_geardown_en assertion to the time of t" rgroup.long 0x1BC++0x3 line.long 0x0 "DDRCTRL_REGS_DFISTAT,DDRCTRL DFI status register" bitfld.long 0x0 1. "DFI_LP_ACK,Stores the value of dfi_lp_ack input to the controller" "0,1" bitfld.long 0x0 0. "DFI_INIT_COMPLETE,Status flag that announces when DFI initialization is completed" "0,1" group.long 0x1C0++0x7 line.long 0x0 "DDRCTRL_REGS_DBICTL,DDRCTRL DM/DBI control register" bitfld.long 0x0 2. "RD_DBI_EN,Read DBI enable signal in DDRC" "B_0x0,B_0x1" bitfld.long 0x0 1. "WR_DBI_EN,Write DBI enable signal in DDRC" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "DM_EN,DM enable signal in DDRC" "B_0x0,B_0x1" line.long 0x4 "DDRCTRL_REGS_DFIPHYMSTR,DDRCTRL DFI PHY master register" hexmask.long.byte 0x4 24.--31. 1. "DFI_PHYMSTR_BLK_REF_X32,Maximum number of DFI clock cycles that are needed to send pending refreshes before starting SR entry process" bitfld.long 0x4 0. "DFI_PHYMSTR_EN,PHY master interface enable" "B_0x0,B_0x1" group.long 0x200++0x2F line.long 0x0 "DDRCTRL_REGS_ADDRMAP0,DDRCTRL address map 0 register" hexmask.long.byte 0x0 0.--4. 1. "ADDRMAP_CS_BIT0,This bit field selects the HIF address bit used as rank address bit 0." line.long 0x4 "DDRCTRL_REGS_ADDRMAP1,DDRCTRL address map 1 register" hexmask.long.byte 0x4 16.--21. 1. "ADDRMAP_BANK_B2,This bit field selects the HIF address bit used as bank address bit 2." hexmask.long.byte 0x4 8.--13. 1. "ADDRMAP_BANK_B1,This bit field selects the HIF address bits used as bank address bit 1." newline hexmask.long.byte 0x4 0.--5. 1. "ADDRMAP_BANK_B0,This bit field selects the HIF address bits used as bank address bit 0." line.long 0x8 "DDRCTRL_REGS_ADDRMAP2,DDRCTRL address map 2 register" hexmask.long.byte 0x8 24.--27. 1. "ADDRMAP_COL_B5,Full bus width mode: selects the HIF address bit used as columnaddress bit 5." hexmask.long.byte 0x8 16.--19. 1. "ADDRMAP_COL_B4,Full bus width mode: selects the HIF address bit used as column address bit 4." newline hexmask.long.byte 0x8 8.--12. 1. "ADDRMAP_COL_B3,Full bus width mode: selects the HIF address bit used as column address bit 3." hexmask.long.byte 0x8 0.--3. 1. "ADDRMAP_COL_B2,Full bus width mode: selects the HIF address bit used as column address bit 2." line.long 0xC "DDRCTRL_REGS_ADDRMAP3,DDRCTRL address map 3 register" hexmask.long.byte 0xC 24.--28. 1. "ADDRMAP_COL_B9,Full bus width mode: selects the HIF address bit used as column address bit 9." hexmask.long.byte 0xC 16.--20. 1. "ADDRMAP_COL_B8,Full bus width mode: selects the HIF address bit used as column address bit 8." newline hexmask.long.byte 0xC 8.--12. 1. "ADDRMAP_COL_B7,Full bus width mode: selects the HIF address bit used as column address bit 7." hexmask.long.byte 0xC 0.--4. 1. "ADDRMAP_COL_B6,Full bus width mode: selects the HIF address bit used as column address bit 6." line.long 0x10 "DDRCTRL_REGS_ADDRMAP4,DDRCTRL address map 4 register" hexmask.long.byte 0x10 8.--12. 1. "ADDRMAP_COL_B11,Full bus width mode: selects the HIF address bit used as column address bit 13." hexmask.long.byte 0x10 0.--4. 1. "ADDRMAP_COL_B10,Full bus width mode: selects the HIF address bit used as column address bit 11." line.long 0x14 "DDRCTRL_REGS_ADDRMAP5,DDRCTRL address map 5 register" hexmask.long.byte 0x14 24.--27. 1. "ADDRMAP_ROW_B11,This bit field selects the HIF address bit used as row address bit 11." hexmask.long.byte 0x14 16.--19. 1. "ADDRMAP_ROW_B2_10,This bit field selects the HIF address bits used as row address bits 2 to 10." newline hexmask.long.byte 0x14 8.--11. 1. "ADDRMAP_ROW_B1,This bit field selects the HIF address bits used as row address bit 1." hexmask.long.byte 0x14 0.--3. 1. "ADDRMAP_ROW_B0,This bit field selects the HIF address bits used as row address bit 0." line.long 0x18 "DDRCTRL_REGS_ADDRMAP6,DDRCTRL address map 6 register" bitfld.long 0x18 29.--31. "LPDDR34_3GB_6GB_12GB,Density size/channel for LPDDR4 SDRAM device in use" "B_0x0,B_0x1,B_0x2,B_0x3,?,B_0x5,?,?" hexmask.long.byte 0x18 24.--27. 1. "ADDRMAP_ROW_B15,This bit field selects the HIF address bit used as row address bit 15." newline hexmask.long.byte 0x18 16.--19. 1. "ADDRMAP_ROW_B14,This bit field selects the HIF address bit used as row address bit 14." hexmask.long.byte 0x18 8.--11. 1. "ADDRMAP_ROW_B13,This bit field selects the HIF address bit used as row address bit 13." newline hexmask.long.byte 0x18 0.--3. 1. "ADDRMAP_ROW_B12,This bit field selects the HIF address bit used as row address bit 12" line.long 0x1C "DDRCTRL_REGS_ADDRMAP7,DDRCTRL address map 7 register" hexmask.long.byte 0x1C 8.--11. 1. "ADDRMAP_ROW_B17,This bit field selects the HIF address bit used as row address bit 17." hexmask.long.byte 0x1C 0.--3. 1. "ADDRMAP_ROW_B16,This bit field selects the HIF address bit used as row address bit 16." line.long 0x20 "DDRCTRL_REGS_ADDRMAP8,DDRCTRL address map 8 register" hexmask.long.byte 0x20 8.--13. 1. "ADDRMAP_BG_B1,This bit field selects the HIF address bits used as bank group address bit 1." hexmask.long.byte 0x20 0.--5. 1. "ADDRMAP_BG_B0,This bit field selects the HIF address bits used as bank group address bit 0" line.long 0x24 "DDRCTRL_REGS_ADDRMAP9,DDRCTRL address map 9 register" hexmask.long.byte 0x24 24.--27. 1. "ADDRMAP_ROW_B5,This bit field selects the HIF address bits used as row address bit 5." hexmask.long.byte 0x24 16.--19. 1. "ADDRMAP_ROW_B4,This bit field selects the HIF address bits used as row address bit 4" newline hexmask.long.byte 0x24 8.--11. 1. "ADDRMAP_ROW_B3,This bit field selects the HIF address bits used as row address bit 3" hexmask.long.byte 0x24 0.--3. 1. "ADDRMAP_ROW_B2,This bit field selects the HIF address bits used as row address bit 2" line.long 0x28 "DDRCTRL_REGS_ADDRMAP10,DDRCTRL address map 10 register" hexmask.long.byte 0x28 24.--27. 1. "ADDRMAP_ROW_B9,This bit field selects the HIF address bits used as row address bit 9" hexmask.long.byte 0x28 16.--19. 1. "ADDRMAP_ROW_B8,This bit field selects the HIF address bits used as row address bit 8" newline hexmask.long.byte 0x28 8.--11. 1. "ADDRMAP_ROW_B7,This bit field selects the HIF address bits used as row address bit 7" hexmask.long.byte 0x28 0.--3. 1. "ADDRMAP_ROW_B6,This bit field selects the HIF address bits used as row address bit 6" line.long 0x2C "DDRCTRL_REGS_ADDRMAP11,DDRCTRL address map 11 register" hexmask.long.byte 0x2C 0.--3. 1. "ADDRMAP_ROW_B10,This bit field selects the HIF address bits used as row address bit 10" group.long 0x240++0x7 line.long 0x0 "DDRCTRL_REGS_ODTCFG,DDRCTRL ODT configuration register" hexmask.long.byte 0x0 24.--27. 1. "WR_ODT_HOLD,DFI PHY clock cycles to hold ODT for a write command" hexmask.long.byte 0x0 16.--20. 1. "WR_ODT_DELAY,DFI PHY clock cycles from issuing a write command to setting ODT values associated with this command" newline hexmask.long.byte 0x0 8.--11. 1. "RD_ODT_HOLD,DFI PHY clock cycles to hold ODT for a read command" hexmask.long.byte 0x0 2.--6. 1. "RD_ODT_DELAY,DFI PHY clock cycles from issuing a read command to setting ODT values associated with that command" line.long 0x4 "DDRCTRL_REGS_ODTMAP,DDRCTRL ODT/rank map register" bitfld.long 0x4 12.--13. "RANK1_RD_ODT,Remote ODTs to turn on during a read from rank 1" "0,1,2,3" bitfld.long 0x4 8.--9. "RANK1_WR_ODT,Remote ODTs to turn on during a write to rank 1" "0,1,2,3" newline bitfld.long 0x4 4.--5. "RANK0_RD_ODT,Remote ODTs to turn on during a read from rank 0" "0,1,2,3" bitfld.long 0x4 0.--1. "RANK0_WR_ODT,Remote ODTs to turn on during a write to rank 0" "0,1,2,3" group.long 0x250++0x7 line.long 0x0 "DDRCTRL_REGS_SCHED,DDRCTRL scheduler control register" bitfld.long 0x0 31. "OPT_VPRW_SCH,Optimize exVPR/exVPW scheduling." "B_0x0,B_0x1" hexmask.long.byte 0x0 24.--30. 1. "RDWR_IDLE_GAP,When the preferred transaction store is empty for these many clock cycles switch to the alternate transaction store if it is non-empty." newline hexmask.long.byte 0x0 16.--23. 1. "GO2CRITICAL_HYSTERESIS,Not used" bitfld.long 0x0 15. "LPDDR4_OPT_ACT_TIMING,Optimized ACT timing control for LPDDR4" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--12. 1. "LPR_NUM_ENTRIES,Number of entries in the low-priority transaction store" bitfld.long 0x0 7. "AUTOPRE_RMW,Selection of the hif_cmd_autopre behavior if a RMW is received on HIF" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "OPT_WRCAM_FILL_LEVEL,Enable the feature of optimized write CAM fill level by switching to write when write CAM reaches certain fill level set in DDRCTRL_REGS_SCHED3." "B_0x0,B_0x1" bitfld.long 0x0 3. "RDWR_SWITCH_POLICY_SEL,Selects read write switching policy." "B_0x0,B_0x1" newline bitfld.long 0x0 2. "PAGECLOSE,to this bank." "B_0x0,B_0x1" bitfld.long 0x0 1. "PREFER_WRITE,If this bit is set the bank selector prefers writes over reads." "0,1" line.long 0x4 "DDRCTRL_REGS_SCHED1,DDRCTRL scheduler control 1 register" bitfld.long 0x4 31. "OPT_HIT_GT_HPR,Optimize the priority between page-hit LPR and page-miss HPR." "B_0x0,B_0x1" bitfld.long 0x4 28.--30. "PAGE_HIT_LIMIT_RD,Page-hit limiter for read." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x4 24.--26. "PAGE_HIT_LIMIT_WR,Page-hit limiter for write." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x4 20.--22. "VISIBLE_WINDOW_LIMIT_RD,Visible window limiter for read." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x4 16.--18. "VISIBLE_WINDOW_LIMIT_WR,Visible window limiter for write." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.byte 0x4 12.--15. 1. "DELAY_SWITCH_WRITE,Indicates the number of cycles to delay switching read to write mode when write page-hit request is there and no read page-hit request is there." newline hexmask.long.byte 0x4 0.--7. 1. "PAGECLOSE_TIMER,This bit field works in conjunction with PAGECLOSE in DDRCTRL_REGS_SCHED." group.long 0x25C++0x3 line.long 0x0 "DDRCTRL_REGS_PERFHPR1,DDRCTRL high priority read CAM 1 register" hexmask.long.byte 0x0 24.--31. 1. "HPR_XACT_RUN_LENGTH,Transactions serviced once HPR queue goes critical" hexmask.long.word 0x0 0.--15. 1. "HPR_MAX_STARVE,DFI clocks that HPR queue can be starved before it goes critical" group.long 0x264++0x3 line.long 0x0 "DDRCTRL_REGS_PERFLPR1,DDRCTRL low-priority read CAM 1 register" hexmask.long.byte 0x0 24.--31. 1. "LPR_XACT_RUN_LENGTH,Transactions serviced once LPR queue goes critical" hexmask.long.word 0x0 0.--15. 1. "LPR_MAX_STARVE,DFI clocks that LPR queue can be starved before it goes critical" group.long 0x26C++0xB line.long 0x0 "DDRCTRL_REGS_PERFWR1,DDRCTRL write CAM 1 register" hexmask.long.byte 0x0 24.--31. 1. "W_XACT_RUN_LENGTH,Transactions serviced once the WR queue goes critical" hexmask.long.word 0x0 0.--15. 1. "W_MAX_STARVE,DFI clocks that the WR queue can be starved before it goes critical" line.long 0x4 "DDRCTRL_REGS_SCHED3,Scheduler control 3 register" hexmask.long.byte 0x4 24.--28. 1. "RD_PGHIT_NUM_THRESH,Switch to read mode once number of read page-hit request exceeds the threshold set in the register during waiting tless thansub>W2Rless than/sub>." hexmask.long.byte 0x4 16.--20. 1. "WR_PGHIT_NUM_THRESH,Switch to write mode once number of write page-hit request exceeds threshold set in this register during waiting delay_switch_write timeout." newline hexmask.long.byte 0x4 8.--12. 1. "WRCAM_HIGHTHRESH,The high threshold used in optimized write CAM fill level." hexmask.long.byte 0x4 0.--4. 1. "WRCAM_LOWTHRESH,The low threshold used in optimized write CAM fill level." line.long 0x8 "DDRCTRL_REGS_SCHED4,Scheduler control 4 register" hexmask.long.byte 0x8 24.--31. 1. "WR_PAGE_EXP_CYCLES,Indicates the number of cycles to keep the bank opened for write direction in read mode when both directions has request to the bank." hexmask.long.byte 0x8 16.--23. 1. "RD_PAGE_EXP_CYCLES,Indicates the number of cycles to keep the bank opened for read direction in write mode when both directions has request to the bank." newline hexmask.long.byte 0x8 8.--15. 1. "WR_ACT_IDLE_GAP,Indicates the number of cycles when write direction has no request to start preparing bank for read direction." hexmask.long.byte 0x8 0.--7. 1. "RD_ACT_IDLE_GAP,Indicates the number of cycles when read direction has no request to start preparing bank for write direction." group.long 0x300++0x7 line.long 0x0 "DDRCTRL_REGS_DBG0,DDRCTRL debug 0 register" bitfld.long 0x0 7. "DIS_MAX_RANK_WR_OPT,Disable optimized max_rank_wr and max_logical_rank_wr" "0,1" bitfld.long 0x0 6. "DIS_MAX_RANK_RD_OPT,Disable optimized max_rank_rd and max_logical_rank_rd." "0,1" newline bitfld.long 0x0 4. "DIS_COLLISION_PAGE_OPT,Collision cases are write followed by read to the same address read followed by write to the same address or write followed by write to same address with DIS_WC = 1 in this register (where same address comparisons exclude the two.." "B_0x0,?" bitfld.long 0x0 2. "DIS_ACT_BYPASS,Only present in designs supporting activate bypass." "?,B_0x1" newline bitfld.long 0x0 1. "DIS_RD_BYPASS,Only present in designs supporting read bypass." "?,B_0x1" bitfld.long 0x0 0. "DIS_WC,For debug purpose only." "?,B_0x1" line.long 0x4 "DDRCTRL_REGS_DBG1,DDRCTRL debug 1 register" bitfld.long 0x4 1. "DIS_HIF,This bit is intended to be switched on-the-fly." "?,B_0x1" bitfld.long 0x4 0. "DIS_DQ,All transactions are queued in the CAM." "?,B_0x1" rgroup.long 0x308++0x3 line.long 0x0 "DDRCTRL_REGS_DBGCAM,DDRCTRL CAM debug register" bitfld.long 0x0 29. "WR_DATA_PIPELINE_EMPTY,Empty write data pipeline on the DFI interface" "0,1" bitfld.long 0x0 28. "RD_DATA_PIPELINE_EMPTY,Empty read data pipeline on the DFI interface" "0,1" newline bitfld.long 0x0 26. "DBG_WR_Q_EMPTY,Use-case: When the DDRCTRL enters SR using the low-power entry sequence the following is expected:" "?,B_0x1" bitfld.long 0x0 25. "DBG_RD_Q_EMPTY,Use-case: When the DDRCTRL enters SR using the low-power entry sequence the following is expected:" "?,B_0x1" newline bitfld.long 0x0 24. "DBG_STALL,Stall (for debug purpose only)" "0,1" hexmask.long.byte 0x0 16.--21. 1. "DBG_W_Q_DEPTH,Write queue depth (for debug purpose only)" newline hexmask.long.byte 0x0 8.--13. 1. "DBG_LPR_Q_DEPTH,Low-priority read queue depth (for debug purpose only)" hexmask.long.byte 0x0 0.--5. 1. "DBG_HPR_Q_DEPTH,High-priority read queue depth (for debug purpose only)" group.long 0x30C++0x3 line.long 0x0 "DDRCTRL_REGS_DBGCMD,DDRCTRL command debug register" bitfld.long 0x0 5. "CTRLUPD,dfi_ctrlupd_req to the PHY" "?,B_0x1" bitfld.long 0x0 4. "ZQ_CALIB_SHORT,ZQCS/MPC command to the SDRAM" "?,B_0x1" newline bitfld.long 0x0 1. "RANK1_REFRESH,Refresh to rank 1" "?,B_0x1" bitfld.long 0x0 0. "RANK0_REFRESH,Refresh to rank 0" "?,B_0x1" rgroup.long 0x310++0x3 line.long 0x0 "DDRCTRL_REGS_DBGSTAT,DDRCTRL status debug register" bitfld.long 0x0 5. "CTRLUPD_BUSY,CTRLUPD operation" "B_0x0,B_0x1" bitfld.long 0x0 4. "ZQ_CALIB_SHORT_BUSY,ZQCS operation" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "RANK1_REFRESH_BUSY,rank1_refresh operation" "B_0x0,B_0x1" bitfld.long 0x0 0. "RANK0_REFRESH_BUSY,rank0_refresh operation" "B_0x0,B_0x1" group.long 0x320++0x3 line.long 0x0 "DDRCTRL_REGS_SWCTL,DDRCTRL software programming control enable register" bitfld.long 0x0 0. "SW_DONE,Enable quasi-dynamic register programming outside reset" "B_0x0,?" rgroup.long 0x324++0x3 line.long 0x0 "DDRCTRL_REGS_SWSTAT,DDRCTRL software programming control status register" bitfld.long 0x0 0. "SW_DONE_ACK,Register programming done" "0,1" group.long 0x328++0x3 line.long 0x0 "DDRCTRL_REGS_SWCTLSTATIC,DDRCTRL statics write enable register" bitfld.long 0x0 0. "SW_STATIC_UNLOCK,Enables static register programming outside reset" "?,B_0x1" group.long 0x36C++0x3 line.long 0x0 "DDRCTRL_REGS_POISONCFG,DDRCTRL AXI poison configuration register" bitfld.long 0x0 24. "RD_POISON_INTR_CLR,Interrupt clear for read transaction poisoning" "0,1" bitfld.long 0x0 20. "RD_POISON_INTR_EN,Interrupts for read transaction poisoning enable" "?,B_0x1" newline bitfld.long 0x0 16. "RD_POISON_SLVERR_EN,SLVERR response for read transaction poisoning enable" "?,B_0x1" bitfld.long 0x0 8. "WR_POISON_INTR_CLR,Interrupt clear for write transaction poisoning" "0,1" newline bitfld.long 0x0 4. "WR_POISON_INTR_EN,Interrupts for write transaction poisoning enable" "?,B_0x1" bitfld.long 0x0 0. "WR_POISON_SLVERR_EN,SLVERR response for write transaction poisoning enable" "?,B_0x1" rgroup.long 0x370++0x3 line.long 0x0 "DDRCTRL_REGS_POISONSTAT,DDRCTRL AXI poison status register" bitfld.long 0x0 17. "RD_POISON_INTR_1,Read transaction poisoning error interrupt for port 1" "0,1" bitfld.long 0x0 16. "RD_POISON_INTR_0,Read transaction poisoning error interrupt for port 0" "0,1" newline bitfld.long 0x0 1. "WR_POISON_INTR_1,Write transaction poisoning error interrupt for port 1" "0,1" bitfld.long 0x0 0. "WR_POISON_INTR_0,Write transaction poisoning error interrupt for port 0" "0,1" rgroup.long 0x3F0++0x3 line.long 0x0 "DDRCTRL_REGS_DERATESTAT,DDRCTRL temperature derate status register" bitfld.long 0x0 0. "DERATE_TEMP_LIMIT_INTR,Derate temperature interrupt" "0,1" rgroup.long 0x3FC++0x3 line.long 0x0 "DDRCTRL_MP_PSTAT,DDRCTRL port status register" bitfld.long 0x0 17. "WR_PORT_BUSY_1,Indicates if there are outstanding writes for AXI port 1." "0,1" bitfld.long 0x0 16. "WR_PORT_BUSY_0,Indicates if there are outstanding writes for AXI port 0." "0,1" newline bitfld.long 0x0 1. "RD_PORT_BUSY_1,Indicates if there are outstanding reads for AXI port 1." "0,1" bitfld.long 0x0 0. "RD_PORT_BUSY_0,Indicates if there are outstanding reads for AXI port 0." "0,1" group.long 0x400++0xB line.long 0x0 "DDRCTRL_MP_PCCFG,DDRCTRL port common configuration register" bitfld.long 0x0 8. "BL_EXP_MODE,Burst length expansion mode" "B_0x0,B_0x1" bitfld.long 0x0 4. "PAGEMATCH_LIMIT,Page match four limit" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "GO2CRITICAL_EN,Note: Programming mode: Static." "disabled,enabled" line.long 0x4 "DDRCTRL_MP_PCFGR_0,DDRCTRL port 0 configuration read register" hexmask.long.byte 0x4 20.--23. 1. "RRB_LOCK_THRESHOLD,Specifies the RRB lock threshold in configurations that disable read data interleaving." bitfld.long 0x4 14. "RD_PORT_PAGEMATCH_EN,Page match feature enable" "?,B_0x1" newline bitfld.long 0x4 13. "RD_PORT_URGENT_EN,AXI urgent sideband signal (arurgent) enable" "?,B_0x1" bitfld.long 0x4 12. "RD_PORT_AGING_EN,Aging function for the read channel enable" "?,B_0x1" newline hexmask.long.word 0x4 0.--9. 1. "RD_PORT_PRIORITY,Initial load value of read aging counters" line.long 0x8 "DDRCTRL_MP_PCFGW_0,DDRCTRL port 0 configuration write register" bitfld.long 0x8 14. "WR_PORT_PAGEMATCH_EN,Page match feature enable" "?,B_0x1" bitfld.long 0x8 13. "WR_PORT_URGENT_EN,AXI urgent sideband signal (awurgent) enable" "?,B_0x1" newline bitfld.long 0x8 12. "WR_PORT_AGING_EN,Aging function enable for the write channel" "?,B_0x1" hexmask.long.word 0x8 0.--9. 1. "WR_PORT_PRIORITY,Initial load value of write aging counters" group.long 0x490++0x13 line.long 0x0 "DDRCTRL_MP_PCTRL_0,DDRCTRL port 0 control register" bitfld.long 0x0 0. "PORT_EN,Enable the AXI port x." "0,1" line.long 0x4 "DDRCTRL_MP_PCFGQOS0_0,DDRCTRL port 0 read QoS configuration 0 register" bitfld.long 0x4 20.--21. "RQOS_MAP_REGION1,Traffic class of region 1" "B_0x0,B_0x1,?,?" bitfld.long 0x4 16.--17. "RQOS_MAP_REGION0,Traffic class of region 0" "?,B_0x1,?,?" newline hexmask.long.byte 0x4 0.--3. 1. "RQOS_MAP_LEVEL1,Separation level1 that gives the end of region 0 mapping" line.long 0x8 "DDRCTRL_MP_PCFGQOS1_0,DDRCTRL port 0 read QoS configuration 1 register" hexmask.long.word 0x8 16.--26. 1. "RQOS_MAP_TIMEOUTR,Timeout value for transactions mapped to red address queue" hexmask.long.word 0x8 0.--10. 1. "RQOS_MAP_TIMEOUTB,Timeout value for transactions mapped to blue address queue" line.long 0xC "DDRCTRL_MP_PCFGWQOS0_0,DDRCTRL port 0 write QoS configuration 0 register" bitfld.long 0xC 24.--25. "WQOS_MAP_REGION2,Traffic class of region 2" "B_0x0,B_0x1,?,?" bitfld.long 0xC 20.--21. "WQOS_MAP_REGION1,Traffic class of region 1" "B_0x0,B_0x1,?,?" newline bitfld.long 0xC 16.--17. "WQOS_MAP_REGION0,Traffic class of region 0" "?,B_0x1,?,?" hexmask.long.byte 0xC 8.--11. 1. "WQOS_MAP_LEVEL2,Separation level2 that indicates the end of region 1 mapping" newline hexmask.long.byte 0xC 0.--3. 1. "WQOS_MAP_LEVEL1,Separation level indicating the end of region 0 mapping" line.long 0x10 "DDRCTRL_MP_PCFGWQOS1_0,DDRCTRL port 0 write QoS configuration 1 register" hexmask.long.word 0x10 16.--26. 1. "WQOS_MAP_TIMEOUT2,Timeout value for write transactions in region 2" hexmask.long.word 0x10 0.--10. 1. "WQOS_MAP_TIMEOUT1,Timeout value for write transactions in region 0 and 1" group.long 0x4B4++0x7 line.long 0x0 "DDRCTRL_MP_PCFGR_1,DDRCTRL port 1 configuration read register" hexmask.long.byte 0x0 20.--23. 1. "RRB_LOCK_THRESHOLD,Specifies the RRB lock threshold in configurations that disable read data interleaving." bitfld.long 0x0 14. "RD_PORT_PAGEMATCH_EN,Page match feature enable" "?,B_0x1" newline bitfld.long 0x0 13. "RD_PORT_URGENT_EN,AXI urgent sideband signal (arurgent) enable" "?,B_0x1" bitfld.long 0x0 12. "RD_PORT_AGING_EN,Aging function for the read channel enable" "?,B_0x1" newline hexmask.long.word 0x0 0.--9. 1. "RD_PORT_PRIORITY,Initial load value of read aging counters" line.long 0x4 "DDRCTRL_MP_PCFGW_1,DDRCTRL port 1 configuration write register" bitfld.long 0x4 14. "WR_PORT_PAGEMATCH_EN,Page match feature enable" "?,B_0x1" bitfld.long 0x4 13. "WR_PORT_URGENT_EN,AXI urgent sideband signal (awurgent) enable" "?,B_0x1" newline bitfld.long 0x4 12. "WR_PORT_AGING_EN,Aging function enable for the write channel" "?,B_0x1" hexmask.long.word 0x4 0.--9. 1. "WR_PORT_PRIORITY,Initial load value of write aging counters" group.long 0x540++0x13 line.long 0x0 "DDRCTRL_MP_PCTRL_1,DDRCTRL port 1 control register" bitfld.long 0x0 0. "PORT_EN,Enable the AXI port x." "0,1" line.long 0x4 "DDRCTRL_MP_PCFGQOS0_1,DDRCTRL port 1 read QoS configuration 0 register" bitfld.long 0x4 20.--21. "RQOS_MAP_REGION1,Traffic class of region 1" "B_0x0,B_0x1,?,?" bitfld.long 0x4 16.--17. "RQOS_MAP_REGION0,Traffic class of region 0" "?,B_0x1,?,?" newline hexmask.long.byte 0x4 0.--3. 1. "RQOS_MAP_LEVEL1,Separation level1 that gives the end of region 0 mapping" line.long 0x8 "DDRCTRL_MP_PCFGQOS1_1,DDRCTRL port 1 read QoS configuration 1 register" hexmask.long.word 0x8 16.--26. 1. "RQOS_MAP_TIMEOUTR,Timeout value for transactions mapped to red address queue" hexmask.long.word 0x8 0.--10. 1. "RQOS_MAP_TIMEOUTB,Timeout value for transactions mapped to blue address queue" line.long 0xC "DDRCTRL_MP_PCFGWQOS0_1,DDRCTRL port 1 write QoS configuration 0 register" bitfld.long 0xC 24.--25. "WQOS_MAP_REGION2,Traffic class of region 2" "B_0x0,B_0x1,?,?" bitfld.long 0xC 20.--21. "WQOS_MAP_REGION1,Traffic class of region 1" "B_0x0,B_0x1,?,?" newline bitfld.long 0xC 16.--17. "WQOS_MAP_REGION0,Traffic class of region 0" "?,B_0x1,?,?" hexmask.long.byte 0xC 8.--11. 1. "WQOS_MAP_LEVEL2,Separation level2 that indicates the end of region 1 mapping" newline hexmask.long.byte 0xC 0.--3. 1. "WQOS_MAP_LEVEL1,Separation level indicating the end of region 0 mapping" line.long 0x10 "DDRCTRL_MP_PCFGWQOS1_1,DDRCTRL port 1 write QoS configuration 1 register" hexmask.long.word 0x10 16.--26. 1. "WQOS_MAP_TIMEOUT2,Timeout value for write transactions in region 2" hexmask.long.word 0x10 0.--10. 1. "WQOS_MAP_TIMEOUT1,Timeout value for write transactions in region 0 and 1" rgroup.long 0xFF0++0x7 line.long 0x0 "DDRCTRL_MP_DDRCTRL_VER_NUMBER,DDRCTRL version number register" hexmask.long 0x0 0.--31. 1. "VER_NUMBER,Device version number" line.long 0x4 "DDRCTRL_MP_DDRCTRL_VER_TYPE,DDRCTRL version type register" hexmask.long 0x4 0.--31. 1. "VER_TYPE,Device version type value" tree.end tree.end tree "DDRDBG (DDR Debug)" tree "DDRDBG" base ad:0x48050000 group.long 0x0++0x17 line.long 0x0 "DDRDBG_LP_DISABLE,DDRDBG low-power disable register" bitfld.long 0x0 8. "LPI_DDRC_DISABLE,None" "B_0x0,B_0x1" bitfld.long 0x0 0. "LPI_XPI_DISABLE,None" "B_0x0,B_0x1" line.long 0x4 "DDRDBG_BYPASS_PCLKEN,DDRDBG bypass PCLKEN register" bitfld.long 0x4 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x8 "DDRDBG_DDRC_AUTO_SR_DELAY,DDRDBG DDRC auto SR delay register" hexmask.long.byte 0x8 0.--7. 1. "DELAY_CYCLES,Number of delay cycles to wait before to gate down the DDRC clock when in auto self-refresh" line.long 0xC "DDRDBG_OBSP_CTRL,DDRDBG OBSP control register" hexmask.long.byte 0xC 24.--28. 1. "OBSP3_SEL,Selects which of the input observable signal is forwarded to the HDP on selectable observability line 3." hexmask.long.byte 0xC 16.--20. 1. "OBSP2_SEL,Selects which of the input observable signal is forwarded to the HDP on selectable observability line 2." hexmask.long.byte 0xC 8.--12. 1. "OBSP1_SEL,Selects which of the input observable signal is forwarded to the HDP on selectable observability line 1." newline hexmask.long.byte 0xC 0.--4. 1. "OBSP0_SEL,Selects which of the input observable signal is forwarded to the HDP on selectable observability line 0." line.long 0x10 "DDRDBG_FRAC_PLL_LOCK,DDRDBG FRAC PLL lock register" bitfld.long 0x10 0. "LOCK,None" "B_0x0,B_0x1" line.long 0x14 "DDRDBG_DTO_OUTPUT,DDRDBG DTO output register" bitfld.long 0x14 0. "DTO,the DDRPHYC PLL lock can be observed in this register." "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "DDRDBG_DFI_ERRORS_CTRL,DDRDBG DFI error control register" bitfld.long 0x0 9. "DFI_ERROR1_SET,None" "B_0x0,B_0x1" bitfld.long 0x0 8. "DFI_ERROR1_CLEAR,None" "B_0x0,B_0x1" bitfld.long 0x0 1. "DFI_ERROR0_SET,None" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "DFI_ERROR0_CLEAR,None" "B_0x0,B_0x1" line.long 0x4 "DDRDBG_DFI_ERROR_STATUS,DDRDBG DFI error status register" bitfld.long 0x4 8. "DFI_ERROR1_STATUS,Status bit for dfi_error1" "B_0x0,B_0x1" bitfld.long 0x4 0. "DFI_ERROR0_STATUS,Status bit for dfi_error0" "B_0x0,B_0x1" line.long 0x8 "DDRDBG_DFI_ERROR_MSK,DDRDBG DFI error mask register" bitfld.long 0x8 8. "DFI_ERROR1_MASK,None" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFI_ERROR0_MASK,None" "B_0x0,B_0x1" group.long 0x100++0x1B line.long 0x0 "DDRDBG_DDR34_AC_SWIZZLE_ADD3_0,DDRDBG DDR34 AC swizzle ADD3_0 register" hexmask.long.byte 0x0 24.--28. 1. "DDR34_AC_SWIZZLING_ADD3,Remapping input bit on add3 DDRPHYC input" hexmask.long.byte 0x0 16.--20. 1. "DDR34_AC_SWIZZLING_ADD2,Remapping input bit on add2 DDRPHYC input" hexmask.long.byte 0x0 8.--12. 1. "DDR34_AC_SWIZZLING_ADD1,Remapping input bit on add1 DDRPHYC input" newline hexmask.long.byte 0x0 0.--4. 1. "DDR34_AC_SWIZZLING_ADD0,Remapping input bit on add0 DDRPHYC input" line.long 0x4 "DDRDBG_DDR34_AC_SWIZZLE_ADD7_4,DDRDBG DDR34 AC swizzle ADD7_4 register" hexmask.long.byte 0x4 24.--28. 1. "DDR34_AC_SWIZZLING_ADD7,Remapping input bit on add7 DDRPHYC input" hexmask.long.byte 0x4 16.--20. 1. "DDR34_AC_SWIZZLING_ADD6,Remapping input bit on add6 DDRPHYC input" hexmask.long.byte 0x4 8.--12. 1. "DDR34_AC_SWIZZLING_ADD5,Remapping input bit on add5 DDRPHYC input" newline hexmask.long.byte 0x4 0.--4. 1. "DDR34_AC_SWIZZLING_ADD4,Remapping input bit on add4 DDRPHYC input" line.long 0x8 "DDRDBG_DDR34_AC_SWIZZLE_ADD11_8,DDRDBG DDR34 AC swizzle ADD11_8 register" hexmask.long.byte 0x8 24.--28. 1. "DDR34_AC_SWIZZLING_ADD11,Remapping input bit on add11 DDRPHYC input" hexmask.long.byte 0x8 16.--20. 1. "DDR34_AC_SWIZZLING_ADD10,Remapping input bit on add10 DDRPHYC input" hexmask.long.byte 0x8 8.--12. 1. "DDR34_AC_SWIZZLING_ADD9,Remapping input bit on add9 DDRPHYC input" newline hexmask.long.byte 0x8 0.--4. 1. "DDR34_AC_SWIZZLING_ADD8,Remapping input bit on add8 DDRPHYC input" line.long 0xC "DDRDBG_DDR34_AC_SWIZZLE_ADD15_12,DDRDBG DDR34 AC swizzle ADD15_12 register" hexmask.long.byte 0xC 24.--28. 1. "DDR34_AC_SWIZZLING_ADD15,Remapping input bit on add15 DDRPHYC input" hexmask.long.byte 0xC 16.--20. 1. "DDR34_AC_SWIZZLING_ADD14,Remapping input bit on add14 DDRPHYC input" hexmask.long.byte 0xC 8.--12. 1. "DDR34_AC_SWIZZLING_ADD13,Remapping input bit on add13 DDRPHYC input" newline hexmask.long.byte 0xC 0.--4. 1. "DDR34_AC_SWIZZLING_ADD12,Remapping input bit on add12 DDRPHYC input" line.long 0x10 "DDRDBG_DDR34_AC_SWIZZLE_BK2_0_ACTN,DDRDBG DDR34 AC swizzle BK2 0 ACTN register" hexmask.long.byte 0x10 24.--28. 1. "DDR34_AC_SWIZZLING_BK3,Remapping input bit on bk3 DDRPHYC input" hexmask.long.byte 0x10 16.--20. 1. "DDR34_AC_SWIZZLING_BK2,Remapping input bit on bk2 DDRPHYC input" hexmask.long.byte 0x10 8.--12. 1. "DDR34_AC_SWIZZLING_BK1,Remapping input bit on bk1 DDRPHYC input" newline hexmask.long.byte 0x10 0.--4. 1. "DDR34_AC_SWIZZLING_ACTN,Remapping input bit on actn DDRPHYC input" line.long 0x14 "DDRDBG_DDR34_AC_SWIZZLE_RASN_CASN_BG1_0,DDRDBG DDR34 AC swizzle RASN CASN BG1_0 register" hexmask.long.byte 0x14 24.--28. 1. "DDR34_AC_SWIZZLING_RASN,Remapping input bit on rasn DDRPHYC input" hexmask.long.byte 0x14 16.--20. 1. "DDR34_AC_SWIZZLING_CASN,Remapping input bit on casn DDRPHYC input" hexmask.long.byte 0x14 8.--12. 1. "DDR34_AC_SWIZZLING_BG1,Remapping input bit on bg1 DDRPHYC input" newline hexmask.long.byte 0x14 0.--4. 1. "DDR34_AC_SWIZZLING_BG0,Remapping input bit on bg0 DDRPHYC input" line.long 0x18 "DDRDBG_DDR34_AC_SWIZZLE_WEN,DDRDBG DDR34 AC swizzle WEN register" hexmask.long.byte 0x18 0.--4. 1. "DDR34_AC_SWIZZLING_WEN,Remapping input bit on wen DDRPHYC input" tree.end tree "DDRDBG_S" base ad:0x58050000 group.long 0x0++0x17 line.long 0x0 "DDRDBG_LP_DISABLE,DDRDBG low-power disable register" bitfld.long 0x0 8. "LPI_DDRC_DISABLE,None" "B_0x0,B_0x1" bitfld.long 0x0 0. "LPI_XPI_DISABLE,None" "B_0x0,B_0x1" line.long 0x4 "DDRDBG_BYPASS_PCLKEN,DDRDBG bypass PCLKEN register" bitfld.long 0x4 0. "ENABLE,None" "B_0x0,B_0x1" line.long 0x8 "DDRDBG_DDRC_AUTO_SR_DELAY,DDRDBG DDRC auto SR delay register" hexmask.long.byte 0x8 0.--7. 1. "DELAY_CYCLES,Number of delay cycles to wait before to gate down the DDRC clock when in auto self-refresh" line.long 0xC "DDRDBG_OBSP_CTRL,DDRDBG OBSP control register" hexmask.long.byte 0xC 24.--28. 1. "OBSP3_SEL,Selects which of the input observable signal is forwarded to the HDP on selectable observability line 3." hexmask.long.byte 0xC 16.--20. 1. "OBSP2_SEL,Selects which of the input observable signal is forwarded to the HDP on selectable observability line 2." hexmask.long.byte 0xC 8.--12. 1. "OBSP1_SEL,Selects which of the input observable signal is forwarded to the HDP on selectable observability line 1." newline hexmask.long.byte 0xC 0.--4. 1. "OBSP0_SEL,Selects which of the input observable signal is forwarded to the HDP on selectable observability line 0." line.long 0x10 "DDRDBG_FRAC_PLL_LOCK,DDRDBG FRAC PLL lock register" bitfld.long 0x10 0. "LOCK,None" "B_0x0,B_0x1" line.long 0x14 "DDRDBG_DTO_OUTPUT,DDRDBG DTO output register" bitfld.long 0x14 0. "DTO,the DDRPHYC PLL lock can be observed in this register." "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "DDRDBG_DFI_ERRORS_CTRL,DDRDBG DFI error control register" bitfld.long 0x0 9. "DFI_ERROR1_SET,None" "B_0x0,B_0x1" bitfld.long 0x0 8. "DFI_ERROR1_CLEAR,None" "B_0x0,B_0x1" bitfld.long 0x0 1. "DFI_ERROR0_SET,None" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "DFI_ERROR0_CLEAR,None" "B_0x0,B_0x1" line.long 0x4 "DDRDBG_DFI_ERROR_STATUS,DDRDBG DFI error status register" bitfld.long 0x4 8. "DFI_ERROR1_STATUS,Status bit for dfi_error1" "B_0x0,B_0x1" bitfld.long 0x4 0. "DFI_ERROR0_STATUS,Status bit for dfi_error0" "B_0x0,B_0x1" line.long 0x8 "DDRDBG_DFI_ERROR_MSK,DDRDBG DFI error mask register" bitfld.long 0x8 8. "DFI_ERROR1_MASK,None" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFI_ERROR0_MASK,None" "B_0x0,B_0x1" group.long 0x100++0x1B line.long 0x0 "DDRDBG_DDR34_AC_SWIZZLE_ADD3_0,DDRDBG DDR34 AC swizzle ADD3_0 register" hexmask.long.byte 0x0 24.--28. 1. "DDR34_AC_SWIZZLING_ADD3,Remapping input bit on add3 DDRPHYC input" hexmask.long.byte 0x0 16.--20. 1. "DDR34_AC_SWIZZLING_ADD2,Remapping input bit on add2 DDRPHYC input" hexmask.long.byte 0x0 8.--12. 1. "DDR34_AC_SWIZZLING_ADD1,Remapping input bit on add1 DDRPHYC input" newline hexmask.long.byte 0x0 0.--4. 1. "DDR34_AC_SWIZZLING_ADD0,Remapping input bit on add0 DDRPHYC input" line.long 0x4 "DDRDBG_DDR34_AC_SWIZZLE_ADD7_4,DDRDBG DDR34 AC swizzle ADD7_4 register" hexmask.long.byte 0x4 24.--28. 1. "DDR34_AC_SWIZZLING_ADD7,Remapping input bit on add7 DDRPHYC input" hexmask.long.byte 0x4 16.--20. 1. "DDR34_AC_SWIZZLING_ADD6,Remapping input bit on add6 DDRPHYC input" hexmask.long.byte 0x4 8.--12. 1. "DDR34_AC_SWIZZLING_ADD5,Remapping input bit on add5 DDRPHYC input" newline hexmask.long.byte 0x4 0.--4. 1. "DDR34_AC_SWIZZLING_ADD4,Remapping input bit on add4 DDRPHYC input" line.long 0x8 "DDRDBG_DDR34_AC_SWIZZLE_ADD11_8,DDRDBG DDR34 AC swizzle ADD11_8 register" hexmask.long.byte 0x8 24.--28. 1. "DDR34_AC_SWIZZLING_ADD11,Remapping input bit on add11 DDRPHYC input" hexmask.long.byte 0x8 16.--20. 1. "DDR34_AC_SWIZZLING_ADD10,Remapping input bit on add10 DDRPHYC input" hexmask.long.byte 0x8 8.--12. 1. "DDR34_AC_SWIZZLING_ADD9,Remapping input bit on add9 DDRPHYC input" newline hexmask.long.byte 0x8 0.--4. 1. "DDR34_AC_SWIZZLING_ADD8,Remapping input bit on add8 DDRPHYC input" line.long 0xC "DDRDBG_DDR34_AC_SWIZZLE_ADD15_12,DDRDBG DDR34 AC swizzle ADD15_12 register" hexmask.long.byte 0xC 24.--28. 1. "DDR34_AC_SWIZZLING_ADD15,Remapping input bit on add15 DDRPHYC input" hexmask.long.byte 0xC 16.--20. 1. "DDR34_AC_SWIZZLING_ADD14,Remapping input bit on add14 DDRPHYC input" hexmask.long.byte 0xC 8.--12. 1. "DDR34_AC_SWIZZLING_ADD13,Remapping input bit on add13 DDRPHYC input" newline hexmask.long.byte 0xC 0.--4. 1. "DDR34_AC_SWIZZLING_ADD12,Remapping input bit on add12 DDRPHYC input" line.long 0x10 "DDRDBG_DDR34_AC_SWIZZLE_BK2_0_ACTN,DDRDBG DDR34 AC swizzle BK2 0 ACTN register" hexmask.long.byte 0x10 24.--28. 1. "DDR34_AC_SWIZZLING_BK3,Remapping input bit on bk3 DDRPHYC input" hexmask.long.byte 0x10 16.--20. 1. "DDR34_AC_SWIZZLING_BK2,Remapping input bit on bk2 DDRPHYC input" hexmask.long.byte 0x10 8.--12. 1. "DDR34_AC_SWIZZLING_BK1,Remapping input bit on bk1 DDRPHYC input" newline hexmask.long.byte 0x10 0.--4. 1. "DDR34_AC_SWIZZLING_ACTN,Remapping input bit on actn DDRPHYC input" line.long 0x14 "DDRDBG_DDR34_AC_SWIZZLE_RASN_CASN_BG1_0,DDRDBG DDR34 AC swizzle RASN CASN BG1_0 register" hexmask.long.byte 0x14 24.--28. 1. "DDR34_AC_SWIZZLING_RASN,Remapping input bit on rasn DDRPHYC input" hexmask.long.byte 0x14 16.--20. 1. "DDR34_AC_SWIZZLING_CASN,Remapping input bit on casn DDRPHYC input" hexmask.long.byte 0x14 8.--12. 1. "DDR34_AC_SWIZZLING_BG1,Remapping input bit on bg1 DDRPHYC input" newline hexmask.long.byte 0x14 0.--4. 1. "DDR34_AC_SWIZZLING_BG0,Remapping input bit on bg0 DDRPHYC input" line.long 0x18 "DDRDBG_DDR34_AC_SWIZZLE_WEN,DDRDBG DDR34 AC swizzle WEN register" hexmask.long.byte 0x18 0.--4. 1. "DDR34_AC_SWIZZLING_WEN,Remapping input bit on wen DDRPHYC input" tree.end tree.end tree "DDRPERFM (DDR Performance Monitor)" tree "DDRPERFM" base ad:0x48041000 group.long 0x0++0x2B line.long 0x0 "DDRPERFM_CTRL,DDRPERFM control register" bitfld.long 0x0 1. "STOP,Writing 1 stops all counters. Writing 0 has no effect. Writing 1 when counters are stopped has not effect." "0,1" bitfld.long 0x0 0. "START,Writing 1 starts all counters. All internal counters and status bits are cleared before events are monitored. Writing 0 has no effect. Writing 1 when counters are running has not effect." "0,1" line.long 0x4 "DDRPERFM_IMSK,DDRPERFM interrupt mask register" bitfld.long 0x4 0. "INTRMSK,None" "B_0x0,B_0x1" line.long 0x8 "DDRPERFM_ICLR,DDRPERFM interrupt clear register" bitfld.long 0x8 1. "INTRSET,None" "B_0x0,B_0x1" bitfld.long 0x8 0. "INTRCLR,Note: The counters must be cleared first (to remove the interruption condition) before the interruption is cleared." "B_0x0,B_0x1" line.long 0xC "DDRPERFM_CLR,DDRPERFM counter clear register" bitfld.long 0xC 8. "TNTCLR,Note: Setting this bit is ignored if BUSY = 1 in DDRPERFM_STATUS." "B_0x0,B_0x1" hexmask.long.byte 0xC 0.--7. 1. "CNTCLR,Note: Setting this bit is ignored if BUSY = 1 in DDRPERFM_STATUS." line.long 0x10 "DDRPERFM_CFG0,DDRPERFM configuration register 0" hexmask.long.byte 0x10 24.--29. 1. "SEL_EVENT3,Selection of the performance logging signal to be monitored by the event counter 3" hexmask.long.byte 0x10 16.--21. 1. "SEL_EVENT2,Selection of the performance logging signal to be monitored by the event counter 2" hexmask.long.byte 0x10 8.--13. 1. "SEL_EVENT1,Selection of the performance logging signal to be monitored by the event counter 1" hexmask.long.byte 0x10 0.--5. 1. "SEL_EVENT0,Selection of the performance logging signal to be monitored by the event counter 0" line.long 0x14 "DDRPERFM_CFG1,DDRPERFM configuration register 1" hexmask.long.byte 0x14 24.--29. 1. "SEL_EVENT7,Selection of the performance logging signal to be monitored by the event counter 7" hexmask.long.byte 0x14 16.--21. 1. "SEL_EVENT6,Selection of the performance logging signal to be monitored by the event counter 6" hexmask.long.byte 0x14 8.--13. 1. "SEL_EVENT5,Selection of the performance logging signal to be monitored by the event counter 5" hexmask.long.byte 0x14 0.--5. 1. "SEL_EVENT4,Selection of the performance logging signal to be monitored by the event counter 4" line.long 0x18 "DDRPERFM_CFG2,DDRPERFM configuration register 2" bitfld.long 0x18 29.--31. "FILT_POL3,Selection of the performance logging signal to be monitored by the event counter 3" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x18 24.--28. 1. "FILT_RBG3,Configuration of the rank/bank/bank group filtering for the event counter 3 based on FILT_POL3 value" bitfld.long 0x18 21.--23. "FILT_POL2,Filtering policy for the event counter 2. (refer to Table72)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x18 16.--20. 1. "FILT_RBG2,Configuration of the rank/bank/bank group filtering for the event counter 2 based on FILT_POL2 value" bitfld.long 0x18 13.--15. "FILT_POL1,Filtering policy for the event counter 1 (refer to Table72)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x18 8.--12. 1. "FILT_RBG1,Configuration of the rank/bank/bank group filtering for the event counter 1 based on FILT_POL1 value" bitfld.long 0x18 5.--7. "FILT_POL0,Filtering policy for the event counter 0 (refer to Table72)" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x18 0.--4. 1. "FILT_RBG0,Configuration of the rank/bank/bank group filtering for the event counter 0 based on FILT_POL0 value" line.long 0x1C "DDRPERFM_CFG3,DDRPERFM configuration register 3" bitfld.long 0x1C 29.--31. "FILT_POL7,Filtering policy for the event counter 7 (refer to Table72)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x1C 24.--28. 1. "FILT_RBG7,Configuration of the rank/bank/bank group filtering for the event counter 7 based on FILT_POL7 value" bitfld.long 0x1C 21.--23. "FILT_POL6,Filtering policy for the event counter 6 (refer to Table72)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x1C 16.--20. 1. "FILT_RBG6,Configuration of the rank/bank/bank group filtering for the event counter 6 based on FILT_POL6 value" bitfld.long 0x1C 13.--15. "FILT_POL5,Filtering policy for the event counter 5 (refer to Table72)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x1C 8.--12. 1. "FILT_RBG5,Configuration of the rank/bank/bank group filtering for the event counter 5 based on FILT_POL5 value" bitfld.long 0x1C 5.--7. "FILT_POL4,Filtering policy for the event counter 4 (refer to Table72)" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x1C 0.--4. 1. "FILT_RBG4,Configuration of the rank/bank/bank group filtering for the event counter 4 based on FILT_POL4 value" line.long 0x20 "DDRPERFM_CFG4,DDRPERFM configuration register 4" hexmask.long 0x20 0.--31. 1. "TIME_OUT,Timeout value for the time counter" line.long 0x24 "DDRPERFM_CFG5,DDRPERFM event counter enable register" hexmask.long.byte 0x24 0.--7. 1. "EVCNT_EN,Event counter enable" line.long 0x28 "DDRPERFM_DRAMINF,DDRPERFM DRAM information register" bitfld.long 0x28 0.--1. "DRAM_TYPE,DRAM information used for DFI decoding" "B_0x0,B_0x1,B_0x2,B_0x3" rgroup.long 0x40++0x23 line.long 0x0 "DDRPERFM_EVCNT0,DDRPERFM event counter 0 register" hexmask.long 0x0 0.--31. 1. "EVCNT0,Counter value for event 0" line.long 0x4 "DDRPERFM_EVCNT1,DDRPERFM event counter 1 register" hexmask.long 0x4 0.--31. 1. "EVCNT1,Counter value for event 1" line.long 0x8 "DDRPERFM_EVCNT2,DDRPERFM event counter 2 register" hexmask.long 0x8 0.--31. 1. "EVCNT2,Counter value for event 2" line.long 0xC "DDRPERFM_EVCNT3,DDRPERFM event counter 3 register" hexmask.long 0xC 0.--31. 1. "EVCNT3,Counter value for event 3" line.long 0x10 "DDRPERFM_EVCNT4,DDRPERFM event counter 4 register" hexmask.long 0x10 0.--31. 1. "EVCNT4,Counter value for event 4" line.long 0x14 "DDRPERFM_EVCNT5,DDRPERFM event counter 5 register" hexmask.long 0x14 0.--31. 1. "EVCNT5,Counter value for event 5" line.long 0x18 "DDRPERFM_EVCNT6,DDRPERFM event counter 6 register" hexmask.long 0x18 0.--31. 1. "EVCNT6,Counter value for event 6" line.long 0x1C "DDRPERFM_EVCNT7,DDRPERFM event counter 7 register" hexmask.long 0x1C 0.--31. 1. "EVCNT7,Counter value for event 7" line.long 0x20 "DDRPERFM_TCNT,DDRPERFM time counter register" hexmask.long 0x20 0.--31. 1. "TCNT,Time counter value" rgroup.long 0x80++0x3 line.long 0x0 "DDRPERFM_STATUS,DDRPERFM status register" bitfld.long 0x0 31. "BUSY,Real-time busy indicator" "0,1" bitfld.long 0x0 16. "TCNT_OVFL,When read to 1 the DDRPERFM is stopped due to time counter reaching the timeout value." "0,1" bitfld.long 0x0 7. "EVCNT7_OVFL,When read to 1 the DDRPERFM is stopped due to event counter 7 overflow." "0,1" bitfld.long 0x0 6. "EVCNT6_OVFL,When read to 1 the DDRPERFM is stopped due to event counter 6 overflow." "0,1" bitfld.long 0x0 5. "EVCNT5_OVFL,When read to 1 the DDRPERFM is stopped due to event counter 5 overflow." "0,1" bitfld.long 0x0 4. "EVCNT4_OVFL,When read to 1 the DDRPERFM is stopped due to event counter 4 overflow." "0,1" bitfld.long 0x0 3. "EVCNT3_OVFL,When read to 1 the DDRPERFM is stopped due to event counter 3 overflow." "0,1" newline bitfld.long 0x0 2. "EVCNT2_OVFL,When read to 1 the DDRPERFM is stopped due to event counter 2 overflow." "0,1" bitfld.long 0x0 1. "EVCNT1_OVFL,When read to 1 the DDRPERFM is stopped due to event counter 1 overflow." "0,1" bitfld.long 0x0 0. "EVCNT0_OVFL,When read to 1 the DDRPERFM is stopped due to event counter 0 overflow." "0,1" tree.end tree "DDRPERFM_S" base ad:0x58041000 group.long 0x0++0x2B line.long 0x0 "DDRPERFM_CTRL,DDRPERFM control register" bitfld.long 0x0 1. "STOP,Writing 1 stops all counters. Writing 0 has no effect. Writing 1 when counters are stopped has not effect." "0,1" bitfld.long 0x0 0. "START,Writing 1 starts all counters. All internal counters and status bits are cleared before events are monitored. Writing 0 has no effect. Writing 1 when counters are running has not effect." "0,1" line.long 0x4 "DDRPERFM_IMSK,DDRPERFM interrupt mask register" bitfld.long 0x4 0. "INTRMSK,None" "B_0x0,B_0x1" line.long 0x8 "DDRPERFM_ICLR,DDRPERFM interrupt clear register" bitfld.long 0x8 1. "INTRSET,None" "B_0x0,B_0x1" bitfld.long 0x8 0. "INTRCLR,Note: The counters must be cleared first (to remove the interruption condition) before the interruption is cleared." "B_0x0,B_0x1" line.long 0xC "DDRPERFM_CLR,DDRPERFM counter clear register" bitfld.long 0xC 8. "TNTCLR,Note: Setting this bit is ignored if BUSY = 1 in DDRPERFM_STATUS." "B_0x0,B_0x1" hexmask.long.byte 0xC 0.--7. 1. "CNTCLR,Note: Setting this bit is ignored if BUSY = 1 in DDRPERFM_STATUS." line.long 0x10 "DDRPERFM_CFG0,DDRPERFM configuration register 0" hexmask.long.byte 0x10 24.--29. 1. "SEL_EVENT3,Selection of the performance logging signal to be monitored by the event counter 3" hexmask.long.byte 0x10 16.--21. 1. "SEL_EVENT2,Selection of the performance logging signal to be monitored by the event counter 2" hexmask.long.byte 0x10 8.--13. 1. "SEL_EVENT1,Selection of the performance logging signal to be monitored by the event counter 1" hexmask.long.byte 0x10 0.--5. 1. "SEL_EVENT0,Selection of the performance logging signal to be monitored by the event counter 0" line.long 0x14 "DDRPERFM_CFG1,DDRPERFM configuration register 1" hexmask.long.byte 0x14 24.--29. 1. "SEL_EVENT7,Selection of the performance logging signal to be monitored by the event counter 7" hexmask.long.byte 0x14 16.--21. 1. "SEL_EVENT6,Selection of the performance logging signal to be monitored by the event counter 6" hexmask.long.byte 0x14 8.--13. 1. "SEL_EVENT5,Selection of the performance logging signal to be monitored by the event counter 5" hexmask.long.byte 0x14 0.--5. 1. "SEL_EVENT4,Selection of the performance logging signal to be monitored by the event counter 4" line.long 0x18 "DDRPERFM_CFG2,DDRPERFM configuration register 2" bitfld.long 0x18 29.--31. "FILT_POL3,Selection of the performance logging signal to be monitored by the event counter 3" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x18 24.--28. 1. "FILT_RBG3,Configuration of the rank/bank/bank group filtering for the event counter 3 based on FILT_POL3 value" bitfld.long 0x18 21.--23. "FILT_POL2,Filtering policy for the event counter 2. (refer to Table72)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x18 16.--20. 1. "FILT_RBG2,Configuration of the rank/bank/bank group filtering for the event counter 2 based on FILT_POL2 value" bitfld.long 0x18 13.--15. "FILT_POL1,Filtering policy for the event counter 1 (refer to Table72)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x18 8.--12. 1. "FILT_RBG1,Configuration of the rank/bank/bank group filtering for the event counter 1 based on FILT_POL1 value" bitfld.long 0x18 5.--7. "FILT_POL0,Filtering policy for the event counter 0 (refer to Table72)" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x18 0.--4. 1. "FILT_RBG0,Configuration of the rank/bank/bank group filtering for the event counter 0 based on FILT_POL0 value" line.long 0x1C "DDRPERFM_CFG3,DDRPERFM configuration register 3" bitfld.long 0x1C 29.--31. "FILT_POL7,Filtering policy for the event counter 7 (refer to Table72)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x1C 24.--28. 1. "FILT_RBG7,Configuration of the rank/bank/bank group filtering for the event counter 7 based on FILT_POL7 value" bitfld.long 0x1C 21.--23. "FILT_POL6,Filtering policy for the event counter 6 (refer to Table72)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x1C 16.--20. 1. "FILT_RBG6,Configuration of the rank/bank/bank group filtering for the event counter 6 based on FILT_POL6 value" bitfld.long 0x1C 13.--15. "FILT_POL5,Filtering policy for the event counter 5 (refer to Table72)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x1C 8.--12. 1. "FILT_RBG5,Configuration of the rank/bank/bank group filtering for the event counter 5 based on FILT_POL5 value" bitfld.long 0x1C 5.--7. "FILT_POL4,Filtering policy for the event counter 4 (refer to Table72)" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x1C 0.--4. 1. "FILT_RBG4,Configuration of the rank/bank/bank group filtering for the event counter 4 based on FILT_POL4 value" line.long 0x20 "DDRPERFM_CFG4,DDRPERFM configuration register 4" hexmask.long 0x20 0.--31. 1. "TIME_OUT,Timeout value for the time counter" line.long 0x24 "DDRPERFM_CFG5,DDRPERFM event counter enable register" hexmask.long.byte 0x24 0.--7. 1. "EVCNT_EN,Event counter enable" line.long 0x28 "DDRPERFM_DRAMINF,DDRPERFM DRAM information register" bitfld.long 0x28 0.--1. "DRAM_TYPE,DRAM information used for DFI decoding" "B_0x0,B_0x1,B_0x2,B_0x3" rgroup.long 0x40++0x23 line.long 0x0 "DDRPERFM_EVCNT0,DDRPERFM event counter 0 register" hexmask.long 0x0 0.--31. 1. "EVCNT0,Counter value for event 0" line.long 0x4 "DDRPERFM_EVCNT1,DDRPERFM event counter 1 register" hexmask.long 0x4 0.--31. 1. "EVCNT1,Counter value for event 1" line.long 0x8 "DDRPERFM_EVCNT2,DDRPERFM event counter 2 register" hexmask.long 0x8 0.--31. 1. "EVCNT2,Counter value for event 2" line.long 0xC "DDRPERFM_EVCNT3,DDRPERFM event counter 3 register" hexmask.long 0xC 0.--31. 1. "EVCNT3,Counter value for event 3" line.long 0x10 "DDRPERFM_EVCNT4,DDRPERFM event counter 4 register" hexmask.long 0x10 0.--31. 1. "EVCNT4,Counter value for event 4" line.long 0x14 "DDRPERFM_EVCNT5,DDRPERFM event counter 5 register" hexmask.long 0x14 0.--31. 1. "EVCNT5,Counter value for event 5" line.long 0x18 "DDRPERFM_EVCNT6,DDRPERFM event counter 6 register" hexmask.long 0x18 0.--31. 1. "EVCNT6,Counter value for event 6" line.long 0x1C "DDRPERFM_EVCNT7,DDRPERFM event counter 7 register" hexmask.long 0x1C 0.--31. 1. "EVCNT7,Counter value for event 7" line.long 0x20 "DDRPERFM_TCNT,DDRPERFM time counter register" hexmask.long 0x20 0.--31. 1. "TCNT,Time counter value" rgroup.long 0x80++0x3 line.long 0x0 "DDRPERFM_STATUS,DDRPERFM status register" bitfld.long 0x0 31. "BUSY,Real-time busy indicator" "0,1" bitfld.long 0x0 16. "TCNT_OVFL,When read to 1 the DDRPERFM is stopped due to time counter reaching the timeout value." "0,1" bitfld.long 0x0 7. "EVCNT7_OVFL,When read to 1 the DDRPERFM is stopped due to event counter 7 overflow." "0,1" bitfld.long 0x0 6. "EVCNT6_OVFL,When read to 1 the DDRPERFM is stopped due to event counter 6 overflow." "0,1" bitfld.long 0x0 5. "EVCNT5_OVFL,When read to 1 the DDRPERFM is stopped due to event counter 5 overflow." "0,1" bitfld.long 0x0 4. "EVCNT4_OVFL,When read to 1 the DDRPERFM is stopped due to event counter 4 overflow." "0,1" bitfld.long 0x0 3. "EVCNT3_OVFL,When read to 1 the DDRPERFM is stopped due to event counter 3 overflow." "0,1" newline bitfld.long 0x0 2. "EVCNT2_OVFL,When read to 1 the DDRPERFM is stopped due to event counter 2 overflow." "0,1" bitfld.long 0x0 1. "EVCNT1_OVFL,When read to 1 the DDRPERFM is stopped due to event counter 1 overflow." "0,1" bitfld.long 0x0 0. "EVCNT0_OVFL,When read to 1 the DDRPERFM is stopped due to event counter 0 overflow." "0,1" tree.end tree.end tree "DDRPHYC (DDR Physical Interface Control)" tree "DDRPHYC" base ad:0x48C00000 group.long 0x68++0x3 line.long 0x0 "DDRPHYC_ANIB0_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x9C++0x7 line.long 0x0 "DDRPHYC_ANIB0_AFORCEDRVCONT,DDRPHYC AForceDrvCont register" hexmask.long.byte 0x0 0.--3. 1. "AFORCEDRVCONT,Forces continuous drive per-lane of the ACX4 instance controlled by this register." line.long 0x4 "DDRPHYC_ANIB0_AFORCETRICONT,DDRPHYC AForceTriCont register" hexmask.long.byte 0x4 0.--3. 1. "AFORCETRICONT,Forces tristate control per-lane of the ACX4 instance controlled by this register." group.long 0x10C++0x3 line.long 0x0 "DDRPHYC_ANIB0_ATXIMPEDANCE,DDRPHYC address T0 impedance control register" hexmask.long.byte 0x0 5.--9. 1. "ADRVSTRENN,5-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x0 0.--4. 1. "ADRVSTRENP,5-bit bus used to select the target pull-up output impedance" rgroup.long 0x14C++0x3 line.long 0x0 "DDRPHYC_ANIB0_ATESTPRBSERR,DDRPHYC ATestPrbsErr register" hexmask.long.byte 0x0 0.--3. 1. "ATESTPRBSERR,Overall error indicator for each PRBS bump checker" group.long 0x154++0x3 line.long 0x0 "DDRPHYC_ANIB0_ATXSLEWRATE,DDRPHYC address T0 slew rate and predriver control register" bitfld.long 0x0 8.--10. "ATXPREDRVMODE,Controls predrivers to adjust timing of turn-on/-off of pull-up/-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "ATXPREN,4-bit binary trim for the driver pull-down slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "ATXPREP,4-bit binary trim for the driver pull-up slew rate" rgroup.long 0x158++0x3 line.long 0x0 "DDRPHYC_ANIB0_ATESTPRBSERRCNT,DDRPHYC ATestPrbsErrCnt register" hexmask.long.word 0x0 0.--15. 1. "ATESTPRBSERRCNT,Overall error indicator for each PRBS bump checker" group.long 0x200++0x3 line.long 0x0 "DDRPHYC_ANIB0_ATXDLY,DDRPHYC ATxDly register" hexmask.long.byte 0x0 0.--6. 1. "ATXDLY,Trained for LPDDR4 to generate timed address and command signals" group.long 0x4068++0x3 line.long 0x0 "DDRPHYC_ANIB1_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x409C++0x7 line.long 0x0 "DDRPHYC_ANIB1_AFORCEDRVCONT,DDRPHYC AForceDrvCont register" hexmask.long.byte 0x0 0.--3. 1. "AFORCEDRVCONT,Forces continuous drive per-lane of the ACX4 instance controlled by this register." line.long 0x4 "DDRPHYC_ANIB1_AFORCETRICONT,DDRPHYC AForceTriCont register" hexmask.long.byte 0x4 0.--3. 1. "AFORCETRICONT,Forces tristate control per-lane of the ACX4 instance controlled by this register." group.long 0x410C++0x3 line.long 0x0 "DDRPHYC_ANIB1_ATXIMPEDANCE,DDRPHYC address T1 impedance control register" hexmask.long.byte 0x0 5.--9. 1. "ADRVSTRENN,5-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x0 0.--4. 1. "ADRVSTRENP,5-bit bus used to select the target pull-up output impedance" rgroup.long 0x414C++0x3 line.long 0x0 "DDRPHYC_ANIB1_ATESTPRBSERR,DDRPHYC ATestPrbsErr register" hexmask.long.byte 0x0 0.--3. 1. "ATESTPRBSERR,Overall error indicator for each PRBS bump checker" group.long 0x4154++0x3 line.long 0x0 "DDRPHYC_ANIB1_ATXSLEWRATE,DDRPHYC address T1 slew rate and predriver control register" bitfld.long 0x0 8.--10. "ATXPREDRVMODE,Controls predrivers to adjust timing of turn-on/-off of pull-up/-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "ATXPREN,4-bit binary trim for the driver pull-down slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "ATXPREP,4-bit binary trim for the driver pull-up slew rate" rgroup.long 0x4158++0x3 line.long 0x0 "DDRPHYC_ANIB1_ATESTPRBSERRCNT,DDRPHYC ATestPrbsErrCnt register" hexmask.long.word 0x0 0.--15. 1. "ATESTPRBSERRCNT,Overall error indicator for each PRBS bump checker" group.long 0x4200++0x3 line.long 0x0 "DDRPHYC_ANIB1_ATXDLY,DDRPHYC ATxDly register" hexmask.long.byte 0x0 0.--6. 1. "ATXDLY,Trained for LPDDR4 to generate timed address and command signals" group.long 0x8068++0x3 line.long 0x0 "DDRPHYC_ANIB2_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x809C++0x7 line.long 0x0 "DDRPHYC_ANIB2_AFORCEDRVCONT,DDRPHYC AForceDrvCont register" hexmask.long.byte 0x0 0.--3. 1. "AFORCEDRVCONT,Forces continuous drive per-lane of the ACX4 instance controlled by this register." line.long 0x4 "DDRPHYC_ANIB2_AFORCETRICONT,DDRPHYC AForceTriCont register" hexmask.long.byte 0x4 0.--3. 1. "AFORCETRICONT,Forces tristate control per-lane of the ACX4 instance controlled by this register." group.long 0x810C++0x3 line.long 0x0 "DDRPHYC_ANIB2_ATXIMPEDANCE,DDRPHYC address T2 impedance control register" hexmask.long.byte 0x0 5.--9. 1. "ADRVSTRENN,5-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x0 0.--4. 1. "ADRVSTRENP,5-bit bus used to select the target pull-up output impedance" rgroup.long 0x814C++0x3 line.long 0x0 "DDRPHYC_ANIB2_ATESTPRBSERR,DDRPHYC ATestPrbsErr register" hexmask.long.byte 0x0 0.--3. 1. "ATESTPRBSERR,Overall error indicator for each PRBS bump checker" group.long 0x8154++0x3 line.long 0x0 "DDRPHYC_ANIB2_ATXSLEWRATE,DDRPHYC address T2 slew rate and predriver control register" bitfld.long 0x0 8.--10. "ATXPREDRVMODE,Controls predrivers to adjust timing of turn-on/-off of pull-up/-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "ATXPREN,4-bit binary trim for the driver pull-down slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "ATXPREP,4-bit binary trim for the driver pull-up slew rate" rgroup.long 0x8158++0x3 line.long 0x0 "DDRPHYC_ANIB2_ATESTPRBSERRCNT,DDRPHYC ATestPrbsErrCnt register" hexmask.long.word 0x0 0.--15. 1. "ATESTPRBSERRCNT,Overall error indicator for each PRBS bump checker" group.long 0x8200++0x3 line.long 0x0 "DDRPHYC_ANIB2_ATXDLY,DDRPHYC ATxDly register" hexmask.long.byte 0x0 0.--6. 1. "ATXDLY,Trained for LPDDR4 to generate timed address and command signals" group.long 0xC068++0x3 line.long 0x0 "DDRPHYC_ANIB3_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0xC09C++0x7 line.long 0x0 "DDRPHYC_ANIB3_AFORCEDRVCONT,DDRPHYC AForceDrvCont register" hexmask.long.byte 0x0 0.--3. 1. "AFORCEDRVCONT,Forces continuous drive per-lane of the ACX4 instance controlled by this register." line.long 0x4 "DDRPHYC_ANIB3_AFORCETRICONT,DDRPHYC AForceTriCont register" hexmask.long.byte 0x4 0.--3. 1. "AFORCETRICONT,Forces tristate control per-lane of the ACX4 instance controlled by this register." group.long 0xC10C++0x3 line.long 0x0 "DDRPHYC_ANIB3_ATXIMPEDANCE,DDRPHYC address T3 impedance control register" hexmask.long.byte 0x0 5.--9. 1. "ADRVSTRENN,5-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x0 0.--4. 1. "ADRVSTRENP,5-bit bus used to select the target pull-up output impedance" rgroup.long 0xC14C++0x3 line.long 0x0 "DDRPHYC_ANIB3_ATESTPRBSERR,DDRPHYC ATestPrbsErr register" hexmask.long.byte 0x0 0.--3. 1. "ATESTPRBSERR,Overall error indicator for each PRBS bump checker" group.long 0xC154++0x3 line.long 0x0 "DDRPHYC_ANIB3_ATXSLEWRATE,DDRPHYC address T3 slew rate and predriver control register" bitfld.long 0x0 8.--10. "ATXPREDRVMODE,Controls predrivers to adjust timing of turn-on/-off of pull-up/-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "ATXPREN,4-bit binary trim for the driver pull-down slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "ATXPREP,4-bit binary trim for the driver pull-up slew rate" rgroup.long 0xC158++0x3 line.long 0x0 "DDRPHYC_ANIB3_ATESTPRBSERRCNT,DDRPHYC ATestPrbsErrCnt register" hexmask.long.word 0x0 0.--15. 1. "ATESTPRBSERRCNT,Overall error indicator for each PRBS bump checker" group.long 0xC200++0x3 line.long 0x0 "DDRPHYC_ANIB3_ATXDLY,DDRPHYC ATxDly register" hexmask.long.byte 0x0 0.--6. 1. "ATXDLY,Trained for LPDDR4 to generate timed address and command signals" group.long 0x10068++0x3 line.long 0x0 "DDRPHYC_ANIB4_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x1009C++0x7 line.long 0x0 "DDRPHYC_ANIB4_AFORCEDRVCONT,DDRPHYC AForceDrvCont register" hexmask.long.byte 0x0 0.--3. 1. "AFORCEDRVCONT,Forces continuous drive per-lane of the ACX4 instance controlled by this register." line.long 0x4 "DDRPHYC_ANIB4_AFORCETRICONT,DDRPHYC AForceTriCont register" hexmask.long.byte 0x4 0.--3. 1. "AFORCETRICONT,Forces tristate control per-lane of the ACX4 instance controlled by this register." group.long 0x1010C++0x3 line.long 0x0 "DDRPHYC_ANIB4_ATXIMPEDANCE,DDRPHYC address T4 impedance control register" hexmask.long.byte 0x0 5.--9. 1. "ADRVSTRENN,5-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x0 0.--4. 1. "ADRVSTRENP,5-bit bus used to select the target pull-up output impedance" rgroup.long 0x1014C++0x3 line.long 0x0 "DDRPHYC_ANIB4_ATESTPRBSERR,DDRPHYC ATestPrbsErr register" hexmask.long.byte 0x0 0.--3. 1. "ATESTPRBSERR,Overall error indicator for each PRBS bump checker" group.long 0x10154++0x3 line.long 0x0 "DDRPHYC_ANIB4_ATXSLEWRATE,DDRPHYC address T4 slew rate and predriver control register" bitfld.long 0x0 8.--10. "ATXPREDRVMODE,Controls predrivers to adjust timing of turn-on/-off of pull-up/-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "ATXPREN,4-bit binary trim for the driver pull-down slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "ATXPREP,4-bit binary trim for the driver pull-up slew rate" rgroup.long 0x10158++0x3 line.long 0x0 "DDRPHYC_ANIB4_ATESTPRBSERRCNT,DDRPHYC ATestPrbsErrCnt register" hexmask.long.word 0x0 0.--15. 1. "ATESTPRBSERRCNT,Overall error indicator for each PRBS bump checker" group.long 0x10200++0x3 line.long 0x0 "DDRPHYC_ANIB4_ATXDLY,DDRPHYC ATxDly register" hexmask.long.byte 0x0 0.--6. 1. "ATXDLY,Trained for LPDDR4 to generate timed address and command signals" group.long 0x14068++0x3 line.long 0x0 "DDRPHYC_ANIB5_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x1409C++0x7 line.long 0x0 "DDRPHYC_ANIB5_AFORCEDRVCONT,DDRPHYC AForceDrvCont register" hexmask.long.byte 0x0 0.--3. 1. "AFORCEDRVCONT,Forces continuous drive per-lane of the ACX4 instance controlled by this register." line.long 0x4 "DDRPHYC_ANIB5_AFORCETRICONT,DDRPHYC AForceTriCont register" hexmask.long.byte 0x4 0.--3. 1. "AFORCETRICONT,Forces tristate control per-lane of the ACX4 instance controlled by this register." group.long 0x1410C++0x3 line.long 0x0 "DDRPHYC_ANIB5_ATXIMPEDANCE,DDRPHYC address T5 impedance control register" hexmask.long.byte 0x0 5.--9. 1. "ADRVSTRENN,5-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x0 0.--4. 1. "ADRVSTRENP,5-bit bus used to select the target pull-up output impedance" rgroup.long 0x1414C++0x3 line.long 0x0 "DDRPHYC_ANIB5_ATESTPRBSERR,DDRPHYC ATestPrbsErr register" hexmask.long.byte 0x0 0.--3. 1. "ATESTPRBSERR,Overall error indicator for each PRBS bump checker" group.long 0x14154++0x3 line.long 0x0 "DDRPHYC_ANIB5_ATXSLEWRATE,DDRPHYC address T5 slew rate and predriver control register" bitfld.long 0x0 8.--10. "ATXPREDRVMODE,Controls predrivers to adjust timing of turn-on/-off of pull-up/-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "ATXPREN,4-bit binary trim for the driver pull-down slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "ATXPREP,4-bit binary trim for the driver pull-up slew rate" rgroup.long 0x14158++0x3 line.long 0x0 "DDRPHYC_ANIB5_ATESTPRBSERRCNT,DDRPHYC ATestPrbsErrCnt register" hexmask.long.word 0x0 0.--15. 1. "ATESTPRBSERRCNT,Overall error indicator for each PRBS bump checker" group.long 0x14200++0x3 line.long 0x0 "DDRPHYC_ANIB5_ATXDLY,DDRPHYC ATxDly register" hexmask.long.byte 0x0 0.--6. 1. "ATXDLY,Trained for LPDDR4 to generate timed address and command signals" group.long 0x18068++0x3 line.long 0x0 "DDRPHYC_ANIB6_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x1809C++0x7 line.long 0x0 "DDRPHYC_ANIB6_AFORCEDRVCONT,DDRPHYC AForceDrvCont register" hexmask.long.byte 0x0 0.--3. 1. "AFORCEDRVCONT,Forces continuous drive per-lane of the ACX4 instance controlled by this register." line.long 0x4 "DDRPHYC_ANIB6_AFORCETRICONT,DDRPHYC AForceTriCont register" hexmask.long.byte 0x4 0.--3. 1. "AFORCETRICONT,Forces tristate control per-lane of the ACX4 instance controlled by this register." group.long 0x1810C++0x3 line.long 0x0 "DDRPHYC_ANIB6_ATXIMPEDANCE,DDRPHYC address T6 impedance control register" hexmask.long.byte 0x0 5.--9. 1. "ADRVSTRENN,5-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x0 0.--4. 1. "ADRVSTRENP,5-bit bus used to select the target pull-up output impedance" rgroup.long 0x1814C++0x3 line.long 0x0 "DDRPHYC_ANIB6_ATESTPRBSERR,DDRPHYC ATestPrbsErr register" hexmask.long.byte 0x0 0.--3. 1. "ATESTPRBSERR,Overall error indicator for each PRBS bump checker" group.long 0x18154++0x3 line.long 0x0 "DDRPHYC_ANIB6_ATXSLEWRATE,DDRPHYC address T6 slew rate and predriver control register" bitfld.long 0x0 8.--10. "ATXPREDRVMODE,Controls predrivers to adjust timing of turn-on/-off of pull-up/-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "ATXPREN,4-bit binary trim for the driver pull-down slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "ATXPREP,4-bit binary trim for the driver pull-up slew rate" rgroup.long 0x18158++0x3 line.long 0x0 "DDRPHYC_ANIB6_ATESTPRBSERRCNT,DDRPHYC ATestPrbsErrCnt register" hexmask.long.word 0x0 0.--15. 1. "ATESTPRBSERRCNT,Overall error indicator for each PRBS bump checker" group.long 0x18200++0x3 line.long 0x0 "DDRPHYC_ANIB6_ATXDLY,DDRPHYC ATxDly register" hexmask.long.byte 0x0 0.--6. 1. "ATXDLY,Trained for LPDDR4 to generate timed address and command signals" group.long 0x1C068++0x3 line.long 0x0 "DDRPHYC_ANIB7_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x1C09C++0x7 line.long 0x0 "DDRPHYC_ANIB7_AFORCEDRVCONT,DDRPHYC AForceDrvCont register" hexmask.long.byte 0x0 0.--3. 1. "AFORCEDRVCONT,Forces continuous drive per-lane of the ACX4 instance controlled by this register." line.long 0x4 "DDRPHYC_ANIB7_AFORCETRICONT,DDRPHYC AForceTriCont register" hexmask.long.byte 0x4 0.--3. 1. "AFORCETRICONT,Forces tristate control per-lane of the ACX4 instance controlled by this register." group.long 0x1C10C++0x3 line.long 0x0 "DDRPHYC_ANIB7_ATXIMPEDANCE,DDRPHYC address T7 impedance control register" hexmask.long.byte 0x0 5.--9. 1. "ADRVSTRENN,5-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x0 0.--4. 1. "ADRVSTRENP,5-bit bus used to select the target pull-up output impedance" rgroup.long 0x1C14C++0x3 line.long 0x0 "DDRPHYC_ANIB7_ATESTPRBSERR,DDRPHYC ATestPrbsErr register" hexmask.long.byte 0x0 0.--3. 1. "ATESTPRBSERR,Overall error indicator for each PRBS bump checker" group.long 0x1C154++0x3 line.long 0x0 "DDRPHYC_ANIB7_ATXSLEWRATE,DDRPHYC address T7 slew rate and predriver control register" bitfld.long 0x0 8.--10. "ATXPREDRVMODE,Controls predrivers to adjust timing of turn-on/-off of pull-up/-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "ATXPREN,4-bit binary trim for the driver pull-down slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "ATXPREP,4-bit binary trim for the driver pull-up slew rate" rgroup.long 0x1C158++0x3 line.long 0x0 "DDRPHYC_ANIB7_ATESTPRBSERRCNT,DDRPHYC ATestPrbsErrCnt register" hexmask.long.word 0x0 0.--15. 1. "ATESTPRBSERRCNT,Overall error indicator for each PRBS bump checker" group.long 0x1C200++0x3 line.long 0x0 "DDRPHYC_ANIB7_ATXDLY,DDRPHYC ATxDly register" hexmask.long.byte 0x0 0.--6. 1. "ATXDLY,Trained for LPDDR4 to generate timed address and command signals" group.long 0x40000++0x3 line.long 0x0 "DDRPHYC_DBYTE0_DBYTEMISCMODE,DDRPHYC DBYTE module disable register" bitfld.long 0x0 2. "DBYTEDISABLE,DBYTE disable" "B_0x0,B_0x1" group.long 0x40068++0x3 line.long 0x0 "DDRPHYC_DBYTE0_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x40080++0x3 line.long 0x0 "DDRPHYC_DBYTE0_DFIMRL,DDRPHYC DFIMRL register" hexmask.long.byte 0x0 0.--4. 1. "DFIMRL,DFI maximum read latency (MRL)" group.long 0x40100++0x7 line.long 0x0 "DDRPHYC_DBYTE0_VREFDAC0_R0,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" line.long 0x4 "DDRPHYC_DBYTE0_TXIMPEDANCECTRL0_B0,DDRPHYC data T0 impedance controls register" hexmask.long.byte 0x4 6.--11. 1. "DRVSTRENDQN,6-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x4 0.--5. 1. "DRVSTRENDQP,6-bit bus used to select the target pull-down output impedance" group.long 0x4010C++0x3 line.long 0x0 "DDRPHYC_DBYTE0_DQDQSRCVCNTRL_B0,DDRPHYC DQ/DQS receiver control register" hexmask.long.byte 0x0 7.--11. 1. "GAINCURRADJ,Adjusts gain current of RX amplifier stage." bitfld.long 0x0 4.--6. "MAJORMODEDBYTE,Selection of the major mode of operation for the receiver" "B_0x0,?,B_0x2,B_0x3,?,?,?,?" newline bitfld.long 0x0 2.--3. "DFECTRL,Note: These settings are determined by PHY training firmware and must not be overridden." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "EXTVREFRANGE,Extends the range available in the local per-bit VREF generator." "0,1" newline bitfld.long 0x0 0. "SELANALOGVREF,Setting this bit forces the local per-bit Vless thansub>REFless than/sub> generator to pass the global VREFA" "0,1" group.long 0x40128++0x3 line.long 0x0 "DDRPHYC_DBYTE0_DQDQSRCVCNTRL1,DDRPHYC DQ/DQS receiver control register" bitfld.long 0x0 11. "ENLPREQPDR,not used" "0,1" bitfld.long 0x0 10. "RXPADSTANDBYEN,Enables rxdq/rxdqs Standby power savings per pad-group." "0,1" newline bitfld.long 0x0 9. "POWERDOWNRCVRDQS,Active high signal which powers down the receiver" "0,1" hexmask.long.word 0x0 0.--8. 1. "POWERDOWNRCVR,Active high signal which powers down the receiver" group.long 0x40130++0x7 line.long 0x0 "DDRPHYC_DBYTE0_DQDQSRCVCNTRL2,DDRPHYC DQ/DQS receiver control register" bitfld.long 0x0 0. "ENRXAGRESSIVEPDR,None" "0,1" line.long 0x4 "DDRPHYC_DBYTE0_TXODTDRVSTREN_B0,DDRPHYC TX ODT driver strength control register" hexmask.long.byte 0x4 6.--11. 1. "ODTSTRENN,ODT pull-down impedance selection" hexmask.long.byte 0x4 0.--5. 1. "ODTSTRENP,ODT pull-up impedance selection" rgroup.long 0x40158++0xB line.long 0x0 "DDRPHYC_DBYTE0_RXFIFOCHECKSTATUS,DDRPHYC status of RX FIFO consistency checks register" bitfld.long 0x0 1. "RXFIFOLOCUERR,If this bit is set the read pointer (DFI side) on the read FIFO associated with data bits [7:4]" "0,1" bitfld.long 0x0 0. "RXFIFOLOCERR,If this bit is set the read pointer (DFI side) on the read FIFO associated with data bits [3:0]" "0,1" line.long 0x4 "DDRPHYC_DBYTE0_RXFIFOCHECKERRVALUES,DDRPHYC captured values associated with an RxFIFO consistency error register" hexmask.long.byte 0x4 12.--15. 1. "RXFIFOWRLOCUERRVALUE,First error value captured for the write pointer (DQS side) on the read FIFO associated with data bits [7:4]" hexmask.long.byte 0x4 8.--11. 1. "RXFIFORDLOCUERRVALUE,First error value captured for the read pointer (DFI side) on the read FIFO associated with data bits [7:4]" newline hexmask.long.byte 0x4 4.--7. 1. "RXFIFOWRLOCERRVALUE,First error value captured for the write pointer (DQS side) on the read FIFO associated with data bits [3:0]" hexmask.long.byte 0x4 0.--3. 1. "RXFIFORDLOCERRVALUE,First error value captured for the read pointer (DFI side) on the read FIFO associated with data bits [3:0]" line.long 0x8 "DDRPHYC_DBYTE0_RXFIFOINFO,DDRPHYC data receive FIFO pointer values register" hexmask.long.byte 0x8 12.--15. 1. "RXFIFOWRLOCU,Mission mode write pointer of the upper-nibble Rx FIFO" hexmask.long.byte 0x8 8.--11. 1. "RXFIFORDLOCU,Mission mode read pointer of the upper-nibble Rx FIFO" newline hexmask.long.byte 0x8 4.--7. 1. "RXFIFOWRLOC,Mission mode write pointer of the lower-nibble Rx FIFO" hexmask.long.byte 0x8 0.--3. 1. "RXFIFORDLOC,Mission mode read pointer of the lower-nibble Rx FIFO" group.long 0x40164++0x3 line.long 0x0 "DDRPHYC_DBYTE0_RXFIFOVISIBILITY,DDRPHYC R0 FIFO visibility register" bitfld.long 0x0 4. "RXFIFORDEN,Pulse [set 0-->1-->0] this bit to capture the FIFO contents." "0,1" bitfld.long 0x0 3. "RXFIFORDPTROVR,This bit is programmable as follows:" "B_0x0,B_0x1" newline bitfld.long 0x0 0.--2. "RXFIFORDPTR,If RXFIFORDPTROVR is set this bit field selects the Rx FIFO entry." "0,1,2,3,4,5,6,7" rgroup.long 0x40168++0xB line.long 0x0 "DDRPHYC_DBYTE0_RXFIFOCONTENTSDQ3210,DDRPHYC R0 FIFO content DQ321x register" hexmask.long.word 0x0 0.--15. 1. "RXFIFOCONTENTSDQ3210,Window into the contents of the Rx FIFO as controlled" line.long 0x4 "DDRPHYC_DBYTE0_RXFIFOCONTENTSDQ7654,DDRPHYC R0 FIFO content DQ7654 register" hexmask.long.word 0x4 0.--15. 1. "RXFIFOCONTENTSDQ7654,Window into the contents of the Rx FIFO as controlled" line.long 0x8 "DDRPHYC_DBYTE0_RXFIFOCONTENTSDBI,DDRPHYC R0 FIFO content DBI register" hexmask.long.byte 0x8 0.--3. 1. "RXFIFOCONTENTSDBI,Window into the contents of the Rx FIFO as controlled" group.long 0x4017C++0x3 line.long 0x0 "DDRPHYC_DBYTE0_TXSLEWRATE_B0,DDRPHYC T0 slew rate controls register" bitfld.long 0x0 8.--10. "TXPREDRVMODE,Controls predrivers to adjust timing of turn-on and turn-off of pull-up and pull-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "TXPREN,4-bit binary trim for the driver pull -own slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "TXPREP,4-bit binary trim for the driver pull-up slew rate" group.long 0x401A0++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXPBDLYTG0_R0,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXPBDLYTG1_R0,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x40200++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXENDLYTG0_U0,DDRPHYC RxEnDlyTgx_u0 register" hexmask.long.word 0x0 0.--10. 1. "RXENDLYTG0_U0,Trained receive enable delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXENDLYTG1_U0,DDRPHYC RxEnDlyTg1_ux register" hexmask.long.word 0x4 0.--10. 1. "RXENDLYTG1_U0,Trained receive enable delay (timing group 1)" group.long 0x40230++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXCLKDLYTG0_U0,DDRPHYC RxClkDlyTgx_u0 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKDLYTG0_U0,Trained read DQS to RxClk delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXCLKDLYTG1_U0,DDRPHYC RxClkDlyTg1_ux register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKDLYTG1_U0,Trained read DQS to RxClk delay (timing group 1)" group.long 0x40240++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXCLKCDLYTG0_U0,DDRPHYC RxClkcDlyTgx_u0 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKCDLYTG0_U0,Trained read DQS_c to RxClkc delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXCLKCDLYTG1_U0,DDRPHYC RxClkcDlyTg1_ux register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKCDLYTG1_U0,Trained read DQS_c to RxClkc delay (timing group 1)" group.long 0x40280++0x1F line.long 0x0 "DDRPHYC_DBYTE0_DQ0LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x0 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x4 "DDRPHYC_DBYTE0_DQ1LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x4 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x8 "DDRPHYC_DBYTE0_DQ2LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x8 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0xC "DDRPHYC_DBYTE0_DQ3LNSEL,DDRPHYC DqLnSel register" bitfld.long 0xC 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x10 "DDRPHYC_DBYTE0_DQ4LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x10 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x14 "DDRPHYC_DBYTE0_DQ5LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x14 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x18 "DDRPHYC_DBYTE0_DQ6LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x18 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x1C "DDRPHYC_DBYTE0_DQ7LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x1C 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" group.long 0x40300++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQDLYTG0_R0,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQDLYTG1_R0,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x40340++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQSDLYTG0_U0,DDRPHYC TxDqsDlyTgx_u0 register" hexmask.long.word 0x0 0.--9. 1. "TXDQSDLYTG0_U0,Write DQS delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQSDLYTG1_U0,DDRPHYC TxDqsDlyTg1_ux register" hexmask.long.word 0x4 0.--9. 1. "TXDQSDLYTG1_U0,Write DQS delay (timing group 1)" rgroup.long 0x40390++0x3 line.long 0x0 "DDRPHYC_DBYTE0_DXLCDLSTATUS,DDRPHYC debug status of the DBYTE LCDL register" bitfld.long 0x0 13. "DXLCDLLIVELOCK,Present value of whether the LCDL is locked" "0,1" bitfld.long 0x0 12. "DXLCDLSTICKYUNLOCK,Latched value of whether the LCDL ever lost lock after the assertion of LCDLTSTENABLE" "0,1" newline bitfld.long 0x0 11. "DXLCDLSTICKYLOCK,Latched value of whether the LCDL ever achieved lock after the assertion of LCDLTSTENABLE" "0,1" bitfld.long 0x0 10. "DXLCDLPHDSNAPVAL,Value of the LCDL phase-detector output latched by pulse" "0,1" newline hexmask.long.word 0x0 0.--9. 1. "DXLCDLFINESNAPVAL,Value of the LCDL 1UI estimate code latched by pulse on LcdlFineSnap while LCDLTSTENABLE = 1" group.long 0x40500++0x7 line.long 0x0 "DDRPHYC_DBYTE0_VREFDAC0_R1,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" line.long 0x4 "DDRPHYC_DBYTE0_TXIMPEDANCECTRL0_B1,DDRPHYC data T0 impedance controls register" hexmask.long.byte 0x4 6.--11. 1. "DRVSTRENDQN,6-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x4 0.--5. 1. "DRVSTRENDQP,6-bit bus used to select the target pull-down output impedance" group.long 0x4050C++0x3 line.long 0x0 "DDRPHYC_DBYTE0_DQDQSRCVCNTRL_B1,DDRPHYC DQ/DQS receiver control register" hexmask.long.byte 0x0 7.--11. 1. "GAINCURRADJ,Adjusts gain current of RX amplifier stage." bitfld.long 0x0 4.--6. "MAJORMODEDBYTE,Selection of the major mode of operation for the receiver" "B_0x0,?,B_0x2,B_0x3,?,?,?,?" newline bitfld.long 0x0 2.--3. "DFECTRL,Note: These settings are determined by PHY training firmware and must not be overridden." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "EXTVREFRANGE,Extends the range available in the local per-bit VREF generator." "0,1" newline bitfld.long 0x0 0. "SELANALOGVREF,Setting this bit forces the local per-bit Vless thansub>REFless than/sub> generator to pass the global VREFA" "0,1" group.long 0x40534++0x3 line.long 0x0 "DDRPHYC_DBYTE0_TXODTDRVSTREN_B1,DDRPHYC TX ODT driver strength control register" hexmask.long.byte 0x0 6.--11. 1. "ODTSTRENN,ODT pull-down impedance selection" hexmask.long.byte 0x0 0.--5. 1. "ODTSTRENP,ODT pull-up impedance selection" group.long 0x4057C++0x3 line.long 0x0 "DDRPHYC_DBYTE0_TXSLEWRATE_B1,DDRPHYC T0 slew rate controls register" bitfld.long 0x0 8.--10. "TXPREDRVMODE,Controls predrivers to adjust timing of turn-on and turn-off of pull-up and pull-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "TXPREN,4-bit binary trim for the driver pull -own slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "TXPREP,4-bit binary trim for the driver pull-up slew rate" group.long 0x405A0++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXPBDLYTG0_R1,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXPBDLYTG1_R1,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x40600++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXENDLYTG0_U1,DDRPHYC RxEnDlyTgx_u1 register" hexmask.long.word 0x0 0.--10. 1. "RXENDLYTG0_U1,Trained receive enable delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXENDLYTG1_U1,DDRPHYC RxEnDlyTg1_u1 register" hexmask.long.word 0x4 0.--10. 1. "RXENDLYTG1_U1,Trained receive enable delay (timing group 1)" group.long 0x40630++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXCLKDLYTG0_U1,DDRPHYC RxClkDlyTgx_u1 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKDLYTG0_U1,Trained read DQS to RxClk delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXCLKDLYTG1_U1,DDRPHYC RxClkDlyTg1_u1 register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKDLYTG1_U1,Trained read DQS to RxClk delay (timing group 1)" group.long 0x40640++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXCLKCDLYTG0_U1,DDRPHYC RxClkcDlyTgx_u1 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKCDLYTG0_U1,Trained read DQS_c to RxClkc delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXCLKCDLYTG1_U1,DDRPHYC RxClkcDlyTg1_u1 register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKCDLYTG1_U1,Trained read DQS_c to RxClkc delay (timing group 1)" group.long 0x40700++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQDLYTG0_R1,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQDLYTG1_R1,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x40740++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQSDLYTG0_U1,DDRPHYC TxDqsDlyTgx_u1 register" hexmask.long.word 0x0 0.--9. 1. "TXDQSDLYTG0_U1,Write DQS delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQSDLYTG1_U1,DDRPHYC TxDqsDlyTg1_u1 register" hexmask.long.word 0x4 0.--9. 1. "TXDQSDLYTG1_U1,Write DQS delay (timing group 1)" group.long 0x40900++0x3 line.long 0x0 "DDRPHYC_DBYTE0_VREFDAC0_R2,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x409A0++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXPBDLYTG0_R2,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXPBDLYTG1_R2,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x40B00++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQDLYTG0_R2,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQDLYTG1_R2,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x40D00++0x3 line.long 0x0 "DDRPHYC_DBYTE0_VREFDAC0_R3,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x40DA0++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXPBDLYTG0_R3,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXPBDLYTG1_R3,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x40F00++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQDLYTG0_R3,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQDLYTG1_R3,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x41100++0x3 line.long 0x0 "DDRPHYC_DBYTE0_VREFDAC0_R4,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x411A0++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXPBDLYTG0_R4,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXPBDLYTG1_R4,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x41300++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQDLYTG0_R4,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQDLYTG1_R4,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x41500++0x3 line.long 0x0 "DDRPHYC_DBYTE0_VREFDAC0_R5,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x415A0++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXPBDLYTG0_R5,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXPBDLYTG1_R5,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x41700++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQDLYTG0_R5,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQDLYTG1_R5,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x41900++0x3 line.long 0x0 "DDRPHYC_DBYTE0_VREFDAC0_R6,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x419A0++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXPBDLYTG0_R6,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXPBDLYTG1_R6,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x41B00++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQDLYTG0_R6,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQDLYTG1_R6,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x41D00++0x3 line.long 0x0 "DDRPHYC_DBYTE0_VREFDAC0_R7,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x41DA0++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXPBDLYTG0_R7,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXPBDLYTG1_R7,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x41F00++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQDLYTG0_R7,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQDLYTG1_R7,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x42100++0x3 line.long 0x0 "DDRPHYC_DBYTE0_VREFDAC0_R8,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x421A0++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXPBDLYTG0_R8,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXPBDLYTG1_R8,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x42300++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQDLYTG0_R8,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQDLYTG1_R8,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x44000++0x3 line.long 0x0 "DDRPHYC_DBYTE1_DBYTEMISCMODE,DDRPHYC DBYTE module disable register" bitfld.long 0x0 2. "DBYTEDISABLE,DBYTE disable" "B_0x0,B_0x1" group.long 0x44068++0x3 line.long 0x0 "DDRPHYC_DBYTE1_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x44080++0x3 line.long 0x0 "DDRPHYC_DBYTE1_DFIMRL,DDRPHYC DFIMRL register" hexmask.long.byte 0x0 0.--4. 1. "DFIMRL,DFI maximum read latency (MRL)" group.long 0x44100++0x7 line.long 0x0 "DDRPHYC_DBYTE1_VREFDAC0_R0,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" line.long 0x4 "DDRPHYC_DBYTE1_TXIMPEDANCECTRL0_B0,DDRPHYC data T1 impedance controls register" hexmask.long.byte 0x4 6.--11. 1. "DRVSTRENDQN,6-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x4 0.--5. 1. "DRVSTRENDQP,6-bit bus used to select the target pull-down output impedance" group.long 0x4410C++0x3 line.long 0x0 "DDRPHYC_DBYTE1_DQDQSRCVCNTRL_B0,DDRPHYC DQ/DQS receiver control register" hexmask.long.byte 0x0 7.--11. 1. "GAINCURRADJ,Adjusts gain current of RX amplifier stage." bitfld.long 0x0 4.--6. "MAJORMODEDBYTE,Selection of the major mode of operation for the receiver" "B_0x0,?,B_0x2,B_0x3,?,?,?,?" newline bitfld.long 0x0 2.--3. "DFECTRL,Note: These settings are determined by PHY training firmware and must not be overridden." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "EXTVREFRANGE,Extends the range available in the local per-bit VREF generator." "0,1" newline bitfld.long 0x0 0. "SELANALOGVREF,Setting this bit forces the local per-bit Vless thansub>REFless than/sub> generator to pass the global VREFA" "0,1" group.long 0x44128++0x3 line.long 0x0 "DDRPHYC_DBYTE1_DQDQSRCVCNTRL1,DDRPHYC DQ/DQS receiver control register" bitfld.long 0x0 11. "ENLPREQPDR,not used" "0,1" bitfld.long 0x0 10. "RXPADSTANDBYEN,Enables rxdq/rxdqs Standby power savings per pad-group." "0,1" newline bitfld.long 0x0 9. "POWERDOWNRCVRDQS,Active high signal which powers down the receiver" "0,1" hexmask.long.word 0x0 0.--8. 1. "POWERDOWNRCVR,Active high signal which powers down the receiver" group.long 0x44130++0x7 line.long 0x0 "DDRPHYC_DBYTE1_DQDQSRCVCNTRL2,DDRPHYC DQ/DQS receiver control register" bitfld.long 0x0 0. "ENRXAGRESSIVEPDR,None" "0,1" line.long 0x4 "DDRPHYC_DBYTE1_TXODTDRVSTREN_B0,DDRPHYC TX ODT driver strength control register" hexmask.long.byte 0x4 6.--11. 1. "ODTSTRENN,ODT pull-down impedance selection" hexmask.long.byte 0x4 0.--5. 1. "ODTSTRENP,ODT pull-up impedance selection" rgroup.long 0x44158++0xB line.long 0x0 "DDRPHYC_DBYTE1_RXFIFOCHECKSTATUS,DDRPHYC status of RX FIFO consistency checks register" bitfld.long 0x0 1. "RXFIFOLOCUERR,If this bit is set the read pointer (DFI side) on the read FIFO associated with data bits [7:4]" "0,1" bitfld.long 0x0 0. "RXFIFOLOCERR,If this bit is set the read pointer (DFI side) on the read FIFO associated with data bits [3:0]" "0,1" line.long 0x4 "DDRPHYC_DBYTE1_RXFIFOCHECKERRVALUES,DDRPHYC captured values associated with an RxFIFO consistency error register" hexmask.long.byte 0x4 12.--15. 1. "RXFIFOWRLOCUERRVALUE,First error value captured for the write pointer (DQS side) on the read FIFO associated with data bits [7:4]" hexmask.long.byte 0x4 8.--11. 1. "RXFIFORDLOCUERRVALUE,First error value captured for the read pointer (DFI side) on the read FIFO associated with data bits [7:4]" newline hexmask.long.byte 0x4 4.--7. 1. "RXFIFOWRLOCERRVALUE,First error value captured for the write pointer (DQS side) on the read FIFO associated with data bits [3:0]" hexmask.long.byte 0x4 0.--3. 1. "RXFIFORDLOCERRVALUE,First error value captured for the read pointer (DFI side) on the read FIFO associated with data bits [3:0]" line.long 0x8 "DDRPHYC_DBYTE1_RXFIFOINFO,DDRPHYC data receive FIFO pointer values register" hexmask.long.byte 0x8 12.--15. 1. "RXFIFOWRLOCU,Mission mode write pointer of the upper-nibble Rx FIFO" hexmask.long.byte 0x8 8.--11. 1. "RXFIFORDLOCU,Mission mode read pointer of the upper-nibble Rx FIFO" newline hexmask.long.byte 0x8 4.--7. 1. "RXFIFOWRLOC,Mission mode write pointer of the lower-nibble Rx FIFO" hexmask.long.byte 0x8 0.--3. 1. "RXFIFORDLOC,Mission mode read pointer of the lower-nibble Rx FIFO" group.long 0x44164++0x3 line.long 0x0 "DDRPHYC_DBYTE1_RXFIFOVISIBILITY,DDRPHYC R1 FIFO visibility register" bitfld.long 0x0 4. "RXFIFORDEN,Pulse [set 0-->1-->0] this bit to capture the FIFO contents." "0,1" bitfld.long 0x0 3. "RXFIFORDPTROVR,This bit is programmable as follows:" "B_0x0,B_0x1" newline bitfld.long 0x0 0.--2. "RXFIFORDPTR,If RXFIFORDPTROVR is set this bit field selects the Rx FIFO entry." "0,1,2,3,4,5,6,7" rgroup.long 0x44168++0xB line.long 0x0 "DDRPHYC_DBYTE1_RXFIFOCONTENTSDQ3210,DDRPHYC R1 FIFO content DQ321x register" hexmask.long.word 0x0 0.--15. 1. "RXFIFOCONTENTSDQ3210,Window into the contents of the Rx FIFO as controlled" line.long 0x4 "DDRPHYC_DBYTE1_RXFIFOCONTENTSDQ7654,DDRPHYC R1 FIFO content DQ7654 register" hexmask.long.word 0x4 0.--15. 1. "RXFIFOCONTENTSDQ7654,Window into the contents of the Rx FIFO as controlled" line.long 0x8 "DDRPHYC_DBYTE1_RXFIFOCONTENTSDBI,DDRPHYC R1 FIFO content DBI register" hexmask.long.byte 0x8 0.--3. 1. "RXFIFOCONTENTSDBI,Window into the contents of the Rx FIFO as controlled" group.long 0x4417C++0x3 line.long 0x0 "DDRPHYC_DBYTE1_TXSLEWRATE_B0,DDRPHYC T1 slew rate controls register" bitfld.long 0x0 8.--10. "TXPREDRVMODE,Controls predrivers to adjust timing of turn-on and turn-off of pull-up and pull-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "TXPREN,4-bit binary trim for the driver pull -own slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "TXPREP,4-bit binary trim for the driver pull-up slew rate" group.long 0x441A0++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXPBDLYTG0_R0,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXPBDLYTG1_R0,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x44200++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXENDLYTG0_U0,DDRPHYC RxEnDlyTgx_u0 register" hexmask.long.word 0x0 0.--10. 1. "RXENDLYTG0_U0,Trained receive enable delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXENDLYTG1_U0,DDRPHYC RxEnDlyTg1_ux register" hexmask.long.word 0x4 0.--10. 1. "RXENDLYTG1_U0,Trained receive enable delay (timing group 1)" group.long 0x44230++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXCLKDLYTG0_U0,DDRPHYC RxClkDlyTgx_u0 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKDLYTG0_U0,Trained read DQS to RxClk delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXCLKDLYTG1_U0,DDRPHYC RxClkDlyTg1_ux register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKDLYTG1_U0,Trained read DQS to RxClk delay (timing group 1)" group.long 0x44240++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXCLKCDLYTG0_U0,DDRPHYC RxClkcDlyTgx_u0 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKCDLYTG0_U0,Trained read DQS_c to RxClkc delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXCLKCDLYTG1_U0,DDRPHYC RxClkcDlyTg1_ux register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKCDLYTG1_U0,Trained read DQS_c to RxClkc delay (timing group 1)" group.long 0x44280++0x1F line.long 0x0 "DDRPHYC_DBYTE1_DQ0LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x0 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x4 "DDRPHYC_DBYTE1_DQ1LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x4 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x8 "DDRPHYC_DBYTE1_DQ2LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x8 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0xC "DDRPHYC_DBYTE1_DQ3LNSEL,DDRPHYC DqLnSel register" bitfld.long 0xC 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x10 "DDRPHYC_DBYTE1_DQ4LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x10 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x14 "DDRPHYC_DBYTE1_DQ5LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x14 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x18 "DDRPHYC_DBYTE1_DQ6LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x18 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x1C "DDRPHYC_DBYTE1_DQ7LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x1C 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" group.long 0x44300++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQDLYTG0_R0,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQDLYTG1_R0,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x44340++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQSDLYTG0_U0,DDRPHYC TxDqsDlyTgx_u0 register" hexmask.long.word 0x0 0.--9. 1. "TXDQSDLYTG0_U0,Write DQS delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQSDLYTG1_U0,DDRPHYC TxDqsDlyTg1_ux register" hexmask.long.word 0x4 0.--9. 1. "TXDQSDLYTG1_U0,Write DQS delay (timing group 1)" rgroup.long 0x44390++0x3 line.long 0x0 "DDRPHYC_DBYTE1_DXLCDLSTATUS,DDRPHYC debug status of the DBYTE LCDL register" bitfld.long 0x0 13. "DXLCDLLIVELOCK,Present value of whether the LCDL is locked" "0,1" bitfld.long 0x0 12. "DXLCDLSTICKYUNLOCK,Latched value of whether the LCDL ever lost lock after the assertion of LCDLTSTENABLE" "0,1" newline bitfld.long 0x0 11. "DXLCDLSTICKYLOCK,Latched value of whether the LCDL ever achieved lock after the assertion of LCDLTSTENABLE" "0,1" bitfld.long 0x0 10. "DXLCDLPHDSNAPVAL,Value of the LCDL phase-detector output latched by pulse" "0,1" newline hexmask.long.word 0x0 0.--9. 1. "DXLCDLFINESNAPVAL,Value of the LCDL 1UI estimate code latched by pulse on LcdlFineSnap while LCDLTSTENABLE = 1" group.long 0x44500++0x7 line.long 0x0 "DDRPHYC_DBYTE1_VREFDAC0_R1,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" line.long 0x4 "DDRPHYC_DBYTE1_TXIMPEDANCECTRL0_B1,DDRPHYC data T1 impedance controls register" hexmask.long.byte 0x4 6.--11. 1. "DRVSTRENDQN,6-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x4 0.--5. 1. "DRVSTRENDQP,6-bit bus used to select the target pull-down output impedance" group.long 0x4450C++0x3 line.long 0x0 "DDRPHYC_DBYTE1_DQDQSRCVCNTRL_B1,DDRPHYC DQ/DQS receiver control register" hexmask.long.byte 0x0 7.--11. 1. "GAINCURRADJ,Adjusts gain current of RX amplifier stage." bitfld.long 0x0 4.--6. "MAJORMODEDBYTE,Selection of the major mode of operation for the receiver" "B_0x0,?,B_0x2,B_0x3,?,?,?,?" newline bitfld.long 0x0 2.--3. "DFECTRL,Note: These settings are determined by PHY training firmware and must not be overridden." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "EXTVREFRANGE,Extends the range available in the local per-bit VREF generator." "0,1" newline bitfld.long 0x0 0. "SELANALOGVREF,Setting this bit forces the local per-bit Vless thansub>REFless than/sub> generator to pass the global VREFA" "0,1" group.long 0x44534++0x3 line.long 0x0 "DDRPHYC_DBYTE1_TXODTDRVSTREN_B1,DDRPHYC TX ODT driver strength control register" hexmask.long.byte 0x0 6.--11. 1. "ODTSTRENN,ODT pull-down impedance selection" hexmask.long.byte 0x0 0.--5. 1. "ODTSTRENP,ODT pull-up impedance selection" group.long 0x4457C++0x3 line.long 0x0 "DDRPHYC_DBYTE1_TXSLEWRATE_B1,DDRPHYC T1 slew rate controls register" bitfld.long 0x0 8.--10. "TXPREDRVMODE,Controls predrivers to adjust timing of turn-on and turn-off of pull-up and pull-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "TXPREN,4-bit binary trim for the driver pull -own slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "TXPREP,4-bit binary trim for the driver pull-up slew rate" group.long 0x445A0++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXPBDLYTG0_R1,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXPBDLYTG1_R1,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x44600++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXENDLYTG0_U1,DDRPHYC RxEnDlyTgx_u1 register" hexmask.long.word 0x0 0.--10. 1. "RXENDLYTG0_U1,Trained receive enable delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXENDLYTG1_U1,DDRPHYC RxEnDlyTg1_u1 register" hexmask.long.word 0x4 0.--10. 1. "RXENDLYTG1_U1,Trained receive enable delay (timing group 1)" group.long 0x44630++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXCLKDLYTG0_U1,DDRPHYC RxClkDlyTgx_u1 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKDLYTG0_U1,Trained read DQS to RxClk delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXCLKDLYTG1_U1,DDRPHYC RxClkDlyTg1_u1 register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKDLYTG1_U1,Trained read DQS to RxClk delay (timing group 1)" group.long 0x44640++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXCLKCDLYTG0_U1,DDRPHYC RxClkcDlyTgx_u1 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKCDLYTG0_U1,Trained read DQS_c to RxClkc delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXCLKCDLYTG1_U1,DDRPHYC RxClkcDlyTg1_u1 register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKCDLYTG1_U1,Trained read DQS_c to RxClkc delay (timing group 1)" group.long 0x44700++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQDLYTG0_R1,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQDLYTG1_R1,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x44740++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQSDLYTG0_U1,DDRPHYC TxDqsDlyTgx_u1 register" hexmask.long.word 0x0 0.--9. 1. "TXDQSDLYTG0_U1,Write DQS delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQSDLYTG1_U1,DDRPHYC TxDqsDlyTg1_u1 register" hexmask.long.word 0x4 0.--9. 1. "TXDQSDLYTG1_U1,Write DQS delay (timing group 1)" group.long 0x44900++0x3 line.long 0x0 "DDRPHYC_DBYTE1_VREFDAC0_R2,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x449A0++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXPBDLYTG0_R2,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXPBDLYTG1_R2,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x44B00++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQDLYTG0_R2,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQDLYTG1_R2,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x44D00++0x3 line.long 0x0 "DDRPHYC_DBYTE1_VREFDAC0_R3,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x44DA0++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXPBDLYTG0_R3,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXPBDLYTG1_R3,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x44F00++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQDLYTG0_R3,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQDLYTG1_R3,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x45100++0x3 line.long 0x0 "DDRPHYC_DBYTE1_VREFDAC0_R4,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x451A0++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXPBDLYTG0_R4,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXPBDLYTG1_R4,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x45300++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQDLYTG0_R4,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQDLYTG1_R4,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x45500++0x3 line.long 0x0 "DDRPHYC_DBYTE1_VREFDAC0_R5,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x455A0++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXPBDLYTG0_R5,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXPBDLYTG1_R5,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x45700++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQDLYTG0_R5,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQDLYTG1_R5,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x45900++0x3 line.long 0x0 "DDRPHYC_DBYTE1_VREFDAC0_R6,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x459A0++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXPBDLYTG0_R6,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXPBDLYTG1_R6,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x45B00++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQDLYTG0_R6,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQDLYTG1_R6,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x45D00++0x3 line.long 0x0 "DDRPHYC_DBYTE1_VREFDAC0_R7,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x45DA0++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXPBDLYTG0_R7,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXPBDLYTG1_R7,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x45F00++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQDLYTG0_R7,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQDLYTG1_R7,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x46100++0x3 line.long 0x0 "DDRPHYC_DBYTE1_VREFDAC0_R8,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x461A0++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXPBDLYTG0_R8,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXPBDLYTG1_R8,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x46300++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQDLYTG0_R8,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQDLYTG1_R8,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x48000++0x3 line.long 0x0 "DDRPHYC_DBYTE2_DBYTEMISCMODE,DDRPHYC DBYTE module disable register" bitfld.long 0x0 2. "DBYTEDISABLE,DBYTE disable" "B_0x0,B_0x1" group.long 0x48068++0x3 line.long 0x0 "DDRPHYC_DBYTE2_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x48080++0x3 line.long 0x0 "DDRPHYC_DBYTE2_DFIMRL,DDRPHYC DFIMRL register" hexmask.long.byte 0x0 0.--4. 1. "DFIMRL,DFI maximum read latency (MRL)" group.long 0x48100++0x7 line.long 0x0 "DDRPHYC_DBYTE2_VREFDAC0_R0,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" line.long 0x4 "DDRPHYC_DBYTE2_TXIMPEDANCECTRL0_B0,DDRPHYC data T2 impedance controls register" hexmask.long.byte 0x4 6.--11. 1. "DRVSTRENDQN,6-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x4 0.--5. 1. "DRVSTRENDQP,6-bit bus used to select the target pull-down output impedance" group.long 0x4810C++0x3 line.long 0x0 "DDRPHYC_DBYTE2_DQDQSRCVCNTRL_B0,DDRPHYC DQ/DQS receiver control register" hexmask.long.byte 0x0 7.--11. 1. "GAINCURRADJ,Adjusts gain current of RX amplifier stage." bitfld.long 0x0 4.--6. "MAJORMODEDBYTE,Selection of the major mode of operation for the receiver" "B_0x0,?,B_0x2,B_0x3,?,?,?,?" newline bitfld.long 0x0 2.--3. "DFECTRL,Note: These settings are determined by PHY training firmware and must not be overridden." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "EXTVREFRANGE,Extends the range available in the local per-bit VREF generator." "0,1" newline bitfld.long 0x0 0. "SELANALOGVREF,Setting this bit forces the local per-bit Vless thansub>REFless than/sub> generator to pass the global VREFA" "0,1" group.long 0x48128++0x3 line.long 0x0 "DDRPHYC_DBYTE2_DQDQSRCVCNTRL1,DDRPHYC DQ/DQS receiver control register" bitfld.long 0x0 11. "ENLPREQPDR,not used" "0,1" bitfld.long 0x0 10. "RXPADSTANDBYEN,Enables rxdq/rxdqs Standby power savings per pad-group." "0,1" newline bitfld.long 0x0 9. "POWERDOWNRCVRDQS,Active high signal which powers down the receiver" "0,1" hexmask.long.word 0x0 0.--8. 1. "POWERDOWNRCVR,Active high signal which powers down the receiver" group.long 0x48130++0x7 line.long 0x0 "DDRPHYC_DBYTE2_DQDQSRCVCNTRL2,DDRPHYC DQ/DQS receiver control register" bitfld.long 0x0 0. "ENRXAGRESSIVEPDR,None" "0,1" line.long 0x4 "DDRPHYC_DBYTE2_TXODTDRVSTREN_B0,DDRPHYC TX ODT driver strength control register" hexmask.long.byte 0x4 6.--11. 1. "ODTSTRENN,ODT pull-down impedance selection" hexmask.long.byte 0x4 0.--5. 1. "ODTSTRENP,ODT pull-up impedance selection" rgroup.long 0x48158++0xB line.long 0x0 "DDRPHYC_DBYTE2_RXFIFOCHECKSTATUS,DDRPHYC status of RX FIFO consistency checks register" bitfld.long 0x0 1. "RXFIFOLOCUERR,If this bit is set the read pointer (DFI side) on the read FIFO associated with data bits [7:4]" "0,1" bitfld.long 0x0 0. "RXFIFOLOCERR,If this bit is set the read pointer (DFI side) on the read FIFO associated with data bits [3:0]" "0,1" line.long 0x4 "DDRPHYC_DBYTE2_RXFIFOCHECKERRVALUES,DDRPHYC captured values associated with an RxFIFO consistency error register" hexmask.long.byte 0x4 12.--15. 1. "RXFIFOWRLOCUERRVALUE,First error value captured for the write pointer (DQS side) on the read FIFO associated with data bits [7:4]" hexmask.long.byte 0x4 8.--11. 1. "RXFIFORDLOCUERRVALUE,First error value captured for the read pointer (DFI side) on the read FIFO associated with data bits [7:4]" newline hexmask.long.byte 0x4 4.--7. 1. "RXFIFOWRLOCERRVALUE,First error value captured for the write pointer (DQS side) on the read FIFO associated with data bits [3:0]" hexmask.long.byte 0x4 0.--3. 1. "RXFIFORDLOCERRVALUE,First error value captured for the read pointer (DFI side) on the read FIFO associated with data bits [3:0]" line.long 0x8 "DDRPHYC_DBYTE2_RXFIFOINFO,DDRPHYC data receive FIFO pointer values register" hexmask.long.byte 0x8 12.--15. 1. "RXFIFOWRLOCU,Mission mode write pointer of the upper-nibble Rx FIFO" hexmask.long.byte 0x8 8.--11. 1. "RXFIFORDLOCU,Mission mode read pointer of the upper-nibble Rx FIFO" newline hexmask.long.byte 0x8 4.--7. 1. "RXFIFOWRLOC,Mission mode write pointer of the lower-nibble Rx FIFO" hexmask.long.byte 0x8 0.--3. 1. "RXFIFORDLOC,Mission mode read pointer of the lower-nibble Rx FIFO" group.long 0x48164++0x3 line.long 0x0 "DDRPHYC_DBYTE2_RXFIFOVISIBILITY,DDRPHYC R2 FIFO visibility register" bitfld.long 0x0 4. "RXFIFORDEN,Pulse [set 0-->1-->0] this bit to capture the FIFO contents." "0,1" bitfld.long 0x0 3. "RXFIFORDPTROVR,This bit is programmable as follows:" "B_0x0,B_0x1" newline bitfld.long 0x0 0.--2. "RXFIFORDPTR,If RXFIFORDPTROVR is set this bit field selects the Rx FIFO entry." "0,1,2,3,4,5,6,7" rgroup.long 0x48168++0xB line.long 0x0 "DDRPHYC_DBYTE2_RXFIFOCONTENTSDQ3210,DDRPHYC R2 FIFO content DQ321x register" hexmask.long.word 0x0 0.--15. 1. "RXFIFOCONTENTSDQ3210,Window into the contents of the Rx FIFO as controlled" line.long 0x4 "DDRPHYC_DBYTE2_RXFIFOCONTENTSDQ7654,DDRPHYC R2 FIFO content DQ7654 register" hexmask.long.word 0x4 0.--15. 1. "RXFIFOCONTENTSDQ7654,Window into the contents of the Rx FIFO as controlled" line.long 0x8 "DDRPHYC_DBYTE2_RXFIFOCONTENTSDBI,DDRPHYC R2 FIFO content DBI register" hexmask.long.byte 0x8 0.--3. 1. "RXFIFOCONTENTSDBI,Window into the contents of the Rx FIFO as controlled" group.long 0x4817C++0x3 line.long 0x0 "DDRPHYC_DBYTE2_TXSLEWRATE_B0,DDRPHYC T2 slew rate controls register" bitfld.long 0x0 8.--10. "TXPREDRVMODE,Controls predrivers to adjust timing of turn-on and turn-off of pull-up and pull-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "TXPREN,4-bit binary trim for the driver pull -own slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "TXPREP,4-bit binary trim for the driver pull-up slew rate" group.long 0x481A0++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXPBDLYTG0_R0,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXPBDLYTG1_R0,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x48200++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXENDLYTG0_U0,DDRPHYC RxEnDlyTgx_u0 register" hexmask.long.word 0x0 0.--10. 1. "RXENDLYTG0_U0,Trained receive enable delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXENDLYTG1_U0,DDRPHYC RxEnDlyTg1_ux register" hexmask.long.word 0x4 0.--10. 1. "RXENDLYTG1_U0,Trained receive enable delay (timing group 1)" group.long 0x48230++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXCLKDLYTG0_U0,DDRPHYC RxClkDlyTgx_u0 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKDLYTG0_U0,Trained read DQS to RxClk delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXCLKDLYTG1_U0,DDRPHYC RxClkDlyTg1_ux register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKDLYTG1_U0,Trained read DQS to RxClk delay (timing group 1)" group.long 0x48240++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXCLKCDLYTG0_U0,DDRPHYC RxClkcDlyTgx_u0 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKCDLYTG0_U0,Trained read DQS_c to RxClkc delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXCLKCDLYTG1_U0,DDRPHYC RxClkcDlyTg1_ux register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKCDLYTG1_U0,Trained read DQS_c to RxClkc delay (timing group 1)" group.long 0x48280++0x1F line.long 0x0 "DDRPHYC_DBYTE2_DQ0LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x0 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x4 "DDRPHYC_DBYTE2_DQ1LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x4 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x8 "DDRPHYC_DBYTE2_DQ2LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x8 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0xC "DDRPHYC_DBYTE2_DQ3LNSEL,DDRPHYC DqLnSel register" bitfld.long 0xC 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x10 "DDRPHYC_DBYTE2_DQ4LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x10 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x14 "DDRPHYC_DBYTE2_DQ5LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x14 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x18 "DDRPHYC_DBYTE2_DQ6LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x18 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x1C "DDRPHYC_DBYTE2_DQ7LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x1C 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" group.long 0x48300++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQDLYTG0_R0,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQDLYTG1_R0,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x48340++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQSDLYTG0_U0,DDRPHYC TxDqsDlyTgx_u0 register" hexmask.long.word 0x0 0.--9. 1. "TXDQSDLYTG0_U0,Write DQS delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQSDLYTG1_U0,DDRPHYC TxDqsDlyTg1_ux register" hexmask.long.word 0x4 0.--9. 1. "TXDQSDLYTG1_U0,Write DQS delay (timing group 1)" rgroup.long 0x48390++0x3 line.long 0x0 "DDRPHYC_DBYTE2_DXLCDLSTATUS,DDRPHYC debug status of the DBYTE LCDL register" bitfld.long 0x0 13. "DXLCDLLIVELOCK,Present value of whether the LCDL is locked" "0,1" bitfld.long 0x0 12. "DXLCDLSTICKYUNLOCK,Latched value of whether the LCDL ever lost lock after the assertion of LCDLTSTENABLE" "0,1" newline bitfld.long 0x0 11. "DXLCDLSTICKYLOCK,Latched value of whether the LCDL ever achieved lock after the assertion of LCDLTSTENABLE" "0,1" bitfld.long 0x0 10. "DXLCDLPHDSNAPVAL,Value of the LCDL phase-detector output latched by pulse" "0,1" newline hexmask.long.word 0x0 0.--9. 1. "DXLCDLFINESNAPVAL,Value of the LCDL 1UI estimate code latched by pulse on LcdlFineSnap while LCDLTSTENABLE = 1" group.long 0x48500++0x7 line.long 0x0 "DDRPHYC_DBYTE2_VREFDAC0_R1,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" line.long 0x4 "DDRPHYC_DBYTE2_TXIMPEDANCECTRL0_B1,DDRPHYC data T2 impedance controls register" hexmask.long.byte 0x4 6.--11. 1. "DRVSTRENDQN,6-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x4 0.--5. 1. "DRVSTRENDQP,6-bit bus used to select the target pull-down output impedance" group.long 0x4850C++0x3 line.long 0x0 "DDRPHYC_DBYTE2_DQDQSRCVCNTRL_B1,DDRPHYC DQ/DQS receiver control register" hexmask.long.byte 0x0 7.--11. 1. "GAINCURRADJ,Adjusts gain current of RX amplifier stage." bitfld.long 0x0 4.--6. "MAJORMODEDBYTE,Selection of the major mode of operation for the receiver" "B_0x0,?,B_0x2,B_0x3,?,?,?,?" newline bitfld.long 0x0 2.--3. "DFECTRL,Note: These settings are determined by PHY training firmware and must not be overridden." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "EXTVREFRANGE,Extends the range available in the local per-bit VREF generator." "0,1" newline bitfld.long 0x0 0. "SELANALOGVREF,Setting this bit forces the local per-bit Vless thansub>REFless than/sub> generator to pass the global VREFA" "0,1" group.long 0x48534++0x3 line.long 0x0 "DDRPHYC_DBYTE2_TXODTDRVSTREN_B1,DDRPHYC TX ODT driver strength control register" hexmask.long.byte 0x0 6.--11. 1. "ODTSTRENN,ODT pull-down impedance selection" hexmask.long.byte 0x0 0.--5. 1. "ODTSTRENP,ODT pull-up impedance selection" group.long 0x4857C++0x3 line.long 0x0 "DDRPHYC_DBYTE2_TXSLEWRATE_B1,DDRPHYC T2 slew rate controls register" bitfld.long 0x0 8.--10. "TXPREDRVMODE,Controls predrivers to adjust timing of turn-on and turn-off of pull-up and pull-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "TXPREN,4-bit binary trim for the driver pull -own slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "TXPREP,4-bit binary trim for the driver pull-up slew rate" group.long 0x485A0++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXPBDLYTG0_R1,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXPBDLYTG1_R1,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x48600++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXENDLYTG0_U1,DDRPHYC RxEnDlyTgx_u1 register" hexmask.long.word 0x0 0.--10. 1. "RXENDLYTG0_U1,Trained receive enable delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXENDLYTG1_U1,DDRPHYC RxEnDlyTg1_u1 register" hexmask.long.word 0x4 0.--10. 1. "RXENDLYTG1_U1,Trained receive enable delay (timing group 1)" group.long 0x48630++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXCLKDLYTG0_U1,DDRPHYC RxClkDlyTgx_u1 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKDLYTG0_U1,Trained read DQS to RxClk delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXCLKDLYTG1_U1,DDRPHYC RxClkDlyTg1_u1 register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKDLYTG1_U1,Trained read DQS to RxClk delay (timing group 1)" group.long 0x48640++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXCLKCDLYTG0_U1,DDRPHYC RxClkcDlyTgx_u1 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKCDLYTG0_U1,Trained read DQS_c to RxClkc delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXCLKCDLYTG1_U1,DDRPHYC RxClkcDlyTg1_u1 register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKCDLYTG1_U1,Trained read DQS_c to RxClkc delay (timing group 1)" group.long 0x48700++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQDLYTG0_R1,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQDLYTG1_R1,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x48740++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQSDLYTG0_U1,DDRPHYC TxDqsDlyTgx_u1 register" hexmask.long.word 0x0 0.--9. 1. "TXDQSDLYTG0_U1,Write DQS delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQSDLYTG1_U1,DDRPHYC TxDqsDlyTg1_u1 register" hexmask.long.word 0x4 0.--9. 1. "TXDQSDLYTG1_U1,Write DQS delay (timing group 1)" group.long 0x48900++0x3 line.long 0x0 "DDRPHYC_DBYTE2_VREFDAC0_R2,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x489A0++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXPBDLYTG0_R2,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXPBDLYTG1_R2,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x48B00++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQDLYTG0_R2,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQDLYTG1_R2,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x48D00++0x3 line.long 0x0 "DDRPHYC_DBYTE2_VREFDAC0_R3,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x48DA0++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXPBDLYTG0_R3,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXPBDLYTG1_R3,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x48F00++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQDLYTG0_R3,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQDLYTG1_R3,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x49100++0x3 line.long 0x0 "DDRPHYC_DBYTE2_VREFDAC0_R4,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x491A0++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXPBDLYTG0_R4,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXPBDLYTG1_R4,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x49300++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQDLYTG0_R4,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQDLYTG1_R4,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x49500++0x3 line.long 0x0 "DDRPHYC_DBYTE2_VREFDAC0_R5,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x495A0++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXPBDLYTG0_R5,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXPBDLYTG1_R5,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x49700++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQDLYTG0_R5,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQDLYTG1_R5,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x49900++0x3 line.long 0x0 "DDRPHYC_DBYTE2_VREFDAC0_R6,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x499A0++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXPBDLYTG0_R6,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXPBDLYTG1_R6,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x49B00++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQDLYTG0_R6,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQDLYTG1_R6,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x49D00++0x3 line.long 0x0 "DDRPHYC_DBYTE2_VREFDAC0_R7,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x49DA0++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXPBDLYTG0_R7,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXPBDLYTG1_R7,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x49F00++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQDLYTG0_R7,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQDLYTG1_R7,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4A100++0x3 line.long 0x0 "DDRPHYC_DBYTE2_VREFDAC0_R8,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x4A1A0++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXPBDLYTG0_R8,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXPBDLYTG1_R8,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4A300++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQDLYTG0_R8,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQDLYTG1_R8,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4C000++0x3 line.long 0x0 "DDRPHYC_DBYTE3_DBYTEMISCMODE,DDRPHYC DBYTE module disable register" bitfld.long 0x0 2. "DBYTEDISABLE,DBYTE disable" "B_0x0,B_0x1" group.long 0x4C068++0x3 line.long 0x0 "DDRPHYC_DBYTE3_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x4C080++0x3 line.long 0x0 "DDRPHYC_DBYTE3_DFIMRL,DDRPHYC DFIMRL register" hexmask.long.byte 0x0 0.--4. 1. "DFIMRL,DFI maximum read latency (MRL)" group.long 0x4C100++0x7 line.long 0x0 "DDRPHYC_DBYTE3_VREFDAC0_R0,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" line.long 0x4 "DDRPHYC_DBYTE3_TXIMPEDANCECTRL0_B0,DDRPHYC data T3 impedance controls register" hexmask.long.byte 0x4 6.--11. 1. "DRVSTRENDQN,6-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x4 0.--5. 1. "DRVSTRENDQP,6-bit bus used to select the target pull-down output impedance" group.long 0x4C10C++0x3 line.long 0x0 "DDRPHYC_DBYTE3_DQDQSRCVCNTRL_B0,DDRPHYC DQ/DQS receiver control register" hexmask.long.byte 0x0 7.--11. 1. "GAINCURRADJ,Adjusts gain current of RX amplifier stage." bitfld.long 0x0 4.--6. "MAJORMODEDBYTE,Selection of the major mode of operation for the receiver" "B_0x0,?,B_0x2,B_0x3,?,?,?,?" newline bitfld.long 0x0 2.--3. "DFECTRL,Note: These settings are determined by PHY training firmware and must not be overridden." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "EXTVREFRANGE,Extends the range available in the local per-bit VREF generator." "0,1" newline bitfld.long 0x0 0. "SELANALOGVREF,Setting this bit forces the local per-bit Vless thansub>REFless than/sub> generator to pass the global VREFA" "0,1" group.long 0x4C128++0x3 line.long 0x0 "DDRPHYC_DBYTE3_DQDQSRCVCNTRL1,DDRPHYC DQ/DQS receiver control register" bitfld.long 0x0 11. "ENLPREQPDR,not used" "0,1" bitfld.long 0x0 10. "RXPADSTANDBYEN,Enables rxdq/rxdqs Standby power savings per pad-group." "0,1" newline bitfld.long 0x0 9. "POWERDOWNRCVRDQS,Active high signal which powers down the receiver" "0,1" hexmask.long.word 0x0 0.--8. 1. "POWERDOWNRCVR,Active high signal which powers down the receiver" group.long 0x4C130++0x7 line.long 0x0 "DDRPHYC_DBYTE3_DQDQSRCVCNTRL2,DDRPHYC DQ/DQS receiver control register" bitfld.long 0x0 0. "ENRXAGRESSIVEPDR,None" "0,1" line.long 0x4 "DDRPHYC_DBYTE3_TXODTDRVSTREN_B0,DDRPHYC TX ODT driver strength control register" hexmask.long.byte 0x4 6.--11. 1. "ODTSTRENN,ODT pull-down impedance selection" hexmask.long.byte 0x4 0.--5. 1. "ODTSTRENP,ODT pull-up impedance selection" rgroup.long 0x4C158++0xB line.long 0x0 "DDRPHYC_DBYTE3_RXFIFOCHECKSTATUS,DDRPHYC status of RX FIFO consistency checks register" bitfld.long 0x0 1. "RXFIFOLOCUERR,If this bit is set the read pointer (DFI side) on the read FIFO associated with data bits [7:4]" "0,1" bitfld.long 0x0 0. "RXFIFOLOCERR,If this bit is set the read pointer (DFI side) on the read FIFO associated with data bits [3:0]" "0,1" line.long 0x4 "DDRPHYC_DBYTE3_RXFIFOCHECKERRVALUES,DDRPHYC captured values associated with an RxFIFO consistency error register" hexmask.long.byte 0x4 12.--15. 1. "RXFIFOWRLOCUERRVALUE,First error value captured for the write pointer (DQS side) on the read FIFO associated with data bits [7:4]" hexmask.long.byte 0x4 8.--11. 1. "RXFIFORDLOCUERRVALUE,First error value captured for the read pointer (DFI side) on the read FIFO associated with data bits [7:4]" newline hexmask.long.byte 0x4 4.--7. 1. "RXFIFOWRLOCERRVALUE,First error value captured for the write pointer (DQS side) on the read FIFO associated with data bits [3:0]" hexmask.long.byte 0x4 0.--3. 1. "RXFIFORDLOCERRVALUE,First error value captured for the read pointer (DFI side) on the read FIFO associated with data bits [3:0]" line.long 0x8 "DDRPHYC_DBYTE3_RXFIFOINFO,DDRPHYC data receive FIFO pointer values register" hexmask.long.byte 0x8 12.--15. 1. "RXFIFOWRLOCU,Mission mode write pointer of the upper-nibble Rx FIFO" hexmask.long.byte 0x8 8.--11. 1. "RXFIFORDLOCU,Mission mode read pointer of the upper-nibble Rx FIFO" newline hexmask.long.byte 0x8 4.--7. 1. "RXFIFOWRLOC,Mission mode write pointer of the lower-nibble Rx FIFO" hexmask.long.byte 0x8 0.--3. 1. "RXFIFORDLOC,Mission mode read pointer of the lower-nibble Rx FIFO" group.long 0x4C164++0x3 line.long 0x0 "DDRPHYC_DBYTE3_RXFIFOVISIBILITY,DDRPHYC R3 FIFO visibility register" bitfld.long 0x0 4. "RXFIFORDEN,Pulse [set 0-->1-->0] this bit to capture the FIFO contents." "0,1" bitfld.long 0x0 3. "RXFIFORDPTROVR,This bit is programmable as follows:" "B_0x0,B_0x1" newline bitfld.long 0x0 0.--2. "RXFIFORDPTR,If RXFIFORDPTROVR is set this bit field selects the Rx FIFO entry." "0,1,2,3,4,5,6,7" rgroup.long 0x4C168++0xB line.long 0x0 "DDRPHYC_DBYTE3_RXFIFOCONTENTSDQ3210,DDRPHYC R3 FIFO content DQ321x register" hexmask.long.word 0x0 0.--15. 1. "RXFIFOCONTENTSDQ3210,Window into the contents of the Rx FIFO as controlled" line.long 0x4 "DDRPHYC_DBYTE3_RXFIFOCONTENTSDQ7654,DDRPHYC R3 FIFO content DQ7654 register" hexmask.long.word 0x4 0.--15. 1. "RXFIFOCONTENTSDQ7654,Window into the contents of the Rx FIFO as controlled" line.long 0x8 "DDRPHYC_DBYTE3_RXFIFOCONTENTSDBI,DDRPHYC R3 FIFO content DBI register" hexmask.long.byte 0x8 0.--3. 1. "RXFIFOCONTENTSDBI,Window into the contents of the Rx FIFO as controlled" group.long 0x4C17C++0x3 line.long 0x0 "DDRPHYC_DBYTE3_TXSLEWRATE_B0,DDRPHYC T3 slew rate controls register" bitfld.long 0x0 8.--10. "TXPREDRVMODE,Controls predrivers to adjust timing of turn-on and turn-off of pull-up and pull-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "TXPREN,4-bit binary trim for the driver pull -own slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "TXPREP,4-bit binary trim for the driver pull-up slew rate" group.long 0x4C1A0++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXPBDLYTG0_R0,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXPBDLYTG1_R0,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4C200++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXENDLYTG0_U0,DDRPHYC RxEnDlyTgx_u0 register" hexmask.long.word 0x0 0.--10. 1. "RXENDLYTG0_U0,Trained receive enable delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXENDLYTG1_U0,DDRPHYC RxEnDlyTg1_ux register" hexmask.long.word 0x4 0.--10. 1. "RXENDLYTG1_U0,Trained receive enable delay (timing group 1)" group.long 0x4C230++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXCLKDLYTG0_U0,DDRPHYC RxClkDlyTgx_u0 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKDLYTG0_U0,Trained read DQS to RxClk delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXCLKDLYTG1_U0,DDRPHYC RxClkDlyTg1_ux register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKDLYTG1_U0,Trained read DQS to RxClk delay (timing group 1)" group.long 0x4C240++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXCLKCDLYTG0_U0,DDRPHYC RxClkcDlyTgx_u0 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKCDLYTG0_U0,Trained read DQS_c to RxClkc delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXCLKCDLYTG1_U0,DDRPHYC RxClkcDlyTg1_ux register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKCDLYTG1_U0,Trained read DQS_c to RxClkc delay (timing group 1)" group.long 0x4C280++0x1F line.long 0x0 "DDRPHYC_DBYTE3_DQ0LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x0 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x4 "DDRPHYC_DBYTE3_DQ1LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x4 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x8 "DDRPHYC_DBYTE3_DQ2LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x8 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0xC "DDRPHYC_DBYTE3_DQ3LNSEL,DDRPHYC DqLnSel register" bitfld.long 0xC 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x10 "DDRPHYC_DBYTE3_DQ4LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x10 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x14 "DDRPHYC_DBYTE3_DQ5LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x14 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x18 "DDRPHYC_DBYTE3_DQ6LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x18 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x1C "DDRPHYC_DBYTE3_DQ7LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x1C 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" group.long 0x4C300++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQDLYTG0_R0,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQDLYTG1_R0,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4C340++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQSDLYTG0_U0,DDRPHYC TxDqsDlyTgx_u0 register" hexmask.long.word 0x0 0.--9. 1. "TXDQSDLYTG0_U0,Write DQS delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQSDLYTG1_U0,DDRPHYC TxDqsDlyTg1_ux register" hexmask.long.word 0x4 0.--9. 1. "TXDQSDLYTG1_U0,Write DQS delay (timing group 1)" rgroup.long 0x4C390++0x3 line.long 0x0 "DDRPHYC_DBYTE3_DXLCDLSTATUS,DDRPHYC debug status of the DBYTE LCDL register" bitfld.long 0x0 13. "DXLCDLLIVELOCK,Present value of whether the LCDL is locked" "0,1" bitfld.long 0x0 12. "DXLCDLSTICKYUNLOCK,Latched value of whether the LCDL ever lost lock after the assertion of LCDLTSTENABLE" "0,1" newline bitfld.long 0x0 11. "DXLCDLSTICKYLOCK,Latched value of whether the LCDL ever achieved lock after the assertion of LCDLTSTENABLE" "0,1" bitfld.long 0x0 10. "DXLCDLPHDSNAPVAL,Value of the LCDL phase-detector output latched by pulse" "0,1" newline hexmask.long.word 0x0 0.--9. 1. "DXLCDLFINESNAPVAL,Value of the LCDL 1UI estimate code latched by pulse on LcdlFineSnap while LCDLTSTENABLE = 1" group.long 0x4C500++0x7 line.long 0x0 "DDRPHYC_DBYTE3_VREFDAC0_R1,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" line.long 0x4 "DDRPHYC_DBYTE3_TXIMPEDANCECTRL0_B1,DDRPHYC data T3 impedance controls register" hexmask.long.byte 0x4 6.--11. 1. "DRVSTRENDQN,6-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x4 0.--5. 1. "DRVSTRENDQP,6-bit bus used to select the target pull-down output impedance" group.long 0x4C50C++0x3 line.long 0x0 "DDRPHYC_DBYTE3_DQDQSRCVCNTRL_B1,DDRPHYC DQ/DQS receiver control register" hexmask.long.byte 0x0 7.--11. 1. "GAINCURRADJ,Adjusts gain current of RX amplifier stage." bitfld.long 0x0 4.--6. "MAJORMODEDBYTE,Selection of the major mode of operation for the receiver" "B_0x0,?,B_0x2,B_0x3,?,?,?,?" newline bitfld.long 0x0 2.--3. "DFECTRL,Note: These settings are determined by PHY training firmware and must not be overridden." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "EXTVREFRANGE,Extends the range available in the local per-bit VREF generator." "0,1" newline bitfld.long 0x0 0. "SELANALOGVREF,Setting this bit forces the local per-bit Vless thansub>REFless than/sub> generator to pass the global VREFA" "0,1" group.long 0x4C534++0x3 line.long 0x0 "DDRPHYC_DBYTE3_TXODTDRVSTREN_B1,DDRPHYC TX ODT driver strength control register" hexmask.long.byte 0x0 6.--11. 1. "ODTSTRENN,ODT pull-down impedance selection" hexmask.long.byte 0x0 0.--5. 1. "ODTSTRENP,ODT pull-up impedance selection" group.long 0x4C57C++0x3 line.long 0x0 "DDRPHYC_DBYTE3_TXSLEWRATE_B1,DDRPHYC T3 slew rate controls register" bitfld.long 0x0 8.--10. "TXPREDRVMODE,Controls predrivers to adjust timing of turn-on and turn-off of pull-up and pull-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "TXPREN,4-bit binary trim for the driver pull -own slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "TXPREP,4-bit binary trim for the driver pull-up slew rate" group.long 0x4C5A0++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXPBDLYTG0_R1,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXPBDLYTG1_R1,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4C600++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXENDLYTG0_U1,DDRPHYC RxEnDlyTgx_u1 register" hexmask.long.word 0x0 0.--10. 1. "RXENDLYTG0_U1,Trained receive enable delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXENDLYTG1_U1,DDRPHYC RxEnDlyTg1_u1 register" hexmask.long.word 0x4 0.--10. 1. "RXENDLYTG1_U1,Trained receive enable delay (timing group 1)" group.long 0x4C630++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXCLKDLYTG0_U1,DDRPHYC RxClkDlyTgx_u1 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKDLYTG0_U1,Trained read DQS to RxClk delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXCLKDLYTG1_U1,DDRPHYC RxClkDlyTg1_u1 register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKDLYTG1_U1,Trained read DQS to RxClk delay (timing group 1)" group.long 0x4C640++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXCLKCDLYTG0_U1,DDRPHYC RxClkcDlyTgx_u1 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKCDLYTG0_U1,Trained read DQS_c to RxClkc delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXCLKCDLYTG1_U1,DDRPHYC RxClkcDlyTg1_u1 register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKCDLYTG1_U1,Trained read DQS_c to RxClkc delay (timing group 1)" group.long 0x4C700++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQDLYTG0_R1,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQDLYTG1_R1,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4C740++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQSDLYTG0_U1,DDRPHYC TxDqsDlyTgx_u1 register" hexmask.long.word 0x0 0.--9. 1. "TXDQSDLYTG0_U1,Write DQS delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQSDLYTG1_U1,DDRPHYC TxDqsDlyTg1_u1 register" hexmask.long.word 0x4 0.--9. 1. "TXDQSDLYTG1_U1,Write DQS delay (timing group 1)" group.long 0x4C900++0x3 line.long 0x0 "DDRPHYC_DBYTE3_VREFDAC0_R2,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x4C9A0++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXPBDLYTG0_R2,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXPBDLYTG1_R2,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4CB00++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQDLYTG0_R2,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQDLYTG1_R2,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4CD00++0x3 line.long 0x0 "DDRPHYC_DBYTE3_VREFDAC0_R3,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x4CDA0++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXPBDLYTG0_R3,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXPBDLYTG1_R3,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4CF00++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQDLYTG0_R3,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQDLYTG1_R3,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4D100++0x3 line.long 0x0 "DDRPHYC_DBYTE3_VREFDAC0_R4,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x4D1A0++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXPBDLYTG0_R4,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXPBDLYTG1_R4,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4D300++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQDLYTG0_R4,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQDLYTG1_R4,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4D500++0x3 line.long 0x0 "DDRPHYC_DBYTE3_VREFDAC0_R5,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x4D5A0++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXPBDLYTG0_R5,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXPBDLYTG1_R5,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4D700++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQDLYTG0_R5,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQDLYTG1_R5,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4D900++0x3 line.long 0x0 "DDRPHYC_DBYTE3_VREFDAC0_R6,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x4D9A0++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXPBDLYTG0_R6,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXPBDLYTG1_R6,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4DB00++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQDLYTG0_R6,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQDLYTG1_R6,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4DD00++0x3 line.long 0x0 "DDRPHYC_DBYTE3_VREFDAC0_R7,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x4DDA0++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXPBDLYTG0_R7,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXPBDLYTG1_R7,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4DF00++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQDLYTG0_R7,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQDLYTG1_R7,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4E100++0x3 line.long 0x0 "DDRPHYC_DBYTE3_VREFDAC0_R8,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x4E1A0++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXPBDLYTG0_R8,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXPBDLYTG1_R8,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4E300++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQDLYTG0_R8,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQDLYTG1_R8,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x80000++0x7 line.long 0x0 "DDRPHYC_MASTER0_RXFIFOINIT,DDRPHYC Rx FIFO pointer initialization control register" bitfld.long 0x0 1. "INHIBITRXFIFORD,Reserved for training firmware use" "0,1" bitfld.long 0x0 0. "RXFIFOINITPTR,Setting this bit resets the PHY RXDATAFIFO read and write pointers." "0,1" line.long 0x4 "DDRPHYC_MASTER0_FORCECLKDISABLE,DDRPHYC ForceClkDisable register" hexmask.long.byte 0x4 0.--3. 1. "FORCECLKDISABLE,This bit field forces the gating of MEMCLKs driven from the PHY." group.long 0x8000C++0x3 line.long 0x0 "DDRPHYC_MASTER0_FORCEINTERNALUPDATE,DDRPHYC ForceInternalUpdate register" bitfld.long 0x0 0. "FORCEINTERNALUPDATE,Used by training firmware to force an internal PHY update event" "0,1" rgroup.long 0x80010++0x3 line.long 0x0 "DDRPHYC_MASTER0_PHYCONFIG,DDRPHYC read-only displays PHY configuration register" bitfld.long 0x0 8.--9. "PHYCONFIGDFI,Returns the following value depending on the define:" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "PHYCONFIGDBYTES,Returns the following value depending on the define:" newline hexmask.long.byte 0x0 0.--3. 1. "PHYCONFIGANIBS,Returns the following value depending on the define:" group.long 0x80014++0x3 line.long 0x0 "DDRPHYC_MASTER0_PGCR,DDRPHYC PHY general configuration register" bitfld.long 0x0 0. "RXCLKRISEFALLMODE,Controls independent training for RxClk_c and RxClk_t." "B_0x0,B_0x1" group.long 0x8001C++0x7 line.long 0x0 "DDRPHYC_MASTER0_TESTBUMPCNTRL1,DDRPHYC test bump control1 register" bitfld.long 0x0 15. "TESTPOWERGATEEN,Do not use for debug only" "0,1" bitfld.long 0x0 14. "TESTEXTVREFRANGE,Setting this bit extends the VREF DAC range for debug." "0,1" newline bitfld.long 0x0 13. "TESTSELEXTERNALVREF,Do not use for debug only" "0,1" hexmask.long.byte 0x0 8.--12. 1. "TESTGAINCURRADJ,Adjust gain and current of analog observe RX amplifier stage at analog test point." newline hexmask.long.byte 0x0 4.--7. 1. "TESTANALOGOUTCTRL,Reserved and returns zero on reads." bitfld.long 0x0 3. "TESTBIASBYPASSEN,Do not use for debug only" "0,1" newline bitfld.long 0x0 0.--2. "TESTMAJORMODE,Selects the major mode of operation for the receiver." "?,?,?,B_0x3,?,?,?,?" line.long 0x4 "DDRPHYC_MASTER0_CALUCLKINFO,DDRPHYC impedance calibration clock ratio register" hexmask.long.word 0x4 0.--10. 1. "CALUCLKTICKSPER1US,Must be programmed to the number of DfiClks in 1 us (rounded up) with minimum value" group.long 0x80028++0x13 line.long 0x0 "DDRPHYC_MASTER0_TESTBUMPCNTRL,DDRPHYC test bump control register" bitfld.long 0x0 9. "FORCEMTESTONALERT,When set this bit causes the digital observation output pin to be driven onto BP_ALERT_N." "0,1" hexmask.long.byte 0x0 3.--8. 1. "TESTBUMPDATASEL,RVSD" newline bitfld.long 0x0 2. "TESTBUMPTOGGLE,Controls the output function of the signal." "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "TESTBUMPEN,Controls the output function of the signal BP_ALERT_N." "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "DDRPHYC_MASTER0_SEQ0BDLY0,DDRPHYC Seq0BDLY0 register" hexmask.long.word 0x4 0.--15. 1. "SEQ0BDLY0,PIE delay register 0" line.long 0x8 "DDRPHYC_MASTER0_SEQ0BDLY1,DDRPHYC Seq0BDLY1 register" hexmask.long.word 0x8 0.--15. 1. "SEQ0BDLY1,PIE delay register 1" line.long 0xC "DDRPHYC_MASTER0_SEQ0BDLY2,DDRPHYC Seq0BDLY2 register" hexmask.long.word 0xC 0.--15. 1. "SEQ0BDLY2,PIE delay register 2" line.long 0x10 "DDRPHYC_MASTER0_SEQ0BDLY3,DDRPHYC Seq0BDLY3 register" hexmask.long.word 0x10 0.--15. 1. "SEQ0BDLY3,PIE delay register 3" rgroup.long 0x8003C++0x3 line.long 0x0 "DDRPHYC_MASTER0_PHYALERTSTATUS,DDRPHYC PHY alert status bit register" bitfld.long 0x0 0. "PHYALERT,Current state of ALERT_N" "0,1" group.long 0x80040++0x3 line.long 0x0 "DDRPHYC_MASTER0_PPTTRAINSETUP,DDRPHYC setup intervals for DFI PHY master operation register" bitfld.long 0x0 4.--6. "PHYMSTRMAXREQTOACK,Max time from tdfi_phymstr_req asserted" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,?" hexmask.long.byte 0x0 0.--3. 1. "PHYMSTRTRAININTERVAL,Time between the end of one training and the start" group.long 0x80048++0x3 line.long 0x0 "DDRPHYC_MASTER0_ATESTMODE,DDRPHYC ATestMode control register" bitfld.long 0x0 2.--4. "ATESTMODESEL,Master mode select for ATest (loopback)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 1. "ATESTCLKEN,Not used" "0,1" newline bitfld.long 0x0 0. "ATESTPRBSEN,Enables loopback PRBS7 testing of all the DDR output pins." "0,1" rgroup.long 0x80050++0x7 line.long 0x0 "DDRPHYC_MASTER0_TXCALBINP,DDRPHYC TxCalBinP register" hexmask.long.byte 0x0 0.--4. 1. "TXCALBINP,Binary result of the 31-bit thermometer pull-up code" line.long 0x4 "DDRPHYC_MASTER0_TXCALBINN,DDRPHYC TxCalBinN register" hexmask.long.byte 0x4 0.--4. 1. "TXCALBINN,Binary result of the 31-bit thermometer pull-down code" group.long 0x80058++0x23 line.long 0x0 "DDRPHYC_MASTER0_TXCALPOVR,DDRPHYC TX P impedance calibration override register" bitfld.long 0x0 5. "TXCALBINPOVREN,None" "?,B_0x1" hexmask.long.byte 0x0 0.--4. 1. "TXCALBINPOVRVAL,Binary value which can override TXCALBINP bitfiled" line.long 0x4 "DDRPHYC_MASTER0_TXCALNOVR,DDRPHYC TX N impedance calibration override register" bitfld.long 0x4 5. "TXCALBINNOVREN,None" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "TXCALBINNOVRVAL,Binary value which can override TXCALBINN bit field" line.long 0x8 "DDRPHYC_MASTER0_DFIMODE,DDRPHYC enables for update and low-power interfaces for DFI0 and DFI1 register" bitfld.long 0x8 2. "DFI1OVERRIDE,Controls the PHY logic associated with both DFI0 and DFI1." "0,1" bitfld.long 0x8 1. "DFI1ENABLE,Enables operation for the PHY logic associated with DFI1." "0,1" newline bitfld.long 0x8 0. "DFI0ENABLE,Enables operation for the PHY logic associated with DFI0." "0,1" line.long 0xC "DDRPHYC_MASTER0_TRISTATEMODECA,DDRPHYC mode select register for MEMCLK/address/command tristate register" bitfld.long 0xC 2.--3. "CKDISVAL,The PHY provides four memory clocks (0 to 3)." "0,1,2,3" bitfld.long 0xC 1. "DDR2TMODE,Must be set to 1 for dynamic tristate to work when CA bus is 2T or Geardown mode." "0,1" newline bitfld.long 0xC 0. "DISDYNADRTRI,When this bit is set the dynamic tristate feature is disabled (on by default)." "0,1" line.long 0x10 "DDRPHYC_MASTER0_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x10 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." line.long 0x14 "DDRPHYC_MASTER0_MTESTPGMINFO,DDRPHYC MtestPgmInfo register" bitfld.long 0x14 0. "MTESTPGMINFO,This bit value can be driven onto the digital observation pin (no other hardware effect)." "0,1" line.long 0x18 "DDRPHYC_MASTER0_DYNPWRDNUP,DDRPHYC dynamic power up/down control register" bitfld.long 0x18 0. "DYNPOWERDOWN,None" "B_0x0,B_0x1" line.long 0x1C "DDRPHYC_MASTER0_PMIENABLE,DDRPHYC PMIEnable register" bitfld.long 0x1C 0. "PMIENABLE,This bit is dynamically written by PIE during frequency changes and must not be written by the user." "0,1" line.long 0x20 "DDRPHYC_MASTER0_PHYTID,DDRPHYC PhyTID register" hexmask.long.word 0x20 0.--15. 1. "PHYTID,Placeholder to store technology-specific information" group.long 0x80080++0x1F line.long 0x0 "DDRPHYC_MASTER0_HWTMRL,DDRPHYC HwtMRL register" hexmask.long.byte 0x0 0.--4. 1. "HWTMRL,Master copy of MRL used by the PHY training firmware only" line.long 0x4 "DDRPHYC_MASTER0_DFIPHYUPD,DDRPHYC DFI PhyUpdate request time counter register" hexmask.long.byte 0x4 12.--15. 1. "DFIPHYUPDINTTHRESHOLD,Similar to DFIPHYUPDTHRESHOLD except that rather than affecting the Phy update request this bit field affects only the threshold used to generate the VT drift alarm interrupt." hexmask.long.byte 0x4 8.--11. 1. "DFIPHYUPDTHRESHOLD,- Nonzero codes are the threshold value for the change in the master LCDL 1UI phase code since the last Phy update request that triggers a new Phy update request;" newline bitfld.long 0x4 7. "DFIPHYUPDMODE,None" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "DFIPHYUPDRESP,Enforces the t_phyupd_resp time (max time allowed to the controller to respond to the request for a PHY update)." "B_0x0,B_0x1,B_0x2,B_0x3,?,?,?,?" newline hexmask.long.byte 0x4 0.--3. 1. "DFIPHYUPDCNT,Controls the interval between the end of a PHY update transaction and a subsequent request." line.long 0x8 "DDRPHYC_MASTER0_PDAMRSWRITEMODE,DDRPHYC PdaMrsWriteMode register" bitfld.long 0x8 0. "PDAMRSWRITEMODE,Controls the write DQ generation per the timing requirements on DQ signals used for" "0,1" line.long 0xC "DDRPHYC_MASTER0_DFIGEARDOWNCTL,DDRPHYC DFIGEARDOWNCTL register" bitfld.long 0xC 0.--1. "DFIGEARDOWNCTL,Bit[0] controls whether dfi_geardown_en causes chip-select (CS) timing to change." "B_0x0,B_0x1,?,?" line.long 0x10 "DDRPHYC_MASTER0_DQSPREAMBLECONTROL,DDRPHYC control the PHY logic related to the read and write DQS preamble register" bitfld.long 0x10 8. "WDQSEXTENSION,When this bits is set DQS_T and DQS_C are driven differentially to 0 and 1 respectively before and after a write burst except during a memory read transaction." "0,1" bitfld.long 0x10 7. "LP4STTCPREBRIDGERXEN,Used in LPDDR4 static-preamble mode to bridge the RxEn between two reads to the same timing group when the bubble is 1 memclk" "0,1" newline bitfld.long 0x10 6. "LP4POSTAMBLEEXT,In LPDDR4 mode this bit must be set to extend the write postamble." "B_0x0,B_0x1" bitfld.long 0x10 5. "LP4TGLTWOTCKTXDQSPRE,Used in LPDDR4 mode to modify the early preamble whenTwoTckTxDqsPre=1." "B_0x0,B_0x1" newline bitfld.long 0x10 2.--4. "POSITIONDFEINIT,For DDR4 PHY only when receive DFE is enabled" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "TWOTCKTXDQSPRE,For LPDDR4 all write operations are 2nCK such that this control must be set to 1." "0,1" newline bitfld.long 0x10 0. "TWOTCKRXDQSPRE,Widens the RxDqsEn window to allow larger drift in the incoming read DQS to take advantage of the larger/wider preamble generated by the DRAMs when D4 DRAMS are configured with DDR4 MR4 A11 read preamble = 1 for causing a 2nCK read preamble." "0,1" line.long 0x14 "DDRPHYC_MASTER0_MASTERX4CONFIG,DDRPHYC MasterX4Config register" hexmask.long.byte 0x14 0.--3. 1. "X4TG,Set to 1 if this timing group/rank is x4 (as opposed to x8) memory." line.long 0x18 "DDRPHYC_MASTER0_WRLEVBITS,DDRPHYC write level feedback DQ observability selection register" hexmask.long.byte 0x18 4.--7. 1. "WRLEVFORDQSU,DQ bit used for write levelization" hexmask.long.byte 0x18 0.--3. 1. "WRLEVFORDQSL,DQ bit used for write levelization" line.long 0x1C "DDRPHYC_MASTER0_ENABLECSMULTICAST,DDRPHYC EnableCsMulticast register" bitfld.long 0x1C 0. "ENABLECSMULTICAST,Controls whether CS_N[3:2] must be multicast on CID[1:0] in DDR4 mode." "B_0x0,B_0x1" group.long 0x800B0++0xB line.long 0x0 "DDRPHYC_MASTER0_ACX4ANIBDIS,DDRPHYC Acx4AnibDis register" hexmask.long.word 0x0 0.--11. 1. "ACX4ANIBDIS,When a bit is set the corresponding ACX nibble is disabled." line.long 0x4 "DDRPHYC_MASTER0_DMIPINPRESENT,DDRPHYC enable Read-DBI function in each DBYTE register" bitfld.long 0x4 0. "RDDBIENABLED,This bit must be set if Read-DBI is enabled in a connected DDR4 or LPDDR4 device." "0,1" line.long 0x8 "DDRPHYC_MASTER0_ARDPTRINITVAL,DDRPHYC ARdPtrInitVal register" hexmask.long.byte 0x8 0.--3. 1. "ARDPTRINITVAL,Initial pointer offset for the free-running FIFOs in the DBYTE" group.long 0x800E8++0x3 line.long 0x0 "DDRPHYC_MASTER0_DBYTEDLLMODECNTRL,DDRPHYC DLL mode control for DBYTEs register" bitfld.long 0x0 1. "DLLRXPREAMBLEMODE,This bit must be set to 1 if read DQS preamble contains a toggle for example DDR4 or LPDDR4 read toggling preamble mode." "0,1" group.long 0x80114++0x3 line.long 0x0 "DDRPHYC_MASTER0_CALOFFSETS,IDDRPHYC impedance calibration offsets control register" hexmask.long.byte 0x0 10.--13. 1. "CALDRVPUTHOFFSET,Adjusts the driver pull-up calibration code." hexmask.long.byte 0x0 6.--9. 1. "CALDRVPDTHOFFSET,Adjusts the driver pull-down calibration code." newline hexmask.long.byte 0x0 0.--5. 1. "CALCMPR5OFFSET,Adjusts the offset-compensated DAC code for the cmpana circuit at VREF == 0." group.long 0x8011C++0x3 line.long 0x0 "DDRPHYC_MASTER0_SARINITVALS,DDRPHYC SarInitVals register" bitfld.long 0x0 6.--8. "SARINITPEXT,Specifies the SAR starting value for PEXT calibration." "0,1,2,3,4,5,6,7" bitfld.long 0x0 3.--5. "SARINITNINT,Specifies the SAR starting value for NINT calibration." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0.--2. "SARINITOFFSET05,Specifies the SAR starting value for OFFSET05 calibration." "0,1,2,3,4,5,6,7" group.long 0x80124++0xB line.long 0x0 "DDRPHYC_MASTER0_CALPEXTOVR,DDRPHYC CalPExtOvr register" hexmask.long.byte 0x0 0.--4. 1. "CALPEXTOVR,If CALPEXTDIS is set the value provided here by software is used instead of the automatically generated value which is visible via CalPExt field." line.long 0x4 "DDRPHYC_MASTER0_CALCMPR5OVR,DDRPHYC CalCmpr5Ovr register" hexmask.long.byte 0x4 0.--7. 1. "CALCMPR5OVR,If CALCMPR5DIS is set the value provided here by software is used instead of the automatically generated value which is visible via CalCmpr5 field." line.long 0x8 "DDRPHYC_MASTER0_CALNINTOVR,DDRPHYC CalNIntOvr register" hexmask.long.byte 0x8 0.--4. 1. "CALNINTOVR,If the CALNINTDIS is set the value provided here by software is used instead of the automatically generated value which is visible via CalNInt field." group.long 0x80140++0x3 line.long 0x0 "DDRPHYC_MASTER0_CALDRVSTR0,DDRPHYC impedance calibration driver strength control register" hexmask.long.byte 0x0 4.--7. 1. "CALDRVSTRPU50,3 to 15: Reserved" hexmask.long.byte 0x0 0.--3. 1. "CALDRVSTRPD50,3 to 15: Reserved" group.long 0x80158++0x3 line.long 0x0 "DDRPHYC_MASTER0_PROCODTTIMECTL,DDRPHYC read data on-die termination timing control register" bitfld.long 0x0 4.--5. "PODTTAILWIDTHEXT,Controls the length of the tail of ProcOdt (units of UI)." "0,1,2,3" bitfld.long 0x0 2.--3. "PODTSTARTDELAY,Controls the start of ProcOdt (units of UI)." "B_0x0,B_0x1,?,B_0x3" newline bitfld.long 0x0 0.--1. "PODTTAILWIDTH,Controls the length of the tail of ProcOdt (units of UI)." "0,1,2,3" group.long 0x8016C++0x7 line.long 0x0 "DDRPHYC_MASTER0_MEMALERTCONTROL,DDRPHYC MemAlert receiver configuration register" bitfld.long 0x0 15. "MALERTFORCEERROR,When set this bit state is used to force the parity error to memory." "0,1" bitfld.long 0x0 14. "MALERTDISABLEVAL,When MALERTRXEN is not set this bit state is used to drive dfi_alert_n." "0,1" newline bitfld.long 0x0 13. "MALERTRXEN,This bit is programmable as follows:" "B_0x0,B_0x1" bitfld.long 0x0 12. "MALERTPUEN,When set this bit enables the pull-up termination on MALERT" "0,1" newline hexmask.long.byte 0x0 8.--11. 1. "MALERTPUSTREN,Controls the pull-up termination on MALERT." bitfld.long 0x0 7. "MALERTVREFEXTEN,When set for test/debug this bit selects external Vless thansub>REFless than/sub> source." "0,1" newline hexmask.long.byte 0x0 0.--6. 1. "MALERTVREFLEVEL,Sets the Vless thansub>REFless than/sub> level of internal Vless thansub>REFless than/sub> DAC assuming the following mission mode settings:" line.long 0x4 "DDRPHYC_MASTER0_MEMALERTCONTROL2,DDRPHYC MemAlert receiver configuration register 2" bitfld.long 0x4 0. "MALERTSYNCBYPASS,This bit is programmed as follows:" "B_0x0,B_0x1" group.long 0x80180++0x3 line.long 0x0 "DDRPHYC_MASTER0_MEMRESETL,DDRPHYC protection and control of BP_MemReset_L register" bitfld.long 0x0 1. "PROTECTMEMRESET,Controls the MemResetL output of the PHY." "0,1" bitfld.long 0x0 0. "MEMRESETLVALUE,Controls the MemResetL output of the PHY." "0,1" group.long 0x801B8++0x3 line.long 0x0 "DDRPHYC_MASTER0_PUBMODE,DDRPHYC PUBMODE - HWT Mux select register" bitfld.long 0x0 0. "HWTMEMSRC,When this bit is set the mux that switches between DCT and HWT for the source of memory transactions is switched to HWT." "B_0x0,B_0x1" rgroup.long 0x801BC++0x3 line.long 0x0 "DDRPHYC_MASTER0_MISCPHYSTATUS,DDRPHYC misc PHY status bits register" bitfld.long 0x0 1. "PORMEMRESET,Returns the active-high value used by the custom circuit which drives the memory reset signal." "0,1" bitfld.long 0x0 0. "DCTSANE,Returns the status of the custom circuit which protects the MemResetL output of the PHY on the initial power-on or reset." "B_0x0,B_0x1" group.long 0x801C0++0x7 line.long 0x0 "DDRPHYC_MASTER0_CORELOOPBACKSEL,DDRPHYC CoreLoopbackSel register" bitfld.long 0x0 0. "CORELOOPBACKSEL,This bit is controlled by the PHY test firmware." "0,1" line.long 0x4 "DDRPHYC_MASTER0_DLLTRAINPARAM,DDRPHYC DLL various training parameters register" bitfld.long 0x4 0.--1. "EXTENDPHDTIME,Used by the PHY firmware locking the LCDL delay cells" "0,1,2,3" group.long 0x801D0++0x7 line.long 0x0 "DDRPHYC_MASTER0_HWTLPCSENBYPASS,DDRPHYC HwtLpCsEnBypass register" bitfld.long 0x0 0. "HWTLPCSENBYPASS,When set this bit disables LpCsEn function for LPDDR4." "0,1" line.long 0x4 "DDRPHYC_MASTER0_DFICAMODE,DDRPHYC DFI command/address mode register" bitfld.long 0x4 3. "DFID4ALTCAMODE,DDR4-Alt mode enable (only available in certain configurations)" "B_0x0,B_0x1" bitfld.long 0x4 2. "DFILP4CAMODE,LP4 mode enable" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "DFID4CAMODE,DDR4 mode enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "DFILP3CAMODE,Reserved must be kept at reset value." "0,1" group.long 0x801E0++0x7 line.long 0x0 "DDRPHYC_MASTER0_DLLCONTROL,DDRPHYC DLL lock state machine control register" bitfld.long 0x0 0. "DLLRESETRELOCK,Used to reset the DDL/LCDL lock state machine" "0,1" line.long 0x4 "DDRPHYC_MASTER0_PULSEDLLUPDATEPHASE,DDRPHYC DLL update phase control register" bitfld.long 0x4 7. "ALWAYSUPDATELCDLPHASE,Causes each new operation to reload the LcdlPhase and increases bubbles." "0,1" bitfld.long 0x4 6. "TRAINUPDATEPHASEONLONGBUBBLE,Causes LongBubble to update the DBYTE and ANIB LDCL phase." "0,1" newline bitfld.long 0x4 3.--5. "UPDATEPHASEDESTRESERVED,reserved not used" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2. "PULSEACADLLUPDATEPHASE,Causes an AC module CA (command/address/cke/odt) DLL phase update." "0,1" newline bitfld.long 0x4 1. "PULSEACKDLLUPDATEPHASE,Causes an AC module CK (memck) DLL phase update." "0,1" bitfld.long 0x4 0. "PULSEDBYTEDLLUPDATEPHASE,Causes a LongBubble to the DBYTE modules which causes an update of the DBYTE module DLLs (tx rxen rxclk)." "0,1" group.long 0x801F0++0x3 line.long 0x0 "DDRPHYC_MASTER0_DLLGAINCTL,DDRPHYC DLL gain control register" hexmask.long.byte 0x0 8.--11. 1. "DLLSEEDSEL,Reserved must be configured to be 0." hexmask.long.byte 0x0 4.--7. 1. "DLLGAINTV,Terminal value of DllGain (value in effect when locking is done) and value used for maintaining lock (tracking pclk variation)" newline hexmask.long.byte 0x0 0.--3. 1. "DLLGAINIV,Initial value of DllGain" group.long 0x80220++0x7 line.long 0x0 "DDRPHYC_MASTER0_CALRATE,DDRPHYC impedance calibration control register" bitfld.long 0x0 6. "DISABLEBACKGROUNDZQUPDATES,Reserved for debug only" "0,1" bitfld.long 0x0 5. "CALONCE,The setting of this bit changes the behavior of CALRUN." "B_0x0,B_0x1" newline bitfld.long 0x0 4. "CALRUN,This bit is programmed as follows:" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--3. 1. "CALINTERVAL,Interval between successive calibrations" line.long 0x4 "DDRPHYC_MASTER0_CALZAP,DDRPHYC CalZap register" bitfld.long 0x4 0. "CALZAP,This bit is written by the PIE and the data in here are overwritten." "0,1" group.long 0x8022C++0x3 line.long 0x0 "DDRPHYC_MASTER0_PSTATE,DDRPHYC PState register" hexmask.long.byte 0x0 0.--3. 1. "PSTATE,This bit field is written by the PIE and the data in here are overwritten." group.long 0x80234++0x3 line.long 0x0 "DDRPHYC_MASTER0_PLLOUTGATECONTROL,DDRPHYC PLL output control register" bitfld.long 0x0 0. "PCLKGATEEN,Reserved." "0,1" group.long 0x80240++0x3 line.long 0x0 "DDRPHYC_MASTER0_PORCONTROL,DDRPHYC PMU power-on reset control register" bitfld.long 0x0 0. "PLLDLLLOCKDONE,This bit is set by the PIE during execution and cleared on PHY reset or on power cycle." "0,1" rgroup.long 0x8025C++0x3 line.long 0x0 "DDRPHYC_MASTER0_CALBUSY,DDRPHYC CalBusy register" bitfld.long 0x0 0. "CALBUSY,Read 1 if the calibrator is actively calibrating." "0,1" group.long 0x80260++0x3 line.long 0x0 "DDRPHYC_MASTER0_CALMISC2,DDRPHYC misc impedance calibration control register" bitfld.long 0x0 14. "CALSLOWCMPANA,When set this bit doubles the time allowed for the analog comparator cell to settle before sampling begins." "0,1" bitfld.long 0x0 13. "CALCANCELROUNDERRDIS,The PEXT and NINT calibration results naturally include a rounding error which manifests as a change of impedance at the pad." "0,1" newline bitfld.long 0x0 0.--2. "CALNUMVOTES,This bit field controls the number of consecutive comparator output bits over which majority voting is done." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" group.long 0x80268++0x7 line.long 0x0 "DDRPHYC_MASTER0_CALMISC,DDRPHYC controls for disabling the impedance calibration of certain target register" bitfld.long 0x0 2. "CALPEXTDIS,Setting this bit prevents the calibration engine from overwriting TXCALBINP and TXCALTHP with an automatically generated value in which case a value must be supplied by software." "0,1" bitfld.long 0x0 1. "CALNINTDIS,Setting this bit prevents the calibration engine from overwriting TXCALBIN and TXCALTHN with an automatically generated value in which case a value must be supplied by software." "0,1" newline bitfld.long 0x0 0. "CALCMPR5DIS,Setting this bit prevents the calibration engine from using the result from the CALCMPR5 stage of calibration." "0,1" line.long 0x4 "DDRPHYC_MASTER0_CALVREFS,DDRPHYC CalVRef register" bitfld.long 0x4 0.--1. "CALVREFS,This bit field drives the Cmpdig_CalRef pin of the cmpana cell at various stages of calibration." "?,?,B_0x2,?" rgroup.long 0x80270++0xB line.long 0x0 "DDRPHYC_MASTER0_CALCMPR5,DDRPHYC CalCmpr5 register" hexmask.long.byte 0x0 0.--7. 1. "CALCMPR5,Offset-compensated DAC code for the cmpana circuit" line.long 0x4 "DDRPHYC_MASTER0_CALNINT,DDRPHYC impedance calibration NInt control register" hexmask.long.byte 0x4 0.--4. 1. "CALNINTTHB,Number of thermometer bits which are set" line.long 0x8 "DDRPHYC_MASTER0_CALPEXT,DDRPHYC impedance calibration PExt control register" hexmask.long.byte 0x8 0.--4. 1. "CALPEXTTHB,Number of thermometer bits which are set" group.long 0x802A0++0x3 line.long 0x0 "DDRPHYC_MASTER0_CALCMPINVERT,DDRPHYC impedance calibration Cmp invert control register" bitfld.long 0x0 4. "CMPINVERTCALODTPU,Impedance calibration Cmp invert control" "0,1" bitfld.long 0x0 3. "CMPINVERTCALODTPD,Impedance calibration Cmp invert control" "0,1" newline bitfld.long 0x0 2. "CMPINVERTCALDRVPU50,Impedance calibration Cmp invert control" "0,1" bitfld.long 0x0 1. "CMPINVERTCALDRVPD50,Impedance calibration Cmp invert control" "0,1" newline bitfld.long 0x0 0. "CMPINVERTCALDAC50,calibration Cmp invert control" "0,1" group.long 0x802B8++0x3 line.long 0x0 "DDRPHYC_MASTER0_CALCMPANACNTRL,DDRPHYC impedance calibration Cmpana control register" bitfld.long 0x0 9. "CMPRBIASBYPASSEN,Impedance calibration Cmpana control" "0,1" bitfld.long 0x0 8. "CMPRGAINRESADJ,Impedance calibration Cmpana control" "0,1" newline hexmask.long.byte 0x0 0.--7. 1. "CMPRGAINCURRADJ,Impedance calibration Cmpana control" group.long 0x802C0++0x3 line.long 0x0 "DDRPHYC_MASTER0_DFIRDDATACSDESTMAP,DDRPHYC maps dfi_rddata_cs_n to destination dimm timing group register" bitfld.long 0x0 6.--7. "DFIRDDESTM3,Maps dfi_rddata_cs_n[3] to destination DfiRdDestm3 timing." "0,1,2,3" bitfld.long 0x0 4.--5. "DFIRDDESTM2,Maps dfi_rddata_cs_n[2] to destination DfiRdDestm2 timing." "0,1,2,3" newline bitfld.long 0x0 2.--3. "DFIRDDESTM1,Maps dfi_rddata_cs_n[1] to destination DfiRdDestm1 timing." "0,1,2,3" bitfld.long 0x0 0.--1. "DFIRDDESTM0,Maps dfi_rddata_cs_n[0] to destination DfiRdDestm0 timing." "0,1,2,3" group.long 0x802C8++0x3 line.long 0x0 "DDRPHYC_MASTER0_VREFINGLOBAL,PHY global VREF controls register" hexmask.long.byte 0x0 3.--9. 1. "GLOBALVREFINDAC,DAC code for internal Vless thansub>REFless than/sub> generation" bitfld.long 0x0 0.--2. "GLOBALVREFINSEL,[1:0] controls the mode of the PHY Vless thansub>REFless than/sub> DAC and the BP_VREF pin." "B_0x0,?,B_0x2,B_0x3,?,?,?,?" group.long 0x802D0++0x3 line.long 0x0 "DDRPHYC_MASTER0_DFIWRDATACSDESTMAP,DDRPHYC maps dfi_rddata_cs_n to destination dimm timing group register" bitfld.long 0x0 6.--7. "DFIWRDESTM3,Maps dfi_wrdata_cs_n[3] to destination DfiWrDestm3 timing (use register Tx[Dq Dqs]DlyTg3)" "0,1,2,3" bitfld.long 0x0 4.--5. "DFIWRDESTM2,Maps dfi_wrdata_cs_n[2] to destination DfiWrDestm2 timing" "0,1,2,3" newline bitfld.long 0x0 2.--3. "DFIWRDESTM1,Maps dfi_wrdata_cs_n[1] to destination DfiWrDestm1 timing" "0,1,2,3" bitfld.long 0x0 0.--1. "DFIWRDESTM0,Maps dfi_wrdata_cs_n[0] to destination DfiWrDestm0 timing" "0,1,2,3" rgroup.long 0x802D4++0x1F line.long 0x0 "DDRPHYC_MASTER0_MASUPDGOODCTR,DDRPHYC MasUpdGoodCtr register" hexmask.long.word 0x0 0.--15. 1. "MASUPDGOODCTR,This bit field increments whenever the memory controller acknowledges a PHY master interface request (a request for the PHY) to take over the DFI for PPT (as per section 11 of the Preliminary DFI 4." line.long 0x4 "DDRPHYC_MASTER0_PHYUPD0GOODCTR,DDRPHYC PhyUpd0GoodCtr register" hexmask.long.word 0x4 0.--15. 1. "PHYUPD0GOODCTR,This bit field increments whenever the memory controller acknowledges a PHY-initiated DFI0 interface update request." line.long 0x8 "DDRPHYC_MASTER0_PHYUPD1GOODCTR,DDRPHYC PhyUpd1GoodCtr register" hexmask.long.word 0x8 0.--15. 1. "PHYUPD1GOODCTR,This bit field increments whenever the memory controller acknowledges a PHY-initiated DFI1 interface update request." line.long 0xC "DDRPHYC_MASTER0_CTLUPD0GOODCTR,DDRPHYC CtlUpd0GoodCtr register" hexmask.long.word 0xC 0.--15. 1. "CTLUPD0GOODCTR,This bit field increments whenever the PHY acknowledges a memory controller-initiated DFI0 interface update request." line.long 0x10 "DDRPHYC_MASTER0_CTLUPD1GOODCTR,DDRPHYC CtlUpd1GoodCtr register" hexmask.long.word 0x10 0.--15. 1. "CTLUPD1GOODCTR,This bit field increments whenever the PHY acknowledges a memory controller-initiated DFI1 interface update request." line.long 0x14 "DDRPHYC_MASTER0_MASUPDFAILCTR,DDRPHYC MasUpdFailCtr register" hexmask.long.word 0x14 0.--15. 1. "MASUPDFAILCTR,This bit field increments whenever the PHY asserts a PHY master interface request but the memory controller does not acknowledge the request within the allowed interval (as per section 11 of the Preliminary DFI 4." line.long 0x18 "DDRPHYC_MASTER0_PHYUPD0FAILCTR,DDRPHYC PhyUpd0FailCtr register" hexmask.long.word 0x18 0.--15. 1. "PHYUPD0FAILCTR,This bit field increments whenever the PHY asserts a DFI0 interface update request but the memory controller does not acknowledge the request within the allowed interval (as per section 11 of the Preliminary DFI 4." line.long 0x1C "DDRPHYC_MASTER0_PHYUPD1FAILCTR,DDRPHYC PhyUpd1FailCtr register" hexmask.long.word 0x1C 0.--15. 1. "PHYUPD1FAILCTR,This bit field increments whenever the PHY asserts a DFI1 interface update request but the memory controller does not acknowledge the request within the allowed interval (as per section 11 of the Preliminary DFI 4." group.long 0x802F4++0x3 line.long 0x0 "DDRPHYC_MASTER0_PHYPERFCTRENABLE,DDRPHYC performance counter enable register" bitfld.long 0x0 7. "PHYUPD1FAILCTL,PHYUPD1FAILCTLR enable" "0,1" bitfld.long 0x0 6. "PHYUPD0FAILCTL,PHYUPD0FAILCTLR enable" "0,1" newline bitfld.long 0x0 5. "MASUPDFAILCTL,MASUPDFAILCTLR enable" "0,1" bitfld.long 0x0 4. "CTLUPD1GOODCTL,CTLUPD1GOODCTLR enable" "0,1" newline bitfld.long 0x0 3. "CTLUPD0GOODCTL,CTLUPD0GOODCTLR enable" "0,1" bitfld.long 0x0 2. "PHYUPD1GOODCTL,PHYUPD1GOODCTLR enable" "0,1" newline bitfld.long 0x0 1. "PHYUPD0GOODCTL,PHYUPD0GOODCTLR enable" "0,1" bitfld.long 0x0 0. "MASUPDGOODCTL,MASUPDGOODCTLR enable" "0,1" group.long 0x8030C++0x3 line.long 0x0 "DDRPHYC_MASTER0_PLLPWRDN,DDRPHYC PllPwrDn register" bitfld.long 0x0 0. "PLLPWRDN,This bit is written by the PIE and the data in here are overwritten." "0,1" group.long 0x80314++0xF line.long 0x0 "DDRPHYC_MASTER0_PLLCTRL2,DDRPHYC PState dependent PLL control 2 register" hexmask.long.byte 0x0 0.--4. 1. "PLLFREQSEL,Adjusts the loop parameters to compensate for different VCO bias points and input/output clock division ratios." line.long 0x4 "DDRPHYC_MASTER0_PLLCTRL0,DDRPHYC PLL control 0 register" bitfld.long 0x4 15. "PLLSPARECTRL0,Spare bits for PLL control" "0,1" bitfld.long 0x4 13.--14. "PLLLOCKPHSEL,Lock detect phase selection" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PLLLOCKCNTSEL,Lock detect counter selection" "B_0x0,B_0x1" bitfld.long 0x4 11. "PLLGEARSHIFT,PLL fast re-locking mode" "B_0x0,B_0x1" newline bitfld.long 0x4 8. "PLLSYNCBUSBYP,When asserted bypasses the Pll SyncPulse and uses a synchronizer of the same latency." "0,1" bitfld.long 0x4 7. "PLLSYNCBUSFLUSH,Used to flush the syncbus logic of the PLL during PHY initialization or LP3 exit sequence." "0,1" newline bitfld.long 0x4 5. "PLLBYPASSMODE,PLL bypass clock mux control" "0,1" bitfld.long 0x4 4. "PLLPRESET,PLL preset mode" "0,1" newline bitfld.long 0x4 3. "PLLOUTBYPEN,Controls the anti-glitch mux on the pllout_x1x2x4 path." "B_0x0,B_0x1" bitfld.long 0x4 2. "PLLX2MODE,Connects to x2_mode pins of PLL (pllout_x4x2 output frequency selection)." "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PLLSTANDBY,Connects directly to standby pin of the PLL." "0,1" line.long 0x8 "DDRPHYC_MASTER0_PLLCTRL1,DDRPHYC PState dependent PLL control 1 register" hexmask.long.byte 0x8 5.--8. 1. "PLLCPPROPCTRL,Connects directly to cp_prop_cntrlless than3:0> of the PLL." hexmask.long.byte 0x8 0.--4. 1. "PLLCPINTCTRL,Connects directly to cp_int_cntrlless than4:0> in the PLL." line.long 0xC "DDRPHYC_MASTER0_PLLTST,DDRPHYC PLL testing control register" hexmask.long.byte 0xC 5.--8. 1. "PLLDIGTSTSEL,Digital test mux select" hexmask.long.byte 0xC 1.--4. 1. "PLLANATSTSEL,Connects directly to pll_ana_test_selless than3:0> of PLL." newline bitfld.long 0xC 0. "PLLANATSTEN,Analog test port enable" "B_0x0,B_0x1" rgroup.long 0x80324++0x3 line.long 0x0 "DDRPHYC_MASTER0_PLLLOCKSTATUS,DDRPHYC PllLockStatus register" bitfld.long 0x0 0. "PLLLOCKSTATUS,Directly connected to the pll_Lock output" "0,1" group.long 0x80328++0xB line.long 0x0 "DDRPHYC_MASTER0_PLLTESTMODE,DDRPHYC PII TestMode register" hexmask.long.word 0x0 0.--15. 1. "PLLTESTMODE,Default values for this bit field must be used unless directed otherwise by Synopsys." line.long 0x4 "DDRPHYC_MASTER0_PLLCTRL3,DDRPHYC PLL control 3 register" bitfld.long 0x4 15. "PLLENCAL,None" "B_0x0,B_0x1" bitfld.long 0x4 14. "PLLFORCECAL,Connects directly to force_cal of PLL." "B_0x0,B_0x1" newline hexmask.long.byte 0x4 9.--13. 1. "PLLDACVALIN,Connects directly to dacval_inless than4:0> of PLL." hexmask.long.byte 0x4 4.--8. 1. "PLLMAXRANGE,Connects directly to maxrange of PLL." newline hexmask.long.byte 0x4 0.--3. 1. "PLLSPARE,Spare bits" line.long 0x8 "DDRPHYC_MASTER0_PLLCTRL4,DDRPHYC PState dependent PLL control 4 register" hexmask.long.byte 0x8 5.--8. 1. "PLLCPPROPGSCTRL,Connects directly to cp_prop_gs_cntrlless than3:0> of PLL." hexmask.long.byte 0x8 0.--4. 1. "PLLCPINTGSCTRL,Connects directly to cp_int_gs_cntrlless than4:0> in PLL." rgroup.long 0x80334++0xB line.long 0x0 "DDRPHYC_MASTER0_PLLENDOFCAL,DDRPHYC PllEndofCal register" bitfld.long 0x0 0. "PLLENDOFCAL,Directly connected to the PLL eoc output." "0,1" line.long 0x4 "DDRPHYC_MASTER0_PLLSTANDBYEFF,DDRPHYC PllStandbyEff register" bitfld.long 0x4 0. "PLLSTANDBYEFF,State off PLL standby (in PHY LP2 states)" "0,1" line.long 0x8 "DDRPHYC_MASTER0_PLLDACVALOUT,DDRPHYC PllDacValOut register" hexmask.long.byte 0x8 0.--4. 1. "PLLDACVALOUT,Directly connected to the PLL dacval_out output." group.long 0x8038C++0x3 line.long 0x0 "DDRPHYC_MASTER0_LCDLDBGCNTL,DDRPHYC LcdlDbgCntl register" hexmask.long.byte 0x0 12.--15. 1. "LCDLSTATUSSEL,Selection of the LCDL status" bitfld.long 0x0 11. "LCDLTSTENABLE,Debug/test operations enable" "0,1" newline bitfld.long 0x0 10. "LCDLFINESNAP,Latch enable for reading the present LCDL 1UI estimate code in LCDLFINESNAPVAL and the present phase-detector value in LCDLPHDSNAPVAL." "0,1" bitfld.long 0x0 9. "LCDLFINEOVR,Forces the value of the present LCDL 1UI estimate code to be LCDLFINEOVRVAL for all LCDLs." "0,1" newline hexmask.long.word 0x0 0.--8. 1. "LCDLFINEOVRVAL,Value forced as the initial value while LCDLTSTENABLE = 1 and LCDLFINEOVR" rgroup.long 0x80390++0x3 line.long 0x0 "DDRPHYC_MASTER0_ACLCDLSTATUS,DDRPHYC Debug status of the DBYTE LCDL register" bitfld.long 0x0 13. "ACLCDLLIVELOCK,Present value of whether the LCDL is locked" "0,1" bitfld.long 0x0 12. "ACLCDLSTICKYUNLOCK,Latched value of whether the LCDL ever lost lock after the assertion of LCDLTSTENABLE." "0,1" newline bitfld.long 0x0 11. "ACLCDLSTICKYLOCK,Latched value of whether the LCDL ever achieved lock after the assertion of LCDLTSTENABLE." "0,1" bitfld.long 0x0 10. "ACLCDLPHDSNAPVAL,Value of the LCDL phase-detector output latched by pulse on LCDLFINESNAP while LCDLTSTENABLE = 1." "0,1" newline hexmask.long.word 0x0 0.--9. 1. "ACLCDLFINESNAPVAL,Value of the LCDL 1UI estimate code latched by pulse on LCDLFINESNAP while LCDLTSTENABLE = 1." rgroup.long 0x803B4++0x7 line.long 0x0 "DDRPHYC_MASTER0_CUSTPHYREV,DDRPHYC CUSTPHYREV register" hexmask.long.byte 0x0 0.--5. 1. "CUSTPHYREV,Customer settable PHY version number" line.long 0x4 "DDRPHYC_MASTER0_PHYREV,DDRPHYC PHYREV register" hexmask.long.byte 0x4 8.--15. 1. "PHYMJR,PHY major revision" hexmask.long.byte 0x4 4.--7. 1. "PHYMDR,PHY moderate revision" newline hexmask.long.byte 0x4 0.--3. 1. "PHYMNR,PHY minor update" group.long 0x803BC++0x33 line.long 0x0 "DDRPHYC_MASTER0_LP3EXITSEQ0BSTARTVECTOR,DDRPHYC Start vector value for LP3-exit or init PIE sequence register" hexmask.long.byte 0x0 4.--7. 1. "LP3EXITSEQ0BSTARTVECPLLBYPASSED,PIE start vector value to be used for LP3 exit or init and target P-state has PLL bypassed" hexmask.long.byte 0x0 0.--3. 1. "LP3EXITSEQ0BSTARTVECPLLENABLED,PIE start vector value to be used for LP3 exit or init and target P-state has PLL enabled" line.long 0x4 "DDRPHYC_MASTER0_DFIFREQXLAT0,DDRPHYC DFI frequency translation 0 register" hexmask.long.byte 0x4 12.--15. 1. "DFIFREQXLATVAL3,Sequencer start vector used when dfi_freq value is 3" hexmask.long.byte 0x4 8.--11. 1. "DFIFREQXLATVAL2,Sequencer start vector used when dfi_freq value is 2" newline hexmask.long.byte 0x4 4.--7. 1. "DFIFREQXLATVAL1,Sequencer start vector used when dfi_freq value is 1" hexmask.long.byte 0x4 0.--3. 1. "DFIFREQXLATVAL0,Sequencer start vector used when dfi_freq value is 0" line.long 0x8 "DDRPHYC_MASTER0_DFIFREQXLAT1,DDRPHYC DFI frequency translation 1 register" hexmask.long.byte 0x8 12.--15. 1. "DFIFREQXLATVAL7,Sequencer start vector used when dfi_freq value is 7" hexmask.long.byte 0x8 8.--11. 1. "DFIFREQXLATVAL6,Sequencer start vector used when dfi_freq value is 6" newline hexmask.long.byte 0x8 4.--7. 1. "DFIFREQXLATVAL5,Sequencer start vector used when dfi_freq value is 5" hexmask.long.byte 0x8 0.--3. 1. "DFIFREQXLATVAL4,Sequencer start vector used when dfi_freq value is 4" line.long 0xC "DDRPHYC_MASTER0_DFIFREQXLAT2,DDRPHYC DFI frequency translation 2 register" hexmask.long.byte 0xC 12.--15. 1. "DFIFREQXLATVAL11,Sequencer start vector used when dfi_freq value is 11" hexmask.long.byte 0xC 8.--11. 1. "DFIFREQXLATVAL10,Sequencer start vector used when dfi_freq value is 10" newline hexmask.long.byte 0xC 4.--7. 1. "DFIFREQXLATVAL9,Sequencer start vector used when dfi_freq value is 9" hexmask.long.byte 0xC 0.--3. 1. "DFIFREQXLATVAL8,Sequencer start vector used when dfi_freq value is 8" line.long 0x10 "DDRPHYC_MASTER0_DFIFREQXLAT3,DDRPHYC DFI frequency translation 3 register" hexmask.long.byte 0x10 12.--15. 1. "DFIFREQXLATVAL15,Sequencer start vector used when dfi_freq value is 15" hexmask.long.byte 0x10 8.--11. 1. "DFIFREQXLATVAL14,Sequencer start vector used when dfi_freq value is 14" newline hexmask.long.byte 0x10 4.--7. 1. "DFIFREQXLATVAL13,Sequencer start vector used when dfi_freq value is 13" hexmask.long.byte 0x10 0.--3. 1. "DFIFREQXLATVAL12,Sequencer start vector used when dfi_freq value is 12" line.long 0x14 "DDRPHYC_MASTER0_DFIFREQXLAT4,DDRPHYC DFI frequency translation 4 register" hexmask.long.byte 0x14 12.--15. 1. "DFIFREQXLATVAL19,Sequencer start vector used when dfi_freq value is 19" hexmask.long.byte 0x14 8.--11. 1. "DFIFREQXLATVAL18,Sequencer start vector used when dfi_freq value is 18" newline hexmask.long.byte 0x14 4.--7. 1. "DFIFREQXLATVAL17,Sequencer start vector used when dfi_freq value is 17" hexmask.long.byte 0x14 0.--3. 1. "DFIFREQXLATVAL16,Sequencer start vector used when dfi_freq value is 16" line.long 0x18 "DDRPHYC_MASTER0_DFIFREQXLAT5,DDRPHYC DFI frequency translation 5 register" hexmask.long.byte 0x18 12.--15. 1. "DFIFREQXLATVAL23,Sequencer start vector used when dfi_freq value is 23" hexmask.long.byte 0x18 8.--11. 1. "DFIFREQXLATVAL22,Sequencer start vector used when dfi_freq value is 22" newline hexmask.long.byte 0x18 4.--7. 1. "DFIFREQXLATVAL21,Sequencer start vector used when dfi_freq value is 21" hexmask.long.byte 0x18 0.--3. 1. "DFIFREQXLATVAL20,Sequencer start vector used when dfi_freq value is 20" line.long 0x1C "DDRPHYC_MASTER0_DFIFREQXLAT6,DDRPHYC DFI frequency translation 6 register" hexmask.long.byte 0x1C 12.--15. 1. "DFIFREQXLATVAL27,Sequencer start vector used when dfi_freq value is 27" hexmask.long.byte 0x1C 8.--11. 1. "DFIFREQXLATVAL26,Sequencer start vector used when dfi_freq value is 26" newline hexmask.long.byte 0x1C 4.--7. 1. "DFIFREQXLATVAL25,Sequencer start vector used when dfi_freq value is 25" hexmask.long.byte 0x1C 0.--3. 1. "DFIFREQXLATVAL24,Sequencer start vector used when dfi_freq value is 24" line.long 0x20 "DDRPHYC_MASTER0_DFIFREQXLAT7,DDRPHYC DFI frequency translation 7 register" hexmask.long.byte 0x20 12.--15. 1. "DFIFREQXLATVAL31,Sequencer start vector used when dfi_freq value is 31" hexmask.long.byte 0x20 8.--11. 1. "DFIFREQXLATVAL30,Sequencer start vector used when dfi_freq value is 30" newline hexmask.long.byte 0x20 4.--7. 1. "DFIFREQXLATVAL29,Sequencer start vector used when dfi_freq value is 29" hexmask.long.byte 0x20 0.--3. 1. "DFIFREQXLATVAL28,Sequencer start vector used when dfi_freq value is 28" line.long 0x24 "DDRPHYC_MASTER0_TXRDPTRINIT,DDRPHYC TxRdPtrInit register" bitfld.long 0x24 0. "TXRDPTRINIT,This bit controls TxRdPtrInit and is meant to be written by the PState sequencer as part of the power state switching sequence." "0,1" line.long 0x28 "DDRPHYC_MASTER0_DFIINITCOMPLETE,DDRPHYC DfiInitComplete register" bitfld.long 0x28 0. "DFIINITCOMPLETE,This bit directly controls DfiInitComplete and is meant to be written by the PState sequencer as part of the power state switching sequence." "0,1" line.long 0x2C "DDRPHYC_MASTER0_DFIFREQRATIO,DDRPHYC DfiFreqRatio register" bitfld.long 0x2C 0.--1. "DFIFREQRATIO,Ratio DfiCtlClk:MemClk" "0,1,2,3" line.long 0x30 "DDRPHYC_MASTER0_RXFIFOCHECKS,DDRPHYC RxFifoCheck register" bitfld.long 0x30 0. "DOFREQUENTRXFIFOCHECKS,None" "B_0x0,B_0x1" group.long 0x803FC++0x23 line.long 0x0 "DDRPHYC_MASTER0_MTESTDTOCTRL,DDRPHYC MTestCombo output enable on core-side copy register" bitfld.long 0x0 0. "MTESTDTOEN,This bit is programmed as follows:" "0,1" line.long 0x4 "DDRPHYC_MASTER0_MAPCAA0TODFI,DDRPHYC MapCAA[0to7]toDfi register" hexmask.long.byte 0x4 0.--3. 1. "MAPCAATODFI,For LPDDR4 application this bit field maps a dfi0_address to CAA x." line.long 0x8 "DDRPHYC_MASTER0_MAPCAA1TODFI,DDRPHYC MapCAA[0to7]toDfi register" hexmask.long.byte 0x8 0.--3. 1. "MAPCAATODFI,For LPDDR4 application this bit field maps a dfi0_address to CAA x." line.long 0xC "DDRPHYC_MASTER0_MAPCAA2TODFI,DDRPHYC MapCAA[0to7]toDfi register" hexmask.long.byte 0xC 0.--3. 1. "MAPCAATODFI,For LPDDR4 application this bit field maps a dfi0_address to CAA x." line.long 0x10 "DDRPHYC_MASTER0_MAPCAA3TODFI,DDRPHYC MapCAA[0to7]toDfi register" hexmask.long.byte 0x10 0.--3. 1. "MAPCAATODFI,For LPDDR4 application this bit field maps a dfi0_address to CAA x." line.long 0x14 "DDRPHYC_MASTER0_MAPCAA4TODFI,DDRPHYC MapCAA[0to7]toDfi register" hexmask.long.byte 0x14 0.--3. 1. "MAPCAATODFI,For LPDDR4 application this bit field maps a dfi0_address to CAA x." line.long 0x18 "DDRPHYC_MASTER0_MAPCAA5TODFI,DDRPHYC MapCAA[0to7]toDfi register" hexmask.long.byte 0x18 0.--3. 1. "MAPCAATODFI,For LPDDR4 application this bit field maps a dfi0_address to CAA x." line.long 0x1C "DDRPHYC_MASTER0_MAPCAA6TODFI,DDRPHYC MapCAA[0to7]toDfi register" hexmask.long.byte 0x1C 0.--3. 1. "MAPCAATODFI,For LPDDR4 application this bit field maps a dfi0_address to CAA x." line.long 0x20 "DDRPHYC_MASTER0_MAPCAA7TODFI,DDRPHYC MapCAA[0to7]toDfi register" hexmask.long.byte 0x20 0.--3. 1. "MAPCAATODFI,For LPDDR4 application this bit field maps a dfi0_address to CAA x." group.long 0x80440++0x1F line.long 0x0 "DDRPHYC_MASTER0_MAPCAB0TODFI,DDRPHYC MapCAB[0to7]toDfi register" hexmask.long.byte 0x0 0.--3. 1. "MAPCABTODFI,For LPDDR4 application this bit field maps a dfi1_address to CAB x." line.long 0x4 "DDRPHYC_MASTER0_MAPCAB1TODFI,DDRPHYC MapCAB[0to7]toDfi register" hexmask.long.byte 0x4 0.--3. 1. "MAPCABTODFI,For LPDDR4 application this bit field maps a dfi1_address to CAB x." line.long 0x8 "DDRPHYC_MASTER0_MAPCAB2TODFI,DDRPHYC MapCAB[0to7]toDfi register" hexmask.long.byte 0x8 0.--3. 1. "MAPCABTODFI,For LPDDR4 application this bit field maps a dfi1_address to CAB x." line.long 0xC "DDRPHYC_MASTER0_MAPCAB3TODFI,DDRPHYC MapCAB[0to7]toDfi register" hexmask.long.byte 0xC 0.--3. 1. "MAPCABTODFI,For LPDDR4 application this bit field maps a dfi1_address to CAB x." line.long 0x10 "DDRPHYC_MASTER0_MAPCAB4TODFI,DDRPHYC MapCAB[0to7]toDfi register" hexmask.long.byte 0x10 0.--3. 1. "MAPCABTODFI,For LPDDR4 application this bit field maps a dfi1_address to CAB x." line.long 0x14 "DDRPHYC_MASTER0_MAPCAB5TODFI,DDRPHYC MapCAB[0to7]toDfi register" hexmask.long.byte 0x14 0.--3. 1. "MAPCABTODFI,For LPDDR4 application this bit field maps a dfi1_address to CAB x." line.long 0x18 "DDRPHYC_MASTER0_MAPCAB6TODFI,DDRPHYC MapCAB[0to7]toDfi register" hexmask.long.byte 0x18 0.--3. 1. "MAPCABTODFI,For LPDDR4 application this bit field maps a dfi1_address to CAB x." line.long 0x1C "DDRPHYC_MASTER0_MAPCAB7TODFI,DDRPHYC MapCAB[0to7]toDfi register" hexmask.long.byte 0x1C 0.--3. 1. "MAPCABTODFI,For LPDDR4 application this bit field maps a dfi1_address to CAB x." group.long 0x8046C++0xF line.long 0x0 "DDRPHYC_MASTER0_PHYINTERRUPTENABLE,DDRPHYC interrupt enable register" bitfld.long 0x0 10. "PHYRXFIFOCHECKEN,Rx FIFO pointer check interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8.--9. "PHYVTDRIFTALARMEN,PHY VT drift alarm interrupt enable" "B_0x0,B_0x1,?,?" newline bitfld.long 0x0 2. "PHYTRNGFAILEN,PHY training failure interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "PHYINITCMPLTEN,PHY initialization complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PHYTRNGCMPLTEN,PHY training complete interrupt enable" "B_0x0,B_0x1" line.long 0x4 "DDRPHYC_MASTER0_PHYINTERRUPTFWCONTROL,DDRPHYC interrupt firmware control register" bitfld.long 0x4 2. "PHYTRNGFAILFW,PHY training failure firmware interrupt" "B_0x0,B_0x1" bitfld.long 0x4 1. "PHYINITCMPLTFW,PHY initialization complete firmware interrupt" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PHYTRNGCMPLTFW,PHY training complete firmware interrupt" "B_0x0,B_0x1" line.long 0x8 "DDRPHYC_MASTER0_PHYINTERRUPTMASK,DDRPHYC interrupt mask register" bitfld.long 0x8 10. "PHYRXFIFOCHECKMSK,Mask for the Rx FIFO pointers check interrupt" "B_0x0,B_0x1" bitfld.long 0x8 8.--9. "PHYVTDRIFTALARMMSK,Mask for the PHY VT drift alarm interrupts" "B_0x0,B_0x1,?,?" newline bitfld.long 0x8 2. "PHYTRNGFAILMSK,Mask for the PHY training failure interrupt" "B_0x0,B_0x1" bitfld.long 0x8 1. "PHYINITCMPLTMSK,Mask for the PHY initialization complete interrupt" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PHYTRNGCMPLTMSK,Mask for the PHY training complete interrupt" "B_0x0,B_0x1" line.long 0xC "DDRPHYC_MASTER0_PHYINTERRUPTCLEAR,DDRPHYC interrupt clear register" bitfld.long 0xC 10. "PHYRXFIFOCHECKCLR,Rx FIFO pointers check interrupt clear" "B_0x0,B_0x1" bitfld.long 0xC 8.--9. "PHYVTDRIFTALARMCLR,PHY VT drift alarm interrupt clear" "B_0x0,B_0x1,?,?" newline bitfld.long 0xC 2. "PHYTRNGFAILCLR,PHY training failure interrupt clear" "B_0x0,B_0x1" bitfld.long 0xC 1. "PHYINITCMPLTCLR,PHY initialization complete interrupt clear" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PHYTRNGCMPLTCLR,PHY training complete interrupt clear" "B_0x0,B_0x1" rgroup.long 0x8047C++0x3 line.long 0x0 "DDRPHYC_MASTER0_PHYINTERRUPTSTATUS,DDRPHYC interrupt status register" bitfld.long 0x0 10. "PHYRXFIFOCHECK,A mechanism in the PHY checks the read FIFO pointers for consistency at times they are idle." "B_0x0,B_0x1" bitfld.long 0x0 8.--9. "VTDRIFTALARM,PHY VT drift alarm interrupt" "B_0x0,B_0x1,?,?" newline bitfld.long 0x0 2. "PHYTRNGFAIL,PHY training failure interrupt" "B_0x0,B_0x1" bitfld.long 0x0 1. "PHYINITCMPLT,PHY initialization complete interrupt" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PHYTRNGCMPLT,PHY training complete interrupt" "B_0x0,B_0x1" group.long 0x80480++0x47 line.long 0x0 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS0,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x0 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x4 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS1,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x4 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x8 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS2,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x8 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0xC "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS3,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0xC 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x10 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS4,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x10 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x14 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS5,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x14 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x18 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS6,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x18 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x1C "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS7,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x1C 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x20 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS8,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x20 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x24 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS9,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x24 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x28 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS10,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x28 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x2C "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS11,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x2C 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x30 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS12,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x30 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x34 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS13,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x34 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x38 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS14,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x38 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x3C "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS15,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x3C 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x40 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS16,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x40 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x44 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS17,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x44 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" group.long 0x804C4++0x27 line.long 0x0 "DDRPHYC_MASTER0_HWTSWIZZLEHWTACTN,DDRPHYC HwtSwizzleHwtActN register" hexmask.long.byte 0x0 0.--4. 1. "HWTSWIZZLEHWTACTN,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." line.long 0x4 "DDRPHYC_MASTER0_HWTSWIZZLEHWTBANK0,DDRPHYC HwtSwizzleHwtBank0 register" hexmask.long.byte 0x4 0.--4. 1. "HWTSWIZZLEHWTBANK0,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." line.long 0x8 "DDRPHYC_MASTER0_HWTSWIZZLEHWTBANK1,DDRPHYC HwtSwizzleHwtBank1 register" hexmask.long.byte 0x8 0.--4. 1. "HWTSWIZZLEHWTBANK1,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." line.long 0xC "DDRPHYC_MASTER0_HWTSWIZZLEHWTBANK2,DDRPHYC HwtSwizzleHwtBank2 register" hexmask.long.byte 0xC 0.--4. 1. "HWTSWIZZLEHWTBANK2,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." line.long 0x10 "DDRPHYC_MASTER0_HWTSWIZZLEHWTBG0,DDRPHYC HwtSwizzleHwtBg0 register" hexmask.long.byte 0x10 0.--4. 1. "HWTSWIZZLEHWTBG0,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." line.long 0x14 "DDRPHYC_MASTER0_HWTSWIZZLEHWTBG1,DDRPHYC HwtSwizzleHwtBg1 register" hexmask.long.byte 0x14 0.--4. 1. "HWTSWIZZLEHWTBG1,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." line.long 0x18 "DDRPHYC_MASTER0_HWTSWIZZLEHWTCASN,DDRPHYC HwtSwizzleHwtCasN register" hexmask.long.byte 0x18 0.--4. 1. "HWTSWIZZLEHWTCASN,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." line.long 0x1C "DDRPHYC_MASTER0_HWTSWIZZLEHWTRASN,DDRPHYC HwtSwizzleHwtRasN register" hexmask.long.byte 0x1C 0.--4. 1. "HWTSWIZZLEHWTRASN,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." line.long 0x20 "DDRPHYC_MASTER0_HWTSWIZZLEHWTWEN,DDRPHYC HwtSwizzleHwtWeN register" hexmask.long.byte 0x20 0.--4. 1. "HWTSWIZZLEHWTWEN,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." line.long 0x24 "DDRPHYC_MASTER0_HWTSWIZZLEHWTPARITYIN,DDRPHYC HwtSwizzleHwtParityIn register" hexmask.long.byte 0x24 0.--4. 1. "HWTSWIZZLEHWTPARITYIN,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." group.long 0x804F0++0x7 line.long 0x0 "DDRPHYC_MASTER0_DFIHANDSHAKEDELAYS0,DDRPHYC small delays on handshake signals register 0" hexmask.long.byte 0x0 12.--15. 1. "CTRLUPDREQDELAY0,Adds 0-15 DfiClks of delay after the PHY completes all PHY update activities before deasserting dfi0_ctrlupd_ack." hexmask.long.byte 0x0 8.--11. 1. "CTRLUPDACKDELAY0,Adds 0-15 DfiClks of delay after dfi0_ctrlupd_req asserts before the PHY takes any action." newline hexmask.long.byte 0x0 4.--7. 1. "PHYUPDREQDELAY0,Adds 0-15 DfiClks of delay after the PHY completes all PHY update activities before deasserting dfi0_phyupd_req." hexmask.long.byte 0x0 0.--3. 1. "PHYUPDACKDELAY0,Adds 0-15 DfiClks of delay after dfi0_phyupd_ack asserts before the PHY takes any action (such as starting DDL calibration)." line.long 0x4 "DDRPHYC_MASTER0_DFIHANDSHAKEDELAYS1,DDRPHYC small delays on handshake signals register 1" hexmask.long.byte 0x4 12.--15. 1. "CTRLUPDREQDELAY1,Adds 0-15 DfiClks of delay after the PHY completes all PHY update activities before deasserting dfi1_ctrlupd_ack." hexmask.long.byte 0x4 8.--11. 1. "CTRLUPDACKDELAY1,Adds 0-15 DfiClks of delay after dfi1_ctrlupd_req asserts before the PHY takes any action." newline hexmask.long.byte 0x4 4.--7. 1. "PHYUPDREQDELAY1,Adds 0-15 DfiClks of delay after the PHY completes all PHY update activities before deasserting dfi1_phyupd_req." hexmask.long.byte 0x4 0.--3. 1. "PHYUPDACKDELAY1,Adds 0-15 DfiClks of delay after dfi1_phyupd_ack asserts before the PHY takes any action (such as starting DDL calibration)." rgroup.long 0x804F8++0x3 line.long 0x0 "DDRPHYC_MASTER0_REMOTEIMPCAL,DDRPHYC remote impedance calibration status register" bitfld.long 0x0 1. "SLAVECODEUPDATED,- if DWC_DDRPHY_REMOTE_IMP_CAL is defined this bit is set by hardware when" "0,1" bitfld.long 0x0 0. "CALIBSLAVE,- if DWC_DDRPHY_REMOTE_IMP_CAL is defined this bit is set by hardware when" "0,1" rgroup.long 0x2400A0++0x3 line.long 0x0 "DDRPHYC_INITENG0_PHYINLP3,DDRPHYC PhyInLP3 register" bitfld.long 0x0 0. "PHYINLP3,This bit is set by the PIE once the LP3 entry sequence is completed." "0,1" group.long 0x300200++0x7 line.long 0x0 "DDRPHYC_DRTUB0_UCCLKHCLKENABLES,DDRPHYC Ucclk and Hclk enable register" bitfld.long 0x0 1. "HCLKEN,When the training is complete (and assuming no further need for training hardware) this bit must be cleared to reduce power." "0,1" bitfld.long 0x0 0. "UCCLKEN,When the training is complete (and assuming no further need for the microcontroller) this bit must be cleared to reduce power." "0,1" line.long 0x4 "DDRPHYC_DRTUB0_CURPSTATE0B,DDRPHYC CurPstate0b register" hexmask.long.byte 0x4 0.--3. 1. "CURPSTATE0B,PIE current PState" rgroup.long 0x3003B4++0x7 line.long 0x0 "DDRPHYC_DRTUB0_CUSTPUBREV,DDRPHYC CUSTPUBREV register" hexmask.long.byte 0x0 0.--5. 1. "CUSTPUBREV,Customer settable PUB version number" line.long 0x4 "DDRPHYC_DRTUB0_PUBREV,DDRPHYC PUBREV register" hexmask.long.byte 0x4 8.--15. 1. "PUBMJR,PUB major revision" hexmask.long.byte 0x4 4.--7. 1. "PUBMDR,PUB moderate revision" newline hexmask.long.byte 0x4 0.--3. 1. "PUBMNR,PUB minor revision" group.long 0x340000++0x3 line.long 0x0 "DDRPHYC_APBONLY0_MICROCONTMUXSEL,DDRPHYC MicroContMuxSel register" bitfld.long 0x0 0. "MICROCONTMUXSEL,Controls access to the PHY configuration registers." "B_0x0,B_0x1" rgroup.long 0x340010++0x3 line.long 0x0 "DDRPHYC_APBONLY0_UCTSHADOWREGS,DDRPHYC PMU/controller protocol. controller read-only shadow register" bitfld.long 0x0 0. "UCTWRITEPROTSHADOW,None" "B_0x0,?" group.long 0x3400C4++0x3 line.long 0x0 "DDRPHYC_APBONLY0_DCTWRITEPROT,DDRPHYC DctWriteProt register" bitfld.long 0x0 0. "DCTWRITEPROT,By clearing this bit the user acknowledges the receipt of the message." "0,1" rgroup.long 0x3400C8++0x3 line.long 0x0 "DDRPHYC_APBONLY0_UCTWRITEONLYSHADOW,DDRPHYC UctWriteOnlyShadow register" hexmask.long.word 0x0 0.--15. 1. "UCTWRITEONLYSHADOW,Used to pass the message ID for major messages and to pass the lower 16 bits for streaming messages." rgroup.long 0x3400D0++0x3 line.long 0x0 "DDRPHYC_APBONLY0_UCTDATWRITEONLYSHADOW,DDRPHYC UctDatWriteOnlyShadow register" hexmask.long.word 0x0 0.--15. 1. "UCTDATWRITEONLYSHADOW,Used to pass the upper 16 bits for streaming messages." group.long 0x3400DC++0x3 line.long 0x0 "DDRPHYC_APBONLY0_DFICFGRDDATAVALIDTICKS,DDRPHYC DfiCfgRdDataValidTicks register" hexmask.long.byte 0x0 0.--5. 1. "DFICFGRDDATAVALIDTICKS,Round trip delay of a register read access" group.long 0x340264++0x3 line.long 0x0 "DDRPHYC_APBONLY0_MICRORESET,DDRPHYC reset and clock shutdown control register" bitfld.long 0x0 3. "RESETTOMICRO,This bit is programmable as follows:" "0,1" bitfld.long 0x0 1. "TESTWAKEUP,Reserved must always be set to 0." "0,1" newline bitfld.long 0x0 0. "STALLTOMICRO,This bit is programmable as follows:" "0,1" rgroup.long 0x3403E8++0x3 line.long 0x0 "DDRPHYC_APBONLY0_DFIINITCOMPLETESHADOW,DDRPHYC DfiInitCompleteShadow register" bitfld.long 0x0 0. "DFIINITCOMPLETESHADOW,This bit presents a read-only view (a shadow) of DfiInitComplete which is used by the sequencer to control the state of dfi_init_complete." "0,1" tree.end tree "DDRPHYC_S" base ad:0x58C00000 group.long 0x68++0x3 line.long 0x0 "DDRPHYC_ANIB0_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x9C++0x7 line.long 0x0 "DDRPHYC_ANIB0_AFORCEDRVCONT,DDRPHYC AForceDrvCont register" hexmask.long.byte 0x0 0.--3. 1. "AFORCEDRVCONT,Forces continuous drive per-lane of the ACX4 instance controlled by this register." line.long 0x4 "DDRPHYC_ANIB0_AFORCETRICONT,DDRPHYC AForceTriCont register" hexmask.long.byte 0x4 0.--3. 1. "AFORCETRICONT,Forces tristate control per-lane of the ACX4 instance controlled by this register." group.long 0x10C++0x3 line.long 0x0 "DDRPHYC_ANIB0_ATXIMPEDANCE,DDRPHYC address T0 impedance control register" hexmask.long.byte 0x0 5.--9. 1. "ADRVSTRENN,5-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x0 0.--4. 1. "ADRVSTRENP,5-bit bus used to select the target pull-up output impedance" rgroup.long 0x14C++0x3 line.long 0x0 "DDRPHYC_ANIB0_ATESTPRBSERR,DDRPHYC ATestPrbsErr register" hexmask.long.byte 0x0 0.--3. 1. "ATESTPRBSERR,Overall error indicator for each PRBS bump checker" group.long 0x154++0x3 line.long 0x0 "DDRPHYC_ANIB0_ATXSLEWRATE,DDRPHYC address T0 slew rate and predriver control register" bitfld.long 0x0 8.--10. "ATXPREDRVMODE,Controls predrivers to adjust timing of turn-on/-off of pull-up/-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "ATXPREN,4-bit binary trim for the driver pull-down slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "ATXPREP,4-bit binary trim for the driver pull-up slew rate" rgroup.long 0x158++0x3 line.long 0x0 "DDRPHYC_ANIB0_ATESTPRBSERRCNT,DDRPHYC ATestPrbsErrCnt register" hexmask.long.word 0x0 0.--15. 1. "ATESTPRBSERRCNT,Overall error indicator for each PRBS bump checker" group.long 0x200++0x3 line.long 0x0 "DDRPHYC_ANIB0_ATXDLY,DDRPHYC ATxDly register" hexmask.long.byte 0x0 0.--6. 1. "ATXDLY,Trained for LPDDR4 to generate timed address and command signals" group.long 0x4068++0x3 line.long 0x0 "DDRPHYC_ANIB1_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x409C++0x7 line.long 0x0 "DDRPHYC_ANIB1_AFORCEDRVCONT,DDRPHYC AForceDrvCont register" hexmask.long.byte 0x0 0.--3. 1. "AFORCEDRVCONT,Forces continuous drive per-lane of the ACX4 instance controlled by this register." line.long 0x4 "DDRPHYC_ANIB1_AFORCETRICONT,DDRPHYC AForceTriCont register" hexmask.long.byte 0x4 0.--3. 1. "AFORCETRICONT,Forces tristate control per-lane of the ACX4 instance controlled by this register." group.long 0x410C++0x3 line.long 0x0 "DDRPHYC_ANIB1_ATXIMPEDANCE,DDRPHYC address T1 impedance control register" hexmask.long.byte 0x0 5.--9. 1. "ADRVSTRENN,5-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x0 0.--4. 1. "ADRVSTRENP,5-bit bus used to select the target pull-up output impedance" rgroup.long 0x414C++0x3 line.long 0x0 "DDRPHYC_ANIB1_ATESTPRBSERR,DDRPHYC ATestPrbsErr register" hexmask.long.byte 0x0 0.--3. 1. "ATESTPRBSERR,Overall error indicator for each PRBS bump checker" group.long 0x4154++0x3 line.long 0x0 "DDRPHYC_ANIB1_ATXSLEWRATE,DDRPHYC address T1 slew rate and predriver control register" bitfld.long 0x0 8.--10. "ATXPREDRVMODE,Controls predrivers to adjust timing of turn-on/-off of pull-up/-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "ATXPREN,4-bit binary trim for the driver pull-down slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "ATXPREP,4-bit binary trim for the driver pull-up slew rate" rgroup.long 0x4158++0x3 line.long 0x0 "DDRPHYC_ANIB1_ATESTPRBSERRCNT,DDRPHYC ATestPrbsErrCnt register" hexmask.long.word 0x0 0.--15. 1. "ATESTPRBSERRCNT,Overall error indicator for each PRBS bump checker" group.long 0x4200++0x3 line.long 0x0 "DDRPHYC_ANIB1_ATXDLY,DDRPHYC ATxDly register" hexmask.long.byte 0x0 0.--6. 1. "ATXDLY,Trained for LPDDR4 to generate timed address and command signals" group.long 0x8068++0x3 line.long 0x0 "DDRPHYC_ANIB2_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x809C++0x7 line.long 0x0 "DDRPHYC_ANIB2_AFORCEDRVCONT,DDRPHYC AForceDrvCont register" hexmask.long.byte 0x0 0.--3. 1. "AFORCEDRVCONT,Forces continuous drive per-lane of the ACX4 instance controlled by this register." line.long 0x4 "DDRPHYC_ANIB2_AFORCETRICONT,DDRPHYC AForceTriCont register" hexmask.long.byte 0x4 0.--3. 1. "AFORCETRICONT,Forces tristate control per-lane of the ACX4 instance controlled by this register." group.long 0x810C++0x3 line.long 0x0 "DDRPHYC_ANIB2_ATXIMPEDANCE,DDRPHYC address T2 impedance control register" hexmask.long.byte 0x0 5.--9. 1. "ADRVSTRENN,5-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x0 0.--4. 1. "ADRVSTRENP,5-bit bus used to select the target pull-up output impedance" rgroup.long 0x814C++0x3 line.long 0x0 "DDRPHYC_ANIB2_ATESTPRBSERR,DDRPHYC ATestPrbsErr register" hexmask.long.byte 0x0 0.--3. 1. "ATESTPRBSERR,Overall error indicator for each PRBS bump checker" group.long 0x8154++0x3 line.long 0x0 "DDRPHYC_ANIB2_ATXSLEWRATE,DDRPHYC address T2 slew rate and predriver control register" bitfld.long 0x0 8.--10. "ATXPREDRVMODE,Controls predrivers to adjust timing of turn-on/-off of pull-up/-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "ATXPREN,4-bit binary trim for the driver pull-down slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "ATXPREP,4-bit binary trim for the driver pull-up slew rate" rgroup.long 0x8158++0x3 line.long 0x0 "DDRPHYC_ANIB2_ATESTPRBSERRCNT,DDRPHYC ATestPrbsErrCnt register" hexmask.long.word 0x0 0.--15. 1. "ATESTPRBSERRCNT,Overall error indicator for each PRBS bump checker" group.long 0x8200++0x3 line.long 0x0 "DDRPHYC_ANIB2_ATXDLY,DDRPHYC ATxDly register" hexmask.long.byte 0x0 0.--6. 1. "ATXDLY,Trained for LPDDR4 to generate timed address and command signals" group.long 0xC068++0x3 line.long 0x0 "DDRPHYC_ANIB3_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0xC09C++0x7 line.long 0x0 "DDRPHYC_ANIB3_AFORCEDRVCONT,DDRPHYC AForceDrvCont register" hexmask.long.byte 0x0 0.--3. 1. "AFORCEDRVCONT,Forces continuous drive per-lane of the ACX4 instance controlled by this register." line.long 0x4 "DDRPHYC_ANIB3_AFORCETRICONT,DDRPHYC AForceTriCont register" hexmask.long.byte 0x4 0.--3. 1. "AFORCETRICONT,Forces tristate control per-lane of the ACX4 instance controlled by this register." group.long 0xC10C++0x3 line.long 0x0 "DDRPHYC_ANIB3_ATXIMPEDANCE,DDRPHYC address T3 impedance control register" hexmask.long.byte 0x0 5.--9. 1. "ADRVSTRENN,5-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x0 0.--4. 1. "ADRVSTRENP,5-bit bus used to select the target pull-up output impedance" rgroup.long 0xC14C++0x3 line.long 0x0 "DDRPHYC_ANIB3_ATESTPRBSERR,DDRPHYC ATestPrbsErr register" hexmask.long.byte 0x0 0.--3. 1. "ATESTPRBSERR,Overall error indicator for each PRBS bump checker" group.long 0xC154++0x3 line.long 0x0 "DDRPHYC_ANIB3_ATXSLEWRATE,DDRPHYC address T3 slew rate and predriver control register" bitfld.long 0x0 8.--10. "ATXPREDRVMODE,Controls predrivers to adjust timing of turn-on/-off of pull-up/-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "ATXPREN,4-bit binary trim for the driver pull-down slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "ATXPREP,4-bit binary trim for the driver pull-up slew rate" rgroup.long 0xC158++0x3 line.long 0x0 "DDRPHYC_ANIB3_ATESTPRBSERRCNT,DDRPHYC ATestPrbsErrCnt register" hexmask.long.word 0x0 0.--15. 1. "ATESTPRBSERRCNT,Overall error indicator for each PRBS bump checker" group.long 0xC200++0x3 line.long 0x0 "DDRPHYC_ANIB3_ATXDLY,DDRPHYC ATxDly register" hexmask.long.byte 0x0 0.--6. 1. "ATXDLY,Trained for LPDDR4 to generate timed address and command signals" group.long 0x10068++0x3 line.long 0x0 "DDRPHYC_ANIB4_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x1009C++0x7 line.long 0x0 "DDRPHYC_ANIB4_AFORCEDRVCONT,DDRPHYC AForceDrvCont register" hexmask.long.byte 0x0 0.--3. 1. "AFORCEDRVCONT,Forces continuous drive per-lane of the ACX4 instance controlled by this register." line.long 0x4 "DDRPHYC_ANIB4_AFORCETRICONT,DDRPHYC AForceTriCont register" hexmask.long.byte 0x4 0.--3. 1. "AFORCETRICONT,Forces tristate control per-lane of the ACX4 instance controlled by this register." group.long 0x1010C++0x3 line.long 0x0 "DDRPHYC_ANIB4_ATXIMPEDANCE,DDRPHYC address T4 impedance control register" hexmask.long.byte 0x0 5.--9. 1. "ADRVSTRENN,5-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x0 0.--4. 1. "ADRVSTRENP,5-bit bus used to select the target pull-up output impedance" rgroup.long 0x1014C++0x3 line.long 0x0 "DDRPHYC_ANIB4_ATESTPRBSERR,DDRPHYC ATestPrbsErr register" hexmask.long.byte 0x0 0.--3. 1. "ATESTPRBSERR,Overall error indicator for each PRBS bump checker" group.long 0x10154++0x3 line.long 0x0 "DDRPHYC_ANIB4_ATXSLEWRATE,DDRPHYC address T4 slew rate and predriver control register" bitfld.long 0x0 8.--10. "ATXPREDRVMODE,Controls predrivers to adjust timing of turn-on/-off of pull-up/-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "ATXPREN,4-bit binary trim for the driver pull-down slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "ATXPREP,4-bit binary trim for the driver pull-up slew rate" rgroup.long 0x10158++0x3 line.long 0x0 "DDRPHYC_ANIB4_ATESTPRBSERRCNT,DDRPHYC ATestPrbsErrCnt register" hexmask.long.word 0x0 0.--15. 1. "ATESTPRBSERRCNT,Overall error indicator for each PRBS bump checker" group.long 0x10200++0x3 line.long 0x0 "DDRPHYC_ANIB4_ATXDLY,DDRPHYC ATxDly register" hexmask.long.byte 0x0 0.--6. 1. "ATXDLY,Trained for LPDDR4 to generate timed address and command signals" group.long 0x14068++0x3 line.long 0x0 "DDRPHYC_ANIB5_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x1409C++0x7 line.long 0x0 "DDRPHYC_ANIB5_AFORCEDRVCONT,DDRPHYC AForceDrvCont register" hexmask.long.byte 0x0 0.--3. 1. "AFORCEDRVCONT,Forces continuous drive per-lane of the ACX4 instance controlled by this register." line.long 0x4 "DDRPHYC_ANIB5_AFORCETRICONT,DDRPHYC AForceTriCont register" hexmask.long.byte 0x4 0.--3. 1. "AFORCETRICONT,Forces tristate control per-lane of the ACX4 instance controlled by this register." group.long 0x1410C++0x3 line.long 0x0 "DDRPHYC_ANIB5_ATXIMPEDANCE,DDRPHYC address T5 impedance control register" hexmask.long.byte 0x0 5.--9. 1. "ADRVSTRENN,5-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x0 0.--4. 1. "ADRVSTRENP,5-bit bus used to select the target pull-up output impedance" rgroup.long 0x1414C++0x3 line.long 0x0 "DDRPHYC_ANIB5_ATESTPRBSERR,DDRPHYC ATestPrbsErr register" hexmask.long.byte 0x0 0.--3. 1. "ATESTPRBSERR,Overall error indicator for each PRBS bump checker" group.long 0x14154++0x3 line.long 0x0 "DDRPHYC_ANIB5_ATXSLEWRATE,DDRPHYC address T5 slew rate and predriver control register" bitfld.long 0x0 8.--10. "ATXPREDRVMODE,Controls predrivers to adjust timing of turn-on/-off of pull-up/-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "ATXPREN,4-bit binary trim for the driver pull-down slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "ATXPREP,4-bit binary trim for the driver pull-up slew rate" rgroup.long 0x14158++0x3 line.long 0x0 "DDRPHYC_ANIB5_ATESTPRBSERRCNT,DDRPHYC ATestPrbsErrCnt register" hexmask.long.word 0x0 0.--15. 1. "ATESTPRBSERRCNT,Overall error indicator for each PRBS bump checker" group.long 0x14200++0x3 line.long 0x0 "DDRPHYC_ANIB5_ATXDLY,DDRPHYC ATxDly register" hexmask.long.byte 0x0 0.--6. 1. "ATXDLY,Trained for LPDDR4 to generate timed address and command signals" group.long 0x18068++0x3 line.long 0x0 "DDRPHYC_ANIB6_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x1809C++0x7 line.long 0x0 "DDRPHYC_ANIB6_AFORCEDRVCONT,DDRPHYC AForceDrvCont register" hexmask.long.byte 0x0 0.--3. 1. "AFORCEDRVCONT,Forces continuous drive per-lane of the ACX4 instance controlled by this register." line.long 0x4 "DDRPHYC_ANIB6_AFORCETRICONT,DDRPHYC AForceTriCont register" hexmask.long.byte 0x4 0.--3. 1. "AFORCETRICONT,Forces tristate control per-lane of the ACX4 instance controlled by this register." group.long 0x1810C++0x3 line.long 0x0 "DDRPHYC_ANIB6_ATXIMPEDANCE,DDRPHYC address T6 impedance control register" hexmask.long.byte 0x0 5.--9. 1. "ADRVSTRENN,5-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x0 0.--4. 1. "ADRVSTRENP,5-bit bus used to select the target pull-up output impedance" rgroup.long 0x1814C++0x3 line.long 0x0 "DDRPHYC_ANIB6_ATESTPRBSERR,DDRPHYC ATestPrbsErr register" hexmask.long.byte 0x0 0.--3. 1. "ATESTPRBSERR,Overall error indicator for each PRBS bump checker" group.long 0x18154++0x3 line.long 0x0 "DDRPHYC_ANIB6_ATXSLEWRATE,DDRPHYC address T6 slew rate and predriver control register" bitfld.long 0x0 8.--10. "ATXPREDRVMODE,Controls predrivers to adjust timing of turn-on/-off of pull-up/-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "ATXPREN,4-bit binary trim for the driver pull-down slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "ATXPREP,4-bit binary trim for the driver pull-up slew rate" rgroup.long 0x18158++0x3 line.long 0x0 "DDRPHYC_ANIB6_ATESTPRBSERRCNT,DDRPHYC ATestPrbsErrCnt register" hexmask.long.word 0x0 0.--15. 1. "ATESTPRBSERRCNT,Overall error indicator for each PRBS bump checker" group.long 0x18200++0x3 line.long 0x0 "DDRPHYC_ANIB6_ATXDLY,DDRPHYC ATxDly register" hexmask.long.byte 0x0 0.--6. 1. "ATXDLY,Trained for LPDDR4 to generate timed address and command signals" group.long 0x1C068++0x3 line.long 0x0 "DDRPHYC_ANIB7_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x1C09C++0x7 line.long 0x0 "DDRPHYC_ANIB7_AFORCEDRVCONT,DDRPHYC AForceDrvCont register" hexmask.long.byte 0x0 0.--3. 1. "AFORCEDRVCONT,Forces continuous drive per-lane of the ACX4 instance controlled by this register." line.long 0x4 "DDRPHYC_ANIB7_AFORCETRICONT,DDRPHYC AForceTriCont register" hexmask.long.byte 0x4 0.--3. 1. "AFORCETRICONT,Forces tristate control per-lane of the ACX4 instance controlled by this register." group.long 0x1C10C++0x3 line.long 0x0 "DDRPHYC_ANIB7_ATXIMPEDANCE,DDRPHYC address T7 impedance control register" hexmask.long.byte 0x0 5.--9. 1. "ADRVSTRENN,5-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x0 0.--4. 1. "ADRVSTRENP,5-bit bus used to select the target pull-up output impedance" rgroup.long 0x1C14C++0x3 line.long 0x0 "DDRPHYC_ANIB7_ATESTPRBSERR,DDRPHYC ATestPrbsErr register" hexmask.long.byte 0x0 0.--3. 1. "ATESTPRBSERR,Overall error indicator for each PRBS bump checker" group.long 0x1C154++0x3 line.long 0x0 "DDRPHYC_ANIB7_ATXSLEWRATE,DDRPHYC address T7 slew rate and predriver control register" bitfld.long 0x0 8.--10. "ATXPREDRVMODE,Controls predrivers to adjust timing of turn-on/-off of pull-up/-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "ATXPREN,4-bit binary trim for the driver pull-down slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "ATXPREP,4-bit binary trim for the driver pull-up slew rate" rgroup.long 0x1C158++0x3 line.long 0x0 "DDRPHYC_ANIB7_ATESTPRBSERRCNT,DDRPHYC ATestPrbsErrCnt register" hexmask.long.word 0x0 0.--15. 1. "ATESTPRBSERRCNT,Overall error indicator for each PRBS bump checker" group.long 0x1C200++0x3 line.long 0x0 "DDRPHYC_ANIB7_ATXDLY,DDRPHYC ATxDly register" hexmask.long.byte 0x0 0.--6. 1. "ATXDLY,Trained for LPDDR4 to generate timed address and command signals" group.long 0x40000++0x3 line.long 0x0 "DDRPHYC_DBYTE0_DBYTEMISCMODE,DDRPHYC DBYTE module disable register" bitfld.long 0x0 2. "DBYTEDISABLE,DBYTE disable" "B_0x0,B_0x1" group.long 0x40068++0x3 line.long 0x0 "DDRPHYC_DBYTE0_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x40080++0x3 line.long 0x0 "DDRPHYC_DBYTE0_DFIMRL,DDRPHYC DFIMRL register" hexmask.long.byte 0x0 0.--4. 1. "DFIMRL,DFI maximum read latency (MRL)" group.long 0x40100++0x7 line.long 0x0 "DDRPHYC_DBYTE0_VREFDAC0_R0,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" line.long 0x4 "DDRPHYC_DBYTE0_TXIMPEDANCECTRL0_B0,DDRPHYC data T0 impedance controls register" hexmask.long.byte 0x4 6.--11. 1. "DRVSTRENDQN,6-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x4 0.--5. 1. "DRVSTRENDQP,6-bit bus used to select the target pull-down output impedance" group.long 0x4010C++0x3 line.long 0x0 "DDRPHYC_DBYTE0_DQDQSRCVCNTRL_B0,DDRPHYC DQ/DQS receiver control register" hexmask.long.byte 0x0 7.--11. 1. "GAINCURRADJ,Adjusts gain current of RX amplifier stage." bitfld.long 0x0 4.--6. "MAJORMODEDBYTE,Selection of the major mode of operation for the receiver" "B_0x0,?,B_0x2,B_0x3,?,?,?,?" newline bitfld.long 0x0 2.--3. "DFECTRL,Note: These settings are determined by PHY training firmware and must not be overridden." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "EXTVREFRANGE,Extends the range available in the local per-bit VREF generator." "0,1" newline bitfld.long 0x0 0. "SELANALOGVREF,Setting this bit forces the local per-bit Vless thansub>REFless than/sub> generator to pass the global VREFA" "0,1" group.long 0x40128++0x3 line.long 0x0 "DDRPHYC_DBYTE0_DQDQSRCVCNTRL1,DDRPHYC DQ/DQS receiver control register" bitfld.long 0x0 11. "ENLPREQPDR,not used" "0,1" bitfld.long 0x0 10. "RXPADSTANDBYEN,Enables rxdq/rxdqs Standby power savings per pad-group." "0,1" newline bitfld.long 0x0 9. "POWERDOWNRCVRDQS,Active high signal which powers down the receiver" "0,1" hexmask.long.word 0x0 0.--8. 1. "POWERDOWNRCVR,Active high signal which powers down the receiver" group.long 0x40130++0x7 line.long 0x0 "DDRPHYC_DBYTE0_DQDQSRCVCNTRL2,DDRPHYC DQ/DQS receiver control register" bitfld.long 0x0 0. "ENRXAGRESSIVEPDR,None" "0,1" line.long 0x4 "DDRPHYC_DBYTE0_TXODTDRVSTREN_B0,DDRPHYC TX ODT driver strength control register" hexmask.long.byte 0x4 6.--11. 1. "ODTSTRENN,ODT pull-down impedance selection" hexmask.long.byte 0x4 0.--5. 1. "ODTSTRENP,ODT pull-up impedance selection" rgroup.long 0x40158++0xB line.long 0x0 "DDRPHYC_DBYTE0_RXFIFOCHECKSTATUS,DDRPHYC status of RX FIFO consistency checks register" bitfld.long 0x0 1. "RXFIFOLOCUERR,If this bit is set the read pointer (DFI side) on the read FIFO associated with data bits [7:4]" "0,1" bitfld.long 0x0 0. "RXFIFOLOCERR,If this bit is set the read pointer (DFI side) on the read FIFO associated with data bits [3:0]" "0,1" line.long 0x4 "DDRPHYC_DBYTE0_RXFIFOCHECKERRVALUES,DDRPHYC captured values associated with an RxFIFO consistency error register" hexmask.long.byte 0x4 12.--15. 1. "RXFIFOWRLOCUERRVALUE,First error value captured for the write pointer (DQS side) on the read FIFO associated with data bits [7:4]" hexmask.long.byte 0x4 8.--11. 1. "RXFIFORDLOCUERRVALUE,First error value captured for the read pointer (DFI side) on the read FIFO associated with data bits [7:4]" newline hexmask.long.byte 0x4 4.--7. 1. "RXFIFOWRLOCERRVALUE,First error value captured for the write pointer (DQS side) on the read FIFO associated with data bits [3:0]" hexmask.long.byte 0x4 0.--3. 1. "RXFIFORDLOCERRVALUE,First error value captured for the read pointer (DFI side) on the read FIFO associated with data bits [3:0]" line.long 0x8 "DDRPHYC_DBYTE0_RXFIFOINFO,DDRPHYC data receive FIFO pointer values register" hexmask.long.byte 0x8 12.--15. 1. "RXFIFOWRLOCU,Mission mode write pointer of the upper-nibble Rx FIFO" hexmask.long.byte 0x8 8.--11. 1. "RXFIFORDLOCU,Mission mode read pointer of the upper-nibble Rx FIFO" newline hexmask.long.byte 0x8 4.--7. 1. "RXFIFOWRLOC,Mission mode write pointer of the lower-nibble Rx FIFO" hexmask.long.byte 0x8 0.--3. 1. "RXFIFORDLOC,Mission mode read pointer of the lower-nibble Rx FIFO" group.long 0x40164++0x3 line.long 0x0 "DDRPHYC_DBYTE0_RXFIFOVISIBILITY,DDRPHYC R0 FIFO visibility register" bitfld.long 0x0 4. "RXFIFORDEN,Pulse [set 0-->1-->0] this bit to capture the FIFO contents." "0,1" bitfld.long 0x0 3. "RXFIFORDPTROVR,This bit is programmable as follows:" "B_0x0,B_0x1" newline bitfld.long 0x0 0.--2. "RXFIFORDPTR,If RXFIFORDPTROVR is set this bit field selects the Rx FIFO entry." "0,1,2,3,4,5,6,7" rgroup.long 0x40168++0xB line.long 0x0 "DDRPHYC_DBYTE0_RXFIFOCONTENTSDQ3210,DDRPHYC R0 FIFO content DQ321x register" hexmask.long.word 0x0 0.--15. 1. "RXFIFOCONTENTSDQ3210,Window into the contents of the Rx FIFO as controlled" line.long 0x4 "DDRPHYC_DBYTE0_RXFIFOCONTENTSDQ7654,DDRPHYC R0 FIFO content DQ7654 register" hexmask.long.word 0x4 0.--15. 1. "RXFIFOCONTENTSDQ7654,Window into the contents of the Rx FIFO as controlled" line.long 0x8 "DDRPHYC_DBYTE0_RXFIFOCONTENTSDBI,DDRPHYC R0 FIFO content DBI register" hexmask.long.byte 0x8 0.--3. 1. "RXFIFOCONTENTSDBI,Window into the contents of the Rx FIFO as controlled" group.long 0x4017C++0x3 line.long 0x0 "DDRPHYC_DBYTE0_TXSLEWRATE_B0,DDRPHYC T0 slew rate controls register" bitfld.long 0x0 8.--10. "TXPREDRVMODE,Controls predrivers to adjust timing of turn-on and turn-off of pull-up and pull-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "TXPREN,4-bit binary trim for the driver pull -own slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "TXPREP,4-bit binary trim for the driver pull-up slew rate" group.long 0x401A0++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXPBDLYTG0_R0,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXPBDLYTG1_R0,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x40200++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXENDLYTG0_U0,DDRPHYC RxEnDlyTgx_u0 register" hexmask.long.word 0x0 0.--10. 1. "RXENDLYTG0_U0,Trained receive enable delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXENDLYTG1_U0,DDRPHYC RxEnDlyTg1_ux register" hexmask.long.word 0x4 0.--10. 1. "RXENDLYTG1_U0,Trained receive enable delay (timing group 1)" group.long 0x40230++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXCLKDLYTG0_U0,DDRPHYC RxClkDlyTgx_u0 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKDLYTG0_U0,Trained read DQS to RxClk delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXCLKDLYTG1_U0,DDRPHYC RxClkDlyTg1_ux register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKDLYTG1_U0,Trained read DQS to RxClk delay (timing group 1)" group.long 0x40240++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXCLKCDLYTG0_U0,DDRPHYC RxClkcDlyTgx_u0 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKCDLYTG0_U0,Trained read DQS_c to RxClkc delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXCLKCDLYTG1_U0,DDRPHYC RxClkcDlyTg1_ux register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKCDLYTG1_U0,Trained read DQS_c to RxClkc delay (timing group 1)" group.long 0x40280++0x1F line.long 0x0 "DDRPHYC_DBYTE0_DQ0LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x0 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x4 "DDRPHYC_DBYTE0_DQ1LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x4 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x8 "DDRPHYC_DBYTE0_DQ2LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x8 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0xC "DDRPHYC_DBYTE0_DQ3LNSEL,DDRPHYC DqLnSel register" bitfld.long 0xC 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x10 "DDRPHYC_DBYTE0_DQ4LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x10 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x14 "DDRPHYC_DBYTE0_DQ5LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x14 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x18 "DDRPHYC_DBYTE0_DQ6LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x18 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x1C "DDRPHYC_DBYTE0_DQ7LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x1C 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" group.long 0x40300++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQDLYTG0_R0,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQDLYTG1_R0,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x40340++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQSDLYTG0_U0,DDRPHYC TxDqsDlyTgx_u0 register" hexmask.long.word 0x0 0.--9. 1. "TXDQSDLYTG0_U0,Write DQS delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQSDLYTG1_U0,DDRPHYC TxDqsDlyTg1_ux register" hexmask.long.word 0x4 0.--9. 1. "TXDQSDLYTG1_U0,Write DQS delay (timing group 1)" rgroup.long 0x40390++0x3 line.long 0x0 "DDRPHYC_DBYTE0_DXLCDLSTATUS,DDRPHYC debug status of the DBYTE LCDL register" bitfld.long 0x0 13. "DXLCDLLIVELOCK,Present value of whether the LCDL is locked" "0,1" bitfld.long 0x0 12. "DXLCDLSTICKYUNLOCK,Latched value of whether the LCDL ever lost lock after the assertion of LCDLTSTENABLE" "0,1" newline bitfld.long 0x0 11. "DXLCDLSTICKYLOCK,Latched value of whether the LCDL ever achieved lock after the assertion of LCDLTSTENABLE" "0,1" bitfld.long 0x0 10. "DXLCDLPHDSNAPVAL,Value of the LCDL phase-detector output latched by pulse" "0,1" newline hexmask.long.word 0x0 0.--9. 1. "DXLCDLFINESNAPVAL,Value of the LCDL 1UI estimate code latched by pulse on LcdlFineSnap while LCDLTSTENABLE = 1" group.long 0x40500++0x7 line.long 0x0 "DDRPHYC_DBYTE0_VREFDAC0_R1,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" line.long 0x4 "DDRPHYC_DBYTE0_TXIMPEDANCECTRL0_B1,DDRPHYC data T0 impedance controls register" hexmask.long.byte 0x4 6.--11. 1. "DRVSTRENDQN,6-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x4 0.--5. 1. "DRVSTRENDQP,6-bit bus used to select the target pull-down output impedance" group.long 0x4050C++0x3 line.long 0x0 "DDRPHYC_DBYTE0_DQDQSRCVCNTRL_B1,DDRPHYC DQ/DQS receiver control register" hexmask.long.byte 0x0 7.--11. 1. "GAINCURRADJ,Adjusts gain current of RX amplifier stage." bitfld.long 0x0 4.--6. "MAJORMODEDBYTE,Selection of the major mode of operation for the receiver" "B_0x0,?,B_0x2,B_0x3,?,?,?,?" newline bitfld.long 0x0 2.--3. "DFECTRL,Note: These settings are determined by PHY training firmware and must not be overridden." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "EXTVREFRANGE,Extends the range available in the local per-bit VREF generator." "0,1" newline bitfld.long 0x0 0. "SELANALOGVREF,Setting this bit forces the local per-bit Vless thansub>REFless than/sub> generator to pass the global VREFA" "0,1" group.long 0x40534++0x3 line.long 0x0 "DDRPHYC_DBYTE0_TXODTDRVSTREN_B1,DDRPHYC TX ODT driver strength control register" hexmask.long.byte 0x0 6.--11. 1. "ODTSTRENN,ODT pull-down impedance selection" hexmask.long.byte 0x0 0.--5. 1. "ODTSTRENP,ODT pull-up impedance selection" group.long 0x4057C++0x3 line.long 0x0 "DDRPHYC_DBYTE0_TXSLEWRATE_B1,DDRPHYC T0 slew rate controls register" bitfld.long 0x0 8.--10. "TXPREDRVMODE,Controls predrivers to adjust timing of turn-on and turn-off of pull-up and pull-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "TXPREN,4-bit binary trim for the driver pull -own slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "TXPREP,4-bit binary trim for the driver pull-up slew rate" group.long 0x405A0++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXPBDLYTG0_R1,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXPBDLYTG1_R1,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x40600++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXENDLYTG0_U1,DDRPHYC RxEnDlyTgx_u1 register" hexmask.long.word 0x0 0.--10. 1. "RXENDLYTG0_U1,Trained receive enable delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXENDLYTG1_U1,DDRPHYC RxEnDlyTg1_u1 register" hexmask.long.word 0x4 0.--10. 1. "RXENDLYTG1_U1,Trained receive enable delay (timing group 1)" group.long 0x40630++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXCLKDLYTG0_U1,DDRPHYC RxClkDlyTgx_u1 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKDLYTG0_U1,Trained read DQS to RxClk delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXCLKDLYTG1_U1,DDRPHYC RxClkDlyTg1_u1 register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKDLYTG1_U1,Trained read DQS to RxClk delay (timing group 1)" group.long 0x40640++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXCLKCDLYTG0_U1,DDRPHYC RxClkcDlyTgx_u1 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKCDLYTG0_U1,Trained read DQS_c to RxClkc delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXCLKCDLYTG1_U1,DDRPHYC RxClkcDlyTg1_u1 register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKCDLYTG1_U1,Trained read DQS_c to RxClkc delay (timing group 1)" group.long 0x40700++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQDLYTG0_R1,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQDLYTG1_R1,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x40740++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQSDLYTG0_U1,DDRPHYC TxDqsDlyTgx_u1 register" hexmask.long.word 0x0 0.--9. 1. "TXDQSDLYTG0_U1,Write DQS delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQSDLYTG1_U1,DDRPHYC TxDqsDlyTg1_u1 register" hexmask.long.word 0x4 0.--9. 1. "TXDQSDLYTG1_U1,Write DQS delay (timing group 1)" group.long 0x40900++0x3 line.long 0x0 "DDRPHYC_DBYTE0_VREFDAC0_R2,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x409A0++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXPBDLYTG0_R2,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXPBDLYTG1_R2,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x40B00++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQDLYTG0_R2,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQDLYTG1_R2,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x40D00++0x3 line.long 0x0 "DDRPHYC_DBYTE0_VREFDAC0_R3,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x40DA0++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXPBDLYTG0_R3,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXPBDLYTG1_R3,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x40F00++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQDLYTG0_R3,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQDLYTG1_R3,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x41100++0x3 line.long 0x0 "DDRPHYC_DBYTE0_VREFDAC0_R4,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x411A0++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXPBDLYTG0_R4,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXPBDLYTG1_R4,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x41300++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQDLYTG0_R4,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQDLYTG1_R4,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x41500++0x3 line.long 0x0 "DDRPHYC_DBYTE0_VREFDAC0_R5,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x415A0++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXPBDLYTG0_R5,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXPBDLYTG1_R5,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x41700++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQDLYTG0_R5,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQDLYTG1_R5,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x41900++0x3 line.long 0x0 "DDRPHYC_DBYTE0_VREFDAC0_R6,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x419A0++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXPBDLYTG0_R6,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXPBDLYTG1_R6,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x41B00++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQDLYTG0_R6,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQDLYTG1_R6,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x41D00++0x3 line.long 0x0 "DDRPHYC_DBYTE0_VREFDAC0_R7,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x41DA0++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXPBDLYTG0_R7,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXPBDLYTG1_R7,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x41F00++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQDLYTG0_R7,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQDLYTG1_R7,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x42100++0x3 line.long 0x0 "DDRPHYC_DBYTE0_VREFDAC0_R8,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x421A0++0x7 line.long 0x0 "DDRPHYC_DBYTE0_RXPBDLYTG0_R8,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_RXPBDLYTG1_R8,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x42300++0x7 line.long 0x0 "DDRPHYC_DBYTE0_TXDQDLYTG0_R8,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE0_TXDQDLYTG1_R8,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x44000++0x3 line.long 0x0 "DDRPHYC_DBYTE1_DBYTEMISCMODE,DDRPHYC DBYTE module disable register" bitfld.long 0x0 2. "DBYTEDISABLE,DBYTE disable" "B_0x0,B_0x1" group.long 0x44068++0x3 line.long 0x0 "DDRPHYC_DBYTE1_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x44080++0x3 line.long 0x0 "DDRPHYC_DBYTE1_DFIMRL,DDRPHYC DFIMRL register" hexmask.long.byte 0x0 0.--4. 1. "DFIMRL,DFI maximum read latency (MRL)" group.long 0x44100++0x7 line.long 0x0 "DDRPHYC_DBYTE1_VREFDAC0_R0,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" line.long 0x4 "DDRPHYC_DBYTE1_TXIMPEDANCECTRL0_B0,DDRPHYC data T1 impedance controls register" hexmask.long.byte 0x4 6.--11. 1. "DRVSTRENDQN,6-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x4 0.--5. 1. "DRVSTRENDQP,6-bit bus used to select the target pull-down output impedance" group.long 0x4410C++0x3 line.long 0x0 "DDRPHYC_DBYTE1_DQDQSRCVCNTRL_B0,DDRPHYC DQ/DQS receiver control register" hexmask.long.byte 0x0 7.--11. 1. "GAINCURRADJ,Adjusts gain current of RX amplifier stage." bitfld.long 0x0 4.--6. "MAJORMODEDBYTE,Selection of the major mode of operation for the receiver" "B_0x0,?,B_0x2,B_0x3,?,?,?,?" newline bitfld.long 0x0 2.--3. "DFECTRL,Note: These settings are determined by PHY training firmware and must not be overridden." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "EXTVREFRANGE,Extends the range available in the local per-bit VREF generator." "0,1" newline bitfld.long 0x0 0. "SELANALOGVREF,Setting this bit forces the local per-bit Vless thansub>REFless than/sub> generator to pass the global VREFA" "0,1" group.long 0x44128++0x3 line.long 0x0 "DDRPHYC_DBYTE1_DQDQSRCVCNTRL1,DDRPHYC DQ/DQS receiver control register" bitfld.long 0x0 11. "ENLPREQPDR,not used" "0,1" bitfld.long 0x0 10. "RXPADSTANDBYEN,Enables rxdq/rxdqs Standby power savings per pad-group." "0,1" newline bitfld.long 0x0 9. "POWERDOWNRCVRDQS,Active high signal which powers down the receiver" "0,1" hexmask.long.word 0x0 0.--8. 1. "POWERDOWNRCVR,Active high signal which powers down the receiver" group.long 0x44130++0x7 line.long 0x0 "DDRPHYC_DBYTE1_DQDQSRCVCNTRL2,DDRPHYC DQ/DQS receiver control register" bitfld.long 0x0 0. "ENRXAGRESSIVEPDR,None" "0,1" line.long 0x4 "DDRPHYC_DBYTE1_TXODTDRVSTREN_B0,DDRPHYC TX ODT driver strength control register" hexmask.long.byte 0x4 6.--11. 1. "ODTSTRENN,ODT pull-down impedance selection" hexmask.long.byte 0x4 0.--5. 1. "ODTSTRENP,ODT pull-up impedance selection" rgroup.long 0x44158++0xB line.long 0x0 "DDRPHYC_DBYTE1_RXFIFOCHECKSTATUS,DDRPHYC status of RX FIFO consistency checks register" bitfld.long 0x0 1. "RXFIFOLOCUERR,If this bit is set the read pointer (DFI side) on the read FIFO associated with data bits [7:4]" "0,1" bitfld.long 0x0 0. "RXFIFOLOCERR,If this bit is set the read pointer (DFI side) on the read FIFO associated with data bits [3:0]" "0,1" line.long 0x4 "DDRPHYC_DBYTE1_RXFIFOCHECKERRVALUES,DDRPHYC captured values associated with an RxFIFO consistency error register" hexmask.long.byte 0x4 12.--15. 1. "RXFIFOWRLOCUERRVALUE,First error value captured for the write pointer (DQS side) on the read FIFO associated with data bits [7:4]" hexmask.long.byte 0x4 8.--11. 1. "RXFIFORDLOCUERRVALUE,First error value captured for the read pointer (DFI side) on the read FIFO associated with data bits [7:4]" newline hexmask.long.byte 0x4 4.--7. 1. "RXFIFOWRLOCERRVALUE,First error value captured for the write pointer (DQS side) on the read FIFO associated with data bits [3:0]" hexmask.long.byte 0x4 0.--3. 1. "RXFIFORDLOCERRVALUE,First error value captured for the read pointer (DFI side) on the read FIFO associated with data bits [3:0]" line.long 0x8 "DDRPHYC_DBYTE1_RXFIFOINFO,DDRPHYC data receive FIFO pointer values register" hexmask.long.byte 0x8 12.--15. 1. "RXFIFOWRLOCU,Mission mode write pointer of the upper-nibble Rx FIFO" hexmask.long.byte 0x8 8.--11. 1. "RXFIFORDLOCU,Mission mode read pointer of the upper-nibble Rx FIFO" newline hexmask.long.byte 0x8 4.--7. 1. "RXFIFOWRLOC,Mission mode write pointer of the lower-nibble Rx FIFO" hexmask.long.byte 0x8 0.--3. 1. "RXFIFORDLOC,Mission mode read pointer of the lower-nibble Rx FIFO" group.long 0x44164++0x3 line.long 0x0 "DDRPHYC_DBYTE1_RXFIFOVISIBILITY,DDRPHYC R1 FIFO visibility register" bitfld.long 0x0 4. "RXFIFORDEN,Pulse [set 0-->1-->0] this bit to capture the FIFO contents." "0,1" bitfld.long 0x0 3. "RXFIFORDPTROVR,This bit is programmable as follows:" "B_0x0,B_0x1" newline bitfld.long 0x0 0.--2. "RXFIFORDPTR,If RXFIFORDPTROVR is set this bit field selects the Rx FIFO entry." "0,1,2,3,4,5,6,7" rgroup.long 0x44168++0xB line.long 0x0 "DDRPHYC_DBYTE1_RXFIFOCONTENTSDQ3210,DDRPHYC R1 FIFO content DQ321x register" hexmask.long.word 0x0 0.--15. 1. "RXFIFOCONTENTSDQ3210,Window into the contents of the Rx FIFO as controlled" line.long 0x4 "DDRPHYC_DBYTE1_RXFIFOCONTENTSDQ7654,DDRPHYC R1 FIFO content DQ7654 register" hexmask.long.word 0x4 0.--15. 1. "RXFIFOCONTENTSDQ7654,Window into the contents of the Rx FIFO as controlled" line.long 0x8 "DDRPHYC_DBYTE1_RXFIFOCONTENTSDBI,DDRPHYC R1 FIFO content DBI register" hexmask.long.byte 0x8 0.--3. 1. "RXFIFOCONTENTSDBI,Window into the contents of the Rx FIFO as controlled" group.long 0x4417C++0x3 line.long 0x0 "DDRPHYC_DBYTE1_TXSLEWRATE_B0,DDRPHYC T1 slew rate controls register" bitfld.long 0x0 8.--10. "TXPREDRVMODE,Controls predrivers to adjust timing of turn-on and turn-off of pull-up and pull-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "TXPREN,4-bit binary trim for the driver pull -own slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "TXPREP,4-bit binary trim for the driver pull-up slew rate" group.long 0x441A0++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXPBDLYTG0_R0,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXPBDLYTG1_R0,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x44200++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXENDLYTG0_U0,DDRPHYC RxEnDlyTgx_u0 register" hexmask.long.word 0x0 0.--10. 1. "RXENDLYTG0_U0,Trained receive enable delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXENDLYTG1_U0,DDRPHYC RxEnDlyTg1_ux register" hexmask.long.word 0x4 0.--10. 1. "RXENDLYTG1_U0,Trained receive enable delay (timing group 1)" group.long 0x44230++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXCLKDLYTG0_U0,DDRPHYC RxClkDlyTgx_u0 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKDLYTG0_U0,Trained read DQS to RxClk delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXCLKDLYTG1_U0,DDRPHYC RxClkDlyTg1_ux register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKDLYTG1_U0,Trained read DQS to RxClk delay (timing group 1)" group.long 0x44240++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXCLKCDLYTG0_U0,DDRPHYC RxClkcDlyTgx_u0 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKCDLYTG0_U0,Trained read DQS_c to RxClkc delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXCLKCDLYTG1_U0,DDRPHYC RxClkcDlyTg1_ux register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKCDLYTG1_U0,Trained read DQS_c to RxClkc delay (timing group 1)" group.long 0x44280++0x1F line.long 0x0 "DDRPHYC_DBYTE1_DQ0LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x0 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x4 "DDRPHYC_DBYTE1_DQ1LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x4 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x8 "DDRPHYC_DBYTE1_DQ2LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x8 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0xC "DDRPHYC_DBYTE1_DQ3LNSEL,DDRPHYC DqLnSel register" bitfld.long 0xC 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x10 "DDRPHYC_DBYTE1_DQ4LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x10 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x14 "DDRPHYC_DBYTE1_DQ5LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x14 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x18 "DDRPHYC_DBYTE1_DQ6LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x18 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x1C "DDRPHYC_DBYTE1_DQ7LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x1C 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" group.long 0x44300++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQDLYTG0_R0,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQDLYTG1_R0,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x44340++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQSDLYTG0_U0,DDRPHYC TxDqsDlyTgx_u0 register" hexmask.long.word 0x0 0.--9. 1. "TXDQSDLYTG0_U0,Write DQS delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQSDLYTG1_U0,DDRPHYC TxDqsDlyTg1_ux register" hexmask.long.word 0x4 0.--9. 1. "TXDQSDLYTG1_U0,Write DQS delay (timing group 1)" rgroup.long 0x44390++0x3 line.long 0x0 "DDRPHYC_DBYTE1_DXLCDLSTATUS,DDRPHYC debug status of the DBYTE LCDL register" bitfld.long 0x0 13. "DXLCDLLIVELOCK,Present value of whether the LCDL is locked" "0,1" bitfld.long 0x0 12. "DXLCDLSTICKYUNLOCK,Latched value of whether the LCDL ever lost lock after the assertion of LCDLTSTENABLE" "0,1" newline bitfld.long 0x0 11. "DXLCDLSTICKYLOCK,Latched value of whether the LCDL ever achieved lock after the assertion of LCDLTSTENABLE" "0,1" bitfld.long 0x0 10. "DXLCDLPHDSNAPVAL,Value of the LCDL phase-detector output latched by pulse" "0,1" newline hexmask.long.word 0x0 0.--9. 1. "DXLCDLFINESNAPVAL,Value of the LCDL 1UI estimate code latched by pulse on LcdlFineSnap while LCDLTSTENABLE = 1" group.long 0x44500++0x7 line.long 0x0 "DDRPHYC_DBYTE1_VREFDAC0_R1,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" line.long 0x4 "DDRPHYC_DBYTE1_TXIMPEDANCECTRL0_B1,DDRPHYC data T1 impedance controls register" hexmask.long.byte 0x4 6.--11. 1. "DRVSTRENDQN,6-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x4 0.--5. 1. "DRVSTRENDQP,6-bit bus used to select the target pull-down output impedance" group.long 0x4450C++0x3 line.long 0x0 "DDRPHYC_DBYTE1_DQDQSRCVCNTRL_B1,DDRPHYC DQ/DQS receiver control register" hexmask.long.byte 0x0 7.--11. 1. "GAINCURRADJ,Adjusts gain current of RX amplifier stage." bitfld.long 0x0 4.--6. "MAJORMODEDBYTE,Selection of the major mode of operation for the receiver" "B_0x0,?,B_0x2,B_0x3,?,?,?,?" newline bitfld.long 0x0 2.--3. "DFECTRL,Note: These settings are determined by PHY training firmware and must not be overridden." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "EXTVREFRANGE,Extends the range available in the local per-bit VREF generator." "0,1" newline bitfld.long 0x0 0. "SELANALOGVREF,Setting this bit forces the local per-bit Vless thansub>REFless than/sub> generator to pass the global VREFA" "0,1" group.long 0x44534++0x3 line.long 0x0 "DDRPHYC_DBYTE1_TXODTDRVSTREN_B1,DDRPHYC TX ODT driver strength control register" hexmask.long.byte 0x0 6.--11. 1. "ODTSTRENN,ODT pull-down impedance selection" hexmask.long.byte 0x0 0.--5. 1. "ODTSTRENP,ODT pull-up impedance selection" group.long 0x4457C++0x3 line.long 0x0 "DDRPHYC_DBYTE1_TXSLEWRATE_B1,DDRPHYC T1 slew rate controls register" bitfld.long 0x0 8.--10. "TXPREDRVMODE,Controls predrivers to adjust timing of turn-on and turn-off of pull-up and pull-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "TXPREN,4-bit binary trim for the driver pull -own slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "TXPREP,4-bit binary trim for the driver pull-up slew rate" group.long 0x445A0++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXPBDLYTG0_R1,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXPBDLYTG1_R1,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x44600++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXENDLYTG0_U1,DDRPHYC RxEnDlyTgx_u1 register" hexmask.long.word 0x0 0.--10. 1. "RXENDLYTG0_U1,Trained receive enable delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXENDLYTG1_U1,DDRPHYC RxEnDlyTg1_u1 register" hexmask.long.word 0x4 0.--10. 1. "RXENDLYTG1_U1,Trained receive enable delay (timing group 1)" group.long 0x44630++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXCLKDLYTG0_U1,DDRPHYC RxClkDlyTgx_u1 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKDLYTG0_U1,Trained read DQS to RxClk delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXCLKDLYTG1_U1,DDRPHYC RxClkDlyTg1_u1 register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKDLYTG1_U1,Trained read DQS to RxClk delay (timing group 1)" group.long 0x44640++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXCLKCDLYTG0_U1,DDRPHYC RxClkcDlyTgx_u1 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKCDLYTG0_U1,Trained read DQS_c to RxClkc delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXCLKCDLYTG1_U1,DDRPHYC RxClkcDlyTg1_u1 register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKCDLYTG1_U1,Trained read DQS_c to RxClkc delay (timing group 1)" group.long 0x44700++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQDLYTG0_R1,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQDLYTG1_R1,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x44740++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQSDLYTG0_U1,DDRPHYC TxDqsDlyTgx_u1 register" hexmask.long.word 0x0 0.--9. 1. "TXDQSDLYTG0_U1,Write DQS delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQSDLYTG1_U1,DDRPHYC TxDqsDlyTg1_u1 register" hexmask.long.word 0x4 0.--9. 1. "TXDQSDLYTG1_U1,Write DQS delay (timing group 1)" group.long 0x44900++0x3 line.long 0x0 "DDRPHYC_DBYTE1_VREFDAC0_R2,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x449A0++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXPBDLYTG0_R2,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXPBDLYTG1_R2,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x44B00++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQDLYTG0_R2,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQDLYTG1_R2,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x44D00++0x3 line.long 0x0 "DDRPHYC_DBYTE1_VREFDAC0_R3,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x44DA0++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXPBDLYTG0_R3,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXPBDLYTG1_R3,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x44F00++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQDLYTG0_R3,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQDLYTG1_R3,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x45100++0x3 line.long 0x0 "DDRPHYC_DBYTE1_VREFDAC0_R4,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x451A0++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXPBDLYTG0_R4,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXPBDLYTG1_R4,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x45300++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQDLYTG0_R4,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQDLYTG1_R4,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x45500++0x3 line.long 0x0 "DDRPHYC_DBYTE1_VREFDAC0_R5,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x455A0++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXPBDLYTG0_R5,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXPBDLYTG1_R5,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x45700++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQDLYTG0_R5,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQDLYTG1_R5,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x45900++0x3 line.long 0x0 "DDRPHYC_DBYTE1_VREFDAC0_R6,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x459A0++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXPBDLYTG0_R6,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXPBDLYTG1_R6,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x45B00++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQDLYTG0_R6,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQDLYTG1_R6,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x45D00++0x3 line.long 0x0 "DDRPHYC_DBYTE1_VREFDAC0_R7,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x45DA0++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXPBDLYTG0_R7,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXPBDLYTG1_R7,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x45F00++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQDLYTG0_R7,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQDLYTG1_R7,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x46100++0x3 line.long 0x0 "DDRPHYC_DBYTE1_VREFDAC0_R8,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x461A0++0x7 line.long 0x0 "DDRPHYC_DBYTE1_RXPBDLYTG0_R8,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_RXPBDLYTG1_R8,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x46300++0x7 line.long 0x0 "DDRPHYC_DBYTE1_TXDQDLYTG0_R8,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE1_TXDQDLYTG1_R8,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x48000++0x3 line.long 0x0 "DDRPHYC_DBYTE2_DBYTEMISCMODE,DDRPHYC DBYTE module disable register" bitfld.long 0x0 2. "DBYTEDISABLE,DBYTE disable" "B_0x0,B_0x1" group.long 0x48068++0x3 line.long 0x0 "DDRPHYC_DBYTE2_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x48080++0x3 line.long 0x0 "DDRPHYC_DBYTE2_DFIMRL,DDRPHYC DFIMRL register" hexmask.long.byte 0x0 0.--4. 1. "DFIMRL,DFI maximum read latency (MRL)" group.long 0x48100++0x7 line.long 0x0 "DDRPHYC_DBYTE2_VREFDAC0_R0,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" line.long 0x4 "DDRPHYC_DBYTE2_TXIMPEDANCECTRL0_B0,DDRPHYC data T2 impedance controls register" hexmask.long.byte 0x4 6.--11. 1. "DRVSTRENDQN,6-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x4 0.--5. 1. "DRVSTRENDQP,6-bit bus used to select the target pull-down output impedance" group.long 0x4810C++0x3 line.long 0x0 "DDRPHYC_DBYTE2_DQDQSRCVCNTRL_B0,DDRPHYC DQ/DQS receiver control register" hexmask.long.byte 0x0 7.--11. 1. "GAINCURRADJ,Adjusts gain current of RX amplifier stage." bitfld.long 0x0 4.--6. "MAJORMODEDBYTE,Selection of the major mode of operation for the receiver" "B_0x0,?,B_0x2,B_0x3,?,?,?,?" newline bitfld.long 0x0 2.--3. "DFECTRL,Note: These settings are determined by PHY training firmware and must not be overridden." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "EXTVREFRANGE,Extends the range available in the local per-bit VREF generator." "0,1" newline bitfld.long 0x0 0. "SELANALOGVREF,Setting this bit forces the local per-bit Vless thansub>REFless than/sub> generator to pass the global VREFA" "0,1" group.long 0x48128++0x3 line.long 0x0 "DDRPHYC_DBYTE2_DQDQSRCVCNTRL1,DDRPHYC DQ/DQS receiver control register" bitfld.long 0x0 11. "ENLPREQPDR,not used" "0,1" bitfld.long 0x0 10. "RXPADSTANDBYEN,Enables rxdq/rxdqs Standby power savings per pad-group." "0,1" newline bitfld.long 0x0 9. "POWERDOWNRCVRDQS,Active high signal which powers down the receiver" "0,1" hexmask.long.word 0x0 0.--8. 1. "POWERDOWNRCVR,Active high signal which powers down the receiver" group.long 0x48130++0x7 line.long 0x0 "DDRPHYC_DBYTE2_DQDQSRCVCNTRL2,DDRPHYC DQ/DQS receiver control register" bitfld.long 0x0 0. "ENRXAGRESSIVEPDR,None" "0,1" line.long 0x4 "DDRPHYC_DBYTE2_TXODTDRVSTREN_B0,DDRPHYC TX ODT driver strength control register" hexmask.long.byte 0x4 6.--11. 1. "ODTSTRENN,ODT pull-down impedance selection" hexmask.long.byte 0x4 0.--5. 1. "ODTSTRENP,ODT pull-up impedance selection" rgroup.long 0x48158++0xB line.long 0x0 "DDRPHYC_DBYTE2_RXFIFOCHECKSTATUS,DDRPHYC status of RX FIFO consistency checks register" bitfld.long 0x0 1. "RXFIFOLOCUERR,If this bit is set the read pointer (DFI side) on the read FIFO associated with data bits [7:4]" "0,1" bitfld.long 0x0 0. "RXFIFOLOCERR,If this bit is set the read pointer (DFI side) on the read FIFO associated with data bits [3:0]" "0,1" line.long 0x4 "DDRPHYC_DBYTE2_RXFIFOCHECKERRVALUES,DDRPHYC captured values associated with an RxFIFO consistency error register" hexmask.long.byte 0x4 12.--15. 1. "RXFIFOWRLOCUERRVALUE,First error value captured for the write pointer (DQS side) on the read FIFO associated with data bits [7:4]" hexmask.long.byte 0x4 8.--11. 1. "RXFIFORDLOCUERRVALUE,First error value captured for the read pointer (DFI side) on the read FIFO associated with data bits [7:4]" newline hexmask.long.byte 0x4 4.--7. 1. "RXFIFOWRLOCERRVALUE,First error value captured for the write pointer (DQS side) on the read FIFO associated with data bits [3:0]" hexmask.long.byte 0x4 0.--3. 1. "RXFIFORDLOCERRVALUE,First error value captured for the read pointer (DFI side) on the read FIFO associated with data bits [3:0]" line.long 0x8 "DDRPHYC_DBYTE2_RXFIFOINFO,DDRPHYC data receive FIFO pointer values register" hexmask.long.byte 0x8 12.--15. 1. "RXFIFOWRLOCU,Mission mode write pointer of the upper-nibble Rx FIFO" hexmask.long.byte 0x8 8.--11. 1. "RXFIFORDLOCU,Mission mode read pointer of the upper-nibble Rx FIFO" newline hexmask.long.byte 0x8 4.--7. 1. "RXFIFOWRLOC,Mission mode write pointer of the lower-nibble Rx FIFO" hexmask.long.byte 0x8 0.--3. 1. "RXFIFORDLOC,Mission mode read pointer of the lower-nibble Rx FIFO" group.long 0x48164++0x3 line.long 0x0 "DDRPHYC_DBYTE2_RXFIFOVISIBILITY,DDRPHYC R2 FIFO visibility register" bitfld.long 0x0 4. "RXFIFORDEN,Pulse [set 0-->1-->0] this bit to capture the FIFO contents." "0,1" bitfld.long 0x0 3. "RXFIFORDPTROVR,This bit is programmable as follows:" "B_0x0,B_0x1" newline bitfld.long 0x0 0.--2. "RXFIFORDPTR,If RXFIFORDPTROVR is set this bit field selects the Rx FIFO entry." "0,1,2,3,4,5,6,7" rgroup.long 0x48168++0xB line.long 0x0 "DDRPHYC_DBYTE2_RXFIFOCONTENTSDQ3210,DDRPHYC R2 FIFO content DQ321x register" hexmask.long.word 0x0 0.--15. 1. "RXFIFOCONTENTSDQ3210,Window into the contents of the Rx FIFO as controlled" line.long 0x4 "DDRPHYC_DBYTE2_RXFIFOCONTENTSDQ7654,DDRPHYC R2 FIFO content DQ7654 register" hexmask.long.word 0x4 0.--15. 1. "RXFIFOCONTENTSDQ7654,Window into the contents of the Rx FIFO as controlled" line.long 0x8 "DDRPHYC_DBYTE2_RXFIFOCONTENTSDBI,DDRPHYC R2 FIFO content DBI register" hexmask.long.byte 0x8 0.--3. 1. "RXFIFOCONTENTSDBI,Window into the contents of the Rx FIFO as controlled" group.long 0x4817C++0x3 line.long 0x0 "DDRPHYC_DBYTE2_TXSLEWRATE_B0,DDRPHYC T2 slew rate controls register" bitfld.long 0x0 8.--10. "TXPREDRVMODE,Controls predrivers to adjust timing of turn-on and turn-off of pull-up and pull-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "TXPREN,4-bit binary trim for the driver pull -own slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "TXPREP,4-bit binary trim for the driver pull-up slew rate" group.long 0x481A0++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXPBDLYTG0_R0,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXPBDLYTG1_R0,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x48200++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXENDLYTG0_U0,DDRPHYC RxEnDlyTgx_u0 register" hexmask.long.word 0x0 0.--10. 1. "RXENDLYTG0_U0,Trained receive enable delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXENDLYTG1_U0,DDRPHYC RxEnDlyTg1_ux register" hexmask.long.word 0x4 0.--10. 1. "RXENDLYTG1_U0,Trained receive enable delay (timing group 1)" group.long 0x48230++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXCLKDLYTG0_U0,DDRPHYC RxClkDlyTgx_u0 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKDLYTG0_U0,Trained read DQS to RxClk delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXCLKDLYTG1_U0,DDRPHYC RxClkDlyTg1_ux register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKDLYTG1_U0,Trained read DQS to RxClk delay (timing group 1)" group.long 0x48240++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXCLKCDLYTG0_U0,DDRPHYC RxClkcDlyTgx_u0 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKCDLYTG0_U0,Trained read DQS_c to RxClkc delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXCLKCDLYTG1_U0,DDRPHYC RxClkcDlyTg1_ux register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKCDLYTG1_U0,Trained read DQS_c to RxClkc delay (timing group 1)" group.long 0x48280++0x1F line.long 0x0 "DDRPHYC_DBYTE2_DQ0LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x0 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x4 "DDRPHYC_DBYTE2_DQ1LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x4 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x8 "DDRPHYC_DBYTE2_DQ2LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x8 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0xC "DDRPHYC_DBYTE2_DQ3LNSEL,DDRPHYC DqLnSel register" bitfld.long 0xC 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x10 "DDRPHYC_DBYTE2_DQ4LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x10 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x14 "DDRPHYC_DBYTE2_DQ5LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x14 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x18 "DDRPHYC_DBYTE2_DQ6LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x18 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x1C "DDRPHYC_DBYTE2_DQ7LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x1C 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" group.long 0x48300++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQDLYTG0_R0,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQDLYTG1_R0,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x48340++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQSDLYTG0_U0,DDRPHYC TxDqsDlyTgx_u0 register" hexmask.long.word 0x0 0.--9. 1. "TXDQSDLYTG0_U0,Write DQS delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQSDLYTG1_U0,DDRPHYC TxDqsDlyTg1_ux register" hexmask.long.word 0x4 0.--9. 1. "TXDQSDLYTG1_U0,Write DQS delay (timing group 1)" rgroup.long 0x48390++0x3 line.long 0x0 "DDRPHYC_DBYTE2_DXLCDLSTATUS,DDRPHYC debug status of the DBYTE LCDL register" bitfld.long 0x0 13. "DXLCDLLIVELOCK,Present value of whether the LCDL is locked" "0,1" bitfld.long 0x0 12. "DXLCDLSTICKYUNLOCK,Latched value of whether the LCDL ever lost lock after the assertion of LCDLTSTENABLE" "0,1" newline bitfld.long 0x0 11. "DXLCDLSTICKYLOCK,Latched value of whether the LCDL ever achieved lock after the assertion of LCDLTSTENABLE" "0,1" bitfld.long 0x0 10. "DXLCDLPHDSNAPVAL,Value of the LCDL phase-detector output latched by pulse" "0,1" newline hexmask.long.word 0x0 0.--9. 1. "DXLCDLFINESNAPVAL,Value of the LCDL 1UI estimate code latched by pulse on LcdlFineSnap while LCDLTSTENABLE = 1" group.long 0x48500++0x7 line.long 0x0 "DDRPHYC_DBYTE2_VREFDAC0_R1,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" line.long 0x4 "DDRPHYC_DBYTE2_TXIMPEDANCECTRL0_B1,DDRPHYC data T2 impedance controls register" hexmask.long.byte 0x4 6.--11. 1. "DRVSTRENDQN,6-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x4 0.--5. 1. "DRVSTRENDQP,6-bit bus used to select the target pull-down output impedance" group.long 0x4850C++0x3 line.long 0x0 "DDRPHYC_DBYTE2_DQDQSRCVCNTRL_B1,DDRPHYC DQ/DQS receiver control register" hexmask.long.byte 0x0 7.--11. 1. "GAINCURRADJ,Adjusts gain current of RX amplifier stage." bitfld.long 0x0 4.--6. "MAJORMODEDBYTE,Selection of the major mode of operation for the receiver" "B_0x0,?,B_0x2,B_0x3,?,?,?,?" newline bitfld.long 0x0 2.--3. "DFECTRL,Note: These settings are determined by PHY training firmware and must not be overridden." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "EXTVREFRANGE,Extends the range available in the local per-bit VREF generator." "0,1" newline bitfld.long 0x0 0. "SELANALOGVREF,Setting this bit forces the local per-bit Vless thansub>REFless than/sub> generator to pass the global VREFA" "0,1" group.long 0x48534++0x3 line.long 0x0 "DDRPHYC_DBYTE2_TXODTDRVSTREN_B1,DDRPHYC TX ODT driver strength control register" hexmask.long.byte 0x0 6.--11. 1. "ODTSTRENN,ODT pull-down impedance selection" hexmask.long.byte 0x0 0.--5. 1. "ODTSTRENP,ODT pull-up impedance selection" group.long 0x4857C++0x3 line.long 0x0 "DDRPHYC_DBYTE2_TXSLEWRATE_B1,DDRPHYC T2 slew rate controls register" bitfld.long 0x0 8.--10. "TXPREDRVMODE,Controls predrivers to adjust timing of turn-on and turn-off of pull-up and pull-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "TXPREN,4-bit binary trim for the driver pull -own slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "TXPREP,4-bit binary trim for the driver pull-up slew rate" group.long 0x485A0++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXPBDLYTG0_R1,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXPBDLYTG1_R1,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x48600++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXENDLYTG0_U1,DDRPHYC RxEnDlyTgx_u1 register" hexmask.long.word 0x0 0.--10. 1. "RXENDLYTG0_U1,Trained receive enable delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXENDLYTG1_U1,DDRPHYC RxEnDlyTg1_u1 register" hexmask.long.word 0x4 0.--10. 1. "RXENDLYTG1_U1,Trained receive enable delay (timing group 1)" group.long 0x48630++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXCLKDLYTG0_U1,DDRPHYC RxClkDlyTgx_u1 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKDLYTG0_U1,Trained read DQS to RxClk delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXCLKDLYTG1_U1,DDRPHYC RxClkDlyTg1_u1 register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKDLYTG1_U1,Trained read DQS to RxClk delay (timing group 1)" group.long 0x48640++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXCLKCDLYTG0_U1,DDRPHYC RxClkcDlyTgx_u1 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKCDLYTG0_U1,Trained read DQS_c to RxClkc delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXCLKCDLYTG1_U1,DDRPHYC RxClkcDlyTg1_u1 register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKCDLYTG1_U1,Trained read DQS_c to RxClkc delay (timing group 1)" group.long 0x48700++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQDLYTG0_R1,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQDLYTG1_R1,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x48740++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQSDLYTG0_U1,DDRPHYC TxDqsDlyTgx_u1 register" hexmask.long.word 0x0 0.--9. 1. "TXDQSDLYTG0_U1,Write DQS delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQSDLYTG1_U1,DDRPHYC TxDqsDlyTg1_u1 register" hexmask.long.word 0x4 0.--9. 1. "TXDQSDLYTG1_U1,Write DQS delay (timing group 1)" group.long 0x48900++0x3 line.long 0x0 "DDRPHYC_DBYTE2_VREFDAC0_R2,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x489A0++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXPBDLYTG0_R2,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXPBDLYTG1_R2,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x48B00++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQDLYTG0_R2,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQDLYTG1_R2,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x48D00++0x3 line.long 0x0 "DDRPHYC_DBYTE2_VREFDAC0_R3,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x48DA0++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXPBDLYTG0_R3,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXPBDLYTG1_R3,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x48F00++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQDLYTG0_R3,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQDLYTG1_R3,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x49100++0x3 line.long 0x0 "DDRPHYC_DBYTE2_VREFDAC0_R4,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x491A0++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXPBDLYTG0_R4,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXPBDLYTG1_R4,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x49300++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQDLYTG0_R4,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQDLYTG1_R4,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x49500++0x3 line.long 0x0 "DDRPHYC_DBYTE2_VREFDAC0_R5,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x495A0++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXPBDLYTG0_R5,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXPBDLYTG1_R5,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x49700++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQDLYTG0_R5,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQDLYTG1_R5,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x49900++0x3 line.long 0x0 "DDRPHYC_DBYTE2_VREFDAC0_R6,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x499A0++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXPBDLYTG0_R6,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXPBDLYTG1_R6,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x49B00++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQDLYTG0_R6,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQDLYTG1_R6,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x49D00++0x3 line.long 0x0 "DDRPHYC_DBYTE2_VREFDAC0_R7,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x49DA0++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXPBDLYTG0_R7,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXPBDLYTG1_R7,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x49F00++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQDLYTG0_R7,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQDLYTG1_R7,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4A100++0x3 line.long 0x0 "DDRPHYC_DBYTE2_VREFDAC0_R8,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x4A1A0++0x7 line.long 0x0 "DDRPHYC_DBYTE2_RXPBDLYTG0_R8,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_RXPBDLYTG1_R8,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4A300++0x7 line.long 0x0 "DDRPHYC_DBYTE2_TXDQDLYTG0_R8,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE2_TXDQDLYTG1_R8,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4C000++0x3 line.long 0x0 "DDRPHYC_DBYTE3_DBYTEMISCMODE,DDRPHYC DBYTE module disable register" bitfld.long 0x0 2. "DBYTEDISABLE,DBYTE disable" "B_0x0,B_0x1" group.long 0x4C068++0x3 line.long 0x0 "DDRPHYC_DBYTE3_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x0 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." group.long 0x4C080++0x3 line.long 0x0 "DDRPHYC_DBYTE3_DFIMRL,DDRPHYC DFIMRL register" hexmask.long.byte 0x0 0.--4. 1. "DFIMRL,DFI maximum read latency (MRL)" group.long 0x4C100++0x7 line.long 0x0 "DDRPHYC_DBYTE3_VREFDAC0_R0,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" line.long 0x4 "DDRPHYC_DBYTE3_TXIMPEDANCECTRL0_B0,DDRPHYC data T3 impedance controls register" hexmask.long.byte 0x4 6.--11. 1. "DRVSTRENDQN,6-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x4 0.--5. 1. "DRVSTRENDQP,6-bit bus used to select the target pull-down output impedance" group.long 0x4C10C++0x3 line.long 0x0 "DDRPHYC_DBYTE3_DQDQSRCVCNTRL_B0,DDRPHYC DQ/DQS receiver control register" hexmask.long.byte 0x0 7.--11. 1. "GAINCURRADJ,Adjusts gain current of RX amplifier stage." bitfld.long 0x0 4.--6. "MAJORMODEDBYTE,Selection of the major mode of operation for the receiver" "B_0x0,?,B_0x2,B_0x3,?,?,?,?" newline bitfld.long 0x0 2.--3. "DFECTRL,Note: These settings are determined by PHY training firmware and must not be overridden." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "EXTVREFRANGE,Extends the range available in the local per-bit VREF generator." "0,1" newline bitfld.long 0x0 0. "SELANALOGVREF,Setting this bit forces the local per-bit Vless thansub>REFless than/sub> generator to pass the global VREFA" "0,1" group.long 0x4C128++0x3 line.long 0x0 "DDRPHYC_DBYTE3_DQDQSRCVCNTRL1,DDRPHYC DQ/DQS receiver control register" bitfld.long 0x0 11. "ENLPREQPDR,not used" "0,1" bitfld.long 0x0 10. "RXPADSTANDBYEN,Enables rxdq/rxdqs Standby power savings per pad-group." "0,1" newline bitfld.long 0x0 9. "POWERDOWNRCVRDQS,Active high signal which powers down the receiver" "0,1" hexmask.long.word 0x0 0.--8. 1. "POWERDOWNRCVR,Active high signal which powers down the receiver" group.long 0x4C130++0x7 line.long 0x0 "DDRPHYC_DBYTE3_DQDQSRCVCNTRL2,DDRPHYC DQ/DQS receiver control register" bitfld.long 0x0 0. "ENRXAGRESSIVEPDR,None" "0,1" line.long 0x4 "DDRPHYC_DBYTE3_TXODTDRVSTREN_B0,DDRPHYC TX ODT driver strength control register" hexmask.long.byte 0x4 6.--11. 1. "ODTSTRENN,ODT pull-down impedance selection" hexmask.long.byte 0x4 0.--5. 1. "ODTSTRENP,ODT pull-up impedance selection" rgroup.long 0x4C158++0xB line.long 0x0 "DDRPHYC_DBYTE3_RXFIFOCHECKSTATUS,DDRPHYC status of RX FIFO consistency checks register" bitfld.long 0x0 1. "RXFIFOLOCUERR,If this bit is set the read pointer (DFI side) on the read FIFO associated with data bits [7:4]" "0,1" bitfld.long 0x0 0. "RXFIFOLOCERR,If this bit is set the read pointer (DFI side) on the read FIFO associated with data bits [3:0]" "0,1" line.long 0x4 "DDRPHYC_DBYTE3_RXFIFOCHECKERRVALUES,DDRPHYC captured values associated with an RxFIFO consistency error register" hexmask.long.byte 0x4 12.--15. 1. "RXFIFOWRLOCUERRVALUE,First error value captured for the write pointer (DQS side) on the read FIFO associated with data bits [7:4]" hexmask.long.byte 0x4 8.--11. 1. "RXFIFORDLOCUERRVALUE,First error value captured for the read pointer (DFI side) on the read FIFO associated with data bits [7:4]" newline hexmask.long.byte 0x4 4.--7. 1. "RXFIFOWRLOCERRVALUE,First error value captured for the write pointer (DQS side) on the read FIFO associated with data bits [3:0]" hexmask.long.byte 0x4 0.--3. 1. "RXFIFORDLOCERRVALUE,First error value captured for the read pointer (DFI side) on the read FIFO associated with data bits [3:0]" line.long 0x8 "DDRPHYC_DBYTE3_RXFIFOINFO,DDRPHYC data receive FIFO pointer values register" hexmask.long.byte 0x8 12.--15. 1. "RXFIFOWRLOCU,Mission mode write pointer of the upper-nibble Rx FIFO" hexmask.long.byte 0x8 8.--11. 1. "RXFIFORDLOCU,Mission mode read pointer of the upper-nibble Rx FIFO" newline hexmask.long.byte 0x8 4.--7. 1. "RXFIFOWRLOC,Mission mode write pointer of the lower-nibble Rx FIFO" hexmask.long.byte 0x8 0.--3. 1. "RXFIFORDLOC,Mission mode read pointer of the lower-nibble Rx FIFO" group.long 0x4C164++0x3 line.long 0x0 "DDRPHYC_DBYTE3_RXFIFOVISIBILITY,DDRPHYC R3 FIFO visibility register" bitfld.long 0x0 4. "RXFIFORDEN,Pulse [set 0-->1-->0] this bit to capture the FIFO contents." "0,1" bitfld.long 0x0 3. "RXFIFORDPTROVR,This bit is programmable as follows:" "B_0x0,B_0x1" newline bitfld.long 0x0 0.--2. "RXFIFORDPTR,If RXFIFORDPTROVR is set this bit field selects the Rx FIFO entry." "0,1,2,3,4,5,6,7" rgroup.long 0x4C168++0xB line.long 0x0 "DDRPHYC_DBYTE3_RXFIFOCONTENTSDQ3210,DDRPHYC R3 FIFO content DQ321x register" hexmask.long.word 0x0 0.--15. 1. "RXFIFOCONTENTSDQ3210,Window into the contents of the Rx FIFO as controlled" line.long 0x4 "DDRPHYC_DBYTE3_RXFIFOCONTENTSDQ7654,DDRPHYC R3 FIFO content DQ7654 register" hexmask.long.word 0x4 0.--15. 1. "RXFIFOCONTENTSDQ7654,Window into the contents of the Rx FIFO as controlled" line.long 0x8 "DDRPHYC_DBYTE3_RXFIFOCONTENTSDBI,DDRPHYC R3 FIFO content DBI register" hexmask.long.byte 0x8 0.--3. 1. "RXFIFOCONTENTSDBI,Window into the contents of the Rx FIFO as controlled" group.long 0x4C17C++0x3 line.long 0x0 "DDRPHYC_DBYTE3_TXSLEWRATE_B0,DDRPHYC T3 slew rate controls register" bitfld.long 0x0 8.--10. "TXPREDRVMODE,Controls predrivers to adjust timing of turn-on and turn-off of pull-up and pull-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "TXPREN,4-bit binary trim for the driver pull -own slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "TXPREP,4-bit binary trim for the driver pull-up slew rate" group.long 0x4C1A0++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXPBDLYTG0_R0,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXPBDLYTG1_R0,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4C200++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXENDLYTG0_U0,DDRPHYC RxEnDlyTgx_u0 register" hexmask.long.word 0x0 0.--10. 1. "RXENDLYTG0_U0,Trained receive enable delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXENDLYTG1_U0,DDRPHYC RxEnDlyTg1_ux register" hexmask.long.word 0x4 0.--10. 1. "RXENDLYTG1_U0,Trained receive enable delay (timing group 1)" group.long 0x4C230++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXCLKDLYTG0_U0,DDRPHYC RxClkDlyTgx_u0 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKDLYTG0_U0,Trained read DQS to RxClk delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXCLKDLYTG1_U0,DDRPHYC RxClkDlyTg1_ux register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKDLYTG1_U0,Trained read DQS to RxClk delay (timing group 1)" group.long 0x4C240++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXCLKCDLYTG0_U0,DDRPHYC RxClkcDlyTgx_u0 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKCDLYTG0_U0,Trained read DQS_c to RxClkc delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXCLKCDLYTG1_U0,DDRPHYC RxClkcDlyTg1_ux register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKCDLYTG1_U0,Trained read DQS_c to RxClkc delay (timing group 1)" group.long 0x4C280++0x1F line.long 0x0 "DDRPHYC_DBYTE3_DQ0LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x0 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x4 "DDRPHYC_DBYTE3_DQ1LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x4 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x8 "DDRPHYC_DBYTE3_DQ2LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x8 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0xC "DDRPHYC_DBYTE3_DQ3LNSEL,DDRPHYC DqLnSel register" bitfld.long 0xC 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x10 "DDRPHYC_DBYTE3_DQ4LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x10 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x14 "DDRPHYC_DBYTE3_DQ5LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x14 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x18 "DDRPHYC_DBYTE3_DQ6LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x18 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" line.long 0x1C "DDRPHYC_DBYTE3_DQ7LNSEL,DDRPHYC DqLnSel register" bitfld.long 0x1C 0.--2. "DQYLNSEL,Supports mapping of PHY DQ to DRAM DQ within a byte (swizzle)." "0,1,2,3,4,5,6,7" group.long 0x4C300++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQDLYTG0_R0,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQDLYTG1_R0,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4C340++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQSDLYTG0_U0,DDRPHYC TxDqsDlyTgx_u0 register" hexmask.long.word 0x0 0.--9. 1. "TXDQSDLYTG0_U0,Write DQS delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQSDLYTG1_U0,DDRPHYC TxDqsDlyTg1_ux register" hexmask.long.word 0x4 0.--9. 1. "TXDQSDLYTG1_U0,Write DQS delay (timing group 1)" rgroup.long 0x4C390++0x3 line.long 0x0 "DDRPHYC_DBYTE3_DXLCDLSTATUS,DDRPHYC debug status of the DBYTE LCDL register" bitfld.long 0x0 13. "DXLCDLLIVELOCK,Present value of whether the LCDL is locked" "0,1" bitfld.long 0x0 12. "DXLCDLSTICKYUNLOCK,Latched value of whether the LCDL ever lost lock after the assertion of LCDLTSTENABLE" "0,1" newline bitfld.long 0x0 11. "DXLCDLSTICKYLOCK,Latched value of whether the LCDL ever achieved lock after the assertion of LCDLTSTENABLE" "0,1" bitfld.long 0x0 10. "DXLCDLPHDSNAPVAL,Value of the LCDL phase-detector output latched by pulse" "0,1" newline hexmask.long.word 0x0 0.--9. 1. "DXLCDLFINESNAPVAL,Value of the LCDL 1UI estimate code latched by pulse on LcdlFineSnap while LCDLTSTENABLE = 1" group.long 0x4C500++0x7 line.long 0x0 "DDRPHYC_DBYTE3_VREFDAC0_R1,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" line.long 0x4 "DDRPHYC_DBYTE3_TXIMPEDANCECTRL0_B1,DDRPHYC data T3 impedance controls register" hexmask.long.byte 0x4 6.--11. 1. "DRVSTRENDQN,6-bit bus used to select the target pull-down output impedance" hexmask.long.byte 0x4 0.--5. 1. "DRVSTRENDQP,6-bit bus used to select the target pull-down output impedance" group.long 0x4C50C++0x3 line.long 0x0 "DDRPHYC_DBYTE3_DQDQSRCVCNTRL_B1,DDRPHYC DQ/DQS receiver control register" hexmask.long.byte 0x0 7.--11. 1. "GAINCURRADJ,Adjusts gain current of RX amplifier stage." bitfld.long 0x0 4.--6. "MAJORMODEDBYTE,Selection of the major mode of operation for the receiver" "B_0x0,?,B_0x2,B_0x3,?,?,?,?" newline bitfld.long 0x0 2.--3. "DFECTRL,Note: These settings are determined by PHY training firmware and must not be overridden." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "EXTVREFRANGE,Extends the range available in the local per-bit VREF generator." "0,1" newline bitfld.long 0x0 0. "SELANALOGVREF,Setting this bit forces the local per-bit Vless thansub>REFless than/sub> generator to pass the global VREFA" "0,1" group.long 0x4C534++0x3 line.long 0x0 "DDRPHYC_DBYTE3_TXODTDRVSTREN_B1,DDRPHYC TX ODT driver strength control register" hexmask.long.byte 0x0 6.--11. 1. "ODTSTRENN,ODT pull-down impedance selection" hexmask.long.byte 0x0 0.--5. 1. "ODTSTRENP,ODT pull-up impedance selection" group.long 0x4C57C++0x3 line.long 0x0 "DDRPHYC_DBYTE3_TXSLEWRATE_B1,DDRPHYC T3 slew rate controls register" bitfld.long 0x0 8.--10. "TXPREDRVMODE,Controls predrivers to adjust timing of turn-on and turn-off of pull-up and pull-down segments." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 4.--7. 1. "TXPREN,4-bit binary trim for the driver pull -own slew rate" newline hexmask.long.byte 0x0 0.--3. 1. "TXPREP,4-bit binary trim for the driver pull-up slew rate" group.long 0x4C5A0++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXPBDLYTG0_R1,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXPBDLYTG1_R1,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4C600++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXENDLYTG0_U1,DDRPHYC RxEnDlyTgx_u1 register" hexmask.long.word 0x0 0.--10. 1. "RXENDLYTG0_U1,Trained receive enable delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXENDLYTG1_U1,DDRPHYC RxEnDlyTg1_u1 register" hexmask.long.word 0x4 0.--10. 1. "RXENDLYTG1_U1,Trained receive enable delay (timing group 1)" group.long 0x4C630++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXCLKDLYTG0_U1,DDRPHYC RxClkDlyTgx_u1 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKDLYTG0_U1,Trained read DQS to RxClk delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXCLKDLYTG1_U1,DDRPHYC RxClkDlyTg1_u1 register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKDLYTG1_U1,Trained read DQS to RxClk delay (timing group 1)" group.long 0x4C640++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXCLKCDLYTG0_U1,DDRPHYC RxClkcDlyTgx_u1 register" hexmask.long.byte 0x0 0.--5. 1. "RXCLKCDLYTG0_U1,Trained read DQS_c to RxClkc delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXCLKCDLYTG1_U1,DDRPHYC RxClkcDlyTg1_u1 register" hexmask.long.byte 0x4 0.--5. 1. "RXCLKCDLYTG1_U1,Trained read DQS_c to RxClkc delay (timing group 1)" group.long 0x4C700++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQDLYTG0_R1,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQDLYTG1_R1,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4C740++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQSDLYTG0_U1,DDRPHYC TxDqsDlyTgx_u1 register" hexmask.long.word 0x0 0.--9. 1. "TXDQSDLYTG0_U1,Write DQS delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQSDLYTG1_U1,DDRPHYC TxDqsDlyTg1_u1 register" hexmask.long.word 0x4 0.--9. 1. "TXDQSDLYTG1_U1,Write DQS delay (timing group 1)" group.long 0x4C900++0x3 line.long 0x0 "DDRPHYC_DBYTE3_VREFDAC0_R2,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x4C9A0++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXPBDLYTG0_R2,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXPBDLYTG1_R2,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4CB00++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQDLYTG0_R2,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQDLYTG1_R2,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4CD00++0x3 line.long 0x0 "DDRPHYC_DBYTE3_VREFDAC0_R3,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x4CDA0++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXPBDLYTG0_R3,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXPBDLYTG1_R3,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4CF00++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQDLYTG0_R3,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQDLYTG1_R3,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4D100++0x3 line.long 0x0 "DDRPHYC_DBYTE3_VREFDAC0_R4,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x4D1A0++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXPBDLYTG0_R4,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXPBDLYTG1_R4,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4D300++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQDLYTG0_R4,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQDLYTG1_R4,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4D500++0x3 line.long 0x0 "DDRPHYC_DBYTE3_VREFDAC0_R5,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x4D5A0++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXPBDLYTG0_R5,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXPBDLYTG1_R5,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4D700++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQDLYTG0_R5,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQDLYTG1_R5,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4D900++0x3 line.long 0x0 "DDRPHYC_DBYTE3_VREFDAC0_R6,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x4D9A0++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXPBDLYTG0_R6,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXPBDLYTG1_R6,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4DB00++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQDLYTG0_R6,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQDLYTG1_R6,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4DD00++0x3 line.long 0x0 "DDRPHYC_DBYTE3_VREFDAC0_R7,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x4DDA0++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXPBDLYTG0_R7,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXPBDLYTG1_R7,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4DF00++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQDLYTG0_R7,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQDLYTG1_R7,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x4E100++0x3 line.long 0x0 "DDRPHYC_DBYTE3_VREFDAC0_R8,DDRPHYC VrefDAC0_ry register" hexmask.long.byte 0x0 0.--6. 1. "VREFDAC0,PHY Rx Vless thansub>REFless than/sub> DAC control for rxdq cell internal Vless thansub>REFless than/sub>" group.long 0x4E1A0++0x7 line.long 0x0 "DDRPHYC_DBYTE3_RXPBDLYTG0_R8,DDRPHYC RxPBDlyTgx_r0 register" hexmask.long.byte 0x0 0.--6. 1. "RXPBDLYTG0_R0,Read DQ per-bit BDL delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_RXPBDLYTG1_R8,DDRPHYC RxPBDlyTg1_rx register" hexmask.long.byte 0x4 0.--6. 1. "RXPBDLYTG1_R0,Read DQ per-bit BDL delay (timing group 1)" group.long 0x4E300++0x7 line.long 0x0 "DDRPHYC_DBYTE3_TXDQDLYTG0_R8,DDRPHYC TxDqDlyTgx_r0 register" hexmask.long.word 0x0 0.--8. 1. "TXDQDLYTG0_R0,Write DQ delay (timing group 0)" line.long 0x4 "DDRPHYC_DBYTE3_TXDQDLYTG1_R8,DDRPHYC TxDqDlyTg1_rx register" hexmask.long.word 0x4 0.--8. 1. "TXDQDLYTG1_R0,Write DQ delay (timing group 1)" group.long 0x80000++0x7 line.long 0x0 "DDRPHYC_MASTER0_RXFIFOINIT,DDRPHYC Rx FIFO pointer initialization control register" bitfld.long 0x0 1. "INHIBITRXFIFORD,Reserved for training firmware use" "0,1" bitfld.long 0x0 0. "RXFIFOINITPTR,Setting this bit resets the PHY RXDATAFIFO read and write pointers." "0,1" line.long 0x4 "DDRPHYC_MASTER0_FORCECLKDISABLE,DDRPHYC ForceClkDisable register" hexmask.long.byte 0x4 0.--3. 1. "FORCECLKDISABLE,This bit field forces the gating of MEMCLKs driven from the PHY." group.long 0x8000C++0x3 line.long 0x0 "DDRPHYC_MASTER0_FORCEINTERNALUPDATE,DDRPHYC ForceInternalUpdate register" bitfld.long 0x0 0. "FORCEINTERNALUPDATE,Used by training firmware to force an internal PHY update event" "0,1" rgroup.long 0x80010++0x3 line.long 0x0 "DDRPHYC_MASTER0_PHYCONFIG,DDRPHYC read-only displays PHY configuration register" bitfld.long 0x0 8.--9. "PHYCONFIGDFI,Returns the following value depending on the define:" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "PHYCONFIGDBYTES,Returns the following value depending on the define:" newline hexmask.long.byte 0x0 0.--3. 1. "PHYCONFIGANIBS,Returns the following value depending on the define:" group.long 0x80014++0x3 line.long 0x0 "DDRPHYC_MASTER0_PGCR,DDRPHYC PHY general configuration register" bitfld.long 0x0 0. "RXCLKRISEFALLMODE,Controls independent training for RxClk_c and RxClk_t." "B_0x0,B_0x1" group.long 0x8001C++0x7 line.long 0x0 "DDRPHYC_MASTER0_TESTBUMPCNTRL1,DDRPHYC test bump control1 register" bitfld.long 0x0 15. "TESTPOWERGATEEN,Do not use for debug only" "0,1" bitfld.long 0x0 14. "TESTEXTVREFRANGE,Setting this bit extends the VREF DAC range for debug." "0,1" newline bitfld.long 0x0 13. "TESTSELEXTERNALVREF,Do not use for debug only" "0,1" hexmask.long.byte 0x0 8.--12. 1. "TESTGAINCURRADJ,Adjust gain and current of analog observe RX amplifier stage at analog test point." newline hexmask.long.byte 0x0 4.--7. 1. "TESTANALOGOUTCTRL,Reserved and returns zero on reads." bitfld.long 0x0 3. "TESTBIASBYPASSEN,Do not use for debug only" "0,1" newline bitfld.long 0x0 0.--2. "TESTMAJORMODE,Selects the major mode of operation for the receiver." "?,?,?,B_0x3,?,?,?,?" line.long 0x4 "DDRPHYC_MASTER0_CALUCLKINFO,DDRPHYC impedance calibration clock ratio register" hexmask.long.word 0x4 0.--10. 1. "CALUCLKTICKSPER1US,Must be programmed to the number of DfiClks in 1 us (rounded up) with minimum value" group.long 0x80028++0x13 line.long 0x0 "DDRPHYC_MASTER0_TESTBUMPCNTRL,DDRPHYC test bump control register" bitfld.long 0x0 9. "FORCEMTESTONALERT,When set this bit causes the digital observation output pin to be driven onto BP_ALERT_N." "0,1" hexmask.long.byte 0x0 3.--8. 1. "TESTBUMPDATASEL,RVSD" newline bitfld.long 0x0 2. "TESTBUMPTOGGLE,Controls the output function of the signal." "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "TESTBUMPEN,Controls the output function of the signal BP_ALERT_N." "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "DDRPHYC_MASTER0_SEQ0BDLY0,DDRPHYC Seq0BDLY0 register" hexmask.long.word 0x4 0.--15. 1. "SEQ0BDLY0,PIE delay register 0" line.long 0x8 "DDRPHYC_MASTER0_SEQ0BDLY1,DDRPHYC Seq0BDLY1 register" hexmask.long.word 0x8 0.--15. 1. "SEQ0BDLY1,PIE delay register 1" line.long 0xC "DDRPHYC_MASTER0_SEQ0BDLY2,DDRPHYC Seq0BDLY2 register" hexmask.long.word 0xC 0.--15. 1. "SEQ0BDLY2,PIE delay register 2" line.long 0x10 "DDRPHYC_MASTER0_SEQ0BDLY3,DDRPHYC Seq0BDLY3 register" hexmask.long.word 0x10 0.--15. 1. "SEQ0BDLY3,PIE delay register 3" rgroup.long 0x8003C++0x3 line.long 0x0 "DDRPHYC_MASTER0_PHYALERTSTATUS,DDRPHYC PHY alert status bit register" bitfld.long 0x0 0. "PHYALERT,Current state of ALERT_N" "0,1" group.long 0x80040++0x3 line.long 0x0 "DDRPHYC_MASTER0_PPTTRAINSETUP,DDRPHYC setup intervals for DFI PHY master operation register" bitfld.long 0x0 4.--6. "PHYMSTRMAXREQTOACK,Max time from tdfi_phymstr_req asserted" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,?" hexmask.long.byte 0x0 0.--3. 1. "PHYMSTRTRAININTERVAL,Time between the end of one training and the start" group.long 0x80048++0x3 line.long 0x0 "DDRPHYC_MASTER0_ATESTMODE,DDRPHYC ATestMode control register" bitfld.long 0x0 2.--4. "ATESTMODESEL,Master mode select for ATest (loopback)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 1. "ATESTCLKEN,Not used" "0,1" newline bitfld.long 0x0 0. "ATESTPRBSEN,Enables loopback PRBS7 testing of all the DDR output pins." "0,1" rgroup.long 0x80050++0x7 line.long 0x0 "DDRPHYC_MASTER0_TXCALBINP,DDRPHYC TxCalBinP register" hexmask.long.byte 0x0 0.--4. 1. "TXCALBINP,Binary result of the 31-bit thermometer pull-up code" line.long 0x4 "DDRPHYC_MASTER0_TXCALBINN,DDRPHYC TxCalBinN register" hexmask.long.byte 0x4 0.--4. 1. "TXCALBINN,Binary result of the 31-bit thermometer pull-down code" group.long 0x80058++0x23 line.long 0x0 "DDRPHYC_MASTER0_TXCALPOVR,DDRPHYC TX P impedance calibration override register" bitfld.long 0x0 5. "TXCALBINPOVREN,None" "?,B_0x1" hexmask.long.byte 0x0 0.--4. 1. "TXCALBINPOVRVAL,Binary value which can override TXCALBINP bitfiled" line.long 0x4 "DDRPHYC_MASTER0_TXCALNOVR,DDRPHYC TX N impedance calibration override register" bitfld.long 0x4 5. "TXCALBINNOVREN,None" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "TXCALBINNOVRVAL,Binary value which can override TXCALBINN bit field" line.long 0x8 "DDRPHYC_MASTER0_DFIMODE,DDRPHYC enables for update and low-power interfaces for DFI0 and DFI1 register" bitfld.long 0x8 2. "DFI1OVERRIDE,Controls the PHY logic associated with both DFI0 and DFI1." "0,1" bitfld.long 0x8 1. "DFI1ENABLE,Enables operation for the PHY logic associated with DFI1." "0,1" newline bitfld.long 0x8 0. "DFI0ENABLE,Enables operation for the PHY logic associated with DFI0." "0,1" line.long 0xC "DDRPHYC_MASTER0_TRISTATEMODECA,DDRPHYC mode select register for MEMCLK/address/command tristate register" bitfld.long 0xC 2.--3. "CKDISVAL,The PHY provides four memory clocks (0 to 3)." "0,1,2,3" bitfld.long 0xC 1. "DDR2TMODE,Must be set to 1 for dynamic tristate to work when CA bus is 2T or Geardown mode." "0,1" newline bitfld.long 0xC 0. "DISDYNADRTRI,When this bit is set the dynamic tristate feature is disabled (on by default)." "0,1" line.long 0x10 "DDRPHYC_MASTER0_MTESTMUXSEL,DDRPHYC MtestMuxSel register" hexmask.long.byte 0x10 0.--5. 1. "MTESTMUXSEL,Controls for the 64-1 mux for asynchronous data to the digital observation pin." line.long 0x14 "DDRPHYC_MASTER0_MTESTPGMINFO,DDRPHYC MtestPgmInfo register" bitfld.long 0x14 0. "MTESTPGMINFO,This bit value can be driven onto the digital observation pin (no other hardware effect)." "0,1" line.long 0x18 "DDRPHYC_MASTER0_DYNPWRDNUP,DDRPHYC dynamic power up/down control register" bitfld.long 0x18 0. "DYNPOWERDOWN,None" "B_0x0,B_0x1" line.long 0x1C "DDRPHYC_MASTER0_PMIENABLE,DDRPHYC PMIEnable register" bitfld.long 0x1C 0. "PMIENABLE,This bit is dynamically written by PIE during frequency changes and must not be written by the user." "0,1" line.long 0x20 "DDRPHYC_MASTER0_PHYTID,DDRPHYC PhyTID register" hexmask.long.word 0x20 0.--15. 1. "PHYTID,Placeholder to store technology-specific information" group.long 0x80080++0x1F line.long 0x0 "DDRPHYC_MASTER0_HWTMRL,DDRPHYC HwtMRL register" hexmask.long.byte 0x0 0.--4. 1. "HWTMRL,Master copy of MRL used by the PHY training firmware only" line.long 0x4 "DDRPHYC_MASTER0_DFIPHYUPD,DDRPHYC DFI PhyUpdate request time counter register" hexmask.long.byte 0x4 12.--15. 1. "DFIPHYUPDINTTHRESHOLD,Similar to DFIPHYUPDTHRESHOLD except that rather than affecting the Phy update request this bit field affects only the threshold used to generate the VT drift alarm interrupt." hexmask.long.byte 0x4 8.--11. 1. "DFIPHYUPDTHRESHOLD,- Nonzero codes are the threshold value for the change in the master LCDL 1UI phase code since the last Phy update request that triggers a new Phy update request;" newline bitfld.long 0x4 7. "DFIPHYUPDMODE,None" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "DFIPHYUPDRESP,Enforces the t_phyupd_resp time (max time allowed to the controller to respond to the request for a PHY update)." "B_0x0,B_0x1,B_0x2,B_0x3,?,?,?,?" newline hexmask.long.byte 0x4 0.--3. 1. "DFIPHYUPDCNT,Controls the interval between the end of a PHY update transaction and a subsequent request." line.long 0x8 "DDRPHYC_MASTER0_PDAMRSWRITEMODE,DDRPHYC PdaMrsWriteMode register" bitfld.long 0x8 0. "PDAMRSWRITEMODE,Controls the write DQ generation per the timing requirements on DQ signals used for" "0,1" line.long 0xC "DDRPHYC_MASTER0_DFIGEARDOWNCTL,DDRPHYC DFIGEARDOWNCTL register" bitfld.long 0xC 0.--1. "DFIGEARDOWNCTL,Bit[0] controls whether dfi_geardown_en causes chip-select (CS) timing to change." "B_0x0,B_0x1,?,?" line.long 0x10 "DDRPHYC_MASTER0_DQSPREAMBLECONTROL,DDRPHYC control the PHY logic related to the read and write DQS preamble register" bitfld.long 0x10 8. "WDQSEXTENSION,When this bits is set DQS_T and DQS_C are driven differentially to 0 and 1 respectively before and after a write burst except during a memory read transaction." "0,1" bitfld.long 0x10 7. "LP4STTCPREBRIDGERXEN,Used in LPDDR4 static-preamble mode to bridge the RxEn between two reads to the same timing group when the bubble is 1 memclk" "0,1" newline bitfld.long 0x10 6. "LP4POSTAMBLEEXT,In LPDDR4 mode this bit must be set to extend the write postamble." "B_0x0,B_0x1" bitfld.long 0x10 5. "LP4TGLTWOTCKTXDQSPRE,Used in LPDDR4 mode to modify the early preamble whenTwoTckTxDqsPre=1." "B_0x0,B_0x1" newline bitfld.long 0x10 2.--4. "POSITIONDFEINIT,For DDR4 PHY only when receive DFE is enabled" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "TWOTCKTXDQSPRE,For LPDDR4 all write operations are 2nCK such that this control must be set to 1." "0,1" newline bitfld.long 0x10 0. "TWOTCKRXDQSPRE,Widens the RxDqsEn window to allow larger drift in the incoming read DQS to take advantage of the larger/wider preamble generated by the DRAMs when D4 DRAMS are configured with DDR4 MR4 A11 read preamble = 1 for causing a 2nCK read preamble." "0,1" line.long 0x14 "DDRPHYC_MASTER0_MASTERX4CONFIG,DDRPHYC MasterX4Config register" hexmask.long.byte 0x14 0.--3. 1. "X4TG,Set to 1 if this timing group/rank is x4 (as opposed to x8) memory." line.long 0x18 "DDRPHYC_MASTER0_WRLEVBITS,DDRPHYC write level feedback DQ observability selection register" hexmask.long.byte 0x18 4.--7. 1. "WRLEVFORDQSU,DQ bit used for write levelization" hexmask.long.byte 0x18 0.--3. 1. "WRLEVFORDQSL,DQ bit used for write levelization" line.long 0x1C "DDRPHYC_MASTER0_ENABLECSMULTICAST,DDRPHYC EnableCsMulticast register" bitfld.long 0x1C 0. "ENABLECSMULTICAST,Controls whether CS_N[3:2] must be multicast on CID[1:0] in DDR4 mode." "B_0x0,B_0x1" group.long 0x800B0++0xB line.long 0x0 "DDRPHYC_MASTER0_ACX4ANIBDIS,DDRPHYC Acx4AnibDis register" hexmask.long.word 0x0 0.--11. 1. "ACX4ANIBDIS,When a bit is set the corresponding ACX nibble is disabled." line.long 0x4 "DDRPHYC_MASTER0_DMIPINPRESENT,DDRPHYC enable Read-DBI function in each DBYTE register" bitfld.long 0x4 0. "RDDBIENABLED,This bit must be set if Read-DBI is enabled in a connected DDR4 or LPDDR4 device." "0,1" line.long 0x8 "DDRPHYC_MASTER0_ARDPTRINITVAL,DDRPHYC ARdPtrInitVal register" hexmask.long.byte 0x8 0.--3. 1. "ARDPTRINITVAL,Initial pointer offset for the free-running FIFOs in the DBYTE" group.long 0x800E8++0x3 line.long 0x0 "DDRPHYC_MASTER0_DBYTEDLLMODECNTRL,DDRPHYC DLL mode control for DBYTEs register" bitfld.long 0x0 1. "DLLRXPREAMBLEMODE,This bit must be set to 1 if read DQS preamble contains a toggle for example DDR4 or LPDDR4 read toggling preamble mode." "0,1" group.long 0x80114++0x3 line.long 0x0 "DDRPHYC_MASTER0_CALOFFSETS,IDDRPHYC impedance calibration offsets control register" hexmask.long.byte 0x0 10.--13. 1. "CALDRVPUTHOFFSET,Adjusts the driver pull-up calibration code." hexmask.long.byte 0x0 6.--9. 1. "CALDRVPDTHOFFSET,Adjusts the driver pull-down calibration code." newline hexmask.long.byte 0x0 0.--5. 1. "CALCMPR5OFFSET,Adjusts the offset-compensated DAC code for the cmpana circuit at VREF == 0." group.long 0x8011C++0x3 line.long 0x0 "DDRPHYC_MASTER0_SARINITVALS,DDRPHYC SarInitVals register" bitfld.long 0x0 6.--8. "SARINITPEXT,Specifies the SAR starting value for PEXT calibration." "0,1,2,3,4,5,6,7" bitfld.long 0x0 3.--5. "SARINITNINT,Specifies the SAR starting value for NINT calibration." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0.--2. "SARINITOFFSET05,Specifies the SAR starting value for OFFSET05 calibration." "0,1,2,3,4,5,6,7" group.long 0x80124++0xB line.long 0x0 "DDRPHYC_MASTER0_CALPEXTOVR,DDRPHYC CalPExtOvr register" hexmask.long.byte 0x0 0.--4. 1. "CALPEXTOVR,If CALPEXTDIS is set the value provided here by software is used instead of the automatically generated value which is visible via CalPExt field." line.long 0x4 "DDRPHYC_MASTER0_CALCMPR5OVR,DDRPHYC CalCmpr5Ovr register" hexmask.long.byte 0x4 0.--7. 1. "CALCMPR5OVR,If CALCMPR5DIS is set the value provided here by software is used instead of the automatically generated value which is visible via CalCmpr5 field." line.long 0x8 "DDRPHYC_MASTER0_CALNINTOVR,DDRPHYC CalNIntOvr register" hexmask.long.byte 0x8 0.--4. 1. "CALNINTOVR,If the CALNINTDIS is set the value provided here by software is used instead of the automatically generated value which is visible via CalNInt field." group.long 0x80140++0x3 line.long 0x0 "DDRPHYC_MASTER0_CALDRVSTR0,DDRPHYC impedance calibration driver strength control register" hexmask.long.byte 0x0 4.--7. 1. "CALDRVSTRPU50,3 to 15: Reserved" hexmask.long.byte 0x0 0.--3. 1. "CALDRVSTRPD50,3 to 15: Reserved" group.long 0x80158++0x3 line.long 0x0 "DDRPHYC_MASTER0_PROCODTTIMECTL,DDRPHYC read data on-die termination timing control register" bitfld.long 0x0 4.--5. "PODTTAILWIDTHEXT,Controls the length of the tail of ProcOdt (units of UI)." "0,1,2,3" bitfld.long 0x0 2.--3. "PODTSTARTDELAY,Controls the start of ProcOdt (units of UI)." "B_0x0,B_0x1,?,B_0x3" newline bitfld.long 0x0 0.--1. "PODTTAILWIDTH,Controls the length of the tail of ProcOdt (units of UI)." "0,1,2,3" group.long 0x8016C++0x7 line.long 0x0 "DDRPHYC_MASTER0_MEMALERTCONTROL,DDRPHYC MemAlert receiver configuration register" bitfld.long 0x0 15. "MALERTFORCEERROR,When set this bit state is used to force the parity error to memory." "0,1" bitfld.long 0x0 14. "MALERTDISABLEVAL,When MALERTRXEN is not set this bit state is used to drive dfi_alert_n." "0,1" newline bitfld.long 0x0 13. "MALERTRXEN,This bit is programmable as follows:" "B_0x0,B_0x1" bitfld.long 0x0 12. "MALERTPUEN,When set this bit enables the pull-up termination on MALERT" "0,1" newline hexmask.long.byte 0x0 8.--11. 1. "MALERTPUSTREN,Controls the pull-up termination on MALERT." bitfld.long 0x0 7. "MALERTVREFEXTEN,When set for test/debug this bit selects external Vless thansub>REFless than/sub> source." "0,1" newline hexmask.long.byte 0x0 0.--6. 1. "MALERTVREFLEVEL,Sets the Vless thansub>REFless than/sub> level of internal Vless thansub>REFless than/sub> DAC assuming the following mission mode settings:" line.long 0x4 "DDRPHYC_MASTER0_MEMALERTCONTROL2,DDRPHYC MemAlert receiver configuration register 2" bitfld.long 0x4 0. "MALERTSYNCBYPASS,This bit is programmed as follows:" "B_0x0,B_0x1" group.long 0x80180++0x3 line.long 0x0 "DDRPHYC_MASTER0_MEMRESETL,DDRPHYC protection and control of BP_MemReset_L register" bitfld.long 0x0 1. "PROTECTMEMRESET,Controls the MemResetL output of the PHY." "0,1" bitfld.long 0x0 0. "MEMRESETLVALUE,Controls the MemResetL output of the PHY." "0,1" group.long 0x801B8++0x3 line.long 0x0 "DDRPHYC_MASTER0_PUBMODE,DDRPHYC PUBMODE - HWT Mux select register" bitfld.long 0x0 0. "HWTMEMSRC,When this bit is set the mux that switches between DCT and HWT for the source of memory transactions is switched to HWT." "B_0x0,B_0x1" rgroup.long 0x801BC++0x3 line.long 0x0 "DDRPHYC_MASTER0_MISCPHYSTATUS,DDRPHYC misc PHY status bits register" bitfld.long 0x0 1. "PORMEMRESET,Returns the active-high value used by the custom circuit which drives the memory reset signal." "0,1" bitfld.long 0x0 0. "DCTSANE,Returns the status of the custom circuit which protects the MemResetL output of the PHY on the initial power-on or reset." "B_0x0,B_0x1" group.long 0x801C0++0x7 line.long 0x0 "DDRPHYC_MASTER0_CORELOOPBACKSEL,DDRPHYC CoreLoopbackSel register" bitfld.long 0x0 0. "CORELOOPBACKSEL,This bit is controlled by the PHY test firmware." "0,1" line.long 0x4 "DDRPHYC_MASTER0_DLLTRAINPARAM,DDRPHYC DLL various training parameters register" bitfld.long 0x4 0.--1. "EXTENDPHDTIME,Used by the PHY firmware locking the LCDL delay cells" "0,1,2,3" group.long 0x801D0++0x7 line.long 0x0 "DDRPHYC_MASTER0_HWTLPCSENBYPASS,DDRPHYC HwtLpCsEnBypass register" bitfld.long 0x0 0. "HWTLPCSENBYPASS,When set this bit disables LpCsEn function for LPDDR4." "0,1" line.long 0x4 "DDRPHYC_MASTER0_DFICAMODE,DDRPHYC DFI command/address mode register" bitfld.long 0x4 3. "DFID4ALTCAMODE,DDR4-Alt mode enable (only available in certain configurations)" "B_0x0,B_0x1" bitfld.long 0x4 2. "DFILP4CAMODE,LP4 mode enable" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "DFID4CAMODE,DDR4 mode enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "DFILP3CAMODE,Reserved must be kept at reset value." "0,1" group.long 0x801E0++0x7 line.long 0x0 "DDRPHYC_MASTER0_DLLCONTROL,DDRPHYC DLL lock state machine control register" bitfld.long 0x0 0. "DLLRESETRELOCK,Used to reset the DDL/LCDL lock state machine" "0,1" line.long 0x4 "DDRPHYC_MASTER0_PULSEDLLUPDATEPHASE,DDRPHYC DLL update phase control register" bitfld.long 0x4 7. "ALWAYSUPDATELCDLPHASE,Causes each new operation to reload the LcdlPhase and increases bubbles." "0,1" bitfld.long 0x4 6. "TRAINUPDATEPHASEONLONGBUBBLE,Causes LongBubble to update the DBYTE and ANIB LDCL phase." "0,1" newline bitfld.long 0x4 3.--5. "UPDATEPHASEDESTRESERVED,reserved not used" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2. "PULSEACADLLUPDATEPHASE,Causes an AC module CA (command/address/cke/odt) DLL phase update." "0,1" newline bitfld.long 0x4 1. "PULSEACKDLLUPDATEPHASE,Causes an AC module CK (memck) DLL phase update." "0,1" bitfld.long 0x4 0. "PULSEDBYTEDLLUPDATEPHASE,Causes a LongBubble to the DBYTE modules which causes an update of the DBYTE module DLLs (tx rxen rxclk)." "0,1" group.long 0x801F0++0x3 line.long 0x0 "DDRPHYC_MASTER0_DLLGAINCTL,DDRPHYC DLL gain control register" hexmask.long.byte 0x0 8.--11. 1. "DLLSEEDSEL,Reserved must be configured to be 0." hexmask.long.byte 0x0 4.--7. 1. "DLLGAINTV,Terminal value of DllGain (value in effect when locking is done) and value used for maintaining lock (tracking pclk variation)" newline hexmask.long.byte 0x0 0.--3. 1. "DLLGAINIV,Initial value of DllGain" group.long 0x80220++0x7 line.long 0x0 "DDRPHYC_MASTER0_CALRATE,DDRPHYC impedance calibration control register" bitfld.long 0x0 6. "DISABLEBACKGROUNDZQUPDATES,Reserved for debug only" "0,1" bitfld.long 0x0 5. "CALONCE,The setting of this bit changes the behavior of CALRUN." "B_0x0,B_0x1" newline bitfld.long 0x0 4. "CALRUN,This bit is programmed as follows:" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--3. 1. "CALINTERVAL,Interval between successive calibrations" line.long 0x4 "DDRPHYC_MASTER0_CALZAP,DDRPHYC CalZap register" bitfld.long 0x4 0. "CALZAP,This bit is written by the PIE and the data in here are overwritten." "0,1" group.long 0x8022C++0x3 line.long 0x0 "DDRPHYC_MASTER0_PSTATE,DDRPHYC PState register" hexmask.long.byte 0x0 0.--3. 1. "PSTATE,This bit field is written by the PIE and the data in here are overwritten." group.long 0x80234++0x3 line.long 0x0 "DDRPHYC_MASTER0_PLLOUTGATECONTROL,DDRPHYC PLL output control register" bitfld.long 0x0 0. "PCLKGATEEN,Reserved." "0,1" group.long 0x80240++0x3 line.long 0x0 "DDRPHYC_MASTER0_PORCONTROL,DDRPHYC PMU power-on reset control register" bitfld.long 0x0 0. "PLLDLLLOCKDONE,This bit is set by the PIE during execution and cleared on PHY reset or on power cycle." "0,1" rgroup.long 0x8025C++0x3 line.long 0x0 "DDRPHYC_MASTER0_CALBUSY,DDRPHYC CalBusy register" bitfld.long 0x0 0. "CALBUSY,Read 1 if the calibrator is actively calibrating." "0,1" group.long 0x80260++0x3 line.long 0x0 "DDRPHYC_MASTER0_CALMISC2,DDRPHYC misc impedance calibration control register" bitfld.long 0x0 14. "CALSLOWCMPANA,When set this bit doubles the time allowed for the analog comparator cell to settle before sampling begins." "0,1" bitfld.long 0x0 13. "CALCANCELROUNDERRDIS,The PEXT and NINT calibration results naturally include a rounding error which manifests as a change of impedance at the pad." "0,1" newline bitfld.long 0x0 0.--2. "CALNUMVOTES,This bit field controls the number of consecutive comparator output bits over which majority voting is done." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" group.long 0x80268++0x7 line.long 0x0 "DDRPHYC_MASTER0_CALMISC,DDRPHYC controls for disabling the impedance calibration of certain target register" bitfld.long 0x0 2. "CALPEXTDIS,Setting this bit prevents the calibration engine from overwriting TXCALBINP and TXCALTHP with an automatically generated value in which case a value must be supplied by software." "0,1" bitfld.long 0x0 1. "CALNINTDIS,Setting this bit prevents the calibration engine from overwriting TXCALBIN and TXCALTHN with an automatically generated value in which case a value must be supplied by software." "0,1" newline bitfld.long 0x0 0. "CALCMPR5DIS,Setting this bit prevents the calibration engine from using the result from the CALCMPR5 stage of calibration." "0,1" line.long 0x4 "DDRPHYC_MASTER0_CALVREFS,DDRPHYC CalVRef register" bitfld.long 0x4 0.--1. "CALVREFS,This bit field drives the Cmpdig_CalRef pin of the cmpana cell at various stages of calibration." "?,?,B_0x2,?" rgroup.long 0x80270++0xB line.long 0x0 "DDRPHYC_MASTER0_CALCMPR5,DDRPHYC CalCmpr5 register" hexmask.long.byte 0x0 0.--7. 1. "CALCMPR5,Offset-compensated DAC code for the cmpana circuit" line.long 0x4 "DDRPHYC_MASTER0_CALNINT,DDRPHYC impedance calibration NInt control register" hexmask.long.byte 0x4 0.--4. 1. "CALNINTTHB,Number of thermometer bits which are set" line.long 0x8 "DDRPHYC_MASTER0_CALPEXT,DDRPHYC impedance calibration PExt control register" hexmask.long.byte 0x8 0.--4. 1. "CALPEXTTHB,Number of thermometer bits which are set" group.long 0x802A0++0x3 line.long 0x0 "DDRPHYC_MASTER0_CALCMPINVERT,DDRPHYC impedance calibration Cmp invert control register" bitfld.long 0x0 4. "CMPINVERTCALODTPU,Impedance calibration Cmp invert control" "0,1" bitfld.long 0x0 3. "CMPINVERTCALODTPD,Impedance calibration Cmp invert control" "0,1" newline bitfld.long 0x0 2. "CMPINVERTCALDRVPU50,Impedance calibration Cmp invert control" "0,1" bitfld.long 0x0 1. "CMPINVERTCALDRVPD50,Impedance calibration Cmp invert control" "0,1" newline bitfld.long 0x0 0. "CMPINVERTCALDAC50,calibration Cmp invert control" "0,1" group.long 0x802B8++0x3 line.long 0x0 "DDRPHYC_MASTER0_CALCMPANACNTRL,DDRPHYC impedance calibration Cmpana control register" bitfld.long 0x0 9. "CMPRBIASBYPASSEN,Impedance calibration Cmpana control" "0,1" bitfld.long 0x0 8. "CMPRGAINRESADJ,Impedance calibration Cmpana control" "0,1" newline hexmask.long.byte 0x0 0.--7. 1. "CMPRGAINCURRADJ,Impedance calibration Cmpana control" group.long 0x802C0++0x3 line.long 0x0 "DDRPHYC_MASTER0_DFIRDDATACSDESTMAP,DDRPHYC maps dfi_rddata_cs_n to destination dimm timing group register" bitfld.long 0x0 6.--7. "DFIRDDESTM3,Maps dfi_rddata_cs_n[3] to destination DfiRdDestm3 timing." "0,1,2,3" bitfld.long 0x0 4.--5. "DFIRDDESTM2,Maps dfi_rddata_cs_n[2] to destination DfiRdDestm2 timing." "0,1,2,3" newline bitfld.long 0x0 2.--3. "DFIRDDESTM1,Maps dfi_rddata_cs_n[1] to destination DfiRdDestm1 timing." "0,1,2,3" bitfld.long 0x0 0.--1. "DFIRDDESTM0,Maps dfi_rddata_cs_n[0] to destination DfiRdDestm0 timing." "0,1,2,3" group.long 0x802C8++0x3 line.long 0x0 "DDRPHYC_MASTER0_VREFINGLOBAL,PHY global VREF controls register" hexmask.long.byte 0x0 3.--9. 1. "GLOBALVREFINDAC,DAC code for internal Vless thansub>REFless than/sub> generation" bitfld.long 0x0 0.--2. "GLOBALVREFINSEL,[1:0] controls the mode of the PHY Vless thansub>REFless than/sub> DAC and the BP_VREF pin." "B_0x0,?,B_0x2,B_0x3,?,?,?,?" group.long 0x802D0++0x3 line.long 0x0 "DDRPHYC_MASTER0_DFIWRDATACSDESTMAP,DDRPHYC maps dfi_rddata_cs_n to destination dimm timing group register" bitfld.long 0x0 6.--7. "DFIWRDESTM3,Maps dfi_wrdata_cs_n[3] to destination DfiWrDestm3 timing (use register Tx[Dq Dqs]DlyTg3)" "0,1,2,3" bitfld.long 0x0 4.--5. "DFIWRDESTM2,Maps dfi_wrdata_cs_n[2] to destination DfiWrDestm2 timing" "0,1,2,3" newline bitfld.long 0x0 2.--3. "DFIWRDESTM1,Maps dfi_wrdata_cs_n[1] to destination DfiWrDestm1 timing" "0,1,2,3" bitfld.long 0x0 0.--1. "DFIWRDESTM0,Maps dfi_wrdata_cs_n[0] to destination DfiWrDestm0 timing" "0,1,2,3" rgroup.long 0x802D4++0x1F line.long 0x0 "DDRPHYC_MASTER0_MASUPDGOODCTR,DDRPHYC MasUpdGoodCtr register" hexmask.long.word 0x0 0.--15. 1. "MASUPDGOODCTR,This bit field increments whenever the memory controller acknowledges a PHY master interface request (a request for the PHY) to take over the DFI for PPT (as per section 11 of the Preliminary DFI 4." line.long 0x4 "DDRPHYC_MASTER0_PHYUPD0GOODCTR,DDRPHYC PhyUpd0GoodCtr register" hexmask.long.word 0x4 0.--15. 1. "PHYUPD0GOODCTR,This bit field increments whenever the memory controller acknowledges a PHY-initiated DFI0 interface update request." line.long 0x8 "DDRPHYC_MASTER0_PHYUPD1GOODCTR,DDRPHYC PhyUpd1GoodCtr register" hexmask.long.word 0x8 0.--15. 1. "PHYUPD1GOODCTR,This bit field increments whenever the memory controller acknowledges a PHY-initiated DFI1 interface update request." line.long 0xC "DDRPHYC_MASTER0_CTLUPD0GOODCTR,DDRPHYC CtlUpd0GoodCtr register" hexmask.long.word 0xC 0.--15. 1. "CTLUPD0GOODCTR,This bit field increments whenever the PHY acknowledges a memory controller-initiated DFI0 interface update request." line.long 0x10 "DDRPHYC_MASTER0_CTLUPD1GOODCTR,DDRPHYC CtlUpd1GoodCtr register" hexmask.long.word 0x10 0.--15. 1. "CTLUPD1GOODCTR,This bit field increments whenever the PHY acknowledges a memory controller-initiated DFI1 interface update request." line.long 0x14 "DDRPHYC_MASTER0_MASUPDFAILCTR,DDRPHYC MasUpdFailCtr register" hexmask.long.word 0x14 0.--15. 1. "MASUPDFAILCTR,This bit field increments whenever the PHY asserts a PHY master interface request but the memory controller does not acknowledge the request within the allowed interval (as per section 11 of the Preliminary DFI 4." line.long 0x18 "DDRPHYC_MASTER0_PHYUPD0FAILCTR,DDRPHYC PhyUpd0FailCtr register" hexmask.long.word 0x18 0.--15. 1. "PHYUPD0FAILCTR,This bit field increments whenever the PHY asserts a DFI0 interface update request but the memory controller does not acknowledge the request within the allowed interval (as per section 11 of the Preliminary DFI 4." line.long 0x1C "DDRPHYC_MASTER0_PHYUPD1FAILCTR,DDRPHYC PhyUpd1FailCtr register" hexmask.long.word 0x1C 0.--15. 1. "PHYUPD1FAILCTR,This bit field increments whenever the PHY asserts a DFI1 interface update request but the memory controller does not acknowledge the request within the allowed interval (as per section 11 of the Preliminary DFI 4." group.long 0x802F4++0x3 line.long 0x0 "DDRPHYC_MASTER0_PHYPERFCTRENABLE,DDRPHYC performance counter enable register" bitfld.long 0x0 7. "PHYUPD1FAILCTL,PHYUPD1FAILCTLR enable" "0,1" bitfld.long 0x0 6. "PHYUPD0FAILCTL,PHYUPD0FAILCTLR enable" "0,1" newline bitfld.long 0x0 5. "MASUPDFAILCTL,MASUPDFAILCTLR enable" "0,1" bitfld.long 0x0 4. "CTLUPD1GOODCTL,CTLUPD1GOODCTLR enable" "0,1" newline bitfld.long 0x0 3. "CTLUPD0GOODCTL,CTLUPD0GOODCTLR enable" "0,1" bitfld.long 0x0 2. "PHYUPD1GOODCTL,PHYUPD1GOODCTLR enable" "0,1" newline bitfld.long 0x0 1. "PHYUPD0GOODCTL,PHYUPD0GOODCTLR enable" "0,1" bitfld.long 0x0 0. "MASUPDGOODCTL,MASUPDGOODCTLR enable" "0,1" group.long 0x8030C++0x3 line.long 0x0 "DDRPHYC_MASTER0_PLLPWRDN,DDRPHYC PllPwrDn register" bitfld.long 0x0 0. "PLLPWRDN,This bit is written by the PIE and the data in here are overwritten." "0,1" group.long 0x80314++0xF line.long 0x0 "DDRPHYC_MASTER0_PLLCTRL2,DDRPHYC PState dependent PLL control 2 register" hexmask.long.byte 0x0 0.--4. 1. "PLLFREQSEL,Adjusts the loop parameters to compensate for different VCO bias points and input/output clock division ratios." line.long 0x4 "DDRPHYC_MASTER0_PLLCTRL0,DDRPHYC PLL control 0 register" bitfld.long 0x4 15. "PLLSPARECTRL0,Spare bits for PLL control" "0,1" bitfld.long 0x4 13.--14. "PLLLOCKPHSEL,Lock detect phase selection" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PLLLOCKCNTSEL,Lock detect counter selection" "B_0x0,B_0x1" bitfld.long 0x4 11. "PLLGEARSHIFT,PLL fast re-locking mode" "B_0x0,B_0x1" newline bitfld.long 0x4 8. "PLLSYNCBUSBYP,When asserted bypasses the Pll SyncPulse and uses a synchronizer of the same latency." "0,1" bitfld.long 0x4 7. "PLLSYNCBUSFLUSH,Used to flush the syncbus logic of the PLL during PHY initialization or LP3 exit sequence." "0,1" newline bitfld.long 0x4 5. "PLLBYPASSMODE,PLL bypass clock mux control" "0,1" bitfld.long 0x4 4. "PLLPRESET,PLL preset mode" "0,1" newline bitfld.long 0x4 3. "PLLOUTBYPEN,Controls the anti-glitch mux on the pllout_x1x2x4 path." "B_0x0,B_0x1" bitfld.long 0x4 2. "PLLX2MODE,Connects to x2_mode pins of PLL (pllout_x4x2 output frequency selection)." "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PLLSTANDBY,Connects directly to standby pin of the PLL." "0,1" line.long 0x8 "DDRPHYC_MASTER0_PLLCTRL1,DDRPHYC PState dependent PLL control 1 register" hexmask.long.byte 0x8 5.--8. 1. "PLLCPPROPCTRL,Connects directly to cp_prop_cntrlless than3:0> of the PLL." hexmask.long.byte 0x8 0.--4. 1. "PLLCPINTCTRL,Connects directly to cp_int_cntrlless than4:0> in the PLL." line.long 0xC "DDRPHYC_MASTER0_PLLTST,DDRPHYC PLL testing control register" hexmask.long.byte 0xC 5.--8. 1. "PLLDIGTSTSEL,Digital test mux select" hexmask.long.byte 0xC 1.--4. 1. "PLLANATSTSEL,Connects directly to pll_ana_test_selless than3:0> of PLL." newline bitfld.long 0xC 0. "PLLANATSTEN,Analog test port enable" "B_0x0,B_0x1" rgroup.long 0x80324++0x3 line.long 0x0 "DDRPHYC_MASTER0_PLLLOCKSTATUS,DDRPHYC PllLockStatus register" bitfld.long 0x0 0. "PLLLOCKSTATUS,Directly connected to the pll_Lock output" "0,1" group.long 0x80328++0xB line.long 0x0 "DDRPHYC_MASTER0_PLLTESTMODE,DDRPHYC PII TestMode register" hexmask.long.word 0x0 0.--15. 1. "PLLTESTMODE,Default values for this bit field must be used unless directed otherwise by Synopsys." line.long 0x4 "DDRPHYC_MASTER0_PLLCTRL3,DDRPHYC PLL control 3 register" bitfld.long 0x4 15. "PLLENCAL,None" "B_0x0,B_0x1" bitfld.long 0x4 14. "PLLFORCECAL,Connects directly to force_cal of PLL." "B_0x0,B_0x1" newline hexmask.long.byte 0x4 9.--13. 1. "PLLDACVALIN,Connects directly to dacval_inless than4:0> of PLL." hexmask.long.byte 0x4 4.--8. 1. "PLLMAXRANGE,Connects directly to maxrange of PLL." newline hexmask.long.byte 0x4 0.--3. 1. "PLLSPARE,Spare bits" line.long 0x8 "DDRPHYC_MASTER0_PLLCTRL4,DDRPHYC PState dependent PLL control 4 register" hexmask.long.byte 0x8 5.--8. 1. "PLLCPPROPGSCTRL,Connects directly to cp_prop_gs_cntrlless than3:0> of PLL." hexmask.long.byte 0x8 0.--4. 1. "PLLCPINTGSCTRL,Connects directly to cp_int_gs_cntrlless than4:0> in PLL." rgroup.long 0x80334++0xB line.long 0x0 "DDRPHYC_MASTER0_PLLENDOFCAL,DDRPHYC PllEndofCal register" bitfld.long 0x0 0. "PLLENDOFCAL,Directly connected to the PLL eoc output." "0,1" line.long 0x4 "DDRPHYC_MASTER0_PLLSTANDBYEFF,DDRPHYC PllStandbyEff register" bitfld.long 0x4 0. "PLLSTANDBYEFF,State off PLL standby (in PHY LP2 states)" "0,1" line.long 0x8 "DDRPHYC_MASTER0_PLLDACVALOUT,DDRPHYC PllDacValOut register" hexmask.long.byte 0x8 0.--4. 1. "PLLDACVALOUT,Directly connected to the PLL dacval_out output." group.long 0x8038C++0x3 line.long 0x0 "DDRPHYC_MASTER0_LCDLDBGCNTL,DDRPHYC LcdlDbgCntl register" hexmask.long.byte 0x0 12.--15. 1. "LCDLSTATUSSEL,Selection of the LCDL status" bitfld.long 0x0 11. "LCDLTSTENABLE,Debug/test operations enable" "0,1" newline bitfld.long 0x0 10. "LCDLFINESNAP,Latch enable for reading the present LCDL 1UI estimate code in LCDLFINESNAPVAL and the present phase-detector value in LCDLPHDSNAPVAL." "0,1" bitfld.long 0x0 9. "LCDLFINEOVR,Forces the value of the present LCDL 1UI estimate code to be LCDLFINEOVRVAL for all LCDLs." "0,1" newline hexmask.long.word 0x0 0.--8. 1. "LCDLFINEOVRVAL,Value forced as the initial value while LCDLTSTENABLE = 1 and LCDLFINEOVR" rgroup.long 0x80390++0x3 line.long 0x0 "DDRPHYC_MASTER0_ACLCDLSTATUS,DDRPHYC Debug status of the DBYTE LCDL register" bitfld.long 0x0 13. "ACLCDLLIVELOCK,Present value of whether the LCDL is locked" "0,1" bitfld.long 0x0 12. "ACLCDLSTICKYUNLOCK,Latched value of whether the LCDL ever lost lock after the assertion of LCDLTSTENABLE." "0,1" newline bitfld.long 0x0 11. "ACLCDLSTICKYLOCK,Latched value of whether the LCDL ever achieved lock after the assertion of LCDLTSTENABLE." "0,1" bitfld.long 0x0 10. "ACLCDLPHDSNAPVAL,Value of the LCDL phase-detector output latched by pulse on LCDLFINESNAP while LCDLTSTENABLE = 1." "0,1" newline hexmask.long.word 0x0 0.--9. 1. "ACLCDLFINESNAPVAL,Value of the LCDL 1UI estimate code latched by pulse on LCDLFINESNAP while LCDLTSTENABLE = 1." rgroup.long 0x803B4++0x7 line.long 0x0 "DDRPHYC_MASTER0_CUSTPHYREV,DDRPHYC CUSTPHYREV register" hexmask.long.byte 0x0 0.--5. 1. "CUSTPHYREV,Customer settable PHY version number" line.long 0x4 "DDRPHYC_MASTER0_PHYREV,DDRPHYC PHYREV register" hexmask.long.byte 0x4 8.--15. 1. "PHYMJR,PHY major revision" hexmask.long.byte 0x4 4.--7. 1. "PHYMDR,PHY moderate revision" newline hexmask.long.byte 0x4 0.--3. 1. "PHYMNR,PHY minor update" group.long 0x803BC++0x33 line.long 0x0 "DDRPHYC_MASTER0_LP3EXITSEQ0BSTARTVECTOR,DDRPHYC Start vector value for LP3-exit or init PIE sequence register" hexmask.long.byte 0x0 4.--7. 1. "LP3EXITSEQ0BSTARTVECPLLBYPASSED,PIE start vector value to be used for LP3 exit or init and target P-state has PLL bypassed" hexmask.long.byte 0x0 0.--3. 1. "LP3EXITSEQ0BSTARTVECPLLENABLED,PIE start vector value to be used for LP3 exit or init and target P-state has PLL enabled" line.long 0x4 "DDRPHYC_MASTER0_DFIFREQXLAT0,DDRPHYC DFI frequency translation 0 register" hexmask.long.byte 0x4 12.--15. 1. "DFIFREQXLATVAL3,Sequencer start vector used when dfi_freq value is 3" hexmask.long.byte 0x4 8.--11. 1. "DFIFREQXLATVAL2,Sequencer start vector used when dfi_freq value is 2" newline hexmask.long.byte 0x4 4.--7. 1. "DFIFREQXLATVAL1,Sequencer start vector used when dfi_freq value is 1" hexmask.long.byte 0x4 0.--3. 1. "DFIFREQXLATVAL0,Sequencer start vector used when dfi_freq value is 0" line.long 0x8 "DDRPHYC_MASTER0_DFIFREQXLAT1,DDRPHYC DFI frequency translation 1 register" hexmask.long.byte 0x8 12.--15. 1. "DFIFREQXLATVAL7,Sequencer start vector used when dfi_freq value is 7" hexmask.long.byte 0x8 8.--11. 1. "DFIFREQXLATVAL6,Sequencer start vector used when dfi_freq value is 6" newline hexmask.long.byte 0x8 4.--7. 1. "DFIFREQXLATVAL5,Sequencer start vector used when dfi_freq value is 5" hexmask.long.byte 0x8 0.--3. 1. "DFIFREQXLATVAL4,Sequencer start vector used when dfi_freq value is 4" line.long 0xC "DDRPHYC_MASTER0_DFIFREQXLAT2,DDRPHYC DFI frequency translation 2 register" hexmask.long.byte 0xC 12.--15. 1. "DFIFREQXLATVAL11,Sequencer start vector used when dfi_freq value is 11" hexmask.long.byte 0xC 8.--11. 1. "DFIFREQXLATVAL10,Sequencer start vector used when dfi_freq value is 10" newline hexmask.long.byte 0xC 4.--7. 1. "DFIFREQXLATVAL9,Sequencer start vector used when dfi_freq value is 9" hexmask.long.byte 0xC 0.--3. 1. "DFIFREQXLATVAL8,Sequencer start vector used when dfi_freq value is 8" line.long 0x10 "DDRPHYC_MASTER0_DFIFREQXLAT3,DDRPHYC DFI frequency translation 3 register" hexmask.long.byte 0x10 12.--15. 1. "DFIFREQXLATVAL15,Sequencer start vector used when dfi_freq value is 15" hexmask.long.byte 0x10 8.--11. 1. "DFIFREQXLATVAL14,Sequencer start vector used when dfi_freq value is 14" newline hexmask.long.byte 0x10 4.--7. 1. "DFIFREQXLATVAL13,Sequencer start vector used when dfi_freq value is 13" hexmask.long.byte 0x10 0.--3. 1. "DFIFREQXLATVAL12,Sequencer start vector used when dfi_freq value is 12" line.long 0x14 "DDRPHYC_MASTER0_DFIFREQXLAT4,DDRPHYC DFI frequency translation 4 register" hexmask.long.byte 0x14 12.--15. 1. "DFIFREQXLATVAL19,Sequencer start vector used when dfi_freq value is 19" hexmask.long.byte 0x14 8.--11. 1. "DFIFREQXLATVAL18,Sequencer start vector used when dfi_freq value is 18" newline hexmask.long.byte 0x14 4.--7. 1. "DFIFREQXLATVAL17,Sequencer start vector used when dfi_freq value is 17" hexmask.long.byte 0x14 0.--3. 1. "DFIFREQXLATVAL16,Sequencer start vector used when dfi_freq value is 16" line.long 0x18 "DDRPHYC_MASTER0_DFIFREQXLAT5,DDRPHYC DFI frequency translation 5 register" hexmask.long.byte 0x18 12.--15. 1. "DFIFREQXLATVAL23,Sequencer start vector used when dfi_freq value is 23" hexmask.long.byte 0x18 8.--11. 1. "DFIFREQXLATVAL22,Sequencer start vector used when dfi_freq value is 22" newline hexmask.long.byte 0x18 4.--7. 1. "DFIFREQXLATVAL21,Sequencer start vector used when dfi_freq value is 21" hexmask.long.byte 0x18 0.--3. 1. "DFIFREQXLATVAL20,Sequencer start vector used when dfi_freq value is 20" line.long 0x1C "DDRPHYC_MASTER0_DFIFREQXLAT6,DDRPHYC DFI frequency translation 6 register" hexmask.long.byte 0x1C 12.--15. 1. "DFIFREQXLATVAL27,Sequencer start vector used when dfi_freq value is 27" hexmask.long.byte 0x1C 8.--11. 1. "DFIFREQXLATVAL26,Sequencer start vector used when dfi_freq value is 26" newline hexmask.long.byte 0x1C 4.--7. 1. "DFIFREQXLATVAL25,Sequencer start vector used when dfi_freq value is 25" hexmask.long.byte 0x1C 0.--3. 1. "DFIFREQXLATVAL24,Sequencer start vector used when dfi_freq value is 24" line.long 0x20 "DDRPHYC_MASTER0_DFIFREQXLAT7,DDRPHYC DFI frequency translation 7 register" hexmask.long.byte 0x20 12.--15. 1. "DFIFREQXLATVAL31,Sequencer start vector used when dfi_freq value is 31" hexmask.long.byte 0x20 8.--11. 1. "DFIFREQXLATVAL30,Sequencer start vector used when dfi_freq value is 30" newline hexmask.long.byte 0x20 4.--7. 1. "DFIFREQXLATVAL29,Sequencer start vector used when dfi_freq value is 29" hexmask.long.byte 0x20 0.--3. 1. "DFIFREQXLATVAL28,Sequencer start vector used when dfi_freq value is 28" line.long 0x24 "DDRPHYC_MASTER0_TXRDPTRINIT,DDRPHYC TxRdPtrInit register" bitfld.long 0x24 0. "TXRDPTRINIT,This bit controls TxRdPtrInit and is meant to be written by the PState sequencer as part of the power state switching sequence." "0,1" line.long 0x28 "DDRPHYC_MASTER0_DFIINITCOMPLETE,DDRPHYC DfiInitComplete register" bitfld.long 0x28 0. "DFIINITCOMPLETE,This bit directly controls DfiInitComplete and is meant to be written by the PState sequencer as part of the power state switching sequence." "0,1" line.long 0x2C "DDRPHYC_MASTER0_DFIFREQRATIO,DDRPHYC DfiFreqRatio register" bitfld.long 0x2C 0.--1. "DFIFREQRATIO,Ratio DfiCtlClk:MemClk" "0,1,2,3" line.long 0x30 "DDRPHYC_MASTER0_RXFIFOCHECKS,DDRPHYC RxFifoCheck register" bitfld.long 0x30 0. "DOFREQUENTRXFIFOCHECKS,None" "B_0x0,B_0x1" group.long 0x803FC++0x23 line.long 0x0 "DDRPHYC_MASTER0_MTESTDTOCTRL,DDRPHYC MTestCombo output enable on core-side copy register" bitfld.long 0x0 0. "MTESTDTOEN,This bit is programmed as follows:" "0,1" line.long 0x4 "DDRPHYC_MASTER0_MAPCAA0TODFI,DDRPHYC MapCAA[0to7]toDfi register" hexmask.long.byte 0x4 0.--3. 1. "MAPCAATODFI,For LPDDR4 application this bit field maps a dfi0_address to CAA x." line.long 0x8 "DDRPHYC_MASTER0_MAPCAA1TODFI,DDRPHYC MapCAA[0to7]toDfi register" hexmask.long.byte 0x8 0.--3. 1. "MAPCAATODFI,For LPDDR4 application this bit field maps a dfi0_address to CAA x." line.long 0xC "DDRPHYC_MASTER0_MAPCAA2TODFI,DDRPHYC MapCAA[0to7]toDfi register" hexmask.long.byte 0xC 0.--3. 1. "MAPCAATODFI,For LPDDR4 application this bit field maps a dfi0_address to CAA x." line.long 0x10 "DDRPHYC_MASTER0_MAPCAA3TODFI,DDRPHYC MapCAA[0to7]toDfi register" hexmask.long.byte 0x10 0.--3. 1. "MAPCAATODFI,For LPDDR4 application this bit field maps a dfi0_address to CAA x." line.long 0x14 "DDRPHYC_MASTER0_MAPCAA4TODFI,DDRPHYC MapCAA[0to7]toDfi register" hexmask.long.byte 0x14 0.--3. 1. "MAPCAATODFI,For LPDDR4 application this bit field maps a dfi0_address to CAA x." line.long 0x18 "DDRPHYC_MASTER0_MAPCAA5TODFI,DDRPHYC MapCAA[0to7]toDfi register" hexmask.long.byte 0x18 0.--3. 1. "MAPCAATODFI,For LPDDR4 application this bit field maps a dfi0_address to CAA x." line.long 0x1C "DDRPHYC_MASTER0_MAPCAA6TODFI,DDRPHYC MapCAA[0to7]toDfi register" hexmask.long.byte 0x1C 0.--3. 1. "MAPCAATODFI,For LPDDR4 application this bit field maps a dfi0_address to CAA x." line.long 0x20 "DDRPHYC_MASTER0_MAPCAA7TODFI,DDRPHYC MapCAA[0to7]toDfi register" hexmask.long.byte 0x20 0.--3. 1. "MAPCAATODFI,For LPDDR4 application this bit field maps a dfi0_address to CAA x." group.long 0x80440++0x1F line.long 0x0 "DDRPHYC_MASTER0_MAPCAB0TODFI,DDRPHYC MapCAB[0to7]toDfi register" hexmask.long.byte 0x0 0.--3. 1. "MAPCABTODFI,For LPDDR4 application this bit field maps a dfi1_address to CAB x." line.long 0x4 "DDRPHYC_MASTER0_MAPCAB1TODFI,DDRPHYC MapCAB[0to7]toDfi register" hexmask.long.byte 0x4 0.--3. 1. "MAPCABTODFI,For LPDDR4 application this bit field maps a dfi1_address to CAB x." line.long 0x8 "DDRPHYC_MASTER0_MAPCAB2TODFI,DDRPHYC MapCAB[0to7]toDfi register" hexmask.long.byte 0x8 0.--3. 1. "MAPCABTODFI,For LPDDR4 application this bit field maps a dfi1_address to CAB x." line.long 0xC "DDRPHYC_MASTER0_MAPCAB3TODFI,DDRPHYC MapCAB[0to7]toDfi register" hexmask.long.byte 0xC 0.--3. 1. "MAPCABTODFI,For LPDDR4 application this bit field maps a dfi1_address to CAB x." line.long 0x10 "DDRPHYC_MASTER0_MAPCAB4TODFI,DDRPHYC MapCAB[0to7]toDfi register" hexmask.long.byte 0x10 0.--3. 1. "MAPCABTODFI,For LPDDR4 application this bit field maps a dfi1_address to CAB x." line.long 0x14 "DDRPHYC_MASTER0_MAPCAB5TODFI,DDRPHYC MapCAB[0to7]toDfi register" hexmask.long.byte 0x14 0.--3. 1. "MAPCABTODFI,For LPDDR4 application this bit field maps a dfi1_address to CAB x." line.long 0x18 "DDRPHYC_MASTER0_MAPCAB6TODFI,DDRPHYC MapCAB[0to7]toDfi register" hexmask.long.byte 0x18 0.--3. 1. "MAPCABTODFI,For LPDDR4 application this bit field maps a dfi1_address to CAB x." line.long 0x1C "DDRPHYC_MASTER0_MAPCAB7TODFI,DDRPHYC MapCAB[0to7]toDfi register" hexmask.long.byte 0x1C 0.--3. 1. "MAPCABTODFI,For LPDDR4 application this bit field maps a dfi1_address to CAB x." group.long 0x8046C++0xF line.long 0x0 "DDRPHYC_MASTER0_PHYINTERRUPTENABLE,DDRPHYC interrupt enable register" bitfld.long 0x0 10. "PHYRXFIFOCHECKEN,Rx FIFO pointer check interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8.--9. "PHYVTDRIFTALARMEN,PHY VT drift alarm interrupt enable" "B_0x0,B_0x1,?,?" newline bitfld.long 0x0 2. "PHYTRNGFAILEN,PHY training failure interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "PHYINITCMPLTEN,PHY initialization complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PHYTRNGCMPLTEN,PHY training complete interrupt enable" "B_0x0,B_0x1" line.long 0x4 "DDRPHYC_MASTER0_PHYINTERRUPTFWCONTROL,DDRPHYC interrupt firmware control register" bitfld.long 0x4 2. "PHYTRNGFAILFW,PHY training failure firmware interrupt" "B_0x0,B_0x1" bitfld.long 0x4 1. "PHYINITCMPLTFW,PHY initialization complete firmware interrupt" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PHYTRNGCMPLTFW,PHY training complete firmware interrupt" "B_0x0,B_0x1" line.long 0x8 "DDRPHYC_MASTER0_PHYINTERRUPTMASK,DDRPHYC interrupt mask register" bitfld.long 0x8 10. "PHYRXFIFOCHECKMSK,Mask for the Rx FIFO pointers check interrupt" "B_0x0,B_0x1" bitfld.long 0x8 8.--9. "PHYVTDRIFTALARMMSK,Mask for the PHY VT drift alarm interrupts" "B_0x0,B_0x1,?,?" newline bitfld.long 0x8 2. "PHYTRNGFAILMSK,Mask for the PHY training failure interrupt" "B_0x0,B_0x1" bitfld.long 0x8 1. "PHYINITCMPLTMSK,Mask for the PHY initialization complete interrupt" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PHYTRNGCMPLTMSK,Mask for the PHY training complete interrupt" "B_0x0,B_0x1" line.long 0xC "DDRPHYC_MASTER0_PHYINTERRUPTCLEAR,DDRPHYC interrupt clear register" bitfld.long 0xC 10. "PHYRXFIFOCHECKCLR,Rx FIFO pointers check interrupt clear" "B_0x0,B_0x1" bitfld.long 0xC 8.--9. "PHYVTDRIFTALARMCLR,PHY VT drift alarm interrupt clear" "B_0x0,B_0x1,?,?" newline bitfld.long 0xC 2. "PHYTRNGFAILCLR,PHY training failure interrupt clear" "B_0x0,B_0x1" bitfld.long 0xC 1. "PHYINITCMPLTCLR,PHY initialization complete interrupt clear" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PHYTRNGCMPLTCLR,PHY training complete interrupt clear" "B_0x0,B_0x1" rgroup.long 0x8047C++0x3 line.long 0x0 "DDRPHYC_MASTER0_PHYINTERRUPTSTATUS,DDRPHYC interrupt status register" bitfld.long 0x0 10. "PHYRXFIFOCHECK,A mechanism in the PHY checks the read FIFO pointers for consistency at times they are idle." "B_0x0,B_0x1" bitfld.long 0x0 8.--9. "VTDRIFTALARM,PHY VT drift alarm interrupt" "B_0x0,B_0x1,?,?" newline bitfld.long 0x0 2. "PHYTRNGFAIL,PHY training failure interrupt" "B_0x0,B_0x1" bitfld.long 0x0 1. "PHYINITCMPLT,PHY initialization complete interrupt" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PHYTRNGCMPLT,PHY training complete interrupt" "B_0x0,B_0x1" group.long 0x80480++0x47 line.long 0x0 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS0,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x0 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x4 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS1,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x4 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x8 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS2,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x8 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0xC "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS3,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0xC 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x10 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS4,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x10 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x14 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS5,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x14 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x18 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS6,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x18 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x1C "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS7,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x1C 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x20 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS8,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x20 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x24 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS9,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x24 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x28 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS10,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x28 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x2C "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS11,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x2C 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x30 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS12,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x30 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x34 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS13,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x34 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x38 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS14,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x38 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x3C "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS15,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x3C 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x40 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS16,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x40 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" line.long 0x44 "DDRPHYC_MASTER0_HWTSWIZZLEHWTADDRESS17,DDRPHYC HwtSwizzleHwtAddress0 register" hexmask.long.byte 0x44 0.--4. 1. "HWTSWIZZLEHWTADDRESS,This bit field is used in DDR3/DDR4 mode where a user has remapped the DFI inputs to" group.long 0x804C4++0x27 line.long 0x0 "DDRPHYC_MASTER0_HWTSWIZZLEHWTACTN,DDRPHYC HwtSwizzleHwtActN register" hexmask.long.byte 0x0 0.--4. 1. "HWTSWIZZLEHWTACTN,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." line.long 0x4 "DDRPHYC_MASTER0_HWTSWIZZLEHWTBANK0,DDRPHYC HwtSwizzleHwtBank0 register" hexmask.long.byte 0x4 0.--4. 1. "HWTSWIZZLEHWTBANK0,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." line.long 0x8 "DDRPHYC_MASTER0_HWTSWIZZLEHWTBANK1,DDRPHYC HwtSwizzleHwtBank1 register" hexmask.long.byte 0x8 0.--4. 1. "HWTSWIZZLEHWTBANK1,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." line.long 0xC "DDRPHYC_MASTER0_HWTSWIZZLEHWTBANK2,DDRPHYC HwtSwizzleHwtBank2 register" hexmask.long.byte 0xC 0.--4. 1. "HWTSWIZZLEHWTBANK2,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." line.long 0x10 "DDRPHYC_MASTER0_HWTSWIZZLEHWTBG0,DDRPHYC HwtSwizzleHwtBg0 register" hexmask.long.byte 0x10 0.--4. 1. "HWTSWIZZLEHWTBG0,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." line.long 0x14 "DDRPHYC_MASTER0_HWTSWIZZLEHWTBG1,DDRPHYC HwtSwizzleHwtBg1 register" hexmask.long.byte 0x14 0.--4. 1. "HWTSWIZZLEHWTBG1,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." line.long 0x18 "DDRPHYC_MASTER0_HWTSWIZZLEHWTCASN,DDRPHYC HwtSwizzleHwtCasN register" hexmask.long.byte 0x18 0.--4. 1. "HWTSWIZZLEHWTCASN,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." line.long 0x1C "DDRPHYC_MASTER0_HWTSWIZZLEHWTRASN,DDRPHYC HwtSwizzleHwtRasN register" hexmask.long.byte 0x1C 0.--4. 1. "HWTSWIZZLEHWTRASN,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." line.long 0x20 "DDRPHYC_MASTER0_HWTSWIZZLEHWTWEN,DDRPHYC HwtSwizzleHwtWeN register" hexmask.long.byte 0x20 0.--4. 1. "HWTSWIZZLEHWTWEN,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." line.long 0x24 "DDRPHYC_MASTER0_HWTSWIZZLEHWTPARITYIN,DDRPHYC HwtSwizzleHwtParityIn register" hexmask.long.byte 0x24 0.--4. 1. "HWTSWIZZLEHWTPARITYIN,See HWTSWIZZLEHWTADDRESS0[4:0] description for details." group.long 0x804F0++0x7 line.long 0x0 "DDRPHYC_MASTER0_DFIHANDSHAKEDELAYS0,DDRPHYC small delays on handshake signals register 0" hexmask.long.byte 0x0 12.--15. 1. "CTRLUPDREQDELAY0,Adds 0-15 DfiClks of delay after the PHY completes all PHY update activities before deasserting dfi0_ctrlupd_ack." hexmask.long.byte 0x0 8.--11. 1. "CTRLUPDACKDELAY0,Adds 0-15 DfiClks of delay after dfi0_ctrlupd_req asserts before the PHY takes any action." newline hexmask.long.byte 0x0 4.--7. 1. "PHYUPDREQDELAY0,Adds 0-15 DfiClks of delay after the PHY completes all PHY update activities before deasserting dfi0_phyupd_req." hexmask.long.byte 0x0 0.--3. 1. "PHYUPDACKDELAY0,Adds 0-15 DfiClks of delay after dfi0_phyupd_ack asserts before the PHY takes any action (such as starting DDL calibration)." line.long 0x4 "DDRPHYC_MASTER0_DFIHANDSHAKEDELAYS1,DDRPHYC small delays on handshake signals register 1" hexmask.long.byte 0x4 12.--15. 1. "CTRLUPDREQDELAY1,Adds 0-15 DfiClks of delay after the PHY completes all PHY update activities before deasserting dfi1_ctrlupd_ack." hexmask.long.byte 0x4 8.--11. 1. "CTRLUPDACKDELAY1,Adds 0-15 DfiClks of delay after dfi1_ctrlupd_req asserts before the PHY takes any action." newline hexmask.long.byte 0x4 4.--7. 1. "PHYUPDREQDELAY1,Adds 0-15 DfiClks of delay after the PHY completes all PHY update activities before deasserting dfi1_phyupd_req." hexmask.long.byte 0x4 0.--3. 1. "PHYUPDACKDELAY1,Adds 0-15 DfiClks of delay after dfi1_phyupd_ack asserts before the PHY takes any action (such as starting DDL calibration)." rgroup.long 0x804F8++0x3 line.long 0x0 "DDRPHYC_MASTER0_REMOTEIMPCAL,DDRPHYC remote impedance calibration status register" bitfld.long 0x0 1. "SLAVECODEUPDATED,- if DWC_DDRPHY_REMOTE_IMP_CAL is defined this bit is set by hardware when" "0,1" bitfld.long 0x0 0. "CALIBSLAVE,- if DWC_DDRPHY_REMOTE_IMP_CAL is defined this bit is set by hardware when" "0,1" rgroup.long 0x2400A0++0x3 line.long 0x0 "DDRPHYC_INITENG0_PHYINLP3,DDRPHYC PhyInLP3 register" bitfld.long 0x0 0. "PHYINLP3,This bit is set by the PIE once the LP3 entry sequence is completed." "0,1" group.long 0x300200++0x7 line.long 0x0 "DDRPHYC_DRTUB0_UCCLKHCLKENABLES,DDRPHYC Ucclk and Hclk enable register" bitfld.long 0x0 1. "HCLKEN,When the training is complete (and assuming no further need for training hardware) this bit must be cleared to reduce power." "0,1" bitfld.long 0x0 0. "UCCLKEN,When the training is complete (and assuming no further need for the microcontroller) this bit must be cleared to reduce power." "0,1" line.long 0x4 "DDRPHYC_DRTUB0_CURPSTATE0B,DDRPHYC CurPstate0b register" hexmask.long.byte 0x4 0.--3. 1. "CURPSTATE0B,PIE current PState" rgroup.long 0x3003B4++0x7 line.long 0x0 "DDRPHYC_DRTUB0_CUSTPUBREV,DDRPHYC CUSTPUBREV register" hexmask.long.byte 0x0 0.--5. 1. "CUSTPUBREV,Customer settable PUB version number" line.long 0x4 "DDRPHYC_DRTUB0_PUBREV,DDRPHYC PUBREV register" hexmask.long.byte 0x4 8.--15. 1. "PUBMJR,PUB major revision" hexmask.long.byte 0x4 4.--7. 1. "PUBMDR,PUB moderate revision" newline hexmask.long.byte 0x4 0.--3. 1. "PUBMNR,PUB minor revision" group.long 0x340000++0x3 line.long 0x0 "DDRPHYC_APBONLY0_MICROCONTMUXSEL,DDRPHYC MicroContMuxSel register" bitfld.long 0x0 0. "MICROCONTMUXSEL,Controls access to the PHY configuration registers." "B_0x0,B_0x1" rgroup.long 0x340010++0x3 line.long 0x0 "DDRPHYC_APBONLY0_UCTSHADOWREGS,DDRPHYC PMU/controller protocol. controller read-only shadow register" bitfld.long 0x0 0. "UCTWRITEPROTSHADOW,None" "B_0x0,?" group.long 0x3400C4++0x3 line.long 0x0 "DDRPHYC_APBONLY0_DCTWRITEPROT,DDRPHYC DctWriteProt register" bitfld.long 0x0 0. "DCTWRITEPROT,By clearing this bit the user acknowledges the receipt of the message." "0,1" rgroup.long 0x3400C8++0x3 line.long 0x0 "DDRPHYC_APBONLY0_UCTWRITEONLYSHADOW,DDRPHYC UctWriteOnlyShadow register" hexmask.long.word 0x0 0.--15. 1. "UCTWRITEONLYSHADOW,Used to pass the message ID for major messages and to pass the lower 16 bits for streaming messages." rgroup.long 0x3400D0++0x3 line.long 0x0 "DDRPHYC_APBONLY0_UCTDATWRITEONLYSHADOW,DDRPHYC UctDatWriteOnlyShadow register" hexmask.long.word 0x0 0.--15. 1. "UCTDATWRITEONLYSHADOW,Used to pass the upper 16 bits for streaming messages." group.long 0x3400DC++0x3 line.long 0x0 "DDRPHYC_APBONLY0_DFICFGRDDATAVALIDTICKS,DDRPHYC DfiCfgRdDataValidTicks register" hexmask.long.byte 0x0 0.--5. 1. "DFICFGRDDATAVALIDTICKS,Round trip delay of a register read access" group.long 0x340264++0x3 line.long 0x0 "DDRPHYC_APBONLY0_MICRORESET,DDRPHYC reset and clock shutdown control register" bitfld.long 0x0 3. "RESETTOMICRO,This bit is programmable as follows:" "0,1" bitfld.long 0x0 1. "TESTWAKEUP,Reserved must always be set to 0." "0,1" newline bitfld.long 0x0 0. "STALLTOMICRO,This bit is programmable as follows:" "0,1" rgroup.long 0x3403E8++0x3 line.long 0x0 "DDRPHYC_APBONLY0_DFIINITCOMPLETESHADOW,DDRPHYC DfiInitCompleteShadow register" bitfld.long 0x0 0. "DFIINITCOMPLETESHADOW,This bit presents a read-only view (a shadow) of DfiInitComplete which is used by the sequencer to control the state of dfi_init_complete." "0,1" tree.end tree.end tree.end tree "DSI (DSI Host)" base ad:0x0 tree "DSI" base ad:0x48000000 rgroup.long 0x0++0x3 line.long 0x0 "DSI_VR,DSI Host version register" hexmask.long 0x0 0.--31. 1. "VERSION,Version of the DSI Host" group.long 0x4++0x17 line.long 0x0 "DSI_CR,DSI Host control register" bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" line.long 0x4 "DSI_CCR,DSI Host clock control register" hexmask.long.byte 0x4 8.--15. 1. "TOCKDIV,Timeout clock division" hexmask.long.byte 0x4 0.--7. 1. "TXECKDIV,TX escape clock division" line.long 0x8 "DSI_LVCIDR,DSI Host LTDC VCID register" bitfld.long 0x8 0.--1. "VCID,Virtual channel ID" "0,1,2,3" line.long 0xC "DSI_LCOLCR,DSI Host LTDC color coding register" bitfld.long 0xC 8. "LPE,Loosely packet enable" "B_0x0,B_0x1" hexmask.long.byte 0xC 0.--3. 1. "COLC,Color coding" line.long 0x10 "DSI_LPCR,DSI Host LTDC polarity configuration register" bitfld.long 0x10 2. "HSP,HSYNC polarity" "B_0x0,B_0x1" bitfld.long 0x10 1. "VSP,VSYNC polarity" "B_0x0,B_0x1" bitfld.long 0x10 0. "DEP,Data enable polarity" "B_0x0,B_0x1" line.long 0x14 "DSI_LPMCR,DSI Host low-power mode configuration register" hexmask.long.byte 0x14 16.--23. 1. "LPSIZE,Largest packet size" hexmask.long.byte 0x14 0.--7. 1. "VLPSIZE,VACT largest packet size" group.long 0x2C++0x3 line.long 0x0 "DSI_PCR,DSI Host protocol configuration register" bitfld.long 0x0 4. "CRCRXE,CRC reception enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ECCRXE,ECC reception enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "BTAE,Bus-turn-around enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "ETRXE,EoTp reception enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "ETTXE,EoTp transmission enable" "B_0x0,B_0x1" rgroup.long 0x30++0x3 line.long 0x0 "DSI_GVCIDR,DSI Host generic VCID register" bitfld.long 0x0 0.--1. "VCID,Virtual channel ID" "0,1,2,3" group.long 0x34++0x3F line.long 0x0 "DSI_MCR,DSI Host mode configuration register" bitfld.long 0x0 0. "CMDM,Command mode" "B_0x0,B_0x1" line.long 0x4 "DSI_VMCR,DSI Host video mode configuration register" bitfld.long 0x4 24. "PGO,Pattern generator orientation" "B_0x0,B_0x1" bitfld.long 0x4 20. "PGM,Pattern generator mode" "B_0x0,B_0x1" bitfld.long 0x4 16. "PGE,Pattern generator enable" "B_0x0,B_0x1" bitfld.long 0x4 15. "LPCE,Low-power command enable" "B_0x0,B_0x1" bitfld.long 0x4 14. "FBTAAE,Frame bus-turn-around acknowledge enable" "B_0x0,B_0x1" bitfld.long 0x4 13. "LPHFPE,Low-power horizontal front-porch enable" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "LPHBPE,Low-power horizontal back-porch enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "LPVAE,Low-power vertical active enable" "B_0x0,B_0x1" bitfld.long 0x4 10. "LPVFPE,Low-power vertical front-porch enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "LPVBPE,Low-power vertical back-porch enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "LPVSAE,Low-power vertical sync active enable" "B_0x0,B_0x1" bitfld.long 0x4 0.--1. "VMT,Video mode type" "B_0x0,B_0x1,?,?" line.long 0x8 "DSI_VPCR,DSI Host video packet configuration register" hexmask.long.word 0x8 0.--13. 1. "VPSIZE,Video packet size" line.long 0xC "DSI_VCCR,DSI Host video chunks configuration register" hexmask.long.word 0xC 0.--12. 1. "NUMC,Number of chunks" line.long 0x10 "DSI_VNPCR,DSI Host video null packet configuration register" hexmask.long.word 0x10 0.--12. 1. "NPSIZE,Null packet size" line.long 0x14 "DSI_VHSACR,DSI Host video HSA configuration register" hexmask.long.word 0x14 0.--11. 1. "HSA,Horizontal synchronism active duration" line.long 0x18 "DSI_VHBPCR,DSI Host video HBP configuration register" hexmask.long.word 0x18 0.--11. 1. "HBP,Horizontal back-porch duration" line.long 0x1C "DSI_VLCR,DSI Host video line configuration register" hexmask.long.word 0x1C 0.--14. 1. "HLINE,Horizontal line duration" line.long 0x20 "DSI_VVSACR,DSI Host video VSA configuration register" hexmask.long.word 0x20 0.--9. 1. "VSA,Vertical synchronism active duration" line.long 0x24 "DSI_VVBPCR,DSI Host video VBP configuration register" hexmask.long.word 0x24 0.--9. 1. "VBP,Vertical back-porch duration" line.long 0x28 "DSI_VVFPCR,DSI Host video VFP configuration register" hexmask.long.word 0x28 0.--9. 1. "VFP,Vertical front-porch duration" line.long 0x2C "DSI_VVACR,DSI Host video VA configuration register" hexmask.long.word 0x2C 0.--13. 1. "VA,Vertical active duration" line.long 0x30 "DSI_LCCR,DSI Host LTDC command configuration register" hexmask.long.word 0x30 0.--15. 1. "CMDSIZE,Command size" line.long 0x34 "DSI_CMCR,DSI Host command mode configuration register" bitfld.long 0x34 24. "MRDPS,Maximum read packet size" "B_0x0,B_0x1" bitfld.long 0x34 19. "DLWTX,DCS long write transmission" "B_0x0,B_0x1" bitfld.long 0x34 18. "DSR0TX,DCS short read zero parameter transmission" "B_0x0,B_0x1" bitfld.long 0x34 17. "DSW1TX,DCS short read one parameter transmission" "B_0x0,B_0x1" bitfld.long 0x34 16. "DSW0TX,DCS short write zero parameter transmission" "B_0x0,B_0x1" bitfld.long 0x34 14. "GLWTX,Generic long write transmission" "B_0x0,B_0x1" newline bitfld.long 0x34 13. "GSR2TX,Generic short read two parameters transmission" "B_0x0,B_0x1" bitfld.long 0x34 12. "GSR1TX,Generic short read one parameters transmission" "B_0x0,B_0x1" bitfld.long 0x34 11. "GSR0TX,Generic short read zero parameters transmission" "B_0x0,B_0x1" bitfld.long 0x34 10. "GSW2TX,Generic short write two parameters transmission" "B_0x0,B_0x1" bitfld.long 0x34 9. "GSW1TX,Generic short write one parameters transmission" "B_0x0,B_0x1" bitfld.long 0x34 8. "GSW0TX,Generic short write zero parameters transmission" "B_0x0,B_0x1" newline bitfld.long 0x34 1. "ARE,Acknowledge request enable" "B_0x0,B_0x1" bitfld.long 0x34 0. "TEARE,Tearing effect acknowledge request enable" "B_0x0,B_0x1" line.long 0x38 "DSI_GHCR,DSI Host generic header configuration register" hexmask.long.byte 0x38 16.--23. 1. "WCMSB,WordCount MSB" hexmask.long.byte 0x38 8.--15. 1. "WCLSB,WordCount LSB" bitfld.long 0x38 6.--7. "VCID,Channel" "0,1,2,3" hexmask.long.byte 0x38 0.--5. 1. "DT,Type" line.long 0x3C "DSI_GPDR,DSI Host generic payload data register" hexmask.long.byte 0x3C 24.--31. 1. "DATA4,Payload byte 4" hexmask.long.byte 0x3C 16.--23. 1. "DATA3,Payload byte 3" hexmask.long.byte 0x3C 8.--15. 1. "DATA2,Payload byte 2" hexmask.long.byte 0x3C 0.--7. 1. "DATA1,Payload byte 1" rgroup.long 0x74++0x3 line.long 0x0 "DSI_GPSR,DSI Host generic packet status register" bitfld.long 0x0 6. "RCB,Read command busy" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDFF,Payload read FIFO full" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDFE,Payload read FIFO empty" "B_0x0,B_0x1" bitfld.long 0x0 3. "PWRFF,Payload write FIFO full" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWRFE,Payload write FIFO empty" "B_0x0,B_0x1" bitfld.long 0x0 1. "CMDFF,Command FIFO full" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "CMDFE,Command FIFO empty" "B_0x0,B_0x1" group.long 0x78++0x37 line.long 0x0 "DSI_TCCR0,DSI Host timeout counter configuration register 0" hexmask.long.word 0x0 16.--31. 1. "HSTX_TOCNT,High-speed transmission timeout counter" hexmask.long.word 0x0 0.--15. 1. "LPRX_TOCNT,Low-power reception timeout counter" line.long 0x4 "DSI_TCCR1,DSI Host timeout counter configuration register 1" hexmask.long.word 0x4 0.--15. 1. "HSRD_TOCNT,High-speed read timeout counter" line.long 0x8 "DSI_TCCR2,DSI Host timeout counter configuration register 2" hexmask.long.word 0x8 0.--15. 1. "LPRD_TOCNT,Low-power read timeout counter" line.long 0xC "DSI_TCCR3,DSI Host timeout counter configuration register 3" bitfld.long 0xC 24. "PM,Presp mode" "0,1" hexmask.long.word 0xC 0.--15. 1. "HSWR_TOCNT,High-speed write timeout counter" line.long 0x10 "DSI_TCCR4,DSI Host timeout counter configuration register 4" hexmask.long.word 0x10 0.--15. 1. "LPWR_TOCNT,Low-power write timeout counter" line.long 0x14 "DSI_TCCR5,DSI Host timeout counter configuration register 5" hexmask.long.word 0x14 0.--15. 1. "BTA_TOCNT,Bus-turn-around timeout counter" line.long 0x18 "DSI_TDCR,DSI Host 3D configuration register" bitfld.long 0x18 16. "S3DC,Send 3D control" "0,1" bitfld.long 0x18 5. "RF,Right first" "B_0x0,B_0x1" bitfld.long 0x18 4. "SVS,Second VSYNC" "B_0x0,B_0x1" bitfld.long 0x18 2.--3. "F3D,3D format" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x18 0.--1. "M3D,3D mode" "B_0x0,B_0x1,B_0x2,?" line.long 0x1C "DSI_CLCR,DSI Host clock lane configuration register" bitfld.long 0x1C 1. "ACR,Automatic clock lane control" "B_0x0,B_0x1" bitfld.long 0x1C 0. "DPCC,D-PHY clock control" "B_0x0,B_0x1" line.long 0x20 "DSI_CLTCR,DSI Host clock lane timer configuration register" hexmask.long.word 0x20 16.--25. 1. "HS2LP_TIME,High-speed to low-power time" hexmask.long.word 0x20 0.--9. 1. "LP2HS_TIME,Low-power to high-speed time" line.long 0x24 "DSI_DLTCR,DSI Host data lane timer configuration register" hexmask.long.word 0x24 16.--25. 1. "HS2LP_TIME,High-speed to low-power time" hexmask.long.word 0x24 0.--9. 1. "LP2HS_TIME,Low-power to high-speed time" line.long 0x28 "DSI_PCTLR,DSI Host PHY control register" bitfld.long 0x28 3. "UCKEN,ULPS clock enable" "B_0x0,B_0x1" bitfld.long 0x28 2. "CKEN,Clock enable" "B_0x0,B_0x1" bitfld.long 0x28 1. "DEN,Digital enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "PWEN,Power enable" "B_0x0,B_0x1" line.long 0x2C "DSI_PCONFR,DSI Host PHY configuration register" hexmask.long.byte 0x2C 8.--15. 1. "SW_TIME,Stop wait time" bitfld.long 0x2C 0.--1. "NL,Number of lanes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x30 "DSI_PUCR,DSI Host PHY ULPS control register" bitfld.long 0x30 3. "UEDL,ULPS exit on data lane" "B_0x0,B_0x1" bitfld.long 0x30 2. "URDL,ULPS request on data lane" "B_0x0,B_0x1" bitfld.long 0x30 1. "UECL,ULPS exit on clock lane" "B_0x0,B_0x1" bitfld.long 0x30 0. "URCL,ULPS request on clock lane" "B_0x0,B_0x1" line.long 0x34 "DSI_PTTCR,DSI Host PHY TX triggers configuration register" hexmask.long.byte 0x34 0.--3. 1. "TX_TRIG,Transmission trigger" rgroup.long 0xB0++0x7 line.long 0x0 "DSI_PSR,DSI Host PHY status register" bitfld.long 0x0 12. "UAN3,ULPS active not lane 3" "0,1" bitfld.long 0x0 11. "PSS3,PHY stop state lane 3" "0,1" bitfld.long 0x0 10. "UAN2,ULPS active not lane 2" "0,1" bitfld.long 0x0 9. "PSS2,PHY stop state lane 2" "0,1" bitfld.long 0x0 8. "UAN1,ULPS active not lane 1" "0,1" bitfld.long 0x0 7. "PSS1,PHY stop state lane 1" "0,1" newline bitfld.long 0x0 6. "RUE0,RX ULPS escape lane 0" "0,1" bitfld.long 0x0 5. "UAN0,ULPS active not lane 0" "0,1" bitfld.long 0x0 4. "PSS0,PHY stop state lane 0" "0,1" bitfld.long 0x0 3. "UANC,ULPS active not clock lane" "0,1" bitfld.long 0x0 2. "PSSC,PHY stop state clock lane" "0,1" bitfld.long 0x0 1. "PD,PHY direction" "0,1" newline bitfld.long 0x0 0. "PL,PHY direction" "0,1" line.long 0x4 "DSI_PTCR0,DSI Host PHY test control register 0" bitfld.long 0x4 1. "TCKEN,Test-interface clock enable for the TDI bus into the PHY:" "B_0x0,B_0x1" bitfld.long 0x4 0. "TRSEN,Test-interface reset enable for the TDI bus into the D-PHY:" "B_0x0,B_0x1" group.long 0xB8++0x3 line.long 0x0 "DSI_PTCR1,DSI Host PHY test control register 1" bitfld.long 0x0 16. "TWM,Test write mode selects the test write access performed to the D-PHY:" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "TDO,Test data out" hexmask.long.byte 0x0 0.--7. 1. "TDI,Test data in" rgroup.long 0xBC++0x7 line.long 0x0 "DSI_ISR0,DSI Host interrupt and status register 0" bitfld.long 0x0 20. "PE4,PHY error 4" "0,1" bitfld.long 0x0 19. "PE3,PHY error 3" "0,1" bitfld.long 0x0 18. "PE2,PHY error 2" "0,1" bitfld.long 0x0 17. "PE1,PHY error 1" "0,1" bitfld.long 0x0 16. "PE0,PHY error 0" "0,1" bitfld.long 0x0 15. "AE15,Acknowledge error 15" "0,1" newline bitfld.long 0x0 14. "AE14,Acknowledge error 14" "0,1" bitfld.long 0x0 13. "AE13,Acknowledge error 13" "0,1" bitfld.long 0x0 12. "AE12,Acknowledge error 12" "0,1" bitfld.long 0x0 11. "AE11,Acknowledge error 11" "0,1" bitfld.long 0x0 10. "AE10,Acknowledge error 10" "0,1" bitfld.long 0x0 9. "AE9,Acknowledge error 9" "0,1" newline bitfld.long 0x0 8. "AE8,Acknowledge error 8" "0,1" bitfld.long 0x0 7. "AE7,Acknowledge error 7" "0,1" bitfld.long 0x0 6. "AE6,Acknowledge error 6" "0,1" bitfld.long 0x0 5. "AE5,Acknowledge error 5" "0,1" bitfld.long 0x0 4. "AE4,Acknowledge error 4" "0,1" bitfld.long 0x0 3. "AE3,Acknowledge error 3" "0,1" newline bitfld.long 0x0 2. "AE2,Acknowledge error 2" "0,1" bitfld.long 0x0 1. "AE1,Acknowledge error 1" "0,1" bitfld.long 0x0 0. "AE0,Acknowledge error 0" "0,1" line.long 0x4 "DSI_ISR1,DSI Host interrupt and status register 1" bitfld.long 0x4 20. "TEE,Tear effect error" "0,1" bitfld.long 0x4 19. "VMPUE,Video mode underflow error" "0,1" bitfld.long 0x4 17. "DICE,DBI illegal command error" "0,1" bitfld.long 0x4 16. "DROE,DBI read overflow error" "0,1" bitfld.long 0x4 15. "DRUE,DCS read underflow error" "0,1" bitfld.long 0x4 14. "DDFFE,DBI data FIFO full error" "0,1" newline bitfld.long 0x4 13. "DCFFE,DBI command FIFO full error" "0,1" bitfld.long 0x4 12. "GPRXE,Generic payload receive error" "0,1" bitfld.long 0x4 11. "GPRDE,Generic payload read error" "0,1" bitfld.long 0x4 10. "GPTXE,Generic payload transmit error" "0,1" bitfld.long 0x4 9. "GPWRE,Generic payload write error" "0,1" bitfld.long 0x4 8. "GCWRE,Generic command write error" "0,1" newline bitfld.long 0x4 7. "LPWRE,LTDC payload write error" "0,1" bitfld.long 0x4 6. "EOTPE,EoTp error" "0,1" bitfld.long 0x4 5. "PSE,Packet size error" "0,1" bitfld.long 0x4 4. "CRCE,CRC error" "0,1" bitfld.long 0x4 3. "ECCME,ECC multi-bit error" "0,1" bitfld.long 0x4 2. "ECCSE,ECC single-bit error" "0,1" newline bitfld.long 0x4 1. "TOLPRX,Timeout low-power reception" "0,1" bitfld.long 0x4 0. "TOHSTX,Timeout high-speed transmission" "0,1" group.long 0xC4++0xB line.long 0x0 "DSI_IER0,DSI Host interrupt enable register 0" bitfld.long 0x0 20. "PE4IE,PHY error 4 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 19. "PE3IE,PHY error 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "PE2IE,PHY error 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "PE1IE,PHY error 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "PE0IE,PHY error 0 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 15. "AE15IE,Acknowledge error 15 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 14. "AE14IE,Acknowledge error 14 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "AE13IE,Acknowledge error 13 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "AE12IE,Acknowledge error 12 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "AE11IE,Acknowledge error 11 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "AE10IE,Acknowledge error 10 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "AE9IE,Acknowledge error 9 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "AE8IE,Acknowledge error 8 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "AE7IE,Acknowledge error 7 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "AE6IE,Acknowledge error 6 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "AE5IE,Acknowledge error 5 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "AE4IE,Acknowledge error 4 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "AE3IE,Acknowledge error 3 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "AE2IE,Acknowledge error 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "AE1IE,Acknowledge error 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "AE0IE,Acknowledge error 0 interrupt enable" "B_0x0,B_0x1" line.long 0x4 "DSI_IER1,DSI Host interrupt enable register 1" rbitfld.long 0x4 20. "TEIE,Tear effect error interrupt enable" "B_0x0,B_0x1" rbitfld.long 0x4 19. "VMPUIE,Video mode underflow error interrupt enable" "B_0x0,B_0x1" rbitfld.long 0x4 17. "DICIE,DBI illegal command error interrupt enable" "B_0x0,B_0x1" rbitfld.long 0x4 16. "DROIE,DBI read overflow error interrupt enable" "B_0x0,B_0x1" rbitfld.long 0x4 15. "DRUIE,DCS read underflow error interrupt enable" "B_0x0,B_0x1" rbitfld.long 0x4 14. "DDFFIE,DBI data FIFO full error interrupt enable" "B_0x0,B_0x1" newline rbitfld.long 0x4 13. "DCFFIE,DBI command FIFO full error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 12. "GPRXEIE,Generic payload receive error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "GPRDEIE,Generic payload read error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 10. "GPTXEIE,Generic payload transmit error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "GPWREIE,Generic payload write error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "GCWREIE,Generic command write error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "LPWREIE,LTDC payload write error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "EOTPEIE,EoTp error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "PSEIE,Packet size error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "ECCMEIE,ECC multi-bit error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "ECCSEIE,ECC single-bit error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "TOLPRXIE,Timeout low-power reception interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "TOHSTXIE,Timeout high-speed transmission interrupt enable" "B_0x0,B_0x1" line.long 0x8 "DSI_PCCR,DSI Host PHY calibration control register" bitfld.long 0x8 0. "CSEN,Calibration start for the high-speed skew of the D-PHY:" "B_0x0,B_0x1" wgroup.long 0xD8++0x7 line.long 0x0 "DSI_FIR0,DSI Host force interrupt register 0" bitfld.long 0x0 20. "FPE4,Force PHY error 4" "0,1" bitfld.long 0x0 19. "FPE3,Force PHY error 3" "0,1" bitfld.long 0x0 18. "FPE2,Force PHY error 2" "0,1" bitfld.long 0x0 17. "FPE1,Force PHY error 1" "0,1" bitfld.long 0x0 16. "FPE0,Force PHY error 0" "0,1" bitfld.long 0x0 15. "FAE15,Force acknowledge error 15" "0,1" newline bitfld.long 0x0 14. "FAE14,Force acknowledge error 14" "0,1" bitfld.long 0x0 13. "FAE13,Force acknowledge error 13" "0,1" bitfld.long 0x0 12. "FAE12,Force acknowledge error 12" "0,1" bitfld.long 0x0 11. "FAE11,Force acknowledge error 11" "0,1" bitfld.long 0x0 10. "FAE10,Force acknowledge error 10" "0,1" bitfld.long 0x0 9. "FAE9,Force acknowledge error 9" "0,1" newline bitfld.long 0x0 8. "FAE8,Force acknowledge error 8" "0,1" bitfld.long 0x0 7. "FAE7,Force acknowledge error 7" "0,1" bitfld.long 0x0 6. "FAE6,Force acknowledge error 6" "0,1" bitfld.long 0x0 5. "FAE5,Force acknowledge error 5" "0,1" bitfld.long 0x0 4. "FAE4,Force acknowledge error 4" "0,1" bitfld.long 0x0 3. "FAE3,Force acknowledge error 3" "0,1" newline bitfld.long 0x0 2. "FAE2,Force acknowledge error 2" "0,1" bitfld.long 0x0 1. "FAE1,Force acknowledge error 1" "0,1" bitfld.long 0x0 0. "FAE0,Force acknowledge error 0" "0,1" line.long 0x4 "DSI_FIR1,DSI Host force interrupt register 1" bitfld.long 0x4 12. "FGPRXE,Force generic payload receive error" "0,1" bitfld.long 0x4 11. "FGPRDE,Force generic payload read error" "0,1" bitfld.long 0x4 10. "FGPTXE,Force generic payload transmit error" "0,1" bitfld.long 0x4 9. "FGPWRE,Force generic payload write error" "0,1" bitfld.long 0x4 8. "FGCWRE,Force generic command write error" "0,1" bitfld.long 0x4 7. "FLPWRE,Force LTDC payload write error" "0,1" newline bitfld.long 0x4 6. "FEOTPE,Force EoTp error" "0,1" bitfld.long 0x4 5. "FPSE,Force packet size error" "0,1" bitfld.long 0x4 4. "FCRCE,Force CRC error" "0,1" bitfld.long 0x4 3. "FECCME,Force ECC multi-bit error" "0,1" bitfld.long 0x4 2. "FECCSE,Force ECC single-bit error" "0,1" bitfld.long 0x4 1. "FTOLPRX,Force timeout low-power reception" "0,1" newline bitfld.long 0x4 0. "FTOHSTX,Force timeout high-speed transmission" "0,1" group.long 0xF4++0x3 line.long 0x0 "DSI_DLTRCR,DSI Host data lane timer read configuration register" hexmask.long.word 0x0 0.--14. 1. "MRD_TIME,Maximum read time" group.long 0x100++0x3 line.long 0x0 "DSI_VSCR,DSI Host video shadow control register" bitfld.long 0x0 8. "UR,Update register" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x10C++0x3 line.long 0x0 "DSI_LCVCIDR,DSI Host LTDC current VCID register" bitfld.long 0x0 0.--1. "VCID,Virtual channel ID" "0,1,2,3" rgroup.long 0x110++0x3 line.long 0x0 "DSI_LCCCR,DSI Host LTDC current color coding register" bitfld.long 0x0 8. "LPE,Loosely packed enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--3. 1. "COLC,Color coding" rgroup.long 0x118++0x3 line.long 0x0 "DSI_LPMCCR,DSI Host low-power mode current configuration register" hexmask.long.byte 0x0 16.--23. 1. "LPSIZE,Largest packet size" hexmask.long.byte 0x0 0.--7. 1. "VLPSIZE,VACT largest packet size" rgroup.long 0x138++0x2B line.long 0x0 "DSI_VMCCR,DSI Host video mode current configuration register" bitfld.long 0x0 9. "LPCE,Low-power command enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "FBTAAE,Frame BTA acknowledge enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "LPHFE,Low-power horizontal front-porch enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "LPHBPE,Low-power horizontal back-porch enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "LPVAE,Low-power vertical active enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "LPVFPE,Low-power vertical front-porch enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "LPVBPE,Low-power vertical back-porch enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "LPVSAE,Low-power vertical sync time enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "VMT,Video mode type" "B_0x0,B_0x1,?,?" line.long 0x4 "DSI_VPCCR,DSI Host video packet current configuration register" hexmask.long.word 0x4 0.--13. 1. "VPSIZE,Video packet size" line.long 0x8 "DSI_VCCCR,DSI Host video chunks current configuration register" hexmask.long.word 0x8 0.--12. 1. "NUMC,Number of chunks" line.long 0xC "DSI_VNPCCR,DSI Host video null packet current configuration register" hexmask.long.word 0xC 0.--12. 1. "NPSIZE,Null packet size" line.long 0x10 "DSI_VHSACCR,DSI Host video HSA current configuration register" hexmask.long.word 0x10 0.--11. 1. "HSA,Horizontal synchronism active duration" line.long 0x14 "DSI_VHBPCCR,DSI Host video HBP current configuration register" hexmask.long.word 0x14 0.--11. 1. "HBP,Horizontal back-porch duration" line.long 0x18 "DSI_VLCCR,DSI Host video line current configuration register" hexmask.long.word 0x18 0.--14. 1. "HLINE,Horizontal line duration" line.long 0x1C "DSI_VVSACCR,DSI Host video VSA current configuration register" hexmask.long.word 0x1C 0.--9. 1. "VSA,Vertical synchronism active duration" line.long 0x20 "DSI_VVBPCCR,DSI Host video VBP current configuration register" hexmask.long.word 0x20 0.--9. 1. "VBP,Vertical back-porch duration" line.long 0x24 "DSI_VVFPCCR,DSI Host video VFP current configuration register" hexmask.long.word 0x24 0.--9. 1. "VFP,Vertical front-porch duration" line.long 0x28 "DSI_VVACCR,DSI Host video VA current configuration register" hexmask.long.word 0x28 0.--13. 1. "VA,Vertical active duration" rgroup.long 0x190++0x3 line.long 0x0 "DSI_TDCCR,DSI Host 3D current configuration register" bitfld.long 0x0 16. "S3DC,Send 3D control" "0,1" bitfld.long 0x0 5. "RF,Right first" "B_0x0,B_0x1" bitfld.long 0x0 4. "SVS,Second VSYNC" "B_0x0,B_0x1" bitfld.long 0x0 2.--3. "F3D,3D format" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 0.--1. "M3D,3D mode" "B_0x0,B_0x1,B_0x2,?" group.long 0x400++0xF line.long 0x0 "DSI_WCFGR,DSI Wrapper configuration register" bitfld.long 0x0 7. "VSPOL,VSync polarity" "B_0x0,B_0x1" bitfld.long 0x0 6. "AR,Automatic refresh" "B_0x0,B_0x1" bitfld.long 0x0 5. "TEPOL,TE polarity" "B_0x0,B_0x1" bitfld.long 0x0 4. "TESRC,TE source" "B_0x0,B_0x1" bitfld.long 0x0 1.--3. "COLMUX,Color multiplexing" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 0. "DSIM,DSI mode" "B_0x0,B_0x1" line.long 0x4 "DSI_WCR,DSI Wrapper control register" bitfld.long 0x4 3. "DSIEN,DSI enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "LTDCEN,LTDC enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "SHTDN,Shutdown" "B_0x0,B_0x1" bitfld.long 0x4 0. "COLM,Color mode" "B_0x0,B_0x1" line.long 0x8 "DSI_WIER,DSI Wrapper interrupt enable register" bitfld.long 0x8 13. "LAEIE,LCD APB error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x8 10. "PLLUIE,PLL unlock interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "PLLLIE,PLL lock interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 1. "ERIE,End of refresh interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "TEIE,Tearing effect interrupt enable" "B_0x0,B_0x1" line.long 0xC "DSI_WISR,DSI Wrapper interrupt and status register" bitfld.long 0xC 14. "LAEIF,LCD APB error interrupt flag" "B_0x0,B_0x1" rbitfld.long 0xC 10. "PLLUIF,PLL unlock interrupt flag" "B_0x0,B_0x1" rbitfld.long 0xC 9. "PLLLIF,PLL lock interrupt flag" "B_0x0,B_0x1" rbitfld.long 0xC 8. "PLLLS,PLL lock status" "B_0x0,B_0x1" rbitfld.long 0xC 2. "BUSY,Busy flag" "B_0x0,B_0x1" rbitfld.long 0xC 1. "ERIF,End of refresh interrupt flag" "B_0x0,B_0x1" newline rbitfld.long 0xC 0. "TEIF,Tearing effect interrupt flag" "B_0x0,B_0x1" wgroup.long 0x410++0x3 line.long 0x0 "DSI_WIFCR,DSI Wrapper interrupt flag clear register" bitfld.long 0x0 14. "CLAEIF,LCD APB error interrupt flag" "0,1" bitfld.long 0x0 10. "CPLLUIF,Clear PLL unlock interrupt flag" "0,1" bitfld.long 0x0 9. "CPLLLIF,Clear PLL lock interrupt flag" "0,1" bitfld.long 0x0 1. "CERIF,Clear end of refresh interrupt flag" "0,1" bitfld.long 0x0 0. "CTEIF,Clear tearing effect interrupt flag" "0,1" group.long 0x418++0x3 line.long 0x0 "DSI_WPCR0,DSI Wrapper PHY configuration register 0" bitfld.long 0x0 4.--5. "RXTRG,Rx trigger escape selection" "0,1,2,3" bitfld.long 0x0 1. "FTXSMDL,Force to TX stop mode the data lanes" "B_0x0,B_0x1" bitfld.long 0x0 0. "TDDL,Turnaround disable data lanes" "B_0x0,B_0x1" group.long 0x430++0xF line.long 0x0 "DSI_WPCR1,DSI Wrapper PHY configuration register 1" bitfld.long 0x0 16. "DLD,Data lanes 0 direction:" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--14. 1. "HSFR,High speed frequency range in Tx mode. The values are given in Table518 " hexmask.long.byte 0x0 0.--5. 1. "CCF,Configuration clock frequency:" line.long 0x4 "DSI_WRPCR0,DSI Wrapper regulator and PLL configuration register 0" bitfld.long 0x4 16. "PSC,PLL shadow control" "B_0x0,B_0x1" hexmask.long.word 0x4 4.--13. 1. "NDIV,PLL InLoop division ratio:" hexmask.long.byte 0x4 0.--3. 1. "IDF,PLL input division ratio:" line.long 0x8 "DSI_WRPCR1,DSI Wrapper regulator and PLL configuration register 1" bitfld.long 0x8 28.--29. "ODF,Output division factor" "B_0x0,B_0x1,?,?" hexmask.long.byte 0x8 24.--27. 1. "VCO,VCO operating range" hexmask.long.byte 0x8 16.--22. 1. "BIAS,Charge pump bias" hexmask.long.byte 0x8 8.--13. 1. "INT,Integral of charge pump" bitfld.long 0x8 6.--7. "GMP,Loop filter resistance" "0,1,2,3" hexmask.long.byte 0x8 0.--5. 1. "PROP,Proportional charge pump" line.long 0xC "DSI_WRPCR2,DSI Wrapper regulator and PLL configuration register 2" bitfld.long 0xC 28. "FPLLLOCK,Force PLL lock signal" "B_0x0,B_0x1" bitfld.long 0xC 24. "CLR,Clears the PLL shadow registers to their reset values" "B_0x0,B_0x1" bitfld.long 0xC 16. "UPD,Update (copies) the PLL shadow registers to the effective PLL registers" "B_0x0,B_0x1" bitfld.long 0xC 8. "PLLEN,PLL enable" "B_0x0,B_0x1" bitfld.long 0xC 0.--1. "SEL,Output selection for PLL Clock:" "B_0x0,B_0x1,?,?" rgroup.long 0x440++0x3 line.long 0x0 "DSI_WRPSR0,DSI Wrapper regulator and PLL status register 0" bitfld.long 0x0 16. "PSC,PLL shadow control" "B_0x0,B_0x1" hexmask.long.word 0x0 4.--13. 1. "NDIV,Shadow value of PLL InLoop division ratio" hexmask.long.byte 0x0 0.--3. 1. "IDF,Shadow value of PLL input division ratio" group.long 0x444++0x3 line.long 0x0 "DSI_WRPSR1,DSI Wrapper regulator and PLL status register 1" bitfld.long 0x0 28.--29. "ODF,Output division factor" "B_0x0,B_0x1,?,?" hexmask.long.byte 0x0 24.--27. 1. "VCO,VCO operating range" hexmask.long.byte 0x0 16.--22. 1. "BIAS,Charge pump bias" hexmask.long.byte 0x0 8.--13. 1. "INT,Charge pump integral" bitfld.long 0x0 6.--7. "GMP,Charge pump integral" "0,1,2,3" hexmask.long.byte 0x0 0.--5. 1. "PROP,Proportional charge pump" wgroup.long 0x480++0x3 line.long 0x0 "DSI_WCRB,DSI Wrapper control register bis" bitfld.long 0x0 2. "LTDCEN,LTDC enable" "B_0x0,B_0x1" rgroup.long 0x7F0++0xF line.long 0x0 "DSI_HWCFGR,DSI hardware configuration register" hexmask.long.byte 0x0 20.--23. 1. "LINKS,Amount of DSI PHY links" hexmask.long.byte 0x0 16.--19. 1. "LANES,Amount of DSI DataLanes per Link (excluding the ClockLane)" hexmask.long.word 0x0 4.--15. 1. "FIFOSIZE,FIFO size" hexmask.long.byte 0x0 0.--3. 1. "TECHNO,Technology" line.long 0x4 "DSI_VERR,DSI version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "DSI_IPIDR,DSI identification register" hexmask.long 0x8 0.--31. 1. "ID,Identification code" line.long 0xC "DSI_SIDR,DSI size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code" tree.end tree "DSI_S" base ad:0x58000000 rgroup.long 0x0++0x3 line.long 0x0 "DSI_VR,DSI Host version register" hexmask.long 0x0 0.--31. 1. "VERSION,Version of the DSI Host" group.long 0x4++0x17 line.long 0x0 "DSI_CR,DSI Host control register" bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" line.long 0x4 "DSI_CCR,DSI Host clock control register" hexmask.long.byte 0x4 8.--15. 1. "TOCKDIV,Timeout clock division" hexmask.long.byte 0x4 0.--7. 1. "TXECKDIV,TX escape clock division" line.long 0x8 "DSI_LVCIDR,DSI Host LTDC VCID register" bitfld.long 0x8 0.--1. "VCID,Virtual channel ID" "0,1,2,3" line.long 0xC "DSI_LCOLCR,DSI Host LTDC color coding register" bitfld.long 0xC 8. "LPE,Loosely packet enable" "B_0x0,B_0x1" hexmask.long.byte 0xC 0.--3. 1. "COLC,Color coding" line.long 0x10 "DSI_LPCR,DSI Host LTDC polarity configuration register" bitfld.long 0x10 2. "HSP,HSYNC polarity" "B_0x0,B_0x1" bitfld.long 0x10 1. "VSP,VSYNC polarity" "B_0x0,B_0x1" bitfld.long 0x10 0. "DEP,Data enable polarity" "B_0x0,B_0x1" line.long 0x14 "DSI_LPMCR,DSI Host low-power mode configuration register" hexmask.long.byte 0x14 16.--23. 1. "LPSIZE,Largest packet size" hexmask.long.byte 0x14 0.--7. 1. "VLPSIZE,VACT largest packet size" group.long 0x2C++0x3 line.long 0x0 "DSI_PCR,DSI Host protocol configuration register" bitfld.long 0x0 4. "CRCRXE,CRC reception enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ECCRXE,ECC reception enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "BTAE,Bus-turn-around enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "ETRXE,EoTp reception enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "ETTXE,EoTp transmission enable" "B_0x0,B_0x1" rgroup.long 0x30++0x3 line.long 0x0 "DSI_GVCIDR,DSI Host generic VCID register" bitfld.long 0x0 0.--1. "VCID,Virtual channel ID" "0,1,2,3" group.long 0x34++0x3F line.long 0x0 "DSI_MCR,DSI Host mode configuration register" bitfld.long 0x0 0. "CMDM,Command mode" "B_0x0,B_0x1" line.long 0x4 "DSI_VMCR,DSI Host video mode configuration register" bitfld.long 0x4 24. "PGO,Pattern generator orientation" "B_0x0,B_0x1" bitfld.long 0x4 20. "PGM,Pattern generator mode" "B_0x0,B_0x1" bitfld.long 0x4 16. "PGE,Pattern generator enable" "B_0x0,B_0x1" bitfld.long 0x4 15. "LPCE,Low-power command enable" "B_0x0,B_0x1" bitfld.long 0x4 14. "FBTAAE,Frame bus-turn-around acknowledge enable" "B_0x0,B_0x1" bitfld.long 0x4 13. "LPHFPE,Low-power horizontal front-porch enable" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "LPHBPE,Low-power horizontal back-porch enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "LPVAE,Low-power vertical active enable" "B_0x0,B_0x1" bitfld.long 0x4 10. "LPVFPE,Low-power vertical front-porch enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "LPVBPE,Low-power vertical back-porch enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "LPVSAE,Low-power vertical sync active enable" "B_0x0,B_0x1" bitfld.long 0x4 0.--1. "VMT,Video mode type" "B_0x0,B_0x1,?,?" line.long 0x8 "DSI_VPCR,DSI Host video packet configuration register" hexmask.long.word 0x8 0.--13. 1. "VPSIZE,Video packet size" line.long 0xC "DSI_VCCR,DSI Host video chunks configuration register" hexmask.long.word 0xC 0.--12. 1. "NUMC,Number of chunks" line.long 0x10 "DSI_VNPCR,DSI Host video null packet configuration register" hexmask.long.word 0x10 0.--12. 1. "NPSIZE,Null packet size" line.long 0x14 "DSI_VHSACR,DSI Host video HSA configuration register" hexmask.long.word 0x14 0.--11. 1. "HSA,Horizontal synchronism active duration" line.long 0x18 "DSI_VHBPCR,DSI Host video HBP configuration register" hexmask.long.word 0x18 0.--11. 1. "HBP,Horizontal back-porch duration" line.long 0x1C "DSI_VLCR,DSI Host video line configuration register" hexmask.long.word 0x1C 0.--14. 1. "HLINE,Horizontal line duration" line.long 0x20 "DSI_VVSACR,DSI Host video VSA configuration register" hexmask.long.word 0x20 0.--9. 1. "VSA,Vertical synchronism active duration" line.long 0x24 "DSI_VVBPCR,DSI Host video VBP configuration register" hexmask.long.word 0x24 0.--9. 1. "VBP,Vertical back-porch duration" line.long 0x28 "DSI_VVFPCR,DSI Host video VFP configuration register" hexmask.long.word 0x28 0.--9. 1. "VFP,Vertical front-porch duration" line.long 0x2C "DSI_VVACR,DSI Host video VA configuration register" hexmask.long.word 0x2C 0.--13. 1. "VA,Vertical active duration" line.long 0x30 "DSI_LCCR,DSI Host LTDC command configuration register" hexmask.long.word 0x30 0.--15. 1. "CMDSIZE,Command size" line.long 0x34 "DSI_CMCR,DSI Host command mode configuration register" bitfld.long 0x34 24. "MRDPS,Maximum read packet size" "B_0x0,B_0x1" bitfld.long 0x34 19. "DLWTX,DCS long write transmission" "B_0x0,B_0x1" bitfld.long 0x34 18. "DSR0TX,DCS short read zero parameter transmission" "B_0x0,B_0x1" bitfld.long 0x34 17. "DSW1TX,DCS short read one parameter transmission" "B_0x0,B_0x1" bitfld.long 0x34 16. "DSW0TX,DCS short write zero parameter transmission" "B_0x0,B_0x1" bitfld.long 0x34 14. "GLWTX,Generic long write transmission" "B_0x0,B_0x1" newline bitfld.long 0x34 13. "GSR2TX,Generic short read two parameters transmission" "B_0x0,B_0x1" bitfld.long 0x34 12. "GSR1TX,Generic short read one parameters transmission" "B_0x0,B_0x1" bitfld.long 0x34 11. "GSR0TX,Generic short read zero parameters transmission" "B_0x0,B_0x1" bitfld.long 0x34 10. "GSW2TX,Generic short write two parameters transmission" "B_0x0,B_0x1" bitfld.long 0x34 9. "GSW1TX,Generic short write one parameters transmission" "B_0x0,B_0x1" bitfld.long 0x34 8. "GSW0TX,Generic short write zero parameters transmission" "B_0x0,B_0x1" newline bitfld.long 0x34 1. "ARE,Acknowledge request enable" "B_0x0,B_0x1" bitfld.long 0x34 0. "TEARE,Tearing effect acknowledge request enable" "B_0x0,B_0x1" line.long 0x38 "DSI_GHCR,DSI Host generic header configuration register" hexmask.long.byte 0x38 16.--23. 1. "WCMSB,WordCount MSB" hexmask.long.byte 0x38 8.--15. 1. "WCLSB,WordCount LSB" bitfld.long 0x38 6.--7. "VCID,Channel" "0,1,2,3" hexmask.long.byte 0x38 0.--5. 1. "DT,Type" line.long 0x3C "DSI_GPDR,DSI Host generic payload data register" hexmask.long.byte 0x3C 24.--31. 1. "DATA4,Payload byte 4" hexmask.long.byte 0x3C 16.--23. 1. "DATA3,Payload byte 3" hexmask.long.byte 0x3C 8.--15. 1. "DATA2,Payload byte 2" hexmask.long.byte 0x3C 0.--7. 1. "DATA1,Payload byte 1" rgroup.long 0x74++0x3 line.long 0x0 "DSI_GPSR,DSI Host generic packet status register" bitfld.long 0x0 6. "RCB,Read command busy" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDFF,Payload read FIFO full" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDFE,Payload read FIFO empty" "B_0x0,B_0x1" bitfld.long 0x0 3. "PWRFF,Payload write FIFO full" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWRFE,Payload write FIFO empty" "B_0x0,B_0x1" bitfld.long 0x0 1. "CMDFF,Command FIFO full" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "CMDFE,Command FIFO empty" "B_0x0,B_0x1" group.long 0x78++0x37 line.long 0x0 "DSI_TCCR0,DSI Host timeout counter configuration register 0" hexmask.long.word 0x0 16.--31. 1. "HSTX_TOCNT,High-speed transmission timeout counter" hexmask.long.word 0x0 0.--15. 1. "LPRX_TOCNT,Low-power reception timeout counter" line.long 0x4 "DSI_TCCR1,DSI Host timeout counter configuration register 1" hexmask.long.word 0x4 0.--15. 1. "HSRD_TOCNT,High-speed read timeout counter" line.long 0x8 "DSI_TCCR2,DSI Host timeout counter configuration register 2" hexmask.long.word 0x8 0.--15. 1. "LPRD_TOCNT,Low-power read timeout counter" line.long 0xC "DSI_TCCR3,DSI Host timeout counter configuration register 3" bitfld.long 0xC 24. "PM,Presp mode" "0,1" hexmask.long.word 0xC 0.--15. 1. "HSWR_TOCNT,High-speed write timeout counter" line.long 0x10 "DSI_TCCR4,DSI Host timeout counter configuration register 4" hexmask.long.word 0x10 0.--15. 1. "LPWR_TOCNT,Low-power write timeout counter" line.long 0x14 "DSI_TCCR5,DSI Host timeout counter configuration register 5" hexmask.long.word 0x14 0.--15. 1. "BTA_TOCNT,Bus-turn-around timeout counter" line.long 0x18 "DSI_TDCR,DSI Host 3D configuration register" bitfld.long 0x18 16. "S3DC,Send 3D control" "0,1" bitfld.long 0x18 5. "RF,Right first" "B_0x0,B_0x1" bitfld.long 0x18 4. "SVS,Second VSYNC" "B_0x0,B_0x1" bitfld.long 0x18 2.--3. "F3D,3D format" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x18 0.--1. "M3D,3D mode" "B_0x0,B_0x1,B_0x2,?" line.long 0x1C "DSI_CLCR,DSI Host clock lane configuration register" bitfld.long 0x1C 1. "ACR,Automatic clock lane control" "B_0x0,B_0x1" bitfld.long 0x1C 0. "DPCC,D-PHY clock control" "B_0x0,B_0x1" line.long 0x20 "DSI_CLTCR,DSI Host clock lane timer configuration register" hexmask.long.word 0x20 16.--25. 1. "HS2LP_TIME,High-speed to low-power time" hexmask.long.word 0x20 0.--9. 1. "LP2HS_TIME,Low-power to high-speed time" line.long 0x24 "DSI_DLTCR,DSI Host data lane timer configuration register" hexmask.long.word 0x24 16.--25. 1. "HS2LP_TIME,High-speed to low-power time" hexmask.long.word 0x24 0.--9. 1. "LP2HS_TIME,Low-power to high-speed time" line.long 0x28 "DSI_PCTLR,DSI Host PHY control register" bitfld.long 0x28 3. "UCKEN,ULPS clock enable" "B_0x0,B_0x1" bitfld.long 0x28 2. "CKEN,Clock enable" "B_0x0,B_0x1" bitfld.long 0x28 1. "DEN,Digital enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "PWEN,Power enable" "B_0x0,B_0x1" line.long 0x2C "DSI_PCONFR,DSI Host PHY configuration register" hexmask.long.byte 0x2C 8.--15. 1. "SW_TIME,Stop wait time" bitfld.long 0x2C 0.--1. "NL,Number of lanes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x30 "DSI_PUCR,DSI Host PHY ULPS control register" bitfld.long 0x30 3. "UEDL,ULPS exit on data lane" "B_0x0,B_0x1" bitfld.long 0x30 2. "URDL,ULPS request on data lane" "B_0x0,B_0x1" bitfld.long 0x30 1. "UECL,ULPS exit on clock lane" "B_0x0,B_0x1" bitfld.long 0x30 0. "URCL,ULPS request on clock lane" "B_0x0,B_0x1" line.long 0x34 "DSI_PTTCR,DSI Host PHY TX triggers configuration register" hexmask.long.byte 0x34 0.--3. 1. "TX_TRIG,Transmission trigger" rgroup.long 0xB0++0x7 line.long 0x0 "DSI_PSR,DSI Host PHY status register" bitfld.long 0x0 12. "UAN3,ULPS active not lane 3" "0,1" bitfld.long 0x0 11. "PSS3,PHY stop state lane 3" "0,1" bitfld.long 0x0 10. "UAN2,ULPS active not lane 2" "0,1" bitfld.long 0x0 9. "PSS2,PHY stop state lane 2" "0,1" bitfld.long 0x0 8. "UAN1,ULPS active not lane 1" "0,1" bitfld.long 0x0 7. "PSS1,PHY stop state lane 1" "0,1" newline bitfld.long 0x0 6. "RUE0,RX ULPS escape lane 0" "0,1" bitfld.long 0x0 5. "UAN0,ULPS active not lane 0" "0,1" bitfld.long 0x0 4. "PSS0,PHY stop state lane 0" "0,1" bitfld.long 0x0 3. "UANC,ULPS active not clock lane" "0,1" bitfld.long 0x0 2. "PSSC,PHY stop state clock lane" "0,1" bitfld.long 0x0 1. "PD,PHY direction" "0,1" newline bitfld.long 0x0 0. "PL,PHY direction" "0,1" line.long 0x4 "DSI_PTCR0,DSI Host PHY test control register 0" bitfld.long 0x4 1. "TCKEN,Test-interface clock enable for the TDI bus into the PHY:" "B_0x0,B_0x1" bitfld.long 0x4 0. "TRSEN,Test-interface reset enable for the TDI bus into the D-PHY:" "B_0x0,B_0x1" group.long 0xB8++0x3 line.long 0x0 "DSI_PTCR1,DSI Host PHY test control register 1" bitfld.long 0x0 16. "TWM,Test write mode selects the test write access performed to the D-PHY:" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "TDO,Test data out" hexmask.long.byte 0x0 0.--7. 1. "TDI,Test data in" rgroup.long 0xBC++0x7 line.long 0x0 "DSI_ISR0,DSI Host interrupt and status register 0" bitfld.long 0x0 20. "PE4,PHY error 4" "0,1" bitfld.long 0x0 19. "PE3,PHY error 3" "0,1" bitfld.long 0x0 18. "PE2,PHY error 2" "0,1" bitfld.long 0x0 17. "PE1,PHY error 1" "0,1" bitfld.long 0x0 16. "PE0,PHY error 0" "0,1" bitfld.long 0x0 15. "AE15,Acknowledge error 15" "0,1" newline bitfld.long 0x0 14. "AE14,Acknowledge error 14" "0,1" bitfld.long 0x0 13. "AE13,Acknowledge error 13" "0,1" bitfld.long 0x0 12. "AE12,Acknowledge error 12" "0,1" bitfld.long 0x0 11. "AE11,Acknowledge error 11" "0,1" bitfld.long 0x0 10. "AE10,Acknowledge error 10" "0,1" bitfld.long 0x0 9. "AE9,Acknowledge error 9" "0,1" newline bitfld.long 0x0 8. "AE8,Acknowledge error 8" "0,1" bitfld.long 0x0 7. "AE7,Acknowledge error 7" "0,1" bitfld.long 0x0 6. "AE6,Acknowledge error 6" "0,1" bitfld.long 0x0 5. "AE5,Acknowledge error 5" "0,1" bitfld.long 0x0 4. "AE4,Acknowledge error 4" "0,1" bitfld.long 0x0 3. "AE3,Acknowledge error 3" "0,1" newline bitfld.long 0x0 2. "AE2,Acknowledge error 2" "0,1" bitfld.long 0x0 1. "AE1,Acknowledge error 1" "0,1" bitfld.long 0x0 0. "AE0,Acknowledge error 0" "0,1" line.long 0x4 "DSI_ISR1,DSI Host interrupt and status register 1" bitfld.long 0x4 20. "TEE,Tear effect error" "0,1" bitfld.long 0x4 19. "VMPUE,Video mode underflow error" "0,1" bitfld.long 0x4 17. "DICE,DBI illegal command error" "0,1" bitfld.long 0x4 16. "DROE,DBI read overflow error" "0,1" bitfld.long 0x4 15. "DRUE,DCS read underflow error" "0,1" bitfld.long 0x4 14. "DDFFE,DBI data FIFO full error" "0,1" newline bitfld.long 0x4 13. "DCFFE,DBI command FIFO full error" "0,1" bitfld.long 0x4 12. "GPRXE,Generic payload receive error" "0,1" bitfld.long 0x4 11. "GPRDE,Generic payload read error" "0,1" bitfld.long 0x4 10. "GPTXE,Generic payload transmit error" "0,1" bitfld.long 0x4 9. "GPWRE,Generic payload write error" "0,1" bitfld.long 0x4 8. "GCWRE,Generic command write error" "0,1" newline bitfld.long 0x4 7. "LPWRE,LTDC payload write error" "0,1" bitfld.long 0x4 6. "EOTPE,EoTp error" "0,1" bitfld.long 0x4 5. "PSE,Packet size error" "0,1" bitfld.long 0x4 4. "CRCE,CRC error" "0,1" bitfld.long 0x4 3. "ECCME,ECC multi-bit error" "0,1" bitfld.long 0x4 2. "ECCSE,ECC single-bit error" "0,1" newline bitfld.long 0x4 1. "TOLPRX,Timeout low-power reception" "0,1" bitfld.long 0x4 0. "TOHSTX,Timeout high-speed transmission" "0,1" group.long 0xC4++0xB line.long 0x0 "DSI_IER0,DSI Host interrupt enable register 0" bitfld.long 0x0 20. "PE4IE,PHY error 4 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 19. "PE3IE,PHY error 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "PE2IE,PHY error 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "PE1IE,PHY error 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "PE0IE,PHY error 0 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 15. "AE15IE,Acknowledge error 15 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 14. "AE14IE,Acknowledge error 14 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "AE13IE,Acknowledge error 13 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "AE12IE,Acknowledge error 12 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "AE11IE,Acknowledge error 11 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "AE10IE,Acknowledge error 10 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "AE9IE,Acknowledge error 9 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "AE8IE,Acknowledge error 8 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "AE7IE,Acknowledge error 7 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "AE6IE,Acknowledge error 6 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "AE5IE,Acknowledge error 5 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "AE4IE,Acknowledge error 4 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "AE3IE,Acknowledge error 3 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "AE2IE,Acknowledge error 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "AE1IE,Acknowledge error 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "AE0IE,Acknowledge error 0 interrupt enable" "B_0x0,B_0x1" line.long 0x4 "DSI_IER1,DSI Host interrupt enable register 1" rbitfld.long 0x4 20. "TEIE,Tear effect error interrupt enable" "B_0x0,B_0x1" rbitfld.long 0x4 19. "VMPUIE,Video mode underflow error interrupt enable" "B_0x0,B_0x1" rbitfld.long 0x4 17. "DICIE,DBI illegal command error interrupt enable" "B_0x0,B_0x1" rbitfld.long 0x4 16. "DROIE,DBI read overflow error interrupt enable" "B_0x0,B_0x1" rbitfld.long 0x4 15. "DRUIE,DCS read underflow error interrupt enable" "B_0x0,B_0x1" rbitfld.long 0x4 14. "DDFFIE,DBI data FIFO full error interrupt enable" "B_0x0,B_0x1" newline rbitfld.long 0x4 13. "DCFFIE,DBI command FIFO full error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 12. "GPRXEIE,Generic payload receive error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "GPRDEIE,Generic payload read error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 10. "GPTXEIE,Generic payload transmit error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "GPWREIE,Generic payload write error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "GCWREIE,Generic command write error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "LPWREIE,LTDC payload write error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "EOTPEIE,EoTp error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "PSEIE,Packet size error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "ECCMEIE,ECC multi-bit error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "ECCSEIE,ECC single-bit error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "TOLPRXIE,Timeout low-power reception interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "TOHSTXIE,Timeout high-speed transmission interrupt enable" "B_0x0,B_0x1" line.long 0x8 "DSI_PCCR,DSI Host PHY calibration control register" bitfld.long 0x8 0. "CSEN,Calibration start for the high-speed skew of the D-PHY:" "B_0x0,B_0x1" wgroup.long 0xD8++0x7 line.long 0x0 "DSI_FIR0,DSI Host force interrupt register 0" bitfld.long 0x0 20. "FPE4,Force PHY error 4" "0,1" bitfld.long 0x0 19. "FPE3,Force PHY error 3" "0,1" bitfld.long 0x0 18. "FPE2,Force PHY error 2" "0,1" bitfld.long 0x0 17. "FPE1,Force PHY error 1" "0,1" bitfld.long 0x0 16. "FPE0,Force PHY error 0" "0,1" bitfld.long 0x0 15. "FAE15,Force acknowledge error 15" "0,1" newline bitfld.long 0x0 14. "FAE14,Force acknowledge error 14" "0,1" bitfld.long 0x0 13. "FAE13,Force acknowledge error 13" "0,1" bitfld.long 0x0 12. "FAE12,Force acknowledge error 12" "0,1" bitfld.long 0x0 11. "FAE11,Force acknowledge error 11" "0,1" bitfld.long 0x0 10. "FAE10,Force acknowledge error 10" "0,1" bitfld.long 0x0 9. "FAE9,Force acknowledge error 9" "0,1" newline bitfld.long 0x0 8. "FAE8,Force acknowledge error 8" "0,1" bitfld.long 0x0 7. "FAE7,Force acknowledge error 7" "0,1" bitfld.long 0x0 6. "FAE6,Force acknowledge error 6" "0,1" bitfld.long 0x0 5. "FAE5,Force acknowledge error 5" "0,1" bitfld.long 0x0 4. "FAE4,Force acknowledge error 4" "0,1" bitfld.long 0x0 3. "FAE3,Force acknowledge error 3" "0,1" newline bitfld.long 0x0 2. "FAE2,Force acknowledge error 2" "0,1" bitfld.long 0x0 1. "FAE1,Force acknowledge error 1" "0,1" bitfld.long 0x0 0. "FAE0,Force acknowledge error 0" "0,1" line.long 0x4 "DSI_FIR1,DSI Host force interrupt register 1" bitfld.long 0x4 12. "FGPRXE,Force generic payload receive error" "0,1" bitfld.long 0x4 11. "FGPRDE,Force generic payload read error" "0,1" bitfld.long 0x4 10. "FGPTXE,Force generic payload transmit error" "0,1" bitfld.long 0x4 9. "FGPWRE,Force generic payload write error" "0,1" bitfld.long 0x4 8. "FGCWRE,Force generic command write error" "0,1" bitfld.long 0x4 7. "FLPWRE,Force LTDC payload write error" "0,1" newline bitfld.long 0x4 6. "FEOTPE,Force EoTp error" "0,1" bitfld.long 0x4 5. "FPSE,Force packet size error" "0,1" bitfld.long 0x4 4. "FCRCE,Force CRC error" "0,1" bitfld.long 0x4 3. "FECCME,Force ECC multi-bit error" "0,1" bitfld.long 0x4 2. "FECCSE,Force ECC single-bit error" "0,1" bitfld.long 0x4 1. "FTOLPRX,Force timeout low-power reception" "0,1" newline bitfld.long 0x4 0. "FTOHSTX,Force timeout high-speed transmission" "0,1" group.long 0xF4++0x3 line.long 0x0 "DSI_DLTRCR,DSI Host data lane timer read configuration register" hexmask.long.word 0x0 0.--14. 1. "MRD_TIME,Maximum read time" group.long 0x100++0x3 line.long 0x0 "DSI_VSCR,DSI Host video shadow control register" bitfld.long 0x0 8. "UR,Update register" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x10C++0x3 line.long 0x0 "DSI_LCVCIDR,DSI Host LTDC current VCID register" bitfld.long 0x0 0.--1. "VCID,Virtual channel ID" "0,1,2,3" rgroup.long 0x110++0x3 line.long 0x0 "DSI_LCCCR,DSI Host LTDC current color coding register" bitfld.long 0x0 8. "LPE,Loosely packed enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--3. 1. "COLC,Color coding" rgroup.long 0x118++0x3 line.long 0x0 "DSI_LPMCCR,DSI Host low-power mode current configuration register" hexmask.long.byte 0x0 16.--23. 1. "LPSIZE,Largest packet size" hexmask.long.byte 0x0 0.--7. 1. "VLPSIZE,VACT largest packet size" rgroup.long 0x138++0x2B line.long 0x0 "DSI_VMCCR,DSI Host video mode current configuration register" bitfld.long 0x0 9. "LPCE,Low-power command enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "FBTAAE,Frame BTA acknowledge enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "LPHFE,Low-power horizontal front-porch enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "LPHBPE,Low-power horizontal back-porch enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "LPVAE,Low-power vertical active enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "LPVFPE,Low-power vertical front-porch enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "LPVBPE,Low-power vertical back-porch enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "LPVSAE,Low-power vertical sync time enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "VMT,Video mode type" "B_0x0,B_0x1,?,?" line.long 0x4 "DSI_VPCCR,DSI Host video packet current configuration register" hexmask.long.word 0x4 0.--13. 1. "VPSIZE,Video packet size" line.long 0x8 "DSI_VCCCR,DSI Host video chunks current configuration register" hexmask.long.word 0x8 0.--12. 1. "NUMC,Number of chunks" line.long 0xC "DSI_VNPCCR,DSI Host video null packet current configuration register" hexmask.long.word 0xC 0.--12. 1. "NPSIZE,Null packet size" line.long 0x10 "DSI_VHSACCR,DSI Host video HSA current configuration register" hexmask.long.word 0x10 0.--11. 1. "HSA,Horizontal synchronism active duration" line.long 0x14 "DSI_VHBPCCR,DSI Host video HBP current configuration register" hexmask.long.word 0x14 0.--11. 1. "HBP,Horizontal back-porch duration" line.long 0x18 "DSI_VLCCR,DSI Host video line current configuration register" hexmask.long.word 0x18 0.--14. 1. "HLINE,Horizontal line duration" line.long 0x1C "DSI_VVSACCR,DSI Host video VSA current configuration register" hexmask.long.word 0x1C 0.--9. 1. "VSA,Vertical synchronism active duration" line.long 0x20 "DSI_VVBPCCR,DSI Host video VBP current configuration register" hexmask.long.word 0x20 0.--9. 1. "VBP,Vertical back-porch duration" line.long 0x24 "DSI_VVFPCCR,DSI Host video VFP current configuration register" hexmask.long.word 0x24 0.--9. 1. "VFP,Vertical front-porch duration" line.long 0x28 "DSI_VVACCR,DSI Host video VA current configuration register" hexmask.long.word 0x28 0.--13. 1. "VA,Vertical active duration" rgroup.long 0x190++0x3 line.long 0x0 "DSI_TDCCR,DSI Host 3D current configuration register" bitfld.long 0x0 16. "S3DC,Send 3D control" "0,1" bitfld.long 0x0 5. "RF,Right first" "B_0x0,B_0x1" bitfld.long 0x0 4. "SVS,Second VSYNC" "B_0x0,B_0x1" bitfld.long 0x0 2.--3. "F3D,3D format" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 0.--1. "M3D,3D mode" "B_0x0,B_0x1,B_0x2,?" group.long 0x400++0xF line.long 0x0 "DSI_WCFGR,DSI Wrapper configuration register" bitfld.long 0x0 7. "VSPOL,VSync polarity" "B_0x0,B_0x1" bitfld.long 0x0 6. "AR,Automatic refresh" "B_0x0,B_0x1" bitfld.long 0x0 5. "TEPOL,TE polarity" "B_0x0,B_0x1" bitfld.long 0x0 4. "TESRC,TE source" "B_0x0,B_0x1" bitfld.long 0x0 1.--3. "COLMUX,Color multiplexing" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 0. "DSIM,DSI mode" "B_0x0,B_0x1" line.long 0x4 "DSI_WCR,DSI Wrapper control register" bitfld.long 0x4 3. "DSIEN,DSI enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "LTDCEN,LTDC enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "SHTDN,Shutdown" "B_0x0,B_0x1" bitfld.long 0x4 0. "COLM,Color mode" "B_0x0,B_0x1" line.long 0x8 "DSI_WIER,DSI Wrapper interrupt enable register" bitfld.long 0x8 13. "LAEIE,LCD APB error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x8 10. "PLLUIE,PLL unlock interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "PLLLIE,PLL lock interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 1. "ERIE,End of refresh interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "TEIE,Tearing effect interrupt enable" "B_0x0,B_0x1" line.long 0xC "DSI_WISR,DSI Wrapper interrupt and status register" bitfld.long 0xC 14. "LAEIF,LCD APB error interrupt flag" "B_0x0,B_0x1" rbitfld.long 0xC 10. "PLLUIF,PLL unlock interrupt flag" "B_0x0,B_0x1" rbitfld.long 0xC 9. "PLLLIF,PLL lock interrupt flag" "B_0x0,B_0x1" rbitfld.long 0xC 8. "PLLLS,PLL lock status" "B_0x0,B_0x1" rbitfld.long 0xC 2. "BUSY,Busy flag" "B_0x0,B_0x1" rbitfld.long 0xC 1. "ERIF,End of refresh interrupt flag" "B_0x0,B_0x1" newline rbitfld.long 0xC 0. "TEIF,Tearing effect interrupt flag" "B_0x0,B_0x1" wgroup.long 0x410++0x3 line.long 0x0 "DSI_WIFCR,DSI Wrapper interrupt flag clear register" bitfld.long 0x0 14. "CLAEIF,LCD APB error interrupt flag" "0,1" bitfld.long 0x0 10. "CPLLUIF,Clear PLL unlock interrupt flag" "0,1" bitfld.long 0x0 9. "CPLLLIF,Clear PLL lock interrupt flag" "0,1" bitfld.long 0x0 1. "CERIF,Clear end of refresh interrupt flag" "0,1" bitfld.long 0x0 0. "CTEIF,Clear tearing effect interrupt flag" "0,1" group.long 0x418++0x3 line.long 0x0 "DSI_WPCR0,DSI Wrapper PHY configuration register 0" bitfld.long 0x0 4.--5. "RXTRG,Rx trigger escape selection" "0,1,2,3" bitfld.long 0x0 1. "FTXSMDL,Force to TX stop mode the data lanes" "B_0x0,B_0x1" bitfld.long 0x0 0. "TDDL,Turnaround disable data lanes" "B_0x0,B_0x1" group.long 0x430++0xF line.long 0x0 "DSI_WPCR1,DSI Wrapper PHY configuration register 1" bitfld.long 0x0 16. "DLD,Data lanes 0 direction:" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--14. 1. "HSFR,High speed frequency range in Tx mode. The values are given in Table518 " hexmask.long.byte 0x0 0.--5. 1. "CCF,Configuration clock frequency:" line.long 0x4 "DSI_WRPCR0,DSI Wrapper regulator and PLL configuration register 0" bitfld.long 0x4 16. "PSC,PLL shadow control" "B_0x0,B_0x1" hexmask.long.word 0x4 4.--13. 1. "NDIV,PLL InLoop division ratio:" hexmask.long.byte 0x4 0.--3. 1. "IDF,PLL input division ratio:" line.long 0x8 "DSI_WRPCR1,DSI Wrapper regulator and PLL configuration register 1" bitfld.long 0x8 28.--29. "ODF,Output division factor" "B_0x0,B_0x1,?,?" hexmask.long.byte 0x8 24.--27. 1. "VCO,VCO operating range" hexmask.long.byte 0x8 16.--22. 1. "BIAS,Charge pump bias" hexmask.long.byte 0x8 8.--13. 1. "INT,Integral of charge pump" bitfld.long 0x8 6.--7. "GMP,Loop filter resistance" "0,1,2,3" hexmask.long.byte 0x8 0.--5. 1. "PROP,Proportional charge pump" line.long 0xC "DSI_WRPCR2,DSI Wrapper regulator and PLL configuration register 2" bitfld.long 0xC 28. "FPLLLOCK,Force PLL lock signal" "B_0x0,B_0x1" bitfld.long 0xC 24. "CLR,Clears the PLL shadow registers to their reset values" "B_0x0,B_0x1" bitfld.long 0xC 16. "UPD,Update (copies) the PLL shadow registers to the effective PLL registers" "B_0x0,B_0x1" bitfld.long 0xC 8. "PLLEN,PLL enable" "B_0x0,B_0x1" bitfld.long 0xC 0.--1. "SEL,Output selection for PLL Clock:" "B_0x0,B_0x1,?,?" rgroup.long 0x440++0x3 line.long 0x0 "DSI_WRPSR0,DSI Wrapper regulator and PLL status register 0" bitfld.long 0x0 16. "PSC,PLL shadow control" "B_0x0,B_0x1" hexmask.long.word 0x0 4.--13. 1. "NDIV,Shadow value of PLL InLoop division ratio" hexmask.long.byte 0x0 0.--3. 1. "IDF,Shadow value of PLL input division ratio" group.long 0x444++0x3 line.long 0x0 "DSI_WRPSR1,DSI Wrapper regulator and PLL status register 1" bitfld.long 0x0 28.--29. "ODF,Output division factor" "B_0x0,B_0x1,?,?" hexmask.long.byte 0x0 24.--27. 1. "VCO,VCO operating range" hexmask.long.byte 0x0 16.--22. 1. "BIAS,Charge pump bias" hexmask.long.byte 0x0 8.--13. 1. "INT,Charge pump integral" bitfld.long 0x0 6.--7. "GMP,Charge pump integral" "0,1,2,3" hexmask.long.byte 0x0 0.--5. 1. "PROP,Proportional charge pump" wgroup.long 0x480++0x3 line.long 0x0 "DSI_WCRB,DSI Wrapper control register bis" bitfld.long 0x0 2. "LTDCEN,LTDC enable" "B_0x0,B_0x1" rgroup.long 0x7F0++0xF line.long 0x0 "DSI_HWCFGR,DSI hardware configuration register" hexmask.long.byte 0x0 20.--23. 1. "LINKS,Amount of DSI PHY links" hexmask.long.byte 0x0 16.--19. 1. "LANES,Amount of DSI DataLanes per Link (excluding the ClockLane)" hexmask.long.word 0x0 4.--15. 1. "FIFOSIZE,FIFO size" hexmask.long.byte 0x0 0.--3. 1. "TECHNO,Technology" line.long 0x4 "DSI_VERR,DSI version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "DSI_IPIDR,DSI identification register" hexmask.long 0x8 0.--31. 1. "ID,Identification code" line.long 0xC "DSI_SIDR,DSI size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code" tree.end tree.end tree "DTS (Digital Temperature Sensor)" base ad:0x0 tree "DTS" base ad:0x44070000 group.long 0x10++0x3 line.long 0x0 "DTS_PVTREG_LOCKR,DTS PVT register lock register" hexmask.long 0x0 0.--31. 1. "LOCK,PVT software lock register" rgroup.long 0x14++0x3 line.long 0x0 "DTS_PVTLOCK_SR,DTS PVT lock status register" bitfld.long 0x0 1. "HW_LOCK_STATUS,Hardware lock input status" "0,1" bitfld.long 0x0 0. "SW_LOCK_STATUS,Software lock input status" "0,1" group.long 0x20++0x3 line.long 0x0 "DTS_PVTTMR_CR,DTS PVT timer control register" bitfld.long 0x0 16. "TMR_RUN,Timer count enable bit" "0,1" hexmask.long.word 0x0 0.--15. 1. "TMR_DELAY,Timer delay" rgroup.long 0x24++0x3 line.long 0x0 "DTS_PVTTMR_SR,DTS PVT timer status register" bitfld.long 0x0 1. "TMR_DONE,Counter delay expiration flag" "0,1" bitfld.long 0x0 0. "TMR_BUSY,Counter busy flag" "0,1" group.long 0x40++0x3 line.long 0x0 "DTS_PVT_IER,DTS PVT IRQ enable register" bitfld.long 0x0 1. "TS_IRQ_ENABLE,TS IRQ source enable bit" "0,1" bitfld.long 0x0 0. "TMR_IRQ_ENABLE,Timer IRQ source enable bit" "0,1" group.long 0x50++0x7 line.long 0x0 "DTS_PVTIRQTRMASKR,DTS PVT IRQ timer mask register" bitfld.long 0x0 0. "TMR_IRQ_MASK,Timer IRQ source mask bit" "0,1" line.long 0x4 "DTS_TS_MR,DTS PVT IRQ TS mask register" bitfld.long 0x4 1. "TS1_IRQ_MASK,TS1 IRQ source mask bit" "0,1" bitfld.long 0x4 0. "TS0_IRQ_MASK,TS0 IRQ source mask bit" "0,1" rgroup.long 0x60++0x7 line.long 0x0 "DTS_PVTTR_SR,DTS PVT IRQ timer status register" bitfld.long 0x0 0. "TMR_IRQ_STATUS,Timer IRQ status bit after masking" "0,1" line.long 0x4 "DTS_TS_ISR,DTS PVT IRQ TS status register" bitfld.long 0x4 1. "TS1_IRQ_STATUS,TS1 IRQ status bit after masking" "0,1" bitfld.long 0x4 0. "TS0_IRQ_STATUS,TS0 IRQ status bit after masking" "0,1" rgroup.long 0x70++0x7 line.long 0x0 "DTS_PVTTMRRAW_ISR,DTS PVT IRQ timer raw status register" bitfld.long 0x0 0. "TMR_IRQ_RAW_STATUS,TMR IRQ status bit before masking" "0,1" line.long 0x4 "DTS_TSRAW_ISR,DTS PVT IRQ TS raw status register" bitfld.long 0x4 1. "TS1_IRQ_RAW_STATUS,TS1 IRQ status bit before masking" "0,1" bitfld.long 0x4 0. "TS0_IRQ_RAW_STATUS,TS0 IRQ status bit before masking" "0,1" group.long 0x80++0x7 line.long 0x0 "DTS_TSCCLKSYNTHR,DTS TSC clock synthesizer register" bitfld.long 0x0 24. "CLK_SYTH_EN,Synthesized clk_ts enable bit" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "CLK_SYNTH_HOLD,SDA master-to-SDA slave output hold delay/SDA slave-to-SDA master input setup delay" hexmask.long.byte 0x0 8.--15. 1. "CLK_SYNTH_HI,Synthesized clk_ts high period" hexmask.long.byte 0x0 0.--7. 1. "CLK_SYNTH_LO,Synthesized clk_ts low period" line.long 0x4 "DTS_TSCSDIFDISABLER,DTS TSC SDIF interface disable register" bitfld.long 0x4 1. "TS1_SDIF_DISABLE,TS1 serial data interface (SDIF) disable bit" "B_0x0,B_0x1" bitfld.long 0x4 0. "TS0_SDIF_DISABLE,TS0 serial data interface (SDIF) disable bit" "B_0x0,B_0x1" rgroup.long 0x88++0x3 line.long 0x0 "DTS_TSCSDIF_SR,DTS TSC SDIF status register" bitfld.long 0x0 1. "SDIF_LOCK,SDIF locked flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "SDIF_BUSY,SDIF busy flag" "B_0x0,B_0x1" group.long 0x8C++0x3 line.long 0x0 "DTS_TSCSDIF_CR,DTS TSC SDIF register" bitfld.long 0x0 31. "SDIF_PROG,Serial interface program request" "B_0x0,B_0x1" bitfld.long 0x0 27. "SDIF_WRN,Serial interface write/no read control bit" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "SDIF_ADDR,Serial interface register address" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x0 0.--23. 1. "SDIF_WDATA,Serial interface write data" wgroup.long 0x90++0x3 line.long 0x0 "DTS_TSCSDIFHALTR,DTS TSC SDIF halt register" bitfld.long 0x0 0. "SDIF_STOP,Serial data interface (SDIF) stop" "B_0x0,B_0x1" group.long 0x94++0x3 line.long 0x0 "DTS_TSCSDIF_CFGR,DTS TSC SDIF control register" bitfld.long 0x0 0.--1. "SDIF_INHIBIT,Serial data interface (SDIF) programming inhibit" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0xA0++0x3 line.long 0x0 "DTS_TSCSMPL_CR,DTS TSC sample control register" bitfld.long 0x0 2. "SMPL_DISCARD,Sample discard bit" "B_0x0,B_0x1" bitfld.long 0x0 1. "SMPL_CTR_HOLD,Sample counter hold bit" "B_0x0,B_0x1" bitfld.long 0x0 0. "SMPL_CTR_DISABLE,Sample counter disable bit" "B_0x0,B_0x1" wgroup.long 0xA4++0x3 line.long 0x0 "DTS_TSCSDIFSMPLCLRR,DTS TSC sample clear register" bitfld.long 0x0 0. "SMPL_CNTER_CLEAR,Sample counter clear bit" "B_0x0,B_0x1" rgroup.long 0xA8++0x3 line.long 0x0 "DTS_TSCSMPLCNTR,DTS TSC sample count register" hexmask.long.word 0x0 0.--15. 1. "SMPL_COUNT,Sample counter" group.long 0xC0++0x3 line.long 0x0 "DTS_TS0_IER,DTS TS0 IRQ enable register" bitfld.long 0x0 4. "IRQ_EN_ALARMB,Alarm B IRQ enable bit" "0,1" bitfld.long 0x0 3. "IRQ_EN_ALARMA,Alarm A IRQ enable bit" "0,1" bitfld.long 0x0 1. "IRQ_EN_DONE,Sample done IRQ enable bit" "0,1" bitfld.long 0x0 0. "IRQ_EN_FAULT,Fault IRQ enable bit" "0,1" rgroup.long 0xC4++0x3 line.long 0x0 "DTS_TS0_ISR,DTS TS0 IRQ status register" bitfld.long 0x0 4. "IRQ_STATUS_ALARMB,Alarm B IRQ status bit" "0,1" bitfld.long 0x0 3. "IRQ_STATUS_ALARMA,Alarm A IRQ status bit" "0,1" bitfld.long 0x0 1. "IRQ_STATUS_DONE,Sample done IRQ status bit" "0,1" bitfld.long 0x0 0. "IRQ_STATUS_FAULT,Fault IRQ status bit" "0,1" wgroup.long 0xC8++0x3 line.long 0x0 "DTS_TS0_ICR,DTS TS0 IRQ clear register" bitfld.long 0x0 4. "IRQ_CLEAR_ALARMB,Alarm B IRQ clear bit" "0,1" bitfld.long 0x0 3. "IRQ_CLEAR_ALARMA,Alarm A IRQ clear bit" "0,1" bitfld.long 0x0 1. "IRQ_CLEAR_DONE,Sample done IRQ clear bit" "0,1" bitfld.long 0x0 0. "IRQ_CLEAR_FAULT,Fault IRQ clear bit" "0,1" group.long 0xCC++0x3 line.long 0x0 "DTS_TS0IRQTESTR,DTS TS0 IRQ test register" bitfld.long 0x0 4. "IRQ_TEST_ALARMB,Alarm B IRQ test bit" "0,1" bitfld.long 0x0 3. "IRQ_TEST_ALARMA,Alarm A IRQ test bit" "0,1" bitfld.long 0x0 1. "IRQ_TEST_DONE,Sample done IRQ test bit" "0,1" bitfld.long 0x0 0. "IRQ_TEST_FAULT,Fault IRQ test bit" "0,1" rgroup.long 0xD0++0xB line.long 0x0 "DTS_TS0SDIFRDATAR,DTS TS0 SDIF RDATA register" hexmask.long.tbyte 0x0 0.--23. 1. "SDIF_RDATA,SDIF read data" line.long 0x4 "DTS_TS0SDIFDONER,DTS TS0 SDIF done register" bitfld.long 0x4 0. "SDIF_SMPL_DONE,Sample done flag" "B_0x0,B_0x1" line.long 0x8 "DTS_TS0SDIFDATAR,DTS TS0 SDIF data register" bitfld.long 0x8 17. "SAMPLE_FAULT,Sample fault" "0,1" bitfld.long 0x8 16. "SAMPLE_TYPE,TS sample type" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "SAMPLE_DATA,Sample data." group.long 0xE0++0x7 line.long 0x0 "DTS_TS0ALARMA_CFGR,DTS TS0 alarm A configuration register" hexmask.long.word 0x0 16.--31. 1. "ALARMA_THRESH,Alarm A threshold" hexmask.long.word 0x0 0.--15. 1. "HYSTA_THRESH,Alarm A hysteresis threshold" line.long 0x4 "DTS_TS0ALARMB_CFGR,DTS TS0 alarm B configuration register" hexmask.long.word 0x4 16.--31. 1. "ALARMB_THRESH,Alarm B threshold" hexmask.long.word 0x4 0.--15. 1. "HYSTB_THRESH,Alarm B hysteresis threshold" rgroup.long 0xE8++0x3 line.long 0x0 "DTS_TS0HLSAMPLER,DTS TS0 high/low sample register" hexmask.long.word 0x0 16.--31. 1. "SMPL_HI,Highest valid data sample value received" hexmask.long.word 0x0 0.--15. 1. "SMPL_LO,Lowest valid data sample value received" wgroup.long 0xEC++0x3 line.long 0x0 "DTS_TS0HILORESETR,DTS TS0 high/low reset register" bitfld.long 0x0 1. "SMPL_HI_CLR,Sample high clear 0" "0,1" bitfld.long 0x0 0. "SMPL_LO_SET,Sample Low Set" "0,1" group.long 0x100++0x3 line.long 0x0 "DTS_TS1_IER,DTS TS1 IRQ enable register" bitfld.long 0x0 4. "IRQ_EN_ALARMB,Alarm B IRQ enable bit" "0,1" bitfld.long 0x0 3. "IRQ_EN_ALARMA,Alarm A IRQ enable bit" "0,1" bitfld.long 0x0 1. "IRQ_EN_DONE,Sample done IRQ enable bit" "0,1" bitfld.long 0x0 0. "IRQ_EN_FAULT,Fault IRQ enable bit" "0,1" rgroup.long 0x104++0x3 line.long 0x0 "DTS_TS1_ISR,DTS TS1 IRQ status register" bitfld.long 0x0 4. "IRQ_STATUS_ALARMB,Alarm B IRQ status bit" "0,1" bitfld.long 0x0 3. "IRQ_STATUS_ALARMA,Alarm A IRQ status bit" "0,1" bitfld.long 0x0 1. "IRQ_STATUS_DONE,Sample done IRQ status bit" "0,1" bitfld.long 0x0 0. "IRQ_STATUS_FAULT,Fault IRQ status bit" "0,1" wgroup.long 0x108++0x3 line.long 0x0 "DTS_TS1_ICR,DTS TS1 IRQ clear register" bitfld.long 0x0 4. "IRQ_CLEAR_ALARMB,Alarm B IRQ clear bit" "0,1" bitfld.long 0x0 3. "IRQ_CLEAR_ALARMA,Alarm A IRQ clear bit" "0,1" bitfld.long 0x0 1. "IRQ_CLEAR_DONE,Sample done IRQ clear bit" "0,1" bitfld.long 0x0 0. "IRQ_CLEAR_FAULT,Fault IRQ clear bit" "0,1" group.long 0x10C++0x3 line.long 0x0 "DTS_TS1IRQTESTR,DTS TS1 IRQ test register" bitfld.long 0x0 4. "IRQ_TEST_ALARMB,Alarm B IRQ test bit" "0,1" bitfld.long 0x0 3. "IRQ_TEST_ALARMA,Alarm A IRQ test bit" "0,1" bitfld.long 0x0 1. "IRQ_TEST_DONE,Sample done IRQ test bit" "0,1" bitfld.long 0x0 0. "IRQ_TEST_FAULT,Fault IRQ test bit" "0,1" rgroup.long 0x110++0xB line.long 0x0 "DTS_TS1SDIFRDATAR,DTS TS1 SDIF RDATA register" hexmask.long.tbyte 0x0 0.--23. 1. "SDIF_RDATA,SDIF read data" line.long 0x4 "DTS_TS1SDIFDONER,DTS TS1 SDIF done register" bitfld.long 0x4 0. "SDIF_SMPL_DONE,Sample done flag" "B_0x0,B_0x1" line.long 0x8 "DTS_TS1SDIFDATAR,DTS TS1 SDIF data register" bitfld.long 0x8 17. "SAMPLE_FAULT,Sample fault" "0,1" bitfld.long 0x8 16. "SAMPLE_TYPE,TS sample type" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "SAMPLE_DATA,Sample data." group.long 0x120++0x7 line.long 0x0 "DTS_TS1ALARMA_CFGR,DTS TS1 alarm A configuration register" hexmask.long.word 0x0 16.--31. 1. "ALARMA_THRESH,Alarm A threshold" hexmask.long.word 0x0 0.--15. 1. "HYSTA_THRESH,Alarm A hysteresis threshold" line.long 0x4 "DTS_TS1ALARMB_CFGR,DTS TS1 alarm B configuration register" hexmask.long.word 0x4 16.--31. 1. "ALARMB_THRESH,Alarm B threshold" hexmask.long.word 0x4 0.--15. 1. "HYSTB_THRESH,Alarm B hysteresis threshold" rgroup.long 0x128++0x3 line.long 0x0 "DTS_TS1HLSAMPLER,DTS TS1 high/low sample register" hexmask.long.word 0x0 16.--31. 1. "SMPL_HI,Highest valid data sample value received" hexmask.long.word 0x0 0.--15. 1. "SMPL_LO,Lowest valid data sample value received" wgroup.long 0x12C++0x3 line.long 0x0 "DTS_TS1HILORESETR,DTS TS1 high/low reset register" bitfld.long 0x0 1. "SMPL_HI_CLR,Sample high clear 0" "0,1" bitfld.long 0x0 0. "SMPL_LO_SET,Sample Low Set" "0,1" tree.end tree "DTS_S" base ad:0x54070000 group.long 0x10++0x3 line.long 0x0 "DTS_PVTREG_LOCKR,DTS PVT register lock register" hexmask.long 0x0 0.--31. 1. "LOCK,PVT software lock register" rgroup.long 0x14++0x3 line.long 0x0 "DTS_PVTLOCK_SR,DTS PVT lock status register" bitfld.long 0x0 1. "HW_LOCK_STATUS,Hardware lock input status" "0,1" bitfld.long 0x0 0. "SW_LOCK_STATUS,Software lock input status" "0,1" group.long 0x20++0x3 line.long 0x0 "DTS_PVTTMR_CR,DTS PVT timer control register" bitfld.long 0x0 16. "TMR_RUN,Timer count enable bit" "0,1" hexmask.long.word 0x0 0.--15. 1. "TMR_DELAY,Timer delay" rgroup.long 0x24++0x3 line.long 0x0 "DTS_PVTTMR_SR,DTS PVT timer status register" bitfld.long 0x0 1. "TMR_DONE,Counter delay expiration flag" "0,1" bitfld.long 0x0 0. "TMR_BUSY,Counter busy flag" "0,1" group.long 0x40++0x3 line.long 0x0 "DTS_PVT_IER,DTS PVT IRQ enable register" bitfld.long 0x0 1. "TS_IRQ_ENABLE,TS IRQ source enable bit" "0,1" bitfld.long 0x0 0. "TMR_IRQ_ENABLE,Timer IRQ source enable bit" "0,1" group.long 0x50++0x7 line.long 0x0 "DTS_PVTIRQTRMASKR,DTS PVT IRQ timer mask register" bitfld.long 0x0 0. "TMR_IRQ_MASK,Timer IRQ source mask bit" "0,1" line.long 0x4 "DTS_TS_MR,DTS PVT IRQ TS mask register" bitfld.long 0x4 1. "TS1_IRQ_MASK,TS1 IRQ source mask bit" "0,1" bitfld.long 0x4 0. "TS0_IRQ_MASK,TS0 IRQ source mask bit" "0,1" rgroup.long 0x60++0x7 line.long 0x0 "DTS_PVTTR_SR,DTS PVT IRQ timer status register" bitfld.long 0x0 0. "TMR_IRQ_STATUS,Timer IRQ status bit after masking" "0,1" line.long 0x4 "DTS_TS_ISR,DTS PVT IRQ TS status register" bitfld.long 0x4 1. "TS1_IRQ_STATUS,TS1 IRQ status bit after masking" "0,1" bitfld.long 0x4 0. "TS0_IRQ_STATUS,TS0 IRQ status bit after masking" "0,1" rgroup.long 0x70++0x7 line.long 0x0 "DTS_PVTTMRRAW_ISR,DTS PVT IRQ timer raw status register" bitfld.long 0x0 0. "TMR_IRQ_RAW_STATUS,TMR IRQ status bit before masking" "0,1" line.long 0x4 "DTS_TSRAW_ISR,DTS PVT IRQ TS raw status register" bitfld.long 0x4 1. "TS1_IRQ_RAW_STATUS,TS1 IRQ status bit before masking" "0,1" bitfld.long 0x4 0. "TS0_IRQ_RAW_STATUS,TS0 IRQ status bit before masking" "0,1" group.long 0x80++0x7 line.long 0x0 "DTS_TSCCLKSYNTHR,DTS TSC clock synthesizer register" bitfld.long 0x0 24. "CLK_SYTH_EN,Synthesized clk_ts enable bit" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "CLK_SYNTH_HOLD,SDA master-to-SDA slave output hold delay/SDA slave-to-SDA master input setup delay" hexmask.long.byte 0x0 8.--15. 1. "CLK_SYNTH_HI,Synthesized clk_ts high period" hexmask.long.byte 0x0 0.--7. 1. "CLK_SYNTH_LO,Synthesized clk_ts low period" line.long 0x4 "DTS_TSCSDIFDISABLER,DTS TSC SDIF interface disable register" bitfld.long 0x4 1. "TS1_SDIF_DISABLE,TS1 serial data interface (SDIF) disable bit" "B_0x0,B_0x1" bitfld.long 0x4 0. "TS0_SDIF_DISABLE,TS0 serial data interface (SDIF) disable bit" "B_0x0,B_0x1" rgroup.long 0x88++0x3 line.long 0x0 "DTS_TSCSDIF_SR,DTS TSC SDIF status register" bitfld.long 0x0 1. "SDIF_LOCK,SDIF locked flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "SDIF_BUSY,SDIF busy flag" "B_0x0,B_0x1" group.long 0x8C++0x3 line.long 0x0 "DTS_TSCSDIF_CR,DTS TSC SDIF register" bitfld.long 0x0 31. "SDIF_PROG,Serial interface program request" "B_0x0,B_0x1" bitfld.long 0x0 27. "SDIF_WRN,Serial interface write/no read control bit" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "SDIF_ADDR,Serial interface register address" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x0 0.--23. 1. "SDIF_WDATA,Serial interface write data" wgroup.long 0x90++0x3 line.long 0x0 "DTS_TSCSDIFHALTR,DTS TSC SDIF halt register" bitfld.long 0x0 0. "SDIF_STOP,Serial data interface (SDIF) stop" "B_0x0,B_0x1" group.long 0x94++0x3 line.long 0x0 "DTS_TSCSDIF_CFGR,DTS TSC SDIF control register" bitfld.long 0x0 0.--1. "SDIF_INHIBIT,Serial data interface (SDIF) programming inhibit" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0xA0++0x3 line.long 0x0 "DTS_TSCSMPL_CR,DTS TSC sample control register" bitfld.long 0x0 2. "SMPL_DISCARD,Sample discard bit" "B_0x0,B_0x1" bitfld.long 0x0 1. "SMPL_CTR_HOLD,Sample counter hold bit" "B_0x0,B_0x1" bitfld.long 0x0 0. "SMPL_CTR_DISABLE,Sample counter disable bit" "B_0x0,B_0x1" wgroup.long 0xA4++0x3 line.long 0x0 "DTS_TSCSDIFSMPLCLRR,DTS TSC sample clear register" bitfld.long 0x0 0. "SMPL_CNTER_CLEAR,Sample counter clear bit" "B_0x0,B_0x1" rgroup.long 0xA8++0x3 line.long 0x0 "DTS_TSCSMPLCNTR,DTS TSC sample count register" hexmask.long.word 0x0 0.--15. 1. "SMPL_COUNT,Sample counter" group.long 0xC0++0x3 line.long 0x0 "DTS_TS0_IER,DTS TS0 IRQ enable register" bitfld.long 0x0 4. "IRQ_EN_ALARMB,Alarm B IRQ enable bit" "0,1" bitfld.long 0x0 3. "IRQ_EN_ALARMA,Alarm A IRQ enable bit" "0,1" bitfld.long 0x0 1. "IRQ_EN_DONE,Sample done IRQ enable bit" "0,1" bitfld.long 0x0 0. "IRQ_EN_FAULT,Fault IRQ enable bit" "0,1" rgroup.long 0xC4++0x3 line.long 0x0 "DTS_TS0_ISR,DTS TS0 IRQ status register" bitfld.long 0x0 4. "IRQ_STATUS_ALARMB,Alarm B IRQ status bit" "0,1" bitfld.long 0x0 3. "IRQ_STATUS_ALARMA,Alarm A IRQ status bit" "0,1" bitfld.long 0x0 1. "IRQ_STATUS_DONE,Sample done IRQ status bit" "0,1" bitfld.long 0x0 0. "IRQ_STATUS_FAULT,Fault IRQ status bit" "0,1" wgroup.long 0xC8++0x3 line.long 0x0 "DTS_TS0_ICR,DTS TS0 IRQ clear register" bitfld.long 0x0 4. "IRQ_CLEAR_ALARMB,Alarm B IRQ clear bit" "0,1" bitfld.long 0x0 3. "IRQ_CLEAR_ALARMA,Alarm A IRQ clear bit" "0,1" bitfld.long 0x0 1. "IRQ_CLEAR_DONE,Sample done IRQ clear bit" "0,1" bitfld.long 0x0 0. "IRQ_CLEAR_FAULT,Fault IRQ clear bit" "0,1" group.long 0xCC++0x3 line.long 0x0 "DTS_TS0IRQTESTR,DTS TS0 IRQ test register" bitfld.long 0x0 4. "IRQ_TEST_ALARMB,Alarm B IRQ test bit" "0,1" bitfld.long 0x0 3. "IRQ_TEST_ALARMA,Alarm A IRQ test bit" "0,1" bitfld.long 0x0 1. "IRQ_TEST_DONE,Sample done IRQ test bit" "0,1" bitfld.long 0x0 0. "IRQ_TEST_FAULT,Fault IRQ test bit" "0,1" rgroup.long 0xD0++0xB line.long 0x0 "DTS_TS0SDIFRDATAR,DTS TS0 SDIF RDATA register" hexmask.long.tbyte 0x0 0.--23. 1. "SDIF_RDATA,SDIF read data" line.long 0x4 "DTS_TS0SDIFDONER,DTS TS0 SDIF done register" bitfld.long 0x4 0. "SDIF_SMPL_DONE,Sample done flag" "B_0x0,B_0x1" line.long 0x8 "DTS_TS0SDIFDATAR,DTS TS0 SDIF data register" bitfld.long 0x8 17. "SAMPLE_FAULT,Sample fault" "0,1" bitfld.long 0x8 16. "SAMPLE_TYPE,TS sample type" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "SAMPLE_DATA,Sample data." group.long 0xE0++0x7 line.long 0x0 "DTS_TS0ALARMA_CFGR,DTS TS0 alarm A configuration register" hexmask.long.word 0x0 16.--31. 1. "ALARMA_THRESH,Alarm A threshold" hexmask.long.word 0x0 0.--15. 1. "HYSTA_THRESH,Alarm A hysteresis threshold" line.long 0x4 "DTS_TS0ALARMB_CFGR,DTS TS0 alarm B configuration register" hexmask.long.word 0x4 16.--31. 1. "ALARMB_THRESH,Alarm B threshold" hexmask.long.word 0x4 0.--15. 1. "HYSTB_THRESH,Alarm B hysteresis threshold" rgroup.long 0xE8++0x3 line.long 0x0 "DTS_TS0HLSAMPLER,DTS TS0 high/low sample register" hexmask.long.word 0x0 16.--31. 1. "SMPL_HI,Highest valid data sample value received" hexmask.long.word 0x0 0.--15. 1. "SMPL_LO,Lowest valid data sample value received" wgroup.long 0xEC++0x3 line.long 0x0 "DTS_TS0HILORESETR,DTS TS0 high/low reset register" bitfld.long 0x0 1. "SMPL_HI_CLR,Sample high clear 0" "0,1" bitfld.long 0x0 0. "SMPL_LO_SET,Sample Low Set" "0,1" group.long 0x100++0x3 line.long 0x0 "DTS_TS1_IER,DTS TS1 IRQ enable register" bitfld.long 0x0 4. "IRQ_EN_ALARMB,Alarm B IRQ enable bit" "0,1" bitfld.long 0x0 3. "IRQ_EN_ALARMA,Alarm A IRQ enable bit" "0,1" bitfld.long 0x0 1. "IRQ_EN_DONE,Sample done IRQ enable bit" "0,1" bitfld.long 0x0 0. "IRQ_EN_FAULT,Fault IRQ enable bit" "0,1" rgroup.long 0x104++0x3 line.long 0x0 "DTS_TS1_ISR,DTS TS1 IRQ status register" bitfld.long 0x0 4. "IRQ_STATUS_ALARMB,Alarm B IRQ status bit" "0,1" bitfld.long 0x0 3. "IRQ_STATUS_ALARMA,Alarm A IRQ status bit" "0,1" bitfld.long 0x0 1. "IRQ_STATUS_DONE,Sample done IRQ status bit" "0,1" bitfld.long 0x0 0. "IRQ_STATUS_FAULT,Fault IRQ status bit" "0,1" wgroup.long 0x108++0x3 line.long 0x0 "DTS_TS1_ICR,DTS TS1 IRQ clear register" bitfld.long 0x0 4. "IRQ_CLEAR_ALARMB,Alarm B IRQ clear bit" "0,1" bitfld.long 0x0 3. "IRQ_CLEAR_ALARMA,Alarm A IRQ clear bit" "0,1" bitfld.long 0x0 1. "IRQ_CLEAR_DONE,Sample done IRQ clear bit" "0,1" bitfld.long 0x0 0. "IRQ_CLEAR_FAULT,Fault IRQ clear bit" "0,1" group.long 0x10C++0x3 line.long 0x0 "DTS_TS1IRQTESTR,DTS TS1 IRQ test register" bitfld.long 0x0 4. "IRQ_TEST_ALARMB,Alarm B IRQ test bit" "0,1" bitfld.long 0x0 3. "IRQ_TEST_ALARMA,Alarm A IRQ test bit" "0,1" bitfld.long 0x0 1. "IRQ_TEST_DONE,Sample done IRQ test bit" "0,1" bitfld.long 0x0 0. "IRQ_TEST_FAULT,Fault IRQ test bit" "0,1" rgroup.long 0x110++0xB line.long 0x0 "DTS_TS1SDIFRDATAR,DTS TS1 SDIF RDATA register" hexmask.long.tbyte 0x0 0.--23. 1. "SDIF_RDATA,SDIF read data" line.long 0x4 "DTS_TS1SDIFDONER,DTS TS1 SDIF done register" bitfld.long 0x4 0. "SDIF_SMPL_DONE,Sample done flag" "B_0x0,B_0x1" line.long 0x8 "DTS_TS1SDIFDATAR,DTS TS1 SDIF data register" bitfld.long 0x8 17. "SAMPLE_FAULT,Sample fault" "0,1" bitfld.long 0x8 16. "SAMPLE_TYPE,TS sample type" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "SAMPLE_DATA,Sample data." group.long 0x120++0x7 line.long 0x0 "DTS_TS1ALARMA_CFGR,DTS TS1 alarm A configuration register" hexmask.long.word 0x0 16.--31. 1. "ALARMA_THRESH,Alarm A threshold" hexmask.long.word 0x0 0.--15. 1. "HYSTA_THRESH,Alarm A hysteresis threshold" line.long 0x4 "DTS_TS1ALARMB_CFGR,DTS TS1 alarm B configuration register" hexmask.long.word 0x4 16.--31. 1. "ALARMB_THRESH,Alarm B threshold" hexmask.long.word 0x4 0.--15. 1. "HYSTB_THRESH,Alarm B hysteresis threshold" rgroup.long 0x128++0x3 line.long 0x0 "DTS_TS1HLSAMPLER,DTS TS1 high/low sample register" hexmask.long.word 0x0 16.--31. 1. "SMPL_HI,Highest valid data sample value received" hexmask.long.word 0x0 0.--15. 1. "SMPL_LO,Lowest valid data sample value received" wgroup.long 0x12C++0x3 line.long 0x0 "DTS_TS1HILORESETR,DTS TS1 high/low reset register" bitfld.long 0x0 1. "SMPL_HI_CLR,Sample high clear 0" "0,1" bitfld.long 0x0 0. "SMPL_LO_SET,Sample Low Set" "0,1" tree.end tree.end tree "ETHSS (Ethernet Subsystem)" base ad:0x0 tree "ETH (Ethernet)" tree "ETH" base ad:0x482C0000 group.long 0x0++0x17 line.long 0x0 "ETH_MACCR,Operating mode configuration register" bitfld.long 0x0 31. "ARPEN,ARP Offload Enable" "0,1" bitfld.long 0x0 28.--30. "SARC,Source Address Insertion or Replacement Control" "?,?,B_0x2,B_0x3,?,?,B_0x6,B_0x7" bitfld.long 0x0 27. "IPC,Checksum Offload" "0,1" newline bitfld.long 0x0 24.--26. "IPG,Inter-Packet Gap" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x0 23. "GPSLCE,Giant Packet Size Limit Control Enable" "0,1" bitfld.long 0x0 22. "S2KP,IEEE 802." "0,1" newline bitfld.long 0x0 21. "CST,CRC stripping for Type packets" "0,1" bitfld.long 0x0 20. "ACS,Automatic Pad or CRC Stripping" "0,1" bitfld.long 0x0 19. "WD,Watchdog Disable" "0,1" newline bitfld.long 0x0 18. "BE,Packet Burst Enable" "0,1" bitfld.long 0x0 17. "JD,Jabber Disable" "0,1" bitfld.long 0x0 16. "JE,Jumbo Packet Enable" "0,1" newline bitfld.long 0x0 15. "PS,Port Select" "B_0x0,B_0x1" bitfld.long 0x0 14. "FES,MAC Speed" "B_0x0,B_0x1" bitfld.long 0x0 13. "DM,Duplex Mode" "0,1" newline bitfld.long 0x0 12. "LM,Loopback Mode" "0,1" bitfld.long 0x0 11. "ECRSFD,Enable Carrier Sense Before Transmission in Full-duplex mode" "0,1" bitfld.long 0x0 10. "DO,Disable Receive Own" "0,1" newline bitfld.long 0x0 9. "DCRS,Disable Carrier Sense During Transmission" "0,1" bitfld.long 0x0 8. "DR,Disable Retry" "0,1" bitfld.long 0x0 5.--6. "BL,Back-Off Limit" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 4. "DC,Deferral Check" "0,1" bitfld.long 0x0 2.--3. "PRELEN,Preamble Length for Transmit packets" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 1. "TE,Transmitter Enable" "0,1" newline bitfld.long 0x0 0. "RE,Receiver Enable" "0,1" line.long 0x4 "ETH_MACECR,Extended operating mode configuration register" bitfld.long 0x4 30. "APDIM,ARP Packet Drop if IP Address Mismatch" "0,1" hexmask.long.byte 0x4 25.--29. 1. "EIPG,Extended Inter-Packet Gap" bitfld.long 0x4 24. "EIPGEN,Extended Inter-Packet Gap Enable" "0,1" newline bitfld.long 0x4 18. "USP,Unicast Slow Protocol Packet Detect" "0,1" bitfld.long 0x4 17. "SPEN,Slow Protocol Detection Enable" "0,1" bitfld.long 0x4 16. "DCRCC,Disable CRC Checking for Received Packets" "0,1" newline hexmask.long.word 0x4 0.--13. 1. "GPSL,Giant Packet Size Limit" line.long 0x8 "ETH_MACPFR,Packet filtering control register" bitfld.long 0x8 31. "RA,Receive All" "0,1" bitfld.long 0x8 21. "DNTU,Drop Non-TCP/UDP over IP Packets" "0,1" bitfld.long 0x8 20. "IPFE,Layer 3 and Layer 4 Filter Enable" "0,1" newline bitfld.long 0x8 16. "VTFE,VLAN Tag Filter Enable" "0,1" bitfld.long 0x8 10. "HPF,Hash or Perfect Filter" "0,1" bitfld.long 0x8 9. "SAF,Source Address Filter Enable" "0,1" newline bitfld.long 0x8 8. "SAIF,SA Inverse Filtering" "0,1" bitfld.long 0x8 6.--7. "PCF,Pass Control Packets" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 5. "DBF,Disable Broadcast Packets" "0,1" newline bitfld.long 0x8 4. "PM,Pass All Multicast" "0,1" bitfld.long 0x8 3. "DAIF,DA Inverse Filtering" "0,1" bitfld.long 0x8 2. "HMC,Hash Multicast" "0,1" newline bitfld.long 0x8 1. "HUC,Hash Unicast" "0,1" bitfld.long 0x8 0. "PR,Promiscuous Mode" "0,1" line.long 0xC "ETH_MACWJBTR,Watchdog and jabber timeout register" bitfld.long 0xC 24. "PJE,Programmable Jabber Enable" "0,1" hexmask.long.byte 0xC 16.--19. 1. "JTO,Jabber Timeout" bitfld.long 0xC 8. "PWE,Programmable Watchdog Enable" "0,1" newline hexmask.long.byte 0xC 0.--3. 1. "WTO,Watchdog Timeout" line.long 0x10 "ETH_MACHT0R,Hash Table 0 register" hexmask.long 0x10 0.--31. 1. "HT31T0,MAC Hash Table First 32 Bits" line.long 0x14 "ETH_MACHT1R,Hash Table 1 register" hexmask.long 0x14 0.--31. 1. "HT63T32,MAC Hash Table Second 32 Bits" group.long 0x50++0xB line.long 0x0 "ETH_MACVTCR,VLAN tag Control register" bitfld.long 0x0 31. "EIVLRXS,Enable Inner VLAN Tag in Rx Status" "0,1" bitfld.long 0x0 28.--29. "EIVLS,Enable Inner VLAN Tag Stripping on Receive" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 27. "ERIVLT,Enable Inner VLAN Tag" "0,1" newline bitfld.long 0x0 26. "EDVLP,Enable Double VLAN Processing" "0,1" bitfld.long 0x0 25. "VTHM,VLAN Tag Hash Table Match Enable" "0,1" bitfld.long 0x0 24. "EVLRXS,Enable VLAN Tag in Rx status" "0,1" newline bitfld.long 0x0 21.--22. "EVLS,Enable VLAN Tag Stripping on Receive" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20. "DOVLTC,Disable VLAN Type Check" "0,1" bitfld.long 0x0 19. "ERSVLM,Enable Receive S-VLAN Match" "0,1" newline bitfld.long 0x0 18. "ESVL,Enable S-VLAN" "0,1" bitfld.long 0x0 17. "VTIM,VLAN Tag Inverse Match Enable" "0,1" bitfld.long 0x0 16. "ETV,Enable 12-Bit VLAN Tag Comparison" "0,1" newline bitfld.long 0x0 2.--3. "OFS,Offset" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "CT,Command Type" "0,1" bitfld.long 0x0 0. "OB,Operation Busy" "0,1" line.long 0x4 "ETH_MACVTDR,VLAN tag data register" bitfld.long 0x4 25. "DMACHN,DMA Channel Number" "0,1" bitfld.long 0x4 24. "DMACHEN,DMA Channel Number Enable" "0,1" bitfld.long 0x4 20. "ERIVLT,Enable Inner VLAN Tag Comparison" "0,1" newline bitfld.long 0x4 19. "ERSVLM,Enable S-VLAN Match for received Frames" "0,1" bitfld.long 0x4 18. "DOVLTC,Disable VLAN Type Comparison" "0,1" bitfld.long 0x4 17. "ETV,12-bit or 16-bit VLAN comparison" "B_0x0,B_0x1" newline bitfld.long 0x4 16. "VEN,VLAN Tag Enable" "0,1" hexmask.long.word 0x4 0.--15. 1. "VID,VLAN Tag ID" line.long 0x8 "ETH_MACVHTR,VLAN Hash table register" hexmask.long.word 0x8 0.--15. 1. "VLHT,VLAN Hash Table" group.long 0x60++0x3 line.long 0x0 "ETH_MACVIR,VLAN inclusion register" rbitfld.long 0x0 31. "BUSY,Busy" "0,1" bitfld.long 0x0 30. "RDWR,Read write control" "0,1" bitfld.long 0x0 25. "ADDR1,Address" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "ADDR0,Address" "B_0x0,B_0x1" bitfld.long 0x0 21. "CBTI,Channel based tag insertion" "0,1" bitfld.long 0x0 20. "VLTI,VLAN Tag Input" "0,1" newline bitfld.long 0x0 19. "CSVL,C-VLAN or S-VLAN" "B_0x0,B_0x1" bitfld.long 0x0 18. "VLP,VLAN Priority Control" "0,1" bitfld.long 0x0 16.--17. "VLC,VLAN Tag Control in Transmit Packets" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.word 0x0 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" group.long 0x60++0x7 line.long 0x0 "ETH_MACVIR_ALTERNATE1,VLAN inclusion register" bitfld.long 0x0 19. "CSVL,C-VLAN or S-VLAN" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" line.long 0x4 "ETH_MACIVIR,Inner VLAN inclusion register" bitfld.long 0x4 20. "VLTI,VLAN Tag Input" "0,1" bitfld.long 0x4 19. "CSVL,C-VLAN or S-VLAN" "B_0x0,B_0x1" bitfld.long 0x4 18. "VLP,VLAN Priority Control" "0,1" newline bitfld.long 0x4 16.--17. "VLC,VLAN Tag Control in Transmit Packets" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x4 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" group.long 0x70++0x3 line.long 0x0 "ETH_MACQ0TXFCR,Tx Queue 0 flow control register" hexmask.long.word 0x0 16.--31. 1. "PT,Pause Time" bitfld.long 0x0 7. "DZPQ,Disable Zero-Quanta Pause" "0,1" bitfld.long 0x0 4.--6. "PLT,Pause Low Threshold" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" newline bitfld.long 0x0 1. "TFE,Transmit Flow Control Enable" "0,1" bitfld.long 0x0 0. "FCB_BPA,Flow Control Busy or Backpressure Activate" "0,1" group.long 0x90++0x7 line.long 0x0 "ETH_MACRXFCR,Rx flow control register" bitfld.long 0x0 1. "UP,Unicast Pause Packet Detect" "0,1" bitfld.long 0x0 0. "RFE,Receive Flow Control Enable" "0,1" line.long 0x4 "ETH_MACRXQCR,Rx Queue control register" bitfld.long 0x4 17. "VFFQ,VLAN Tag Filter Fail Packets Queue" "B_0x0,B_0x1" bitfld.long 0x4 16. "VFFQE,VLAN Tag Filter Fail Packets Queuing Enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "MFFQ,Multicast Address Filter Fail Packets Queue." "B_0x0,B_0x1" newline bitfld.long 0x4 8. "MFFQE,Multicast Address Filter Fail Packets Queuing Enable." "0,1" bitfld.long 0x4 1. "UFFQ,Unicast Address Filter Fail Packets Queue." "B_0x0,B_0x1" bitfld.long 0x4 0. "UFFQE,Unicast Address Filter Fail Packets Queuing Enable." "0,1" group.long 0xA0++0xB line.long 0x0 "ETH_MACRXQC0R,Rx queue control 0 register" bitfld.long 0x0 2.--3. "RXQ1EN,Receive Queue 1 Enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 0.--1. "RXQ0EN,Receive Queue 0 Enable" "B_0x0,B_0x1,B_0x2,?" line.long 0x4 "ETH_MACRXQC1R,Rx queue control 1 register" bitfld.long 0x4 29. "TBRQE,Type Field Based Rx Queuing Enable" "0,1" bitfld.long 0x4 28. "OMCBCQ,Overriding MC-BC queue priority select" "B_0x0,B_0x1" bitfld.long 0x4 26. "FPRQ2,Frame Preemption Residue Queue" "?,B_0x1" newline bitfld.long 0x4 25. "FPRQ1,Frame Preemption Residue Queue" "?,B_0x1" bitfld.long 0x4 24. "FPRQ0,Frame Preemption Residue Queue" "?,B_0x1" bitfld.long 0x4 22.--23. "TPQC,Tagged PTP over Ethernet Packets Queuing Control" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 21. "TACPQE,Tagged AV Control Packets Queuing Enable" "0,1" bitfld.long 0x4 20. "MCBCQEN,Multicast and Broadcast Queue Enable" "0,1" bitfld.long 0x4 16.--18. "MCBCQ,Multicast and Broadcast Queue" "B_0x0,B_0x1,?,?,?,?,?,?" newline bitfld.long 0x4 12.--14. "UPQ,Untagged Packet Queue" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 4.--6. "PTPQ,PTP Packets Queue" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 2. "AVCPQ2,AV Untagged Control Packets Queue" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "AVCPQ1,AV Untagged Control Packets Queue" "B_0x0,B_0x1" bitfld.long 0x4 0. "AVCPQ0,AV Untagged Control Packets Queue" "B_0x0,B_0x1" line.long 0x8 "ETH_MACRXQC2R,Rx queue control 2 register" hexmask.long.byte 0x8 8.--15. 1. "PSRQ1,Priorities Selected in the Receive Queue 1" hexmask.long.byte 0x8 0.--7. 1. "PSRQ0,Priorities Selected in the Receive Queue 0" group.long 0xB0++0xB line.long 0x0 "ETH_MACISR,Interrupt status register" rbitfld.long 0x0 20. "MFRIS,MMC FPE Receive Interrupt Status" "0,1" rbitfld.long 0x0 19. "MFTIS,MMC FPE Transmit Interrupt Status" "0,1" bitfld.long 0x0 18. "MDIOIS,MDIO Interrupt Status" "0,1" newline rbitfld.long 0x0 17. "FPEIS,Frame Preemption Interrupt Status" "0,1" bitfld.long 0x0 14. "RXSTSIS,Receive Status Interrupt" "0,1" bitfld.long 0x0 13. "TXSTSIS,Transmit Status Interrupt" "0,1" newline bitfld.long 0x0 12. "TSIS,Timestamp Interrupt Status" "0,1" rbitfld.long 0x0 10. "MMCTXIS,MMC Transmit Interrupt Status" "0,1" rbitfld.long 0x0 9. "MMCRXIS,MMC Receive Interrupt Status" "0,1" newline rbitfld.long 0x0 8. "MMCIS,MMC Interrupt Status" "0,1" rbitfld.long 0x0 5. "LPIIS,LPI Interrupt Status" "0,1" rbitfld.long 0x0 4. "PMTIS,PMT Interrupt Status" "0,1" newline rbitfld.long 0x0 3. "PHYIS,PHY Interrupt" "0,1" rbitfld.long 0x0 0. "RGSMIIIS,RGMII Interrupt Status" "0,1" line.long 0x4 "ETH_MACIER,Interrupt enable register" bitfld.long 0x4 18. "MDIOIE,MDIO Interrupt Enable" "0,1" bitfld.long 0x4 17. "FPEIE,Frame Preemption Interrupt Enable" "0,1" bitfld.long 0x4 14. "RXSTSIE,Receive Status Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "TXSTSIE,Transmit Status Interrupt Enable" "0,1" bitfld.long 0x4 12. "TSIE,Timestamp Interrupt Enable" "0,1" bitfld.long 0x4 5. "LPIIE,LPI Interrupt Enable" "0,1" newline bitfld.long 0x4 4. "PMTIE,PMT Interrupt Enable" "0,1" bitfld.long 0x4 3. "PHYIE,PHY Interrupt Enable" "0,1" bitfld.long 0x4 0. "RGSMIIIE,RGMII Interrupt Enable" "0,1" line.long 0x8 "ETH_MACRXTXSR,Rx Tx status register" bitfld.long 0x8 8. "RWT,Receive Watchdog Timeout" "0,1" bitfld.long 0x8 5. "EXCOL,Excessive Collisions" "0,1" bitfld.long 0x8 4. "LCOL,Late Collision" "0,1" newline bitfld.long 0x8 3. "EXDEF,Excessive Deferral" "0,1" bitfld.long 0x8 2. "LCARR,Loss of Carrier" "0,1" bitfld.long 0x8 1. "NCARR,No Carrier" "0,1" newline bitfld.long 0x8 0. "TJT,Transmit Jabber Timeout" "0,1" group.long 0xC0++0x7 line.long 0x0 "ETH_MACPCSR,PMT control status register" bitfld.long 0x0 31. "RWKFILTRST,Remote Wake-up Packet Filter Register Pointer Reset" "0,1" hexmask.long.byte 0x0 24.--28. 1. "RWKPTR,Remote wake-up FIFO Pointer" bitfld.long 0x0 10. "RWKPFE,Remote wake-up Packet Forwarding Enable" "0,1" newline bitfld.long 0x0 9. "GLBLUCAST,Global Unicast" "0,1" rbitfld.long 0x0 6. "RWKPRCVD,Remote wake-up Packet Received" "0,1" bitfld.long 0x0 5. "MGKPRCVD,Magic Packet Received" "0,1" newline bitfld.long 0x0 2. "RWKPKTEN,Remote wake-up Packet Enable" "0,1" bitfld.long 0x0 1. "MGKPKTEN,Magic Packet Enable" "0,1" bitfld.long 0x0 0. "PWRDWN,Power Down" "0,1" line.long 0x4 "ETH_MACRWKPFR,Remote wake-up packet filter register" hexmask.long 0x4 0.--31. 1. "MACRWKPFR,Remote wake-up packet filter" group.long 0xD0++0xF line.long 0x0 "ETH_MACLCSR,LPI control and status register" bitfld.long 0x0 21. "LPITCSE,LPI Tx Clock Stop Enable" "0,1" bitfld.long 0x0 20. "LPITE,LPI Timer Enable" "0,1" bitfld.long 0x0 19. "LPITXA,LPI Tx Automate" "0,1" newline bitfld.long 0x0 18. "PLSEN,PHY Link Status Enable" "0,1" bitfld.long 0x0 17. "PLS,PHY Link Status" "0,1" bitfld.long 0x0 16. "LPIEN,LPI Enable" "0,1" newline rbitfld.long 0x0 9. "RLPIST,Receive LPI State" "0,1" rbitfld.long 0x0 8. "TLPIST,Transmit LPI State" "0,1" rbitfld.long 0x0 3. "RLPIEX,Receive LPI Exit" "0,1" newline rbitfld.long 0x0 2. "RLPIEN,Receive LPI Entry" "0,1" rbitfld.long 0x0 1. "TLPIEX,Transmit LPI Exit" "0,1" rbitfld.long 0x0 0. "TLPIEN,Transmit LPI Entry" "0,1" line.long 0x4 "ETH_MACLTCR,LPI timers control register" hexmask.long.word 0x4 16.--25. 1. "LST,LPI LS Timer" hexmask.long.word 0x4 0.--15. 1. "TWT,LPI TW Timer" line.long 0x8 "ETH_MACLETR,LPI entry timer register" hexmask.long.tbyte 0x8 0.--19. 1. "LPIET,LPI Entry Timer" line.long 0xC "ETH_MAC1USTCR,One-microsecond-tick counter register" hexmask.long.word 0xC 0.--11. 1. "TIC_1US_CNTR,1us tick Counter" group.long 0xF8++0x3 line.long 0x0 "ETH_MACPHYCSR,PHYIF control status register" rbitfld.long 0x0 19. "LNKSTS,Link Status" "B_0x0,B_0x1" rbitfld.long 0x0 17.--18. "LNKSPEED,Link Speed" "B_0x0,B_0x1,B_0x2,?" rbitfld.long 0x0 16. "LNKMOD,Link Mode" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "LUD,Link Up or Down" "B_0x0,B_0x1" bitfld.long 0x0 0. "TC,Transmit Configuration in RGMII" "0,1" rgroup.long 0x110++0x7 line.long 0x0 "ETH_MACVR,Version register" hexmask.long.byte 0x0 8.--15. 1. "USERVER,ST-defined version" hexmask.long.byte 0x0 0.--7. 1. "SNPSVER,IP version" line.long 0x4 "ETH_MACDR,Debug register" bitfld.long 0x4 17.--18. "TFCSTS,MAC Transmit Packet Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16. "TPESTS,MAC GMII or MII Transmit Protocol Engine Status" "0,1" bitfld.long 0x4 1.--2. "RFCFCSTS,MAC Receive Packet Controller FIFO Status" "0,1,2,3" newline bitfld.long 0x4 0. "RPESTS,MAC GMII or MII Receive Protocol Engine Status" "0,1" rgroup.long 0x11C++0xF line.long 0x0 "ETH_MACHWF0R,HW feature 0 register" bitfld.long 0x0 28.--30. "ACTPHYSEL,Active PHY Selected" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,?" bitfld.long 0x0 27. "SAVLANINS,Source Address or VLAN Insertion Enable" "0,1" bitfld.long 0x0 25.--26. "TSSTSSEL,Timestamp System Time Source" "?,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 24. "MACADR64SEL,MAC Addresses 64-127 Selected" "0,1" bitfld.long 0x0 23. "MACADR32SEL,MAC Addresses 32-63 Selected" "0,1" hexmask.long.byte 0x0 18.--22. 1. "ADDMACADRSEL,MAC Addresses 1-31 Selected" newline bitfld.long 0x0 16. "RXCOESEL,Receive Checksum Offload Enabled" "0,1" bitfld.long 0x0 14. "TXCOESEL,Transmit Checksum Offload Enabled" "0,1" bitfld.long 0x0 13. "EEESEL,Energy Efficient Ethernet Enabled" "0,1" newline bitfld.long 0x0 12. "TSSEL,IEEE 1588-2008 Timestamp Enabled" "0,1" bitfld.long 0x0 9. "ARPOFFSEL,ARP Offload Enabled" "0,1" bitfld.long 0x0 8. "MMCSEL,RMON Module Enable" "0,1" newline bitfld.long 0x0 7. "MGKSEL,PMT Magic Packet Enable" "0,1" bitfld.long 0x0 6. "RWKSEL,PMT Remote Wake-up Packet Enable" "0,1" bitfld.long 0x0 5. "SMASEL,SMA (MDIO) Interface" "0,1" newline bitfld.long 0x0 4. "VLHASH,VLAN Hash Filter Selected" "0,1" bitfld.long 0x0 3. "PCSSEL,PCS Registers (TBI SGMII or RTBI PHY interface)" "0,1" bitfld.long 0x0 2. "HDSEL,Half-duplex Support" "0,1" newline bitfld.long 0x0 1. "GMIISEL,1000 Mbps Support" "0,1" bitfld.long 0x0 0. "MIISEL,10 or 100 Mbps Support" "0,1" line.long 0x4 "ETH_MACHWF1R,HW feature 1 register" hexmask.long.byte 0x4 27.--30. 1. "L3L4FNUM,Total number of L3 or L4 Filters" bitfld.long 0x4 24.--25. "HASHTBLSZ,Hash Table Size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 23. "POUOST,One Step for PTP over UDP/IP Feature Enable" "0,1" newline bitfld.long 0x4 21. "RAVSEL,Rx Side Only AV Feature Enable" "0,1" bitfld.long 0x4 20. "AVSEL,AV Feature Enable" "0,1" bitfld.long 0x4 19. "DBGMEMA,DMA Debug Registers Enable" "0,1" newline bitfld.long 0x4 18. "TSOEN,TCP Segmentation Offload Enable" "0,1" bitfld.long 0x4 17. "SPHEN,Split Header Feature Enable" "0,1" bitfld.long 0x4 16. "DCBEN,DCB Feature Enable" "0,1" newline bitfld.long 0x4 14.--15. "ADDR64,Address width" "B_0x0,?,?,?" bitfld.long 0x4 13. "ADVTHWORD,IEEE 1588 High Word Register Enable" "0,1" bitfld.long 0x4 12. "PTOEN,PTP Offload Enable" "0,1" newline bitfld.long 0x4 11. "OSTEN,One-Step Timestamping Enable" "0,1" hexmask.long.byte 0x4 6.--10. 1. "TXFIFOSIZE,MTL Transmit FIFO Size" bitfld.long 0x4 5. "SPRAM,Single Port RAM Enable" "0,1" newline hexmask.long.byte 0x4 0.--4. 1. "RXFIFOSIZE,MTL Receive FIFO Size" line.long 0x8 "ETH_MACHWF2R,HW feature 2 register" bitfld.long 0x8 28.--30. "AUXSNAPNUM,Number of Auxiliary Snapshot Inputs" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x8 24.--26. "PPSOUTNUM,Number of PPS Outputs" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x8 22.--23. "TDCSZ,Tx DMA Descriptor Cache Size in terms of 16-byte descriptors" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x8 18.--21. 1. "TXCHCNT,Number of DMA Transmit Channels" bitfld.long 0x8 16.--17. "RDCSZ,Rx DMA Descriptor Cache Size in terms of 16-byte descriptors" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x8 12.--15. 1. "RXCHCNT,Number of DMA Receive Channels" newline hexmask.long.byte 0x8 6.--9. 1. "TXQCNT,Number of MTL Transmit Queues" hexmask.long.byte 0x8 0.--3. 1. "RXQCNT,Number of MTL Receive Queues" line.long 0xC "ETH_MACHWF3R,HW feature 3 register" bitfld.long 0xC 28.--29. "ASP,Automotive Safety Package" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 27. "TBSSEL,Time-based scheduling Enable" "0,1" bitfld.long 0xC 26. "FPESEL,Frame Preemption Enable" "0,1" newline bitfld.long 0xC 20.--21. "ESTWID,Width of the Time Interval field in the Gate Control List" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 17.--19. "ESTDEP,Depth of the Gate Control List" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0xC 16. "ESTSEL,Enhancements to Scheduled Traffic Enable" "0,1" newline bitfld.long 0xC 13.--14. "FRPES,Flexible Receive Parser Table Entries size" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 11.--12. "FRPBS,Flexible Receive Parser Buffer size" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10. "FRPSEL,Flexible Receive Parser Selected" "0,1" newline bitfld.long 0xC 9. "PDUPSEL,Broadcast/Multicast Packet Duplication" "0,1" bitfld.long 0xC 5. "DVLAN,Double VLAN processing enable" "0,1" bitfld.long 0xC 4. "CBTISEL,Queue/Channel based VLAN tag insertion on Tx enable" "0,1" newline bitfld.long 0xC 0.--2. "NRVF,Number of Extended VLAN Tag Filters Enabled" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" group.long 0x200++0x7 line.long 0x0 "ETH_MACMDIOAR,MDIO address register" bitfld.long 0x0 27. "PSE,Preamble Suppression Enable" "0,1" bitfld.long 0x0 26. "BTB,Back to Back transactions" "0,1" hexmask.long.byte 0x0 21.--25. 1. "PA,Physical Layer Address" newline hexmask.long.byte 0x0 16.--20. 1. "RDA,Register/Device Address" bitfld.long 0x0 12.--14. "NTC,Number of Training Clocks" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--11. 1. "CR,CSR Clock Range" newline bitfld.long 0x0 4. "SKAP,Skip Address Packet" "0,1" bitfld.long 0x0 2.--3. "GOC,GMII Operation Command" "?,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "C45E,Clause 45 PHY Enable" "0,1" newline bitfld.long 0x0 0. "GB,GMII Busy" "0,1" line.long 0x4 "ETH_MACMDIODR,MDIO data register" hexmask.long.word 0x4 16.--31. 1. "RA,Register Address" hexmask.long.word 0x4 0.--15. 1. "GD,GMII Data" group.long 0x210++0x3 line.long 0x0 "ETH_MACARPAR,ARP address register" hexmask.long 0x0 0.--31. 1. "ARPPA,ARP Protocol Address" group.long 0x230++0x7 line.long 0x0 "ETH_MACCSRSWCR,CSR software control register" bitfld.long 0x0 8. "SEEN,Slave Error Response Enable" "0,1" bitfld.long 0x0 0. "RCWE,Register Clear on Write 1 Enable" "0,1" line.long 0x4 "ETH_MACFPECSR,FPE control and status register" bitfld.long 0x4 19. "TRSP,Transmitted Respond Frame" "0,1" bitfld.long 0x4 18. "TVER,Transmitted Verify Frame" "0,1" bitfld.long 0x4 17. "RRSP,Received Respond Frame" "0,1" newline bitfld.long 0x4 16. "RVER,Received Verify Frame" "0,1" bitfld.long 0x4 3. "ARV,Autogenerate Respond mPacket on receiving Verify mPacket" "0,1" bitfld.long 0x4 2. "SRSP,Send Respond mPacket" "0,1" newline bitfld.long 0x4 1. "SVER,Send Verify mPacket" "0,1" bitfld.long 0x4 0. "EFPE,Enable Tx Frame Preemption" "0,1" group.long 0x240++0x7 line.long 0x0 "ETH_MACPRSTIMR,MAC presentation time register" hexmask.long 0x0 0.--31. 1. "MPTN,MAC 1722 Presentation Time in ns" line.long 0x4 "ETH_MACPRSTIMUR,MAC presentation time update register" hexmask.long 0x4 0.--31. 1. "MPTU,MAC 1722 Presentation Time Update" group.long 0x300++0x1F line.long 0x0 "ETH_MACA0HR,MAC Address 0 high register" rbitfld.long 0x0 31. "AE,Address Enable" "0,1" bitfld.long 0x0 16. "DCS,DMA Channel Select" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "ADDRHI,MAC Address0[47:32]" line.long 0x4 "ETH_MACA0LR,MAC Address 0 low register" hexmask.long 0x4 0.--31. 1. "ADDRLO,MAC Address x [31:0]" line.long 0x8 "ETH_MACA1HR,MAC Address 1 high register" bitfld.long 0x8 31. "AE,Address Enable" "0,1" bitfld.long 0x8 30. "SA,Source Address" "B_0x0,B_0x1" hexmask.long.byte 0x8 24.--29. 1. "MBC,Mask Byte Control" newline bitfld.long 0x8 16. "DCS,DMA Channel Select" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "ADDRHI,MAC Address1 [47:32]" line.long 0xC "ETH_MACA1LR,MAC Address 1 low register" hexmask.long 0xC 0.--31. 1. "ADDRLO,MAC Address x [31:0]" line.long 0x10 "ETH_MACA2HR,MAC Address 2 high register" bitfld.long 0x10 31. "AE,Address Enable" "0,1" bitfld.long 0x10 30. "SA,Source Address" "B_0x0,B_0x1" hexmask.long.byte 0x10 24.--29. 1. "MBC,Mask Byte Control" newline bitfld.long 0x10 16. "DCS,DMA Channel Select" "B_0x0,B_0x1" hexmask.long.word 0x10 0.--15. 1. "ADDRHI,MAC Address1 [47:32]" line.long 0x14 "ETH_MACA2LR,MAC Address 2 low register" hexmask.long 0x14 0.--31. 1. "ADDRLO,MAC Address x [31:0]" line.long 0x18 "ETH_MACA3HR,MAC Address 3 high register" bitfld.long 0x18 31. "AE,Address Enable" "0,1" bitfld.long 0x18 30. "SA,Source Address" "B_0x0,B_0x1" hexmask.long.byte 0x18 24.--29. 1. "MBC,Mask Byte Control" newline bitfld.long 0x18 16. "DCS,DMA Channel Select" "B_0x0,B_0x1" hexmask.long.word 0x18 0.--15. 1. "ADDRHI,MAC Address1 [47:32]" line.long 0x1C "ETH_MACA3LR,MAC Address 3 low register" hexmask.long 0x1C 0.--31. 1. "ADDRLO,MAC Address x [31:0]" group.long 0x700++0x13 line.long 0x0 "ETH_MMC_CONTROL,MMC control register" bitfld.long 0x0 8. "UCDBC,Update MMC Counters for Dropped Broadcast Packets" "0,1" bitfld.long 0x0 5. "CNTPRSTLVL,Full-Half Preset" "0,1" bitfld.long 0x0 4. "CNTPRST,Counters Preset" "0,1" newline bitfld.long 0x0 3. "CNTFREEZ,MMC Counter Freeze" "0,1" bitfld.long 0x0 2. "RSTONRD,Reset on Read" "0,1" bitfld.long 0x0 1. "CNTSTOPRO,Counter Stop Rollover" "0,1" newline bitfld.long 0x0 0. "CNTRST,Counters Reset" "0,1" line.long 0x4 "ETH_MMC_RX_INTERRUPT,MMC Rx interrupt register" bitfld.long 0x4 27. "RXLPITRCIS,MMC Receive LPI transition counter interrupt status" "0,1" bitfld.long 0x4 26. "RXLPIUSCIS,MMC Receive LPI microsecond counter interrupt status" "0,1" bitfld.long 0x4 25. "RXCTRLPIS,MMC Receive Control Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 24. "RXRCVERRPIS,MMC Receive Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 23. "RXWDOGPIS,MMC Receive Watchdog Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 22. "RXVLANGBPIS,MMC Receive VLAN Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 21. "RXFOVPIS,MMC Receive FIFO Overflow Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 20. "RXPAUSPIS,MMC Receive Pause Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 19. "RXORANGEPIS,MMC Receive Out Of Range Error Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 18. "RXLENERPIS,MMC Receive Length Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 17. "RXUCGPIS,MMC Receive Unicast Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 16. "RX1024TMAXOCTGBPIS,MMC Receive 1024 to Maximum Octet Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 15. "RX512T1023OCTGBPIS,MMC Receive 512 to 1023 Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 14. "RX256T511OCTGBPIS,MMC Receive 256 to 511 Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 13. "RX128T255OCTGBPIS,MMC Receive 128 to 255 Octet Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 12. "RX65T127OCTGBPIS,MMC Receive 65 to 127 Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 11. "RX64OCTGBPIS,MMC Receive 64 Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 10. "RXOSIZEGPIS,MMC Receive Oversize Good Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 9. "RXUSIZEGPIS,MMC Receive Undersize Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 8. "RXJABERPIS,MMC Receive Jabber Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 7. "RXRUNTPIS,MMC Receive Runt Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 6. "RXALGNERPIS,MMC Receive Alignment Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 5. "RXCRCERPIS,MMC Receive CRC Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 4. "RXMCGPIS,MMC Receive Multicast Good Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 3. "RXBCGPIS,MMC Receive Broadcast Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 2. "RXGOCTIS,MMC Receive Good Octet Counter Interrupt Status" "0,1" bitfld.long 0x4 1. "RXGBOCTIS,MMC Receive Good Bad Octet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 0. "RXGBPKTIS,MMC Receive Good Bad Packet Counter Interrupt Status" "0,1" line.long 0x8 "ETH_MMC_TX_INTERRUPT,MMC Tx interrupt register" bitfld.long 0x8 27. "TXLPITRCIS,MMC Transmit LPI transition counter interrupt status" "0,1" bitfld.long 0x8 26. "TXLPIUSCIS,MMC Transmit LPI microsecond counter interrupt status" "0,1" bitfld.long 0x8 25. "TXOSIZEGPIS,MMC Transmit Oversize Good Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 24. "TXVLANGPIS,MMC Transmit VLAN Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 23. "TXPAUSPIS,MMC Transmit Pause Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 22. "TXEXDEFPIS,MMC Transmit Excessive Deferral Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 21. "TXGPKTIS,MMC Transmit Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 20. "TXGOCTIS,MMC Transmit Good Octet Counter Interrupt Status" "0,1" bitfld.long 0x8 19. "TXCARERPIS,MMC Transmit Carrier Error Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 18. "TXEXCOLPIS,MMC Transmit Excessive Collision Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 17. "TXLATCOLPIS,MMC Transmit Late Collision Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 16. "TXDEFPIS,MMC Transmit Deferred Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 15. "TXMCOLGPIS,MMC Transmit Multiple Collision Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 14. "TXSCOLGPIS,MMC Transmit Single Collision Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 13. "TXUFLOWERPIS,MMC Transmit Underflow Error Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 12. "TXBCGBPIS,MMC Transmit Broadcast Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 11. "TXMCGBPIS,MMC Transmit Multicast Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 10. "TXUCGBPIS,MMC Transmit Unicast Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 9. "TX1024TMAXOCTGBPIS,MMC Transmit 1024 to Maximum Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 8. "TX512T1023OCTGBPIS,MMC Transmit 512 to 1023 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x8 7. "TX256T511OCTGBPIS,MMC Transmit 256 to 511 Octet Good Bad Packet Counter" "0,1" newline bitfld.long 0x8 6. "TX128T255OCTGBPIS,MMC Transmit 128 to 255 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x8 5. "TX65T127OCTGBPIS,MMC Transmit 65 to 127 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x8 4. "TX64OCTGBPIS,MMC Transmit 64 Octet Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 3. "TXMCGPIS,MMC Transmit Multicast Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 2. "TXBCGPIS,MMC Transmit Broadcast Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 1. "TXGBPKTIS,MMC Transmit Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 0. "TXGBOCTIS,MMC Transmit Good Bad Octet Counter Interrupt Status" "0,1" line.long 0xC "ETH_MMC_RX_INTERRUPT_MASK,MMC Rx interrupt mask register" bitfld.long 0xC 27. "RXLPITRCIM,MMC Receive LPI transition counter interrupt Mask" "0,1" bitfld.long 0xC 26. "RXLPIUSCIM,MMC Receive LPI microsecond counter interrupt Mask" "0,1" bitfld.long 0xC 25. "RXCTRLPIM,MMC Receive Control Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 24. "RXRCVERRPIM,MMC Receive Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 23. "RXWDOGPIM,MMC Receive Watchdog Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 22. "RXVLANGBPIM,MMC Receive VLAN Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 21. "RXFOVPIM,MMC Receive FIFO Overflow Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 20. "RXPAUSPIM,MMC Receive Pause Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 19. "RXORANGEPIM,MMC Receive Out Of Range Error Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 18. "RXLENERPIM,MMC Receive Length Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 17. "RXUCGPIM,MMC Receive Unicast Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 16. "RX1024TMAXOCTGBPIM,MMC Receive 1024 to Maximum Octet Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 15. "RX512T1023OCTGBPIM,MMC Receive 512 to 1023 Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 14. "RX256T511OCTGBPIM,MMC Receive 256 to 511 Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 13. "RX128T255OCTGBPIM,MMC Receive 128 to 255 Octet Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 12. "RX65T127OCTGBPIM,MMC Receive 65 to 127 Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 11. "RX64OCTGBPIM,MMC Receive 64 Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 10. "RXOSIZEGPIM,MMC Receive Oversize Good Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 9. "RXUSIZEGPIM,MMC Receive Undersize Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 8. "RXJABERPIM,MMC Receive Jabber Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 7. "RXRUNTPIM,MMC Receive Runt Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 6. "RXALGNERPIM,MMC Receive Alignment Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 5. "RXCRCERPIM,MMC Receive CRC Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 4. "RXMCGPIM,MMC Receive Multicast Good Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 3. "RXBCGPIM,MMC Receive Broadcast Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 2. "RXGOCTIM,MMC Receive Good Octet Counter Interrupt Mask" "0,1" bitfld.long 0xC 1. "RXGBOCTIM,MMC Receive Good Bad Octet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 0. "RXGBPKTIM,MMC Receive Good Bad Packet Counter Interrupt Mask" "0,1" line.long 0x10 "ETH_MMC_TX_INTERRUPT_MASK,MMC Tx interrupt mask register" bitfld.long 0x10 27. "TXLPITRCIM,MMC Transmit LPI transition counter interrupt Mask" "0,1" bitfld.long 0x10 26. "TXLPIUSCIM,MMC Transmit LPI microsecond counter interrupt Mask" "0,1" bitfld.long 0x10 25. "TXOSIZEGPIM,MMC Transmit Oversize Good Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 24. "TXVLANGPIM,MMC Transmit VLAN Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 23. "TXPAUSPIM,MMC Transmit Pause Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 22. "TXEXDEFPIM,MMC Transmit Excessive Deferral Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 21. "TXGPKTIM,MMC Transmit Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 20. "TXGOCTIM,MMC Transmit Good Octet Counter Interrupt Mask" "0,1" bitfld.long 0x10 19. "TXCARERPIM,MMC Transmit Carrier Error Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 18. "TXEXCOLPIM,MMC Transmit Excessive Collision Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 17. "TXLATCOLPIM,MMC Transmit Late Collision Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 16. "TXDEFPIM,MMC Transmit Deferred Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 15. "TXMCOLGPIM,MMC Transmit Multiple Collision Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 14. "TXSCOLGPIM,MMC Transmit Single Collision Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 13. "TXUFLOWERPIM,MMC Transmit Underflow Error Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 12. "TXBCGBPIM,MMC Transmit Broadcast Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 11. "TXMCGBPIM,MMC Transmit Multicast Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 10. "TXUCGBPIM,MMC Transmit Unicast Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 9. "TX1024TMAXOCTGBPIM,MMC Transmit 1024 to Maximum Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 8. "TX512T1023OCTGBPIM,MMC Transmit 512 to 1023 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x10 7. "TX256T511OCTGBPIM,MMC Transmit 256 to 511 Octet Good Bad Packet Counter" "0,1" newline bitfld.long 0x10 6. "TX128T255OCTGBPIM,MMC Transmit 128 to 255 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x10 5. "TX65T127OCTGBPIM,MMC Transmit 65 to 127 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x10 4. "TX64OCTGBPIM,MMC Transmit 64 Octet Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 3. "TXMCGPIM,MMC Transmit Multicast Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 2. "TXBCGPIM,MMC Transmit Broadcast Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 1. "TXGBPKTIM,MMC Transmit Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 0. "TXGBOCTIM,MMC Transmit Good Bad Octet Counter Interrupt Mask" "0,1" rgroup.long 0x714++0x67 line.long 0x0 "ETH_TX_OCTET_COUNT_GOOD_BAD,Tx octet count good bad register" hexmask.long 0x0 0.--31. 1. "TXOCTGB,Tx Octet Count Good Bad" line.long 0x4 "ETH_TX_PACKET_COUNT_GOOD_BAD,Tx packet count good bad register" hexmask.long 0x4 0.--31. 1. "TXPKTGB,Tx Packet Count Good Bad" line.long 0x8 "ETH_TX_BROADCAST_PACKETS_GOOD,Tx broadcast packets good register" hexmask.long 0x8 0.--31. 1. "TXBCASTG,Tx Broadcast Packets Good" line.long 0xC "ETH_TX_MULTICAST_PACKETS_GOOD,Tx multicast packets good register" hexmask.long 0xC 0.--31. 1. "TXMCASTG,Tx multicast Packets Good" line.long 0x10 "ETH_TX_64OCTETS_PACKETS_GOOD_BAD,Tx 64 octets packets good bad register" hexmask.long 0x10 0.--31. 1. "TX64OCTGB,Tx 64 octets Packets Good Bad" line.long 0x14 "ETH_TX_64TO127OCTETS_PACKETS_GOOD_BAD,Tx 65 to 127 octets packets good bad register" hexmask.long 0x14 0.--31. 1. "TX65_127OCTGB,Tx 65 to 127 octets Packets Good Bad" line.long 0x18 "ETH_TX_128TO255OCTETS_PACKETS_GOOD_BAD,Tx 128 to 255 octets packets good bad register" hexmask.long 0x18 0.--31. 1. "TX128_255OCTGB,Tx 128 to 255 octets Packets Good Bad" line.long 0x1C "ETH_TX_256TO511OCTETS_PACKETS_GOOD_BAD,Tx 256 to 511 octets packets good bad register" hexmask.long 0x1C 0.--31. 1. "TX256_511OCTGB,Tx 256 to 511 octets Packets Good Bad" line.long 0x20 "ETH_TX_512TO1023OCTETS_PACKETS_GOOD_BAD,Tx 512 to 1023 octets packets good bad register" hexmask.long 0x20 0.--31. 1. "TX512_1023OCTGB,Tx 512 to 1023 octets Packets Good Bad" line.long 0x24 "ETH_TX_1024TOMAXOCTETS_PACKETS_GOOD_BAD,Tx 1024 to max octets packets good bad register" hexmask.long 0x24 0.--31. 1. "TX1024_MAXOCTGB,Tx 1024 to Max octets Packets Good Bad" line.long 0x28 "ETH_TX_UNICAST_PACKETS_GOOD_BAD,Tx unicast packets good bad register" hexmask.long 0x28 0.--31. 1. "TXUCASTGB,Tx Unicast Packets Good Bad" line.long 0x2C "ETH_TX_MULTICAST_PACKETS_GOOD_BAD,Tx multicast packets good bad register" hexmask.long 0x2C 0.--31. 1. "TXMCASTGB,Tx Multicast Packets Good Bad" line.long 0x30 "ETH_TX_BROADCAST_PACKETS_GOOD_BAD,Tx broadcast packets good bad register" hexmask.long 0x30 0.--31. 1. "TXBCASTGB,Tx Broadcast Packets Good Bad" line.long 0x34 "ETH_TX_UNDERFLOW_ERROR_PACKETS,Tx underflow error packets register" hexmask.long 0x34 0.--31. 1. "TXUNDRFLW,Tx Underflow Error Packets" line.long 0x38 "ETH_TX_SINGLE_COLLISION_GOOD_PACKETS,Tx single collision good packets register" hexmask.long 0x38 0.--31. 1. "TXSNGLCOLG,Tx Single Collision Good Packets" line.long 0x3C "ETH_TX_MULTIPLE_COLLISION_GOOD_PACKETS,Tx multiple collision good packets register" hexmask.long 0x3C 0.--31. 1. "TXMULTCOLG,Tx Multiple Collision Good Packets" line.long 0x40 "ETH_TX_DEFERRED_PACKETS,Tx deferred packets register" hexmask.long 0x40 0.--31. 1. "TXDEFRD,Tx Deferred Packets" line.long 0x44 "ETH_TX_LATE_COLLISION_PACKETS,Tx late collision packets register" hexmask.long 0x44 0.--31. 1. "TXLATECOL,Tx Late Collision Packets" line.long 0x48 "ETH_TX_EXCESSIVE_COLLISION_PACKETS,Tx excessive collision packets register" hexmask.long 0x48 0.--31. 1. "TXEXSCOL,Tx Excessive Collision Packets" line.long 0x4C "ETH_TX_CARRIER_ERROR_PACKETS,Tx carrier error packets register" hexmask.long 0x4C 0.--31. 1. "TXCARR,Tx Carrier Error Packets" line.long 0x50 "ETH_TX_OCTET_COUNT_GOOD,Tx octet count good register" hexmask.long 0x50 0.--31. 1. "TXOCTG,Tx Octet Count Good" line.long 0x54 "ETH_TX_PACKET_COUNT_GOOD,Tx packet count good register" hexmask.long 0x54 0.--31. 1. "TXPKTG,Tx Packet Count Good" line.long 0x58 "ETH_TX_EXCESSIVE_DEFERRAL_ERROR,Tx excessive deferral error register" hexmask.long 0x58 0.--31. 1. "TXEXSDEF,Tx Excessive Deferral Error" line.long 0x5C "ETH_TX_PAUSE_PACKETS,Tx pause packets register" hexmask.long 0x5C 0.--31. 1. "TXPAUSE,Tx Pause Packets" line.long 0x60 "ETH_TX_VLAN_PACKETS_GOOD,Tx VLAN packets good register" hexmask.long 0x60 0.--31. 1. "TXVLANG,Tx VLAN Packets Good" line.long 0x64 "ETH_TX_OSIZE_PACKETS_GOOD,Tx OSsize packets good register" hexmask.long 0x64 0.--31. 1. "TXOSIZG,Tx OSize Packets Good" rgroup.long 0x780++0x67 line.long 0x0 "ETH_RX_PACKETS_COUNT_GOOD_BAD,Rx packets count good bad register" hexmask.long 0x0 0.--31. 1. "RXPKTGB,Rx Packets Count Good Bad" line.long 0x4 "ETH_RX_OCTET_COUNT_GOOD_BAD,Rx octet count good bad register" hexmask.long 0x4 0.--31. 1. "RXOCTGB,Rx Octet Count Good Bad" line.long 0x8 "ETH_RX_OCTET_COUNT_GOOD,Rx octet count good register" hexmask.long 0x8 0.--31. 1. "RXOCTG,Rx Octet Count Good" line.long 0xC "ETH_RX_BROADCAST_PACKETS_GOOD,Rx broadcast packets good register" hexmask.long 0xC 0.--31. 1. "RXBCASTG,Rx Broadcast Packets Good" line.long 0x10 "ETH_RX_MULTICAST_PACKETS_GOOD,Rx multicast packets good register" hexmask.long 0x10 0.--31. 1. "RXMCASTG,Rx Multicast Packets Good" line.long 0x14 "ETH_RX_CRC_ERROR_PACKETS,Rx CRC error packets register" hexmask.long 0x14 0.--31. 1. "RXCRCERR,Rx CRC Error Packets" line.long 0x18 "ETH_RX_ALIGNMENT_ERROR_PACKETS,Rx alignment error packets register" hexmask.long 0x18 0.--31. 1. "RXALGNERR,Rx Alignment Error Packets" line.long 0x1C "ETH_RX_RUNT_ERROR_PACKETS,Rx runt error packets register" hexmask.long 0x1C 0.--31. 1. "RXRUNTERR,Rx Runt Error Packets" line.long 0x20 "ETH_RX_JABBER_ERROR_PACKETS,Rx jabber error packets register" hexmask.long 0x20 0.--31. 1. "RXJABERR,Rx Jabber Error Packets" line.long 0x24 "ETH_RX_UNDERSIZE_PACKETS_GOOD,Rx undersize packets good register" hexmask.long 0x24 0.--31. 1. "RXUNDERSZG,Rx Undersize Packets Good" line.long 0x28 "ETH_RX_OVERSIZE_PACKETS_GOOD,Rx oversize packets good register" hexmask.long 0x28 0.--31. 1. "RXOVERSZG,Rx Oversize Packets Good" line.long 0x2C "ETH_RX_64OCTETS_PACKETS_GOOD_BAD,Rx 64 octets packets good bad register" hexmask.long 0x2C 0.--31. 1. "RX64OCTGB,Rx 64 Octets Packets Good Bad" line.long 0x30 "ETH_RX_65TO127OCTETS_PACKETS_GOOD_BAD,Rx 65 to 127 octets packets good bad register" hexmask.long 0x30 0.--31. 1. "TX65_127OCTGB,Rx 65-127 Octets Packets Good Bad" line.long 0x34 "ETH_RX_128TO255OCTETS_PACKETS_GOOD_BAD,Rx 128 to 255 octets packets good bad register" hexmask.long 0x34 0.--31. 1. "RX128_255OCTGB,Rx 128-255 Octets Packets Good Bad" line.long 0x38 "ETH_RX_256TO511OCTETS_PACKETS_GOOD_BAD,Rx 256 to 511 octets packets good bad register" hexmask.long 0x38 0.--31. 1. "RX256_511OCTGB,Rx 256-511 Octets Packets Good Bad" line.long 0x3C "ETH_RX_512TO1023OCTETS_PACKETS_GOOD_BAD,Rx 512 to 1023 octets packets good bad register" hexmask.long 0x3C 0.--31. 1. "RX512_1023OCTGB,Rx 512-1023 Octets Packets Good Bad" line.long 0x40 "ETH_RX_1024TOMAXOCTETS_PACKETS_GOOD_BAD,Rx 1024 to max octets packets good bad register" hexmask.long 0x40 0.--31. 1. "RX1024_MAXOCTGB,Rx 1024-Max Octets Good Bad" line.long 0x44 "ETH_RX_UNICAST_PACKETS_GOOD,Rx unicast packets good register" hexmask.long 0x44 0.--31. 1. "RXUCASTG,Rx Unicast Packets Good" line.long 0x48 "ETH_RX_LENGTH_ERROR_PACKETS,Rx length error packets register" hexmask.long 0x48 0.--31. 1. "RXLENERR,Rx Length Error Packets" line.long 0x4C "ETH_RX_OUT_OF_RANGE_PACKETS,Rx out of range type packets register" hexmask.long 0x4C 0.--31. 1. "RXOUTOFRNG,Rx Out of Range Type Packet" line.long 0x50 "ETH_RX_PAUSE_PACKETS,Rx pause packets register" hexmask.long 0x50 0.--31. 1. "RXPAUSEPKT,Rx Pause Packets" line.long 0x54 "ETH_RX_FIFO_OVERFLOW_PACKETS,Rx FIFO overflow packets register" hexmask.long 0x54 0.--31. 1. "RXFIFOOVFL,Rx FIFO Overflow Packets" line.long 0x58 "ETH_RX_VLAN_PACKETS_GOOD_BAD,Rx VLAN packets good bad register" hexmask.long 0x58 0.--31. 1. "RXVLANPKTGB,Rx VLAN Packets Good Bad" line.long 0x5C "ETH_RX_WATCHDOG_ERROR_PACKETS,Rx watchdog error packets register" hexmask.long 0x5C 0.--31. 1. "RXWDGERR,Rx Watchdog Error Packets" line.long 0x60 "ETH_RX_RECEIVE_ERROR,Rx receive error register" hexmask.long 0x60 0.--31. 1. "RXRCVERR,Rx Receive Error Packets" line.long 0x64 "ETH_RX_CONTROL_PACKETS_GOOD,Rx control packets good register" hexmask.long 0x64 0.--31. 1. "RXCTRLG,Rx Control Packets Good" rgroup.long 0x7EC++0xF line.long 0x0 "ETH_TX_LPI_USEC_CNTR,Tx LPI microsecond timer register" hexmask.long 0x0 0.--31. 1. "TXLPIUSC,Tx LPI Microseconds Counter" line.long 0x4 "ETH_TX_LPI_TRAN_CNTR,Tx LPI transition counter register" hexmask.long 0x4 0.--31. 1. "TXLPITRC,Tx LPI Transition counter" line.long 0x8 "ETH_RX_LPI_USEC_CNTR,Rx LPI microsecond counter register" hexmask.long 0x8 0.--31. 1. "RXLPIUSC,Rx LPI Microseconds Counter" line.long 0xC "ETH_RX_LPI_TRAN_CNTR,Rx LPI transition counter register" hexmask.long 0xC 0.--31. 1. "RXLPITRC,Rx LPI Transition counter" group.long 0x8A0++0x7 line.long 0x0 "ETH_MMC_FPE_TX_ISR,MMC FPE Tx interrupt status register" bitfld.long 0x0 1. "HRCIS,MMC Tx Hold Request Counter Interrupt Status" "0,1" bitfld.long 0x0 0. "FCIS,MMC Tx FPE Fragment Counter Interrupt status" "0,1" line.long 0x4 "ETH_MMC_FPE_TX_IMR,MMC FPE Tx interrupt mask register" bitfld.long 0x4 1. "HRCIM,MMC Transmit Hold Request Counter Interrupt Mask" "0,1" bitfld.long 0x4 0. "FCIM,MMC Transmit Fragment Counter Interrupt Mask" "0,1" rgroup.long 0x8A8++0x7 line.long 0x0 "ETH_MMC_FPE_TX_FCR,MMC FPE Tx fragment counter register" hexmask.long 0x0 0.--31. 1. "TXFFC,Tx FPE Fragment counter" line.long 0x4 "ETH_MMC_TX_HRCR,MMC Tx hold request counter register" hexmask.long 0x4 0.--31. 1. "TXHRC,Tx Hold Request Counter" rgroup.long 0x8C0++0x3 line.long 0x0 "ETH_MMC_FPE_RX_ISR,MMC FPE Rx interrupt status register" bitfld.long 0x0 3. "FCIS,MMC Rx FPE Fragment Counter Interrupt Status" "0,1" bitfld.long 0x0 2. "PAOCIS,MMC Rx Packet Assembly OK Counter Interrupt Status" "0,1" bitfld.long 0x0 1. "PSECIS,MMC Rx Packet SMD Error Counter Interrupt Status" "0,1" newline bitfld.long 0x0 0. "PAECIS,MMC Rx Packet Assembly Error Counter Interrupt Status" "0,1" group.long 0x8C4++0x3 line.long 0x0 "ETH_MMC_FPE_RX_IMR,MMC FPE Rx interrupt mask register" bitfld.long 0x0 3. "FCIM,MMC Rx FPE Fragment Counter Interrupt Mask" "0,1" bitfld.long 0x0 2. "PAOCIM,MMC Rx Packet Assembly OK Counter Interrupt Mask" "0,1" bitfld.long 0x0 1. "PSECIM,MMC Rx Packet SMD Error Counter Interrupt Mask" "0,1" newline bitfld.long 0x0 0. "PAECIM,MMC Rx Packet Assembly Error Counter Interrupt Mask" "0,1" rgroup.long 0x8C8++0xF line.long 0x0 "ETH_RX_PACKET_ASM_ERR,MMC Rx packet assembly error register" hexmask.long 0x0 0.--31. 1. "PAEC,Rx Packet Assembly Error Counter" line.long 0x4 "ETH_RX_PACKET_SMD_ERR,MMC Rx packet SMD error register" hexmask.long 0x4 0.--31. 1. "PSEC,Rx Packet SMD Error Counter" line.long 0x8 "ETH_RX_PACKET_ASM_OKR,MMC Rx packet assembly OK register" hexmask.long 0x8 0.--31. 1. "PAOC,Rx Packet Assembly OK Counter" line.long 0xC "ETH_RX_FPE_FRAG_CR,MMC Rx FPE fragments counter register" hexmask.long 0xC 0.--31. 1. "FFC,Rx FPE Fragment Counter" group.long 0x900++0x7 line.long 0x0 "ETH_MACL3L4C0R,L3 and L4 control 0 register" bitfld.long 0x0 28. "DMCHEN0,DMA Channel Select Enable" "0,1" bitfld.long 0x0 24. "DMCHN0,DMA Channel Number" "B_0x0,B_0x1" bitfld.long 0x0 21. "L4DPIM0,Layer 4 Destination Port Inverse Match Enable" "0,1" newline bitfld.long 0x0 20. "L4DPM0,Layer 4 Destination Port Match Enable" "0,1" bitfld.long 0x0 19. "L4SPIM0,Layer 4 Source Port Inverse Match Enable" "0,1" bitfld.long 0x0 18. "L4SPM0,Layer 4 Source Port Match Enable" "0,1" newline bitfld.long 0x0 16. "L4PEN0,Layer 4 Protocol Enable" "0,1" hexmask.long.byte 0x0 11.--15. 1. "L3HDBM0,Layer 3 IP DA higher bits match" hexmask.long.byte 0x0 6.--10. 1. "L3HSBM0,Layer 3 IP SA higher bits match" newline bitfld.long 0x0 5. "L3DAIM0,Layer 3 IP DA Inverse Match Enable" "0,1" bitfld.long 0x0 4. "L3DAM0,Layer 3 IP DA Match Enable" "0,1" bitfld.long 0x0 3. "L3SAIM0,Layer 3 IP SA Inverse Match Enable" "0,1" newline bitfld.long 0x0 2. "L3SAM0,Layer 3 IP SA Match Enable" "0,1" bitfld.long 0x0 0. "L3PEN0,Layer 3 Protocol Enable" "0,1" line.long 0x4 "ETH_MACL4A0R,Layer4 Address filter 0 register" hexmask.long.word 0x4 16.--31. 1. "L4DP0,Layer 4 Destination Port Number Field" hexmask.long.word 0x4 0.--15. 1. "L4SP0,Layer 4 Source Port Number Field" group.long 0x910++0xF line.long 0x0 "ETH_MACL3A00R,Layer3 Address 0 filter 0 register" hexmask.long 0x0 0.--31. 1. "L3A00,Layer 3 Address 0 Field" line.long 0x4 "ETH_MACL3A10R,Layer3 Address 1 filter 0 register" hexmask.long 0x4 0.--31. 1. "L3A10,Layer 3 Address 1 Field" line.long 0x8 "ETH_MACL3A20R,Layer3 Address 2 filter 0 register" hexmask.long 0x8 0.--31. 1. "L3A20,Layer 3 Address 2 Field" line.long 0xC "ETH_MACL3A30R,Layer3 Address 3 filter 0 register" hexmask.long 0xC 0.--31. 1. "L3A30,Layer 3 Address 3 Field" group.long 0x930++0x7 line.long 0x0 "ETH_MACL3L4C1R,L3 and L4 control 1 register" bitfld.long 0x0 28. "DMCHEN1,DMA Channel Select Enable" "0,1" bitfld.long 0x0 24. "DMCHN1,DMA Channel Number" "0,1" bitfld.long 0x0 21. "L4DPIM1,Layer 4 Destination Port Inverse Match Enable" "0,1" newline bitfld.long 0x0 20. "L4DPM1,Layer 4 Destination Port Match Enable" "0,1" bitfld.long 0x0 19. "L4SPIM1,Layer 4 Source Port Inverse Match Enable" "0,1" bitfld.long 0x0 18. "L4SPM1,Layer 4 Source Port Match Enable" "0,1" newline bitfld.long 0x0 16. "L4PEN1,Layer 4 Protocol Enable" "0,1" hexmask.long.byte 0x0 11.--15. 1. "L3HDBM1,Layer 3 IP DA higher bits match" hexmask.long.byte 0x0 6.--10. 1. "L3HSBM1,Layer 3 IP SA Higher Bits Match" newline bitfld.long 0x0 5. "L3DAIM1,Layer 3 IP DA Inverse Match Enable" "0,1" bitfld.long 0x0 4. "L3DAM1,Layer 3 IP DA Match Enable" "0,1" bitfld.long 0x0 3. "L3SAIM1,Layer 3 IP SA Inverse Match Enable" "0,1" newline bitfld.long 0x0 2. "L3SAM1,Layer 3 IP SA Match Enable" "0,1" bitfld.long 0x0 0. "L3PEN1,Layer 3 Protocol Enable" "0,1" line.long 0x4 "ETH_MACL4A1R,Layer 4 address filter 1 register" hexmask.long.word 0x4 16.--31. 1. "L4DP1,Layer 4 Destination Port Number Field" hexmask.long.word 0x4 0.--15. 1. "L4SP1,Layer 4 Source Port Number Field" group.long 0x940++0xF line.long 0x0 "ETH_MACL3A01R,Layer3 address 0 filter 1 Register" hexmask.long 0x0 0.--31. 1. "L3A01,Layer 3 Address 0 Field" line.long 0x4 "ETH_MACL3A11R,Layer3 address 1 filter 1 register" hexmask.long 0x4 0.--31. 1. "L3A11,Layer 3 Address 1 Field" line.long 0x8 "ETH_MACL3A21R,Layer3 address 2 filter 1 Register" hexmask.long 0x8 0.--31. 1. "L3A21,Layer 3 Address 2 Field" line.long 0xC "ETH_MACL3A31R,Layer3 address 3 filter 1 register" hexmask.long 0xC 0.--31. 1. "L3A31,Layer 3 Address 3 Field" group.long 0xA70++0x7 line.long 0x0 "ETH_MAC_IACR,MAC Indirect Access Control register" hexmask.long.byte 0x0 16.--19. 1. "MSEL,Mode Select" hexmask.long.byte 0x0 8.--15. 1. "AOFF,Address Offset" bitfld.long 0x0 5. "AUTO,Auto-increment" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "COM,Command type" "B_0x0,B_0x1" bitfld.long 0x0 0. "OB,Operation Busy." "0,1" line.long 0x4 "ETH_MAC_TMRQR,MAC type-based Rx Queue mapping register" bitfld.long 0x4 20. "PFEX,Preemption or Express Packet" "B_0x0,B_0x1" bitfld.long 0x4 16.--18. "TMRQ,Type Match Rx Queue Number" "0,1,2,3,4,5,6,7" hexmask.long.word 0x4 0.--15. 1. "TYP,Type field Value" group.long 0xB00++0x7 line.long 0x0 "ETH_MACTSCR,Timestamp control Register" bitfld.long 0x0 28. "AV8021ASMEN,AV 802." "0,1" bitfld.long 0x0 24. "TXTSSTSM,Transmit Timestamp Status Mode" "0,1" bitfld.long 0x0 20. "ESTI,External System Time Input" "0,1" newline bitfld.long 0x0 18. "TSENMACADDR,Enable MAC Address for PTP Packet Filtering" "0,1" bitfld.long 0x0 16.--17. "SNAPTYPSEL,Select PTP packets for Taking Snapshots" "0,1,2,3" bitfld.long 0x0 15. "TSMSTRENA,Enable Snapshot for Messages Relevant to Master" "0,1" newline bitfld.long 0x0 14. "TSEVNTENA,Enable Timestamp Snapshot for Event Messages" "0,1" bitfld.long 0x0 13. "TSIPV4ENA,Enable Processing of PTP Packets Sent over IPv4-UDP" "0,1" bitfld.long 0x0 12. "TSIPV6ENA,Enable Processing of PTP Packets Sent over IPv6-UDP" "0,1" newline bitfld.long 0x0 11. "TSIPENA,Enable Processing of PTP over Ethernet Packets" "0,1" bitfld.long 0x0 10. "TSVER2ENA,Enable PTP Packet Processing for Version 2 Format" "0,1" bitfld.long 0x0 9. "TSCTRLSSR,Timestamp Digital or Binary Rollover Control" "0,1" newline bitfld.long 0x0 8. "TSENALL,Enable Timestamp for All Packets" "0,1" bitfld.long 0x0 6. "PTGE,Presentation Time Generation Enable" "0,1" bitfld.long 0x0 5. "TSADDREG,Update Addend Register" "0,1" newline bitfld.long 0x0 3. "TSUPDT,Update Timestamp" "0,1" bitfld.long 0x0 2. "TSINIT,Initialize Timestamp" "0,1" bitfld.long 0x0 1. "TSCFUPDT,Fine or Coarse Timestamp Update" "0,1" newline bitfld.long 0x0 0. "TSENA,Enable Timestamp" "0,1" line.long 0x4 "ETH_MACSSIR,Subsecond increment register" hexmask.long.byte 0x4 16.--23. 1. "SSINC,Subsecond Increment Value" rgroup.long 0xB08++0x7 line.long 0x0 "ETH_MACSTSR,System time seconds register" hexmask.long 0x0 0.--31. 1. "TSS,Timestamp Second" line.long 0x4 "ETH_MACSTNR,System time nanoseconds register" hexmask.long 0x4 0.--30. 1. "TSSS,Timestamp subseconds" group.long 0xB10++0xB line.long 0x0 "ETH_MACSTSUR,System time seconds update register" hexmask.long 0x0 0.--31. 1. "TSS,Timestamp Seconds" line.long 0x4 "ETH_MACSTNUR,System time nanoseconds update register" bitfld.long 0x4 31. "ADDSUB,Add or Subtract Time" "0,1" hexmask.long 0x4 0.--30. 1. "TSSS,Timestamp subseconds" line.long 0x8 "ETH_MACTSAR,Timestamp addend register" hexmask.long 0x8 0.--31. 1. "TSAR,Timestamp Addend Register" group.long 0xB20++0xB line.long 0x0 "ETH_MACTSSR,Timestamp status register" hexmask.long.byte 0x0 25.--29. 1. "ATSNS,Number of Auxiliary Timestamp Snapshots" bitfld.long 0x0 24. "ATSSTM,Auxiliary Timestamp Snapshot Trigger Missed" "0,1" hexmask.long.byte 0x0 16.--19. 1. "ATSSTN,Auxiliary Timestamp Snapshot Trigger Identifier" newline bitfld.long 0x0 15. "TXTSSIS,Tx Timestamp Status Interrupt Status" "0,1" bitfld.long 0x0 5. "TSTRGTERR1,Timestamp Target Time Error" "0,1" bitfld.long 0x0 4. "TSTARGT1,Timestamp Target Time Reached" "0,1" newline bitfld.long 0x0 3. "TSTRGTERR0,Timestamp Target Time Error" "0,1" bitfld.long 0x0 2. "AUXTSTRIG,Auxiliary Timestamp Trigger Snapshot" "0,1" bitfld.long 0x0 1. "TSTARGT0,Timestamp Target Time Reached" "0,1" newline bitfld.long 0x0 0. "TSSOVF,Timestamp Seconds Overflow" "0,1" line.long 0x4 "ETH_MACRXDTI,Rx domain time increment register" hexmask.long.word 0x4 16.--31. 1. "RXNS,Receive domain time increment value in nanoseconds" line.long 0x8 "ETH_MACTXDTI,Tx domain time increment register" hexmask.long.word 0x8 16.--31. 1. "TXNS,Transmit domain time increment value in nanoseconds" group.long 0xB30++0x3 line.long 0x0 "ETH_MACTXTSSNR,Tx timestamp status nanoseconds register" rbitfld.long 0x0 31. "TXTSSMIS,Transmit Timestamp Status Missed" "0,1" hexmask.long 0x0 0.--30. 1. "TXTSSLO,Transmit Timestamp Status Low" rgroup.long 0xB34++0x3 line.long 0x0 "ETH_MACTXTSSSR,Tx timestamp status seconds register" hexmask.long 0x0 0.--31. 1. "TXTSSHI,Transmit Timestamp Status High" group.long 0xB40++0x3 line.long 0x0 "ETH_MACACR,Auxiliary control register" bitfld.long 0x0 7. "ATSEN3,Auxiliary Snapshot 3 Enable" "0,1" bitfld.long 0x0 6. "ATSEN2,Auxiliary Snapshot 2 Enable" "0,1" bitfld.long 0x0 5. "ATSEN1,Auxiliary Snapshot 1 Enable" "0,1" newline bitfld.long 0x0 4. "ATSEN0,Auxiliary Snapshot 0 Enable" "0,1" bitfld.long 0x0 0. "ATSFC,Auxiliary Snapshot FIFO Clear" "0,1" rgroup.long 0xB48++0x7 line.long 0x0 "ETH_MACATSNR,Auxiliary timestamp nanoseconds register" hexmask.long 0x0 0.--30. 1. "AUXTSLO,Auxiliary Timestamp" line.long 0x4 "ETH_MACATSSR,Auxiliary timestamp seconds register" hexmask.long 0x4 0.--31. 1. "AUXTSHI,Auxiliary Timestamp" group.long 0xB50++0xF line.long 0x0 "ETH_MACTSIACR,Timestamp Ingress asymmetric correction register" hexmask.long 0x0 0.--31. 1. "OSTIAC,One-Step Timestamp Ingress Asymmetry Correction" line.long 0x4 "ETH_MACTSEACR,Timestamp Egress asymmetric correction register" hexmask.long 0x4 0.--31. 1. "OSTEAC,One-Step Timestamp Egress Asymmetry Correction" line.long 0x8 "ETH_MACTSICNR,Timestamp Ingress correction nanosecond register" hexmask.long 0x8 0.--31. 1. "TSIC,Timestamp Ingress Correction" line.long 0xC "ETH_MACTSECNR,Timestamp Egress correction nanosecond register" hexmask.long 0xC 0.--31. 1. "TSEC,Timestamp Egress Correction" rgroup.long 0xB68++0x7 line.long 0x0 "ETH_MACTSILR,Timestamp Ingress Latency register" hexmask.long.word 0x0 16.--27. 1. "ITLNS,Ingress Timestamp Latency in nanoseconds" hexmask.long.byte 0x0 8.--15. 1. "ITLSNS,Ingress Timestamp Latency in subnanoseconds" line.long 0x4 "ETH_MACTSELR,Timestamp Egress Latency register" hexmask.long.word 0x4 16.--27. 1. "ETLNS,Egress Timestamp Latency in nanoseconds" hexmask.long.byte 0x4 8.--15. 1. "ETLSNS,Egress Timestamp Latency in subnanoseconds" group.long 0xB70++0x3 line.long 0x0 "ETH_MACPPSCR,PPS control register" bitfld.long 0x0 28. "TIMESEL,Time Select" "0,1" bitfld.long 0x0 7. "MCGREN0,MCGR Mode Enable for PPS0 Output" "B_0x0,B_0x1" bitfld.long 0x0 5.--6. "TRGTMODSEL0,Target Time Register Mode for PPS Output" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 4. "PPSEN0,Flexible PPS Output Mode Enable" "0,1" hexmask.long.byte 0x0 0.--3. 1. "PPSCTRL,PPS Output Frequency Control" group.long 0xB70++0x3 line.long 0x0 "ETH_MACPPSCR_ALTERNATE1,PPS control register" bitfld.long 0x0 28. "TIMESEL,Time Select" "0,1" bitfld.long 0x0 15. "MCGREN1,MCGR Mode Enable for PPS Output 1" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "TRGTMODSEL1,Target Time Register Mode for PPS Output 1" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x0 8.--11. 1. "PPSCMD1,Flexible PPS Output 1 Control" bitfld.long 0x0 7. "MCGREN0,MCGR Mode Enable for PPS Output 0" "B_0x0,B_0x1" bitfld.long 0x0 5.--6. "TRGTMODSEL0,Target Time Register Mode for PPS Output 0" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 4. "PPSEN0,Flexible PPS Output 0 Mode Enable" "0,1" hexmask.long.byte 0x0 0.--3. 1. "PPSCMD,Flexible PPS Output 0 (eth_ptp_pps_out) Control" group.long 0xB80++0x1F line.long 0x0 "ETH_MACPPSTTS0R,PPS 0 target time seconds register" hexmask.long 0x0 0.--31. 1. "TSTRH0,PPS Target Time Seconds Register" line.long 0x4 "ETH_MACPPSTTN0R,PPS 0 target time nanoseconds register" bitfld.long 0x4 31. "TRGTBUSY0,PPS Target Time Register Busy" "0,1" hexmask.long 0x4 0.--30. 1. "TTSL0,Target Time Low for PPS Register" line.long 0x8 "ETH_MACPPSI0R,PPS 0 interval register" hexmask.long 0x8 0.--31. 1. "PPSINT0,PPS Output Signal Interval" line.long 0xC "ETH_MACPPSW0R,PPS 0 width register" hexmask.long 0xC 0.--31. 1. "PPSWIDTH0,PPS Output Signal Width" line.long 0x10 "ETH_MACPPSTTS1R,PPS 1 target time seconds register" hexmask.long 0x10 0.--31. 1. "TSTRH0,PPS Target Time Seconds Register" line.long 0x14 "ETH_MACPPSTTN1R,PPS 1 target time nanoseconds register" bitfld.long 0x14 31. "TRGTBUSY0,PPS Target Time Register Busy" "0,1" hexmask.long 0x14 0.--30. 1. "TTSL0,Target Time Low for PPS Register" line.long 0x18 "ETH_MACPPSI1R,PPS 1 interval register" hexmask.long 0x18 0.--31. 1. "PPSINT0,PPS Output Signal Interval" line.long 0x1C "ETH_MACPPSW1R,PPS 1 width register" hexmask.long 0x1C 0.--31. 1. "PPSWIDTH0,PPS Output Signal Width" group.long 0xBC0++0x13 line.long 0x0 "ETH_MACPOCR,PTP Offload control register" hexmask.long.byte 0x0 8.--15. 1. "DN,Domain Number" bitfld.long 0x0 7. "PDRDIS,Disable Peer Delay Response response generation" "0,1" bitfld.long 0x0 6. "DRRDIS,Disable PTO Delay Request/Response response generation" "0,1" newline bitfld.long 0x0 5. "APDREQTRIG,Automatic PTP Pdelay_Req message Trigger" "0,1" bitfld.long 0x0 4. "ASYNCTRIG,Automatic PTP SYNC message Trigger" "0,1" bitfld.long 0x0 2. "APDREQEN,Automatic PTP Pdelay_Req message Enable" "0,1" newline bitfld.long 0x0 1. "ASYNCEN,Automatic PTP SYNC message Enable" "0,1" bitfld.long 0x0 0. "PTOEN,PTP Offload Enable" "0,1" line.long 0x4 "ETH_MACSPI0R,PTP Source Port Identity 0 Register" hexmask.long 0x4 0.--31. 1. "SPI0,Source Port Identity 0" line.long 0x8 "ETH_MACSPI1R,PTP Source port identity 1 register" hexmask.long 0x8 0.--31. 1. "SPI1,Source Port Identity 1" line.long 0xC "ETH_MACSPI2R,PTP Source port identity 2 register" hexmask.long.word 0xC 0.--15. 1. "SPI2,Source Port Identity 2" line.long 0x10 "ETH_MACLMIR,Log message interval register" hexmask.long.byte 0x10 24.--31. 1. "LMPDRI,Log Min Pdelay_Req Interval" bitfld.long 0x10 8.--10. "DRSYNCR,Delay_Req to SYNC Ratio" "B_0x0,B_0x1,?,?,?,?,?,?" hexmask.long.byte 0x10 0.--7. 1. "LSI,Log Sync Interval" group.long 0xC00++0x3 line.long 0x0 "ETH_MTLOMR,Operating mode register" bitfld.long 0x0 9. "CNTCLR,Counters Reset" "0,1" bitfld.long 0x0 8. "CNTPRST,Counters Preset" "0,1" bitfld.long 0x0 5.--6. "SCHALG,Tx Scheduling Algorithm" "B_0x0,?,?,B_0x3" newline bitfld.long 0x0 2. "RAA,Receive Arbitration Algorithm" "B_0x0,B_0x1" bitfld.long 0x0 1. "DTXSTS,Drop Transmit Status" "0,1" rgroup.long 0xC20++0x3 line.long 0x0 "ETH_MTLISR,Interrupt status register" bitfld.long 0x0 18. "ESTIS,EST (TAS- 802." "0,1" bitfld.long 0x0 3. "Q3IS,Queue 3 interrupt status" "0,1" bitfld.long 0x0 2. "Q2IS,Queue 2 interrupt status" "0,1" newline bitfld.long 0x0 1. "Q1IS,Queue 1 interrupt status" "0,1" bitfld.long 0x0 0. "Q0IS,Queue 0 interrupt status" "0,1" group.long 0xC30++0x3 line.long 0x0 "ETH_MTLRXQDMAMR,Rx Queue and DMA Channel Mapping register" bitfld.long 0x0 12. "Q1DDMACH,Queue 1 Enabled for DA-based DMA Channel Selection" "0,1" bitfld.long 0x0 8. "Q1MDMACH,Queue 1 Mapped to DMA Channel" "B_0x0,B_0x1" bitfld.long 0x0 4. "Q0DDMACH,Queue 0 Enabled for DA-based DMA Channel Selection" "0,1" newline bitfld.long 0x0 0. "Q0MDMACH,Queue 0 Mapped to DMA Channel" "B_0x0,B_0x1" group.long 0xC40++0x3 line.long 0x0 "ETH_MTLTBSCR,TBS control register" hexmask.long.tbyte 0x0 8.--31. 1. "LEOS,Launch Expiry Offset" bitfld.long 0x0 4.--6. "LEGOS,Launch Expiry GSN Offset" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "LEOV,Launch expiry offset valid" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "ESTM,EST offset mode" "B_0x0,B_0x1" group.long 0xC50++0xB line.long 0x0 "ETH_MTLESTCR,EST Control register" hexmask.long.byte 0x0 24.--31. 1. "PTOV,PTP Time Offset Value" hexmask.long.word 0x0 12.--23. 1. "CTOV,Current Time Offset Value" bitfld.long 0x0 8.--10. "TILS,Time Interval Left Shift Amount" "B_0x0,B_0x1,B_0x2,?,B_0x4,?,?,?" newline bitfld.long 0x0 6.--7. "LCSE,Loop Count to report Scheduling Error" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 5. "DFBS,Drop Frames causing Scheduling Error" "B_0x0,B_0x1" bitfld.long 0x0 4. "DDBF,Do not Drop frames during Frame Size Error" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "SSWL,Switch to S/W owned list" "0,1" bitfld.long 0x0 0. "EEST,Enable EST" "B_0x0,B_0x1" line.long 0x4 "ETH_MTLESTECR,EST Extended Control register" hexmask.long.byte 0x4 0.--5. 1. "OVHD,Overhead Bytes Value" line.long 0x8 "ETH_MTLESTSR,EST Status register" hexmask.long.byte 0x8 16.--19. 1. "CGSN,Current GCL slot number" hexmask.long.byte 0x8 8.--15. 1. "BTRL,BTR Error Loop Count" rbitfld.long 0x8 7. "SWOL,S/W owned list" "B_0x0,B_0x1" newline bitfld.long 0x8 4. "CGCE,Constant Gate Control Error" "B_0x0,B_0x1" rbitfld.long 0x8 3. "HLBS,Head-Of-Line Blocking due to Scheduling" "B_0x0,B_0x1" rbitfld.long 0x8 2. "HLBF,Head-Of-Line Blocking due to Frame Size" "0,1" newline bitfld.long 0x8 1. "BTRE,BTR Error" "B_0x0,B_0x1" bitfld.long 0x8 0. "SWLC,Switch to S/W owned list Complete" "B_0x0,B_0x1" group.long 0xC60++0x7 line.long 0x0 "ETH_MTLESTSCHER,EST Schedule Error register" hexmask.long.byte 0x0 0.--3. 1. "SEQN,Schedule Error Queue Number" line.long 0x4 "ETH_MTLESTFSER,EST Frame size Error register" hexmask.long.byte 0x4 0.--3. 1. "FEQN,Frame Size Error Queue Number" rgroup.long 0xC68++0x3 line.long 0x0 "ETH_MTLESTFSCR,EST Frame size Capture register" bitfld.long 0x0 16.--17. "HBFQ,Queue Number of HLBF" "0,1,2,3" hexmask.long.word 0x0 0.--14. 1. "HBFS,Frame Size of HLBF" group.long 0xC70++0x3 line.long 0x0 "ETH_MTLESTIER,EST Interrupt Enable register" bitfld.long 0x0 4. "CGCE,Interrupt Enable for CGCE" "0,1" bitfld.long 0x0 3. "IEHS,Interrupt Enable for HLBS" "0,1" bitfld.long 0x0 2. "IEHF,Interrupt Enable for HLBF" "0,1" newline bitfld.long 0x0 1. "IEBE,Interrupt Enable for BTR Error" "0,1" bitfld.long 0x0 0. "IECC,Interrupt Enable for Switch List" "0,1" group.long 0xC80++0x7 line.long 0x0 "ETH_MTLESTGCLCR,EST Gate Control List register" hexmask.long.byte 0x0 8.--13. 1. "ADDR,Gate Control List Address:" bitfld.long 0x0 5. "DBGB,Debug Mode Bank Select" "B_0x0,B_0x1" bitfld.long 0x0 4. "DBGM,Debug Mode" "0,1" newline bitfld.long 0x0 2. "GCRR,Gate Control Related registers" "0,1" bitfld.long 0x0 1. "R1W0,Read 1 Write 0" "B_0x0,B_0x1" bitfld.long 0x0 0. "SRWO,Start Read/Write Operation" "?,B_0x1" line.long 0x4 "ETH_MTLESTGCLDR,EST Gate Control List Data register" hexmask.long 0x4 0.--31. 1. "GCD,Gate Control Data" group.long 0xC90++0x7 line.long 0x0 "ETH_MTLFPECSR,FPE Frame Preemption Control Status register" bitfld.long 0x0 28. "HRS,Hold/Release Status" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--11. 1. "PEC,Preemption Classification" bitfld.long 0x0 7. "LBHT,Level-based Hold Transition" "0,1" newline bitfld.long 0x0 0.--1. "AFSZ,Additional Fragment Size" "0,1,2,3" line.long 0x4 "ETH_MTLFPEAR,FPE Frame Preemption Advance register" hexmask.long.word 0x4 16.--31. 1. "RADV,Release Advance" hexmask.long.word 0x4 0.--15. 1. "HADV,Hold Advance" group.long 0xD00++0x7 line.long 0x0 "ETH_MTLTXQ0OMR,T0 queue 0 operating mode register" hexmask.long.byte 0x0 16.--20. 1. "TQS,Transmit queue size" bitfld.long 0x0 4.--6. "TTC,Transmit Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 2.--3. "TXQEN,Transmit Queue Enable" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 1. "TSF,Transmit Store and Forward" "0,1" bitfld.long 0x0 0. "FTQ,Flush Transmit Queue" "0,1" line.long 0x4 "ETH_MTLTXQ0UR,T0 queue 0 underflow register" bitfld.long 0x4 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter" "0,1" hexmask.long.word 0x4 0.--10. 1. "UFFRMCNT,Underflow Packet Counter" rgroup.long 0xD08++0x3 line.long 0x0 "ETH_MTLTXQ0DR,T0 queue 0 debug register" bitfld.long 0x0 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--18. "PTXQ,Number of Packets in the Transmit Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status" "0,1" newline bitfld.long 0x0 4. "TXQSTS,MTL Tx Queue Not Empty Status" "0,1" bitfld.long 0x0 3. "TWCSTS,MTL Tx Queue Write Controller Status" "0,1" bitfld.long 0x0 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "TXQPAUSED,Transmit Queue in Pause" "0,1" rgroup.long 0xD14++0x3 line.long 0x0 "ETH_MTLTXQ0ESR,T0 queue 0 ETS status register" hexmask.long.tbyte 0x0 0.--23. 1. "ABS,Average Bits per Slot" group.long 0xD18++0x3 line.long 0x0 "ETH_MTLTXQ0QWR,T0 queue 0 quantum weight register" hexmask.long.word 0x0 0.--13. 1. "ISCQW,IdleSlopeCredit or Weights" group.long 0xD2C++0xB line.long 0x0 "ETH_MTLQ0ICSR,Queue 0 interrupt control status register" bitfld.long 0x0 24. "RXOIE,Receive Queue Overflow Interrupt Enable" "0,1" bitfld.long 0x0 16. "RXOVFIS,Receive Queue Overflow Interrupt Status" "0,1" bitfld.long 0x0 9. "ABPSIE,Average Bits Per Slot Interrupt Enable" "0,1" newline bitfld.long 0x0 8. "TXUIE,Transmit Queue Underflow Interrupt Enable" "0,1" bitfld.long 0x0 1. "ABPSIS,Average Bits Per Slot Interrupt Status" "0,1" bitfld.long 0x0 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status" "0,1" line.long 0x4 "ETH_MTLRXQ0OMR,R0 queue 0 operating mode register" hexmask.long.byte 0x4 20.--23. 1. "RQS,Receive Queue Size" bitfld.long 0x4 14.--16. "RFD,Threshold for Deactivating Flow Control (in Half-duplex and Full-duplex modes)" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 8.--10. "RFA,Threshold for Activating Flow Control (in Half-duplex and Full-duplex)" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 7. "EHFC,Enable Hardware Flow Control" "0,1" bitfld.long 0x4 6. "DIS_TCP_EF,Disable Dropping of TCP/IP Checksum Error Packets" "0,1" bitfld.long 0x4 5. "RSF,Receive Queue Store and Forward" "0,1" newline bitfld.long 0x4 4. "FEP,Forward Error Packets" "0,1" bitfld.long 0x4 3. "FUP,Forward Undersized Good Packets" "0,1" bitfld.long 0x4 0.--1. "RTC,Receive Queue Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "ETH_MTLRXQ0MPOCR,R0 queue 0 missed packet and overflow counter register" bitfld.long 0x8 27. "MISCNTOVF,Missed Packet Counter Overflow Bit" "0,1" hexmask.long.word 0x8 16.--26. 1. "MISPKTCNT,Missed Packet Counter" bitfld.long 0x8 11. "OVFCNTOVF,Overflow Counter Overflow Bit" "0,1" newline hexmask.long.word 0x8 0.--10. 1. "OVFPKTCNT,Overflow Packet Counter" rgroup.long 0xD38++0x3 line.long 0x0 "ETH_MTLRXQ0DR,R0 queue 0 debug register" hexmask.long.word 0x0 16.--29. 1. "PRXQ,Number of Packets in Receive Queue" bitfld.long 0x0 4.--5. "RXQSTS,MTL Rx Queue Fill-Level Status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "RRCSTS,MTL Rx Queue Read Controller State" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "RWCSTS,MTL Rx Queue Write Controller Active Status" "0,1" group.long 0xD3C++0xB line.long 0x0 "ETH_MTLRXQ0CR,R0 queue 0 control register" bitfld.long 0x0 3. "RXQ_FRM_ARBIT,Receive Queue Packet Arbitration" "0,1" bitfld.long 0x0 0.--2. "RXQ_WEGT,Receive Queue Weight" "0,1,2,3,4,5,6,7" line.long 0x4 "ETH_MTLTXQ1OMR,T1 queue 1 operating mode register" hexmask.long.byte 0x4 16.--20. 1. "TQS,Transmit queue size" bitfld.long 0x4 4.--6. "TTC,Transmit Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 2.--3. "TXQEN,Transmit Queue Enable" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 1. "TSF,Transmit Store and Forward" "0,1" bitfld.long 0x4 0. "FTQ,Flush Transmit Queue" "0,1" line.long 0x8 "ETH_MTLTXQ1UR,T1 queue 1 underflow register" bitfld.long 0x8 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter" "0,1" hexmask.long.word 0x8 0.--10. 1. "UFFRMCNT,Underflow Packet Counter" rgroup.long 0xD48++0x3 line.long 0x0 "ETH_MTLTXQ1DR,T1 queue 1 debug register" bitfld.long 0x0 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--18. "PTXQ,Number of Packets in the Transmit Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status" "0,1" newline bitfld.long 0x0 4. "TXQSTS,MTL Tx Queue Not Empty Status" "0,1" bitfld.long 0x0 3. "TWCSTS,MTL Tx Queue Write Controller Status" "0,1" bitfld.long 0x0 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "TXQPAUSED,Transmit Queue in Pause" "0,1" group.long 0xD50++0x3 line.long 0x0 "ETH_MTLTXQ1ECR,T1 queue 1 ETS control register" bitfld.long 0x0 4.--6. "SLC,Slot Count" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 3. "CC,Credit Control" "0,1" bitfld.long 0x0 2. "AVALG,AV Algorithm" "0,1" rgroup.long 0xD54++0x3 line.long 0x0 "ETH_MTLTXQ1ESR,T1 queue 1 ETS status register" hexmask.long.tbyte 0x0 0.--23. 1. "ABS,Average Bits per Slot" group.long 0xD58++0xF line.long 0x0 "ETH_MTLTXQ1QWR,T1 queue 1 quantum weight register" hexmask.long.word 0x0 0.--13. 1. "ISCQW,IdleSlopeCredit or Weights" line.long 0x4 "ETH_MTLTXQ1SSCR,T1 queue 1 send slope credit register" hexmask.long.word 0x4 0.--13. 1. "SSC,sendSlopeCredit Value" line.long 0x8 "ETH_MTLTXQ1HCR,T1 Queue 1 hiCredit register" hexmask.long 0x8 0.--28. 1. "HC,hiCredit Value" line.long 0xC "ETH_MTLTXQ1LCR,T1 queue 1 loCredit register" hexmask.long 0xC 0.--28. 1. "LC,loCredit Value" group.long 0xD6C++0xB line.long 0x0 "ETH_MTLQ1ICSR,Queue 1 interrupt control status register" bitfld.long 0x0 24. "RXOIE,Receive Queue Overflow Interrupt Enable" "0,1" bitfld.long 0x0 16. "RXOVFIS,Receive Queue Overflow Interrupt Status" "0,1" bitfld.long 0x0 9. "ABPSIE,Average Bits Per Slot Interrupt Enable" "0,1" newline bitfld.long 0x0 8. "TXUIE,Transmit Queue Underflow Interrupt Enable" "0,1" bitfld.long 0x0 1. "ABPSIS,Average Bits Per Slot Interrupt Status" "0,1" bitfld.long 0x0 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status" "0,1" line.long 0x4 "ETH_MTLRXQ1OMR,R1 queue 1 operating mode register" hexmask.long.byte 0x4 20.--23. 1. "RQS,Receive Queue Size" bitfld.long 0x4 14.--16. "RFD,Threshold for Deactivating Flow Control (in Half-duplex and Full-duplex modes)" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 8.--10. "RFA,Threshold for Activating Flow Control (in Half-duplex and Full-duplex)" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 7. "EHFC,Enable Hardware Flow Control" "0,1" bitfld.long 0x4 6. "DIS_TCP_EF,Disable Dropping of TCP/IP Checksum Error Packets" "0,1" bitfld.long 0x4 5. "RSF,Receive Queue Store and Forward" "0,1" newline bitfld.long 0x4 4. "FEP,Forward Error Packets" "0,1" bitfld.long 0x4 3. "FUP,Forward Undersized Good Packets" "0,1" bitfld.long 0x4 0.--1. "RTC,Receive Queue Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "ETH_MTLRXQ1MPOCR,R1 queue 1 missed packet and overflow counter register" bitfld.long 0x8 27. "MISCNTOVF,Missed Packet Counter Overflow Bit" "0,1" hexmask.long.word 0x8 16.--26. 1. "MISPKTCNT,Missed Packet Counter" bitfld.long 0x8 11. "OVFCNTOVF,Overflow Counter Overflow Bit" "0,1" newline hexmask.long.word 0x8 0.--10. 1. "OVFPKTCNT,Overflow Packet Counter" rgroup.long 0xD78++0x3 line.long 0x0 "ETH_MTLRXQ1DR,R1 queue 1 debug register" hexmask.long.word 0x0 16.--29. 1. "PRXQ,Number of Packets in Receive Queue" bitfld.long 0x0 4.--5. "RXQSTS,MTL Rx Queue Fill-Level Status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "RRCSTS,MTL Rx Queue Read Controller State" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "RWCSTS,MTL Rx Queue Write Controller Active Status" "0,1" group.long 0xD7C++0xB line.long 0x0 "ETH_MTLRXQ1CR,R1 queue 1 control register" bitfld.long 0x0 3. "RXQ_FRM_ARBIT,Receive Queue Packet Arbitration" "0,1" bitfld.long 0x0 0.--2. "RXQ_WEGT,Receive Queue Weight" "0,1,2,3,4,5,6,7" line.long 0x4 "ETH_MTLTXQ2OMR,T2 queue 2 operating mode register" hexmask.long.byte 0x4 16.--20. 1. "TQS,Transmit queue size" bitfld.long 0x4 4.--6. "TTC,Transmit Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 2.--3. "TXQEN,Transmit Queue Enable" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 1. "TSF,Transmit Store and Forward" "0,1" bitfld.long 0x4 0. "FTQ,Flush Transmit Queue" "0,1" line.long 0x8 "ETH_MTLTXQ2UR,T2 queue 2 underflow register" bitfld.long 0x8 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter" "0,1" hexmask.long.word 0x8 0.--10. 1. "UFFRMCNT,Underflow Packet Counter" rgroup.long 0xD88++0x3 line.long 0x0 "ETH_MTLTXQ2DR,T2 queue 2 debug register" bitfld.long 0x0 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--18. "PTXQ,Number of Packets in the Transmit Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status" "0,1" newline bitfld.long 0x0 4. "TXQSTS,MTL Tx Queue Not Empty Status" "0,1" bitfld.long 0x0 3. "TWCSTS,MTL Tx Queue Write Controller Status" "0,1" bitfld.long 0x0 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "TXQPAUSED,Transmit Queue in Pause" "0,1" group.long 0xD90++0x3 line.long 0x0 "ETH_MTLTXQ2ECR,T2 queue 2 ETS control register" bitfld.long 0x0 4.--6. "SLC,Slot Count" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 3. "CC,Credit Control" "0,1" bitfld.long 0x0 2. "AVALG,AV Algorithm" "0,1" rgroup.long 0xD94++0x3 line.long 0x0 "ETH_MTLTXQ2ESR,T2 queue 2 ETS status register" hexmask.long.tbyte 0x0 0.--23. 1. "ABS,Average Bits per Slot" group.long 0xD98++0xF line.long 0x0 "ETH_MTLTXQ2QWR,T2 queue 2 quantum weight register" hexmask.long.word 0x0 0.--13. 1. "ISCQW,IdleSlopeCredit or Weights" line.long 0x4 "ETH_MTLTXQ2SSCR,T2 queue 2 send slope credit register" hexmask.long.word 0x4 0.--13. 1. "SSC,sendSlopeCredit Value" line.long 0x8 "ETH_MTLTXQ2HCR,T2 Queue 2 hiCredit register" hexmask.long 0x8 0.--28. 1. "HC,hiCredit Value" line.long 0xC "ETH_MTLTXQ2LCR,T2 queue 2 loCredit register" hexmask.long 0xC 0.--28. 1. "LC,loCredit Value" group.long 0xDAC++0x3 line.long 0x0 "ETH_MTLQ2ICSR,Queue 2 interrupt control status register" bitfld.long 0x0 24. "RXOIE,Receive Queue Overflow Interrupt Enable" "0,1" bitfld.long 0x0 16. "RXOVFIS,Receive Queue Overflow Interrupt Status" "0,1" bitfld.long 0x0 9. "ABPSIE,Average Bits Per Slot Interrupt Enable" "0,1" newline bitfld.long 0x0 8. "TXUIE,Transmit Queue Underflow Interrupt Enable" "0,1" bitfld.long 0x0 1. "ABPSIS,Average Bits Per Slot Interrupt Status" "0,1" bitfld.long 0x0 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status" "0,1" group.long 0xDC0++0x7 line.long 0x0 "ETH_MTLTXQ3OMR,T3 queue 3 operating mode register" hexmask.long.byte 0x0 16.--20. 1. "TQS,Transmit queue size" bitfld.long 0x0 4.--6. "TTC,Transmit Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 2.--3. "TXQEN,Transmit Queue Enable" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 1. "TSF,Transmit Store and Forward" "0,1" bitfld.long 0x0 0. "FTQ,Flush Transmit Queue" "0,1" line.long 0x4 "ETH_MTLTXQ3UR,T3 queue 3 underflow register" bitfld.long 0x4 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter" "0,1" hexmask.long.word 0x4 0.--10. 1. "UFFRMCNT,Underflow Packet Counter" rgroup.long 0xDC8++0x3 line.long 0x0 "ETH_MTLTXQ3DR,T3 queue 3 debug register" bitfld.long 0x0 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--18. "PTXQ,Number of Packets in the Transmit Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status" "0,1" newline bitfld.long 0x0 4. "TXQSTS,MTL Tx Queue Not Empty Status" "0,1" bitfld.long 0x0 3. "TWCSTS,MTL Tx Queue Write Controller Status" "0,1" bitfld.long 0x0 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "TXQPAUSED,Transmit Queue in Pause" "0,1" group.long 0xDD0++0x3 line.long 0x0 "ETH_MTLTXQ3ECR,T3 queue 3 ETS control register" bitfld.long 0x0 4.--6. "SLC,Slot Count" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 3. "CC,Credit Control" "0,1" bitfld.long 0x0 2. "AVALG,AV Algorithm" "0,1" rgroup.long 0xDD4++0x3 line.long 0x0 "ETH_MTLTXQ3ESR,T3 queue 3 ETS status register" hexmask.long.tbyte 0x0 0.--23. 1. "ABS,Average Bits per Slot" group.long 0xDD8++0xF line.long 0x0 "ETH_MTLTXQ3QWR,T3 queue 3 quantum weight register" hexmask.long.word 0x0 0.--13. 1. "ISCQW,IdleSlopeCredit or Weights" line.long 0x4 "ETH_MTLTXQ3SSCR,T3 queue 3 send slope credit register" hexmask.long.word 0x4 0.--13. 1. "SSC,sendSlopeCredit Value" line.long 0x8 "ETH_MTLTXQ3HCR,T3 Queue 3 hiCredit register" hexmask.long 0x8 0.--28. 1. "HC,hiCredit Value" line.long 0xC "ETH_MTLTXQ3LCR,T3 queue 3 loCredit register" hexmask.long 0xC 0.--28. 1. "LC,loCredit Value" group.long 0xDEC++0x3 line.long 0x0 "ETH_MTLQ3ICSR,Queue 3 interrupt control status register" bitfld.long 0x0 24. "RXOIE,Receive Queue Overflow Interrupt Enable" "0,1" bitfld.long 0x0 16. "RXOVFIS,Receive Queue Overflow Interrupt Status" "0,1" bitfld.long 0x0 9. "ABPSIE,Average Bits Per Slot Interrupt Enable" "0,1" newline bitfld.long 0x0 8. "TXUIE,Transmit Queue Underflow Interrupt Enable" "0,1" bitfld.long 0x0 1. "ABPSIS,Average Bits Per Slot Interrupt Status" "0,1" bitfld.long 0x0 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status" "0,1" group.long 0x1000++0x7 line.long 0x0 "ETH_DMAMR,DMA mode register" bitfld.long 0x0 16.--17. "INTM,Interrupt Mode" "0,1,2,3" bitfld.long 0x0 11. "TXPR,Transmit priority" "0,1" bitfld.long 0x0 8. "DSPW,Descriptor Posted Write" "B_0x0,B_0x1" newline rbitfld.long 0x0 4. "TAA2,Transmit Arbitration Algorithm" "B_0x0,B_0x1" rbitfld.long 0x0 3. "TAA1,Transmit Arbitration Algorithm" "B_0x0,B_0x1" rbitfld.long 0x0 2. "TAA0,Transmit Arbitration Algorithm" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "SWR,Software Reset" "0,1" line.long 0x4 "ETH_DMASBMR,System bus mode register" bitfld.long 0x4 31. "EN_LPI,Enable Low Power Interface (LPI)" "0,1" bitfld.long 0x4 30. "LPI_XIT_PKT,Unlock on Magic Packet or Remote wake-up Packet" "0,1" bitfld.long 0x4 24.--25. "WR_OSR_LMT,AXI Maximum Write Outstanding Request Limit" "0,1,2,3" newline bitfld.long 0x4 16.--17. "RD_OSR_LMT,AXI Maximum Read Outstanding Request Limit" "0,1,2,3" bitfld.long 0x4 13. "ONEKBBE,1 Kbyte Boundary Crossing Enable for the AXI Master" "0,1" bitfld.long 0x4 12. "AAL,Address-Aligned Beats" "0,1" newline bitfld.long 0x4 10. "AALE,Automatic AXI LPI enable" "0,1" bitfld.long 0x4 7. "BLEN256,AXI Burst Length 256" "0,1" bitfld.long 0x4 6. "BLEN128,AXI Burst Length 128" "0,1" newline bitfld.long 0x4 5. "BLEN64,AXI Burst Length 64" "0,1" bitfld.long 0x4 4. "BLEN32,AXI Burst Length 32" "0,1" bitfld.long 0x4 3. "BLEN16,AXI Burst Length 16" "0,1" newline bitfld.long 0x4 2. "BLEN8,AXI Burst Length 8" "0,1" bitfld.long 0x4 1. "BLEN4,AXI Burst Length 4" "0,1" bitfld.long 0x4 0. "FB,Fixed Burst Length" "0,1" rgroup.long 0x1008++0xB line.long 0x0 "ETH_DMAISR,Interrupt status register" bitfld.long 0x0 17. "MACIS,MAC Interrupt Status" "0,1" bitfld.long 0x0 16. "MTLIS,MTL Interrupt Status" "0,1" bitfld.long 0x0 3. "DC3IS,DMA Channel 3 Interrupt Status" "0,1" newline bitfld.long 0x0 2. "DC2IS,DMA Channel 2 Interrupt Status" "0,1" bitfld.long 0x0 1. "DC1IS,DMA Channel 1 Interrupt Status" "0,1" bitfld.long 0x0 0. "DC0IS,DMA Channel Interrupt Status" "0,1" line.long 0x4 "ETH_DMADS1R,Debug status 1 register" hexmask.long.byte 0x4 28.--31. 1. "TPS2,DMA Channel 2 Transmit Process State" hexmask.long.byte 0x4 20.--23. 1. "TPS1,DMA Channel 1 Transmit Process State" hexmask.long.byte 0x4 16.--19. 1. "RPS1,DMA Channel 1 Receive Process State" newline hexmask.long.byte 0x4 12.--15. 1. "TPS0,DMA Channel Transmit Process State" hexmask.long.byte 0x4 8.--11. 1. "RPS0,DMA Channel Receive Process State" bitfld.long 0x4 1. "AXRHSTS,AXI Master Read Channel Status" "0,1" newline bitfld.long 0x4 0. "AXWHSTS,AXI Master Write Channel" "0,1" line.long 0x8 "ETH_DMADS2R,Debug status 2 register" hexmask.long.byte 0x8 4.--7. 1. "TPS3,DMA Channel 3 Transmit Process State" group.long 0x1020++0xB line.long 0x0 "ETH_DMAA4TXACR,AXI4 transmit channel ACE control register" hexmask.long.byte 0x0 16.--19. 1. "THC,Transmit DMA First Packet Buffer or TSO Header Cache Control" hexmask.long.byte 0x0 8.--11. 1. "TEC,Transmit DMA Extended Packet Buffer or TSO Payload Cache Control" hexmask.long.byte 0x0 0.--3. 1. "TDRC,Transmit DMA Read Descriptor Cache Control" line.long 0x4 "ETH_DMAA4RXACR,AXI4 receive channel ACE control register" hexmask.long.byte 0x4 24.--27. 1. "RDC,Receive DMA Buffer Cache Control" hexmask.long.byte 0x4 16.--19. 1. "RHC,Receive DMA Header Cache Control" hexmask.long.byte 0x4 8.--11. 1. "RPC,Receive DMA Payload Cache Control" newline hexmask.long.byte 0x4 0.--3. 1. "RDWC,Receive DMA Write Descriptor Cache Control" line.long 0x8 "ETH_DMAA4DACR,AXI4 descriptor ACE control register" hexmask.long.byte 0x8 8.--11. 1. "RDRC,Receive DMA Read Descriptor Cache control" bitfld.long 0x8 4.--5. "TDWD,Transmit DMA Write Descriptor Domain control" "0,1,2,3" hexmask.long.byte 0x8 0.--3. 1. "TDWC,Transmit DMA Write Descriptor Cache control" group.long 0x1040++0x3 line.long 0x0 "ETH_DMALPIEI,AXI4 LPI Entry Interval register" hexmask.long.byte 0x0 0.--3. 1. "LPIEI,LPI Entry Interval" group.long 0x1050++0x3 line.long 0x0 "ETH_DMATBSCTRL0R,DMA TBS control register 0" hexmask.long.tbyte 0x0 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0x0 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" group.long 0x1050++0xF line.long 0x0 "ETH_DMATBSCTRL0R_ALTERNATE1,DMA TBS control register 0" hexmask.long.tbyte 0x0 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0x0 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" line.long 0x4 "ETH_DMATBSCTRL1R,DMA TBS control register 1" hexmask.long.tbyte 0x4 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0x4 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" line.long 0x8 "ETH_DMATBSCTRL2R,DMA TBS control register 2" hexmask.long.tbyte 0x8 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0x8 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" line.long 0xC "ETH_DMATBSCTRL3R,DMA TBS control register 3" hexmask.long.tbyte 0xC 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0xC 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" group.long 0x1100++0xB line.long 0x0 "ETH_DMAC0CR,Channel 0 control register" bitfld.long 0x0 18.--20. "DSL,Descriptor Skip Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "PBLX8,8xPBL mode" "0,1" hexmask.long.word 0x0 0.--13. 1. "MSS,Maximum Segment Size" line.long 0x4 "ETH_DMAC0TXCR,Channel 0 transmit control register" bitfld.long 0x4 30. "TFSEL1,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 29. "TFSEL0,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 28. "EDSE,Enhanced Descriptor Enable" "0,1" newline hexmask.long.byte 0x4 24.--27. 1. "TQOS,Transmit QOS" hexmask.long.byte 0x4 16.--21. 1. "TXPBL,Transmit Programmable Burst Length" bitfld.long 0x4 15. "IPBL,Ignore PBL Requirement" "0,1" newline bitfld.long 0x4 12. "TSE,TCP Segmentation Enabled" "0,1" bitfld.long 0x4 4. "OSF,Operate on Second Packet" "0,1" rbitfld.long 0x4 1.--3. "TCW,Transmit Channel Weight" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0. "ST,Start or Stop Transmission Command" "0,1" line.long 0x8 "ETH_DMAC0RXCR,Channel 0 receive control register" bitfld.long 0x8 31. "RPF,DMA Rx Channel x Packet Flush" "0,1" hexmask.long.byte 0x8 24.--27. 1. "RQOS,Rx AXI4 QOS." hexmask.long.byte 0x8 16.--21. 1. "RXPBL,Receive Programmable Burst Length" newline hexmask.long.word 0x8 1.--14. 1. "RBSZ,Receive Buffer size" bitfld.long 0x8 0. "SR,Start or Stop Receive" "0,1" group.long 0x1114++0x3 line.long 0x0 "ETH_DMAC0TXDLAR,Channel 0 T0 descriptor list address register" hexmask.long 0x0 0.--31. 1. "TDESLA,Start of Transmit List" group.long 0x111C++0x7 line.long 0x0 "ETH_DMAC0RXDLAR,Channel 0 R0 descriptor list address register" hexmask.long 0x0 0.--31. 1. "RDESLA,Start of Receive List" line.long 0x4 "ETH_DMAC0TXDTPR,Channel 0 T0 descriptor tail pointer register" hexmask.long 0x4 0.--31. 1. "TDT,Transmit Descriptor Tail Pointer" group.long 0x1128++0x17 line.long 0x0 "ETH_DMAC0RXDTPR,Channel 0 R0 descriptor tail pointer register" hexmask.long 0x0 0.--31. 1. "RDT,Receive Descriptor Tail Pointer" line.long 0x4 "ETH_DMAC0TXRLR,Channel 0 T0 descriptor ring length register" hexmask.long.word 0x4 0.--9. 1. "TDRL,Transmit Descriptor Ring Length" line.long 0x8 "ETH_DMAC0RXRLR,Channel 0 R0 descriptor ring length register" hexmask.long.byte 0x8 17.--23. 1. "ARBS,Alternate Receive Buffer Size" hexmask.long.word 0x8 0.--9. 1. "RDRL,Receive Descriptor Ring Length" line.long 0xC "ETH_DMAC0IER,Channel 0 interrupt enable register" bitfld.long 0xC 15. "NIE,Normal Interrupt Summary Enable" "0,1" bitfld.long 0xC 14. "AIE,Abnormal Interrupt Summary Enable" "0,1" bitfld.long 0xC 13. "CDEE,Context Descriptor Error Enable" "0,1" newline bitfld.long 0xC 12. "FBEE,Fatal Bus Error Enable" "0,1" bitfld.long 0xC 11. "ERIE,Early Receive Interrupt Enable" "0,1" bitfld.long 0xC 10. "ETIE,Early Transmit Interrupt Enable" "0,1" newline bitfld.long 0xC 9. "RWTE,Receive Watchdog Timeout Enable" "0,1" bitfld.long 0xC 8. "RSE,Receive Stopped Enable" "0,1" bitfld.long 0xC 7. "RBUE,Receive Buffer Unavailable Enable" "0,1" newline bitfld.long 0xC 6. "RIE,Receive Interrupt Enable" "0,1" bitfld.long 0xC 2. "TBUE,Transmit Buffer Unavailable Enable" "0,1" bitfld.long 0xC 1. "TXSE,Transmit Stopped Enable" "0,1" newline bitfld.long 0xC 0. "TIE,Transmit Interrupt Enable" "0,1" line.long 0x10 "ETH_DMAC0RXIWTR,Channel 0 R0 interrupt watchdog timer register" bitfld.long 0x10 16.--17. "RWTU,Receive Interrupt Watchdog Timer Count Units" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x10 0.--7. 1. "RWT,Receive Interrupt Watchdog Timer Count" line.long 0x14 "ETH_DMAC0SFCSR,Channel 0 slot function control status register" hexmask.long.byte 0x14 16.--19. 1. "RSN,Reference Slot Number" hexmask.long.word 0x14 4.--15. 1. "SIV,Slot Interval Value" bitfld.long 0x14 1. "ASC,Advance Slot Check" "0,1" newline bitfld.long 0x14 0. "ESC,Enable Slot Comparison" "0,1" rgroup.long 0x1144++0x3 line.long 0x0 "ETH_DMAC0CATXDR,Channel 0 current application transmit descriptor register" hexmask.long 0x0 0.--31. 1. "CURTDESAPTR,Application Transmit Descriptor Address Pointer" rgroup.long 0x114C++0x3 line.long 0x0 "ETH_DMAC0CARXDR,Channel 0 current application receive descriptor register" hexmask.long 0x0 0.--31. 1. "CURRDESAPTR,Application Receive Descriptor Address Pointer" rgroup.long 0x1154++0x3 line.long 0x0 "ETH_DMAC0CATXBR,Channel 0 current application transmit buffer register" hexmask.long 0x0 0.--31. 1. "CURTBUFAPTR,Application Transmit Buffer Address Pointer" rgroup.long 0x115C++0x3 line.long 0x0 "ETH_DMAC0CARXBR,Channel 0 current application receive buffer register" hexmask.long 0x0 0.--31. 1. "CURRBUFAPTR,Application Receive Buffer Address Pointer" group.long 0x1160++0x7 line.long 0x0 "ETH_DMAC0SR,Channel 0 status register" rbitfld.long 0x0 19.--21. "REB,Rx DMA Error Bits" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 16.--18. "TEB,Tx DMA Error Bits" "0,1,2,3,4,5,6,7" bitfld.long 0x0 15. "NIS,Normal Interrupt Summary" "0,1" newline bitfld.long 0x0 14. "AIS,Abnormal Interrupt Summary" "0,1" bitfld.long 0x0 13. "CDE,Context Descriptor Error" "0,1" bitfld.long 0x0 12. "FBE,Fatal Bus Error" "0,1" newline bitfld.long 0x0 11. "ERI,Early Receive Interrupt" "0,1" bitfld.long 0x0 10. "ETI,Early Transmit Interrupt" "0,1" bitfld.long 0x0 9. "RWT,Receive Watchdog Timeout" "0,1" newline bitfld.long 0x0 8. "RPS,Receive Process Stopped" "0,1" bitfld.long 0x0 7. "RBU,Receive Buffer Unavailable" "0,1" bitfld.long 0x0 6. "RI,Receive Interrupt" "0,1" newline bitfld.long 0x0 2. "TBU,Transmit Buffer Unavailable" "0,1" bitfld.long 0x0 1. "TPS,Transmit Process Stopped" "0,1" bitfld.long 0x0 0. "TI,Transmit Interrupt" "0,1" line.long 0x4 "ETH_DMAC0MFCR,Channel 0 missed frame count register" bitfld.long 0x4 15. "MFCO,Overflow status of the MFC Counter" "0,1" hexmask.long.word 0x4 0.--10. 1. "MFC,Dropped Packet Counters" group.long 0x1180++0xB line.long 0x0 "ETH_DMAC1CR,Channel 1 control register" bitfld.long 0x0 18.--20. "DSL,Descriptor Skip Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "PBLX8,8xPBL mode" "0,1" hexmask.long.word 0x0 0.--13. 1. "MSS,Maximum Segment Size" line.long 0x4 "ETH_DMAC1TXCR,Channel 1 transmit control register" bitfld.long 0x4 30. "TFSEL1,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 29. "TFSEL0,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 28. "EDSE,Enhanced Descriptor Enable" "0,1" newline hexmask.long.byte 0x4 24.--27. 1. "TQOS,Transmit QOS" hexmask.long.byte 0x4 16.--21. 1. "TXPBL,Transmit Programmable Burst Length" bitfld.long 0x4 15. "IPBL,Ignore PBL Requirement" "0,1" newline bitfld.long 0x4 12. "TSE,TCP Segmentation Enabled" "0,1" bitfld.long 0x4 4. "OSF,Operate on Second Packet" "0,1" rbitfld.long 0x4 1.--3. "TCW,Transmit Channel Weight" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0. "ST,Start or Stop Transmission Command" "0,1" line.long 0x8 "ETH_DMAC1RXCR,Channel 1 receive control register" bitfld.long 0x8 31. "RPF,DMA Rx Channel x Packet Flush" "0,1" hexmask.long.byte 0x8 24.--27. 1. "RQOS,Rx AXI4 QOS." hexmask.long.byte 0x8 16.--21. 1. "RXPBL,Receive Programmable Burst Length" newline hexmask.long.word 0x8 1.--14. 1. "RBSZ,Receive Buffer size" bitfld.long 0x8 0. "SR,Start or Stop Receive" "0,1" group.long 0x1194++0x3 line.long 0x0 "ETH_DMAC1TXDLAR,Channel 1 T1 descriptor list address register" hexmask.long 0x0 0.--31. 1. "TDESLA,Start of Transmit List" group.long 0x119C++0x7 line.long 0x0 "ETH_DMAC1RXDLAR,Channel 1 R1 descriptor list address register" hexmask.long 0x0 0.--31. 1. "RDESLA,Start of Receive List" line.long 0x4 "ETH_DMAC1TXDTPR,Channel 1 T1 descriptor tail pointer register" hexmask.long 0x4 0.--31. 1. "TDT,Transmit Descriptor Tail Pointer" group.long 0x11A8++0x17 line.long 0x0 "ETH_DMAC1RXDTPR,Channel 1 R1 descriptor tail pointer register" hexmask.long 0x0 0.--31. 1. "RDT,Receive Descriptor Tail Pointer" line.long 0x4 "ETH_DMAC1TXRLR,Channel 1 T1 descriptor ring length register" hexmask.long.word 0x4 0.--9. 1. "TDRL,Transmit Descriptor Ring Length" line.long 0x8 "ETH_DMAC1RXRLR,Channel 1 R1 descriptor ring length register" hexmask.long.byte 0x8 17.--23. 1. "ARBS,Alternate Receive Buffer Size" hexmask.long.word 0x8 0.--9. 1. "RDRL,Receive Descriptor Ring Length" line.long 0xC "ETH_DMAC1IER,Channel 1 interrupt enable register" bitfld.long 0xC 15. "NIE,Normal Interrupt Summary Enable" "0,1" bitfld.long 0xC 14. "AIE,Abnormal Interrupt Summary Enable" "0,1" bitfld.long 0xC 13. "CDEE,Context Descriptor Error Enable" "0,1" newline bitfld.long 0xC 12. "FBEE,Fatal Bus Error Enable" "0,1" bitfld.long 0xC 11. "ERIE,Early Receive Interrupt Enable" "0,1" bitfld.long 0xC 10. "ETIE,Early Transmit Interrupt Enable" "0,1" newline bitfld.long 0xC 9. "RWTE,Receive Watchdog Timeout Enable" "0,1" bitfld.long 0xC 8. "RSE,Receive Stopped Enable" "0,1" bitfld.long 0xC 7. "RBUE,Receive Buffer Unavailable Enable" "0,1" newline bitfld.long 0xC 6. "RIE,Receive Interrupt Enable" "0,1" bitfld.long 0xC 2. "TBUE,Transmit Buffer Unavailable Enable" "0,1" bitfld.long 0xC 1. "TXSE,Transmit Stopped Enable" "0,1" newline bitfld.long 0xC 0. "TIE,Transmit Interrupt Enable" "0,1" line.long 0x10 "ETH_DMAC1RXIWTR,Channel 1 R1 interrupt watchdog timer register" bitfld.long 0x10 16.--17. "RWTU,Receive Interrupt Watchdog Timer Count Units" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x10 0.--7. 1. "RWT,Receive Interrupt Watchdog Timer Count" line.long 0x14 "ETH_DMAC1SFCSR,Channel 1 slot function control status register" hexmask.long.byte 0x14 16.--19. 1. "RSN,Reference Slot Number" hexmask.long.word 0x14 4.--15. 1. "SIV,Slot Interval Value" bitfld.long 0x14 1. "ASC,Advance Slot Check" "0,1" newline bitfld.long 0x14 0. "ESC,Enable Slot Comparison" "0,1" rgroup.long 0x11C4++0x3 line.long 0x0 "ETH_DMAC1CATXDR,Channel 1 current application transmit descriptor register" hexmask.long 0x0 0.--31. 1. "CURTDESAPTR,Application Transmit Descriptor Address Pointer" rgroup.long 0x11CC++0x3 line.long 0x0 "ETH_DMAC1CARXDR,Channel 1 current application receive descriptor register" hexmask.long 0x0 0.--31. 1. "CURRDESAPTR,Application Receive Descriptor Address Pointer" rgroup.long 0x11D4++0x3 line.long 0x0 "ETH_DMAC1CATXBR,Channel 1 current application transmit buffer register" hexmask.long 0x0 0.--31. 1. "CURTBUFAPTR,Application Transmit Buffer Address Pointer" rgroup.long 0x11DC++0x3 line.long 0x0 "ETH_DMAC1CARXBR,Channel 1 current application receive buffer register" hexmask.long 0x0 0.--31. 1. "CURRBUFAPTR,Application Receive Buffer Address Pointer" group.long 0x11E0++0x7 line.long 0x0 "ETH_DMAC1SR,Channel 1 status register" rbitfld.long 0x0 19.--21. "REB,Rx DMA Error Bits" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 16.--18. "TEB,Tx DMA Error Bits" "0,1,2,3,4,5,6,7" bitfld.long 0x0 15. "NIS,Normal Interrupt Summary" "0,1" newline bitfld.long 0x0 14. "AIS,Abnormal Interrupt Summary" "0,1" bitfld.long 0x0 13. "CDE,Context Descriptor Error" "0,1" bitfld.long 0x0 12. "FBE,Fatal Bus Error" "0,1" newline bitfld.long 0x0 11. "ERI,Early Receive Interrupt" "0,1" bitfld.long 0x0 10. "ETI,Early Transmit Interrupt" "0,1" bitfld.long 0x0 9. "RWT,Receive Watchdog Timeout" "0,1" newline bitfld.long 0x0 8. "RPS,Receive Process Stopped" "0,1" bitfld.long 0x0 7. "RBU,Receive Buffer Unavailable" "0,1" bitfld.long 0x0 6. "RI,Receive Interrupt" "0,1" newline bitfld.long 0x0 2. "TBU,Transmit Buffer Unavailable" "0,1" bitfld.long 0x0 1. "TPS,Transmit Process Stopped" "0,1" bitfld.long 0x0 0. "TI,Transmit Interrupt" "0,1" line.long 0x4 "ETH_DMAC1MFCR,Channel 1 missed frame count register" bitfld.long 0x4 15. "MFCO,Overflow status of the MFC Counter" "0,1" hexmask.long.word 0x4 0.--10. 1. "MFC,Dropped Packet Counters" group.long 0x1200++0x7 line.long 0x0 "ETH_DMAC2CR,Channel 2 control register" bitfld.long 0x0 18.--20. "DSL,Descriptor Skip Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "PBLX8,8xPBL mode" "0,1" hexmask.long.word 0x0 0.--13. 1. "MSS,Maximum Segment Size" line.long 0x4 "ETH_DMAC2TXCR,Channel 2 transmit control register" bitfld.long 0x4 30. "TFSEL1,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 29. "TFSEL0,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 28. "EDSE,Enhanced Descriptor Enable" "0,1" newline hexmask.long.byte 0x4 24.--27. 1. "TQOS,Transmit QOS" hexmask.long.byte 0x4 16.--21. 1. "TXPBL,Transmit Programmable Burst Length" bitfld.long 0x4 15. "IPBL,Ignore PBL Requirement" "0,1" newline bitfld.long 0x4 12. "TSE,TCP Segmentation Enabled" "0,1" bitfld.long 0x4 4. "OSF,Operate on Second Packet" "0,1" rbitfld.long 0x4 1.--3. "TCW,Transmit Channel Weight" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0. "ST,Start or Stop Transmission Command" "0,1" group.long 0x1214++0x3 line.long 0x0 "ETH_DMAC2TXDLAR,Channel 2 T2 descriptor list address register" hexmask.long 0x0 0.--31. 1. "TDESLA,Start of Transmit List" group.long 0x1220++0x3 line.long 0x0 "ETH_DMAC2TXDTPR,Channel 2 T2 descriptor tail pointer register" hexmask.long 0x0 0.--31. 1. "TDT,Transmit Descriptor Tail Pointer" group.long 0x122C++0x3 line.long 0x0 "ETH_DMAC2TXRLR,Channel 2 T2 descriptor ring length register" hexmask.long.word 0x0 0.--9. 1. "TDRL,Transmit Descriptor Ring Length" group.long 0x1234++0x3 line.long 0x0 "ETH_DMAC2IER,Channel 2 interrupt enable register" bitfld.long 0x0 15. "NIE,Normal Interrupt Summary Enable" "0,1" bitfld.long 0x0 14. "AIE,Abnormal Interrupt Summary Enable" "0,1" bitfld.long 0x0 13. "CDEE,Context Descriptor Error Enable" "0,1" newline bitfld.long 0x0 12. "FBEE,Fatal Bus Error Enable" "0,1" bitfld.long 0x0 11. "ERIE,Early Receive Interrupt Enable" "0,1" bitfld.long 0x0 10. "ETIE,Early Transmit Interrupt Enable" "0,1" newline bitfld.long 0x0 9. "RWTE,Receive Watchdog Timeout Enable" "0,1" bitfld.long 0x0 8. "RSE,Receive Stopped Enable" "0,1" bitfld.long 0x0 7. "RBUE,Receive Buffer Unavailable Enable" "0,1" newline bitfld.long 0x0 6. "RIE,Receive Interrupt Enable" "0,1" bitfld.long 0x0 2. "TBUE,Transmit Buffer Unavailable Enable" "0,1" bitfld.long 0x0 1. "TXSE,Transmit Stopped Enable" "0,1" newline bitfld.long 0x0 0. "TIE,Transmit Interrupt Enable" "0,1" group.long 0x123C++0x3 line.long 0x0 "ETH_DMAC2SFCSR,Channel 2 slot function control status register" hexmask.long.byte 0x0 16.--19. 1. "RSN,Reference Slot Number" hexmask.long.word 0x0 4.--15. 1. "SIV,Slot Interval Value" bitfld.long 0x0 1. "ASC,Advance Slot Check" "0,1" newline bitfld.long 0x0 0. "ESC,Enable Slot Comparison" "0,1" rgroup.long 0x1244++0x3 line.long 0x0 "ETH_DMAC2CATXDR,Channel 2 current application transmit descriptor register" hexmask.long 0x0 0.--31. 1. "CURTDESAPTR,Application Transmit Descriptor Address Pointer" rgroup.long 0x1254++0x3 line.long 0x0 "ETH_DMAC2CATXBR,Channel 2 current application transmit buffer register" hexmask.long 0x0 0.--31. 1. "CURTBUFAPTR,Application Transmit Buffer Address Pointer" group.long 0x1260++0x3 line.long 0x0 "ETH_DMAC2SR,Channel 2 status register" rbitfld.long 0x0 19.--21. "REB,Rx DMA Error Bits" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 16.--18. "TEB,Tx DMA Error Bits" "0,1,2,3,4,5,6,7" bitfld.long 0x0 15. "NIS,Normal Interrupt Summary" "0,1" newline bitfld.long 0x0 14. "AIS,Abnormal Interrupt Summary" "0,1" bitfld.long 0x0 13. "CDE,Context Descriptor Error" "0,1" bitfld.long 0x0 12. "FBE,Fatal Bus Error" "0,1" newline bitfld.long 0x0 11. "ERI,Early Receive Interrupt" "0,1" bitfld.long 0x0 10. "ETI,Early Transmit Interrupt" "0,1" bitfld.long 0x0 9. "RWT,Receive Watchdog Timeout" "0,1" newline bitfld.long 0x0 8. "RPS,Receive Process Stopped" "0,1" bitfld.long 0x0 7. "RBU,Receive Buffer Unavailable" "0,1" bitfld.long 0x0 6. "RI,Receive Interrupt" "0,1" newline bitfld.long 0x0 2. "TBU,Transmit Buffer Unavailable" "0,1" bitfld.long 0x0 1. "TPS,Transmit Process Stopped" "0,1" bitfld.long 0x0 0. "TI,Transmit Interrupt" "0,1" group.long 0x1280++0x7 line.long 0x0 "ETH_DMAC3CR,Channel 3 control register" bitfld.long 0x0 18.--20. "DSL,Descriptor Skip Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "PBLX8,8xPBL mode" "0,1" hexmask.long.word 0x0 0.--13. 1. "MSS,Maximum Segment Size" line.long 0x4 "ETH_DMAC3TXCR,Channel 3 transmit control register" bitfld.long 0x4 30. "TFSEL1,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 29. "TFSEL0,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 28. "EDSE,Enhanced Descriptor Enable" "0,1" newline hexmask.long.byte 0x4 24.--27. 1. "TQOS,Transmit QOS" hexmask.long.byte 0x4 16.--21. 1. "TXPBL,Transmit Programmable Burst Length" bitfld.long 0x4 15. "IPBL,Ignore PBL Requirement" "0,1" newline bitfld.long 0x4 12. "TSE,TCP Segmentation Enabled" "0,1" bitfld.long 0x4 4. "OSF,Operate on Second Packet" "0,1" rbitfld.long 0x4 1.--3. "TCW,Transmit Channel Weight" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0. "ST,Start or Stop Transmission Command" "0,1" group.long 0x1294++0x3 line.long 0x0 "ETH_DMAC3TXDLAR,Channel 3 T3 descriptor list address register" hexmask.long 0x0 0.--31. 1. "TDESLA,Start of Transmit List" group.long 0x12A0++0x3 line.long 0x0 "ETH_DMAC3TXDTPR,Channel 3 T3 descriptor tail pointer register" hexmask.long 0x0 0.--31. 1. "TDT,Transmit Descriptor Tail Pointer" group.long 0x12AC++0x3 line.long 0x0 "ETH_DMAC3TXRLR,Channel 3 T3 descriptor ring length register" hexmask.long.word 0x0 0.--9. 1. "TDRL,Transmit Descriptor Ring Length" group.long 0x12B4++0x3 line.long 0x0 "ETH_DMAC3IER,Channel 3 interrupt enable register" bitfld.long 0x0 15. "NIE,Normal Interrupt Summary Enable" "0,1" bitfld.long 0x0 14. "AIE,Abnormal Interrupt Summary Enable" "0,1" bitfld.long 0x0 13. "CDEE,Context Descriptor Error Enable" "0,1" newline bitfld.long 0x0 12. "FBEE,Fatal Bus Error Enable" "0,1" bitfld.long 0x0 11. "ERIE,Early Receive Interrupt Enable" "0,1" bitfld.long 0x0 10. "ETIE,Early Transmit Interrupt Enable" "0,1" newline bitfld.long 0x0 9. "RWTE,Receive Watchdog Timeout Enable" "0,1" bitfld.long 0x0 8. "RSE,Receive Stopped Enable" "0,1" bitfld.long 0x0 7. "RBUE,Receive Buffer Unavailable Enable" "0,1" newline bitfld.long 0x0 6. "RIE,Receive Interrupt Enable" "0,1" bitfld.long 0x0 2. "TBUE,Transmit Buffer Unavailable Enable" "0,1" bitfld.long 0x0 1. "TXSE,Transmit Stopped Enable" "0,1" newline bitfld.long 0x0 0. "TIE,Transmit Interrupt Enable" "0,1" group.long 0x12BC++0x3 line.long 0x0 "ETH_DMAC3SFCSR,Channel 3 slot function control status register" hexmask.long.byte 0x0 16.--19. 1. "RSN,Reference Slot Number" hexmask.long.word 0x0 4.--15. 1. "SIV,Slot Interval Value" bitfld.long 0x0 1. "ASC,Advance Slot Check" "0,1" newline bitfld.long 0x0 0. "ESC,Enable Slot Comparison" "0,1" rgroup.long 0x12C4++0x3 line.long 0x0 "ETH_DMAC3CATXDR,Channel 3 current application transmit descriptor register" hexmask.long 0x0 0.--31. 1. "CURTDESAPTR,Application Transmit Descriptor Address Pointer" rgroup.long 0x12D4++0x3 line.long 0x0 "ETH_DMAC3CATXBR,Channel 3 current application transmit buffer register" hexmask.long 0x0 0.--31. 1. "CURTBUFAPTR,Application Transmit Buffer Address Pointer" group.long 0x12E0++0x3 line.long 0x0 "ETH_DMAC3SR,Channel 3 status register" rbitfld.long 0x0 19.--21. "REB,Rx DMA Error Bits" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 16.--18. "TEB,Tx DMA Error Bits" "0,1,2,3,4,5,6,7" bitfld.long 0x0 15. "NIS,Normal Interrupt Summary" "0,1" newline bitfld.long 0x0 14. "AIS,Abnormal Interrupt Summary" "0,1" bitfld.long 0x0 13. "CDE,Context Descriptor Error" "0,1" bitfld.long 0x0 12. "FBE,Fatal Bus Error" "0,1" newline bitfld.long 0x0 11. "ERI,Early Receive Interrupt" "0,1" bitfld.long 0x0 10. "ETI,Early Transmit Interrupt" "0,1" bitfld.long 0x0 9. "RWT,Receive Watchdog Timeout" "0,1" newline bitfld.long 0x0 8. "RPS,Receive Process Stopped" "0,1" bitfld.long 0x0 7. "RBU,Receive Buffer Unavailable" "0,1" bitfld.long 0x0 6. "RI,Receive Interrupt" "0,1" newline bitfld.long 0x0 2. "TBU,Transmit Buffer Unavailable" "0,1" bitfld.long 0x0 1. "TPS,Transmit Process Stopped" "0,1" bitfld.long 0x0 0. "TI,Transmit Interrupt" "0,1" tree.end tree "ETH1_S" base ad:0x582C0000 group.long 0x0++0x17 line.long 0x0 "ETH_MACCR,Operating mode configuration register" bitfld.long 0x0 31. "ARPEN,ARP Offload Enable" "0,1" bitfld.long 0x0 28.--30. "SARC,Source Address Insertion or Replacement Control" "?,?,B_0x2,B_0x3,?,?,B_0x6,B_0x7" bitfld.long 0x0 27. "IPC,Checksum Offload" "0,1" newline bitfld.long 0x0 24.--26. "IPG,Inter-Packet Gap" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x0 23. "GPSLCE,Giant Packet Size Limit Control Enable" "0,1" bitfld.long 0x0 22. "S2KP,IEEE 802." "0,1" newline bitfld.long 0x0 21. "CST,CRC stripping for Type packets" "0,1" bitfld.long 0x0 20. "ACS,Automatic Pad or CRC Stripping" "0,1" bitfld.long 0x0 19. "WD,Watchdog Disable" "0,1" newline bitfld.long 0x0 18. "BE,Packet Burst Enable" "0,1" bitfld.long 0x0 17. "JD,Jabber Disable" "0,1" bitfld.long 0x0 16. "JE,Jumbo Packet Enable" "0,1" newline bitfld.long 0x0 15. "PS,Port Select" "B_0x0,B_0x1" bitfld.long 0x0 14. "FES,MAC Speed" "B_0x0,B_0x1" bitfld.long 0x0 13. "DM,Duplex Mode" "0,1" newline bitfld.long 0x0 12. "LM,Loopback Mode" "0,1" bitfld.long 0x0 11. "ECRSFD,Enable Carrier Sense Before Transmission in Full-duplex mode" "0,1" bitfld.long 0x0 10. "DO,Disable Receive Own" "0,1" newline bitfld.long 0x0 9. "DCRS,Disable Carrier Sense During Transmission" "0,1" bitfld.long 0x0 8. "DR,Disable Retry" "0,1" bitfld.long 0x0 5.--6. "BL,Back-Off Limit" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 4. "DC,Deferral Check" "0,1" bitfld.long 0x0 2.--3. "PRELEN,Preamble Length for Transmit packets" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 1. "TE,Transmitter Enable" "0,1" newline bitfld.long 0x0 0. "RE,Receiver Enable" "0,1" line.long 0x4 "ETH_MACECR,Extended operating mode configuration register" bitfld.long 0x4 30. "APDIM,ARP Packet Drop if IP Address Mismatch" "0,1" hexmask.long.byte 0x4 25.--29. 1. "EIPG,Extended Inter-Packet Gap" bitfld.long 0x4 24. "EIPGEN,Extended Inter-Packet Gap Enable" "0,1" newline bitfld.long 0x4 18. "USP,Unicast Slow Protocol Packet Detect" "0,1" bitfld.long 0x4 17. "SPEN,Slow Protocol Detection Enable" "0,1" bitfld.long 0x4 16. "DCRCC,Disable CRC Checking for Received Packets" "0,1" newline hexmask.long.word 0x4 0.--13. 1. "GPSL,Giant Packet Size Limit" line.long 0x8 "ETH_MACPFR,Packet filtering control register" bitfld.long 0x8 31. "RA,Receive All" "0,1" bitfld.long 0x8 21. "DNTU,Drop Non-TCP/UDP over IP Packets" "0,1" bitfld.long 0x8 20. "IPFE,Layer 3 and Layer 4 Filter Enable" "0,1" newline bitfld.long 0x8 16. "VTFE,VLAN Tag Filter Enable" "0,1" bitfld.long 0x8 10. "HPF,Hash or Perfect Filter" "0,1" bitfld.long 0x8 9. "SAF,Source Address Filter Enable" "0,1" newline bitfld.long 0x8 8. "SAIF,SA Inverse Filtering" "0,1" bitfld.long 0x8 6.--7. "PCF,Pass Control Packets" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 5. "DBF,Disable Broadcast Packets" "0,1" newline bitfld.long 0x8 4. "PM,Pass All Multicast" "0,1" bitfld.long 0x8 3. "DAIF,DA Inverse Filtering" "0,1" bitfld.long 0x8 2. "HMC,Hash Multicast" "0,1" newline bitfld.long 0x8 1. "HUC,Hash Unicast" "0,1" bitfld.long 0x8 0. "PR,Promiscuous Mode" "0,1" line.long 0xC "ETH_MACWJBTR,Watchdog and jabber timeout register" bitfld.long 0xC 24. "PJE,Programmable Jabber Enable" "0,1" hexmask.long.byte 0xC 16.--19. 1. "JTO,Jabber Timeout" bitfld.long 0xC 8. "PWE,Programmable Watchdog Enable" "0,1" newline hexmask.long.byte 0xC 0.--3. 1. "WTO,Watchdog Timeout" line.long 0x10 "ETH_MACHT0R,Hash Table 0 register" hexmask.long 0x10 0.--31. 1. "HT31T0,MAC Hash Table First 32 Bits" line.long 0x14 "ETH_MACHT1R,Hash Table 1 register" hexmask.long 0x14 0.--31. 1. "HT63T32,MAC Hash Table Second 32 Bits" group.long 0x50++0xB line.long 0x0 "ETH_MACVTCR,VLAN tag Control register" bitfld.long 0x0 31. "EIVLRXS,Enable Inner VLAN Tag in Rx Status" "0,1" bitfld.long 0x0 28.--29. "EIVLS,Enable Inner VLAN Tag Stripping on Receive" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 27. "ERIVLT,Enable Inner VLAN Tag" "0,1" newline bitfld.long 0x0 26. "EDVLP,Enable Double VLAN Processing" "0,1" bitfld.long 0x0 25. "VTHM,VLAN Tag Hash Table Match Enable" "0,1" bitfld.long 0x0 24. "EVLRXS,Enable VLAN Tag in Rx status" "0,1" newline bitfld.long 0x0 21.--22. "EVLS,Enable VLAN Tag Stripping on Receive" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20. "DOVLTC,Disable VLAN Type Check" "0,1" bitfld.long 0x0 19. "ERSVLM,Enable Receive S-VLAN Match" "0,1" newline bitfld.long 0x0 18. "ESVL,Enable S-VLAN" "0,1" bitfld.long 0x0 17. "VTIM,VLAN Tag Inverse Match Enable" "0,1" bitfld.long 0x0 16. "ETV,Enable 12-Bit VLAN Tag Comparison" "0,1" newline bitfld.long 0x0 2.--3. "OFS,Offset" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "CT,Command Type" "0,1" bitfld.long 0x0 0. "OB,Operation Busy" "0,1" line.long 0x4 "ETH_MACVTDR,VLAN tag data register" bitfld.long 0x4 25. "DMACHN,DMA Channel Number" "0,1" bitfld.long 0x4 24. "DMACHEN,DMA Channel Number Enable" "0,1" bitfld.long 0x4 20. "ERIVLT,Enable Inner VLAN Tag Comparison" "0,1" newline bitfld.long 0x4 19. "ERSVLM,Enable S-VLAN Match for received Frames" "0,1" bitfld.long 0x4 18. "DOVLTC,Disable VLAN Type Comparison" "0,1" bitfld.long 0x4 17. "ETV,12-bit or 16-bit VLAN comparison" "B_0x0,B_0x1" newline bitfld.long 0x4 16. "VEN,VLAN Tag Enable" "0,1" hexmask.long.word 0x4 0.--15. 1. "VID,VLAN Tag ID" line.long 0x8 "ETH_MACVHTR,VLAN Hash table register" hexmask.long.word 0x8 0.--15. 1. "VLHT,VLAN Hash Table" group.long 0x60++0x3 line.long 0x0 "ETH_MACVIR,VLAN inclusion register" rbitfld.long 0x0 31. "BUSY,Busy" "0,1" bitfld.long 0x0 30. "RDWR,Read write control" "0,1" bitfld.long 0x0 25. "ADDR1,Address" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "ADDR0,Address" "B_0x0,B_0x1" bitfld.long 0x0 21. "CBTI,Channel based tag insertion" "0,1" bitfld.long 0x0 20. "VLTI,VLAN Tag Input" "0,1" newline bitfld.long 0x0 19. "CSVL,C-VLAN or S-VLAN" "B_0x0,B_0x1" bitfld.long 0x0 18. "VLP,VLAN Priority Control" "0,1" bitfld.long 0x0 16.--17. "VLC,VLAN Tag Control in Transmit Packets" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.word 0x0 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" group.long 0x60++0x7 line.long 0x0 "ETH_MACVIR_ALTERNATE1,VLAN inclusion register" bitfld.long 0x0 19. "CSVL,C-VLAN or S-VLAN" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" line.long 0x4 "ETH_MACIVIR,Inner VLAN inclusion register" bitfld.long 0x4 20. "VLTI,VLAN Tag Input" "0,1" bitfld.long 0x4 19. "CSVL,C-VLAN or S-VLAN" "B_0x0,B_0x1" bitfld.long 0x4 18. "VLP,VLAN Priority Control" "0,1" newline bitfld.long 0x4 16.--17. "VLC,VLAN Tag Control in Transmit Packets" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x4 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" group.long 0x70++0x3 line.long 0x0 "ETH_MACQ0TXFCR,Tx Queue 0 flow control register" hexmask.long.word 0x0 16.--31. 1. "PT,Pause Time" bitfld.long 0x0 7. "DZPQ,Disable Zero-Quanta Pause" "0,1" bitfld.long 0x0 4.--6. "PLT,Pause Low Threshold" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" newline bitfld.long 0x0 1. "TFE,Transmit Flow Control Enable" "0,1" bitfld.long 0x0 0. "FCB_BPA,Flow Control Busy or Backpressure Activate" "0,1" group.long 0x90++0x7 line.long 0x0 "ETH_MACRXFCR,Rx flow control register" bitfld.long 0x0 1. "UP,Unicast Pause Packet Detect" "0,1" bitfld.long 0x0 0. "RFE,Receive Flow Control Enable" "0,1" line.long 0x4 "ETH_MACRXQCR,Rx Queue control register" bitfld.long 0x4 17. "VFFQ,VLAN Tag Filter Fail Packets Queue" "B_0x0,B_0x1" bitfld.long 0x4 16. "VFFQE,VLAN Tag Filter Fail Packets Queuing Enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "MFFQ,Multicast Address Filter Fail Packets Queue." "B_0x0,B_0x1" newline bitfld.long 0x4 8. "MFFQE,Multicast Address Filter Fail Packets Queuing Enable." "0,1" bitfld.long 0x4 1. "UFFQ,Unicast Address Filter Fail Packets Queue." "B_0x0,B_0x1" bitfld.long 0x4 0. "UFFQE,Unicast Address Filter Fail Packets Queuing Enable." "0,1" group.long 0xA0++0xB line.long 0x0 "ETH_MACRXQC0R,Rx queue control 0 register" bitfld.long 0x0 2.--3. "RXQ1EN,Receive Queue 1 Enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 0.--1. "RXQ0EN,Receive Queue 0 Enable" "B_0x0,B_0x1,B_0x2,?" line.long 0x4 "ETH_MACRXQC1R,Rx queue control 1 register" bitfld.long 0x4 29. "TBRQE,Type Field Based Rx Queuing Enable" "0,1" bitfld.long 0x4 28. "OMCBCQ,Overriding MC-BC queue priority select" "B_0x0,B_0x1" bitfld.long 0x4 26. "FPRQ2,Frame Preemption Residue Queue" "?,B_0x1" newline bitfld.long 0x4 25. "FPRQ1,Frame Preemption Residue Queue" "?,B_0x1" bitfld.long 0x4 24. "FPRQ0,Frame Preemption Residue Queue" "?,B_0x1" bitfld.long 0x4 22.--23. "TPQC,Tagged PTP over Ethernet Packets Queuing Control" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 21. "TACPQE,Tagged AV Control Packets Queuing Enable" "0,1" bitfld.long 0x4 20. "MCBCQEN,Multicast and Broadcast Queue Enable" "0,1" bitfld.long 0x4 16.--18. "MCBCQ,Multicast and Broadcast Queue" "B_0x0,B_0x1,?,?,?,?,?,?" newline bitfld.long 0x4 12.--14. "UPQ,Untagged Packet Queue" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 4.--6. "PTPQ,PTP Packets Queue" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 2. "AVCPQ2,AV Untagged Control Packets Queue" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "AVCPQ1,AV Untagged Control Packets Queue" "B_0x0,B_0x1" bitfld.long 0x4 0. "AVCPQ0,AV Untagged Control Packets Queue" "B_0x0,B_0x1" line.long 0x8 "ETH_MACRXQC2R,Rx queue control 2 register" hexmask.long.byte 0x8 8.--15. 1. "PSRQ1,Priorities Selected in the Receive Queue 1" hexmask.long.byte 0x8 0.--7. 1. "PSRQ0,Priorities Selected in the Receive Queue 0" group.long 0xB0++0xB line.long 0x0 "ETH_MACISR,Interrupt status register" rbitfld.long 0x0 20. "MFRIS,MMC FPE Receive Interrupt Status" "0,1" rbitfld.long 0x0 19. "MFTIS,MMC FPE Transmit Interrupt Status" "0,1" bitfld.long 0x0 18. "MDIOIS,MDIO Interrupt Status" "0,1" newline rbitfld.long 0x0 17. "FPEIS,Frame Preemption Interrupt Status" "0,1" bitfld.long 0x0 14. "RXSTSIS,Receive Status Interrupt" "0,1" bitfld.long 0x0 13. "TXSTSIS,Transmit Status Interrupt" "0,1" newline bitfld.long 0x0 12. "TSIS,Timestamp Interrupt Status" "0,1" rbitfld.long 0x0 10. "MMCTXIS,MMC Transmit Interrupt Status" "0,1" rbitfld.long 0x0 9. "MMCRXIS,MMC Receive Interrupt Status" "0,1" newline rbitfld.long 0x0 8. "MMCIS,MMC Interrupt Status" "0,1" rbitfld.long 0x0 5. "LPIIS,LPI Interrupt Status" "0,1" rbitfld.long 0x0 4. "PMTIS,PMT Interrupt Status" "0,1" newline rbitfld.long 0x0 3. "PHYIS,PHY Interrupt" "0,1" rbitfld.long 0x0 0. "RGSMIIIS,RGMII Interrupt Status" "0,1" line.long 0x4 "ETH_MACIER,Interrupt enable register" bitfld.long 0x4 18. "MDIOIE,MDIO Interrupt Enable" "0,1" bitfld.long 0x4 17. "FPEIE,Frame Preemption Interrupt Enable" "0,1" bitfld.long 0x4 14. "RXSTSIE,Receive Status Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "TXSTSIE,Transmit Status Interrupt Enable" "0,1" bitfld.long 0x4 12. "TSIE,Timestamp Interrupt Enable" "0,1" bitfld.long 0x4 5. "LPIIE,LPI Interrupt Enable" "0,1" newline bitfld.long 0x4 4. "PMTIE,PMT Interrupt Enable" "0,1" bitfld.long 0x4 3. "PHYIE,PHY Interrupt Enable" "0,1" bitfld.long 0x4 0. "RGSMIIIE,RGMII Interrupt Enable" "0,1" line.long 0x8 "ETH_MACRXTXSR,Rx Tx status register" bitfld.long 0x8 8. "RWT,Receive Watchdog Timeout" "0,1" bitfld.long 0x8 5. "EXCOL,Excessive Collisions" "0,1" bitfld.long 0x8 4. "LCOL,Late Collision" "0,1" newline bitfld.long 0x8 3. "EXDEF,Excessive Deferral" "0,1" bitfld.long 0x8 2. "LCARR,Loss of Carrier" "0,1" bitfld.long 0x8 1. "NCARR,No Carrier" "0,1" newline bitfld.long 0x8 0. "TJT,Transmit Jabber Timeout" "0,1" group.long 0xC0++0x7 line.long 0x0 "ETH_MACPCSR,PMT control status register" bitfld.long 0x0 31. "RWKFILTRST,Remote Wake-up Packet Filter Register Pointer Reset" "0,1" hexmask.long.byte 0x0 24.--28. 1. "RWKPTR,Remote wake-up FIFO Pointer" bitfld.long 0x0 10. "RWKPFE,Remote wake-up Packet Forwarding Enable" "0,1" newline bitfld.long 0x0 9. "GLBLUCAST,Global Unicast" "0,1" rbitfld.long 0x0 6. "RWKPRCVD,Remote wake-up Packet Received" "0,1" bitfld.long 0x0 5. "MGKPRCVD,Magic Packet Received" "0,1" newline bitfld.long 0x0 2. "RWKPKTEN,Remote wake-up Packet Enable" "0,1" bitfld.long 0x0 1. "MGKPKTEN,Magic Packet Enable" "0,1" bitfld.long 0x0 0. "PWRDWN,Power Down" "0,1" line.long 0x4 "ETH_MACRWKPFR,Remote wake-up packet filter register" hexmask.long 0x4 0.--31. 1. "MACRWKPFR,Remote wake-up packet filter" group.long 0xD0++0xF line.long 0x0 "ETH_MACLCSR,LPI control and status register" bitfld.long 0x0 21. "LPITCSE,LPI Tx Clock Stop Enable" "0,1" bitfld.long 0x0 20. "LPITE,LPI Timer Enable" "0,1" bitfld.long 0x0 19. "LPITXA,LPI Tx Automate" "0,1" newline bitfld.long 0x0 18. "PLSEN,PHY Link Status Enable" "0,1" bitfld.long 0x0 17. "PLS,PHY Link Status" "0,1" bitfld.long 0x0 16. "LPIEN,LPI Enable" "0,1" newline rbitfld.long 0x0 9. "RLPIST,Receive LPI State" "0,1" rbitfld.long 0x0 8. "TLPIST,Transmit LPI State" "0,1" rbitfld.long 0x0 3. "RLPIEX,Receive LPI Exit" "0,1" newline rbitfld.long 0x0 2. "RLPIEN,Receive LPI Entry" "0,1" rbitfld.long 0x0 1. "TLPIEX,Transmit LPI Exit" "0,1" rbitfld.long 0x0 0. "TLPIEN,Transmit LPI Entry" "0,1" line.long 0x4 "ETH_MACLTCR,LPI timers control register" hexmask.long.word 0x4 16.--25. 1. "LST,LPI LS Timer" hexmask.long.word 0x4 0.--15. 1. "TWT,LPI TW Timer" line.long 0x8 "ETH_MACLETR,LPI entry timer register" hexmask.long.tbyte 0x8 0.--19. 1. "LPIET,LPI Entry Timer" line.long 0xC "ETH_MAC1USTCR,One-microsecond-tick counter register" hexmask.long.word 0xC 0.--11. 1. "TIC_1US_CNTR,1us tick Counter" group.long 0xF8++0x3 line.long 0x0 "ETH_MACPHYCSR,PHYIF control status register" rbitfld.long 0x0 19. "LNKSTS,Link Status" "B_0x0,B_0x1" rbitfld.long 0x0 17.--18. "LNKSPEED,Link Speed" "B_0x0,B_0x1,B_0x2,?" rbitfld.long 0x0 16. "LNKMOD,Link Mode" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "LUD,Link Up or Down" "B_0x0,B_0x1" bitfld.long 0x0 0. "TC,Transmit Configuration in RGMII" "0,1" rgroup.long 0x110++0x7 line.long 0x0 "ETH_MACVR,Version register" hexmask.long.byte 0x0 8.--15. 1. "USERVER,ST-defined version" hexmask.long.byte 0x0 0.--7. 1. "SNPSVER,IP version" line.long 0x4 "ETH_MACDR,Debug register" bitfld.long 0x4 17.--18. "TFCSTS,MAC Transmit Packet Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16. "TPESTS,MAC GMII or MII Transmit Protocol Engine Status" "0,1" bitfld.long 0x4 1.--2. "RFCFCSTS,MAC Receive Packet Controller FIFO Status" "0,1,2,3" newline bitfld.long 0x4 0. "RPESTS,MAC GMII or MII Receive Protocol Engine Status" "0,1" rgroup.long 0x11C++0xF line.long 0x0 "ETH_MACHWF0R,HW feature 0 register" bitfld.long 0x0 28.--30. "ACTPHYSEL,Active PHY Selected" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,?" bitfld.long 0x0 27. "SAVLANINS,Source Address or VLAN Insertion Enable" "0,1" bitfld.long 0x0 25.--26. "TSSTSSEL,Timestamp System Time Source" "?,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 24. "MACADR64SEL,MAC Addresses 64-127 Selected" "0,1" bitfld.long 0x0 23. "MACADR32SEL,MAC Addresses 32-63 Selected" "0,1" hexmask.long.byte 0x0 18.--22. 1. "ADDMACADRSEL,MAC Addresses 1-31 Selected" newline bitfld.long 0x0 16. "RXCOESEL,Receive Checksum Offload Enabled" "0,1" bitfld.long 0x0 14. "TXCOESEL,Transmit Checksum Offload Enabled" "0,1" bitfld.long 0x0 13. "EEESEL,Energy Efficient Ethernet Enabled" "0,1" newline bitfld.long 0x0 12. "TSSEL,IEEE 1588-2008 Timestamp Enabled" "0,1" bitfld.long 0x0 9. "ARPOFFSEL,ARP Offload Enabled" "0,1" bitfld.long 0x0 8. "MMCSEL,RMON Module Enable" "0,1" newline bitfld.long 0x0 7. "MGKSEL,PMT Magic Packet Enable" "0,1" bitfld.long 0x0 6. "RWKSEL,PMT Remote Wake-up Packet Enable" "0,1" bitfld.long 0x0 5. "SMASEL,SMA (MDIO) Interface" "0,1" newline bitfld.long 0x0 4. "VLHASH,VLAN Hash Filter Selected" "0,1" bitfld.long 0x0 3. "PCSSEL,PCS Registers (TBI SGMII or RTBI PHY interface)" "0,1" bitfld.long 0x0 2. "HDSEL,Half-duplex Support" "0,1" newline bitfld.long 0x0 1. "GMIISEL,1000 Mbps Support" "0,1" bitfld.long 0x0 0. "MIISEL,10 or 100 Mbps Support" "0,1" line.long 0x4 "ETH_MACHWF1R,HW feature 1 register" hexmask.long.byte 0x4 27.--30. 1. "L3L4FNUM,Total number of L3 or L4 Filters" bitfld.long 0x4 24.--25. "HASHTBLSZ,Hash Table Size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 23. "POUOST,One Step for PTP over UDP/IP Feature Enable" "0,1" newline bitfld.long 0x4 21. "RAVSEL,Rx Side Only AV Feature Enable" "0,1" bitfld.long 0x4 20. "AVSEL,AV Feature Enable" "0,1" bitfld.long 0x4 19. "DBGMEMA,DMA Debug Registers Enable" "0,1" newline bitfld.long 0x4 18. "TSOEN,TCP Segmentation Offload Enable" "0,1" bitfld.long 0x4 17. "SPHEN,Split Header Feature Enable" "0,1" bitfld.long 0x4 16. "DCBEN,DCB Feature Enable" "0,1" newline bitfld.long 0x4 14.--15. "ADDR64,Address width" "B_0x0,?,?,?" bitfld.long 0x4 13. "ADVTHWORD,IEEE 1588 High Word Register Enable" "0,1" bitfld.long 0x4 12. "PTOEN,PTP Offload Enable" "0,1" newline bitfld.long 0x4 11. "OSTEN,One-Step Timestamping Enable" "0,1" hexmask.long.byte 0x4 6.--10. 1. "TXFIFOSIZE,MTL Transmit FIFO Size" bitfld.long 0x4 5. "SPRAM,Single Port RAM Enable" "0,1" newline hexmask.long.byte 0x4 0.--4. 1. "RXFIFOSIZE,MTL Receive FIFO Size" line.long 0x8 "ETH_MACHWF2R,HW feature 2 register" bitfld.long 0x8 28.--30. "AUXSNAPNUM,Number of Auxiliary Snapshot Inputs" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x8 24.--26. "PPSOUTNUM,Number of PPS Outputs" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x8 22.--23. "TDCSZ,Tx DMA Descriptor Cache Size in terms of 16-byte descriptors" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x8 18.--21. 1. "TXCHCNT,Number of DMA Transmit Channels" bitfld.long 0x8 16.--17. "RDCSZ,Rx DMA Descriptor Cache Size in terms of 16-byte descriptors" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x8 12.--15. 1. "RXCHCNT,Number of DMA Receive Channels" newline hexmask.long.byte 0x8 6.--9. 1. "TXQCNT,Number of MTL Transmit Queues" hexmask.long.byte 0x8 0.--3. 1. "RXQCNT,Number of MTL Receive Queues" line.long 0xC "ETH_MACHWF3R,HW feature 3 register" bitfld.long 0xC 28.--29. "ASP,Automotive Safety Package" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 27. "TBSSEL,Time-based scheduling Enable" "0,1" bitfld.long 0xC 26. "FPESEL,Frame Preemption Enable" "0,1" newline bitfld.long 0xC 20.--21. "ESTWID,Width of the Time Interval field in the Gate Control List" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 17.--19. "ESTDEP,Depth of the Gate Control List" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0xC 16. "ESTSEL,Enhancements to Scheduled Traffic Enable" "0,1" newline bitfld.long 0xC 13.--14. "FRPES,Flexible Receive Parser Table Entries size" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 11.--12. "FRPBS,Flexible Receive Parser Buffer size" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10. "FRPSEL,Flexible Receive Parser Selected" "0,1" newline bitfld.long 0xC 9. "PDUPSEL,Broadcast/Multicast Packet Duplication" "0,1" bitfld.long 0xC 5. "DVLAN,Double VLAN processing enable" "0,1" bitfld.long 0xC 4. "CBTISEL,Queue/Channel based VLAN tag insertion on Tx enable" "0,1" newline bitfld.long 0xC 0.--2. "NRVF,Number of Extended VLAN Tag Filters Enabled" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" group.long 0x200++0x7 line.long 0x0 "ETH_MACMDIOAR,MDIO address register" bitfld.long 0x0 27. "PSE,Preamble Suppression Enable" "0,1" bitfld.long 0x0 26. "BTB,Back to Back transactions" "0,1" hexmask.long.byte 0x0 21.--25. 1. "PA,Physical Layer Address" newline hexmask.long.byte 0x0 16.--20. 1. "RDA,Register/Device Address" bitfld.long 0x0 12.--14. "NTC,Number of Training Clocks" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--11. 1. "CR,CSR Clock Range" newline bitfld.long 0x0 4. "SKAP,Skip Address Packet" "0,1" bitfld.long 0x0 2.--3. "GOC,GMII Operation Command" "?,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "C45E,Clause 45 PHY Enable" "0,1" newline bitfld.long 0x0 0. "GB,GMII Busy" "0,1" line.long 0x4 "ETH_MACMDIODR,MDIO data register" hexmask.long.word 0x4 16.--31. 1. "RA,Register Address" hexmask.long.word 0x4 0.--15. 1. "GD,GMII Data" group.long 0x210++0x3 line.long 0x0 "ETH_MACARPAR,ARP address register" hexmask.long 0x0 0.--31. 1. "ARPPA,ARP Protocol Address" group.long 0x230++0x7 line.long 0x0 "ETH_MACCSRSWCR,CSR software control register" bitfld.long 0x0 8. "SEEN,Slave Error Response Enable" "0,1" bitfld.long 0x0 0. "RCWE,Register Clear on Write 1 Enable" "0,1" line.long 0x4 "ETH_MACFPECSR,FPE control and status register" bitfld.long 0x4 19. "TRSP,Transmitted Respond Frame" "0,1" bitfld.long 0x4 18. "TVER,Transmitted Verify Frame" "0,1" bitfld.long 0x4 17. "RRSP,Received Respond Frame" "0,1" newline bitfld.long 0x4 16. "RVER,Received Verify Frame" "0,1" bitfld.long 0x4 3. "ARV,Autogenerate Respond mPacket on receiving Verify mPacket" "0,1" bitfld.long 0x4 2. "SRSP,Send Respond mPacket" "0,1" newline bitfld.long 0x4 1. "SVER,Send Verify mPacket" "0,1" bitfld.long 0x4 0. "EFPE,Enable Tx Frame Preemption" "0,1" group.long 0x240++0x7 line.long 0x0 "ETH_MACPRSTIMR,MAC presentation time register" hexmask.long 0x0 0.--31. 1. "MPTN,MAC 1722 Presentation Time in ns" line.long 0x4 "ETH_MACPRSTIMUR,MAC presentation time update register" hexmask.long 0x4 0.--31. 1. "MPTU,MAC 1722 Presentation Time Update" group.long 0x300++0x1F line.long 0x0 "ETH_MACA0HR,MAC Address 0 high register" rbitfld.long 0x0 31. "AE,Address Enable" "0,1" bitfld.long 0x0 16. "DCS,DMA Channel Select" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "ADDRHI,MAC Address0[47:32]" line.long 0x4 "ETH_MACA0LR,MAC Address 0 low register" hexmask.long 0x4 0.--31. 1. "ADDRLO,MAC Address x [31:0]" line.long 0x8 "ETH_MACA1HR,MAC Address 1 high register" bitfld.long 0x8 31. "AE,Address Enable" "0,1" bitfld.long 0x8 30. "SA,Source Address" "B_0x0,B_0x1" hexmask.long.byte 0x8 24.--29. 1. "MBC,Mask Byte Control" newline bitfld.long 0x8 16. "DCS,DMA Channel Select" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "ADDRHI,MAC Address1 [47:32]" line.long 0xC "ETH_MACA1LR,MAC Address 1 low register" hexmask.long 0xC 0.--31. 1. "ADDRLO,MAC Address x [31:0]" line.long 0x10 "ETH_MACA2HR,MAC Address 2 high register" bitfld.long 0x10 31. "AE,Address Enable" "0,1" bitfld.long 0x10 30. "SA,Source Address" "B_0x0,B_0x1" hexmask.long.byte 0x10 24.--29. 1. "MBC,Mask Byte Control" newline bitfld.long 0x10 16. "DCS,DMA Channel Select" "B_0x0,B_0x1" hexmask.long.word 0x10 0.--15. 1. "ADDRHI,MAC Address1 [47:32]" line.long 0x14 "ETH_MACA2LR,MAC Address 2 low register" hexmask.long 0x14 0.--31. 1. "ADDRLO,MAC Address x [31:0]" line.long 0x18 "ETH_MACA3HR,MAC Address 3 high register" bitfld.long 0x18 31. "AE,Address Enable" "0,1" bitfld.long 0x18 30. "SA,Source Address" "B_0x0,B_0x1" hexmask.long.byte 0x18 24.--29. 1. "MBC,Mask Byte Control" newline bitfld.long 0x18 16. "DCS,DMA Channel Select" "B_0x0,B_0x1" hexmask.long.word 0x18 0.--15. 1. "ADDRHI,MAC Address1 [47:32]" line.long 0x1C "ETH_MACA3LR,MAC Address 3 low register" hexmask.long 0x1C 0.--31. 1. "ADDRLO,MAC Address x [31:0]" group.long 0x700++0x13 line.long 0x0 "ETH_MMC_CONTROL,MMC control register" bitfld.long 0x0 8. "UCDBC,Update MMC Counters for Dropped Broadcast Packets" "0,1" bitfld.long 0x0 5. "CNTPRSTLVL,Full-Half Preset" "0,1" bitfld.long 0x0 4. "CNTPRST,Counters Preset" "0,1" newline bitfld.long 0x0 3. "CNTFREEZ,MMC Counter Freeze" "0,1" bitfld.long 0x0 2. "RSTONRD,Reset on Read" "0,1" bitfld.long 0x0 1. "CNTSTOPRO,Counter Stop Rollover" "0,1" newline bitfld.long 0x0 0. "CNTRST,Counters Reset" "0,1" line.long 0x4 "ETH_MMC_RX_INTERRUPT,MMC Rx interrupt register" bitfld.long 0x4 27. "RXLPITRCIS,MMC Receive LPI transition counter interrupt status" "0,1" bitfld.long 0x4 26. "RXLPIUSCIS,MMC Receive LPI microsecond counter interrupt status" "0,1" bitfld.long 0x4 25. "RXCTRLPIS,MMC Receive Control Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 24. "RXRCVERRPIS,MMC Receive Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 23. "RXWDOGPIS,MMC Receive Watchdog Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 22. "RXVLANGBPIS,MMC Receive VLAN Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 21. "RXFOVPIS,MMC Receive FIFO Overflow Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 20. "RXPAUSPIS,MMC Receive Pause Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 19. "RXORANGEPIS,MMC Receive Out Of Range Error Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 18. "RXLENERPIS,MMC Receive Length Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 17. "RXUCGPIS,MMC Receive Unicast Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 16. "RX1024TMAXOCTGBPIS,MMC Receive 1024 to Maximum Octet Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 15. "RX512T1023OCTGBPIS,MMC Receive 512 to 1023 Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 14. "RX256T511OCTGBPIS,MMC Receive 256 to 511 Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 13. "RX128T255OCTGBPIS,MMC Receive 128 to 255 Octet Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 12. "RX65T127OCTGBPIS,MMC Receive 65 to 127 Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 11. "RX64OCTGBPIS,MMC Receive 64 Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 10. "RXOSIZEGPIS,MMC Receive Oversize Good Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 9. "RXUSIZEGPIS,MMC Receive Undersize Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 8. "RXJABERPIS,MMC Receive Jabber Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 7. "RXRUNTPIS,MMC Receive Runt Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 6. "RXALGNERPIS,MMC Receive Alignment Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 5. "RXCRCERPIS,MMC Receive CRC Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 4. "RXMCGPIS,MMC Receive Multicast Good Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 3. "RXBCGPIS,MMC Receive Broadcast Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 2. "RXGOCTIS,MMC Receive Good Octet Counter Interrupt Status" "0,1" bitfld.long 0x4 1. "RXGBOCTIS,MMC Receive Good Bad Octet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 0. "RXGBPKTIS,MMC Receive Good Bad Packet Counter Interrupt Status" "0,1" line.long 0x8 "ETH_MMC_TX_INTERRUPT,MMC Tx interrupt register" bitfld.long 0x8 27. "TXLPITRCIS,MMC Transmit LPI transition counter interrupt status" "0,1" bitfld.long 0x8 26. "TXLPIUSCIS,MMC Transmit LPI microsecond counter interrupt status" "0,1" bitfld.long 0x8 25. "TXOSIZEGPIS,MMC Transmit Oversize Good Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 24. "TXVLANGPIS,MMC Transmit VLAN Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 23. "TXPAUSPIS,MMC Transmit Pause Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 22. "TXEXDEFPIS,MMC Transmit Excessive Deferral Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 21. "TXGPKTIS,MMC Transmit Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 20. "TXGOCTIS,MMC Transmit Good Octet Counter Interrupt Status" "0,1" bitfld.long 0x8 19. "TXCARERPIS,MMC Transmit Carrier Error Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 18. "TXEXCOLPIS,MMC Transmit Excessive Collision Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 17. "TXLATCOLPIS,MMC Transmit Late Collision Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 16. "TXDEFPIS,MMC Transmit Deferred Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 15. "TXMCOLGPIS,MMC Transmit Multiple Collision Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 14. "TXSCOLGPIS,MMC Transmit Single Collision Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 13. "TXUFLOWERPIS,MMC Transmit Underflow Error Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 12. "TXBCGBPIS,MMC Transmit Broadcast Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 11. "TXMCGBPIS,MMC Transmit Multicast Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 10. "TXUCGBPIS,MMC Transmit Unicast Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 9. "TX1024TMAXOCTGBPIS,MMC Transmit 1024 to Maximum Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 8. "TX512T1023OCTGBPIS,MMC Transmit 512 to 1023 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x8 7. "TX256T511OCTGBPIS,MMC Transmit 256 to 511 Octet Good Bad Packet Counter" "0,1" newline bitfld.long 0x8 6. "TX128T255OCTGBPIS,MMC Transmit 128 to 255 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x8 5. "TX65T127OCTGBPIS,MMC Transmit 65 to 127 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x8 4. "TX64OCTGBPIS,MMC Transmit 64 Octet Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 3. "TXMCGPIS,MMC Transmit Multicast Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 2. "TXBCGPIS,MMC Transmit Broadcast Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 1. "TXGBPKTIS,MMC Transmit Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 0. "TXGBOCTIS,MMC Transmit Good Bad Octet Counter Interrupt Status" "0,1" line.long 0xC "ETH_MMC_RX_INTERRUPT_MASK,MMC Rx interrupt mask register" bitfld.long 0xC 27. "RXLPITRCIM,MMC Receive LPI transition counter interrupt Mask" "0,1" bitfld.long 0xC 26. "RXLPIUSCIM,MMC Receive LPI microsecond counter interrupt Mask" "0,1" bitfld.long 0xC 25. "RXCTRLPIM,MMC Receive Control Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 24. "RXRCVERRPIM,MMC Receive Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 23. "RXWDOGPIM,MMC Receive Watchdog Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 22. "RXVLANGBPIM,MMC Receive VLAN Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 21. "RXFOVPIM,MMC Receive FIFO Overflow Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 20. "RXPAUSPIM,MMC Receive Pause Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 19. "RXORANGEPIM,MMC Receive Out Of Range Error Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 18. "RXLENERPIM,MMC Receive Length Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 17. "RXUCGPIM,MMC Receive Unicast Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 16. "RX1024TMAXOCTGBPIM,MMC Receive 1024 to Maximum Octet Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 15. "RX512T1023OCTGBPIM,MMC Receive 512 to 1023 Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 14. "RX256T511OCTGBPIM,MMC Receive 256 to 511 Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 13. "RX128T255OCTGBPIM,MMC Receive 128 to 255 Octet Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 12. "RX65T127OCTGBPIM,MMC Receive 65 to 127 Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 11. "RX64OCTGBPIM,MMC Receive 64 Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 10. "RXOSIZEGPIM,MMC Receive Oversize Good Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 9. "RXUSIZEGPIM,MMC Receive Undersize Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 8. "RXJABERPIM,MMC Receive Jabber Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 7. "RXRUNTPIM,MMC Receive Runt Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 6. "RXALGNERPIM,MMC Receive Alignment Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 5. "RXCRCERPIM,MMC Receive CRC Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 4. "RXMCGPIM,MMC Receive Multicast Good Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 3. "RXBCGPIM,MMC Receive Broadcast Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 2. "RXGOCTIM,MMC Receive Good Octet Counter Interrupt Mask" "0,1" bitfld.long 0xC 1. "RXGBOCTIM,MMC Receive Good Bad Octet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 0. "RXGBPKTIM,MMC Receive Good Bad Packet Counter Interrupt Mask" "0,1" line.long 0x10 "ETH_MMC_TX_INTERRUPT_MASK,MMC Tx interrupt mask register" bitfld.long 0x10 27. "TXLPITRCIM,MMC Transmit LPI transition counter interrupt Mask" "0,1" bitfld.long 0x10 26. "TXLPIUSCIM,MMC Transmit LPI microsecond counter interrupt Mask" "0,1" bitfld.long 0x10 25. "TXOSIZEGPIM,MMC Transmit Oversize Good Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 24. "TXVLANGPIM,MMC Transmit VLAN Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 23. "TXPAUSPIM,MMC Transmit Pause Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 22. "TXEXDEFPIM,MMC Transmit Excessive Deferral Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 21. "TXGPKTIM,MMC Transmit Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 20. "TXGOCTIM,MMC Transmit Good Octet Counter Interrupt Mask" "0,1" bitfld.long 0x10 19. "TXCARERPIM,MMC Transmit Carrier Error Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 18. "TXEXCOLPIM,MMC Transmit Excessive Collision Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 17. "TXLATCOLPIM,MMC Transmit Late Collision Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 16. "TXDEFPIM,MMC Transmit Deferred Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 15. "TXMCOLGPIM,MMC Transmit Multiple Collision Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 14. "TXSCOLGPIM,MMC Transmit Single Collision Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 13. "TXUFLOWERPIM,MMC Transmit Underflow Error Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 12. "TXBCGBPIM,MMC Transmit Broadcast Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 11. "TXMCGBPIM,MMC Transmit Multicast Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 10. "TXUCGBPIM,MMC Transmit Unicast Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 9. "TX1024TMAXOCTGBPIM,MMC Transmit 1024 to Maximum Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 8. "TX512T1023OCTGBPIM,MMC Transmit 512 to 1023 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x10 7. "TX256T511OCTGBPIM,MMC Transmit 256 to 511 Octet Good Bad Packet Counter" "0,1" newline bitfld.long 0x10 6. "TX128T255OCTGBPIM,MMC Transmit 128 to 255 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x10 5. "TX65T127OCTGBPIM,MMC Transmit 65 to 127 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x10 4. "TX64OCTGBPIM,MMC Transmit 64 Octet Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 3. "TXMCGPIM,MMC Transmit Multicast Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 2. "TXBCGPIM,MMC Transmit Broadcast Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 1. "TXGBPKTIM,MMC Transmit Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 0. "TXGBOCTIM,MMC Transmit Good Bad Octet Counter Interrupt Mask" "0,1" rgroup.long 0x714++0x67 line.long 0x0 "ETH_TX_OCTET_COUNT_GOOD_BAD,Tx octet count good bad register" hexmask.long 0x0 0.--31. 1. "TXOCTGB,Tx Octet Count Good Bad" line.long 0x4 "ETH_TX_PACKET_COUNT_GOOD_BAD,Tx packet count good bad register" hexmask.long 0x4 0.--31. 1. "TXPKTGB,Tx Packet Count Good Bad" line.long 0x8 "ETH_TX_BROADCAST_PACKETS_GOOD,Tx broadcast packets good register" hexmask.long 0x8 0.--31. 1. "TXBCASTG,Tx Broadcast Packets Good" line.long 0xC "ETH_TX_MULTICAST_PACKETS_GOOD,Tx multicast packets good register" hexmask.long 0xC 0.--31. 1. "TXMCASTG,Tx multicast Packets Good" line.long 0x10 "ETH_TX_64OCTETS_PACKETS_GOOD_BAD,Tx 64 octets packets good bad register" hexmask.long 0x10 0.--31. 1. "TX64OCTGB,Tx 64 octets Packets Good Bad" line.long 0x14 "ETH_TX_64TO127OCTETS_PACKETS_GOOD_BAD,Tx 65 to 127 octets packets good bad register" hexmask.long 0x14 0.--31. 1. "TX65_127OCTGB,Tx 65 to 127 octets Packets Good Bad" line.long 0x18 "ETH_TX_128TO255OCTETS_PACKETS_GOOD_BAD,Tx 128 to 255 octets packets good bad register" hexmask.long 0x18 0.--31. 1. "TX128_255OCTGB,Tx 128 to 255 octets Packets Good Bad" line.long 0x1C "ETH_TX_256TO511OCTETS_PACKETS_GOOD_BAD,Tx 256 to 511 octets packets good bad register" hexmask.long 0x1C 0.--31. 1. "TX256_511OCTGB,Tx 256 to 511 octets Packets Good Bad" line.long 0x20 "ETH_TX_512TO1023OCTETS_PACKETS_GOOD_BAD,Tx 512 to 1023 octets packets good bad register" hexmask.long 0x20 0.--31. 1. "TX512_1023OCTGB,Tx 512 to 1023 octets Packets Good Bad" line.long 0x24 "ETH_TX_1024TOMAXOCTETS_PACKETS_GOOD_BAD,Tx 1024 to max octets packets good bad register" hexmask.long 0x24 0.--31. 1. "TX1024_MAXOCTGB,Tx 1024 to Max octets Packets Good Bad" line.long 0x28 "ETH_TX_UNICAST_PACKETS_GOOD_BAD,Tx unicast packets good bad register" hexmask.long 0x28 0.--31. 1. "TXUCASTGB,Tx Unicast Packets Good Bad" line.long 0x2C "ETH_TX_MULTICAST_PACKETS_GOOD_BAD,Tx multicast packets good bad register" hexmask.long 0x2C 0.--31. 1. "TXMCASTGB,Tx Multicast Packets Good Bad" line.long 0x30 "ETH_TX_BROADCAST_PACKETS_GOOD_BAD,Tx broadcast packets good bad register" hexmask.long 0x30 0.--31. 1. "TXBCASTGB,Tx Broadcast Packets Good Bad" line.long 0x34 "ETH_TX_UNDERFLOW_ERROR_PACKETS,Tx underflow error packets register" hexmask.long 0x34 0.--31. 1. "TXUNDRFLW,Tx Underflow Error Packets" line.long 0x38 "ETH_TX_SINGLE_COLLISION_GOOD_PACKETS,Tx single collision good packets register" hexmask.long 0x38 0.--31. 1. "TXSNGLCOLG,Tx Single Collision Good Packets" line.long 0x3C "ETH_TX_MULTIPLE_COLLISION_GOOD_PACKETS,Tx multiple collision good packets register" hexmask.long 0x3C 0.--31. 1. "TXMULTCOLG,Tx Multiple Collision Good Packets" line.long 0x40 "ETH_TX_DEFERRED_PACKETS,Tx deferred packets register" hexmask.long 0x40 0.--31. 1. "TXDEFRD,Tx Deferred Packets" line.long 0x44 "ETH_TX_LATE_COLLISION_PACKETS,Tx late collision packets register" hexmask.long 0x44 0.--31. 1. "TXLATECOL,Tx Late Collision Packets" line.long 0x48 "ETH_TX_EXCESSIVE_COLLISION_PACKETS,Tx excessive collision packets register" hexmask.long 0x48 0.--31. 1. "TXEXSCOL,Tx Excessive Collision Packets" line.long 0x4C "ETH_TX_CARRIER_ERROR_PACKETS,Tx carrier error packets register" hexmask.long 0x4C 0.--31. 1. "TXCARR,Tx Carrier Error Packets" line.long 0x50 "ETH_TX_OCTET_COUNT_GOOD,Tx octet count good register" hexmask.long 0x50 0.--31. 1. "TXOCTG,Tx Octet Count Good" line.long 0x54 "ETH_TX_PACKET_COUNT_GOOD,Tx packet count good register" hexmask.long 0x54 0.--31. 1. "TXPKTG,Tx Packet Count Good" line.long 0x58 "ETH_TX_EXCESSIVE_DEFERRAL_ERROR,Tx excessive deferral error register" hexmask.long 0x58 0.--31. 1. "TXEXSDEF,Tx Excessive Deferral Error" line.long 0x5C "ETH_TX_PAUSE_PACKETS,Tx pause packets register" hexmask.long 0x5C 0.--31. 1. "TXPAUSE,Tx Pause Packets" line.long 0x60 "ETH_TX_VLAN_PACKETS_GOOD,Tx VLAN packets good register" hexmask.long 0x60 0.--31. 1. "TXVLANG,Tx VLAN Packets Good" line.long 0x64 "ETH_TX_OSIZE_PACKETS_GOOD,Tx OSsize packets good register" hexmask.long 0x64 0.--31. 1. "TXOSIZG,Tx OSize Packets Good" rgroup.long 0x780++0x67 line.long 0x0 "ETH_RX_PACKETS_COUNT_GOOD_BAD,Rx packets count good bad register" hexmask.long 0x0 0.--31. 1. "RXPKTGB,Rx Packets Count Good Bad" line.long 0x4 "ETH_RX_OCTET_COUNT_GOOD_BAD,Rx octet count good bad register" hexmask.long 0x4 0.--31. 1. "RXOCTGB,Rx Octet Count Good Bad" line.long 0x8 "ETH_RX_OCTET_COUNT_GOOD,Rx octet count good register" hexmask.long 0x8 0.--31. 1. "RXOCTG,Rx Octet Count Good" line.long 0xC "ETH_RX_BROADCAST_PACKETS_GOOD,Rx broadcast packets good register" hexmask.long 0xC 0.--31. 1. "RXBCASTG,Rx Broadcast Packets Good" line.long 0x10 "ETH_RX_MULTICAST_PACKETS_GOOD,Rx multicast packets good register" hexmask.long 0x10 0.--31. 1. "RXMCASTG,Rx Multicast Packets Good" line.long 0x14 "ETH_RX_CRC_ERROR_PACKETS,Rx CRC error packets register" hexmask.long 0x14 0.--31. 1. "RXCRCERR,Rx CRC Error Packets" line.long 0x18 "ETH_RX_ALIGNMENT_ERROR_PACKETS,Rx alignment error packets register" hexmask.long 0x18 0.--31. 1. "RXALGNERR,Rx Alignment Error Packets" line.long 0x1C "ETH_RX_RUNT_ERROR_PACKETS,Rx runt error packets register" hexmask.long 0x1C 0.--31. 1. "RXRUNTERR,Rx Runt Error Packets" line.long 0x20 "ETH_RX_JABBER_ERROR_PACKETS,Rx jabber error packets register" hexmask.long 0x20 0.--31. 1. "RXJABERR,Rx Jabber Error Packets" line.long 0x24 "ETH_RX_UNDERSIZE_PACKETS_GOOD,Rx undersize packets good register" hexmask.long 0x24 0.--31. 1. "RXUNDERSZG,Rx Undersize Packets Good" line.long 0x28 "ETH_RX_OVERSIZE_PACKETS_GOOD,Rx oversize packets good register" hexmask.long 0x28 0.--31. 1. "RXOVERSZG,Rx Oversize Packets Good" line.long 0x2C "ETH_RX_64OCTETS_PACKETS_GOOD_BAD,Rx 64 octets packets good bad register" hexmask.long 0x2C 0.--31. 1. "RX64OCTGB,Rx 64 Octets Packets Good Bad" line.long 0x30 "ETH_RX_65TO127OCTETS_PACKETS_GOOD_BAD,Rx 65 to 127 octets packets good bad register" hexmask.long 0x30 0.--31. 1. "TX65_127OCTGB,Rx 65-127 Octets Packets Good Bad" line.long 0x34 "ETH_RX_128TO255OCTETS_PACKETS_GOOD_BAD,Rx 128 to 255 octets packets good bad register" hexmask.long 0x34 0.--31. 1. "RX128_255OCTGB,Rx 128-255 Octets Packets Good Bad" line.long 0x38 "ETH_RX_256TO511OCTETS_PACKETS_GOOD_BAD,Rx 256 to 511 octets packets good bad register" hexmask.long 0x38 0.--31. 1. "RX256_511OCTGB,Rx 256-511 Octets Packets Good Bad" line.long 0x3C "ETH_RX_512TO1023OCTETS_PACKETS_GOOD_BAD,Rx 512 to 1023 octets packets good bad register" hexmask.long 0x3C 0.--31. 1. "RX512_1023OCTGB,Rx 512-1023 Octets Packets Good Bad" line.long 0x40 "ETH_RX_1024TOMAXOCTETS_PACKETS_GOOD_BAD,Rx 1024 to max octets packets good bad register" hexmask.long 0x40 0.--31. 1. "RX1024_MAXOCTGB,Rx 1024-Max Octets Good Bad" line.long 0x44 "ETH_RX_UNICAST_PACKETS_GOOD,Rx unicast packets good register" hexmask.long 0x44 0.--31. 1. "RXUCASTG,Rx Unicast Packets Good" line.long 0x48 "ETH_RX_LENGTH_ERROR_PACKETS,Rx length error packets register" hexmask.long 0x48 0.--31. 1. "RXLENERR,Rx Length Error Packets" line.long 0x4C "ETH_RX_OUT_OF_RANGE_PACKETS,Rx out of range type packets register" hexmask.long 0x4C 0.--31. 1. "RXOUTOFRNG,Rx Out of Range Type Packet" line.long 0x50 "ETH_RX_PAUSE_PACKETS,Rx pause packets register" hexmask.long 0x50 0.--31. 1. "RXPAUSEPKT,Rx Pause Packets" line.long 0x54 "ETH_RX_FIFO_OVERFLOW_PACKETS,Rx FIFO overflow packets register" hexmask.long 0x54 0.--31. 1. "RXFIFOOVFL,Rx FIFO Overflow Packets" line.long 0x58 "ETH_RX_VLAN_PACKETS_GOOD_BAD,Rx VLAN packets good bad register" hexmask.long 0x58 0.--31. 1. "RXVLANPKTGB,Rx VLAN Packets Good Bad" line.long 0x5C "ETH_RX_WATCHDOG_ERROR_PACKETS,Rx watchdog error packets register" hexmask.long 0x5C 0.--31. 1. "RXWDGERR,Rx Watchdog Error Packets" line.long 0x60 "ETH_RX_RECEIVE_ERROR,Rx receive error register" hexmask.long 0x60 0.--31. 1. "RXRCVERR,Rx Receive Error Packets" line.long 0x64 "ETH_RX_CONTROL_PACKETS_GOOD,Rx control packets good register" hexmask.long 0x64 0.--31. 1. "RXCTRLG,Rx Control Packets Good" rgroup.long 0x7EC++0xF line.long 0x0 "ETH_TX_LPI_USEC_CNTR,Tx LPI microsecond timer register" hexmask.long 0x0 0.--31. 1. "TXLPIUSC,Tx LPI Microseconds Counter" line.long 0x4 "ETH_TX_LPI_TRAN_CNTR,Tx LPI transition counter register" hexmask.long 0x4 0.--31. 1. "TXLPITRC,Tx LPI Transition counter" line.long 0x8 "ETH_RX_LPI_USEC_CNTR,Rx LPI microsecond counter register" hexmask.long 0x8 0.--31. 1. "RXLPIUSC,Rx LPI Microseconds Counter" line.long 0xC "ETH_RX_LPI_TRAN_CNTR,Rx LPI transition counter register" hexmask.long 0xC 0.--31. 1. "RXLPITRC,Rx LPI Transition counter" group.long 0x8A0++0x7 line.long 0x0 "ETH_MMC_FPE_TX_ISR,MMC FPE Tx interrupt status register" bitfld.long 0x0 1. "HRCIS,MMC Tx Hold Request Counter Interrupt Status" "0,1" bitfld.long 0x0 0. "FCIS,MMC Tx FPE Fragment Counter Interrupt status" "0,1" line.long 0x4 "ETH_MMC_FPE_TX_IMR,MMC FPE Tx interrupt mask register" bitfld.long 0x4 1. "HRCIM,MMC Transmit Hold Request Counter Interrupt Mask" "0,1" bitfld.long 0x4 0. "FCIM,MMC Transmit Fragment Counter Interrupt Mask" "0,1" rgroup.long 0x8A8++0x7 line.long 0x0 "ETH_MMC_FPE_TX_FCR,MMC FPE Tx fragment counter register" hexmask.long 0x0 0.--31. 1. "TXFFC,Tx FPE Fragment counter" line.long 0x4 "ETH_MMC_TX_HRCR,MMC Tx hold request counter register" hexmask.long 0x4 0.--31. 1. "TXHRC,Tx Hold Request Counter" rgroup.long 0x8C0++0x3 line.long 0x0 "ETH_MMC_FPE_RX_ISR,MMC FPE Rx interrupt status register" bitfld.long 0x0 3. "FCIS,MMC Rx FPE Fragment Counter Interrupt Status" "0,1" bitfld.long 0x0 2. "PAOCIS,MMC Rx Packet Assembly OK Counter Interrupt Status" "0,1" bitfld.long 0x0 1. "PSECIS,MMC Rx Packet SMD Error Counter Interrupt Status" "0,1" newline bitfld.long 0x0 0. "PAECIS,MMC Rx Packet Assembly Error Counter Interrupt Status" "0,1" group.long 0x8C4++0x3 line.long 0x0 "ETH_MMC_FPE_RX_IMR,MMC FPE Rx interrupt mask register" bitfld.long 0x0 3. "FCIM,MMC Rx FPE Fragment Counter Interrupt Mask" "0,1" bitfld.long 0x0 2. "PAOCIM,MMC Rx Packet Assembly OK Counter Interrupt Mask" "0,1" bitfld.long 0x0 1. "PSECIM,MMC Rx Packet SMD Error Counter Interrupt Mask" "0,1" newline bitfld.long 0x0 0. "PAECIM,MMC Rx Packet Assembly Error Counter Interrupt Mask" "0,1" rgroup.long 0x8C8++0xF line.long 0x0 "ETH_RX_PACKET_ASM_ERR,MMC Rx packet assembly error register" hexmask.long 0x0 0.--31. 1. "PAEC,Rx Packet Assembly Error Counter" line.long 0x4 "ETH_RX_PACKET_SMD_ERR,MMC Rx packet SMD error register" hexmask.long 0x4 0.--31. 1. "PSEC,Rx Packet SMD Error Counter" line.long 0x8 "ETH_RX_PACKET_ASM_OKR,MMC Rx packet assembly OK register" hexmask.long 0x8 0.--31. 1. "PAOC,Rx Packet Assembly OK Counter" line.long 0xC "ETH_RX_FPE_FRAG_CR,MMC Rx FPE fragments counter register" hexmask.long 0xC 0.--31. 1. "FFC,Rx FPE Fragment Counter" group.long 0x900++0x7 line.long 0x0 "ETH_MACL3L4C0R,L3 and L4 control 0 register" bitfld.long 0x0 28. "DMCHEN0,DMA Channel Select Enable" "0,1" bitfld.long 0x0 24. "DMCHN0,DMA Channel Number" "B_0x0,B_0x1" bitfld.long 0x0 21. "L4DPIM0,Layer 4 Destination Port Inverse Match Enable" "0,1" newline bitfld.long 0x0 20. "L4DPM0,Layer 4 Destination Port Match Enable" "0,1" bitfld.long 0x0 19. "L4SPIM0,Layer 4 Source Port Inverse Match Enable" "0,1" bitfld.long 0x0 18. "L4SPM0,Layer 4 Source Port Match Enable" "0,1" newline bitfld.long 0x0 16. "L4PEN0,Layer 4 Protocol Enable" "0,1" hexmask.long.byte 0x0 11.--15. 1. "L3HDBM0,Layer 3 IP DA higher bits match" hexmask.long.byte 0x0 6.--10. 1. "L3HSBM0,Layer 3 IP SA higher bits match" newline bitfld.long 0x0 5. "L3DAIM0,Layer 3 IP DA Inverse Match Enable" "0,1" bitfld.long 0x0 4. "L3DAM0,Layer 3 IP DA Match Enable" "0,1" bitfld.long 0x0 3. "L3SAIM0,Layer 3 IP SA Inverse Match Enable" "0,1" newline bitfld.long 0x0 2. "L3SAM0,Layer 3 IP SA Match Enable" "0,1" bitfld.long 0x0 0. "L3PEN0,Layer 3 Protocol Enable" "0,1" line.long 0x4 "ETH_MACL4A0R,Layer4 Address filter 0 register" hexmask.long.word 0x4 16.--31. 1. "L4DP0,Layer 4 Destination Port Number Field" hexmask.long.word 0x4 0.--15. 1. "L4SP0,Layer 4 Source Port Number Field" group.long 0x910++0xF line.long 0x0 "ETH_MACL3A00R,Layer3 Address 0 filter 0 register" hexmask.long 0x0 0.--31. 1. "L3A00,Layer 3 Address 0 Field" line.long 0x4 "ETH_MACL3A10R,Layer3 Address 1 filter 0 register" hexmask.long 0x4 0.--31. 1. "L3A10,Layer 3 Address 1 Field" line.long 0x8 "ETH_MACL3A20R,Layer3 Address 2 filter 0 register" hexmask.long 0x8 0.--31. 1. "L3A20,Layer 3 Address 2 Field" line.long 0xC "ETH_MACL3A30R,Layer3 Address 3 filter 0 register" hexmask.long 0xC 0.--31. 1. "L3A30,Layer 3 Address 3 Field" group.long 0x930++0x7 line.long 0x0 "ETH_MACL3L4C1R,L3 and L4 control 1 register" bitfld.long 0x0 28. "DMCHEN1,DMA Channel Select Enable" "0,1" bitfld.long 0x0 24. "DMCHN1,DMA Channel Number" "0,1" bitfld.long 0x0 21. "L4DPIM1,Layer 4 Destination Port Inverse Match Enable" "0,1" newline bitfld.long 0x0 20. "L4DPM1,Layer 4 Destination Port Match Enable" "0,1" bitfld.long 0x0 19. "L4SPIM1,Layer 4 Source Port Inverse Match Enable" "0,1" bitfld.long 0x0 18. "L4SPM1,Layer 4 Source Port Match Enable" "0,1" newline bitfld.long 0x0 16. "L4PEN1,Layer 4 Protocol Enable" "0,1" hexmask.long.byte 0x0 11.--15. 1. "L3HDBM1,Layer 3 IP DA higher bits match" hexmask.long.byte 0x0 6.--10. 1. "L3HSBM1,Layer 3 IP SA Higher Bits Match" newline bitfld.long 0x0 5. "L3DAIM1,Layer 3 IP DA Inverse Match Enable" "0,1" bitfld.long 0x0 4. "L3DAM1,Layer 3 IP DA Match Enable" "0,1" bitfld.long 0x0 3. "L3SAIM1,Layer 3 IP SA Inverse Match Enable" "0,1" newline bitfld.long 0x0 2. "L3SAM1,Layer 3 IP SA Match Enable" "0,1" bitfld.long 0x0 0. "L3PEN1,Layer 3 Protocol Enable" "0,1" line.long 0x4 "ETH_MACL4A1R,Layer 4 address filter 1 register" hexmask.long.word 0x4 16.--31. 1. "L4DP1,Layer 4 Destination Port Number Field" hexmask.long.word 0x4 0.--15. 1. "L4SP1,Layer 4 Source Port Number Field" group.long 0x940++0xF line.long 0x0 "ETH_MACL3A01R,Layer3 address 0 filter 1 Register" hexmask.long 0x0 0.--31. 1. "L3A01,Layer 3 Address 0 Field" line.long 0x4 "ETH_MACL3A11R,Layer3 address 1 filter 1 register" hexmask.long 0x4 0.--31. 1. "L3A11,Layer 3 Address 1 Field" line.long 0x8 "ETH_MACL3A21R,Layer3 address 2 filter 1 Register" hexmask.long 0x8 0.--31. 1. "L3A21,Layer 3 Address 2 Field" line.long 0xC "ETH_MACL3A31R,Layer3 address 3 filter 1 register" hexmask.long 0xC 0.--31. 1. "L3A31,Layer 3 Address 3 Field" group.long 0xA70++0x7 line.long 0x0 "ETH_MAC_IACR,MAC Indirect Access Control register" hexmask.long.byte 0x0 16.--19. 1. "MSEL,Mode Select" hexmask.long.byte 0x0 8.--15. 1. "AOFF,Address Offset" bitfld.long 0x0 5. "AUTO,Auto-increment" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "COM,Command type" "B_0x0,B_0x1" bitfld.long 0x0 0. "OB,Operation Busy." "0,1" line.long 0x4 "ETH_MAC_TMRQR,MAC type-based Rx Queue mapping register" bitfld.long 0x4 20. "PFEX,Preemption or Express Packet" "B_0x0,B_0x1" bitfld.long 0x4 16.--18. "TMRQ,Type Match Rx Queue Number" "0,1,2,3,4,5,6,7" hexmask.long.word 0x4 0.--15. 1. "TYP,Type field Value" group.long 0xB00++0x7 line.long 0x0 "ETH_MACTSCR,Timestamp control Register" bitfld.long 0x0 28. "AV8021ASMEN,AV 802." "0,1" bitfld.long 0x0 24. "TXTSSTSM,Transmit Timestamp Status Mode" "0,1" bitfld.long 0x0 20. "ESTI,External System Time Input" "0,1" newline bitfld.long 0x0 18. "TSENMACADDR,Enable MAC Address for PTP Packet Filtering" "0,1" bitfld.long 0x0 16.--17. "SNAPTYPSEL,Select PTP packets for Taking Snapshots" "0,1,2,3" bitfld.long 0x0 15. "TSMSTRENA,Enable Snapshot for Messages Relevant to Master" "0,1" newline bitfld.long 0x0 14. "TSEVNTENA,Enable Timestamp Snapshot for Event Messages" "0,1" bitfld.long 0x0 13. "TSIPV4ENA,Enable Processing of PTP Packets Sent over IPv4-UDP" "0,1" bitfld.long 0x0 12. "TSIPV6ENA,Enable Processing of PTP Packets Sent over IPv6-UDP" "0,1" newline bitfld.long 0x0 11. "TSIPENA,Enable Processing of PTP over Ethernet Packets" "0,1" bitfld.long 0x0 10. "TSVER2ENA,Enable PTP Packet Processing for Version 2 Format" "0,1" bitfld.long 0x0 9. "TSCTRLSSR,Timestamp Digital or Binary Rollover Control" "0,1" newline bitfld.long 0x0 8. "TSENALL,Enable Timestamp for All Packets" "0,1" bitfld.long 0x0 6. "PTGE,Presentation Time Generation Enable" "0,1" bitfld.long 0x0 5. "TSADDREG,Update Addend Register" "0,1" newline bitfld.long 0x0 3. "TSUPDT,Update Timestamp" "0,1" bitfld.long 0x0 2. "TSINIT,Initialize Timestamp" "0,1" bitfld.long 0x0 1. "TSCFUPDT,Fine or Coarse Timestamp Update" "0,1" newline bitfld.long 0x0 0. "TSENA,Enable Timestamp" "0,1" line.long 0x4 "ETH_MACSSIR,Subsecond increment register" hexmask.long.byte 0x4 16.--23. 1. "SSINC,Subsecond Increment Value" rgroup.long 0xB08++0x7 line.long 0x0 "ETH_MACSTSR,System time seconds register" hexmask.long 0x0 0.--31. 1. "TSS,Timestamp Second" line.long 0x4 "ETH_MACSTNR,System time nanoseconds register" hexmask.long 0x4 0.--30. 1. "TSSS,Timestamp subseconds" group.long 0xB10++0xB line.long 0x0 "ETH_MACSTSUR,System time seconds update register" hexmask.long 0x0 0.--31. 1. "TSS,Timestamp Seconds" line.long 0x4 "ETH_MACSTNUR,System time nanoseconds update register" bitfld.long 0x4 31. "ADDSUB,Add or Subtract Time" "0,1" hexmask.long 0x4 0.--30. 1. "TSSS,Timestamp subseconds" line.long 0x8 "ETH_MACTSAR,Timestamp addend register" hexmask.long 0x8 0.--31. 1. "TSAR,Timestamp Addend Register" group.long 0xB20++0xB line.long 0x0 "ETH_MACTSSR,Timestamp status register" hexmask.long.byte 0x0 25.--29. 1. "ATSNS,Number of Auxiliary Timestamp Snapshots" bitfld.long 0x0 24. "ATSSTM,Auxiliary Timestamp Snapshot Trigger Missed" "0,1" hexmask.long.byte 0x0 16.--19. 1. "ATSSTN,Auxiliary Timestamp Snapshot Trigger Identifier" newline bitfld.long 0x0 15. "TXTSSIS,Tx Timestamp Status Interrupt Status" "0,1" bitfld.long 0x0 5. "TSTRGTERR1,Timestamp Target Time Error" "0,1" bitfld.long 0x0 4. "TSTARGT1,Timestamp Target Time Reached" "0,1" newline bitfld.long 0x0 3. "TSTRGTERR0,Timestamp Target Time Error" "0,1" bitfld.long 0x0 2. "AUXTSTRIG,Auxiliary Timestamp Trigger Snapshot" "0,1" bitfld.long 0x0 1. "TSTARGT0,Timestamp Target Time Reached" "0,1" newline bitfld.long 0x0 0. "TSSOVF,Timestamp Seconds Overflow" "0,1" line.long 0x4 "ETH_MACRXDTI,Rx domain time increment register" hexmask.long.word 0x4 16.--31. 1. "RXNS,Receive domain time increment value in nanoseconds" line.long 0x8 "ETH_MACTXDTI,Tx domain time increment register" hexmask.long.word 0x8 16.--31. 1. "TXNS,Transmit domain time increment value in nanoseconds" group.long 0xB30++0x3 line.long 0x0 "ETH_MACTXTSSNR,Tx timestamp status nanoseconds register" rbitfld.long 0x0 31. "TXTSSMIS,Transmit Timestamp Status Missed" "0,1" hexmask.long 0x0 0.--30. 1. "TXTSSLO,Transmit Timestamp Status Low" rgroup.long 0xB34++0x3 line.long 0x0 "ETH_MACTXTSSSR,Tx timestamp status seconds register" hexmask.long 0x0 0.--31. 1. "TXTSSHI,Transmit Timestamp Status High" group.long 0xB40++0x3 line.long 0x0 "ETH_MACACR,Auxiliary control register" bitfld.long 0x0 7. "ATSEN3,Auxiliary Snapshot 3 Enable" "0,1" bitfld.long 0x0 6. "ATSEN2,Auxiliary Snapshot 2 Enable" "0,1" bitfld.long 0x0 5. "ATSEN1,Auxiliary Snapshot 1 Enable" "0,1" newline bitfld.long 0x0 4. "ATSEN0,Auxiliary Snapshot 0 Enable" "0,1" bitfld.long 0x0 0. "ATSFC,Auxiliary Snapshot FIFO Clear" "0,1" rgroup.long 0xB48++0x7 line.long 0x0 "ETH_MACATSNR,Auxiliary timestamp nanoseconds register" hexmask.long 0x0 0.--30. 1. "AUXTSLO,Auxiliary Timestamp" line.long 0x4 "ETH_MACATSSR,Auxiliary timestamp seconds register" hexmask.long 0x4 0.--31. 1. "AUXTSHI,Auxiliary Timestamp" group.long 0xB50++0xF line.long 0x0 "ETH_MACTSIACR,Timestamp Ingress asymmetric correction register" hexmask.long 0x0 0.--31. 1. "OSTIAC,One-Step Timestamp Ingress Asymmetry Correction" line.long 0x4 "ETH_MACTSEACR,Timestamp Egress asymmetric correction register" hexmask.long 0x4 0.--31. 1. "OSTEAC,One-Step Timestamp Egress Asymmetry Correction" line.long 0x8 "ETH_MACTSICNR,Timestamp Ingress correction nanosecond register" hexmask.long 0x8 0.--31. 1. "TSIC,Timestamp Ingress Correction" line.long 0xC "ETH_MACTSECNR,Timestamp Egress correction nanosecond register" hexmask.long 0xC 0.--31. 1. "TSEC,Timestamp Egress Correction" rgroup.long 0xB68++0x7 line.long 0x0 "ETH_MACTSILR,Timestamp Ingress Latency register" hexmask.long.word 0x0 16.--27. 1. "ITLNS,Ingress Timestamp Latency in nanoseconds" hexmask.long.byte 0x0 8.--15. 1. "ITLSNS,Ingress Timestamp Latency in subnanoseconds" line.long 0x4 "ETH_MACTSELR,Timestamp Egress Latency register" hexmask.long.word 0x4 16.--27. 1. "ETLNS,Egress Timestamp Latency in nanoseconds" hexmask.long.byte 0x4 8.--15. 1. "ETLSNS,Egress Timestamp Latency in subnanoseconds" group.long 0xB70++0x3 line.long 0x0 "ETH_MACPPSCR,PPS control register" bitfld.long 0x0 28. "TIMESEL,Time Select" "0,1" bitfld.long 0x0 7. "MCGREN0,MCGR Mode Enable for PPS0 Output" "B_0x0,B_0x1" bitfld.long 0x0 5.--6. "TRGTMODSEL0,Target Time Register Mode for PPS Output" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 4. "PPSEN0,Flexible PPS Output Mode Enable" "0,1" hexmask.long.byte 0x0 0.--3. 1. "PPSCTRL,PPS Output Frequency Control" group.long 0xB70++0x3 line.long 0x0 "ETH_MACPPSCR_ALTERNATE1,PPS control register" bitfld.long 0x0 28. "TIMESEL,Time Select" "0,1" bitfld.long 0x0 15. "MCGREN1,MCGR Mode Enable for PPS Output 1" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "TRGTMODSEL1,Target Time Register Mode for PPS Output 1" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x0 8.--11. 1. "PPSCMD1,Flexible PPS Output 1 Control" bitfld.long 0x0 7. "MCGREN0,MCGR Mode Enable for PPS Output 0" "B_0x0,B_0x1" bitfld.long 0x0 5.--6. "TRGTMODSEL0,Target Time Register Mode for PPS Output 0" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 4. "PPSEN0,Flexible PPS Output 0 Mode Enable" "0,1" hexmask.long.byte 0x0 0.--3. 1. "PPSCMD,Flexible PPS Output 0 (eth_ptp_pps_out) Control" group.long 0xB80++0x1F line.long 0x0 "ETH_MACPPSTTS0R,PPS 0 target time seconds register" hexmask.long 0x0 0.--31. 1. "TSTRH0,PPS Target Time Seconds Register" line.long 0x4 "ETH_MACPPSTTN0R,PPS 0 target time nanoseconds register" bitfld.long 0x4 31. "TRGTBUSY0,PPS Target Time Register Busy" "0,1" hexmask.long 0x4 0.--30. 1. "TTSL0,Target Time Low for PPS Register" line.long 0x8 "ETH_MACPPSI0R,PPS 0 interval register" hexmask.long 0x8 0.--31. 1. "PPSINT0,PPS Output Signal Interval" line.long 0xC "ETH_MACPPSW0R,PPS 0 width register" hexmask.long 0xC 0.--31. 1. "PPSWIDTH0,PPS Output Signal Width" line.long 0x10 "ETH_MACPPSTTS1R,PPS 1 target time seconds register" hexmask.long 0x10 0.--31. 1. "TSTRH0,PPS Target Time Seconds Register" line.long 0x14 "ETH_MACPPSTTN1R,PPS 1 target time nanoseconds register" bitfld.long 0x14 31. "TRGTBUSY0,PPS Target Time Register Busy" "0,1" hexmask.long 0x14 0.--30. 1. "TTSL0,Target Time Low for PPS Register" line.long 0x18 "ETH_MACPPSI1R,PPS 1 interval register" hexmask.long 0x18 0.--31. 1. "PPSINT0,PPS Output Signal Interval" line.long 0x1C "ETH_MACPPSW1R,PPS 1 width register" hexmask.long 0x1C 0.--31. 1. "PPSWIDTH0,PPS Output Signal Width" group.long 0xBC0++0x13 line.long 0x0 "ETH_MACPOCR,PTP Offload control register" hexmask.long.byte 0x0 8.--15. 1. "DN,Domain Number" bitfld.long 0x0 7. "PDRDIS,Disable Peer Delay Response response generation" "0,1" bitfld.long 0x0 6. "DRRDIS,Disable PTO Delay Request/Response response generation" "0,1" newline bitfld.long 0x0 5. "APDREQTRIG,Automatic PTP Pdelay_Req message Trigger" "0,1" bitfld.long 0x0 4. "ASYNCTRIG,Automatic PTP SYNC message Trigger" "0,1" bitfld.long 0x0 2. "APDREQEN,Automatic PTP Pdelay_Req message Enable" "0,1" newline bitfld.long 0x0 1. "ASYNCEN,Automatic PTP SYNC message Enable" "0,1" bitfld.long 0x0 0. "PTOEN,PTP Offload Enable" "0,1" line.long 0x4 "ETH_MACSPI0R,PTP Source Port Identity 0 Register" hexmask.long 0x4 0.--31. 1. "SPI0,Source Port Identity 0" line.long 0x8 "ETH_MACSPI1R,PTP Source port identity 1 register" hexmask.long 0x8 0.--31. 1. "SPI1,Source Port Identity 1" line.long 0xC "ETH_MACSPI2R,PTP Source port identity 2 register" hexmask.long.word 0xC 0.--15. 1. "SPI2,Source Port Identity 2" line.long 0x10 "ETH_MACLMIR,Log message interval register" hexmask.long.byte 0x10 24.--31. 1. "LMPDRI,Log Min Pdelay_Req Interval" bitfld.long 0x10 8.--10. "DRSYNCR,Delay_Req to SYNC Ratio" "B_0x0,B_0x1,?,?,?,?,?,?" hexmask.long.byte 0x10 0.--7. 1. "LSI,Log Sync Interval" group.long 0xC00++0x3 line.long 0x0 "ETH_MTLOMR,Operating mode register" bitfld.long 0x0 9. "CNTCLR,Counters Reset" "0,1" bitfld.long 0x0 8. "CNTPRST,Counters Preset" "0,1" bitfld.long 0x0 5.--6. "SCHALG,Tx Scheduling Algorithm" "B_0x0,?,?,B_0x3" newline bitfld.long 0x0 2. "RAA,Receive Arbitration Algorithm" "B_0x0,B_0x1" bitfld.long 0x0 1. "DTXSTS,Drop Transmit Status" "0,1" rgroup.long 0xC20++0x3 line.long 0x0 "ETH_MTLISR,Interrupt status register" bitfld.long 0x0 18. "ESTIS,EST (TAS- 802." "0,1" bitfld.long 0x0 3. "Q3IS,Queue 3 interrupt status" "0,1" bitfld.long 0x0 2. "Q2IS,Queue 2 interrupt status" "0,1" newline bitfld.long 0x0 1. "Q1IS,Queue 1 interrupt status" "0,1" bitfld.long 0x0 0. "Q0IS,Queue 0 interrupt status" "0,1" group.long 0xC30++0x3 line.long 0x0 "ETH_MTLRXQDMAMR,Rx Queue and DMA Channel Mapping register" bitfld.long 0x0 12. "Q1DDMACH,Queue 1 Enabled for DA-based DMA Channel Selection" "0,1" bitfld.long 0x0 8. "Q1MDMACH,Queue 1 Mapped to DMA Channel" "B_0x0,B_0x1" bitfld.long 0x0 4. "Q0DDMACH,Queue 0 Enabled for DA-based DMA Channel Selection" "0,1" newline bitfld.long 0x0 0. "Q0MDMACH,Queue 0 Mapped to DMA Channel" "B_0x0,B_0x1" group.long 0xC40++0x3 line.long 0x0 "ETH_MTLTBSCR,TBS control register" hexmask.long.tbyte 0x0 8.--31. 1. "LEOS,Launch Expiry Offset" bitfld.long 0x0 4.--6. "LEGOS,Launch Expiry GSN Offset" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "LEOV,Launch expiry offset valid" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "ESTM,EST offset mode" "B_0x0,B_0x1" group.long 0xC50++0xB line.long 0x0 "ETH_MTLESTCR,EST Control register" hexmask.long.byte 0x0 24.--31. 1. "PTOV,PTP Time Offset Value" hexmask.long.word 0x0 12.--23. 1. "CTOV,Current Time Offset Value" bitfld.long 0x0 8.--10. "TILS,Time Interval Left Shift Amount" "B_0x0,B_0x1,B_0x2,?,B_0x4,?,?,?" newline bitfld.long 0x0 6.--7. "LCSE,Loop Count to report Scheduling Error" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 5. "DFBS,Drop Frames causing Scheduling Error" "B_0x0,B_0x1" bitfld.long 0x0 4. "DDBF,Do not Drop frames during Frame Size Error" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "SSWL,Switch to S/W owned list" "0,1" bitfld.long 0x0 0. "EEST,Enable EST" "B_0x0,B_0x1" line.long 0x4 "ETH_MTLESTECR,EST Extended Control register" hexmask.long.byte 0x4 0.--5. 1. "OVHD,Overhead Bytes Value" line.long 0x8 "ETH_MTLESTSR,EST Status register" hexmask.long.byte 0x8 16.--19. 1. "CGSN,Current GCL slot number" hexmask.long.byte 0x8 8.--15. 1. "BTRL,BTR Error Loop Count" rbitfld.long 0x8 7. "SWOL,S/W owned list" "B_0x0,B_0x1" newline bitfld.long 0x8 4. "CGCE,Constant Gate Control Error" "B_0x0,B_0x1" rbitfld.long 0x8 3. "HLBS,Head-Of-Line Blocking due to Scheduling" "B_0x0,B_0x1" rbitfld.long 0x8 2. "HLBF,Head-Of-Line Blocking due to Frame Size" "0,1" newline bitfld.long 0x8 1. "BTRE,BTR Error" "B_0x0,B_0x1" bitfld.long 0x8 0. "SWLC,Switch to S/W owned list Complete" "B_0x0,B_0x1" group.long 0xC60++0x7 line.long 0x0 "ETH_MTLESTSCHER,EST Schedule Error register" hexmask.long.byte 0x0 0.--3. 1. "SEQN,Schedule Error Queue Number" line.long 0x4 "ETH_MTLESTFSER,EST Frame size Error register" hexmask.long.byte 0x4 0.--3. 1. "FEQN,Frame Size Error Queue Number" rgroup.long 0xC68++0x3 line.long 0x0 "ETH_MTLESTFSCR,EST Frame size Capture register" bitfld.long 0x0 16.--17. "HBFQ,Queue Number of HLBF" "0,1,2,3" hexmask.long.word 0x0 0.--14. 1. "HBFS,Frame Size of HLBF" group.long 0xC70++0x3 line.long 0x0 "ETH_MTLESTIER,EST Interrupt Enable register" bitfld.long 0x0 4. "CGCE,Interrupt Enable for CGCE" "0,1" bitfld.long 0x0 3. "IEHS,Interrupt Enable for HLBS" "0,1" bitfld.long 0x0 2. "IEHF,Interrupt Enable for HLBF" "0,1" newline bitfld.long 0x0 1. "IEBE,Interrupt Enable for BTR Error" "0,1" bitfld.long 0x0 0. "IECC,Interrupt Enable for Switch List" "0,1" group.long 0xC80++0x7 line.long 0x0 "ETH_MTLESTGCLCR,EST Gate Control List register" hexmask.long.byte 0x0 8.--13. 1. "ADDR,Gate Control List Address:" bitfld.long 0x0 5. "DBGB,Debug Mode Bank Select" "B_0x0,B_0x1" bitfld.long 0x0 4. "DBGM,Debug Mode" "0,1" newline bitfld.long 0x0 2. "GCRR,Gate Control Related registers" "0,1" bitfld.long 0x0 1. "R1W0,Read 1 Write 0" "B_0x0,B_0x1" bitfld.long 0x0 0. "SRWO,Start Read/Write Operation" "?,B_0x1" line.long 0x4 "ETH_MTLESTGCLDR,EST Gate Control List Data register" hexmask.long 0x4 0.--31. 1. "GCD,Gate Control Data" group.long 0xC90++0x7 line.long 0x0 "ETH_MTLFPECSR,FPE Frame Preemption Control Status register" bitfld.long 0x0 28. "HRS,Hold/Release Status" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--11. 1. "PEC,Preemption Classification" bitfld.long 0x0 7. "LBHT,Level-based Hold Transition" "0,1" newline bitfld.long 0x0 0.--1. "AFSZ,Additional Fragment Size" "0,1,2,3" line.long 0x4 "ETH_MTLFPEAR,FPE Frame Preemption Advance register" hexmask.long.word 0x4 16.--31. 1. "RADV,Release Advance" hexmask.long.word 0x4 0.--15. 1. "HADV,Hold Advance" group.long 0xD00++0x7 line.long 0x0 "ETH_MTLTXQ0OMR,T0 queue 0 operating mode register" hexmask.long.byte 0x0 16.--20. 1. "TQS,Transmit queue size" bitfld.long 0x0 4.--6. "TTC,Transmit Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 2.--3. "TXQEN,Transmit Queue Enable" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 1. "TSF,Transmit Store and Forward" "0,1" bitfld.long 0x0 0. "FTQ,Flush Transmit Queue" "0,1" line.long 0x4 "ETH_MTLTXQ0UR,T0 queue 0 underflow register" bitfld.long 0x4 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter" "0,1" hexmask.long.word 0x4 0.--10. 1. "UFFRMCNT,Underflow Packet Counter" rgroup.long 0xD08++0x3 line.long 0x0 "ETH_MTLTXQ0DR,T0 queue 0 debug register" bitfld.long 0x0 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--18. "PTXQ,Number of Packets in the Transmit Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status" "0,1" newline bitfld.long 0x0 4. "TXQSTS,MTL Tx Queue Not Empty Status" "0,1" bitfld.long 0x0 3. "TWCSTS,MTL Tx Queue Write Controller Status" "0,1" bitfld.long 0x0 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "TXQPAUSED,Transmit Queue in Pause" "0,1" rgroup.long 0xD14++0x3 line.long 0x0 "ETH_MTLTXQ0ESR,T0 queue 0 ETS status register" hexmask.long.tbyte 0x0 0.--23. 1. "ABS,Average Bits per Slot" group.long 0xD18++0x3 line.long 0x0 "ETH_MTLTXQ0QWR,T0 queue 0 quantum weight register" hexmask.long.word 0x0 0.--13. 1. "ISCQW,IdleSlopeCredit or Weights" group.long 0xD2C++0xB line.long 0x0 "ETH_MTLQ0ICSR,Queue 0 interrupt control status register" bitfld.long 0x0 24. "RXOIE,Receive Queue Overflow Interrupt Enable" "0,1" bitfld.long 0x0 16. "RXOVFIS,Receive Queue Overflow Interrupt Status" "0,1" bitfld.long 0x0 9. "ABPSIE,Average Bits Per Slot Interrupt Enable" "0,1" newline bitfld.long 0x0 8. "TXUIE,Transmit Queue Underflow Interrupt Enable" "0,1" bitfld.long 0x0 1. "ABPSIS,Average Bits Per Slot Interrupt Status" "0,1" bitfld.long 0x0 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status" "0,1" line.long 0x4 "ETH_MTLRXQ0OMR,R0 queue 0 operating mode register" hexmask.long.byte 0x4 20.--23. 1. "RQS,Receive Queue Size" bitfld.long 0x4 14.--16. "RFD,Threshold for Deactivating Flow Control (in Half-duplex and Full-duplex modes)" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 8.--10. "RFA,Threshold for Activating Flow Control (in Half-duplex and Full-duplex)" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 7. "EHFC,Enable Hardware Flow Control" "0,1" bitfld.long 0x4 6. "DIS_TCP_EF,Disable Dropping of TCP/IP Checksum Error Packets" "0,1" bitfld.long 0x4 5. "RSF,Receive Queue Store and Forward" "0,1" newline bitfld.long 0x4 4. "FEP,Forward Error Packets" "0,1" bitfld.long 0x4 3. "FUP,Forward Undersized Good Packets" "0,1" bitfld.long 0x4 0.--1. "RTC,Receive Queue Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "ETH_MTLRXQ0MPOCR,R0 queue 0 missed packet and overflow counter register" bitfld.long 0x8 27. "MISCNTOVF,Missed Packet Counter Overflow Bit" "0,1" hexmask.long.word 0x8 16.--26. 1. "MISPKTCNT,Missed Packet Counter" bitfld.long 0x8 11. "OVFCNTOVF,Overflow Counter Overflow Bit" "0,1" newline hexmask.long.word 0x8 0.--10. 1. "OVFPKTCNT,Overflow Packet Counter" rgroup.long 0xD38++0x3 line.long 0x0 "ETH_MTLRXQ0DR,R0 queue 0 debug register" hexmask.long.word 0x0 16.--29. 1. "PRXQ,Number of Packets in Receive Queue" bitfld.long 0x0 4.--5. "RXQSTS,MTL Rx Queue Fill-Level Status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "RRCSTS,MTL Rx Queue Read Controller State" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "RWCSTS,MTL Rx Queue Write Controller Active Status" "0,1" group.long 0xD3C++0xB line.long 0x0 "ETH_MTLRXQ0CR,R0 queue 0 control register" bitfld.long 0x0 3. "RXQ_FRM_ARBIT,Receive Queue Packet Arbitration" "0,1" bitfld.long 0x0 0.--2. "RXQ_WEGT,Receive Queue Weight" "0,1,2,3,4,5,6,7" line.long 0x4 "ETH_MTLTXQ1OMR,T1 queue 1 operating mode register" hexmask.long.byte 0x4 16.--20. 1. "TQS,Transmit queue size" bitfld.long 0x4 4.--6. "TTC,Transmit Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 2.--3. "TXQEN,Transmit Queue Enable" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 1. "TSF,Transmit Store and Forward" "0,1" bitfld.long 0x4 0. "FTQ,Flush Transmit Queue" "0,1" line.long 0x8 "ETH_MTLTXQ1UR,T1 queue 1 underflow register" bitfld.long 0x8 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter" "0,1" hexmask.long.word 0x8 0.--10. 1. "UFFRMCNT,Underflow Packet Counter" rgroup.long 0xD48++0x3 line.long 0x0 "ETH_MTLTXQ1DR,T1 queue 1 debug register" bitfld.long 0x0 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--18. "PTXQ,Number of Packets in the Transmit Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status" "0,1" newline bitfld.long 0x0 4. "TXQSTS,MTL Tx Queue Not Empty Status" "0,1" bitfld.long 0x0 3. "TWCSTS,MTL Tx Queue Write Controller Status" "0,1" bitfld.long 0x0 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "TXQPAUSED,Transmit Queue in Pause" "0,1" group.long 0xD50++0x3 line.long 0x0 "ETH_MTLTXQ1ECR,T1 queue 1 ETS control register" bitfld.long 0x0 4.--6. "SLC,Slot Count" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 3. "CC,Credit Control" "0,1" bitfld.long 0x0 2. "AVALG,AV Algorithm" "0,1" rgroup.long 0xD54++0x3 line.long 0x0 "ETH_MTLTXQ1ESR,T1 queue 1 ETS status register" hexmask.long.tbyte 0x0 0.--23. 1. "ABS,Average Bits per Slot" group.long 0xD58++0xF line.long 0x0 "ETH_MTLTXQ1QWR,T1 queue 1 quantum weight register" hexmask.long.word 0x0 0.--13. 1. "ISCQW,IdleSlopeCredit or Weights" line.long 0x4 "ETH_MTLTXQ1SSCR,T1 queue 1 send slope credit register" hexmask.long.word 0x4 0.--13. 1. "SSC,sendSlopeCredit Value" line.long 0x8 "ETH_MTLTXQ1HCR,T1 Queue 1 hiCredit register" hexmask.long 0x8 0.--28. 1. "HC,hiCredit Value" line.long 0xC "ETH_MTLTXQ1LCR,T1 queue 1 loCredit register" hexmask.long 0xC 0.--28. 1. "LC,loCredit Value" group.long 0xD6C++0xB line.long 0x0 "ETH_MTLQ1ICSR,Queue 1 interrupt control status register" bitfld.long 0x0 24. "RXOIE,Receive Queue Overflow Interrupt Enable" "0,1" bitfld.long 0x0 16. "RXOVFIS,Receive Queue Overflow Interrupt Status" "0,1" bitfld.long 0x0 9. "ABPSIE,Average Bits Per Slot Interrupt Enable" "0,1" newline bitfld.long 0x0 8. "TXUIE,Transmit Queue Underflow Interrupt Enable" "0,1" bitfld.long 0x0 1. "ABPSIS,Average Bits Per Slot Interrupt Status" "0,1" bitfld.long 0x0 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status" "0,1" line.long 0x4 "ETH_MTLRXQ1OMR,R1 queue 1 operating mode register" hexmask.long.byte 0x4 20.--23. 1. "RQS,Receive Queue Size" bitfld.long 0x4 14.--16. "RFD,Threshold for Deactivating Flow Control (in Half-duplex and Full-duplex modes)" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 8.--10. "RFA,Threshold for Activating Flow Control (in Half-duplex and Full-duplex)" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 7. "EHFC,Enable Hardware Flow Control" "0,1" bitfld.long 0x4 6. "DIS_TCP_EF,Disable Dropping of TCP/IP Checksum Error Packets" "0,1" bitfld.long 0x4 5. "RSF,Receive Queue Store and Forward" "0,1" newline bitfld.long 0x4 4. "FEP,Forward Error Packets" "0,1" bitfld.long 0x4 3. "FUP,Forward Undersized Good Packets" "0,1" bitfld.long 0x4 0.--1. "RTC,Receive Queue Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "ETH_MTLRXQ1MPOCR,R1 queue 1 missed packet and overflow counter register" bitfld.long 0x8 27. "MISCNTOVF,Missed Packet Counter Overflow Bit" "0,1" hexmask.long.word 0x8 16.--26. 1. "MISPKTCNT,Missed Packet Counter" bitfld.long 0x8 11. "OVFCNTOVF,Overflow Counter Overflow Bit" "0,1" newline hexmask.long.word 0x8 0.--10. 1. "OVFPKTCNT,Overflow Packet Counter" rgroup.long 0xD78++0x3 line.long 0x0 "ETH_MTLRXQ1DR,R1 queue 1 debug register" hexmask.long.word 0x0 16.--29. 1. "PRXQ,Number of Packets in Receive Queue" bitfld.long 0x0 4.--5. "RXQSTS,MTL Rx Queue Fill-Level Status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "RRCSTS,MTL Rx Queue Read Controller State" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "RWCSTS,MTL Rx Queue Write Controller Active Status" "0,1" group.long 0xD7C++0xB line.long 0x0 "ETH_MTLRXQ1CR,R1 queue 1 control register" bitfld.long 0x0 3. "RXQ_FRM_ARBIT,Receive Queue Packet Arbitration" "0,1" bitfld.long 0x0 0.--2. "RXQ_WEGT,Receive Queue Weight" "0,1,2,3,4,5,6,7" line.long 0x4 "ETH_MTLTXQ2OMR,T2 queue 2 operating mode register" hexmask.long.byte 0x4 16.--20. 1. "TQS,Transmit queue size" bitfld.long 0x4 4.--6. "TTC,Transmit Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 2.--3. "TXQEN,Transmit Queue Enable" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 1. "TSF,Transmit Store and Forward" "0,1" bitfld.long 0x4 0. "FTQ,Flush Transmit Queue" "0,1" line.long 0x8 "ETH_MTLTXQ2UR,T2 queue 2 underflow register" bitfld.long 0x8 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter" "0,1" hexmask.long.word 0x8 0.--10. 1. "UFFRMCNT,Underflow Packet Counter" rgroup.long 0xD88++0x3 line.long 0x0 "ETH_MTLTXQ2DR,T2 queue 2 debug register" bitfld.long 0x0 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--18. "PTXQ,Number of Packets in the Transmit Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status" "0,1" newline bitfld.long 0x0 4. "TXQSTS,MTL Tx Queue Not Empty Status" "0,1" bitfld.long 0x0 3. "TWCSTS,MTL Tx Queue Write Controller Status" "0,1" bitfld.long 0x0 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "TXQPAUSED,Transmit Queue in Pause" "0,1" group.long 0xD90++0x3 line.long 0x0 "ETH_MTLTXQ2ECR,T2 queue 2 ETS control register" bitfld.long 0x0 4.--6. "SLC,Slot Count" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 3. "CC,Credit Control" "0,1" bitfld.long 0x0 2. "AVALG,AV Algorithm" "0,1" rgroup.long 0xD94++0x3 line.long 0x0 "ETH_MTLTXQ2ESR,T2 queue 2 ETS status register" hexmask.long.tbyte 0x0 0.--23. 1. "ABS,Average Bits per Slot" group.long 0xD98++0xF line.long 0x0 "ETH_MTLTXQ2QWR,T2 queue 2 quantum weight register" hexmask.long.word 0x0 0.--13. 1. "ISCQW,IdleSlopeCredit or Weights" line.long 0x4 "ETH_MTLTXQ2SSCR,T2 queue 2 send slope credit register" hexmask.long.word 0x4 0.--13. 1. "SSC,sendSlopeCredit Value" line.long 0x8 "ETH_MTLTXQ2HCR,T2 Queue 2 hiCredit register" hexmask.long 0x8 0.--28. 1. "HC,hiCredit Value" line.long 0xC "ETH_MTLTXQ2LCR,T2 queue 2 loCredit register" hexmask.long 0xC 0.--28. 1. "LC,loCredit Value" group.long 0xDAC++0x3 line.long 0x0 "ETH_MTLQ2ICSR,Queue 2 interrupt control status register" bitfld.long 0x0 24. "RXOIE,Receive Queue Overflow Interrupt Enable" "0,1" bitfld.long 0x0 16. "RXOVFIS,Receive Queue Overflow Interrupt Status" "0,1" bitfld.long 0x0 9. "ABPSIE,Average Bits Per Slot Interrupt Enable" "0,1" newline bitfld.long 0x0 8. "TXUIE,Transmit Queue Underflow Interrupt Enable" "0,1" bitfld.long 0x0 1. "ABPSIS,Average Bits Per Slot Interrupt Status" "0,1" bitfld.long 0x0 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status" "0,1" group.long 0xDC0++0x7 line.long 0x0 "ETH_MTLTXQ3OMR,T3 queue 3 operating mode register" hexmask.long.byte 0x0 16.--20. 1. "TQS,Transmit queue size" bitfld.long 0x0 4.--6. "TTC,Transmit Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 2.--3. "TXQEN,Transmit Queue Enable" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 1. "TSF,Transmit Store and Forward" "0,1" bitfld.long 0x0 0. "FTQ,Flush Transmit Queue" "0,1" line.long 0x4 "ETH_MTLTXQ3UR,T3 queue 3 underflow register" bitfld.long 0x4 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter" "0,1" hexmask.long.word 0x4 0.--10. 1. "UFFRMCNT,Underflow Packet Counter" rgroup.long 0xDC8++0x3 line.long 0x0 "ETH_MTLTXQ3DR,T3 queue 3 debug register" bitfld.long 0x0 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--18. "PTXQ,Number of Packets in the Transmit Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status" "0,1" newline bitfld.long 0x0 4. "TXQSTS,MTL Tx Queue Not Empty Status" "0,1" bitfld.long 0x0 3. "TWCSTS,MTL Tx Queue Write Controller Status" "0,1" bitfld.long 0x0 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "TXQPAUSED,Transmit Queue in Pause" "0,1" group.long 0xDD0++0x3 line.long 0x0 "ETH_MTLTXQ3ECR,T3 queue 3 ETS control register" bitfld.long 0x0 4.--6. "SLC,Slot Count" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 3. "CC,Credit Control" "0,1" bitfld.long 0x0 2. "AVALG,AV Algorithm" "0,1" rgroup.long 0xDD4++0x3 line.long 0x0 "ETH_MTLTXQ3ESR,T3 queue 3 ETS status register" hexmask.long.tbyte 0x0 0.--23. 1. "ABS,Average Bits per Slot" group.long 0xDD8++0xF line.long 0x0 "ETH_MTLTXQ3QWR,T3 queue 3 quantum weight register" hexmask.long.word 0x0 0.--13. 1. "ISCQW,IdleSlopeCredit or Weights" line.long 0x4 "ETH_MTLTXQ3SSCR,T3 queue 3 send slope credit register" hexmask.long.word 0x4 0.--13. 1. "SSC,sendSlopeCredit Value" line.long 0x8 "ETH_MTLTXQ3HCR,T3 Queue 3 hiCredit register" hexmask.long 0x8 0.--28. 1. "HC,hiCredit Value" line.long 0xC "ETH_MTLTXQ3LCR,T3 queue 3 loCredit register" hexmask.long 0xC 0.--28. 1. "LC,loCredit Value" group.long 0xDEC++0x3 line.long 0x0 "ETH_MTLQ3ICSR,Queue 3 interrupt control status register" bitfld.long 0x0 24. "RXOIE,Receive Queue Overflow Interrupt Enable" "0,1" bitfld.long 0x0 16. "RXOVFIS,Receive Queue Overflow Interrupt Status" "0,1" bitfld.long 0x0 9. "ABPSIE,Average Bits Per Slot Interrupt Enable" "0,1" newline bitfld.long 0x0 8. "TXUIE,Transmit Queue Underflow Interrupt Enable" "0,1" bitfld.long 0x0 1. "ABPSIS,Average Bits Per Slot Interrupt Status" "0,1" bitfld.long 0x0 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status" "0,1" group.long 0x1000++0x7 line.long 0x0 "ETH_DMAMR,DMA mode register" bitfld.long 0x0 16.--17. "INTM,Interrupt Mode" "0,1,2,3" bitfld.long 0x0 11. "TXPR,Transmit priority" "0,1" bitfld.long 0x0 8. "DSPW,Descriptor Posted Write" "B_0x0,B_0x1" newline rbitfld.long 0x0 4. "TAA2,Transmit Arbitration Algorithm" "B_0x0,B_0x1" rbitfld.long 0x0 3. "TAA1,Transmit Arbitration Algorithm" "B_0x0,B_0x1" rbitfld.long 0x0 2. "TAA0,Transmit Arbitration Algorithm" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "SWR,Software Reset" "0,1" line.long 0x4 "ETH_DMASBMR,System bus mode register" bitfld.long 0x4 31. "EN_LPI,Enable Low Power Interface (LPI)" "0,1" bitfld.long 0x4 30. "LPI_XIT_PKT,Unlock on Magic Packet or Remote wake-up Packet" "0,1" bitfld.long 0x4 24.--25. "WR_OSR_LMT,AXI Maximum Write Outstanding Request Limit" "0,1,2,3" newline bitfld.long 0x4 16.--17. "RD_OSR_LMT,AXI Maximum Read Outstanding Request Limit" "0,1,2,3" bitfld.long 0x4 13. "ONEKBBE,1 Kbyte Boundary Crossing Enable for the AXI Master" "0,1" bitfld.long 0x4 12. "AAL,Address-Aligned Beats" "0,1" newline bitfld.long 0x4 10. "AALE,Automatic AXI LPI enable" "0,1" bitfld.long 0x4 7. "BLEN256,AXI Burst Length 256" "0,1" bitfld.long 0x4 6. "BLEN128,AXI Burst Length 128" "0,1" newline bitfld.long 0x4 5. "BLEN64,AXI Burst Length 64" "0,1" bitfld.long 0x4 4. "BLEN32,AXI Burst Length 32" "0,1" bitfld.long 0x4 3. "BLEN16,AXI Burst Length 16" "0,1" newline bitfld.long 0x4 2. "BLEN8,AXI Burst Length 8" "0,1" bitfld.long 0x4 1. "BLEN4,AXI Burst Length 4" "0,1" bitfld.long 0x4 0. "FB,Fixed Burst Length" "0,1" rgroup.long 0x1008++0xB line.long 0x0 "ETH_DMAISR,Interrupt status register" bitfld.long 0x0 17. "MACIS,MAC Interrupt Status" "0,1" bitfld.long 0x0 16. "MTLIS,MTL Interrupt Status" "0,1" bitfld.long 0x0 3. "DC3IS,DMA Channel 3 Interrupt Status" "0,1" newline bitfld.long 0x0 2. "DC2IS,DMA Channel 2 Interrupt Status" "0,1" bitfld.long 0x0 1. "DC1IS,DMA Channel 1 Interrupt Status" "0,1" bitfld.long 0x0 0. "DC0IS,DMA Channel Interrupt Status" "0,1" line.long 0x4 "ETH_DMADS1R,Debug status 1 register" hexmask.long.byte 0x4 28.--31. 1. "TPS2,DMA Channel 2 Transmit Process State" hexmask.long.byte 0x4 20.--23. 1. "TPS1,DMA Channel 1 Transmit Process State" hexmask.long.byte 0x4 16.--19. 1. "RPS1,DMA Channel 1 Receive Process State" newline hexmask.long.byte 0x4 12.--15. 1. "TPS0,DMA Channel Transmit Process State" hexmask.long.byte 0x4 8.--11. 1. "RPS0,DMA Channel Receive Process State" bitfld.long 0x4 1. "AXRHSTS,AXI Master Read Channel Status" "0,1" newline bitfld.long 0x4 0. "AXWHSTS,AXI Master Write Channel" "0,1" line.long 0x8 "ETH_DMADS2R,Debug status 2 register" hexmask.long.byte 0x8 4.--7. 1. "TPS3,DMA Channel 3 Transmit Process State" group.long 0x1020++0xB line.long 0x0 "ETH_DMAA4TXACR,AXI4 transmit channel ACE control register" hexmask.long.byte 0x0 16.--19. 1. "THC,Transmit DMA First Packet Buffer or TSO Header Cache Control" hexmask.long.byte 0x0 8.--11. 1. "TEC,Transmit DMA Extended Packet Buffer or TSO Payload Cache Control" hexmask.long.byte 0x0 0.--3. 1. "TDRC,Transmit DMA Read Descriptor Cache Control" line.long 0x4 "ETH_DMAA4RXACR,AXI4 receive channel ACE control register" hexmask.long.byte 0x4 24.--27. 1. "RDC,Receive DMA Buffer Cache Control" hexmask.long.byte 0x4 16.--19. 1. "RHC,Receive DMA Header Cache Control" hexmask.long.byte 0x4 8.--11. 1. "RPC,Receive DMA Payload Cache Control" newline hexmask.long.byte 0x4 0.--3. 1. "RDWC,Receive DMA Write Descriptor Cache Control" line.long 0x8 "ETH_DMAA4DACR,AXI4 descriptor ACE control register" hexmask.long.byte 0x8 8.--11. 1. "RDRC,Receive DMA Read Descriptor Cache control" bitfld.long 0x8 4.--5. "TDWD,Transmit DMA Write Descriptor Domain control" "0,1,2,3" hexmask.long.byte 0x8 0.--3. 1. "TDWC,Transmit DMA Write Descriptor Cache control" group.long 0x1040++0x3 line.long 0x0 "ETH_DMALPIEI,AXI4 LPI Entry Interval register" hexmask.long.byte 0x0 0.--3. 1. "LPIEI,LPI Entry Interval" group.long 0x1050++0x3 line.long 0x0 "ETH_DMATBSCTRL0R,DMA TBS control register 0" hexmask.long.tbyte 0x0 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0x0 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" group.long 0x1050++0xF line.long 0x0 "ETH_DMATBSCTRL0R_ALTERNATE1,DMA TBS control register 0" hexmask.long.tbyte 0x0 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0x0 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" line.long 0x4 "ETH_DMATBSCTRL1R,DMA TBS control register 1" hexmask.long.tbyte 0x4 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0x4 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" line.long 0x8 "ETH_DMATBSCTRL2R,DMA TBS control register 2" hexmask.long.tbyte 0x8 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0x8 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" line.long 0xC "ETH_DMATBSCTRL3R,DMA TBS control register 3" hexmask.long.tbyte 0xC 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0xC 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" group.long 0x1100++0xB line.long 0x0 "ETH_DMAC0CR,Channel 0 control register" bitfld.long 0x0 18.--20. "DSL,Descriptor Skip Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "PBLX8,8xPBL mode" "0,1" hexmask.long.word 0x0 0.--13. 1. "MSS,Maximum Segment Size" line.long 0x4 "ETH_DMAC0TXCR,Channel 0 transmit control register" bitfld.long 0x4 30. "TFSEL1,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 29. "TFSEL0,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 28. "EDSE,Enhanced Descriptor Enable" "0,1" newline hexmask.long.byte 0x4 24.--27. 1. "TQOS,Transmit QOS" hexmask.long.byte 0x4 16.--21. 1. "TXPBL,Transmit Programmable Burst Length" bitfld.long 0x4 15. "IPBL,Ignore PBL Requirement" "0,1" newline bitfld.long 0x4 12. "TSE,TCP Segmentation Enabled" "0,1" bitfld.long 0x4 4. "OSF,Operate on Second Packet" "0,1" rbitfld.long 0x4 1.--3. "TCW,Transmit Channel Weight" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0. "ST,Start or Stop Transmission Command" "0,1" line.long 0x8 "ETH_DMAC0RXCR,Channel 0 receive control register" bitfld.long 0x8 31. "RPF,DMA Rx Channel x Packet Flush" "0,1" hexmask.long.byte 0x8 24.--27. 1. "RQOS,Rx AXI4 QOS." hexmask.long.byte 0x8 16.--21. 1. "RXPBL,Receive Programmable Burst Length" newline hexmask.long.word 0x8 1.--14. 1. "RBSZ,Receive Buffer size" bitfld.long 0x8 0. "SR,Start or Stop Receive" "0,1" group.long 0x1114++0x3 line.long 0x0 "ETH_DMAC0TXDLAR,Channel 0 T0 descriptor list address register" hexmask.long 0x0 0.--31. 1. "TDESLA,Start of Transmit List" group.long 0x111C++0x7 line.long 0x0 "ETH_DMAC0RXDLAR,Channel 0 R0 descriptor list address register" hexmask.long 0x0 0.--31. 1. "RDESLA,Start of Receive List" line.long 0x4 "ETH_DMAC0TXDTPR,Channel 0 T0 descriptor tail pointer register" hexmask.long 0x4 0.--31. 1. "TDT,Transmit Descriptor Tail Pointer" group.long 0x1128++0x17 line.long 0x0 "ETH_DMAC0RXDTPR,Channel 0 R0 descriptor tail pointer register" hexmask.long 0x0 0.--31. 1. "RDT,Receive Descriptor Tail Pointer" line.long 0x4 "ETH_DMAC0TXRLR,Channel 0 T0 descriptor ring length register" hexmask.long.word 0x4 0.--9. 1. "TDRL,Transmit Descriptor Ring Length" line.long 0x8 "ETH_DMAC0RXRLR,Channel 0 R0 descriptor ring length register" hexmask.long.byte 0x8 17.--23. 1. "ARBS,Alternate Receive Buffer Size" hexmask.long.word 0x8 0.--9. 1. "RDRL,Receive Descriptor Ring Length" line.long 0xC "ETH_DMAC0IER,Channel 0 interrupt enable register" bitfld.long 0xC 15. "NIE,Normal Interrupt Summary Enable" "0,1" bitfld.long 0xC 14. "AIE,Abnormal Interrupt Summary Enable" "0,1" bitfld.long 0xC 13. "CDEE,Context Descriptor Error Enable" "0,1" newline bitfld.long 0xC 12. "FBEE,Fatal Bus Error Enable" "0,1" bitfld.long 0xC 11. "ERIE,Early Receive Interrupt Enable" "0,1" bitfld.long 0xC 10. "ETIE,Early Transmit Interrupt Enable" "0,1" newline bitfld.long 0xC 9. "RWTE,Receive Watchdog Timeout Enable" "0,1" bitfld.long 0xC 8. "RSE,Receive Stopped Enable" "0,1" bitfld.long 0xC 7. "RBUE,Receive Buffer Unavailable Enable" "0,1" newline bitfld.long 0xC 6. "RIE,Receive Interrupt Enable" "0,1" bitfld.long 0xC 2. "TBUE,Transmit Buffer Unavailable Enable" "0,1" bitfld.long 0xC 1. "TXSE,Transmit Stopped Enable" "0,1" newline bitfld.long 0xC 0. "TIE,Transmit Interrupt Enable" "0,1" line.long 0x10 "ETH_DMAC0RXIWTR,Channel 0 R0 interrupt watchdog timer register" bitfld.long 0x10 16.--17. "RWTU,Receive Interrupt Watchdog Timer Count Units" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x10 0.--7. 1. "RWT,Receive Interrupt Watchdog Timer Count" line.long 0x14 "ETH_DMAC0SFCSR,Channel 0 slot function control status register" hexmask.long.byte 0x14 16.--19. 1. "RSN,Reference Slot Number" hexmask.long.word 0x14 4.--15. 1. "SIV,Slot Interval Value" bitfld.long 0x14 1. "ASC,Advance Slot Check" "0,1" newline bitfld.long 0x14 0. "ESC,Enable Slot Comparison" "0,1" rgroup.long 0x1144++0x3 line.long 0x0 "ETH_DMAC0CATXDR,Channel 0 current application transmit descriptor register" hexmask.long 0x0 0.--31. 1. "CURTDESAPTR,Application Transmit Descriptor Address Pointer" rgroup.long 0x114C++0x3 line.long 0x0 "ETH_DMAC0CARXDR,Channel 0 current application receive descriptor register" hexmask.long 0x0 0.--31. 1. "CURRDESAPTR,Application Receive Descriptor Address Pointer" rgroup.long 0x1154++0x3 line.long 0x0 "ETH_DMAC0CATXBR,Channel 0 current application transmit buffer register" hexmask.long 0x0 0.--31. 1. "CURTBUFAPTR,Application Transmit Buffer Address Pointer" rgroup.long 0x115C++0x3 line.long 0x0 "ETH_DMAC0CARXBR,Channel 0 current application receive buffer register" hexmask.long 0x0 0.--31. 1. "CURRBUFAPTR,Application Receive Buffer Address Pointer" group.long 0x1160++0x7 line.long 0x0 "ETH_DMAC0SR,Channel 0 status register" rbitfld.long 0x0 19.--21. "REB,Rx DMA Error Bits" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 16.--18. "TEB,Tx DMA Error Bits" "0,1,2,3,4,5,6,7" bitfld.long 0x0 15. "NIS,Normal Interrupt Summary" "0,1" newline bitfld.long 0x0 14. "AIS,Abnormal Interrupt Summary" "0,1" bitfld.long 0x0 13. "CDE,Context Descriptor Error" "0,1" bitfld.long 0x0 12. "FBE,Fatal Bus Error" "0,1" newline bitfld.long 0x0 11. "ERI,Early Receive Interrupt" "0,1" bitfld.long 0x0 10. "ETI,Early Transmit Interrupt" "0,1" bitfld.long 0x0 9. "RWT,Receive Watchdog Timeout" "0,1" newline bitfld.long 0x0 8. "RPS,Receive Process Stopped" "0,1" bitfld.long 0x0 7. "RBU,Receive Buffer Unavailable" "0,1" bitfld.long 0x0 6. "RI,Receive Interrupt" "0,1" newline bitfld.long 0x0 2. "TBU,Transmit Buffer Unavailable" "0,1" bitfld.long 0x0 1. "TPS,Transmit Process Stopped" "0,1" bitfld.long 0x0 0. "TI,Transmit Interrupt" "0,1" line.long 0x4 "ETH_DMAC0MFCR,Channel 0 missed frame count register" bitfld.long 0x4 15. "MFCO,Overflow status of the MFC Counter" "0,1" hexmask.long.word 0x4 0.--10. 1. "MFC,Dropped Packet Counters" group.long 0x1180++0xB line.long 0x0 "ETH_DMAC1CR,Channel 1 control register" bitfld.long 0x0 18.--20. "DSL,Descriptor Skip Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "PBLX8,8xPBL mode" "0,1" hexmask.long.word 0x0 0.--13. 1. "MSS,Maximum Segment Size" line.long 0x4 "ETH_DMAC1TXCR,Channel 1 transmit control register" bitfld.long 0x4 30. "TFSEL1,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 29. "TFSEL0,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 28. "EDSE,Enhanced Descriptor Enable" "0,1" newline hexmask.long.byte 0x4 24.--27. 1. "TQOS,Transmit QOS" hexmask.long.byte 0x4 16.--21. 1. "TXPBL,Transmit Programmable Burst Length" bitfld.long 0x4 15. "IPBL,Ignore PBL Requirement" "0,1" newline bitfld.long 0x4 12. "TSE,TCP Segmentation Enabled" "0,1" bitfld.long 0x4 4. "OSF,Operate on Second Packet" "0,1" rbitfld.long 0x4 1.--3. "TCW,Transmit Channel Weight" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0. "ST,Start or Stop Transmission Command" "0,1" line.long 0x8 "ETH_DMAC1RXCR,Channel 1 receive control register" bitfld.long 0x8 31. "RPF,DMA Rx Channel x Packet Flush" "0,1" hexmask.long.byte 0x8 24.--27. 1. "RQOS,Rx AXI4 QOS." hexmask.long.byte 0x8 16.--21. 1. "RXPBL,Receive Programmable Burst Length" newline hexmask.long.word 0x8 1.--14. 1. "RBSZ,Receive Buffer size" bitfld.long 0x8 0. "SR,Start or Stop Receive" "0,1" group.long 0x1194++0x3 line.long 0x0 "ETH_DMAC1TXDLAR,Channel 1 T1 descriptor list address register" hexmask.long 0x0 0.--31. 1. "TDESLA,Start of Transmit List" group.long 0x119C++0x7 line.long 0x0 "ETH_DMAC1RXDLAR,Channel 1 R1 descriptor list address register" hexmask.long 0x0 0.--31. 1. "RDESLA,Start of Receive List" line.long 0x4 "ETH_DMAC1TXDTPR,Channel 1 T1 descriptor tail pointer register" hexmask.long 0x4 0.--31. 1. "TDT,Transmit Descriptor Tail Pointer" group.long 0x11A8++0x17 line.long 0x0 "ETH_DMAC1RXDTPR,Channel 1 R1 descriptor tail pointer register" hexmask.long 0x0 0.--31. 1. "RDT,Receive Descriptor Tail Pointer" line.long 0x4 "ETH_DMAC1TXRLR,Channel 1 T1 descriptor ring length register" hexmask.long.word 0x4 0.--9. 1. "TDRL,Transmit Descriptor Ring Length" line.long 0x8 "ETH_DMAC1RXRLR,Channel 1 R1 descriptor ring length register" hexmask.long.byte 0x8 17.--23. 1. "ARBS,Alternate Receive Buffer Size" hexmask.long.word 0x8 0.--9. 1. "RDRL,Receive Descriptor Ring Length" line.long 0xC "ETH_DMAC1IER,Channel 1 interrupt enable register" bitfld.long 0xC 15. "NIE,Normal Interrupt Summary Enable" "0,1" bitfld.long 0xC 14. "AIE,Abnormal Interrupt Summary Enable" "0,1" bitfld.long 0xC 13. "CDEE,Context Descriptor Error Enable" "0,1" newline bitfld.long 0xC 12. "FBEE,Fatal Bus Error Enable" "0,1" bitfld.long 0xC 11. "ERIE,Early Receive Interrupt Enable" "0,1" bitfld.long 0xC 10. "ETIE,Early Transmit Interrupt Enable" "0,1" newline bitfld.long 0xC 9. "RWTE,Receive Watchdog Timeout Enable" "0,1" bitfld.long 0xC 8. "RSE,Receive Stopped Enable" "0,1" bitfld.long 0xC 7. "RBUE,Receive Buffer Unavailable Enable" "0,1" newline bitfld.long 0xC 6. "RIE,Receive Interrupt Enable" "0,1" bitfld.long 0xC 2. "TBUE,Transmit Buffer Unavailable Enable" "0,1" bitfld.long 0xC 1. "TXSE,Transmit Stopped Enable" "0,1" newline bitfld.long 0xC 0. "TIE,Transmit Interrupt Enable" "0,1" line.long 0x10 "ETH_DMAC1RXIWTR,Channel 1 R1 interrupt watchdog timer register" bitfld.long 0x10 16.--17. "RWTU,Receive Interrupt Watchdog Timer Count Units" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x10 0.--7. 1. "RWT,Receive Interrupt Watchdog Timer Count" line.long 0x14 "ETH_DMAC1SFCSR,Channel 1 slot function control status register" hexmask.long.byte 0x14 16.--19. 1. "RSN,Reference Slot Number" hexmask.long.word 0x14 4.--15. 1. "SIV,Slot Interval Value" bitfld.long 0x14 1. "ASC,Advance Slot Check" "0,1" newline bitfld.long 0x14 0. "ESC,Enable Slot Comparison" "0,1" rgroup.long 0x11C4++0x3 line.long 0x0 "ETH_DMAC1CATXDR,Channel 1 current application transmit descriptor register" hexmask.long 0x0 0.--31. 1. "CURTDESAPTR,Application Transmit Descriptor Address Pointer" rgroup.long 0x11CC++0x3 line.long 0x0 "ETH_DMAC1CARXDR,Channel 1 current application receive descriptor register" hexmask.long 0x0 0.--31. 1. "CURRDESAPTR,Application Receive Descriptor Address Pointer" rgroup.long 0x11D4++0x3 line.long 0x0 "ETH_DMAC1CATXBR,Channel 1 current application transmit buffer register" hexmask.long 0x0 0.--31. 1. "CURTBUFAPTR,Application Transmit Buffer Address Pointer" rgroup.long 0x11DC++0x3 line.long 0x0 "ETH_DMAC1CARXBR,Channel 1 current application receive buffer register" hexmask.long 0x0 0.--31. 1. "CURRBUFAPTR,Application Receive Buffer Address Pointer" group.long 0x11E0++0x7 line.long 0x0 "ETH_DMAC1SR,Channel 1 status register" rbitfld.long 0x0 19.--21. "REB,Rx DMA Error Bits" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 16.--18. "TEB,Tx DMA Error Bits" "0,1,2,3,4,5,6,7" bitfld.long 0x0 15. "NIS,Normal Interrupt Summary" "0,1" newline bitfld.long 0x0 14. "AIS,Abnormal Interrupt Summary" "0,1" bitfld.long 0x0 13. "CDE,Context Descriptor Error" "0,1" bitfld.long 0x0 12. "FBE,Fatal Bus Error" "0,1" newline bitfld.long 0x0 11. "ERI,Early Receive Interrupt" "0,1" bitfld.long 0x0 10. "ETI,Early Transmit Interrupt" "0,1" bitfld.long 0x0 9. "RWT,Receive Watchdog Timeout" "0,1" newline bitfld.long 0x0 8. "RPS,Receive Process Stopped" "0,1" bitfld.long 0x0 7. "RBU,Receive Buffer Unavailable" "0,1" bitfld.long 0x0 6. "RI,Receive Interrupt" "0,1" newline bitfld.long 0x0 2. "TBU,Transmit Buffer Unavailable" "0,1" bitfld.long 0x0 1. "TPS,Transmit Process Stopped" "0,1" bitfld.long 0x0 0. "TI,Transmit Interrupt" "0,1" line.long 0x4 "ETH_DMAC1MFCR,Channel 1 missed frame count register" bitfld.long 0x4 15. "MFCO,Overflow status of the MFC Counter" "0,1" hexmask.long.word 0x4 0.--10. 1. "MFC,Dropped Packet Counters" group.long 0x1200++0x7 line.long 0x0 "ETH_DMAC2CR,Channel 2 control register" bitfld.long 0x0 18.--20. "DSL,Descriptor Skip Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "PBLX8,8xPBL mode" "0,1" hexmask.long.word 0x0 0.--13. 1. "MSS,Maximum Segment Size" line.long 0x4 "ETH_DMAC2TXCR,Channel 2 transmit control register" bitfld.long 0x4 30. "TFSEL1,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 29. "TFSEL0,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 28. "EDSE,Enhanced Descriptor Enable" "0,1" newline hexmask.long.byte 0x4 24.--27. 1. "TQOS,Transmit QOS" hexmask.long.byte 0x4 16.--21. 1. "TXPBL,Transmit Programmable Burst Length" bitfld.long 0x4 15. "IPBL,Ignore PBL Requirement" "0,1" newline bitfld.long 0x4 12. "TSE,TCP Segmentation Enabled" "0,1" bitfld.long 0x4 4. "OSF,Operate on Second Packet" "0,1" rbitfld.long 0x4 1.--3. "TCW,Transmit Channel Weight" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0. "ST,Start or Stop Transmission Command" "0,1" group.long 0x1214++0x3 line.long 0x0 "ETH_DMAC2TXDLAR,Channel 2 T2 descriptor list address register" hexmask.long 0x0 0.--31. 1. "TDESLA,Start of Transmit List" group.long 0x1220++0x3 line.long 0x0 "ETH_DMAC2TXDTPR,Channel 2 T2 descriptor tail pointer register" hexmask.long 0x0 0.--31. 1. "TDT,Transmit Descriptor Tail Pointer" group.long 0x122C++0x3 line.long 0x0 "ETH_DMAC2TXRLR,Channel 2 T2 descriptor ring length register" hexmask.long.word 0x0 0.--9. 1. "TDRL,Transmit Descriptor Ring Length" group.long 0x1234++0x3 line.long 0x0 "ETH_DMAC2IER,Channel 2 interrupt enable register" bitfld.long 0x0 15. "NIE,Normal Interrupt Summary Enable" "0,1" bitfld.long 0x0 14. "AIE,Abnormal Interrupt Summary Enable" "0,1" bitfld.long 0x0 13. "CDEE,Context Descriptor Error Enable" "0,1" newline bitfld.long 0x0 12. "FBEE,Fatal Bus Error Enable" "0,1" bitfld.long 0x0 11. "ERIE,Early Receive Interrupt Enable" "0,1" bitfld.long 0x0 10. "ETIE,Early Transmit Interrupt Enable" "0,1" newline bitfld.long 0x0 9. "RWTE,Receive Watchdog Timeout Enable" "0,1" bitfld.long 0x0 8. "RSE,Receive Stopped Enable" "0,1" bitfld.long 0x0 7. "RBUE,Receive Buffer Unavailable Enable" "0,1" newline bitfld.long 0x0 6. "RIE,Receive Interrupt Enable" "0,1" bitfld.long 0x0 2. "TBUE,Transmit Buffer Unavailable Enable" "0,1" bitfld.long 0x0 1. "TXSE,Transmit Stopped Enable" "0,1" newline bitfld.long 0x0 0. "TIE,Transmit Interrupt Enable" "0,1" group.long 0x123C++0x3 line.long 0x0 "ETH_DMAC2SFCSR,Channel 2 slot function control status register" hexmask.long.byte 0x0 16.--19. 1. "RSN,Reference Slot Number" hexmask.long.word 0x0 4.--15. 1. "SIV,Slot Interval Value" bitfld.long 0x0 1. "ASC,Advance Slot Check" "0,1" newline bitfld.long 0x0 0. "ESC,Enable Slot Comparison" "0,1" rgroup.long 0x1244++0x3 line.long 0x0 "ETH_DMAC2CATXDR,Channel 2 current application transmit descriptor register" hexmask.long 0x0 0.--31. 1. "CURTDESAPTR,Application Transmit Descriptor Address Pointer" rgroup.long 0x1254++0x3 line.long 0x0 "ETH_DMAC2CATXBR,Channel 2 current application transmit buffer register" hexmask.long 0x0 0.--31. 1. "CURTBUFAPTR,Application Transmit Buffer Address Pointer" group.long 0x1260++0x3 line.long 0x0 "ETH_DMAC2SR,Channel 2 status register" rbitfld.long 0x0 19.--21. "REB,Rx DMA Error Bits" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 16.--18. "TEB,Tx DMA Error Bits" "0,1,2,3,4,5,6,7" bitfld.long 0x0 15. "NIS,Normal Interrupt Summary" "0,1" newline bitfld.long 0x0 14. "AIS,Abnormal Interrupt Summary" "0,1" bitfld.long 0x0 13. "CDE,Context Descriptor Error" "0,1" bitfld.long 0x0 12. "FBE,Fatal Bus Error" "0,1" newline bitfld.long 0x0 11. "ERI,Early Receive Interrupt" "0,1" bitfld.long 0x0 10. "ETI,Early Transmit Interrupt" "0,1" bitfld.long 0x0 9. "RWT,Receive Watchdog Timeout" "0,1" newline bitfld.long 0x0 8. "RPS,Receive Process Stopped" "0,1" bitfld.long 0x0 7. "RBU,Receive Buffer Unavailable" "0,1" bitfld.long 0x0 6. "RI,Receive Interrupt" "0,1" newline bitfld.long 0x0 2. "TBU,Transmit Buffer Unavailable" "0,1" bitfld.long 0x0 1. "TPS,Transmit Process Stopped" "0,1" bitfld.long 0x0 0. "TI,Transmit Interrupt" "0,1" group.long 0x1280++0x7 line.long 0x0 "ETH_DMAC3CR,Channel 3 control register" bitfld.long 0x0 18.--20. "DSL,Descriptor Skip Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "PBLX8,8xPBL mode" "0,1" hexmask.long.word 0x0 0.--13. 1. "MSS,Maximum Segment Size" line.long 0x4 "ETH_DMAC3TXCR,Channel 3 transmit control register" bitfld.long 0x4 30. "TFSEL1,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 29. "TFSEL0,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 28. "EDSE,Enhanced Descriptor Enable" "0,1" newline hexmask.long.byte 0x4 24.--27. 1. "TQOS,Transmit QOS" hexmask.long.byte 0x4 16.--21. 1. "TXPBL,Transmit Programmable Burst Length" bitfld.long 0x4 15. "IPBL,Ignore PBL Requirement" "0,1" newline bitfld.long 0x4 12. "TSE,TCP Segmentation Enabled" "0,1" bitfld.long 0x4 4. "OSF,Operate on Second Packet" "0,1" rbitfld.long 0x4 1.--3. "TCW,Transmit Channel Weight" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0. "ST,Start or Stop Transmission Command" "0,1" group.long 0x1294++0x3 line.long 0x0 "ETH_DMAC3TXDLAR,Channel 3 T3 descriptor list address register" hexmask.long 0x0 0.--31. 1. "TDESLA,Start of Transmit List" group.long 0x12A0++0x3 line.long 0x0 "ETH_DMAC3TXDTPR,Channel 3 T3 descriptor tail pointer register" hexmask.long 0x0 0.--31. 1. "TDT,Transmit Descriptor Tail Pointer" group.long 0x12AC++0x3 line.long 0x0 "ETH_DMAC3TXRLR,Channel 3 T3 descriptor ring length register" hexmask.long.word 0x0 0.--9. 1. "TDRL,Transmit Descriptor Ring Length" group.long 0x12B4++0x3 line.long 0x0 "ETH_DMAC3IER,Channel 3 interrupt enable register" bitfld.long 0x0 15. "NIE,Normal Interrupt Summary Enable" "0,1" bitfld.long 0x0 14. "AIE,Abnormal Interrupt Summary Enable" "0,1" bitfld.long 0x0 13. "CDEE,Context Descriptor Error Enable" "0,1" newline bitfld.long 0x0 12. "FBEE,Fatal Bus Error Enable" "0,1" bitfld.long 0x0 11. "ERIE,Early Receive Interrupt Enable" "0,1" bitfld.long 0x0 10. "ETIE,Early Transmit Interrupt Enable" "0,1" newline bitfld.long 0x0 9. "RWTE,Receive Watchdog Timeout Enable" "0,1" bitfld.long 0x0 8. "RSE,Receive Stopped Enable" "0,1" bitfld.long 0x0 7. "RBUE,Receive Buffer Unavailable Enable" "0,1" newline bitfld.long 0x0 6. "RIE,Receive Interrupt Enable" "0,1" bitfld.long 0x0 2. "TBUE,Transmit Buffer Unavailable Enable" "0,1" bitfld.long 0x0 1. "TXSE,Transmit Stopped Enable" "0,1" newline bitfld.long 0x0 0. "TIE,Transmit Interrupt Enable" "0,1" group.long 0x12BC++0x3 line.long 0x0 "ETH_DMAC3SFCSR,Channel 3 slot function control status register" hexmask.long.byte 0x0 16.--19. 1. "RSN,Reference Slot Number" hexmask.long.word 0x0 4.--15. 1. "SIV,Slot Interval Value" bitfld.long 0x0 1. "ASC,Advance Slot Check" "0,1" newline bitfld.long 0x0 0. "ESC,Enable Slot Comparison" "0,1" rgroup.long 0x12C4++0x3 line.long 0x0 "ETH_DMAC3CATXDR,Channel 3 current application transmit descriptor register" hexmask.long 0x0 0.--31. 1. "CURTDESAPTR,Application Transmit Descriptor Address Pointer" rgroup.long 0x12D4++0x3 line.long 0x0 "ETH_DMAC3CATXBR,Channel 3 current application transmit buffer register" hexmask.long 0x0 0.--31. 1. "CURTBUFAPTR,Application Transmit Buffer Address Pointer" group.long 0x12E0++0x3 line.long 0x0 "ETH_DMAC3SR,Channel 3 status register" rbitfld.long 0x0 19.--21. "REB,Rx DMA Error Bits" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 16.--18. "TEB,Tx DMA Error Bits" "0,1,2,3,4,5,6,7" bitfld.long 0x0 15. "NIS,Normal Interrupt Summary" "0,1" newline bitfld.long 0x0 14. "AIS,Abnormal Interrupt Summary" "0,1" bitfld.long 0x0 13. "CDE,Context Descriptor Error" "0,1" bitfld.long 0x0 12. "FBE,Fatal Bus Error" "0,1" newline bitfld.long 0x0 11. "ERI,Early Receive Interrupt" "0,1" bitfld.long 0x0 10. "ETI,Early Transmit Interrupt" "0,1" bitfld.long 0x0 9. "RWT,Receive Watchdog Timeout" "0,1" newline bitfld.long 0x0 8. "RPS,Receive Process Stopped" "0,1" bitfld.long 0x0 7. "RBU,Receive Buffer Unavailable" "0,1" bitfld.long 0x0 6. "RI,Receive Interrupt" "0,1" newline bitfld.long 0x0 2. "TBU,Transmit Buffer Unavailable" "0,1" bitfld.long 0x0 1. "TPS,Transmit Process Stopped" "0,1" bitfld.long 0x0 0. "TI,Transmit Interrupt" "0,1" tree.end tree "ETH2" base ad:0x482D0000 group.long 0x0++0x17 line.long 0x0 "ETH_MACCR,Operating mode configuration register" bitfld.long 0x0 31. "ARPEN,ARP Offload Enable" "0,1" bitfld.long 0x0 28.--30. "SARC,Source Address Insertion or Replacement Control" "?,?,B_0x2,B_0x3,?,?,B_0x6,B_0x7" bitfld.long 0x0 27. "IPC,Checksum Offload" "0,1" newline bitfld.long 0x0 24.--26. "IPG,Inter-Packet Gap" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x0 23. "GPSLCE,Giant Packet Size Limit Control Enable" "0,1" bitfld.long 0x0 22. "S2KP,IEEE 802." "0,1" newline bitfld.long 0x0 21. "CST,CRC stripping for Type packets" "0,1" bitfld.long 0x0 20. "ACS,Automatic Pad or CRC Stripping" "0,1" bitfld.long 0x0 19. "WD,Watchdog Disable" "0,1" newline bitfld.long 0x0 18. "BE,Packet Burst Enable" "0,1" bitfld.long 0x0 17. "JD,Jabber Disable" "0,1" bitfld.long 0x0 16. "JE,Jumbo Packet Enable" "0,1" newline bitfld.long 0x0 15. "PS,Port Select" "B_0x0,B_0x1" bitfld.long 0x0 14. "FES,MAC Speed" "B_0x0,B_0x1" bitfld.long 0x0 13. "DM,Duplex Mode" "0,1" newline bitfld.long 0x0 12. "LM,Loopback Mode" "0,1" bitfld.long 0x0 11. "ECRSFD,Enable Carrier Sense Before Transmission in Full-duplex mode" "0,1" bitfld.long 0x0 10. "DO,Disable Receive Own" "0,1" newline bitfld.long 0x0 9. "DCRS,Disable Carrier Sense During Transmission" "0,1" bitfld.long 0x0 8. "DR,Disable Retry" "0,1" bitfld.long 0x0 5.--6. "BL,Back-Off Limit" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 4. "DC,Deferral Check" "0,1" bitfld.long 0x0 2.--3. "PRELEN,Preamble Length for Transmit packets" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 1. "TE,Transmitter Enable" "0,1" newline bitfld.long 0x0 0. "RE,Receiver Enable" "0,1" line.long 0x4 "ETH_MACECR,Extended operating mode configuration register" bitfld.long 0x4 30. "APDIM,ARP Packet Drop if IP Address Mismatch" "0,1" hexmask.long.byte 0x4 25.--29. 1. "EIPG,Extended Inter-Packet Gap" bitfld.long 0x4 24. "EIPGEN,Extended Inter-Packet Gap Enable" "0,1" newline bitfld.long 0x4 18. "USP,Unicast Slow Protocol Packet Detect" "0,1" bitfld.long 0x4 17. "SPEN,Slow Protocol Detection Enable" "0,1" bitfld.long 0x4 16. "DCRCC,Disable CRC Checking for Received Packets" "0,1" newline hexmask.long.word 0x4 0.--13. 1. "GPSL,Giant Packet Size Limit" line.long 0x8 "ETH_MACPFR,Packet filtering control register" bitfld.long 0x8 31. "RA,Receive All" "0,1" bitfld.long 0x8 21. "DNTU,Drop Non-TCP/UDP over IP Packets" "0,1" bitfld.long 0x8 20. "IPFE,Layer 3 and Layer 4 Filter Enable" "0,1" newline bitfld.long 0x8 16. "VTFE,VLAN Tag Filter Enable" "0,1" bitfld.long 0x8 10. "HPF,Hash or Perfect Filter" "0,1" bitfld.long 0x8 9. "SAF,Source Address Filter Enable" "0,1" newline bitfld.long 0x8 8. "SAIF,SA Inverse Filtering" "0,1" bitfld.long 0x8 6.--7. "PCF,Pass Control Packets" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 5. "DBF,Disable Broadcast Packets" "0,1" newline bitfld.long 0x8 4. "PM,Pass All Multicast" "0,1" bitfld.long 0x8 3. "DAIF,DA Inverse Filtering" "0,1" bitfld.long 0x8 2. "HMC,Hash Multicast" "0,1" newline bitfld.long 0x8 1. "HUC,Hash Unicast" "0,1" bitfld.long 0x8 0. "PR,Promiscuous Mode" "0,1" line.long 0xC "ETH_MACWJBTR,Watchdog and jabber timeout register" bitfld.long 0xC 24. "PJE,Programmable Jabber Enable" "0,1" hexmask.long.byte 0xC 16.--19. 1. "JTO,Jabber Timeout" bitfld.long 0xC 8. "PWE,Programmable Watchdog Enable" "0,1" newline hexmask.long.byte 0xC 0.--3. 1. "WTO,Watchdog Timeout" line.long 0x10 "ETH_MACHT0R,Hash Table 0 register" hexmask.long 0x10 0.--31. 1. "HT31T0,MAC Hash Table First 32 Bits" line.long 0x14 "ETH_MACHT1R,Hash Table 1 register" hexmask.long 0x14 0.--31. 1. "HT63T32,MAC Hash Table Second 32 Bits" group.long 0x50++0xB line.long 0x0 "ETH_MACVTCR,VLAN tag Control register" bitfld.long 0x0 31. "EIVLRXS,Enable Inner VLAN Tag in Rx Status" "0,1" bitfld.long 0x0 28.--29. "EIVLS,Enable Inner VLAN Tag Stripping on Receive" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 27. "ERIVLT,Enable Inner VLAN Tag" "0,1" newline bitfld.long 0x0 26. "EDVLP,Enable Double VLAN Processing" "0,1" bitfld.long 0x0 25. "VTHM,VLAN Tag Hash Table Match Enable" "0,1" bitfld.long 0x0 24. "EVLRXS,Enable VLAN Tag in Rx status" "0,1" newline bitfld.long 0x0 21.--22. "EVLS,Enable VLAN Tag Stripping on Receive" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20. "DOVLTC,Disable VLAN Type Check" "0,1" bitfld.long 0x0 19. "ERSVLM,Enable Receive S-VLAN Match" "0,1" newline bitfld.long 0x0 18. "ESVL,Enable S-VLAN" "0,1" bitfld.long 0x0 17. "VTIM,VLAN Tag Inverse Match Enable" "0,1" bitfld.long 0x0 16. "ETV,Enable 12-Bit VLAN Tag Comparison" "0,1" newline bitfld.long 0x0 2.--3. "OFS,Offset" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "CT,Command Type" "0,1" bitfld.long 0x0 0. "OB,Operation Busy" "0,1" line.long 0x4 "ETH_MACVTDR,VLAN tag data register" bitfld.long 0x4 25. "DMACHN,DMA Channel Number" "0,1" bitfld.long 0x4 24. "DMACHEN,DMA Channel Number Enable" "0,1" bitfld.long 0x4 20. "ERIVLT,Enable Inner VLAN Tag Comparison" "0,1" newline bitfld.long 0x4 19. "ERSVLM,Enable S-VLAN Match for received Frames" "0,1" bitfld.long 0x4 18. "DOVLTC,Disable VLAN Type Comparison" "0,1" bitfld.long 0x4 17. "ETV,12-bit or 16-bit VLAN comparison" "B_0x0,B_0x1" newline bitfld.long 0x4 16. "VEN,VLAN Tag Enable" "0,1" hexmask.long.word 0x4 0.--15. 1. "VID,VLAN Tag ID" line.long 0x8 "ETH_MACVHTR,VLAN Hash table register" hexmask.long.word 0x8 0.--15. 1. "VLHT,VLAN Hash Table" group.long 0x60++0x3 line.long 0x0 "ETH_MACVIR,VLAN inclusion register" rbitfld.long 0x0 31. "BUSY,Busy" "0,1" bitfld.long 0x0 30. "RDWR,Read write control" "0,1" bitfld.long 0x0 25. "ADDR1,Address" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "ADDR0,Address" "B_0x0,B_0x1" bitfld.long 0x0 21. "CBTI,Channel based tag insertion" "0,1" bitfld.long 0x0 20. "VLTI,VLAN Tag Input" "0,1" newline bitfld.long 0x0 19. "CSVL,C-VLAN or S-VLAN" "B_0x0,B_0x1" bitfld.long 0x0 18. "VLP,VLAN Priority Control" "0,1" bitfld.long 0x0 16.--17. "VLC,VLAN Tag Control in Transmit Packets" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.word 0x0 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" group.long 0x60++0x7 line.long 0x0 "ETH_MACVIR_ALTERNATE1,VLAN inclusion register" bitfld.long 0x0 19. "CSVL,C-VLAN or S-VLAN" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" line.long 0x4 "ETH_MACIVIR,Inner VLAN inclusion register" bitfld.long 0x4 20. "VLTI,VLAN Tag Input" "0,1" bitfld.long 0x4 19. "CSVL,C-VLAN or S-VLAN" "B_0x0,B_0x1" bitfld.long 0x4 18. "VLP,VLAN Priority Control" "0,1" newline bitfld.long 0x4 16.--17. "VLC,VLAN Tag Control in Transmit Packets" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x4 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" group.long 0x70++0x3 line.long 0x0 "ETH_MACQ0TXFCR,Tx Queue 0 flow control register" hexmask.long.word 0x0 16.--31. 1. "PT,Pause Time" bitfld.long 0x0 7. "DZPQ,Disable Zero-Quanta Pause" "0,1" bitfld.long 0x0 4.--6. "PLT,Pause Low Threshold" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" newline bitfld.long 0x0 1. "TFE,Transmit Flow Control Enable" "0,1" bitfld.long 0x0 0. "FCB_BPA,Flow Control Busy or Backpressure Activate" "0,1" group.long 0x90++0x7 line.long 0x0 "ETH_MACRXFCR,Rx flow control register" bitfld.long 0x0 1. "UP,Unicast Pause Packet Detect" "0,1" bitfld.long 0x0 0. "RFE,Receive Flow Control Enable" "0,1" line.long 0x4 "ETH_MACRXQCR,Rx Queue control register" bitfld.long 0x4 17. "VFFQ,VLAN Tag Filter Fail Packets Queue" "B_0x0,B_0x1" bitfld.long 0x4 16. "VFFQE,VLAN Tag Filter Fail Packets Queuing Enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "MFFQ,Multicast Address Filter Fail Packets Queue." "B_0x0,B_0x1" newline bitfld.long 0x4 8. "MFFQE,Multicast Address Filter Fail Packets Queuing Enable." "0,1" bitfld.long 0x4 1. "UFFQ,Unicast Address Filter Fail Packets Queue." "B_0x0,B_0x1" bitfld.long 0x4 0. "UFFQE,Unicast Address Filter Fail Packets Queuing Enable." "0,1" group.long 0xA0++0xB line.long 0x0 "ETH_MACRXQC0R,Rx queue control 0 register" bitfld.long 0x0 2.--3. "RXQ1EN,Receive Queue 1 Enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 0.--1. "RXQ0EN,Receive Queue 0 Enable" "B_0x0,B_0x1,B_0x2,?" line.long 0x4 "ETH_MACRXQC1R,Rx queue control 1 register" bitfld.long 0x4 29. "TBRQE,Type Field Based Rx Queuing Enable" "0,1" bitfld.long 0x4 28. "OMCBCQ,Overriding MC-BC queue priority select" "B_0x0,B_0x1" bitfld.long 0x4 26. "FPRQ2,Frame Preemption Residue Queue" "?,B_0x1" newline bitfld.long 0x4 25. "FPRQ1,Frame Preemption Residue Queue" "?,B_0x1" bitfld.long 0x4 24. "FPRQ0,Frame Preemption Residue Queue" "?,B_0x1" bitfld.long 0x4 22.--23. "TPQC,Tagged PTP over Ethernet Packets Queuing Control" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 21. "TACPQE,Tagged AV Control Packets Queuing Enable" "0,1" bitfld.long 0x4 20. "MCBCQEN,Multicast and Broadcast Queue Enable" "0,1" bitfld.long 0x4 16.--18. "MCBCQ,Multicast and Broadcast Queue" "B_0x0,B_0x1,?,?,?,?,?,?" newline bitfld.long 0x4 12.--14. "UPQ,Untagged Packet Queue" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 4.--6. "PTPQ,PTP Packets Queue" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 2. "AVCPQ2,AV Untagged Control Packets Queue" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "AVCPQ1,AV Untagged Control Packets Queue" "B_0x0,B_0x1" bitfld.long 0x4 0. "AVCPQ0,AV Untagged Control Packets Queue" "B_0x0,B_0x1" line.long 0x8 "ETH_MACRXQC2R,Rx queue control 2 register" hexmask.long.byte 0x8 8.--15. 1. "PSRQ1,Priorities Selected in the Receive Queue 1" hexmask.long.byte 0x8 0.--7. 1. "PSRQ0,Priorities Selected in the Receive Queue 0" group.long 0xB0++0xB line.long 0x0 "ETH_MACISR,Interrupt status register" rbitfld.long 0x0 20. "MFRIS,MMC FPE Receive Interrupt Status" "0,1" rbitfld.long 0x0 19. "MFTIS,MMC FPE Transmit Interrupt Status" "0,1" bitfld.long 0x0 18. "MDIOIS,MDIO Interrupt Status" "0,1" newline rbitfld.long 0x0 17. "FPEIS,Frame Preemption Interrupt Status" "0,1" bitfld.long 0x0 14. "RXSTSIS,Receive Status Interrupt" "0,1" bitfld.long 0x0 13. "TXSTSIS,Transmit Status Interrupt" "0,1" newline bitfld.long 0x0 12. "TSIS,Timestamp Interrupt Status" "0,1" rbitfld.long 0x0 10. "MMCTXIS,MMC Transmit Interrupt Status" "0,1" rbitfld.long 0x0 9. "MMCRXIS,MMC Receive Interrupt Status" "0,1" newline rbitfld.long 0x0 8. "MMCIS,MMC Interrupt Status" "0,1" rbitfld.long 0x0 5. "LPIIS,LPI Interrupt Status" "0,1" rbitfld.long 0x0 4. "PMTIS,PMT Interrupt Status" "0,1" newline rbitfld.long 0x0 3. "PHYIS,PHY Interrupt" "0,1" rbitfld.long 0x0 0. "RGSMIIIS,RGMII Interrupt Status" "0,1" line.long 0x4 "ETH_MACIER,Interrupt enable register" bitfld.long 0x4 18. "MDIOIE,MDIO Interrupt Enable" "0,1" bitfld.long 0x4 17. "FPEIE,Frame Preemption Interrupt Enable" "0,1" bitfld.long 0x4 14. "RXSTSIE,Receive Status Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "TXSTSIE,Transmit Status Interrupt Enable" "0,1" bitfld.long 0x4 12. "TSIE,Timestamp Interrupt Enable" "0,1" bitfld.long 0x4 5. "LPIIE,LPI Interrupt Enable" "0,1" newline bitfld.long 0x4 4. "PMTIE,PMT Interrupt Enable" "0,1" bitfld.long 0x4 3. "PHYIE,PHY Interrupt Enable" "0,1" bitfld.long 0x4 0. "RGSMIIIE,RGMII Interrupt Enable" "0,1" line.long 0x8 "ETH_MACRXTXSR,Rx Tx status register" bitfld.long 0x8 8. "RWT,Receive Watchdog Timeout" "0,1" bitfld.long 0x8 5. "EXCOL,Excessive Collisions" "0,1" bitfld.long 0x8 4. "LCOL,Late Collision" "0,1" newline bitfld.long 0x8 3. "EXDEF,Excessive Deferral" "0,1" bitfld.long 0x8 2. "LCARR,Loss of Carrier" "0,1" bitfld.long 0x8 1. "NCARR,No Carrier" "0,1" newline bitfld.long 0x8 0. "TJT,Transmit Jabber Timeout" "0,1" group.long 0xC0++0x7 line.long 0x0 "ETH_MACPCSR,PMT control status register" bitfld.long 0x0 31. "RWKFILTRST,Remote Wake-up Packet Filter Register Pointer Reset" "0,1" hexmask.long.byte 0x0 24.--28. 1. "RWKPTR,Remote wake-up FIFO Pointer" bitfld.long 0x0 10. "RWKPFE,Remote wake-up Packet Forwarding Enable" "0,1" newline bitfld.long 0x0 9. "GLBLUCAST,Global Unicast" "0,1" rbitfld.long 0x0 6. "RWKPRCVD,Remote wake-up Packet Received" "0,1" bitfld.long 0x0 5. "MGKPRCVD,Magic Packet Received" "0,1" newline bitfld.long 0x0 2. "RWKPKTEN,Remote wake-up Packet Enable" "0,1" bitfld.long 0x0 1. "MGKPKTEN,Magic Packet Enable" "0,1" bitfld.long 0x0 0. "PWRDWN,Power Down" "0,1" line.long 0x4 "ETH_MACRWKPFR,Remote wake-up packet filter register" hexmask.long 0x4 0.--31. 1. "MACRWKPFR,Remote wake-up packet filter" group.long 0xD0++0xF line.long 0x0 "ETH_MACLCSR,LPI control and status register" bitfld.long 0x0 21. "LPITCSE,LPI Tx Clock Stop Enable" "0,1" bitfld.long 0x0 20. "LPITE,LPI Timer Enable" "0,1" bitfld.long 0x0 19. "LPITXA,LPI Tx Automate" "0,1" newline bitfld.long 0x0 18. "PLSEN,PHY Link Status Enable" "0,1" bitfld.long 0x0 17. "PLS,PHY Link Status" "0,1" bitfld.long 0x0 16. "LPIEN,LPI Enable" "0,1" newline rbitfld.long 0x0 9. "RLPIST,Receive LPI State" "0,1" rbitfld.long 0x0 8. "TLPIST,Transmit LPI State" "0,1" rbitfld.long 0x0 3. "RLPIEX,Receive LPI Exit" "0,1" newline rbitfld.long 0x0 2. "RLPIEN,Receive LPI Entry" "0,1" rbitfld.long 0x0 1. "TLPIEX,Transmit LPI Exit" "0,1" rbitfld.long 0x0 0. "TLPIEN,Transmit LPI Entry" "0,1" line.long 0x4 "ETH_MACLTCR,LPI timers control register" hexmask.long.word 0x4 16.--25. 1. "LST,LPI LS Timer" hexmask.long.word 0x4 0.--15. 1. "TWT,LPI TW Timer" line.long 0x8 "ETH_MACLETR,LPI entry timer register" hexmask.long.tbyte 0x8 0.--19. 1. "LPIET,LPI Entry Timer" line.long 0xC "ETH_MAC1USTCR,One-microsecond-tick counter register" hexmask.long.word 0xC 0.--11. 1. "TIC_1US_CNTR,1us tick Counter" group.long 0xF8++0x3 line.long 0x0 "ETH_MACPHYCSR,PHYIF control status register" rbitfld.long 0x0 19. "LNKSTS,Link Status" "B_0x0,B_0x1" rbitfld.long 0x0 17.--18. "LNKSPEED,Link Speed" "B_0x0,B_0x1,B_0x2,?" rbitfld.long 0x0 16. "LNKMOD,Link Mode" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "LUD,Link Up or Down" "B_0x0,B_0x1" bitfld.long 0x0 0. "TC,Transmit Configuration in RGMII" "0,1" rgroup.long 0x110++0x7 line.long 0x0 "ETH_MACVR,Version register" hexmask.long.byte 0x0 8.--15. 1. "USERVER,ST-defined version" hexmask.long.byte 0x0 0.--7. 1. "SNPSVER,IP version" line.long 0x4 "ETH_MACDR,Debug register" bitfld.long 0x4 17.--18. "TFCSTS,MAC Transmit Packet Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16. "TPESTS,MAC GMII or MII Transmit Protocol Engine Status" "0,1" bitfld.long 0x4 1.--2. "RFCFCSTS,MAC Receive Packet Controller FIFO Status" "0,1,2,3" newline bitfld.long 0x4 0. "RPESTS,MAC GMII or MII Receive Protocol Engine Status" "0,1" rgroup.long 0x11C++0xF line.long 0x0 "ETH_MACHWF0R,HW feature 0 register" bitfld.long 0x0 28.--30. "ACTPHYSEL,Active PHY Selected" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,?" bitfld.long 0x0 27. "SAVLANINS,Source Address or VLAN Insertion Enable" "0,1" bitfld.long 0x0 25.--26. "TSSTSSEL,Timestamp System Time Source" "?,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 24. "MACADR64SEL,MAC Addresses 64-127 Selected" "0,1" bitfld.long 0x0 23. "MACADR32SEL,MAC Addresses 32-63 Selected" "0,1" hexmask.long.byte 0x0 18.--22. 1. "ADDMACADRSEL,MAC Addresses 1-31 Selected" newline bitfld.long 0x0 16. "RXCOESEL,Receive Checksum Offload Enabled" "0,1" bitfld.long 0x0 14. "TXCOESEL,Transmit Checksum Offload Enabled" "0,1" bitfld.long 0x0 13. "EEESEL,Energy Efficient Ethernet Enabled" "0,1" newline bitfld.long 0x0 12. "TSSEL,IEEE 1588-2008 Timestamp Enabled" "0,1" bitfld.long 0x0 9. "ARPOFFSEL,ARP Offload Enabled" "0,1" bitfld.long 0x0 8. "MMCSEL,RMON Module Enable" "0,1" newline bitfld.long 0x0 7. "MGKSEL,PMT Magic Packet Enable" "0,1" bitfld.long 0x0 6. "RWKSEL,PMT Remote Wake-up Packet Enable" "0,1" bitfld.long 0x0 5. "SMASEL,SMA (MDIO) Interface" "0,1" newline bitfld.long 0x0 4. "VLHASH,VLAN Hash Filter Selected" "0,1" bitfld.long 0x0 3. "PCSSEL,PCS Registers (TBI SGMII or RTBI PHY interface)" "0,1" bitfld.long 0x0 2. "HDSEL,Half-duplex Support" "0,1" newline bitfld.long 0x0 1. "GMIISEL,1000 Mbps Support" "0,1" bitfld.long 0x0 0. "MIISEL,10 or 100 Mbps Support" "0,1" line.long 0x4 "ETH_MACHWF1R,HW feature 1 register" hexmask.long.byte 0x4 27.--30. 1. "L3L4FNUM,Total number of L3 or L4 Filters" bitfld.long 0x4 24.--25. "HASHTBLSZ,Hash Table Size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 23. "POUOST,One Step for PTP over UDP/IP Feature Enable" "0,1" newline bitfld.long 0x4 21. "RAVSEL,Rx Side Only AV Feature Enable" "0,1" bitfld.long 0x4 20. "AVSEL,AV Feature Enable" "0,1" bitfld.long 0x4 19. "DBGMEMA,DMA Debug Registers Enable" "0,1" newline bitfld.long 0x4 18. "TSOEN,TCP Segmentation Offload Enable" "0,1" bitfld.long 0x4 17. "SPHEN,Split Header Feature Enable" "0,1" bitfld.long 0x4 16. "DCBEN,DCB Feature Enable" "0,1" newline bitfld.long 0x4 14.--15. "ADDR64,Address width" "B_0x0,?,?,?" bitfld.long 0x4 13. "ADVTHWORD,IEEE 1588 High Word Register Enable" "0,1" bitfld.long 0x4 12. "PTOEN,PTP Offload Enable" "0,1" newline bitfld.long 0x4 11. "OSTEN,One-Step Timestamping Enable" "0,1" hexmask.long.byte 0x4 6.--10. 1. "TXFIFOSIZE,MTL Transmit FIFO Size" bitfld.long 0x4 5. "SPRAM,Single Port RAM Enable" "0,1" newline hexmask.long.byte 0x4 0.--4. 1. "RXFIFOSIZE,MTL Receive FIFO Size" line.long 0x8 "ETH_MACHWF2R,HW feature 2 register" bitfld.long 0x8 28.--30. "AUXSNAPNUM,Number of Auxiliary Snapshot Inputs" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x8 24.--26. "PPSOUTNUM,Number of PPS Outputs" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x8 22.--23. "TDCSZ,Tx DMA Descriptor Cache Size in terms of 16-byte descriptors" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x8 18.--21. 1. "TXCHCNT,Number of DMA Transmit Channels" bitfld.long 0x8 16.--17. "RDCSZ,Rx DMA Descriptor Cache Size in terms of 16-byte descriptors" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x8 12.--15. 1. "RXCHCNT,Number of DMA Receive Channels" newline hexmask.long.byte 0x8 6.--9. 1. "TXQCNT,Number of MTL Transmit Queues" hexmask.long.byte 0x8 0.--3. 1. "RXQCNT,Number of MTL Receive Queues" line.long 0xC "ETH_MACHWF3R,HW feature 3 register" bitfld.long 0xC 28.--29. "ASP,Automotive Safety Package" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 27. "TBSSEL,Time-based scheduling Enable" "0,1" bitfld.long 0xC 26. "FPESEL,Frame Preemption Enable" "0,1" newline bitfld.long 0xC 20.--21. "ESTWID,Width of the Time Interval field in the Gate Control List" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 17.--19. "ESTDEP,Depth of the Gate Control List" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0xC 16. "ESTSEL,Enhancements to Scheduled Traffic Enable" "0,1" newline bitfld.long 0xC 13.--14. "FRPES,Flexible Receive Parser Table Entries size" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 11.--12. "FRPBS,Flexible Receive Parser Buffer size" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10. "FRPSEL,Flexible Receive Parser Selected" "0,1" newline bitfld.long 0xC 9. "PDUPSEL,Broadcast/Multicast Packet Duplication" "0,1" bitfld.long 0xC 5. "DVLAN,Double VLAN processing enable" "0,1" bitfld.long 0xC 4. "CBTISEL,Queue/Channel based VLAN tag insertion on Tx enable" "0,1" newline bitfld.long 0xC 0.--2. "NRVF,Number of Extended VLAN Tag Filters Enabled" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" group.long 0x200++0x7 line.long 0x0 "ETH_MACMDIOAR,MDIO address register" bitfld.long 0x0 27. "PSE,Preamble Suppression Enable" "0,1" bitfld.long 0x0 26. "BTB,Back to Back transactions" "0,1" hexmask.long.byte 0x0 21.--25. 1. "PA,Physical Layer Address" newline hexmask.long.byte 0x0 16.--20. 1. "RDA,Register/Device Address" bitfld.long 0x0 12.--14. "NTC,Number of Training Clocks" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--11. 1. "CR,CSR Clock Range" newline bitfld.long 0x0 4. "SKAP,Skip Address Packet" "0,1" bitfld.long 0x0 2.--3. "GOC,GMII Operation Command" "?,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "C45E,Clause 45 PHY Enable" "0,1" newline bitfld.long 0x0 0. "GB,GMII Busy" "0,1" line.long 0x4 "ETH_MACMDIODR,MDIO data register" hexmask.long.word 0x4 16.--31. 1. "RA,Register Address" hexmask.long.word 0x4 0.--15. 1. "GD,GMII Data" group.long 0x210++0x3 line.long 0x0 "ETH_MACARPAR,ARP address register" hexmask.long 0x0 0.--31. 1. "ARPPA,ARP Protocol Address" group.long 0x230++0x7 line.long 0x0 "ETH_MACCSRSWCR,CSR software control register" bitfld.long 0x0 8. "SEEN,Slave Error Response Enable" "0,1" bitfld.long 0x0 0. "RCWE,Register Clear on Write 1 Enable" "0,1" line.long 0x4 "ETH_MACFPECSR,FPE control and status register" bitfld.long 0x4 19. "TRSP,Transmitted Respond Frame" "0,1" bitfld.long 0x4 18. "TVER,Transmitted Verify Frame" "0,1" bitfld.long 0x4 17. "RRSP,Received Respond Frame" "0,1" newline bitfld.long 0x4 16. "RVER,Received Verify Frame" "0,1" bitfld.long 0x4 3. "ARV,Autogenerate Respond mPacket on receiving Verify mPacket" "0,1" bitfld.long 0x4 2. "SRSP,Send Respond mPacket" "0,1" newline bitfld.long 0x4 1. "SVER,Send Verify mPacket" "0,1" bitfld.long 0x4 0. "EFPE,Enable Tx Frame Preemption" "0,1" group.long 0x240++0x7 line.long 0x0 "ETH_MACPRSTIMR,MAC presentation time register" hexmask.long 0x0 0.--31. 1. "MPTN,MAC 1722 Presentation Time in ns" line.long 0x4 "ETH_MACPRSTIMUR,MAC presentation time update register" hexmask.long 0x4 0.--31. 1. "MPTU,MAC 1722 Presentation Time Update" group.long 0x300++0x1F line.long 0x0 "ETH_MACA0HR,MAC Address 0 high register" rbitfld.long 0x0 31. "AE,Address Enable" "0,1" bitfld.long 0x0 16. "DCS,DMA Channel Select" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "ADDRHI,MAC Address0[47:32]" line.long 0x4 "ETH_MACA0LR,MAC Address 0 low register" hexmask.long 0x4 0.--31. 1. "ADDRLO,MAC Address x [31:0]" line.long 0x8 "ETH_MACA1HR,MAC Address 1 high register" bitfld.long 0x8 31. "AE,Address Enable" "0,1" bitfld.long 0x8 30. "SA,Source Address" "B_0x0,B_0x1" hexmask.long.byte 0x8 24.--29. 1. "MBC,Mask Byte Control" newline bitfld.long 0x8 16. "DCS,DMA Channel Select" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "ADDRHI,MAC Address1 [47:32]" line.long 0xC "ETH_MACA1LR,MAC Address 1 low register" hexmask.long 0xC 0.--31. 1. "ADDRLO,MAC Address x [31:0]" line.long 0x10 "ETH_MACA2HR,MAC Address 2 high register" bitfld.long 0x10 31. "AE,Address Enable" "0,1" bitfld.long 0x10 30. "SA,Source Address" "B_0x0,B_0x1" hexmask.long.byte 0x10 24.--29. 1. "MBC,Mask Byte Control" newline bitfld.long 0x10 16. "DCS,DMA Channel Select" "B_0x0,B_0x1" hexmask.long.word 0x10 0.--15. 1. "ADDRHI,MAC Address1 [47:32]" line.long 0x14 "ETH_MACA2LR,MAC Address 2 low register" hexmask.long 0x14 0.--31. 1. "ADDRLO,MAC Address x [31:0]" line.long 0x18 "ETH_MACA3HR,MAC Address 3 high register" bitfld.long 0x18 31. "AE,Address Enable" "0,1" bitfld.long 0x18 30. "SA,Source Address" "B_0x0,B_0x1" hexmask.long.byte 0x18 24.--29. 1. "MBC,Mask Byte Control" newline bitfld.long 0x18 16. "DCS,DMA Channel Select" "B_0x0,B_0x1" hexmask.long.word 0x18 0.--15. 1. "ADDRHI,MAC Address1 [47:32]" line.long 0x1C "ETH_MACA3LR,MAC Address 3 low register" hexmask.long 0x1C 0.--31. 1. "ADDRLO,MAC Address x [31:0]" group.long 0x700++0x13 line.long 0x0 "ETH_MMC_CONTROL,MMC control register" bitfld.long 0x0 8. "UCDBC,Update MMC Counters for Dropped Broadcast Packets" "0,1" bitfld.long 0x0 5. "CNTPRSTLVL,Full-Half Preset" "0,1" bitfld.long 0x0 4. "CNTPRST,Counters Preset" "0,1" newline bitfld.long 0x0 3. "CNTFREEZ,MMC Counter Freeze" "0,1" bitfld.long 0x0 2. "RSTONRD,Reset on Read" "0,1" bitfld.long 0x0 1. "CNTSTOPRO,Counter Stop Rollover" "0,1" newline bitfld.long 0x0 0. "CNTRST,Counters Reset" "0,1" line.long 0x4 "ETH_MMC_RX_INTERRUPT,MMC Rx interrupt register" bitfld.long 0x4 27. "RXLPITRCIS,MMC Receive LPI transition counter interrupt status" "0,1" bitfld.long 0x4 26. "RXLPIUSCIS,MMC Receive LPI microsecond counter interrupt status" "0,1" bitfld.long 0x4 25. "RXCTRLPIS,MMC Receive Control Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 24. "RXRCVERRPIS,MMC Receive Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 23. "RXWDOGPIS,MMC Receive Watchdog Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 22. "RXVLANGBPIS,MMC Receive VLAN Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 21. "RXFOVPIS,MMC Receive FIFO Overflow Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 20. "RXPAUSPIS,MMC Receive Pause Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 19. "RXORANGEPIS,MMC Receive Out Of Range Error Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 18. "RXLENERPIS,MMC Receive Length Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 17. "RXUCGPIS,MMC Receive Unicast Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 16. "RX1024TMAXOCTGBPIS,MMC Receive 1024 to Maximum Octet Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 15. "RX512T1023OCTGBPIS,MMC Receive 512 to 1023 Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 14. "RX256T511OCTGBPIS,MMC Receive 256 to 511 Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 13. "RX128T255OCTGBPIS,MMC Receive 128 to 255 Octet Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 12. "RX65T127OCTGBPIS,MMC Receive 65 to 127 Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 11. "RX64OCTGBPIS,MMC Receive 64 Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 10. "RXOSIZEGPIS,MMC Receive Oversize Good Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 9. "RXUSIZEGPIS,MMC Receive Undersize Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 8. "RXJABERPIS,MMC Receive Jabber Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 7. "RXRUNTPIS,MMC Receive Runt Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 6. "RXALGNERPIS,MMC Receive Alignment Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 5. "RXCRCERPIS,MMC Receive CRC Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 4. "RXMCGPIS,MMC Receive Multicast Good Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 3. "RXBCGPIS,MMC Receive Broadcast Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 2. "RXGOCTIS,MMC Receive Good Octet Counter Interrupt Status" "0,1" bitfld.long 0x4 1. "RXGBOCTIS,MMC Receive Good Bad Octet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 0. "RXGBPKTIS,MMC Receive Good Bad Packet Counter Interrupt Status" "0,1" line.long 0x8 "ETH_MMC_TX_INTERRUPT,MMC Tx interrupt register" bitfld.long 0x8 27. "TXLPITRCIS,MMC Transmit LPI transition counter interrupt status" "0,1" bitfld.long 0x8 26. "TXLPIUSCIS,MMC Transmit LPI microsecond counter interrupt status" "0,1" bitfld.long 0x8 25. "TXOSIZEGPIS,MMC Transmit Oversize Good Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 24. "TXVLANGPIS,MMC Transmit VLAN Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 23. "TXPAUSPIS,MMC Transmit Pause Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 22. "TXEXDEFPIS,MMC Transmit Excessive Deferral Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 21. "TXGPKTIS,MMC Transmit Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 20. "TXGOCTIS,MMC Transmit Good Octet Counter Interrupt Status" "0,1" bitfld.long 0x8 19. "TXCARERPIS,MMC Transmit Carrier Error Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 18. "TXEXCOLPIS,MMC Transmit Excessive Collision Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 17. "TXLATCOLPIS,MMC Transmit Late Collision Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 16. "TXDEFPIS,MMC Transmit Deferred Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 15. "TXMCOLGPIS,MMC Transmit Multiple Collision Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 14. "TXSCOLGPIS,MMC Transmit Single Collision Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 13. "TXUFLOWERPIS,MMC Transmit Underflow Error Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 12. "TXBCGBPIS,MMC Transmit Broadcast Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 11. "TXMCGBPIS,MMC Transmit Multicast Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 10. "TXUCGBPIS,MMC Transmit Unicast Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 9. "TX1024TMAXOCTGBPIS,MMC Transmit 1024 to Maximum Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 8. "TX512T1023OCTGBPIS,MMC Transmit 512 to 1023 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x8 7. "TX256T511OCTGBPIS,MMC Transmit 256 to 511 Octet Good Bad Packet Counter" "0,1" newline bitfld.long 0x8 6. "TX128T255OCTGBPIS,MMC Transmit 128 to 255 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x8 5. "TX65T127OCTGBPIS,MMC Transmit 65 to 127 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x8 4. "TX64OCTGBPIS,MMC Transmit 64 Octet Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 3. "TXMCGPIS,MMC Transmit Multicast Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 2. "TXBCGPIS,MMC Transmit Broadcast Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 1. "TXGBPKTIS,MMC Transmit Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 0. "TXGBOCTIS,MMC Transmit Good Bad Octet Counter Interrupt Status" "0,1" line.long 0xC "ETH_MMC_RX_INTERRUPT_MASK,MMC Rx interrupt mask register" bitfld.long 0xC 27. "RXLPITRCIM,MMC Receive LPI transition counter interrupt Mask" "0,1" bitfld.long 0xC 26. "RXLPIUSCIM,MMC Receive LPI microsecond counter interrupt Mask" "0,1" bitfld.long 0xC 25. "RXCTRLPIM,MMC Receive Control Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 24. "RXRCVERRPIM,MMC Receive Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 23. "RXWDOGPIM,MMC Receive Watchdog Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 22. "RXVLANGBPIM,MMC Receive VLAN Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 21. "RXFOVPIM,MMC Receive FIFO Overflow Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 20. "RXPAUSPIM,MMC Receive Pause Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 19. "RXORANGEPIM,MMC Receive Out Of Range Error Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 18. "RXLENERPIM,MMC Receive Length Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 17. "RXUCGPIM,MMC Receive Unicast Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 16. "RX1024TMAXOCTGBPIM,MMC Receive 1024 to Maximum Octet Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 15. "RX512T1023OCTGBPIM,MMC Receive 512 to 1023 Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 14. "RX256T511OCTGBPIM,MMC Receive 256 to 511 Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 13. "RX128T255OCTGBPIM,MMC Receive 128 to 255 Octet Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 12. "RX65T127OCTGBPIM,MMC Receive 65 to 127 Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 11. "RX64OCTGBPIM,MMC Receive 64 Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 10. "RXOSIZEGPIM,MMC Receive Oversize Good Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 9. "RXUSIZEGPIM,MMC Receive Undersize Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 8. "RXJABERPIM,MMC Receive Jabber Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 7. "RXRUNTPIM,MMC Receive Runt Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 6. "RXALGNERPIM,MMC Receive Alignment Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 5. "RXCRCERPIM,MMC Receive CRC Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 4. "RXMCGPIM,MMC Receive Multicast Good Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 3. "RXBCGPIM,MMC Receive Broadcast Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 2. "RXGOCTIM,MMC Receive Good Octet Counter Interrupt Mask" "0,1" bitfld.long 0xC 1. "RXGBOCTIM,MMC Receive Good Bad Octet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 0. "RXGBPKTIM,MMC Receive Good Bad Packet Counter Interrupt Mask" "0,1" line.long 0x10 "ETH_MMC_TX_INTERRUPT_MASK,MMC Tx interrupt mask register" bitfld.long 0x10 27. "TXLPITRCIM,MMC Transmit LPI transition counter interrupt Mask" "0,1" bitfld.long 0x10 26. "TXLPIUSCIM,MMC Transmit LPI microsecond counter interrupt Mask" "0,1" bitfld.long 0x10 25. "TXOSIZEGPIM,MMC Transmit Oversize Good Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 24. "TXVLANGPIM,MMC Transmit VLAN Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 23. "TXPAUSPIM,MMC Transmit Pause Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 22. "TXEXDEFPIM,MMC Transmit Excessive Deferral Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 21. "TXGPKTIM,MMC Transmit Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 20. "TXGOCTIM,MMC Transmit Good Octet Counter Interrupt Mask" "0,1" bitfld.long 0x10 19. "TXCARERPIM,MMC Transmit Carrier Error Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 18. "TXEXCOLPIM,MMC Transmit Excessive Collision Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 17. "TXLATCOLPIM,MMC Transmit Late Collision Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 16. "TXDEFPIM,MMC Transmit Deferred Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 15. "TXMCOLGPIM,MMC Transmit Multiple Collision Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 14. "TXSCOLGPIM,MMC Transmit Single Collision Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 13. "TXUFLOWERPIM,MMC Transmit Underflow Error Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 12. "TXBCGBPIM,MMC Transmit Broadcast Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 11. "TXMCGBPIM,MMC Transmit Multicast Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 10. "TXUCGBPIM,MMC Transmit Unicast Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 9. "TX1024TMAXOCTGBPIM,MMC Transmit 1024 to Maximum Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 8. "TX512T1023OCTGBPIM,MMC Transmit 512 to 1023 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x10 7. "TX256T511OCTGBPIM,MMC Transmit 256 to 511 Octet Good Bad Packet Counter" "0,1" newline bitfld.long 0x10 6. "TX128T255OCTGBPIM,MMC Transmit 128 to 255 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x10 5. "TX65T127OCTGBPIM,MMC Transmit 65 to 127 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x10 4. "TX64OCTGBPIM,MMC Transmit 64 Octet Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 3. "TXMCGPIM,MMC Transmit Multicast Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 2. "TXBCGPIM,MMC Transmit Broadcast Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 1. "TXGBPKTIM,MMC Transmit Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 0. "TXGBOCTIM,MMC Transmit Good Bad Octet Counter Interrupt Mask" "0,1" rgroup.long 0x714++0x67 line.long 0x0 "ETH_TX_OCTET_COUNT_GOOD_BAD,Tx octet count good bad register" hexmask.long 0x0 0.--31. 1. "TXOCTGB,Tx Octet Count Good Bad" line.long 0x4 "ETH_TX_PACKET_COUNT_GOOD_BAD,Tx packet count good bad register" hexmask.long 0x4 0.--31. 1. "TXPKTGB,Tx Packet Count Good Bad" line.long 0x8 "ETH_TX_BROADCAST_PACKETS_GOOD,Tx broadcast packets good register" hexmask.long 0x8 0.--31. 1. "TXBCASTG,Tx Broadcast Packets Good" line.long 0xC "ETH_TX_MULTICAST_PACKETS_GOOD,Tx multicast packets good register" hexmask.long 0xC 0.--31. 1. "TXMCASTG,Tx multicast Packets Good" line.long 0x10 "ETH_TX_64OCTETS_PACKETS_GOOD_BAD,Tx 64 octets packets good bad register" hexmask.long 0x10 0.--31. 1. "TX64OCTGB,Tx 64 octets Packets Good Bad" line.long 0x14 "ETH_TX_64TO127OCTETS_PACKETS_GOOD_BAD,Tx 65 to 127 octets packets good bad register" hexmask.long 0x14 0.--31. 1. "TX65_127OCTGB,Tx 65 to 127 octets Packets Good Bad" line.long 0x18 "ETH_TX_128TO255OCTETS_PACKETS_GOOD_BAD,Tx 128 to 255 octets packets good bad register" hexmask.long 0x18 0.--31. 1. "TX128_255OCTGB,Tx 128 to 255 octets Packets Good Bad" line.long 0x1C "ETH_TX_256TO511OCTETS_PACKETS_GOOD_BAD,Tx 256 to 511 octets packets good bad register" hexmask.long 0x1C 0.--31. 1. "TX256_511OCTGB,Tx 256 to 511 octets Packets Good Bad" line.long 0x20 "ETH_TX_512TO1023OCTETS_PACKETS_GOOD_BAD,Tx 512 to 1023 octets packets good bad register" hexmask.long 0x20 0.--31. 1. "TX512_1023OCTGB,Tx 512 to 1023 octets Packets Good Bad" line.long 0x24 "ETH_TX_1024TOMAXOCTETS_PACKETS_GOOD_BAD,Tx 1024 to max octets packets good bad register" hexmask.long 0x24 0.--31. 1. "TX1024_MAXOCTGB,Tx 1024 to Max octets Packets Good Bad" line.long 0x28 "ETH_TX_UNICAST_PACKETS_GOOD_BAD,Tx unicast packets good bad register" hexmask.long 0x28 0.--31. 1. "TXUCASTGB,Tx Unicast Packets Good Bad" line.long 0x2C "ETH_TX_MULTICAST_PACKETS_GOOD_BAD,Tx multicast packets good bad register" hexmask.long 0x2C 0.--31. 1. "TXMCASTGB,Tx Multicast Packets Good Bad" line.long 0x30 "ETH_TX_BROADCAST_PACKETS_GOOD_BAD,Tx broadcast packets good bad register" hexmask.long 0x30 0.--31. 1. "TXBCASTGB,Tx Broadcast Packets Good Bad" line.long 0x34 "ETH_TX_UNDERFLOW_ERROR_PACKETS,Tx underflow error packets register" hexmask.long 0x34 0.--31. 1. "TXUNDRFLW,Tx Underflow Error Packets" line.long 0x38 "ETH_TX_SINGLE_COLLISION_GOOD_PACKETS,Tx single collision good packets register" hexmask.long 0x38 0.--31. 1. "TXSNGLCOLG,Tx Single Collision Good Packets" line.long 0x3C "ETH_TX_MULTIPLE_COLLISION_GOOD_PACKETS,Tx multiple collision good packets register" hexmask.long 0x3C 0.--31. 1. "TXMULTCOLG,Tx Multiple Collision Good Packets" line.long 0x40 "ETH_TX_DEFERRED_PACKETS,Tx deferred packets register" hexmask.long 0x40 0.--31. 1. "TXDEFRD,Tx Deferred Packets" line.long 0x44 "ETH_TX_LATE_COLLISION_PACKETS,Tx late collision packets register" hexmask.long 0x44 0.--31. 1. "TXLATECOL,Tx Late Collision Packets" line.long 0x48 "ETH_TX_EXCESSIVE_COLLISION_PACKETS,Tx excessive collision packets register" hexmask.long 0x48 0.--31. 1. "TXEXSCOL,Tx Excessive Collision Packets" line.long 0x4C "ETH_TX_CARRIER_ERROR_PACKETS,Tx carrier error packets register" hexmask.long 0x4C 0.--31. 1. "TXCARR,Tx Carrier Error Packets" line.long 0x50 "ETH_TX_OCTET_COUNT_GOOD,Tx octet count good register" hexmask.long 0x50 0.--31. 1. "TXOCTG,Tx Octet Count Good" line.long 0x54 "ETH_TX_PACKET_COUNT_GOOD,Tx packet count good register" hexmask.long 0x54 0.--31. 1. "TXPKTG,Tx Packet Count Good" line.long 0x58 "ETH_TX_EXCESSIVE_DEFERRAL_ERROR,Tx excessive deferral error register" hexmask.long 0x58 0.--31. 1. "TXEXSDEF,Tx Excessive Deferral Error" line.long 0x5C "ETH_TX_PAUSE_PACKETS,Tx pause packets register" hexmask.long 0x5C 0.--31. 1. "TXPAUSE,Tx Pause Packets" line.long 0x60 "ETH_TX_VLAN_PACKETS_GOOD,Tx VLAN packets good register" hexmask.long 0x60 0.--31. 1. "TXVLANG,Tx VLAN Packets Good" line.long 0x64 "ETH_TX_OSIZE_PACKETS_GOOD,Tx OSsize packets good register" hexmask.long 0x64 0.--31. 1. "TXOSIZG,Tx OSize Packets Good" rgroup.long 0x780++0x67 line.long 0x0 "ETH_RX_PACKETS_COUNT_GOOD_BAD,Rx packets count good bad register" hexmask.long 0x0 0.--31. 1. "RXPKTGB,Rx Packets Count Good Bad" line.long 0x4 "ETH_RX_OCTET_COUNT_GOOD_BAD,Rx octet count good bad register" hexmask.long 0x4 0.--31. 1. "RXOCTGB,Rx Octet Count Good Bad" line.long 0x8 "ETH_RX_OCTET_COUNT_GOOD,Rx octet count good register" hexmask.long 0x8 0.--31. 1. "RXOCTG,Rx Octet Count Good" line.long 0xC "ETH_RX_BROADCAST_PACKETS_GOOD,Rx broadcast packets good register" hexmask.long 0xC 0.--31. 1. "RXBCASTG,Rx Broadcast Packets Good" line.long 0x10 "ETH_RX_MULTICAST_PACKETS_GOOD,Rx multicast packets good register" hexmask.long 0x10 0.--31. 1. "RXMCASTG,Rx Multicast Packets Good" line.long 0x14 "ETH_RX_CRC_ERROR_PACKETS,Rx CRC error packets register" hexmask.long 0x14 0.--31. 1. "RXCRCERR,Rx CRC Error Packets" line.long 0x18 "ETH_RX_ALIGNMENT_ERROR_PACKETS,Rx alignment error packets register" hexmask.long 0x18 0.--31. 1. "RXALGNERR,Rx Alignment Error Packets" line.long 0x1C "ETH_RX_RUNT_ERROR_PACKETS,Rx runt error packets register" hexmask.long 0x1C 0.--31. 1. "RXRUNTERR,Rx Runt Error Packets" line.long 0x20 "ETH_RX_JABBER_ERROR_PACKETS,Rx jabber error packets register" hexmask.long 0x20 0.--31. 1. "RXJABERR,Rx Jabber Error Packets" line.long 0x24 "ETH_RX_UNDERSIZE_PACKETS_GOOD,Rx undersize packets good register" hexmask.long 0x24 0.--31. 1. "RXUNDERSZG,Rx Undersize Packets Good" line.long 0x28 "ETH_RX_OVERSIZE_PACKETS_GOOD,Rx oversize packets good register" hexmask.long 0x28 0.--31. 1. "RXOVERSZG,Rx Oversize Packets Good" line.long 0x2C "ETH_RX_64OCTETS_PACKETS_GOOD_BAD,Rx 64 octets packets good bad register" hexmask.long 0x2C 0.--31. 1. "RX64OCTGB,Rx 64 Octets Packets Good Bad" line.long 0x30 "ETH_RX_65TO127OCTETS_PACKETS_GOOD_BAD,Rx 65 to 127 octets packets good bad register" hexmask.long 0x30 0.--31. 1. "TX65_127OCTGB,Rx 65-127 Octets Packets Good Bad" line.long 0x34 "ETH_RX_128TO255OCTETS_PACKETS_GOOD_BAD,Rx 128 to 255 octets packets good bad register" hexmask.long 0x34 0.--31. 1. "RX128_255OCTGB,Rx 128-255 Octets Packets Good Bad" line.long 0x38 "ETH_RX_256TO511OCTETS_PACKETS_GOOD_BAD,Rx 256 to 511 octets packets good bad register" hexmask.long 0x38 0.--31. 1. "RX256_511OCTGB,Rx 256-511 Octets Packets Good Bad" line.long 0x3C "ETH_RX_512TO1023OCTETS_PACKETS_GOOD_BAD,Rx 512 to 1023 octets packets good bad register" hexmask.long 0x3C 0.--31. 1. "RX512_1023OCTGB,Rx 512-1023 Octets Packets Good Bad" line.long 0x40 "ETH_RX_1024TOMAXOCTETS_PACKETS_GOOD_BAD,Rx 1024 to max octets packets good bad register" hexmask.long 0x40 0.--31. 1. "RX1024_MAXOCTGB,Rx 1024-Max Octets Good Bad" line.long 0x44 "ETH_RX_UNICAST_PACKETS_GOOD,Rx unicast packets good register" hexmask.long 0x44 0.--31. 1. "RXUCASTG,Rx Unicast Packets Good" line.long 0x48 "ETH_RX_LENGTH_ERROR_PACKETS,Rx length error packets register" hexmask.long 0x48 0.--31. 1. "RXLENERR,Rx Length Error Packets" line.long 0x4C "ETH_RX_OUT_OF_RANGE_PACKETS,Rx out of range type packets register" hexmask.long 0x4C 0.--31. 1. "RXOUTOFRNG,Rx Out of Range Type Packet" line.long 0x50 "ETH_RX_PAUSE_PACKETS,Rx pause packets register" hexmask.long 0x50 0.--31. 1. "RXPAUSEPKT,Rx Pause Packets" line.long 0x54 "ETH_RX_FIFO_OVERFLOW_PACKETS,Rx FIFO overflow packets register" hexmask.long 0x54 0.--31. 1. "RXFIFOOVFL,Rx FIFO Overflow Packets" line.long 0x58 "ETH_RX_VLAN_PACKETS_GOOD_BAD,Rx VLAN packets good bad register" hexmask.long 0x58 0.--31. 1. "RXVLANPKTGB,Rx VLAN Packets Good Bad" line.long 0x5C "ETH_RX_WATCHDOG_ERROR_PACKETS,Rx watchdog error packets register" hexmask.long 0x5C 0.--31. 1. "RXWDGERR,Rx Watchdog Error Packets" line.long 0x60 "ETH_RX_RECEIVE_ERROR,Rx receive error register" hexmask.long 0x60 0.--31. 1. "RXRCVERR,Rx Receive Error Packets" line.long 0x64 "ETH_RX_CONTROL_PACKETS_GOOD,Rx control packets good register" hexmask.long 0x64 0.--31. 1. "RXCTRLG,Rx Control Packets Good" rgroup.long 0x7EC++0xF line.long 0x0 "ETH_TX_LPI_USEC_CNTR,Tx LPI microsecond timer register" hexmask.long 0x0 0.--31. 1. "TXLPIUSC,Tx LPI Microseconds Counter" line.long 0x4 "ETH_TX_LPI_TRAN_CNTR,Tx LPI transition counter register" hexmask.long 0x4 0.--31. 1. "TXLPITRC,Tx LPI Transition counter" line.long 0x8 "ETH_RX_LPI_USEC_CNTR,Rx LPI microsecond counter register" hexmask.long 0x8 0.--31. 1. "RXLPIUSC,Rx LPI Microseconds Counter" line.long 0xC "ETH_RX_LPI_TRAN_CNTR,Rx LPI transition counter register" hexmask.long 0xC 0.--31. 1. "RXLPITRC,Rx LPI Transition counter" group.long 0x8A0++0x7 line.long 0x0 "ETH_MMC_FPE_TX_ISR,MMC FPE Tx interrupt status register" bitfld.long 0x0 1. "HRCIS,MMC Tx Hold Request Counter Interrupt Status" "0,1" bitfld.long 0x0 0. "FCIS,MMC Tx FPE Fragment Counter Interrupt status" "0,1" line.long 0x4 "ETH_MMC_FPE_TX_IMR,MMC FPE Tx interrupt mask register" bitfld.long 0x4 1. "HRCIM,MMC Transmit Hold Request Counter Interrupt Mask" "0,1" bitfld.long 0x4 0. "FCIM,MMC Transmit Fragment Counter Interrupt Mask" "0,1" rgroup.long 0x8A8++0x7 line.long 0x0 "ETH_MMC_FPE_TX_FCR,MMC FPE Tx fragment counter register" hexmask.long 0x0 0.--31. 1. "TXFFC,Tx FPE Fragment counter" line.long 0x4 "ETH_MMC_TX_HRCR,MMC Tx hold request counter register" hexmask.long 0x4 0.--31. 1. "TXHRC,Tx Hold Request Counter" rgroup.long 0x8C0++0x3 line.long 0x0 "ETH_MMC_FPE_RX_ISR,MMC FPE Rx interrupt status register" bitfld.long 0x0 3. "FCIS,MMC Rx FPE Fragment Counter Interrupt Status" "0,1" bitfld.long 0x0 2. "PAOCIS,MMC Rx Packet Assembly OK Counter Interrupt Status" "0,1" bitfld.long 0x0 1. "PSECIS,MMC Rx Packet SMD Error Counter Interrupt Status" "0,1" newline bitfld.long 0x0 0. "PAECIS,MMC Rx Packet Assembly Error Counter Interrupt Status" "0,1" group.long 0x8C4++0x3 line.long 0x0 "ETH_MMC_FPE_RX_IMR,MMC FPE Rx interrupt mask register" bitfld.long 0x0 3. "FCIM,MMC Rx FPE Fragment Counter Interrupt Mask" "0,1" bitfld.long 0x0 2. "PAOCIM,MMC Rx Packet Assembly OK Counter Interrupt Mask" "0,1" bitfld.long 0x0 1. "PSECIM,MMC Rx Packet SMD Error Counter Interrupt Mask" "0,1" newline bitfld.long 0x0 0. "PAECIM,MMC Rx Packet Assembly Error Counter Interrupt Mask" "0,1" rgroup.long 0x8C8++0xF line.long 0x0 "ETH_RX_PACKET_ASM_ERR,MMC Rx packet assembly error register" hexmask.long 0x0 0.--31. 1. "PAEC,Rx Packet Assembly Error Counter" line.long 0x4 "ETH_RX_PACKET_SMD_ERR,MMC Rx packet SMD error register" hexmask.long 0x4 0.--31. 1. "PSEC,Rx Packet SMD Error Counter" line.long 0x8 "ETH_RX_PACKET_ASM_OKR,MMC Rx packet assembly OK register" hexmask.long 0x8 0.--31. 1. "PAOC,Rx Packet Assembly OK Counter" line.long 0xC "ETH_RX_FPE_FRAG_CR,MMC Rx FPE fragments counter register" hexmask.long 0xC 0.--31. 1. "FFC,Rx FPE Fragment Counter" group.long 0x900++0x7 line.long 0x0 "ETH_MACL3L4C0R,L3 and L4 control 0 register" bitfld.long 0x0 28. "DMCHEN0,DMA Channel Select Enable" "0,1" bitfld.long 0x0 24. "DMCHN0,DMA Channel Number" "B_0x0,B_0x1" bitfld.long 0x0 21. "L4DPIM0,Layer 4 Destination Port Inverse Match Enable" "0,1" newline bitfld.long 0x0 20. "L4DPM0,Layer 4 Destination Port Match Enable" "0,1" bitfld.long 0x0 19. "L4SPIM0,Layer 4 Source Port Inverse Match Enable" "0,1" bitfld.long 0x0 18. "L4SPM0,Layer 4 Source Port Match Enable" "0,1" newline bitfld.long 0x0 16. "L4PEN0,Layer 4 Protocol Enable" "0,1" hexmask.long.byte 0x0 11.--15. 1. "L3HDBM0,Layer 3 IP DA higher bits match" hexmask.long.byte 0x0 6.--10. 1. "L3HSBM0,Layer 3 IP SA higher bits match" newline bitfld.long 0x0 5. "L3DAIM0,Layer 3 IP DA Inverse Match Enable" "0,1" bitfld.long 0x0 4. "L3DAM0,Layer 3 IP DA Match Enable" "0,1" bitfld.long 0x0 3. "L3SAIM0,Layer 3 IP SA Inverse Match Enable" "0,1" newline bitfld.long 0x0 2. "L3SAM0,Layer 3 IP SA Match Enable" "0,1" bitfld.long 0x0 0. "L3PEN0,Layer 3 Protocol Enable" "0,1" line.long 0x4 "ETH_MACL4A0R,Layer4 Address filter 0 register" hexmask.long.word 0x4 16.--31. 1. "L4DP0,Layer 4 Destination Port Number Field" hexmask.long.word 0x4 0.--15. 1. "L4SP0,Layer 4 Source Port Number Field" group.long 0x910++0xF line.long 0x0 "ETH_MACL3A00R,Layer3 Address 0 filter 0 register" hexmask.long 0x0 0.--31. 1. "L3A00,Layer 3 Address 0 Field" line.long 0x4 "ETH_MACL3A10R,Layer3 Address 1 filter 0 register" hexmask.long 0x4 0.--31. 1. "L3A10,Layer 3 Address 1 Field" line.long 0x8 "ETH_MACL3A20R,Layer3 Address 2 filter 0 register" hexmask.long 0x8 0.--31. 1. "L3A20,Layer 3 Address 2 Field" line.long 0xC "ETH_MACL3A30R,Layer3 Address 3 filter 0 register" hexmask.long 0xC 0.--31. 1. "L3A30,Layer 3 Address 3 Field" group.long 0x930++0x7 line.long 0x0 "ETH_MACL3L4C1R,L3 and L4 control 1 register" bitfld.long 0x0 28. "DMCHEN1,DMA Channel Select Enable" "0,1" bitfld.long 0x0 24. "DMCHN1,DMA Channel Number" "0,1" bitfld.long 0x0 21. "L4DPIM1,Layer 4 Destination Port Inverse Match Enable" "0,1" newline bitfld.long 0x0 20. "L4DPM1,Layer 4 Destination Port Match Enable" "0,1" bitfld.long 0x0 19. "L4SPIM1,Layer 4 Source Port Inverse Match Enable" "0,1" bitfld.long 0x0 18. "L4SPM1,Layer 4 Source Port Match Enable" "0,1" newline bitfld.long 0x0 16. "L4PEN1,Layer 4 Protocol Enable" "0,1" hexmask.long.byte 0x0 11.--15. 1. "L3HDBM1,Layer 3 IP DA higher bits match" hexmask.long.byte 0x0 6.--10. 1. "L3HSBM1,Layer 3 IP SA Higher Bits Match" newline bitfld.long 0x0 5. "L3DAIM1,Layer 3 IP DA Inverse Match Enable" "0,1" bitfld.long 0x0 4. "L3DAM1,Layer 3 IP DA Match Enable" "0,1" bitfld.long 0x0 3. "L3SAIM1,Layer 3 IP SA Inverse Match Enable" "0,1" newline bitfld.long 0x0 2. "L3SAM1,Layer 3 IP SA Match Enable" "0,1" bitfld.long 0x0 0. "L3PEN1,Layer 3 Protocol Enable" "0,1" line.long 0x4 "ETH_MACL4A1R,Layer 4 address filter 1 register" hexmask.long.word 0x4 16.--31. 1. "L4DP1,Layer 4 Destination Port Number Field" hexmask.long.word 0x4 0.--15. 1. "L4SP1,Layer 4 Source Port Number Field" group.long 0x940++0xF line.long 0x0 "ETH_MACL3A01R,Layer3 address 0 filter 1 Register" hexmask.long 0x0 0.--31. 1. "L3A01,Layer 3 Address 0 Field" line.long 0x4 "ETH_MACL3A11R,Layer3 address 1 filter 1 register" hexmask.long 0x4 0.--31. 1. "L3A11,Layer 3 Address 1 Field" line.long 0x8 "ETH_MACL3A21R,Layer3 address 2 filter 1 Register" hexmask.long 0x8 0.--31. 1. "L3A21,Layer 3 Address 2 Field" line.long 0xC "ETH_MACL3A31R,Layer3 address 3 filter 1 register" hexmask.long 0xC 0.--31. 1. "L3A31,Layer 3 Address 3 Field" group.long 0xA70++0x7 line.long 0x0 "ETH_MAC_IACR,MAC Indirect Access Control register" hexmask.long.byte 0x0 16.--19. 1. "MSEL,Mode Select" hexmask.long.byte 0x0 8.--15. 1. "AOFF,Address Offset" bitfld.long 0x0 5. "AUTO,Auto-increment" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "COM,Command type" "B_0x0,B_0x1" bitfld.long 0x0 0. "OB,Operation Busy." "0,1" line.long 0x4 "ETH_MAC_TMRQR,MAC type-based Rx Queue mapping register" bitfld.long 0x4 20. "PFEX,Preemption or Express Packet" "B_0x0,B_0x1" bitfld.long 0x4 16.--18. "TMRQ,Type Match Rx Queue Number" "0,1,2,3,4,5,6,7" hexmask.long.word 0x4 0.--15. 1. "TYP,Type field Value" group.long 0xB00++0x7 line.long 0x0 "ETH_MACTSCR,Timestamp control Register" bitfld.long 0x0 28. "AV8021ASMEN,AV 802." "0,1" bitfld.long 0x0 24. "TXTSSTSM,Transmit Timestamp Status Mode" "0,1" bitfld.long 0x0 20. "ESTI,External System Time Input" "0,1" newline bitfld.long 0x0 18. "TSENMACADDR,Enable MAC Address for PTP Packet Filtering" "0,1" bitfld.long 0x0 16.--17. "SNAPTYPSEL,Select PTP packets for Taking Snapshots" "0,1,2,3" bitfld.long 0x0 15. "TSMSTRENA,Enable Snapshot for Messages Relevant to Master" "0,1" newline bitfld.long 0x0 14. "TSEVNTENA,Enable Timestamp Snapshot for Event Messages" "0,1" bitfld.long 0x0 13. "TSIPV4ENA,Enable Processing of PTP Packets Sent over IPv4-UDP" "0,1" bitfld.long 0x0 12. "TSIPV6ENA,Enable Processing of PTP Packets Sent over IPv6-UDP" "0,1" newline bitfld.long 0x0 11. "TSIPENA,Enable Processing of PTP over Ethernet Packets" "0,1" bitfld.long 0x0 10. "TSVER2ENA,Enable PTP Packet Processing for Version 2 Format" "0,1" bitfld.long 0x0 9. "TSCTRLSSR,Timestamp Digital or Binary Rollover Control" "0,1" newline bitfld.long 0x0 8. "TSENALL,Enable Timestamp for All Packets" "0,1" bitfld.long 0x0 6. "PTGE,Presentation Time Generation Enable" "0,1" bitfld.long 0x0 5. "TSADDREG,Update Addend Register" "0,1" newline bitfld.long 0x0 3. "TSUPDT,Update Timestamp" "0,1" bitfld.long 0x0 2. "TSINIT,Initialize Timestamp" "0,1" bitfld.long 0x0 1. "TSCFUPDT,Fine or Coarse Timestamp Update" "0,1" newline bitfld.long 0x0 0. "TSENA,Enable Timestamp" "0,1" line.long 0x4 "ETH_MACSSIR,Subsecond increment register" hexmask.long.byte 0x4 16.--23. 1. "SSINC,Subsecond Increment Value" rgroup.long 0xB08++0x7 line.long 0x0 "ETH_MACSTSR,System time seconds register" hexmask.long 0x0 0.--31. 1. "TSS,Timestamp Second" line.long 0x4 "ETH_MACSTNR,System time nanoseconds register" hexmask.long 0x4 0.--30. 1. "TSSS,Timestamp subseconds" group.long 0xB10++0xB line.long 0x0 "ETH_MACSTSUR,System time seconds update register" hexmask.long 0x0 0.--31. 1. "TSS,Timestamp Seconds" line.long 0x4 "ETH_MACSTNUR,System time nanoseconds update register" bitfld.long 0x4 31. "ADDSUB,Add or Subtract Time" "0,1" hexmask.long 0x4 0.--30. 1. "TSSS,Timestamp subseconds" line.long 0x8 "ETH_MACTSAR,Timestamp addend register" hexmask.long 0x8 0.--31. 1. "TSAR,Timestamp Addend Register" group.long 0xB20++0xB line.long 0x0 "ETH_MACTSSR,Timestamp status register" hexmask.long.byte 0x0 25.--29. 1. "ATSNS,Number of Auxiliary Timestamp Snapshots" bitfld.long 0x0 24. "ATSSTM,Auxiliary Timestamp Snapshot Trigger Missed" "0,1" hexmask.long.byte 0x0 16.--19. 1. "ATSSTN,Auxiliary Timestamp Snapshot Trigger Identifier" newline bitfld.long 0x0 15. "TXTSSIS,Tx Timestamp Status Interrupt Status" "0,1" bitfld.long 0x0 5. "TSTRGTERR1,Timestamp Target Time Error" "0,1" bitfld.long 0x0 4. "TSTARGT1,Timestamp Target Time Reached" "0,1" newline bitfld.long 0x0 3. "TSTRGTERR0,Timestamp Target Time Error" "0,1" bitfld.long 0x0 2. "AUXTSTRIG,Auxiliary Timestamp Trigger Snapshot" "0,1" bitfld.long 0x0 1. "TSTARGT0,Timestamp Target Time Reached" "0,1" newline bitfld.long 0x0 0. "TSSOVF,Timestamp Seconds Overflow" "0,1" line.long 0x4 "ETH_MACRXDTI,Rx domain time increment register" hexmask.long.word 0x4 16.--31. 1. "RXNS,Receive domain time increment value in nanoseconds" line.long 0x8 "ETH_MACTXDTI,Tx domain time increment register" hexmask.long.word 0x8 16.--31. 1. "TXNS,Transmit domain time increment value in nanoseconds" group.long 0xB30++0x3 line.long 0x0 "ETH_MACTXTSSNR,Tx timestamp status nanoseconds register" rbitfld.long 0x0 31. "TXTSSMIS,Transmit Timestamp Status Missed" "0,1" hexmask.long 0x0 0.--30. 1. "TXTSSLO,Transmit Timestamp Status Low" rgroup.long 0xB34++0x3 line.long 0x0 "ETH_MACTXTSSSR,Tx timestamp status seconds register" hexmask.long 0x0 0.--31. 1. "TXTSSHI,Transmit Timestamp Status High" group.long 0xB40++0x3 line.long 0x0 "ETH_MACACR,Auxiliary control register" bitfld.long 0x0 7. "ATSEN3,Auxiliary Snapshot 3 Enable" "0,1" bitfld.long 0x0 6. "ATSEN2,Auxiliary Snapshot 2 Enable" "0,1" bitfld.long 0x0 5. "ATSEN1,Auxiliary Snapshot 1 Enable" "0,1" newline bitfld.long 0x0 4. "ATSEN0,Auxiliary Snapshot 0 Enable" "0,1" bitfld.long 0x0 0. "ATSFC,Auxiliary Snapshot FIFO Clear" "0,1" rgroup.long 0xB48++0x7 line.long 0x0 "ETH_MACATSNR,Auxiliary timestamp nanoseconds register" hexmask.long 0x0 0.--30. 1. "AUXTSLO,Auxiliary Timestamp" line.long 0x4 "ETH_MACATSSR,Auxiliary timestamp seconds register" hexmask.long 0x4 0.--31. 1. "AUXTSHI,Auxiliary Timestamp" group.long 0xB50++0xF line.long 0x0 "ETH_MACTSIACR,Timestamp Ingress asymmetric correction register" hexmask.long 0x0 0.--31. 1. "OSTIAC,One-Step Timestamp Ingress Asymmetry Correction" line.long 0x4 "ETH_MACTSEACR,Timestamp Egress asymmetric correction register" hexmask.long 0x4 0.--31. 1. "OSTEAC,One-Step Timestamp Egress Asymmetry Correction" line.long 0x8 "ETH_MACTSICNR,Timestamp Ingress correction nanosecond register" hexmask.long 0x8 0.--31. 1. "TSIC,Timestamp Ingress Correction" line.long 0xC "ETH_MACTSECNR,Timestamp Egress correction nanosecond register" hexmask.long 0xC 0.--31. 1. "TSEC,Timestamp Egress Correction" rgroup.long 0xB68++0x7 line.long 0x0 "ETH_MACTSILR,Timestamp Ingress Latency register" hexmask.long.word 0x0 16.--27. 1. "ITLNS,Ingress Timestamp Latency in nanoseconds" hexmask.long.byte 0x0 8.--15. 1. "ITLSNS,Ingress Timestamp Latency in subnanoseconds" line.long 0x4 "ETH_MACTSELR,Timestamp Egress Latency register" hexmask.long.word 0x4 16.--27. 1. "ETLNS,Egress Timestamp Latency in nanoseconds" hexmask.long.byte 0x4 8.--15. 1. "ETLSNS,Egress Timestamp Latency in subnanoseconds" group.long 0xB70++0x3 line.long 0x0 "ETH_MACPPSCR,PPS control register" bitfld.long 0x0 28. "TIMESEL,Time Select" "0,1" bitfld.long 0x0 7. "MCGREN0,MCGR Mode Enable for PPS0 Output" "B_0x0,B_0x1" bitfld.long 0x0 5.--6. "TRGTMODSEL0,Target Time Register Mode for PPS Output" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 4. "PPSEN0,Flexible PPS Output Mode Enable" "0,1" hexmask.long.byte 0x0 0.--3. 1. "PPSCTRL,PPS Output Frequency Control" group.long 0xB70++0x3 line.long 0x0 "ETH_MACPPSCR_ALTERNATE1,PPS control register" bitfld.long 0x0 28. "TIMESEL,Time Select" "0,1" bitfld.long 0x0 15. "MCGREN1,MCGR Mode Enable for PPS Output 1" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "TRGTMODSEL1,Target Time Register Mode for PPS Output 1" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x0 8.--11. 1. "PPSCMD1,Flexible PPS Output 1 Control" bitfld.long 0x0 7. "MCGREN0,MCGR Mode Enable for PPS Output 0" "B_0x0,B_0x1" bitfld.long 0x0 5.--6. "TRGTMODSEL0,Target Time Register Mode for PPS Output 0" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 4. "PPSEN0,Flexible PPS Output 0 Mode Enable" "0,1" hexmask.long.byte 0x0 0.--3. 1. "PPSCMD,Flexible PPS Output 0 (eth_ptp_pps_out) Control" group.long 0xB80++0x1F line.long 0x0 "ETH_MACPPSTTS0R,PPS 0 target time seconds register" hexmask.long 0x0 0.--31. 1. "TSTRH0,PPS Target Time Seconds Register" line.long 0x4 "ETH_MACPPSTTN0R,PPS 0 target time nanoseconds register" bitfld.long 0x4 31. "TRGTBUSY0,PPS Target Time Register Busy" "0,1" hexmask.long 0x4 0.--30. 1. "TTSL0,Target Time Low for PPS Register" line.long 0x8 "ETH_MACPPSI0R,PPS 0 interval register" hexmask.long 0x8 0.--31. 1. "PPSINT0,PPS Output Signal Interval" line.long 0xC "ETH_MACPPSW0R,PPS 0 width register" hexmask.long 0xC 0.--31. 1. "PPSWIDTH0,PPS Output Signal Width" line.long 0x10 "ETH_MACPPSTTS1R,PPS 1 target time seconds register" hexmask.long 0x10 0.--31. 1. "TSTRH0,PPS Target Time Seconds Register" line.long 0x14 "ETH_MACPPSTTN1R,PPS 1 target time nanoseconds register" bitfld.long 0x14 31. "TRGTBUSY0,PPS Target Time Register Busy" "0,1" hexmask.long 0x14 0.--30. 1. "TTSL0,Target Time Low for PPS Register" line.long 0x18 "ETH_MACPPSI1R,PPS 1 interval register" hexmask.long 0x18 0.--31. 1. "PPSINT0,PPS Output Signal Interval" line.long 0x1C "ETH_MACPPSW1R,PPS 1 width register" hexmask.long 0x1C 0.--31. 1. "PPSWIDTH0,PPS Output Signal Width" group.long 0xBC0++0x13 line.long 0x0 "ETH_MACPOCR,PTP Offload control register" hexmask.long.byte 0x0 8.--15. 1. "DN,Domain Number" bitfld.long 0x0 7. "PDRDIS,Disable Peer Delay Response response generation" "0,1" bitfld.long 0x0 6. "DRRDIS,Disable PTO Delay Request/Response response generation" "0,1" newline bitfld.long 0x0 5. "APDREQTRIG,Automatic PTP Pdelay_Req message Trigger" "0,1" bitfld.long 0x0 4. "ASYNCTRIG,Automatic PTP SYNC message Trigger" "0,1" bitfld.long 0x0 2. "APDREQEN,Automatic PTP Pdelay_Req message Enable" "0,1" newline bitfld.long 0x0 1. "ASYNCEN,Automatic PTP SYNC message Enable" "0,1" bitfld.long 0x0 0. "PTOEN,PTP Offload Enable" "0,1" line.long 0x4 "ETH_MACSPI0R,PTP Source Port Identity 0 Register" hexmask.long 0x4 0.--31. 1. "SPI0,Source Port Identity 0" line.long 0x8 "ETH_MACSPI1R,PTP Source port identity 1 register" hexmask.long 0x8 0.--31. 1. "SPI1,Source Port Identity 1" line.long 0xC "ETH_MACSPI2R,PTP Source port identity 2 register" hexmask.long.word 0xC 0.--15. 1. "SPI2,Source Port Identity 2" line.long 0x10 "ETH_MACLMIR,Log message interval register" hexmask.long.byte 0x10 24.--31. 1. "LMPDRI,Log Min Pdelay_Req Interval" bitfld.long 0x10 8.--10. "DRSYNCR,Delay_Req to SYNC Ratio" "B_0x0,B_0x1,?,?,?,?,?,?" hexmask.long.byte 0x10 0.--7. 1. "LSI,Log Sync Interval" group.long 0xC00++0x3 line.long 0x0 "ETH_MTLOMR,Operating mode register" bitfld.long 0x0 9. "CNTCLR,Counters Reset" "0,1" bitfld.long 0x0 8. "CNTPRST,Counters Preset" "0,1" bitfld.long 0x0 5.--6. "SCHALG,Tx Scheduling Algorithm" "B_0x0,?,?,B_0x3" newline bitfld.long 0x0 2. "RAA,Receive Arbitration Algorithm" "B_0x0,B_0x1" bitfld.long 0x0 1. "DTXSTS,Drop Transmit Status" "0,1" rgroup.long 0xC20++0x3 line.long 0x0 "ETH_MTLISR,Interrupt status register" bitfld.long 0x0 18. "ESTIS,EST (TAS- 802." "0,1" bitfld.long 0x0 3. "Q3IS,Queue 3 interrupt status" "0,1" bitfld.long 0x0 2. "Q2IS,Queue 2 interrupt status" "0,1" newline bitfld.long 0x0 1. "Q1IS,Queue 1 interrupt status" "0,1" bitfld.long 0x0 0. "Q0IS,Queue 0 interrupt status" "0,1" group.long 0xC30++0x3 line.long 0x0 "ETH_MTLRXQDMAMR,Rx Queue and DMA Channel Mapping register" bitfld.long 0x0 12. "Q1DDMACH,Queue 1 Enabled for DA-based DMA Channel Selection" "0,1" bitfld.long 0x0 8. "Q1MDMACH,Queue 1 Mapped to DMA Channel" "B_0x0,B_0x1" bitfld.long 0x0 4. "Q0DDMACH,Queue 0 Enabled for DA-based DMA Channel Selection" "0,1" newline bitfld.long 0x0 0. "Q0MDMACH,Queue 0 Mapped to DMA Channel" "B_0x0,B_0x1" group.long 0xC40++0x3 line.long 0x0 "ETH_MTLTBSCR,TBS control register" hexmask.long.tbyte 0x0 8.--31. 1. "LEOS,Launch Expiry Offset" bitfld.long 0x0 4.--6. "LEGOS,Launch Expiry GSN Offset" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "LEOV,Launch expiry offset valid" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "ESTM,EST offset mode" "B_0x0,B_0x1" group.long 0xC50++0xB line.long 0x0 "ETH_MTLESTCR,EST Control register" hexmask.long.byte 0x0 24.--31. 1. "PTOV,PTP Time Offset Value" hexmask.long.word 0x0 12.--23. 1. "CTOV,Current Time Offset Value" bitfld.long 0x0 8.--10. "TILS,Time Interval Left Shift Amount" "B_0x0,B_0x1,B_0x2,?,B_0x4,?,?,?" newline bitfld.long 0x0 6.--7. "LCSE,Loop Count to report Scheduling Error" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 5. "DFBS,Drop Frames causing Scheduling Error" "B_0x0,B_0x1" bitfld.long 0x0 4. "DDBF,Do not Drop frames during Frame Size Error" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "SSWL,Switch to S/W owned list" "0,1" bitfld.long 0x0 0. "EEST,Enable EST" "B_0x0,B_0x1" line.long 0x4 "ETH_MTLESTECR,EST Extended Control register" hexmask.long.byte 0x4 0.--5. 1. "OVHD,Overhead Bytes Value" line.long 0x8 "ETH_MTLESTSR,EST Status register" hexmask.long.byte 0x8 16.--19. 1. "CGSN,Current GCL slot number" hexmask.long.byte 0x8 8.--15. 1. "BTRL,BTR Error Loop Count" rbitfld.long 0x8 7. "SWOL,S/W owned list" "B_0x0,B_0x1" newline bitfld.long 0x8 4. "CGCE,Constant Gate Control Error" "B_0x0,B_0x1" rbitfld.long 0x8 3. "HLBS,Head-Of-Line Blocking due to Scheduling" "B_0x0,B_0x1" rbitfld.long 0x8 2. "HLBF,Head-Of-Line Blocking due to Frame Size" "0,1" newline bitfld.long 0x8 1. "BTRE,BTR Error" "B_0x0,B_0x1" bitfld.long 0x8 0. "SWLC,Switch to S/W owned list Complete" "B_0x0,B_0x1" group.long 0xC60++0x7 line.long 0x0 "ETH_MTLESTSCHER,EST Schedule Error register" hexmask.long.byte 0x0 0.--3. 1. "SEQN,Schedule Error Queue Number" line.long 0x4 "ETH_MTLESTFSER,EST Frame size Error register" hexmask.long.byte 0x4 0.--3. 1. "FEQN,Frame Size Error Queue Number" rgroup.long 0xC68++0x3 line.long 0x0 "ETH_MTLESTFSCR,EST Frame size Capture register" bitfld.long 0x0 16.--17. "HBFQ,Queue Number of HLBF" "0,1,2,3" hexmask.long.word 0x0 0.--14. 1. "HBFS,Frame Size of HLBF" group.long 0xC70++0x3 line.long 0x0 "ETH_MTLESTIER,EST Interrupt Enable register" bitfld.long 0x0 4. "CGCE,Interrupt Enable for CGCE" "0,1" bitfld.long 0x0 3. "IEHS,Interrupt Enable for HLBS" "0,1" bitfld.long 0x0 2. "IEHF,Interrupt Enable for HLBF" "0,1" newline bitfld.long 0x0 1. "IEBE,Interrupt Enable for BTR Error" "0,1" bitfld.long 0x0 0. "IECC,Interrupt Enable for Switch List" "0,1" group.long 0xC80++0x7 line.long 0x0 "ETH_MTLESTGCLCR,EST Gate Control List register" hexmask.long.byte 0x0 8.--13. 1. "ADDR,Gate Control List Address:" bitfld.long 0x0 5. "DBGB,Debug Mode Bank Select" "B_0x0,B_0x1" bitfld.long 0x0 4. "DBGM,Debug Mode" "0,1" newline bitfld.long 0x0 2. "GCRR,Gate Control Related registers" "0,1" bitfld.long 0x0 1. "R1W0,Read 1 Write 0" "B_0x0,B_0x1" bitfld.long 0x0 0. "SRWO,Start Read/Write Operation" "?,B_0x1" line.long 0x4 "ETH_MTLESTGCLDR,EST Gate Control List Data register" hexmask.long 0x4 0.--31. 1. "GCD,Gate Control Data" group.long 0xC90++0x7 line.long 0x0 "ETH_MTLFPECSR,FPE Frame Preemption Control Status register" bitfld.long 0x0 28. "HRS,Hold/Release Status" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--11. 1. "PEC,Preemption Classification" bitfld.long 0x0 7. "LBHT,Level-based Hold Transition" "0,1" newline bitfld.long 0x0 0.--1. "AFSZ,Additional Fragment Size" "0,1,2,3" line.long 0x4 "ETH_MTLFPEAR,FPE Frame Preemption Advance register" hexmask.long.word 0x4 16.--31. 1. "RADV,Release Advance" hexmask.long.word 0x4 0.--15. 1. "HADV,Hold Advance" group.long 0xD00++0x7 line.long 0x0 "ETH_MTLTXQ0OMR,T0 queue 0 operating mode register" hexmask.long.byte 0x0 16.--20. 1. "TQS,Transmit queue size" bitfld.long 0x0 4.--6. "TTC,Transmit Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 2.--3. "TXQEN,Transmit Queue Enable" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 1. "TSF,Transmit Store and Forward" "0,1" bitfld.long 0x0 0. "FTQ,Flush Transmit Queue" "0,1" line.long 0x4 "ETH_MTLTXQ0UR,T0 queue 0 underflow register" bitfld.long 0x4 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter" "0,1" hexmask.long.word 0x4 0.--10. 1. "UFFRMCNT,Underflow Packet Counter" rgroup.long 0xD08++0x3 line.long 0x0 "ETH_MTLTXQ0DR,T0 queue 0 debug register" bitfld.long 0x0 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--18. "PTXQ,Number of Packets in the Transmit Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status" "0,1" newline bitfld.long 0x0 4. "TXQSTS,MTL Tx Queue Not Empty Status" "0,1" bitfld.long 0x0 3. "TWCSTS,MTL Tx Queue Write Controller Status" "0,1" bitfld.long 0x0 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "TXQPAUSED,Transmit Queue in Pause" "0,1" rgroup.long 0xD14++0x3 line.long 0x0 "ETH_MTLTXQ0ESR,T0 queue 0 ETS status register" hexmask.long.tbyte 0x0 0.--23. 1. "ABS,Average Bits per Slot" group.long 0xD18++0x3 line.long 0x0 "ETH_MTLTXQ0QWR,T0 queue 0 quantum weight register" hexmask.long.word 0x0 0.--13. 1. "ISCQW,IdleSlopeCredit or Weights" group.long 0xD2C++0xB line.long 0x0 "ETH_MTLQ0ICSR,Queue 0 interrupt control status register" bitfld.long 0x0 24. "RXOIE,Receive Queue Overflow Interrupt Enable" "0,1" bitfld.long 0x0 16. "RXOVFIS,Receive Queue Overflow Interrupt Status" "0,1" bitfld.long 0x0 9. "ABPSIE,Average Bits Per Slot Interrupt Enable" "0,1" newline bitfld.long 0x0 8. "TXUIE,Transmit Queue Underflow Interrupt Enable" "0,1" bitfld.long 0x0 1. "ABPSIS,Average Bits Per Slot Interrupt Status" "0,1" bitfld.long 0x0 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status" "0,1" line.long 0x4 "ETH_MTLRXQ0OMR,R0 queue 0 operating mode register" hexmask.long.byte 0x4 20.--23. 1. "RQS,Receive Queue Size" bitfld.long 0x4 14.--16. "RFD,Threshold for Deactivating Flow Control (in Half-duplex and Full-duplex modes)" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 8.--10. "RFA,Threshold for Activating Flow Control (in Half-duplex and Full-duplex)" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 7. "EHFC,Enable Hardware Flow Control" "0,1" bitfld.long 0x4 6. "DIS_TCP_EF,Disable Dropping of TCP/IP Checksum Error Packets" "0,1" bitfld.long 0x4 5. "RSF,Receive Queue Store and Forward" "0,1" newline bitfld.long 0x4 4. "FEP,Forward Error Packets" "0,1" bitfld.long 0x4 3. "FUP,Forward Undersized Good Packets" "0,1" bitfld.long 0x4 0.--1. "RTC,Receive Queue Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "ETH_MTLRXQ0MPOCR,R0 queue 0 missed packet and overflow counter register" bitfld.long 0x8 27. "MISCNTOVF,Missed Packet Counter Overflow Bit" "0,1" hexmask.long.word 0x8 16.--26. 1. "MISPKTCNT,Missed Packet Counter" bitfld.long 0x8 11. "OVFCNTOVF,Overflow Counter Overflow Bit" "0,1" newline hexmask.long.word 0x8 0.--10. 1. "OVFPKTCNT,Overflow Packet Counter" rgroup.long 0xD38++0x3 line.long 0x0 "ETH_MTLRXQ0DR,R0 queue 0 debug register" hexmask.long.word 0x0 16.--29. 1. "PRXQ,Number of Packets in Receive Queue" bitfld.long 0x0 4.--5. "RXQSTS,MTL Rx Queue Fill-Level Status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "RRCSTS,MTL Rx Queue Read Controller State" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "RWCSTS,MTL Rx Queue Write Controller Active Status" "0,1" group.long 0xD3C++0xB line.long 0x0 "ETH_MTLRXQ0CR,R0 queue 0 control register" bitfld.long 0x0 3. "RXQ_FRM_ARBIT,Receive Queue Packet Arbitration" "0,1" bitfld.long 0x0 0.--2. "RXQ_WEGT,Receive Queue Weight" "0,1,2,3,4,5,6,7" line.long 0x4 "ETH_MTLTXQ1OMR,T1 queue 1 operating mode register" hexmask.long.byte 0x4 16.--20. 1. "TQS,Transmit queue size" bitfld.long 0x4 4.--6. "TTC,Transmit Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 2.--3. "TXQEN,Transmit Queue Enable" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 1. "TSF,Transmit Store and Forward" "0,1" bitfld.long 0x4 0. "FTQ,Flush Transmit Queue" "0,1" line.long 0x8 "ETH_MTLTXQ1UR,T1 queue 1 underflow register" bitfld.long 0x8 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter" "0,1" hexmask.long.word 0x8 0.--10. 1. "UFFRMCNT,Underflow Packet Counter" rgroup.long 0xD48++0x3 line.long 0x0 "ETH_MTLTXQ1DR,T1 queue 1 debug register" bitfld.long 0x0 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--18. "PTXQ,Number of Packets in the Transmit Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status" "0,1" newline bitfld.long 0x0 4. "TXQSTS,MTL Tx Queue Not Empty Status" "0,1" bitfld.long 0x0 3. "TWCSTS,MTL Tx Queue Write Controller Status" "0,1" bitfld.long 0x0 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "TXQPAUSED,Transmit Queue in Pause" "0,1" group.long 0xD50++0x3 line.long 0x0 "ETH_MTLTXQ1ECR,T1 queue 1 ETS control register" bitfld.long 0x0 4.--6. "SLC,Slot Count" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 3. "CC,Credit Control" "0,1" bitfld.long 0x0 2. "AVALG,AV Algorithm" "0,1" rgroup.long 0xD54++0x3 line.long 0x0 "ETH_MTLTXQ1ESR,T1 queue 1 ETS status register" hexmask.long.tbyte 0x0 0.--23. 1. "ABS,Average Bits per Slot" group.long 0xD58++0xF line.long 0x0 "ETH_MTLTXQ1QWR,T1 queue 1 quantum weight register" hexmask.long.word 0x0 0.--13. 1. "ISCQW,IdleSlopeCredit or Weights" line.long 0x4 "ETH_MTLTXQ1SSCR,T1 queue 1 send slope credit register" hexmask.long.word 0x4 0.--13. 1. "SSC,sendSlopeCredit Value" line.long 0x8 "ETH_MTLTXQ1HCR,T1 Queue 1 hiCredit register" hexmask.long 0x8 0.--28. 1. "HC,hiCredit Value" line.long 0xC "ETH_MTLTXQ1LCR,T1 queue 1 loCredit register" hexmask.long 0xC 0.--28. 1. "LC,loCredit Value" group.long 0xD6C++0xB line.long 0x0 "ETH_MTLQ1ICSR,Queue 1 interrupt control status register" bitfld.long 0x0 24. "RXOIE,Receive Queue Overflow Interrupt Enable" "0,1" bitfld.long 0x0 16. "RXOVFIS,Receive Queue Overflow Interrupt Status" "0,1" bitfld.long 0x0 9. "ABPSIE,Average Bits Per Slot Interrupt Enable" "0,1" newline bitfld.long 0x0 8. "TXUIE,Transmit Queue Underflow Interrupt Enable" "0,1" bitfld.long 0x0 1. "ABPSIS,Average Bits Per Slot Interrupt Status" "0,1" bitfld.long 0x0 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status" "0,1" line.long 0x4 "ETH_MTLRXQ1OMR,R1 queue 1 operating mode register" hexmask.long.byte 0x4 20.--23. 1. "RQS,Receive Queue Size" bitfld.long 0x4 14.--16. "RFD,Threshold for Deactivating Flow Control (in Half-duplex and Full-duplex modes)" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 8.--10. "RFA,Threshold for Activating Flow Control (in Half-duplex and Full-duplex)" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 7. "EHFC,Enable Hardware Flow Control" "0,1" bitfld.long 0x4 6. "DIS_TCP_EF,Disable Dropping of TCP/IP Checksum Error Packets" "0,1" bitfld.long 0x4 5. "RSF,Receive Queue Store and Forward" "0,1" newline bitfld.long 0x4 4. "FEP,Forward Error Packets" "0,1" bitfld.long 0x4 3. "FUP,Forward Undersized Good Packets" "0,1" bitfld.long 0x4 0.--1. "RTC,Receive Queue Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "ETH_MTLRXQ1MPOCR,R1 queue 1 missed packet and overflow counter register" bitfld.long 0x8 27. "MISCNTOVF,Missed Packet Counter Overflow Bit" "0,1" hexmask.long.word 0x8 16.--26. 1. "MISPKTCNT,Missed Packet Counter" bitfld.long 0x8 11. "OVFCNTOVF,Overflow Counter Overflow Bit" "0,1" newline hexmask.long.word 0x8 0.--10. 1. "OVFPKTCNT,Overflow Packet Counter" rgroup.long 0xD78++0x3 line.long 0x0 "ETH_MTLRXQ1DR,R1 queue 1 debug register" hexmask.long.word 0x0 16.--29. 1. "PRXQ,Number of Packets in Receive Queue" bitfld.long 0x0 4.--5. "RXQSTS,MTL Rx Queue Fill-Level Status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "RRCSTS,MTL Rx Queue Read Controller State" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "RWCSTS,MTL Rx Queue Write Controller Active Status" "0,1" group.long 0xD7C++0xB line.long 0x0 "ETH_MTLRXQ1CR,R1 queue 1 control register" bitfld.long 0x0 3. "RXQ_FRM_ARBIT,Receive Queue Packet Arbitration" "0,1" bitfld.long 0x0 0.--2. "RXQ_WEGT,Receive Queue Weight" "0,1,2,3,4,5,6,7" line.long 0x4 "ETH_MTLTXQ2OMR,T2 queue 2 operating mode register" hexmask.long.byte 0x4 16.--20. 1. "TQS,Transmit queue size" bitfld.long 0x4 4.--6. "TTC,Transmit Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 2.--3. "TXQEN,Transmit Queue Enable" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 1. "TSF,Transmit Store and Forward" "0,1" bitfld.long 0x4 0. "FTQ,Flush Transmit Queue" "0,1" line.long 0x8 "ETH_MTLTXQ2UR,T2 queue 2 underflow register" bitfld.long 0x8 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter" "0,1" hexmask.long.word 0x8 0.--10. 1. "UFFRMCNT,Underflow Packet Counter" rgroup.long 0xD88++0x3 line.long 0x0 "ETH_MTLTXQ2DR,T2 queue 2 debug register" bitfld.long 0x0 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--18. "PTXQ,Number of Packets in the Transmit Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status" "0,1" newline bitfld.long 0x0 4. "TXQSTS,MTL Tx Queue Not Empty Status" "0,1" bitfld.long 0x0 3. "TWCSTS,MTL Tx Queue Write Controller Status" "0,1" bitfld.long 0x0 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "TXQPAUSED,Transmit Queue in Pause" "0,1" group.long 0xD90++0x3 line.long 0x0 "ETH_MTLTXQ2ECR,T2 queue 2 ETS control register" bitfld.long 0x0 4.--6. "SLC,Slot Count" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 3. "CC,Credit Control" "0,1" bitfld.long 0x0 2. "AVALG,AV Algorithm" "0,1" rgroup.long 0xD94++0x3 line.long 0x0 "ETH_MTLTXQ2ESR,T2 queue 2 ETS status register" hexmask.long.tbyte 0x0 0.--23. 1. "ABS,Average Bits per Slot" group.long 0xD98++0xF line.long 0x0 "ETH_MTLTXQ2QWR,T2 queue 2 quantum weight register" hexmask.long.word 0x0 0.--13. 1. "ISCQW,IdleSlopeCredit or Weights" line.long 0x4 "ETH_MTLTXQ2SSCR,T2 queue 2 send slope credit register" hexmask.long.word 0x4 0.--13. 1. "SSC,sendSlopeCredit Value" line.long 0x8 "ETH_MTLTXQ2HCR,T2 Queue 2 hiCredit register" hexmask.long 0x8 0.--28. 1. "HC,hiCredit Value" line.long 0xC "ETH_MTLTXQ2LCR,T2 queue 2 loCredit register" hexmask.long 0xC 0.--28. 1. "LC,loCredit Value" group.long 0xDAC++0x3 line.long 0x0 "ETH_MTLQ2ICSR,Queue 2 interrupt control status register" bitfld.long 0x0 24. "RXOIE,Receive Queue Overflow Interrupt Enable" "0,1" bitfld.long 0x0 16. "RXOVFIS,Receive Queue Overflow Interrupt Status" "0,1" bitfld.long 0x0 9. "ABPSIE,Average Bits Per Slot Interrupt Enable" "0,1" newline bitfld.long 0x0 8. "TXUIE,Transmit Queue Underflow Interrupt Enable" "0,1" bitfld.long 0x0 1. "ABPSIS,Average Bits Per Slot Interrupt Status" "0,1" bitfld.long 0x0 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status" "0,1" group.long 0xDC0++0x7 line.long 0x0 "ETH_MTLTXQ3OMR,T3 queue 3 operating mode register" hexmask.long.byte 0x0 16.--20. 1. "TQS,Transmit queue size" bitfld.long 0x0 4.--6. "TTC,Transmit Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 2.--3. "TXQEN,Transmit Queue Enable" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 1. "TSF,Transmit Store and Forward" "0,1" bitfld.long 0x0 0. "FTQ,Flush Transmit Queue" "0,1" line.long 0x4 "ETH_MTLTXQ3UR,T3 queue 3 underflow register" bitfld.long 0x4 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter" "0,1" hexmask.long.word 0x4 0.--10. 1. "UFFRMCNT,Underflow Packet Counter" rgroup.long 0xDC8++0x3 line.long 0x0 "ETH_MTLTXQ3DR,T3 queue 3 debug register" bitfld.long 0x0 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--18. "PTXQ,Number of Packets in the Transmit Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status" "0,1" newline bitfld.long 0x0 4. "TXQSTS,MTL Tx Queue Not Empty Status" "0,1" bitfld.long 0x0 3. "TWCSTS,MTL Tx Queue Write Controller Status" "0,1" bitfld.long 0x0 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "TXQPAUSED,Transmit Queue in Pause" "0,1" group.long 0xDD0++0x3 line.long 0x0 "ETH_MTLTXQ3ECR,T3 queue 3 ETS control register" bitfld.long 0x0 4.--6. "SLC,Slot Count" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 3. "CC,Credit Control" "0,1" bitfld.long 0x0 2. "AVALG,AV Algorithm" "0,1" rgroup.long 0xDD4++0x3 line.long 0x0 "ETH_MTLTXQ3ESR,T3 queue 3 ETS status register" hexmask.long.tbyte 0x0 0.--23. 1. "ABS,Average Bits per Slot" group.long 0xDD8++0xF line.long 0x0 "ETH_MTLTXQ3QWR,T3 queue 3 quantum weight register" hexmask.long.word 0x0 0.--13. 1. "ISCQW,IdleSlopeCredit or Weights" line.long 0x4 "ETH_MTLTXQ3SSCR,T3 queue 3 send slope credit register" hexmask.long.word 0x4 0.--13. 1. "SSC,sendSlopeCredit Value" line.long 0x8 "ETH_MTLTXQ3HCR,T3 Queue 3 hiCredit register" hexmask.long 0x8 0.--28. 1. "HC,hiCredit Value" line.long 0xC "ETH_MTLTXQ3LCR,T3 queue 3 loCredit register" hexmask.long 0xC 0.--28. 1. "LC,loCredit Value" group.long 0xDEC++0x3 line.long 0x0 "ETH_MTLQ3ICSR,Queue 3 interrupt control status register" bitfld.long 0x0 24. "RXOIE,Receive Queue Overflow Interrupt Enable" "0,1" bitfld.long 0x0 16. "RXOVFIS,Receive Queue Overflow Interrupt Status" "0,1" bitfld.long 0x0 9. "ABPSIE,Average Bits Per Slot Interrupt Enable" "0,1" newline bitfld.long 0x0 8. "TXUIE,Transmit Queue Underflow Interrupt Enable" "0,1" bitfld.long 0x0 1. "ABPSIS,Average Bits Per Slot Interrupt Status" "0,1" bitfld.long 0x0 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status" "0,1" group.long 0x1000++0x7 line.long 0x0 "ETH_DMAMR,DMA mode register" bitfld.long 0x0 16.--17. "INTM,Interrupt Mode" "0,1,2,3" bitfld.long 0x0 11. "TXPR,Transmit priority" "0,1" bitfld.long 0x0 8. "DSPW,Descriptor Posted Write" "B_0x0,B_0x1" newline rbitfld.long 0x0 4. "TAA2,Transmit Arbitration Algorithm" "B_0x0,B_0x1" rbitfld.long 0x0 3. "TAA1,Transmit Arbitration Algorithm" "B_0x0,B_0x1" rbitfld.long 0x0 2. "TAA0,Transmit Arbitration Algorithm" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "SWR,Software Reset" "0,1" line.long 0x4 "ETH_DMASBMR,System bus mode register" bitfld.long 0x4 31. "EN_LPI,Enable Low Power Interface (LPI)" "0,1" bitfld.long 0x4 30. "LPI_XIT_PKT,Unlock on Magic Packet or Remote wake-up Packet" "0,1" bitfld.long 0x4 24.--25. "WR_OSR_LMT,AXI Maximum Write Outstanding Request Limit" "0,1,2,3" newline bitfld.long 0x4 16.--17. "RD_OSR_LMT,AXI Maximum Read Outstanding Request Limit" "0,1,2,3" bitfld.long 0x4 13. "ONEKBBE,1 Kbyte Boundary Crossing Enable for the AXI Master" "0,1" bitfld.long 0x4 12. "AAL,Address-Aligned Beats" "0,1" newline bitfld.long 0x4 10. "AALE,Automatic AXI LPI enable" "0,1" bitfld.long 0x4 7. "BLEN256,AXI Burst Length 256" "0,1" bitfld.long 0x4 6. "BLEN128,AXI Burst Length 128" "0,1" newline bitfld.long 0x4 5. "BLEN64,AXI Burst Length 64" "0,1" bitfld.long 0x4 4. "BLEN32,AXI Burst Length 32" "0,1" bitfld.long 0x4 3. "BLEN16,AXI Burst Length 16" "0,1" newline bitfld.long 0x4 2. "BLEN8,AXI Burst Length 8" "0,1" bitfld.long 0x4 1. "BLEN4,AXI Burst Length 4" "0,1" bitfld.long 0x4 0. "FB,Fixed Burst Length" "0,1" rgroup.long 0x1008++0xB line.long 0x0 "ETH_DMAISR,Interrupt status register" bitfld.long 0x0 17. "MACIS,MAC Interrupt Status" "0,1" bitfld.long 0x0 16. "MTLIS,MTL Interrupt Status" "0,1" bitfld.long 0x0 3. "DC3IS,DMA Channel 3 Interrupt Status" "0,1" newline bitfld.long 0x0 2. "DC2IS,DMA Channel 2 Interrupt Status" "0,1" bitfld.long 0x0 1. "DC1IS,DMA Channel 1 Interrupt Status" "0,1" bitfld.long 0x0 0. "DC0IS,DMA Channel Interrupt Status" "0,1" line.long 0x4 "ETH_DMADS1R,Debug status 1 register" hexmask.long.byte 0x4 28.--31. 1. "TPS2,DMA Channel 2 Transmit Process State" hexmask.long.byte 0x4 20.--23. 1. "TPS1,DMA Channel 1 Transmit Process State" hexmask.long.byte 0x4 16.--19. 1. "RPS1,DMA Channel 1 Receive Process State" newline hexmask.long.byte 0x4 12.--15. 1. "TPS0,DMA Channel Transmit Process State" hexmask.long.byte 0x4 8.--11. 1. "RPS0,DMA Channel Receive Process State" bitfld.long 0x4 1. "AXRHSTS,AXI Master Read Channel Status" "0,1" newline bitfld.long 0x4 0. "AXWHSTS,AXI Master Write Channel" "0,1" line.long 0x8 "ETH_DMADS2R,Debug status 2 register" hexmask.long.byte 0x8 4.--7. 1. "TPS3,DMA Channel 3 Transmit Process State" group.long 0x1020++0xB line.long 0x0 "ETH_DMAA4TXACR,AXI4 transmit channel ACE control register" hexmask.long.byte 0x0 16.--19. 1. "THC,Transmit DMA First Packet Buffer or TSO Header Cache Control" hexmask.long.byte 0x0 8.--11. 1. "TEC,Transmit DMA Extended Packet Buffer or TSO Payload Cache Control" hexmask.long.byte 0x0 0.--3. 1. "TDRC,Transmit DMA Read Descriptor Cache Control" line.long 0x4 "ETH_DMAA4RXACR,AXI4 receive channel ACE control register" hexmask.long.byte 0x4 24.--27. 1. "RDC,Receive DMA Buffer Cache Control" hexmask.long.byte 0x4 16.--19. 1. "RHC,Receive DMA Header Cache Control" hexmask.long.byte 0x4 8.--11. 1. "RPC,Receive DMA Payload Cache Control" newline hexmask.long.byte 0x4 0.--3. 1. "RDWC,Receive DMA Write Descriptor Cache Control" line.long 0x8 "ETH_DMAA4DACR,AXI4 descriptor ACE control register" hexmask.long.byte 0x8 8.--11. 1. "RDRC,Receive DMA Read Descriptor Cache control" bitfld.long 0x8 4.--5. "TDWD,Transmit DMA Write Descriptor Domain control" "0,1,2,3" hexmask.long.byte 0x8 0.--3. 1. "TDWC,Transmit DMA Write Descriptor Cache control" group.long 0x1040++0x3 line.long 0x0 "ETH_DMALPIEI,AXI4 LPI Entry Interval register" hexmask.long.byte 0x0 0.--3. 1. "LPIEI,LPI Entry Interval" group.long 0x1050++0x3 line.long 0x0 "ETH_DMATBSCTRL0R,DMA TBS control register 0" hexmask.long.tbyte 0x0 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0x0 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" group.long 0x1050++0xF line.long 0x0 "ETH_DMATBSCTRL0R_ALTERNATE1,DMA TBS control register 0" hexmask.long.tbyte 0x0 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0x0 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" line.long 0x4 "ETH_DMATBSCTRL1R,DMA TBS control register 1" hexmask.long.tbyte 0x4 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0x4 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" line.long 0x8 "ETH_DMATBSCTRL2R,DMA TBS control register 2" hexmask.long.tbyte 0x8 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0x8 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" line.long 0xC "ETH_DMATBSCTRL3R,DMA TBS control register 3" hexmask.long.tbyte 0xC 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0xC 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" group.long 0x1100++0xB line.long 0x0 "ETH_DMAC0CR,Channel 0 control register" bitfld.long 0x0 18.--20. "DSL,Descriptor Skip Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "PBLX8,8xPBL mode" "0,1" hexmask.long.word 0x0 0.--13. 1. "MSS,Maximum Segment Size" line.long 0x4 "ETH_DMAC0TXCR,Channel 0 transmit control register" bitfld.long 0x4 30. "TFSEL1,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 29. "TFSEL0,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 28. "EDSE,Enhanced Descriptor Enable" "0,1" newline hexmask.long.byte 0x4 24.--27. 1. "TQOS,Transmit QOS" hexmask.long.byte 0x4 16.--21. 1. "TXPBL,Transmit Programmable Burst Length" bitfld.long 0x4 15. "IPBL,Ignore PBL Requirement" "0,1" newline bitfld.long 0x4 12. "TSE,TCP Segmentation Enabled" "0,1" bitfld.long 0x4 4. "OSF,Operate on Second Packet" "0,1" rbitfld.long 0x4 1.--3. "TCW,Transmit Channel Weight" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0. "ST,Start or Stop Transmission Command" "0,1" line.long 0x8 "ETH_DMAC0RXCR,Channel 0 receive control register" bitfld.long 0x8 31. "RPF,DMA Rx Channel x Packet Flush" "0,1" hexmask.long.byte 0x8 24.--27. 1. "RQOS,Rx AXI4 QOS." hexmask.long.byte 0x8 16.--21. 1. "RXPBL,Receive Programmable Burst Length" newline hexmask.long.word 0x8 1.--14. 1. "RBSZ,Receive Buffer size" bitfld.long 0x8 0. "SR,Start or Stop Receive" "0,1" group.long 0x1114++0x3 line.long 0x0 "ETH_DMAC0TXDLAR,Channel 0 T0 descriptor list address register" hexmask.long 0x0 0.--31. 1. "TDESLA,Start of Transmit List" group.long 0x111C++0x7 line.long 0x0 "ETH_DMAC0RXDLAR,Channel 0 R0 descriptor list address register" hexmask.long 0x0 0.--31. 1. "RDESLA,Start of Receive List" line.long 0x4 "ETH_DMAC0TXDTPR,Channel 0 T0 descriptor tail pointer register" hexmask.long 0x4 0.--31. 1. "TDT,Transmit Descriptor Tail Pointer" group.long 0x1128++0x17 line.long 0x0 "ETH_DMAC0RXDTPR,Channel 0 R0 descriptor tail pointer register" hexmask.long 0x0 0.--31. 1. "RDT,Receive Descriptor Tail Pointer" line.long 0x4 "ETH_DMAC0TXRLR,Channel 0 T0 descriptor ring length register" hexmask.long.word 0x4 0.--9. 1. "TDRL,Transmit Descriptor Ring Length" line.long 0x8 "ETH_DMAC0RXRLR,Channel 0 R0 descriptor ring length register" hexmask.long.byte 0x8 17.--23. 1. "ARBS,Alternate Receive Buffer Size" hexmask.long.word 0x8 0.--9. 1. "RDRL,Receive Descriptor Ring Length" line.long 0xC "ETH_DMAC0IER,Channel 0 interrupt enable register" bitfld.long 0xC 15. "NIE,Normal Interrupt Summary Enable" "0,1" bitfld.long 0xC 14. "AIE,Abnormal Interrupt Summary Enable" "0,1" bitfld.long 0xC 13. "CDEE,Context Descriptor Error Enable" "0,1" newline bitfld.long 0xC 12. "FBEE,Fatal Bus Error Enable" "0,1" bitfld.long 0xC 11. "ERIE,Early Receive Interrupt Enable" "0,1" bitfld.long 0xC 10. "ETIE,Early Transmit Interrupt Enable" "0,1" newline bitfld.long 0xC 9. "RWTE,Receive Watchdog Timeout Enable" "0,1" bitfld.long 0xC 8. "RSE,Receive Stopped Enable" "0,1" bitfld.long 0xC 7. "RBUE,Receive Buffer Unavailable Enable" "0,1" newline bitfld.long 0xC 6. "RIE,Receive Interrupt Enable" "0,1" bitfld.long 0xC 2. "TBUE,Transmit Buffer Unavailable Enable" "0,1" bitfld.long 0xC 1. "TXSE,Transmit Stopped Enable" "0,1" newline bitfld.long 0xC 0. "TIE,Transmit Interrupt Enable" "0,1" line.long 0x10 "ETH_DMAC0RXIWTR,Channel 0 R0 interrupt watchdog timer register" bitfld.long 0x10 16.--17. "RWTU,Receive Interrupt Watchdog Timer Count Units" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x10 0.--7. 1. "RWT,Receive Interrupt Watchdog Timer Count" line.long 0x14 "ETH_DMAC0SFCSR,Channel 0 slot function control status register" hexmask.long.byte 0x14 16.--19. 1. "RSN,Reference Slot Number" hexmask.long.word 0x14 4.--15. 1. "SIV,Slot Interval Value" bitfld.long 0x14 1. "ASC,Advance Slot Check" "0,1" newline bitfld.long 0x14 0. "ESC,Enable Slot Comparison" "0,1" rgroup.long 0x1144++0x3 line.long 0x0 "ETH_DMAC0CATXDR,Channel 0 current application transmit descriptor register" hexmask.long 0x0 0.--31. 1. "CURTDESAPTR,Application Transmit Descriptor Address Pointer" rgroup.long 0x114C++0x3 line.long 0x0 "ETH_DMAC0CARXDR,Channel 0 current application receive descriptor register" hexmask.long 0x0 0.--31. 1. "CURRDESAPTR,Application Receive Descriptor Address Pointer" rgroup.long 0x1154++0x3 line.long 0x0 "ETH_DMAC0CATXBR,Channel 0 current application transmit buffer register" hexmask.long 0x0 0.--31. 1. "CURTBUFAPTR,Application Transmit Buffer Address Pointer" rgroup.long 0x115C++0x3 line.long 0x0 "ETH_DMAC0CARXBR,Channel 0 current application receive buffer register" hexmask.long 0x0 0.--31. 1. "CURRBUFAPTR,Application Receive Buffer Address Pointer" group.long 0x1160++0x7 line.long 0x0 "ETH_DMAC0SR,Channel 0 status register" rbitfld.long 0x0 19.--21. "REB,Rx DMA Error Bits" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 16.--18. "TEB,Tx DMA Error Bits" "0,1,2,3,4,5,6,7" bitfld.long 0x0 15. "NIS,Normal Interrupt Summary" "0,1" newline bitfld.long 0x0 14. "AIS,Abnormal Interrupt Summary" "0,1" bitfld.long 0x0 13. "CDE,Context Descriptor Error" "0,1" bitfld.long 0x0 12. "FBE,Fatal Bus Error" "0,1" newline bitfld.long 0x0 11. "ERI,Early Receive Interrupt" "0,1" bitfld.long 0x0 10. "ETI,Early Transmit Interrupt" "0,1" bitfld.long 0x0 9. "RWT,Receive Watchdog Timeout" "0,1" newline bitfld.long 0x0 8. "RPS,Receive Process Stopped" "0,1" bitfld.long 0x0 7. "RBU,Receive Buffer Unavailable" "0,1" bitfld.long 0x0 6. "RI,Receive Interrupt" "0,1" newline bitfld.long 0x0 2. "TBU,Transmit Buffer Unavailable" "0,1" bitfld.long 0x0 1. "TPS,Transmit Process Stopped" "0,1" bitfld.long 0x0 0. "TI,Transmit Interrupt" "0,1" line.long 0x4 "ETH_DMAC0MFCR,Channel 0 missed frame count register" bitfld.long 0x4 15. "MFCO,Overflow status of the MFC Counter" "0,1" hexmask.long.word 0x4 0.--10. 1. "MFC,Dropped Packet Counters" group.long 0x1180++0xB line.long 0x0 "ETH_DMAC1CR,Channel 1 control register" bitfld.long 0x0 18.--20. "DSL,Descriptor Skip Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "PBLX8,8xPBL mode" "0,1" hexmask.long.word 0x0 0.--13. 1. "MSS,Maximum Segment Size" line.long 0x4 "ETH_DMAC1TXCR,Channel 1 transmit control register" bitfld.long 0x4 30. "TFSEL1,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 29. "TFSEL0,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 28. "EDSE,Enhanced Descriptor Enable" "0,1" newline hexmask.long.byte 0x4 24.--27. 1. "TQOS,Transmit QOS" hexmask.long.byte 0x4 16.--21. 1. "TXPBL,Transmit Programmable Burst Length" bitfld.long 0x4 15. "IPBL,Ignore PBL Requirement" "0,1" newline bitfld.long 0x4 12. "TSE,TCP Segmentation Enabled" "0,1" bitfld.long 0x4 4. "OSF,Operate on Second Packet" "0,1" rbitfld.long 0x4 1.--3. "TCW,Transmit Channel Weight" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0. "ST,Start or Stop Transmission Command" "0,1" line.long 0x8 "ETH_DMAC1RXCR,Channel 1 receive control register" bitfld.long 0x8 31. "RPF,DMA Rx Channel x Packet Flush" "0,1" hexmask.long.byte 0x8 24.--27. 1. "RQOS,Rx AXI4 QOS." hexmask.long.byte 0x8 16.--21. 1. "RXPBL,Receive Programmable Burst Length" newline hexmask.long.word 0x8 1.--14. 1. "RBSZ,Receive Buffer size" bitfld.long 0x8 0. "SR,Start or Stop Receive" "0,1" group.long 0x1194++0x3 line.long 0x0 "ETH_DMAC1TXDLAR,Channel 1 T1 descriptor list address register" hexmask.long 0x0 0.--31. 1. "TDESLA,Start of Transmit List" group.long 0x119C++0x7 line.long 0x0 "ETH_DMAC1RXDLAR,Channel 1 R1 descriptor list address register" hexmask.long 0x0 0.--31. 1. "RDESLA,Start of Receive List" line.long 0x4 "ETH_DMAC1TXDTPR,Channel 1 T1 descriptor tail pointer register" hexmask.long 0x4 0.--31. 1. "TDT,Transmit Descriptor Tail Pointer" group.long 0x11A8++0x17 line.long 0x0 "ETH_DMAC1RXDTPR,Channel 1 R1 descriptor tail pointer register" hexmask.long 0x0 0.--31. 1. "RDT,Receive Descriptor Tail Pointer" line.long 0x4 "ETH_DMAC1TXRLR,Channel 1 T1 descriptor ring length register" hexmask.long.word 0x4 0.--9. 1. "TDRL,Transmit Descriptor Ring Length" line.long 0x8 "ETH_DMAC1RXRLR,Channel 1 R1 descriptor ring length register" hexmask.long.byte 0x8 17.--23. 1. "ARBS,Alternate Receive Buffer Size" hexmask.long.word 0x8 0.--9. 1. "RDRL,Receive Descriptor Ring Length" line.long 0xC "ETH_DMAC1IER,Channel 1 interrupt enable register" bitfld.long 0xC 15. "NIE,Normal Interrupt Summary Enable" "0,1" bitfld.long 0xC 14. "AIE,Abnormal Interrupt Summary Enable" "0,1" bitfld.long 0xC 13. "CDEE,Context Descriptor Error Enable" "0,1" newline bitfld.long 0xC 12. "FBEE,Fatal Bus Error Enable" "0,1" bitfld.long 0xC 11. "ERIE,Early Receive Interrupt Enable" "0,1" bitfld.long 0xC 10. "ETIE,Early Transmit Interrupt Enable" "0,1" newline bitfld.long 0xC 9. "RWTE,Receive Watchdog Timeout Enable" "0,1" bitfld.long 0xC 8. "RSE,Receive Stopped Enable" "0,1" bitfld.long 0xC 7. "RBUE,Receive Buffer Unavailable Enable" "0,1" newline bitfld.long 0xC 6. "RIE,Receive Interrupt Enable" "0,1" bitfld.long 0xC 2. "TBUE,Transmit Buffer Unavailable Enable" "0,1" bitfld.long 0xC 1. "TXSE,Transmit Stopped Enable" "0,1" newline bitfld.long 0xC 0. "TIE,Transmit Interrupt Enable" "0,1" line.long 0x10 "ETH_DMAC1RXIWTR,Channel 1 R1 interrupt watchdog timer register" bitfld.long 0x10 16.--17. "RWTU,Receive Interrupt Watchdog Timer Count Units" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x10 0.--7. 1. "RWT,Receive Interrupt Watchdog Timer Count" line.long 0x14 "ETH_DMAC1SFCSR,Channel 1 slot function control status register" hexmask.long.byte 0x14 16.--19. 1. "RSN,Reference Slot Number" hexmask.long.word 0x14 4.--15. 1. "SIV,Slot Interval Value" bitfld.long 0x14 1. "ASC,Advance Slot Check" "0,1" newline bitfld.long 0x14 0. "ESC,Enable Slot Comparison" "0,1" rgroup.long 0x11C4++0x3 line.long 0x0 "ETH_DMAC1CATXDR,Channel 1 current application transmit descriptor register" hexmask.long 0x0 0.--31. 1. "CURTDESAPTR,Application Transmit Descriptor Address Pointer" rgroup.long 0x11CC++0x3 line.long 0x0 "ETH_DMAC1CARXDR,Channel 1 current application receive descriptor register" hexmask.long 0x0 0.--31. 1. "CURRDESAPTR,Application Receive Descriptor Address Pointer" rgroup.long 0x11D4++0x3 line.long 0x0 "ETH_DMAC1CATXBR,Channel 1 current application transmit buffer register" hexmask.long 0x0 0.--31. 1. "CURTBUFAPTR,Application Transmit Buffer Address Pointer" rgroup.long 0x11DC++0x3 line.long 0x0 "ETH_DMAC1CARXBR,Channel 1 current application receive buffer register" hexmask.long 0x0 0.--31. 1. "CURRBUFAPTR,Application Receive Buffer Address Pointer" group.long 0x11E0++0x7 line.long 0x0 "ETH_DMAC1SR,Channel 1 status register" rbitfld.long 0x0 19.--21. "REB,Rx DMA Error Bits" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 16.--18. "TEB,Tx DMA Error Bits" "0,1,2,3,4,5,6,7" bitfld.long 0x0 15. "NIS,Normal Interrupt Summary" "0,1" newline bitfld.long 0x0 14. "AIS,Abnormal Interrupt Summary" "0,1" bitfld.long 0x0 13. "CDE,Context Descriptor Error" "0,1" bitfld.long 0x0 12. "FBE,Fatal Bus Error" "0,1" newline bitfld.long 0x0 11. "ERI,Early Receive Interrupt" "0,1" bitfld.long 0x0 10. "ETI,Early Transmit Interrupt" "0,1" bitfld.long 0x0 9. "RWT,Receive Watchdog Timeout" "0,1" newline bitfld.long 0x0 8. "RPS,Receive Process Stopped" "0,1" bitfld.long 0x0 7. "RBU,Receive Buffer Unavailable" "0,1" bitfld.long 0x0 6. "RI,Receive Interrupt" "0,1" newline bitfld.long 0x0 2. "TBU,Transmit Buffer Unavailable" "0,1" bitfld.long 0x0 1. "TPS,Transmit Process Stopped" "0,1" bitfld.long 0x0 0. "TI,Transmit Interrupt" "0,1" line.long 0x4 "ETH_DMAC1MFCR,Channel 1 missed frame count register" bitfld.long 0x4 15. "MFCO,Overflow status of the MFC Counter" "0,1" hexmask.long.word 0x4 0.--10. 1. "MFC,Dropped Packet Counters" group.long 0x1200++0x7 line.long 0x0 "ETH_DMAC2CR,Channel 2 control register" bitfld.long 0x0 18.--20. "DSL,Descriptor Skip Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "PBLX8,8xPBL mode" "0,1" hexmask.long.word 0x0 0.--13. 1. "MSS,Maximum Segment Size" line.long 0x4 "ETH_DMAC2TXCR,Channel 2 transmit control register" bitfld.long 0x4 30. "TFSEL1,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 29. "TFSEL0,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 28. "EDSE,Enhanced Descriptor Enable" "0,1" newline hexmask.long.byte 0x4 24.--27. 1. "TQOS,Transmit QOS" hexmask.long.byte 0x4 16.--21. 1. "TXPBL,Transmit Programmable Burst Length" bitfld.long 0x4 15. "IPBL,Ignore PBL Requirement" "0,1" newline bitfld.long 0x4 12. "TSE,TCP Segmentation Enabled" "0,1" bitfld.long 0x4 4. "OSF,Operate on Second Packet" "0,1" rbitfld.long 0x4 1.--3. "TCW,Transmit Channel Weight" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0. "ST,Start or Stop Transmission Command" "0,1" group.long 0x1214++0x3 line.long 0x0 "ETH_DMAC2TXDLAR,Channel 2 T2 descriptor list address register" hexmask.long 0x0 0.--31. 1. "TDESLA,Start of Transmit List" group.long 0x1220++0x3 line.long 0x0 "ETH_DMAC2TXDTPR,Channel 2 T2 descriptor tail pointer register" hexmask.long 0x0 0.--31. 1. "TDT,Transmit Descriptor Tail Pointer" group.long 0x122C++0x3 line.long 0x0 "ETH_DMAC2TXRLR,Channel 2 T2 descriptor ring length register" hexmask.long.word 0x0 0.--9. 1. "TDRL,Transmit Descriptor Ring Length" group.long 0x1234++0x3 line.long 0x0 "ETH_DMAC2IER,Channel 2 interrupt enable register" bitfld.long 0x0 15. "NIE,Normal Interrupt Summary Enable" "0,1" bitfld.long 0x0 14. "AIE,Abnormal Interrupt Summary Enable" "0,1" bitfld.long 0x0 13. "CDEE,Context Descriptor Error Enable" "0,1" newline bitfld.long 0x0 12. "FBEE,Fatal Bus Error Enable" "0,1" bitfld.long 0x0 11. "ERIE,Early Receive Interrupt Enable" "0,1" bitfld.long 0x0 10. "ETIE,Early Transmit Interrupt Enable" "0,1" newline bitfld.long 0x0 9. "RWTE,Receive Watchdog Timeout Enable" "0,1" bitfld.long 0x0 8. "RSE,Receive Stopped Enable" "0,1" bitfld.long 0x0 7. "RBUE,Receive Buffer Unavailable Enable" "0,1" newline bitfld.long 0x0 6. "RIE,Receive Interrupt Enable" "0,1" bitfld.long 0x0 2. "TBUE,Transmit Buffer Unavailable Enable" "0,1" bitfld.long 0x0 1. "TXSE,Transmit Stopped Enable" "0,1" newline bitfld.long 0x0 0. "TIE,Transmit Interrupt Enable" "0,1" group.long 0x123C++0x3 line.long 0x0 "ETH_DMAC2SFCSR,Channel 2 slot function control status register" hexmask.long.byte 0x0 16.--19. 1. "RSN,Reference Slot Number" hexmask.long.word 0x0 4.--15. 1. "SIV,Slot Interval Value" bitfld.long 0x0 1. "ASC,Advance Slot Check" "0,1" newline bitfld.long 0x0 0. "ESC,Enable Slot Comparison" "0,1" rgroup.long 0x1244++0x3 line.long 0x0 "ETH_DMAC2CATXDR,Channel 2 current application transmit descriptor register" hexmask.long 0x0 0.--31. 1. "CURTDESAPTR,Application Transmit Descriptor Address Pointer" rgroup.long 0x1254++0x3 line.long 0x0 "ETH_DMAC2CATXBR,Channel 2 current application transmit buffer register" hexmask.long 0x0 0.--31. 1. "CURTBUFAPTR,Application Transmit Buffer Address Pointer" group.long 0x1260++0x3 line.long 0x0 "ETH_DMAC2SR,Channel 2 status register" rbitfld.long 0x0 19.--21. "REB,Rx DMA Error Bits" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 16.--18. "TEB,Tx DMA Error Bits" "0,1,2,3,4,5,6,7" bitfld.long 0x0 15. "NIS,Normal Interrupt Summary" "0,1" newline bitfld.long 0x0 14. "AIS,Abnormal Interrupt Summary" "0,1" bitfld.long 0x0 13. "CDE,Context Descriptor Error" "0,1" bitfld.long 0x0 12. "FBE,Fatal Bus Error" "0,1" newline bitfld.long 0x0 11. "ERI,Early Receive Interrupt" "0,1" bitfld.long 0x0 10. "ETI,Early Transmit Interrupt" "0,1" bitfld.long 0x0 9. "RWT,Receive Watchdog Timeout" "0,1" newline bitfld.long 0x0 8. "RPS,Receive Process Stopped" "0,1" bitfld.long 0x0 7. "RBU,Receive Buffer Unavailable" "0,1" bitfld.long 0x0 6. "RI,Receive Interrupt" "0,1" newline bitfld.long 0x0 2. "TBU,Transmit Buffer Unavailable" "0,1" bitfld.long 0x0 1. "TPS,Transmit Process Stopped" "0,1" bitfld.long 0x0 0. "TI,Transmit Interrupt" "0,1" group.long 0x1280++0x7 line.long 0x0 "ETH_DMAC3CR,Channel 3 control register" bitfld.long 0x0 18.--20. "DSL,Descriptor Skip Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "PBLX8,8xPBL mode" "0,1" hexmask.long.word 0x0 0.--13. 1. "MSS,Maximum Segment Size" line.long 0x4 "ETH_DMAC3TXCR,Channel 3 transmit control register" bitfld.long 0x4 30. "TFSEL1,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 29. "TFSEL0,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 28. "EDSE,Enhanced Descriptor Enable" "0,1" newline hexmask.long.byte 0x4 24.--27. 1. "TQOS,Transmit QOS" hexmask.long.byte 0x4 16.--21. 1. "TXPBL,Transmit Programmable Burst Length" bitfld.long 0x4 15. "IPBL,Ignore PBL Requirement" "0,1" newline bitfld.long 0x4 12. "TSE,TCP Segmentation Enabled" "0,1" bitfld.long 0x4 4. "OSF,Operate on Second Packet" "0,1" rbitfld.long 0x4 1.--3. "TCW,Transmit Channel Weight" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0. "ST,Start or Stop Transmission Command" "0,1" group.long 0x1294++0x3 line.long 0x0 "ETH_DMAC3TXDLAR,Channel 3 T3 descriptor list address register" hexmask.long 0x0 0.--31. 1. "TDESLA,Start of Transmit List" group.long 0x12A0++0x3 line.long 0x0 "ETH_DMAC3TXDTPR,Channel 3 T3 descriptor tail pointer register" hexmask.long 0x0 0.--31. 1. "TDT,Transmit Descriptor Tail Pointer" group.long 0x12AC++0x3 line.long 0x0 "ETH_DMAC3TXRLR,Channel 3 T3 descriptor ring length register" hexmask.long.word 0x0 0.--9. 1. "TDRL,Transmit Descriptor Ring Length" group.long 0x12B4++0x3 line.long 0x0 "ETH_DMAC3IER,Channel 3 interrupt enable register" bitfld.long 0x0 15. "NIE,Normal Interrupt Summary Enable" "0,1" bitfld.long 0x0 14. "AIE,Abnormal Interrupt Summary Enable" "0,1" bitfld.long 0x0 13. "CDEE,Context Descriptor Error Enable" "0,1" newline bitfld.long 0x0 12. "FBEE,Fatal Bus Error Enable" "0,1" bitfld.long 0x0 11. "ERIE,Early Receive Interrupt Enable" "0,1" bitfld.long 0x0 10. "ETIE,Early Transmit Interrupt Enable" "0,1" newline bitfld.long 0x0 9. "RWTE,Receive Watchdog Timeout Enable" "0,1" bitfld.long 0x0 8. "RSE,Receive Stopped Enable" "0,1" bitfld.long 0x0 7. "RBUE,Receive Buffer Unavailable Enable" "0,1" newline bitfld.long 0x0 6. "RIE,Receive Interrupt Enable" "0,1" bitfld.long 0x0 2. "TBUE,Transmit Buffer Unavailable Enable" "0,1" bitfld.long 0x0 1. "TXSE,Transmit Stopped Enable" "0,1" newline bitfld.long 0x0 0. "TIE,Transmit Interrupt Enable" "0,1" group.long 0x12BC++0x3 line.long 0x0 "ETH_DMAC3SFCSR,Channel 3 slot function control status register" hexmask.long.byte 0x0 16.--19. 1. "RSN,Reference Slot Number" hexmask.long.word 0x0 4.--15. 1. "SIV,Slot Interval Value" bitfld.long 0x0 1. "ASC,Advance Slot Check" "0,1" newline bitfld.long 0x0 0. "ESC,Enable Slot Comparison" "0,1" rgroup.long 0x12C4++0x3 line.long 0x0 "ETH_DMAC3CATXDR,Channel 3 current application transmit descriptor register" hexmask.long 0x0 0.--31. 1. "CURTDESAPTR,Application Transmit Descriptor Address Pointer" rgroup.long 0x12D4++0x3 line.long 0x0 "ETH_DMAC3CATXBR,Channel 3 current application transmit buffer register" hexmask.long 0x0 0.--31. 1. "CURTBUFAPTR,Application Transmit Buffer Address Pointer" group.long 0x12E0++0x3 line.long 0x0 "ETH_DMAC3SR,Channel 3 status register" rbitfld.long 0x0 19.--21. "REB,Rx DMA Error Bits" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 16.--18. "TEB,Tx DMA Error Bits" "0,1,2,3,4,5,6,7" bitfld.long 0x0 15. "NIS,Normal Interrupt Summary" "0,1" newline bitfld.long 0x0 14. "AIS,Abnormal Interrupt Summary" "0,1" bitfld.long 0x0 13. "CDE,Context Descriptor Error" "0,1" bitfld.long 0x0 12. "FBE,Fatal Bus Error" "0,1" newline bitfld.long 0x0 11. "ERI,Early Receive Interrupt" "0,1" bitfld.long 0x0 10. "ETI,Early Transmit Interrupt" "0,1" bitfld.long 0x0 9. "RWT,Receive Watchdog Timeout" "0,1" newline bitfld.long 0x0 8. "RPS,Receive Process Stopped" "0,1" bitfld.long 0x0 7. "RBU,Receive Buffer Unavailable" "0,1" bitfld.long 0x0 6. "RI,Receive Interrupt" "0,1" newline bitfld.long 0x0 2. "TBU,Transmit Buffer Unavailable" "0,1" bitfld.long 0x0 1. "TPS,Transmit Process Stopped" "0,1" bitfld.long 0x0 0. "TI,Transmit Interrupt" "0,1" tree.end tree "ETH2_S" base ad:0x582D0000 group.long 0x0++0x17 line.long 0x0 "ETH_MACCR,Operating mode configuration register" bitfld.long 0x0 31. "ARPEN,ARP Offload Enable" "0,1" bitfld.long 0x0 28.--30. "SARC,Source Address Insertion or Replacement Control" "?,?,B_0x2,B_0x3,?,?,B_0x6,B_0x7" bitfld.long 0x0 27. "IPC,Checksum Offload" "0,1" newline bitfld.long 0x0 24.--26. "IPG,Inter-Packet Gap" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x0 23. "GPSLCE,Giant Packet Size Limit Control Enable" "0,1" bitfld.long 0x0 22. "S2KP,IEEE 802." "0,1" newline bitfld.long 0x0 21. "CST,CRC stripping for Type packets" "0,1" bitfld.long 0x0 20. "ACS,Automatic Pad or CRC Stripping" "0,1" bitfld.long 0x0 19. "WD,Watchdog Disable" "0,1" newline bitfld.long 0x0 18. "BE,Packet Burst Enable" "0,1" bitfld.long 0x0 17. "JD,Jabber Disable" "0,1" bitfld.long 0x0 16. "JE,Jumbo Packet Enable" "0,1" newline bitfld.long 0x0 15. "PS,Port Select" "B_0x0,B_0x1" bitfld.long 0x0 14. "FES,MAC Speed" "B_0x0,B_0x1" bitfld.long 0x0 13. "DM,Duplex Mode" "0,1" newline bitfld.long 0x0 12. "LM,Loopback Mode" "0,1" bitfld.long 0x0 11. "ECRSFD,Enable Carrier Sense Before Transmission in Full-duplex mode" "0,1" bitfld.long 0x0 10. "DO,Disable Receive Own" "0,1" newline bitfld.long 0x0 9. "DCRS,Disable Carrier Sense During Transmission" "0,1" bitfld.long 0x0 8. "DR,Disable Retry" "0,1" bitfld.long 0x0 5.--6. "BL,Back-Off Limit" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 4. "DC,Deferral Check" "0,1" bitfld.long 0x0 2.--3. "PRELEN,Preamble Length for Transmit packets" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 1. "TE,Transmitter Enable" "0,1" newline bitfld.long 0x0 0. "RE,Receiver Enable" "0,1" line.long 0x4 "ETH_MACECR,Extended operating mode configuration register" bitfld.long 0x4 30. "APDIM,ARP Packet Drop if IP Address Mismatch" "0,1" hexmask.long.byte 0x4 25.--29. 1. "EIPG,Extended Inter-Packet Gap" bitfld.long 0x4 24. "EIPGEN,Extended Inter-Packet Gap Enable" "0,1" newline bitfld.long 0x4 18. "USP,Unicast Slow Protocol Packet Detect" "0,1" bitfld.long 0x4 17. "SPEN,Slow Protocol Detection Enable" "0,1" bitfld.long 0x4 16. "DCRCC,Disable CRC Checking for Received Packets" "0,1" newline hexmask.long.word 0x4 0.--13. 1. "GPSL,Giant Packet Size Limit" line.long 0x8 "ETH_MACPFR,Packet filtering control register" bitfld.long 0x8 31. "RA,Receive All" "0,1" bitfld.long 0x8 21. "DNTU,Drop Non-TCP/UDP over IP Packets" "0,1" bitfld.long 0x8 20. "IPFE,Layer 3 and Layer 4 Filter Enable" "0,1" newline bitfld.long 0x8 16. "VTFE,VLAN Tag Filter Enable" "0,1" bitfld.long 0x8 10. "HPF,Hash or Perfect Filter" "0,1" bitfld.long 0x8 9. "SAF,Source Address Filter Enable" "0,1" newline bitfld.long 0x8 8. "SAIF,SA Inverse Filtering" "0,1" bitfld.long 0x8 6.--7. "PCF,Pass Control Packets" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 5. "DBF,Disable Broadcast Packets" "0,1" newline bitfld.long 0x8 4. "PM,Pass All Multicast" "0,1" bitfld.long 0x8 3. "DAIF,DA Inverse Filtering" "0,1" bitfld.long 0x8 2. "HMC,Hash Multicast" "0,1" newline bitfld.long 0x8 1. "HUC,Hash Unicast" "0,1" bitfld.long 0x8 0. "PR,Promiscuous Mode" "0,1" line.long 0xC "ETH_MACWJBTR,Watchdog and jabber timeout register" bitfld.long 0xC 24. "PJE,Programmable Jabber Enable" "0,1" hexmask.long.byte 0xC 16.--19. 1. "JTO,Jabber Timeout" bitfld.long 0xC 8. "PWE,Programmable Watchdog Enable" "0,1" newline hexmask.long.byte 0xC 0.--3. 1. "WTO,Watchdog Timeout" line.long 0x10 "ETH_MACHT0R,Hash Table 0 register" hexmask.long 0x10 0.--31. 1. "HT31T0,MAC Hash Table First 32 Bits" line.long 0x14 "ETH_MACHT1R,Hash Table 1 register" hexmask.long 0x14 0.--31. 1. "HT63T32,MAC Hash Table Second 32 Bits" group.long 0x50++0xB line.long 0x0 "ETH_MACVTCR,VLAN tag Control register" bitfld.long 0x0 31. "EIVLRXS,Enable Inner VLAN Tag in Rx Status" "0,1" bitfld.long 0x0 28.--29. "EIVLS,Enable Inner VLAN Tag Stripping on Receive" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 27. "ERIVLT,Enable Inner VLAN Tag" "0,1" newline bitfld.long 0x0 26. "EDVLP,Enable Double VLAN Processing" "0,1" bitfld.long 0x0 25. "VTHM,VLAN Tag Hash Table Match Enable" "0,1" bitfld.long 0x0 24. "EVLRXS,Enable VLAN Tag in Rx status" "0,1" newline bitfld.long 0x0 21.--22. "EVLS,Enable VLAN Tag Stripping on Receive" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20. "DOVLTC,Disable VLAN Type Check" "0,1" bitfld.long 0x0 19. "ERSVLM,Enable Receive S-VLAN Match" "0,1" newline bitfld.long 0x0 18. "ESVL,Enable S-VLAN" "0,1" bitfld.long 0x0 17. "VTIM,VLAN Tag Inverse Match Enable" "0,1" bitfld.long 0x0 16. "ETV,Enable 12-Bit VLAN Tag Comparison" "0,1" newline bitfld.long 0x0 2.--3. "OFS,Offset" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "CT,Command Type" "0,1" bitfld.long 0x0 0. "OB,Operation Busy" "0,1" line.long 0x4 "ETH_MACVTDR,VLAN tag data register" bitfld.long 0x4 25. "DMACHN,DMA Channel Number" "0,1" bitfld.long 0x4 24. "DMACHEN,DMA Channel Number Enable" "0,1" bitfld.long 0x4 20. "ERIVLT,Enable Inner VLAN Tag Comparison" "0,1" newline bitfld.long 0x4 19. "ERSVLM,Enable S-VLAN Match for received Frames" "0,1" bitfld.long 0x4 18. "DOVLTC,Disable VLAN Type Comparison" "0,1" bitfld.long 0x4 17. "ETV,12-bit or 16-bit VLAN comparison" "B_0x0,B_0x1" newline bitfld.long 0x4 16. "VEN,VLAN Tag Enable" "0,1" hexmask.long.word 0x4 0.--15. 1. "VID,VLAN Tag ID" line.long 0x8 "ETH_MACVHTR,VLAN Hash table register" hexmask.long.word 0x8 0.--15. 1. "VLHT,VLAN Hash Table" group.long 0x60++0x3 line.long 0x0 "ETH_MACVIR,VLAN inclusion register" rbitfld.long 0x0 31. "BUSY,Busy" "0,1" bitfld.long 0x0 30. "RDWR,Read write control" "0,1" bitfld.long 0x0 25. "ADDR1,Address" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "ADDR0,Address" "B_0x0,B_0x1" bitfld.long 0x0 21. "CBTI,Channel based tag insertion" "0,1" bitfld.long 0x0 20. "VLTI,VLAN Tag Input" "0,1" newline bitfld.long 0x0 19. "CSVL,C-VLAN or S-VLAN" "B_0x0,B_0x1" bitfld.long 0x0 18. "VLP,VLAN Priority Control" "0,1" bitfld.long 0x0 16.--17. "VLC,VLAN Tag Control in Transmit Packets" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.word 0x0 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" group.long 0x60++0x7 line.long 0x0 "ETH_MACVIR_ALTERNATE1,VLAN inclusion register" bitfld.long 0x0 19. "CSVL,C-VLAN or S-VLAN" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" line.long 0x4 "ETH_MACIVIR,Inner VLAN inclusion register" bitfld.long 0x4 20. "VLTI,VLAN Tag Input" "0,1" bitfld.long 0x4 19. "CSVL,C-VLAN or S-VLAN" "B_0x0,B_0x1" bitfld.long 0x4 18. "VLP,VLAN Priority Control" "0,1" newline bitfld.long 0x4 16.--17. "VLC,VLAN Tag Control in Transmit Packets" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x4 0.--15. 1. "VLT,VLAN Tag for Transmit Packets" group.long 0x70++0x3 line.long 0x0 "ETH_MACQ0TXFCR,Tx Queue 0 flow control register" hexmask.long.word 0x0 16.--31. 1. "PT,Pause Time" bitfld.long 0x0 7. "DZPQ,Disable Zero-Quanta Pause" "0,1" bitfld.long 0x0 4.--6. "PLT,Pause Low Threshold" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" newline bitfld.long 0x0 1. "TFE,Transmit Flow Control Enable" "0,1" bitfld.long 0x0 0. "FCB_BPA,Flow Control Busy or Backpressure Activate" "0,1" group.long 0x90++0x7 line.long 0x0 "ETH_MACRXFCR,Rx flow control register" bitfld.long 0x0 1. "UP,Unicast Pause Packet Detect" "0,1" bitfld.long 0x0 0. "RFE,Receive Flow Control Enable" "0,1" line.long 0x4 "ETH_MACRXQCR,Rx Queue control register" bitfld.long 0x4 17. "VFFQ,VLAN Tag Filter Fail Packets Queue" "B_0x0,B_0x1" bitfld.long 0x4 16. "VFFQE,VLAN Tag Filter Fail Packets Queuing Enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "MFFQ,Multicast Address Filter Fail Packets Queue." "B_0x0,B_0x1" newline bitfld.long 0x4 8. "MFFQE,Multicast Address Filter Fail Packets Queuing Enable." "0,1" bitfld.long 0x4 1. "UFFQ,Unicast Address Filter Fail Packets Queue." "B_0x0,B_0x1" bitfld.long 0x4 0. "UFFQE,Unicast Address Filter Fail Packets Queuing Enable." "0,1" group.long 0xA0++0xB line.long 0x0 "ETH_MACRXQC0R,Rx queue control 0 register" bitfld.long 0x0 2.--3. "RXQ1EN,Receive Queue 1 Enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 0.--1. "RXQ0EN,Receive Queue 0 Enable" "B_0x0,B_0x1,B_0x2,?" line.long 0x4 "ETH_MACRXQC1R,Rx queue control 1 register" bitfld.long 0x4 29. "TBRQE,Type Field Based Rx Queuing Enable" "0,1" bitfld.long 0x4 28. "OMCBCQ,Overriding MC-BC queue priority select" "B_0x0,B_0x1" bitfld.long 0x4 26. "FPRQ2,Frame Preemption Residue Queue" "?,B_0x1" newline bitfld.long 0x4 25. "FPRQ1,Frame Preemption Residue Queue" "?,B_0x1" bitfld.long 0x4 24. "FPRQ0,Frame Preemption Residue Queue" "?,B_0x1" bitfld.long 0x4 22.--23. "TPQC,Tagged PTP over Ethernet Packets Queuing Control" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 21. "TACPQE,Tagged AV Control Packets Queuing Enable" "0,1" bitfld.long 0x4 20. "MCBCQEN,Multicast and Broadcast Queue Enable" "0,1" bitfld.long 0x4 16.--18. "MCBCQ,Multicast and Broadcast Queue" "B_0x0,B_0x1,?,?,?,?,?,?" newline bitfld.long 0x4 12.--14. "UPQ,Untagged Packet Queue" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 4.--6. "PTPQ,PTP Packets Queue" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 2. "AVCPQ2,AV Untagged Control Packets Queue" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "AVCPQ1,AV Untagged Control Packets Queue" "B_0x0,B_0x1" bitfld.long 0x4 0. "AVCPQ0,AV Untagged Control Packets Queue" "B_0x0,B_0x1" line.long 0x8 "ETH_MACRXQC2R,Rx queue control 2 register" hexmask.long.byte 0x8 8.--15. 1. "PSRQ1,Priorities Selected in the Receive Queue 1" hexmask.long.byte 0x8 0.--7. 1. "PSRQ0,Priorities Selected in the Receive Queue 0" group.long 0xB0++0xB line.long 0x0 "ETH_MACISR,Interrupt status register" rbitfld.long 0x0 20. "MFRIS,MMC FPE Receive Interrupt Status" "0,1" rbitfld.long 0x0 19. "MFTIS,MMC FPE Transmit Interrupt Status" "0,1" bitfld.long 0x0 18. "MDIOIS,MDIO Interrupt Status" "0,1" newline rbitfld.long 0x0 17. "FPEIS,Frame Preemption Interrupt Status" "0,1" bitfld.long 0x0 14. "RXSTSIS,Receive Status Interrupt" "0,1" bitfld.long 0x0 13. "TXSTSIS,Transmit Status Interrupt" "0,1" newline bitfld.long 0x0 12. "TSIS,Timestamp Interrupt Status" "0,1" rbitfld.long 0x0 10. "MMCTXIS,MMC Transmit Interrupt Status" "0,1" rbitfld.long 0x0 9. "MMCRXIS,MMC Receive Interrupt Status" "0,1" newline rbitfld.long 0x0 8. "MMCIS,MMC Interrupt Status" "0,1" rbitfld.long 0x0 5. "LPIIS,LPI Interrupt Status" "0,1" rbitfld.long 0x0 4. "PMTIS,PMT Interrupt Status" "0,1" newline rbitfld.long 0x0 3. "PHYIS,PHY Interrupt" "0,1" rbitfld.long 0x0 0. "RGSMIIIS,RGMII Interrupt Status" "0,1" line.long 0x4 "ETH_MACIER,Interrupt enable register" bitfld.long 0x4 18. "MDIOIE,MDIO Interrupt Enable" "0,1" bitfld.long 0x4 17. "FPEIE,Frame Preemption Interrupt Enable" "0,1" bitfld.long 0x4 14. "RXSTSIE,Receive Status Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "TXSTSIE,Transmit Status Interrupt Enable" "0,1" bitfld.long 0x4 12. "TSIE,Timestamp Interrupt Enable" "0,1" bitfld.long 0x4 5. "LPIIE,LPI Interrupt Enable" "0,1" newline bitfld.long 0x4 4. "PMTIE,PMT Interrupt Enable" "0,1" bitfld.long 0x4 3. "PHYIE,PHY Interrupt Enable" "0,1" bitfld.long 0x4 0. "RGSMIIIE,RGMII Interrupt Enable" "0,1" line.long 0x8 "ETH_MACRXTXSR,Rx Tx status register" bitfld.long 0x8 8. "RWT,Receive Watchdog Timeout" "0,1" bitfld.long 0x8 5. "EXCOL,Excessive Collisions" "0,1" bitfld.long 0x8 4. "LCOL,Late Collision" "0,1" newline bitfld.long 0x8 3. "EXDEF,Excessive Deferral" "0,1" bitfld.long 0x8 2. "LCARR,Loss of Carrier" "0,1" bitfld.long 0x8 1. "NCARR,No Carrier" "0,1" newline bitfld.long 0x8 0. "TJT,Transmit Jabber Timeout" "0,1" group.long 0xC0++0x7 line.long 0x0 "ETH_MACPCSR,PMT control status register" bitfld.long 0x0 31. "RWKFILTRST,Remote Wake-up Packet Filter Register Pointer Reset" "0,1" hexmask.long.byte 0x0 24.--28. 1. "RWKPTR,Remote wake-up FIFO Pointer" bitfld.long 0x0 10. "RWKPFE,Remote wake-up Packet Forwarding Enable" "0,1" newline bitfld.long 0x0 9. "GLBLUCAST,Global Unicast" "0,1" rbitfld.long 0x0 6. "RWKPRCVD,Remote wake-up Packet Received" "0,1" bitfld.long 0x0 5. "MGKPRCVD,Magic Packet Received" "0,1" newline bitfld.long 0x0 2. "RWKPKTEN,Remote wake-up Packet Enable" "0,1" bitfld.long 0x0 1. "MGKPKTEN,Magic Packet Enable" "0,1" bitfld.long 0x0 0. "PWRDWN,Power Down" "0,1" line.long 0x4 "ETH_MACRWKPFR,Remote wake-up packet filter register" hexmask.long 0x4 0.--31. 1. "MACRWKPFR,Remote wake-up packet filter" group.long 0xD0++0xF line.long 0x0 "ETH_MACLCSR,LPI control and status register" bitfld.long 0x0 21. "LPITCSE,LPI Tx Clock Stop Enable" "0,1" bitfld.long 0x0 20. "LPITE,LPI Timer Enable" "0,1" bitfld.long 0x0 19. "LPITXA,LPI Tx Automate" "0,1" newline bitfld.long 0x0 18. "PLSEN,PHY Link Status Enable" "0,1" bitfld.long 0x0 17. "PLS,PHY Link Status" "0,1" bitfld.long 0x0 16. "LPIEN,LPI Enable" "0,1" newline rbitfld.long 0x0 9. "RLPIST,Receive LPI State" "0,1" rbitfld.long 0x0 8. "TLPIST,Transmit LPI State" "0,1" rbitfld.long 0x0 3. "RLPIEX,Receive LPI Exit" "0,1" newline rbitfld.long 0x0 2. "RLPIEN,Receive LPI Entry" "0,1" rbitfld.long 0x0 1. "TLPIEX,Transmit LPI Exit" "0,1" rbitfld.long 0x0 0. "TLPIEN,Transmit LPI Entry" "0,1" line.long 0x4 "ETH_MACLTCR,LPI timers control register" hexmask.long.word 0x4 16.--25. 1. "LST,LPI LS Timer" hexmask.long.word 0x4 0.--15. 1. "TWT,LPI TW Timer" line.long 0x8 "ETH_MACLETR,LPI entry timer register" hexmask.long.tbyte 0x8 0.--19. 1. "LPIET,LPI Entry Timer" line.long 0xC "ETH_MAC1USTCR,One-microsecond-tick counter register" hexmask.long.word 0xC 0.--11. 1. "TIC_1US_CNTR,1us tick Counter" group.long 0xF8++0x3 line.long 0x0 "ETH_MACPHYCSR,PHYIF control status register" rbitfld.long 0x0 19. "LNKSTS,Link Status" "B_0x0,B_0x1" rbitfld.long 0x0 17.--18. "LNKSPEED,Link Speed" "B_0x0,B_0x1,B_0x2,?" rbitfld.long 0x0 16. "LNKMOD,Link Mode" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "LUD,Link Up or Down" "B_0x0,B_0x1" bitfld.long 0x0 0. "TC,Transmit Configuration in RGMII" "0,1" rgroup.long 0x110++0x7 line.long 0x0 "ETH_MACVR,Version register" hexmask.long.byte 0x0 8.--15. 1. "USERVER,ST-defined version" hexmask.long.byte 0x0 0.--7. 1. "SNPSVER,IP version" line.long 0x4 "ETH_MACDR,Debug register" bitfld.long 0x4 17.--18. "TFCSTS,MAC Transmit Packet Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16. "TPESTS,MAC GMII or MII Transmit Protocol Engine Status" "0,1" bitfld.long 0x4 1.--2. "RFCFCSTS,MAC Receive Packet Controller FIFO Status" "0,1,2,3" newline bitfld.long 0x4 0. "RPESTS,MAC GMII or MII Receive Protocol Engine Status" "0,1" rgroup.long 0x11C++0xF line.long 0x0 "ETH_MACHWF0R,HW feature 0 register" bitfld.long 0x0 28.--30. "ACTPHYSEL,Active PHY Selected" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,?" bitfld.long 0x0 27. "SAVLANINS,Source Address or VLAN Insertion Enable" "0,1" bitfld.long 0x0 25.--26. "TSSTSSEL,Timestamp System Time Source" "?,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 24. "MACADR64SEL,MAC Addresses 64-127 Selected" "0,1" bitfld.long 0x0 23. "MACADR32SEL,MAC Addresses 32-63 Selected" "0,1" hexmask.long.byte 0x0 18.--22. 1. "ADDMACADRSEL,MAC Addresses 1-31 Selected" newline bitfld.long 0x0 16. "RXCOESEL,Receive Checksum Offload Enabled" "0,1" bitfld.long 0x0 14. "TXCOESEL,Transmit Checksum Offload Enabled" "0,1" bitfld.long 0x0 13. "EEESEL,Energy Efficient Ethernet Enabled" "0,1" newline bitfld.long 0x0 12. "TSSEL,IEEE 1588-2008 Timestamp Enabled" "0,1" bitfld.long 0x0 9. "ARPOFFSEL,ARP Offload Enabled" "0,1" bitfld.long 0x0 8. "MMCSEL,RMON Module Enable" "0,1" newline bitfld.long 0x0 7. "MGKSEL,PMT Magic Packet Enable" "0,1" bitfld.long 0x0 6. "RWKSEL,PMT Remote Wake-up Packet Enable" "0,1" bitfld.long 0x0 5. "SMASEL,SMA (MDIO) Interface" "0,1" newline bitfld.long 0x0 4. "VLHASH,VLAN Hash Filter Selected" "0,1" bitfld.long 0x0 3. "PCSSEL,PCS Registers (TBI SGMII or RTBI PHY interface)" "0,1" bitfld.long 0x0 2. "HDSEL,Half-duplex Support" "0,1" newline bitfld.long 0x0 1. "GMIISEL,1000 Mbps Support" "0,1" bitfld.long 0x0 0. "MIISEL,10 or 100 Mbps Support" "0,1" line.long 0x4 "ETH_MACHWF1R,HW feature 1 register" hexmask.long.byte 0x4 27.--30. 1. "L3L4FNUM,Total number of L3 or L4 Filters" bitfld.long 0x4 24.--25. "HASHTBLSZ,Hash Table Size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 23. "POUOST,One Step for PTP over UDP/IP Feature Enable" "0,1" newline bitfld.long 0x4 21. "RAVSEL,Rx Side Only AV Feature Enable" "0,1" bitfld.long 0x4 20. "AVSEL,AV Feature Enable" "0,1" bitfld.long 0x4 19. "DBGMEMA,DMA Debug Registers Enable" "0,1" newline bitfld.long 0x4 18. "TSOEN,TCP Segmentation Offload Enable" "0,1" bitfld.long 0x4 17. "SPHEN,Split Header Feature Enable" "0,1" bitfld.long 0x4 16. "DCBEN,DCB Feature Enable" "0,1" newline bitfld.long 0x4 14.--15. "ADDR64,Address width" "B_0x0,?,?,?" bitfld.long 0x4 13. "ADVTHWORD,IEEE 1588 High Word Register Enable" "0,1" bitfld.long 0x4 12. "PTOEN,PTP Offload Enable" "0,1" newline bitfld.long 0x4 11. "OSTEN,One-Step Timestamping Enable" "0,1" hexmask.long.byte 0x4 6.--10. 1. "TXFIFOSIZE,MTL Transmit FIFO Size" bitfld.long 0x4 5. "SPRAM,Single Port RAM Enable" "0,1" newline hexmask.long.byte 0x4 0.--4. 1. "RXFIFOSIZE,MTL Receive FIFO Size" line.long 0x8 "ETH_MACHWF2R,HW feature 2 register" bitfld.long 0x8 28.--30. "AUXSNAPNUM,Number of Auxiliary Snapshot Inputs" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x8 24.--26. "PPSOUTNUM,Number of PPS Outputs" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x8 22.--23. "TDCSZ,Tx DMA Descriptor Cache Size in terms of 16-byte descriptors" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x8 18.--21. 1. "TXCHCNT,Number of DMA Transmit Channels" bitfld.long 0x8 16.--17. "RDCSZ,Rx DMA Descriptor Cache Size in terms of 16-byte descriptors" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x8 12.--15. 1. "RXCHCNT,Number of DMA Receive Channels" newline hexmask.long.byte 0x8 6.--9. 1. "TXQCNT,Number of MTL Transmit Queues" hexmask.long.byte 0x8 0.--3. 1. "RXQCNT,Number of MTL Receive Queues" line.long 0xC "ETH_MACHWF3R,HW feature 3 register" bitfld.long 0xC 28.--29. "ASP,Automotive Safety Package" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 27. "TBSSEL,Time-based scheduling Enable" "0,1" bitfld.long 0xC 26. "FPESEL,Frame Preemption Enable" "0,1" newline bitfld.long 0xC 20.--21. "ESTWID,Width of the Time Interval field in the Gate Control List" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 17.--19. "ESTDEP,Depth of the Gate Control List" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0xC 16. "ESTSEL,Enhancements to Scheduled Traffic Enable" "0,1" newline bitfld.long 0xC 13.--14. "FRPES,Flexible Receive Parser Table Entries size" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 11.--12. "FRPBS,Flexible Receive Parser Buffer size" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10. "FRPSEL,Flexible Receive Parser Selected" "0,1" newline bitfld.long 0xC 9. "PDUPSEL,Broadcast/Multicast Packet Duplication" "0,1" bitfld.long 0xC 5. "DVLAN,Double VLAN processing enable" "0,1" bitfld.long 0xC 4. "CBTISEL,Queue/Channel based VLAN tag insertion on Tx enable" "0,1" newline bitfld.long 0xC 0.--2. "NRVF,Number of Extended VLAN Tag Filters Enabled" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" group.long 0x200++0x7 line.long 0x0 "ETH_MACMDIOAR,MDIO address register" bitfld.long 0x0 27. "PSE,Preamble Suppression Enable" "0,1" bitfld.long 0x0 26. "BTB,Back to Back transactions" "0,1" hexmask.long.byte 0x0 21.--25. 1. "PA,Physical Layer Address" newline hexmask.long.byte 0x0 16.--20. 1. "RDA,Register/Device Address" bitfld.long 0x0 12.--14. "NTC,Number of Training Clocks" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--11. 1. "CR,CSR Clock Range" newline bitfld.long 0x0 4. "SKAP,Skip Address Packet" "0,1" bitfld.long 0x0 2.--3. "GOC,GMII Operation Command" "?,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "C45E,Clause 45 PHY Enable" "0,1" newline bitfld.long 0x0 0. "GB,GMII Busy" "0,1" line.long 0x4 "ETH_MACMDIODR,MDIO data register" hexmask.long.word 0x4 16.--31. 1. "RA,Register Address" hexmask.long.word 0x4 0.--15. 1. "GD,GMII Data" group.long 0x210++0x3 line.long 0x0 "ETH_MACARPAR,ARP address register" hexmask.long 0x0 0.--31. 1. "ARPPA,ARP Protocol Address" group.long 0x230++0x7 line.long 0x0 "ETH_MACCSRSWCR,CSR software control register" bitfld.long 0x0 8. "SEEN,Slave Error Response Enable" "0,1" bitfld.long 0x0 0. "RCWE,Register Clear on Write 1 Enable" "0,1" line.long 0x4 "ETH_MACFPECSR,FPE control and status register" bitfld.long 0x4 19. "TRSP,Transmitted Respond Frame" "0,1" bitfld.long 0x4 18. "TVER,Transmitted Verify Frame" "0,1" bitfld.long 0x4 17. "RRSP,Received Respond Frame" "0,1" newline bitfld.long 0x4 16. "RVER,Received Verify Frame" "0,1" bitfld.long 0x4 3. "ARV,Autogenerate Respond mPacket on receiving Verify mPacket" "0,1" bitfld.long 0x4 2. "SRSP,Send Respond mPacket" "0,1" newline bitfld.long 0x4 1. "SVER,Send Verify mPacket" "0,1" bitfld.long 0x4 0. "EFPE,Enable Tx Frame Preemption" "0,1" group.long 0x240++0x7 line.long 0x0 "ETH_MACPRSTIMR,MAC presentation time register" hexmask.long 0x0 0.--31. 1. "MPTN,MAC 1722 Presentation Time in ns" line.long 0x4 "ETH_MACPRSTIMUR,MAC presentation time update register" hexmask.long 0x4 0.--31. 1. "MPTU,MAC 1722 Presentation Time Update" group.long 0x300++0x1F line.long 0x0 "ETH_MACA0HR,MAC Address 0 high register" rbitfld.long 0x0 31. "AE,Address Enable" "0,1" bitfld.long 0x0 16. "DCS,DMA Channel Select" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "ADDRHI,MAC Address0[47:32]" line.long 0x4 "ETH_MACA0LR,MAC Address 0 low register" hexmask.long 0x4 0.--31. 1. "ADDRLO,MAC Address x [31:0]" line.long 0x8 "ETH_MACA1HR,MAC Address 1 high register" bitfld.long 0x8 31. "AE,Address Enable" "0,1" bitfld.long 0x8 30. "SA,Source Address" "B_0x0,B_0x1" hexmask.long.byte 0x8 24.--29. 1. "MBC,Mask Byte Control" newline bitfld.long 0x8 16. "DCS,DMA Channel Select" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "ADDRHI,MAC Address1 [47:32]" line.long 0xC "ETH_MACA1LR,MAC Address 1 low register" hexmask.long 0xC 0.--31. 1. "ADDRLO,MAC Address x [31:0]" line.long 0x10 "ETH_MACA2HR,MAC Address 2 high register" bitfld.long 0x10 31. "AE,Address Enable" "0,1" bitfld.long 0x10 30. "SA,Source Address" "B_0x0,B_0x1" hexmask.long.byte 0x10 24.--29. 1. "MBC,Mask Byte Control" newline bitfld.long 0x10 16. "DCS,DMA Channel Select" "B_0x0,B_0x1" hexmask.long.word 0x10 0.--15. 1. "ADDRHI,MAC Address1 [47:32]" line.long 0x14 "ETH_MACA2LR,MAC Address 2 low register" hexmask.long 0x14 0.--31. 1. "ADDRLO,MAC Address x [31:0]" line.long 0x18 "ETH_MACA3HR,MAC Address 3 high register" bitfld.long 0x18 31. "AE,Address Enable" "0,1" bitfld.long 0x18 30. "SA,Source Address" "B_0x0,B_0x1" hexmask.long.byte 0x18 24.--29. 1. "MBC,Mask Byte Control" newline bitfld.long 0x18 16. "DCS,DMA Channel Select" "B_0x0,B_0x1" hexmask.long.word 0x18 0.--15. 1. "ADDRHI,MAC Address1 [47:32]" line.long 0x1C "ETH_MACA3LR,MAC Address 3 low register" hexmask.long 0x1C 0.--31. 1. "ADDRLO,MAC Address x [31:0]" group.long 0x700++0x13 line.long 0x0 "ETH_MMC_CONTROL,MMC control register" bitfld.long 0x0 8. "UCDBC,Update MMC Counters for Dropped Broadcast Packets" "0,1" bitfld.long 0x0 5. "CNTPRSTLVL,Full-Half Preset" "0,1" bitfld.long 0x0 4. "CNTPRST,Counters Preset" "0,1" newline bitfld.long 0x0 3. "CNTFREEZ,MMC Counter Freeze" "0,1" bitfld.long 0x0 2. "RSTONRD,Reset on Read" "0,1" bitfld.long 0x0 1. "CNTSTOPRO,Counter Stop Rollover" "0,1" newline bitfld.long 0x0 0. "CNTRST,Counters Reset" "0,1" line.long 0x4 "ETH_MMC_RX_INTERRUPT,MMC Rx interrupt register" bitfld.long 0x4 27. "RXLPITRCIS,MMC Receive LPI transition counter interrupt status" "0,1" bitfld.long 0x4 26. "RXLPIUSCIS,MMC Receive LPI microsecond counter interrupt status" "0,1" bitfld.long 0x4 25. "RXCTRLPIS,MMC Receive Control Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 24. "RXRCVERRPIS,MMC Receive Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 23. "RXWDOGPIS,MMC Receive Watchdog Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 22. "RXVLANGBPIS,MMC Receive VLAN Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 21. "RXFOVPIS,MMC Receive FIFO Overflow Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 20. "RXPAUSPIS,MMC Receive Pause Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 19. "RXORANGEPIS,MMC Receive Out Of Range Error Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 18. "RXLENERPIS,MMC Receive Length Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 17. "RXUCGPIS,MMC Receive Unicast Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 16. "RX1024TMAXOCTGBPIS,MMC Receive 1024 to Maximum Octet Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 15. "RX512T1023OCTGBPIS,MMC Receive 512 to 1023 Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 14. "RX256T511OCTGBPIS,MMC Receive 256 to 511 Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 13. "RX128T255OCTGBPIS,MMC Receive 128 to 255 Octet Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 12. "RX65T127OCTGBPIS,MMC Receive 65 to 127 Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 11. "RX64OCTGBPIS,MMC Receive 64 Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 10. "RXOSIZEGPIS,MMC Receive Oversize Good Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 9. "RXUSIZEGPIS,MMC Receive Undersize Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 8. "RXJABERPIS,MMC Receive Jabber Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 7. "RXRUNTPIS,MMC Receive Runt Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 6. "RXALGNERPIS,MMC Receive Alignment Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 5. "RXCRCERPIS,MMC Receive CRC Error Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 4. "RXMCGPIS,MMC Receive Multicast Good Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 3. "RXBCGPIS,MMC Receive Broadcast Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x4 2. "RXGOCTIS,MMC Receive Good Octet Counter Interrupt Status" "0,1" bitfld.long 0x4 1. "RXGBOCTIS,MMC Receive Good Bad Octet Counter Interrupt Status" "0,1" newline bitfld.long 0x4 0. "RXGBPKTIS,MMC Receive Good Bad Packet Counter Interrupt Status" "0,1" line.long 0x8 "ETH_MMC_TX_INTERRUPT,MMC Tx interrupt register" bitfld.long 0x8 27. "TXLPITRCIS,MMC Transmit LPI transition counter interrupt status" "0,1" bitfld.long 0x8 26. "TXLPIUSCIS,MMC Transmit LPI microsecond counter interrupt status" "0,1" bitfld.long 0x8 25. "TXOSIZEGPIS,MMC Transmit Oversize Good Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 24. "TXVLANGPIS,MMC Transmit VLAN Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 23. "TXPAUSPIS,MMC Transmit Pause Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 22. "TXEXDEFPIS,MMC Transmit Excessive Deferral Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 21. "TXGPKTIS,MMC Transmit Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 20. "TXGOCTIS,MMC Transmit Good Octet Counter Interrupt Status" "0,1" bitfld.long 0x8 19. "TXCARERPIS,MMC Transmit Carrier Error Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 18. "TXEXCOLPIS,MMC Transmit Excessive Collision Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 17. "TXLATCOLPIS,MMC Transmit Late Collision Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 16. "TXDEFPIS,MMC Transmit Deferred Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 15. "TXMCOLGPIS,MMC Transmit Multiple Collision Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 14. "TXSCOLGPIS,MMC Transmit Single Collision Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 13. "TXUFLOWERPIS,MMC Transmit Underflow Error Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 12. "TXBCGBPIS,MMC Transmit Broadcast Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 11. "TXMCGBPIS,MMC Transmit Multicast Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 10. "TXUCGBPIS,MMC Transmit Unicast Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 9. "TX1024TMAXOCTGBPIS,MMC Transmit 1024 to Maximum Octet Good Bad Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 8. "TX512T1023OCTGBPIS,MMC Transmit 512 to 1023 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x8 7. "TX256T511OCTGBPIS,MMC Transmit 256 to 511 Octet Good Bad Packet Counter" "0,1" newline bitfld.long 0x8 6. "TX128T255OCTGBPIS,MMC Transmit 128 to 255 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x8 5. "TX65T127OCTGBPIS,MMC Transmit 65 to 127 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x8 4. "TX64OCTGBPIS,MMC Transmit 64 Octet Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 3. "TXMCGPIS,MMC Transmit Multicast Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 2. "TXBCGPIS,MMC Transmit Broadcast Good Packet Counter Interrupt Status" "0,1" bitfld.long 0x8 1. "TXGBPKTIS,MMC Transmit Good Bad Packet Counter Interrupt Status" "0,1" newline bitfld.long 0x8 0. "TXGBOCTIS,MMC Transmit Good Bad Octet Counter Interrupt Status" "0,1" line.long 0xC "ETH_MMC_RX_INTERRUPT_MASK,MMC Rx interrupt mask register" bitfld.long 0xC 27. "RXLPITRCIM,MMC Receive LPI transition counter interrupt Mask" "0,1" bitfld.long 0xC 26. "RXLPIUSCIM,MMC Receive LPI microsecond counter interrupt Mask" "0,1" bitfld.long 0xC 25. "RXCTRLPIM,MMC Receive Control Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 24. "RXRCVERRPIM,MMC Receive Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 23. "RXWDOGPIM,MMC Receive Watchdog Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 22. "RXVLANGBPIM,MMC Receive VLAN Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 21. "RXFOVPIM,MMC Receive FIFO Overflow Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 20. "RXPAUSPIM,MMC Receive Pause Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 19. "RXORANGEPIM,MMC Receive Out Of Range Error Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 18. "RXLENERPIM,MMC Receive Length Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 17. "RXUCGPIM,MMC Receive Unicast Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 16. "RX1024TMAXOCTGBPIM,MMC Receive 1024 to Maximum Octet Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 15. "RX512T1023OCTGBPIM,MMC Receive 512 to 1023 Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 14. "RX256T511OCTGBPIM,MMC Receive 256 to 511 Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 13. "RX128T255OCTGBPIM,MMC Receive 128 to 255 Octet Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 12. "RX65T127OCTGBPIM,MMC Receive 65 to 127 Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 11. "RX64OCTGBPIM,MMC Receive 64 Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 10. "RXOSIZEGPIM,MMC Receive Oversize Good Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 9. "RXUSIZEGPIM,MMC Receive Undersize Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 8. "RXJABERPIM,MMC Receive Jabber Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 7. "RXRUNTPIM,MMC Receive Runt Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 6. "RXALGNERPIM,MMC Receive Alignment Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 5. "RXCRCERPIM,MMC Receive CRC Error Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 4. "RXMCGPIM,MMC Receive Multicast Good Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 3. "RXBCGPIM,MMC Receive Broadcast Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0xC 2. "RXGOCTIM,MMC Receive Good Octet Counter Interrupt Mask" "0,1" bitfld.long 0xC 1. "RXGBOCTIM,MMC Receive Good Bad Octet Counter Interrupt Mask" "0,1" newline bitfld.long 0xC 0. "RXGBPKTIM,MMC Receive Good Bad Packet Counter Interrupt Mask" "0,1" line.long 0x10 "ETH_MMC_TX_INTERRUPT_MASK,MMC Tx interrupt mask register" bitfld.long 0x10 27. "TXLPITRCIM,MMC Transmit LPI transition counter interrupt Mask" "0,1" bitfld.long 0x10 26. "TXLPIUSCIM,MMC Transmit LPI microsecond counter interrupt Mask" "0,1" bitfld.long 0x10 25. "TXOSIZEGPIM,MMC Transmit Oversize Good Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 24. "TXVLANGPIM,MMC Transmit VLAN Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 23. "TXPAUSPIM,MMC Transmit Pause Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 22. "TXEXDEFPIM,MMC Transmit Excessive Deferral Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 21. "TXGPKTIM,MMC Transmit Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 20. "TXGOCTIM,MMC Transmit Good Octet Counter Interrupt Mask" "0,1" bitfld.long 0x10 19. "TXCARERPIM,MMC Transmit Carrier Error Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 18. "TXEXCOLPIM,MMC Transmit Excessive Collision Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 17. "TXLATCOLPIM,MMC Transmit Late Collision Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 16. "TXDEFPIM,MMC Transmit Deferred Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 15. "TXMCOLGPIM,MMC Transmit Multiple Collision Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 14. "TXSCOLGPIM,MMC Transmit Single Collision Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 13. "TXUFLOWERPIM,MMC Transmit Underflow Error Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 12. "TXBCGBPIM,MMC Transmit Broadcast Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 11. "TXMCGBPIM,MMC Transmit Multicast Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 10. "TXUCGBPIM,MMC Transmit Unicast Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 9. "TX1024TMAXOCTGBPIM,MMC Transmit 1024 to Maximum Octet Good Bad Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 8. "TX512T1023OCTGBPIM,MMC Transmit 512 to 1023 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x10 7. "TX256T511OCTGBPIM,MMC Transmit 256 to 511 Octet Good Bad Packet Counter" "0,1" newline bitfld.long 0x10 6. "TX128T255OCTGBPIM,MMC Transmit 128 to 255 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x10 5. "TX65T127OCTGBPIM,MMC Transmit 65 to 127 Octet Good Bad Packet Counter" "0,1" bitfld.long 0x10 4. "TX64OCTGBPIM,MMC Transmit 64 Octet Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 3. "TXMCGPIM,MMC Transmit Multicast Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 2. "TXBCGPIM,MMC Transmit Broadcast Good Packet Counter Interrupt Mask" "0,1" bitfld.long 0x10 1. "TXGBPKTIM,MMC Transmit Good Bad Packet Counter Interrupt Mask" "0,1" newline bitfld.long 0x10 0. "TXGBOCTIM,MMC Transmit Good Bad Octet Counter Interrupt Mask" "0,1" rgroup.long 0x714++0x67 line.long 0x0 "ETH_TX_OCTET_COUNT_GOOD_BAD,Tx octet count good bad register" hexmask.long 0x0 0.--31. 1. "TXOCTGB,Tx Octet Count Good Bad" line.long 0x4 "ETH_TX_PACKET_COUNT_GOOD_BAD,Tx packet count good bad register" hexmask.long 0x4 0.--31. 1. "TXPKTGB,Tx Packet Count Good Bad" line.long 0x8 "ETH_TX_BROADCAST_PACKETS_GOOD,Tx broadcast packets good register" hexmask.long 0x8 0.--31. 1. "TXBCASTG,Tx Broadcast Packets Good" line.long 0xC "ETH_TX_MULTICAST_PACKETS_GOOD,Tx multicast packets good register" hexmask.long 0xC 0.--31. 1. "TXMCASTG,Tx multicast Packets Good" line.long 0x10 "ETH_TX_64OCTETS_PACKETS_GOOD_BAD,Tx 64 octets packets good bad register" hexmask.long 0x10 0.--31. 1. "TX64OCTGB,Tx 64 octets Packets Good Bad" line.long 0x14 "ETH_TX_64TO127OCTETS_PACKETS_GOOD_BAD,Tx 65 to 127 octets packets good bad register" hexmask.long 0x14 0.--31. 1. "TX65_127OCTGB,Tx 65 to 127 octets Packets Good Bad" line.long 0x18 "ETH_TX_128TO255OCTETS_PACKETS_GOOD_BAD,Tx 128 to 255 octets packets good bad register" hexmask.long 0x18 0.--31. 1. "TX128_255OCTGB,Tx 128 to 255 octets Packets Good Bad" line.long 0x1C "ETH_TX_256TO511OCTETS_PACKETS_GOOD_BAD,Tx 256 to 511 octets packets good bad register" hexmask.long 0x1C 0.--31. 1. "TX256_511OCTGB,Tx 256 to 511 octets Packets Good Bad" line.long 0x20 "ETH_TX_512TO1023OCTETS_PACKETS_GOOD_BAD,Tx 512 to 1023 octets packets good bad register" hexmask.long 0x20 0.--31. 1. "TX512_1023OCTGB,Tx 512 to 1023 octets Packets Good Bad" line.long 0x24 "ETH_TX_1024TOMAXOCTETS_PACKETS_GOOD_BAD,Tx 1024 to max octets packets good bad register" hexmask.long 0x24 0.--31. 1. "TX1024_MAXOCTGB,Tx 1024 to Max octets Packets Good Bad" line.long 0x28 "ETH_TX_UNICAST_PACKETS_GOOD_BAD,Tx unicast packets good bad register" hexmask.long 0x28 0.--31. 1. "TXUCASTGB,Tx Unicast Packets Good Bad" line.long 0x2C "ETH_TX_MULTICAST_PACKETS_GOOD_BAD,Tx multicast packets good bad register" hexmask.long 0x2C 0.--31. 1. "TXMCASTGB,Tx Multicast Packets Good Bad" line.long 0x30 "ETH_TX_BROADCAST_PACKETS_GOOD_BAD,Tx broadcast packets good bad register" hexmask.long 0x30 0.--31. 1. "TXBCASTGB,Tx Broadcast Packets Good Bad" line.long 0x34 "ETH_TX_UNDERFLOW_ERROR_PACKETS,Tx underflow error packets register" hexmask.long 0x34 0.--31. 1. "TXUNDRFLW,Tx Underflow Error Packets" line.long 0x38 "ETH_TX_SINGLE_COLLISION_GOOD_PACKETS,Tx single collision good packets register" hexmask.long 0x38 0.--31. 1. "TXSNGLCOLG,Tx Single Collision Good Packets" line.long 0x3C "ETH_TX_MULTIPLE_COLLISION_GOOD_PACKETS,Tx multiple collision good packets register" hexmask.long 0x3C 0.--31. 1. "TXMULTCOLG,Tx Multiple Collision Good Packets" line.long 0x40 "ETH_TX_DEFERRED_PACKETS,Tx deferred packets register" hexmask.long 0x40 0.--31. 1. "TXDEFRD,Tx Deferred Packets" line.long 0x44 "ETH_TX_LATE_COLLISION_PACKETS,Tx late collision packets register" hexmask.long 0x44 0.--31. 1. "TXLATECOL,Tx Late Collision Packets" line.long 0x48 "ETH_TX_EXCESSIVE_COLLISION_PACKETS,Tx excessive collision packets register" hexmask.long 0x48 0.--31. 1. "TXEXSCOL,Tx Excessive Collision Packets" line.long 0x4C "ETH_TX_CARRIER_ERROR_PACKETS,Tx carrier error packets register" hexmask.long 0x4C 0.--31. 1. "TXCARR,Tx Carrier Error Packets" line.long 0x50 "ETH_TX_OCTET_COUNT_GOOD,Tx octet count good register" hexmask.long 0x50 0.--31. 1. "TXOCTG,Tx Octet Count Good" line.long 0x54 "ETH_TX_PACKET_COUNT_GOOD,Tx packet count good register" hexmask.long 0x54 0.--31. 1. "TXPKTG,Tx Packet Count Good" line.long 0x58 "ETH_TX_EXCESSIVE_DEFERRAL_ERROR,Tx excessive deferral error register" hexmask.long 0x58 0.--31. 1. "TXEXSDEF,Tx Excessive Deferral Error" line.long 0x5C "ETH_TX_PAUSE_PACKETS,Tx pause packets register" hexmask.long 0x5C 0.--31. 1. "TXPAUSE,Tx Pause Packets" line.long 0x60 "ETH_TX_VLAN_PACKETS_GOOD,Tx VLAN packets good register" hexmask.long 0x60 0.--31. 1. "TXVLANG,Tx VLAN Packets Good" line.long 0x64 "ETH_TX_OSIZE_PACKETS_GOOD,Tx OSsize packets good register" hexmask.long 0x64 0.--31. 1. "TXOSIZG,Tx OSize Packets Good" rgroup.long 0x780++0x67 line.long 0x0 "ETH_RX_PACKETS_COUNT_GOOD_BAD,Rx packets count good bad register" hexmask.long 0x0 0.--31. 1. "RXPKTGB,Rx Packets Count Good Bad" line.long 0x4 "ETH_RX_OCTET_COUNT_GOOD_BAD,Rx octet count good bad register" hexmask.long 0x4 0.--31. 1. "RXOCTGB,Rx Octet Count Good Bad" line.long 0x8 "ETH_RX_OCTET_COUNT_GOOD,Rx octet count good register" hexmask.long 0x8 0.--31. 1. "RXOCTG,Rx Octet Count Good" line.long 0xC "ETH_RX_BROADCAST_PACKETS_GOOD,Rx broadcast packets good register" hexmask.long 0xC 0.--31. 1. "RXBCASTG,Rx Broadcast Packets Good" line.long 0x10 "ETH_RX_MULTICAST_PACKETS_GOOD,Rx multicast packets good register" hexmask.long 0x10 0.--31. 1. "RXMCASTG,Rx Multicast Packets Good" line.long 0x14 "ETH_RX_CRC_ERROR_PACKETS,Rx CRC error packets register" hexmask.long 0x14 0.--31. 1. "RXCRCERR,Rx CRC Error Packets" line.long 0x18 "ETH_RX_ALIGNMENT_ERROR_PACKETS,Rx alignment error packets register" hexmask.long 0x18 0.--31. 1. "RXALGNERR,Rx Alignment Error Packets" line.long 0x1C "ETH_RX_RUNT_ERROR_PACKETS,Rx runt error packets register" hexmask.long 0x1C 0.--31. 1. "RXRUNTERR,Rx Runt Error Packets" line.long 0x20 "ETH_RX_JABBER_ERROR_PACKETS,Rx jabber error packets register" hexmask.long 0x20 0.--31. 1. "RXJABERR,Rx Jabber Error Packets" line.long 0x24 "ETH_RX_UNDERSIZE_PACKETS_GOOD,Rx undersize packets good register" hexmask.long 0x24 0.--31. 1. "RXUNDERSZG,Rx Undersize Packets Good" line.long 0x28 "ETH_RX_OVERSIZE_PACKETS_GOOD,Rx oversize packets good register" hexmask.long 0x28 0.--31. 1. "RXOVERSZG,Rx Oversize Packets Good" line.long 0x2C "ETH_RX_64OCTETS_PACKETS_GOOD_BAD,Rx 64 octets packets good bad register" hexmask.long 0x2C 0.--31. 1. "RX64OCTGB,Rx 64 Octets Packets Good Bad" line.long 0x30 "ETH_RX_65TO127OCTETS_PACKETS_GOOD_BAD,Rx 65 to 127 octets packets good bad register" hexmask.long 0x30 0.--31. 1. "TX65_127OCTGB,Rx 65-127 Octets Packets Good Bad" line.long 0x34 "ETH_RX_128TO255OCTETS_PACKETS_GOOD_BAD,Rx 128 to 255 octets packets good bad register" hexmask.long 0x34 0.--31. 1. "RX128_255OCTGB,Rx 128-255 Octets Packets Good Bad" line.long 0x38 "ETH_RX_256TO511OCTETS_PACKETS_GOOD_BAD,Rx 256 to 511 octets packets good bad register" hexmask.long 0x38 0.--31. 1. "RX256_511OCTGB,Rx 256-511 Octets Packets Good Bad" line.long 0x3C "ETH_RX_512TO1023OCTETS_PACKETS_GOOD_BAD,Rx 512 to 1023 octets packets good bad register" hexmask.long 0x3C 0.--31. 1. "RX512_1023OCTGB,Rx 512-1023 Octets Packets Good Bad" line.long 0x40 "ETH_RX_1024TOMAXOCTETS_PACKETS_GOOD_BAD,Rx 1024 to max octets packets good bad register" hexmask.long 0x40 0.--31. 1. "RX1024_MAXOCTGB,Rx 1024-Max Octets Good Bad" line.long 0x44 "ETH_RX_UNICAST_PACKETS_GOOD,Rx unicast packets good register" hexmask.long 0x44 0.--31. 1. "RXUCASTG,Rx Unicast Packets Good" line.long 0x48 "ETH_RX_LENGTH_ERROR_PACKETS,Rx length error packets register" hexmask.long 0x48 0.--31. 1. "RXLENERR,Rx Length Error Packets" line.long 0x4C "ETH_RX_OUT_OF_RANGE_PACKETS,Rx out of range type packets register" hexmask.long 0x4C 0.--31. 1. "RXOUTOFRNG,Rx Out of Range Type Packet" line.long 0x50 "ETH_RX_PAUSE_PACKETS,Rx pause packets register" hexmask.long 0x50 0.--31. 1. "RXPAUSEPKT,Rx Pause Packets" line.long 0x54 "ETH_RX_FIFO_OVERFLOW_PACKETS,Rx FIFO overflow packets register" hexmask.long 0x54 0.--31. 1. "RXFIFOOVFL,Rx FIFO Overflow Packets" line.long 0x58 "ETH_RX_VLAN_PACKETS_GOOD_BAD,Rx VLAN packets good bad register" hexmask.long 0x58 0.--31. 1. "RXVLANPKTGB,Rx VLAN Packets Good Bad" line.long 0x5C "ETH_RX_WATCHDOG_ERROR_PACKETS,Rx watchdog error packets register" hexmask.long 0x5C 0.--31. 1. "RXWDGERR,Rx Watchdog Error Packets" line.long 0x60 "ETH_RX_RECEIVE_ERROR,Rx receive error register" hexmask.long 0x60 0.--31. 1. "RXRCVERR,Rx Receive Error Packets" line.long 0x64 "ETH_RX_CONTROL_PACKETS_GOOD,Rx control packets good register" hexmask.long 0x64 0.--31. 1. "RXCTRLG,Rx Control Packets Good" rgroup.long 0x7EC++0xF line.long 0x0 "ETH_TX_LPI_USEC_CNTR,Tx LPI microsecond timer register" hexmask.long 0x0 0.--31. 1. "TXLPIUSC,Tx LPI Microseconds Counter" line.long 0x4 "ETH_TX_LPI_TRAN_CNTR,Tx LPI transition counter register" hexmask.long 0x4 0.--31. 1. "TXLPITRC,Tx LPI Transition counter" line.long 0x8 "ETH_RX_LPI_USEC_CNTR,Rx LPI microsecond counter register" hexmask.long 0x8 0.--31. 1. "RXLPIUSC,Rx LPI Microseconds Counter" line.long 0xC "ETH_RX_LPI_TRAN_CNTR,Rx LPI transition counter register" hexmask.long 0xC 0.--31. 1. "RXLPITRC,Rx LPI Transition counter" group.long 0x8A0++0x7 line.long 0x0 "ETH_MMC_FPE_TX_ISR,MMC FPE Tx interrupt status register" bitfld.long 0x0 1. "HRCIS,MMC Tx Hold Request Counter Interrupt Status" "0,1" bitfld.long 0x0 0. "FCIS,MMC Tx FPE Fragment Counter Interrupt status" "0,1" line.long 0x4 "ETH_MMC_FPE_TX_IMR,MMC FPE Tx interrupt mask register" bitfld.long 0x4 1. "HRCIM,MMC Transmit Hold Request Counter Interrupt Mask" "0,1" bitfld.long 0x4 0. "FCIM,MMC Transmit Fragment Counter Interrupt Mask" "0,1" rgroup.long 0x8A8++0x7 line.long 0x0 "ETH_MMC_FPE_TX_FCR,MMC FPE Tx fragment counter register" hexmask.long 0x0 0.--31. 1. "TXFFC,Tx FPE Fragment counter" line.long 0x4 "ETH_MMC_TX_HRCR,MMC Tx hold request counter register" hexmask.long 0x4 0.--31. 1. "TXHRC,Tx Hold Request Counter" rgroup.long 0x8C0++0x3 line.long 0x0 "ETH_MMC_FPE_RX_ISR,MMC FPE Rx interrupt status register" bitfld.long 0x0 3. "FCIS,MMC Rx FPE Fragment Counter Interrupt Status" "0,1" bitfld.long 0x0 2. "PAOCIS,MMC Rx Packet Assembly OK Counter Interrupt Status" "0,1" bitfld.long 0x0 1. "PSECIS,MMC Rx Packet SMD Error Counter Interrupt Status" "0,1" newline bitfld.long 0x0 0. "PAECIS,MMC Rx Packet Assembly Error Counter Interrupt Status" "0,1" group.long 0x8C4++0x3 line.long 0x0 "ETH_MMC_FPE_RX_IMR,MMC FPE Rx interrupt mask register" bitfld.long 0x0 3. "FCIM,MMC Rx FPE Fragment Counter Interrupt Mask" "0,1" bitfld.long 0x0 2. "PAOCIM,MMC Rx Packet Assembly OK Counter Interrupt Mask" "0,1" bitfld.long 0x0 1. "PSECIM,MMC Rx Packet SMD Error Counter Interrupt Mask" "0,1" newline bitfld.long 0x0 0. "PAECIM,MMC Rx Packet Assembly Error Counter Interrupt Mask" "0,1" rgroup.long 0x8C8++0xF line.long 0x0 "ETH_RX_PACKET_ASM_ERR,MMC Rx packet assembly error register" hexmask.long 0x0 0.--31. 1. "PAEC,Rx Packet Assembly Error Counter" line.long 0x4 "ETH_RX_PACKET_SMD_ERR,MMC Rx packet SMD error register" hexmask.long 0x4 0.--31. 1. "PSEC,Rx Packet SMD Error Counter" line.long 0x8 "ETH_RX_PACKET_ASM_OKR,MMC Rx packet assembly OK register" hexmask.long 0x8 0.--31. 1. "PAOC,Rx Packet Assembly OK Counter" line.long 0xC "ETH_RX_FPE_FRAG_CR,MMC Rx FPE fragments counter register" hexmask.long 0xC 0.--31. 1. "FFC,Rx FPE Fragment Counter" group.long 0x900++0x7 line.long 0x0 "ETH_MACL3L4C0R,L3 and L4 control 0 register" bitfld.long 0x0 28. "DMCHEN0,DMA Channel Select Enable" "0,1" bitfld.long 0x0 24. "DMCHN0,DMA Channel Number" "B_0x0,B_0x1" bitfld.long 0x0 21. "L4DPIM0,Layer 4 Destination Port Inverse Match Enable" "0,1" newline bitfld.long 0x0 20. "L4DPM0,Layer 4 Destination Port Match Enable" "0,1" bitfld.long 0x0 19. "L4SPIM0,Layer 4 Source Port Inverse Match Enable" "0,1" bitfld.long 0x0 18. "L4SPM0,Layer 4 Source Port Match Enable" "0,1" newline bitfld.long 0x0 16. "L4PEN0,Layer 4 Protocol Enable" "0,1" hexmask.long.byte 0x0 11.--15. 1. "L3HDBM0,Layer 3 IP DA higher bits match" hexmask.long.byte 0x0 6.--10. 1. "L3HSBM0,Layer 3 IP SA higher bits match" newline bitfld.long 0x0 5. "L3DAIM0,Layer 3 IP DA Inverse Match Enable" "0,1" bitfld.long 0x0 4. "L3DAM0,Layer 3 IP DA Match Enable" "0,1" bitfld.long 0x0 3. "L3SAIM0,Layer 3 IP SA Inverse Match Enable" "0,1" newline bitfld.long 0x0 2. "L3SAM0,Layer 3 IP SA Match Enable" "0,1" bitfld.long 0x0 0. "L3PEN0,Layer 3 Protocol Enable" "0,1" line.long 0x4 "ETH_MACL4A0R,Layer4 Address filter 0 register" hexmask.long.word 0x4 16.--31. 1. "L4DP0,Layer 4 Destination Port Number Field" hexmask.long.word 0x4 0.--15. 1. "L4SP0,Layer 4 Source Port Number Field" group.long 0x910++0xF line.long 0x0 "ETH_MACL3A00R,Layer3 Address 0 filter 0 register" hexmask.long 0x0 0.--31. 1. "L3A00,Layer 3 Address 0 Field" line.long 0x4 "ETH_MACL3A10R,Layer3 Address 1 filter 0 register" hexmask.long 0x4 0.--31. 1. "L3A10,Layer 3 Address 1 Field" line.long 0x8 "ETH_MACL3A20R,Layer3 Address 2 filter 0 register" hexmask.long 0x8 0.--31. 1. "L3A20,Layer 3 Address 2 Field" line.long 0xC "ETH_MACL3A30R,Layer3 Address 3 filter 0 register" hexmask.long 0xC 0.--31. 1. "L3A30,Layer 3 Address 3 Field" group.long 0x930++0x7 line.long 0x0 "ETH_MACL3L4C1R,L3 and L4 control 1 register" bitfld.long 0x0 28. "DMCHEN1,DMA Channel Select Enable" "0,1" bitfld.long 0x0 24. "DMCHN1,DMA Channel Number" "0,1" bitfld.long 0x0 21. "L4DPIM1,Layer 4 Destination Port Inverse Match Enable" "0,1" newline bitfld.long 0x0 20. "L4DPM1,Layer 4 Destination Port Match Enable" "0,1" bitfld.long 0x0 19. "L4SPIM1,Layer 4 Source Port Inverse Match Enable" "0,1" bitfld.long 0x0 18. "L4SPM1,Layer 4 Source Port Match Enable" "0,1" newline bitfld.long 0x0 16. "L4PEN1,Layer 4 Protocol Enable" "0,1" hexmask.long.byte 0x0 11.--15. 1. "L3HDBM1,Layer 3 IP DA higher bits match" hexmask.long.byte 0x0 6.--10. 1. "L3HSBM1,Layer 3 IP SA Higher Bits Match" newline bitfld.long 0x0 5. "L3DAIM1,Layer 3 IP DA Inverse Match Enable" "0,1" bitfld.long 0x0 4. "L3DAM1,Layer 3 IP DA Match Enable" "0,1" bitfld.long 0x0 3. "L3SAIM1,Layer 3 IP SA Inverse Match Enable" "0,1" newline bitfld.long 0x0 2. "L3SAM1,Layer 3 IP SA Match Enable" "0,1" bitfld.long 0x0 0. "L3PEN1,Layer 3 Protocol Enable" "0,1" line.long 0x4 "ETH_MACL4A1R,Layer 4 address filter 1 register" hexmask.long.word 0x4 16.--31. 1. "L4DP1,Layer 4 Destination Port Number Field" hexmask.long.word 0x4 0.--15. 1. "L4SP1,Layer 4 Source Port Number Field" group.long 0x940++0xF line.long 0x0 "ETH_MACL3A01R,Layer3 address 0 filter 1 Register" hexmask.long 0x0 0.--31. 1. "L3A01,Layer 3 Address 0 Field" line.long 0x4 "ETH_MACL3A11R,Layer3 address 1 filter 1 register" hexmask.long 0x4 0.--31. 1. "L3A11,Layer 3 Address 1 Field" line.long 0x8 "ETH_MACL3A21R,Layer3 address 2 filter 1 Register" hexmask.long 0x8 0.--31. 1. "L3A21,Layer 3 Address 2 Field" line.long 0xC "ETH_MACL3A31R,Layer3 address 3 filter 1 register" hexmask.long 0xC 0.--31. 1. "L3A31,Layer 3 Address 3 Field" group.long 0xA70++0x7 line.long 0x0 "ETH_MAC_IACR,MAC Indirect Access Control register" hexmask.long.byte 0x0 16.--19. 1. "MSEL,Mode Select" hexmask.long.byte 0x0 8.--15. 1. "AOFF,Address Offset" bitfld.long 0x0 5. "AUTO,Auto-increment" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "COM,Command type" "B_0x0,B_0x1" bitfld.long 0x0 0. "OB,Operation Busy." "0,1" line.long 0x4 "ETH_MAC_TMRQR,MAC type-based Rx Queue mapping register" bitfld.long 0x4 20. "PFEX,Preemption or Express Packet" "B_0x0,B_0x1" bitfld.long 0x4 16.--18. "TMRQ,Type Match Rx Queue Number" "0,1,2,3,4,5,6,7" hexmask.long.word 0x4 0.--15. 1. "TYP,Type field Value" group.long 0xB00++0x7 line.long 0x0 "ETH_MACTSCR,Timestamp control Register" bitfld.long 0x0 28. "AV8021ASMEN,AV 802." "0,1" bitfld.long 0x0 24. "TXTSSTSM,Transmit Timestamp Status Mode" "0,1" bitfld.long 0x0 20. "ESTI,External System Time Input" "0,1" newline bitfld.long 0x0 18. "TSENMACADDR,Enable MAC Address for PTP Packet Filtering" "0,1" bitfld.long 0x0 16.--17. "SNAPTYPSEL,Select PTP packets for Taking Snapshots" "0,1,2,3" bitfld.long 0x0 15. "TSMSTRENA,Enable Snapshot for Messages Relevant to Master" "0,1" newline bitfld.long 0x0 14. "TSEVNTENA,Enable Timestamp Snapshot for Event Messages" "0,1" bitfld.long 0x0 13. "TSIPV4ENA,Enable Processing of PTP Packets Sent over IPv4-UDP" "0,1" bitfld.long 0x0 12. "TSIPV6ENA,Enable Processing of PTP Packets Sent over IPv6-UDP" "0,1" newline bitfld.long 0x0 11. "TSIPENA,Enable Processing of PTP over Ethernet Packets" "0,1" bitfld.long 0x0 10. "TSVER2ENA,Enable PTP Packet Processing for Version 2 Format" "0,1" bitfld.long 0x0 9. "TSCTRLSSR,Timestamp Digital or Binary Rollover Control" "0,1" newline bitfld.long 0x0 8. "TSENALL,Enable Timestamp for All Packets" "0,1" bitfld.long 0x0 6. "PTGE,Presentation Time Generation Enable" "0,1" bitfld.long 0x0 5. "TSADDREG,Update Addend Register" "0,1" newline bitfld.long 0x0 3. "TSUPDT,Update Timestamp" "0,1" bitfld.long 0x0 2. "TSINIT,Initialize Timestamp" "0,1" bitfld.long 0x0 1. "TSCFUPDT,Fine or Coarse Timestamp Update" "0,1" newline bitfld.long 0x0 0. "TSENA,Enable Timestamp" "0,1" line.long 0x4 "ETH_MACSSIR,Subsecond increment register" hexmask.long.byte 0x4 16.--23. 1. "SSINC,Subsecond Increment Value" rgroup.long 0xB08++0x7 line.long 0x0 "ETH_MACSTSR,System time seconds register" hexmask.long 0x0 0.--31. 1. "TSS,Timestamp Second" line.long 0x4 "ETH_MACSTNR,System time nanoseconds register" hexmask.long 0x4 0.--30. 1. "TSSS,Timestamp subseconds" group.long 0xB10++0xB line.long 0x0 "ETH_MACSTSUR,System time seconds update register" hexmask.long 0x0 0.--31. 1. "TSS,Timestamp Seconds" line.long 0x4 "ETH_MACSTNUR,System time nanoseconds update register" bitfld.long 0x4 31. "ADDSUB,Add or Subtract Time" "0,1" hexmask.long 0x4 0.--30. 1. "TSSS,Timestamp subseconds" line.long 0x8 "ETH_MACTSAR,Timestamp addend register" hexmask.long 0x8 0.--31. 1. "TSAR,Timestamp Addend Register" group.long 0xB20++0xB line.long 0x0 "ETH_MACTSSR,Timestamp status register" hexmask.long.byte 0x0 25.--29. 1. "ATSNS,Number of Auxiliary Timestamp Snapshots" bitfld.long 0x0 24. "ATSSTM,Auxiliary Timestamp Snapshot Trigger Missed" "0,1" hexmask.long.byte 0x0 16.--19. 1. "ATSSTN,Auxiliary Timestamp Snapshot Trigger Identifier" newline bitfld.long 0x0 15. "TXTSSIS,Tx Timestamp Status Interrupt Status" "0,1" bitfld.long 0x0 5. "TSTRGTERR1,Timestamp Target Time Error" "0,1" bitfld.long 0x0 4. "TSTARGT1,Timestamp Target Time Reached" "0,1" newline bitfld.long 0x0 3. "TSTRGTERR0,Timestamp Target Time Error" "0,1" bitfld.long 0x0 2. "AUXTSTRIG,Auxiliary Timestamp Trigger Snapshot" "0,1" bitfld.long 0x0 1. "TSTARGT0,Timestamp Target Time Reached" "0,1" newline bitfld.long 0x0 0. "TSSOVF,Timestamp Seconds Overflow" "0,1" line.long 0x4 "ETH_MACRXDTI,Rx domain time increment register" hexmask.long.word 0x4 16.--31. 1. "RXNS,Receive domain time increment value in nanoseconds" line.long 0x8 "ETH_MACTXDTI,Tx domain time increment register" hexmask.long.word 0x8 16.--31. 1. "TXNS,Transmit domain time increment value in nanoseconds" group.long 0xB30++0x3 line.long 0x0 "ETH_MACTXTSSNR,Tx timestamp status nanoseconds register" rbitfld.long 0x0 31. "TXTSSMIS,Transmit Timestamp Status Missed" "0,1" hexmask.long 0x0 0.--30. 1. "TXTSSLO,Transmit Timestamp Status Low" rgroup.long 0xB34++0x3 line.long 0x0 "ETH_MACTXTSSSR,Tx timestamp status seconds register" hexmask.long 0x0 0.--31. 1. "TXTSSHI,Transmit Timestamp Status High" group.long 0xB40++0x3 line.long 0x0 "ETH_MACACR,Auxiliary control register" bitfld.long 0x0 7. "ATSEN3,Auxiliary Snapshot 3 Enable" "0,1" bitfld.long 0x0 6. "ATSEN2,Auxiliary Snapshot 2 Enable" "0,1" bitfld.long 0x0 5. "ATSEN1,Auxiliary Snapshot 1 Enable" "0,1" newline bitfld.long 0x0 4. "ATSEN0,Auxiliary Snapshot 0 Enable" "0,1" bitfld.long 0x0 0. "ATSFC,Auxiliary Snapshot FIFO Clear" "0,1" rgroup.long 0xB48++0x7 line.long 0x0 "ETH_MACATSNR,Auxiliary timestamp nanoseconds register" hexmask.long 0x0 0.--30. 1. "AUXTSLO,Auxiliary Timestamp" line.long 0x4 "ETH_MACATSSR,Auxiliary timestamp seconds register" hexmask.long 0x4 0.--31. 1. "AUXTSHI,Auxiliary Timestamp" group.long 0xB50++0xF line.long 0x0 "ETH_MACTSIACR,Timestamp Ingress asymmetric correction register" hexmask.long 0x0 0.--31. 1. "OSTIAC,One-Step Timestamp Ingress Asymmetry Correction" line.long 0x4 "ETH_MACTSEACR,Timestamp Egress asymmetric correction register" hexmask.long 0x4 0.--31. 1. "OSTEAC,One-Step Timestamp Egress Asymmetry Correction" line.long 0x8 "ETH_MACTSICNR,Timestamp Ingress correction nanosecond register" hexmask.long 0x8 0.--31. 1. "TSIC,Timestamp Ingress Correction" line.long 0xC "ETH_MACTSECNR,Timestamp Egress correction nanosecond register" hexmask.long 0xC 0.--31. 1. "TSEC,Timestamp Egress Correction" rgroup.long 0xB68++0x7 line.long 0x0 "ETH_MACTSILR,Timestamp Ingress Latency register" hexmask.long.word 0x0 16.--27. 1. "ITLNS,Ingress Timestamp Latency in nanoseconds" hexmask.long.byte 0x0 8.--15. 1. "ITLSNS,Ingress Timestamp Latency in subnanoseconds" line.long 0x4 "ETH_MACTSELR,Timestamp Egress Latency register" hexmask.long.word 0x4 16.--27. 1. "ETLNS,Egress Timestamp Latency in nanoseconds" hexmask.long.byte 0x4 8.--15. 1. "ETLSNS,Egress Timestamp Latency in subnanoseconds" group.long 0xB70++0x3 line.long 0x0 "ETH_MACPPSCR,PPS control register" bitfld.long 0x0 28. "TIMESEL,Time Select" "0,1" bitfld.long 0x0 7. "MCGREN0,MCGR Mode Enable for PPS0 Output" "B_0x0,B_0x1" bitfld.long 0x0 5.--6. "TRGTMODSEL0,Target Time Register Mode for PPS Output" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 4. "PPSEN0,Flexible PPS Output Mode Enable" "0,1" hexmask.long.byte 0x0 0.--3. 1. "PPSCTRL,PPS Output Frequency Control" group.long 0xB70++0x3 line.long 0x0 "ETH_MACPPSCR_ALTERNATE1,PPS control register" bitfld.long 0x0 28. "TIMESEL,Time Select" "0,1" bitfld.long 0x0 15. "MCGREN1,MCGR Mode Enable for PPS Output 1" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "TRGTMODSEL1,Target Time Register Mode for PPS Output 1" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x0 8.--11. 1. "PPSCMD1,Flexible PPS Output 1 Control" bitfld.long 0x0 7. "MCGREN0,MCGR Mode Enable for PPS Output 0" "B_0x0,B_0x1" bitfld.long 0x0 5.--6. "TRGTMODSEL0,Target Time Register Mode for PPS Output 0" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 4. "PPSEN0,Flexible PPS Output 0 Mode Enable" "0,1" hexmask.long.byte 0x0 0.--3. 1. "PPSCMD,Flexible PPS Output 0 (eth_ptp_pps_out) Control" group.long 0xB80++0x1F line.long 0x0 "ETH_MACPPSTTS0R,PPS 0 target time seconds register" hexmask.long 0x0 0.--31. 1. "TSTRH0,PPS Target Time Seconds Register" line.long 0x4 "ETH_MACPPSTTN0R,PPS 0 target time nanoseconds register" bitfld.long 0x4 31. "TRGTBUSY0,PPS Target Time Register Busy" "0,1" hexmask.long 0x4 0.--30. 1. "TTSL0,Target Time Low for PPS Register" line.long 0x8 "ETH_MACPPSI0R,PPS 0 interval register" hexmask.long 0x8 0.--31. 1. "PPSINT0,PPS Output Signal Interval" line.long 0xC "ETH_MACPPSW0R,PPS 0 width register" hexmask.long 0xC 0.--31. 1. "PPSWIDTH0,PPS Output Signal Width" line.long 0x10 "ETH_MACPPSTTS1R,PPS 1 target time seconds register" hexmask.long 0x10 0.--31. 1. "TSTRH0,PPS Target Time Seconds Register" line.long 0x14 "ETH_MACPPSTTN1R,PPS 1 target time nanoseconds register" bitfld.long 0x14 31. "TRGTBUSY0,PPS Target Time Register Busy" "0,1" hexmask.long 0x14 0.--30. 1. "TTSL0,Target Time Low for PPS Register" line.long 0x18 "ETH_MACPPSI1R,PPS 1 interval register" hexmask.long 0x18 0.--31. 1. "PPSINT0,PPS Output Signal Interval" line.long 0x1C "ETH_MACPPSW1R,PPS 1 width register" hexmask.long 0x1C 0.--31. 1. "PPSWIDTH0,PPS Output Signal Width" group.long 0xBC0++0x13 line.long 0x0 "ETH_MACPOCR,PTP Offload control register" hexmask.long.byte 0x0 8.--15. 1. "DN,Domain Number" bitfld.long 0x0 7. "PDRDIS,Disable Peer Delay Response response generation" "0,1" bitfld.long 0x0 6. "DRRDIS,Disable PTO Delay Request/Response response generation" "0,1" newline bitfld.long 0x0 5. "APDREQTRIG,Automatic PTP Pdelay_Req message Trigger" "0,1" bitfld.long 0x0 4. "ASYNCTRIG,Automatic PTP SYNC message Trigger" "0,1" bitfld.long 0x0 2. "APDREQEN,Automatic PTP Pdelay_Req message Enable" "0,1" newline bitfld.long 0x0 1. "ASYNCEN,Automatic PTP SYNC message Enable" "0,1" bitfld.long 0x0 0. "PTOEN,PTP Offload Enable" "0,1" line.long 0x4 "ETH_MACSPI0R,PTP Source Port Identity 0 Register" hexmask.long 0x4 0.--31. 1. "SPI0,Source Port Identity 0" line.long 0x8 "ETH_MACSPI1R,PTP Source port identity 1 register" hexmask.long 0x8 0.--31. 1. "SPI1,Source Port Identity 1" line.long 0xC "ETH_MACSPI2R,PTP Source port identity 2 register" hexmask.long.word 0xC 0.--15. 1. "SPI2,Source Port Identity 2" line.long 0x10 "ETH_MACLMIR,Log message interval register" hexmask.long.byte 0x10 24.--31. 1. "LMPDRI,Log Min Pdelay_Req Interval" bitfld.long 0x10 8.--10. "DRSYNCR,Delay_Req to SYNC Ratio" "B_0x0,B_0x1,?,?,?,?,?,?" hexmask.long.byte 0x10 0.--7. 1. "LSI,Log Sync Interval" group.long 0xC00++0x3 line.long 0x0 "ETH_MTLOMR,Operating mode register" bitfld.long 0x0 9. "CNTCLR,Counters Reset" "0,1" bitfld.long 0x0 8. "CNTPRST,Counters Preset" "0,1" bitfld.long 0x0 5.--6. "SCHALG,Tx Scheduling Algorithm" "B_0x0,?,?,B_0x3" newline bitfld.long 0x0 2. "RAA,Receive Arbitration Algorithm" "B_0x0,B_0x1" bitfld.long 0x0 1. "DTXSTS,Drop Transmit Status" "0,1" rgroup.long 0xC20++0x3 line.long 0x0 "ETH_MTLISR,Interrupt status register" bitfld.long 0x0 18. "ESTIS,EST (TAS- 802." "0,1" bitfld.long 0x0 3. "Q3IS,Queue 3 interrupt status" "0,1" bitfld.long 0x0 2. "Q2IS,Queue 2 interrupt status" "0,1" newline bitfld.long 0x0 1. "Q1IS,Queue 1 interrupt status" "0,1" bitfld.long 0x0 0. "Q0IS,Queue 0 interrupt status" "0,1" group.long 0xC30++0x3 line.long 0x0 "ETH_MTLRXQDMAMR,Rx Queue and DMA Channel Mapping register" bitfld.long 0x0 12. "Q1DDMACH,Queue 1 Enabled for DA-based DMA Channel Selection" "0,1" bitfld.long 0x0 8. "Q1MDMACH,Queue 1 Mapped to DMA Channel" "B_0x0,B_0x1" bitfld.long 0x0 4. "Q0DDMACH,Queue 0 Enabled for DA-based DMA Channel Selection" "0,1" newline bitfld.long 0x0 0. "Q0MDMACH,Queue 0 Mapped to DMA Channel" "B_0x0,B_0x1" group.long 0xC40++0x3 line.long 0x0 "ETH_MTLTBSCR,TBS control register" hexmask.long.tbyte 0x0 8.--31. 1. "LEOS,Launch Expiry Offset" bitfld.long 0x0 4.--6. "LEGOS,Launch Expiry GSN Offset" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "LEOV,Launch expiry offset valid" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "ESTM,EST offset mode" "B_0x0,B_0x1" group.long 0xC50++0xB line.long 0x0 "ETH_MTLESTCR,EST Control register" hexmask.long.byte 0x0 24.--31. 1. "PTOV,PTP Time Offset Value" hexmask.long.word 0x0 12.--23. 1. "CTOV,Current Time Offset Value" bitfld.long 0x0 8.--10. "TILS,Time Interval Left Shift Amount" "B_0x0,B_0x1,B_0x2,?,B_0x4,?,?,?" newline bitfld.long 0x0 6.--7. "LCSE,Loop Count to report Scheduling Error" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 5. "DFBS,Drop Frames causing Scheduling Error" "B_0x0,B_0x1" bitfld.long 0x0 4. "DDBF,Do not Drop frames during Frame Size Error" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "SSWL,Switch to S/W owned list" "0,1" bitfld.long 0x0 0. "EEST,Enable EST" "B_0x0,B_0x1" line.long 0x4 "ETH_MTLESTECR,EST Extended Control register" hexmask.long.byte 0x4 0.--5. 1. "OVHD,Overhead Bytes Value" line.long 0x8 "ETH_MTLESTSR,EST Status register" hexmask.long.byte 0x8 16.--19. 1. "CGSN,Current GCL slot number" hexmask.long.byte 0x8 8.--15. 1. "BTRL,BTR Error Loop Count" rbitfld.long 0x8 7. "SWOL,S/W owned list" "B_0x0,B_0x1" newline bitfld.long 0x8 4. "CGCE,Constant Gate Control Error" "B_0x0,B_0x1" rbitfld.long 0x8 3. "HLBS,Head-Of-Line Blocking due to Scheduling" "B_0x0,B_0x1" rbitfld.long 0x8 2. "HLBF,Head-Of-Line Blocking due to Frame Size" "0,1" newline bitfld.long 0x8 1. "BTRE,BTR Error" "B_0x0,B_0x1" bitfld.long 0x8 0. "SWLC,Switch to S/W owned list Complete" "B_0x0,B_0x1" group.long 0xC60++0x7 line.long 0x0 "ETH_MTLESTSCHER,EST Schedule Error register" hexmask.long.byte 0x0 0.--3. 1. "SEQN,Schedule Error Queue Number" line.long 0x4 "ETH_MTLESTFSER,EST Frame size Error register" hexmask.long.byte 0x4 0.--3. 1. "FEQN,Frame Size Error Queue Number" rgroup.long 0xC68++0x3 line.long 0x0 "ETH_MTLESTFSCR,EST Frame size Capture register" bitfld.long 0x0 16.--17. "HBFQ,Queue Number of HLBF" "0,1,2,3" hexmask.long.word 0x0 0.--14. 1. "HBFS,Frame Size of HLBF" group.long 0xC70++0x3 line.long 0x0 "ETH_MTLESTIER,EST Interrupt Enable register" bitfld.long 0x0 4. "CGCE,Interrupt Enable for CGCE" "0,1" bitfld.long 0x0 3. "IEHS,Interrupt Enable for HLBS" "0,1" bitfld.long 0x0 2. "IEHF,Interrupt Enable for HLBF" "0,1" newline bitfld.long 0x0 1. "IEBE,Interrupt Enable for BTR Error" "0,1" bitfld.long 0x0 0. "IECC,Interrupt Enable for Switch List" "0,1" group.long 0xC80++0x7 line.long 0x0 "ETH_MTLESTGCLCR,EST Gate Control List register" hexmask.long.byte 0x0 8.--13. 1. "ADDR,Gate Control List Address:" bitfld.long 0x0 5. "DBGB,Debug Mode Bank Select" "B_0x0,B_0x1" bitfld.long 0x0 4. "DBGM,Debug Mode" "0,1" newline bitfld.long 0x0 2. "GCRR,Gate Control Related registers" "0,1" bitfld.long 0x0 1. "R1W0,Read 1 Write 0" "B_0x0,B_0x1" bitfld.long 0x0 0. "SRWO,Start Read/Write Operation" "?,B_0x1" line.long 0x4 "ETH_MTLESTGCLDR,EST Gate Control List Data register" hexmask.long 0x4 0.--31. 1. "GCD,Gate Control Data" group.long 0xC90++0x7 line.long 0x0 "ETH_MTLFPECSR,FPE Frame Preemption Control Status register" bitfld.long 0x0 28. "HRS,Hold/Release Status" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--11. 1. "PEC,Preemption Classification" bitfld.long 0x0 7. "LBHT,Level-based Hold Transition" "0,1" newline bitfld.long 0x0 0.--1. "AFSZ,Additional Fragment Size" "0,1,2,3" line.long 0x4 "ETH_MTLFPEAR,FPE Frame Preemption Advance register" hexmask.long.word 0x4 16.--31. 1. "RADV,Release Advance" hexmask.long.word 0x4 0.--15. 1. "HADV,Hold Advance" group.long 0xD00++0x7 line.long 0x0 "ETH_MTLTXQ0OMR,T0 queue 0 operating mode register" hexmask.long.byte 0x0 16.--20. 1. "TQS,Transmit queue size" bitfld.long 0x0 4.--6. "TTC,Transmit Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 2.--3. "TXQEN,Transmit Queue Enable" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 1. "TSF,Transmit Store and Forward" "0,1" bitfld.long 0x0 0. "FTQ,Flush Transmit Queue" "0,1" line.long 0x4 "ETH_MTLTXQ0UR,T0 queue 0 underflow register" bitfld.long 0x4 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter" "0,1" hexmask.long.word 0x4 0.--10. 1. "UFFRMCNT,Underflow Packet Counter" rgroup.long 0xD08++0x3 line.long 0x0 "ETH_MTLTXQ0DR,T0 queue 0 debug register" bitfld.long 0x0 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--18. "PTXQ,Number of Packets in the Transmit Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status" "0,1" newline bitfld.long 0x0 4. "TXQSTS,MTL Tx Queue Not Empty Status" "0,1" bitfld.long 0x0 3. "TWCSTS,MTL Tx Queue Write Controller Status" "0,1" bitfld.long 0x0 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "TXQPAUSED,Transmit Queue in Pause" "0,1" rgroup.long 0xD14++0x3 line.long 0x0 "ETH_MTLTXQ0ESR,T0 queue 0 ETS status register" hexmask.long.tbyte 0x0 0.--23. 1. "ABS,Average Bits per Slot" group.long 0xD18++0x3 line.long 0x0 "ETH_MTLTXQ0QWR,T0 queue 0 quantum weight register" hexmask.long.word 0x0 0.--13. 1. "ISCQW,IdleSlopeCredit or Weights" group.long 0xD2C++0xB line.long 0x0 "ETH_MTLQ0ICSR,Queue 0 interrupt control status register" bitfld.long 0x0 24. "RXOIE,Receive Queue Overflow Interrupt Enable" "0,1" bitfld.long 0x0 16. "RXOVFIS,Receive Queue Overflow Interrupt Status" "0,1" bitfld.long 0x0 9. "ABPSIE,Average Bits Per Slot Interrupt Enable" "0,1" newline bitfld.long 0x0 8. "TXUIE,Transmit Queue Underflow Interrupt Enable" "0,1" bitfld.long 0x0 1. "ABPSIS,Average Bits Per Slot Interrupt Status" "0,1" bitfld.long 0x0 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status" "0,1" line.long 0x4 "ETH_MTLRXQ0OMR,R0 queue 0 operating mode register" hexmask.long.byte 0x4 20.--23. 1. "RQS,Receive Queue Size" bitfld.long 0x4 14.--16. "RFD,Threshold for Deactivating Flow Control (in Half-duplex and Full-duplex modes)" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 8.--10. "RFA,Threshold for Activating Flow Control (in Half-duplex and Full-duplex)" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 7. "EHFC,Enable Hardware Flow Control" "0,1" bitfld.long 0x4 6. "DIS_TCP_EF,Disable Dropping of TCP/IP Checksum Error Packets" "0,1" bitfld.long 0x4 5. "RSF,Receive Queue Store and Forward" "0,1" newline bitfld.long 0x4 4. "FEP,Forward Error Packets" "0,1" bitfld.long 0x4 3. "FUP,Forward Undersized Good Packets" "0,1" bitfld.long 0x4 0.--1. "RTC,Receive Queue Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "ETH_MTLRXQ0MPOCR,R0 queue 0 missed packet and overflow counter register" bitfld.long 0x8 27. "MISCNTOVF,Missed Packet Counter Overflow Bit" "0,1" hexmask.long.word 0x8 16.--26. 1. "MISPKTCNT,Missed Packet Counter" bitfld.long 0x8 11. "OVFCNTOVF,Overflow Counter Overflow Bit" "0,1" newline hexmask.long.word 0x8 0.--10. 1. "OVFPKTCNT,Overflow Packet Counter" rgroup.long 0xD38++0x3 line.long 0x0 "ETH_MTLRXQ0DR,R0 queue 0 debug register" hexmask.long.word 0x0 16.--29. 1. "PRXQ,Number of Packets in Receive Queue" bitfld.long 0x0 4.--5. "RXQSTS,MTL Rx Queue Fill-Level Status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "RRCSTS,MTL Rx Queue Read Controller State" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "RWCSTS,MTL Rx Queue Write Controller Active Status" "0,1" group.long 0xD3C++0xB line.long 0x0 "ETH_MTLRXQ0CR,R0 queue 0 control register" bitfld.long 0x0 3. "RXQ_FRM_ARBIT,Receive Queue Packet Arbitration" "0,1" bitfld.long 0x0 0.--2. "RXQ_WEGT,Receive Queue Weight" "0,1,2,3,4,5,6,7" line.long 0x4 "ETH_MTLTXQ1OMR,T1 queue 1 operating mode register" hexmask.long.byte 0x4 16.--20. 1. "TQS,Transmit queue size" bitfld.long 0x4 4.--6. "TTC,Transmit Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 2.--3. "TXQEN,Transmit Queue Enable" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 1. "TSF,Transmit Store and Forward" "0,1" bitfld.long 0x4 0. "FTQ,Flush Transmit Queue" "0,1" line.long 0x8 "ETH_MTLTXQ1UR,T1 queue 1 underflow register" bitfld.long 0x8 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter" "0,1" hexmask.long.word 0x8 0.--10. 1. "UFFRMCNT,Underflow Packet Counter" rgroup.long 0xD48++0x3 line.long 0x0 "ETH_MTLTXQ1DR,T1 queue 1 debug register" bitfld.long 0x0 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--18. "PTXQ,Number of Packets in the Transmit Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status" "0,1" newline bitfld.long 0x0 4. "TXQSTS,MTL Tx Queue Not Empty Status" "0,1" bitfld.long 0x0 3. "TWCSTS,MTL Tx Queue Write Controller Status" "0,1" bitfld.long 0x0 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "TXQPAUSED,Transmit Queue in Pause" "0,1" group.long 0xD50++0x3 line.long 0x0 "ETH_MTLTXQ1ECR,T1 queue 1 ETS control register" bitfld.long 0x0 4.--6. "SLC,Slot Count" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 3. "CC,Credit Control" "0,1" bitfld.long 0x0 2. "AVALG,AV Algorithm" "0,1" rgroup.long 0xD54++0x3 line.long 0x0 "ETH_MTLTXQ1ESR,T1 queue 1 ETS status register" hexmask.long.tbyte 0x0 0.--23. 1. "ABS,Average Bits per Slot" group.long 0xD58++0xF line.long 0x0 "ETH_MTLTXQ1QWR,T1 queue 1 quantum weight register" hexmask.long.word 0x0 0.--13. 1. "ISCQW,IdleSlopeCredit or Weights" line.long 0x4 "ETH_MTLTXQ1SSCR,T1 queue 1 send slope credit register" hexmask.long.word 0x4 0.--13. 1. "SSC,sendSlopeCredit Value" line.long 0x8 "ETH_MTLTXQ1HCR,T1 Queue 1 hiCredit register" hexmask.long 0x8 0.--28. 1. "HC,hiCredit Value" line.long 0xC "ETH_MTLTXQ1LCR,T1 queue 1 loCredit register" hexmask.long 0xC 0.--28. 1. "LC,loCredit Value" group.long 0xD6C++0xB line.long 0x0 "ETH_MTLQ1ICSR,Queue 1 interrupt control status register" bitfld.long 0x0 24. "RXOIE,Receive Queue Overflow Interrupt Enable" "0,1" bitfld.long 0x0 16. "RXOVFIS,Receive Queue Overflow Interrupt Status" "0,1" bitfld.long 0x0 9. "ABPSIE,Average Bits Per Slot Interrupt Enable" "0,1" newline bitfld.long 0x0 8. "TXUIE,Transmit Queue Underflow Interrupt Enable" "0,1" bitfld.long 0x0 1. "ABPSIS,Average Bits Per Slot Interrupt Status" "0,1" bitfld.long 0x0 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status" "0,1" line.long 0x4 "ETH_MTLRXQ1OMR,R1 queue 1 operating mode register" hexmask.long.byte 0x4 20.--23. 1. "RQS,Receive Queue Size" bitfld.long 0x4 14.--16. "RFD,Threshold for Deactivating Flow Control (in Half-duplex and Full-duplex modes)" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 8.--10. "RFA,Threshold for Activating Flow Control (in Half-duplex and Full-duplex)" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 7. "EHFC,Enable Hardware Flow Control" "0,1" bitfld.long 0x4 6. "DIS_TCP_EF,Disable Dropping of TCP/IP Checksum Error Packets" "0,1" bitfld.long 0x4 5. "RSF,Receive Queue Store and Forward" "0,1" newline bitfld.long 0x4 4. "FEP,Forward Error Packets" "0,1" bitfld.long 0x4 3. "FUP,Forward Undersized Good Packets" "0,1" bitfld.long 0x4 0.--1. "RTC,Receive Queue Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "ETH_MTLRXQ1MPOCR,R1 queue 1 missed packet and overflow counter register" bitfld.long 0x8 27. "MISCNTOVF,Missed Packet Counter Overflow Bit" "0,1" hexmask.long.word 0x8 16.--26. 1. "MISPKTCNT,Missed Packet Counter" bitfld.long 0x8 11. "OVFCNTOVF,Overflow Counter Overflow Bit" "0,1" newline hexmask.long.word 0x8 0.--10. 1. "OVFPKTCNT,Overflow Packet Counter" rgroup.long 0xD78++0x3 line.long 0x0 "ETH_MTLRXQ1DR,R1 queue 1 debug register" hexmask.long.word 0x0 16.--29. 1. "PRXQ,Number of Packets in Receive Queue" bitfld.long 0x0 4.--5. "RXQSTS,MTL Rx Queue Fill-Level Status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "RRCSTS,MTL Rx Queue Read Controller State" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "RWCSTS,MTL Rx Queue Write Controller Active Status" "0,1" group.long 0xD7C++0xB line.long 0x0 "ETH_MTLRXQ1CR,R1 queue 1 control register" bitfld.long 0x0 3. "RXQ_FRM_ARBIT,Receive Queue Packet Arbitration" "0,1" bitfld.long 0x0 0.--2. "RXQ_WEGT,Receive Queue Weight" "0,1,2,3,4,5,6,7" line.long 0x4 "ETH_MTLTXQ2OMR,T2 queue 2 operating mode register" hexmask.long.byte 0x4 16.--20. 1. "TQS,Transmit queue size" bitfld.long 0x4 4.--6. "TTC,Transmit Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 2.--3. "TXQEN,Transmit Queue Enable" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 1. "TSF,Transmit Store and Forward" "0,1" bitfld.long 0x4 0. "FTQ,Flush Transmit Queue" "0,1" line.long 0x8 "ETH_MTLTXQ2UR,T2 queue 2 underflow register" bitfld.long 0x8 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter" "0,1" hexmask.long.word 0x8 0.--10. 1. "UFFRMCNT,Underflow Packet Counter" rgroup.long 0xD88++0x3 line.long 0x0 "ETH_MTLTXQ2DR,T2 queue 2 debug register" bitfld.long 0x0 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--18. "PTXQ,Number of Packets in the Transmit Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status" "0,1" newline bitfld.long 0x0 4. "TXQSTS,MTL Tx Queue Not Empty Status" "0,1" bitfld.long 0x0 3. "TWCSTS,MTL Tx Queue Write Controller Status" "0,1" bitfld.long 0x0 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "TXQPAUSED,Transmit Queue in Pause" "0,1" group.long 0xD90++0x3 line.long 0x0 "ETH_MTLTXQ2ECR,T2 queue 2 ETS control register" bitfld.long 0x0 4.--6. "SLC,Slot Count" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 3. "CC,Credit Control" "0,1" bitfld.long 0x0 2. "AVALG,AV Algorithm" "0,1" rgroup.long 0xD94++0x3 line.long 0x0 "ETH_MTLTXQ2ESR,T2 queue 2 ETS status register" hexmask.long.tbyte 0x0 0.--23. 1. "ABS,Average Bits per Slot" group.long 0xD98++0xF line.long 0x0 "ETH_MTLTXQ2QWR,T2 queue 2 quantum weight register" hexmask.long.word 0x0 0.--13. 1. "ISCQW,IdleSlopeCredit or Weights" line.long 0x4 "ETH_MTLTXQ2SSCR,T2 queue 2 send slope credit register" hexmask.long.word 0x4 0.--13. 1. "SSC,sendSlopeCredit Value" line.long 0x8 "ETH_MTLTXQ2HCR,T2 Queue 2 hiCredit register" hexmask.long 0x8 0.--28. 1. "HC,hiCredit Value" line.long 0xC "ETH_MTLTXQ2LCR,T2 queue 2 loCredit register" hexmask.long 0xC 0.--28. 1. "LC,loCredit Value" group.long 0xDAC++0x3 line.long 0x0 "ETH_MTLQ2ICSR,Queue 2 interrupt control status register" bitfld.long 0x0 24. "RXOIE,Receive Queue Overflow Interrupt Enable" "0,1" bitfld.long 0x0 16. "RXOVFIS,Receive Queue Overflow Interrupt Status" "0,1" bitfld.long 0x0 9. "ABPSIE,Average Bits Per Slot Interrupt Enable" "0,1" newline bitfld.long 0x0 8. "TXUIE,Transmit Queue Underflow Interrupt Enable" "0,1" bitfld.long 0x0 1. "ABPSIS,Average Bits Per Slot Interrupt Status" "0,1" bitfld.long 0x0 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status" "0,1" group.long 0xDC0++0x7 line.long 0x0 "ETH_MTLTXQ3OMR,T3 queue 3 operating mode register" hexmask.long.byte 0x0 16.--20. 1. "TQS,Transmit queue size" bitfld.long 0x0 4.--6. "TTC,Transmit Threshold Control" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 2.--3. "TXQEN,Transmit Queue Enable" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 1. "TSF,Transmit Store and Forward" "0,1" bitfld.long 0x0 0. "FTQ,Flush Transmit Queue" "0,1" line.long 0x4 "ETH_MTLTXQ3UR,T3 queue 3 underflow register" bitfld.long 0x4 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter" "0,1" hexmask.long.word 0x4 0.--10. 1. "UFFRMCNT,Underflow Packet Counter" rgroup.long 0xDC8++0x3 line.long 0x0 "ETH_MTLTXQ3DR,T3 queue 3 debug register" bitfld.long 0x0 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--18. "PTXQ,Number of Packets in the Transmit Queue" "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status" "0,1" newline bitfld.long 0x0 4. "TXQSTS,MTL Tx Queue Not Empty Status" "0,1" bitfld.long 0x0 3. "TWCSTS,MTL Tx Queue Write Controller Status" "0,1" bitfld.long 0x0 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "TXQPAUSED,Transmit Queue in Pause" "0,1" group.long 0xDD0++0x3 line.long 0x0 "ETH_MTLTXQ3ECR,T3 queue 3 ETS control register" bitfld.long 0x0 4.--6. "SLC,Slot Count" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 3. "CC,Credit Control" "0,1" bitfld.long 0x0 2. "AVALG,AV Algorithm" "0,1" rgroup.long 0xDD4++0x3 line.long 0x0 "ETH_MTLTXQ3ESR,T3 queue 3 ETS status register" hexmask.long.tbyte 0x0 0.--23. 1. "ABS,Average Bits per Slot" group.long 0xDD8++0xF line.long 0x0 "ETH_MTLTXQ3QWR,T3 queue 3 quantum weight register" hexmask.long.word 0x0 0.--13. 1. "ISCQW,IdleSlopeCredit or Weights" line.long 0x4 "ETH_MTLTXQ3SSCR,T3 queue 3 send slope credit register" hexmask.long.word 0x4 0.--13. 1. "SSC,sendSlopeCredit Value" line.long 0x8 "ETH_MTLTXQ3HCR,T3 Queue 3 hiCredit register" hexmask.long 0x8 0.--28. 1. "HC,hiCredit Value" line.long 0xC "ETH_MTLTXQ3LCR,T3 queue 3 loCredit register" hexmask.long 0xC 0.--28. 1. "LC,loCredit Value" group.long 0xDEC++0x3 line.long 0x0 "ETH_MTLQ3ICSR,Queue 3 interrupt control status register" bitfld.long 0x0 24. "RXOIE,Receive Queue Overflow Interrupt Enable" "0,1" bitfld.long 0x0 16. "RXOVFIS,Receive Queue Overflow Interrupt Status" "0,1" bitfld.long 0x0 9. "ABPSIE,Average Bits Per Slot Interrupt Enable" "0,1" newline bitfld.long 0x0 8. "TXUIE,Transmit Queue Underflow Interrupt Enable" "0,1" bitfld.long 0x0 1. "ABPSIS,Average Bits Per Slot Interrupt Status" "0,1" bitfld.long 0x0 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status" "0,1" group.long 0x1000++0x7 line.long 0x0 "ETH_DMAMR,DMA mode register" bitfld.long 0x0 16.--17. "INTM,Interrupt Mode" "0,1,2,3" bitfld.long 0x0 11. "TXPR,Transmit priority" "0,1" bitfld.long 0x0 8. "DSPW,Descriptor Posted Write" "B_0x0,B_0x1" newline rbitfld.long 0x0 4. "TAA2,Transmit Arbitration Algorithm" "B_0x0,B_0x1" rbitfld.long 0x0 3. "TAA1,Transmit Arbitration Algorithm" "B_0x0,B_0x1" rbitfld.long 0x0 2. "TAA0,Transmit Arbitration Algorithm" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "SWR,Software Reset" "0,1" line.long 0x4 "ETH_DMASBMR,System bus mode register" bitfld.long 0x4 31. "EN_LPI,Enable Low Power Interface (LPI)" "0,1" bitfld.long 0x4 30. "LPI_XIT_PKT,Unlock on Magic Packet or Remote wake-up Packet" "0,1" bitfld.long 0x4 24.--25. "WR_OSR_LMT,AXI Maximum Write Outstanding Request Limit" "0,1,2,3" newline bitfld.long 0x4 16.--17. "RD_OSR_LMT,AXI Maximum Read Outstanding Request Limit" "0,1,2,3" bitfld.long 0x4 13. "ONEKBBE,1 Kbyte Boundary Crossing Enable for the AXI Master" "0,1" bitfld.long 0x4 12. "AAL,Address-Aligned Beats" "0,1" newline bitfld.long 0x4 10. "AALE,Automatic AXI LPI enable" "0,1" bitfld.long 0x4 7. "BLEN256,AXI Burst Length 256" "0,1" bitfld.long 0x4 6. "BLEN128,AXI Burst Length 128" "0,1" newline bitfld.long 0x4 5. "BLEN64,AXI Burst Length 64" "0,1" bitfld.long 0x4 4. "BLEN32,AXI Burst Length 32" "0,1" bitfld.long 0x4 3. "BLEN16,AXI Burst Length 16" "0,1" newline bitfld.long 0x4 2. "BLEN8,AXI Burst Length 8" "0,1" bitfld.long 0x4 1. "BLEN4,AXI Burst Length 4" "0,1" bitfld.long 0x4 0. "FB,Fixed Burst Length" "0,1" rgroup.long 0x1008++0xB line.long 0x0 "ETH_DMAISR,Interrupt status register" bitfld.long 0x0 17. "MACIS,MAC Interrupt Status" "0,1" bitfld.long 0x0 16. "MTLIS,MTL Interrupt Status" "0,1" bitfld.long 0x0 3. "DC3IS,DMA Channel 3 Interrupt Status" "0,1" newline bitfld.long 0x0 2. "DC2IS,DMA Channel 2 Interrupt Status" "0,1" bitfld.long 0x0 1. "DC1IS,DMA Channel 1 Interrupt Status" "0,1" bitfld.long 0x0 0. "DC0IS,DMA Channel Interrupt Status" "0,1" line.long 0x4 "ETH_DMADS1R,Debug status 1 register" hexmask.long.byte 0x4 28.--31. 1. "TPS2,DMA Channel 2 Transmit Process State" hexmask.long.byte 0x4 20.--23. 1. "TPS1,DMA Channel 1 Transmit Process State" hexmask.long.byte 0x4 16.--19. 1. "RPS1,DMA Channel 1 Receive Process State" newline hexmask.long.byte 0x4 12.--15. 1. "TPS0,DMA Channel Transmit Process State" hexmask.long.byte 0x4 8.--11. 1. "RPS0,DMA Channel Receive Process State" bitfld.long 0x4 1. "AXRHSTS,AXI Master Read Channel Status" "0,1" newline bitfld.long 0x4 0. "AXWHSTS,AXI Master Write Channel" "0,1" line.long 0x8 "ETH_DMADS2R,Debug status 2 register" hexmask.long.byte 0x8 4.--7. 1. "TPS3,DMA Channel 3 Transmit Process State" group.long 0x1020++0xB line.long 0x0 "ETH_DMAA4TXACR,AXI4 transmit channel ACE control register" hexmask.long.byte 0x0 16.--19. 1. "THC,Transmit DMA First Packet Buffer or TSO Header Cache Control" hexmask.long.byte 0x0 8.--11. 1. "TEC,Transmit DMA Extended Packet Buffer or TSO Payload Cache Control" hexmask.long.byte 0x0 0.--3. 1. "TDRC,Transmit DMA Read Descriptor Cache Control" line.long 0x4 "ETH_DMAA4RXACR,AXI4 receive channel ACE control register" hexmask.long.byte 0x4 24.--27. 1. "RDC,Receive DMA Buffer Cache Control" hexmask.long.byte 0x4 16.--19. 1. "RHC,Receive DMA Header Cache Control" hexmask.long.byte 0x4 8.--11. 1. "RPC,Receive DMA Payload Cache Control" newline hexmask.long.byte 0x4 0.--3. 1. "RDWC,Receive DMA Write Descriptor Cache Control" line.long 0x8 "ETH_DMAA4DACR,AXI4 descriptor ACE control register" hexmask.long.byte 0x8 8.--11. 1. "RDRC,Receive DMA Read Descriptor Cache control" bitfld.long 0x8 4.--5. "TDWD,Transmit DMA Write Descriptor Domain control" "0,1,2,3" hexmask.long.byte 0x8 0.--3. 1. "TDWC,Transmit DMA Write Descriptor Cache control" group.long 0x1040++0x3 line.long 0x0 "ETH_DMALPIEI,AXI4 LPI Entry Interval register" hexmask.long.byte 0x0 0.--3. 1. "LPIEI,LPI Entry Interval" group.long 0x1050++0x3 line.long 0x0 "ETH_DMATBSCTRL0R,DMA TBS control register 0" hexmask.long.tbyte 0x0 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0x0 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" group.long 0x1050++0xF line.long 0x0 "ETH_DMATBSCTRL0R_ALTERNATE1,DMA TBS control register 0" hexmask.long.tbyte 0x0 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0x0 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" line.long 0x4 "ETH_DMATBSCTRL1R,DMA TBS control register 1" hexmask.long.tbyte 0x4 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0x4 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" line.long 0x8 "ETH_DMATBSCTRL2R,DMA TBS control register 2" hexmask.long.tbyte 0x8 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0x8 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" line.long 0xC "ETH_DMATBSCTRL3R,DMA TBS control register 3" hexmask.long.tbyte 0xC 8.--31. 1. "FTOS,Fetch time offset" bitfld.long 0xC 4.--6. "FGOS,Fetch GSN offset" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "FTOV,Fetch time offset valid" "B_0x0,B_0x1" group.long 0x1100++0xB line.long 0x0 "ETH_DMAC0CR,Channel 0 control register" bitfld.long 0x0 18.--20. "DSL,Descriptor Skip Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "PBLX8,8xPBL mode" "0,1" hexmask.long.word 0x0 0.--13. 1. "MSS,Maximum Segment Size" line.long 0x4 "ETH_DMAC0TXCR,Channel 0 transmit control register" bitfld.long 0x4 30. "TFSEL1,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 29. "TFSEL0,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 28. "EDSE,Enhanced Descriptor Enable" "0,1" newline hexmask.long.byte 0x4 24.--27. 1. "TQOS,Transmit QOS" hexmask.long.byte 0x4 16.--21. 1. "TXPBL,Transmit Programmable Burst Length" bitfld.long 0x4 15. "IPBL,Ignore PBL Requirement" "0,1" newline bitfld.long 0x4 12. "TSE,TCP Segmentation Enabled" "0,1" bitfld.long 0x4 4. "OSF,Operate on Second Packet" "0,1" rbitfld.long 0x4 1.--3. "TCW,Transmit Channel Weight" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0. "ST,Start or Stop Transmission Command" "0,1" line.long 0x8 "ETH_DMAC0RXCR,Channel 0 receive control register" bitfld.long 0x8 31. "RPF,DMA Rx Channel x Packet Flush" "0,1" hexmask.long.byte 0x8 24.--27. 1. "RQOS,Rx AXI4 QOS." hexmask.long.byte 0x8 16.--21. 1. "RXPBL,Receive Programmable Burst Length" newline hexmask.long.word 0x8 1.--14. 1. "RBSZ,Receive Buffer size" bitfld.long 0x8 0. "SR,Start or Stop Receive" "0,1" group.long 0x1114++0x3 line.long 0x0 "ETH_DMAC0TXDLAR,Channel 0 T0 descriptor list address register" hexmask.long 0x0 0.--31. 1. "TDESLA,Start of Transmit List" group.long 0x111C++0x7 line.long 0x0 "ETH_DMAC0RXDLAR,Channel 0 R0 descriptor list address register" hexmask.long 0x0 0.--31. 1. "RDESLA,Start of Receive List" line.long 0x4 "ETH_DMAC0TXDTPR,Channel 0 T0 descriptor tail pointer register" hexmask.long 0x4 0.--31. 1. "TDT,Transmit Descriptor Tail Pointer" group.long 0x1128++0x17 line.long 0x0 "ETH_DMAC0RXDTPR,Channel 0 R0 descriptor tail pointer register" hexmask.long 0x0 0.--31. 1. "RDT,Receive Descriptor Tail Pointer" line.long 0x4 "ETH_DMAC0TXRLR,Channel 0 T0 descriptor ring length register" hexmask.long.word 0x4 0.--9. 1. "TDRL,Transmit Descriptor Ring Length" line.long 0x8 "ETH_DMAC0RXRLR,Channel 0 R0 descriptor ring length register" hexmask.long.byte 0x8 17.--23. 1. "ARBS,Alternate Receive Buffer Size" hexmask.long.word 0x8 0.--9. 1. "RDRL,Receive Descriptor Ring Length" line.long 0xC "ETH_DMAC0IER,Channel 0 interrupt enable register" bitfld.long 0xC 15. "NIE,Normal Interrupt Summary Enable" "0,1" bitfld.long 0xC 14. "AIE,Abnormal Interrupt Summary Enable" "0,1" bitfld.long 0xC 13. "CDEE,Context Descriptor Error Enable" "0,1" newline bitfld.long 0xC 12. "FBEE,Fatal Bus Error Enable" "0,1" bitfld.long 0xC 11. "ERIE,Early Receive Interrupt Enable" "0,1" bitfld.long 0xC 10. "ETIE,Early Transmit Interrupt Enable" "0,1" newline bitfld.long 0xC 9. "RWTE,Receive Watchdog Timeout Enable" "0,1" bitfld.long 0xC 8. "RSE,Receive Stopped Enable" "0,1" bitfld.long 0xC 7. "RBUE,Receive Buffer Unavailable Enable" "0,1" newline bitfld.long 0xC 6. "RIE,Receive Interrupt Enable" "0,1" bitfld.long 0xC 2. "TBUE,Transmit Buffer Unavailable Enable" "0,1" bitfld.long 0xC 1. "TXSE,Transmit Stopped Enable" "0,1" newline bitfld.long 0xC 0. "TIE,Transmit Interrupt Enable" "0,1" line.long 0x10 "ETH_DMAC0RXIWTR,Channel 0 R0 interrupt watchdog timer register" bitfld.long 0x10 16.--17. "RWTU,Receive Interrupt Watchdog Timer Count Units" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x10 0.--7. 1. "RWT,Receive Interrupt Watchdog Timer Count" line.long 0x14 "ETH_DMAC0SFCSR,Channel 0 slot function control status register" hexmask.long.byte 0x14 16.--19. 1. "RSN,Reference Slot Number" hexmask.long.word 0x14 4.--15. 1. "SIV,Slot Interval Value" bitfld.long 0x14 1. "ASC,Advance Slot Check" "0,1" newline bitfld.long 0x14 0. "ESC,Enable Slot Comparison" "0,1" rgroup.long 0x1144++0x3 line.long 0x0 "ETH_DMAC0CATXDR,Channel 0 current application transmit descriptor register" hexmask.long 0x0 0.--31. 1. "CURTDESAPTR,Application Transmit Descriptor Address Pointer" rgroup.long 0x114C++0x3 line.long 0x0 "ETH_DMAC0CARXDR,Channel 0 current application receive descriptor register" hexmask.long 0x0 0.--31. 1. "CURRDESAPTR,Application Receive Descriptor Address Pointer" rgroup.long 0x1154++0x3 line.long 0x0 "ETH_DMAC0CATXBR,Channel 0 current application transmit buffer register" hexmask.long 0x0 0.--31. 1. "CURTBUFAPTR,Application Transmit Buffer Address Pointer" rgroup.long 0x115C++0x3 line.long 0x0 "ETH_DMAC0CARXBR,Channel 0 current application receive buffer register" hexmask.long 0x0 0.--31. 1. "CURRBUFAPTR,Application Receive Buffer Address Pointer" group.long 0x1160++0x7 line.long 0x0 "ETH_DMAC0SR,Channel 0 status register" rbitfld.long 0x0 19.--21. "REB,Rx DMA Error Bits" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 16.--18. "TEB,Tx DMA Error Bits" "0,1,2,3,4,5,6,7" bitfld.long 0x0 15. "NIS,Normal Interrupt Summary" "0,1" newline bitfld.long 0x0 14. "AIS,Abnormal Interrupt Summary" "0,1" bitfld.long 0x0 13. "CDE,Context Descriptor Error" "0,1" bitfld.long 0x0 12. "FBE,Fatal Bus Error" "0,1" newline bitfld.long 0x0 11. "ERI,Early Receive Interrupt" "0,1" bitfld.long 0x0 10. "ETI,Early Transmit Interrupt" "0,1" bitfld.long 0x0 9. "RWT,Receive Watchdog Timeout" "0,1" newline bitfld.long 0x0 8. "RPS,Receive Process Stopped" "0,1" bitfld.long 0x0 7. "RBU,Receive Buffer Unavailable" "0,1" bitfld.long 0x0 6. "RI,Receive Interrupt" "0,1" newline bitfld.long 0x0 2. "TBU,Transmit Buffer Unavailable" "0,1" bitfld.long 0x0 1. "TPS,Transmit Process Stopped" "0,1" bitfld.long 0x0 0. "TI,Transmit Interrupt" "0,1" line.long 0x4 "ETH_DMAC0MFCR,Channel 0 missed frame count register" bitfld.long 0x4 15. "MFCO,Overflow status of the MFC Counter" "0,1" hexmask.long.word 0x4 0.--10. 1. "MFC,Dropped Packet Counters" group.long 0x1180++0xB line.long 0x0 "ETH_DMAC1CR,Channel 1 control register" bitfld.long 0x0 18.--20. "DSL,Descriptor Skip Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "PBLX8,8xPBL mode" "0,1" hexmask.long.word 0x0 0.--13. 1. "MSS,Maximum Segment Size" line.long 0x4 "ETH_DMAC1TXCR,Channel 1 transmit control register" bitfld.long 0x4 30. "TFSEL1,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 29. "TFSEL0,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 28. "EDSE,Enhanced Descriptor Enable" "0,1" newline hexmask.long.byte 0x4 24.--27. 1. "TQOS,Transmit QOS" hexmask.long.byte 0x4 16.--21. 1. "TXPBL,Transmit Programmable Burst Length" bitfld.long 0x4 15. "IPBL,Ignore PBL Requirement" "0,1" newline bitfld.long 0x4 12. "TSE,TCP Segmentation Enabled" "0,1" bitfld.long 0x4 4. "OSF,Operate on Second Packet" "0,1" rbitfld.long 0x4 1.--3. "TCW,Transmit Channel Weight" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0. "ST,Start or Stop Transmission Command" "0,1" line.long 0x8 "ETH_DMAC1RXCR,Channel 1 receive control register" bitfld.long 0x8 31. "RPF,DMA Rx Channel x Packet Flush" "0,1" hexmask.long.byte 0x8 24.--27. 1. "RQOS,Rx AXI4 QOS." hexmask.long.byte 0x8 16.--21. 1. "RXPBL,Receive Programmable Burst Length" newline hexmask.long.word 0x8 1.--14. 1. "RBSZ,Receive Buffer size" bitfld.long 0x8 0. "SR,Start or Stop Receive" "0,1" group.long 0x1194++0x3 line.long 0x0 "ETH_DMAC1TXDLAR,Channel 1 T1 descriptor list address register" hexmask.long 0x0 0.--31. 1. "TDESLA,Start of Transmit List" group.long 0x119C++0x7 line.long 0x0 "ETH_DMAC1RXDLAR,Channel 1 R1 descriptor list address register" hexmask.long 0x0 0.--31. 1. "RDESLA,Start of Receive List" line.long 0x4 "ETH_DMAC1TXDTPR,Channel 1 T1 descriptor tail pointer register" hexmask.long 0x4 0.--31. 1. "TDT,Transmit Descriptor Tail Pointer" group.long 0x11A8++0x17 line.long 0x0 "ETH_DMAC1RXDTPR,Channel 1 R1 descriptor tail pointer register" hexmask.long 0x0 0.--31. 1. "RDT,Receive Descriptor Tail Pointer" line.long 0x4 "ETH_DMAC1TXRLR,Channel 1 T1 descriptor ring length register" hexmask.long.word 0x4 0.--9. 1. "TDRL,Transmit Descriptor Ring Length" line.long 0x8 "ETH_DMAC1RXRLR,Channel 1 R1 descriptor ring length register" hexmask.long.byte 0x8 17.--23. 1. "ARBS,Alternate Receive Buffer Size" hexmask.long.word 0x8 0.--9. 1. "RDRL,Receive Descriptor Ring Length" line.long 0xC "ETH_DMAC1IER,Channel 1 interrupt enable register" bitfld.long 0xC 15. "NIE,Normal Interrupt Summary Enable" "0,1" bitfld.long 0xC 14. "AIE,Abnormal Interrupt Summary Enable" "0,1" bitfld.long 0xC 13. "CDEE,Context Descriptor Error Enable" "0,1" newline bitfld.long 0xC 12. "FBEE,Fatal Bus Error Enable" "0,1" bitfld.long 0xC 11. "ERIE,Early Receive Interrupt Enable" "0,1" bitfld.long 0xC 10. "ETIE,Early Transmit Interrupt Enable" "0,1" newline bitfld.long 0xC 9. "RWTE,Receive Watchdog Timeout Enable" "0,1" bitfld.long 0xC 8. "RSE,Receive Stopped Enable" "0,1" bitfld.long 0xC 7. "RBUE,Receive Buffer Unavailable Enable" "0,1" newline bitfld.long 0xC 6. "RIE,Receive Interrupt Enable" "0,1" bitfld.long 0xC 2. "TBUE,Transmit Buffer Unavailable Enable" "0,1" bitfld.long 0xC 1. "TXSE,Transmit Stopped Enable" "0,1" newline bitfld.long 0xC 0. "TIE,Transmit Interrupt Enable" "0,1" line.long 0x10 "ETH_DMAC1RXIWTR,Channel 1 R1 interrupt watchdog timer register" bitfld.long 0x10 16.--17. "RWTU,Receive Interrupt Watchdog Timer Count Units" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x10 0.--7. 1. "RWT,Receive Interrupt Watchdog Timer Count" line.long 0x14 "ETH_DMAC1SFCSR,Channel 1 slot function control status register" hexmask.long.byte 0x14 16.--19. 1. "RSN,Reference Slot Number" hexmask.long.word 0x14 4.--15. 1. "SIV,Slot Interval Value" bitfld.long 0x14 1. "ASC,Advance Slot Check" "0,1" newline bitfld.long 0x14 0. "ESC,Enable Slot Comparison" "0,1" rgroup.long 0x11C4++0x3 line.long 0x0 "ETH_DMAC1CATXDR,Channel 1 current application transmit descriptor register" hexmask.long 0x0 0.--31. 1. "CURTDESAPTR,Application Transmit Descriptor Address Pointer" rgroup.long 0x11CC++0x3 line.long 0x0 "ETH_DMAC1CARXDR,Channel 1 current application receive descriptor register" hexmask.long 0x0 0.--31. 1. "CURRDESAPTR,Application Receive Descriptor Address Pointer" rgroup.long 0x11D4++0x3 line.long 0x0 "ETH_DMAC1CATXBR,Channel 1 current application transmit buffer register" hexmask.long 0x0 0.--31. 1. "CURTBUFAPTR,Application Transmit Buffer Address Pointer" rgroup.long 0x11DC++0x3 line.long 0x0 "ETH_DMAC1CARXBR,Channel 1 current application receive buffer register" hexmask.long 0x0 0.--31. 1. "CURRBUFAPTR,Application Receive Buffer Address Pointer" group.long 0x11E0++0x7 line.long 0x0 "ETH_DMAC1SR,Channel 1 status register" rbitfld.long 0x0 19.--21. "REB,Rx DMA Error Bits" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 16.--18. "TEB,Tx DMA Error Bits" "0,1,2,3,4,5,6,7" bitfld.long 0x0 15. "NIS,Normal Interrupt Summary" "0,1" newline bitfld.long 0x0 14. "AIS,Abnormal Interrupt Summary" "0,1" bitfld.long 0x0 13. "CDE,Context Descriptor Error" "0,1" bitfld.long 0x0 12. "FBE,Fatal Bus Error" "0,1" newline bitfld.long 0x0 11. "ERI,Early Receive Interrupt" "0,1" bitfld.long 0x0 10. "ETI,Early Transmit Interrupt" "0,1" bitfld.long 0x0 9. "RWT,Receive Watchdog Timeout" "0,1" newline bitfld.long 0x0 8. "RPS,Receive Process Stopped" "0,1" bitfld.long 0x0 7. "RBU,Receive Buffer Unavailable" "0,1" bitfld.long 0x0 6. "RI,Receive Interrupt" "0,1" newline bitfld.long 0x0 2. "TBU,Transmit Buffer Unavailable" "0,1" bitfld.long 0x0 1. "TPS,Transmit Process Stopped" "0,1" bitfld.long 0x0 0. "TI,Transmit Interrupt" "0,1" line.long 0x4 "ETH_DMAC1MFCR,Channel 1 missed frame count register" bitfld.long 0x4 15. "MFCO,Overflow status of the MFC Counter" "0,1" hexmask.long.word 0x4 0.--10. 1. "MFC,Dropped Packet Counters" group.long 0x1200++0x7 line.long 0x0 "ETH_DMAC2CR,Channel 2 control register" bitfld.long 0x0 18.--20. "DSL,Descriptor Skip Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "PBLX8,8xPBL mode" "0,1" hexmask.long.word 0x0 0.--13. 1. "MSS,Maximum Segment Size" line.long 0x4 "ETH_DMAC2TXCR,Channel 2 transmit control register" bitfld.long 0x4 30. "TFSEL1,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 29. "TFSEL0,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 28. "EDSE,Enhanced Descriptor Enable" "0,1" newline hexmask.long.byte 0x4 24.--27. 1. "TQOS,Transmit QOS" hexmask.long.byte 0x4 16.--21. 1. "TXPBL,Transmit Programmable Burst Length" bitfld.long 0x4 15. "IPBL,Ignore PBL Requirement" "0,1" newline bitfld.long 0x4 12. "TSE,TCP Segmentation Enabled" "0,1" bitfld.long 0x4 4. "OSF,Operate on Second Packet" "0,1" rbitfld.long 0x4 1.--3. "TCW,Transmit Channel Weight" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0. "ST,Start or Stop Transmission Command" "0,1" group.long 0x1214++0x3 line.long 0x0 "ETH_DMAC2TXDLAR,Channel 2 T2 descriptor list address register" hexmask.long 0x0 0.--31. 1. "TDESLA,Start of Transmit List" group.long 0x1220++0x3 line.long 0x0 "ETH_DMAC2TXDTPR,Channel 2 T2 descriptor tail pointer register" hexmask.long 0x0 0.--31. 1. "TDT,Transmit Descriptor Tail Pointer" group.long 0x122C++0x3 line.long 0x0 "ETH_DMAC2TXRLR,Channel 2 T2 descriptor ring length register" hexmask.long.word 0x0 0.--9. 1. "TDRL,Transmit Descriptor Ring Length" group.long 0x1234++0x3 line.long 0x0 "ETH_DMAC2IER,Channel 2 interrupt enable register" bitfld.long 0x0 15. "NIE,Normal Interrupt Summary Enable" "0,1" bitfld.long 0x0 14. "AIE,Abnormal Interrupt Summary Enable" "0,1" bitfld.long 0x0 13. "CDEE,Context Descriptor Error Enable" "0,1" newline bitfld.long 0x0 12. "FBEE,Fatal Bus Error Enable" "0,1" bitfld.long 0x0 11. "ERIE,Early Receive Interrupt Enable" "0,1" bitfld.long 0x0 10. "ETIE,Early Transmit Interrupt Enable" "0,1" newline bitfld.long 0x0 9. "RWTE,Receive Watchdog Timeout Enable" "0,1" bitfld.long 0x0 8. "RSE,Receive Stopped Enable" "0,1" bitfld.long 0x0 7. "RBUE,Receive Buffer Unavailable Enable" "0,1" newline bitfld.long 0x0 6. "RIE,Receive Interrupt Enable" "0,1" bitfld.long 0x0 2. "TBUE,Transmit Buffer Unavailable Enable" "0,1" bitfld.long 0x0 1. "TXSE,Transmit Stopped Enable" "0,1" newline bitfld.long 0x0 0. "TIE,Transmit Interrupt Enable" "0,1" group.long 0x123C++0x3 line.long 0x0 "ETH_DMAC2SFCSR,Channel 2 slot function control status register" hexmask.long.byte 0x0 16.--19. 1. "RSN,Reference Slot Number" hexmask.long.word 0x0 4.--15. 1. "SIV,Slot Interval Value" bitfld.long 0x0 1. "ASC,Advance Slot Check" "0,1" newline bitfld.long 0x0 0. "ESC,Enable Slot Comparison" "0,1" rgroup.long 0x1244++0x3 line.long 0x0 "ETH_DMAC2CATXDR,Channel 2 current application transmit descriptor register" hexmask.long 0x0 0.--31. 1. "CURTDESAPTR,Application Transmit Descriptor Address Pointer" rgroup.long 0x1254++0x3 line.long 0x0 "ETH_DMAC2CATXBR,Channel 2 current application transmit buffer register" hexmask.long 0x0 0.--31. 1. "CURTBUFAPTR,Application Transmit Buffer Address Pointer" group.long 0x1260++0x3 line.long 0x0 "ETH_DMAC2SR,Channel 2 status register" rbitfld.long 0x0 19.--21. "REB,Rx DMA Error Bits" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 16.--18. "TEB,Tx DMA Error Bits" "0,1,2,3,4,5,6,7" bitfld.long 0x0 15. "NIS,Normal Interrupt Summary" "0,1" newline bitfld.long 0x0 14. "AIS,Abnormal Interrupt Summary" "0,1" bitfld.long 0x0 13. "CDE,Context Descriptor Error" "0,1" bitfld.long 0x0 12. "FBE,Fatal Bus Error" "0,1" newline bitfld.long 0x0 11. "ERI,Early Receive Interrupt" "0,1" bitfld.long 0x0 10. "ETI,Early Transmit Interrupt" "0,1" bitfld.long 0x0 9. "RWT,Receive Watchdog Timeout" "0,1" newline bitfld.long 0x0 8. "RPS,Receive Process Stopped" "0,1" bitfld.long 0x0 7. "RBU,Receive Buffer Unavailable" "0,1" bitfld.long 0x0 6. "RI,Receive Interrupt" "0,1" newline bitfld.long 0x0 2. "TBU,Transmit Buffer Unavailable" "0,1" bitfld.long 0x0 1. "TPS,Transmit Process Stopped" "0,1" bitfld.long 0x0 0. "TI,Transmit Interrupt" "0,1" group.long 0x1280++0x7 line.long 0x0 "ETH_DMAC3CR,Channel 3 control register" bitfld.long 0x0 18.--20. "DSL,Descriptor Skip Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "PBLX8,8xPBL mode" "0,1" hexmask.long.word 0x0 0.--13. 1. "MSS,Maximum Segment Size" line.long 0x4 "ETH_DMAC3TXCR,Channel 3 transmit control register" bitfld.long 0x4 30. "TFSEL1,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 29. "TFSEL0,TBS Fetch Select" "B_0x0,B_0x1" bitfld.long 0x4 28. "EDSE,Enhanced Descriptor Enable" "0,1" newline hexmask.long.byte 0x4 24.--27. 1. "TQOS,Transmit QOS" hexmask.long.byte 0x4 16.--21. 1. "TXPBL,Transmit Programmable Burst Length" bitfld.long 0x4 15. "IPBL,Ignore PBL Requirement" "0,1" newline bitfld.long 0x4 12. "TSE,TCP Segmentation Enabled" "0,1" bitfld.long 0x4 4. "OSF,Operate on Second Packet" "0,1" rbitfld.long 0x4 1.--3. "TCW,Transmit Channel Weight" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0. "ST,Start or Stop Transmission Command" "0,1" group.long 0x1294++0x3 line.long 0x0 "ETH_DMAC3TXDLAR,Channel 3 T3 descriptor list address register" hexmask.long 0x0 0.--31. 1. "TDESLA,Start of Transmit List" group.long 0x12A0++0x3 line.long 0x0 "ETH_DMAC3TXDTPR,Channel 3 T3 descriptor tail pointer register" hexmask.long 0x0 0.--31. 1. "TDT,Transmit Descriptor Tail Pointer" group.long 0x12AC++0x3 line.long 0x0 "ETH_DMAC3TXRLR,Channel 3 T3 descriptor ring length register" hexmask.long.word 0x0 0.--9. 1. "TDRL,Transmit Descriptor Ring Length" group.long 0x12B4++0x3 line.long 0x0 "ETH_DMAC3IER,Channel 3 interrupt enable register" bitfld.long 0x0 15. "NIE,Normal Interrupt Summary Enable" "0,1" bitfld.long 0x0 14. "AIE,Abnormal Interrupt Summary Enable" "0,1" bitfld.long 0x0 13. "CDEE,Context Descriptor Error Enable" "0,1" newline bitfld.long 0x0 12. "FBEE,Fatal Bus Error Enable" "0,1" bitfld.long 0x0 11. "ERIE,Early Receive Interrupt Enable" "0,1" bitfld.long 0x0 10. "ETIE,Early Transmit Interrupt Enable" "0,1" newline bitfld.long 0x0 9. "RWTE,Receive Watchdog Timeout Enable" "0,1" bitfld.long 0x0 8. "RSE,Receive Stopped Enable" "0,1" bitfld.long 0x0 7. "RBUE,Receive Buffer Unavailable Enable" "0,1" newline bitfld.long 0x0 6. "RIE,Receive Interrupt Enable" "0,1" bitfld.long 0x0 2. "TBUE,Transmit Buffer Unavailable Enable" "0,1" bitfld.long 0x0 1. "TXSE,Transmit Stopped Enable" "0,1" newline bitfld.long 0x0 0. "TIE,Transmit Interrupt Enable" "0,1" group.long 0x12BC++0x3 line.long 0x0 "ETH_DMAC3SFCSR,Channel 3 slot function control status register" hexmask.long.byte 0x0 16.--19. 1. "RSN,Reference Slot Number" hexmask.long.word 0x0 4.--15. 1. "SIV,Slot Interval Value" bitfld.long 0x0 1. "ASC,Advance Slot Check" "0,1" newline bitfld.long 0x0 0. "ESC,Enable Slot Comparison" "0,1" rgroup.long 0x12C4++0x3 line.long 0x0 "ETH_DMAC3CATXDR,Channel 3 current application transmit descriptor register" hexmask.long 0x0 0.--31. 1. "CURTDESAPTR,Application Transmit Descriptor Address Pointer" rgroup.long 0x12D4++0x3 line.long 0x0 "ETH_DMAC3CATXBR,Channel 3 current application transmit buffer register" hexmask.long 0x0 0.--31. 1. "CURTBUFAPTR,Application Transmit Buffer Address Pointer" group.long 0x12E0++0x3 line.long 0x0 "ETH_DMAC3SR,Channel 3 status register" rbitfld.long 0x0 19.--21. "REB,Rx DMA Error Bits" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 16.--18. "TEB,Tx DMA Error Bits" "0,1,2,3,4,5,6,7" bitfld.long 0x0 15. "NIS,Normal Interrupt Summary" "0,1" newline bitfld.long 0x0 14. "AIS,Abnormal Interrupt Summary" "0,1" bitfld.long 0x0 13. "CDE,Context Descriptor Error" "0,1" bitfld.long 0x0 12. "FBE,Fatal Bus Error" "0,1" newline bitfld.long 0x0 11. "ERI,Early Receive Interrupt" "0,1" bitfld.long 0x0 10. "ETI,Early Transmit Interrupt" "0,1" bitfld.long 0x0 9. "RWT,Receive Watchdog Timeout" "0,1" newline bitfld.long 0x0 8. "RPS,Receive Process Stopped" "0,1" bitfld.long 0x0 7. "RBU,Receive Buffer Unavailable" "0,1" bitfld.long 0x0 6. "RI,Receive Interrupt" "0,1" newline bitfld.long 0x0 2. "TBU,Transmit Buffer Unavailable" "0,1" bitfld.long 0x0 1. "TPS,Transmit Process Stopped" "0,1" bitfld.long 0x0 0. "TI,Transmit Interrupt" "0,1" tree.end tree.end tree "ETHSW (Ethernet Switch)" tree "ETHSW" base ad:0x4C000000 rgroup.long 0x0++0xB line.long 0x0 "ETHSW_AC_DEV_IDR,ETHSW AC device ID register" hexmask.long.word 0x0 8.--23. 1. "DEVICE_ID,Device ID" line.long 0x4 "ETHSW_AC_INT_IDR,ETHSW AC int ID register" hexmask.long 0x4 0.--31. 1. "INT_ID,IP core version" line.long 0x8 "ETHSW_AC_REV_IDR,ETHSW AC revision ID register" hexmask.long.word 0x8 16.--31. 1. "REV_ID_MAJOR,Revision ID major number" hexmask.long.word 0x8 0.--15. 1. "REV_ID_MINOR,Revision ID minor number" rgroup.word 0x1000++0x3 line.word 0x0 "ETHSW_AC_IF0_IDR,ETHSW AC interface 0 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF0_VERR,ETHSW AC interface 0 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1004++0xB line.long 0x0 "ETHSW_AC_IF0_BASER,ETHSW AC interface 0 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF0_LENR,ETHSW AC interface 0 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF0_PORTR,ETHSW AC interface 0 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x1010++0x3 line.word 0x0 "ETHSW_AC_IF1_IDR,ETHSW AC interface 1 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF1_VERR,ETHSW AC interface 1 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1014++0xB line.long 0x0 "ETHSW_AC_IF1_BASER,ETHSW AC interface 1 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF1_LENR,ETHSW AC interface 1 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF1_PORTR,ETHSW AC interface 1 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x1020++0x3 line.word 0x0 "ETHSW_AC_IF2_IDR,ETHSW AC interface 2 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF2_VERR,ETHSW AC interface 2 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1024++0xB line.long 0x0 "ETHSW_AC_IF2_BASER,ETHSW AC interface 2 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF2_LENR,ETHSW AC interface 2 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF2_PORTR,ETHSW AC interface 2 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x1030++0x3 line.word 0x0 "ETHSW_AC_IF3_IDR,ETHSW AC interface 3 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF3_VERR,ETHSW AC interface 3 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1034++0xB line.long 0x0 "ETHSW_AC_IF3_BASER,ETHSW AC interface 3 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF3_LENR,ETHSW AC interface 3 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF3_PORTR,ETHSW AC interface 3 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x1040++0x3 line.word 0x0 "ETHSW_AC_IF4_IDR,ETHSW AC interface 4 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF4_VERR,ETHSW AC interface 4 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1044++0xB line.long 0x0 "ETHSW_AC_IF4_BASER,ETHSW AC interface 4 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF4_LENR,ETHSW AC interface 4 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF4_PORTR,ETHSW AC interface 4 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x1050++0x3 line.word 0x0 "ETHSW_AC_IF5_IDR,ETHSW AC interface 5 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF5_VERR,ETHSW AC interface 5 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1054++0xB line.long 0x0 "ETHSW_AC_IF5_BASER,ETHSW AC interface 5 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF5_LENR,ETHSW AC interface 5 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF5_PORTR,ETHSW AC interface 5 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x1060++0x3 line.word 0x0 "ETHSW_AC_IF6_IDR,ETHSW AC interface 6 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF6_VERR,ETHSW AC interface 6 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1064++0xB line.long 0x0 "ETHSW_AC_IF6_BASER,ETHSW AC interface 6 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF6_LENR,ETHSW AC interface 6 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF6_PORTR,ETHSW AC interface 6 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x1070++0x3 line.word 0x0 "ETHSW_AC_IF7_IDR,ETHSW AC interface 7 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF7_VERR,ETHSW AC interface 7 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1074++0xB line.long 0x0 "ETHSW_AC_IF7_BASER,ETHSW AC interface 7 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF7_LENR,ETHSW AC interface 7 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF7_PORTR,ETHSW AC interface 7 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x1080++0x3 line.word 0x0 "ETHSW_AC_IF8_IDR,ETHSW AC interface 8 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF8_VERR,ETHSW AC interface 8 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1084++0xB line.long 0x0 "ETHSW_AC_IF8_BASER,ETHSW AC interface 8 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF8_LENR,ETHSW AC interface 8 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF8_PORTR,ETHSW AC interface 8 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x1090++0x3 line.word 0x0 "ETHSW_AC_IF9_IDR,ETHSW AC interface 9 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF9_VERR,ETHSW AC interface 9 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1094++0xB line.long 0x0 "ETHSW_AC_IF9_BASER,ETHSW AC interface 9 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF9_LENR,ETHSW AC interface 9 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF9_PORTR,ETHSW AC interface 9 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x10A0++0x3 line.word 0x0 "ETHSW_AC_IF10_IDR,ETHSW AC interface 10 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF10_VERR,ETHSW AC interface 10 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x10A4++0xB line.long 0x0 "ETHSW_AC_IF10_BASER,ETHSW AC interface 10 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF10_LENR,ETHSW AC interface 10 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF10_PORTR,ETHSW AC interface 10 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x10B0++0x3 line.word 0x0 "ETHSW_AC_IF11_IDR,ETHSW AC interface 11 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF11_VERR,ETHSW AC interface 11 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x10B4++0xB line.long 0x0 "ETHSW_AC_IF11_BASER,ETHSW AC interface 11 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF11_LENR,ETHSW AC interface 11 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF11_PORTR,ETHSW AC interface 11 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x10C0++0x3 line.word 0x0 "ETHSW_AC_IF12_IDR,ETHSW AC interface 12 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF12_VERR,ETHSW AC interface 12 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x10C4++0xB line.long 0x0 "ETHSW_AC_IF12_BASER,ETHSW AC interface 12 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF12_LENR,ETHSW AC interface 12 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF12_PORTR,ETHSW AC interface 12 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x10D0++0x3 line.word 0x0 "ETHSW_AC_IF13_IDR,ETHSW AC interface 13 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF13_VERR,ETHSW AC interface 13 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x10D4++0xB line.long 0x0 "ETHSW_AC_IF13_BASER,ETHSW AC interface 13 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF13_LENR,ETHSW AC interface 13 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF13_PORTR,ETHSW AC interface 13 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x10E0++0x1 line.word 0x0 "ETHSW_AC_EOTR,ETHSW AC end of table register" hexmask.word 0x0 0.--15. 1. "END_OF_TABLE,Static value 0x0 indicating end of table." rgroup.long 0x100000++0x7 line.long 0x0 "ETHSW_IBC_DEV_IDR,ETHSW IBC device ID register" hexmask.long.word 0x0 8.--23. 1. "DEVICE_ID,Device ID" line.long 0x4 "ETHSW_IBC_INT_IDR,ETHSW IBC IP core ID register" hexmask.long 0x4 0.--31. 1. "INT_ID,IP core version" group.word 0x101000++0x1 line.word 0x0 "ETHSW_IBC_GP_MUX_CTRLR,ETHSW IBC general-purpose multiplexer control register" bitfld.word 0x0 0. "GPMUX0,General-purpose (GP) multiplexer 0 control" "B_0x0,B_0x1" group.word 0x101100++0x1 line.word 0x0 "ETHSW_IBC_TIME_MUX_CTRLR,ETHSW IBC time interface mux demux control register" bitfld.word 0x0 0. "TIM_MUX0,Time interface (TI) mux/demux 0 control" "B_0x0,B_0x1" rgroup.word 0x102000++0x7 line.word 0x0 "ETHSW_IBC_GP_MUXESR,ETHSW IBC generic GP_MUXES register" bitfld.word 0x0 0.--1. "GPMUXES,The value of generic GP_MUXES" "0,1,2,3" line.word 0x2 "ETHSW_IBC_GP_MUX_DEFAULTR,ETHSW IBC generic GP_MUX_DEFAULT register" bitfld.word 0x2 0.--1. "GPMUXDEF,The value of Generic GP_MUX_DEFAULT" "0,1,2,3" line.word 0x4 "ETHSW_IBC_TIME_MUXESR,ETHSW IBC generic TIME_MUXES register" bitfld.word 0x4 0.--1. "TIME_MUX,The value of Generic TIME_MUXES" "0,1,2,3" line.word 0x6 "ETHSW_IBC_TIME_MUX_DEFAULTR,ETHSW IBC generic TIME_MUX_DEFAULT register" bitfld.word 0x6 0.--1. "TIM_MUXDEF,The value of Generic TIME_MUX_DEFAULT" "0,1,2,3" rgroup.word 0x102100++0x1 line.word 0x0 "ETHSW_IBC_AUTOCONFIG0R,ETHSW IBC generic AUTOCONFIG0 register" bitfld.word 0x0 2.--3. "TS_NUM,Number of Timestamper blocks (for example FPTS) in the system" "0,1,2,3" bitfld.word 0x0 0.--1. "RTC_NUM,Number of Real-Time Clock blocks (for example FRTC) in the system" "0,1,2,3" rgroup.word 0x102110++0x5 line.word 0x0 "ETHSW_IBC_AUTOCONFIG8R,ETHSW IBC generic AUTOCONFIG8 register" hexmask.word 0x0 0.--15. 1. "RTC_ADD,Bits (31:16) of the base address of the first Real-Time Clock block" line.word 0x2 "ETHSW_IBC_AUTOCONFIG9R,ETHSW IBC generic AUTOCONFIG9 register" hexmask.word 0x2 0.--15. 1. "RTC_ADD,Bits (31:16) of the base address of the second real-time clock block" line.word 0x4 "ETHSW_IBC_AUTOCONFIG10R,ETHSW IBC generic AUTOCONFIG10 register" hexmask.word 0x4 0.--15. 1. "RTC_ADD,Bits (31:16) of the base address of the third real-time clock block" rgroup.word 0x102118++0x5 line.word 0x0 "ETHSW_IBC_AUTOCONFIG12R,ETHSW IBC generic AUTOCONFIG12 register" hexmask.word 0x0 0.--15. 1. "TS_ADD,Bits (31:16) of the base address of the first timestamper (TS) block" line.word 0x2 "ETHSW_IBC_AUTOCONFIG13R,ETHSW IBC generic AUTOCONFIG13 register" hexmask.word 0x2 0.--15. 1. "TS_ADD,Bits (31:16) of the base address of the second timestamper (TS) block" line.word 0x4 "ETHSW_IBC_AUTOCONFIG14R,ETHSW IBC generic AUTOCONFIG14 register" hexmask.word 0x4 0.--15. 1. "TS_ADD,Bits (31:16) of the base address of the third timestamper (TS) block" rgroup.long 0x120000++0x7 line.long 0x0 "ETHSW_FTPS_GL0R,ETHSW FTPS general register 0" hexmask.long.word 0x0 8.--23. 1. "DEVICE_ID,Device ID" line.long 0x4 "ETHSW_FTPS_GL1R,ETHSW FTPS general register 1" hexmask.long 0x4 0.--31. 1. "REV_ID,Revision ID" group.long 0x121000++0x3 line.long 0x0 "ETHSW_FTPS_TSCR,ETHSW FTPS timestamper control register" bitfld.long 0x0 0. "GET_TIMESTAMP,Get timestamp" "0,1" group.long 0x121008++0x3 line.long 0x0 "ETHSW_FTPS_TSIMR,ETHSW FTPS timestamper interrupt mask register" bitfld.long 0x0 0. "TIMESTAMP_IE,Timestamp interrupt enable" "0,1" group.long 0x121010++0x3 line.long 0x0 "ETHSW_FTPS_TSISR,ETHSW FTPS timestamper interrupt status register" bitfld.long 0x0 0. "TIMESTAMP_IS,Timestamp interrupt status" "0,1" rgroup.long 0x121100++0x13 line.long 0x0 "ETHSW_FTPS_TS_SNSR,ETHSW FTPS timestamp subnanosecond register" hexmask.long 0x0 0.--31. 1. "SUBNANOSECONDS,Subnanoseconds part of the time of the PPx event" line.long 0x4 "ETHSW_FTPS_TS_NSR,ETHSW FTPS timestamp nanosecond register" hexmask.long 0x4 0.--29. 1. "NANOSECONDS,Nanoseconds part of the time of the PPx event" line.long 0x8 "ETHSW_FTPS_TS_SLR,ETHSW FTPS timestamp second low register" hexmask.long 0x8 0.--31. 1. "SECONDS,Least significant seconds part of the time of the PPx event" line.long 0xC "ETHSW_FTPS_TS_SHR,ETHSW FTPS timestamp second high register" hexmask.long.word 0xC 0.--15. 1. "SECONDS,Most significant seconds part of the time of the PPx event" line.long 0x10 "ETHSW_FTPS_PCNTR,ETHSW FTPS pulse counter register" hexmask.long 0x10 0.--31. 1. "PCNT,Pulse counter" rgroup.long 0x1C0000++0x7 line.long 0x0 "ETHSW_FSC_DEV_IDR,ETHSW FSC device ID register" hexmask.long.word 0x0 8.--23. 1. "DEV_ID,Device ID" line.long 0x4 "ETHSW_FSC_INT_IDR,ETHSW FSC INT ID register" hexmask.long 0x4 0.--31. 1. "REV_ID,REV_ID" group.word 0x1C1000++0x1 line.word 0x0 "ETHSW_FSC_ROW_ACCESS_CMD0R,ETHSW FSC schedule table row access command register 0" bitfld.word 0x0 15. "TRANSFER,Triggers transfer between schedule table row and ROW_DATA registers" "0,1" bitfld.word 0x0 14. "READ_WRITE,Read/write" "B_0x0,B_0x1" rbitfld.word 0x0 13. "ACCESS_ERR,Access error." "B_0x0,B_0x1" newline bitfld.word 0x0 8. "TABLE,Schedule table." "B_0x0,B_0x1" hexmask.word.byte 0x0 0.--3. 1. "SCHEDULER,Scheduler" rgroup.word 0x1C1002++0x1 line.word 0x0 "ETHSW_FSC_ROW_ACCESS_CMD1R,ETHSW FSC schedule table row access command register 1" hexmask.word 0x0 0.--9. 1. "ROW_NUM,Row number" group.word 0x1C1010++0x1 line.word 0x0 "ETHSW_FSC_ROW_DATA0R,ETHSW FSC schedule table row data 0 register" hexmask.word 0x0 0.--8. 1. "OUTPUT_STATE,Output state for outputs 8 to 0." group.word 0x1C1018++0x1 line.word 0x0 "ETHSW_FSC_ROW_DATA4R,ETHSW FSC schedule table row data 4 register" hexmask.word 0x0 0.--15. 1. "TIME,Time in clock cycles" group.word 0x1C1100++0x3 line.word 0x0 "ETHSW_FSC_IMR,ETHSW FSC interrupt mask register" bitfld.word 0x0 0. "SCHTBL_IE,Schedule table interrupt enable" "0,1" line.word 0x2 "ETHSW_FSC_ISR,ETHSW FSC interrupt status register" bitfld.word 0x2 0. "SCHTBL_IS,Schedule table interrupt status" "0,1" rgroup.word 0x1C4000++0x7 line.word 0x0 "ETHSW_FSC_GEN_SCHR,ETHSW FSC generic scheduler register" hexmask.word 0x0 0.--15. 1. "SCHEDULERS,The value of generic SCHEDULERS" line.word 0x2 "ETHSW_FSC_GEN_OUTR,ETHSW FSC generic outputs register" hexmask.word.byte 0x2 0.--6. 1. "OUTPUTS,The value of generic OUTPUTS" line.word 0x4 "ETHSW_FSC_GEN_TBL_RWR,ETHSW FSC generic table rows register" hexmask.word.byte 0x4 0.--3. 1. "TABLE_ROWS,The value of generic TABLE_ROWS" line.word 0x6 "ETHSW_FSC_GEN_CLK_FRQR,ETHSW FSC generic clock frequency register" hexmask.word.byte 0x6 0.--7. 1. "CLK_FREQ,The value of generic CLK_FREQ" rgroup.long 0x800000++0x3 line.long 0x0 "ETHSW_FES_IPC_IDR,ETHSW FES IP core identification register" hexmask.long.tbyte 0x0 8.--31. 1. "DEV_ID,Device ID" rgroup.word 0x800004++0x7 line.word 0x0 "ETHSW_FES_CFG_IDR,ETHSW FES configuration ID register" hexmask.word 0x0 0.--15. 1. "CFG_ID,Configuration ID" line.word 0x2 "ETHSW_FES_REV_ID0R,ETHSW FES revision ID register 0" hexmask.word 0x2 0.--15. 1. "REV_ID0,Configuration revision ID 0" line.word 0x4 "ETHSW_FES_REV_ID1R,ETHSW FES revision ID register 1" hexmask.word 0x4 0.--15. 1. "REV_ID1,Body revision ID bit (15:0)" line.word 0x6 "ETHSW_FES_REV_ID2R,ETHSW FES revision ID register 2" hexmask.word 0x6 0.--15. 1. "REV_ID2,Body revision ID bit (31:16)" group.word 0x800010++0x5 line.word 0x0 "ETHSW_FES_GEN_CTRLR,ETHSW FES general control register" bitfld.word 0x0 15. "INIT_REQ,Init Request" "B_0x0,B_0x1" bitfld.word 0x0 14. "CLR_MAC_TAB,Clear Dynamic MAC address table" "0,1" bitfld.word 0x0 13. "CORR_DIS,Correction Disable" "B_0x0,B_0x1" newline bitfld.word 0x0 11.--12. "PTP_MOD,PTP Mode" "B_0x0,?,B_0x2,?" bitfld.word 0x0 10. "MOD_SYNCF,Modify Sync frames" "B_0x0,B_0x1" bitfld.word 0x0 9. "TIM_TRL,Time trailer" "B_0x0,B_0x1" newline bitfld.word 0x0 8. "POL_CFG,Policer configuration" "B_0x0,B_0x1" bitfld.word 0x0 4.--5. "MGMT_TRL_OFF,Management Trailer Offset" "B_0x0,B_0x1,?,?" bitfld.word 0x0 2.--3. "MGMT_TRL_LGTH,Management Trailer Length" "B_0x0,B_0x1,?,?" line.word 0x2 "ETHSW_FES_MT_CLEAR_MSKR,ETHSW FES dynamic MAC table clear mask register" bitfld.word 0x2 0.--2. "MAC_TAB_CLRM,MAC Table Clear Mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x4 "ETHSW_FES_MT_CLEAR_FIDR,ETHSW FES dynamic MAC table clear FID register" hexmask.word.byte 0x4 0.--5. 1. "FID,Filtering Identifier (FID)" group.word 0x800020++0x5 line.word 0x0 "ETHSW_FES_ADDRESS_AGING_CFGR,ETHSW FES address aging configuration register" hexmask.word.byte 0x0 0.--6. 1. "LIFE_TIME,Address Lifetime" line.word 0x2 "ETHSW_FES_AGING_BASE_TIMELR,ETHSW FES aging base time low register" hexmask.word 0x2 0.--15. 1. "BASE_TIMEL,Aging base time value bits (15:0)" line.word 0x4 "ETHSW_FES_AGING_BASE_TIMEHR,ETHSW FES aging base time high register" hexmask.word.byte 0x4 0.--7. 1. "BASE_TIMEH,Aging base time value bits (23:16)" group.word 0x800030++0x1 line.word 0x0 "ETHSW_FES_INT_MASK_CLR,ETHSW FES interrupt mask clear register" bitfld.word 0x0 3. "CONGESTED_IMC,Congested interrupt mask clear" "0,1" bitfld.word 0x0 2. "RX_ERROR_IMC,RX error interrupt mask clear" "0,1" bitfld.word 0x0 1. "RX_TIMESTAMP_IMC,RX timestamp interrupt mask clear" "0,1" newline bitfld.word 0x0 0. "TX_TIMESTAMP_IMC,TX timestamp interrupt mask clear" "0,1" group.word 0x800034++0x1 line.word 0x0 "ETHSW_FES_INT_MASK_SETR,ETHSW FES interrupt mask set register" bitfld.word 0x0 3. "CONGESTED_IE,Congested interrupt enable mask" "0,1" bitfld.word 0x0 2. "RX_ERROR_IE,RX error interrupt enable mask" "0,1" bitfld.word 0x0 1. "RX_TIMESTAMP_IE,RX timestamp interrupt enable mask" "0,1" newline bitfld.word 0x0 0. "TX_TIMESTAMP_IE,TX timestamp interrupt enable mask" "0,1" group.word 0x800038++0x1 line.word 0x0 "ETHSW_FES_INT_STATUSR,ETHSW FES interrupt status register" bitfld.word 0x0 3. "CONGESTED_IS,Congested interrupt status" "0,1" bitfld.word 0x0 2. "RX_ERROR_IS,RX error interrupt status" "0,1" bitfld.word 0x0 1. "RX_TIMESTAMP_IS,RX timestamp interrupt status" "0,1" newline bitfld.word 0x0 0. "TX_TIMESTAMP_IS,TX timestamp interrupt status" "0,1" group.word 0x800200++0x1 line.word 0x0 "ETHSW_FES_MAC_TABLE0R,ETHSW FES dynamic MAC table read 0 register" bitfld.word 0x0 15. "TRANSFER,Transfer" "0,1" hexmask.word.byte 0x0 0.--3. 1. "PORT_NUM,Port number" rgroup.word 0x800202++0x7 line.word 0x0 "ETHSW_FES_MAC_TABLE1R,ETHSW FES dynamic MAC table read 1 register" hexmask.word.byte 0x0 8.--15. 1. "OCTET_2,Dynamic MAC Address Table Read: 2less thansup>ndless than/sup> octet" hexmask.word.byte 0x0 0.--7. 1. "OCTET_1,Dynamic MAC Address Table Read: 1less thansup>stless than/sup> octet" line.word 0x2 "ETHSW_FES_MAC_TABLE2R,ETHSW FES dynamic MAC table read 2 register" hexmask.word.byte 0x2 8.--15. 1. "OCTET_4,Dynamic MAC Address Table Read: 4less thansup>thless than/sup> octet" hexmask.word.byte 0x2 0.--7. 1. "OCTET_3,Dynamic MAC Address Table Read: 3less thansup>rdless than/sup> octet" line.word 0x4 "ETHSW_FES_MAC_TABLE3R,ETHSW FES dynamic MAC table read 3 register" hexmask.word.byte 0x4 8.--15. 1. "OCTET_6,Dynamic MAC Address Table Read: 6less thansup>thless than/sup> octet" hexmask.word.byte 0x4 0.--7. 1. "OCTET_5,Dynamic MAC Address Table Read: 5less thansup>thless than/sup> octet" line.word 0x6 "ETHSW_FES_MAC_TABLE4R,ETHSW FES dynamic MAC table read 4 register" hexmask.word.byte 0x6 0.--5. 1. "FID,FID" group.word 0x800220++0x3 line.word 0x0 "ETHSW_FES_SMAC_CMDR,ETHSW FES static MAC address table R/W command register" bitfld.word 0x0 15. "TRANSFER,Transfer" "0,1" bitfld.word 0x0 14. "RD_WR,Read / write" "B_0x0,B_0x1" bitfld.word 0x0 12.--13. "COLUMN,Column" "0,1,2,3" newline hexmask.word 0x0 0.--11. 1. "ROW,Row" line.word 0x2 "ETHSW_FES_SMAC_CFGR,ETHSW FES static MAC address table configuration register" bitfld.word 0x2 6.--7. "ROW_COL3,Row selection setting for column 3" "0,1,2,3" bitfld.word 0x2 4.--5. "ROW_COL2,Row selection setting for column 2" "0,1,2,3" bitfld.word 0x2 2.--3. "ROW_COL1,Row selection setting for column1" "0,1,2,3" newline bitfld.word 0x2 0.--1. "ROW_COL0,Row selection setting for column 0" "B_0x0,B_0x1,?,?" group.word 0x800230++0xF line.word 0x0 "ETHSW_FES_SMAC_TABLE0R,ETHSW FES static MAC address table read/write 0 register" bitfld.word 0x0 15. "ENTRY_USAGE,Entry usage" "B_0x0,B_0x1" bitfld.word 0x0 13. "POLICER_PRIO,Policer priority" "B_0x0,B_0x1" bitfld.word 0x0 12. "MATCH_VLAN,Match VLAN" "B_0x0,B_0x1" newline bitfld.word 0x0 11. "MOD_PRIO,Modify Priority" "B_0x0,B_0x1" bitfld.word 0x0 8.--10. "FRAME_PRIO,Frame Priority" "0,1,2,3,4,5,6,7" bitfld.word 0x0 7. "STREAM_MATCH,Stream_number source/destination match" "B_0x0,B_0x1" line.word 0x2 "ETHSW_FES_SMAC_TABLE1R,ETHSW FES static MAC address table read/write 1 register" hexmask.word.byte 0x2 8.--15. 1. "OCTET_2,Static MAC Address Table Read: 2less thansup>ndless than/sup> octet" hexmask.word.byte 0x2 0.--7. 1. "OCTET_1,Static MAC Address Table Read: 1less thansup>stless than/sup> octet" line.word 0x4 "ETHSW_FES_SMAC_TABLE2R,ETHSW FES static MAC address table read/write 2 register" hexmask.word.byte 0x4 8.--15. 1. "OCTET_4,Static MAC Address Table Read: 4less thansup>thless than/sup> octet" hexmask.word.byte 0x4 0.--7. 1. "OCTET_3,Static MAC Address Table Read: 3less thansup>rdless than/sup> octet" line.word 0x6 "ETHSW_FES_SMAC_TABLE3R,ETHSW FES static MAC address table read/write 3 register" hexmask.word.byte 0x6 8.--15. 1. "OCTET_6,Static MAC Address Table Read: 6less thansup>thless than/sup> octet" hexmask.word.byte 0x6 0.--7. 1. "OCTET_5,Static MAC Address Table Read: 5less thansup>thless than/sup> octet" line.word 0x8 "ETHSW_FES_SMAC_TABLE4R,ETHSW FES static MAC address table read/write 4 register" bitfld.word 0x8 0.--2. "FWD_PORT_MSK,Forward Port Mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0xA "ETHSW_FES_SMAC_TABLE5R,ETHSW FES static MAC address table read/write 5 register" bitfld.word 0xA 0.--2. "POLICER_PORTS,Policed Ports" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0xC "ETHSW_FES_SMAC_TABLE6R,ETHSW FES static MAC address table read/write 6 register" hexmask.word 0xC 0.--11. 1. "POLICER_NUM,Policer Number" line.word 0xE "ETHSW_FES_SMAC_TABLE7R,ETHSW FES static MAC address table read/write 7 register" hexmask.word 0xE 0.--11. 1. "VLAN,VLAN" group.word 0x800300++0x1 line.word 0x0 "ETHSW_FES_SEQ_REC_CMDR,ETHSW FES sequence recovery table R/W command register" bitfld.word 0x0 15. "TRANSFER,Transfer" "0,1" bitfld.word 0x0 14. "RD_WR,Read / write" "B_0x0,B_0x1" hexmask.word 0x0 0.--9. 1. "ROW,Row" group.word 0x800318++0x1 line.word 0x0 "ETHSW_FES_SEQ_REC_TABLE4R,ETHSW FES sequence recovery table read/write 4 register" bitfld.word 0x0 14.--15. "AGING_SCALE,Aging rate scale" "0,1,2,3" bitfld.word 0x0 12.--13. "AGING_BRATE,Aging basic rate" "0,1,2,3" bitfld.word 0x0 7. "ACC_NVAL_SEQ,Accept non valid sequence" "B_0x0,B_0x1" newline bitfld.word 0x0 6. "IND_REC,Individual recovery" "B_0x0,B_0x1" bitfld.word 0x0 5. "ALGORITHM,Algorithm" "B_0x0,B_0x1" hexmask.word.byte 0x0 0.--4. 1. "HIST_LENGTH,History Length - 1" group.word 0x800380++0x1 line.word 0x0 "ETHSW_FES_SEQ_GEN_CMDR,ETHSW FES sequence generation command register" bitfld.word 0x0 13. "RESET,Reset" "B_0x0,B_0x1" hexmask.word 0x0 0.--9. 1. "ENTITY,Entity" group.word 0x800400++0x1 line.word 0x0 "ETHSW_FES_STREAM_CMDR,ETHSW FES stream table R/W command register" bitfld.word 0x0 15. "TRANSFER,Transfer" "0,1" bitfld.word 0x0 14. "RD_WR,Read / write" "B_0x0,B_0x1" hexmask.word 0x0 0.--9. 1. "ROW,Row" group.word 0x800410++0x7 line.word 0x0 "ETHSW_FES_STREAM_TABLE0R,ETHSW FES stream table read/write 0 register" bitfld.word 0x0 0.--2. "RMV_RTAG,Remove R-TAGging input port vector" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x2 "ETHSW_FES_STREAM_TABLE1R,ETHSW FES stream table read/write 1 register" bitfld.word 0x2 0.--2. "ADD_RTAG,Add R-TAGging output port vector" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x4 "ETHSW_FES_STREAM_TABLE2R,ETHSW FES stream table read/write 2 register" bitfld.word 0x4 15. "FRER_SEQ_GEN,FRER sequence generation enable" "B_0x0,B_0x1" hexmask.word 0x4 0.--11. 1. "FRER_GEN_TAB_ROW,FRER sequence generation table row" line.word 0x6 "ETHSW_FES_STREAM_TABLE3R,ETHSW FES stream table read/write 3 register" bitfld.word 0x6 15. "FRER_SEQ_REC,FRER sequence recovery enable" "B_0x0,B_0x1" hexmask.word 0x6 0.--11. 1. "FRER_REC_TAB_ROW,FRER sequence recovery table row" group.word 0x800600++0x1 line.word 0x0 "ETHSW_FES_POLICER_CMDR,ETHSW FES policer read/write command register" bitfld.word 0x0 15. "TRANSFER,Transfer" "0,1" bitfld.word 0x0 14. "RD_WR,Read / write" "B_0x0,B_0x1" hexmask.word 0x0 0.--11. 1. "POLICER_NUM,Policer Number" group.word 0x800610++0x9 line.word 0x0 "ETHSW_FES_POLICER0R,ETHSW FES policer read/write 0 register" hexmask.word 0x0 0.--15. 1. "LIMIT,Limit" line.word 0x2 "ETHSW_FES_POLICER1R,ETHSW FES policer read/write 1 register" bitfld.word 0x2 8.--10. "RATE_SCALE,Rate Scale of Meter 0 (the meter for green)" "0,1,2,3,4,5,6,7" hexmask.word.byte 0x2 0.--7. 1. "BASIC_RATE,Basic Rate of Meter 0 (the meter for green)" line.word 0x4 "ETHSW_FES_POLICER2R,ETHSW FES policer read/write 2 register" hexmask.word 0x4 0.--15. 1. "LIMIT,Limit" line.word 0x6 "ETHSW_FES_POLICER3R,ETHSW FES policer read/write 3 register" bitfld.word 0x6 8.--10. "RATE_SCALE,Rate Scale of Meter 1 (the meter for yellow / red)" "0,1,2,3,4,5,6,7" hexmask.word.byte 0x6 0.--7. 1. "BASIC_RATE,Basic Rate of Meter 1 (the meter for yellow / red)" line.word 0x8 "ETHSW_FES_POLICER4R,ETHSW FES policer read/write 4 register" bitfld.word 0x8 4. "DROP_YELLOW,Drop on Yellow" "B_0x0,B_0x1" bitfld.word 0x8 3. "MARK_ALL_RED,Mark all Frames Red" "0,1" bitfld.word 0x8 2. "MARK_ALL_RED_EN,Mark all Frames Red Enable" "B_0x0,B_0x1" newline bitfld.word 0x8 1. "COUPLING_FLAG,Coupling Flag" "B_0x0,B_0x1" bitfld.word 0x8 0. "COLOR_BLIND,Color Blind" "B_0x0,B_0x1" group.word 0x802000++0x1 line.word 0x0 "ETHSW_FES_TS_CMDR,ETHSW FES timestamp command register" bitfld.word 0x0 14. "TRANSFER,Transfer" "0,1" rbitfld.word 0x0 13. "ERROR,Error" "B_0x0,B_0x1" bitfld.word 0x0 4. "TX_RX,TX / RX" "B_0x0,B_0x1" newline hexmask.word.byte 0x0 0.--3. 1. "PORT_NUM,Port Number" rgroup.word 0x802008++0xB line.word 0x0 "ETHSW_FES_TS_TIME_LOR,ETHSW FES timestamp time low register" hexmask.word 0x0 0.--15. 1. "NANOSECONDS,Nanoseconds bits (15:0)" line.word 0x2 "ETHSW_FES_TS_TIME_HIR,ETHSW FES timestamp time high register" bitfld.word 0x2 14.--15. "SECONDS,Seconds bits (0:1)" "0,1,2,3" hexmask.word 0x2 0.--13. 1. "NANOSECONDS,Nanoseconds bits (29:16)" line.word 0x4 "ETHSW_FES_TS_MSG_0R,ETHSW FES timestamp PTP message 0 register" hexmask.word.byte 0x4 8.--15. 1. "DOMAIN_NUM,Domain number" hexmask.word.byte 0x4 4.--7. 1. "TRANSP_SPEC,Transport specific" hexmask.word.byte 0x4 0.--3. 1. "MSG_TYPE,Message type" line.word 0x6 "ETHSW_FES_TS_MSG_1R,ETHSW FES timestamp PTP message 1 register" hexmask.word 0x6 0.--15. 1. "SEQUENCE_ID,Sequence ID" line.word 0x8 "ETHSW_FES_TS_RX_STATUSR,ETHSW FES timestamp status port vector RX register" bitfld.word 0x8 1.--2. "TS_STATUS_IN,Timestamp status input port vector" "B_0x0,B_0x1,?,?" line.word 0xA "ETHSW_FES_TS_TX_STATUSR,ETHSW FES timestamp status port vector TX register" bitfld.word 0xA 1.--2. "TS_STATUS_OUT,Timestamp status output port vector" "B_0x0,B_0x1,?,?" group.word 0x808000++0x1 line.word 0x0 "ETHSW_FES_VLAN_CMDR,ETHSW FES VLAN command register" bitfld.word 0x0 15. "TRSFR_VLAN_FID,Transfer VLAN_FID" "B_0x0,B_0x1" bitfld.word 0x0 14. "TRSFR_VLAN_TAG,Transfer VLAN_TAG" "B_0x0,B_0x1" bitfld.word 0x0 13. "TRSFR_VLAN_PORTS,Transfer VLAN_PORTS" "B_0x0,B_0x1" newline bitfld.word 0x0 12. "RD_WR,Read/Write" "B_0x0,B_0x1" hexmask.word 0x0 0.--11. 1. "VLAN_ID,VLAN_ID" group.word 0x808008++0x5 line.word 0x0 "ETHSW_FES_VLAN_PORTSR,ETHSW FES port VLAN membership register" bitfld.word 0x0 0.--2. "VLAN_MEMBER,VLAN membership" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x2 "ETHSW_FES_VLAN_TAGR,ETHSW FES port VLAN tagging register" bitfld.word 0x2 0.--2. "VLAN_TAG,VLAN tagging" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x4 "ETHSW_FES_VLAN_FIDR,ETHSW FES Filtering ID register" bitfld.word 0x4 15. "ENG_TRAFFIC,Engineered Traffic" "B_0x0,B_0x1" hexmask.word.byte 0x4 0.--5. 1. "FILTERING_ID,Filtering ID" rgroup.word 0x80E000++0x35 line.word 0x0 "ETHSW_FES_PORT_HIGHR,ETHSW FES FES_PORT_HIGH generic register" hexmask.word.byte 0x0 0.--3. 1. "FES_PORT_HIGH,The value of generic FES_PORT_HIGH" line.word 0x2 "ETHSW_FES_COUNTERSR,ETHSW FES COUNTERS generic register" bitfld.word 0x2 0.--2. "COUNTERS,The value of generic COUNTERS" "0,1,2,3,4,5,6,7" line.word 0x4 "ETHSW_FES_CT_PORTSR,ETHSW FES CT_PORTS generic register" hexmask.word 0x4 0.--11. 1. "CT_PORTS,The value of generic CT_PORTS" line.word 0x6 "ETHSW_FES_TS_PORTSR,ETHSW FES TS_PORTS generic register" hexmask.word 0x6 0.--11. 1. "TS_PORTS,The value of generic TS_PORTS" line.word 0x8 "ETHSW_FES_SMAC_TABLE_ROWSR,ETHSW FES SMAC_TABLE_ROWS generic register" hexmask.word.byte 0x8 0.--3. 1. "SMAC_TABLE_ROWS,The value of generic SMAC_TABLE_ROWS" line.word 0xA "ETHSW_FES_POLICINGR,ETHSW FES POLICING generic register" bitfld.word 0xA 0.--1. "POLICING,The value of generic POLICING" "B_0x0,B_0x1,B_0x2,B_0x3" line.word 0xC "ETHSW_FES_POLICERSR,ETHSW FES POLICERS generic register" hexmask.word.byte 0xC 0.--3. 1. "POLICERS,The value of generic POLICERS" line.word 0xE "ETHSW_FES_QUEUESR,ETHSW FES QUEUES generic register" hexmask.word.byte 0xE 0.--3. 1. "QUEUES,The value of generic QUEUES" line.word 0x10 "ETHSW_FES_BUFFER_SIZER,ETHSW FES BUFFER_SIZE generic register" bitfld.word 0x10 0. "BUFFER_SIZE,The value of generic BUFFER_SIZE" "B_0x0,B_0x1" line.word 0x12 "ETHSW_FES_SHAPERSR,ETHSW FES SHAPERS generic register" bitfld.word 0x12 0. "SHAPERS,The value of generic SHAPERS" "B_0x0,B_0x1" line.word 0x14 "ETHSW_FES_GIGABITR,ETHSW FES GIGABIT generic register" bitfld.word 0x14 0. "GIGABIT,The value of generic GIGABIT" "B_0x0,B_0x1" line.word 0x16 "ETHSW_FES_HSR_PORTSR,ETHSW FES HSR_PORTS generic register" hexmask.word.byte 0x16 0.--7. 1. "HSR_PORTS,The value of generic HSR_PORTS" line.word 0x18 "ETHSW_FES_PRP_PORTSR,ETHSW FES PRP_PORTS generic register" hexmask.word.byte 0x18 0.--7. 1. "PRP_PORTS,The value of generic PRP_PORTS" line.word 0x1A "ETHSW_FES_SCHEDULED_PORTSR,ETHSW FES SCHEDULED_PORTS generic register" hexmask.word 0x1A 0.--11. 1. "SCHEDULED_PORTS,The value of generic SCHEDULED_PORTS" line.word 0x1C "ETHSW_PREEMPTABLE_PORTR,ETHSW FES PREEMPTABLE_PORT generic register" hexmask.word 0x1C 0.--11. 1. "PREEMPTABLE_PORT,The value of generic PREEMPTABLE_PORT" line.word 0x1E "ETHSW_FES_MACSECR,ETHSW FES MACSEC generic register" hexmask.word 0x1E 0.--11. 1. "MACSEC,The value of generic MACSEC" line.word 0x20 "ETHSW_FES_MACSEC_CIPHERR,ETHSW FES MACSEC_CIPHER generic register" bitfld.word 0x20 0.--2. "MACSEC_CIPHER,The value of generic MACSEC_CIPHER" "?,B_0x1,?,?,?,?,?,?" line.word 0x22 "ETHSW_FES_MGMT_PORTSR,ETHSW FES MGMT_PORTS generic register" hexmask.word 0x22 0.--11. 1. "MGMT_PORTS,The value of generic MGMT_PORTS" line.word 0x24 "ETHSW_FES_FRER_PORTSR,ETHSW FES FRER_PORTS generic register" hexmask.word.byte 0x24 0.--7. 1. "FRER_PORTS,The value of generic FRER_PORTS" line.word 0x26 "ETHSW_FES_FRER_ENTRIESR,ETHSW FES FRER_ENTRIES generic register" hexmask.word.byte 0x26 0.--3. 1. "FRER_ENTRIES,The value of generic FRER_ENTRIES" line.word 0x28 "ETHSW_FES_FRER_STREAMSR,ETHSW FES FRER_STREAMS generic register" hexmask.word.byte 0x28 0.--3. 1. "FRER_STREAMS,The value of generic FRER_STREAMS" line.word 0x2A "ETHSW_FES_FIDSR,ETHSW FES FIDS generic register" hexmask.word.byte 0x2A 0.--5. 1. "FIDS,The value of generic FIDS" line.word 0x2C "ETHSW_FES_DMA_PORTSR,ETHSW FES DMA_PORTS generic register" hexmask.word 0x2C 0.--11. 1. "DMA_PORTS,The value of generic DMA_PORTS" line.word 0x2E "ETHSW_FES_DMA_TX_DESC_RINGR,ETHSW FES DMA_TX_DESC_RING generic register" hexmask.word.byte 0x2E 0.--3. 1. "DMA_TX_DESC_RING,The value of generic DMA_TX_DESC_RING" line.word 0x30 "ETHSW_FES_DMA_RX_DESC_RINGR,ETHSW FES DMA_RX_DESC_RING generic register" hexmask.word.byte 0x30 0.--3. 1. "DMA_RX_DESC_RING,The value of generic DMA_RX_DESC_RING" line.word 0x32 "ETHSW_FES_PSFPR,ETHSW FES PSFP generic register" bitfld.word 0x32 0. "PSFP,The value of generic PSFP" "0,1" line.word 0x34 "ETHSW_FES_PSFP_STREAMSR,ETHSW FES PSFP_STREAMS generic register" hexmask.word.byte 0x34 0.--3. 1. "PSFP_STREAMS,The value of generic PSFP_STREAMS" rgroup.word 0x80E100++0x1 line.word 0x0 "ETHSW_FES_CFG_CLK_FREQR,ETHSW FES CFG_CLK_FREQ register" hexmask.word.byte 0x0 0.--7. 1. "CFG_CLK_FREQ,The value of generic CFG_CLK_FREQ" rgroup.word 0x80E110++0x1 line.word 0x0 "ETHSW_FES_DEBUG_INR,ETHSW FES DEBUG_IN register" bitfld.word 0x0 0. "DEBUG_IN,The value of generic DEBUG_IN" "0,1" rgroup.word 0x80E200++0x5 line.word 0x0 "ETHSW_FES_H_ADV_10R,ETHSW FES hold advance 10M register" hexmask.word.byte 0x0 8.--15. 1. "HOLD_ADV_MII,holdadvance_mii_cycles value" hexmask.word.byte 0x0 0.--7. 1. "HOLD_ADV_CLK,holdadvance_clk_cycles value" line.word 0x2 "ETHSW_FES_H_ADV_100R,ETHSW FES hold advance 100M register" hexmask.word.byte 0x2 8.--15. 1. "HOLD_ADV_MII,holdadvance_mii_cycles value" hexmask.word.byte 0x2 0.--7. 1. "HOLD_ADV_CLK,holdadvance_clk_cycles value" line.word 0x4 "ETHSW_FES_H_ADV_1000R,ETHSW FES hold advance 1000M register" hexmask.word.byte 0x4 8.--15. 1. "HOLD_ADV_GMII,holdadvance_gmii_cycles value" hexmask.word.byte 0x4 0.--7. 1. "HOLD_ADV_CLK,holdadvance_clk_cycles value" rgroup.word 0x80E208++0x5 line.word 0x0 "ETHSW_FES_R_ADV_10R,ETHSW FES release advance 10M register" hexmask.word.byte 0x0 8.--15. 1. "REL_ADV_MII,releaseadvance_mii_cycles value" hexmask.word.byte 0x0 0.--7. 1. "REL_ADV_CLK,releaseadvance_clk_cycles value" line.word 0x2 "ETHSW_FES_R_ADV_100R,ETHSW FES release advance 100M register" hexmask.word.byte 0x2 8.--15. 1. "REL_ADV_MII,releaseadvance_mii_cycles value" hexmask.word.byte 0x2 0.--7. 1. "REL_ADV_CLK,releaseadvance_clk_cycles value" line.word 0x4 "ETHSW_FES_R_ADV_1000R,ETHSW FES release advance 1000M register" hexmask.word.byte 0x4 8.--15. 1. "REL_ADV_GMII,releaseadvance_gmii_cycles value" hexmask.word.byte 0x4 0.--7. 1. "REL_ADV_CLK,releaseadvance_clk_cycles value" rgroup.word 0x80E210++0x5 line.word 0x0 "ETHSW_FES_I_TO_G_MIN_10R,ETHSW FES minimum input to gate delay 10M register" hexmask.word.byte 0x0 8.--15. 1. "I_TO_G_MIN_MII,inputtogate_mii_cycles value" hexmask.word.byte 0x0 0.--7. 1. "I_TO_G_MIN_CLK,inputtogate_clk_cycles value" line.word 0x2 "ETHSW_FES_I_TO_G_MIN_100R,ETHSW FES minimum input to gate delay 100M register" hexmask.word.byte 0x2 8.--15. 1. "I_TO_G_MIN_MII,inputtogate_mii_cycles value" hexmask.word.byte 0x2 0.--7. 1. "I_TO_G_MIN_CLK,inputtogate_clk_cycles value" line.word 0x4 "ETHSW_FES_I_TO_G_MIN_1000R,ETHSW FES minimum input to gate delay 1000M register" hexmask.word.byte 0x4 8.--15. 1. "I_TO_G_MIN_GMII,inputtogate_gmii_cycles value" hexmask.word.byte 0x4 0.--7. 1. "I_TO_G_MIN_CLK,inputtogate_clk_cycles value" rgroup.word 0x80E218++0x5 line.word 0x0 "ETHSW_FES_I_TO_G_MAX_10R,ETHSW FES maximum input to gate delay 10M register" hexmask.word.byte 0x0 8.--15. 1. "I_TO_G_MAX_MII,inputtogate_mii_cycles value" hexmask.word.byte 0x0 0.--7. 1. "I_TO_G_MAX_CLK,inputtogate_clk_cycles value" line.word 0x2 "ETHSW_FES_I_TO_G_MAX_100R,ETHSW FES maximum input to gate delay 100M register" hexmask.word.byte 0x2 8.--15. 1. "I_TO_G_MAX_MII,inputtogate_mii_cycles value" hexmask.word.byte 0x2 0.--7. 1. "I_TO_G_MAX_CLK,inputtogate_clk_cycles value" line.word 0x4 "ETHSW_FES_I_TO_G_MAX_1000R,ETHSW FES maximum input to gate delay 1000M register" hexmask.word.byte 0x4 8.--15. 1. "I_TO_G_MAX_GMII,inputtogate_gmii_cycles value" hexmask.word.byte 0x4 0.--7. 1. "I_TO_G_MAX_CLK,inputtogate_clk_cycles value" rgroup.word 0x80E220++0x5 line.word 0x0 "ETHSW_FES_G_TO_O_MIN_10R,ETHSW FES minimum gate to output delay 10M register" hexmask.word.byte 0x0 8.--15. 1. "G_TO_O_MIN_MII,gatetooutput_mii_cycles value" hexmask.word.byte 0x0 0.--7. 1. "G_TO_O_MIN_CLK,gatetooutput_clk_cycles value" line.word 0x2 "ETHSW_FES_G_TO_O_MIN_100R,ETHSW FES minimum gate to output delay 100M register" hexmask.word.byte 0x2 8.--15. 1. "G_TO_O_MIN_MII,gatetooutput_mii_cycles value" hexmask.word.byte 0x2 0.--7. 1. "G_TO_O_MIN_CLK,gatetooutput_clk_cycles value" line.word 0x4 "ETHSW_FES_G_TO_O_MIN_1000R,ETHSW FES minimum gate to output delay 1000M register" hexmask.word.byte 0x4 8.--15. 1. "G_TO_O_MIN_GMII,gatetooutput_gmii_cycles value" hexmask.word.byte 0x4 0.--7. 1. "G_TO_O_MIN_CLK,gatetooutput_clk_cycles value" rgroup.word 0x80E228++0x5 line.word 0x0 "ETHSW_FES_G_TO_O_MAX_10R,ETHSW FES maximum gate to output delay 10M register" hexmask.word.byte 0x0 8.--15. 1. "G_TO_O_MAX_MII,gatetooutput_mii_cycles value" hexmask.word.byte 0x0 0.--7. 1. "G_TO_O_MAX_CLK,gatetooutput_clk_cycles value" line.word 0x2 "ETHSW_FES_G_TO_O_MAX_100R,ETHSW FES maximum gate to output delay 100M register" hexmask.word.byte 0x2 8.--15. 1. "G_TO_O_MAX_MII,gatetooutput_mii_cycles value" hexmask.word.byte 0x2 0.--7. 1. "G_TO_O_MAX_CLK,gatetooutput_clk_cycles value" line.word 0x4 "ETHSW_FES_G_TO_O_MAX_1000R,ETHSW FES maximum gate to output delay 1000M register" hexmask.word.byte 0x4 8.--15. 1. "G_TO_O_MAX_GMII,gatetooutput_gmii_cycles value" hexmask.word.byte 0x4 0.--7. 1. "G_TO_O_MAX_CLK,gatetooutput_clk_cycles value" rgroup.word 0x80F000++0x1 line.word 0x0 "ETHSW_FES_CAPT0R,ETHSW FES capture status 0 register" bitfld.word 0x0 5. "CAPTURE_PPPS1,Capture PPPS1" "0,1" bitfld.word 0x0 4. "CAPTURE_PPPS0,Capture PPPS0" "0,1" bitfld.word 0x0 0. "CAPTURE_PE,Capture PE" "0,1" group.word 0x80F002++0x5 line.word 0x0 "ETHSW_FES_CAPT1R,ETHSW FES capture control 1 register" hexmask.word 0x0 0.--11. 1. "ENTITY,Entity" line.word 0x2 "ETHSW_FES_CAPT2R,ETHSW FES capture control 2 register" hexmask.word 0x2 4.--15. 1. "STREAM,Stream" hexmask.word.byte 0x2 0.--3. 1. "PORT,Port" line.word 0x4 "ETHSW_FES_CAPT3R,ETHSW FES capture control 3 register" hexmask.word 0x4 4.--15. 1. "STREAM,Stream" hexmask.word.byte 0x4 0.--3. 1. "PORT,Port" rgroup.word 0x80F200++0xB line.word 0x0 "ETHSW_FES_SEQ_REC_TOUT_LR,ETHSW FES sequence recovery timeouts low register" hexmask.word 0x0 0.--15. 1. "COUNTER,Counter value bits (15:0)" line.word 0x2 "ETHSW_FES_SEQ_REC_TOUT_HR,ETHSW FES sequence recovery timeouts high register" hexmask.word 0x2 0.--15. 1. "COUNTER,Counter value bits (31:16)" line.word 0x4 "ETHSW_FES_VECT_JUMP_LR,ETHSW FES vector recovery jump ahead low register" hexmask.word 0x4 0.--15. 1. "COUNTER,Counter value bits (15:0)" line.word 0x6 "ETHSW_FES_VECT_JUMP_HR,ETHSW FES vector recovery jump ahead high register" hexmask.word 0x6 0.--15. 1. "COUNTER,Counter value bits (31:16)" line.word 0x8 "ETHSW_FES_SEQ_REC_OOO_LR,ETHSW FES vector recovery out of order frames low register" hexmask.word 0x8 0.--15. 1. "COUNTER,Counter value bits (15:0)" line.word 0xA "ETHSW_FES_SEQ_REC_OOO_HR,ETHSW FES vector recovery out of order frames high register" hexmask.word 0xA 0.--15. 1. "COUNTER,Counter value bits (31:16)" rgroup.word 0x80F300++0x17 line.word 0x0 "ETHSW_FES_FRAMES_IN_LR,ETHSW FES input frames low register" hexmask.word 0x0 0.--15. 1. "COUNTER,Counter value bits (15:0)" line.word 0x2 "ETHSW_FES_FRAMES_IN_HR,ETHSW FES input frames high register" hexmask.word 0x2 0.--15. 1. "COUNTER,Counter value bits (31:16)" line.word 0x4 "ETHSW_FES_FRAMES_OUT_LR,ETHSW FES output frames low register" hexmask.word 0x4 0.--15. 1. "COUNTER,Counter value bits (15:0)" line.word 0x6 "ETHSW_FES_FRAMES_OUT_HR,ETHSW FES output frames high register" hexmask.word 0x6 0.--15. 1. "COUNTER,Counter value bits (31:16)" line.word 0x8 "ETHSW_FES_SEQ_REC_OOO2_LR,ETHSW FES vector recovery out of order frames low register" hexmask.word 0x8 0.--15. 1. "COUNTER,Counter value bits (15:0)" line.word 0xA "ETHSW_FES_SEQ_REC_OOO2_HR,ETHSW FES vector recovery out of order frames high register" hexmask.word 0xA 0.--15. 1. "COUNTER,Counter value bits (31:16)" line.word 0xC "ETHSW_FES_VECT_ROG_LR,ETHSW FES vector recovery rogue frames low register" hexmask.word 0xC 0.--15. 1. "COUNTER,Counter value bits (15:0)" line.word 0xE "ETHSW_FES_VECT_ROG_HR,ETHSW FES vector recovery rogue frames high register" hexmask.word 0xE 0.--15. 1. "COUNTER,Counter value bits (31:16)" line.word 0x10 "ETHSW_FES_SEQ_REC_TAGLESS_LR,ETHSW FES sequence recovery tagless frames low register" hexmask.word 0x10 0.--15. 1. "COUNTER,Counter value bits (15:0)" line.word 0x12 "ETHSW_FES_SEQ_REC_TAGLESS_HR,ETHSW FES sequence recovery tagless frames high register" hexmask.word 0x12 0.--15. 1. "COUNTER,Counter value bits (31:16)" line.word 0x14 "ETHSW_FES_SEQ_REC_SB_LR,ETHSW FES sequence recovery frames seen before low register" hexmask.word 0x14 0.--15. 1. "COUNTER,Counter value bits (15:0)" line.word 0x16 "ETHSW_FES_SEQ_REC_SB_HR,ETHSW FES sequence recovery frames seen before high register" hexmask.word 0x16 0.--15. 1. "COUNTER,Counter value bits (31:16)" rgroup.long 0x180000++0x3 line.long 0x0 "ETHSW_FRTC0_GLR,ETHSW FRTC0 general register" hexmask.long.word 0x0 8.--23. 1. "DEV_ID,Device ID" hexmask.long.byte 0x0 0.--7. 1. "REV_ID,Revision ID" rgroup.long 0x181004++0x13 line.long 0x0 "ETHSW_FRTC0_CUR_NSECR,ETHSW FRTC0 current time nanosecond register" hexmask.long 0x0 0.--29. 1. "NANOSECONDS,Nanoseconds part of the current time" line.long 0x4 "ETHSW_FRTC0_CUR_SECLR,ETHSW FRTC0 current time second low register" hexmask.long 0x4 0.--31. 1. "SECONDS,Seconds part of the current time (least significant part)" line.long 0x8 "ETHSW_FRTC0_CUR_SECHR,ETHSW FRTC0 current time second high register" hexmask.long.word 0x8 0.--15. 1. "SECONDS,Seconds part of the current time (most significant part)" line.long 0xC "ETHSW_FRTC0_TIME_CCLR,ETHSW FRTC0 time CC low register" hexmask.long 0xC 0.--31. 1. "TIME_CC,Clock cycle counter (least significant part)" line.long 0x10 "ETHSW_FRTC0_TIME_CCHR,ETHSW FRTC0 time CC high register" hexmask.long.word 0x10 0.--15. 1. "TIME_CC,Clock cycle counter (most significant part)" group.long 0x181020++0x7 line.long 0x0 "ETHSW_FRTC0_STEP_SIZE_SNR,ETHSW FRTC0 step size subnanosecond register" hexmask.long 0x0 0.--31. 1. "SUBNANOSECONDS,Subnanoseconds" line.long 0x4 "ETHSW_FRTC0_STEP_SIZE_NR,ETHSW FRTC0 step size nanosecond register" hexmask.long.byte 0x4 0.--5. 1. "NANOSECONDS,Nanoseconds" group.long 0x181034++0xF line.long 0x0 "ETHSW_FRTC0_ADJUST_NSECR,ETHSW FRTC0 adjust nanosecond register" hexmask.long 0x0 0.--29. 1. "NANOSECONDS,Nanoseconds" line.long 0x4 "ETHSW_FRTC0_ADJUST_SECLR,ETHSW FRTC0 adjust second low register" hexmask.long 0x4 0.--31. 1. "SECONDS,Seconds (least significant part)" line.long 0x8 "ETHSW_FRTC0_ADJUST_SECHR,ETHSW FRTC0 adjust second high register" hexmask.long.word 0x8 0.--15. 1. "SECONDS,Seconds (most significant part)" line.long 0xC "ETHSW_FRTC0_TIME_CMDR,ETHSW FRTC0 time command register" bitfld.long 0xC 3. "ADJUST_TIME_MODE,Determines when ADJUST_TIME command is taken into use (does not affect to ADJUST_STEP command):" "B_0x0,B_0x1" bitfld.long 0xC 2. "READ_TIME,Updates the following registers with the current values in the NCO:" "0,1" bitfld.long 0xC 1. "ADJUST_STEP,Take the new values of the following registers into use:" "0,1" newline bitfld.long 0xC 0. "ADJUST_TIME,Adds (for one time only) the values in the following registers to internal time (NCO):" "0,1" rgroup.long 0x182000++0x7 line.long 0x0 "ETHSW_FRTC0_GENERICS_LR,ETHSW FRTC0 generics low register" hexmask.long 0x0 0.--31. 1. "DEFAULT_STEP_SNS,The value of Generic DEFAULT_STEP_SNS." line.long 0x4 "ETHSW_FRTC0_GENERICS_HR,ETHSW FRTC0 generics high register" hexmask.long.byte 0x4 0.--5. 1. "DEFAULT_STEP_NS,The value of Generic DEFAULT_STEP_NS." rgroup.long 0x190000++0x3 line.long 0x0 "ETHSW_FRTC1_GLR,ETHSW FRTC1 general register" hexmask.long.word 0x0 8.--23. 1. "DEV_ID,Device ID" hexmask.long.byte 0x0 0.--7. 1. "REV_ID,Revision ID" rgroup.long 0x191004++0x13 line.long 0x0 "ETHSW_FRTC1_CUR_NSECR,ETHSW FRTC1 current time nanosecond register" hexmask.long 0x0 0.--29. 1. "NANOSECONDS,Nanoseconds part of the current time" line.long 0x4 "ETHSW_FRTC1_CUR_SECLR,ETHSW FRTC1 current time second low register" hexmask.long 0x4 0.--31. 1. "SECONDS,Seconds part of the current time (least significant part)" line.long 0x8 "ETHSW_FRTC1_CUR_SECHR,ETHSW FRTC1 current time second high register" hexmask.long.word 0x8 0.--15. 1. "SECONDS,Seconds part of the current time (most significant part)" line.long 0xC "ETHSW_FRTC1_TIME_CCLR,ETHSW FRTC1 time CC low register" hexmask.long 0xC 0.--31. 1. "TIME_CC,Clock cycle counter (least significant part)" line.long 0x10 "ETHSW_FRTC1_TIME_CCHR,ETHSW FRTC1 time CC high register" hexmask.long.word 0x10 0.--15. 1. "TIME_CC,Clock cycle counter (most significant part)" group.long 0x191020++0x7 line.long 0x0 "ETHSW_FRTC1_STEP_SIZE_SNR,ETHSW FRTC1 step size subnanosecond register" hexmask.long 0x0 0.--31. 1. "SUBNANOSECONDS,Subnanoseconds" line.long 0x4 "ETHSW_FRTC1_STEP_SIZE_NR,ETHSW FRTC1 step size nanosecond register" hexmask.long.byte 0x4 0.--5. 1. "NANOSECONDS,Nanoseconds" group.long 0x191034++0xF line.long 0x0 "ETHSW_FRTC1_ADJUST_NSECR,ETHSW FRTC1 adjust nanosecond register" hexmask.long 0x0 0.--29. 1. "NANOSECONDS,Nanoseconds" line.long 0x4 "ETHSW_FRTC1_ADJUST_SECLR,ETHSW FRTC1 adjust second low register" hexmask.long 0x4 0.--31. 1. "SECONDS,Seconds (least significant part)" line.long 0x8 "ETHSW_FRTC1_ADJUST_SECHR,ETHSW FRTC1 adjust second high register" hexmask.long.word 0x8 0.--15. 1. "SECONDS,Seconds (most significant part)" line.long 0xC "ETHSW_FRTC1_TIME_CMDR,ETHSW FRTC1 time command register" bitfld.long 0xC 3. "ADJUST_TIME_MODE,Determines when ADJUST_TIME command is taken into use (does not affect to ADJUST_STEP command):" "B_0x0,B_0x1" bitfld.long 0xC 2. "READ_TIME,Updates the following registers with the current values in the NCO:" "0,1" bitfld.long 0xC 1. "ADJUST_STEP,Take the new values of the following registers into use:" "0,1" newline bitfld.long 0xC 0. "ADJUST_TIME,Adds (for one time only) the values in the following registers to internal time (NCO):" "0,1" rgroup.long 0x192000++0x7 line.long 0x0 "ETHSW_FRTC1_GENERICS_LR,ETHSW FRTC1 generics low register" hexmask.long 0x0 0.--31. 1. "DEFAULT_STEP_SNS,The value of Generic DEFAULT_STEP_SNS." line.long 0x4 "ETHSW_FRTC1_GENERICS_HR,ETHSW FRTC1 generics high register" hexmask.long.byte 0x4 0.--5. 1. "DEFAULT_STEP_NS,The value of Generic DEFAULT_STEP_NS." group.word 0x1D0000++0x3 line.word 0x0 "ETHSW_FSC0_SCH_GENR,ETHSW FSC scheduler 0 general register" hexmask.word 0x0 4.--14. 1. "DWNCNT_STRT_VAL,Downcounter start value." bitfld.word 0x0 0.--1. "DWNCNT_SPD,Downcounter speed 10/100 divider" "B_0x0,B_0x1,B_0x2,?" line.word 0x2 "ETHSW_FSC0_DWNCNT_SPDR,ETHSW FSC scheduler 0 downcounter speed setting register" hexmask.word.byte 0x2 5.--8. 1. "DWNCNTR_SPD,Downcounter speed addend" group.word 0x1D0020++0x1 line.word 0x0 "ETHSW_FSC0_EME_DIS_CR,ETHSW FSC scheduler 0 emergency disable control register" rbitfld.word 0x0 1. "EME_DIS_MUX_STATE,Current state of emergency disable MUX" "B_0x0,B_0x1" bitfld.word 0x0 0. "EME_DIS_MUX_CTRL,Emergency disable MUX control" "B_0x0,B_0x1" group.word 0x1D0030++0x1 line.word 0x0 "ETHSW_FSC0_EME_DIS_STATR,ETHSW FSC scheduler 0 emergency disable port state register" hexmask.word 0x0 0.--8. 1. "EME_DIS_STAT,Gate state in Emergency disable mode" group.word 0x1D0800++0x1 line.word 0x0 "ETHSW_FSC0_T0_TBL_GENR,ETHSW FSC scheduler 0 table 0 general control and status register" bitfld.word 0x0 15. "UPDATE,Update" "0,1" rbitfld.word 0x0 9. "LST_CYC_RCHD,Last cycle reached" "B_0x0,B_0x1" bitfld.word 0x0 8. "LST_CYC_EN,Last cycle number register enable/disable" "B_0x0,B_0x1" newline rbitfld.word 0x0 1. "SCH_TBL_IN_USE,Schedule table currently in use" "B_0x0,B_0x1" bitfld.word 0x0 0. "SCH_TBL_UPDATE,Schedule table can be taken into use" "B_0x0,B_0x1" group.long 0x1D0814++0x3 line.long 0x0 "ETHSW_FSC0_T0_STRT_NSR,ETHSW FSC scheduler 0 table 0 start time nanosecond register" hexmask.long 0x0 0.--29. 1. "STARTTIME_NS,Time schedule table taken into use nanoseconds part." group.word 0x1D0818++0x1 line.word 0x0 "ETHSW_FSC0_T0_STRT_SR,ETHSW FSC scheduler 0 table 0 start time second register" hexmask.word.byte 0x0 0.--7. 1. "STARTTIME_S,Time schedule table taken into use seconds part." group.long 0x1D0820++0x7 line.long 0x0 "ETHSW_FSC0_T0_CYC_SUBNSR,ETHSW FSC scheduler 0 table 0 cycle time subnanosecond register" hexmask.long.tbyte 0x0 8.--31. 1. "CYCLETIME_SUBNS,Time each cycle is run subnanoseconds part." line.long 0x4 "ETHSW_FSC0_T0_CYC_NSR,ETHSW FSC scheduler 0 table 0 cycle time nanosecond register" hexmask.long 0x4 0.--29. 1. "CYCLETIME_NS,Time each cycle is run nanoseconds part." rgroup.long 0x1D0834++0x7 line.long 0x0 "ETHSW_FSC0_T0_CYCTS_NSR,ETHSW FSC scheduler 0 table 0 cycle timestamp nanosecond register" hexmask.long 0x0 0.--29. 1. "TIMESTAMP_NS,Timestamp from the start of the previous cycle nanoseconds part." line.long 0x4 "ETHSW_FSC0_T0_CYCTS_SR,ETHSW FSC scheduler 0 table 0 cycle timestamp second register" hexmask.long.byte 0x4 0.--7. 1. "TIMESTAMP_S,Timestamp from the start of the previous cycle seconds part." rgroup.word 0x1D0840++0x1 line.word 0x0 "ETHSW_FSC0_T0_CYC_CNTR,ETHSW FSC scheduler 0 table 0 cycle counter register" hexmask.word 0x0 0.--15. 1. "CYCLE_CNT,Cycle count." rgroup.word 0x1D0844++0x1 line.word 0x0 "ETHSW_FSC0_T0_LST_CYCR,ETHSW FSC scheduler 0 table 0 last cycle register" hexmask.word 0x0 0.--15. 1. "LAST_CYCLE,Cycle number of the last cycle." group.word 0x1D0900++0x1 line.word 0x0 "ETHSW_FSC0_T1_TBL_GENR,ETHSW FSC scheduler 0 table 1 general control and status register" bitfld.word 0x0 15. "UPDATE,Update" "0,1" rbitfld.word 0x0 9. "LST_CYC_RCHD,Last cycle reached" "B_0x0,B_0x1" bitfld.word 0x0 8. "LST_CYC_EN,Last cycle number register enable/disable" "B_0x0,B_0x1" newline rbitfld.word 0x0 1. "SCH_TBL_IN_USE,Schedule table currently in use" "B_0x0,B_0x1" bitfld.word 0x0 0. "SCH_TBL_UPDATE,Schedule table can be taken into use" "B_0x0,B_0x1" group.long 0x1D0914++0x3 line.long 0x0 "ETHSW_FSC0_T1_STRT_NSR,ETHSW FSC scheduler 0 table 1 start time nanosecond register" hexmask.long 0x0 0.--29. 1. "STARTTIME_NS,Time schedule table taken into use nanoseconds part." group.word 0x1D0918++0x1 line.word 0x0 "ETHSW_FSC0_T1_STRT_SR,ETHSW FSC scheduler 0 table 1 start time second register" hexmask.word.byte 0x0 0.--7. 1. "STARTTIME_S,Time schedule table taken into use seconds part." group.long 0x1D0920++0x7 line.long 0x0 "ETHSW_FSC0_T1_CYC_SUBNSR,ETHSW FSC scheduler 0 table 1 cycle time subnanosecond register" hexmask.long.tbyte 0x0 8.--31. 1. "CYCLETIME_SUBNS,Time each cycle is run subnanoseconds part." line.long 0x4 "ETHSW_FSC0_T1_CYC_NSR,ETHSW FSC scheduler 0 table 1 cycle time nanosecond register" hexmask.long 0x4 0.--29. 1. "CYCLETIME_NS,Time each cycle is run nanoseconds part." rgroup.long 0x1D0934++0x7 line.long 0x0 "ETHSW_FSC0_T1_CYCTS_NSR,ETHSW FSC scheduler 0 table 1 cycle timestamp nanosecond register" hexmask.long 0x0 0.--29. 1. "TIMESTAMP_NS,Timestamp from the start of the previous cycle nanoseconds part." line.long 0x4 "ETHSW_FSC0_T1_CYCTS_SR,ETHSW FSC scheduler 0 table 1 cycle timestamp second register" hexmask.long.byte 0x4 0.--7. 1. "TIMESTAMP_S,Timestamp from the start of the previous cycle seconds part." rgroup.word 0x1D0940++0x1 line.word 0x0 "ETHSW_FSC0_T1_CYC_CNTR,ETHSW FSC scheduler 0 table 1 cycle counter register" hexmask.word 0x0 0.--15. 1. "CYCLE_CNT,Cycle count." rgroup.word 0x1D0944++0x1 line.word 0x0 "ETHSW_FSC0_T1_LST_CYCR,ETHSW FSC scheduler 0 table 1 last cycle register" hexmask.word 0x0 0.--15. 1. "LAST_CYCLE,Cycle number of the last cycle." group.word 0x1D1000++0x3 line.word 0x0 "ETHSW_FSC1_SCH_GENR,ETHSW FSC scheduler 1 general register" hexmask.word 0x0 4.--14. 1. "DWNCNT_STRT_VAL,Downcounter start value." bitfld.word 0x0 0.--1. "DWNCNT_SPD,Downcounter speed 10/100 divider" "B_0x0,B_0x1,B_0x2,?" line.word 0x2 "ETHSW_FSC1_DWNCNT_SPDR,ETHSW FSC scheduler 1 downcounter speed setting register" hexmask.word.byte 0x2 5.--8. 1. "DWNCNTR_SPD,Downcounter speed addend" group.word 0x1D1020++0x1 line.word 0x0 "ETHSW_FSC1_EME_DIS_CR,ETHSW FSC scheduler 1 emergency disable control register" rbitfld.word 0x0 1. "EME_DIS_MUX_STATE,Current state of emergency disable MUX" "B_0x0,B_0x1" bitfld.word 0x0 0. "EME_DIS_MUX_CTRL,Emergency disable MUX control" "B_0x0,B_0x1" group.word 0x1D1030++0x1 line.word 0x0 "ETHSW_FSC1_EME_DIS_STATR,ETHSW FSC scheduler 1 emergency disable port state register" hexmask.word 0x0 0.--8. 1. "EME_DIS_STAT,Gate state in Emergency disable mode" group.word 0x1D1800++0x1 line.word 0x0 "ETHSW_FSC1_T0_TBL_GENR,ETHSW FSC scheduler 1 table 0 general control and status register" bitfld.word 0x0 15. "UPDATE,Update" "0,1" rbitfld.word 0x0 9. "LST_CYC_RCHD,Last cycle reached" "B_0x0,B_0x1" bitfld.word 0x0 8. "LST_CYC_EN,Last cycle number register enable/disable" "B_0x0,B_0x1" newline rbitfld.word 0x0 1. "SCH_TBL_IN_USE,Schedule table currently in use" "B_0x0,B_0x1" bitfld.word 0x0 0. "SCH_TBL_UPDATE,Schedule table can be taken into use" "B_0x0,B_0x1" group.long 0x1D1814++0x3 line.long 0x0 "ETHSW_FSC1_T0_STRT_NSR,ETHSW FSC scheduler 1 table 0 start time nanosecond register" hexmask.long 0x0 0.--29. 1. "STARTTIME_NS,Time schedule table taken into use nanoseconds part." group.word 0x1D1818++0x1 line.word 0x0 "ETHSW_FSC1_T0_STRT_SR,ETHSW FSC scheduler 1 table 0 start time second register" hexmask.word.byte 0x0 0.--7. 1. "STARTTIME_S,Time schedule table taken into use seconds part." group.long 0x1D1820++0x7 line.long 0x0 "ETHSW_FSC1_T0_CYC_SUBNSR,ETHSW FSC scheduler 1 table 0 cycle time subnanosecond register" hexmask.long.tbyte 0x0 8.--31. 1. "CYCLETIME_SUBNS,Time each cycle is run subnanoseconds part." line.long 0x4 "ETHSW_FSC1_T0_CYC_NSR,ETHSW FSC scheduler 1 table 0 cycle time nanosecond register" hexmask.long 0x4 0.--29. 1. "CYCLETIME_NS,Time each cycle is run nanoseconds part." rgroup.long 0x1D1834++0x7 line.long 0x0 "ETHSW_FSC1_T0_CYCTS_NSR,ETHSW FSC scheduler 1 table 0 cycle timestamp nanosecond register" hexmask.long 0x0 0.--29. 1. "TIMESTAMP_NS,Timestamp from the start of the previous cycle nanoseconds part." line.long 0x4 "ETHSW_FSC1_T0_CYCTS_SR,ETHSW FSC scheduler 1 table 0 cycle timestamp second register" hexmask.long.byte 0x4 0.--7. 1. "TIMESTAMP_S,Timestamp from the start of the previous cycle seconds part." rgroup.word 0x1D1840++0x1 line.word 0x0 "ETHSW_FSC1_T0_CYC_CNTR,ETHSW FSC scheduler 1 table 0 cycle counter register" hexmask.word 0x0 0.--15. 1. "CYCLE_CNT,Cycle count." rgroup.word 0x1D1844++0x1 line.word 0x0 "ETHSW_FSC1_T0_LST_CYCR,ETHSW FSC scheduler 1 table 0 last cycle register" hexmask.word 0x0 0.--15. 1. "LAST_CYCLE,Cycle number of the last cycle." group.word 0x1D1900++0x1 line.word 0x0 "ETHSW_FSC1_T1_TBL_GENR,ETHSW FSC scheduler 1 table 1 general control and status register" bitfld.word 0x0 15. "UPDATE,Update" "0,1" rbitfld.word 0x0 9. "LST_CYC_RCHD,Last cycle reached" "B_0x0,B_0x1" bitfld.word 0x0 8. "LST_CYC_EN,Last cycle number register enable/disable" "B_0x0,B_0x1" newline rbitfld.word 0x0 1. "SCH_TBL_IN_USE,Schedule table currently in use" "B_0x0,B_0x1" bitfld.word 0x0 0. "SCH_TBL_UPDATE,Schedule table can be taken into use" "B_0x0,B_0x1" group.long 0x1D1914++0x3 line.long 0x0 "ETHSW_FSC1_T1_STRT_NSR,ETHSW FSC scheduler 1 table 1 start time nanosecond register" hexmask.long 0x0 0.--29. 1. "STARTTIME_NS,Time schedule table taken into use nanoseconds part." group.word 0x1D1918++0x1 line.word 0x0 "ETHSW_FSC1_T1_STRT_SR,ETHSW FSC scheduler 1 table 1 start time second register" hexmask.word.byte 0x0 0.--7. 1. "STARTTIME_S,Time schedule table taken into use seconds part." group.long 0x1D1920++0x7 line.long 0x0 "ETHSW_FSC1_T1_CYC_SUBNSR,ETHSW FSC scheduler 1 table 1 cycle time subnanosecond register" hexmask.long.tbyte 0x0 8.--31. 1. "CYCLETIME_SUBNS,Time each cycle is run subnanoseconds part." line.long 0x4 "ETHSW_FSC1_T1_CYC_NSR,ETHSW FSC scheduler 1 table 1 cycle time nanosecond register" hexmask.long 0x4 0.--29. 1. "CYCLETIME_NS,Time each cycle is run nanoseconds part." rgroup.long 0x1D1934++0x7 line.long 0x0 "ETHSW_FSC1_T1_CYCTS_NSR,ETHSW FSC scheduler 1 table 1 cycle timestamp nanosecond register" hexmask.long 0x0 0.--29. 1. "TIMESTAMP_NS,Timestamp from the start of the previous cycle nanoseconds part." line.long 0x4 "ETHSW_FSC1_T1_CYCTS_SR,ETHSW FSC scheduler 1 table 1 cycle timestamp second register" hexmask.long.byte 0x4 0.--7. 1. "TIMESTAMP_S,Timestamp from the start of the previous cycle seconds part." rgroup.word 0x1D1940++0x1 line.word 0x0 "ETHSW_FSC1_T1_CYC_CNTR,ETHSW FSC scheduler 1 table 1 cycle counter register" hexmask.word 0x0 0.--15. 1. "CYCLE_CNT,Cycle count." rgroup.word 0x1D1944++0x1 line.word 0x0 "ETHSW_FSC1_T1_LST_CYCR,ETHSW FSC scheduler 1 table 1 last cycle register" hexmask.word 0x0 0.--15. 1. "LAST_CYCLE,Cycle number of the last cycle." group.word 0x1D2000++0x3 line.word 0x0 "ETHSW_FSC2_SCH_GENR,ETHSW FSC scheduler 2 general register" hexmask.word 0x0 4.--14. 1. "DWNCNT_STRT_VAL,Downcounter start value." bitfld.word 0x0 0.--1. "DWNCNT_SPD,Downcounter speed 10/100 divider" "B_0x0,B_0x1,B_0x2,?" line.word 0x2 "ETHSW_FSC2_DWNCNT_SPDR,ETHSW FSC scheduler 2 downcounter speed setting register" hexmask.word.byte 0x2 5.--8. 1. "DWNCNTR_SPD,Downcounter speed addend" group.word 0x1D2020++0x1 line.word 0x0 "ETHSW_FSC2_EME_DIS_CR,ETHSW FSC scheduler 2 emergency disable control register" rbitfld.word 0x0 1. "EME_DIS_MUX_STATE,Current state of emergency disable MUX" "B_0x0,B_0x1" bitfld.word 0x0 0. "EME_DIS_MUX_CTRL,Emergency disable MUX control" "B_0x0,B_0x1" group.word 0x1D2030++0x1 line.word 0x0 "ETHSW_FSC2_EME_DIS_STATR,ETHSW FSC scheduler 2 emergency disable port state register" hexmask.word 0x0 0.--8. 1. "EME_DIS_STAT,Gate state in Emergency disable mode" group.word 0x1D2800++0x1 line.word 0x0 "ETHSW_FSC2_T0_TBL_GENR,ETHSW FSC scheduler 2 table 0 general control and status register" bitfld.word 0x0 15. "UPDATE,Update" "0,1" rbitfld.word 0x0 9. "LST_CYC_RCHD,Last cycle reached" "B_0x0,B_0x1" bitfld.word 0x0 8. "LST_CYC_EN,Last cycle number register enable/disable" "B_0x0,B_0x1" newline rbitfld.word 0x0 1. "SCH_TBL_IN_USE,Schedule table currently in use" "B_0x0,B_0x1" bitfld.word 0x0 0. "SCH_TBL_UPDATE,Schedule table can be taken into use" "B_0x0,B_0x1" group.long 0x1D2814++0x3 line.long 0x0 "ETHSW_FSC2_T0_STRT_NSR,ETHSW FSC scheduler 2 table 0 start time nanosecond register" hexmask.long 0x0 0.--29. 1. "STARTTIME_NS,Time schedule table taken into use nanoseconds part." group.word 0x1D2818++0x1 line.word 0x0 "ETHSW_FSC2_T0_STRT_SR,ETHSW FSC scheduler 2 table 0 start time second register" hexmask.word.byte 0x0 0.--7. 1. "STARTTIME_S,Time schedule table taken into use seconds part." group.long 0x1D2820++0x7 line.long 0x0 "ETHSW_FSC2_T0_CYC_SUBNSR,ETHSW FSC scheduler 2 table 0 cycle time subnanosecond register" hexmask.long.tbyte 0x0 8.--31. 1. "CYCLETIME_SUBNS,Time each cycle is run subnanoseconds part." line.long 0x4 "ETHSW_FSC2_T0_CYC_NSR,ETHSW FSC scheduler 2 table 0 cycle time nanosecond register" hexmask.long 0x4 0.--29. 1. "CYCLETIME_NS,Time each cycle is run nanoseconds part." rgroup.long 0x1D2834++0x7 line.long 0x0 "ETHSW_FSC2_T0_CYCTS_NSR,ETHSW FSC scheduler 2 table 0 cycle timestamp nanosecond register" hexmask.long 0x0 0.--29. 1. "TIMESTAMP_NS,Timestamp from the start of the previous cycle nanoseconds part." line.long 0x4 "ETHSW_FSC2_T0_CYCTS_SR,ETHSW FSC scheduler 2 table 0 cycle timestamp second register" hexmask.long.byte 0x4 0.--7. 1. "TIMESTAMP_S,Timestamp from the start of the previous cycle seconds part." rgroup.word 0x1D2840++0x1 line.word 0x0 "ETHSW_FSC2_T0_CYC_CNTR,ETHSW FSC scheduler 2 table 0 cycle counter register" hexmask.word 0x0 0.--15. 1. "CYCLE_CNT,Cycle count." rgroup.word 0x1D2844++0x1 line.word 0x0 "ETHSW_FSC2_T0_LST_CYCR,ETHSW FSC scheduler 2 table 0 last cycle register" hexmask.word 0x0 0.--15. 1. "LAST_CYCLE,Cycle number of the last cycle." group.word 0x1D2900++0x1 line.word 0x0 "ETHSW_FSC2_T1_TBL_GENR,ETHSW FSC scheduler 2 table 1 general control and status register" bitfld.word 0x0 15. "UPDATE,Update" "0,1" rbitfld.word 0x0 9. "LST_CYC_RCHD,Last cycle reached" "B_0x0,B_0x1" bitfld.word 0x0 8. "LST_CYC_EN,Last cycle number register enable/disable" "B_0x0,B_0x1" newline rbitfld.word 0x0 1. "SCH_TBL_IN_USE,Schedule table currently in use" "B_0x0,B_0x1" bitfld.word 0x0 0. "SCH_TBL_UPDATE,Schedule table can be taken into use" "B_0x0,B_0x1" group.long 0x1D2914++0x3 line.long 0x0 "ETHSW_FSC2_T1_STRT_NSR,ETHSW FSC scheduler 2 table 1 start time nanosecond register" hexmask.long 0x0 0.--29. 1. "STARTTIME_NS,Time schedule table taken into use nanoseconds part." group.word 0x1D2918++0x1 line.word 0x0 "ETHSW_FSC2_T1_STRT_SR,ETHSW FSC scheduler 2 table 1 start time second register" hexmask.word.byte 0x0 0.--7. 1. "STARTTIME_S,Time schedule table taken into use seconds part." group.long 0x1D2920++0x7 line.long 0x0 "ETHSW_FSC2_T1_CYC_SUBNSR,ETHSW FSC scheduler 2 table 1 cycle time subnanosecond register" hexmask.long.tbyte 0x0 8.--31. 1. "CYCLETIME_SUBNS,Time each cycle is run subnanoseconds part." line.long 0x4 "ETHSW_FSC2_T1_CYC_NSR,ETHSW FSC scheduler 2 table 1 cycle time nanosecond register" hexmask.long 0x4 0.--29. 1. "CYCLETIME_NS,Time each cycle is run nanoseconds part." rgroup.long 0x1D2934++0x7 line.long 0x0 "ETHSW_FSC2_T1_CYCTS_NSR,ETHSW FSC scheduler 2 table 1 cycle timestamp nanosecond register" hexmask.long 0x0 0.--29. 1. "TIMESTAMP_NS,Timestamp from the start of the previous cycle nanoseconds part." line.long 0x4 "ETHSW_FSC2_T1_CYCTS_SR,ETHSW FSC scheduler 2 table 1 cycle timestamp second register" hexmask.long.byte 0x4 0.--7. 1. "TIMESTAMP_S,Timestamp from the start of the previous cycle seconds part." rgroup.word 0x1D2940++0x1 line.word 0x0 "ETHSW_FSC2_T1_CYC_CNTR,ETHSW FSC scheduler 2 table 1 cycle counter register" hexmask.word 0x0 0.--15. 1. "CYCLE_CNT,Cycle count." rgroup.word 0x1D2944++0x1 line.word 0x0 "ETHSW_FSC2_T1_LST_CYCR,ETHSW FSC scheduler 2 table 1 last cycle register" hexmask.word 0x0 0.--15. 1. "LAST_CYCLE,Cycle number of the last cycle." group.word 0x200000++0x1 line.word 0x0 "ETHSW_FES0_PORT_STATER,ETHSW FES port 0 port State register" bitfld.word 0x0 15. "RX_CT,RX Cut-through" "B_0x0,B_0x1" bitfld.word 0x0 14. "FB_STF,Fallback to Store-and-Forward" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "SPEED_SEL,Speed select" "?,B_0x1,B_0x2,B_0x3" newline bitfld.word 0x0 4.--5. "HW_MODE,Port HW mode" "B_0x0,?,B_0x2,?" bitfld.word 0x0 2.--3. "MGMT_ST,Port management state" "B_0x0,B_0x1,?,?" bitfld.word 0x0 0.--1. "FWD_ST,Port Forwarding state" "B_0x0,?,B_0x2,?" group.word 0x200010++0x9 line.word 0x0 "ETHSW_FES0_VLAN0R,ETHSW FES port 0 port VLAN configuration register 0" bitfld.word 0x0 15. "TGD_UTGD,Tagged/untagged" "B_0x0,B_0x1" bitfld.word 0x0 12.--14. "PD_PCP,Port default PCP" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--11. 1. "PD_VLAN,Port default VLAN" line.word 0x2 "ETHSW_FES0_VLAN1R,ETHSW FES port 0 port VLAN configuration register 1" bitfld.word 0x2 15. "USE_DEI,Use_DEI" "B_0x0,B_0x1" hexmask.word 0x2 0.--11. 1. "VLAN_PRIF,Default VLAN for Priority Tagged Frames" line.word 0x4 "ETHSW_FES0_FWDM_CFGR,ETHSW FES port 0 port forward mask configuration register" bitfld.word 0x4 0.--2. "PORT_FWDM,Port forward mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x6 "ETHSW_FES0_PRIO_REGENLR,ETHSW FES port 0 priority regeneration table low register" bitfld.word 0x6 12.--14. "PCP3,Priority PCP3" "0,1,2,3,4,5,6,7" bitfld.word 0x6 8.--10. "PCP2,Priority PCP2" "0,1,2,3,4,5,6,7" bitfld.word 0x6 4.--6. "PCP1,Priority PCP1" "0,1,2,3,4,5,6,7" newline bitfld.word 0x6 0.--2. "PCP0,Priority PCP0" "0,1,2,3,4,5,6,7" line.word 0x8 "ETHSW_FES0_PRIO_REGENHR,ETHSW FES port 0 priority regeneration table high register" bitfld.word 0x8 12.--14. "PCP7,Priority PCP7" "0,1,2,3,4,5,6,7" bitfld.word 0x8 8.--10. "PCP6,Priority PCP6" "0,1,2,3,4,5,6,7" bitfld.word 0x8 4.--6. "PCP5,Priority PCP5" "0,1,2,3,4,5,6,7" newline bitfld.word 0x8 0.--2. "PCP4,Priority PCP4" "0,1,2,3,4,5,6,7" group.word 0x200030++0x1F line.word 0x0 "ETHSW_FES0_SHAPER0R,ETHSW FES port 0 shaper 0 configuration register" hexmask.word 0x0 0.--15. 1. "ADDEND,Addend" line.word 0x2 "ETHSW_FES0_SHAPER1R,ETHSW FES port 0 shaper 1 configuration register" hexmask.word 0x2 0.--15. 1. "ADDEND,Addend" line.word 0x4 "ETHSW_FES0_SHAPER2R,ETHSW FES port 0 shaper 2 configuration register" hexmask.word 0x4 0.--15. 1. "ADDEND,Addend" line.word 0x6 "ETHSW_FES0_SHAPER3R,ETHSW FES port 0 shaper 3 configuration register" hexmask.word 0x6 0.--15. 1. "ADDEND,Addend" line.word 0x8 "ETHSW_FES0_SHAPER4R,ETHSW FES port 0 shaper 4 configuration register" hexmask.word 0x8 0.--15. 1. "ADDEND,Addend" line.word 0xA "ETHSW_FES0_SHAPER5R,ETHSW FES port 0 shaper 5 configuration register" hexmask.word 0xA 0.--15. 1. "ADDEND,Addend" line.word 0xC "ETHSW_FES0_SHAPER6R,ETHSW FES port 0 shaper 6 configuration register" hexmask.word 0xC 0.--15. 1. "ADDEND,Addend" line.word 0xE "ETHSW_FES0_SHAPER7R,ETHSW FES port 0 shaper 7 configuration register" hexmask.word 0xE 0.--15. 1. "ADDEND,Addend" line.word 0x10 "ETHSW_FES0_FRAMESIZE0R,ETHSW FES port 0 frame size 0 configuration register" hexmask.word 0x10 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x12 "ETHSW_FES0_FRAMESIZE1R,ETHSW FES port 0 frame size 1 configuration register" hexmask.word 0x12 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x14 "ETHSW_FES0_FRAMESIZE2R,ETHSW FES port 0 frame size 2 configuration register" hexmask.word 0x14 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x16 "ETHSW_FES0_FRAMESIZE3R,ETHSW FES port 0 frame size 3 configuration register" hexmask.word 0x16 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x18 "ETHSW_FES0_FRAMESIZE4R,ETHSW FES port 0 frame size 4 configuration register" hexmask.word 0x18 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x1A "ETHSW_FES0_FRAMESIZE5R,ETHSW FES port 0 frame size 5 configuration register" hexmask.word 0x1A 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x1C "ETHSW_FES0_FRAMESIZE6R,ETHSW FES port 0 frame size 6 configuration register" hexmask.word 0x1C 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x1E "ETHSW_FES0_FRAMESIZE7R,ETHSW FES port 0 frame size 7 configuration register" hexmask.word 0x1E 0.--10. 1. "FRAMESIZE,Max frame size" group.word 0x200080++0xF line.word 0x0 "ETHSW_FES0_FID_CFG0R,ETHSW FES port 0 filtering identifier configuration register 0" bitfld.word 0x0 14.--15. "FWD_ST7,Port Forwarding state for FID 7" "0,1,2,3" bitfld.word 0x0 12.--13. "FWD_ST6,Port Forwarding state for FID 6" "0,1,2,3" bitfld.word 0x0 10.--11. "FWD_ST5,Port Forwarding state for FID 5" "0,1,2,3" newline bitfld.word 0x0 8.--9. "FWD_ST4,Port Forwarding state for FID 4" "0,1,2,3" bitfld.word 0x0 6.--7. "FWD_ST3,Port Forwarding state for FID 3" "0,1,2,3" bitfld.word 0x0 4.--5. "FWD_ST2,Port Forwarding state for FID 2" "0,1,2,3" newline bitfld.word 0x0 2.--3. "FWD_ST1,Port Forwarding state for FID 1" "0,1,2,3" bitfld.word 0x0 0.--1. "FWD_ST0,Port Forwarding state for FID 0" "B_0x0,B_0x1,B_0x2,?" line.word 0x2 "ETHSW_FES0_FID_CFG1R,ETHSW FES port 0 filtering identifier configuration register 1" bitfld.word 0x2 14.--15. "FWD_ST15,Port Forwarding state for FID 15" "0,1,2,3" bitfld.word 0x2 12.--13. "FWD_ST14,Port Forwarding state for FID 14" "0,1,2,3" bitfld.word 0x2 10.--11. "FWD_ST13,Port Forwarding state for FID 13" "0,1,2,3" newline bitfld.word 0x2 8.--9. "FWD_ST12,Port Forwarding state for FID 12" "0,1,2,3" bitfld.word 0x2 6.--7. "FWD_ST11,Port Forwarding state for FID 11" "0,1,2,3" bitfld.word 0x2 4.--5. "FWD_ST10,Port Forwarding state for FID 10" "0,1,2,3" newline bitfld.word 0x2 2.--3. "FWD_ST9,Port Forwarding state for FID 9" "0,1,2,3" bitfld.word 0x2 0.--1. "FWD_ST8,Port Forwarding state for FID 8" "0,1,2,3" line.word 0x4 "ETHSW_FES0_FID_CFG2R,ETHSW FES port 0 filtering identifier configuration register 2" bitfld.word 0x4 14.--15. "FWD_ST23,Port Forwarding state for FID 23" "0,1,2,3" bitfld.word 0x4 12.--13. "FWD_ST22,Port Forwarding state for FID 22" "0,1,2,3" bitfld.word 0x4 10.--11. "FWD_ST21,Port Forwarding state for FID 21" "0,1,2,3" newline bitfld.word 0x4 8.--9. "FWD_ST20,Port Forwarding state for FID 20" "0,1,2,3" bitfld.word 0x4 6.--7. "FWD_ST19,Port Forwarding state for FID 19" "0,1,2,3" bitfld.word 0x4 4.--5. "FWD_ST18,Port Forwarding state for FID 18" "0,1,2,3" newline bitfld.word 0x4 2.--3. "FWD_ST17,Port Forwarding state for FID 17" "0,1,2,3" bitfld.word 0x4 0.--1. "FWD_ST16,Port Forwarding state for FID 16" "0,1,2,3" line.word 0x6 "ETHSW_FES0_FID_CFG3R,ETHSW FES port 0 filtering identifier configuration register 3" bitfld.word 0x6 14.--15. "FWD_ST31,Port Forwarding state for FID 31" "0,1,2,3" bitfld.word 0x6 12.--13. "FWD_ST30,Port Forwarding state for FID30" "0,1,2,3" bitfld.word 0x6 10.--11. "FWD_ST29,Port Forwarding state for FID 29" "0,1,2,3" newline bitfld.word 0x6 8.--9. "FWD_ST28,Port Forwarding state for FID 28" "0,1,2,3" bitfld.word 0x6 6.--7. "FWD_ST27,Port Forwarding state for FID 27" "0,1,2,3" bitfld.word 0x6 4.--5. "FWD_ST26,Port Forwarding state for FID 26" "0,1,2,3" newline bitfld.word 0x6 2.--3. "FWD_ST25,Port Forwarding state for FID 25" "0,1,2,3" bitfld.word 0x6 0.--1. "FWD_ST24,Port Forwarding state for FID 24" "0,1,2,3" line.word 0x8 "ETHSW_FES0_FID_CFG4R,ETHSW FES port 0 filtering identifier configuration register 4" bitfld.word 0x8 14.--15. "FWD_ST39,Port Forwarding state for FID 39" "0,1,2,3" bitfld.word 0x8 12.--13. "FWD_ST38,Port Forwarding state for FID38" "0,1,2,3" bitfld.word 0x8 10.--11. "FWD_ST37,Port Forwarding state for FID 37" "0,1,2,3" newline bitfld.word 0x8 8.--9. "FWD_ST36,Port Forwarding state for FID 36" "0,1,2,3" bitfld.word 0x8 6.--7. "FWD_ST35,Port Forwarding state for FID 35" "0,1,2,3" bitfld.word 0x8 4.--5. "FWD_ST34,Port Forwarding state for FID 34" "0,1,2,3" newline bitfld.word 0x8 2.--3. "FWD_ST33,Port Forwarding state for FID 33" "0,1,2,3" bitfld.word 0x8 0.--1. "FWD_ST32,Port Forwarding state for FID 32" "0,1,2,3" line.word 0xA "ETHSW_FES0_FID_CFG5R,ETHSW FES port 0 filtering identifier configuration register 5" bitfld.word 0xA 14.--15. "FWD_ST47,Port Forwarding state for FID 47" "0,1,2,3" bitfld.word 0xA 12.--13. "FWD_ST46,Port Forwarding state for FID46" "0,1,2,3" bitfld.word 0xA 10.--11. "FWD_ST45,Port Forwarding state for FID 45" "0,1,2,3" newline bitfld.word 0xA 8.--9. "FWD_ST44,Port Forwarding state for FID 44" "0,1,2,3" bitfld.word 0xA 6.--7. "FWD_ST43,Port Forwarding state for FID 43" "0,1,2,3" bitfld.word 0xA 4.--5. "FWD_ST42,Port Forwarding state for FID 42" "0,1,2,3" newline bitfld.word 0xA 2.--3. "FWD_ST41,Port Forwarding state for FID 41" "0,1,2,3" bitfld.word 0xA 0.--1. "FWD_ST40,Port Forwarding state for FID 40" "0,1,2,3" line.word 0xC "ETHSW_FES0_FID_CFG6R,ETHSW FES port 0 filtering identifier configuration register 6" bitfld.word 0xC 14.--15. "FWD_ST55,Port Forwarding state for FID 55" "0,1,2,3" bitfld.word 0xC 12.--13. "FWD_ST54,Port Forwarding state for FID54" "0,1,2,3" bitfld.word 0xC 10.--11. "FWD_ST53,Port Forwarding state for FID 53" "0,1,2,3" newline bitfld.word 0xC 8.--9. "FWD_ST52,Port Forwarding state for FID 52" "0,1,2,3" bitfld.word 0xC 6.--7. "FWD_ST51,Port Forwarding state for FID 51" "0,1,2,3" bitfld.word 0xC 4.--5. "FWD_ST50,Port Forwarding state for FID 50" "0,1,2,3" newline bitfld.word 0xC 2.--3. "FWD_ST49,Port Forwarding state for FID 49" "0,1,2,3" bitfld.word 0xC 0.--1. "FWD_ST48,Port Forwarding state for FID 48" "0,1,2,3" line.word 0xE "ETHSW_FES0_FID_CFG7R,ETHSW FES port 0 filtering identifier configuration register 7" bitfld.word 0xE 14.--15. "FWD_ST63,Port Forwarding state for FID 63" "0,1,2,3" bitfld.word 0xE 12.--13. "FWD_ST62,Port Forwarding state for FID62" "0,1,2,3" bitfld.word 0xE 10.--11. "FWD_ST61,Port Forwarding state for FID 61" "0,1,2,3" newline bitfld.word 0xE 8.--9. "FWD_ST60,Port Forwarding state for FID 60" "0,1,2,3" bitfld.word 0xE 6.--7. "FWD_ST59,Port Forwarding state for FID 59" "0,1,2,3" bitfld.word 0xE 4.--5. "FWD_ST58,Port Forwarding state for FID 58" "0,1,2,3" newline bitfld.word 0xE 2.--3. "FWD_ST57,Port Forwarding state for FID 57" "0,1,2,3" bitfld.word 0xE 0.--1. "FWD_ST56,Port Forwarding state for FID 56" "0,1,2,3" group.word 0x2000C0++0x3 line.word 0x0 "ETHSW_FES0_FL_CAPTR,ETHSW FES port 0 buffer fill level capture register" bitfld.word 0x0 0. "CAPTURE,Capture" "0,1" line.word 0x2 "ETHSW_FES0_FL_SMPL_CNTR,ETHSW FES port 0 buffer fill level sample counter register" hexmask.word 0x2 0.--15. 1. "FL_SAMPLE_CNT,Sample counter" group.word 0x2000E0++0x1F line.word 0x0 "ETHSW_FES0_FL_Q0_MINR,ETHSW FES port 0 minimum fill level queue 0 register" hexmask.word.byte 0x0 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x2 "ETHSW_FES0_FL_Q1_MINR,ETHSW FES port 0 minimum fill level queue 1 register" hexmask.word.byte 0x2 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x4 "ETHSW_FES0_FL_Q2_MINR,ETHSW FES port 0 minimum fill level queue 2 register" hexmask.word.byte 0x4 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x6 "ETHSW_FES0_FL_Q3_MINR,ETHSW FES port 0 minimum fill level queue 3 register" hexmask.word.byte 0x6 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x8 "ETHSW_FES0_FL_Q4_MINR,ETHSW FES port 0 minimum fill level queue 4 register" hexmask.word.byte 0x8 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0xA "ETHSW_FES0_FL_Q5_MINR,ETHSW FES port 0 minimum fill level queue 5 register" hexmask.word.byte 0xA 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0xC "ETHSW_FES0_FL_Q6_MINR,ETHSW FES port 0 minimum fill level queue 6 register" hexmask.word.byte 0xC 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0xE "ETHSW_FES0_FL_Q7_MINR,ETHSW FES port 0 minimum fill level queue 7 register" hexmask.word.byte 0xE 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x10 "ETHSW_FES0_FL_Q0_MAXR,ETHSW FES port 0 maximum fill level queue 0 register" hexmask.word.byte 0x10 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x12 "ETHSW_FES0_FL_Q1_MAXR,ETHSW FES port 0 maximum fill level queue 1 register" hexmask.word.byte 0x12 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x14 "ETHSW_FES0_FL_Q2_MAXR,ETHSW FES port 0 maximum fill level queue 2 register" hexmask.word.byte 0x14 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x16 "ETHSW_FES0_FL_Q3_MAXR,ETHSW FES port 0 maximum fill level queue 3 register" hexmask.word.byte 0x16 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x18 "ETHSW_FES0_FL_Q4_MAXR,ETHSW FES port 0 maximum fill level queue 4 register" hexmask.word.byte 0x18 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x1A "ETHSW_FES0_FL_Q5_MAXR,ETHSW FES port 0 maximum fill level queue 5 register" hexmask.word.byte 0x1A 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x1C "ETHSW_FES0_FL_Q6_MAXR,ETHSW FES port 0 maximum fill level queue 6 register" hexmask.word.byte 0x1C 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x1E "ETHSW_FES0_FL_Q7_MAXR,ETHSW FES port 0 maximum fill level queue 7 register" hexmask.word.byte 0x1E 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" group.word 0x204000++0x5 line.word 0x0 "ETHSW_FES0_PTP_RX_SYNCD_SNSR,ETHSW FES PTP RX sync delay subnanosecond register" hexmask.word 0x0 0.--15. 1. "PTP_RX_SYNC_DELAY_SUBNS,RX Sync delay subnanoseconds" line.word 0x2 "ETHSW_FES0_PTP_RX_SYNCD_NSLR,ETHSW FES PTP RX sync delay nanosecond low register" hexmask.word 0x2 0.--15. 1. "PTP_RX_SYNC_DELAY_NSL,RX Sync delay nanoseconds low part" line.word 0x4 "ETHSW_FES0_PTP_RX_SYNCD_NSHR,ETHSW FES PTP RX sync delay nanosecond high register" hexmask.word.byte 0x4 0.--7. 1. "PTP_RX_SYNC_DELAY_NSH,RX Sync delay nanoseconds high part" group.word 0x204008++0x3 line.word 0x0 "ETHSW_FES0_PTP_RX_EVENTD_SNSR,ETHSW FES PTP RX event delay subnanosecond register" hexmask.word 0x0 0.--15. 1. "PTP_RX_EVENT_DELAY_SNS,RX Event delay subnanoseconds" line.word 0x2 "ETHSW_FES0_PTP_RX_EVENTD_NSR,ETHSW FES PTP RX event delay nanosecond register" hexmask.word 0x2 0.--15. 1. "PTP_RX_EVENT_DELAY_NS,RX Event delay nanoseconds" group.word 0x204010++0x3 line.word 0x0 "ETHSW_FES0_PTP_TX_EVENTD_SNSR,ETHSW FES PTP TX event delay subnanosecond register" hexmask.word 0x0 0.--15. 1. "PTP_TX_EVENT_DELAY_SNS,TX Event delay subnanoseconds" line.word 0x2 "ETHSW_FES0_PTP_TX_EVENTD_NSR,ETHSW FES PTP TX event delay nanosecond register" hexmask.word 0x2 0.--15. 1. "PTP_TX_EVENT_DELAY_NS,TX Event delay nanoseconds" group.word 0x206000++0x3 line.word 0x0 "ETHSW_FES0_CNT_CTRLR,ETHSW FES port 0 counter control register" bitfld.word 0x0 12. "CPT_CNT_GRP5,Capture counter group 5" "B_0x0,B_0x1" bitfld.word 0x0 10. "CPT_CNT_GRP3,Capture counter group 3" "B_0x0,B_0x1" bitfld.word 0x0 8. "CPT_CNT_GRP1,Capture counter group 1" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "CAPTURE,Capture" "0,1" line.word 0x2 "ETHSW_FES0_CNT_CMDR,ETHSW FES port 0 counter command register" bitfld.word 0x2 15. "TRANSFER,Transfer" "0,1" hexmask.word.byte 0x2 0.--5. 1. "CNT_NUM,Counter number" group.word 0x206008++0x3 line.word 0x0 "ETHSW_FES0_CNT_VAL_LOR,ETHSW FES port 0 counter value low register" hexmask.word 0x0 0.--15. 1. "CNT_VAL_LO,Counter value Low" line.word 0x2 "ETHSW_FES0_CNT_VAL_HIR,ETHSW FES port 0 counter value high register" hexmask.word 0x2 0.--15. 1. "CNT_VAL_HI,Counter value High" group.word 0x208000++0x1 line.word 0x0 "ETHSW_FES0_IPO_CMDR,ETHSW FES port 0 IPO command register" bitfld.word 0x0 15. "TRANSFER,Transfer" "0,1" bitfld.word 0x0 14. "RD_WR,Read/write" "B_0x0,B_0x1" hexmask.word.byte 0x0 0.--3. 1. "IPO_FIL_NUM,IPO Filter Number" group.word 0x208010++0xD line.word 0x0 "ETHSW_FES0_ETH_ADDR_CFG0R,ETHSW FES port 0 IPO filter configuration register 0" bitfld.word 0x0 15. "NEW_PRI_LSB,New priority LSB" "0,1" bitfld.word 0x0 14. "PRES_PRI,Preserve priority" "B_0x0,B_0x1" bitfld.word 0x0 12.--13. "NEW_PRI_MSB,New priority MSBs" "0,1,2,3" newline bitfld.word 0x0 9. "POL_PRIO,Policer priority" "B_0x0,B_0x1" hexmask.word.byte 0x0 2.--7. 1. "CMP_LENGTH,Compared Length" bitfld.word 0x0 1. "SRC_DST_MATCH,Source/Destination Match" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "ENABLE,Enable" "B_0x0,B_0x1" line.word 0x2 "ETHSW_FES0_ETH_ADDR_FWD_ALLOWR,ETHSW FES port 0 forward allow register" bitfld.word 0x2 0.--2. "FWD_ALLOW_MSK,Forward allow mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x4 "ETHSW_FES0_ETH_ADDR_FWD_MIRRORR,ETHSW FES port 0 forward mirror register" bitfld.word 0x4 0.--2. "FWD_MIRROR_MSK,Forward mirror mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x6 "ETHSW_FES0_ETH_ADDR_CFG1R,ETHSW FES port 0 IPO filter configuration register 1" bitfld.word 0x6 15. "CT_DIS,Cut-Through disable" "B_0x0,B_0x1" bitfld.word 0x6 14. "CMP_ORDER,Compare Order" "B_0x0,B_0x1" bitfld.word 0x6 12. "IPO_MARK,IPO Mark" "0,1" newline hexmask.word.byte 0x6 0.--6. 1. "POLICER,Policer" line.word 0x8 "ETHSW_FES0_ETH_ADDR_0R,ETHSW FES port 0 ethernet address part 0 register" hexmask.word.byte 0x8 8.--15. 1. "OCTET_2,2less thansup>ndless than/sup> octet" hexmask.word.byte 0x8 0.--7. 1. "OCTET_1,1less thansup>stless than/sup> octet" line.word 0xA "ETHSW_FES0_ETH_ADDR_1R,ETHSW FES port 0 ethernet address part 1 register" hexmask.word.byte 0xA 8.--15. 1. "OCTET_4,4less thansup>thless than/sup> octet" hexmask.word.byte 0xA 0.--7. 1. "OCTET_3,3less thansup>rdless than/sup> octet" line.word 0xC "ETHSW_FES0_ETH_ADDR_2R,ETHSW FES port 0 ethernet address part 2 register" hexmask.word.byte 0xC 8.--15. 1. "OCTET_6,6less thansup>thless than/sup> octet" hexmask.word.byte 0xC 0.--7. 1. "OCTET_5,5less thansup>thless than/sup> octet" group.word 0x210000++0x1 line.word 0x0 "ETHSW_FES1_PORT_STATER,ETHSW FES port 1 port State register" bitfld.word 0x0 15. "RX_CT,RX Cut-through" "B_0x0,B_0x1" bitfld.word 0x0 14. "FB_STF,Fallback to Store-and-Forward" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "SPEED_SEL,Speed select" "?,B_0x1,B_0x2,B_0x3" newline bitfld.word 0x0 4.--5. "HW_MODE,Port HW mode" "B_0x0,?,B_0x2,?" bitfld.word 0x0 2.--3. "MGMT_ST,Port management state" "B_0x0,B_0x1,?,?" bitfld.word 0x0 0.--1. "FWD_ST,Port Forwarding state" "B_0x0,?,B_0x2,?" group.word 0x210010++0xF line.word 0x0 "ETHSW_FES1_VLAN0R,ETHSW FES port 1 port VLAN configuration register 0" bitfld.word 0x0 15. "TGD_UTGD,Tagged/untagged" "B_0x0,B_0x1" bitfld.word 0x0 12.--14. "PD_PCP,Port default PCP" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--11. 1. "PD_VLAN,Port default VLAN" line.word 0x2 "ETHSW_FES1_VLAN1R,ETHSW FES port 1 port VLAN configuration register 1" bitfld.word 0x2 15. "USE_DEI,Use_DEI" "B_0x0,B_0x1" hexmask.word 0x2 0.--11. 1. "VLAN_PRIF,Default VLAN for Priority Tagged Frames" line.word 0x4 "ETHSW_FES1_FWDM_CFGR,ETHSW FES port 1 port forward mask configuration register" bitfld.word 0x4 0.--2. "PORT_FWDM,Port forward mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x6 "ETHSW_FES1_PRIO_REGENLR,ETHSW FES port 1 priority regeneration table low register" bitfld.word 0x6 12.--14. "PCP3,Priority PCP3" "0,1,2,3,4,5,6,7" bitfld.word 0x6 8.--10. "PCP2,Priority PCP2" "0,1,2,3,4,5,6,7" bitfld.word 0x6 4.--6. "PCP1,Priority PCP1" "0,1,2,3,4,5,6,7" newline bitfld.word 0x6 0.--2. "PCP0,Priority PCP0" "0,1,2,3,4,5,6,7" line.word 0x8 "ETHSW_FES1_PRIO_REGENHR,ETHSW FES port 1 priority regeneration table high register" bitfld.word 0x8 12.--14. "PCP7,Priority PCP7" "0,1,2,3,4,5,6,7" bitfld.word 0x8 8.--10. "PCP6,Priority PCP6" "0,1,2,3,4,5,6,7" bitfld.word 0x8 4.--6. "PCP5,Priority PCP5" "0,1,2,3,4,5,6,7" newline bitfld.word 0x8 0.--2. "PCP4,Priority PCP4" "0,1,2,3,4,5,6,7" line.word 0xA "ETHSW_FES1_TX_CTER,ETHSW FES port 1 TX cut-through enable register" bitfld.word 0xA 7. "CTE7,Cut-through enable/disable for queue 7" "0,1" bitfld.word 0xA 6. "CTE6,Cut-through enable/disable for queue 6" "0,1" bitfld.word 0xA 5. "CTE5,Cut-through enable/disable for queue 5" "0,1" newline bitfld.word 0xA 4. "CTE4,Cut-through enable/disable for queue 4" "0,1" bitfld.word 0xA 3. "CTE3,Cut-through enable/disable for queue 3" "0,1" bitfld.word 0xA 2. "CTE2,Cut-through enable/disable for queue 2" "0,1" newline bitfld.word 0xA 1. "CTE1,Cut-through enable/disable for queue 1" "0,1" bitfld.word 0xA 0. "CTE0,Cut-through enable/disable for queue 0" "B_0x0,B_0x1" line.word 0xC "ETHSW_FES1_TX_PREE0R,ETHSW FES port 1 TX preemptable traffic selection register 0" bitfld.word 0xC 7. "PREE7,Preemption setting for queue 7" "0,1" bitfld.word 0xC 6. "PREE6,Preemption setting for queue 6" "0,1" bitfld.word 0xC 5. "PREE5,Preemption setting for queue 5" "0,1" newline bitfld.word 0xC 4. "PREE4,Preemption setting for queue 4" "0,1" bitfld.word 0xC 3. "PREE3,Preemption setting for queue 3" "0,1" bitfld.word 0xC 2. "PREE2,Preemption setting for queue 2" "0,1" newline bitfld.word 0xC 1. "PREE1,Preemption setting for queue 1" "0,1" bitfld.word 0xC 0. "PREE0,Preemption setting for queue 0" "B_0x0,B_0x1" line.word 0xE "ETHSW_FES1_TX_PREE1R,ETHSW FES port 1 TX preemptable traffic selection register 1" bitfld.word 0xE 0.--1. "ADDFRAGSIZE,AddFragSize" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x210020++0x3 line.long 0x0 "ETHSW_FES1_QUEUE_TBLR,ETHSW FES port 1 queue table configuration register" bitfld.long 0x0 28.--30. "QUEUE_PRI7,Queue for priority 7" "0,1,2,3,4,5,6,7" bitfld.long 0x0 24.--26. "QUEUE_PRI6,Queue for priority 6" "0,1,2,3,4,5,6,7" bitfld.long 0x0 20.--22. "QUEUE_PRI5,Queue for priority 5" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16.--18. "QUEUE_PRI4,Queue for priority 4" "0,1,2,3,4,5,6,7" bitfld.long 0x0 12.--14. "QUEUE_PRI3,Queue for priority 3" "0,1,2,3,4,5,6,7" bitfld.long 0x0 8.--10. "QUEUE_PRI2,Queue for priority 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4.--6. "QUEUE_PRI1,Queue for priority 1" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "QUEUE_PRI0,Queue for priority 0" "0,1,2,3,4,5,6,7" group.word 0x210030++0x1F line.word 0x0 "ETHSW_FES1_SHAPER0R,ETHSW FES port 1 shaper 0 configuration register" hexmask.word 0x0 0.--15. 1. "ADDEND,Addend" line.word 0x2 "ETHSW_FES1_SHAPER1R,ETHSW FES port 1 shaper 1 configuration register" hexmask.word 0x2 0.--15. 1. "ADDEND,Addend" line.word 0x4 "ETHSW_FES1_SHAPER2R,ETHSW FES port 1 shaper 2 configuration register" hexmask.word 0x4 0.--15. 1. "ADDEND,Addend" line.word 0x6 "ETHSW_FES1_SHAPER3R,ETHSW FES port 1 shaper 3 configuration register" hexmask.word 0x6 0.--15. 1. "ADDEND,Addend" line.word 0x8 "ETHSW_FES1_SHAPER4R,ETHSW FES port 1 shaper 4 configuration register" hexmask.word 0x8 0.--15. 1. "ADDEND,Addend" line.word 0xA "ETHSW_FES1_SHAPER5R,ETHSW FES port 1 shaper 5 configuration register" hexmask.word 0xA 0.--15. 1. "ADDEND,Addend" line.word 0xC "ETHSW_FES1_SHAPER6R,ETHSW FES port 1 shaper 6 configuration register" hexmask.word 0xC 0.--15. 1. "ADDEND,Addend" line.word 0xE "ETHSW_FES1_SHAPER7R,ETHSW FES port 1 shaper 7 configuration register" hexmask.word 0xE 0.--15. 1. "ADDEND,Addend" line.word 0x10 "ETHSW_FES1_FRAMESIZE0R,ETHSW FES port 1 frame size 0 configuration register" hexmask.word 0x10 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x12 "ETHSW_FES1_FRAMESIZE1R,ETHSW FES port 1 frame size 1 configuration register" hexmask.word 0x12 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x14 "ETHSW_FES1_FRAMESIZE2R,ETHSW FES port 1 frame size 2 configuration register" hexmask.word 0x14 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x16 "ETHSW_FES1_FRAMESIZE3R,ETHSW FES port 1 frame size 3 configuration register" hexmask.word 0x16 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x18 "ETHSW_FES1_FRAMESIZE4R,ETHSW FES port 1 frame size 4 configuration register" hexmask.word 0x18 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x1A "ETHSW_FES1_FRAMESIZE5R,ETHSW FES port 1 frame size 5 configuration register" hexmask.word 0x1A 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x1C "ETHSW_FES1_FRAMESIZE6R,ETHSW FES port 1 frame size 6 configuration register" hexmask.word 0x1C 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x1E "ETHSW_FES1_FRAMESIZE7R,ETHSW FES port 1 frame size 7 configuration register" hexmask.word 0x1E 0.--10. 1. "FRAMESIZE,Max frame size" group.word 0x210080++0xF line.word 0x0 "ETHSW_FES1_FID_CFG0R,ETHSW FES port 1 filtering identifier configuration register 0" bitfld.word 0x0 14.--15. "FWD_ST7,Port Forwarding state for FID 7" "0,1,2,3" bitfld.word 0x0 12.--13. "FWD_ST6,Port Forwarding state for FID 6" "0,1,2,3" bitfld.word 0x0 10.--11. "FWD_ST5,Port Forwarding state for FID 5" "0,1,2,3" newline bitfld.word 0x0 8.--9. "FWD_ST4,Port Forwarding state for FID 4" "0,1,2,3" bitfld.word 0x0 6.--7. "FWD_ST3,Port Forwarding state for FID 3" "0,1,2,3" bitfld.word 0x0 4.--5. "FWD_ST2,Port Forwarding state for FID 2" "0,1,2,3" newline bitfld.word 0x0 2.--3. "FWD_ST1,Port Forwarding state for FID 1" "0,1,2,3" bitfld.word 0x0 0.--1. "FWD_ST0,Port Forwarding state for FID 0" "B_0x0,B_0x1,B_0x2,?" line.word 0x2 "ETHSW_FES1_FID_CFG1R,ETHSW FES port 1 filtering identifier configuration register 1" bitfld.word 0x2 14.--15. "FWD_ST15,Port Forwarding state for FID 15" "0,1,2,3" bitfld.word 0x2 12.--13. "FWD_ST14,Port Forwarding state for FID 14" "0,1,2,3" bitfld.word 0x2 10.--11. "FWD_ST13,Port Forwarding state for FID 13" "0,1,2,3" newline bitfld.word 0x2 8.--9. "FWD_ST12,Port Forwarding state for FID 12" "0,1,2,3" bitfld.word 0x2 6.--7. "FWD_ST11,Port Forwarding state for FID 11" "0,1,2,3" bitfld.word 0x2 4.--5. "FWD_ST10,Port Forwarding state for FID 10" "0,1,2,3" newline bitfld.word 0x2 2.--3. "FWD_ST9,Port Forwarding state for FID 9" "0,1,2,3" bitfld.word 0x2 0.--1. "FWD_ST8,Port Forwarding state for FID 8" "0,1,2,3" line.word 0x4 "ETHSW_FES1_FID_CFG2R,ETHSW FES port 1 filtering identifier configuration register 2" bitfld.word 0x4 14.--15. "FWD_ST23,Port Forwarding state for FID 23" "0,1,2,3" bitfld.word 0x4 12.--13. "FWD_ST22,Port Forwarding state for FID 22" "0,1,2,3" bitfld.word 0x4 10.--11. "FWD_ST21,Port Forwarding state for FID 21" "0,1,2,3" newline bitfld.word 0x4 8.--9. "FWD_ST20,Port Forwarding state for FID 20" "0,1,2,3" bitfld.word 0x4 6.--7. "FWD_ST19,Port Forwarding state for FID 19" "0,1,2,3" bitfld.word 0x4 4.--5. "FWD_ST18,Port Forwarding state for FID 18" "0,1,2,3" newline bitfld.word 0x4 2.--3. "FWD_ST17,Port Forwarding state for FID 17" "0,1,2,3" bitfld.word 0x4 0.--1. "FWD_ST16,Port Forwarding state for FID 16" "0,1,2,3" line.word 0x6 "ETHSW_FES1_FID_CFG3R,ETHSW FES port 1 filtering identifier configuration register 3" bitfld.word 0x6 14.--15. "FWD_ST31,Port Forwarding state for FID 31" "0,1,2,3" bitfld.word 0x6 12.--13. "FWD_ST30,Port Forwarding state for FID30" "0,1,2,3" bitfld.word 0x6 10.--11. "FWD_ST29,Port Forwarding state for FID 29" "0,1,2,3" newline bitfld.word 0x6 8.--9. "FWD_ST28,Port Forwarding state for FID 28" "0,1,2,3" bitfld.word 0x6 6.--7. "FWD_ST27,Port Forwarding state for FID 27" "0,1,2,3" bitfld.word 0x6 4.--5. "FWD_ST26,Port Forwarding state for FID 26" "0,1,2,3" newline bitfld.word 0x6 2.--3. "FWD_ST25,Port Forwarding state for FID 25" "0,1,2,3" bitfld.word 0x6 0.--1. "FWD_ST24,Port Forwarding state for FID 24" "0,1,2,3" line.word 0x8 "ETHSW_FES1_FID_CFG4R,ETHSW FES port 1 filtering identifier configuration register 4" bitfld.word 0x8 14.--15. "FWD_ST39,Port Forwarding state for FID 39" "0,1,2,3" bitfld.word 0x8 12.--13. "FWD_ST38,Port Forwarding state for FID38" "0,1,2,3" bitfld.word 0x8 10.--11. "FWD_ST37,Port Forwarding state for FID 37" "0,1,2,3" newline bitfld.word 0x8 8.--9. "FWD_ST36,Port Forwarding state for FID 36" "0,1,2,3" bitfld.word 0x8 6.--7. "FWD_ST35,Port Forwarding state for FID 35" "0,1,2,3" bitfld.word 0x8 4.--5. "FWD_ST34,Port Forwarding state for FID 34" "0,1,2,3" newline bitfld.word 0x8 2.--3. "FWD_ST33,Port Forwarding state for FID 33" "0,1,2,3" bitfld.word 0x8 0.--1. "FWD_ST32,Port Forwarding state for FID 32" "0,1,2,3" line.word 0xA "ETHSW_FES1_FID_CFG5R,ETHSW FES port 1 filtering identifier configuration register 5" bitfld.word 0xA 14.--15. "FWD_ST47,Port Forwarding state for FID 47" "0,1,2,3" bitfld.word 0xA 12.--13. "FWD_ST46,Port Forwarding state for FID46" "0,1,2,3" bitfld.word 0xA 10.--11. "FWD_ST45,Port Forwarding state for FID 45" "0,1,2,3" newline bitfld.word 0xA 8.--9. "FWD_ST44,Port Forwarding state for FID 44" "0,1,2,3" bitfld.word 0xA 6.--7. "FWD_ST43,Port Forwarding state for FID 43" "0,1,2,3" bitfld.word 0xA 4.--5. "FWD_ST42,Port Forwarding state for FID 42" "0,1,2,3" newline bitfld.word 0xA 2.--3. "FWD_ST41,Port Forwarding state for FID 41" "0,1,2,3" bitfld.word 0xA 0.--1. "FWD_ST40,Port Forwarding state for FID 40" "0,1,2,3" line.word 0xC "ETHSW_FES1_FID_CFG6R,ETHSW FES port 1 filtering identifier configuration register 6" bitfld.word 0xC 14.--15. "FWD_ST55,Port Forwarding state for FID 55" "0,1,2,3" bitfld.word 0xC 12.--13. "FWD_ST54,Port Forwarding state for FID54" "0,1,2,3" bitfld.word 0xC 10.--11. "FWD_ST53,Port Forwarding state for FID 53" "0,1,2,3" newline bitfld.word 0xC 8.--9. "FWD_ST52,Port Forwarding state for FID 52" "0,1,2,3" bitfld.word 0xC 6.--7. "FWD_ST51,Port Forwarding state for FID 51" "0,1,2,3" bitfld.word 0xC 4.--5. "FWD_ST50,Port Forwarding state for FID 50" "0,1,2,3" newline bitfld.word 0xC 2.--3. "FWD_ST49,Port Forwarding state for FID 49" "0,1,2,3" bitfld.word 0xC 0.--1. "FWD_ST48,Port Forwarding state for FID 48" "0,1,2,3" line.word 0xE "ETHSW_FES1_FID_CFG7R,ETHSW FES port 1 filtering identifier configuration register 7" bitfld.word 0xE 14.--15. "FWD_ST63,Port Forwarding state for FID 63" "0,1,2,3" bitfld.word 0xE 12.--13. "FWD_ST62,Port Forwarding state for FID62" "0,1,2,3" bitfld.word 0xE 10.--11. "FWD_ST61,Port Forwarding state for FID 61" "0,1,2,3" newline bitfld.word 0xE 8.--9. "FWD_ST60,Port Forwarding state for FID 60" "0,1,2,3" bitfld.word 0xE 6.--7. "FWD_ST59,Port Forwarding state for FID 59" "0,1,2,3" bitfld.word 0xE 4.--5. "FWD_ST58,Port Forwarding state for FID 58" "0,1,2,3" newline bitfld.word 0xE 2.--3. "FWD_ST57,Port Forwarding state for FID 57" "0,1,2,3" bitfld.word 0xE 0.--1. "FWD_ST56,Port Forwarding state for FID 56" "0,1,2,3" group.word 0x2100C0++0x3 line.word 0x0 "ETHSW_FES1_FL_CAPTR,ETHSW FES port 1 buffer fill level capture register" bitfld.word 0x0 0. "CAPTURE,Capture" "0,1" line.word 0x2 "ETHSW_FES1_FL_SMPL_CNTR,ETHSW FES port 1 buffer fill level sample counter register" hexmask.word 0x2 0.--15. 1. "FL_SAMPLE_CNT,Sample counter" group.word 0x2100E0++0x1F line.word 0x0 "ETHSW_FES1_FL_Q0_MINR,ETHSW FES port 1 minimum fill level queue 0 register" hexmask.word.byte 0x0 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x2 "ETHSW_FES1_FL_Q1_MINR,ETHSW FES port 1 minimum fill level queue 1 register" hexmask.word.byte 0x2 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x4 "ETHSW_FES1_FL_Q2_MINR,ETHSW FES port 1 minimum fill level queue 2 register" hexmask.word.byte 0x4 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x6 "ETHSW_FES1_FL_Q3_MINR,ETHSW FES port 1 minimum fill level queue 3 register" hexmask.word.byte 0x6 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x8 "ETHSW_FES1_FL_Q4_MINR,ETHSW FES port 1 minimum fill level queue 4 register" hexmask.word.byte 0x8 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0xA "ETHSW_FES1_FL_Q5_MINR,ETHSW FES port 1 minimum fill level queue 5 register" hexmask.word.byte 0xA 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0xC "ETHSW_FES1_FL_Q6_MINR,ETHSW FES port 1 minimum fill level queue 6 register" hexmask.word.byte 0xC 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0xE "ETHSW_FES1_FL_Q7_MINR,ETHSW FES port 1 minimum fill level queue 7 register" hexmask.word.byte 0xE 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x10 "ETHSW_FES1_FL_Q0_MAXR,ETHSW FES port 1 maximum fill level queue 0 register" hexmask.word.byte 0x10 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x12 "ETHSW_FES1_FL_Q1_MAXR,ETHSW FES port 1 maximum fill level queue 1 register" hexmask.word.byte 0x12 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x14 "ETHSW_FES1_FL_Q2_MAXR,ETHSW FES port 1 maximum fill level queue 2 register" hexmask.word.byte 0x14 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x16 "ETHSW_FES1_FL_Q3_MAXR,ETHSW FES port 1 maximum fill level queue 3 register" hexmask.word.byte 0x16 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x18 "ETHSW_FES1_FL_Q4_MAXR,ETHSW FES port 1 maximum fill level queue 4 register" hexmask.word.byte 0x18 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x1A "ETHSW_FES1_FL_Q5_MAXR,ETHSW FES port 1 maximum fill level queue 5 register" hexmask.word.byte 0x1A 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x1C "ETHSW_FES1_FL_Q6_MAXR,ETHSW FES port 1 maximum fill level queue 6 register" hexmask.word.byte 0x1C 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x1E "ETHSW_FES1_FL_Q7_MAXR,ETHSW FES port 1 maximum fill level queue 7 register" hexmask.word.byte 0x1E 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" group.word 0x214000++0x5 line.word 0x0 "ETHSW_FES1_PTP_RX_SYNCD_SNSR,ETHSW FES PTP RX sync delay subnanosecond register" hexmask.word 0x0 0.--15. 1. "PTP_RX_SYNC_DELAY_SUBNS,RX Sync delay subnanoseconds" line.word 0x2 "ETHSW_FES1_PTP_RX_SYNCD_NSLR,ETHSW FES PTP RX sync delay nanosecond low register" hexmask.word 0x2 0.--15. 1. "PTP_RX_SYNC_DELAY_NSL,RX Sync delay nanoseconds low part" line.word 0x4 "ETHSW_FES1_PTP_RX_SYNCD_NSHR,ETHSW FES PTP RX sync delay nanosecond high register" hexmask.word.byte 0x4 0.--7. 1. "PTP_RX_SYNC_DELAY_NSH,RX Sync delay nanoseconds high part" group.word 0x214008++0x3 line.word 0x0 "ETHSW_FES1_PTP_RX_EVENTD_SNSR,ETHSW FES PTP RX event delay subnanosecond register" hexmask.word 0x0 0.--15. 1. "PTP_RX_EVENT_DELAY_SNS,RX Event delay subnanoseconds" line.word 0x2 "ETHSW_FES1_PTP_RX_EVENTD_NSR,ETHSW FES PTP RX event delay nanosecond register" hexmask.word 0x2 0.--15. 1. "PTP_RX_EVENT_DELAY_NS,RX Event delay nanoseconds" group.word 0x214010++0x3 line.word 0x0 "ETHSW_FES1_PTP_TX_EVENTD_SNSR,ETHSW FES PTP TX event delay subnanosecond register" hexmask.word 0x0 0.--15. 1. "PTP_TX_EVENT_DELAY_SNS,TX Event delay subnanoseconds" line.word 0x2 "ETHSW_FES1_PTP_TX_EVENTD_NSR,ETHSW FES PTP TX event delay nanosecond register" hexmask.word 0x2 0.--15. 1. "PTP_TX_EVENT_DELAY_NS,TX Event delay nanoseconds" group.word 0x216000++0x3 line.word 0x0 "ETHSW_FES1_CNT_CTRLR,ETHSW FES port 1 counter control register" bitfld.word 0x0 12. "CPT_CNT_GRP5,Capture counter group 5" "B_0x0,B_0x1" bitfld.word 0x0 10. "CPT_CNT_GRP3,Capture counter group 3" "B_0x0,B_0x1" bitfld.word 0x0 8. "CPT_CNT_GRP1,Capture counter group 1" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "CAPTURE,Capture" "0,1" line.word 0x2 "ETHSW_FES1_CNT_CMDR,ETHSW FES port 1 counter command register" bitfld.word 0x2 15. "TRANSFER,Transfer" "0,1" hexmask.word.byte 0x2 0.--5. 1. "CNT_NUM,Counter number" group.word 0x216008++0x3 line.word 0x0 "ETHSW_FES1_CNT_VAL_LOR,ETHSW FES port 1 counter value low register" hexmask.word 0x0 0.--15. 1. "CNT_VAL_LO,Counter value Low" line.word 0x2 "ETHSW_FES1_CNT_VAL_HIR,ETHSW FES port 1 counter value high register" hexmask.word 0x2 0.--15. 1. "CNT_VAL_HI,Counter value High" group.word 0x218000++0x1 line.word 0x0 "ETHSW_FES1_IPO_CMDR,ETHSW FES port 1 IPO command register" bitfld.word 0x0 15. "TRANSFER,Transfer" "0,1" bitfld.word 0x0 14. "RD_WR,Read/write" "B_0x0,B_0x1" hexmask.word.byte 0x0 0.--3. 1. "IPO_FIL_NUM,IPO Filter Number" group.word 0x218010++0xD line.word 0x0 "ETHSW_FES1_ETH_ADDR_CFG0R,ETHSW FES port 1 IPO filter configuration register 0" bitfld.word 0x0 15. "NEW_PRI_LSB,New priority LSB" "0,1" bitfld.word 0x0 14. "PRES_PRI,Preserve priority" "B_0x0,B_0x1" bitfld.word 0x0 12.--13. "NEW_PRI_MSB,New priority MSBs" "0,1,2,3" newline bitfld.word 0x0 9. "POL_PRIO,Policer priority" "B_0x0,B_0x1" hexmask.word.byte 0x0 2.--7. 1. "CMP_LENGTH,Compared Length" bitfld.word 0x0 1. "SRC_DST_MATCH,Source/Destination Match" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "ENABLE,Enable" "B_0x0,B_0x1" line.word 0x2 "ETHSW_FES1_ETH_ADDR_FWD_ALLOWR,ETHSW FES port 1 forward allow register" bitfld.word 0x2 0.--2. "FWD_ALLOW_MSK,Forward allow mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x4 "ETHSW_FES1_ETH_ADDR_FWD_MIRRORR,ETHSW FES port 1 forward mirror register" bitfld.word 0x4 0.--2. "FWD_MIRROR_MSK,Forward mirror mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x6 "ETHSW_FES1_ETH_ADDR_CFG1R,ETHSW FES port 1 IPO filter configuration register 1" bitfld.word 0x6 15. "CT_DIS,Cut-Through disable" "B_0x0,B_0x1" bitfld.word 0x6 14. "CMP_ORDER,Compare Order" "B_0x0,B_0x1" bitfld.word 0x6 12. "IPO_MARK,IPO Mark" "0,1" newline hexmask.word.byte 0x6 0.--6. 1. "POLICER,Policer" line.word 0x8 "ETHSW_FES1_ETH_ADDR_0R,ETHSW FES port 1 ethernet address part 0 register" hexmask.word.byte 0x8 8.--15. 1. "OCTET_2,2less thansup>ndless than/sup> octet" hexmask.word.byte 0x8 0.--7. 1. "OCTET_1,1less thansup>stless than/sup> octet" line.word 0xA "ETHSW_FES1_ETH_ADDR_1R,ETHSW FES port 1 ethernet address part 1 register" hexmask.word.byte 0xA 8.--15. 1. "OCTET_4,4less thansup>thless than/sup> octet" hexmask.word.byte 0xA 0.--7. 1. "OCTET_3,3less thansup>rdless than/sup> octet" line.word 0xC "ETHSW_FES1_ETH_ADDR_2R,ETHSW FES port 1 ethernet address part 2 register" hexmask.word.byte 0xC 8.--15. 1. "OCTET_6,6less thansup>thless than/sup> octet" hexmask.word.byte 0xC 0.--7. 1. "OCTET_5,5less thansup>thless than/sup> octet" group.word 0x220000++0x1 line.word 0x0 "ETHSW_FES2_PORT_STATER,ETHSW FES port 2 port State register" bitfld.word 0x0 15. "RX_CT,RX Cut-through" "B_0x0,B_0x1" bitfld.word 0x0 14. "FB_STF,Fallback to Store-and-Forward" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "SPEED_SEL,Speed select" "?,B_0x1,B_0x2,B_0x3" newline bitfld.word 0x0 4.--5. "HW_MODE,Port HW mode" "B_0x0,?,B_0x2,?" bitfld.word 0x0 2.--3. "MGMT_ST,Port management state" "B_0x0,B_0x1,?,?" bitfld.word 0x0 0.--1. "FWD_ST,Port Forwarding state" "B_0x0,?,B_0x2,?" group.word 0x220010++0xF line.word 0x0 "ETHSW_FES2_VLAN0R,ETHSW FES port 2 port VLAN configuration register 0" bitfld.word 0x0 15. "TGD_UTGD,Tagged/untagged" "B_0x0,B_0x1" bitfld.word 0x0 12.--14. "PD_PCP,Port default PCP" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--11. 1. "PD_VLAN,Port default VLAN" line.word 0x2 "ETHSW_FES2_VLAN1R,ETHSW FES port 2 port VLAN configuration register 1" bitfld.word 0x2 15. "USE_DEI,Use_DEI" "B_0x0,B_0x1" hexmask.word 0x2 0.--11. 1. "VLAN_PRIF,Default VLAN for Priority Tagged Frames" line.word 0x4 "ETHSW_FES2_FWDM_CFGR,ETHSW FES port 2 port forward mask configuration register" bitfld.word 0x4 0.--2. "PORT_FWDM,Port forward mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x6 "ETHSW_FES2_PRIO_REGENLR,ETHSW FES port 2 priority regeneration table low register" bitfld.word 0x6 12.--14. "PCP3,Priority PCP3" "0,1,2,3,4,5,6,7" bitfld.word 0x6 8.--10. "PCP2,Priority PCP2" "0,1,2,3,4,5,6,7" bitfld.word 0x6 4.--6. "PCP1,Priority PCP1" "0,1,2,3,4,5,6,7" newline bitfld.word 0x6 0.--2. "PCP0,Priority PCP0" "0,1,2,3,4,5,6,7" line.word 0x8 "ETHSW_FES2_PRIO_REGENHR,ETHSW FES port 2 priority regeneration table high register" bitfld.word 0x8 12.--14. "PCP7,Priority PCP7" "0,1,2,3,4,5,6,7" bitfld.word 0x8 8.--10. "PCP6,Priority PCP6" "0,1,2,3,4,5,6,7" bitfld.word 0x8 4.--6. "PCP5,Priority PCP5" "0,1,2,3,4,5,6,7" newline bitfld.word 0x8 0.--2. "PCP4,Priority PCP4" "0,1,2,3,4,5,6,7" line.word 0xA "ETHSW_FES2_TX_CTER,ETHSW FES port 2 TX cut-through enable register" bitfld.word 0xA 7. "CTE7,Cut-through enable/disable for queue 7" "0,1" bitfld.word 0xA 6. "CTE6,Cut-through enable/disable for queue 6" "0,1" bitfld.word 0xA 5. "CTE5,Cut-through enable/disable for queue 5" "0,1" newline bitfld.word 0xA 4. "CTE4,Cut-through enable/disable for queue 4" "0,1" bitfld.word 0xA 3. "CTE3,Cut-through enable/disable for queue 3" "0,1" bitfld.word 0xA 2. "CTE2,Cut-through enable/disable for queue 2" "0,1" newline bitfld.word 0xA 1. "CTE1,Cut-through enable/disable for queue 1" "0,1" bitfld.word 0xA 0. "CTE0,Cut-through enable/disable for queue 0" "B_0x0,B_0x1" line.word 0xC "ETHSW_FES2_TX_PREE0R,ETHSW FES port 2 TX preemptable traffic selection register 0" bitfld.word 0xC 7. "PREE7,Preemption setting for queue 7" "0,1" bitfld.word 0xC 6. "PREE6,Preemption setting for queue 6" "0,1" bitfld.word 0xC 5. "PREE5,Preemption setting for queue 5" "0,1" newline bitfld.word 0xC 4. "PREE4,Preemption setting for queue 4" "0,1" bitfld.word 0xC 3. "PREE3,Preemption setting for queue 3" "0,1" bitfld.word 0xC 2. "PREE2,Preemption setting for queue 2" "0,1" newline bitfld.word 0xC 1. "PREE1,Preemption setting for queue 1" "0,1" bitfld.word 0xC 0. "PREE0,Preemption setting for queue 0" "B_0x0,B_0x1" line.word 0xE "ETHSW_FES2_TX_PREE1R,ETHSW FES port 2 TX preemptable traffic selection register 1" bitfld.word 0xE 0.--1. "ADDFRAGSIZE,AddFragSize" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x220020++0x3 line.long 0x0 "ETHSW_FES2_QUEUE_TBLR,ETHSW FES port 2 queue table configuration register" bitfld.long 0x0 28.--30. "QUEUE_PRI7,Queue for priority 7" "0,1,2,3,4,5,6,7" bitfld.long 0x0 24.--26. "QUEUE_PRI6,Queue for priority 6" "0,1,2,3,4,5,6,7" bitfld.long 0x0 20.--22. "QUEUE_PRI5,Queue for priority 5" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16.--18. "QUEUE_PRI4,Queue for priority 4" "0,1,2,3,4,5,6,7" bitfld.long 0x0 12.--14. "QUEUE_PRI3,Queue for priority 3" "0,1,2,3,4,5,6,7" bitfld.long 0x0 8.--10. "QUEUE_PRI2,Queue for priority 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4.--6. "QUEUE_PRI1,Queue for priority 1" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "QUEUE_PRI0,Queue for priority 0" "0,1,2,3,4,5,6,7" group.word 0x220030++0x1F line.word 0x0 "ETHSW_FES2_SHAPER0R,ETHSW FES port 2 shaper 0 configuration register" hexmask.word 0x0 0.--15. 1. "ADDEND,Addend" line.word 0x2 "ETHSW_FES2_SHAPER1R,ETHSW FES port 2 shaper 1 configuration register" hexmask.word 0x2 0.--15. 1. "ADDEND,Addend" line.word 0x4 "ETHSW_FES2_SHAPER2R,ETHSW FES port 2 shaper 2 configuration register" hexmask.word 0x4 0.--15. 1. "ADDEND,Addend" line.word 0x6 "ETHSW_FES2_SHAPER3R,ETHSW FES port 2 shaper 3 configuration register" hexmask.word 0x6 0.--15. 1. "ADDEND,Addend" line.word 0x8 "ETHSW_FES2_SHAPER4R,ETHSW FES port 2 shaper 4 configuration register" hexmask.word 0x8 0.--15. 1. "ADDEND,Addend" line.word 0xA "ETHSW_FES2_SHAPER5R,ETHSW FES port 2 shaper 5 configuration register" hexmask.word 0xA 0.--15. 1. "ADDEND,Addend" line.word 0xC "ETHSW_FES2_SHAPER6R,ETHSW FES port 2 shaper 6 configuration register" hexmask.word 0xC 0.--15. 1. "ADDEND,Addend" line.word 0xE "ETHSW_FES2_SHAPER7R,ETHSW FES port 2 shaper 7 configuration register" hexmask.word 0xE 0.--15. 1. "ADDEND,Addend" line.word 0x10 "ETHSW_FES2_FRAMESIZE0R,ETHSW FES port 2 frame size 0 configuration register" hexmask.word 0x10 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x12 "ETHSW_FES2_FRAMESIZE1R,ETHSW FES port 2 frame size 1 configuration register" hexmask.word 0x12 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x14 "ETHSW_FES2_FRAMESIZE2R,ETHSW FES port 2 frame size 2 configuration register" hexmask.word 0x14 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x16 "ETHSW_FES2_FRAMESIZE3R,ETHSW FES port 2 frame size 3 configuration register" hexmask.word 0x16 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x18 "ETHSW_FES2_FRAMESIZE4R,ETHSW FES port 2 frame size 4 configuration register" hexmask.word 0x18 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x1A "ETHSW_FES2_FRAMESIZE5R,ETHSW FES port 2 frame size 5 configuration register" hexmask.word 0x1A 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x1C "ETHSW_FES2_FRAMESIZE6R,ETHSW FES port 2 frame size 6 configuration register" hexmask.word 0x1C 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x1E "ETHSW_FES2_FRAMESIZE7R,ETHSW FES port 2 frame size 7 configuration register" hexmask.word 0x1E 0.--10. 1. "FRAMESIZE,Max frame size" group.word 0x220080++0xF line.word 0x0 "ETHSW_FES2_FID_CFG0R,ETHSW FES port 2 filtering identifier configuration register 0" bitfld.word 0x0 14.--15. "FWD_ST7,Port Forwarding state for FID 7" "0,1,2,3" bitfld.word 0x0 12.--13. "FWD_ST6,Port Forwarding state for FID 6" "0,1,2,3" bitfld.word 0x0 10.--11. "FWD_ST5,Port Forwarding state for FID 5" "0,1,2,3" newline bitfld.word 0x0 8.--9. "FWD_ST4,Port Forwarding state for FID 4" "0,1,2,3" bitfld.word 0x0 6.--7. "FWD_ST3,Port Forwarding state for FID 3" "0,1,2,3" bitfld.word 0x0 4.--5. "FWD_ST2,Port Forwarding state for FID 2" "0,1,2,3" newline bitfld.word 0x0 2.--3. "FWD_ST1,Port Forwarding state for FID 1" "0,1,2,3" bitfld.word 0x0 0.--1. "FWD_ST0,Port Forwarding state for FID 0" "B_0x0,B_0x1,B_0x2,?" line.word 0x2 "ETHSW_FES2_FID_CFG1R,ETHSW FES port 2 filtering identifier configuration register 1" bitfld.word 0x2 14.--15. "FWD_ST15,Port Forwarding state for FID 15" "0,1,2,3" bitfld.word 0x2 12.--13. "FWD_ST14,Port Forwarding state for FID 14" "0,1,2,3" bitfld.word 0x2 10.--11. "FWD_ST13,Port Forwarding state for FID 13" "0,1,2,3" newline bitfld.word 0x2 8.--9. "FWD_ST12,Port Forwarding state for FID 12" "0,1,2,3" bitfld.word 0x2 6.--7. "FWD_ST11,Port Forwarding state for FID 11" "0,1,2,3" bitfld.word 0x2 4.--5. "FWD_ST10,Port Forwarding state for FID 10" "0,1,2,3" newline bitfld.word 0x2 2.--3. "FWD_ST9,Port Forwarding state for FID 9" "0,1,2,3" bitfld.word 0x2 0.--1. "FWD_ST8,Port Forwarding state for FID 8" "0,1,2,3" line.word 0x4 "ETHSW_FES2_FID_CFG2R,ETHSW FES port 2 filtering identifier configuration register 2" bitfld.word 0x4 14.--15. "FWD_ST23,Port Forwarding state for FID 23" "0,1,2,3" bitfld.word 0x4 12.--13. "FWD_ST22,Port Forwarding state for FID 22" "0,1,2,3" bitfld.word 0x4 10.--11. "FWD_ST21,Port Forwarding state for FID 21" "0,1,2,3" newline bitfld.word 0x4 8.--9. "FWD_ST20,Port Forwarding state for FID 20" "0,1,2,3" bitfld.word 0x4 6.--7. "FWD_ST19,Port Forwarding state for FID 19" "0,1,2,3" bitfld.word 0x4 4.--5. "FWD_ST18,Port Forwarding state for FID 18" "0,1,2,3" newline bitfld.word 0x4 2.--3. "FWD_ST17,Port Forwarding state for FID 17" "0,1,2,3" bitfld.word 0x4 0.--1. "FWD_ST16,Port Forwarding state for FID 16" "0,1,2,3" line.word 0x6 "ETHSW_FES2_FID_CFG3R,ETHSW FES port 2 filtering identifier configuration register 3" bitfld.word 0x6 14.--15. "FWD_ST31,Port Forwarding state for FID 31" "0,1,2,3" bitfld.word 0x6 12.--13. "FWD_ST30,Port Forwarding state for FID30" "0,1,2,3" bitfld.word 0x6 10.--11. "FWD_ST29,Port Forwarding state for FID 29" "0,1,2,3" newline bitfld.word 0x6 8.--9. "FWD_ST28,Port Forwarding state for FID 28" "0,1,2,3" bitfld.word 0x6 6.--7. "FWD_ST27,Port Forwarding state for FID 27" "0,1,2,3" bitfld.word 0x6 4.--5. "FWD_ST26,Port Forwarding state for FID 26" "0,1,2,3" newline bitfld.word 0x6 2.--3. "FWD_ST25,Port Forwarding state for FID 25" "0,1,2,3" bitfld.word 0x6 0.--1. "FWD_ST24,Port Forwarding state for FID 24" "0,1,2,3" line.word 0x8 "ETHSW_FES2_FID_CFG4R,ETHSW FES port 2 filtering identifier configuration register 4" bitfld.word 0x8 14.--15. "FWD_ST39,Port Forwarding state for FID 39" "0,1,2,3" bitfld.word 0x8 12.--13. "FWD_ST38,Port Forwarding state for FID38" "0,1,2,3" bitfld.word 0x8 10.--11. "FWD_ST37,Port Forwarding state for FID 37" "0,1,2,3" newline bitfld.word 0x8 8.--9. "FWD_ST36,Port Forwarding state for FID 36" "0,1,2,3" bitfld.word 0x8 6.--7. "FWD_ST35,Port Forwarding state for FID 35" "0,1,2,3" bitfld.word 0x8 4.--5. "FWD_ST34,Port Forwarding state for FID 34" "0,1,2,3" newline bitfld.word 0x8 2.--3. "FWD_ST33,Port Forwarding state for FID 33" "0,1,2,3" bitfld.word 0x8 0.--1. "FWD_ST32,Port Forwarding state for FID 32" "0,1,2,3" line.word 0xA "ETHSW_FES2_FID_CFG5R,ETHSW FES port 2 filtering identifier configuration register 5" bitfld.word 0xA 14.--15. "FWD_ST47,Port Forwarding state for FID 47" "0,1,2,3" bitfld.word 0xA 12.--13. "FWD_ST46,Port Forwarding state for FID46" "0,1,2,3" bitfld.word 0xA 10.--11. "FWD_ST45,Port Forwarding state for FID 45" "0,1,2,3" newline bitfld.word 0xA 8.--9. "FWD_ST44,Port Forwarding state for FID 44" "0,1,2,3" bitfld.word 0xA 6.--7. "FWD_ST43,Port Forwarding state for FID 43" "0,1,2,3" bitfld.word 0xA 4.--5. "FWD_ST42,Port Forwarding state for FID 42" "0,1,2,3" newline bitfld.word 0xA 2.--3. "FWD_ST41,Port Forwarding state for FID 41" "0,1,2,3" bitfld.word 0xA 0.--1. "FWD_ST40,Port Forwarding state for FID 40" "0,1,2,3" line.word 0xC "ETHSW_FES2_FID_CFG6R,ETHSW FES port 2 filtering identifier configuration register 6" bitfld.word 0xC 14.--15. "FWD_ST55,Port Forwarding state for FID 55" "0,1,2,3" bitfld.word 0xC 12.--13. "FWD_ST54,Port Forwarding state for FID54" "0,1,2,3" bitfld.word 0xC 10.--11. "FWD_ST53,Port Forwarding state for FID 53" "0,1,2,3" newline bitfld.word 0xC 8.--9. "FWD_ST52,Port Forwarding state for FID 52" "0,1,2,3" bitfld.word 0xC 6.--7. "FWD_ST51,Port Forwarding state for FID 51" "0,1,2,3" bitfld.word 0xC 4.--5. "FWD_ST50,Port Forwarding state for FID 50" "0,1,2,3" newline bitfld.word 0xC 2.--3. "FWD_ST49,Port Forwarding state for FID 49" "0,1,2,3" bitfld.word 0xC 0.--1. "FWD_ST48,Port Forwarding state for FID 48" "0,1,2,3" line.word 0xE "ETHSW_FES2_FID_CFG7R,ETHSW FES port 2 filtering identifier configuration register 7" bitfld.word 0xE 14.--15. "FWD_ST63,Port Forwarding state for FID 63" "0,1,2,3" bitfld.word 0xE 12.--13. "FWD_ST62,Port Forwarding state for FID62" "0,1,2,3" bitfld.word 0xE 10.--11. "FWD_ST61,Port Forwarding state for FID 61" "0,1,2,3" newline bitfld.word 0xE 8.--9. "FWD_ST60,Port Forwarding state for FID 60" "0,1,2,3" bitfld.word 0xE 6.--7. "FWD_ST59,Port Forwarding state for FID 59" "0,1,2,3" bitfld.word 0xE 4.--5. "FWD_ST58,Port Forwarding state for FID 58" "0,1,2,3" newline bitfld.word 0xE 2.--3. "FWD_ST57,Port Forwarding state for FID 57" "0,1,2,3" bitfld.word 0xE 0.--1. "FWD_ST56,Port Forwarding state for FID 56" "0,1,2,3" group.word 0x2200C0++0x3 line.word 0x0 "ETHSW_FES2_FL_CAPTR,ETHSW FES port 2 buffer fill level capture register" bitfld.word 0x0 0. "CAPTURE,Capture" "0,1" line.word 0x2 "ETHSW_FES2_FL_SMPL_CNTR,ETHSW FES port 2 buffer fill level sample counter register" hexmask.word 0x2 0.--15. 1. "FL_SAMPLE_CNT,Sample counter" group.word 0x2200E0++0x1F line.word 0x0 "ETHSW_FES2_FL_Q0_MINR,ETHSW FES port 2 minimum fill level queue 0 register" hexmask.word.byte 0x0 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x2 "ETHSW_FES2_FL_Q1_MINR,ETHSW FES port 2 minimum fill level queue 1 register" hexmask.word.byte 0x2 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x4 "ETHSW_FES2_FL_Q2_MINR,ETHSW FES port 2 minimum fill level queue 2 register" hexmask.word.byte 0x4 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x6 "ETHSW_FES2_FL_Q3_MINR,ETHSW FES port 2 minimum fill level queue 3 register" hexmask.word.byte 0x6 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x8 "ETHSW_FES2_FL_Q4_MINR,ETHSW FES port 2 minimum fill level queue 4 register" hexmask.word.byte 0x8 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0xA "ETHSW_FES2_FL_Q5_MINR,ETHSW FES port 2 minimum fill level queue 5 register" hexmask.word.byte 0xA 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0xC "ETHSW_FES2_FL_Q6_MINR,ETHSW FES port 2 minimum fill level queue 6 register" hexmask.word.byte 0xC 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0xE "ETHSW_FES2_FL_Q7_MINR,ETHSW FES port 2 minimum fill level queue 7 register" hexmask.word.byte 0xE 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x10 "ETHSW_FES2_FL_Q0_MAXR,ETHSW FES port 2 maximum fill level queue 0 register" hexmask.word.byte 0x10 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x12 "ETHSW_FES2_FL_Q1_MAXR,ETHSW FES port 2 maximum fill level queue 1 register" hexmask.word.byte 0x12 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x14 "ETHSW_FES2_FL_Q2_MAXR,ETHSW FES port 2 maximum fill level queue 2 register" hexmask.word.byte 0x14 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x16 "ETHSW_FES2_FL_Q3_MAXR,ETHSW FES port 2 maximum fill level queue 3 register" hexmask.word.byte 0x16 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x18 "ETHSW_FES2_FL_Q4_MAXR,ETHSW FES port 2 maximum fill level queue 4 register" hexmask.word.byte 0x18 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x1A "ETHSW_FES2_FL_Q5_MAXR,ETHSW FES port 2 maximum fill level queue 5 register" hexmask.word.byte 0x1A 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x1C "ETHSW_FES2_FL_Q6_MAXR,ETHSW FES port 2 maximum fill level queue 6 register" hexmask.word.byte 0x1C 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x1E "ETHSW_FES2_FL_Q7_MAXR,ETHSW FES port 2 maximum fill level queue 7 register" hexmask.word.byte 0x1E 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" group.word 0x224000++0x5 line.word 0x0 "ETHSW_FES2_PTP_RX_SYNCD_SNSR,ETHSW FES PTP RX sync delay subnanosecond register" hexmask.word 0x0 0.--15. 1. "PTP_RX_SYNC_DELAY_SUBNS,RX Sync delay subnanoseconds" line.word 0x2 "ETHSW_FES2_PTP_RX_SYNCD_NSLR,ETHSW FES PTP RX sync delay nanosecond low register" hexmask.word 0x2 0.--15. 1. "PTP_RX_SYNC_DELAY_NSL,RX Sync delay nanoseconds low part" line.word 0x4 "ETHSW_FES2_PTP_RX_SYNCD_NSHR,ETHSW FES PTP RX sync delay nanosecond high register" hexmask.word.byte 0x4 0.--7. 1. "PTP_RX_SYNC_DELAY_NSH,RX Sync delay nanoseconds high part" group.word 0x224008++0x3 line.word 0x0 "ETHSW_FES2_PTP_RX_EVENTD_SNSR,ETHSW FES PTP RX event delay subnanosecond register" hexmask.word 0x0 0.--15. 1. "PTP_RX_EVENT_DELAY_SNS,RX Event delay subnanoseconds" line.word 0x2 "ETHSW_FES2_PTP_RX_EVENTD_NSR,ETHSW FES PTP RX event delay nanosecond register" hexmask.word 0x2 0.--15. 1. "PTP_RX_EVENT_DELAY_NS,RX Event delay nanoseconds" group.word 0x224010++0x3 line.word 0x0 "ETHSW_FES2_PTP_TX_EVENTD_SNSR,ETHSW FES PTP TX event delay subnanosecond register" hexmask.word 0x0 0.--15. 1. "PTP_TX_EVENT_DELAY_SNS,TX Event delay subnanoseconds" line.word 0x2 "ETHSW_FES2_PTP_TX_EVENTD_NSR,ETHSW FES PTP TX event delay nanosecond register" hexmask.word 0x2 0.--15. 1. "PTP_TX_EVENT_DELAY_NS,TX Event delay nanoseconds" group.word 0x226000++0x3 line.word 0x0 "ETHSW_FES2_CNT_CTRLR,ETHSW FES port 2 counter control register" bitfld.word 0x0 12. "CPT_CNT_GRP5,Capture counter group 5" "B_0x0,B_0x1" bitfld.word 0x0 10. "CPT_CNT_GRP3,Capture counter group 3" "B_0x0,B_0x1" bitfld.word 0x0 8. "CPT_CNT_GRP1,Capture counter group 1" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "CAPTURE,Capture" "0,1" line.word 0x2 "ETHSW_FES2_CNT_CMDR,ETHSW FES port 2 counter command register" bitfld.word 0x2 15. "TRANSFER,Transfer" "0,1" hexmask.word.byte 0x2 0.--5. 1. "CNT_NUM,Counter number" group.word 0x226008++0x3 line.word 0x0 "ETHSW_FES2_CNT_VAL_LOR,ETHSW FES port 2 counter value low register" hexmask.word 0x0 0.--15. 1. "CNT_VAL_LO,Counter value Low" line.word 0x2 "ETHSW_FES2_CNT_VAL_HIR,ETHSW FES port 2 counter value high register" hexmask.word 0x2 0.--15. 1. "CNT_VAL_HI,Counter value High" group.word 0x228000++0x1 line.word 0x0 "ETHSW_FES2_IPO_CMDR,ETHSW FES port 2 IPO command register" bitfld.word 0x0 15. "TRANSFER,Transfer" "0,1" bitfld.word 0x0 14. "RD_WR,Read/write" "B_0x0,B_0x1" hexmask.word.byte 0x0 0.--3. 1. "IPO_FIL_NUM,IPO Filter Number" group.word 0x228010++0xD line.word 0x0 "ETHSW_FES2_ETH_ADDR_CFG0R,ETHSW FES port 2 IPO filter configuration register 0" bitfld.word 0x0 15. "NEW_PRI_LSB,New priority LSB" "0,1" bitfld.word 0x0 14. "PRES_PRI,Preserve priority" "B_0x0,B_0x1" bitfld.word 0x0 12.--13. "NEW_PRI_MSB,New priority MSBs" "0,1,2,3" newline bitfld.word 0x0 9. "POL_PRIO,Policer priority" "B_0x0,B_0x1" hexmask.word.byte 0x0 2.--7. 1. "CMP_LENGTH,Compared Length" bitfld.word 0x0 1. "SRC_DST_MATCH,Source/Destination Match" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "ENABLE,Enable" "B_0x0,B_0x1" line.word 0x2 "ETHSW_FES2_ETH_ADDR_FWD_ALLOWR,ETHSW FES port 2 forward allow register" bitfld.word 0x2 0.--2. "FWD_ALLOW_MSK,Forward allow mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x4 "ETHSW_FES2_ETH_ADDR_FWD_MIRRORR,ETHSW FES port 2 forward mirror register" bitfld.word 0x4 0.--2. "FWD_MIRROR_MSK,Forward mirror mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x6 "ETHSW_FES2_ETH_ADDR_CFG1R,ETHSW FES port 2 IPO filter configuration register 1" bitfld.word 0x6 15. "CT_DIS,Cut-Through disable" "B_0x0,B_0x1" bitfld.word 0x6 14. "CMP_ORDER,Compare Order" "B_0x0,B_0x1" bitfld.word 0x6 12. "IPO_MARK,IPO Mark" "0,1" newline hexmask.word.byte 0x6 0.--6. 1. "POLICER,Policer" line.word 0x8 "ETHSW_FES2_ETH_ADDR_0R,ETHSW FES port 2 ethernet address part 0 register" hexmask.word.byte 0x8 8.--15. 1. "OCTET_2,2less thansup>ndless than/sup> octet" hexmask.word.byte 0x8 0.--7. 1. "OCTET_1,1less thansup>stless than/sup> octet" line.word 0xA "ETHSW_FES2_ETH_ADDR_1R,ETHSW FES port 2 ethernet address part 1 register" hexmask.word.byte 0xA 8.--15. 1. "OCTET_4,4less thansup>thless than/sup> octet" hexmask.word.byte 0xA 0.--7. 1. "OCTET_3,3less thansup>rdless than/sup> octet" line.word 0xC "ETHSW_FES2_ETH_ADDR_2R,ETHSW FES port 2 ethernet address part 2 register" hexmask.word.byte 0xC 8.--15. 1. "OCTET_6,6less thansup>thless than/sup> octet" hexmask.word.byte 0xC 0.--7. 1. "OCTET_5,5less thansup>thless than/sup> octet" rgroup.word 0x1000000++0x3 line.word 0x0 "ETHSW_EIA_RGMII_P0_IDR,ETHSW EIA port 0 RGMII adapter ID register" hexmask.word.byte 0x0 8.--15. 1. "VERSION,Version" hexmask.word.byte 0x0 0.--7. 1. "ID,Device ID" line.word 0x2 "ETHSW_EIA_RGMII_P0_LINK_STATUSR,ETHSW EIA port 0 RGMII adapter link status register" bitfld.word 0x2 3. "DUPLEX_STATUS,Duplex status" "B_0x0,B_0x1" bitfld.word 0x2 1.--2. "AUTONEG_SPEED,Autoneg speed" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x2 0. "LINK_STATUS,Link status" "B_0x0,?" rgroup.word 0x1000020++0x3 line.word 0x0 "ETHSW_EIA_RGMII_P0_RX_DELAYR,ETHSW EIA port 0 RGMII adapter RX delay register" hexmask.word 0x0 0.--15. 1. "RX_DELAY,RX Delay" line.word 0x2 "ETHSW_EIA_RGMII_P0_TX_DELAYR,ETHSW EIA port 0 RGMII adapter TX delay register" hexmask.word 0x2 0.--15. 1. "TX_DELAY,TX Delay" rgroup.word 0x1000200++0x3 line.word 0x0 "ETHSW_EIA_RGMII_P1_IDR,ETHSW EIA port 1 RGMII adapter ID register" hexmask.word.byte 0x0 8.--15. 1. "VERSION,Version" hexmask.word.byte 0x0 0.--7. 1. "ID,Device ID" line.word 0x2 "ETHSW_EIA_RGMII_P1_LINK_STATUSR,ETHSW EIA port 1 RGMII adapter link status register" bitfld.word 0x2 3. "DUPLEX_STATUS,Duplex status" "B_0x0,B_0x1" bitfld.word 0x2 1.--2. "AUTONEG_SPEED,Autoneg speed" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x2 0. "LINK_STATUS,Link status" "B_0x0,?" rgroup.word 0x1000220++0x3 line.word 0x0 "ETHSW_EIA_RGMII_P1_RX_DELAYR,ETHSW EIA port 1 RGMII adapter RX delay register" hexmask.word 0x0 0.--15. 1. "RX_DELAY,RX Delay" line.word 0x2 "ETHSW_EIA_RGMII_P1_TX_DELAYR,ETHSW EIA port 1 RGMII adapter TX delay register" hexmask.word 0x2 0.--15. 1. "TX_DELAY,TX Delay" rgroup.word 0x1000400++0x3 line.word 0x0 "ETHSW_EIA_RGMII_P2_IDR,ETHSW EIA port 2 RGMII adapter ID register" hexmask.word.byte 0x0 8.--15. 1. "VERSION,Version" hexmask.word.byte 0x0 0.--7. 1. "ID,Device ID" line.word 0x2 "ETHSW_EIA_RGMII_P2_LINK_STATUSR,ETHSW EIA port 2 RGMII adapter link status register" bitfld.word 0x2 3. "DUPLEX_STATUS,Duplex status" "B_0x0,B_0x1" bitfld.word 0x2 1.--2. "AUTONEG_SPEED,Autoneg speed" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x2 0. "LINK_STATUS,Link status" "B_0x0,?" rgroup.word 0x1000420++0x3 line.word 0x0 "ETHSW_EIA_RGMII_P2_RX_DELAYR,ETHSW EIA port 2 RGMII adapter RX delay register" hexmask.word 0x0 0.--15. 1. "RX_DELAY,RX Delay" line.word 0x2 "ETHSW_EIA_RGMII_P2_TX_DELAYR,ETHSW EIA port 2 RGMII adapter TX delay register" hexmask.word 0x2 0.--15. 1. "TX_DELAY,TX Delay" rgroup.word 0x1000100++0x1 line.word 0x0 "ETHSW_EIA_RMII_P1_IDR,ETHSW EIA port 1 RMII adapter ID register [alternate]" hexmask.word.byte 0x0 8.--15. 1. "VERSION,Version" hexmask.word.byte 0x0 0.--7. 1. "ID,Device ID" group.word 0x1000202++0x1 line.word 0x0 "ETHSW_EIA_RMII_P1_LINK_STATUSR,ETHSW EIA port 1 RMII adapter link status register [alternate]" bitfld.word 0x0 0. "LINK_STATUS,link status" "B_0x0,B_0x1" rgroup.word 0x1000320++0x3 line.word 0x0 "ETHSW_EIA_RMII_P1_RX_DELAYR,ETHSW EIA port 1 RMII adapter RX delay register [alternate]" hexmask.word 0x0 0.--15. 1. "RX_DELAY,RX Delay" line.word 0x2 "ETHSW_EIA_RMII_P1_TX_DELAYR,ETHSW EIA port 1 RMII adapter TX delay register [alternate]" hexmask.word 0x2 0.--15. 1. "TX_DELAY,TX Delay" rgroup.word 0x1000400++0x1 line.word 0x0 "ETHSW_EIA_RMII_P2_IDR,ETHSW EIA port 2 RMII adapter ID register [alternate]" hexmask.word.byte 0x0 8.--15. 1. "VERSION,Version" hexmask.word.byte 0x0 0.--7. 1. "ID,Device ID" group.word 0x1000402++0x1 line.word 0x0 "ETHSW_EIA_RMII_P2_LINK_STATUSR,ETHSW EIA port 2 RMII adapter link status register [alternate]" bitfld.word 0x0 0. "LINK_STATUS,link status" "B_0x0,B_0x1" rgroup.word 0x1000420++0x3 line.word 0x0 "ETHSW_EIA_RMII_P2_RX_DELAYR,ETHSW EIA port 2 RMII adapter RX delay register [alternate]" hexmask.word 0x0 0.--15. 1. "RX_DELAY,RX Delay" line.word 0x2 "ETHSW_EIA_RMII_P2_TX_DELAYR,ETHSW EIA port 2 RMII adapter TX delay register [alternate]" hexmask.word 0x2 0.--15. 1. "TX_DELAY,TX Delay" tree.end tree "ETHSW_S" base ad:0x5C000000 rgroup.long 0x0++0xB line.long 0x0 "ETHSW_AC_DEV_IDR,ETHSW AC device ID register" hexmask.long.word 0x0 8.--23. 1. "DEVICE_ID,Device ID" line.long 0x4 "ETHSW_AC_INT_IDR,ETHSW AC int ID register" hexmask.long 0x4 0.--31. 1. "INT_ID,IP core version" line.long 0x8 "ETHSW_AC_REV_IDR,ETHSW AC revision ID register" hexmask.long.word 0x8 16.--31. 1. "REV_ID_MAJOR,Revision ID major number" hexmask.long.word 0x8 0.--15. 1. "REV_ID_MINOR,Revision ID minor number" rgroup.word 0x1000++0x3 line.word 0x0 "ETHSW_AC_IF0_IDR,ETHSW AC interface 0 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF0_VERR,ETHSW AC interface 0 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1004++0xB line.long 0x0 "ETHSW_AC_IF0_BASER,ETHSW AC interface 0 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF0_LENR,ETHSW AC interface 0 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF0_PORTR,ETHSW AC interface 0 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x1010++0x3 line.word 0x0 "ETHSW_AC_IF1_IDR,ETHSW AC interface 1 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF1_VERR,ETHSW AC interface 1 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1014++0xB line.long 0x0 "ETHSW_AC_IF1_BASER,ETHSW AC interface 1 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF1_LENR,ETHSW AC interface 1 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF1_PORTR,ETHSW AC interface 1 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x1020++0x3 line.word 0x0 "ETHSW_AC_IF2_IDR,ETHSW AC interface 2 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF2_VERR,ETHSW AC interface 2 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1024++0xB line.long 0x0 "ETHSW_AC_IF2_BASER,ETHSW AC interface 2 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF2_LENR,ETHSW AC interface 2 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF2_PORTR,ETHSW AC interface 2 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x1030++0x3 line.word 0x0 "ETHSW_AC_IF3_IDR,ETHSW AC interface 3 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF3_VERR,ETHSW AC interface 3 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1034++0xB line.long 0x0 "ETHSW_AC_IF3_BASER,ETHSW AC interface 3 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF3_LENR,ETHSW AC interface 3 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF3_PORTR,ETHSW AC interface 3 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x1040++0x3 line.word 0x0 "ETHSW_AC_IF4_IDR,ETHSW AC interface 4 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF4_VERR,ETHSW AC interface 4 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1044++0xB line.long 0x0 "ETHSW_AC_IF4_BASER,ETHSW AC interface 4 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF4_LENR,ETHSW AC interface 4 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF4_PORTR,ETHSW AC interface 4 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x1050++0x3 line.word 0x0 "ETHSW_AC_IF5_IDR,ETHSW AC interface 5 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF5_VERR,ETHSW AC interface 5 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1054++0xB line.long 0x0 "ETHSW_AC_IF5_BASER,ETHSW AC interface 5 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF5_LENR,ETHSW AC interface 5 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF5_PORTR,ETHSW AC interface 5 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x1060++0x3 line.word 0x0 "ETHSW_AC_IF6_IDR,ETHSW AC interface 6 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF6_VERR,ETHSW AC interface 6 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1064++0xB line.long 0x0 "ETHSW_AC_IF6_BASER,ETHSW AC interface 6 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF6_LENR,ETHSW AC interface 6 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF6_PORTR,ETHSW AC interface 6 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x1070++0x3 line.word 0x0 "ETHSW_AC_IF7_IDR,ETHSW AC interface 7 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF7_VERR,ETHSW AC interface 7 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1074++0xB line.long 0x0 "ETHSW_AC_IF7_BASER,ETHSW AC interface 7 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF7_LENR,ETHSW AC interface 7 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF7_PORTR,ETHSW AC interface 7 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x1080++0x3 line.word 0x0 "ETHSW_AC_IF8_IDR,ETHSW AC interface 8 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF8_VERR,ETHSW AC interface 8 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1084++0xB line.long 0x0 "ETHSW_AC_IF8_BASER,ETHSW AC interface 8 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF8_LENR,ETHSW AC interface 8 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF8_PORTR,ETHSW AC interface 8 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x1090++0x3 line.word 0x0 "ETHSW_AC_IF9_IDR,ETHSW AC interface 9 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF9_VERR,ETHSW AC interface 9 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x1094++0xB line.long 0x0 "ETHSW_AC_IF9_BASER,ETHSW AC interface 9 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF9_LENR,ETHSW AC interface 9 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF9_PORTR,ETHSW AC interface 9 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x10A0++0x3 line.word 0x0 "ETHSW_AC_IF10_IDR,ETHSW AC interface 10 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF10_VERR,ETHSW AC interface 10 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x10A4++0xB line.long 0x0 "ETHSW_AC_IF10_BASER,ETHSW AC interface 10 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF10_LENR,ETHSW AC interface 10 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF10_PORTR,ETHSW AC interface 10 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x10B0++0x3 line.word 0x0 "ETHSW_AC_IF11_IDR,ETHSW AC interface 11 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF11_VERR,ETHSW AC interface 11 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x10B4++0xB line.long 0x0 "ETHSW_AC_IF11_BASER,ETHSW AC interface 11 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF11_LENR,ETHSW AC interface 11 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF11_PORTR,ETHSW AC interface 11 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x10C0++0x3 line.word 0x0 "ETHSW_AC_IF12_IDR,ETHSW AC interface 12 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF12_VERR,ETHSW AC interface 12 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x10C4++0xB line.long 0x0 "ETHSW_AC_IF12_BASER,ETHSW AC interface 12 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF12_LENR,ETHSW AC interface 12 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF12_PORTR,ETHSW AC interface 12 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x10D0++0x3 line.word 0x0 "ETHSW_AC_IF13_IDR,ETHSW AC interface 13 ID register" hexmask.word 0x0 0.--15. 1. "INTERFACE_ID,Interface identification" line.word 0x2 "ETHSW_AC_IF13_VERR,ETHSW AC interface 13 version register" hexmask.word.byte 0x2 8.--15. 1. "IF_VER_MAJ,Interface major number" hexmask.word.byte 0x2 0.--7. 1. "IF_VER_MIN,Interface minor number" rgroup.long 0x10D4++0xB line.long 0x0 "ETHSW_AC_IF13_BASER,ETHSW AC interface 13 base address register" hexmask.long 0x0 0.--31. 1. "BASE,Base address" line.long 0x4 "ETHSW_AC_IF13_LENR,ETHSW AC interface 13 length register" hexmask.long 0x4 0.--31. 1. "LEN,Interface length" line.long 0x8 "ETHSW_AC_IF13_PORTR,ETHSW AC interface 13 port mapping register" hexmask.long.byte 0x8 24.--31. 1. "PORT_FES3,Port mapping to FES_3" hexmask.long.byte 0x8 16.--23. 1. "PORT_FES2,Port mapping to FES_2" hexmask.long.byte 0x8 8.--15. 1. "PORT_FES1,Port mapping to FES_1" newline hexmask.long.byte 0x8 0.--7. 1. "PORT_FES0,Port mapping to FES_0" rgroup.word 0x10E0++0x1 line.word 0x0 "ETHSW_AC_EOTR,ETHSW AC end of table register" hexmask.word 0x0 0.--15. 1. "END_OF_TABLE,Static value 0x0 indicating end of table." rgroup.long 0x100000++0x7 line.long 0x0 "ETHSW_IBC_DEV_IDR,ETHSW IBC device ID register" hexmask.long.word 0x0 8.--23. 1. "DEVICE_ID,Device ID" line.long 0x4 "ETHSW_IBC_INT_IDR,ETHSW IBC IP core ID register" hexmask.long 0x4 0.--31. 1. "INT_ID,IP core version" group.word 0x101000++0x1 line.word 0x0 "ETHSW_IBC_GP_MUX_CTRLR,ETHSW IBC general-purpose multiplexer control register" bitfld.word 0x0 0. "GPMUX0,General-purpose (GP) multiplexer 0 control" "B_0x0,B_0x1" group.word 0x101100++0x1 line.word 0x0 "ETHSW_IBC_TIME_MUX_CTRLR,ETHSW IBC time interface mux demux control register" bitfld.word 0x0 0. "TIM_MUX0,Time interface (TI) mux/demux 0 control" "B_0x0,B_0x1" rgroup.word 0x102000++0x7 line.word 0x0 "ETHSW_IBC_GP_MUXESR,ETHSW IBC generic GP_MUXES register" bitfld.word 0x0 0.--1. "GPMUXES,The value of generic GP_MUXES" "0,1,2,3" line.word 0x2 "ETHSW_IBC_GP_MUX_DEFAULTR,ETHSW IBC generic GP_MUX_DEFAULT register" bitfld.word 0x2 0.--1. "GPMUXDEF,The value of Generic GP_MUX_DEFAULT" "0,1,2,3" line.word 0x4 "ETHSW_IBC_TIME_MUXESR,ETHSW IBC generic TIME_MUXES register" bitfld.word 0x4 0.--1. "TIME_MUX,The value of Generic TIME_MUXES" "0,1,2,3" line.word 0x6 "ETHSW_IBC_TIME_MUX_DEFAULTR,ETHSW IBC generic TIME_MUX_DEFAULT register" bitfld.word 0x6 0.--1. "TIM_MUXDEF,The value of Generic TIME_MUX_DEFAULT" "0,1,2,3" rgroup.word 0x102100++0x1 line.word 0x0 "ETHSW_IBC_AUTOCONFIG0R,ETHSW IBC generic AUTOCONFIG0 register" bitfld.word 0x0 2.--3. "TS_NUM,Number of Timestamper blocks (for example FPTS) in the system" "0,1,2,3" bitfld.word 0x0 0.--1. "RTC_NUM,Number of Real-Time Clock blocks (for example FRTC) in the system" "0,1,2,3" rgroup.word 0x102110++0x5 line.word 0x0 "ETHSW_IBC_AUTOCONFIG8R,ETHSW IBC generic AUTOCONFIG8 register" hexmask.word 0x0 0.--15. 1. "RTC_ADD,Bits (31:16) of the base address of the first Real-Time Clock block" line.word 0x2 "ETHSW_IBC_AUTOCONFIG9R,ETHSW IBC generic AUTOCONFIG9 register" hexmask.word 0x2 0.--15. 1. "RTC_ADD,Bits (31:16) of the base address of the second real-time clock block" line.word 0x4 "ETHSW_IBC_AUTOCONFIG10R,ETHSW IBC generic AUTOCONFIG10 register" hexmask.word 0x4 0.--15. 1. "RTC_ADD,Bits (31:16) of the base address of the third real-time clock block" rgroup.word 0x102118++0x5 line.word 0x0 "ETHSW_IBC_AUTOCONFIG12R,ETHSW IBC generic AUTOCONFIG12 register" hexmask.word 0x0 0.--15. 1. "TS_ADD,Bits (31:16) of the base address of the first timestamper (TS) block" line.word 0x2 "ETHSW_IBC_AUTOCONFIG13R,ETHSW IBC generic AUTOCONFIG13 register" hexmask.word 0x2 0.--15. 1. "TS_ADD,Bits (31:16) of the base address of the second timestamper (TS) block" line.word 0x4 "ETHSW_IBC_AUTOCONFIG14R,ETHSW IBC generic AUTOCONFIG14 register" hexmask.word 0x4 0.--15. 1. "TS_ADD,Bits (31:16) of the base address of the third timestamper (TS) block" rgroup.long 0x120000++0x7 line.long 0x0 "ETHSW_FTPS_GL0R,ETHSW FTPS general register 0" hexmask.long.word 0x0 8.--23. 1. "DEVICE_ID,Device ID" line.long 0x4 "ETHSW_FTPS_GL1R,ETHSW FTPS general register 1" hexmask.long 0x4 0.--31. 1. "REV_ID,Revision ID" group.long 0x121000++0x3 line.long 0x0 "ETHSW_FTPS_TSCR,ETHSW FTPS timestamper control register" bitfld.long 0x0 0. "GET_TIMESTAMP,Get timestamp" "0,1" group.long 0x121008++0x3 line.long 0x0 "ETHSW_FTPS_TSIMR,ETHSW FTPS timestamper interrupt mask register" bitfld.long 0x0 0. "TIMESTAMP_IE,Timestamp interrupt enable" "0,1" group.long 0x121010++0x3 line.long 0x0 "ETHSW_FTPS_TSISR,ETHSW FTPS timestamper interrupt status register" bitfld.long 0x0 0. "TIMESTAMP_IS,Timestamp interrupt status" "0,1" rgroup.long 0x121100++0x13 line.long 0x0 "ETHSW_FTPS_TS_SNSR,ETHSW FTPS timestamp subnanosecond register" hexmask.long 0x0 0.--31. 1. "SUBNANOSECONDS,Subnanoseconds part of the time of the PPx event" line.long 0x4 "ETHSW_FTPS_TS_NSR,ETHSW FTPS timestamp nanosecond register" hexmask.long 0x4 0.--29. 1. "NANOSECONDS,Nanoseconds part of the time of the PPx event" line.long 0x8 "ETHSW_FTPS_TS_SLR,ETHSW FTPS timestamp second low register" hexmask.long 0x8 0.--31. 1. "SECONDS,Least significant seconds part of the time of the PPx event" line.long 0xC "ETHSW_FTPS_TS_SHR,ETHSW FTPS timestamp second high register" hexmask.long.word 0xC 0.--15. 1. "SECONDS,Most significant seconds part of the time of the PPx event" line.long 0x10 "ETHSW_FTPS_PCNTR,ETHSW FTPS pulse counter register" hexmask.long 0x10 0.--31. 1. "PCNT,Pulse counter" rgroup.long 0x1C0000++0x7 line.long 0x0 "ETHSW_FSC_DEV_IDR,ETHSW FSC device ID register" hexmask.long.word 0x0 8.--23. 1. "DEV_ID,Device ID" line.long 0x4 "ETHSW_FSC_INT_IDR,ETHSW FSC INT ID register" hexmask.long 0x4 0.--31. 1. "REV_ID,REV_ID" group.word 0x1C1000++0x1 line.word 0x0 "ETHSW_FSC_ROW_ACCESS_CMD0R,ETHSW FSC schedule table row access command register 0" bitfld.word 0x0 15. "TRANSFER,Triggers transfer between schedule table row and ROW_DATA registers" "0,1" bitfld.word 0x0 14. "READ_WRITE,Read/write" "B_0x0,B_0x1" rbitfld.word 0x0 13. "ACCESS_ERR,Access error." "B_0x0,B_0x1" newline bitfld.word 0x0 8. "TABLE,Schedule table." "B_0x0,B_0x1" hexmask.word.byte 0x0 0.--3. 1. "SCHEDULER,Scheduler" rgroup.word 0x1C1002++0x1 line.word 0x0 "ETHSW_FSC_ROW_ACCESS_CMD1R,ETHSW FSC schedule table row access command register 1" hexmask.word 0x0 0.--9. 1. "ROW_NUM,Row number" group.word 0x1C1010++0x1 line.word 0x0 "ETHSW_FSC_ROW_DATA0R,ETHSW FSC schedule table row data 0 register" hexmask.word 0x0 0.--8. 1. "OUTPUT_STATE,Output state for outputs 8 to 0." group.word 0x1C1018++0x1 line.word 0x0 "ETHSW_FSC_ROW_DATA4R,ETHSW FSC schedule table row data 4 register" hexmask.word 0x0 0.--15. 1. "TIME,Time in clock cycles" group.word 0x1C1100++0x3 line.word 0x0 "ETHSW_FSC_IMR,ETHSW FSC interrupt mask register" bitfld.word 0x0 0. "SCHTBL_IE,Schedule table interrupt enable" "0,1" line.word 0x2 "ETHSW_FSC_ISR,ETHSW FSC interrupt status register" bitfld.word 0x2 0. "SCHTBL_IS,Schedule table interrupt status" "0,1" rgroup.word 0x1C4000++0x7 line.word 0x0 "ETHSW_FSC_GEN_SCHR,ETHSW FSC generic scheduler register" hexmask.word 0x0 0.--15. 1. "SCHEDULERS,The value of generic SCHEDULERS" line.word 0x2 "ETHSW_FSC_GEN_OUTR,ETHSW FSC generic outputs register" hexmask.word.byte 0x2 0.--6. 1. "OUTPUTS,The value of generic OUTPUTS" line.word 0x4 "ETHSW_FSC_GEN_TBL_RWR,ETHSW FSC generic table rows register" hexmask.word.byte 0x4 0.--3. 1. "TABLE_ROWS,The value of generic TABLE_ROWS" line.word 0x6 "ETHSW_FSC_GEN_CLK_FRQR,ETHSW FSC generic clock frequency register" hexmask.word.byte 0x6 0.--7. 1. "CLK_FREQ,The value of generic CLK_FREQ" rgroup.long 0x800000++0x3 line.long 0x0 "ETHSW_FES_IPC_IDR,ETHSW FES IP core identification register" hexmask.long.tbyte 0x0 8.--31. 1. "DEV_ID,Device ID" rgroup.word 0x800004++0x7 line.word 0x0 "ETHSW_FES_CFG_IDR,ETHSW FES configuration ID register" hexmask.word 0x0 0.--15. 1. "CFG_ID,Configuration ID" line.word 0x2 "ETHSW_FES_REV_ID0R,ETHSW FES revision ID register 0" hexmask.word 0x2 0.--15. 1. "REV_ID0,Configuration revision ID 0" line.word 0x4 "ETHSW_FES_REV_ID1R,ETHSW FES revision ID register 1" hexmask.word 0x4 0.--15. 1. "REV_ID1,Body revision ID bit (15:0)" line.word 0x6 "ETHSW_FES_REV_ID2R,ETHSW FES revision ID register 2" hexmask.word 0x6 0.--15. 1. "REV_ID2,Body revision ID bit (31:16)" group.word 0x800010++0x5 line.word 0x0 "ETHSW_FES_GEN_CTRLR,ETHSW FES general control register" bitfld.word 0x0 15. "INIT_REQ,Init Request" "B_0x0,B_0x1" bitfld.word 0x0 14. "CLR_MAC_TAB,Clear Dynamic MAC address table" "0,1" bitfld.word 0x0 13. "CORR_DIS,Correction Disable" "B_0x0,B_0x1" newline bitfld.word 0x0 11.--12. "PTP_MOD,PTP Mode" "B_0x0,?,B_0x2,?" bitfld.word 0x0 10. "MOD_SYNCF,Modify Sync frames" "B_0x0,B_0x1" bitfld.word 0x0 9. "TIM_TRL,Time trailer" "B_0x0,B_0x1" newline bitfld.word 0x0 8. "POL_CFG,Policer configuration" "B_0x0,B_0x1" bitfld.word 0x0 4.--5. "MGMT_TRL_OFF,Management Trailer Offset" "B_0x0,B_0x1,?,?" bitfld.word 0x0 2.--3. "MGMT_TRL_LGTH,Management Trailer Length" "B_0x0,B_0x1,?,?" line.word 0x2 "ETHSW_FES_MT_CLEAR_MSKR,ETHSW FES dynamic MAC table clear mask register" bitfld.word 0x2 0.--2. "MAC_TAB_CLRM,MAC Table Clear Mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x4 "ETHSW_FES_MT_CLEAR_FIDR,ETHSW FES dynamic MAC table clear FID register" hexmask.word.byte 0x4 0.--5. 1. "FID,Filtering Identifier (FID)" group.word 0x800020++0x5 line.word 0x0 "ETHSW_FES_ADDRESS_AGING_CFGR,ETHSW FES address aging configuration register" hexmask.word.byte 0x0 0.--6. 1. "LIFE_TIME,Address Lifetime" line.word 0x2 "ETHSW_FES_AGING_BASE_TIMELR,ETHSW FES aging base time low register" hexmask.word 0x2 0.--15. 1. "BASE_TIMEL,Aging base time value bits (15:0)" line.word 0x4 "ETHSW_FES_AGING_BASE_TIMEHR,ETHSW FES aging base time high register" hexmask.word.byte 0x4 0.--7. 1. "BASE_TIMEH,Aging base time value bits (23:16)" group.word 0x800030++0x1 line.word 0x0 "ETHSW_FES_INT_MASK_CLR,ETHSW FES interrupt mask clear register" bitfld.word 0x0 3. "CONGESTED_IMC,Congested interrupt mask clear" "0,1" bitfld.word 0x0 2. "RX_ERROR_IMC,RX error interrupt mask clear" "0,1" bitfld.word 0x0 1. "RX_TIMESTAMP_IMC,RX timestamp interrupt mask clear" "0,1" newline bitfld.word 0x0 0. "TX_TIMESTAMP_IMC,TX timestamp interrupt mask clear" "0,1" group.word 0x800034++0x1 line.word 0x0 "ETHSW_FES_INT_MASK_SETR,ETHSW FES interrupt mask set register" bitfld.word 0x0 3. "CONGESTED_IE,Congested interrupt enable mask" "0,1" bitfld.word 0x0 2. "RX_ERROR_IE,RX error interrupt enable mask" "0,1" bitfld.word 0x0 1. "RX_TIMESTAMP_IE,RX timestamp interrupt enable mask" "0,1" newline bitfld.word 0x0 0. "TX_TIMESTAMP_IE,TX timestamp interrupt enable mask" "0,1" group.word 0x800038++0x1 line.word 0x0 "ETHSW_FES_INT_STATUSR,ETHSW FES interrupt status register" bitfld.word 0x0 3. "CONGESTED_IS,Congested interrupt status" "0,1" bitfld.word 0x0 2. "RX_ERROR_IS,RX error interrupt status" "0,1" bitfld.word 0x0 1. "RX_TIMESTAMP_IS,RX timestamp interrupt status" "0,1" newline bitfld.word 0x0 0. "TX_TIMESTAMP_IS,TX timestamp interrupt status" "0,1" group.word 0x800200++0x1 line.word 0x0 "ETHSW_FES_MAC_TABLE0R,ETHSW FES dynamic MAC table read 0 register" bitfld.word 0x0 15. "TRANSFER,Transfer" "0,1" hexmask.word.byte 0x0 0.--3. 1. "PORT_NUM,Port number" rgroup.word 0x800202++0x7 line.word 0x0 "ETHSW_FES_MAC_TABLE1R,ETHSW FES dynamic MAC table read 1 register" hexmask.word.byte 0x0 8.--15. 1. "OCTET_2,Dynamic MAC Address Table Read: 2less thansup>ndless than/sup> octet" hexmask.word.byte 0x0 0.--7. 1. "OCTET_1,Dynamic MAC Address Table Read: 1less thansup>stless than/sup> octet" line.word 0x2 "ETHSW_FES_MAC_TABLE2R,ETHSW FES dynamic MAC table read 2 register" hexmask.word.byte 0x2 8.--15. 1. "OCTET_4,Dynamic MAC Address Table Read: 4less thansup>thless than/sup> octet" hexmask.word.byte 0x2 0.--7. 1. "OCTET_3,Dynamic MAC Address Table Read: 3less thansup>rdless than/sup> octet" line.word 0x4 "ETHSW_FES_MAC_TABLE3R,ETHSW FES dynamic MAC table read 3 register" hexmask.word.byte 0x4 8.--15. 1. "OCTET_6,Dynamic MAC Address Table Read: 6less thansup>thless than/sup> octet" hexmask.word.byte 0x4 0.--7. 1. "OCTET_5,Dynamic MAC Address Table Read: 5less thansup>thless than/sup> octet" line.word 0x6 "ETHSW_FES_MAC_TABLE4R,ETHSW FES dynamic MAC table read 4 register" hexmask.word.byte 0x6 0.--5. 1. "FID,FID" group.word 0x800220++0x3 line.word 0x0 "ETHSW_FES_SMAC_CMDR,ETHSW FES static MAC address table R/W command register" bitfld.word 0x0 15. "TRANSFER,Transfer" "0,1" bitfld.word 0x0 14. "RD_WR,Read / write" "B_0x0,B_0x1" bitfld.word 0x0 12.--13. "COLUMN,Column" "0,1,2,3" newline hexmask.word 0x0 0.--11. 1. "ROW,Row" line.word 0x2 "ETHSW_FES_SMAC_CFGR,ETHSW FES static MAC address table configuration register" bitfld.word 0x2 6.--7. "ROW_COL3,Row selection setting for column 3" "0,1,2,3" bitfld.word 0x2 4.--5. "ROW_COL2,Row selection setting for column 2" "0,1,2,3" bitfld.word 0x2 2.--3. "ROW_COL1,Row selection setting for column1" "0,1,2,3" newline bitfld.word 0x2 0.--1. "ROW_COL0,Row selection setting for column 0" "B_0x0,B_0x1,?,?" group.word 0x800230++0xF line.word 0x0 "ETHSW_FES_SMAC_TABLE0R,ETHSW FES static MAC address table read/write 0 register" bitfld.word 0x0 15. "ENTRY_USAGE,Entry usage" "B_0x0,B_0x1" bitfld.word 0x0 13. "POLICER_PRIO,Policer priority" "B_0x0,B_0x1" bitfld.word 0x0 12. "MATCH_VLAN,Match VLAN" "B_0x0,B_0x1" newline bitfld.word 0x0 11. "MOD_PRIO,Modify Priority" "B_0x0,B_0x1" bitfld.word 0x0 8.--10. "FRAME_PRIO,Frame Priority" "0,1,2,3,4,5,6,7" bitfld.word 0x0 7. "STREAM_MATCH,Stream_number source/destination match" "B_0x0,B_0x1" line.word 0x2 "ETHSW_FES_SMAC_TABLE1R,ETHSW FES static MAC address table read/write 1 register" hexmask.word.byte 0x2 8.--15. 1. "OCTET_2,Static MAC Address Table Read: 2less thansup>ndless than/sup> octet" hexmask.word.byte 0x2 0.--7. 1. "OCTET_1,Static MAC Address Table Read: 1less thansup>stless than/sup> octet" line.word 0x4 "ETHSW_FES_SMAC_TABLE2R,ETHSW FES static MAC address table read/write 2 register" hexmask.word.byte 0x4 8.--15. 1. "OCTET_4,Static MAC Address Table Read: 4less thansup>thless than/sup> octet" hexmask.word.byte 0x4 0.--7. 1. "OCTET_3,Static MAC Address Table Read: 3less thansup>rdless than/sup> octet" line.word 0x6 "ETHSW_FES_SMAC_TABLE3R,ETHSW FES static MAC address table read/write 3 register" hexmask.word.byte 0x6 8.--15. 1. "OCTET_6,Static MAC Address Table Read: 6less thansup>thless than/sup> octet" hexmask.word.byte 0x6 0.--7. 1. "OCTET_5,Static MAC Address Table Read: 5less thansup>thless than/sup> octet" line.word 0x8 "ETHSW_FES_SMAC_TABLE4R,ETHSW FES static MAC address table read/write 4 register" bitfld.word 0x8 0.--2. "FWD_PORT_MSK,Forward Port Mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0xA "ETHSW_FES_SMAC_TABLE5R,ETHSW FES static MAC address table read/write 5 register" bitfld.word 0xA 0.--2. "POLICER_PORTS,Policed Ports" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0xC "ETHSW_FES_SMAC_TABLE6R,ETHSW FES static MAC address table read/write 6 register" hexmask.word 0xC 0.--11. 1. "POLICER_NUM,Policer Number" line.word 0xE "ETHSW_FES_SMAC_TABLE7R,ETHSW FES static MAC address table read/write 7 register" hexmask.word 0xE 0.--11. 1. "VLAN,VLAN" group.word 0x800300++0x1 line.word 0x0 "ETHSW_FES_SEQ_REC_CMDR,ETHSW FES sequence recovery table R/W command register" bitfld.word 0x0 15. "TRANSFER,Transfer" "0,1" bitfld.word 0x0 14. "RD_WR,Read / write" "B_0x0,B_0x1" hexmask.word 0x0 0.--9. 1. "ROW,Row" group.word 0x800318++0x1 line.word 0x0 "ETHSW_FES_SEQ_REC_TABLE4R,ETHSW FES sequence recovery table read/write 4 register" bitfld.word 0x0 14.--15. "AGING_SCALE,Aging rate scale" "0,1,2,3" bitfld.word 0x0 12.--13. "AGING_BRATE,Aging basic rate" "0,1,2,3" bitfld.word 0x0 7. "ACC_NVAL_SEQ,Accept non valid sequence" "B_0x0,B_0x1" newline bitfld.word 0x0 6. "IND_REC,Individual recovery" "B_0x0,B_0x1" bitfld.word 0x0 5. "ALGORITHM,Algorithm" "B_0x0,B_0x1" hexmask.word.byte 0x0 0.--4. 1. "HIST_LENGTH,History Length - 1" group.word 0x800380++0x1 line.word 0x0 "ETHSW_FES_SEQ_GEN_CMDR,ETHSW FES sequence generation command register" bitfld.word 0x0 13. "RESET,Reset" "B_0x0,B_0x1" hexmask.word 0x0 0.--9. 1. "ENTITY,Entity" group.word 0x800400++0x1 line.word 0x0 "ETHSW_FES_STREAM_CMDR,ETHSW FES stream table R/W command register" bitfld.word 0x0 15. "TRANSFER,Transfer" "0,1" bitfld.word 0x0 14. "RD_WR,Read / write" "B_0x0,B_0x1" hexmask.word 0x0 0.--9. 1. "ROW,Row" group.word 0x800410++0x7 line.word 0x0 "ETHSW_FES_STREAM_TABLE0R,ETHSW FES stream table read/write 0 register" bitfld.word 0x0 0.--2. "RMV_RTAG,Remove R-TAGging input port vector" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x2 "ETHSW_FES_STREAM_TABLE1R,ETHSW FES stream table read/write 1 register" bitfld.word 0x2 0.--2. "ADD_RTAG,Add R-TAGging output port vector" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x4 "ETHSW_FES_STREAM_TABLE2R,ETHSW FES stream table read/write 2 register" bitfld.word 0x4 15. "FRER_SEQ_GEN,FRER sequence generation enable" "B_0x0,B_0x1" hexmask.word 0x4 0.--11. 1. "FRER_GEN_TAB_ROW,FRER sequence generation table row" line.word 0x6 "ETHSW_FES_STREAM_TABLE3R,ETHSW FES stream table read/write 3 register" bitfld.word 0x6 15. "FRER_SEQ_REC,FRER sequence recovery enable" "B_0x0,B_0x1" hexmask.word 0x6 0.--11. 1. "FRER_REC_TAB_ROW,FRER sequence recovery table row" group.word 0x800600++0x1 line.word 0x0 "ETHSW_FES_POLICER_CMDR,ETHSW FES policer read/write command register" bitfld.word 0x0 15. "TRANSFER,Transfer" "0,1" bitfld.word 0x0 14. "RD_WR,Read / write" "B_0x0,B_0x1" hexmask.word 0x0 0.--11. 1. "POLICER_NUM,Policer Number" group.word 0x800610++0x9 line.word 0x0 "ETHSW_FES_POLICER0R,ETHSW FES policer read/write 0 register" hexmask.word 0x0 0.--15. 1. "LIMIT,Limit" line.word 0x2 "ETHSW_FES_POLICER1R,ETHSW FES policer read/write 1 register" bitfld.word 0x2 8.--10. "RATE_SCALE,Rate Scale of Meter 0 (the meter for green)" "0,1,2,3,4,5,6,7" hexmask.word.byte 0x2 0.--7. 1. "BASIC_RATE,Basic Rate of Meter 0 (the meter for green)" line.word 0x4 "ETHSW_FES_POLICER2R,ETHSW FES policer read/write 2 register" hexmask.word 0x4 0.--15. 1. "LIMIT,Limit" line.word 0x6 "ETHSW_FES_POLICER3R,ETHSW FES policer read/write 3 register" bitfld.word 0x6 8.--10. "RATE_SCALE,Rate Scale of Meter 1 (the meter for yellow / red)" "0,1,2,3,4,5,6,7" hexmask.word.byte 0x6 0.--7. 1. "BASIC_RATE,Basic Rate of Meter 1 (the meter for yellow / red)" line.word 0x8 "ETHSW_FES_POLICER4R,ETHSW FES policer read/write 4 register" bitfld.word 0x8 4. "DROP_YELLOW,Drop on Yellow" "B_0x0,B_0x1" bitfld.word 0x8 3. "MARK_ALL_RED,Mark all Frames Red" "0,1" bitfld.word 0x8 2. "MARK_ALL_RED_EN,Mark all Frames Red Enable" "B_0x0,B_0x1" newline bitfld.word 0x8 1. "COUPLING_FLAG,Coupling Flag" "B_0x0,B_0x1" bitfld.word 0x8 0. "COLOR_BLIND,Color Blind" "B_0x0,B_0x1" group.word 0x802000++0x1 line.word 0x0 "ETHSW_FES_TS_CMDR,ETHSW FES timestamp command register" bitfld.word 0x0 14. "TRANSFER,Transfer" "0,1" rbitfld.word 0x0 13. "ERROR,Error" "B_0x0,B_0x1" bitfld.word 0x0 4. "TX_RX,TX / RX" "B_0x0,B_0x1" newline hexmask.word.byte 0x0 0.--3. 1. "PORT_NUM,Port Number" rgroup.word 0x802008++0xB line.word 0x0 "ETHSW_FES_TS_TIME_LOR,ETHSW FES timestamp time low register" hexmask.word 0x0 0.--15. 1. "NANOSECONDS,Nanoseconds bits (15:0)" line.word 0x2 "ETHSW_FES_TS_TIME_HIR,ETHSW FES timestamp time high register" bitfld.word 0x2 14.--15. "SECONDS,Seconds bits (0:1)" "0,1,2,3" hexmask.word 0x2 0.--13. 1. "NANOSECONDS,Nanoseconds bits (29:16)" line.word 0x4 "ETHSW_FES_TS_MSG_0R,ETHSW FES timestamp PTP message 0 register" hexmask.word.byte 0x4 8.--15. 1. "DOMAIN_NUM,Domain number" hexmask.word.byte 0x4 4.--7. 1. "TRANSP_SPEC,Transport specific" hexmask.word.byte 0x4 0.--3. 1. "MSG_TYPE,Message type" line.word 0x6 "ETHSW_FES_TS_MSG_1R,ETHSW FES timestamp PTP message 1 register" hexmask.word 0x6 0.--15. 1. "SEQUENCE_ID,Sequence ID" line.word 0x8 "ETHSW_FES_TS_RX_STATUSR,ETHSW FES timestamp status port vector RX register" bitfld.word 0x8 1.--2. "TS_STATUS_IN,Timestamp status input port vector" "B_0x0,B_0x1,?,?" line.word 0xA "ETHSW_FES_TS_TX_STATUSR,ETHSW FES timestamp status port vector TX register" bitfld.word 0xA 1.--2. "TS_STATUS_OUT,Timestamp status output port vector" "B_0x0,B_0x1,?,?" group.word 0x808000++0x1 line.word 0x0 "ETHSW_FES_VLAN_CMDR,ETHSW FES VLAN command register" bitfld.word 0x0 15. "TRSFR_VLAN_FID,Transfer VLAN_FID" "B_0x0,B_0x1" bitfld.word 0x0 14. "TRSFR_VLAN_TAG,Transfer VLAN_TAG" "B_0x0,B_0x1" bitfld.word 0x0 13. "TRSFR_VLAN_PORTS,Transfer VLAN_PORTS" "B_0x0,B_0x1" newline bitfld.word 0x0 12. "RD_WR,Read/Write" "B_0x0,B_0x1" hexmask.word 0x0 0.--11. 1. "VLAN_ID,VLAN_ID" group.word 0x808008++0x5 line.word 0x0 "ETHSW_FES_VLAN_PORTSR,ETHSW FES port VLAN membership register" bitfld.word 0x0 0.--2. "VLAN_MEMBER,VLAN membership" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x2 "ETHSW_FES_VLAN_TAGR,ETHSW FES port VLAN tagging register" bitfld.word 0x2 0.--2. "VLAN_TAG,VLAN tagging" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x4 "ETHSW_FES_VLAN_FIDR,ETHSW FES Filtering ID register" bitfld.word 0x4 15. "ENG_TRAFFIC,Engineered Traffic" "B_0x0,B_0x1" hexmask.word.byte 0x4 0.--5. 1. "FILTERING_ID,Filtering ID" rgroup.word 0x80E000++0x35 line.word 0x0 "ETHSW_FES_PORT_HIGHR,ETHSW FES FES_PORT_HIGH generic register" hexmask.word.byte 0x0 0.--3. 1. "FES_PORT_HIGH,The value of generic FES_PORT_HIGH" line.word 0x2 "ETHSW_FES_COUNTERSR,ETHSW FES COUNTERS generic register" bitfld.word 0x2 0.--2. "COUNTERS,The value of generic COUNTERS" "0,1,2,3,4,5,6,7" line.word 0x4 "ETHSW_FES_CT_PORTSR,ETHSW FES CT_PORTS generic register" hexmask.word 0x4 0.--11. 1. "CT_PORTS,The value of generic CT_PORTS" line.word 0x6 "ETHSW_FES_TS_PORTSR,ETHSW FES TS_PORTS generic register" hexmask.word 0x6 0.--11. 1. "TS_PORTS,The value of generic TS_PORTS" line.word 0x8 "ETHSW_FES_SMAC_TABLE_ROWSR,ETHSW FES SMAC_TABLE_ROWS generic register" hexmask.word.byte 0x8 0.--3. 1. "SMAC_TABLE_ROWS,The value of generic SMAC_TABLE_ROWS" line.word 0xA "ETHSW_FES_POLICINGR,ETHSW FES POLICING generic register" bitfld.word 0xA 0.--1. "POLICING,The value of generic POLICING" "B_0x0,B_0x1,B_0x2,B_0x3" line.word 0xC "ETHSW_FES_POLICERSR,ETHSW FES POLICERS generic register" hexmask.word.byte 0xC 0.--3. 1. "POLICERS,The value of generic POLICERS" line.word 0xE "ETHSW_FES_QUEUESR,ETHSW FES QUEUES generic register" hexmask.word.byte 0xE 0.--3. 1. "QUEUES,The value of generic QUEUES" line.word 0x10 "ETHSW_FES_BUFFER_SIZER,ETHSW FES BUFFER_SIZE generic register" bitfld.word 0x10 0. "BUFFER_SIZE,The value of generic BUFFER_SIZE" "B_0x0,B_0x1" line.word 0x12 "ETHSW_FES_SHAPERSR,ETHSW FES SHAPERS generic register" bitfld.word 0x12 0. "SHAPERS,The value of generic SHAPERS" "B_0x0,B_0x1" line.word 0x14 "ETHSW_FES_GIGABITR,ETHSW FES GIGABIT generic register" bitfld.word 0x14 0. "GIGABIT,The value of generic GIGABIT" "B_0x0,B_0x1" line.word 0x16 "ETHSW_FES_HSR_PORTSR,ETHSW FES HSR_PORTS generic register" hexmask.word.byte 0x16 0.--7. 1. "HSR_PORTS,The value of generic HSR_PORTS" line.word 0x18 "ETHSW_FES_PRP_PORTSR,ETHSW FES PRP_PORTS generic register" hexmask.word.byte 0x18 0.--7. 1. "PRP_PORTS,The value of generic PRP_PORTS" line.word 0x1A "ETHSW_FES_SCHEDULED_PORTSR,ETHSW FES SCHEDULED_PORTS generic register" hexmask.word 0x1A 0.--11. 1. "SCHEDULED_PORTS,The value of generic SCHEDULED_PORTS" line.word 0x1C "ETHSW_PREEMPTABLE_PORTR,ETHSW FES PREEMPTABLE_PORT generic register" hexmask.word 0x1C 0.--11. 1. "PREEMPTABLE_PORT,The value of generic PREEMPTABLE_PORT" line.word 0x1E "ETHSW_FES_MACSECR,ETHSW FES MACSEC generic register" hexmask.word 0x1E 0.--11. 1. "MACSEC,The value of generic MACSEC" line.word 0x20 "ETHSW_FES_MACSEC_CIPHERR,ETHSW FES MACSEC_CIPHER generic register" bitfld.word 0x20 0.--2. "MACSEC_CIPHER,The value of generic MACSEC_CIPHER" "?,B_0x1,?,?,?,?,?,?" line.word 0x22 "ETHSW_FES_MGMT_PORTSR,ETHSW FES MGMT_PORTS generic register" hexmask.word 0x22 0.--11. 1. "MGMT_PORTS,The value of generic MGMT_PORTS" line.word 0x24 "ETHSW_FES_FRER_PORTSR,ETHSW FES FRER_PORTS generic register" hexmask.word.byte 0x24 0.--7. 1. "FRER_PORTS,The value of generic FRER_PORTS" line.word 0x26 "ETHSW_FES_FRER_ENTRIESR,ETHSW FES FRER_ENTRIES generic register" hexmask.word.byte 0x26 0.--3. 1. "FRER_ENTRIES,The value of generic FRER_ENTRIES" line.word 0x28 "ETHSW_FES_FRER_STREAMSR,ETHSW FES FRER_STREAMS generic register" hexmask.word.byte 0x28 0.--3. 1. "FRER_STREAMS,The value of generic FRER_STREAMS" line.word 0x2A "ETHSW_FES_FIDSR,ETHSW FES FIDS generic register" hexmask.word.byte 0x2A 0.--5. 1. "FIDS,The value of generic FIDS" line.word 0x2C "ETHSW_FES_DMA_PORTSR,ETHSW FES DMA_PORTS generic register" hexmask.word 0x2C 0.--11. 1. "DMA_PORTS,The value of generic DMA_PORTS" line.word 0x2E "ETHSW_FES_DMA_TX_DESC_RINGR,ETHSW FES DMA_TX_DESC_RING generic register" hexmask.word.byte 0x2E 0.--3. 1. "DMA_TX_DESC_RING,The value of generic DMA_TX_DESC_RING" line.word 0x30 "ETHSW_FES_DMA_RX_DESC_RINGR,ETHSW FES DMA_RX_DESC_RING generic register" hexmask.word.byte 0x30 0.--3. 1. "DMA_RX_DESC_RING,The value of generic DMA_RX_DESC_RING" line.word 0x32 "ETHSW_FES_PSFPR,ETHSW FES PSFP generic register" bitfld.word 0x32 0. "PSFP,The value of generic PSFP" "0,1" line.word 0x34 "ETHSW_FES_PSFP_STREAMSR,ETHSW FES PSFP_STREAMS generic register" hexmask.word.byte 0x34 0.--3. 1. "PSFP_STREAMS,The value of generic PSFP_STREAMS" rgroup.word 0x80E100++0x1 line.word 0x0 "ETHSW_FES_CFG_CLK_FREQR,ETHSW FES CFG_CLK_FREQ register" hexmask.word.byte 0x0 0.--7. 1. "CFG_CLK_FREQ,The value of generic CFG_CLK_FREQ" rgroup.word 0x80E110++0x1 line.word 0x0 "ETHSW_FES_DEBUG_INR,ETHSW FES DEBUG_IN register" bitfld.word 0x0 0. "DEBUG_IN,The value of generic DEBUG_IN" "0,1" rgroup.word 0x80E200++0x5 line.word 0x0 "ETHSW_FES_H_ADV_10R,ETHSW FES hold advance 10M register" hexmask.word.byte 0x0 8.--15. 1. "HOLD_ADV_MII,holdadvance_mii_cycles value" hexmask.word.byte 0x0 0.--7. 1. "HOLD_ADV_CLK,holdadvance_clk_cycles value" line.word 0x2 "ETHSW_FES_H_ADV_100R,ETHSW FES hold advance 100M register" hexmask.word.byte 0x2 8.--15. 1. "HOLD_ADV_MII,holdadvance_mii_cycles value" hexmask.word.byte 0x2 0.--7. 1. "HOLD_ADV_CLK,holdadvance_clk_cycles value" line.word 0x4 "ETHSW_FES_H_ADV_1000R,ETHSW FES hold advance 1000M register" hexmask.word.byte 0x4 8.--15. 1. "HOLD_ADV_GMII,holdadvance_gmii_cycles value" hexmask.word.byte 0x4 0.--7. 1. "HOLD_ADV_CLK,holdadvance_clk_cycles value" rgroup.word 0x80E208++0x5 line.word 0x0 "ETHSW_FES_R_ADV_10R,ETHSW FES release advance 10M register" hexmask.word.byte 0x0 8.--15. 1. "REL_ADV_MII,releaseadvance_mii_cycles value" hexmask.word.byte 0x0 0.--7. 1. "REL_ADV_CLK,releaseadvance_clk_cycles value" line.word 0x2 "ETHSW_FES_R_ADV_100R,ETHSW FES release advance 100M register" hexmask.word.byte 0x2 8.--15. 1. "REL_ADV_MII,releaseadvance_mii_cycles value" hexmask.word.byte 0x2 0.--7. 1. "REL_ADV_CLK,releaseadvance_clk_cycles value" line.word 0x4 "ETHSW_FES_R_ADV_1000R,ETHSW FES release advance 1000M register" hexmask.word.byte 0x4 8.--15. 1. "REL_ADV_GMII,releaseadvance_gmii_cycles value" hexmask.word.byte 0x4 0.--7. 1. "REL_ADV_CLK,releaseadvance_clk_cycles value" rgroup.word 0x80E210++0x5 line.word 0x0 "ETHSW_FES_I_TO_G_MIN_10R,ETHSW FES minimum input to gate delay 10M register" hexmask.word.byte 0x0 8.--15. 1. "I_TO_G_MIN_MII,inputtogate_mii_cycles value" hexmask.word.byte 0x0 0.--7. 1. "I_TO_G_MIN_CLK,inputtogate_clk_cycles value" line.word 0x2 "ETHSW_FES_I_TO_G_MIN_100R,ETHSW FES minimum input to gate delay 100M register" hexmask.word.byte 0x2 8.--15. 1. "I_TO_G_MIN_MII,inputtogate_mii_cycles value" hexmask.word.byte 0x2 0.--7. 1. "I_TO_G_MIN_CLK,inputtogate_clk_cycles value" line.word 0x4 "ETHSW_FES_I_TO_G_MIN_1000R,ETHSW FES minimum input to gate delay 1000M register" hexmask.word.byte 0x4 8.--15. 1. "I_TO_G_MIN_GMII,inputtogate_gmii_cycles value" hexmask.word.byte 0x4 0.--7. 1. "I_TO_G_MIN_CLK,inputtogate_clk_cycles value" rgroup.word 0x80E218++0x5 line.word 0x0 "ETHSW_FES_I_TO_G_MAX_10R,ETHSW FES maximum input to gate delay 10M register" hexmask.word.byte 0x0 8.--15. 1. "I_TO_G_MAX_MII,inputtogate_mii_cycles value" hexmask.word.byte 0x0 0.--7. 1. "I_TO_G_MAX_CLK,inputtogate_clk_cycles value" line.word 0x2 "ETHSW_FES_I_TO_G_MAX_100R,ETHSW FES maximum input to gate delay 100M register" hexmask.word.byte 0x2 8.--15. 1. "I_TO_G_MAX_MII,inputtogate_mii_cycles value" hexmask.word.byte 0x2 0.--7. 1. "I_TO_G_MAX_CLK,inputtogate_clk_cycles value" line.word 0x4 "ETHSW_FES_I_TO_G_MAX_1000R,ETHSW FES maximum input to gate delay 1000M register" hexmask.word.byte 0x4 8.--15. 1. "I_TO_G_MAX_GMII,inputtogate_gmii_cycles value" hexmask.word.byte 0x4 0.--7. 1. "I_TO_G_MAX_CLK,inputtogate_clk_cycles value" rgroup.word 0x80E220++0x5 line.word 0x0 "ETHSW_FES_G_TO_O_MIN_10R,ETHSW FES minimum gate to output delay 10M register" hexmask.word.byte 0x0 8.--15. 1. "G_TO_O_MIN_MII,gatetooutput_mii_cycles value" hexmask.word.byte 0x0 0.--7. 1. "G_TO_O_MIN_CLK,gatetooutput_clk_cycles value" line.word 0x2 "ETHSW_FES_G_TO_O_MIN_100R,ETHSW FES minimum gate to output delay 100M register" hexmask.word.byte 0x2 8.--15. 1. "G_TO_O_MIN_MII,gatetooutput_mii_cycles value" hexmask.word.byte 0x2 0.--7. 1. "G_TO_O_MIN_CLK,gatetooutput_clk_cycles value" line.word 0x4 "ETHSW_FES_G_TO_O_MIN_1000R,ETHSW FES minimum gate to output delay 1000M register" hexmask.word.byte 0x4 8.--15. 1. "G_TO_O_MIN_GMII,gatetooutput_gmii_cycles value" hexmask.word.byte 0x4 0.--7. 1. "G_TO_O_MIN_CLK,gatetooutput_clk_cycles value" rgroup.word 0x80E228++0x5 line.word 0x0 "ETHSW_FES_G_TO_O_MAX_10R,ETHSW FES maximum gate to output delay 10M register" hexmask.word.byte 0x0 8.--15. 1. "G_TO_O_MAX_MII,gatetooutput_mii_cycles value" hexmask.word.byte 0x0 0.--7. 1. "G_TO_O_MAX_CLK,gatetooutput_clk_cycles value" line.word 0x2 "ETHSW_FES_G_TO_O_MAX_100R,ETHSW FES maximum gate to output delay 100M register" hexmask.word.byte 0x2 8.--15. 1. "G_TO_O_MAX_MII,gatetooutput_mii_cycles value" hexmask.word.byte 0x2 0.--7. 1. "G_TO_O_MAX_CLK,gatetooutput_clk_cycles value" line.word 0x4 "ETHSW_FES_G_TO_O_MAX_1000R,ETHSW FES maximum gate to output delay 1000M register" hexmask.word.byte 0x4 8.--15. 1. "G_TO_O_MAX_GMII,gatetooutput_gmii_cycles value" hexmask.word.byte 0x4 0.--7. 1. "G_TO_O_MAX_CLK,gatetooutput_clk_cycles value" rgroup.word 0x80F000++0x1 line.word 0x0 "ETHSW_FES_CAPT0R,ETHSW FES capture status 0 register" bitfld.word 0x0 5. "CAPTURE_PPPS1,Capture PPPS1" "0,1" bitfld.word 0x0 4. "CAPTURE_PPPS0,Capture PPPS0" "0,1" bitfld.word 0x0 0. "CAPTURE_PE,Capture PE" "0,1" group.word 0x80F002++0x5 line.word 0x0 "ETHSW_FES_CAPT1R,ETHSW FES capture control 1 register" hexmask.word 0x0 0.--11. 1. "ENTITY,Entity" line.word 0x2 "ETHSW_FES_CAPT2R,ETHSW FES capture control 2 register" hexmask.word 0x2 4.--15. 1. "STREAM,Stream" hexmask.word.byte 0x2 0.--3. 1. "PORT,Port" line.word 0x4 "ETHSW_FES_CAPT3R,ETHSW FES capture control 3 register" hexmask.word 0x4 4.--15. 1. "STREAM,Stream" hexmask.word.byte 0x4 0.--3. 1. "PORT,Port" rgroup.word 0x80F200++0xB line.word 0x0 "ETHSW_FES_SEQ_REC_TOUT_LR,ETHSW FES sequence recovery timeouts low register" hexmask.word 0x0 0.--15. 1. "COUNTER,Counter value bits (15:0)" line.word 0x2 "ETHSW_FES_SEQ_REC_TOUT_HR,ETHSW FES sequence recovery timeouts high register" hexmask.word 0x2 0.--15. 1. "COUNTER,Counter value bits (31:16)" line.word 0x4 "ETHSW_FES_VECT_JUMP_LR,ETHSW FES vector recovery jump ahead low register" hexmask.word 0x4 0.--15. 1. "COUNTER,Counter value bits (15:0)" line.word 0x6 "ETHSW_FES_VECT_JUMP_HR,ETHSW FES vector recovery jump ahead high register" hexmask.word 0x6 0.--15. 1. "COUNTER,Counter value bits (31:16)" line.word 0x8 "ETHSW_FES_SEQ_REC_OOO_LR,ETHSW FES vector recovery out of order frames low register" hexmask.word 0x8 0.--15. 1. "COUNTER,Counter value bits (15:0)" line.word 0xA "ETHSW_FES_SEQ_REC_OOO_HR,ETHSW FES vector recovery out of order frames high register" hexmask.word 0xA 0.--15. 1. "COUNTER,Counter value bits (31:16)" rgroup.word 0x80F300++0x17 line.word 0x0 "ETHSW_FES_FRAMES_IN_LR,ETHSW FES input frames low register" hexmask.word 0x0 0.--15. 1. "COUNTER,Counter value bits (15:0)" line.word 0x2 "ETHSW_FES_FRAMES_IN_HR,ETHSW FES input frames high register" hexmask.word 0x2 0.--15. 1. "COUNTER,Counter value bits (31:16)" line.word 0x4 "ETHSW_FES_FRAMES_OUT_LR,ETHSW FES output frames low register" hexmask.word 0x4 0.--15. 1. "COUNTER,Counter value bits (15:0)" line.word 0x6 "ETHSW_FES_FRAMES_OUT_HR,ETHSW FES output frames high register" hexmask.word 0x6 0.--15. 1. "COUNTER,Counter value bits (31:16)" line.word 0x8 "ETHSW_FES_SEQ_REC_OOO2_LR,ETHSW FES vector recovery out of order frames low register" hexmask.word 0x8 0.--15. 1. "COUNTER,Counter value bits (15:0)" line.word 0xA "ETHSW_FES_SEQ_REC_OOO2_HR,ETHSW FES vector recovery out of order frames high register" hexmask.word 0xA 0.--15. 1. "COUNTER,Counter value bits (31:16)" line.word 0xC "ETHSW_FES_VECT_ROG_LR,ETHSW FES vector recovery rogue frames low register" hexmask.word 0xC 0.--15. 1. "COUNTER,Counter value bits (15:0)" line.word 0xE "ETHSW_FES_VECT_ROG_HR,ETHSW FES vector recovery rogue frames high register" hexmask.word 0xE 0.--15. 1. "COUNTER,Counter value bits (31:16)" line.word 0x10 "ETHSW_FES_SEQ_REC_TAGLESS_LR,ETHSW FES sequence recovery tagless frames low register" hexmask.word 0x10 0.--15. 1. "COUNTER,Counter value bits (15:0)" line.word 0x12 "ETHSW_FES_SEQ_REC_TAGLESS_HR,ETHSW FES sequence recovery tagless frames high register" hexmask.word 0x12 0.--15. 1. "COUNTER,Counter value bits (31:16)" line.word 0x14 "ETHSW_FES_SEQ_REC_SB_LR,ETHSW FES sequence recovery frames seen before low register" hexmask.word 0x14 0.--15. 1. "COUNTER,Counter value bits (15:0)" line.word 0x16 "ETHSW_FES_SEQ_REC_SB_HR,ETHSW FES sequence recovery frames seen before high register" hexmask.word 0x16 0.--15. 1. "COUNTER,Counter value bits (31:16)" rgroup.long 0x180000++0x3 line.long 0x0 "ETHSW_FRTC0_GLR,ETHSW FRTC0 general register" hexmask.long.word 0x0 8.--23. 1. "DEV_ID,Device ID" hexmask.long.byte 0x0 0.--7. 1. "REV_ID,Revision ID" rgroup.long 0x181004++0x13 line.long 0x0 "ETHSW_FRTC0_CUR_NSECR,ETHSW FRTC0 current time nanosecond register" hexmask.long 0x0 0.--29. 1. "NANOSECONDS,Nanoseconds part of the current time" line.long 0x4 "ETHSW_FRTC0_CUR_SECLR,ETHSW FRTC0 current time second low register" hexmask.long 0x4 0.--31. 1. "SECONDS,Seconds part of the current time (least significant part)" line.long 0x8 "ETHSW_FRTC0_CUR_SECHR,ETHSW FRTC0 current time second high register" hexmask.long.word 0x8 0.--15. 1. "SECONDS,Seconds part of the current time (most significant part)" line.long 0xC "ETHSW_FRTC0_TIME_CCLR,ETHSW FRTC0 time CC low register" hexmask.long 0xC 0.--31. 1. "TIME_CC,Clock cycle counter (least significant part)" line.long 0x10 "ETHSW_FRTC0_TIME_CCHR,ETHSW FRTC0 time CC high register" hexmask.long.word 0x10 0.--15. 1. "TIME_CC,Clock cycle counter (most significant part)" group.long 0x181020++0x7 line.long 0x0 "ETHSW_FRTC0_STEP_SIZE_SNR,ETHSW FRTC0 step size subnanosecond register" hexmask.long 0x0 0.--31. 1. "SUBNANOSECONDS,Subnanoseconds" line.long 0x4 "ETHSW_FRTC0_STEP_SIZE_NR,ETHSW FRTC0 step size nanosecond register" hexmask.long.byte 0x4 0.--5. 1. "NANOSECONDS,Nanoseconds" group.long 0x181034++0xF line.long 0x0 "ETHSW_FRTC0_ADJUST_NSECR,ETHSW FRTC0 adjust nanosecond register" hexmask.long 0x0 0.--29. 1. "NANOSECONDS,Nanoseconds" line.long 0x4 "ETHSW_FRTC0_ADJUST_SECLR,ETHSW FRTC0 adjust second low register" hexmask.long 0x4 0.--31. 1. "SECONDS,Seconds (least significant part)" line.long 0x8 "ETHSW_FRTC0_ADJUST_SECHR,ETHSW FRTC0 adjust second high register" hexmask.long.word 0x8 0.--15. 1. "SECONDS,Seconds (most significant part)" line.long 0xC "ETHSW_FRTC0_TIME_CMDR,ETHSW FRTC0 time command register" bitfld.long 0xC 3. "ADJUST_TIME_MODE,Determines when ADJUST_TIME command is taken into use (does not affect to ADJUST_STEP command):" "B_0x0,B_0x1" bitfld.long 0xC 2. "READ_TIME,Updates the following registers with the current values in the NCO:" "0,1" bitfld.long 0xC 1. "ADJUST_STEP,Take the new values of the following registers into use:" "0,1" newline bitfld.long 0xC 0. "ADJUST_TIME,Adds (for one time only) the values in the following registers to internal time (NCO):" "0,1" rgroup.long 0x182000++0x7 line.long 0x0 "ETHSW_FRTC0_GENERICS_LR,ETHSW FRTC0 generics low register" hexmask.long 0x0 0.--31. 1. "DEFAULT_STEP_SNS,The value of Generic DEFAULT_STEP_SNS." line.long 0x4 "ETHSW_FRTC0_GENERICS_HR,ETHSW FRTC0 generics high register" hexmask.long.byte 0x4 0.--5. 1. "DEFAULT_STEP_NS,The value of Generic DEFAULT_STEP_NS." rgroup.long 0x190000++0x3 line.long 0x0 "ETHSW_FRTC1_GLR,ETHSW FRTC1 general register" hexmask.long.word 0x0 8.--23. 1. "DEV_ID,Device ID" hexmask.long.byte 0x0 0.--7. 1. "REV_ID,Revision ID" rgroup.long 0x191004++0x13 line.long 0x0 "ETHSW_FRTC1_CUR_NSECR,ETHSW FRTC1 current time nanosecond register" hexmask.long 0x0 0.--29. 1. "NANOSECONDS,Nanoseconds part of the current time" line.long 0x4 "ETHSW_FRTC1_CUR_SECLR,ETHSW FRTC1 current time second low register" hexmask.long 0x4 0.--31. 1. "SECONDS,Seconds part of the current time (least significant part)" line.long 0x8 "ETHSW_FRTC1_CUR_SECHR,ETHSW FRTC1 current time second high register" hexmask.long.word 0x8 0.--15. 1. "SECONDS,Seconds part of the current time (most significant part)" line.long 0xC "ETHSW_FRTC1_TIME_CCLR,ETHSW FRTC1 time CC low register" hexmask.long 0xC 0.--31. 1. "TIME_CC,Clock cycle counter (least significant part)" line.long 0x10 "ETHSW_FRTC1_TIME_CCHR,ETHSW FRTC1 time CC high register" hexmask.long.word 0x10 0.--15. 1. "TIME_CC,Clock cycle counter (most significant part)" group.long 0x191020++0x7 line.long 0x0 "ETHSW_FRTC1_STEP_SIZE_SNR,ETHSW FRTC1 step size subnanosecond register" hexmask.long 0x0 0.--31. 1. "SUBNANOSECONDS,Subnanoseconds" line.long 0x4 "ETHSW_FRTC1_STEP_SIZE_NR,ETHSW FRTC1 step size nanosecond register" hexmask.long.byte 0x4 0.--5. 1. "NANOSECONDS,Nanoseconds" group.long 0x191034++0xF line.long 0x0 "ETHSW_FRTC1_ADJUST_NSECR,ETHSW FRTC1 adjust nanosecond register" hexmask.long 0x0 0.--29. 1. "NANOSECONDS,Nanoseconds" line.long 0x4 "ETHSW_FRTC1_ADJUST_SECLR,ETHSW FRTC1 adjust second low register" hexmask.long 0x4 0.--31. 1. "SECONDS,Seconds (least significant part)" line.long 0x8 "ETHSW_FRTC1_ADJUST_SECHR,ETHSW FRTC1 adjust second high register" hexmask.long.word 0x8 0.--15. 1. "SECONDS,Seconds (most significant part)" line.long 0xC "ETHSW_FRTC1_TIME_CMDR,ETHSW FRTC1 time command register" bitfld.long 0xC 3. "ADJUST_TIME_MODE,Determines when ADJUST_TIME command is taken into use (does not affect to ADJUST_STEP command):" "B_0x0,B_0x1" bitfld.long 0xC 2. "READ_TIME,Updates the following registers with the current values in the NCO:" "0,1" bitfld.long 0xC 1. "ADJUST_STEP,Take the new values of the following registers into use:" "0,1" newline bitfld.long 0xC 0. "ADJUST_TIME,Adds (for one time only) the values in the following registers to internal time (NCO):" "0,1" rgroup.long 0x192000++0x7 line.long 0x0 "ETHSW_FRTC1_GENERICS_LR,ETHSW FRTC1 generics low register" hexmask.long 0x0 0.--31. 1. "DEFAULT_STEP_SNS,The value of Generic DEFAULT_STEP_SNS." line.long 0x4 "ETHSW_FRTC1_GENERICS_HR,ETHSW FRTC1 generics high register" hexmask.long.byte 0x4 0.--5. 1. "DEFAULT_STEP_NS,The value of Generic DEFAULT_STEP_NS." group.word 0x1D0000++0x3 line.word 0x0 "ETHSW_FSC0_SCH_GENR,ETHSW FSC scheduler 0 general register" hexmask.word 0x0 4.--14. 1. "DWNCNT_STRT_VAL,Downcounter start value." bitfld.word 0x0 0.--1. "DWNCNT_SPD,Downcounter speed 10/100 divider" "B_0x0,B_0x1,B_0x2,?" line.word 0x2 "ETHSW_FSC0_DWNCNT_SPDR,ETHSW FSC scheduler 0 downcounter speed setting register" hexmask.word.byte 0x2 5.--8. 1. "DWNCNTR_SPD,Downcounter speed addend" group.word 0x1D0020++0x1 line.word 0x0 "ETHSW_FSC0_EME_DIS_CR,ETHSW FSC scheduler 0 emergency disable control register" rbitfld.word 0x0 1. "EME_DIS_MUX_STATE,Current state of emergency disable MUX" "B_0x0,B_0x1" bitfld.word 0x0 0. "EME_DIS_MUX_CTRL,Emergency disable MUX control" "B_0x0,B_0x1" group.word 0x1D0030++0x1 line.word 0x0 "ETHSW_FSC0_EME_DIS_STATR,ETHSW FSC scheduler 0 emergency disable port state register" hexmask.word 0x0 0.--8. 1. "EME_DIS_STAT,Gate state in Emergency disable mode" group.word 0x1D0800++0x1 line.word 0x0 "ETHSW_FSC0_T0_TBL_GENR,ETHSW FSC scheduler 0 table 0 general control and status register" bitfld.word 0x0 15. "UPDATE,Update" "0,1" rbitfld.word 0x0 9. "LST_CYC_RCHD,Last cycle reached" "B_0x0,B_0x1" bitfld.word 0x0 8. "LST_CYC_EN,Last cycle number register enable/disable" "B_0x0,B_0x1" newline rbitfld.word 0x0 1. "SCH_TBL_IN_USE,Schedule table currently in use" "B_0x0,B_0x1" bitfld.word 0x0 0. "SCH_TBL_UPDATE,Schedule table can be taken into use" "B_0x0,B_0x1" group.long 0x1D0814++0x3 line.long 0x0 "ETHSW_FSC0_T0_STRT_NSR,ETHSW FSC scheduler 0 table 0 start time nanosecond register" hexmask.long 0x0 0.--29. 1. "STARTTIME_NS,Time schedule table taken into use nanoseconds part." group.word 0x1D0818++0x1 line.word 0x0 "ETHSW_FSC0_T0_STRT_SR,ETHSW FSC scheduler 0 table 0 start time second register" hexmask.word.byte 0x0 0.--7. 1. "STARTTIME_S,Time schedule table taken into use seconds part." group.long 0x1D0820++0x7 line.long 0x0 "ETHSW_FSC0_T0_CYC_SUBNSR,ETHSW FSC scheduler 0 table 0 cycle time subnanosecond register" hexmask.long.tbyte 0x0 8.--31. 1. "CYCLETIME_SUBNS,Time each cycle is run subnanoseconds part." line.long 0x4 "ETHSW_FSC0_T0_CYC_NSR,ETHSW FSC scheduler 0 table 0 cycle time nanosecond register" hexmask.long 0x4 0.--29. 1. "CYCLETIME_NS,Time each cycle is run nanoseconds part." rgroup.long 0x1D0834++0x7 line.long 0x0 "ETHSW_FSC0_T0_CYCTS_NSR,ETHSW FSC scheduler 0 table 0 cycle timestamp nanosecond register" hexmask.long 0x0 0.--29. 1. "TIMESTAMP_NS,Timestamp from the start of the previous cycle nanoseconds part." line.long 0x4 "ETHSW_FSC0_T0_CYCTS_SR,ETHSW FSC scheduler 0 table 0 cycle timestamp second register" hexmask.long.byte 0x4 0.--7. 1. "TIMESTAMP_S,Timestamp from the start of the previous cycle seconds part." rgroup.word 0x1D0840++0x1 line.word 0x0 "ETHSW_FSC0_T0_CYC_CNTR,ETHSW FSC scheduler 0 table 0 cycle counter register" hexmask.word 0x0 0.--15. 1. "CYCLE_CNT,Cycle count." rgroup.word 0x1D0844++0x1 line.word 0x0 "ETHSW_FSC0_T0_LST_CYCR,ETHSW FSC scheduler 0 table 0 last cycle register" hexmask.word 0x0 0.--15. 1. "LAST_CYCLE,Cycle number of the last cycle." group.word 0x1D0900++0x1 line.word 0x0 "ETHSW_FSC0_T1_TBL_GENR,ETHSW FSC scheduler 0 table 1 general control and status register" bitfld.word 0x0 15. "UPDATE,Update" "0,1" rbitfld.word 0x0 9. "LST_CYC_RCHD,Last cycle reached" "B_0x0,B_0x1" bitfld.word 0x0 8. "LST_CYC_EN,Last cycle number register enable/disable" "B_0x0,B_0x1" newline rbitfld.word 0x0 1. "SCH_TBL_IN_USE,Schedule table currently in use" "B_0x0,B_0x1" bitfld.word 0x0 0. "SCH_TBL_UPDATE,Schedule table can be taken into use" "B_0x0,B_0x1" group.long 0x1D0914++0x3 line.long 0x0 "ETHSW_FSC0_T1_STRT_NSR,ETHSW FSC scheduler 0 table 1 start time nanosecond register" hexmask.long 0x0 0.--29. 1. "STARTTIME_NS,Time schedule table taken into use nanoseconds part." group.word 0x1D0918++0x1 line.word 0x0 "ETHSW_FSC0_T1_STRT_SR,ETHSW FSC scheduler 0 table 1 start time second register" hexmask.word.byte 0x0 0.--7. 1. "STARTTIME_S,Time schedule table taken into use seconds part." group.long 0x1D0920++0x7 line.long 0x0 "ETHSW_FSC0_T1_CYC_SUBNSR,ETHSW FSC scheduler 0 table 1 cycle time subnanosecond register" hexmask.long.tbyte 0x0 8.--31. 1. "CYCLETIME_SUBNS,Time each cycle is run subnanoseconds part." line.long 0x4 "ETHSW_FSC0_T1_CYC_NSR,ETHSW FSC scheduler 0 table 1 cycle time nanosecond register" hexmask.long 0x4 0.--29. 1. "CYCLETIME_NS,Time each cycle is run nanoseconds part." rgroup.long 0x1D0934++0x7 line.long 0x0 "ETHSW_FSC0_T1_CYCTS_NSR,ETHSW FSC scheduler 0 table 1 cycle timestamp nanosecond register" hexmask.long 0x0 0.--29. 1. "TIMESTAMP_NS,Timestamp from the start of the previous cycle nanoseconds part." line.long 0x4 "ETHSW_FSC0_T1_CYCTS_SR,ETHSW FSC scheduler 0 table 1 cycle timestamp second register" hexmask.long.byte 0x4 0.--7. 1. "TIMESTAMP_S,Timestamp from the start of the previous cycle seconds part." rgroup.word 0x1D0940++0x1 line.word 0x0 "ETHSW_FSC0_T1_CYC_CNTR,ETHSW FSC scheduler 0 table 1 cycle counter register" hexmask.word 0x0 0.--15. 1. "CYCLE_CNT,Cycle count." rgroup.word 0x1D0944++0x1 line.word 0x0 "ETHSW_FSC0_T1_LST_CYCR,ETHSW FSC scheduler 0 table 1 last cycle register" hexmask.word 0x0 0.--15. 1. "LAST_CYCLE,Cycle number of the last cycle." group.word 0x1D1000++0x3 line.word 0x0 "ETHSW_FSC1_SCH_GENR,ETHSW FSC scheduler 1 general register" hexmask.word 0x0 4.--14. 1. "DWNCNT_STRT_VAL,Downcounter start value." bitfld.word 0x0 0.--1. "DWNCNT_SPD,Downcounter speed 10/100 divider" "B_0x0,B_0x1,B_0x2,?" line.word 0x2 "ETHSW_FSC1_DWNCNT_SPDR,ETHSW FSC scheduler 1 downcounter speed setting register" hexmask.word.byte 0x2 5.--8. 1. "DWNCNTR_SPD,Downcounter speed addend" group.word 0x1D1020++0x1 line.word 0x0 "ETHSW_FSC1_EME_DIS_CR,ETHSW FSC scheduler 1 emergency disable control register" rbitfld.word 0x0 1. "EME_DIS_MUX_STATE,Current state of emergency disable MUX" "B_0x0,B_0x1" bitfld.word 0x0 0. "EME_DIS_MUX_CTRL,Emergency disable MUX control" "B_0x0,B_0x1" group.word 0x1D1030++0x1 line.word 0x0 "ETHSW_FSC1_EME_DIS_STATR,ETHSW FSC scheduler 1 emergency disable port state register" hexmask.word 0x0 0.--8. 1. "EME_DIS_STAT,Gate state in Emergency disable mode" group.word 0x1D1800++0x1 line.word 0x0 "ETHSW_FSC1_T0_TBL_GENR,ETHSW FSC scheduler 1 table 0 general control and status register" bitfld.word 0x0 15. "UPDATE,Update" "0,1" rbitfld.word 0x0 9. "LST_CYC_RCHD,Last cycle reached" "B_0x0,B_0x1" bitfld.word 0x0 8. "LST_CYC_EN,Last cycle number register enable/disable" "B_0x0,B_0x1" newline rbitfld.word 0x0 1. "SCH_TBL_IN_USE,Schedule table currently in use" "B_0x0,B_0x1" bitfld.word 0x0 0. "SCH_TBL_UPDATE,Schedule table can be taken into use" "B_0x0,B_0x1" group.long 0x1D1814++0x3 line.long 0x0 "ETHSW_FSC1_T0_STRT_NSR,ETHSW FSC scheduler 1 table 0 start time nanosecond register" hexmask.long 0x0 0.--29. 1. "STARTTIME_NS,Time schedule table taken into use nanoseconds part." group.word 0x1D1818++0x1 line.word 0x0 "ETHSW_FSC1_T0_STRT_SR,ETHSW FSC scheduler 1 table 0 start time second register" hexmask.word.byte 0x0 0.--7. 1. "STARTTIME_S,Time schedule table taken into use seconds part." group.long 0x1D1820++0x7 line.long 0x0 "ETHSW_FSC1_T0_CYC_SUBNSR,ETHSW FSC scheduler 1 table 0 cycle time subnanosecond register" hexmask.long.tbyte 0x0 8.--31. 1. "CYCLETIME_SUBNS,Time each cycle is run subnanoseconds part." line.long 0x4 "ETHSW_FSC1_T0_CYC_NSR,ETHSW FSC scheduler 1 table 0 cycle time nanosecond register" hexmask.long 0x4 0.--29. 1. "CYCLETIME_NS,Time each cycle is run nanoseconds part." rgroup.long 0x1D1834++0x7 line.long 0x0 "ETHSW_FSC1_T0_CYCTS_NSR,ETHSW FSC scheduler 1 table 0 cycle timestamp nanosecond register" hexmask.long 0x0 0.--29. 1. "TIMESTAMP_NS,Timestamp from the start of the previous cycle nanoseconds part." line.long 0x4 "ETHSW_FSC1_T0_CYCTS_SR,ETHSW FSC scheduler 1 table 0 cycle timestamp second register" hexmask.long.byte 0x4 0.--7. 1. "TIMESTAMP_S,Timestamp from the start of the previous cycle seconds part." rgroup.word 0x1D1840++0x1 line.word 0x0 "ETHSW_FSC1_T0_CYC_CNTR,ETHSW FSC scheduler 1 table 0 cycle counter register" hexmask.word 0x0 0.--15. 1. "CYCLE_CNT,Cycle count." rgroup.word 0x1D1844++0x1 line.word 0x0 "ETHSW_FSC1_T0_LST_CYCR,ETHSW FSC scheduler 1 table 0 last cycle register" hexmask.word 0x0 0.--15. 1. "LAST_CYCLE,Cycle number of the last cycle." group.word 0x1D1900++0x1 line.word 0x0 "ETHSW_FSC1_T1_TBL_GENR,ETHSW FSC scheduler 1 table 1 general control and status register" bitfld.word 0x0 15. "UPDATE,Update" "0,1" rbitfld.word 0x0 9. "LST_CYC_RCHD,Last cycle reached" "B_0x0,B_0x1" bitfld.word 0x0 8. "LST_CYC_EN,Last cycle number register enable/disable" "B_0x0,B_0x1" newline rbitfld.word 0x0 1. "SCH_TBL_IN_USE,Schedule table currently in use" "B_0x0,B_0x1" bitfld.word 0x0 0. "SCH_TBL_UPDATE,Schedule table can be taken into use" "B_0x0,B_0x1" group.long 0x1D1914++0x3 line.long 0x0 "ETHSW_FSC1_T1_STRT_NSR,ETHSW FSC scheduler 1 table 1 start time nanosecond register" hexmask.long 0x0 0.--29. 1. "STARTTIME_NS,Time schedule table taken into use nanoseconds part." group.word 0x1D1918++0x1 line.word 0x0 "ETHSW_FSC1_T1_STRT_SR,ETHSW FSC scheduler 1 table 1 start time second register" hexmask.word.byte 0x0 0.--7. 1. "STARTTIME_S,Time schedule table taken into use seconds part." group.long 0x1D1920++0x7 line.long 0x0 "ETHSW_FSC1_T1_CYC_SUBNSR,ETHSW FSC scheduler 1 table 1 cycle time subnanosecond register" hexmask.long.tbyte 0x0 8.--31. 1. "CYCLETIME_SUBNS,Time each cycle is run subnanoseconds part." line.long 0x4 "ETHSW_FSC1_T1_CYC_NSR,ETHSW FSC scheduler 1 table 1 cycle time nanosecond register" hexmask.long 0x4 0.--29. 1. "CYCLETIME_NS,Time each cycle is run nanoseconds part." rgroup.long 0x1D1934++0x7 line.long 0x0 "ETHSW_FSC1_T1_CYCTS_NSR,ETHSW FSC scheduler 1 table 1 cycle timestamp nanosecond register" hexmask.long 0x0 0.--29. 1. "TIMESTAMP_NS,Timestamp from the start of the previous cycle nanoseconds part." line.long 0x4 "ETHSW_FSC1_T1_CYCTS_SR,ETHSW FSC scheduler 1 table 1 cycle timestamp second register" hexmask.long.byte 0x4 0.--7. 1. "TIMESTAMP_S,Timestamp from the start of the previous cycle seconds part." rgroup.word 0x1D1940++0x1 line.word 0x0 "ETHSW_FSC1_T1_CYC_CNTR,ETHSW FSC scheduler 1 table 1 cycle counter register" hexmask.word 0x0 0.--15. 1. "CYCLE_CNT,Cycle count." rgroup.word 0x1D1944++0x1 line.word 0x0 "ETHSW_FSC1_T1_LST_CYCR,ETHSW FSC scheduler 1 table 1 last cycle register" hexmask.word 0x0 0.--15. 1. "LAST_CYCLE,Cycle number of the last cycle." group.word 0x1D2000++0x3 line.word 0x0 "ETHSW_FSC2_SCH_GENR,ETHSW FSC scheduler 2 general register" hexmask.word 0x0 4.--14. 1. "DWNCNT_STRT_VAL,Downcounter start value." bitfld.word 0x0 0.--1. "DWNCNT_SPD,Downcounter speed 10/100 divider" "B_0x0,B_0x1,B_0x2,?" line.word 0x2 "ETHSW_FSC2_DWNCNT_SPDR,ETHSW FSC scheduler 2 downcounter speed setting register" hexmask.word.byte 0x2 5.--8. 1. "DWNCNTR_SPD,Downcounter speed addend" group.word 0x1D2020++0x1 line.word 0x0 "ETHSW_FSC2_EME_DIS_CR,ETHSW FSC scheduler 2 emergency disable control register" rbitfld.word 0x0 1. "EME_DIS_MUX_STATE,Current state of emergency disable MUX" "B_0x0,B_0x1" bitfld.word 0x0 0. "EME_DIS_MUX_CTRL,Emergency disable MUX control" "B_0x0,B_0x1" group.word 0x1D2030++0x1 line.word 0x0 "ETHSW_FSC2_EME_DIS_STATR,ETHSW FSC scheduler 2 emergency disable port state register" hexmask.word 0x0 0.--8. 1. "EME_DIS_STAT,Gate state in Emergency disable mode" group.word 0x1D2800++0x1 line.word 0x0 "ETHSW_FSC2_T0_TBL_GENR,ETHSW FSC scheduler 2 table 0 general control and status register" bitfld.word 0x0 15. "UPDATE,Update" "0,1" rbitfld.word 0x0 9. "LST_CYC_RCHD,Last cycle reached" "B_0x0,B_0x1" bitfld.word 0x0 8. "LST_CYC_EN,Last cycle number register enable/disable" "B_0x0,B_0x1" newline rbitfld.word 0x0 1. "SCH_TBL_IN_USE,Schedule table currently in use" "B_0x0,B_0x1" bitfld.word 0x0 0. "SCH_TBL_UPDATE,Schedule table can be taken into use" "B_0x0,B_0x1" group.long 0x1D2814++0x3 line.long 0x0 "ETHSW_FSC2_T0_STRT_NSR,ETHSW FSC scheduler 2 table 0 start time nanosecond register" hexmask.long 0x0 0.--29. 1. "STARTTIME_NS,Time schedule table taken into use nanoseconds part." group.word 0x1D2818++0x1 line.word 0x0 "ETHSW_FSC2_T0_STRT_SR,ETHSW FSC scheduler 2 table 0 start time second register" hexmask.word.byte 0x0 0.--7. 1. "STARTTIME_S,Time schedule table taken into use seconds part." group.long 0x1D2820++0x7 line.long 0x0 "ETHSW_FSC2_T0_CYC_SUBNSR,ETHSW FSC scheduler 2 table 0 cycle time subnanosecond register" hexmask.long.tbyte 0x0 8.--31. 1. "CYCLETIME_SUBNS,Time each cycle is run subnanoseconds part." line.long 0x4 "ETHSW_FSC2_T0_CYC_NSR,ETHSW FSC scheduler 2 table 0 cycle time nanosecond register" hexmask.long 0x4 0.--29. 1. "CYCLETIME_NS,Time each cycle is run nanoseconds part." rgroup.long 0x1D2834++0x7 line.long 0x0 "ETHSW_FSC2_T0_CYCTS_NSR,ETHSW FSC scheduler 2 table 0 cycle timestamp nanosecond register" hexmask.long 0x0 0.--29. 1. "TIMESTAMP_NS,Timestamp from the start of the previous cycle nanoseconds part." line.long 0x4 "ETHSW_FSC2_T0_CYCTS_SR,ETHSW FSC scheduler 2 table 0 cycle timestamp second register" hexmask.long.byte 0x4 0.--7. 1. "TIMESTAMP_S,Timestamp from the start of the previous cycle seconds part." rgroup.word 0x1D2840++0x1 line.word 0x0 "ETHSW_FSC2_T0_CYC_CNTR,ETHSW FSC scheduler 2 table 0 cycle counter register" hexmask.word 0x0 0.--15. 1. "CYCLE_CNT,Cycle count." rgroup.word 0x1D2844++0x1 line.word 0x0 "ETHSW_FSC2_T0_LST_CYCR,ETHSW FSC scheduler 2 table 0 last cycle register" hexmask.word 0x0 0.--15. 1. "LAST_CYCLE,Cycle number of the last cycle." group.word 0x1D2900++0x1 line.word 0x0 "ETHSW_FSC2_T1_TBL_GENR,ETHSW FSC scheduler 2 table 1 general control and status register" bitfld.word 0x0 15. "UPDATE,Update" "0,1" rbitfld.word 0x0 9. "LST_CYC_RCHD,Last cycle reached" "B_0x0,B_0x1" bitfld.word 0x0 8. "LST_CYC_EN,Last cycle number register enable/disable" "B_0x0,B_0x1" newline rbitfld.word 0x0 1. "SCH_TBL_IN_USE,Schedule table currently in use" "B_0x0,B_0x1" bitfld.word 0x0 0. "SCH_TBL_UPDATE,Schedule table can be taken into use" "B_0x0,B_0x1" group.long 0x1D2914++0x3 line.long 0x0 "ETHSW_FSC2_T1_STRT_NSR,ETHSW FSC scheduler 2 table 1 start time nanosecond register" hexmask.long 0x0 0.--29. 1. "STARTTIME_NS,Time schedule table taken into use nanoseconds part." group.word 0x1D2918++0x1 line.word 0x0 "ETHSW_FSC2_T1_STRT_SR,ETHSW FSC scheduler 2 table 1 start time second register" hexmask.word.byte 0x0 0.--7. 1. "STARTTIME_S,Time schedule table taken into use seconds part." group.long 0x1D2920++0x7 line.long 0x0 "ETHSW_FSC2_T1_CYC_SUBNSR,ETHSW FSC scheduler 2 table 1 cycle time subnanosecond register" hexmask.long.tbyte 0x0 8.--31. 1. "CYCLETIME_SUBNS,Time each cycle is run subnanoseconds part." line.long 0x4 "ETHSW_FSC2_T1_CYC_NSR,ETHSW FSC scheduler 2 table 1 cycle time nanosecond register" hexmask.long 0x4 0.--29. 1. "CYCLETIME_NS,Time each cycle is run nanoseconds part." rgroup.long 0x1D2934++0x7 line.long 0x0 "ETHSW_FSC2_T1_CYCTS_NSR,ETHSW FSC scheduler 2 table 1 cycle timestamp nanosecond register" hexmask.long 0x0 0.--29. 1. "TIMESTAMP_NS,Timestamp from the start of the previous cycle nanoseconds part." line.long 0x4 "ETHSW_FSC2_T1_CYCTS_SR,ETHSW FSC scheduler 2 table 1 cycle timestamp second register" hexmask.long.byte 0x4 0.--7. 1. "TIMESTAMP_S,Timestamp from the start of the previous cycle seconds part." rgroup.word 0x1D2940++0x1 line.word 0x0 "ETHSW_FSC2_T1_CYC_CNTR,ETHSW FSC scheduler 2 table 1 cycle counter register" hexmask.word 0x0 0.--15. 1. "CYCLE_CNT,Cycle count." rgroup.word 0x1D2944++0x1 line.word 0x0 "ETHSW_FSC2_T1_LST_CYCR,ETHSW FSC scheduler 2 table 1 last cycle register" hexmask.word 0x0 0.--15. 1. "LAST_CYCLE,Cycle number of the last cycle." group.word 0x200000++0x1 line.word 0x0 "ETHSW_FES0_PORT_STATER,ETHSW FES port 0 port State register" bitfld.word 0x0 15. "RX_CT,RX Cut-through" "B_0x0,B_0x1" bitfld.word 0x0 14. "FB_STF,Fallback to Store-and-Forward" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "SPEED_SEL,Speed select" "?,B_0x1,B_0x2,B_0x3" newline bitfld.word 0x0 4.--5. "HW_MODE,Port HW mode" "B_0x0,?,B_0x2,?" bitfld.word 0x0 2.--3. "MGMT_ST,Port management state" "B_0x0,B_0x1,?,?" bitfld.word 0x0 0.--1. "FWD_ST,Port Forwarding state" "B_0x0,?,B_0x2,?" group.word 0x200010++0x9 line.word 0x0 "ETHSW_FES0_VLAN0R,ETHSW FES port 0 port VLAN configuration register 0" bitfld.word 0x0 15. "TGD_UTGD,Tagged/untagged" "B_0x0,B_0x1" bitfld.word 0x0 12.--14. "PD_PCP,Port default PCP" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--11. 1. "PD_VLAN,Port default VLAN" line.word 0x2 "ETHSW_FES0_VLAN1R,ETHSW FES port 0 port VLAN configuration register 1" bitfld.word 0x2 15. "USE_DEI,Use_DEI" "B_0x0,B_0x1" hexmask.word 0x2 0.--11. 1. "VLAN_PRIF,Default VLAN for Priority Tagged Frames" line.word 0x4 "ETHSW_FES0_FWDM_CFGR,ETHSW FES port 0 port forward mask configuration register" bitfld.word 0x4 0.--2. "PORT_FWDM,Port forward mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x6 "ETHSW_FES0_PRIO_REGENLR,ETHSW FES port 0 priority regeneration table low register" bitfld.word 0x6 12.--14. "PCP3,Priority PCP3" "0,1,2,3,4,5,6,7" bitfld.word 0x6 8.--10. "PCP2,Priority PCP2" "0,1,2,3,4,5,6,7" bitfld.word 0x6 4.--6. "PCP1,Priority PCP1" "0,1,2,3,4,5,6,7" newline bitfld.word 0x6 0.--2. "PCP0,Priority PCP0" "0,1,2,3,4,5,6,7" line.word 0x8 "ETHSW_FES0_PRIO_REGENHR,ETHSW FES port 0 priority regeneration table high register" bitfld.word 0x8 12.--14. "PCP7,Priority PCP7" "0,1,2,3,4,5,6,7" bitfld.word 0x8 8.--10. "PCP6,Priority PCP6" "0,1,2,3,4,5,6,7" bitfld.word 0x8 4.--6. "PCP5,Priority PCP5" "0,1,2,3,4,5,6,7" newline bitfld.word 0x8 0.--2. "PCP4,Priority PCP4" "0,1,2,3,4,5,6,7" group.word 0x200030++0x1F line.word 0x0 "ETHSW_FES0_SHAPER0R,ETHSW FES port 0 shaper 0 configuration register" hexmask.word 0x0 0.--15. 1. "ADDEND,Addend" line.word 0x2 "ETHSW_FES0_SHAPER1R,ETHSW FES port 0 shaper 1 configuration register" hexmask.word 0x2 0.--15. 1. "ADDEND,Addend" line.word 0x4 "ETHSW_FES0_SHAPER2R,ETHSW FES port 0 shaper 2 configuration register" hexmask.word 0x4 0.--15. 1. "ADDEND,Addend" line.word 0x6 "ETHSW_FES0_SHAPER3R,ETHSW FES port 0 shaper 3 configuration register" hexmask.word 0x6 0.--15. 1. "ADDEND,Addend" line.word 0x8 "ETHSW_FES0_SHAPER4R,ETHSW FES port 0 shaper 4 configuration register" hexmask.word 0x8 0.--15. 1. "ADDEND,Addend" line.word 0xA "ETHSW_FES0_SHAPER5R,ETHSW FES port 0 shaper 5 configuration register" hexmask.word 0xA 0.--15. 1. "ADDEND,Addend" line.word 0xC "ETHSW_FES0_SHAPER6R,ETHSW FES port 0 shaper 6 configuration register" hexmask.word 0xC 0.--15. 1. "ADDEND,Addend" line.word 0xE "ETHSW_FES0_SHAPER7R,ETHSW FES port 0 shaper 7 configuration register" hexmask.word 0xE 0.--15. 1. "ADDEND,Addend" line.word 0x10 "ETHSW_FES0_FRAMESIZE0R,ETHSW FES port 0 frame size 0 configuration register" hexmask.word 0x10 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x12 "ETHSW_FES0_FRAMESIZE1R,ETHSW FES port 0 frame size 1 configuration register" hexmask.word 0x12 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x14 "ETHSW_FES0_FRAMESIZE2R,ETHSW FES port 0 frame size 2 configuration register" hexmask.word 0x14 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x16 "ETHSW_FES0_FRAMESIZE3R,ETHSW FES port 0 frame size 3 configuration register" hexmask.word 0x16 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x18 "ETHSW_FES0_FRAMESIZE4R,ETHSW FES port 0 frame size 4 configuration register" hexmask.word 0x18 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x1A "ETHSW_FES0_FRAMESIZE5R,ETHSW FES port 0 frame size 5 configuration register" hexmask.word 0x1A 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x1C "ETHSW_FES0_FRAMESIZE6R,ETHSW FES port 0 frame size 6 configuration register" hexmask.word 0x1C 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x1E "ETHSW_FES0_FRAMESIZE7R,ETHSW FES port 0 frame size 7 configuration register" hexmask.word 0x1E 0.--10. 1. "FRAMESIZE,Max frame size" group.word 0x200080++0xF line.word 0x0 "ETHSW_FES0_FID_CFG0R,ETHSW FES port 0 filtering identifier configuration register 0" bitfld.word 0x0 14.--15. "FWD_ST7,Port Forwarding state for FID 7" "0,1,2,3" bitfld.word 0x0 12.--13. "FWD_ST6,Port Forwarding state for FID 6" "0,1,2,3" bitfld.word 0x0 10.--11. "FWD_ST5,Port Forwarding state for FID 5" "0,1,2,3" newline bitfld.word 0x0 8.--9. "FWD_ST4,Port Forwarding state for FID 4" "0,1,2,3" bitfld.word 0x0 6.--7. "FWD_ST3,Port Forwarding state for FID 3" "0,1,2,3" bitfld.word 0x0 4.--5. "FWD_ST2,Port Forwarding state for FID 2" "0,1,2,3" newline bitfld.word 0x0 2.--3. "FWD_ST1,Port Forwarding state for FID 1" "0,1,2,3" bitfld.word 0x0 0.--1. "FWD_ST0,Port Forwarding state for FID 0" "B_0x0,B_0x1,B_0x2,?" line.word 0x2 "ETHSW_FES0_FID_CFG1R,ETHSW FES port 0 filtering identifier configuration register 1" bitfld.word 0x2 14.--15. "FWD_ST15,Port Forwarding state for FID 15" "0,1,2,3" bitfld.word 0x2 12.--13. "FWD_ST14,Port Forwarding state for FID 14" "0,1,2,3" bitfld.word 0x2 10.--11. "FWD_ST13,Port Forwarding state for FID 13" "0,1,2,3" newline bitfld.word 0x2 8.--9. "FWD_ST12,Port Forwarding state for FID 12" "0,1,2,3" bitfld.word 0x2 6.--7. "FWD_ST11,Port Forwarding state for FID 11" "0,1,2,3" bitfld.word 0x2 4.--5. "FWD_ST10,Port Forwarding state for FID 10" "0,1,2,3" newline bitfld.word 0x2 2.--3. "FWD_ST9,Port Forwarding state for FID 9" "0,1,2,3" bitfld.word 0x2 0.--1. "FWD_ST8,Port Forwarding state for FID 8" "0,1,2,3" line.word 0x4 "ETHSW_FES0_FID_CFG2R,ETHSW FES port 0 filtering identifier configuration register 2" bitfld.word 0x4 14.--15. "FWD_ST23,Port Forwarding state for FID 23" "0,1,2,3" bitfld.word 0x4 12.--13. "FWD_ST22,Port Forwarding state for FID 22" "0,1,2,3" bitfld.word 0x4 10.--11. "FWD_ST21,Port Forwarding state for FID 21" "0,1,2,3" newline bitfld.word 0x4 8.--9. "FWD_ST20,Port Forwarding state for FID 20" "0,1,2,3" bitfld.word 0x4 6.--7. "FWD_ST19,Port Forwarding state for FID 19" "0,1,2,3" bitfld.word 0x4 4.--5. "FWD_ST18,Port Forwarding state for FID 18" "0,1,2,3" newline bitfld.word 0x4 2.--3. "FWD_ST17,Port Forwarding state for FID 17" "0,1,2,3" bitfld.word 0x4 0.--1. "FWD_ST16,Port Forwarding state for FID 16" "0,1,2,3" line.word 0x6 "ETHSW_FES0_FID_CFG3R,ETHSW FES port 0 filtering identifier configuration register 3" bitfld.word 0x6 14.--15. "FWD_ST31,Port Forwarding state for FID 31" "0,1,2,3" bitfld.word 0x6 12.--13. "FWD_ST30,Port Forwarding state for FID30" "0,1,2,3" bitfld.word 0x6 10.--11. "FWD_ST29,Port Forwarding state for FID 29" "0,1,2,3" newline bitfld.word 0x6 8.--9. "FWD_ST28,Port Forwarding state for FID 28" "0,1,2,3" bitfld.word 0x6 6.--7. "FWD_ST27,Port Forwarding state for FID 27" "0,1,2,3" bitfld.word 0x6 4.--5. "FWD_ST26,Port Forwarding state for FID 26" "0,1,2,3" newline bitfld.word 0x6 2.--3. "FWD_ST25,Port Forwarding state for FID 25" "0,1,2,3" bitfld.word 0x6 0.--1. "FWD_ST24,Port Forwarding state for FID 24" "0,1,2,3" line.word 0x8 "ETHSW_FES0_FID_CFG4R,ETHSW FES port 0 filtering identifier configuration register 4" bitfld.word 0x8 14.--15. "FWD_ST39,Port Forwarding state for FID 39" "0,1,2,3" bitfld.word 0x8 12.--13. "FWD_ST38,Port Forwarding state for FID38" "0,1,2,3" bitfld.word 0x8 10.--11. "FWD_ST37,Port Forwarding state for FID 37" "0,1,2,3" newline bitfld.word 0x8 8.--9. "FWD_ST36,Port Forwarding state for FID 36" "0,1,2,3" bitfld.word 0x8 6.--7. "FWD_ST35,Port Forwarding state for FID 35" "0,1,2,3" bitfld.word 0x8 4.--5. "FWD_ST34,Port Forwarding state for FID 34" "0,1,2,3" newline bitfld.word 0x8 2.--3. "FWD_ST33,Port Forwarding state for FID 33" "0,1,2,3" bitfld.word 0x8 0.--1. "FWD_ST32,Port Forwarding state for FID 32" "0,1,2,3" line.word 0xA "ETHSW_FES0_FID_CFG5R,ETHSW FES port 0 filtering identifier configuration register 5" bitfld.word 0xA 14.--15. "FWD_ST47,Port Forwarding state for FID 47" "0,1,2,3" bitfld.word 0xA 12.--13. "FWD_ST46,Port Forwarding state for FID46" "0,1,2,3" bitfld.word 0xA 10.--11. "FWD_ST45,Port Forwarding state for FID 45" "0,1,2,3" newline bitfld.word 0xA 8.--9. "FWD_ST44,Port Forwarding state for FID 44" "0,1,2,3" bitfld.word 0xA 6.--7. "FWD_ST43,Port Forwarding state for FID 43" "0,1,2,3" bitfld.word 0xA 4.--5. "FWD_ST42,Port Forwarding state for FID 42" "0,1,2,3" newline bitfld.word 0xA 2.--3. "FWD_ST41,Port Forwarding state for FID 41" "0,1,2,3" bitfld.word 0xA 0.--1. "FWD_ST40,Port Forwarding state for FID 40" "0,1,2,3" line.word 0xC "ETHSW_FES0_FID_CFG6R,ETHSW FES port 0 filtering identifier configuration register 6" bitfld.word 0xC 14.--15. "FWD_ST55,Port Forwarding state for FID 55" "0,1,2,3" bitfld.word 0xC 12.--13. "FWD_ST54,Port Forwarding state for FID54" "0,1,2,3" bitfld.word 0xC 10.--11. "FWD_ST53,Port Forwarding state for FID 53" "0,1,2,3" newline bitfld.word 0xC 8.--9. "FWD_ST52,Port Forwarding state for FID 52" "0,1,2,3" bitfld.word 0xC 6.--7. "FWD_ST51,Port Forwarding state for FID 51" "0,1,2,3" bitfld.word 0xC 4.--5. "FWD_ST50,Port Forwarding state for FID 50" "0,1,2,3" newline bitfld.word 0xC 2.--3. "FWD_ST49,Port Forwarding state for FID 49" "0,1,2,3" bitfld.word 0xC 0.--1. "FWD_ST48,Port Forwarding state for FID 48" "0,1,2,3" line.word 0xE "ETHSW_FES0_FID_CFG7R,ETHSW FES port 0 filtering identifier configuration register 7" bitfld.word 0xE 14.--15. "FWD_ST63,Port Forwarding state for FID 63" "0,1,2,3" bitfld.word 0xE 12.--13. "FWD_ST62,Port Forwarding state for FID62" "0,1,2,3" bitfld.word 0xE 10.--11. "FWD_ST61,Port Forwarding state for FID 61" "0,1,2,3" newline bitfld.word 0xE 8.--9. "FWD_ST60,Port Forwarding state for FID 60" "0,1,2,3" bitfld.word 0xE 6.--7. "FWD_ST59,Port Forwarding state for FID 59" "0,1,2,3" bitfld.word 0xE 4.--5. "FWD_ST58,Port Forwarding state for FID 58" "0,1,2,3" newline bitfld.word 0xE 2.--3. "FWD_ST57,Port Forwarding state for FID 57" "0,1,2,3" bitfld.word 0xE 0.--1. "FWD_ST56,Port Forwarding state for FID 56" "0,1,2,3" group.word 0x2000C0++0x3 line.word 0x0 "ETHSW_FES0_FL_CAPTR,ETHSW FES port 0 buffer fill level capture register" bitfld.word 0x0 0. "CAPTURE,Capture" "0,1" line.word 0x2 "ETHSW_FES0_FL_SMPL_CNTR,ETHSW FES port 0 buffer fill level sample counter register" hexmask.word 0x2 0.--15. 1. "FL_SAMPLE_CNT,Sample counter" group.word 0x2000E0++0x1F line.word 0x0 "ETHSW_FES0_FL_Q0_MINR,ETHSW FES port 0 minimum fill level queue 0 register" hexmask.word.byte 0x0 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x2 "ETHSW_FES0_FL_Q1_MINR,ETHSW FES port 0 minimum fill level queue 1 register" hexmask.word.byte 0x2 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x4 "ETHSW_FES0_FL_Q2_MINR,ETHSW FES port 0 minimum fill level queue 2 register" hexmask.word.byte 0x4 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x6 "ETHSW_FES0_FL_Q3_MINR,ETHSW FES port 0 minimum fill level queue 3 register" hexmask.word.byte 0x6 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x8 "ETHSW_FES0_FL_Q4_MINR,ETHSW FES port 0 minimum fill level queue 4 register" hexmask.word.byte 0x8 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0xA "ETHSW_FES0_FL_Q5_MINR,ETHSW FES port 0 minimum fill level queue 5 register" hexmask.word.byte 0xA 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0xC "ETHSW_FES0_FL_Q6_MINR,ETHSW FES port 0 minimum fill level queue 6 register" hexmask.word.byte 0xC 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0xE "ETHSW_FES0_FL_Q7_MINR,ETHSW FES port 0 minimum fill level queue 7 register" hexmask.word.byte 0xE 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x10 "ETHSW_FES0_FL_Q0_MAXR,ETHSW FES port 0 maximum fill level queue 0 register" hexmask.word.byte 0x10 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x12 "ETHSW_FES0_FL_Q1_MAXR,ETHSW FES port 0 maximum fill level queue 1 register" hexmask.word.byte 0x12 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x14 "ETHSW_FES0_FL_Q2_MAXR,ETHSW FES port 0 maximum fill level queue 2 register" hexmask.word.byte 0x14 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x16 "ETHSW_FES0_FL_Q3_MAXR,ETHSW FES port 0 maximum fill level queue 3 register" hexmask.word.byte 0x16 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x18 "ETHSW_FES0_FL_Q4_MAXR,ETHSW FES port 0 maximum fill level queue 4 register" hexmask.word.byte 0x18 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x1A "ETHSW_FES0_FL_Q5_MAXR,ETHSW FES port 0 maximum fill level queue 5 register" hexmask.word.byte 0x1A 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x1C "ETHSW_FES0_FL_Q6_MAXR,ETHSW FES port 0 maximum fill level queue 6 register" hexmask.word.byte 0x1C 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x1E "ETHSW_FES0_FL_Q7_MAXR,ETHSW FES port 0 maximum fill level queue 7 register" hexmask.word.byte 0x1E 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" group.word 0x204000++0x5 line.word 0x0 "ETHSW_FES0_PTP_RX_SYNCD_SNSR,ETHSW FES PTP RX sync delay subnanosecond register" hexmask.word 0x0 0.--15. 1. "PTP_RX_SYNC_DELAY_SUBNS,RX Sync delay subnanoseconds" line.word 0x2 "ETHSW_FES0_PTP_RX_SYNCD_NSLR,ETHSW FES PTP RX sync delay nanosecond low register" hexmask.word 0x2 0.--15. 1. "PTP_RX_SYNC_DELAY_NSL,RX Sync delay nanoseconds low part" line.word 0x4 "ETHSW_FES0_PTP_RX_SYNCD_NSHR,ETHSW FES PTP RX sync delay nanosecond high register" hexmask.word.byte 0x4 0.--7. 1. "PTP_RX_SYNC_DELAY_NSH,RX Sync delay nanoseconds high part" group.word 0x204008++0x3 line.word 0x0 "ETHSW_FES0_PTP_RX_EVENTD_SNSR,ETHSW FES PTP RX event delay subnanosecond register" hexmask.word 0x0 0.--15. 1. "PTP_RX_EVENT_DELAY_SNS,RX Event delay subnanoseconds" line.word 0x2 "ETHSW_FES0_PTP_RX_EVENTD_NSR,ETHSW FES PTP RX event delay nanosecond register" hexmask.word 0x2 0.--15. 1. "PTP_RX_EVENT_DELAY_NS,RX Event delay nanoseconds" group.word 0x204010++0x3 line.word 0x0 "ETHSW_FES0_PTP_TX_EVENTD_SNSR,ETHSW FES PTP TX event delay subnanosecond register" hexmask.word 0x0 0.--15. 1. "PTP_TX_EVENT_DELAY_SNS,TX Event delay subnanoseconds" line.word 0x2 "ETHSW_FES0_PTP_TX_EVENTD_NSR,ETHSW FES PTP TX event delay nanosecond register" hexmask.word 0x2 0.--15. 1. "PTP_TX_EVENT_DELAY_NS,TX Event delay nanoseconds" group.word 0x206000++0x3 line.word 0x0 "ETHSW_FES0_CNT_CTRLR,ETHSW FES port 0 counter control register" bitfld.word 0x0 12. "CPT_CNT_GRP5,Capture counter group 5" "B_0x0,B_0x1" bitfld.word 0x0 10. "CPT_CNT_GRP3,Capture counter group 3" "B_0x0,B_0x1" bitfld.word 0x0 8. "CPT_CNT_GRP1,Capture counter group 1" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "CAPTURE,Capture" "0,1" line.word 0x2 "ETHSW_FES0_CNT_CMDR,ETHSW FES port 0 counter command register" bitfld.word 0x2 15. "TRANSFER,Transfer" "0,1" hexmask.word.byte 0x2 0.--5. 1. "CNT_NUM,Counter number" group.word 0x206008++0x3 line.word 0x0 "ETHSW_FES0_CNT_VAL_LOR,ETHSW FES port 0 counter value low register" hexmask.word 0x0 0.--15. 1. "CNT_VAL_LO,Counter value Low" line.word 0x2 "ETHSW_FES0_CNT_VAL_HIR,ETHSW FES port 0 counter value high register" hexmask.word 0x2 0.--15. 1. "CNT_VAL_HI,Counter value High" group.word 0x208000++0x1 line.word 0x0 "ETHSW_FES0_IPO_CMDR,ETHSW FES port 0 IPO command register" bitfld.word 0x0 15. "TRANSFER,Transfer" "0,1" bitfld.word 0x0 14. "RD_WR,Read/write" "B_0x0,B_0x1" hexmask.word.byte 0x0 0.--3. 1. "IPO_FIL_NUM,IPO Filter Number" group.word 0x208010++0xD line.word 0x0 "ETHSW_FES0_ETH_ADDR_CFG0R,ETHSW FES port 0 IPO filter configuration register 0" bitfld.word 0x0 15. "NEW_PRI_LSB,New priority LSB" "0,1" bitfld.word 0x0 14. "PRES_PRI,Preserve priority" "B_0x0,B_0x1" bitfld.word 0x0 12.--13. "NEW_PRI_MSB,New priority MSBs" "0,1,2,3" newline bitfld.word 0x0 9. "POL_PRIO,Policer priority" "B_0x0,B_0x1" hexmask.word.byte 0x0 2.--7. 1. "CMP_LENGTH,Compared Length" bitfld.word 0x0 1. "SRC_DST_MATCH,Source/Destination Match" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "ENABLE,Enable" "B_0x0,B_0x1" line.word 0x2 "ETHSW_FES0_ETH_ADDR_FWD_ALLOWR,ETHSW FES port 0 forward allow register" bitfld.word 0x2 0.--2. "FWD_ALLOW_MSK,Forward allow mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x4 "ETHSW_FES0_ETH_ADDR_FWD_MIRRORR,ETHSW FES port 0 forward mirror register" bitfld.word 0x4 0.--2. "FWD_MIRROR_MSK,Forward mirror mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x6 "ETHSW_FES0_ETH_ADDR_CFG1R,ETHSW FES port 0 IPO filter configuration register 1" bitfld.word 0x6 15. "CT_DIS,Cut-Through disable" "B_0x0,B_0x1" bitfld.word 0x6 14. "CMP_ORDER,Compare Order" "B_0x0,B_0x1" bitfld.word 0x6 12. "IPO_MARK,IPO Mark" "0,1" newline hexmask.word.byte 0x6 0.--6. 1. "POLICER,Policer" line.word 0x8 "ETHSW_FES0_ETH_ADDR_0R,ETHSW FES port 0 ethernet address part 0 register" hexmask.word.byte 0x8 8.--15. 1. "OCTET_2,2less thansup>ndless than/sup> octet" hexmask.word.byte 0x8 0.--7. 1. "OCTET_1,1less thansup>stless than/sup> octet" line.word 0xA "ETHSW_FES0_ETH_ADDR_1R,ETHSW FES port 0 ethernet address part 1 register" hexmask.word.byte 0xA 8.--15. 1. "OCTET_4,4less thansup>thless than/sup> octet" hexmask.word.byte 0xA 0.--7. 1. "OCTET_3,3less thansup>rdless than/sup> octet" line.word 0xC "ETHSW_FES0_ETH_ADDR_2R,ETHSW FES port 0 ethernet address part 2 register" hexmask.word.byte 0xC 8.--15. 1. "OCTET_6,6less thansup>thless than/sup> octet" hexmask.word.byte 0xC 0.--7. 1. "OCTET_5,5less thansup>thless than/sup> octet" group.word 0x210000++0x1 line.word 0x0 "ETHSW_FES1_PORT_STATER,ETHSW FES port 1 port State register" bitfld.word 0x0 15. "RX_CT,RX Cut-through" "B_0x0,B_0x1" bitfld.word 0x0 14. "FB_STF,Fallback to Store-and-Forward" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "SPEED_SEL,Speed select" "?,B_0x1,B_0x2,B_0x3" newline bitfld.word 0x0 4.--5. "HW_MODE,Port HW mode" "B_0x0,?,B_0x2,?" bitfld.word 0x0 2.--3. "MGMT_ST,Port management state" "B_0x0,B_0x1,?,?" bitfld.word 0x0 0.--1. "FWD_ST,Port Forwarding state" "B_0x0,?,B_0x2,?" group.word 0x210010++0xF line.word 0x0 "ETHSW_FES1_VLAN0R,ETHSW FES port 1 port VLAN configuration register 0" bitfld.word 0x0 15. "TGD_UTGD,Tagged/untagged" "B_0x0,B_0x1" bitfld.word 0x0 12.--14. "PD_PCP,Port default PCP" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--11. 1. "PD_VLAN,Port default VLAN" line.word 0x2 "ETHSW_FES1_VLAN1R,ETHSW FES port 1 port VLAN configuration register 1" bitfld.word 0x2 15. "USE_DEI,Use_DEI" "B_0x0,B_0x1" hexmask.word 0x2 0.--11. 1. "VLAN_PRIF,Default VLAN for Priority Tagged Frames" line.word 0x4 "ETHSW_FES1_FWDM_CFGR,ETHSW FES port 1 port forward mask configuration register" bitfld.word 0x4 0.--2. "PORT_FWDM,Port forward mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x6 "ETHSW_FES1_PRIO_REGENLR,ETHSW FES port 1 priority regeneration table low register" bitfld.word 0x6 12.--14. "PCP3,Priority PCP3" "0,1,2,3,4,5,6,7" bitfld.word 0x6 8.--10. "PCP2,Priority PCP2" "0,1,2,3,4,5,6,7" bitfld.word 0x6 4.--6. "PCP1,Priority PCP1" "0,1,2,3,4,5,6,7" newline bitfld.word 0x6 0.--2. "PCP0,Priority PCP0" "0,1,2,3,4,5,6,7" line.word 0x8 "ETHSW_FES1_PRIO_REGENHR,ETHSW FES port 1 priority regeneration table high register" bitfld.word 0x8 12.--14. "PCP7,Priority PCP7" "0,1,2,3,4,5,6,7" bitfld.word 0x8 8.--10. "PCP6,Priority PCP6" "0,1,2,3,4,5,6,7" bitfld.word 0x8 4.--6. "PCP5,Priority PCP5" "0,1,2,3,4,5,6,7" newline bitfld.word 0x8 0.--2. "PCP4,Priority PCP4" "0,1,2,3,4,5,6,7" line.word 0xA "ETHSW_FES1_TX_CTER,ETHSW FES port 1 TX cut-through enable register" bitfld.word 0xA 7. "CTE7,Cut-through enable/disable for queue 7" "0,1" bitfld.word 0xA 6. "CTE6,Cut-through enable/disable for queue 6" "0,1" bitfld.word 0xA 5. "CTE5,Cut-through enable/disable for queue 5" "0,1" newline bitfld.word 0xA 4. "CTE4,Cut-through enable/disable for queue 4" "0,1" bitfld.word 0xA 3. "CTE3,Cut-through enable/disable for queue 3" "0,1" bitfld.word 0xA 2. "CTE2,Cut-through enable/disable for queue 2" "0,1" newline bitfld.word 0xA 1. "CTE1,Cut-through enable/disable for queue 1" "0,1" bitfld.word 0xA 0. "CTE0,Cut-through enable/disable for queue 0" "B_0x0,B_0x1" line.word 0xC "ETHSW_FES1_TX_PREE0R,ETHSW FES port 1 TX preemptable traffic selection register 0" bitfld.word 0xC 7. "PREE7,Preemption setting for queue 7" "0,1" bitfld.word 0xC 6. "PREE6,Preemption setting for queue 6" "0,1" bitfld.word 0xC 5. "PREE5,Preemption setting for queue 5" "0,1" newline bitfld.word 0xC 4. "PREE4,Preemption setting for queue 4" "0,1" bitfld.word 0xC 3. "PREE3,Preemption setting for queue 3" "0,1" bitfld.word 0xC 2. "PREE2,Preemption setting for queue 2" "0,1" newline bitfld.word 0xC 1. "PREE1,Preemption setting for queue 1" "0,1" bitfld.word 0xC 0. "PREE0,Preemption setting for queue 0" "B_0x0,B_0x1" line.word 0xE "ETHSW_FES1_TX_PREE1R,ETHSW FES port 1 TX preemptable traffic selection register 1" bitfld.word 0xE 0.--1. "ADDFRAGSIZE,AddFragSize" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x210020++0x3 line.long 0x0 "ETHSW_FES1_QUEUE_TBLR,ETHSW FES port 1 queue table configuration register" bitfld.long 0x0 28.--30. "QUEUE_PRI7,Queue for priority 7" "0,1,2,3,4,5,6,7" bitfld.long 0x0 24.--26. "QUEUE_PRI6,Queue for priority 6" "0,1,2,3,4,5,6,7" bitfld.long 0x0 20.--22. "QUEUE_PRI5,Queue for priority 5" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16.--18. "QUEUE_PRI4,Queue for priority 4" "0,1,2,3,4,5,6,7" bitfld.long 0x0 12.--14. "QUEUE_PRI3,Queue for priority 3" "0,1,2,3,4,5,6,7" bitfld.long 0x0 8.--10. "QUEUE_PRI2,Queue for priority 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4.--6. "QUEUE_PRI1,Queue for priority 1" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "QUEUE_PRI0,Queue for priority 0" "0,1,2,3,4,5,6,7" group.word 0x210030++0x1F line.word 0x0 "ETHSW_FES1_SHAPER0R,ETHSW FES port 1 shaper 0 configuration register" hexmask.word 0x0 0.--15. 1. "ADDEND,Addend" line.word 0x2 "ETHSW_FES1_SHAPER1R,ETHSW FES port 1 shaper 1 configuration register" hexmask.word 0x2 0.--15. 1. "ADDEND,Addend" line.word 0x4 "ETHSW_FES1_SHAPER2R,ETHSW FES port 1 shaper 2 configuration register" hexmask.word 0x4 0.--15. 1. "ADDEND,Addend" line.word 0x6 "ETHSW_FES1_SHAPER3R,ETHSW FES port 1 shaper 3 configuration register" hexmask.word 0x6 0.--15. 1. "ADDEND,Addend" line.word 0x8 "ETHSW_FES1_SHAPER4R,ETHSW FES port 1 shaper 4 configuration register" hexmask.word 0x8 0.--15. 1. "ADDEND,Addend" line.word 0xA "ETHSW_FES1_SHAPER5R,ETHSW FES port 1 shaper 5 configuration register" hexmask.word 0xA 0.--15. 1. "ADDEND,Addend" line.word 0xC "ETHSW_FES1_SHAPER6R,ETHSW FES port 1 shaper 6 configuration register" hexmask.word 0xC 0.--15. 1. "ADDEND,Addend" line.word 0xE "ETHSW_FES1_SHAPER7R,ETHSW FES port 1 shaper 7 configuration register" hexmask.word 0xE 0.--15. 1. "ADDEND,Addend" line.word 0x10 "ETHSW_FES1_FRAMESIZE0R,ETHSW FES port 1 frame size 0 configuration register" hexmask.word 0x10 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x12 "ETHSW_FES1_FRAMESIZE1R,ETHSW FES port 1 frame size 1 configuration register" hexmask.word 0x12 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x14 "ETHSW_FES1_FRAMESIZE2R,ETHSW FES port 1 frame size 2 configuration register" hexmask.word 0x14 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x16 "ETHSW_FES1_FRAMESIZE3R,ETHSW FES port 1 frame size 3 configuration register" hexmask.word 0x16 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x18 "ETHSW_FES1_FRAMESIZE4R,ETHSW FES port 1 frame size 4 configuration register" hexmask.word 0x18 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x1A "ETHSW_FES1_FRAMESIZE5R,ETHSW FES port 1 frame size 5 configuration register" hexmask.word 0x1A 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x1C "ETHSW_FES1_FRAMESIZE6R,ETHSW FES port 1 frame size 6 configuration register" hexmask.word 0x1C 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x1E "ETHSW_FES1_FRAMESIZE7R,ETHSW FES port 1 frame size 7 configuration register" hexmask.word 0x1E 0.--10. 1. "FRAMESIZE,Max frame size" group.word 0x210080++0xF line.word 0x0 "ETHSW_FES1_FID_CFG0R,ETHSW FES port 1 filtering identifier configuration register 0" bitfld.word 0x0 14.--15. "FWD_ST7,Port Forwarding state for FID 7" "0,1,2,3" bitfld.word 0x0 12.--13. "FWD_ST6,Port Forwarding state for FID 6" "0,1,2,3" bitfld.word 0x0 10.--11. "FWD_ST5,Port Forwarding state for FID 5" "0,1,2,3" newline bitfld.word 0x0 8.--9. "FWD_ST4,Port Forwarding state for FID 4" "0,1,2,3" bitfld.word 0x0 6.--7. "FWD_ST3,Port Forwarding state for FID 3" "0,1,2,3" bitfld.word 0x0 4.--5. "FWD_ST2,Port Forwarding state for FID 2" "0,1,2,3" newline bitfld.word 0x0 2.--3. "FWD_ST1,Port Forwarding state for FID 1" "0,1,2,3" bitfld.word 0x0 0.--1. "FWD_ST0,Port Forwarding state for FID 0" "B_0x0,B_0x1,B_0x2,?" line.word 0x2 "ETHSW_FES1_FID_CFG1R,ETHSW FES port 1 filtering identifier configuration register 1" bitfld.word 0x2 14.--15. "FWD_ST15,Port Forwarding state for FID 15" "0,1,2,3" bitfld.word 0x2 12.--13. "FWD_ST14,Port Forwarding state for FID 14" "0,1,2,3" bitfld.word 0x2 10.--11. "FWD_ST13,Port Forwarding state for FID 13" "0,1,2,3" newline bitfld.word 0x2 8.--9. "FWD_ST12,Port Forwarding state for FID 12" "0,1,2,3" bitfld.word 0x2 6.--7. "FWD_ST11,Port Forwarding state for FID 11" "0,1,2,3" bitfld.word 0x2 4.--5. "FWD_ST10,Port Forwarding state for FID 10" "0,1,2,3" newline bitfld.word 0x2 2.--3. "FWD_ST9,Port Forwarding state for FID 9" "0,1,2,3" bitfld.word 0x2 0.--1. "FWD_ST8,Port Forwarding state for FID 8" "0,1,2,3" line.word 0x4 "ETHSW_FES1_FID_CFG2R,ETHSW FES port 1 filtering identifier configuration register 2" bitfld.word 0x4 14.--15. "FWD_ST23,Port Forwarding state for FID 23" "0,1,2,3" bitfld.word 0x4 12.--13. "FWD_ST22,Port Forwarding state for FID 22" "0,1,2,3" bitfld.word 0x4 10.--11. "FWD_ST21,Port Forwarding state for FID 21" "0,1,2,3" newline bitfld.word 0x4 8.--9. "FWD_ST20,Port Forwarding state for FID 20" "0,1,2,3" bitfld.word 0x4 6.--7. "FWD_ST19,Port Forwarding state for FID 19" "0,1,2,3" bitfld.word 0x4 4.--5. "FWD_ST18,Port Forwarding state for FID 18" "0,1,2,3" newline bitfld.word 0x4 2.--3. "FWD_ST17,Port Forwarding state for FID 17" "0,1,2,3" bitfld.word 0x4 0.--1. "FWD_ST16,Port Forwarding state for FID 16" "0,1,2,3" line.word 0x6 "ETHSW_FES1_FID_CFG3R,ETHSW FES port 1 filtering identifier configuration register 3" bitfld.word 0x6 14.--15. "FWD_ST31,Port Forwarding state for FID 31" "0,1,2,3" bitfld.word 0x6 12.--13. "FWD_ST30,Port Forwarding state for FID30" "0,1,2,3" bitfld.word 0x6 10.--11. "FWD_ST29,Port Forwarding state for FID 29" "0,1,2,3" newline bitfld.word 0x6 8.--9. "FWD_ST28,Port Forwarding state for FID 28" "0,1,2,3" bitfld.word 0x6 6.--7. "FWD_ST27,Port Forwarding state for FID 27" "0,1,2,3" bitfld.word 0x6 4.--5. "FWD_ST26,Port Forwarding state for FID 26" "0,1,2,3" newline bitfld.word 0x6 2.--3. "FWD_ST25,Port Forwarding state for FID 25" "0,1,2,3" bitfld.word 0x6 0.--1. "FWD_ST24,Port Forwarding state for FID 24" "0,1,2,3" line.word 0x8 "ETHSW_FES1_FID_CFG4R,ETHSW FES port 1 filtering identifier configuration register 4" bitfld.word 0x8 14.--15. "FWD_ST39,Port Forwarding state for FID 39" "0,1,2,3" bitfld.word 0x8 12.--13. "FWD_ST38,Port Forwarding state for FID38" "0,1,2,3" bitfld.word 0x8 10.--11. "FWD_ST37,Port Forwarding state for FID 37" "0,1,2,3" newline bitfld.word 0x8 8.--9. "FWD_ST36,Port Forwarding state for FID 36" "0,1,2,3" bitfld.word 0x8 6.--7. "FWD_ST35,Port Forwarding state for FID 35" "0,1,2,3" bitfld.word 0x8 4.--5. "FWD_ST34,Port Forwarding state for FID 34" "0,1,2,3" newline bitfld.word 0x8 2.--3. "FWD_ST33,Port Forwarding state for FID 33" "0,1,2,3" bitfld.word 0x8 0.--1. "FWD_ST32,Port Forwarding state for FID 32" "0,1,2,3" line.word 0xA "ETHSW_FES1_FID_CFG5R,ETHSW FES port 1 filtering identifier configuration register 5" bitfld.word 0xA 14.--15. "FWD_ST47,Port Forwarding state for FID 47" "0,1,2,3" bitfld.word 0xA 12.--13. "FWD_ST46,Port Forwarding state for FID46" "0,1,2,3" bitfld.word 0xA 10.--11. "FWD_ST45,Port Forwarding state for FID 45" "0,1,2,3" newline bitfld.word 0xA 8.--9. "FWD_ST44,Port Forwarding state for FID 44" "0,1,2,3" bitfld.word 0xA 6.--7. "FWD_ST43,Port Forwarding state for FID 43" "0,1,2,3" bitfld.word 0xA 4.--5. "FWD_ST42,Port Forwarding state for FID 42" "0,1,2,3" newline bitfld.word 0xA 2.--3. "FWD_ST41,Port Forwarding state for FID 41" "0,1,2,3" bitfld.word 0xA 0.--1. "FWD_ST40,Port Forwarding state for FID 40" "0,1,2,3" line.word 0xC "ETHSW_FES1_FID_CFG6R,ETHSW FES port 1 filtering identifier configuration register 6" bitfld.word 0xC 14.--15. "FWD_ST55,Port Forwarding state for FID 55" "0,1,2,3" bitfld.word 0xC 12.--13. "FWD_ST54,Port Forwarding state for FID54" "0,1,2,3" bitfld.word 0xC 10.--11. "FWD_ST53,Port Forwarding state for FID 53" "0,1,2,3" newline bitfld.word 0xC 8.--9. "FWD_ST52,Port Forwarding state for FID 52" "0,1,2,3" bitfld.word 0xC 6.--7. "FWD_ST51,Port Forwarding state for FID 51" "0,1,2,3" bitfld.word 0xC 4.--5. "FWD_ST50,Port Forwarding state for FID 50" "0,1,2,3" newline bitfld.word 0xC 2.--3. "FWD_ST49,Port Forwarding state for FID 49" "0,1,2,3" bitfld.word 0xC 0.--1. "FWD_ST48,Port Forwarding state for FID 48" "0,1,2,3" line.word 0xE "ETHSW_FES1_FID_CFG7R,ETHSW FES port 1 filtering identifier configuration register 7" bitfld.word 0xE 14.--15. "FWD_ST63,Port Forwarding state for FID 63" "0,1,2,3" bitfld.word 0xE 12.--13. "FWD_ST62,Port Forwarding state for FID62" "0,1,2,3" bitfld.word 0xE 10.--11. "FWD_ST61,Port Forwarding state for FID 61" "0,1,2,3" newline bitfld.word 0xE 8.--9. "FWD_ST60,Port Forwarding state for FID 60" "0,1,2,3" bitfld.word 0xE 6.--7. "FWD_ST59,Port Forwarding state for FID 59" "0,1,2,3" bitfld.word 0xE 4.--5. "FWD_ST58,Port Forwarding state for FID 58" "0,1,2,3" newline bitfld.word 0xE 2.--3. "FWD_ST57,Port Forwarding state for FID 57" "0,1,2,3" bitfld.word 0xE 0.--1. "FWD_ST56,Port Forwarding state for FID 56" "0,1,2,3" group.word 0x2100C0++0x3 line.word 0x0 "ETHSW_FES1_FL_CAPTR,ETHSW FES port 1 buffer fill level capture register" bitfld.word 0x0 0. "CAPTURE,Capture" "0,1" line.word 0x2 "ETHSW_FES1_FL_SMPL_CNTR,ETHSW FES port 1 buffer fill level sample counter register" hexmask.word 0x2 0.--15. 1. "FL_SAMPLE_CNT,Sample counter" group.word 0x2100E0++0x1F line.word 0x0 "ETHSW_FES1_FL_Q0_MINR,ETHSW FES port 1 minimum fill level queue 0 register" hexmask.word.byte 0x0 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x2 "ETHSW_FES1_FL_Q1_MINR,ETHSW FES port 1 minimum fill level queue 1 register" hexmask.word.byte 0x2 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x4 "ETHSW_FES1_FL_Q2_MINR,ETHSW FES port 1 minimum fill level queue 2 register" hexmask.word.byte 0x4 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x6 "ETHSW_FES1_FL_Q3_MINR,ETHSW FES port 1 minimum fill level queue 3 register" hexmask.word.byte 0x6 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x8 "ETHSW_FES1_FL_Q4_MINR,ETHSW FES port 1 minimum fill level queue 4 register" hexmask.word.byte 0x8 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0xA "ETHSW_FES1_FL_Q5_MINR,ETHSW FES port 1 minimum fill level queue 5 register" hexmask.word.byte 0xA 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0xC "ETHSW_FES1_FL_Q6_MINR,ETHSW FES port 1 minimum fill level queue 6 register" hexmask.word.byte 0xC 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0xE "ETHSW_FES1_FL_Q7_MINR,ETHSW FES port 1 minimum fill level queue 7 register" hexmask.word.byte 0xE 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x10 "ETHSW_FES1_FL_Q0_MAXR,ETHSW FES port 1 maximum fill level queue 0 register" hexmask.word.byte 0x10 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x12 "ETHSW_FES1_FL_Q1_MAXR,ETHSW FES port 1 maximum fill level queue 1 register" hexmask.word.byte 0x12 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x14 "ETHSW_FES1_FL_Q2_MAXR,ETHSW FES port 1 maximum fill level queue 2 register" hexmask.word.byte 0x14 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x16 "ETHSW_FES1_FL_Q3_MAXR,ETHSW FES port 1 maximum fill level queue 3 register" hexmask.word.byte 0x16 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x18 "ETHSW_FES1_FL_Q4_MAXR,ETHSW FES port 1 maximum fill level queue 4 register" hexmask.word.byte 0x18 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x1A "ETHSW_FES1_FL_Q5_MAXR,ETHSW FES port 1 maximum fill level queue 5 register" hexmask.word.byte 0x1A 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x1C "ETHSW_FES1_FL_Q6_MAXR,ETHSW FES port 1 maximum fill level queue 6 register" hexmask.word.byte 0x1C 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x1E "ETHSW_FES1_FL_Q7_MAXR,ETHSW FES port 1 maximum fill level queue 7 register" hexmask.word.byte 0x1E 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" group.word 0x214000++0x5 line.word 0x0 "ETHSW_FES1_PTP_RX_SYNCD_SNSR,ETHSW FES PTP RX sync delay subnanosecond register" hexmask.word 0x0 0.--15. 1. "PTP_RX_SYNC_DELAY_SUBNS,RX Sync delay subnanoseconds" line.word 0x2 "ETHSW_FES1_PTP_RX_SYNCD_NSLR,ETHSW FES PTP RX sync delay nanosecond low register" hexmask.word 0x2 0.--15. 1. "PTP_RX_SYNC_DELAY_NSL,RX Sync delay nanoseconds low part" line.word 0x4 "ETHSW_FES1_PTP_RX_SYNCD_NSHR,ETHSW FES PTP RX sync delay nanosecond high register" hexmask.word.byte 0x4 0.--7. 1. "PTP_RX_SYNC_DELAY_NSH,RX Sync delay nanoseconds high part" group.word 0x214008++0x3 line.word 0x0 "ETHSW_FES1_PTP_RX_EVENTD_SNSR,ETHSW FES PTP RX event delay subnanosecond register" hexmask.word 0x0 0.--15. 1. "PTP_RX_EVENT_DELAY_SNS,RX Event delay subnanoseconds" line.word 0x2 "ETHSW_FES1_PTP_RX_EVENTD_NSR,ETHSW FES PTP RX event delay nanosecond register" hexmask.word 0x2 0.--15. 1. "PTP_RX_EVENT_DELAY_NS,RX Event delay nanoseconds" group.word 0x214010++0x3 line.word 0x0 "ETHSW_FES1_PTP_TX_EVENTD_SNSR,ETHSW FES PTP TX event delay subnanosecond register" hexmask.word 0x0 0.--15. 1. "PTP_TX_EVENT_DELAY_SNS,TX Event delay subnanoseconds" line.word 0x2 "ETHSW_FES1_PTP_TX_EVENTD_NSR,ETHSW FES PTP TX event delay nanosecond register" hexmask.word 0x2 0.--15. 1. "PTP_TX_EVENT_DELAY_NS,TX Event delay nanoseconds" group.word 0x216000++0x3 line.word 0x0 "ETHSW_FES1_CNT_CTRLR,ETHSW FES port 1 counter control register" bitfld.word 0x0 12. "CPT_CNT_GRP5,Capture counter group 5" "B_0x0,B_0x1" bitfld.word 0x0 10. "CPT_CNT_GRP3,Capture counter group 3" "B_0x0,B_0x1" bitfld.word 0x0 8. "CPT_CNT_GRP1,Capture counter group 1" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "CAPTURE,Capture" "0,1" line.word 0x2 "ETHSW_FES1_CNT_CMDR,ETHSW FES port 1 counter command register" bitfld.word 0x2 15. "TRANSFER,Transfer" "0,1" hexmask.word.byte 0x2 0.--5. 1. "CNT_NUM,Counter number" group.word 0x216008++0x3 line.word 0x0 "ETHSW_FES1_CNT_VAL_LOR,ETHSW FES port 1 counter value low register" hexmask.word 0x0 0.--15. 1. "CNT_VAL_LO,Counter value Low" line.word 0x2 "ETHSW_FES1_CNT_VAL_HIR,ETHSW FES port 1 counter value high register" hexmask.word 0x2 0.--15. 1. "CNT_VAL_HI,Counter value High" group.word 0x218000++0x1 line.word 0x0 "ETHSW_FES1_IPO_CMDR,ETHSW FES port 1 IPO command register" bitfld.word 0x0 15. "TRANSFER,Transfer" "0,1" bitfld.word 0x0 14. "RD_WR,Read/write" "B_0x0,B_0x1" hexmask.word.byte 0x0 0.--3. 1. "IPO_FIL_NUM,IPO Filter Number" group.word 0x218010++0xD line.word 0x0 "ETHSW_FES1_ETH_ADDR_CFG0R,ETHSW FES port 1 IPO filter configuration register 0" bitfld.word 0x0 15. "NEW_PRI_LSB,New priority LSB" "0,1" bitfld.word 0x0 14. "PRES_PRI,Preserve priority" "B_0x0,B_0x1" bitfld.word 0x0 12.--13. "NEW_PRI_MSB,New priority MSBs" "0,1,2,3" newline bitfld.word 0x0 9. "POL_PRIO,Policer priority" "B_0x0,B_0x1" hexmask.word.byte 0x0 2.--7. 1. "CMP_LENGTH,Compared Length" bitfld.word 0x0 1. "SRC_DST_MATCH,Source/Destination Match" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "ENABLE,Enable" "B_0x0,B_0x1" line.word 0x2 "ETHSW_FES1_ETH_ADDR_FWD_ALLOWR,ETHSW FES port 1 forward allow register" bitfld.word 0x2 0.--2. "FWD_ALLOW_MSK,Forward allow mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x4 "ETHSW_FES1_ETH_ADDR_FWD_MIRRORR,ETHSW FES port 1 forward mirror register" bitfld.word 0x4 0.--2. "FWD_MIRROR_MSK,Forward mirror mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x6 "ETHSW_FES1_ETH_ADDR_CFG1R,ETHSW FES port 1 IPO filter configuration register 1" bitfld.word 0x6 15. "CT_DIS,Cut-Through disable" "B_0x0,B_0x1" bitfld.word 0x6 14. "CMP_ORDER,Compare Order" "B_0x0,B_0x1" bitfld.word 0x6 12. "IPO_MARK,IPO Mark" "0,1" newline hexmask.word.byte 0x6 0.--6. 1. "POLICER,Policer" line.word 0x8 "ETHSW_FES1_ETH_ADDR_0R,ETHSW FES port 1 ethernet address part 0 register" hexmask.word.byte 0x8 8.--15. 1. "OCTET_2,2less thansup>ndless than/sup> octet" hexmask.word.byte 0x8 0.--7. 1. "OCTET_1,1less thansup>stless than/sup> octet" line.word 0xA "ETHSW_FES1_ETH_ADDR_1R,ETHSW FES port 1 ethernet address part 1 register" hexmask.word.byte 0xA 8.--15. 1. "OCTET_4,4less thansup>thless than/sup> octet" hexmask.word.byte 0xA 0.--7. 1. "OCTET_3,3less thansup>rdless than/sup> octet" line.word 0xC "ETHSW_FES1_ETH_ADDR_2R,ETHSW FES port 1 ethernet address part 2 register" hexmask.word.byte 0xC 8.--15. 1. "OCTET_6,6less thansup>thless than/sup> octet" hexmask.word.byte 0xC 0.--7. 1. "OCTET_5,5less thansup>thless than/sup> octet" group.word 0x220000++0x1 line.word 0x0 "ETHSW_FES2_PORT_STATER,ETHSW FES port 2 port State register" bitfld.word 0x0 15. "RX_CT,RX Cut-through" "B_0x0,B_0x1" bitfld.word 0x0 14. "FB_STF,Fallback to Store-and-Forward" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "SPEED_SEL,Speed select" "?,B_0x1,B_0x2,B_0x3" newline bitfld.word 0x0 4.--5. "HW_MODE,Port HW mode" "B_0x0,?,B_0x2,?" bitfld.word 0x0 2.--3. "MGMT_ST,Port management state" "B_0x0,B_0x1,?,?" bitfld.word 0x0 0.--1. "FWD_ST,Port Forwarding state" "B_0x0,?,B_0x2,?" group.word 0x220010++0xF line.word 0x0 "ETHSW_FES2_VLAN0R,ETHSW FES port 2 port VLAN configuration register 0" bitfld.word 0x0 15. "TGD_UTGD,Tagged/untagged" "B_0x0,B_0x1" bitfld.word 0x0 12.--14. "PD_PCP,Port default PCP" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--11. 1. "PD_VLAN,Port default VLAN" line.word 0x2 "ETHSW_FES2_VLAN1R,ETHSW FES port 2 port VLAN configuration register 1" bitfld.word 0x2 15. "USE_DEI,Use_DEI" "B_0x0,B_0x1" hexmask.word 0x2 0.--11. 1. "VLAN_PRIF,Default VLAN for Priority Tagged Frames" line.word 0x4 "ETHSW_FES2_FWDM_CFGR,ETHSW FES port 2 port forward mask configuration register" bitfld.word 0x4 0.--2. "PORT_FWDM,Port forward mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x6 "ETHSW_FES2_PRIO_REGENLR,ETHSW FES port 2 priority regeneration table low register" bitfld.word 0x6 12.--14. "PCP3,Priority PCP3" "0,1,2,3,4,5,6,7" bitfld.word 0x6 8.--10. "PCP2,Priority PCP2" "0,1,2,3,4,5,6,7" bitfld.word 0x6 4.--6. "PCP1,Priority PCP1" "0,1,2,3,4,5,6,7" newline bitfld.word 0x6 0.--2. "PCP0,Priority PCP0" "0,1,2,3,4,5,6,7" line.word 0x8 "ETHSW_FES2_PRIO_REGENHR,ETHSW FES port 2 priority regeneration table high register" bitfld.word 0x8 12.--14. "PCP7,Priority PCP7" "0,1,2,3,4,5,6,7" bitfld.word 0x8 8.--10. "PCP6,Priority PCP6" "0,1,2,3,4,5,6,7" bitfld.word 0x8 4.--6. "PCP5,Priority PCP5" "0,1,2,3,4,5,6,7" newline bitfld.word 0x8 0.--2. "PCP4,Priority PCP4" "0,1,2,3,4,5,6,7" line.word 0xA "ETHSW_FES2_TX_CTER,ETHSW FES port 2 TX cut-through enable register" bitfld.word 0xA 7. "CTE7,Cut-through enable/disable for queue 7" "0,1" bitfld.word 0xA 6. "CTE6,Cut-through enable/disable for queue 6" "0,1" bitfld.word 0xA 5. "CTE5,Cut-through enable/disable for queue 5" "0,1" newline bitfld.word 0xA 4. "CTE4,Cut-through enable/disable for queue 4" "0,1" bitfld.word 0xA 3. "CTE3,Cut-through enable/disable for queue 3" "0,1" bitfld.word 0xA 2. "CTE2,Cut-through enable/disable for queue 2" "0,1" newline bitfld.word 0xA 1. "CTE1,Cut-through enable/disable for queue 1" "0,1" bitfld.word 0xA 0. "CTE0,Cut-through enable/disable for queue 0" "B_0x0,B_0x1" line.word 0xC "ETHSW_FES2_TX_PREE0R,ETHSW FES port 2 TX preemptable traffic selection register 0" bitfld.word 0xC 7. "PREE7,Preemption setting for queue 7" "0,1" bitfld.word 0xC 6. "PREE6,Preemption setting for queue 6" "0,1" bitfld.word 0xC 5. "PREE5,Preemption setting for queue 5" "0,1" newline bitfld.word 0xC 4. "PREE4,Preemption setting for queue 4" "0,1" bitfld.word 0xC 3. "PREE3,Preemption setting for queue 3" "0,1" bitfld.word 0xC 2. "PREE2,Preemption setting for queue 2" "0,1" newline bitfld.word 0xC 1. "PREE1,Preemption setting for queue 1" "0,1" bitfld.word 0xC 0. "PREE0,Preemption setting for queue 0" "B_0x0,B_0x1" line.word 0xE "ETHSW_FES2_TX_PREE1R,ETHSW FES port 2 TX preemptable traffic selection register 1" bitfld.word 0xE 0.--1. "ADDFRAGSIZE,AddFragSize" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x220020++0x3 line.long 0x0 "ETHSW_FES2_QUEUE_TBLR,ETHSW FES port 2 queue table configuration register" bitfld.long 0x0 28.--30. "QUEUE_PRI7,Queue for priority 7" "0,1,2,3,4,5,6,7" bitfld.long 0x0 24.--26. "QUEUE_PRI6,Queue for priority 6" "0,1,2,3,4,5,6,7" bitfld.long 0x0 20.--22. "QUEUE_PRI5,Queue for priority 5" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16.--18. "QUEUE_PRI4,Queue for priority 4" "0,1,2,3,4,5,6,7" bitfld.long 0x0 12.--14. "QUEUE_PRI3,Queue for priority 3" "0,1,2,3,4,5,6,7" bitfld.long 0x0 8.--10. "QUEUE_PRI2,Queue for priority 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4.--6. "QUEUE_PRI1,Queue for priority 1" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "QUEUE_PRI0,Queue for priority 0" "0,1,2,3,4,5,6,7" group.word 0x220030++0x1F line.word 0x0 "ETHSW_FES2_SHAPER0R,ETHSW FES port 2 shaper 0 configuration register" hexmask.word 0x0 0.--15. 1. "ADDEND,Addend" line.word 0x2 "ETHSW_FES2_SHAPER1R,ETHSW FES port 2 shaper 1 configuration register" hexmask.word 0x2 0.--15. 1. "ADDEND,Addend" line.word 0x4 "ETHSW_FES2_SHAPER2R,ETHSW FES port 2 shaper 2 configuration register" hexmask.word 0x4 0.--15. 1. "ADDEND,Addend" line.word 0x6 "ETHSW_FES2_SHAPER3R,ETHSW FES port 2 shaper 3 configuration register" hexmask.word 0x6 0.--15. 1. "ADDEND,Addend" line.word 0x8 "ETHSW_FES2_SHAPER4R,ETHSW FES port 2 shaper 4 configuration register" hexmask.word 0x8 0.--15. 1. "ADDEND,Addend" line.word 0xA "ETHSW_FES2_SHAPER5R,ETHSW FES port 2 shaper 5 configuration register" hexmask.word 0xA 0.--15. 1. "ADDEND,Addend" line.word 0xC "ETHSW_FES2_SHAPER6R,ETHSW FES port 2 shaper 6 configuration register" hexmask.word 0xC 0.--15. 1. "ADDEND,Addend" line.word 0xE "ETHSW_FES2_SHAPER7R,ETHSW FES port 2 shaper 7 configuration register" hexmask.word 0xE 0.--15. 1. "ADDEND,Addend" line.word 0x10 "ETHSW_FES2_FRAMESIZE0R,ETHSW FES port 2 frame size 0 configuration register" hexmask.word 0x10 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x12 "ETHSW_FES2_FRAMESIZE1R,ETHSW FES port 2 frame size 1 configuration register" hexmask.word 0x12 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x14 "ETHSW_FES2_FRAMESIZE2R,ETHSW FES port 2 frame size 2 configuration register" hexmask.word 0x14 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x16 "ETHSW_FES2_FRAMESIZE3R,ETHSW FES port 2 frame size 3 configuration register" hexmask.word 0x16 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x18 "ETHSW_FES2_FRAMESIZE4R,ETHSW FES port 2 frame size 4 configuration register" hexmask.word 0x18 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x1A "ETHSW_FES2_FRAMESIZE5R,ETHSW FES port 2 frame size 5 configuration register" hexmask.word 0x1A 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x1C "ETHSW_FES2_FRAMESIZE6R,ETHSW FES port 2 frame size 6 configuration register" hexmask.word 0x1C 0.--10. 1. "FRAMESIZE,Max frame size" line.word 0x1E "ETHSW_FES2_FRAMESIZE7R,ETHSW FES port 2 frame size 7 configuration register" hexmask.word 0x1E 0.--10. 1. "FRAMESIZE,Max frame size" group.word 0x220080++0xF line.word 0x0 "ETHSW_FES2_FID_CFG0R,ETHSW FES port 2 filtering identifier configuration register 0" bitfld.word 0x0 14.--15. "FWD_ST7,Port Forwarding state for FID 7" "0,1,2,3" bitfld.word 0x0 12.--13. "FWD_ST6,Port Forwarding state for FID 6" "0,1,2,3" bitfld.word 0x0 10.--11. "FWD_ST5,Port Forwarding state for FID 5" "0,1,2,3" newline bitfld.word 0x0 8.--9. "FWD_ST4,Port Forwarding state for FID 4" "0,1,2,3" bitfld.word 0x0 6.--7. "FWD_ST3,Port Forwarding state for FID 3" "0,1,2,3" bitfld.word 0x0 4.--5. "FWD_ST2,Port Forwarding state for FID 2" "0,1,2,3" newline bitfld.word 0x0 2.--3. "FWD_ST1,Port Forwarding state for FID 1" "0,1,2,3" bitfld.word 0x0 0.--1. "FWD_ST0,Port Forwarding state for FID 0" "B_0x0,B_0x1,B_0x2,?" line.word 0x2 "ETHSW_FES2_FID_CFG1R,ETHSW FES port 2 filtering identifier configuration register 1" bitfld.word 0x2 14.--15. "FWD_ST15,Port Forwarding state for FID 15" "0,1,2,3" bitfld.word 0x2 12.--13. "FWD_ST14,Port Forwarding state for FID 14" "0,1,2,3" bitfld.word 0x2 10.--11. "FWD_ST13,Port Forwarding state for FID 13" "0,1,2,3" newline bitfld.word 0x2 8.--9. "FWD_ST12,Port Forwarding state for FID 12" "0,1,2,3" bitfld.word 0x2 6.--7. "FWD_ST11,Port Forwarding state for FID 11" "0,1,2,3" bitfld.word 0x2 4.--5. "FWD_ST10,Port Forwarding state for FID 10" "0,1,2,3" newline bitfld.word 0x2 2.--3. "FWD_ST9,Port Forwarding state for FID 9" "0,1,2,3" bitfld.word 0x2 0.--1. "FWD_ST8,Port Forwarding state for FID 8" "0,1,2,3" line.word 0x4 "ETHSW_FES2_FID_CFG2R,ETHSW FES port 2 filtering identifier configuration register 2" bitfld.word 0x4 14.--15. "FWD_ST23,Port Forwarding state for FID 23" "0,1,2,3" bitfld.word 0x4 12.--13. "FWD_ST22,Port Forwarding state for FID 22" "0,1,2,3" bitfld.word 0x4 10.--11. "FWD_ST21,Port Forwarding state for FID 21" "0,1,2,3" newline bitfld.word 0x4 8.--9. "FWD_ST20,Port Forwarding state for FID 20" "0,1,2,3" bitfld.word 0x4 6.--7. "FWD_ST19,Port Forwarding state for FID 19" "0,1,2,3" bitfld.word 0x4 4.--5. "FWD_ST18,Port Forwarding state for FID 18" "0,1,2,3" newline bitfld.word 0x4 2.--3. "FWD_ST17,Port Forwarding state for FID 17" "0,1,2,3" bitfld.word 0x4 0.--1. "FWD_ST16,Port Forwarding state for FID 16" "0,1,2,3" line.word 0x6 "ETHSW_FES2_FID_CFG3R,ETHSW FES port 2 filtering identifier configuration register 3" bitfld.word 0x6 14.--15. "FWD_ST31,Port Forwarding state for FID 31" "0,1,2,3" bitfld.word 0x6 12.--13. "FWD_ST30,Port Forwarding state for FID30" "0,1,2,3" bitfld.word 0x6 10.--11. "FWD_ST29,Port Forwarding state for FID 29" "0,1,2,3" newline bitfld.word 0x6 8.--9. "FWD_ST28,Port Forwarding state for FID 28" "0,1,2,3" bitfld.word 0x6 6.--7. "FWD_ST27,Port Forwarding state for FID 27" "0,1,2,3" bitfld.word 0x6 4.--5. "FWD_ST26,Port Forwarding state for FID 26" "0,1,2,3" newline bitfld.word 0x6 2.--3. "FWD_ST25,Port Forwarding state for FID 25" "0,1,2,3" bitfld.word 0x6 0.--1. "FWD_ST24,Port Forwarding state for FID 24" "0,1,2,3" line.word 0x8 "ETHSW_FES2_FID_CFG4R,ETHSW FES port 2 filtering identifier configuration register 4" bitfld.word 0x8 14.--15. "FWD_ST39,Port Forwarding state for FID 39" "0,1,2,3" bitfld.word 0x8 12.--13. "FWD_ST38,Port Forwarding state for FID38" "0,1,2,3" bitfld.word 0x8 10.--11. "FWD_ST37,Port Forwarding state for FID 37" "0,1,2,3" newline bitfld.word 0x8 8.--9. "FWD_ST36,Port Forwarding state for FID 36" "0,1,2,3" bitfld.word 0x8 6.--7. "FWD_ST35,Port Forwarding state for FID 35" "0,1,2,3" bitfld.word 0x8 4.--5. "FWD_ST34,Port Forwarding state for FID 34" "0,1,2,3" newline bitfld.word 0x8 2.--3. "FWD_ST33,Port Forwarding state for FID 33" "0,1,2,3" bitfld.word 0x8 0.--1. "FWD_ST32,Port Forwarding state for FID 32" "0,1,2,3" line.word 0xA "ETHSW_FES2_FID_CFG5R,ETHSW FES port 2 filtering identifier configuration register 5" bitfld.word 0xA 14.--15. "FWD_ST47,Port Forwarding state for FID 47" "0,1,2,3" bitfld.word 0xA 12.--13. "FWD_ST46,Port Forwarding state for FID46" "0,1,2,3" bitfld.word 0xA 10.--11. "FWD_ST45,Port Forwarding state for FID 45" "0,1,2,3" newline bitfld.word 0xA 8.--9. "FWD_ST44,Port Forwarding state for FID 44" "0,1,2,3" bitfld.word 0xA 6.--7. "FWD_ST43,Port Forwarding state for FID 43" "0,1,2,3" bitfld.word 0xA 4.--5. "FWD_ST42,Port Forwarding state for FID 42" "0,1,2,3" newline bitfld.word 0xA 2.--3. "FWD_ST41,Port Forwarding state for FID 41" "0,1,2,3" bitfld.word 0xA 0.--1. "FWD_ST40,Port Forwarding state for FID 40" "0,1,2,3" line.word 0xC "ETHSW_FES2_FID_CFG6R,ETHSW FES port 2 filtering identifier configuration register 6" bitfld.word 0xC 14.--15. "FWD_ST55,Port Forwarding state for FID 55" "0,1,2,3" bitfld.word 0xC 12.--13. "FWD_ST54,Port Forwarding state for FID54" "0,1,2,3" bitfld.word 0xC 10.--11. "FWD_ST53,Port Forwarding state for FID 53" "0,1,2,3" newline bitfld.word 0xC 8.--9. "FWD_ST52,Port Forwarding state for FID 52" "0,1,2,3" bitfld.word 0xC 6.--7. "FWD_ST51,Port Forwarding state for FID 51" "0,1,2,3" bitfld.word 0xC 4.--5. "FWD_ST50,Port Forwarding state for FID 50" "0,1,2,3" newline bitfld.word 0xC 2.--3. "FWD_ST49,Port Forwarding state for FID 49" "0,1,2,3" bitfld.word 0xC 0.--1. "FWD_ST48,Port Forwarding state for FID 48" "0,1,2,3" line.word 0xE "ETHSW_FES2_FID_CFG7R,ETHSW FES port 2 filtering identifier configuration register 7" bitfld.word 0xE 14.--15. "FWD_ST63,Port Forwarding state for FID 63" "0,1,2,3" bitfld.word 0xE 12.--13. "FWD_ST62,Port Forwarding state for FID62" "0,1,2,3" bitfld.word 0xE 10.--11. "FWD_ST61,Port Forwarding state for FID 61" "0,1,2,3" newline bitfld.word 0xE 8.--9. "FWD_ST60,Port Forwarding state for FID 60" "0,1,2,3" bitfld.word 0xE 6.--7. "FWD_ST59,Port Forwarding state for FID 59" "0,1,2,3" bitfld.word 0xE 4.--5. "FWD_ST58,Port Forwarding state for FID 58" "0,1,2,3" newline bitfld.word 0xE 2.--3. "FWD_ST57,Port Forwarding state for FID 57" "0,1,2,3" bitfld.word 0xE 0.--1. "FWD_ST56,Port Forwarding state for FID 56" "0,1,2,3" group.word 0x2200C0++0x3 line.word 0x0 "ETHSW_FES2_FL_CAPTR,ETHSW FES port 2 buffer fill level capture register" bitfld.word 0x0 0. "CAPTURE,Capture" "0,1" line.word 0x2 "ETHSW_FES2_FL_SMPL_CNTR,ETHSW FES port 2 buffer fill level sample counter register" hexmask.word 0x2 0.--15. 1. "FL_SAMPLE_CNT,Sample counter" group.word 0x2200E0++0x1F line.word 0x0 "ETHSW_FES2_FL_Q0_MINR,ETHSW FES port 2 minimum fill level queue 0 register" hexmask.word.byte 0x0 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x2 "ETHSW_FES2_FL_Q1_MINR,ETHSW FES port 2 minimum fill level queue 1 register" hexmask.word.byte 0x2 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x4 "ETHSW_FES2_FL_Q2_MINR,ETHSW FES port 2 minimum fill level queue 2 register" hexmask.word.byte 0x4 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x6 "ETHSW_FES2_FL_Q3_MINR,ETHSW FES port 2 minimum fill level queue 3 register" hexmask.word.byte 0x6 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x8 "ETHSW_FES2_FL_Q4_MINR,ETHSW FES port 2 minimum fill level queue 4 register" hexmask.word.byte 0x8 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0xA "ETHSW_FES2_FL_Q5_MINR,ETHSW FES port 2 minimum fill level queue 5 register" hexmask.word.byte 0xA 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0xC "ETHSW_FES2_FL_Q6_MINR,ETHSW FES port 2 minimum fill level queue 6 register" hexmask.word.byte 0xC 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0xE "ETHSW_FES2_FL_Q7_MINR,ETHSW FES port 2 minimum fill level queue 7 register" hexmask.word.byte 0xE 0.--4. 1. "FL_QY_MIN,Minimum fill level for queue y" line.word 0x10 "ETHSW_FES2_FL_Q0_MAXR,ETHSW FES port 2 maximum fill level queue 0 register" hexmask.word.byte 0x10 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x12 "ETHSW_FES2_FL_Q1_MAXR,ETHSW FES port 2 maximum fill level queue 1 register" hexmask.word.byte 0x12 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x14 "ETHSW_FES2_FL_Q2_MAXR,ETHSW FES port 2 maximum fill level queue 2 register" hexmask.word.byte 0x14 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x16 "ETHSW_FES2_FL_Q3_MAXR,ETHSW FES port 2 maximum fill level queue 3 register" hexmask.word.byte 0x16 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x18 "ETHSW_FES2_FL_Q4_MAXR,ETHSW FES port 2 maximum fill level queue 4 register" hexmask.word.byte 0x18 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x1A "ETHSW_FES2_FL_Q5_MAXR,ETHSW FES port 2 maximum fill level queue 5 register" hexmask.word.byte 0x1A 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x1C "ETHSW_FES2_FL_Q6_MAXR,ETHSW FES port 2 maximum fill level queue 6 register" hexmask.word.byte 0x1C 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" line.word 0x1E "ETHSW_FES2_FL_Q7_MAXR,ETHSW FES port 2 maximum fill level queue 7 register" hexmask.word.byte 0x1E 0.--4. 1. "FL_QY_MAX,Maximum fill level for queue y" group.word 0x224000++0x5 line.word 0x0 "ETHSW_FES2_PTP_RX_SYNCD_SNSR,ETHSW FES PTP RX sync delay subnanosecond register" hexmask.word 0x0 0.--15. 1. "PTP_RX_SYNC_DELAY_SUBNS,RX Sync delay subnanoseconds" line.word 0x2 "ETHSW_FES2_PTP_RX_SYNCD_NSLR,ETHSW FES PTP RX sync delay nanosecond low register" hexmask.word 0x2 0.--15. 1. "PTP_RX_SYNC_DELAY_NSL,RX Sync delay nanoseconds low part" line.word 0x4 "ETHSW_FES2_PTP_RX_SYNCD_NSHR,ETHSW FES PTP RX sync delay nanosecond high register" hexmask.word.byte 0x4 0.--7. 1. "PTP_RX_SYNC_DELAY_NSH,RX Sync delay nanoseconds high part" group.word 0x224008++0x3 line.word 0x0 "ETHSW_FES2_PTP_RX_EVENTD_SNSR,ETHSW FES PTP RX event delay subnanosecond register" hexmask.word 0x0 0.--15. 1. "PTP_RX_EVENT_DELAY_SNS,RX Event delay subnanoseconds" line.word 0x2 "ETHSW_FES2_PTP_RX_EVENTD_NSR,ETHSW FES PTP RX event delay nanosecond register" hexmask.word 0x2 0.--15. 1. "PTP_RX_EVENT_DELAY_NS,RX Event delay nanoseconds" group.word 0x224010++0x3 line.word 0x0 "ETHSW_FES2_PTP_TX_EVENTD_SNSR,ETHSW FES PTP TX event delay subnanosecond register" hexmask.word 0x0 0.--15. 1. "PTP_TX_EVENT_DELAY_SNS,TX Event delay subnanoseconds" line.word 0x2 "ETHSW_FES2_PTP_TX_EVENTD_NSR,ETHSW FES PTP TX event delay nanosecond register" hexmask.word 0x2 0.--15. 1. "PTP_TX_EVENT_DELAY_NS,TX Event delay nanoseconds" group.word 0x226000++0x3 line.word 0x0 "ETHSW_FES2_CNT_CTRLR,ETHSW FES port 2 counter control register" bitfld.word 0x0 12. "CPT_CNT_GRP5,Capture counter group 5" "B_0x0,B_0x1" bitfld.word 0x0 10. "CPT_CNT_GRP3,Capture counter group 3" "B_0x0,B_0x1" bitfld.word 0x0 8. "CPT_CNT_GRP1,Capture counter group 1" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "CAPTURE,Capture" "0,1" line.word 0x2 "ETHSW_FES2_CNT_CMDR,ETHSW FES port 2 counter command register" bitfld.word 0x2 15. "TRANSFER,Transfer" "0,1" hexmask.word.byte 0x2 0.--5. 1. "CNT_NUM,Counter number" group.word 0x226008++0x3 line.word 0x0 "ETHSW_FES2_CNT_VAL_LOR,ETHSW FES port 2 counter value low register" hexmask.word 0x0 0.--15. 1. "CNT_VAL_LO,Counter value Low" line.word 0x2 "ETHSW_FES2_CNT_VAL_HIR,ETHSW FES port 2 counter value high register" hexmask.word 0x2 0.--15. 1. "CNT_VAL_HI,Counter value High" group.word 0x228000++0x1 line.word 0x0 "ETHSW_FES2_IPO_CMDR,ETHSW FES port 2 IPO command register" bitfld.word 0x0 15. "TRANSFER,Transfer" "0,1" bitfld.word 0x0 14. "RD_WR,Read/write" "B_0x0,B_0x1" hexmask.word.byte 0x0 0.--3. 1. "IPO_FIL_NUM,IPO Filter Number" group.word 0x228010++0xD line.word 0x0 "ETHSW_FES2_ETH_ADDR_CFG0R,ETHSW FES port 2 IPO filter configuration register 0" bitfld.word 0x0 15. "NEW_PRI_LSB,New priority LSB" "0,1" bitfld.word 0x0 14. "PRES_PRI,Preserve priority" "B_0x0,B_0x1" bitfld.word 0x0 12.--13. "NEW_PRI_MSB,New priority MSBs" "0,1,2,3" newline bitfld.word 0x0 9. "POL_PRIO,Policer priority" "B_0x0,B_0x1" hexmask.word.byte 0x0 2.--7. 1. "CMP_LENGTH,Compared Length" bitfld.word 0x0 1. "SRC_DST_MATCH,Source/Destination Match" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "ENABLE,Enable" "B_0x0,B_0x1" line.word 0x2 "ETHSW_FES2_ETH_ADDR_FWD_ALLOWR,ETHSW FES port 2 forward allow register" bitfld.word 0x2 0.--2. "FWD_ALLOW_MSK,Forward allow mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x4 "ETHSW_FES2_ETH_ADDR_FWD_MIRRORR,ETHSW FES port 2 forward mirror register" bitfld.word 0x4 0.--2. "FWD_MIRROR_MSK,Forward mirror mask" "B_0x0,B_0x1,?,?,?,?,?,?" line.word 0x6 "ETHSW_FES2_ETH_ADDR_CFG1R,ETHSW FES port 2 IPO filter configuration register 1" bitfld.word 0x6 15. "CT_DIS,Cut-Through disable" "B_0x0,B_0x1" bitfld.word 0x6 14. "CMP_ORDER,Compare Order" "B_0x0,B_0x1" bitfld.word 0x6 12. "IPO_MARK,IPO Mark" "0,1" newline hexmask.word.byte 0x6 0.--6. 1. "POLICER,Policer" line.word 0x8 "ETHSW_FES2_ETH_ADDR_0R,ETHSW FES port 2 ethernet address part 0 register" hexmask.word.byte 0x8 8.--15. 1. "OCTET_2,2less thansup>ndless than/sup> octet" hexmask.word.byte 0x8 0.--7. 1. "OCTET_1,1less thansup>stless than/sup> octet" line.word 0xA "ETHSW_FES2_ETH_ADDR_1R,ETHSW FES port 2 ethernet address part 1 register" hexmask.word.byte 0xA 8.--15. 1. "OCTET_4,4less thansup>thless than/sup> octet" hexmask.word.byte 0xA 0.--7. 1. "OCTET_3,3less thansup>rdless than/sup> octet" line.word 0xC "ETHSW_FES2_ETH_ADDR_2R,ETHSW FES port 2 ethernet address part 2 register" hexmask.word.byte 0xC 8.--15. 1. "OCTET_6,6less thansup>thless than/sup> octet" hexmask.word.byte 0xC 0.--7. 1. "OCTET_5,5less thansup>thless than/sup> octet" rgroup.word 0x1000000++0x3 line.word 0x0 "ETHSW_EIA_RGMII_P0_IDR,ETHSW EIA port 0 RGMII adapter ID register" hexmask.word.byte 0x0 8.--15. 1. "VERSION,Version" hexmask.word.byte 0x0 0.--7. 1. "ID,Device ID" line.word 0x2 "ETHSW_EIA_RGMII_P0_LINK_STATUSR,ETHSW EIA port 0 RGMII adapter link status register" bitfld.word 0x2 3. "DUPLEX_STATUS,Duplex status" "B_0x0,B_0x1" bitfld.word 0x2 1.--2. "AUTONEG_SPEED,Autoneg speed" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x2 0. "LINK_STATUS,Link status" "B_0x0,?" rgroup.word 0x1000020++0x3 line.word 0x0 "ETHSW_EIA_RGMII_P0_RX_DELAYR,ETHSW EIA port 0 RGMII adapter RX delay register" hexmask.word 0x0 0.--15. 1. "RX_DELAY,RX Delay" line.word 0x2 "ETHSW_EIA_RGMII_P0_TX_DELAYR,ETHSW EIA port 0 RGMII adapter TX delay register" hexmask.word 0x2 0.--15. 1. "TX_DELAY,TX Delay" rgroup.word 0x1000200++0x3 line.word 0x0 "ETHSW_EIA_RGMII_P1_IDR,ETHSW EIA port 1 RGMII adapter ID register" hexmask.word.byte 0x0 8.--15. 1. "VERSION,Version" hexmask.word.byte 0x0 0.--7. 1. "ID,Device ID" line.word 0x2 "ETHSW_EIA_RGMII_P1_LINK_STATUSR,ETHSW EIA port 1 RGMII adapter link status register" bitfld.word 0x2 3. "DUPLEX_STATUS,Duplex status" "B_0x0,B_0x1" bitfld.word 0x2 1.--2. "AUTONEG_SPEED,Autoneg speed" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x2 0. "LINK_STATUS,Link status" "B_0x0,?" rgroup.word 0x1000220++0x3 line.word 0x0 "ETHSW_EIA_RGMII_P1_RX_DELAYR,ETHSW EIA port 1 RGMII adapter RX delay register" hexmask.word 0x0 0.--15. 1. "RX_DELAY,RX Delay" line.word 0x2 "ETHSW_EIA_RGMII_P1_TX_DELAYR,ETHSW EIA port 1 RGMII adapter TX delay register" hexmask.word 0x2 0.--15. 1. "TX_DELAY,TX Delay" rgroup.word 0x1000400++0x3 line.word 0x0 "ETHSW_EIA_RGMII_P2_IDR,ETHSW EIA port 2 RGMII adapter ID register" hexmask.word.byte 0x0 8.--15. 1. "VERSION,Version" hexmask.word.byte 0x0 0.--7. 1. "ID,Device ID" line.word 0x2 "ETHSW_EIA_RGMII_P2_LINK_STATUSR,ETHSW EIA port 2 RGMII adapter link status register" bitfld.word 0x2 3. "DUPLEX_STATUS,Duplex status" "B_0x0,B_0x1" bitfld.word 0x2 1.--2. "AUTONEG_SPEED,Autoneg speed" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x2 0. "LINK_STATUS,Link status" "B_0x0,?" rgroup.word 0x1000420++0x3 line.word 0x0 "ETHSW_EIA_RGMII_P2_RX_DELAYR,ETHSW EIA port 2 RGMII adapter RX delay register" hexmask.word 0x0 0.--15. 1. "RX_DELAY,RX Delay" line.word 0x2 "ETHSW_EIA_RGMII_P2_TX_DELAYR,ETHSW EIA port 2 RGMII adapter TX delay register" hexmask.word 0x2 0.--15. 1. "TX_DELAY,TX Delay" rgroup.word 0x1000100++0x1 line.word 0x0 "ETHSW_EIA_RMII_P1_IDR,ETHSW EIA port 1 RMII adapter ID register [alternate]" hexmask.word.byte 0x0 8.--15. 1. "VERSION,Version" hexmask.word.byte 0x0 0.--7. 1. "ID,Device ID" group.word 0x1000202++0x1 line.word 0x0 "ETHSW_EIA_RMII_P1_LINK_STATUSR,ETHSW EIA port 1 RMII adapter link status register [alternate]" bitfld.word 0x0 0. "LINK_STATUS,link status" "B_0x0,B_0x1" rgroup.word 0x1000320++0x3 line.word 0x0 "ETHSW_EIA_RMII_P1_RX_DELAYR,ETHSW EIA port 1 RMII adapter RX delay register [alternate]" hexmask.word 0x0 0.--15. 1. "RX_DELAY,RX Delay" line.word 0x2 "ETHSW_EIA_RMII_P1_TX_DELAYR,ETHSW EIA port 1 RMII adapter TX delay register [alternate]" hexmask.word 0x2 0.--15. 1. "TX_DELAY,TX Delay" rgroup.word 0x1000400++0x1 line.word 0x0 "ETHSW_EIA_RMII_P2_IDR,ETHSW EIA port 2 RMII adapter ID register [alternate]" hexmask.word.byte 0x0 8.--15. 1. "VERSION,Version" hexmask.word.byte 0x0 0.--7. 1. "ID,Device ID" group.word 0x1000402++0x1 line.word 0x0 "ETHSW_EIA_RMII_P2_LINK_STATUSR,ETHSW EIA port 2 RMII adapter link status register [alternate]" bitfld.word 0x0 0. "LINK_STATUS,link status" "B_0x0,B_0x1" rgroup.word 0x1000420++0x3 line.word 0x0 "ETHSW_EIA_RMII_P2_RX_DELAYR,ETHSW EIA port 2 RMII adapter RX delay register [alternate]" hexmask.word 0x0 0.--15. 1. "RX_DELAY,RX Delay" line.word 0x2 "ETHSW_EIA_RMII_P2_TX_DELAYR,ETHSW EIA port 2 RMII adapter TX delay register [alternate]" hexmask.word 0x2 0.--15. 1. "TX_DELAY,TX Delay" tree.end tree.end tree.end endif tree "EXTI (Extended Interrupt and Event Controller)" base ad:0x0 sif (cpuis("*CA35")||cpuis("*CM33F")) tree "EXTI1" base ad:0x44220000 group.long 0x0++0x1B line.long 0x0 "EXTI1_RTSR1,EXTI1 rising trigger selection register" bitfld.long 0x0 18. "RT18,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 17. "RT17,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 16. "RT16,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 15. "RT15,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 14. "RT14,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 13. "RT13,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 12. "RT12,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "RT11,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 10. "RT10,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 9. "RT9,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 8. "RT8,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 7. "RT7,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 6. "RT6,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 5. "RT5,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "RT4,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 3. "RT3,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 2. "RT2,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 1. "RT1,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 0. "RT0,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" line.long 0x4 "EXTI1_FTSR1,EXTI1 falling trigger selection register" bitfld.long 0x4 18. "FT18,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 17. "FT17,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 16. "FT16,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 15. "FT15,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 14. "FT14,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 13. "FT13,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 12. "FT12,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "FT11,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 10. "FT10,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 9. "FT9,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 8. "FT8,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 7. "FT7,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 6. "FT6,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 5. "FT5,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "FT4,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 3. "FT3,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 2. "FT2,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 1. "FT1,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 0. "FT0,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" line.long 0x8 "EXTI1_SWIER1,EXTI1 software interrupt event register" bitfld.long 0x8 18. "SWI18,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SWI17,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SWI16,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 15. "SWI15,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 14. "SWI14,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 13. "SWI13,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 12. "SWI12,Software interrupt on event x" "B_0x0,B_0x1" newline bitfld.long 0x8 11. "SWI11,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 10. "SWI10,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 9. "SWI9,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 8. "SWI8,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 7. "SWI7,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 6. "SWI6,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 5. "SWI5,Software interrupt on event x" "B_0x0,B_0x1" newline bitfld.long 0x8 4. "SWI4,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 3. "SWI3,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 2. "SWI2,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 1. "SWI1,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 0. "SWI0,Software interrupt on event x" "B_0x0,B_0x1" line.long 0xC "EXTI1_RPR1,EXTI1 rising edge pending register" bitfld.long 0xC 18. "RPIF18,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 17. "RPIF17,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 16. "RPIF16,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 15. "RPIF15,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 14. "RPIF14,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 13. "RPIF13,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 12. "RPIF12,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" newline bitfld.long 0xC 11. "RPIF11,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 10. "RPIF10,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 9. "RPIF9,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 8. "RPIF8,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 7. "RPIF7,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 6. "RPIF6,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 5. "RPIF5,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" newline bitfld.long 0xC 4. "RPIF4,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 3. "RPIF3,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 2. "RPIF2,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 1. "RPIF1,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 0. "RPIF0,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" line.long 0x10 "EXTI1_FPR1,EXTI1 falling edge pending register" bitfld.long 0x10 18. "FPIF18,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 17. "FPIF17,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 16. "FPIF16,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 15. "FPIF15,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 14. "FPIF14,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 13. "FPIF13,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 12. "FPIF12,configurable event input x falling edge pending bit" "B_0x0,B_0x1" newline bitfld.long 0x10 11. "FPIF11,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 10. "FPIF10,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 9. "FPIF9,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 8. "FPIF8,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 7. "FPIF7,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 6. "FPIF6,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 5. "FPIF5,configurable event input x falling edge pending bit" "B_0x0,B_0x1" newline bitfld.long 0x10 4. "FPIF4,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 3. "FPIF3,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 2. "FPIF2,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 1. "FPIF1,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 0. "FPIF0,configurable event input x falling edge pending bit" "B_0x0,B_0x1" line.long 0x14 "EXTI1_SECCFGR1,EXTI1 security configuration register" bitfld.long 0x14 31. "SEC31,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 30. "SEC30,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 29. "SEC29,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 28. "SEC28,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 27. "SEC27,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 26. "SEC26,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 25. "SEC25,Security enable on event input x" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "SEC24,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 23. "SEC23,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 22. "SEC22,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 21. "SEC21,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 19. "SEC19,Security enable on event input x" "0,1" bitfld.long 0x14 18. "SEC18,Security enable on event input x" "0,1" bitfld.long 0x14 17. "SEC17,Security enable on event input x" "0,1" newline bitfld.long 0x14 16. "SEC16,Security enable on event input x" "0,1" bitfld.long 0x14 15. "SEC15,Security enable on event input x" "0,1" bitfld.long 0x14 14. "SEC14,Security enable on event input x" "0,1" bitfld.long 0x14 13. "SEC13,Security enable on event input x" "0,1" bitfld.long 0x14 12. "SEC12,Security enable on event input x" "0,1" bitfld.long 0x14 11. "SEC11,Security enable on event input x" "0,1" bitfld.long 0x14 10. "SEC10,Security enable on event input x" "0,1" newline bitfld.long 0x14 9. "SEC9,Security enable on event input x" "0,1" bitfld.long 0x14 8. "SEC8,Security enable on event input x" "0,1" bitfld.long 0x14 7. "SEC7,Security enable on event input x" "0,1" bitfld.long 0x14 6. "SEC6,Security enable on event input x" "0,1" bitfld.long 0x14 5. "SEC5,Security enable on event input x" "0,1" bitfld.long 0x14 4. "SEC4,Security enable on event input x" "0,1" bitfld.long 0x14 3. "SEC3,Security enable on event input x" "0,1" newline bitfld.long 0x14 2. "SEC2,Security enable on event input x" "0,1" bitfld.long 0x14 1. "SEC1,Security enable on event input x" "0,1" bitfld.long 0x14 0. "SEC0,Security enable on event input x" "0,1" line.long 0x18 "EXTI1_PRIVCFGR1,EXTI1 privilege configuration register" bitfld.long 0x18 31. "PRIV31,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 30. "PRIV30,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 29. "PRIV29,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 28. "PRIV28,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 27. "PRIV27,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 26. "PRIV26,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 25. "PRIV25,Privilege enable on event input x" "B_0x0,B_0x1" newline bitfld.long 0x18 24. "PRIV24,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 23. "PRIV23,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 22. "PRIV22,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 21. "PRIV21,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 19. "PRIV19,Privilege enable on event input x" "0,1" bitfld.long 0x18 18. "PRIV18,Privilege enable on event input x" "0,1" bitfld.long 0x18 17. "PRIV17,Privilege enable on event input x" "0,1" newline bitfld.long 0x18 16. "PRIV16,Privilege enable on event input x" "0,1" bitfld.long 0x18 15. "PRIV15,Privilege enable on event input x" "0,1" bitfld.long 0x18 14. "PRIV14,Privilege enable on event input x" "0,1" bitfld.long 0x18 13. "PRIV13,Privilege enable on event input x" "0,1" bitfld.long 0x18 12. "PRIV12,Privilege enable on event input x" "0,1" bitfld.long 0x18 11. "PRIV11,Privilege enable on event input x" "0,1" bitfld.long 0x18 10. "PRIV10,Privilege enable on event input x" "0,1" newline bitfld.long 0x18 9. "PRIV9,Privilege enable on event input x" "0,1" bitfld.long 0x18 8. "PRIV8,Privilege enable on event input x" "0,1" bitfld.long 0x18 7. "PRIV7,Privilege enable on event input x" "0,1" bitfld.long 0x18 6. "PRIV6,Privilege enable on event input x" "0,1" bitfld.long 0x18 5. "PRIV5,Privilege enable on event input x" "0,1" bitfld.long 0x18 4. "PRIV4,Privilege enable on event input x" "0,1" bitfld.long 0x18 3. "PRIV3,Privilege enable on event input x" "0,1" newline bitfld.long 0x18 2. "PRIV2,Privilege enable on event input x" "0,1" bitfld.long 0x18 1. "PRIV1,Privilege enable on event input x" "0,1" bitfld.long 0x18 0. "PRIV0,Privilege enable on event input x" "0,1" group.long 0x20++0x1B line.long 0x0 "EXTI1_RTSR2,EXTI1 rising trigger selection register" bitfld.long 0x0 13. "RT45,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 12. "RT44,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 11. "RT43,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" line.long 0x4 "EXTI1_FTSR2,EXTI1 falling trigger selection register" bitfld.long 0x4 13. "FT45,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 12. "FT44,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 11. "FT43,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" line.long 0x8 "EXTI1_SWIER2,EXTI1 software interrupt event register" bitfld.long 0x8 13. "SWI45,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 12. "SWI44,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 11. "SWI43,Software interrupt on event x" "B_0x0,B_0x1" line.long 0xC "EXTI1_RPR2,EXTI1 rising edge pending register" bitfld.long 0xC 13. "RPIF45,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 12. "RPIF44,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 11. "RPIF43,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" line.long 0x10 "EXTI1_FPR2,EXTI1 falling edge pending register" bitfld.long 0x10 13. "FPIF45,Configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 12. "FPIF44,Configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 11. "FPIF43,Configurable event input x falling edge pending bit" "B_0x0,B_0x1" line.long 0x14 "EXTI1_SECCFGR2,EXTI1 security enable register" bitfld.long 0x14 30. "SEC62,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 29. "SEC61,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 28. "SEC60,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 27. "SEC59,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 25. "SEC57,Security enable on event input x" "0,1" bitfld.long 0x14 24. "SEC56,Security enable on event input x" "0,1" bitfld.long 0x14 23. "SEC55,Security enable on event input x" "0,1" newline bitfld.long 0x14 22. "SEC54,Security enable on event input x" "0,1" bitfld.long 0x14 21. "SEC53,Security enable on event input x" "0,1" bitfld.long 0x14 20. "SEC52,Security enable on event input x" "0,1" bitfld.long 0x14 18. "SEC50,Security enable on event input x" "0,1" bitfld.long 0x14 17. "SEC49,Security enable on event input x" "0,1" bitfld.long 0x14 16. "SEC48,Security enable on event input x" "0,1" bitfld.long 0x14 15. "SEC47,Security enable on event input x" "0,1" newline bitfld.long 0x14 14. "SEC46,Security enable on event input x" "0,1" bitfld.long 0x14 13. "SEC45,Security enable on event input x" "0,1" bitfld.long 0x14 12. "SEC44,Security enable on event input x" "0,1" bitfld.long 0x14 11. "SEC43,Security enable on event input x" "0,1" bitfld.long 0x14 10. "SEC42,Security enable on event input x" "0,1" bitfld.long 0x14 9. "SEC41,Security enable on event input x" "0,1" bitfld.long 0x14 8. "SEC40,Security enable on event input x" "0,1" newline bitfld.long 0x14 7. "SEC39,Security enable on event input x" "0,1" bitfld.long 0x14 6. "SEC38,Security enable on event input x" "0,1" bitfld.long 0x14 5. "SEC37,Security enable on event input x" "0,1" bitfld.long 0x14 4. "SEC36,Security enable on event input x" "0,1" bitfld.long 0x14 2. "SEC34,Security enable on event input x" "0,1" bitfld.long 0x14 1. "SEC33,Security enable on event input x" "0,1" bitfld.long 0x14 0. "SEC32,Security enable on event input x" "0,1" line.long 0x18 "EXTI1_PRIVCFGR2,EXTI1 privilege enable register" bitfld.long 0x18 30. "PRIV62,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 29. "PRIV61,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 28. "PRIV60,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 27. "PRIV59,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 25. "PRIV57,Privilege enable on event input x" "0,1" bitfld.long 0x18 24. "PRIV56,Privilege enable on event input x" "0,1" bitfld.long 0x18 23. "PRIV55,Privilege enable on event input x" "0,1" newline bitfld.long 0x18 22. "PRIV54,Privilege enable on event input x" "0,1" bitfld.long 0x18 21. "PRIV53,Privilege enable on event input x" "0,1" bitfld.long 0x18 20. "PRIV52,Privilege enable on event input x" "0,1" bitfld.long 0x18 18. "PRIV50,Privilege enable on event input x" "0,1" bitfld.long 0x18 17. "PRIV49,Privilege enable on event input x" "0,1" bitfld.long 0x18 16. "PRIV48,Privilege enable on event input x" "0,1" bitfld.long 0x18 15. "PRIV47,Privilege enable on event input x" "0,1" newline bitfld.long 0x18 14. "PRIV46,Privilege enable on event input x" "0,1" bitfld.long 0x18 13. "PRIV45,Privilege enable on event input x" "0,1" bitfld.long 0x18 12. "PRIV44,Privilege enable on event input x" "0,1" bitfld.long 0x18 11. "PRIV43,Privilege enable on event input x" "0,1" bitfld.long 0x18 10. "PRIV42,Privilege enable on event input x" "0,1" bitfld.long 0x18 9. "PRIV41,Privilege enable on event input x" "0,1" bitfld.long 0x18 8. "PRIV40,Privilege enable on event input x" "0,1" newline bitfld.long 0x18 7. "PRIV39,Privilege enable on event input x" "0,1" bitfld.long 0x18 6. "PRIV38,Privilege enable on event input x" "0,1" bitfld.long 0x18 5. "PRIV37,Privilege enable on event input x" "0,1" bitfld.long 0x18 4. "PRIV36,Privilege enable on event input x" "0,1" bitfld.long 0x18 2. "PRIV34,Privilege enable on event input x" "0,1" bitfld.long 0x18 1. "PRIV33,Privilege enable on event input x" "0,1" bitfld.long 0x18 0. "PRIV32,Privilege enable on event input x" "0,1" group.long 0x40++0x1B line.long 0x0 "EXTI1_RTSR3,EXTI1 rising trigger selection register" bitfld.long 0x0 20. "RT84,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 19. "RT83,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 9. "RT73,Rising trigger event configuration bit of configurable event input 73" "0,1" bitfld.long 0x0 3. "RT67,Rising trigger event configuration bit of configurable event input 67" "0,1" bitfld.long 0x0 1. "RT65,Rising trigger event configuration bit of configurable event input x" "0,1" bitfld.long 0x0 0. "RT64,Rising trigger event configuration bit of configurable event input x" "0,1" line.long 0x4 "EXTI1_FTSR3,EXTI1 falling trigger selection register" bitfld.long 0x4 20. "FT84,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 19. "FT83,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 9. "FT73,Falling trigger event configuration bit of configurable event input 73" "0,1" bitfld.long 0x4 3. "FT67,Falling trigger event configuration bit of configurable event input 67" "0,1" bitfld.long 0x4 1. "FT65,Falling trigger event configuration bit of configurable event input x" "0,1" bitfld.long 0x4 0. "FT64,Falling trigger event configuration bit of configurable event input x" "0,1" line.long 0x8 "EXTI1_SWIER3,EXTI1 software interrupt event register" bitfld.long 0x8 20. "SWI84,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 19. "SWI83,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 9. "SWI73,Software interrupt on event 73" "0,1" bitfld.long 0x8 3. "SWI67,Software interrupt on event 67." "0,1" bitfld.long 0x8 1. "SWI65,Software interrupt on event x" "0,1" bitfld.long 0x8 0. "SWI64,Software interrupt on event x" "0,1" line.long 0xC "EXTI1_RPR3,EXTI1 rising edge pending register" bitfld.long 0xC 20. "RPIF84,configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 19. "RPIF83,configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 9. "RPIF73,configurable event input 73 rising edge pending bit" "0,1" bitfld.long 0xC 3. "RPIF67,configurable event input 67 rising edge pending bit" "0,1" bitfld.long 0xC 1. "RPIF65,configurable event input x rising edge pending bit" "0,1" bitfld.long 0xC 0. "RPIF64,configurable event input x rising edge pending bit" "0,1" line.long 0x10 "EXTI1_FPR3,EXTI1 falling edge pending register" bitfld.long 0x10 20. "FPIF84,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 19. "FPIF83,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 9. "FPIF73,configurable event input 73 falling edge pending bit" "0,1" bitfld.long 0x10 3. "FPIF67,configurable 67 falling edge pending bit" "0,1" bitfld.long 0x10 1. "FPIF65,configurable event input x falling edge pending bit" "0,1" bitfld.long 0x10 0. "FPIF64,configurable event input x falling edge pending bit" "0,1" line.long 0x14 "EXTI1_SECCFGR3,EXTI1 security enable register" bitfld.long 0x14 20. "SEC84,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 19. "SEC83,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 18. "SEC82,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 17. "SEC81,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 16. "SEC80,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 15. "SEC79,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 14. "SEC78,Security enable on event input x" "B_0x0,B_0x1" newline bitfld.long 0x14 13. "SEC77,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 12. "SEC76,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 11. "SEC75,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 10. "SEC74,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 9. "SEC73,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 8. "SEC72,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC70,Security enable on event input 70" "0,1" newline bitfld.long 0x14 4. "SEC68,Security enable on event input x" "0,1" bitfld.long 0x14 3. "SEC67,Security enable on event input x" "0,1" bitfld.long 0x14 1. "SEC65,Security enable on event input x" "0,1" bitfld.long 0x14 0. "SEC64,Security enable on event input x" "0,1" line.long 0x18 "EXTI1_PRIVCFGR3,EXTI1 privilege enable register" bitfld.long 0x18 20. "PRIV84,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 19. "PRIV83,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 18. "PRIV82,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 17. "PRIV81,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 16. "PRIV80,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 15. "PRIV79,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 14. "PRIV78,Privilege enable on event input x" "B_0x0,B_0x1" newline bitfld.long 0x18 13. "PRIV77,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 12. "PRIV76,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 11. "PRIV75,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 10. "PRIV74,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 9. "PRIV73,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 8. "PRIV72,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV70,Privilege enable on event input 70" "0,1" newline bitfld.long 0x18 4. "PRIV68,Privilege enable on event input x" "0,1" bitfld.long 0x18 3. "PRIV67,Privilege enable on event input x" "0,1" bitfld.long 0x18 1. "PRIV65,Privilege enable on event input x" "0,1" bitfld.long 0x18 0. "PRIV64,Privilege enable on event input x" "0,1" group.long 0x60++0x13 line.long 0x0 "EXTI1_EXTICR1,EXTI1 external interrupt selection register 1" hexmask.long.byte 0x0 24.--31. 1. "EXTI3,EXTI3 GPIO port selection" hexmask.long.byte 0x0 16.--23. 1. "EXTI2,EXTI2 GPIO port selection" hexmask.long.byte 0x0 8.--15. 1. "EXTI1,EXTI1 GPIO port selection" hexmask.long.byte 0x0 0.--7. 1. "EXTI0,EXTI0 GPIO port selection." line.long 0x4 "EXTI1_EXTICR2,EXTI1 external interrupt selection register 2" hexmask.long.byte 0x4 24.--31. 1. "EXTI7,EXTI7 GPIO port selection." hexmask.long.byte 0x4 16.--23. 1. "EXTI6,EXTI6 GPIO port selection." hexmask.long.byte 0x4 8.--15. 1. "EXTI5,EXTI5 GPIO port selection." hexmask.long.byte 0x4 0.--7. 1. "EXTI4,EXTI4 GPIO port selection." line.long 0x8 "EXTI1_EXTICR3,EXTI1 external interrupt selection register 3" hexmask.long.byte 0x8 24.--31. 1. "EXTI11,EXTI11 GPIO port selection." hexmask.long.byte 0x8 16.--23. 1. "EXTI10,EXTI10 GPIO port selection." hexmask.long.byte 0x8 8.--15. 1. "EXTI9,EXTI9 GPIO port selection." hexmask.long.byte 0x8 0.--7. 1. "EXTI8,EXTI8 GPIO port selection." line.long 0xC "EXTI1_EXTICR4,EXTI1 external interrupt selection register 4" hexmask.long.byte 0xC 24.--31. 1. "EXTI15,EXTI15 GPIO port selection." hexmask.long.byte 0xC 16.--23. 1. "EXTI14,EXTI14 GPIO port selection." hexmask.long.byte 0xC 8.--15. 1. "EXTI13,EXTI13 GPIO port selection." hexmask.long.byte 0xC 0.--7. 1. "EXTI12,EXTI12 GPIO port selection." line.long 0x10 "EXTI1_LOCKR,EXTI1 lock register" bitfld.long 0x10 0. "GLOCK,Global security privilege and CID configuration registers EXTI1_SECCFGRx EXTI1_PRIVCFGRx EXTI1_EnCIDCFGR and EXTI1_CmCIDCFGR lock." "B_0x0,B_0x1" group.long 0xC4++0x3 line.long 0x0 "EXTI1_C2EMR1,EXTI1 CPU2 wake-up with event mask register" bitfld.long 0x0 15. "EM15,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 14. "EM14,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 13. "EM13,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 12. "EM12,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 11. "EM11,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 10. "EM10,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 9. "EM9,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "EM8,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 7. "EM7,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 6. "EM6,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 5. "EM5,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 4. "EM4,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 3. "EM3,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 2. "EM2,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "EM1,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 0. "EM0,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" group.long 0xE4++0x3 line.long 0x0 "EXTI1_C2EMR3,EXTI1 CPU2 wake-up with event mask register" bitfld.long 0x0 1. "EM65,CPU2 wake-up with event mask on event input 65" "B_0x0,B_0x1" group.long 0x180++0x153 line.long 0x0 "EXTI1_E0CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x0 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "EXTI1_E1CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x4 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x8 "EXTI1_E2CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x8 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xC "EXTI1_E3CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xC 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x10 "EXTI1_E4CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x10 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "EXTI1_E5CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x14 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x18 "EXTI1_E6CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x18 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "EXTI1_E7CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x1C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x20 "EXTI1_E8CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x20 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "EXTI1_E9CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x24 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x28 "EXTI1_E10CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x28 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x28 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "EXTI1_E11CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x2C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x30 "EXTI1_E12CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x30 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x30 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "EXTI1_E13CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x34 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x34 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x38 "EXTI1_E14CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x38 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x38 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "EXTI1_E15CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x3C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x40 "EXTI1_E16CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x40 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x40 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "EXTI1_E17CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x44 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x44 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x48 "EXTI1_E18CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x48 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x48 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "EXTI1_E19CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x4C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x50 "EXTI1_E20CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x50 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x50 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "EXTI1_E21CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x54 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x54 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x58 "EXTI1_E22CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x58 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x58 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "EXTI1_E23CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x5C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x60 "EXTI1_E24CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x60 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x60 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "EXTI1_E25CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x64 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x64 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x68 "EXTI1_E26CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x68 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x68 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "EXTI1_E27CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x6C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x70 "EXTI1_E28CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x70 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x70 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "EXTI1_E29CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x74 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x74 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x78 "EXTI1_E30CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x78 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x78 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "EXTI1_E31CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x7C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x80 "EXTI1_E32CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x80 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x80 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "EXTI1_E33CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x84 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x84 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x88 "EXTI1_E34CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x88 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x88 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "EXTI1_E35CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x8C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x8C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x90 "EXTI1_E36CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x90 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x90 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x94 "EXTI1_E37CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x94 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x94 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x98 "EXTI1_E38CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x98 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x98 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x9C "EXTI1_E39CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x9C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x9C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xA0 "EXTI1_E40CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xA0 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xA0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xA4 "EXTI1_E41CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xA4 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xA4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xA8 "EXTI1_E42CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xA8 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xA8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xAC "EXTI1_E43CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xAC 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xAC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xB0 "EXTI1_E44CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xB0 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xB0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xB4 "EXTI1_E45CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xB4 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xB4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xB8 "EXTI1_E46CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xB8 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xB8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xBC "EXTI1_E47CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xBC 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xBC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xC0 "EXTI1_E48CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xC0 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xC0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xC4 "EXTI1_E49CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xC4 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xC4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xC8 "EXTI1_E50CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xC8 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xC8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xCC "EXTI1_E51CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xCC 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xCC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xD0 "EXTI1_E52CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xD0 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xD0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xD4 "EXTI1_E53CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xD4 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xD4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xD8 "EXTI1_E54CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xD8 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xD8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xDC "EXTI1_E55CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xDC 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xDC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xE0 "EXTI1_E56CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xE0 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xE0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xE4 "EXTI1_E57CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xE4 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xE4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xE8 "EXTI1_E58CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xE8 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xE8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xEC "EXTI1_E59CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xEC 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xEC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xF0 "EXTI1_E60CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xF0 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xF0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xF4 "EXTI1_E61CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xF4 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xF4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xF8 "EXTI1_E62CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xF8 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xF8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xFC "EXTI1_E63CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xFC 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xFC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x100 "EXTI1_E64CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x100 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x100 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x104 "EXTI1_E65CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x104 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x104 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x108 "EXTI1_E66CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x108 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x108 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x10C "EXTI1_E67CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x10C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x10C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x110 "EXTI1_E68CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x110 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x110 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x114 "EXTI1_E69CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x114 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x114 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x118 "EXTI1_E70CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x118 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x118 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x11C "EXTI1_E71CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x11C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x11C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x120 "EXTI1_E72CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x120 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x120 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x124 "EXTI1_E73CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x124 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x124 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x128 "EXTI1_E74CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x128 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x128 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x12C "EXTI1_E75CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x12C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x12C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x130 "EXTI1_E76CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x130 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x130 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x134 "EXTI1_E77CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x134 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x134 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x138 "EXTI1_E78CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x138 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x138 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x13C "EXTI1_E79CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x13C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x13C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x140 "EXTI1_E80CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x140 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x140 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x144 "EXTI1_E81CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x144 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x144 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x148 "EXTI1_E82CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x148 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x148 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x14C "EXTI1_E83CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x14C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x14C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x150 "EXTI1_E84CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x150 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x150 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" group.long 0x300++0x7 line.long 0x0 "EXTI1_C1CIDCFGR,EXTI1 processor 1 CID configuration register" bitfld.long 0x0 4.--6. "CID,CPUm CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "CFEN,CID filtering enabled for CPUm EXTI1_CmIMRx and EXTI1_CmEMRx registers" "B_0x0,B_0x1" line.long 0x4 "EXTI1_C2CIDCFGR,EXTI1 processor 2 CID configuration register" bitfld.long 0x4 4.--6. "CID,CPUm CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "CFEN,CID filtering enabled for CPUm EXTI1_CmIMRx and EXTI1_CmEMRx registers" "B_0x0,B_0x1" rgroup.long 0x3C0++0xB line.long 0x0 "EXTI1_HWCFGR13,EXTI1 hardware configuration registers 13" hexmask.long 0x0 0.--31. 1. "SEC,Hardware configuration event security privilege and resource isolation capability" line.long 0x4 "EXTI1_HWCFGR12,EXTI1 hardware configuration registers 12" hexmask.long 0x4 0.--31. 1. "SEC,Hardware configuration event security privilege and resource isolation capability" line.long 0x8 "EXTI1_HWCFGR11,EXTI1 hardware configuration registers 11" hexmask.long 0x8 0.--31. 1. "SEC,Hardware configuration event security privilege and resource isolation capability" rgroup.long 0x3D8++0x27 line.long 0x0 "EXTI1_HWCFGR7,EXTI1 hardware configuration registers 7" hexmask.long 0x0 0.--31. 1. "CPUEVENT,Hardware configuration CPU event generation" line.long 0x4 "EXTI1_HWCFGR6,EXTI1 hardware configuration registers 6" hexmask.long 0x4 0.--31. 1. "CPUEVENT,Hardware configuration CPU event generation" line.long 0x8 "EXTI1_HWCFGR5,EXTI1 hardware configuration registers 5" hexmask.long 0x8 0.--31. 1. "CPUEVENT,Hardware configuration CPU event generation" line.long 0xC "EXTI1_HWCFGR4,EXTI1 hardware configuration registers 4" hexmask.long 0xC 0.--31. 1. "EVENT_TRG,Hardware configuration event trigger type" line.long 0x10 "EXTI1_HWCFGR3,EXTI1 hardware configuration registers 3" hexmask.long 0x10 0.--31. 1. "EVENT_TRG,Hardware configuration event trigger type" line.long 0x14 "EXTI1_HWCFGR2,EXTI1 hardware configuration registers 2" hexmask.long 0x14 0.--31. 1. "EVENT_TRG,Hardware configuration event trigger type" line.long 0x18 "EXTI1_HWCFGR1,EXTI1 hardware configuration register 1" hexmask.long.byte 0x18 24.--27. 1. "CIDWIDTH,CID parameters bit width" hexmask.long.byte 0x18 16.--23. 1. "NBIOPORT,Hardware configuration of number of I/O ports on EXTI (n+1)" hexmask.long.byte 0x18 12.--15. 1. "CPUEVTEN,Hardware configuration of CPU(m) event output enable." hexmask.long.byte 0x18 8.--11. 1. "NBCPUS,Hardware configuration number of CPUs (n+1)" hexmask.long.byte 0x18 0.--7. 1. "NBEVENTS,Hardware configuration number of event (n+1)" line.long 0x1C "EXTI1_VERR,EXTI1 version register" hexmask.long.byte 0x1C 4.--7. 1. "MAJREV,Major revision number" hexmask.long.byte 0x1C 0.--3. 1. "MINREV,Minor revision number" line.long 0x20 "EXTI1_IPIDR,EXTI1 identification register" hexmask.long 0x20 0.--31. 1. "IPID,EXTI1 identification" line.long 0x24 "EXTI1_SIDR,EXTI1 size identification register" hexmask.long 0x24 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "EXTI1_S" base ad:0x54220000 group.long 0x0++0x1B line.long 0x0 "EXTI1_RTSR1,EXTI1 rising trigger selection register" bitfld.long 0x0 18. "RT18,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 17. "RT17,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 16. "RT16,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 15. "RT15,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 14. "RT14,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 13. "RT13,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 12. "RT12,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "RT11,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 10. "RT10,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 9. "RT9,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 8. "RT8,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 7. "RT7,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 6. "RT6,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 5. "RT5,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "RT4,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 3. "RT3,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 2. "RT2,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 1. "RT1,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 0. "RT0,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" line.long 0x4 "EXTI1_FTSR1,EXTI1 falling trigger selection register" bitfld.long 0x4 18. "FT18,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 17. "FT17,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 16. "FT16,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 15. "FT15,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 14. "FT14,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 13. "FT13,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 12. "FT12,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "FT11,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 10. "FT10,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 9. "FT9,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 8. "FT8,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 7. "FT7,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 6. "FT6,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 5. "FT5,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "FT4,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 3. "FT3,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 2. "FT2,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 1. "FT1,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 0. "FT0,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" line.long 0x8 "EXTI1_SWIER1,EXTI1 software interrupt event register" bitfld.long 0x8 18. "SWI18,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SWI17,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SWI16,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 15. "SWI15,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 14. "SWI14,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 13. "SWI13,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 12. "SWI12,Software interrupt on event x" "B_0x0,B_0x1" newline bitfld.long 0x8 11. "SWI11,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 10. "SWI10,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 9. "SWI9,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 8. "SWI8,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 7. "SWI7,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 6. "SWI6,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 5. "SWI5,Software interrupt on event x" "B_0x0,B_0x1" newline bitfld.long 0x8 4. "SWI4,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 3. "SWI3,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 2. "SWI2,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 1. "SWI1,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 0. "SWI0,Software interrupt on event x" "B_0x0,B_0x1" line.long 0xC "EXTI1_RPR1,EXTI1 rising edge pending register" bitfld.long 0xC 18. "RPIF18,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 17. "RPIF17,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 16. "RPIF16,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 15. "RPIF15,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 14. "RPIF14,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 13. "RPIF13,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 12. "RPIF12,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" newline bitfld.long 0xC 11. "RPIF11,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 10. "RPIF10,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 9. "RPIF9,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 8. "RPIF8,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 7. "RPIF7,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 6. "RPIF6,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 5. "RPIF5,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" newline bitfld.long 0xC 4. "RPIF4,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 3. "RPIF3,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 2. "RPIF2,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 1. "RPIF1,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 0. "RPIF0,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" line.long 0x10 "EXTI1_FPR1,EXTI1 falling edge pending register" bitfld.long 0x10 18. "FPIF18,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 17. "FPIF17,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 16. "FPIF16,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 15. "FPIF15,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 14. "FPIF14,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 13. "FPIF13,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 12. "FPIF12,configurable event input x falling edge pending bit" "B_0x0,B_0x1" newline bitfld.long 0x10 11. "FPIF11,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 10. "FPIF10,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 9. "FPIF9,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 8. "FPIF8,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 7. "FPIF7,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 6. "FPIF6,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 5. "FPIF5,configurable event input x falling edge pending bit" "B_0x0,B_0x1" newline bitfld.long 0x10 4. "FPIF4,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 3. "FPIF3,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 2. "FPIF2,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 1. "FPIF1,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 0. "FPIF0,configurable event input x falling edge pending bit" "B_0x0,B_0x1" line.long 0x14 "EXTI1_SECCFGR1,EXTI1 security configuration register" bitfld.long 0x14 31. "SEC31,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 30. "SEC30,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 29. "SEC29,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 28. "SEC28,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 27. "SEC27,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 26. "SEC26,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 25. "SEC25,Security enable on event input x" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "SEC24,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 23. "SEC23,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 22. "SEC22,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 21. "SEC21,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 19. "SEC19,Security enable on event input x" "0,1" bitfld.long 0x14 18. "SEC18,Security enable on event input x" "0,1" bitfld.long 0x14 17. "SEC17,Security enable on event input x" "0,1" newline bitfld.long 0x14 16. "SEC16,Security enable on event input x" "0,1" bitfld.long 0x14 15. "SEC15,Security enable on event input x" "0,1" bitfld.long 0x14 14. "SEC14,Security enable on event input x" "0,1" bitfld.long 0x14 13. "SEC13,Security enable on event input x" "0,1" bitfld.long 0x14 12. "SEC12,Security enable on event input x" "0,1" bitfld.long 0x14 11. "SEC11,Security enable on event input x" "0,1" bitfld.long 0x14 10. "SEC10,Security enable on event input x" "0,1" newline bitfld.long 0x14 9. "SEC9,Security enable on event input x" "0,1" bitfld.long 0x14 8. "SEC8,Security enable on event input x" "0,1" bitfld.long 0x14 7. "SEC7,Security enable on event input x" "0,1" bitfld.long 0x14 6. "SEC6,Security enable on event input x" "0,1" bitfld.long 0x14 5. "SEC5,Security enable on event input x" "0,1" bitfld.long 0x14 4. "SEC4,Security enable on event input x" "0,1" bitfld.long 0x14 3. "SEC3,Security enable on event input x" "0,1" newline bitfld.long 0x14 2. "SEC2,Security enable on event input x" "0,1" bitfld.long 0x14 1. "SEC1,Security enable on event input x" "0,1" bitfld.long 0x14 0. "SEC0,Security enable on event input x" "0,1" line.long 0x18 "EXTI1_PRIVCFGR1,EXTI1 privilege configuration register" bitfld.long 0x18 31. "PRIV31,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 30. "PRIV30,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 29. "PRIV29,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 28. "PRIV28,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 27. "PRIV27,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 26. "PRIV26,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 25. "PRIV25,Privilege enable on event input x" "B_0x0,B_0x1" newline bitfld.long 0x18 24. "PRIV24,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 23. "PRIV23,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 22. "PRIV22,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 21. "PRIV21,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 19. "PRIV19,Privilege enable on event input x" "0,1" bitfld.long 0x18 18. "PRIV18,Privilege enable on event input x" "0,1" bitfld.long 0x18 17. "PRIV17,Privilege enable on event input x" "0,1" newline bitfld.long 0x18 16. "PRIV16,Privilege enable on event input x" "0,1" bitfld.long 0x18 15. "PRIV15,Privilege enable on event input x" "0,1" bitfld.long 0x18 14. "PRIV14,Privilege enable on event input x" "0,1" bitfld.long 0x18 13. "PRIV13,Privilege enable on event input x" "0,1" bitfld.long 0x18 12. "PRIV12,Privilege enable on event input x" "0,1" bitfld.long 0x18 11. "PRIV11,Privilege enable on event input x" "0,1" bitfld.long 0x18 10. "PRIV10,Privilege enable on event input x" "0,1" newline bitfld.long 0x18 9. "PRIV9,Privilege enable on event input x" "0,1" bitfld.long 0x18 8. "PRIV8,Privilege enable on event input x" "0,1" bitfld.long 0x18 7. "PRIV7,Privilege enable on event input x" "0,1" bitfld.long 0x18 6. "PRIV6,Privilege enable on event input x" "0,1" bitfld.long 0x18 5. "PRIV5,Privilege enable on event input x" "0,1" bitfld.long 0x18 4. "PRIV4,Privilege enable on event input x" "0,1" bitfld.long 0x18 3. "PRIV3,Privilege enable on event input x" "0,1" newline bitfld.long 0x18 2. "PRIV2,Privilege enable on event input x" "0,1" bitfld.long 0x18 1. "PRIV1,Privilege enable on event input x" "0,1" bitfld.long 0x18 0. "PRIV0,Privilege enable on event input x" "0,1" group.long 0x20++0x1B line.long 0x0 "EXTI1_RTSR2,EXTI1 rising trigger selection register" bitfld.long 0x0 13. "RT45,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 12. "RT44,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 11. "RT43,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" line.long 0x4 "EXTI1_FTSR2,EXTI1 falling trigger selection register" bitfld.long 0x4 13. "FT45,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 12. "FT44,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 11. "FT43,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" line.long 0x8 "EXTI1_SWIER2,EXTI1 software interrupt event register" bitfld.long 0x8 13. "SWI45,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 12. "SWI44,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 11. "SWI43,Software interrupt on event x" "B_0x0,B_0x1" line.long 0xC "EXTI1_RPR2,EXTI1 rising edge pending register" bitfld.long 0xC 13. "RPIF45,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 12. "RPIF44,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 11. "RPIF43,Configurable event input x rising edge pending bit" "B_0x0,B_0x1" line.long 0x10 "EXTI1_FPR2,EXTI1 falling edge pending register" bitfld.long 0x10 13. "FPIF45,Configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 12. "FPIF44,Configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 11. "FPIF43,Configurable event input x falling edge pending bit" "B_0x0,B_0x1" line.long 0x14 "EXTI1_SECCFGR2,EXTI1 security enable register" bitfld.long 0x14 30. "SEC62,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 29. "SEC61,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 28. "SEC60,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 27. "SEC59,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 25. "SEC57,Security enable on event input x" "0,1" bitfld.long 0x14 24. "SEC56,Security enable on event input x" "0,1" bitfld.long 0x14 23. "SEC55,Security enable on event input x" "0,1" newline bitfld.long 0x14 22. "SEC54,Security enable on event input x" "0,1" bitfld.long 0x14 21. "SEC53,Security enable on event input x" "0,1" bitfld.long 0x14 20. "SEC52,Security enable on event input x" "0,1" bitfld.long 0x14 18. "SEC50,Security enable on event input x" "0,1" bitfld.long 0x14 17. "SEC49,Security enable on event input x" "0,1" bitfld.long 0x14 16. "SEC48,Security enable on event input x" "0,1" bitfld.long 0x14 15. "SEC47,Security enable on event input x" "0,1" newline bitfld.long 0x14 14. "SEC46,Security enable on event input x" "0,1" bitfld.long 0x14 13. "SEC45,Security enable on event input x" "0,1" bitfld.long 0x14 12. "SEC44,Security enable on event input x" "0,1" bitfld.long 0x14 11. "SEC43,Security enable on event input x" "0,1" bitfld.long 0x14 10. "SEC42,Security enable on event input x" "0,1" bitfld.long 0x14 9. "SEC41,Security enable on event input x" "0,1" bitfld.long 0x14 8. "SEC40,Security enable on event input x" "0,1" newline bitfld.long 0x14 7. "SEC39,Security enable on event input x" "0,1" bitfld.long 0x14 6. "SEC38,Security enable on event input x" "0,1" bitfld.long 0x14 5. "SEC37,Security enable on event input x" "0,1" bitfld.long 0x14 4. "SEC36,Security enable on event input x" "0,1" bitfld.long 0x14 2. "SEC34,Security enable on event input x" "0,1" bitfld.long 0x14 1. "SEC33,Security enable on event input x" "0,1" bitfld.long 0x14 0. "SEC32,Security enable on event input x" "0,1" line.long 0x18 "EXTI1_PRIVCFGR2,EXTI1 privilege enable register" bitfld.long 0x18 30. "PRIV62,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 29. "PRIV61,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 28. "PRIV60,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 27. "PRIV59,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 25. "PRIV57,Privilege enable on event input x" "0,1" bitfld.long 0x18 24. "PRIV56,Privilege enable on event input x" "0,1" bitfld.long 0x18 23. "PRIV55,Privilege enable on event input x" "0,1" newline bitfld.long 0x18 22. "PRIV54,Privilege enable on event input x" "0,1" bitfld.long 0x18 21. "PRIV53,Privilege enable on event input x" "0,1" bitfld.long 0x18 20. "PRIV52,Privilege enable on event input x" "0,1" bitfld.long 0x18 18. "PRIV50,Privilege enable on event input x" "0,1" bitfld.long 0x18 17. "PRIV49,Privilege enable on event input x" "0,1" bitfld.long 0x18 16. "PRIV48,Privilege enable on event input x" "0,1" bitfld.long 0x18 15. "PRIV47,Privilege enable on event input x" "0,1" newline bitfld.long 0x18 14. "PRIV46,Privilege enable on event input x" "0,1" bitfld.long 0x18 13. "PRIV45,Privilege enable on event input x" "0,1" bitfld.long 0x18 12. "PRIV44,Privilege enable on event input x" "0,1" bitfld.long 0x18 11. "PRIV43,Privilege enable on event input x" "0,1" bitfld.long 0x18 10. "PRIV42,Privilege enable on event input x" "0,1" bitfld.long 0x18 9. "PRIV41,Privilege enable on event input x" "0,1" bitfld.long 0x18 8. "PRIV40,Privilege enable on event input x" "0,1" newline bitfld.long 0x18 7. "PRIV39,Privilege enable on event input x" "0,1" bitfld.long 0x18 6. "PRIV38,Privilege enable on event input x" "0,1" bitfld.long 0x18 5. "PRIV37,Privilege enable on event input x" "0,1" bitfld.long 0x18 4. "PRIV36,Privilege enable on event input x" "0,1" bitfld.long 0x18 2. "PRIV34,Privilege enable on event input x" "0,1" bitfld.long 0x18 1. "PRIV33,Privilege enable on event input x" "0,1" bitfld.long 0x18 0. "PRIV32,Privilege enable on event input x" "0,1" group.long 0x40++0x1B line.long 0x0 "EXTI1_RTSR3,EXTI1 rising trigger selection register" bitfld.long 0x0 20. "RT84,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 19. "RT83,Rising trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x0 9. "RT73,Rising trigger event configuration bit of configurable event input 73" "0,1" bitfld.long 0x0 3. "RT67,Rising trigger event configuration bit of configurable event input 67" "0,1" bitfld.long 0x0 1. "RT65,Rising trigger event configuration bit of configurable event input x" "0,1" bitfld.long 0x0 0. "RT64,Rising trigger event configuration bit of configurable event input x" "0,1" line.long 0x4 "EXTI1_FTSR3,EXTI1 falling trigger selection register" bitfld.long 0x4 20. "FT84,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 19. "FT83,Falling trigger event configuration bit of configurable event input x" "B_0x0,B_0x1" bitfld.long 0x4 9. "FT73,Falling trigger event configuration bit of configurable event input 73" "0,1" bitfld.long 0x4 3. "FT67,Falling trigger event configuration bit of configurable event input 67" "0,1" bitfld.long 0x4 1. "FT65,Falling trigger event configuration bit of configurable event input x" "0,1" bitfld.long 0x4 0. "FT64,Falling trigger event configuration bit of configurable event input x" "0,1" line.long 0x8 "EXTI1_SWIER3,EXTI1 software interrupt event register" bitfld.long 0x8 20. "SWI84,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 19. "SWI83,Software interrupt on event x" "B_0x0,B_0x1" bitfld.long 0x8 9. "SWI73,Software interrupt on event 73" "0,1" bitfld.long 0x8 3. "SWI67,Software interrupt on event 67." "0,1" bitfld.long 0x8 1. "SWI65,Software interrupt on event x" "0,1" bitfld.long 0x8 0. "SWI64,Software interrupt on event x" "0,1" line.long 0xC "EXTI1_RPR3,EXTI1 rising edge pending register" bitfld.long 0xC 20. "RPIF84,configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 19. "RPIF83,configurable event input x rising edge pending bit" "B_0x0,B_0x1" bitfld.long 0xC 9. "RPIF73,configurable event input 73 rising edge pending bit" "0,1" bitfld.long 0xC 3. "RPIF67,configurable event input 67 rising edge pending bit" "0,1" bitfld.long 0xC 1. "RPIF65,configurable event input x rising edge pending bit" "0,1" bitfld.long 0xC 0. "RPIF64,configurable event input x rising edge pending bit" "0,1" line.long 0x10 "EXTI1_FPR3,EXTI1 falling edge pending register" bitfld.long 0x10 20. "FPIF84,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 19. "FPIF83,configurable event input x falling edge pending bit" "B_0x0,B_0x1" bitfld.long 0x10 9. "FPIF73,configurable event input 73 falling edge pending bit" "0,1" bitfld.long 0x10 3. "FPIF67,configurable 67 falling edge pending bit" "0,1" bitfld.long 0x10 1. "FPIF65,configurable event input x falling edge pending bit" "0,1" bitfld.long 0x10 0. "FPIF64,configurable event input x falling edge pending bit" "0,1" line.long 0x14 "EXTI1_SECCFGR3,EXTI1 security enable register" bitfld.long 0x14 20. "SEC84,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 19. "SEC83,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 18. "SEC82,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 17. "SEC81,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 16. "SEC80,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 15. "SEC79,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 14. "SEC78,Security enable on event input x" "B_0x0,B_0x1" newline bitfld.long 0x14 13. "SEC77,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 12. "SEC76,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 11. "SEC75,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 10. "SEC74,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 9. "SEC73,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 8. "SEC72,Security enable on event input x" "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC70,Security enable on event input 70" "0,1" newline bitfld.long 0x14 4. "SEC68,Security enable on event input x" "0,1" bitfld.long 0x14 3. "SEC67,Security enable on event input x" "0,1" bitfld.long 0x14 1. "SEC65,Security enable on event input x" "0,1" bitfld.long 0x14 0. "SEC64,Security enable on event input x" "0,1" line.long 0x18 "EXTI1_PRIVCFGR3,EXTI1 privilege enable register" bitfld.long 0x18 20. "PRIV84,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 19. "PRIV83,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 18. "PRIV82,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 17. "PRIV81,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 16. "PRIV80,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 15. "PRIV79,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 14. "PRIV78,Privilege enable on event input x" "B_0x0,B_0x1" newline bitfld.long 0x18 13. "PRIV77,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 12. "PRIV76,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 11. "PRIV75,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 10. "PRIV74,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 9. "PRIV73,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 8. "PRIV72,Privilege enable on event input x" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV70,Privilege enable on event input 70" "0,1" newline bitfld.long 0x18 4. "PRIV68,Privilege enable on event input x" "0,1" bitfld.long 0x18 3. "PRIV67,Privilege enable on event input x" "0,1" bitfld.long 0x18 1. "PRIV65,Privilege enable on event input x" "0,1" bitfld.long 0x18 0. "PRIV64,Privilege enable on event input x" "0,1" group.long 0x60++0x13 line.long 0x0 "EXTI1_EXTICR1,EXTI1 external interrupt selection register 1" hexmask.long.byte 0x0 24.--31. 1. "EXTI3,EXTI3 GPIO port selection" hexmask.long.byte 0x0 16.--23. 1. "EXTI2,EXTI2 GPIO port selection" hexmask.long.byte 0x0 8.--15. 1. "EXTI1,EXTI1 GPIO port selection" hexmask.long.byte 0x0 0.--7. 1. "EXTI0,EXTI0 GPIO port selection." line.long 0x4 "EXTI1_EXTICR2,EXTI1 external interrupt selection register 2" hexmask.long.byte 0x4 24.--31. 1. "EXTI7,EXTI7 GPIO port selection." hexmask.long.byte 0x4 16.--23. 1. "EXTI6,EXTI6 GPIO port selection." hexmask.long.byte 0x4 8.--15. 1. "EXTI5,EXTI5 GPIO port selection." hexmask.long.byte 0x4 0.--7. 1. "EXTI4,EXTI4 GPIO port selection." line.long 0x8 "EXTI1_EXTICR3,EXTI1 external interrupt selection register 3" hexmask.long.byte 0x8 24.--31. 1. "EXTI11,EXTI11 GPIO port selection." hexmask.long.byte 0x8 16.--23. 1. "EXTI10,EXTI10 GPIO port selection." hexmask.long.byte 0x8 8.--15. 1. "EXTI9,EXTI9 GPIO port selection." hexmask.long.byte 0x8 0.--7. 1. "EXTI8,EXTI8 GPIO port selection." line.long 0xC "EXTI1_EXTICR4,EXTI1 external interrupt selection register 4" hexmask.long.byte 0xC 24.--31. 1. "EXTI15,EXTI15 GPIO port selection." hexmask.long.byte 0xC 16.--23. 1. "EXTI14,EXTI14 GPIO port selection." hexmask.long.byte 0xC 8.--15. 1. "EXTI13,EXTI13 GPIO port selection." hexmask.long.byte 0xC 0.--7. 1. "EXTI12,EXTI12 GPIO port selection." line.long 0x10 "EXTI1_LOCKR,EXTI1 lock register" bitfld.long 0x10 0. "GLOCK,Global security privilege and CID configuration registers EXTI1_SECCFGRx EXTI1_PRIVCFGRx EXTI1_EnCIDCFGR and EXTI1_CmCIDCFGR lock." "B_0x0,B_0x1" group.long 0xC4++0x3 line.long 0x0 "EXTI1_C2EMR1,EXTI1 CPU2 wake-up with event mask register" bitfld.long 0x0 15. "EM15,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 14. "EM14,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 13. "EM13,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 12. "EM12,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 11. "EM11,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 10. "EM10,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 9. "EM9,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "EM8,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 7. "EM7,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 6. "EM6,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 5. "EM5,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 4. "EM4,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 3. "EM3,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 2. "EM2,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "EM1,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" bitfld.long 0x0 0. "EM0,CPU2 wake-up with event on event input x" "B_0x0,B_0x1" group.long 0xE4++0x3 line.long 0x0 "EXTI1_C2EMR3,EXTI1 CPU2 wake-up with event mask register" bitfld.long 0x0 1. "EM65,CPU2 wake-up with event mask on event input 65" "B_0x0,B_0x1" group.long 0x180++0x153 line.long 0x0 "EXTI1_E0CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x0 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "EXTI1_E1CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x4 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x8 "EXTI1_E2CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x8 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xC "EXTI1_E3CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xC 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x10 "EXTI1_E4CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x10 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "EXTI1_E5CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x14 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x18 "EXTI1_E6CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x18 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "EXTI1_E7CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x1C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x20 "EXTI1_E8CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x20 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "EXTI1_E9CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x24 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x28 "EXTI1_E10CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x28 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x28 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "EXTI1_E11CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x2C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x30 "EXTI1_E12CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x30 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x30 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "EXTI1_E13CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x34 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x34 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x38 "EXTI1_E14CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x38 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x38 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "EXTI1_E15CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x3C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x40 "EXTI1_E16CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x40 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x40 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "EXTI1_E17CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x44 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x44 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x48 "EXTI1_E18CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x48 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x48 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "EXTI1_E19CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x4C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x50 "EXTI1_E20CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x50 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x50 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "EXTI1_E21CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x54 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x54 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x58 "EXTI1_E22CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x58 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x58 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "EXTI1_E23CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x5C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x60 "EXTI1_E24CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x60 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x60 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "EXTI1_E25CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x64 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x64 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x68 "EXTI1_E26CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x68 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x68 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "EXTI1_E27CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x6C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x70 "EXTI1_E28CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x70 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x70 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "EXTI1_E29CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x74 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x74 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x78 "EXTI1_E30CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x78 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x78 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "EXTI1_E31CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x7C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x80 "EXTI1_E32CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x80 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x80 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "EXTI1_E33CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x84 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x84 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x88 "EXTI1_E34CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x88 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x88 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "EXTI1_E35CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x8C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x8C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x90 "EXTI1_E36CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x90 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x90 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x94 "EXTI1_E37CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x94 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x94 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x98 "EXTI1_E38CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x98 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x98 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x9C "EXTI1_E39CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x9C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x9C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xA0 "EXTI1_E40CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xA0 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xA0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xA4 "EXTI1_E41CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xA4 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xA4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xA8 "EXTI1_E42CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xA8 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xA8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xAC "EXTI1_E43CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xAC 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xAC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xB0 "EXTI1_E44CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xB0 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xB0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xB4 "EXTI1_E45CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xB4 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xB4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xB8 "EXTI1_E46CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xB8 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xB8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xBC "EXTI1_E47CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xBC 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xBC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xC0 "EXTI1_E48CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xC0 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xC0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xC4 "EXTI1_E49CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xC4 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xC4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xC8 "EXTI1_E50CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xC8 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xC8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xCC "EXTI1_E51CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xCC 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xCC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xD0 "EXTI1_E52CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xD0 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xD0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xD4 "EXTI1_E53CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xD4 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xD4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xD8 "EXTI1_E54CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xD8 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xD8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xDC "EXTI1_E55CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xDC 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xDC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xE0 "EXTI1_E56CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xE0 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xE0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xE4 "EXTI1_E57CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xE4 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xE4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xE8 "EXTI1_E58CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xE8 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xE8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xEC "EXTI1_E59CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xEC 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xEC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xF0 "EXTI1_E60CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xF0 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xF0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xF4 "EXTI1_E61CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xF4 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xF4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xF8 "EXTI1_E62CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xF8 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xF8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xFC "EXTI1_E63CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0xFC 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0xFC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x100 "EXTI1_E64CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x100 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x100 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x104 "EXTI1_E65CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x104 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x104 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x108 "EXTI1_E66CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x108 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x108 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x10C "EXTI1_E67CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x10C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x10C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x110 "EXTI1_E68CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x110 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x110 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x114 "EXTI1_E69CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x114 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x114 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x118 "EXTI1_E70CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x118 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x118 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x11C "EXTI1_E71CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x11C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x11C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x120 "EXTI1_E72CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x120 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x120 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x124 "EXTI1_E73CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x124 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x124 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x128 "EXTI1_E74CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x128 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x128 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x12C "EXTI1_E75CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x12C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x12C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x130 "EXTI1_E76CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x130 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x130 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x134 "EXTI1_E77CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x134 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x134 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x138 "EXTI1_E78CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x138 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x138 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x13C "EXTI1_E79CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x13C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x13C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x140 "EXTI1_E80CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x140 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x140 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x144 "EXTI1_E81CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x144 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x144 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x148 "EXTI1_E82CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x148 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x148 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x14C "EXTI1_E83CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x14C 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x14C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x150 "EXTI1_E84CIDCFGR,EXTI1 event CID configuration register" bitfld.long 0x150 4.--6. "CID,EXTI event n allowed CID value" "0,1,2,3,4,5,6,7" bitfld.long 0x150 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" group.long 0x300++0x7 line.long 0x0 "EXTI1_C1CIDCFGR,EXTI1 processor 1 CID configuration register" bitfld.long 0x0 4.--6. "CID,CPUm CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "CFEN,CID filtering enabled for CPUm EXTI1_CmIMRx and EXTI1_CmEMRx registers" "B_0x0,B_0x1" line.long 0x4 "EXTI1_C2CIDCFGR,EXTI1 processor 2 CID configuration register" bitfld.long 0x4 4.--6. "CID,CPUm CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "CFEN,CID filtering enabled for CPUm EXTI1_CmIMRx and EXTI1_CmEMRx registers" "B_0x0,B_0x1" rgroup.long 0x3C0++0xB line.long 0x0 "EXTI1_HWCFGR13,EXTI1 hardware configuration registers 13" hexmask.long 0x0 0.--31. 1. "SEC,Hardware configuration event security privilege and resource isolation capability" line.long 0x4 "EXTI1_HWCFGR12,EXTI1 hardware configuration registers 12" hexmask.long 0x4 0.--31. 1. "SEC,Hardware configuration event security privilege and resource isolation capability" line.long 0x8 "EXTI1_HWCFGR11,EXTI1 hardware configuration registers 11" hexmask.long 0x8 0.--31. 1. "SEC,Hardware configuration event security privilege and resource isolation capability" rgroup.long 0x3D8++0x27 line.long 0x0 "EXTI1_HWCFGR7,EXTI1 hardware configuration registers 7" hexmask.long 0x0 0.--31. 1. "CPUEVENT,Hardware configuration CPU event generation" line.long 0x4 "EXTI1_HWCFGR6,EXTI1 hardware configuration registers 6" hexmask.long 0x4 0.--31. 1. "CPUEVENT,Hardware configuration CPU event generation" line.long 0x8 "EXTI1_HWCFGR5,EXTI1 hardware configuration registers 5" hexmask.long 0x8 0.--31. 1. "CPUEVENT,Hardware configuration CPU event generation" line.long 0xC "EXTI1_HWCFGR4,EXTI1 hardware configuration registers 4" hexmask.long 0xC 0.--31. 1. "EVENT_TRG,Hardware configuration event trigger type" line.long 0x10 "EXTI1_HWCFGR3,EXTI1 hardware configuration registers 3" hexmask.long 0x10 0.--31. 1. "EVENT_TRG,Hardware configuration event trigger type" line.long 0x14 "EXTI1_HWCFGR2,EXTI1 hardware configuration registers 2" hexmask.long 0x14 0.--31. 1. "EVENT_TRG,Hardware configuration event trigger type" line.long 0x18 "EXTI1_HWCFGR1,EXTI1 hardware configuration register 1" hexmask.long.byte 0x18 24.--27. 1. "CIDWIDTH,CID parameters bit width" hexmask.long.byte 0x18 16.--23. 1. "NBIOPORT,Hardware configuration of number of I/O ports on EXTI (n+1)" hexmask.long.byte 0x18 12.--15. 1. "CPUEVTEN,Hardware configuration of CPU(m) event output enable." hexmask.long.byte 0x18 8.--11. 1. "NBCPUS,Hardware configuration number of CPUs (n+1)" hexmask.long.byte 0x18 0.--7. 1. "NBEVENTS,Hardware configuration number of event (n+1)" line.long 0x1C "EXTI1_VERR,EXTI1 version register" hexmask.long.byte 0x1C 4.--7. 1. "MAJREV,Major revision number" hexmask.long.byte 0x1C 0.--3. 1. "MINREV,Minor revision number" line.long 0x20 "EXTI1_IPIDR,EXTI1 identification register" hexmask.long 0x20 0.--31. 1. "IPID,EXTI1 identification" line.long 0x24 "EXTI1_SIDR,EXTI1 size identification register" hexmask.long 0x24 0.--31. 1. "SID,Size identification" tree.end endif tree "EXTI2" base ad:0x46230000 group.long 0x0++0x1B line.long 0x0 "EXTI2_RTSR1,EXTI2 rising trigger selection register" bitfld.long 0x0 15. "RT15,Rising trigger event configuration bit of configurable event input 15." "B_0x0,B_0x1" bitfld.long 0x0 14. "RT14,Rising trigger event configuration bit of configurable event input 14." "0,1" bitfld.long 0x0 13. "RT13,Rising trigger event configuration bit of configurable event input 13." "0,1" bitfld.long 0x0 12. "RT12,Rising trigger event configuration bit of configurable event input 12." "0,1" bitfld.long 0x0 11. "RT11,Rising trigger event configuration bit of configurable event input 11." "0,1" bitfld.long 0x0 10. "RT10,Rising trigger event configuration bit of configurable event input 10." "0,1" bitfld.long 0x0 9. "RT9,Rising trigger event configuration bit of configurable event input 9." "0,1" newline bitfld.long 0x0 8. "RT8,Rising trigger event configuration bit of configurable event input 8." "0,1" bitfld.long 0x0 7. "RT7,Rising trigger event configuration bit of configurable event input 7." "0,1" bitfld.long 0x0 6. "RT6,Rising trigger event configuration bit of configurable event input 6." "0,1" bitfld.long 0x0 5. "RT5,Rising trigger event configuration bit of configurable event input 5." "0,1" bitfld.long 0x0 4. "RT4,Rising trigger event configuration bit of configurable event input 4." "0,1" bitfld.long 0x0 3. "RT3,Rising trigger event configuration bit of configurable event input 3." "0,1" bitfld.long 0x0 2. "RT2,Rising trigger event configuration bit of configurable event input 2." "0,1" newline bitfld.long 0x0 1. "RT1,Rising trigger event configuration bit of configurable event input 1." "0,1" bitfld.long 0x0 0. "RT0,Rising trigger event configuration bit of configurable event input 0." "0,1" line.long 0x4 "EXTI2_FTSR1,EXTI2 falling trigger selection register" bitfld.long 0x4 15. "FT15,Falling trigger event configuration bit of configurable event input 15." "B_0x0,B_0x1" bitfld.long 0x4 14. "FT14,Falling trigger event configuration bit of configurable event input 14." "0,1" bitfld.long 0x4 13. "FT13,Falling trigger event configuration bit of configurable event input 13." "0,1" bitfld.long 0x4 12. "FT12,Falling trigger event configuration bit of configurable event input 12." "0,1" bitfld.long 0x4 11. "FT11,Falling trigger event configuration bit of configurable event input 11." "0,1" bitfld.long 0x4 10. "FT10,Falling trigger event configuration bit of configurable event input 10." "0,1" bitfld.long 0x4 9. "FT9,Falling trigger event configuration bit of configurable event input 9." "0,1" newline bitfld.long 0x4 8. "FT8,Falling trigger event configuration bit of configurable event input 8." "0,1" bitfld.long 0x4 7. "FT7,Falling trigger event configuration bit of configurable event input 7." "0,1" bitfld.long 0x4 6. "FT6,Falling trigger event configuration bit of configurable event input 6." "0,1" bitfld.long 0x4 5. "FT5,Falling trigger event configuration bit of configurable event input 5." "0,1" bitfld.long 0x4 4. "FT4,Falling trigger event configuration bit of configurable event input 4." "0,1" bitfld.long 0x4 3. "FT3,Falling trigger event configuration bit of configurable event input 3." "0,1" bitfld.long 0x4 2. "FT2,Falling trigger event configuration bit of configurable event input 2." "0,1" newline bitfld.long 0x4 1. "FT1,Falling trigger event configuration bit of configurable event input 1." "0,1" bitfld.long 0x4 0. "FT0,Falling trigger event configuration bit of configurable event input 0." "0,1" line.long 0x8 "EXTI2_SWIER1,EXTI2 software interrupt event register" bitfld.long 0x8 15. "SWI15,Software interrupt on event 15." "B_0x0,B_0x1" bitfld.long 0x8 14. "SWI14,Software interrupt on event 14." "0,1" bitfld.long 0x8 13. "SWI13,Software interrupt on event 13." "0,1" bitfld.long 0x8 12. "SWI12,Software interrupt on event 12." "0,1" bitfld.long 0x8 11. "SWI11,Software interrupt on event 11." "0,1" bitfld.long 0x8 10. "SWI10,Software interrupt on event 10." "0,1" bitfld.long 0x8 9. "SWI9,Software interrupt on event 9." "0,1" newline bitfld.long 0x8 8. "SWI8,Software interrupt on event 8." "0,1" bitfld.long 0x8 7. "SWI7,Software interrupt on event 7." "0,1" bitfld.long 0x8 6. "SWI6,Software interrupt on event 6." "0,1" bitfld.long 0x8 5. "SWI5,Software interrupt on event 5." "0,1" bitfld.long 0x8 4. "SWI4,Software interrupt on event 4." "0,1" bitfld.long 0x8 3. "SWI3,Software interrupt on event 3." "0,1" bitfld.long 0x8 2. "SWI2,Software interrupt on event 2." "0,1" newline bitfld.long 0x8 1. "SWI1,Software interrupt on event 1." "0,1" bitfld.long 0x8 0. "SWI0,Software interrupt on event 0." "0,1" line.long 0xC "EXTI2_RPR1,EXTI2 rising edge pending register" bitfld.long 0xC 15. "RPIF15,configurable event input 15 rising edge Pending bit." "B_0x0,B_0x1" bitfld.long 0xC 14. "RPIF14,configurable event input 14 rising edge Pending bit." "0,1" bitfld.long 0xC 13. "RPIF13,configurable event input 13 rising edge Pending bit." "0,1" bitfld.long 0xC 12. "RPIF12,configurable event input 12 rising edge Pending bit." "0,1" bitfld.long 0xC 11. "RPIF11,configurable event input 11 rising edge Pending bit." "0,1" bitfld.long 0xC 10. "RPIF10,configurable event input 10 rising edge Pending bit." "0,1" bitfld.long 0xC 9. "RPIF9,configurable event input 9 rising edge Pending bit." "0,1" newline bitfld.long 0xC 8. "RPIF8,configurable event input 8 rising edge Pending bit." "0,1" bitfld.long 0xC 7. "RPIF7,configurable event input 7 rising edge Pending bit." "0,1" bitfld.long 0xC 6. "RPIF6,configurable event input 6 rising edge Pending bit." "0,1" bitfld.long 0xC 5. "RPIF5,configurable event input 5 rising edge Pending bit" "0,1" bitfld.long 0xC 4. "RPIF4,configurable event input 4 rising edge Pending bit." "0,1" bitfld.long 0xC 3. "RPIF3,configurable event input 3 rising edge Pending bit." "0,1" bitfld.long 0xC 2. "RPIF2,configurable event input 2 rising edge Pending bit." "0,1" newline bitfld.long 0xC 1. "RPIF1,configurable event input 1 rising edge Pending bit." "0,1" bitfld.long 0xC 0. "RPIF0,configurable event input 0 rising edge Pending bit." "0,1" line.long 0x10 "EXTI2_FPR1,EXTI2 falling edge pending register" bitfld.long 0x10 15. "FPIF15,configurable event input 15 falling edge pending bit." "B_0x0,B_0x1" bitfld.long 0x10 14. "FPIF14,configurable event input 14 falling edge pending bit." "0,1" bitfld.long 0x10 13. "FPIF13,configurable event input 13 falling edge pending bit." "0,1" bitfld.long 0x10 12. "FPIF12,configurable event input 12 falling edge pending bit." "0,1" bitfld.long 0x10 11. "FPIF11,configurable event input 11 falling edge pending bit." "0,1" bitfld.long 0x10 10. "FPIF10,configurable event input 10 falling edge pending bit." "0,1" bitfld.long 0x10 9. "FPIF9,configurable event input 9 falling edge pending bit." "0,1" newline bitfld.long 0x10 8. "FPIF8,configurable event input 8 falling edge pending bit." "0,1" bitfld.long 0x10 7. "FPIF7,configurable event input 7 falling edge pending bit." "0,1" bitfld.long 0x10 6. "FPIF6,configurable event input 6 falling edge pending bit." "0,1" bitfld.long 0x10 5. "FPIF5,configurable event input 5 falling edge pending bit." "0,1" bitfld.long 0x10 4. "FPIF4,configurable event input 4 falling edge pending bit." "0,1" bitfld.long 0x10 3. "FPIF3,configurable event input 3 falling edge pending bit." "0,1" bitfld.long 0x10 2. "FPIF2,configurable event input 2 falling edge pending bit." "0,1" newline bitfld.long 0x10 1. "FPIF1,configurable event input 1 falling edge pending bit." "0,1" bitfld.long 0x10 0. "FPIF0,configurable event input 0 falling edge pending bit." "0,1" line.long 0x14 "EXTI2_SECCFGR1,EXTI2 security configuration register" bitfld.long 0x14 31. "SEC31,Security enable on event input 31." "B_0x0,B_0x1" bitfld.long 0x14 30. "SEC30,Security enable on event input 30." "0,1" bitfld.long 0x14 29. "SEC29,Security enable on event input 29." "0,1" bitfld.long 0x14 27. "SEC27,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 26. "SEC26,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 25. "SEC25,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 24. "SEC24,Security enable on event input n. (where n = 27 to 0)" "0,1" newline bitfld.long 0x14 23. "SEC23,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 22. "SEC22,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 21. "SEC21,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 20. "SEC20,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 19. "SEC19,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 18. "SEC18,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 17. "SEC17,Security enable on event input n. (where n = 27 to 0)" "0,1" newline bitfld.long 0x14 16. "SEC16,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 15. "SEC15,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 14. "SEC14,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 13. "SEC13,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 12. "SEC12,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 11. "SEC11,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 10. "SEC10,Security enable on event input n. (where n = 27 to 0)" "0,1" newline bitfld.long 0x14 9. "SEC9,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 8. "SEC8,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 7. "SEC7,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 6. "SEC6,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 5. "SEC5,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 4. "SEC4,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 3. "SEC3,Security enable on event input n. (where n = 27 to 0)" "0,1" newline bitfld.long 0x14 2. "SEC2,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 1. "SEC1,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 0. "SEC0,Security enable on event input n. (where n = 27 to 0)" "0,1" line.long 0x18 "EXTI2_PRIVCFGR1,EXTI2 Privilege configuration register" bitfld.long 0x18 31. "PRIV31,Privilege enable on event input 31." "B_0x0,B_0x1" bitfld.long 0x18 30. "PRIV30,Privilege enable on event input 30." "0,1" bitfld.long 0x18 29. "PRIV29,Privilege enable on event input 29." "0,1" bitfld.long 0x18 27. "PRIV27,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 26. "PRIV26,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 25. "PRIV25,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 24. "PRIV24,Privilege enable on event input n. (where n = 27 to 0)" "0,1" newline bitfld.long 0x18 23. "PRIV23,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 22. "PRIV22,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 21. "PRIV21,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 20. "PRIV20,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 19. "PRIV19,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 18. "PRIV18,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 17. "PRIV17,Privilege enable on event input n. (where n = 27 to 0)" "0,1" newline bitfld.long 0x18 16. "PRIV16,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 15. "PRIV15,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 14. "PRIV14,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 13. "PRIV13,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 12. "PRIV12,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 11. "PRIV11,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 10. "PRIV10,Privilege enable on event input n. (where n = 27 to 0)" "0,1" newline bitfld.long 0x18 9. "PRIV9,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 8. "PRIV8,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 7. "PRIV7,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 6. "PRIV6,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 5. "PRIV5,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 4. "PRIV4,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 3. "PRIV3,Privilege enable on event input n. (where n = 27 to 0)" "0,1" newline bitfld.long 0x18 2. "PRIV2,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 1. "PRIV1,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 0. "PRIV0,Privilege enable on event input n. (where n = 27 to 0)" "0,1" group.long 0x20++0x1B line.long 0x0 "EXTI2_RTSR2,EXTI2 rising trigger selection register" bitfld.long 0x0 29. "RT61,Rising trigger event configuration bit of configurable event input 61." "B_0x0,B_0x1" bitfld.long 0x0 28. "RT60,Rising trigger event configuration bit of configurable event input 60." "0,1" bitfld.long 0x0 27. "RT59,Rising trigger event configuration bit of configurable event input 59." "0,1" bitfld.long 0x0 19. "RT51,Rising trigger event configuration bit of configurable event input 51." "0,1" bitfld.long 0x0 18. "RT50,Rising trigger event configuration bit of configurable event input 50." "0,1" bitfld.long 0x0 17. "RT49,Rising trigger event configuration bit of configurable event input 49." "0,1" bitfld.long 0x0 16. "RT48,Rising trigger event configuration bit of configurable event input 48." "0,1" newline bitfld.long 0x0 15. "RT47,Rising trigger event configuration bit of configurable event input 47." "0,1" bitfld.long 0x0 14. "RT46,Rising trigger event configuration bit of configurable event input 46." "0,1" line.long 0x4 "EXTI2_FTSR2,EXTI2 falling trigger selection register" bitfld.long 0x4 29. "FT61,Falling trigger event configuration bit of configurable event input 61." "B_0x0,B_0x1" bitfld.long 0x4 28. "FT60,Falling trigger event configuration bit of configurable event input 60." "0,1" bitfld.long 0x4 27. "FT59,Falling trigger event configuration bit of configurable event input 59." "0,1" bitfld.long 0x4 19. "FT51,Falling trigger event configuration bit of configurable event input 51." "0,1" bitfld.long 0x4 18. "FT50,Falling trigger event configuration bit of configurable event input 50." "0,1" bitfld.long 0x4 17. "FT49,Falling trigger event configuration bit of configurable event input 49." "0,1" bitfld.long 0x4 16. "FT48,Falling trigger event configuration bit of configurable event input 48." "0,1" newline bitfld.long 0x4 15. "FT47,Falling trigger event configuration bit of configurable event input 47." "0,1" bitfld.long 0x4 14. "FT46,Falling trigger event configuration bit of configurable event input 46." "0,1" line.long 0x8 "EXTI2_SWIER2,EXTI2 software interrupt event register" bitfld.long 0x8 29. "SWI61,Software interrupt on event 61." "B_0x0,B_0x1" bitfld.long 0x8 28. "SWI60,Software interrupt on event 60." "0,1" bitfld.long 0x8 27. "SWI59,Software interrupt on event 59." "0,1" bitfld.long 0x8 19. "SWI51,Software interrupt on event 51." "0,1" bitfld.long 0x8 18. "SWI50,Software interrupt on event 50." "0,1" bitfld.long 0x8 17. "SWI49,Software interrupt on event 49." "0,1" bitfld.long 0x8 16. "SWI48,Software interrupt on event 48." "0,1" newline bitfld.long 0x8 15. "SWI47,Software interrupt on event 47." "0,1" bitfld.long 0x8 14. "SWI46,Software interrupt on event 46." "0,1" line.long 0xC "EXTI2_RPR2,EXTI2 rising edge pending register" bitfld.long 0xC 29. "RPIF61,configurable event input 61 rising edge Pending bit." "B_0x0,B_0x1" bitfld.long 0xC 28. "RPIF60,configurable event input 60 rising edge Pending bit." "0,1" bitfld.long 0xC 27. "RPIF59,configurable event input 59 rising edge Pending bit." "0,1" bitfld.long 0xC 19. "RPIF51,configurable event input 51 rising edge Pending bit." "0,1" bitfld.long 0xC 18. "RPIF50,configurable event input 50 rising edge Pending bit." "0,1" bitfld.long 0xC 17. "RPIF49,configurable event input 49 rising edge Pending bit." "0,1" bitfld.long 0xC 16. "RPIF48,configurable event input 48 rising edge Pending bit." "0,1" newline bitfld.long 0xC 15. "RPIF47,configurable event input 47 rising edge Pending bit." "0,1" bitfld.long 0xC 14. "RPIF46,configurable event input 46 rising edge Pending bit." "0,1" line.long 0x10 "EXTI2_FPR2,EXTI2 falling edge pending register" bitfld.long 0x10 29. "FPIF61,configurable event input 61 pending bit." "B_0x0,B_0x1" bitfld.long 0x10 28. "FPIF60,configurable event input 60 pending bit." "0,1" bitfld.long 0x10 27. "FPIF59,configurable event input 59 pending bit." "0,1" bitfld.long 0x10 19. "FPIF51,configurable event input 51 pending bit." "0,1" bitfld.long 0x10 18. "FPIF50,configurable event input 50 pending bit." "0,1" bitfld.long 0x10 17. "FPIF49,configurable event input 49 pending bit." "0,1" bitfld.long 0x10 16. "FPIF48,configurable event input 48 pending bit." "0,1" newline bitfld.long 0x10 15. "FPIF47,configurable event input 47 pending bit." "0,1" bitfld.long 0x10 14. "FPIF46,configurable event input 46 pending bit." "0,1" line.long 0x14 "EXTI2_SECCFGR2,EXTI2 security enable register" bitfld.long 0x14 31. "SEC63,Security enable on event input 63." "B_0x0,B_0x1" bitfld.long 0x14 30. "SEC62,Security enable on event input 62." "0,1" bitfld.long 0x14 29. "SEC61,Security enable on event input 61." "0,1" bitfld.long 0x14 28. "SEC60,Security enable on event input 60." "0,1" bitfld.long 0x14 27. "SEC59,Security enable on event input 59." "0,1" bitfld.long 0x14 24. "SEC56,Security enable on event input 56." "0,1" bitfld.long 0x14 23. "SEC55,Security enable on event input 55." "0,1" newline bitfld.long 0x14 22. "SEC54,Security enable on event input 54." "0,1" bitfld.long 0x14 21. "SEC53,Security enable on event input 53." "0,1" bitfld.long 0x14 20. "SEC52,Security enable on event input 52." "0,1" bitfld.long 0x14 19. "SEC51,Security enable on event input 51." "0,1" bitfld.long 0x14 18. "SEC50,Security enable on event input 50." "0,1" bitfld.long 0x14 17. "SEC49,Security enable on event input 49." "0,1" bitfld.long 0x14 16. "SEC48,Security enable on event input 48." "0,1" newline bitfld.long 0x14 15. "SEC47,Security enable on event input 47." "0,1" bitfld.long 0x14 14. "SEC46,Security enable on event input 46." "0,1" bitfld.long 0x14 12. "SEC44,Security enable on event input 44." "0,1" bitfld.long 0x14 11. "SEC43,Security enable on event input 43." "0,1" bitfld.long 0x14 10. "SEC42,Security enable on event input 42." "0,1" bitfld.long 0x14 9. "SEC41,Security enable on event input 41." "0,1" bitfld.long 0x14 8. "SEC40,Security enable on event input 40." "0,1" newline bitfld.long 0x14 6. "SEC38,Security enable on event input 38." "0,1" bitfld.long 0x14 5. "SEC37,Security enable on event input 37." "0,1" bitfld.long 0x14 4. "SEC36,Security enable on event input 36." "0,1" bitfld.long 0x14 3. "SEC35,Security enable on event input 35." "0,1" bitfld.long 0x14 2. "SEC34,Security enable on event input 34." "0,1" bitfld.long 0x14 1. "SEC33,Security enable on event input 33." "0,1" line.long 0x18 "EXTI2_PRIVCFGR2,EXTI2 Privilege enable register" bitfld.long 0x18 31. "PRIV63,Privilege enable on event input 63." "B_0x0,B_0x1" bitfld.long 0x18 30. "PRIV62,Privilege enable on event input 62." "0,1" bitfld.long 0x18 29. "PRIV61,Privilege enable on event input 61." "0,1" bitfld.long 0x18 28. "PRIV60,Privilege enable on event input 60." "0,1" bitfld.long 0x18 27. "PRIV59,Privilege enable on event input 59." "0,1" bitfld.long 0x18 24. "PRIV56,Privilege enable on event input 56." "0,1" bitfld.long 0x18 23. "PRIV55,Privilege enable on event input 55." "0,1" newline bitfld.long 0x18 22. "PRIV54,Privilege enable on event input 54." "0,1" bitfld.long 0x18 21. "PRIV53,Privilege enable on event input 53." "0,1" bitfld.long 0x18 20. "PRIV52,Privilege enable on event input 52." "0,1" bitfld.long 0x18 19. "PRIV51,Privilege enable on event input 51." "0,1" bitfld.long 0x18 18. "PRIV50,Privilege enable on event input 50." "0,1" bitfld.long 0x18 17. "PRIV49,Privilege enable on event input 49." "0,1" bitfld.long 0x18 16. "PRIV48,Privilege enable on event input 48." "0,1" newline bitfld.long 0x18 15. "PRIV47,Privilege enable on event input 47." "0,1" bitfld.long 0x18 14. "PRIV46,Privilege enable on event input 46." "0,1" bitfld.long 0x18 12. "PRIV44,Privilege enable on event input 44." "0,1" bitfld.long 0x18 11. "PRIV43,Privilege enable on event input 43." "0,1" bitfld.long 0x18 10. "PRIV42,Privilege enable on event input 42." "0,1" bitfld.long 0x18 9. "PRIV41,Privilege enable on event input 41." "0,1" bitfld.long 0x18 8. "PRIV40,Privilege enable on event input 40." "0,1" newline bitfld.long 0x18 6. "PRIV38,Privilege enable on event input 38." "0,1" bitfld.long 0x18 5. "PRIV37,Privilege enable on event input 37." "0,1" bitfld.long 0x18 4. "PRIV36,Privilege enable on event input 36." "0,1" bitfld.long 0x18 3. "PRIV35,Privilege enable on event input 35." "0,1" bitfld.long 0x18 2. "PRIV34,Privilege enable on event input 34." "0,1" bitfld.long 0x18 1. "PRIV33,Privilege enable on event input 33." "0,1" group.long 0x40++0x1B line.long 0x0 "EXTI2_RTSR3,EXTI2 rising trigger selection register" bitfld.long 0x0 2. "RT66,Rising trigger event configuration bit of configurable event input 66." "B_0x0,B_0x1" bitfld.long 0x0 1. "RT65,Rising trigger event configuration bit of configurable event input 65." "0,1" bitfld.long 0x0 0. "RT64,Rising trigger event configuration bit of configurable event input 64." "0,1" line.long 0x4 "EXTI2_FTSR3,EXTI2 falling trigger selection register" bitfld.long 0x4 2. "FT66,Falling trigger event configuration bit of configurable event input 66." "B_0x0,B_0x1" bitfld.long 0x4 1. "FT65,Falling trigger event configuration bit of configurable event input 65." "0,1" bitfld.long 0x4 0. "FT64,Falling trigger event configuration bit of configurable event input 64." "0,1" line.long 0x8 "EXTI2_SWIER3,EXTI2 software interrupt event register" bitfld.long 0x8 2. "SWI66,Software interrupt on event 66." "B_0x0,B_0x1" bitfld.long 0x8 1. "SWI65,Software interrupt on event 65." "0,1" bitfld.long 0x8 0. "SWI64,Software interrupt on event 64." "0,1" line.long 0xC "EXTI2_RPR3,EXTI2 rising edge pending register" bitfld.long 0xC 2. "RPIF66,configurable event input 66 rising edge pending bit." "B_0x0,B_0x1" bitfld.long 0xC 1. "RPIF65,configurable event input 65 rising edge pending bit." "0,1" bitfld.long 0xC 0. "RPIF64,configurable event input 64 rising edge pending bit." "0,1" line.long 0x10 "EXTI2_FPR3,EXTI2 falling edge pending register" bitfld.long 0x10 2. "FPIF66,configurable event input 66 falling edge pending bit." "B_0x0,B_0x1" bitfld.long 0x10 1. "FPIF65,configurable event input 65 falling edge pending bit." "0,1" bitfld.long 0x10 0. "FPIF64,configurable event input 64 falling edge pending bit." "0,1" line.long 0x14 "EXTI2_SECCFGR3,EXTI2 security enable register" bitfld.long 0x14 12. "SEC76,Security enable on event input 76." "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC70,Security enable on event input 70." "0,1" bitfld.long 0x14 5. "SEC69,Security enable on event input 69." "0,1" bitfld.long 0x14 4. "SEC68,Security enable on event input 68." "0,1" bitfld.long 0x14 3. "SEC67,Security enable on event input 67." "0,1" bitfld.long 0x14 2. "SEC66,Security enable on event input 66." "0,1" bitfld.long 0x14 1. "SEC65,Security enable on event input 65." "0,1" newline bitfld.long 0x14 0. "SEC64,Security enable on event input 64." "0,1" line.long 0x18 "EXTI2_PRIVCFGR3,EXTI2 Privilege enable register" bitfld.long 0x18 12. "PRIV76,Privilege enable on event input 76." "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV70,Privilege enable on event input 70." "0,1" bitfld.long 0x18 5. "PRIV69,Privilege enable on event input 69." "0,1" bitfld.long 0x18 4. "PRIV68,Privilege enable on event input 68." "0,1" bitfld.long 0x18 3. "PRIV67,Privilege enable on event input 67." "0,1" bitfld.long 0x18 2. "PRIV66,Privilege enable on event input 66." "0,1" bitfld.long 0x18 1. "PRIV65,Privilege enable on event input 65." "0,1" newline bitfld.long 0x18 0. "PRIV64,Privilege enable on event input 64." "0,1" group.long 0x60++0x13 line.long 0x0 "EXTI2_EXTICR1" hexmask.long.byte 0x0 24.--31. 1. "EXTI3,EXTI3 GPIO port selection." hexmask.long.byte 0x0 16.--23. 1. "EXTI2,EXTI2 GPIO port selection." hexmask.long.byte 0x0 8.--15. 1. "EXTI1,EXTI1 GPIO port selection." hexmask.long.byte 0x0 0.--7. 1. "EXTI0,EXTI0 GPIO port selection." line.long 0x4 "EXTI2_EXTICR2" hexmask.long.byte 0x4 24.--31. 1. "EXTI7,EXTI7 GPIO port selection." hexmask.long.byte 0x4 16.--23. 1. "EXTI6,EXTI6 GPIO port selection." hexmask.long.byte 0x4 8.--15. 1. "EXTI5,EXTI5 GPIO port selection." hexmask.long.byte 0x4 0.--7. 1. "EXTI4,EXTI4 GPIO port selection." line.long 0x8 "EXTI2_EXTICR3" hexmask.long.byte 0x8 24.--31. 1. "EXTI11,EXTI11 GPIO port selection." hexmask.long.byte 0x8 16.--23. 1. "EXTI10,EXTI10 GPIO port selection." hexmask.long.byte 0x8 8.--15. 1. "EXTI9,EXTI9 GPIO port selection." hexmask.long.byte 0x8 0.--7. 1. "EXTI8,EXTI8 GPIO port selection." line.long 0xC "EXTI2_EXTICR4" hexmask.long.byte 0xC 24.--31. 1. "EXTI15,EXTI15 GPIO port selection." hexmask.long.byte 0xC 16.--23. 1. "EXTI14,EXTI14 GPIO port selection." hexmask.long.byte 0xC 8.--15. 1. "EXTI13,EXTI13 GPIO port selection." hexmask.long.byte 0xC 0.--7. 1. "EXTI12,EXTIp GPIO port selection." line.long 0x10 "EXTI2_LOCKR,EXTI2 lock register" bitfld.long 0x10 0. "GLOCK,Global security privilege and CID configuration registers EXTI2_SECCFGRx EXTI2_PRIVCFGRx EXTI2_EnCIDCFGR and EXTI2_CmCIDCFGR lock." "B_0x0,B_0x1" group.long 0x80++0x3 line.long 0x0 "EXTI2_C1IMR1,EXTI2 CPU1 wakeup with interrupt mask register" bitfld.long 0x0 31. "IM31,CPUm wakeup with interrupt mask on event input 31." "B_0x0,B_0x1" bitfld.long 0x0 30. "IM30,CPUm wakeup with interrupt mask on event input 30." "0,1" bitfld.long 0x0 29. "IM29,CPUm wakeup with interrupt mask on event input 29." "0,1" bitfld.long 0x0 27. "IM27,CPUm wakeup with interrupt mask on event input 27." "0,1" bitfld.long 0x0 26. "IM26,CPUm wakeup with interrupt mask on event input 26." "0,1" bitfld.long 0x0 25. "IM25,CPUm wakeup with interrupt mask on event input 25." "0,1" bitfld.long 0x0 24. "IM24,CPUm wakeup with interrupt mask on event input 24." "0,1" newline bitfld.long 0x0 23. "IM23,CPUm wakeup with interrupt mask on event input 23." "0,1" bitfld.long 0x0 22. "IM22,CPUm wakeup with interrupt mask on event input 22." "0,1" bitfld.long 0x0 21. "IM21,CPUm wakeup with interrupt mask on event input 21." "0,1" bitfld.long 0x0 20. "IM20,CPUm wakeup with interrupt mask on event input 20." "0,1" bitfld.long 0x0 19. "IM19,CPUm wakeup with interrupt mask on event input 19." "0,1" bitfld.long 0x0 18. "IM18,CPUm wakeup with interrupt mask on event input 18." "0,1" bitfld.long 0x0 17. "IM17,CPUm wakeup with interrupt mask on event input 17." "0,1" newline bitfld.long 0x0 16. "IM16,CPUm wakeup with interrupt mask on event input 16." "0,1" bitfld.long 0x0 15. "IM15,CPUm wakeup with interrupt mask on event input 15." "0,1" bitfld.long 0x0 14. "IM14,CPUm wakeup with interrupt mask on event input 14." "0,1" bitfld.long 0x0 13. "IM13,CPUm wakeup with interrupt mask on event input 13." "0,1" bitfld.long 0x0 12. "IM12,CPUm wakeup with interrupt mask on event input 12." "0,1" bitfld.long 0x0 11. "IM11,CPUm wakeup with interrupt mask on event input 11." "0,1" bitfld.long 0x0 10. "IM10,CPUm wakeup with interrupt mask on event input 10." "0,1" newline bitfld.long 0x0 9. "IM9,CPUm wakeup with interrupt mask on event input 9." "0,1" bitfld.long 0x0 8. "IM8,CPUm wakeup with interrupt mask on event input 8." "0,1" bitfld.long 0x0 7. "IM7,CPUm wakeup with interrupt mask on event input 7." "0,1" bitfld.long 0x0 6. "IM6,CPUm wakeup with interrupt mask on event input 6." "0,1" bitfld.long 0x0 5. "IM5,CPUm wakeup with interrupt mask on event input 5." "0,1" bitfld.long 0x0 4. "IM4,CPUm wakeup with interrupt mask on event input 4." "0,1" bitfld.long 0x0 3. "IM3,CPUm wakeup with interrupt mask on event input 3." "0,1" newline bitfld.long 0x0 2. "IM2,CPUm wakeup with interrupt mask on event input 2." "0,1" bitfld.long 0x0 1. "IM1,CPUm wakeup with interrupt mask on event input 1." "0,1" bitfld.long 0x0 0. "IM0,CPUm wakeup with interrupt mask on event input 0." "0,1" group.long 0x90++0x3 line.long 0x0 "EXTI2_C1IMR2,EXTI2 CPU1 wakeup with interrupt mask register" bitfld.long 0x0 31. "IM63,CPUm wakeup with interrupt mask on event input 63." "B_0x0,B_0x1" bitfld.long 0x0 30. "IM62,CPUm wakeup with interrupt mask on event input 62." "0,1" bitfld.long 0x0 29. "IM61,CPUm wakeup with interrupt mask on event input 61." "0,1" bitfld.long 0x0 28. "IM60,CPUm wakeup with interrupt mask on event input 60." "0,1" bitfld.long 0x0 27. "IM59,CPUm wakeup with interrupt mask on event input 59." "0,1" bitfld.long 0x0 24. "IM56,CPUm wakeup with interrupt mask on event input 56." "0,1" bitfld.long 0x0 23. "IM55,CPUm wakeup with interrupt mask on event input 55." "0,1" newline bitfld.long 0x0 22. "IM54,CPUm wakeup with interrupt mask on event input 54." "0,1" bitfld.long 0x0 21. "IM53,CPUm wakeup with interrupt mask on event input 53." "0,1" bitfld.long 0x0 20. "IM52,CPUm wakeup with interrupt mask on event input 52." "0,1" bitfld.long 0x0 19. "IM51,CPUm wakeup with interrupt mask on event input 51." "0,1" bitfld.long 0x0 18. "IM50,CPUm wakeup with interrupt mask on event input 50." "0,1" bitfld.long 0x0 17. "IM49,CPUm wakeup with interrupt mask on event input 49." "0,1" bitfld.long 0x0 16. "IM48,CPUm wakeup with interrupt mask on event input 48." "0,1" newline bitfld.long 0x0 15. "IM47,CPUm wakeup with interrupt mask on event input 47." "0,1" bitfld.long 0x0 14. "IM46,CPUm wakeup with interrupt mask on event input 46." "0,1" bitfld.long 0x0 12. "IM44,CPUm wakeup with interrupt mask on event input 44." "0,1" bitfld.long 0x0 11. "IM43,CPUm wakeup with interrupt mask on event input 43." "0,1" bitfld.long 0x0 10. "IM42,CPUm wakeup with interrupt mask on event input 42." "0,1" bitfld.long 0x0 9. "IM41,CPUm wakeup with interrupt mask on event input 41." "0,1" bitfld.long 0x0 8. "IM40,CPUm wakeup with interrupt mask on event input 40." "0,1" newline bitfld.long 0x0 6. "IM38,CPUm wakeup with interrupt mask on event input 38." "0,1" bitfld.long 0x0 5. "IM37,CPUm wakeup with interrupt mask on event input 37." "0,1" bitfld.long 0x0 4. "IM36,CPUm wakeup with interrupt mask on event input 36." "0,1" bitfld.long 0x0 3. "IM35,CPUm wakeup with interrupt mask on event input 35." "0,1" bitfld.long 0x0 2. "IM34,CPUm wakeup with interrupt mask on event input 34." "0,1" bitfld.long 0x0 1. "IM33,CPUm wakeup with interrupt mask on event input 33." "0,1" group.long 0xA0++0x3 line.long 0x0 "EXTI2_C1IMR3,EXTI2 CPU1 wakeup with interrupt mask register" bitfld.long 0x0 12. "IM76,CPUm wakeup with interrupt mask on event input 76." "B_0x0,B_0x1" bitfld.long 0x0 6. "IM70,CPUm wakeup with interrupt mask on event input 70." "0,1" bitfld.long 0x0 5. "IM69,CPUm wakeup with interrupt mask on event input 69." "0,1" bitfld.long 0x0 4. "IM68,CPUm wakeup with interrupt mask on event input 68." "0,1" bitfld.long 0x0 3. "IM67,CPUm wakeup with interrupt mask on event input 67." "0,1" bitfld.long 0x0 2. "IM66,CPUm wakeup with interrupt mask on event input 66." "0,1" bitfld.long 0x0 1. "IM65,CPUm wakeup with interrupt mask on event input 65." "0,1" newline bitfld.long 0x0 0. "IM64,CPUm wakeup with interrupt mask on event input 64." "0,1" group.long 0xC0++0x7 line.long 0x0 "EXTI2_C2IMR1,EXTI2 CPU2 wakeup with interrupt mask register" bitfld.long 0x0 31. "IM31,CPUm wakeup with interrupt mask on event input 31." "B_0x0,B_0x1" bitfld.long 0x0 30. "IM30,CPUm wakeup with interrupt mask on event input 30." "0,1" bitfld.long 0x0 29. "IM29,CPUm wakeup with interrupt mask on event input 29." "0,1" bitfld.long 0x0 27. "IM27,CPUm wakeup with interrupt mask on event input 27." "0,1" bitfld.long 0x0 26. "IM26,CPUm wakeup with interrupt mask on event input 26." "0,1" bitfld.long 0x0 25. "IM25,CPUm wakeup with interrupt mask on event input 25." "0,1" bitfld.long 0x0 24. "IM24,CPUm wakeup with interrupt mask on event input 24." "0,1" newline bitfld.long 0x0 23. "IM23,CPUm wakeup with interrupt mask on event input 23." "0,1" bitfld.long 0x0 22. "IM22,CPUm wakeup with interrupt mask on event input 22." "0,1" bitfld.long 0x0 21. "IM21,CPUm wakeup with interrupt mask on event input 21." "0,1" bitfld.long 0x0 20. "IM20,CPUm wakeup with interrupt mask on event input 20." "0,1" bitfld.long 0x0 19. "IM19,CPUm wakeup with interrupt mask on event input 19." "0,1" bitfld.long 0x0 18. "IM18,CPUm wakeup with interrupt mask on event input 18." "0,1" bitfld.long 0x0 17. "IM17,CPUm wakeup with interrupt mask on event input 17." "0,1" newline bitfld.long 0x0 16. "IM16,CPUm wakeup with interrupt mask on event input 16." "0,1" bitfld.long 0x0 15. "IM15,CPUm wakeup with interrupt mask on event input 15." "0,1" bitfld.long 0x0 14. "IM14,CPUm wakeup with interrupt mask on event input 14." "0,1" bitfld.long 0x0 13. "IM13,CPUm wakeup with interrupt mask on event input 13." "0,1" bitfld.long 0x0 12. "IM12,CPUm wakeup with interrupt mask on event input 12." "0,1" bitfld.long 0x0 11. "IM11,CPUm wakeup with interrupt mask on event input 11." "0,1" bitfld.long 0x0 10. "IM10,CPUm wakeup with interrupt mask on event input 10." "0,1" newline bitfld.long 0x0 9. "IM9,CPUm wakeup with interrupt mask on event input 9." "0,1" bitfld.long 0x0 8. "IM8,CPUm wakeup with interrupt mask on event input 8." "0,1" bitfld.long 0x0 7. "IM7,CPUm wakeup with interrupt mask on event input 7." "0,1" bitfld.long 0x0 6. "IM6,CPUm wakeup with interrupt mask on event input 6." "0,1" bitfld.long 0x0 5. "IM5,CPUm wakeup with interrupt mask on event input 5." "0,1" bitfld.long 0x0 4. "IM4,CPUm wakeup with interrupt mask on event input 4." "0,1" bitfld.long 0x0 3. "IM3,CPUm wakeup with interrupt mask on event input 3." "0,1" newline bitfld.long 0x0 2. "IM2,CPUm wakeup with interrupt mask on event input 2." "0,1" bitfld.long 0x0 1. "IM1,CPUm wakeup with interrupt mask on event input 1." "0,1" bitfld.long 0x0 0. "IM0,CPUm wakeup with interrupt mask on event input 0." "0,1" line.long 0x4 "EXTI2_C2EMR1,EXTI2 CPU2 wakeup with event mask register" bitfld.long 0x4 15. "EM15,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 14. "EM14,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 13. "EM13,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 12. "EM12,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 11. "EM11,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 10. "EM10,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 9. "EM9,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x4 8. "EM8,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 7. "EM7,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 6. "EM6,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 5. "EM5,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 4. "EM4,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 3. "EM3,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 2. "EM2,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "EM1,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 0. "EM0,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" group.long 0xD0++0x7 line.long 0x0 "EXTI2_C2IMR2,EXTI2 CPU2 wakeup with interrupt mask register" bitfld.long 0x0 31. "IM63,CPUm wakeup with interrupt mask on event input 63." "B_0x0,B_0x1" bitfld.long 0x0 30. "IM62,CPUm wakeup with interrupt mask on event input 62." "0,1" bitfld.long 0x0 29. "IM61,CPUm wakeup with interrupt mask on event input 61." "0,1" bitfld.long 0x0 28. "IM60,CPUm wakeup with interrupt mask on event input 60." "0,1" bitfld.long 0x0 27. "IM59,CPUm wakeup with interrupt mask on event input 59." "0,1" bitfld.long 0x0 24. "IM56,CPUm wakeup with interrupt mask on event input 56." "0,1" bitfld.long 0x0 23. "IM55,CPUm wakeup with interrupt mask on event input 55." "0,1" newline bitfld.long 0x0 22. "IM54,CPUm wakeup with interrupt mask on event input 54." "0,1" bitfld.long 0x0 21. "IM53,CPUm wakeup with interrupt mask on event input 53." "0,1" bitfld.long 0x0 20. "IM52,CPUm wakeup with interrupt mask on event input 52." "0,1" bitfld.long 0x0 19. "IM51,CPUm wakeup with interrupt mask on event input 51." "0,1" bitfld.long 0x0 18. "IM50,CPUm wakeup with interrupt mask on event input 50." "0,1" bitfld.long 0x0 17. "IM49,CPUm wakeup with interrupt mask on event input 49." "0,1" bitfld.long 0x0 16. "IM48,CPUm wakeup with interrupt mask on event input 48." "0,1" newline bitfld.long 0x0 15. "IM47,CPUm wakeup with interrupt mask on event input 47." "0,1" bitfld.long 0x0 14. "IM46,CPUm wakeup with interrupt mask on event input 46." "0,1" bitfld.long 0x0 12. "IM44,CPUm wakeup with interrupt mask on event input 44." "0,1" bitfld.long 0x0 11. "IM43,CPUm wakeup with interrupt mask on event input 43." "0,1" bitfld.long 0x0 10. "IM42,CPUm wakeup with interrupt mask on event input 42." "0,1" bitfld.long 0x0 9. "IM41,CPUm wakeup with interrupt mask on event input 41." "0,1" bitfld.long 0x0 8. "IM40,CPUm wakeup with interrupt mask on event input 40." "0,1" newline bitfld.long 0x0 6. "IM38,CPUm wakeup with interrupt mask on event input 38." "0,1" bitfld.long 0x0 5. "IM37,CPUm wakeup with interrupt mask on event input 37." "0,1" bitfld.long 0x0 4. "IM36,CPUm wakeup with interrupt mask on event input 36." "0,1" bitfld.long 0x0 3. "IM35,CPUm wakeup with interrupt mask on event input 35." "0,1" bitfld.long 0x0 2. "IM34,CPUm wakeup with interrupt mask on event input 34." "0,1" bitfld.long 0x0 1. "IM33,CPUm wakeup with interrupt mask on event input 33." "0,1" line.long 0x4 "EXTI2_C2EMR2,EXTI2 CPU2 wakeup with event mask register" bitfld.long 0x4 29. "EM61,CPU(m) wakeup with event generation mask on event input 61." "B_0x0,B_0x1" bitfld.long 0x4 28. "EM60,CPU(m) wakeup with event generation mask on event input 60." "0,1" bitfld.long 0x4 27. "EM59,CPU(m) wakeup with event generation mask on event input 59." "0,1" group.long 0xE0++0x3 line.long 0x0 "EXTI2_C2IMR3,EXTI2 CPU2 wakeup with interrupt mask register" bitfld.long 0x0 12. "IM76,CPUm wakeup with interrupt mask on event input 76." "B_0x0,B_0x1" bitfld.long 0x0 6. "IM70,CPUm wakeup with interrupt mask on event input 70." "0,1" bitfld.long 0x0 5. "IM69,CPUm wakeup with interrupt mask on event input 69." "0,1" bitfld.long 0x0 4. "IM68,CPUm wakeup with interrupt mask on event input 68." "0,1" bitfld.long 0x0 3. "IM67,CPUm wakeup with interrupt mask on event input 67." "0,1" bitfld.long 0x0 2. "IM66,CPUm wakeup with interrupt mask on event input 66." "0,1" bitfld.long 0x0 1. "IM65,CPUm wakeup with interrupt mask on event input 65." "0,1" newline bitfld.long 0x0 0. "IM64,CPUm wakeup with interrupt mask on event input 64." "0,1" group.long 0x100++0x7 line.long 0x0 "EXTI2_C3IMR1,EXTI2 CPU3 wakeup with interrupt mask register" bitfld.long 0x0 31. "IM31,CPUm wakeup with interrupt mask on event input 31." "B_0x0,B_0x1" bitfld.long 0x0 30. "IM30,CPUm wakeup with interrupt mask on event input 30." "0,1" bitfld.long 0x0 29. "IM29,CPUm wakeup with interrupt mask on event input 29." "0,1" bitfld.long 0x0 27. "IM27,CPUm wakeup with interrupt mask on event input 27." "0,1" bitfld.long 0x0 26. "IM26,CPUm wakeup with interrupt mask on event input 26." "0,1" bitfld.long 0x0 25. "IM25,CPUm wakeup with interrupt mask on event input 25." "0,1" bitfld.long 0x0 24. "IM24,CPUm wakeup with interrupt mask on event input 24." "0,1" newline bitfld.long 0x0 23. "IM23,CPUm wakeup with interrupt mask on event input 23." "0,1" bitfld.long 0x0 22. "IM22,CPUm wakeup with interrupt mask on event input 22." "0,1" bitfld.long 0x0 21. "IM21,CPUm wakeup with interrupt mask on event input 21." "0,1" bitfld.long 0x0 20. "IM20,CPUm wakeup with interrupt mask on event input 20." "0,1" bitfld.long 0x0 19. "IM19,CPUm wakeup with interrupt mask on event input 19." "0,1" bitfld.long 0x0 18. "IM18,CPUm wakeup with interrupt mask on event input 18." "0,1" bitfld.long 0x0 17. "IM17,CPUm wakeup with interrupt mask on event input 17." "0,1" newline bitfld.long 0x0 16. "IM16,CPUm wakeup with interrupt mask on event input 16." "0,1" bitfld.long 0x0 15. "IM15,CPUm wakeup with interrupt mask on event input 15." "0,1" bitfld.long 0x0 14. "IM14,CPUm wakeup with interrupt mask on event input 14." "0,1" bitfld.long 0x0 13. "IM13,CPUm wakeup with interrupt mask on event input 13." "0,1" bitfld.long 0x0 12. "IM12,CPUm wakeup with interrupt mask on event input 12." "0,1" bitfld.long 0x0 11. "IM11,CPUm wakeup with interrupt mask on event input 11." "0,1" bitfld.long 0x0 10. "IM10,CPUm wakeup with interrupt mask on event input 10." "0,1" newline bitfld.long 0x0 9. "IM9,CPUm wakeup with interrupt mask on event input 9." "0,1" bitfld.long 0x0 8. "IM8,CPUm wakeup with interrupt mask on event input 8." "0,1" bitfld.long 0x0 7. "IM7,CPUm wakeup with interrupt mask on event input 7." "0,1" bitfld.long 0x0 6. "IM6,CPUm wakeup with interrupt mask on event input 6." "0,1" bitfld.long 0x0 5. "IM5,CPUm wakeup with interrupt mask on event input 5." "0,1" bitfld.long 0x0 4. "IM4,CPUm wakeup with interrupt mask on event input 4." "0,1" bitfld.long 0x0 3. "IM3,CPUm wakeup with interrupt mask on event input 3." "0,1" newline bitfld.long 0x0 2. "IM2,CPUm wakeup with interrupt mask on event input 2." "0,1" bitfld.long 0x0 1. "IM1,CPUm wakeup with interrupt mask on event input 1." "0,1" bitfld.long 0x0 0. "IM0,CPUm wakeup with interrupt mask on event input 0." "0,1" line.long 0x4 "EXTI2_C3EMR1,EXTI2 CPU3 wakeup with event mask register" bitfld.long 0x4 15. "EM15,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 14. "EM14,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 13. "EM13,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 12. "EM12,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 11. "EM11,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 10. "EM10,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 9. "EM9,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x4 8. "EM8,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 7. "EM7,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 6. "EM6,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 5. "EM5,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 4. "EM4,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 3. "EM3,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 2. "EM2,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "EM1,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 0. "EM0,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" group.long 0x110++0x7 line.long 0x0 "EXTI2_C3IMR2,EXTI2 CPU3 wakeup with interrupt mask register" bitfld.long 0x0 31. "IM63,CPUm wakeup with interrupt mask on event input 63." "B_0x0,B_0x1" bitfld.long 0x0 30. "IM62,CPUm wakeup with interrupt mask on event input 62." "0,1" bitfld.long 0x0 29. "IM61,CPUm wakeup with interrupt mask on event input 61." "0,1" bitfld.long 0x0 28. "IM60,CPUm wakeup with interrupt mask on event input 60." "0,1" bitfld.long 0x0 27. "IM59,CPUm wakeup with interrupt mask on event input 59." "0,1" bitfld.long 0x0 24. "IM56,CPUm wakeup with interrupt mask on event input 56." "0,1" bitfld.long 0x0 23. "IM55,CPUm wakeup with interrupt mask on event input 55." "0,1" newline bitfld.long 0x0 22. "IM54,CPUm wakeup with interrupt mask on event input 54." "0,1" bitfld.long 0x0 21. "IM53,CPUm wakeup with interrupt mask on event input 53." "0,1" bitfld.long 0x0 20. "IM52,CPUm wakeup with interrupt mask on event input 52." "0,1" bitfld.long 0x0 19. "IM51,CPUm wakeup with interrupt mask on event input 51." "0,1" bitfld.long 0x0 18. "IM50,CPUm wakeup with interrupt mask on event input 50." "0,1" bitfld.long 0x0 17. "IM49,CPUm wakeup with interrupt mask on event input 49." "0,1" bitfld.long 0x0 16. "IM48,CPUm wakeup with interrupt mask on event input 48." "0,1" newline bitfld.long 0x0 15. "IM47,CPUm wakeup with interrupt mask on event input 47." "0,1" bitfld.long 0x0 14. "IM46,CPUm wakeup with interrupt mask on event input 46." "0,1" bitfld.long 0x0 12. "IM44,CPUm wakeup with interrupt mask on event input 44." "0,1" bitfld.long 0x0 11. "IM43,CPUm wakeup with interrupt mask on event input 43." "0,1" bitfld.long 0x0 10. "IM42,CPUm wakeup with interrupt mask on event input 42." "0,1" bitfld.long 0x0 9. "IM41,CPUm wakeup with interrupt mask on event input 41." "0,1" bitfld.long 0x0 8. "IM40,CPUm wakeup with interrupt mask on event input 40." "0,1" newline bitfld.long 0x0 6. "IM38,CPUm wakeup with interrupt mask on event input 38." "0,1" bitfld.long 0x0 5. "IM37,CPUm wakeup with interrupt mask on event input 37." "0,1" bitfld.long 0x0 4. "IM36,CPUm wakeup with interrupt mask on event input 36." "0,1" bitfld.long 0x0 3. "IM35,CPUm wakeup with interrupt mask on event input 35." "0,1" bitfld.long 0x0 2. "IM34,CPUm wakeup with interrupt mask on event input 34." "0,1" bitfld.long 0x0 1. "IM33,CPUm wakeup with interrupt mask on event input 33." "0,1" line.long 0x4 "EXTI2_C3EMR2,EXTI2 CPU3 wakeup with event mask register" bitfld.long 0x4 29. "EM61,CPU(m) wakeup with event generation mask on event input 61." "B_0x0,B_0x1" bitfld.long 0x4 28. "EM60,CPU(m) wakeup with event generation mask on event input 60." "0,1" bitfld.long 0x4 27. "EM59,CPU(m) wakeup with event generation mask on event input 59." "0,1" group.long 0x120++0x3 line.long 0x0 "EXTI2_C3IMR3,EXTI2 CPU3 wakeup with interrupt mask register" bitfld.long 0x0 12. "IM76,CPUm wakeup with interrupt mask on event input 76." "B_0x0,B_0x1" bitfld.long 0x0 6. "IM70,CPUm wakeup with interrupt mask on event input 70." "0,1" bitfld.long 0x0 5. "IM69,CPUm wakeup with interrupt mask on event input 69." "0,1" bitfld.long 0x0 4. "IM68,CPUm wakeup with interrupt mask on event input 68." "0,1" bitfld.long 0x0 3. "IM67,CPUm wakeup with interrupt mask on event input 67." "0,1" bitfld.long 0x0 2. "IM66,CPUm wakeup with interrupt mask on event input 66." "0,1" bitfld.long 0x0 1. "IM65,CPUm wakeup with interrupt mask on event input 65." "0,1" newline bitfld.long 0x0 0. "IM64,CPUm wakeup with interrupt mask on event input 64." "0,1" group.long 0x180++0x133 line.long 0x0 "EXTI2_E0CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x0 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "EXTI2_E1CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x4 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x8 "EXTI2_E2CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x8 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xC "EXTI2_E3CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xC 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x10 "EXTI2_E4CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x10 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x10 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "EXTI2_E5CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x14 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x18 "EXTI2_E6CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x18 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x18 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "EXTI2_E7CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x1C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x20 "EXTI2_E8CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x20 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x20 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "EXTI2_E9CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x24 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x24 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x28 "EXTI2_E10CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x28 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x28 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "EXTI2_E11CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x2C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x2C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x30 "EXTI2_E12CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x30 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x30 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "EXTI2_E13CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x34 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x34 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x38 "EXTI2_E14CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x38 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x38 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "EXTI2_E15CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x3C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x3C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x40 "EXTI2_E16CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x40 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x40 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "EXTI2_E17CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x44 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x44 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x48 "EXTI2_E18CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x48 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x48 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "EXTI2_E19CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x4C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x4C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x50 "EXTI2_E20CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x50 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x50 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "EXTI2_E21CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x54 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x54 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x58 "EXTI2_E22CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x58 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x58 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "EXTI2_E23CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x5C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x5C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x60 "EXTI2_E24CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x60 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x60 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "EXTI2_E25CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x64 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x64 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x68 "EXTI2_E26CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x68 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x68 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "EXTI2_E27CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x6C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x6C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x70 "EXTI2_E28CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x70 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x70 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "EXTI2_E29CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x74 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x74 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x78 "EXTI2_E30CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x78 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x78 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "EXTI2_E31CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x7C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x7C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x80 "EXTI2_E32CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x80 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x80 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "EXTI2_E33CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x84 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x84 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x88 "EXTI2_E34CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x88 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x88 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "EXTI2_E35CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x8C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x8C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x90 "EXTI2_E36CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x90 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x90 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x94 "EXTI2_E37CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x94 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x94 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x98 "EXTI2_E38CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x98 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x98 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x9C "EXTI2_E39CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x9C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x9C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xA0 "EXTI2_E40CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xA0 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xA0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xA4 "EXTI2_E41CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xA4 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xA4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xA8 "EXTI2_E42CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xA8 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xA8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xAC "EXTI2_E43CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xAC 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xAC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xB0 "EXTI2_E44CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xB0 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xB0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xB4 "EXTI2_E45CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xB4 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xB4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xB8 "EXTI2_E46CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xB8 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xB8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xBC "EXTI2_E47CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xBC 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xBC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xC0 "EXTI2_E48CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xC0 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xC0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xC4 "EXTI2_E49CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xC4 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xC4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xC8 "EXTI2_E50CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xC8 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xC8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xCC "EXTI2_E51CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xCC 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xCC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xD0 "EXTI2_E52CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xD0 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xD0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xD4 "EXTI2_E53CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xD4 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xD4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xD8 "EXTI2_E54CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xD8 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xD8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xDC "EXTI2_E55CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xDC 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xDC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xE0 "EXTI2_E56CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xE0 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xE0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xE4 "EXTI2_E57CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xE4 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xE4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xE8 "EXTI2_E58CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xE8 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xE8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xEC "EXTI2_E59CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xEC 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xEC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xF0 "EXTI2_E60CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xF0 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xF0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xF4 "EXTI2_E61CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xF4 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xF4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xF8 "EXTI2_E62CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xF8 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xF8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xFC "EXTI2_E63CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xFC 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xFC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x100 "EXTI2_E64CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x100 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x100 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x104 "EXTI2_E65CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x104 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x104 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x108 "EXTI2_E66CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x108 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x108 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x10C "EXTI2_E67CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x10C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x10C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x110 "EXTI2_E68CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x110 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x110 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x114 "EXTI2_E69CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x114 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x114 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x118 "EXTI2_E70CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x118 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x118 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x11C "EXTI2_E71CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x11C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x11C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x120 "EXTI2_E72CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x120 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x120 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x124 "EXTI2_E73CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x124 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x124 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x128 "EXTI2_E74CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x128 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x128 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x12C "EXTI2_E75CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x12C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x12C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x130 "EXTI2_E76CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x130 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x130 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" group.long 0x300++0xB line.long 0x0 "EXTI2_C1CIDCFGR,EXTI2 processor 1 CID configuration register" bitfld.long 0x0 4.--6. "CID,CPUm CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "CFEN,CID filtering enabled for CPUm EXTI2_CmIMRn and EXTI2_CmEMRn registers" "B_0x0,B_0x1" line.long 0x4 "EXTI2_C2CIDCFGR,EXTI2 processor 2 CID configuration register" bitfld.long 0x4 4.--6. "CID,CPUm CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "CFEN,CID filtering enabled for CPUm EXTI2_CmIMRn and EXTI2_CmEMRn registers" "B_0x0,B_0x1" line.long 0x8 "EXTI2_C3CIDCFGR,EXTI2 processor 3 CID configuration register" bitfld.long 0x8 4.--6. "CID,CPUm CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "CFEN,CID filtering enabled for CPUm EXTI2_CmIMRn and EXTI2_CmEMRn registers" "B_0x0,B_0x1" rgroup.long 0x3C0++0xB line.long 0x0 "EXTI2_HWCFGR13" hexmask.long 0x0 0.--31. 1. "SEC,HW configuration event security privilege and resource isolation capability." line.long 0x4 "EXTI2_HWCFGR12" hexmask.long 0x4 0.--31. 1. "SEC,HW configuration event security privilege and resource isolation capability." line.long 0x8 "EXTI2_HWCFGR11" hexmask.long 0x8 0.--31. 1. "SEC,HW configuration event security privilege and resource isolation capability." rgroup.long 0x3D8++0x27 line.long 0x0 "EXTI2_HWCFGR7" hexmask.long 0x0 0.--31. 1. "CPUEVENT,HW configuration CPU event generation" line.long 0x4 "EXTI2_HWCFGR6" hexmask.long 0x4 0.--31. 1. "CPUEVENT,HW configuration CPU event generation" line.long 0x8 "EXTI2_HWCFGR5" hexmask.long 0x8 0.--31. 1. "CPUEVENT,HW configuration CPU event generation" line.long 0xC "EXTI2_HWCFGR4" hexmask.long 0xC 0.--31. 1. "EVENT_TRG,HW configuration event trigger type" line.long 0x10 "EXTI2_HWCFGR3" hexmask.long 0x10 0.--31. 1. "EVENT_TRG,HW configuration event trigger type" line.long 0x14 "EXTI2_HWCFGR2" hexmask.long 0x14 0.--31. 1. "EVENT_TRG,HW configuration event trigger type" line.long 0x18 "EXTI2_HWCFGR1" hexmask.long.byte 0x18 24.--27. 1. "CIDWIDTH,CID parameters bit width" hexmask.long.byte 0x18 16.--23. 1. "NBIOPORT,HW configuration of number of IO ports on EXTI. (n+1)" hexmask.long.byte 0x18 12.--15. 1. "CPUEVTEN,HW configuration of CPU(m) event output enable." hexmask.long.byte 0x18 8.--11. 1. "NBCPUS,HW configuration number of CPUs (n+1)" hexmask.long.byte 0x18 0.--7. 1. "NBEVENTS,HW configuration number of event (n+1)" line.long 0x1C "EXTI2_VERR" hexmask.long.byte 0x1C 4.--7. 1. "MAJREV,Major Revision number" hexmask.long.byte 0x1C 0.--3. 1. "MINREV,Minor Revision number" line.long 0x20 "EXTI2_IPIDR" hexmask.long 0x20 0.--31. 1. "IPID,IP Identification" line.long 0x24 "EXTI2_SIDR" hexmask.long 0x24 0.--31. 1. "SID,Size Identification" tree.end sif (cpuis("*CA35")||cpuis("*CM33F")) tree "EXTI2_S" base ad:0x56230000 group.long 0x0++0x1B line.long 0x0 "EXTI2_RTSR1,EXTI2 rising trigger selection register" bitfld.long 0x0 15. "RT15,Rising trigger event configuration bit of configurable event input 15." "B_0x0,B_0x1" bitfld.long 0x0 14. "RT14,Rising trigger event configuration bit of configurable event input 14." "0,1" bitfld.long 0x0 13. "RT13,Rising trigger event configuration bit of configurable event input 13." "0,1" bitfld.long 0x0 12. "RT12,Rising trigger event configuration bit of configurable event input 12." "0,1" bitfld.long 0x0 11. "RT11,Rising trigger event configuration bit of configurable event input 11." "0,1" bitfld.long 0x0 10. "RT10,Rising trigger event configuration bit of configurable event input 10." "0,1" bitfld.long 0x0 9. "RT9,Rising trigger event configuration bit of configurable event input 9." "0,1" newline bitfld.long 0x0 8. "RT8,Rising trigger event configuration bit of configurable event input 8." "0,1" bitfld.long 0x0 7. "RT7,Rising trigger event configuration bit of configurable event input 7." "0,1" bitfld.long 0x0 6. "RT6,Rising trigger event configuration bit of configurable event input 6." "0,1" bitfld.long 0x0 5. "RT5,Rising trigger event configuration bit of configurable event input 5." "0,1" bitfld.long 0x0 4. "RT4,Rising trigger event configuration bit of configurable event input 4." "0,1" bitfld.long 0x0 3. "RT3,Rising trigger event configuration bit of configurable event input 3." "0,1" bitfld.long 0x0 2. "RT2,Rising trigger event configuration bit of configurable event input 2." "0,1" newline bitfld.long 0x0 1. "RT1,Rising trigger event configuration bit of configurable event input 1." "0,1" bitfld.long 0x0 0. "RT0,Rising trigger event configuration bit of configurable event input 0." "0,1" line.long 0x4 "EXTI2_FTSR1,EXTI2 falling trigger selection register" bitfld.long 0x4 15. "FT15,Falling trigger event configuration bit of configurable event input 15." "B_0x0,B_0x1" bitfld.long 0x4 14. "FT14,Falling trigger event configuration bit of configurable event input 14." "0,1" bitfld.long 0x4 13. "FT13,Falling trigger event configuration bit of configurable event input 13." "0,1" bitfld.long 0x4 12. "FT12,Falling trigger event configuration bit of configurable event input 12." "0,1" bitfld.long 0x4 11. "FT11,Falling trigger event configuration bit of configurable event input 11." "0,1" bitfld.long 0x4 10. "FT10,Falling trigger event configuration bit of configurable event input 10." "0,1" bitfld.long 0x4 9. "FT9,Falling trigger event configuration bit of configurable event input 9." "0,1" newline bitfld.long 0x4 8. "FT8,Falling trigger event configuration bit of configurable event input 8." "0,1" bitfld.long 0x4 7. "FT7,Falling trigger event configuration bit of configurable event input 7." "0,1" bitfld.long 0x4 6. "FT6,Falling trigger event configuration bit of configurable event input 6." "0,1" bitfld.long 0x4 5. "FT5,Falling trigger event configuration bit of configurable event input 5." "0,1" bitfld.long 0x4 4. "FT4,Falling trigger event configuration bit of configurable event input 4." "0,1" bitfld.long 0x4 3. "FT3,Falling trigger event configuration bit of configurable event input 3." "0,1" bitfld.long 0x4 2. "FT2,Falling trigger event configuration bit of configurable event input 2." "0,1" newline bitfld.long 0x4 1. "FT1,Falling trigger event configuration bit of configurable event input 1." "0,1" bitfld.long 0x4 0. "FT0,Falling trigger event configuration bit of configurable event input 0." "0,1" line.long 0x8 "EXTI2_SWIER1,EXTI2 software interrupt event register" bitfld.long 0x8 15. "SWI15,Software interrupt on event 15." "B_0x0,B_0x1" bitfld.long 0x8 14. "SWI14,Software interrupt on event 14." "0,1" bitfld.long 0x8 13. "SWI13,Software interrupt on event 13." "0,1" bitfld.long 0x8 12. "SWI12,Software interrupt on event 12." "0,1" bitfld.long 0x8 11. "SWI11,Software interrupt on event 11." "0,1" bitfld.long 0x8 10. "SWI10,Software interrupt on event 10." "0,1" bitfld.long 0x8 9. "SWI9,Software interrupt on event 9." "0,1" newline bitfld.long 0x8 8. "SWI8,Software interrupt on event 8." "0,1" bitfld.long 0x8 7. "SWI7,Software interrupt on event 7." "0,1" bitfld.long 0x8 6. "SWI6,Software interrupt on event 6." "0,1" bitfld.long 0x8 5. "SWI5,Software interrupt on event 5." "0,1" bitfld.long 0x8 4. "SWI4,Software interrupt on event 4." "0,1" bitfld.long 0x8 3. "SWI3,Software interrupt on event 3." "0,1" bitfld.long 0x8 2. "SWI2,Software interrupt on event 2." "0,1" newline bitfld.long 0x8 1. "SWI1,Software interrupt on event 1." "0,1" bitfld.long 0x8 0. "SWI0,Software interrupt on event 0." "0,1" line.long 0xC "EXTI2_RPR1,EXTI2 rising edge pending register" bitfld.long 0xC 15. "RPIF15,configurable event input 15 rising edge Pending bit." "B_0x0,B_0x1" bitfld.long 0xC 14. "RPIF14,configurable event input 14 rising edge Pending bit." "0,1" bitfld.long 0xC 13. "RPIF13,configurable event input 13 rising edge Pending bit." "0,1" bitfld.long 0xC 12. "RPIF12,configurable event input 12 rising edge Pending bit." "0,1" bitfld.long 0xC 11. "RPIF11,configurable event input 11 rising edge Pending bit." "0,1" bitfld.long 0xC 10. "RPIF10,configurable event input 10 rising edge Pending bit." "0,1" bitfld.long 0xC 9. "RPIF9,configurable event input 9 rising edge Pending bit." "0,1" newline bitfld.long 0xC 8. "RPIF8,configurable event input 8 rising edge Pending bit." "0,1" bitfld.long 0xC 7. "RPIF7,configurable event input 7 rising edge Pending bit." "0,1" bitfld.long 0xC 6. "RPIF6,configurable event input 6 rising edge Pending bit." "0,1" bitfld.long 0xC 5. "RPIF5,configurable event input 5 rising edge Pending bit" "0,1" bitfld.long 0xC 4. "RPIF4,configurable event input 4 rising edge Pending bit." "0,1" bitfld.long 0xC 3. "RPIF3,configurable event input 3 rising edge Pending bit." "0,1" bitfld.long 0xC 2. "RPIF2,configurable event input 2 rising edge Pending bit." "0,1" newline bitfld.long 0xC 1. "RPIF1,configurable event input 1 rising edge Pending bit." "0,1" bitfld.long 0xC 0. "RPIF0,configurable event input 0 rising edge Pending bit." "0,1" line.long 0x10 "EXTI2_FPR1,EXTI2 falling edge pending register" bitfld.long 0x10 15. "FPIF15,configurable event input 15 falling edge pending bit." "B_0x0,B_0x1" bitfld.long 0x10 14. "FPIF14,configurable event input 14 falling edge pending bit." "0,1" bitfld.long 0x10 13. "FPIF13,configurable event input 13 falling edge pending bit." "0,1" bitfld.long 0x10 12. "FPIF12,configurable event input 12 falling edge pending bit." "0,1" bitfld.long 0x10 11. "FPIF11,configurable event input 11 falling edge pending bit." "0,1" bitfld.long 0x10 10. "FPIF10,configurable event input 10 falling edge pending bit." "0,1" bitfld.long 0x10 9. "FPIF9,configurable event input 9 falling edge pending bit." "0,1" newline bitfld.long 0x10 8. "FPIF8,configurable event input 8 falling edge pending bit." "0,1" bitfld.long 0x10 7. "FPIF7,configurable event input 7 falling edge pending bit." "0,1" bitfld.long 0x10 6. "FPIF6,configurable event input 6 falling edge pending bit." "0,1" bitfld.long 0x10 5. "FPIF5,configurable event input 5 falling edge pending bit." "0,1" bitfld.long 0x10 4. "FPIF4,configurable event input 4 falling edge pending bit." "0,1" bitfld.long 0x10 3. "FPIF3,configurable event input 3 falling edge pending bit." "0,1" bitfld.long 0x10 2. "FPIF2,configurable event input 2 falling edge pending bit." "0,1" newline bitfld.long 0x10 1. "FPIF1,configurable event input 1 falling edge pending bit." "0,1" bitfld.long 0x10 0. "FPIF0,configurable event input 0 falling edge pending bit." "0,1" line.long 0x14 "EXTI2_SECCFGR1,EXTI2 security configuration register" bitfld.long 0x14 31. "SEC31,Security enable on event input 31." "B_0x0,B_0x1" bitfld.long 0x14 30. "SEC30,Security enable on event input 30." "0,1" bitfld.long 0x14 29. "SEC29,Security enable on event input 29." "0,1" bitfld.long 0x14 27. "SEC27,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 26. "SEC26,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 25. "SEC25,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 24. "SEC24,Security enable on event input n. (where n = 27 to 0)" "0,1" newline bitfld.long 0x14 23. "SEC23,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 22. "SEC22,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 21. "SEC21,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 20. "SEC20,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 19. "SEC19,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 18. "SEC18,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 17. "SEC17,Security enable on event input n. (where n = 27 to 0)" "0,1" newline bitfld.long 0x14 16. "SEC16,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 15. "SEC15,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 14. "SEC14,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 13. "SEC13,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 12. "SEC12,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 11. "SEC11,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 10. "SEC10,Security enable on event input n. (where n = 27 to 0)" "0,1" newline bitfld.long 0x14 9. "SEC9,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 8. "SEC8,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 7. "SEC7,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 6. "SEC6,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 5. "SEC5,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 4. "SEC4,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 3. "SEC3,Security enable on event input n. (where n = 27 to 0)" "0,1" newline bitfld.long 0x14 2. "SEC2,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 1. "SEC1,Security enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x14 0. "SEC0,Security enable on event input n. (where n = 27 to 0)" "0,1" line.long 0x18 "EXTI2_PRIVCFGR1,EXTI2 Privilege configuration register" bitfld.long 0x18 31. "PRIV31,Privilege enable on event input 31." "B_0x0,B_0x1" bitfld.long 0x18 30. "PRIV30,Privilege enable on event input 30." "0,1" bitfld.long 0x18 29. "PRIV29,Privilege enable on event input 29." "0,1" bitfld.long 0x18 27. "PRIV27,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 26. "PRIV26,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 25. "PRIV25,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 24. "PRIV24,Privilege enable on event input n. (where n = 27 to 0)" "0,1" newline bitfld.long 0x18 23. "PRIV23,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 22. "PRIV22,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 21. "PRIV21,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 20. "PRIV20,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 19. "PRIV19,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 18. "PRIV18,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 17. "PRIV17,Privilege enable on event input n. (where n = 27 to 0)" "0,1" newline bitfld.long 0x18 16. "PRIV16,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 15. "PRIV15,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 14. "PRIV14,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 13. "PRIV13,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 12. "PRIV12,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 11. "PRIV11,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 10. "PRIV10,Privilege enable on event input n. (where n = 27 to 0)" "0,1" newline bitfld.long 0x18 9. "PRIV9,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 8. "PRIV8,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 7. "PRIV7,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 6. "PRIV6,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 5. "PRIV5,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 4. "PRIV4,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 3. "PRIV3,Privilege enable on event input n. (where n = 27 to 0)" "0,1" newline bitfld.long 0x18 2. "PRIV2,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 1. "PRIV1,Privilege enable on event input n. (where n = 27 to 0)" "0,1" bitfld.long 0x18 0. "PRIV0,Privilege enable on event input n. (where n = 27 to 0)" "0,1" group.long 0x20++0x1B line.long 0x0 "EXTI2_RTSR2,EXTI2 rising trigger selection register" bitfld.long 0x0 29. "RT61,Rising trigger event configuration bit of configurable event input 61." "B_0x0,B_0x1" bitfld.long 0x0 28. "RT60,Rising trigger event configuration bit of configurable event input 60." "0,1" bitfld.long 0x0 27. "RT59,Rising trigger event configuration bit of configurable event input 59." "0,1" bitfld.long 0x0 19. "RT51,Rising trigger event configuration bit of configurable event input 51." "0,1" bitfld.long 0x0 18. "RT50,Rising trigger event configuration bit of configurable event input 50." "0,1" bitfld.long 0x0 17. "RT49,Rising trigger event configuration bit of configurable event input 49." "0,1" bitfld.long 0x0 16. "RT48,Rising trigger event configuration bit of configurable event input 48." "0,1" newline bitfld.long 0x0 15. "RT47,Rising trigger event configuration bit of configurable event input 47." "0,1" bitfld.long 0x0 14. "RT46,Rising trigger event configuration bit of configurable event input 46." "0,1" line.long 0x4 "EXTI2_FTSR2,EXTI2 falling trigger selection register" bitfld.long 0x4 29. "FT61,Falling trigger event configuration bit of configurable event input 61." "B_0x0,B_0x1" bitfld.long 0x4 28. "FT60,Falling trigger event configuration bit of configurable event input 60." "0,1" bitfld.long 0x4 27. "FT59,Falling trigger event configuration bit of configurable event input 59." "0,1" bitfld.long 0x4 19. "FT51,Falling trigger event configuration bit of configurable event input 51." "0,1" bitfld.long 0x4 18. "FT50,Falling trigger event configuration bit of configurable event input 50." "0,1" bitfld.long 0x4 17. "FT49,Falling trigger event configuration bit of configurable event input 49." "0,1" bitfld.long 0x4 16. "FT48,Falling trigger event configuration bit of configurable event input 48." "0,1" newline bitfld.long 0x4 15. "FT47,Falling trigger event configuration bit of configurable event input 47." "0,1" bitfld.long 0x4 14. "FT46,Falling trigger event configuration bit of configurable event input 46." "0,1" line.long 0x8 "EXTI2_SWIER2,EXTI2 software interrupt event register" bitfld.long 0x8 29. "SWI61,Software interrupt on event 61." "B_0x0,B_0x1" bitfld.long 0x8 28. "SWI60,Software interrupt on event 60." "0,1" bitfld.long 0x8 27. "SWI59,Software interrupt on event 59." "0,1" bitfld.long 0x8 19. "SWI51,Software interrupt on event 51." "0,1" bitfld.long 0x8 18. "SWI50,Software interrupt on event 50." "0,1" bitfld.long 0x8 17. "SWI49,Software interrupt on event 49." "0,1" bitfld.long 0x8 16. "SWI48,Software interrupt on event 48." "0,1" newline bitfld.long 0x8 15. "SWI47,Software interrupt on event 47." "0,1" bitfld.long 0x8 14. "SWI46,Software interrupt on event 46." "0,1" line.long 0xC "EXTI2_RPR2,EXTI2 rising edge pending register" bitfld.long 0xC 29. "RPIF61,configurable event input 61 rising edge Pending bit." "B_0x0,B_0x1" bitfld.long 0xC 28. "RPIF60,configurable event input 60 rising edge Pending bit." "0,1" bitfld.long 0xC 27. "RPIF59,configurable event input 59 rising edge Pending bit." "0,1" bitfld.long 0xC 19. "RPIF51,configurable event input 51 rising edge Pending bit." "0,1" bitfld.long 0xC 18. "RPIF50,configurable event input 50 rising edge Pending bit." "0,1" bitfld.long 0xC 17. "RPIF49,configurable event input 49 rising edge Pending bit." "0,1" bitfld.long 0xC 16. "RPIF48,configurable event input 48 rising edge Pending bit." "0,1" newline bitfld.long 0xC 15. "RPIF47,configurable event input 47 rising edge Pending bit." "0,1" bitfld.long 0xC 14. "RPIF46,configurable event input 46 rising edge Pending bit." "0,1" line.long 0x10 "EXTI2_FPR2,EXTI2 falling edge pending register" bitfld.long 0x10 29. "FPIF61,configurable event input 61 pending bit." "B_0x0,B_0x1" bitfld.long 0x10 28. "FPIF60,configurable event input 60 pending bit." "0,1" bitfld.long 0x10 27. "FPIF59,configurable event input 59 pending bit." "0,1" bitfld.long 0x10 19. "FPIF51,configurable event input 51 pending bit." "0,1" bitfld.long 0x10 18. "FPIF50,configurable event input 50 pending bit." "0,1" bitfld.long 0x10 17. "FPIF49,configurable event input 49 pending bit." "0,1" bitfld.long 0x10 16. "FPIF48,configurable event input 48 pending bit." "0,1" newline bitfld.long 0x10 15. "FPIF47,configurable event input 47 pending bit." "0,1" bitfld.long 0x10 14. "FPIF46,configurable event input 46 pending bit." "0,1" line.long 0x14 "EXTI2_SECCFGR2,EXTI2 security enable register" bitfld.long 0x14 31. "SEC63,Security enable on event input 63." "B_0x0,B_0x1" bitfld.long 0x14 30. "SEC62,Security enable on event input 62." "0,1" bitfld.long 0x14 29. "SEC61,Security enable on event input 61." "0,1" bitfld.long 0x14 28. "SEC60,Security enable on event input 60." "0,1" bitfld.long 0x14 27. "SEC59,Security enable on event input 59." "0,1" bitfld.long 0x14 24. "SEC56,Security enable on event input 56." "0,1" bitfld.long 0x14 23. "SEC55,Security enable on event input 55." "0,1" newline bitfld.long 0x14 22. "SEC54,Security enable on event input 54." "0,1" bitfld.long 0x14 21. "SEC53,Security enable on event input 53." "0,1" bitfld.long 0x14 20. "SEC52,Security enable on event input 52." "0,1" bitfld.long 0x14 19. "SEC51,Security enable on event input 51." "0,1" bitfld.long 0x14 18. "SEC50,Security enable on event input 50." "0,1" bitfld.long 0x14 17. "SEC49,Security enable on event input 49." "0,1" bitfld.long 0x14 16. "SEC48,Security enable on event input 48." "0,1" newline bitfld.long 0x14 15. "SEC47,Security enable on event input 47." "0,1" bitfld.long 0x14 14. "SEC46,Security enable on event input 46." "0,1" bitfld.long 0x14 12. "SEC44,Security enable on event input 44." "0,1" bitfld.long 0x14 11. "SEC43,Security enable on event input 43." "0,1" bitfld.long 0x14 10. "SEC42,Security enable on event input 42." "0,1" bitfld.long 0x14 9. "SEC41,Security enable on event input 41." "0,1" bitfld.long 0x14 8. "SEC40,Security enable on event input 40." "0,1" newline bitfld.long 0x14 6. "SEC38,Security enable on event input 38." "0,1" bitfld.long 0x14 5. "SEC37,Security enable on event input 37." "0,1" bitfld.long 0x14 4. "SEC36,Security enable on event input 36." "0,1" bitfld.long 0x14 3. "SEC35,Security enable on event input 35." "0,1" bitfld.long 0x14 2. "SEC34,Security enable on event input 34." "0,1" bitfld.long 0x14 1. "SEC33,Security enable on event input 33." "0,1" line.long 0x18 "EXTI2_PRIVCFGR2,EXTI2 Privilege enable register" bitfld.long 0x18 31. "PRIV63,Privilege enable on event input 63." "B_0x0,B_0x1" bitfld.long 0x18 30. "PRIV62,Privilege enable on event input 62." "0,1" bitfld.long 0x18 29. "PRIV61,Privilege enable on event input 61." "0,1" bitfld.long 0x18 28. "PRIV60,Privilege enable on event input 60." "0,1" bitfld.long 0x18 27. "PRIV59,Privilege enable on event input 59." "0,1" bitfld.long 0x18 24. "PRIV56,Privilege enable on event input 56." "0,1" bitfld.long 0x18 23. "PRIV55,Privilege enable on event input 55." "0,1" newline bitfld.long 0x18 22. "PRIV54,Privilege enable on event input 54." "0,1" bitfld.long 0x18 21. "PRIV53,Privilege enable on event input 53." "0,1" bitfld.long 0x18 20. "PRIV52,Privilege enable on event input 52." "0,1" bitfld.long 0x18 19. "PRIV51,Privilege enable on event input 51." "0,1" bitfld.long 0x18 18. "PRIV50,Privilege enable on event input 50." "0,1" bitfld.long 0x18 17. "PRIV49,Privilege enable on event input 49." "0,1" bitfld.long 0x18 16. "PRIV48,Privilege enable on event input 48." "0,1" newline bitfld.long 0x18 15. "PRIV47,Privilege enable on event input 47." "0,1" bitfld.long 0x18 14. "PRIV46,Privilege enable on event input 46." "0,1" bitfld.long 0x18 12. "PRIV44,Privilege enable on event input 44." "0,1" bitfld.long 0x18 11. "PRIV43,Privilege enable on event input 43." "0,1" bitfld.long 0x18 10. "PRIV42,Privilege enable on event input 42." "0,1" bitfld.long 0x18 9. "PRIV41,Privilege enable on event input 41." "0,1" bitfld.long 0x18 8. "PRIV40,Privilege enable on event input 40." "0,1" newline bitfld.long 0x18 6. "PRIV38,Privilege enable on event input 38." "0,1" bitfld.long 0x18 5. "PRIV37,Privilege enable on event input 37." "0,1" bitfld.long 0x18 4. "PRIV36,Privilege enable on event input 36." "0,1" bitfld.long 0x18 3. "PRIV35,Privilege enable on event input 35." "0,1" bitfld.long 0x18 2. "PRIV34,Privilege enable on event input 34." "0,1" bitfld.long 0x18 1. "PRIV33,Privilege enable on event input 33." "0,1" group.long 0x40++0x1B line.long 0x0 "EXTI2_RTSR3,EXTI2 rising trigger selection register" bitfld.long 0x0 2. "RT66,Rising trigger event configuration bit of configurable event input 66." "B_0x0,B_0x1" bitfld.long 0x0 1. "RT65,Rising trigger event configuration bit of configurable event input 65." "0,1" bitfld.long 0x0 0. "RT64,Rising trigger event configuration bit of configurable event input 64." "0,1" line.long 0x4 "EXTI2_FTSR3,EXTI2 falling trigger selection register" bitfld.long 0x4 2. "FT66,Falling trigger event configuration bit of configurable event input 66." "B_0x0,B_0x1" bitfld.long 0x4 1. "FT65,Falling trigger event configuration bit of configurable event input 65." "0,1" bitfld.long 0x4 0. "FT64,Falling trigger event configuration bit of configurable event input 64." "0,1" line.long 0x8 "EXTI2_SWIER3,EXTI2 software interrupt event register" bitfld.long 0x8 2. "SWI66,Software interrupt on event 66." "B_0x0,B_0x1" bitfld.long 0x8 1. "SWI65,Software interrupt on event 65." "0,1" bitfld.long 0x8 0. "SWI64,Software interrupt on event 64." "0,1" line.long 0xC "EXTI2_RPR3,EXTI2 rising edge pending register" bitfld.long 0xC 2. "RPIF66,configurable event input 66 rising edge pending bit." "B_0x0,B_0x1" bitfld.long 0xC 1. "RPIF65,configurable event input 65 rising edge pending bit." "0,1" bitfld.long 0xC 0. "RPIF64,configurable event input 64 rising edge pending bit." "0,1" line.long 0x10 "EXTI2_FPR3,EXTI2 falling edge pending register" bitfld.long 0x10 2. "FPIF66,configurable event input 66 falling edge pending bit." "B_0x0,B_0x1" bitfld.long 0x10 1. "FPIF65,configurable event input 65 falling edge pending bit." "0,1" bitfld.long 0x10 0. "FPIF64,configurable event input 64 falling edge pending bit." "0,1" line.long 0x14 "EXTI2_SECCFGR3,EXTI2 security enable register" bitfld.long 0x14 12. "SEC76,Security enable on event input 76." "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC70,Security enable on event input 70." "0,1" bitfld.long 0x14 5. "SEC69,Security enable on event input 69." "0,1" bitfld.long 0x14 4. "SEC68,Security enable on event input 68." "0,1" bitfld.long 0x14 3. "SEC67,Security enable on event input 67." "0,1" bitfld.long 0x14 2. "SEC66,Security enable on event input 66." "0,1" bitfld.long 0x14 1. "SEC65,Security enable on event input 65." "0,1" newline bitfld.long 0x14 0. "SEC64,Security enable on event input 64." "0,1" line.long 0x18 "EXTI2_PRIVCFGR3,EXTI2 Privilege enable register" bitfld.long 0x18 12. "PRIV76,Privilege enable on event input 76." "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV70,Privilege enable on event input 70." "0,1" bitfld.long 0x18 5. "PRIV69,Privilege enable on event input 69." "0,1" bitfld.long 0x18 4. "PRIV68,Privilege enable on event input 68." "0,1" bitfld.long 0x18 3. "PRIV67,Privilege enable on event input 67." "0,1" bitfld.long 0x18 2. "PRIV66,Privilege enable on event input 66." "0,1" bitfld.long 0x18 1. "PRIV65,Privilege enable on event input 65." "0,1" newline bitfld.long 0x18 0. "PRIV64,Privilege enable on event input 64." "0,1" group.long 0x60++0x13 line.long 0x0 "EXTI2_EXTICR1" hexmask.long.byte 0x0 24.--31. 1. "EXTI3,EXTI3 GPIO port selection." hexmask.long.byte 0x0 16.--23. 1. "EXTI2,EXTI2 GPIO port selection." hexmask.long.byte 0x0 8.--15. 1. "EXTI1,EXTI1 GPIO port selection." hexmask.long.byte 0x0 0.--7. 1. "EXTI0,EXTI0 GPIO port selection." line.long 0x4 "EXTI2_EXTICR2" hexmask.long.byte 0x4 24.--31. 1. "EXTI7,EXTI7 GPIO port selection." hexmask.long.byte 0x4 16.--23. 1. "EXTI6,EXTI6 GPIO port selection." hexmask.long.byte 0x4 8.--15. 1. "EXTI5,EXTI5 GPIO port selection." hexmask.long.byte 0x4 0.--7. 1. "EXTI4,EXTI4 GPIO port selection." line.long 0x8 "EXTI2_EXTICR3" hexmask.long.byte 0x8 24.--31. 1. "EXTI11,EXTI11 GPIO port selection." hexmask.long.byte 0x8 16.--23. 1. "EXTI10,EXTI10 GPIO port selection." hexmask.long.byte 0x8 8.--15. 1. "EXTI9,EXTI9 GPIO port selection." hexmask.long.byte 0x8 0.--7. 1. "EXTI8,EXTI8 GPIO port selection." line.long 0xC "EXTI2_EXTICR4" hexmask.long.byte 0xC 24.--31. 1. "EXTI15,EXTI15 GPIO port selection." hexmask.long.byte 0xC 16.--23. 1. "EXTI14,EXTI14 GPIO port selection." hexmask.long.byte 0xC 8.--15. 1. "EXTI13,EXTI13 GPIO port selection." hexmask.long.byte 0xC 0.--7. 1. "EXTI12,EXTIp GPIO port selection." line.long 0x10 "EXTI2_LOCKR,EXTI2 lock register" bitfld.long 0x10 0. "GLOCK,Global security privilege and CID configuration registers EXTI2_SECCFGRx EXTI2_PRIVCFGRx EXTI2_EnCIDCFGR and EXTI2_CmCIDCFGR lock." "B_0x0,B_0x1" group.long 0x80++0x3 line.long 0x0 "EXTI2_C1IMR1,EXTI2 CPU1 wakeup with interrupt mask register" bitfld.long 0x0 31. "IM31,CPUm wakeup with interrupt mask on event input 31." "B_0x0,B_0x1" bitfld.long 0x0 30. "IM30,CPUm wakeup with interrupt mask on event input 30." "0,1" bitfld.long 0x0 29. "IM29,CPUm wakeup with interrupt mask on event input 29." "0,1" bitfld.long 0x0 27. "IM27,CPUm wakeup with interrupt mask on event input 27." "0,1" bitfld.long 0x0 26. "IM26,CPUm wakeup with interrupt mask on event input 26." "0,1" bitfld.long 0x0 25. "IM25,CPUm wakeup with interrupt mask on event input 25." "0,1" bitfld.long 0x0 24. "IM24,CPUm wakeup with interrupt mask on event input 24." "0,1" newline bitfld.long 0x0 23. "IM23,CPUm wakeup with interrupt mask on event input 23." "0,1" bitfld.long 0x0 22. "IM22,CPUm wakeup with interrupt mask on event input 22." "0,1" bitfld.long 0x0 21. "IM21,CPUm wakeup with interrupt mask on event input 21." "0,1" bitfld.long 0x0 20. "IM20,CPUm wakeup with interrupt mask on event input 20." "0,1" bitfld.long 0x0 19. "IM19,CPUm wakeup with interrupt mask on event input 19." "0,1" bitfld.long 0x0 18. "IM18,CPUm wakeup with interrupt mask on event input 18." "0,1" bitfld.long 0x0 17. "IM17,CPUm wakeup with interrupt mask on event input 17." "0,1" newline bitfld.long 0x0 16. "IM16,CPUm wakeup with interrupt mask on event input 16." "0,1" bitfld.long 0x0 15. "IM15,CPUm wakeup with interrupt mask on event input 15." "0,1" bitfld.long 0x0 14. "IM14,CPUm wakeup with interrupt mask on event input 14." "0,1" bitfld.long 0x0 13. "IM13,CPUm wakeup with interrupt mask on event input 13." "0,1" bitfld.long 0x0 12. "IM12,CPUm wakeup with interrupt mask on event input 12." "0,1" bitfld.long 0x0 11. "IM11,CPUm wakeup with interrupt mask on event input 11." "0,1" bitfld.long 0x0 10. "IM10,CPUm wakeup with interrupt mask on event input 10." "0,1" newline bitfld.long 0x0 9. "IM9,CPUm wakeup with interrupt mask on event input 9." "0,1" bitfld.long 0x0 8. "IM8,CPUm wakeup with interrupt mask on event input 8." "0,1" bitfld.long 0x0 7. "IM7,CPUm wakeup with interrupt mask on event input 7." "0,1" bitfld.long 0x0 6. "IM6,CPUm wakeup with interrupt mask on event input 6." "0,1" bitfld.long 0x0 5. "IM5,CPUm wakeup with interrupt mask on event input 5." "0,1" bitfld.long 0x0 4. "IM4,CPUm wakeup with interrupt mask on event input 4." "0,1" bitfld.long 0x0 3. "IM3,CPUm wakeup with interrupt mask on event input 3." "0,1" newline bitfld.long 0x0 2. "IM2,CPUm wakeup with interrupt mask on event input 2." "0,1" bitfld.long 0x0 1. "IM1,CPUm wakeup with interrupt mask on event input 1." "0,1" bitfld.long 0x0 0. "IM0,CPUm wakeup with interrupt mask on event input 0." "0,1" group.long 0x90++0x3 line.long 0x0 "EXTI2_C1IMR2,EXTI2 CPU1 wakeup with interrupt mask register" bitfld.long 0x0 31. "IM63,CPUm wakeup with interrupt mask on event input 63." "B_0x0,B_0x1" bitfld.long 0x0 30. "IM62,CPUm wakeup with interrupt mask on event input 62." "0,1" bitfld.long 0x0 29. "IM61,CPUm wakeup with interrupt mask on event input 61." "0,1" bitfld.long 0x0 28. "IM60,CPUm wakeup with interrupt mask on event input 60." "0,1" bitfld.long 0x0 27. "IM59,CPUm wakeup with interrupt mask on event input 59." "0,1" bitfld.long 0x0 24. "IM56,CPUm wakeup with interrupt mask on event input 56." "0,1" bitfld.long 0x0 23. "IM55,CPUm wakeup with interrupt mask on event input 55." "0,1" newline bitfld.long 0x0 22. "IM54,CPUm wakeup with interrupt mask on event input 54." "0,1" bitfld.long 0x0 21. "IM53,CPUm wakeup with interrupt mask on event input 53." "0,1" bitfld.long 0x0 20. "IM52,CPUm wakeup with interrupt mask on event input 52." "0,1" bitfld.long 0x0 19. "IM51,CPUm wakeup with interrupt mask on event input 51." "0,1" bitfld.long 0x0 18. "IM50,CPUm wakeup with interrupt mask on event input 50." "0,1" bitfld.long 0x0 17. "IM49,CPUm wakeup with interrupt mask on event input 49." "0,1" bitfld.long 0x0 16. "IM48,CPUm wakeup with interrupt mask on event input 48." "0,1" newline bitfld.long 0x0 15. "IM47,CPUm wakeup with interrupt mask on event input 47." "0,1" bitfld.long 0x0 14. "IM46,CPUm wakeup with interrupt mask on event input 46." "0,1" bitfld.long 0x0 12. "IM44,CPUm wakeup with interrupt mask on event input 44." "0,1" bitfld.long 0x0 11. "IM43,CPUm wakeup with interrupt mask on event input 43." "0,1" bitfld.long 0x0 10. "IM42,CPUm wakeup with interrupt mask on event input 42." "0,1" bitfld.long 0x0 9. "IM41,CPUm wakeup with interrupt mask on event input 41." "0,1" bitfld.long 0x0 8. "IM40,CPUm wakeup with interrupt mask on event input 40." "0,1" newline bitfld.long 0x0 6. "IM38,CPUm wakeup with interrupt mask on event input 38." "0,1" bitfld.long 0x0 5. "IM37,CPUm wakeup with interrupt mask on event input 37." "0,1" bitfld.long 0x0 4. "IM36,CPUm wakeup with interrupt mask on event input 36." "0,1" bitfld.long 0x0 3. "IM35,CPUm wakeup with interrupt mask on event input 35." "0,1" bitfld.long 0x0 2. "IM34,CPUm wakeup with interrupt mask on event input 34." "0,1" bitfld.long 0x0 1. "IM33,CPUm wakeup with interrupt mask on event input 33." "0,1" group.long 0xA0++0x3 line.long 0x0 "EXTI2_C1IMR3,EXTI2 CPU1 wakeup with interrupt mask register" bitfld.long 0x0 12. "IM76,CPUm wakeup with interrupt mask on event input 76." "B_0x0,B_0x1" bitfld.long 0x0 6. "IM70,CPUm wakeup with interrupt mask on event input 70." "0,1" bitfld.long 0x0 5. "IM69,CPUm wakeup with interrupt mask on event input 69." "0,1" bitfld.long 0x0 4. "IM68,CPUm wakeup with interrupt mask on event input 68." "0,1" bitfld.long 0x0 3. "IM67,CPUm wakeup with interrupt mask on event input 67." "0,1" bitfld.long 0x0 2. "IM66,CPUm wakeup with interrupt mask on event input 66." "0,1" bitfld.long 0x0 1. "IM65,CPUm wakeup with interrupt mask on event input 65." "0,1" newline bitfld.long 0x0 0. "IM64,CPUm wakeup with interrupt mask on event input 64." "0,1" group.long 0xC0++0x7 line.long 0x0 "EXTI2_C2IMR1,EXTI2 CPU2 wakeup with interrupt mask register" bitfld.long 0x0 31. "IM31,CPUm wakeup with interrupt mask on event input 31." "B_0x0,B_0x1" bitfld.long 0x0 30. "IM30,CPUm wakeup with interrupt mask on event input 30." "0,1" bitfld.long 0x0 29. "IM29,CPUm wakeup with interrupt mask on event input 29." "0,1" bitfld.long 0x0 27. "IM27,CPUm wakeup with interrupt mask on event input 27." "0,1" bitfld.long 0x0 26. "IM26,CPUm wakeup with interrupt mask on event input 26." "0,1" bitfld.long 0x0 25. "IM25,CPUm wakeup with interrupt mask on event input 25." "0,1" bitfld.long 0x0 24. "IM24,CPUm wakeup with interrupt mask on event input 24." "0,1" newline bitfld.long 0x0 23. "IM23,CPUm wakeup with interrupt mask on event input 23." "0,1" bitfld.long 0x0 22. "IM22,CPUm wakeup with interrupt mask on event input 22." "0,1" bitfld.long 0x0 21. "IM21,CPUm wakeup with interrupt mask on event input 21." "0,1" bitfld.long 0x0 20. "IM20,CPUm wakeup with interrupt mask on event input 20." "0,1" bitfld.long 0x0 19. "IM19,CPUm wakeup with interrupt mask on event input 19." "0,1" bitfld.long 0x0 18. "IM18,CPUm wakeup with interrupt mask on event input 18." "0,1" bitfld.long 0x0 17. "IM17,CPUm wakeup with interrupt mask on event input 17." "0,1" newline bitfld.long 0x0 16. "IM16,CPUm wakeup with interrupt mask on event input 16." "0,1" bitfld.long 0x0 15. "IM15,CPUm wakeup with interrupt mask on event input 15." "0,1" bitfld.long 0x0 14. "IM14,CPUm wakeup with interrupt mask on event input 14." "0,1" bitfld.long 0x0 13. "IM13,CPUm wakeup with interrupt mask on event input 13." "0,1" bitfld.long 0x0 12. "IM12,CPUm wakeup with interrupt mask on event input 12." "0,1" bitfld.long 0x0 11. "IM11,CPUm wakeup with interrupt mask on event input 11." "0,1" bitfld.long 0x0 10. "IM10,CPUm wakeup with interrupt mask on event input 10." "0,1" newline bitfld.long 0x0 9. "IM9,CPUm wakeup with interrupt mask on event input 9." "0,1" bitfld.long 0x0 8. "IM8,CPUm wakeup with interrupt mask on event input 8." "0,1" bitfld.long 0x0 7. "IM7,CPUm wakeup with interrupt mask on event input 7." "0,1" bitfld.long 0x0 6. "IM6,CPUm wakeup with interrupt mask on event input 6." "0,1" bitfld.long 0x0 5. "IM5,CPUm wakeup with interrupt mask on event input 5." "0,1" bitfld.long 0x0 4. "IM4,CPUm wakeup with interrupt mask on event input 4." "0,1" bitfld.long 0x0 3. "IM3,CPUm wakeup with interrupt mask on event input 3." "0,1" newline bitfld.long 0x0 2. "IM2,CPUm wakeup with interrupt mask on event input 2." "0,1" bitfld.long 0x0 1. "IM1,CPUm wakeup with interrupt mask on event input 1." "0,1" bitfld.long 0x0 0. "IM0,CPUm wakeup with interrupt mask on event input 0." "0,1" line.long 0x4 "EXTI2_C2EMR1,EXTI2 CPU2 wakeup with event mask register" bitfld.long 0x4 15. "EM15,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 14. "EM14,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 13. "EM13,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 12. "EM12,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 11. "EM11,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 10. "EM10,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 9. "EM9,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x4 8. "EM8,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 7. "EM7,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 6. "EM6,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 5. "EM5,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 4. "EM4,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 3. "EM3,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 2. "EM2,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "EM1,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 0. "EM0,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" group.long 0xD0++0x7 line.long 0x0 "EXTI2_C2IMR2,EXTI2 CPU2 wakeup with interrupt mask register" bitfld.long 0x0 31. "IM63,CPUm wakeup with interrupt mask on event input 63." "B_0x0,B_0x1" bitfld.long 0x0 30. "IM62,CPUm wakeup with interrupt mask on event input 62." "0,1" bitfld.long 0x0 29. "IM61,CPUm wakeup with interrupt mask on event input 61." "0,1" bitfld.long 0x0 28. "IM60,CPUm wakeup with interrupt mask on event input 60." "0,1" bitfld.long 0x0 27. "IM59,CPUm wakeup with interrupt mask on event input 59." "0,1" bitfld.long 0x0 24. "IM56,CPUm wakeup with interrupt mask on event input 56." "0,1" bitfld.long 0x0 23. "IM55,CPUm wakeup with interrupt mask on event input 55." "0,1" newline bitfld.long 0x0 22. "IM54,CPUm wakeup with interrupt mask on event input 54." "0,1" bitfld.long 0x0 21. "IM53,CPUm wakeup with interrupt mask on event input 53." "0,1" bitfld.long 0x0 20. "IM52,CPUm wakeup with interrupt mask on event input 52." "0,1" bitfld.long 0x0 19. "IM51,CPUm wakeup with interrupt mask on event input 51." "0,1" bitfld.long 0x0 18. "IM50,CPUm wakeup with interrupt mask on event input 50." "0,1" bitfld.long 0x0 17. "IM49,CPUm wakeup with interrupt mask on event input 49." "0,1" bitfld.long 0x0 16. "IM48,CPUm wakeup with interrupt mask on event input 48." "0,1" newline bitfld.long 0x0 15. "IM47,CPUm wakeup with interrupt mask on event input 47." "0,1" bitfld.long 0x0 14. "IM46,CPUm wakeup with interrupt mask on event input 46." "0,1" bitfld.long 0x0 12. "IM44,CPUm wakeup with interrupt mask on event input 44." "0,1" bitfld.long 0x0 11. "IM43,CPUm wakeup with interrupt mask on event input 43." "0,1" bitfld.long 0x0 10. "IM42,CPUm wakeup with interrupt mask on event input 42." "0,1" bitfld.long 0x0 9. "IM41,CPUm wakeup with interrupt mask on event input 41." "0,1" bitfld.long 0x0 8. "IM40,CPUm wakeup with interrupt mask on event input 40." "0,1" newline bitfld.long 0x0 6. "IM38,CPUm wakeup with interrupt mask on event input 38." "0,1" bitfld.long 0x0 5. "IM37,CPUm wakeup with interrupt mask on event input 37." "0,1" bitfld.long 0x0 4. "IM36,CPUm wakeup with interrupt mask on event input 36." "0,1" bitfld.long 0x0 3. "IM35,CPUm wakeup with interrupt mask on event input 35." "0,1" bitfld.long 0x0 2. "IM34,CPUm wakeup with interrupt mask on event input 34." "0,1" bitfld.long 0x0 1. "IM33,CPUm wakeup with interrupt mask on event input 33." "0,1" line.long 0x4 "EXTI2_C2EMR2,EXTI2 CPU2 wakeup with event mask register" bitfld.long 0x4 29. "EM61,CPU(m) wakeup with event generation mask on event input 61." "B_0x0,B_0x1" bitfld.long 0x4 28. "EM60,CPU(m) wakeup with event generation mask on event input 60." "0,1" bitfld.long 0x4 27. "EM59,CPU(m) wakeup with event generation mask on event input 59." "0,1" group.long 0xE0++0x3 line.long 0x0 "EXTI2_C2IMR3,EXTI2 CPU2 wakeup with interrupt mask register" bitfld.long 0x0 12. "IM76,CPUm wakeup with interrupt mask on event input 76." "B_0x0,B_0x1" bitfld.long 0x0 6. "IM70,CPUm wakeup with interrupt mask on event input 70." "0,1" bitfld.long 0x0 5. "IM69,CPUm wakeup with interrupt mask on event input 69." "0,1" bitfld.long 0x0 4. "IM68,CPUm wakeup with interrupt mask on event input 68." "0,1" bitfld.long 0x0 3. "IM67,CPUm wakeup with interrupt mask on event input 67." "0,1" bitfld.long 0x0 2. "IM66,CPUm wakeup with interrupt mask on event input 66." "0,1" bitfld.long 0x0 1. "IM65,CPUm wakeup with interrupt mask on event input 65." "0,1" newline bitfld.long 0x0 0. "IM64,CPUm wakeup with interrupt mask on event input 64." "0,1" group.long 0x100++0x7 line.long 0x0 "EXTI2_C3IMR1,EXTI2 CPU3 wakeup with interrupt mask register" bitfld.long 0x0 31. "IM31,CPUm wakeup with interrupt mask on event input 31." "B_0x0,B_0x1" bitfld.long 0x0 30. "IM30,CPUm wakeup with interrupt mask on event input 30." "0,1" bitfld.long 0x0 29. "IM29,CPUm wakeup with interrupt mask on event input 29." "0,1" bitfld.long 0x0 27. "IM27,CPUm wakeup with interrupt mask on event input 27." "0,1" bitfld.long 0x0 26. "IM26,CPUm wakeup with interrupt mask on event input 26." "0,1" bitfld.long 0x0 25. "IM25,CPUm wakeup with interrupt mask on event input 25." "0,1" bitfld.long 0x0 24. "IM24,CPUm wakeup with interrupt mask on event input 24." "0,1" newline bitfld.long 0x0 23. "IM23,CPUm wakeup with interrupt mask on event input 23." "0,1" bitfld.long 0x0 22. "IM22,CPUm wakeup with interrupt mask on event input 22." "0,1" bitfld.long 0x0 21. "IM21,CPUm wakeup with interrupt mask on event input 21." "0,1" bitfld.long 0x0 20. "IM20,CPUm wakeup with interrupt mask on event input 20." "0,1" bitfld.long 0x0 19. "IM19,CPUm wakeup with interrupt mask on event input 19." "0,1" bitfld.long 0x0 18. "IM18,CPUm wakeup with interrupt mask on event input 18." "0,1" bitfld.long 0x0 17. "IM17,CPUm wakeup with interrupt mask on event input 17." "0,1" newline bitfld.long 0x0 16. "IM16,CPUm wakeup with interrupt mask on event input 16." "0,1" bitfld.long 0x0 15. "IM15,CPUm wakeup with interrupt mask on event input 15." "0,1" bitfld.long 0x0 14. "IM14,CPUm wakeup with interrupt mask on event input 14." "0,1" bitfld.long 0x0 13. "IM13,CPUm wakeup with interrupt mask on event input 13." "0,1" bitfld.long 0x0 12. "IM12,CPUm wakeup with interrupt mask on event input 12." "0,1" bitfld.long 0x0 11. "IM11,CPUm wakeup with interrupt mask on event input 11." "0,1" bitfld.long 0x0 10. "IM10,CPUm wakeup with interrupt mask on event input 10." "0,1" newline bitfld.long 0x0 9. "IM9,CPUm wakeup with interrupt mask on event input 9." "0,1" bitfld.long 0x0 8. "IM8,CPUm wakeup with interrupt mask on event input 8." "0,1" bitfld.long 0x0 7. "IM7,CPUm wakeup with interrupt mask on event input 7." "0,1" bitfld.long 0x0 6. "IM6,CPUm wakeup with interrupt mask on event input 6." "0,1" bitfld.long 0x0 5. "IM5,CPUm wakeup with interrupt mask on event input 5." "0,1" bitfld.long 0x0 4. "IM4,CPUm wakeup with interrupt mask on event input 4." "0,1" bitfld.long 0x0 3. "IM3,CPUm wakeup with interrupt mask on event input 3." "0,1" newline bitfld.long 0x0 2. "IM2,CPUm wakeup with interrupt mask on event input 2." "0,1" bitfld.long 0x0 1. "IM1,CPUm wakeup with interrupt mask on event input 1." "0,1" bitfld.long 0x0 0. "IM0,CPUm wakeup with interrupt mask on event input 0." "0,1" line.long 0x4 "EXTI2_C3EMR1,EXTI2 CPU3 wakeup with event mask register" bitfld.long 0x4 15. "EM15,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 14. "EM14,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 13. "EM13,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 12. "EM12,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 11. "EM11,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 10. "EM10,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 9. "EM9,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x4 8. "EM8,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 7. "EM7,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 6. "EM6,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 5. "EM5,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 4. "EM4,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 3. "EM3,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 2. "EM2,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "EM1,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" bitfld.long 0x4 0. "EM0,CPU(m) wakeup with event generation mask on event input n. (where n = 15 to 0)" "B_0x0,B_0x1" group.long 0x110++0x7 line.long 0x0 "EXTI2_C3IMR2,EXTI2 CPU3 wakeup with interrupt mask register" bitfld.long 0x0 31. "IM63,CPUm wakeup with interrupt mask on event input 63." "B_0x0,B_0x1" bitfld.long 0x0 30. "IM62,CPUm wakeup with interrupt mask on event input 62." "0,1" bitfld.long 0x0 29. "IM61,CPUm wakeup with interrupt mask on event input 61." "0,1" bitfld.long 0x0 28. "IM60,CPUm wakeup with interrupt mask on event input 60." "0,1" bitfld.long 0x0 27. "IM59,CPUm wakeup with interrupt mask on event input 59." "0,1" bitfld.long 0x0 24. "IM56,CPUm wakeup with interrupt mask on event input 56." "0,1" bitfld.long 0x0 23. "IM55,CPUm wakeup with interrupt mask on event input 55." "0,1" newline bitfld.long 0x0 22. "IM54,CPUm wakeup with interrupt mask on event input 54." "0,1" bitfld.long 0x0 21. "IM53,CPUm wakeup with interrupt mask on event input 53." "0,1" bitfld.long 0x0 20. "IM52,CPUm wakeup with interrupt mask on event input 52." "0,1" bitfld.long 0x0 19. "IM51,CPUm wakeup with interrupt mask on event input 51." "0,1" bitfld.long 0x0 18. "IM50,CPUm wakeup with interrupt mask on event input 50." "0,1" bitfld.long 0x0 17. "IM49,CPUm wakeup with interrupt mask on event input 49." "0,1" bitfld.long 0x0 16. "IM48,CPUm wakeup with interrupt mask on event input 48." "0,1" newline bitfld.long 0x0 15. "IM47,CPUm wakeup with interrupt mask on event input 47." "0,1" bitfld.long 0x0 14. "IM46,CPUm wakeup with interrupt mask on event input 46." "0,1" bitfld.long 0x0 12. "IM44,CPUm wakeup with interrupt mask on event input 44." "0,1" bitfld.long 0x0 11. "IM43,CPUm wakeup with interrupt mask on event input 43." "0,1" bitfld.long 0x0 10. "IM42,CPUm wakeup with interrupt mask on event input 42." "0,1" bitfld.long 0x0 9. "IM41,CPUm wakeup with interrupt mask on event input 41." "0,1" bitfld.long 0x0 8. "IM40,CPUm wakeup with interrupt mask on event input 40." "0,1" newline bitfld.long 0x0 6. "IM38,CPUm wakeup with interrupt mask on event input 38." "0,1" bitfld.long 0x0 5. "IM37,CPUm wakeup with interrupt mask on event input 37." "0,1" bitfld.long 0x0 4. "IM36,CPUm wakeup with interrupt mask on event input 36." "0,1" bitfld.long 0x0 3. "IM35,CPUm wakeup with interrupt mask on event input 35." "0,1" bitfld.long 0x0 2. "IM34,CPUm wakeup with interrupt mask on event input 34." "0,1" bitfld.long 0x0 1. "IM33,CPUm wakeup with interrupt mask on event input 33." "0,1" line.long 0x4 "EXTI2_C3EMR2,EXTI2 CPU3 wakeup with event mask register" bitfld.long 0x4 29. "EM61,CPU(m) wakeup with event generation mask on event input 61." "B_0x0,B_0x1" bitfld.long 0x4 28. "EM60,CPU(m) wakeup with event generation mask on event input 60." "0,1" bitfld.long 0x4 27. "EM59,CPU(m) wakeup with event generation mask on event input 59." "0,1" group.long 0x120++0x3 line.long 0x0 "EXTI2_C3IMR3,EXTI2 CPU3 wakeup with interrupt mask register" bitfld.long 0x0 12. "IM76,CPUm wakeup with interrupt mask on event input 76." "B_0x0,B_0x1" bitfld.long 0x0 6. "IM70,CPUm wakeup with interrupt mask on event input 70." "0,1" bitfld.long 0x0 5. "IM69,CPUm wakeup with interrupt mask on event input 69." "0,1" bitfld.long 0x0 4. "IM68,CPUm wakeup with interrupt mask on event input 68." "0,1" bitfld.long 0x0 3. "IM67,CPUm wakeup with interrupt mask on event input 67." "0,1" bitfld.long 0x0 2. "IM66,CPUm wakeup with interrupt mask on event input 66." "0,1" bitfld.long 0x0 1. "IM65,CPUm wakeup with interrupt mask on event input 65." "0,1" newline bitfld.long 0x0 0. "IM64,CPUm wakeup with interrupt mask on event input 64." "0,1" group.long 0x180++0x133 line.long 0x0 "EXTI2_E0CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x0 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "EXTI2_E1CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x4 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x8 "EXTI2_E2CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x8 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xC "EXTI2_E3CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xC 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x10 "EXTI2_E4CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x10 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x10 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "EXTI2_E5CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x14 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x18 "EXTI2_E6CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x18 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x18 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "EXTI2_E7CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x1C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x20 "EXTI2_E8CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x20 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x20 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "EXTI2_E9CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x24 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x24 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x28 "EXTI2_E10CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x28 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x28 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "EXTI2_E11CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x2C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x2C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x30 "EXTI2_E12CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x30 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x30 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "EXTI2_E13CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x34 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x34 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x38 "EXTI2_E14CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x38 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x38 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "EXTI2_E15CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x3C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x3C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x40 "EXTI2_E16CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x40 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x40 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "EXTI2_E17CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x44 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x44 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x48 "EXTI2_E18CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x48 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x48 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "EXTI2_E19CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x4C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x4C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x50 "EXTI2_E20CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x50 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x50 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "EXTI2_E21CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x54 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x54 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x58 "EXTI2_E22CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x58 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x58 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "EXTI2_E23CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x5C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x5C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x60 "EXTI2_E24CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x60 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x60 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "EXTI2_E25CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x64 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x64 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x68 "EXTI2_E26CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x68 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x68 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "EXTI2_E27CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x6C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x6C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x70 "EXTI2_E28CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x70 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x70 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "EXTI2_E29CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x74 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x74 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x78 "EXTI2_E30CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x78 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x78 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "EXTI2_E31CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x7C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x7C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x80 "EXTI2_E32CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x80 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x80 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "EXTI2_E33CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x84 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x84 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x88 "EXTI2_E34CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x88 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x88 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "EXTI2_E35CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x8C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x8C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x90 "EXTI2_E36CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x90 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x90 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x94 "EXTI2_E37CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x94 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x94 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x98 "EXTI2_E38CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x98 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x98 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x9C "EXTI2_E39CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x9C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x9C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xA0 "EXTI2_E40CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xA0 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xA0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xA4 "EXTI2_E41CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xA4 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xA4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xA8 "EXTI2_E42CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xA8 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xA8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xAC "EXTI2_E43CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xAC 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xAC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xB0 "EXTI2_E44CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xB0 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xB0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xB4 "EXTI2_E45CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xB4 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xB4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xB8 "EXTI2_E46CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xB8 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xB8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xBC "EXTI2_E47CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xBC 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xBC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xC0 "EXTI2_E48CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xC0 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xC0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xC4 "EXTI2_E49CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xC4 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xC4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xC8 "EXTI2_E50CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xC8 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xC8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xCC "EXTI2_E51CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xCC 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xCC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xD0 "EXTI2_E52CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xD0 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xD0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xD4 "EXTI2_E53CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xD4 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xD4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xD8 "EXTI2_E54CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xD8 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xD8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xDC "EXTI2_E55CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xDC 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xDC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xE0 "EXTI2_E56CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xE0 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xE0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xE4 "EXTI2_E57CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xE4 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xE4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xE8 "EXTI2_E58CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xE8 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xE8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xEC "EXTI2_E59CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xEC 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xEC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xF0 "EXTI2_E60CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xF0 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xF0 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xF4 "EXTI2_E61CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xF4 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xF4 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xF8 "EXTI2_E62CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xF8 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xF8 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0xFC "EXTI2_E63CIDCFGR,EXTI2 event CID Config register" bitfld.long 0xFC 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0xFC 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x100 "EXTI2_E64CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x100 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x100 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x104 "EXTI2_E65CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x104 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x104 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x108 "EXTI2_E66CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x108 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x108 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x10C "EXTI2_E67CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x10C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x10C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x110 "EXTI2_E68CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x110 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x110 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x114 "EXTI2_E69CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x114 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x114 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x118 "EXTI2_E70CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x118 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x118 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x11C "EXTI2_E71CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x11C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x11C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x120 "EXTI2_E72CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x120 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x120 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x124 "EXTI2_E73CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x124 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x124 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x128 "EXTI2_E74CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x128 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x128 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x12C "EXTI2_E75CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x12C 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x12C 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" line.long 0x130 "EXTI2_E76CIDCFGR,EXTI2 event CID Config register" bitfld.long 0x130 4.--6. "CID,EXTI event n allowed CID value." "0,1,2,3,4,5,6,7" bitfld.long 0x130 0. "CFEN,EXTI event n CID filtering enable" "B_0x0,B_0x1" group.long 0x300++0xB line.long 0x0 "EXTI2_C1CIDCFGR,EXTI2 processor 1 CID configuration register" bitfld.long 0x0 4.--6. "CID,CPUm CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "CFEN,CID filtering enabled for CPUm EXTI2_CmIMRn and EXTI2_CmEMRn registers" "B_0x0,B_0x1" line.long 0x4 "EXTI2_C2CIDCFGR,EXTI2 processor 2 CID configuration register" bitfld.long 0x4 4.--6. "CID,CPUm CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "CFEN,CID filtering enabled for CPUm EXTI2_CmIMRn and EXTI2_CmEMRn registers" "B_0x0,B_0x1" line.long 0x8 "EXTI2_C3CIDCFGR,EXTI2 processor 3 CID configuration register" bitfld.long 0x8 4.--6. "CID,CPUm CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "CFEN,CID filtering enabled for CPUm EXTI2_CmIMRn and EXTI2_CmEMRn registers" "B_0x0,B_0x1" rgroup.long 0x3C0++0xB line.long 0x0 "EXTI2_HWCFGR13" hexmask.long 0x0 0.--31. 1. "SEC,HW configuration event security privilege and resource isolation capability." line.long 0x4 "EXTI2_HWCFGR12" hexmask.long 0x4 0.--31. 1. "SEC,HW configuration event security privilege and resource isolation capability." line.long 0x8 "EXTI2_HWCFGR11" hexmask.long 0x8 0.--31. 1. "SEC,HW configuration event security privilege and resource isolation capability." rgroup.long 0x3D8++0x27 line.long 0x0 "EXTI2_HWCFGR7" hexmask.long 0x0 0.--31. 1. "CPUEVENT,HW configuration CPU event generation" line.long 0x4 "EXTI2_HWCFGR6" hexmask.long 0x4 0.--31. 1. "CPUEVENT,HW configuration CPU event generation" line.long 0x8 "EXTI2_HWCFGR5" hexmask.long 0x8 0.--31. 1. "CPUEVENT,HW configuration CPU event generation" line.long 0xC "EXTI2_HWCFGR4" hexmask.long 0xC 0.--31. 1. "EVENT_TRG,HW configuration event trigger type" line.long 0x10 "EXTI2_HWCFGR3" hexmask.long 0x10 0.--31. 1. "EVENT_TRG,HW configuration event trigger type" line.long 0x14 "EXTI2_HWCFGR2" hexmask.long 0x14 0.--31. 1. "EVENT_TRG,HW configuration event trigger type" line.long 0x18 "EXTI2_HWCFGR1" hexmask.long.byte 0x18 24.--27. 1. "CIDWIDTH,CID parameters bit width" hexmask.long.byte 0x18 16.--23. 1. "NBIOPORT,HW configuration of number of IO ports on EXTI. (n+1)" hexmask.long.byte 0x18 12.--15. 1. "CPUEVTEN,HW configuration of CPU(m) event output enable." hexmask.long.byte 0x18 8.--11. 1. "NBCPUS,HW configuration number of CPUs (n+1)" hexmask.long.byte 0x18 0.--7. 1. "NBEVENTS,HW configuration number of event (n+1)" line.long 0x1C "EXTI2_VERR" hexmask.long.byte 0x1C 4.--7. 1. "MAJREV,Major Revision number" hexmask.long.byte 0x1C 0.--3. 1. "MINREV,Minor Revision number" line.long 0x20 "EXTI2_IPIDR" hexmask.long 0x20 0.--31. 1. "IPID,IP Identification" line.long 0x24 "EXTI2_SIDR" hexmask.long 0x24 0.--31. 1. "SID,Size Identification" tree.end endif tree.end sif (cpuis("*CA35")||cpuis("*CM33F")) tree "FDCAN (Controller Area Network with Flexible Data Rate)" base ad:0x0 tree "FDCAN" base ad:0x402D0000 rgroup.long 0x0++0x3 line.long 0x0 "FDCAN_CREL,FDCAN core release register" hexmask.long.byte 0x0 28.--31. 1. "REL,Core release = 3" hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of core release = 2" hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of core release = 1" hexmask.long.byte 0x0 16.--19. 1. "YEAR,Timestamp year = 4" hexmask.long.byte 0x0 8.--15. 1. "MON,Timestamp month = 12" hexmask.long.byte 0x0 0.--7. 1. "DAY,Timestamp day =18" rgroup.long 0x0++0x7 line.long 0x0 "FDCAN_CCU_CREL,Clock calibration unit core release register" hexmask.long.byte 0x0 28.--31. 1. "REL,Core release = 1" hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of core release = 1" hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of core release = 1" hexmask.long.byte 0x0 16.--19. 1. "YEAR,Timestamp year =" hexmask.long.byte 0x0 8.--15. 1. "MON,Timestamp month = 12" hexmask.long.byte 0x0 0.--7. 1. "DAY,Timestamp day = 18" line.long 0x4 "FDCAN_ENDN,FDCAN Endian register" hexmask.long 0x4 0.--31. 1. "ETV,Endianness test value" group.long 0x4++0x3 line.long 0x0 "FDCAN_CCU_CCFG,Calibration configuration register" bitfld.long 0x0 31. "SWR,Software reset" "0,1" hexmask.long.byte 0x0 16.--19. 1. "CDIV,Clock divider" hexmask.long.byte 0x0 8.--15. 1. "OCPM,Oscillator clock periods minimum" bitfld.long 0x0 7. "CFL,Calibration field length" "B_0x0,B_0x1" bitfld.long 0x0 6. "BCC,Bypass clock calibration" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--4. 1. "TQBT,Time quanta per bit time" rgroup.long 0x8++0x3 line.long 0x0 "FDCAN_CCU_CSTAT,Calibration status register" bitfld.long 0x0 30.--31. "CALS,Calibration state" "B_0x0,B_0x1,B_0x2,?" hexmask.long.word 0x0 18.--28. 1. "TQC,Time quanta counter" hexmask.long.tbyte 0x0 0.--17. 1. "OCPC,Oscillator clock period counter" group.long 0xC++0x3 line.long 0x0 "FDCAN_DBTP,FDCAN data bit timing and prescaler register" bitfld.long 0x0 23. "TDC,Transceiver delay compensation" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--20. 1. "DBRP,Data bitrate prescaler" hexmask.long.byte 0x0 8.--12. 1. "DTSEG1,Data time segment before sample point" hexmask.long.byte 0x0 4.--7. 1. "DTSEG2,Data time segment after sample point" hexmask.long.byte 0x0 0.--3. 1. "DSJW,Synchronization jump width" group.long 0xC++0x7 line.long 0x0 "FDCAN_CCU_CWD,Calibration watchdog register" hexmask.long.word 0x0 16.--31. 1. "WDV,Watchdog value" hexmask.long.word 0x0 0.--15. 1. "WDC,WDC" line.long 0x4 "FDCAN_TEST,FDCAN test register" rbitfld.long 0x4 7. "RX,Receive pin" "B_0x0,B_0x1" bitfld.long 0x4 5.--6. "TX,Control of transmit pin" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 4. "LBCK,Loop back mode" "B_0x0,B_0x1" group.long 0x10++0x7 line.long 0x0 "FDCAN_CCU_IR,Clock calibration unit interrupt register" bitfld.long 0x0 1. "CSC,Calibration state changed" "B_0x0,B_0x1" bitfld.long 0x0 0. "CWE,Calibration watchdog event" "B_0x0,B_0x1" line.long 0x4 "FDCAN_RWD,FDCAN RAM watchdog register" hexmask.long.byte 0x4 8.--15. 1. "WDV,Watchdog value" hexmask.long.byte 0x4 0.--7. 1. "WDC,Watchdog configuration" group.long 0x14++0x1B line.long 0x0 "FDCAN_CCU_IE,Clock calibration unit interrupt enable register" bitfld.long 0x0 1. "CSCE,Calibration state changed enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CWEE,Calibration watchdog event enable" "B_0x0,B_0x1" line.long 0x4 "FDCAN_CCCR,FDCAN CC control register" bitfld.long 0x4 15. "NISO,Non ISO operation" "B_0x0,B_0x1" bitfld.long 0x4 14. "TXP,If this bit is set the FDCAN pauses for two CAN bit times before starting the next transmission after successfully transmitting a frame." "B_0x0,B_0x1" bitfld.long 0x4 13. "EFBI,Edge filtering during bus integration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PXHD,Protocol exception handling disable" "B_0x0,B_0x1" bitfld.long 0x4 9. "BRSE,FDCAN bitrate switching" "B_0x0,B_0x1" bitfld.long 0x4 8. "FDOE,FD operation enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "TEST,Test mode enable" "B_0x0,B_0x1" newline bitfld.long 0x4 6. "DAR,Disable automatic retransmission" "B_0x0,B_0x1" bitfld.long 0x4 5. "MON,Bus monitoring mode" "B_0x0,B_0x1" bitfld.long 0x4 4. "CSR,Clock stop request" "B_0x0,B_0x1" rbitfld.long 0x4 3. "CSA,Clock stop acknowledge" "B_0x0,B_0x1" bitfld.long 0x4 2. "ASM,ASM restricted operation mode" "B_0x0,B_0x1" bitfld.long 0x4 1. "CCE,Configuration change enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "INIT,Initialization" "B_0x0,B_0x1" line.long 0x8 "FDCAN_NBTP,FDCAN nominal bit timing and prescaler register" hexmask.long.byte 0x8 25.--31. 1. "NSJW,Nominal (re)synchronization jump width" hexmask.long.word 0x8 16.--24. 1. "NBRP,Bitrate prescaler" hexmask.long.byte 0x8 8.--15. 1. "NTSEG1,Nominal time segment before sample point" hexmask.long.byte 0x8 0.--6. 1. "NTSEG2,Nominal time segment after sample point" line.long 0xC "FDCAN_TSCC,FDCAN timestamp counter configuration register" hexmask.long.byte 0xC 16.--19. 1. "TCP,Timestamp counter prescaler" bitfld.long 0xC 0.--1. "TSS,Timestamp select" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x10 "FDCAN_TSCV,FDCAN timestamp counter value register" hexmask.long.word 0x10 0.--15. 1. "TSC,Timestamp counter" line.long 0x14 "FDCAN_TOCC,FDCAN timeout counter configuration register" hexmask.long.word 0x14 16.--31. 1. "TOP,Timeout period" bitfld.long 0x14 1.--2. "TOS,Timeout select" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 0. "ETOC,Enable timeout counter" "B_0x0,B_0x1" line.long 0x18 "FDCAN_TOCV,FDCAN timeout counter value register" hexmask.long.word 0x18 0.--15. 1. "TOC,Timeout counter" group.long 0x40++0xB line.long 0x0 "FDCAN_ECR,FDCAN error counter register" hexmask.long.byte 0x0 16.--23. 1. "CEL,CAN error logging" rbitfld.long 0x0 15. "RP,Receive error passive" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--14. 1. "REC,Receive error counter" hexmask.long.byte 0x0 0.--7. 1. "TEC,Transmit error counter" line.long 0x4 "FDCAN_PSR,FDCAN protocol status register" hexmask.long.byte 0x4 16.--22. 1. "TDCV,Transmitter delay compensation value" bitfld.long 0x4 14. "PXE,Protocol exception event" "B_0x0,B_0x1" bitfld.long 0x4 13. "REDL,Received FDCAN message" "B_0x0,B_0x1" bitfld.long 0x4 12. "RBRS,BRS flag of last received FDCAN message" "B_0x0,B_0x1" bitfld.long 0x4 11. "RESI,ESI flag of last received FDCAN message" "B_0x0,B_0x1" rbitfld.long 0x4 8.--10. "DLEC,Data last error code" "0,1,2,3,4,5,6,7" rbitfld.long 0x4 7. "BO,Bus_Off status" "B_0x0,B_0x1" newline rbitfld.long 0x4 6. "EW,Warning status" "B_0x0,B_0x1" rbitfld.long 0x4 5. "EP,Error passive" "B_0x0,B_0x1" rbitfld.long 0x4 3.--4. "ACT,Activity" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x4 0.--2. "LEC,Last error code" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "FDCAN_TDCR,FDCAN transmitter delay compensation register" hexmask.long.byte 0x8 8.--14. 1. "TDCO,Transmitter delay compensation offset" hexmask.long.byte 0x8 0.--6. 1. "TDCF,Transmitter delay compensation filter window length" group.long 0x50++0xF line.long 0x0 "FDCAN_IR,FDCAN interrupt register" bitfld.long 0x0 29. "ARA,Access to reserved address" "B_0x0,B_0x1" bitfld.long 0x0 28. "PED,Protocol error in data phase (data bit time is used)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PEA,Protocol error in arbitration phase (nominal bit time is used)" "B_0x0,B_0x1" bitfld.long 0x0 26. "WDI,Watchdog interrupt" "B_0x0,B_0x1" bitfld.long 0x0 25. "BO,Bus_Off status" "B_0x0,B_0x1" bitfld.long 0x0 24. "EW,Warning status" "B_0x0,B_0x1" bitfld.long 0x0 23. "EP,Error passive" "B_0x0,B_0x1" newline bitfld.long 0x0 22. "ELO,Error logging overflow" "B_0x0,B_0x1" bitfld.long 0x0 19. "DRX,Message stored to dedicated Rx buffer" "B_0x0,B_0x1" bitfld.long 0x0 18. "TOO,Timeout occurred" "B_0x0,B_0x1" bitfld.long 0x0 17. "MRAF,Message RAM access failure" "B_0x0,B_0x1" bitfld.long 0x0 16. "TSW,Timestamp wraparound" "B_0x0,B_0x1" bitfld.long 0x0 15. "TEFL,Tx event FIFO element lost" "B_0x0,B_0x1" bitfld.long 0x0 14. "TEFF,Tx event FIFO full" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "TEFW,Tx event FIFO watermark reached" "B_0x0,B_0x1" bitfld.long 0x0 12. "TEFN,Tx event FIFO new entry" "B_0x0,B_0x1" bitfld.long 0x0 11. "TFE,Tx FIFO empty" "B_0x0,B_0x1" bitfld.long 0x0 10. "TCF,Transmission cancellation finished" "B_0x0,B_0x1" bitfld.long 0x0 9. "TC,Transmission completed" "B_0x0,B_0x1" bitfld.long 0x0 8. "HPM,High priority message" "B_0x0,B_0x1" bitfld.long 0x0 7. "RF1L,Rx FIFO 1 message lost" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "RF1F,Rx FIFO 1 full" "B_0x0,B_0x1" bitfld.long 0x0 5. "RF1W,Rx FIFO 1 watermark reached" "B_0x0,B_0x1" bitfld.long 0x0 4. "RF1N,Rx FIFO 1 new message" "B_0x0,B_0x1" bitfld.long 0x0 3. "RF0L,Rx FIFO 0 message lost" "B_0x0,B_0x1" bitfld.long 0x0 2. "RF0F,Rx FIFO 0 full" "B_0x0,B_0x1" bitfld.long 0x0 1. "RF0W,Rx FIFO 0 watermark reached" "B_0x0,B_0x1" bitfld.long 0x0 0. "RF0N,Rx FIFO 0 New message" "B_0x0,B_0x1" line.long 0x4 "FDCAN_IE,FDCAN interrupt enable register" bitfld.long 0x4 29. "ARAE,Access to Reserved address enable" "0,1" bitfld.long 0x4 28. "PEDE,Protocol error in data phase enable" "0,1" bitfld.long 0x4 27. "PEAE,Protocol error in Arbitration phase enable" "0,1" bitfld.long 0x4 26. "WDIE,Watchdog interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 25. "BOE,Bus_Off status" "B_0x0,B_0x1" bitfld.long 0x4 24. "EWE,Warning status interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "EPE,Error passive interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 22. "ELOE,Error logging overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "DRXE,Message stored to dedicated Rx buffer interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 18. "TOOE,Timeout occurred interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 17. "MRAFE,Message RAM access failure interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "TSWE,Timestamp wraparound interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 15. "TEFLE,Tx event FIFO element lost interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 14. "TEFFE,Tx event FIFO full interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "TEFWE,Tx event FIFO watermark reached interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 12. "TEFNE,Tx event FIFO new entry interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "TFEE,Tx FIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 10. "TCFE,Transmission cancellation finished interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "TCE,Transmission completed interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "HPME,High priority message interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "RF1LE,Rx FIFO 1 message lost interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 6. "RF1FE,Rx FIFO 1 full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "RF1WE,Rx FIFO 1 watermark reached interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "RF1NE,Rx FIFO 1 new message interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "RF0LE,Rx FIFO 0 message lost interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "RF0FE,Rx FIFO 0 full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "RF0WE,Rx FIFO 0 watermark reached interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "RF0NE,Rx FIFO 0 new message interrupt enable" "B_0x0,B_0x1" line.long 0x8 "FDCAN_ILS,FDCAN interrupt line select register" bitfld.long 0x8 29. "ARAL,Access to reserved address line" "0,1" bitfld.long 0x8 28. "PEDL,Protocol error in data phase line" "0,1" bitfld.long 0x8 27. "PEAL,Protocol error in arbitration phase line" "0,1" bitfld.long 0x8 26. "WDIL,Watchdog interrupt line" "0,1" bitfld.long 0x8 25. "BOL,Bus_Off status" "0,1" bitfld.long 0x8 24. "EWL,Warning status interrupt line" "0,1" bitfld.long 0x8 23. "EPL,Error passive interrupt line" "0,1" newline bitfld.long 0x8 22. "ELOL,Error logging overflow interrupt line" "0,1" bitfld.long 0x8 19. "DRXL,Message stored to dedicated Rx buffer interrupt line" "0,1" bitfld.long 0x8 18. "TOOL,Timeout occurred interrupt line" "0,1" bitfld.long 0x8 17. "MRAFL,Message RAM access failure interrupt line" "0,1" bitfld.long 0x8 16. "TSWL,Timestamp wraparound interrupt line" "0,1" bitfld.long 0x8 15. "TEFLL,Tx event FIFO element Lost interrupt line" "0,1" bitfld.long 0x8 14. "TEFFL,Tx event FIFO full interrupt line" "0,1" newline bitfld.long 0x8 13. "TEFWL,Tx event FIFO watermark reached interrupt line" "0,1" bitfld.long 0x8 12. "TEFNL,Tx event FIFO new entry interrupt line" "0,1" bitfld.long 0x8 11. "TFEL,Tx FIFO empty interrupt line" "0,1" bitfld.long 0x8 10. "TCFL,Transmission cancellation finished interrupt line" "0,1" bitfld.long 0x8 9. "TCL,Transmission completed interrupt line" "0,1" bitfld.long 0x8 8. "HPML,High priority message interrupt line" "0,1" bitfld.long 0x8 7. "RF1LL,Rx FIFO 1 message lost interrupt line" "0,1" newline bitfld.long 0x8 6. "RF1FL,Rx FIFO 1 full interrupt line" "0,1" bitfld.long 0x8 5. "RF1WL,Rx FIFO 1 watermark reached interrupt line" "0,1" bitfld.long 0x8 4. "RF1NL,Rx FIFO 1 new message interrupt line" "0,1" bitfld.long 0x8 3. "RF0LL,Rx FIFO 0 message lost interrupt line" "0,1" bitfld.long 0x8 2. "RF0FL,Rx FIFO 0 full interrupt line" "0,1" bitfld.long 0x8 1. "RF0WL,Rx FIFO 0 watermark reached interrupt line" "0,1" bitfld.long 0x8 0. "RF0NL,Rx FIFO 0 new message interrupt line" "0,1" line.long 0xC "FDCAN_ILE,FDCAN interrupt line enable register" bitfld.long 0xC 1. "EINT1,Enable interrupt line 1" "B_0x0,B_0x1" bitfld.long 0xC 0. "EINT0,Enable interrupt line 0" "B_0x0,B_0x1" group.long 0x80++0xB line.long 0x0 "FDCAN_GFC,FDCAN global filter configuration register" bitfld.long 0x0 4.--5. "ANFS,Accept non-matching frames standard" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "ANFE,Accept non-matching frames extended" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "RRFS,Reject remote frames standard" "B_0x0,B_0x1" bitfld.long 0x0 0. "RRFE,Reject remote frames extended" "B_0x0,B_0x1" line.long 0x4 "FDCAN_SIDFC,FDCAN standard ID filter configuration register" hexmask.long.byte 0x4 16.--23. 1. "LSS,List size standard" hexmask.long.word 0x4 2.--15. 1. "FLSSA,Filter list standard start address" line.long 0x8 "FDCAN_XIDFC,FDCAN extended ID filter configuration register" hexmask.long.byte 0x8 16.--23. 1. "LSE,List size extended" hexmask.long.word 0x8 2.--15. 1. "FLESA,Filter list extended start address" group.long 0x90++0x3 line.long 0x0 "FDCAN_XIDAM,FDCAN extended ID and mask register" hexmask.long 0x0 0.--28. 1. "EIDM,Extended ID Mask" rgroup.long 0x94++0x3 line.long 0x0 "FDCAN_HPMS,FDCAN high priority message status register" bitfld.long 0x0 15. "FLST,Filter list" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--14. 1. "FIDX,Filter index" bitfld.long 0x0 6.--7. "MSI,Message storage indicator" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 0.--5. 1. "BIDX,Buffer index" group.long 0x98++0x1B line.long 0x0 "FDCAN_NDAT1,FDCAN new data 1 register" bitfld.long 0x0 31. "ND31,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 30. "ND30,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 29. "ND29,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 28. "ND28,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 27. "ND27,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 26. "ND26,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 25. "ND25,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "ND24,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 23. "ND23,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 22. "ND22,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 21. "ND21,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 20. "ND20,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 19. "ND19,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 18. "ND18,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "ND17,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 16. "ND16,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 15. "ND15,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 14. "ND14,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 13. "ND13,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 12. "ND12,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 11. "ND11,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "ND10,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 9. "ND9,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 8. "ND8,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 7. "ND7,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 6. "ND6,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 5. "ND5,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 4. "ND4,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "ND3,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 2. "ND2,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 1. "ND1,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 0. "ND0,New data[31:0]" "B_0x0,B_0x1" line.long 0x4 "FDCAN_NDAT2,FDCAN new data 2 register" bitfld.long 0x4 31. "ND63,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 30. "ND62,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 29. "ND61,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 28. "ND60,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 27. "ND59,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 26. "ND58,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 25. "ND57,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "ND56,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 23. "ND55,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 22. "ND54,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 21. "ND53,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 20. "ND52,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 19. "ND51,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 18. "ND50,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "ND49,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 16. "ND48,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 15. "ND47,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 14. "ND46,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 13. "ND45,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 12. "ND44,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 11. "ND43,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "ND42,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 9. "ND41,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 8. "ND40,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 7. "ND39,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 6. "ND38,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 5. "ND37,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 4. "ND36,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "ND35,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 2. "ND34,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 1. "ND33,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 0. "ND32,New data[63:32]" "B_0x0,B_0x1" line.long 0x8 "FDCAN_RXF0C,FDCAN Rx FIFO 0 configuration register" bitfld.long 0x8 31. "F0OM,FIFO 0 operation mode" "B_0x0,B_0x1" hexmask.long.byte 0x8 24.--30. 1. "F0WM,FIFO 0 watermark" hexmask.long.byte 0x8 16.--22. 1. "F0S,Rx FIFO 0 size" hexmask.long.word 0x8 2.--15. 1. "F0SA,Rx FIFO 0 start address" line.long 0xC "FDCAN_RXF0S,FDCAN Rx FIFO 0 status register" bitfld.long 0xC 25. "RF0L,Rx FIFO 0 message lost" "B_0x0,B_0x1" bitfld.long 0xC 24. "F0F,Rx FIFO 0 full" "B_0x0,B_0x1" hexmask.long.byte 0xC 16.--21. 1. "F0PI,Rx FIFO 0 put index" hexmask.long.byte 0xC 8.--13. 1. "F0GI,Rx FIFO 0 get index" hexmask.long.byte 0xC 0.--6. 1. "F0FL,Rx FIFO 0 fill level" line.long 0x10 "FDCAN_RXF0A,FDCAN Rx FIFO 0 acknowledge register" hexmask.long.byte 0x10 0.--5. 1. "F0AI,Rx FIFO 0 acknowledge index" line.long 0x14 "FDCAN_RXBC,FDCAN Rx buffer configuration register" hexmask.long.word 0x14 2.--15. 1. "RBSA,Rx buffer start address" line.long 0x18 "FDCAN_RXF1C,FDCAN Rx FIFO 1 configuration register" bitfld.long 0x18 31. "F1OM,FIFO 1 operation mode" "B_0x0,B_0x1" hexmask.long.byte 0x18 24.--30. 1. "F1WM,Rx FIFO 1 watermark" hexmask.long.byte 0x18 16.--22. 1. "F1S,Rx FIFO 1 size" hexmask.long.word 0x18 2.--15. 1. "F1SA,Rx FIFO 1 start address" rgroup.long 0xB4++0x3 line.long 0x0 "FDCAN_RXF1S,FDCAN Rx FIFO 1 status register" bitfld.long 0x0 30.--31. "DMS,Debug message status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 25. "RF1L,Rx FIFO 1 message lost" "B_0x0,B_0x1" bitfld.long 0x0 24. "F1F,Rx FIFO 1 full" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--21. 1. "F1PI,Rx FIFO 1 put index" hexmask.long.byte 0x0 8.--13. 1. "F1GI,Rx FIFO 1 get index" hexmask.long.byte 0x0 0.--6. 1. "F1FL,Rx FIFO 1 fill level" group.long 0xB8++0x3 line.long 0x0 "FDCAN_RXF1A,FDCAN Rx FIFO 1 acknowledge register" hexmask.long.byte 0x0 0.--5. 1. "F1AI,Rx FIFO 1 acknowledge index" rgroup.long 0xBC++0x3 line.long 0x0 "FDCAN_RXESC,FDCAN Rx buffer element size configuration register" bitfld.long 0x0 8.--10. "RBDS,Rx buffer data field size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 4.--6. "F1DS,Rx FIFO 0 data field size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 0.--2. "F0DS,Rx FIFO 1 data field size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" group.long 0xC0++0x3 line.long 0x0 "FDCAN_TXBC,FDCAN Tx buffer configuration register" bitfld.long 0x0 30. "TFQM,Tx FIFO/queue mode" "B_0x0,B_0x1" hexmask.long.byte 0x0 24.--29. 1. "TFQS,Transmit FIFO/queue size" hexmask.long.byte 0x0 16.--21. 1. "NDTB,Number of dedicated transmit buffers" hexmask.long.word 0x0 2.--15. 1. "TBSA,Tx buffers start address" rgroup.long 0xC4++0xB line.long 0x0 "FDCAN_TXFQS,FDCAN Tx FIFO/queue status register" bitfld.long 0x0 21. "TFQF,Tx FIFO/queue full" "0,1" hexmask.long.byte 0x0 16.--20. 1. "TFQPI,Tx FIFO/queue put index" hexmask.long.byte 0x0 8.--12. 1. "TFGI,Tx FIFO get index." hexmask.long.byte 0x0 0.--5. 1. "TFFL,Tx FIFO free level" line.long 0x4 "FDCAN_TXESC,FDCAN Tx buffer element size configuration register" bitfld.long 0x4 0.--2. "TBDS,Tx buffer data Field size:" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "FDCAN_TXBRP,FDCAN Tx buffer request pending register" hexmask.long 0x8 0.--31. 1. "TRP,Transmission request pending" group.long 0xD0++0x7 line.long 0x0 "FDCAN_TXBAR,FDCAN Tx buffer add request register" hexmask.long 0x0 0.--31. 1. "AR,Add request" line.long 0x4 "FDCAN_TXBCR,FDCAN Tx buffer cancellation request register" hexmask.long 0x4 0.--31. 1. "CR,Cancellation request" rgroup.long 0xD8++0x7 line.long 0x0 "FDCAN_TXBTO,FDCAN Tx buffer transmission occurred register" hexmask.long 0x0 0.--31. 1. "TO,Transmission occurred" line.long 0x4 "FDCAN_TXBCF,FDCAN Tx buffer cancellation finished register" hexmask.long 0x4 0.--31. 1. "CF,Cancellation finished" group.long 0xE0++0x7 line.long 0x0 "FDCAN_TXBTIE,FDCAN Tx buffer transmission interrupt enable register" hexmask.long 0x0 0.--31. 1. "TIE,Transmission interrupt enable" line.long 0x4 "FDCAN_TXBCIE,FDCAN Tx buffer cancellation finished interrupt enable register" hexmask.long 0x4 0.--31. 1. "CFIE,Cancellation finished interrupt enable" group.long 0xF0++0x3 line.long 0x0 "FDCAN_TXEFC,FDCAN Tx event FIFO configuration register" hexmask.long.byte 0x0 24.--29. 1. "EFWM,Event FIFO watermark" hexmask.long.byte 0x0 16.--21. 1. "EFS,Event FIFO size." hexmask.long.word 0x0 2.--15. 1. "EFSA,Event FIFO start address" rgroup.long 0xF4++0x3 line.long 0x0 "FDCAN_TXEFS,FDCAN Tx event FIFO status register" bitfld.long 0x0 25. "TEFL,Tx event FIFO element lost" "0,1" bitfld.long 0x0 24. "EFF,Event FIFO full" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--20. 1. "EFPI,Event FIFO put index" hexmask.long.byte 0x0 8.--12. 1. "EFGI,Event FIFO get index" hexmask.long.byte 0x0 0.--5. 1. "EFFL,Event FIFO fill level" group.long 0xF8++0x3 line.long 0x0 "FDCAN_TXEFA,FDCAN Tx event FIFO acknowledge register" hexmask.long.byte 0x0 0.--4. 1. "EFAI,Event FIFO acknowledge index" group.long 0x100++0x2B line.long 0x0 "FDCAN_TTTMC,FDCAN TT trigger memory configuration register" hexmask.long.byte 0x0 16.--22. 1. "TME,Trigger memory elements" hexmask.long.word 0x0 2.--15. 1. "TMSA,Trigger memory start address." line.long 0x4 "FDCAN_TTRMC,FDCAN TT reference message configuration register" bitfld.long 0x4 31. "RMPS,Reference message payload select" "B_0x0,B_0x1" bitfld.long 0x4 30. "XTD,Extended identifier" "B_0x0,B_0x1" hexmask.long 0x4 0.--28. 1. "RID,Reference identifier." line.long 0x8 "FDCAN_TTOCF,FDCAN TT operation configuration register" bitfld.long 0x8 26. "EVTP,Event trigger polarity." "B_0x0,B_0x1" bitfld.long 0x8 25. "ECC,Enable clock calibration." "B_0x0,B_0x1" bitfld.long 0x8 24. "EGTF,Enable global time filtering." "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--23. 1. "AWL,Application watchdog limit." bitfld.long 0x8 15. "EECS,Enable external clock synchronization" "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--14. 1. "IRTO,Initial reference trigger offset." bitfld.long 0x8 5.--7. "LDSDL,LD of synchronization deviation limit." "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 4. "TM,Time master." "B_0x0,B_0x1" bitfld.long 0x8 3. "GEN,Gap enable." "B_0x0,B_0x1" bitfld.long 0x8 0.--1. "OM,Operation mode." "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "FDCAN_TTMLM,FDCAN TT matrix limits register" hexmask.long.word 0xC 16.--27. 1. "ENTT,Expected number of Tx triggers" hexmask.long.byte 0xC 8.--11. 1. "TXEW,Tx enable window" bitfld.long 0xC 6.--7. "CSS,Cycle start synchronization" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0xC 0.--5. 1. "CCM,Cycle count Max" line.long 0x10 "FDCAN_TURCF,FDCAN TUR configuration register" bitfld.long 0x10 31. "ELT,Enable local time." "B_0x0,B_0x1" hexmask.long.word 0x10 16.--29. 1. "DC,Denominator configuration." hexmask.long.word 0x10 0.--15. 1. "NCL,Numerator configuration low." line.long 0x14 "FDCAN_TTOCN,FDCAN TT operation control register" rbitfld.long 0x14 15. "LCKC,TT operation control register locked." "B_0x0,B_0x1" bitfld.long 0x14 13. "ESCN,External synchronization control" "B_0x0,B_0x1" bitfld.long 0x14 12. "NIG,Next is gap." "B_0x0,B_0x1" bitfld.long 0x14 11. "TMG,Time mark gap." "B_0x0,B_0x1" bitfld.long 0x14 10. "FGP,Finish gap." "B_0x0,B_0x1" bitfld.long 0x14 9. "GCS,Gap control select" "B_0x0,B_0x1" bitfld.long 0x14 8. "TTIE,Trigger time mark interrupt pulse enable" "B_0x0,B_0x1" newline bitfld.long 0x14 6.--7. "TMC,Register time mark compare." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 5. "RTIE,Register time mark interrupt pulse enable." "B_0x0,B_0x1" bitfld.long 0x14 3.--4. "SWS,Stop watch source." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 2. "SWP,Stop watch polarity." "B_0x0,B_0x1" bitfld.long 0x14 1. "ECS,External clock synchronization." "0,1" bitfld.long 0x14 0. "SGT,Set global time." "0,1" line.long 0x18 "FDCAN_TTGTP,FDCAN TT global time preset register" hexmask.long.word 0x18 16.--31. 1. "CTP,Cycle time target phase" hexmask.long.word 0x18 0.--15. 1. "TP,Time preset" line.long 0x1C "FDCAN_TTTMK,FDCAN TT time mark register" rbitfld.long 0x1C 31. "LCKM,TT time mark register locked" "B_0x0,B_0x1" hexmask.long.byte 0x1C 16.--22. 1. "TICC,Time mark cycle code" hexmask.long.word 0x1C 0.--15. 1. "TM,Time mark" line.long 0x20 "FDCAN_TTIR,FDCAN TT interrupt register" bitfld.long 0x20 18. "CER,Configuration error" "B_0x0,B_0x1" bitfld.long 0x20 17. "AW,Application watchdog" "B_0x0,B_0x1" bitfld.long 0x20 16. "WT,Watch trigger" "B_0x0,B_0x1" bitfld.long 0x20 15. "IWTG,Initialization watch trigger" "0,1" bitfld.long 0x20 14. "ELC,Error level changed" "B_0x0,B_0x1" bitfld.long 0x20 13. "SE2,Scheduling error 2" "B_0x0,B_0x1" bitfld.long 0x20 12. "SE1,Scheduling error 1" "B_0x0,B_0x1" newline bitfld.long 0x20 11. "TXO,Tx count overflow" "B_0x0,B_0x1" bitfld.long 0x20 10. "TXU,Tx count underflow" "B_0x0,B_0x1" bitfld.long 0x20 9. "GTE,Global time error" "B_0x0,B_0x1" bitfld.long 0x20 8. "GTD,Global time discontinuity" "B_0x0,B_0x1" bitfld.long 0x20 7. "GTW,Global time wrap" "B_0x0,B_0x1" bitfld.long 0x20 6. "SWE,Stop watch event" "B_0x0,B_0x1" bitfld.long 0x20 5. "TTMI,Trigger time mark event internal" "B_0x0,B_0x1" newline bitfld.long 0x20 4. "RTMI,Register time mark interrupt" "B_0x0,B_0x1" bitfld.long 0x20 3. "SOG,Start of gap" "0,1" bitfld.long 0x20 2. "CSM,Change of synchronization mode" "B_0x0,B_0x1" bitfld.long 0x20 1. "SMC,Start of matrix cycle" "B_0x0,B_0x1" bitfld.long 0x20 0. "SBC,Start of basic cycle" "B_0x0,B_0x1" line.long 0x24 "FDCAN_TTIE,FDCAN TT interrupt enable register" bitfld.long 0x24 18. "CERE,Configuration error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 17. "AWE,Application watchdog interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 16. "WTE,Watch trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 15. "IWTE,Initialization watch trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 14. "ELCE,Change error level interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 13. "SE2E,Scheduling error 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 12. "SE1E,Scheduling error 1 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x24 11. "TXOE,Tx count overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 10. "TXUE,Tx count underflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 9. "GTEE,Global time error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 8. "GTDE,Global time discontinuity interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 7. "GTWE,Global time wrap interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 6. "SWEE,Stop watch event interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 5. "TTMIE,Trigger time mark event internal interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x24 4. "RTMIE,Register time mark interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 3. "SOGE,Start of gap interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 2. "CSME,Change of synchronization mode interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 1. "SMCE,Start of matrix cycle interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "SBCE,Start of basic cycle interrupt enable" "B_0x0,B_0x1" line.long 0x28 "FDCAN_TTILS,FDCAN TT interrupt line select register" bitfld.long 0x28 18. "CERL,Configuration error interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 17. "AWL,Application watchdog interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 16. "WTL,Watch trigger interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 15. "IWTL,Initialization watch trigger interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 14. "ELCL,Change error level interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 13. "SE2L,Scheduling error 2 interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 12. "SE1L,Scheduling error 1 interrupt line" "B_0x0,B_0x1" newline bitfld.long 0x28 11. "TXOL,Tx count overflow interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 10. "TXUL,Tx count underflow interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 9. "GTEL,Global time error interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 8. "GTDL,Global time discontinuity interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 7. "GTWL,Global time wrap interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 6. "SWEL,Stop watch event interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 5. "TTMIL,Trigger time mark event internal interrupt line" "B_0x0,B_0x1" newline bitfld.long 0x28 4. "RTMIL,Register time mark interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 3. "SOGL,Start of gap interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 2. "CSML,Change of synchronization mode interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 1. "SMCL,Start of matrix cycle interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 0. "SBCL,Start of basic cycle interrupt line" "B_0x0,B_0x1" rgroup.long 0x12C++0x17 line.long 0x0 "FDCAN_TTOST,FDCAN TT operation status register" bitfld.long 0x0 31. "SPL,Schedule phase lock" "B_0x0,B_0x1" bitfld.long 0x0 30. "WECS,Wait for external clock synchronization." "B_0x0,B_0x1" bitfld.long 0x0 29. "AWE,Application watchdog event" "B_0x0,B_0x1" bitfld.long 0x0 28. "WFE,Wait for event" "B_0x0,B_0x1" bitfld.long 0x0 27. "GSI,Gap started indicator" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "TMP,Time master priority" "0,1,2,3,4,5,6,7" bitfld.long 0x0 23. "GFI,Gap finished indicator" "B_0x0,B_0x1" newline bitfld.long 0x0 22. "WGTD,Wait for global time discontinuity" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "RTO,Reference trigger offset" bitfld.long 0x0 7. "QCS,Quality of clock speed" "B_0x0,B_0x1" bitfld.long 0x0 6. "QGTP,Quality of global time phase" "B_0x0,B_0x1" bitfld.long 0x0 4.--5. "SYS,Synchronization state" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MS,Master state" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "EL,Error level" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "FDCAN_TURNA,FDCAN TUR numerator actual register" hexmask.long.tbyte 0x4 0.--17. 1. "NAV,Numerator actual value" line.long 0x8 "FDCAN_TTLGT,FDCAN TT local and global time register" hexmask.long.word 0x8 16.--31. 1. "GT,Global time" hexmask.long.word 0x8 0.--15. 1. "LT,Local time" line.long 0xC "FDCAN_TTCTC,FDCAN TT cycle time and count register" hexmask.long.byte 0xC 16.--21. 1. "CC,Cycle count" hexmask.long.word 0xC 0.--15. 1. "CT,Cycle time" line.long 0x10 "FDCAN_TTCPT,FDCAN TT capture time register" hexmask.long.word 0x10 16.--31. 1. "SWV,Stop watch value" hexmask.long.byte 0x10 0.--5. 1. "CCV,Cycle count value" line.long 0x14 "FDCAN_TTCSM,FDCAN TT cycle sync mark register" hexmask.long.word 0x14 0.--15. 1. "CSM,Cycle sync mark" group.long 0x300++0x3 line.long 0x0 "FDCAN_TTTS,FDCAN TT trigger select register" bitfld.long 0x0 4.--5. "EVTSEL,Event trigger input selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "SWTDEL,Stop watch trigger input selection" "B_0x0,B_0x1,B_0x2,B_0x3" tree.end tree "FDCAN1_S" base ad:0x502D0000 rgroup.long 0x0++0x3 line.long 0x0 "FDCAN_CREL,FDCAN core release register" hexmask.long.byte 0x0 28.--31. 1. "REL,Core release = 3" hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of core release = 2" hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of core release = 1" hexmask.long.byte 0x0 16.--19. 1. "YEAR,Timestamp year = 4" hexmask.long.byte 0x0 8.--15. 1. "MON,Timestamp month = 12" hexmask.long.byte 0x0 0.--7. 1. "DAY,Timestamp day =18" rgroup.long 0x0++0x7 line.long 0x0 "FDCAN_CCU_CREL,Clock calibration unit core release register" hexmask.long.byte 0x0 28.--31. 1. "REL,Core release = 1" hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of core release = 1" hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of core release = 1" hexmask.long.byte 0x0 16.--19. 1. "YEAR,Timestamp year =" hexmask.long.byte 0x0 8.--15. 1. "MON,Timestamp month = 12" hexmask.long.byte 0x0 0.--7. 1. "DAY,Timestamp day = 18" line.long 0x4 "FDCAN_ENDN,FDCAN Endian register" hexmask.long 0x4 0.--31. 1. "ETV,Endianness test value" group.long 0x4++0x3 line.long 0x0 "FDCAN_CCU_CCFG,Calibration configuration register" bitfld.long 0x0 31. "SWR,Software reset" "0,1" hexmask.long.byte 0x0 16.--19. 1. "CDIV,Clock divider" hexmask.long.byte 0x0 8.--15. 1. "OCPM,Oscillator clock periods minimum" bitfld.long 0x0 7. "CFL,Calibration field length" "B_0x0,B_0x1" bitfld.long 0x0 6. "BCC,Bypass clock calibration" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--4. 1. "TQBT,Time quanta per bit time" rgroup.long 0x8++0x3 line.long 0x0 "FDCAN_CCU_CSTAT,Calibration status register" bitfld.long 0x0 30.--31. "CALS,Calibration state" "B_0x0,B_0x1,B_0x2,?" hexmask.long.word 0x0 18.--28. 1. "TQC,Time quanta counter" hexmask.long.tbyte 0x0 0.--17. 1. "OCPC,Oscillator clock period counter" group.long 0xC++0x3 line.long 0x0 "FDCAN_DBTP,FDCAN data bit timing and prescaler register" bitfld.long 0x0 23. "TDC,Transceiver delay compensation" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--20. 1. "DBRP,Data bitrate prescaler" hexmask.long.byte 0x0 8.--12. 1. "DTSEG1,Data time segment before sample point" hexmask.long.byte 0x0 4.--7. 1. "DTSEG2,Data time segment after sample point" hexmask.long.byte 0x0 0.--3. 1. "DSJW,Synchronization jump width" group.long 0xC++0x7 line.long 0x0 "FDCAN_CCU_CWD,Calibration watchdog register" hexmask.long.word 0x0 16.--31. 1. "WDV,Watchdog value" hexmask.long.word 0x0 0.--15. 1. "WDC,WDC" line.long 0x4 "FDCAN_TEST,FDCAN test register" rbitfld.long 0x4 7. "RX,Receive pin" "B_0x0,B_0x1" bitfld.long 0x4 5.--6. "TX,Control of transmit pin" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 4. "LBCK,Loop back mode" "B_0x0,B_0x1" group.long 0x10++0x7 line.long 0x0 "FDCAN_CCU_IR,Clock calibration unit interrupt register" bitfld.long 0x0 1. "CSC,Calibration state changed" "B_0x0,B_0x1" bitfld.long 0x0 0. "CWE,Calibration watchdog event" "B_0x0,B_0x1" line.long 0x4 "FDCAN_RWD,FDCAN RAM watchdog register" hexmask.long.byte 0x4 8.--15. 1. "WDV,Watchdog value" hexmask.long.byte 0x4 0.--7. 1. "WDC,Watchdog configuration" group.long 0x14++0x1B line.long 0x0 "FDCAN_CCU_IE,Clock calibration unit interrupt enable register" bitfld.long 0x0 1. "CSCE,Calibration state changed enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CWEE,Calibration watchdog event enable" "B_0x0,B_0x1" line.long 0x4 "FDCAN_CCCR,FDCAN CC control register" bitfld.long 0x4 15. "NISO,Non ISO operation" "B_0x0,B_0x1" bitfld.long 0x4 14. "TXP,If this bit is set the FDCAN pauses for two CAN bit times before starting the next transmission after successfully transmitting a frame." "B_0x0,B_0x1" bitfld.long 0x4 13. "EFBI,Edge filtering during bus integration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PXHD,Protocol exception handling disable" "B_0x0,B_0x1" bitfld.long 0x4 9. "BRSE,FDCAN bitrate switching" "B_0x0,B_0x1" bitfld.long 0x4 8. "FDOE,FD operation enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "TEST,Test mode enable" "B_0x0,B_0x1" newline bitfld.long 0x4 6. "DAR,Disable automatic retransmission" "B_0x0,B_0x1" bitfld.long 0x4 5. "MON,Bus monitoring mode" "B_0x0,B_0x1" bitfld.long 0x4 4. "CSR,Clock stop request" "B_0x0,B_0x1" rbitfld.long 0x4 3. "CSA,Clock stop acknowledge" "B_0x0,B_0x1" bitfld.long 0x4 2. "ASM,ASM restricted operation mode" "B_0x0,B_0x1" bitfld.long 0x4 1. "CCE,Configuration change enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "INIT,Initialization" "B_0x0,B_0x1" line.long 0x8 "FDCAN_NBTP,FDCAN nominal bit timing and prescaler register" hexmask.long.byte 0x8 25.--31. 1. "NSJW,Nominal (re)synchronization jump width" hexmask.long.word 0x8 16.--24. 1. "NBRP,Bitrate prescaler" hexmask.long.byte 0x8 8.--15. 1. "NTSEG1,Nominal time segment before sample point" hexmask.long.byte 0x8 0.--6. 1. "NTSEG2,Nominal time segment after sample point" line.long 0xC "FDCAN_TSCC,FDCAN timestamp counter configuration register" hexmask.long.byte 0xC 16.--19. 1. "TCP,Timestamp counter prescaler" bitfld.long 0xC 0.--1. "TSS,Timestamp select" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x10 "FDCAN_TSCV,FDCAN timestamp counter value register" hexmask.long.word 0x10 0.--15. 1. "TSC,Timestamp counter" line.long 0x14 "FDCAN_TOCC,FDCAN timeout counter configuration register" hexmask.long.word 0x14 16.--31. 1. "TOP,Timeout period" bitfld.long 0x14 1.--2. "TOS,Timeout select" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 0. "ETOC,Enable timeout counter" "B_0x0,B_0x1" line.long 0x18 "FDCAN_TOCV,FDCAN timeout counter value register" hexmask.long.word 0x18 0.--15. 1. "TOC,Timeout counter" group.long 0x40++0xB line.long 0x0 "FDCAN_ECR,FDCAN error counter register" hexmask.long.byte 0x0 16.--23. 1. "CEL,CAN error logging" rbitfld.long 0x0 15. "RP,Receive error passive" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--14. 1. "REC,Receive error counter" hexmask.long.byte 0x0 0.--7. 1. "TEC,Transmit error counter" line.long 0x4 "FDCAN_PSR,FDCAN protocol status register" hexmask.long.byte 0x4 16.--22. 1. "TDCV,Transmitter delay compensation value" bitfld.long 0x4 14. "PXE,Protocol exception event" "B_0x0,B_0x1" bitfld.long 0x4 13. "REDL,Received FDCAN message" "B_0x0,B_0x1" bitfld.long 0x4 12. "RBRS,BRS flag of last received FDCAN message" "B_0x0,B_0x1" bitfld.long 0x4 11. "RESI,ESI flag of last received FDCAN message" "B_0x0,B_0x1" rbitfld.long 0x4 8.--10. "DLEC,Data last error code" "0,1,2,3,4,5,6,7" rbitfld.long 0x4 7. "BO,Bus_Off status" "B_0x0,B_0x1" newline rbitfld.long 0x4 6. "EW,Warning status" "B_0x0,B_0x1" rbitfld.long 0x4 5. "EP,Error passive" "B_0x0,B_0x1" rbitfld.long 0x4 3.--4. "ACT,Activity" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x4 0.--2. "LEC,Last error code" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "FDCAN_TDCR,FDCAN transmitter delay compensation register" hexmask.long.byte 0x8 8.--14. 1. "TDCO,Transmitter delay compensation offset" hexmask.long.byte 0x8 0.--6. 1. "TDCF,Transmitter delay compensation filter window length" group.long 0x50++0xF line.long 0x0 "FDCAN_IR,FDCAN interrupt register" bitfld.long 0x0 29. "ARA,Access to reserved address" "B_0x0,B_0x1" bitfld.long 0x0 28. "PED,Protocol error in data phase (data bit time is used)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PEA,Protocol error in arbitration phase (nominal bit time is used)" "B_0x0,B_0x1" bitfld.long 0x0 26. "WDI,Watchdog interrupt" "B_0x0,B_0x1" bitfld.long 0x0 25. "BO,Bus_Off status" "B_0x0,B_0x1" bitfld.long 0x0 24. "EW,Warning status" "B_0x0,B_0x1" bitfld.long 0x0 23. "EP,Error passive" "B_0x0,B_0x1" newline bitfld.long 0x0 22. "ELO,Error logging overflow" "B_0x0,B_0x1" bitfld.long 0x0 19. "DRX,Message stored to dedicated Rx buffer" "B_0x0,B_0x1" bitfld.long 0x0 18. "TOO,Timeout occurred" "B_0x0,B_0x1" bitfld.long 0x0 17. "MRAF,Message RAM access failure" "B_0x0,B_0x1" bitfld.long 0x0 16. "TSW,Timestamp wraparound" "B_0x0,B_0x1" bitfld.long 0x0 15. "TEFL,Tx event FIFO element lost" "B_0x0,B_0x1" bitfld.long 0x0 14. "TEFF,Tx event FIFO full" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "TEFW,Tx event FIFO watermark reached" "B_0x0,B_0x1" bitfld.long 0x0 12. "TEFN,Tx event FIFO new entry" "B_0x0,B_0x1" bitfld.long 0x0 11. "TFE,Tx FIFO empty" "B_0x0,B_0x1" bitfld.long 0x0 10. "TCF,Transmission cancellation finished" "B_0x0,B_0x1" bitfld.long 0x0 9. "TC,Transmission completed" "B_0x0,B_0x1" bitfld.long 0x0 8. "HPM,High priority message" "B_0x0,B_0x1" bitfld.long 0x0 7. "RF1L,Rx FIFO 1 message lost" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "RF1F,Rx FIFO 1 full" "B_0x0,B_0x1" bitfld.long 0x0 5. "RF1W,Rx FIFO 1 watermark reached" "B_0x0,B_0x1" bitfld.long 0x0 4. "RF1N,Rx FIFO 1 new message" "B_0x0,B_0x1" bitfld.long 0x0 3. "RF0L,Rx FIFO 0 message lost" "B_0x0,B_0x1" bitfld.long 0x0 2. "RF0F,Rx FIFO 0 full" "B_0x0,B_0x1" bitfld.long 0x0 1. "RF0W,Rx FIFO 0 watermark reached" "B_0x0,B_0x1" bitfld.long 0x0 0. "RF0N,Rx FIFO 0 New message" "B_0x0,B_0x1" line.long 0x4 "FDCAN_IE,FDCAN interrupt enable register" bitfld.long 0x4 29. "ARAE,Access to Reserved address enable" "0,1" bitfld.long 0x4 28. "PEDE,Protocol error in data phase enable" "0,1" bitfld.long 0x4 27. "PEAE,Protocol error in Arbitration phase enable" "0,1" bitfld.long 0x4 26. "WDIE,Watchdog interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 25. "BOE,Bus_Off status" "B_0x0,B_0x1" bitfld.long 0x4 24. "EWE,Warning status interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "EPE,Error passive interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 22. "ELOE,Error logging overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "DRXE,Message stored to dedicated Rx buffer interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 18. "TOOE,Timeout occurred interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 17. "MRAFE,Message RAM access failure interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "TSWE,Timestamp wraparound interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 15. "TEFLE,Tx event FIFO element lost interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 14. "TEFFE,Tx event FIFO full interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "TEFWE,Tx event FIFO watermark reached interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 12. "TEFNE,Tx event FIFO new entry interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "TFEE,Tx FIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 10. "TCFE,Transmission cancellation finished interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "TCE,Transmission completed interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "HPME,High priority message interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "RF1LE,Rx FIFO 1 message lost interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 6. "RF1FE,Rx FIFO 1 full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "RF1WE,Rx FIFO 1 watermark reached interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "RF1NE,Rx FIFO 1 new message interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "RF0LE,Rx FIFO 0 message lost interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "RF0FE,Rx FIFO 0 full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "RF0WE,Rx FIFO 0 watermark reached interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "RF0NE,Rx FIFO 0 new message interrupt enable" "B_0x0,B_0x1" line.long 0x8 "FDCAN_ILS,FDCAN interrupt line select register" bitfld.long 0x8 29. "ARAL,Access to reserved address line" "0,1" bitfld.long 0x8 28. "PEDL,Protocol error in data phase line" "0,1" bitfld.long 0x8 27. "PEAL,Protocol error in arbitration phase line" "0,1" bitfld.long 0x8 26. "WDIL,Watchdog interrupt line" "0,1" bitfld.long 0x8 25. "BOL,Bus_Off status" "0,1" bitfld.long 0x8 24. "EWL,Warning status interrupt line" "0,1" bitfld.long 0x8 23. "EPL,Error passive interrupt line" "0,1" newline bitfld.long 0x8 22. "ELOL,Error logging overflow interrupt line" "0,1" bitfld.long 0x8 19. "DRXL,Message stored to dedicated Rx buffer interrupt line" "0,1" bitfld.long 0x8 18. "TOOL,Timeout occurred interrupt line" "0,1" bitfld.long 0x8 17. "MRAFL,Message RAM access failure interrupt line" "0,1" bitfld.long 0x8 16. "TSWL,Timestamp wraparound interrupt line" "0,1" bitfld.long 0x8 15. "TEFLL,Tx event FIFO element Lost interrupt line" "0,1" bitfld.long 0x8 14. "TEFFL,Tx event FIFO full interrupt line" "0,1" newline bitfld.long 0x8 13. "TEFWL,Tx event FIFO watermark reached interrupt line" "0,1" bitfld.long 0x8 12. "TEFNL,Tx event FIFO new entry interrupt line" "0,1" bitfld.long 0x8 11. "TFEL,Tx FIFO empty interrupt line" "0,1" bitfld.long 0x8 10. "TCFL,Transmission cancellation finished interrupt line" "0,1" bitfld.long 0x8 9. "TCL,Transmission completed interrupt line" "0,1" bitfld.long 0x8 8. "HPML,High priority message interrupt line" "0,1" bitfld.long 0x8 7. "RF1LL,Rx FIFO 1 message lost interrupt line" "0,1" newline bitfld.long 0x8 6. "RF1FL,Rx FIFO 1 full interrupt line" "0,1" bitfld.long 0x8 5. "RF1WL,Rx FIFO 1 watermark reached interrupt line" "0,1" bitfld.long 0x8 4. "RF1NL,Rx FIFO 1 new message interrupt line" "0,1" bitfld.long 0x8 3. "RF0LL,Rx FIFO 0 message lost interrupt line" "0,1" bitfld.long 0x8 2. "RF0FL,Rx FIFO 0 full interrupt line" "0,1" bitfld.long 0x8 1. "RF0WL,Rx FIFO 0 watermark reached interrupt line" "0,1" bitfld.long 0x8 0. "RF0NL,Rx FIFO 0 new message interrupt line" "0,1" line.long 0xC "FDCAN_ILE,FDCAN interrupt line enable register" bitfld.long 0xC 1. "EINT1,Enable interrupt line 1" "B_0x0,B_0x1" bitfld.long 0xC 0. "EINT0,Enable interrupt line 0" "B_0x0,B_0x1" group.long 0x80++0xB line.long 0x0 "FDCAN_GFC,FDCAN global filter configuration register" bitfld.long 0x0 4.--5. "ANFS,Accept non-matching frames standard" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "ANFE,Accept non-matching frames extended" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "RRFS,Reject remote frames standard" "B_0x0,B_0x1" bitfld.long 0x0 0. "RRFE,Reject remote frames extended" "B_0x0,B_0x1" line.long 0x4 "FDCAN_SIDFC,FDCAN standard ID filter configuration register" hexmask.long.byte 0x4 16.--23. 1. "LSS,List size standard" hexmask.long.word 0x4 2.--15. 1. "FLSSA,Filter list standard start address" line.long 0x8 "FDCAN_XIDFC,FDCAN extended ID filter configuration register" hexmask.long.byte 0x8 16.--23. 1. "LSE,List size extended" hexmask.long.word 0x8 2.--15. 1. "FLESA,Filter list extended start address" group.long 0x90++0x3 line.long 0x0 "FDCAN_XIDAM,FDCAN extended ID and mask register" hexmask.long 0x0 0.--28. 1. "EIDM,Extended ID Mask" rgroup.long 0x94++0x3 line.long 0x0 "FDCAN_HPMS,FDCAN high priority message status register" bitfld.long 0x0 15. "FLST,Filter list" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--14. 1. "FIDX,Filter index" bitfld.long 0x0 6.--7. "MSI,Message storage indicator" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 0.--5. 1. "BIDX,Buffer index" group.long 0x98++0x1B line.long 0x0 "FDCAN_NDAT1,FDCAN new data 1 register" bitfld.long 0x0 31. "ND31,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 30. "ND30,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 29. "ND29,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 28. "ND28,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 27. "ND27,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 26. "ND26,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 25. "ND25,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "ND24,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 23. "ND23,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 22. "ND22,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 21. "ND21,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 20. "ND20,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 19. "ND19,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 18. "ND18,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "ND17,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 16. "ND16,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 15. "ND15,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 14. "ND14,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 13. "ND13,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 12. "ND12,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 11. "ND11,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "ND10,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 9. "ND9,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 8. "ND8,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 7. "ND7,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 6. "ND6,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 5. "ND5,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 4. "ND4,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "ND3,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 2. "ND2,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 1. "ND1,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 0. "ND0,New data[31:0]" "B_0x0,B_0x1" line.long 0x4 "FDCAN_NDAT2,FDCAN new data 2 register" bitfld.long 0x4 31. "ND63,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 30. "ND62,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 29. "ND61,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 28. "ND60,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 27. "ND59,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 26. "ND58,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 25. "ND57,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "ND56,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 23. "ND55,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 22. "ND54,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 21. "ND53,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 20. "ND52,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 19. "ND51,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 18. "ND50,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "ND49,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 16. "ND48,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 15. "ND47,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 14. "ND46,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 13. "ND45,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 12. "ND44,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 11. "ND43,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "ND42,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 9. "ND41,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 8. "ND40,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 7. "ND39,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 6. "ND38,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 5. "ND37,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 4. "ND36,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "ND35,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 2. "ND34,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 1. "ND33,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 0. "ND32,New data[63:32]" "B_0x0,B_0x1" line.long 0x8 "FDCAN_RXF0C,FDCAN Rx FIFO 0 configuration register" bitfld.long 0x8 31. "F0OM,FIFO 0 operation mode" "B_0x0,B_0x1" hexmask.long.byte 0x8 24.--30. 1. "F0WM,FIFO 0 watermark" hexmask.long.byte 0x8 16.--22. 1. "F0S,Rx FIFO 0 size" hexmask.long.word 0x8 2.--15. 1. "F0SA,Rx FIFO 0 start address" line.long 0xC "FDCAN_RXF0S,FDCAN Rx FIFO 0 status register" bitfld.long 0xC 25. "RF0L,Rx FIFO 0 message lost" "B_0x0,B_0x1" bitfld.long 0xC 24. "F0F,Rx FIFO 0 full" "B_0x0,B_0x1" hexmask.long.byte 0xC 16.--21. 1. "F0PI,Rx FIFO 0 put index" hexmask.long.byte 0xC 8.--13. 1. "F0GI,Rx FIFO 0 get index" hexmask.long.byte 0xC 0.--6. 1. "F0FL,Rx FIFO 0 fill level" line.long 0x10 "FDCAN_RXF0A,FDCAN Rx FIFO 0 acknowledge register" hexmask.long.byte 0x10 0.--5. 1. "F0AI,Rx FIFO 0 acknowledge index" line.long 0x14 "FDCAN_RXBC,FDCAN Rx buffer configuration register" hexmask.long.word 0x14 2.--15. 1. "RBSA,Rx buffer start address" line.long 0x18 "FDCAN_RXF1C,FDCAN Rx FIFO 1 configuration register" bitfld.long 0x18 31. "F1OM,FIFO 1 operation mode" "B_0x0,B_0x1" hexmask.long.byte 0x18 24.--30. 1. "F1WM,Rx FIFO 1 watermark" hexmask.long.byte 0x18 16.--22. 1. "F1S,Rx FIFO 1 size" hexmask.long.word 0x18 2.--15. 1. "F1SA,Rx FIFO 1 start address" rgroup.long 0xB4++0x3 line.long 0x0 "FDCAN_RXF1S,FDCAN Rx FIFO 1 status register" bitfld.long 0x0 30.--31. "DMS,Debug message status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 25. "RF1L,Rx FIFO 1 message lost" "B_0x0,B_0x1" bitfld.long 0x0 24. "F1F,Rx FIFO 1 full" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--21. 1. "F1PI,Rx FIFO 1 put index" hexmask.long.byte 0x0 8.--13. 1. "F1GI,Rx FIFO 1 get index" hexmask.long.byte 0x0 0.--6. 1. "F1FL,Rx FIFO 1 fill level" group.long 0xB8++0x3 line.long 0x0 "FDCAN_RXF1A,FDCAN Rx FIFO 1 acknowledge register" hexmask.long.byte 0x0 0.--5. 1. "F1AI,Rx FIFO 1 acknowledge index" rgroup.long 0xBC++0x3 line.long 0x0 "FDCAN_RXESC,FDCAN Rx buffer element size configuration register" bitfld.long 0x0 8.--10. "RBDS,Rx buffer data field size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 4.--6. "F1DS,Rx FIFO 0 data field size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 0.--2. "F0DS,Rx FIFO 1 data field size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" group.long 0xC0++0x3 line.long 0x0 "FDCAN_TXBC,FDCAN Tx buffer configuration register" bitfld.long 0x0 30. "TFQM,Tx FIFO/queue mode" "B_0x0,B_0x1" hexmask.long.byte 0x0 24.--29. 1. "TFQS,Transmit FIFO/queue size" hexmask.long.byte 0x0 16.--21. 1. "NDTB,Number of dedicated transmit buffers" hexmask.long.word 0x0 2.--15. 1. "TBSA,Tx buffers start address" rgroup.long 0xC4++0xB line.long 0x0 "FDCAN_TXFQS,FDCAN Tx FIFO/queue status register" bitfld.long 0x0 21. "TFQF,Tx FIFO/queue full" "0,1" hexmask.long.byte 0x0 16.--20. 1. "TFQPI,Tx FIFO/queue put index" hexmask.long.byte 0x0 8.--12. 1. "TFGI,Tx FIFO get index." hexmask.long.byte 0x0 0.--5. 1. "TFFL,Tx FIFO free level" line.long 0x4 "FDCAN_TXESC,FDCAN Tx buffer element size configuration register" bitfld.long 0x4 0.--2. "TBDS,Tx buffer data Field size:" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "FDCAN_TXBRP,FDCAN Tx buffer request pending register" hexmask.long 0x8 0.--31. 1. "TRP,Transmission request pending" group.long 0xD0++0x7 line.long 0x0 "FDCAN_TXBAR,FDCAN Tx buffer add request register" hexmask.long 0x0 0.--31. 1. "AR,Add request" line.long 0x4 "FDCAN_TXBCR,FDCAN Tx buffer cancellation request register" hexmask.long 0x4 0.--31. 1. "CR,Cancellation request" rgroup.long 0xD8++0x7 line.long 0x0 "FDCAN_TXBTO,FDCAN Tx buffer transmission occurred register" hexmask.long 0x0 0.--31. 1. "TO,Transmission occurred" line.long 0x4 "FDCAN_TXBCF,FDCAN Tx buffer cancellation finished register" hexmask.long 0x4 0.--31. 1. "CF,Cancellation finished" group.long 0xE0++0x7 line.long 0x0 "FDCAN_TXBTIE,FDCAN Tx buffer transmission interrupt enable register" hexmask.long 0x0 0.--31. 1. "TIE,Transmission interrupt enable" line.long 0x4 "FDCAN_TXBCIE,FDCAN Tx buffer cancellation finished interrupt enable register" hexmask.long 0x4 0.--31. 1. "CFIE,Cancellation finished interrupt enable" group.long 0xF0++0x3 line.long 0x0 "FDCAN_TXEFC,FDCAN Tx event FIFO configuration register" hexmask.long.byte 0x0 24.--29. 1. "EFWM,Event FIFO watermark" hexmask.long.byte 0x0 16.--21. 1. "EFS,Event FIFO size." hexmask.long.word 0x0 2.--15. 1. "EFSA,Event FIFO start address" rgroup.long 0xF4++0x3 line.long 0x0 "FDCAN_TXEFS,FDCAN Tx event FIFO status register" bitfld.long 0x0 25. "TEFL,Tx event FIFO element lost" "0,1" bitfld.long 0x0 24. "EFF,Event FIFO full" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--20. 1. "EFPI,Event FIFO put index" hexmask.long.byte 0x0 8.--12. 1. "EFGI,Event FIFO get index" hexmask.long.byte 0x0 0.--5. 1. "EFFL,Event FIFO fill level" group.long 0xF8++0x3 line.long 0x0 "FDCAN_TXEFA,FDCAN Tx event FIFO acknowledge register" hexmask.long.byte 0x0 0.--4. 1. "EFAI,Event FIFO acknowledge index" group.long 0x100++0x2B line.long 0x0 "FDCAN_TTTMC,FDCAN TT trigger memory configuration register" hexmask.long.byte 0x0 16.--22. 1. "TME,Trigger memory elements" hexmask.long.word 0x0 2.--15. 1. "TMSA,Trigger memory start address." line.long 0x4 "FDCAN_TTRMC,FDCAN TT reference message configuration register" bitfld.long 0x4 31. "RMPS,Reference message payload select" "B_0x0,B_0x1" bitfld.long 0x4 30. "XTD,Extended identifier" "B_0x0,B_0x1" hexmask.long 0x4 0.--28. 1. "RID,Reference identifier." line.long 0x8 "FDCAN_TTOCF,FDCAN TT operation configuration register" bitfld.long 0x8 26. "EVTP,Event trigger polarity." "B_0x0,B_0x1" bitfld.long 0x8 25. "ECC,Enable clock calibration." "B_0x0,B_0x1" bitfld.long 0x8 24. "EGTF,Enable global time filtering." "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--23. 1. "AWL,Application watchdog limit." bitfld.long 0x8 15. "EECS,Enable external clock synchronization" "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--14. 1. "IRTO,Initial reference trigger offset." bitfld.long 0x8 5.--7. "LDSDL,LD of synchronization deviation limit." "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 4. "TM,Time master." "B_0x0,B_0x1" bitfld.long 0x8 3. "GEN,Gap enable." "B_0x0,B_0x1" bitfld.long 0x8 0.--1. "OM,Operation mode." "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "FDCAN_TTMLM,FDCAN TT matrix limits register" hexmask.long.word 0xC 16.--27. 1. "ENTT,Expected number of Tx triggers" hexmask.long.byte 0xC 8.--11. 1. "TXEW,Tx enable window" bitfld.long 0xC 6.--7. "CSS,Cycle start synchronization" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0xC 0.--5. 1. "CCM,Cycle count Max" line.long 0x10 "FDCAN_TURCF,FDCAN TUR configuration register" bitfld.long 0x10 31. "ELT,Enable local time." "B_0x0,B_0x1" hexmask.long.word 0x10 16.--29. 1. "DC,Denominator configuration." hexmask.long.word 0x10 0.--15. 1. "NCL,Numerator configuration low." line.long 0x14 "FDCAN_TTOCN,FDCAN TT operation control register" rbitfld.long 0x14 15. "LCKC,TT operation control register locked." "B_0x0,B_0x1" bitfld.long 0x14 13. "ESCN,External synchronization control" "B_0x0,B_0x1" bitfld.long 0x14 12. "NIG,Next is gap." "B_0x0,B_0x1" bitfld.long 0x14 11. "TMG,Time mark gap." "B_0x0,B_0x1" bitfld.long 0x14 10. "FGP,Finish gap." "B_0x0,B_0x1" bitfld.long 0x14 9. "GCS,Gap control select" "B_0x0,B_0x1" bitfld.long 0x14 8. "TTIE,Trigger time mark interrupt pulse enable" "B_0x0,B_0x1" newline bitfld.long 0x14 6.--7. "TMC,Register time mark compare." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 5. "RTIE,Register time mark interrupt pulse enable." "B_0x0,B_0x1" bitfld.long 0x14 3.--4. "SWS,Stop watch source." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 2. "SWP,Stop watch polarity." "B_0x0,B_0x1" bitfld.long 0x14 1. "ECS,External clock synchronization." "0,1" bitfld.long 0x14 0. "SGT,Set global time." "0,1" line.long 0x18 "FDCAN_TTGTP,FDCAN TT global time preset register" hexmask.long.word 0x18 16.--31. 1. "CTP,Cycle time target phase" hexmask.long.word 0x18 0.--15. 1. "TP,Time preset" line.long 0x1C "FDCAN_TTTMK,FDCAN TT time mark register" rbitfld.long 0x1C 31. "LCKM,TT time mark register locked" "B_0x0,B_0x1" hexmask.long.byte 0x1C 16.--22. 1. "TICC,Time mark cycle code" hexmask.long.word 0x1C 0.--15. 1. "TM,Time mark" line.long 0x20 "FDCAN_TTIR,FDCAN TT interrupt register" bitfld.long 0x20 18. "CER,Configuration error" "B_0x0,B_0x1" bitfld.long 0x20 17. "AW,Application watchdog" "B_0x0,B_0x1" bitfld.long 0x20 16. "WT,Watch trigger" "B_0x0,B_0x1" bitfld.long 0x20 15. "IWTG,Initialization watch trigger" "0,1" bitfld.long 0x20 14. "ELC,Error level changed" "B_0x0,B_0x1" bitfld.long 0x20 13. "SE2,Scheduling error 2" "B_0x0,B_0x1" bitfld.long 0x20 12. "SE1,Scheduling error 1" "B_0x0,B_0x1" newline bitfld.long 0x20 11. "TXO,Tx count overflow" "B_0x0,B_0x1" bitfld.long 0x20 10. "TXU,Tx count underflow" "B_0x0,B_0x1" bitfld.long 0x20 9. "GTE,Global time error" "B_0x0,B_0x1" bitfld.long 0x20 8. "GTD,Global time discontinuity" "B_0x0,B_0x1" bitfld.long 0x20 7. "GTW,Global time wrap" "B_0x0,B_0x1" bitfld.long 0x20 6. "SWE,Stop watch event" "B_0x0,B_0x1" bitfld.long 0x20 5. "TTMI,Trigger time mark event internal" "B_0x0,B_0x1" newline bitfld.long 0x20 4. "RTMI,Register time mark interrupt" "B_0x0,B_0x1" bitfld.long 0x20 3. "SOG,Start of gap" "0,1" bitfld.long 0x20 2. "CSM,Change of synchronization mode" "B_0x0,B_0x1" bitfld.long 0x20 1. "SMC,Start of matrix cycle" "B_0x0,B_0x1" bitfld.long 0x20 0. "SBC,Start of basic cycle" "B_0x0,B_0x1" line.long 0x24 "FDCAN_TTIE,FDCAN TT interrupt enable register" bitfld.long 0x24 18. "CERE,Configuration error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 17. "AWE,Application watchdog interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 16. "WTE,Watch trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 15. "IWTE,Initialization watch trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 14. "ELCE,Change error level interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 13. "SE2E,Scheduling error 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 12. "SE1E,Scheduling error 1 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x24 11. "TXOE,Tx count overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 10. "TXUE,Tx count underflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 9. "GTEE,Global time error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 8. "GTDE,Global time discontinuity interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 7. "GTWE,Global time wrap interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 6. "SWEE,Stop watch event interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 5. "TTMIE,Trigger time mark event internal interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x24 4. "RTMIE,Register time mark interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 3. "SOGE,Start of gap interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 2. "CSME,Change of synchronization mode interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 1. "SMCE,Start of matrix cycle interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "SBCE,Start of basic cycle interrupt enable" "B_0x0,B_0x1" line.long 0x28 "FDCAN_TTILS,FDCAN TT interrupt line select register" bitfld.long 0x28 18. "CERL,Configuration error interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 17. "AWL,Application watchdog interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 16. "WTL,Watch trigger interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 15. "IWTL,Initialization watch trigger interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 14. "ELCL,Change error level interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 13. "SE2L,Scheduling error 2 interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 12. "SE1L,Scheduling error 1 interrupt line" "B_0x0,B_0x1" newline bitfld.long 0x28 11. "TXOL,Tx count overflow interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 10. "TXUL,Tx count underflow interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 9. "GTEL,Global time error interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 8. "GTDL,Global time discontinuity interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 7. "GTWL,Global time wrap interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 6. "SWEL,Stop watch event interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 5. "TTMIL,Trigger time mark event internal interrupt line" "B_0x0,B_0x1" newline bitfld.long 0x28 4. "RTMIL,Register time mark interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 3. "SOGL,Start of gap interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 2. "CSML,Change of synchronization mode interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 1. "SMCL,Start of matrix cycle interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 0. "SBCL,Start of basic cycle interrupt line" "B_0x0,B_0x1" rgroup.long 0x12C++0x17 line.long 0x0 "FDCAN_TTOST,FDCAN TT operation status register" bitfld.long 0x0 31. "SPL,Schedule phase lock" "B_0x0,B_0x1" bitfld.long 0x0 30. "WECS,Wait for external clock synchronization." "B_0x0,B_0x1" bitfld.long 0x0 29. "AWE,Application watchdog event" "B_0x0,B_0x1" bitfld.long 0x0 28. "WFE,Wait for event" "B_0x0,B_0x1" bitfld.long 0x0 27. "GSI,Gap started indicator" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "TMP,Time master priority" "0,1,2,3,4,5,6,7" bitfld.long 0x0 23. "GFI,Gap finished indicator" "B_0x0,B_0x1" newline bitfld.long 0x0 22. "WGTD,Wait for global time discontinuity" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "RTO,Reference trigger offset" bitfld.long 0x0 7. "QCS,Quality of clock speed" "B_0x0,B_0x1" bitfld.long 0x0 6. "QGTP,Quality of global time phase" "B_0x0,B_0x1" bitfld.long 0x0 4.--5. "SYS,Synchronization state" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MS,Master state" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "EL,Error level" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "FDCAN_TURNA,FDCAN TUR numerator actual register" hexmask.long.tbyte 0x4 0.--17. 1. "NAV,Numerator actual value" line.long 0x8 "FDCAN_TTLGT,FDCAN TT local and global time register" hexmask.long.word 0x8 16.--31. 1. "GT,Global time" hexmask.long.word 0x8 0.--15. 1. "LT,Local time" line.long 0xC "FDCAN_TTCTC,FDCAN TT cycle time and count register" hexmask.long.byte 0xC 16.--21. 1. "CC,Cycle count" hexmask.long.word 0xC 0.--15. 1. "CT,Cycle time" line.long 0x10 "FDCAN_TTCPT,FDCAN TT capture time register" hexmask.long.word 0x10 16.--31. 1. "SWV,Stop watch value" hexmask.long.byte 0x10 0.--5. 1. "CCV,Cycle count value" line.long 0x14 "FDCAN_TTCSM,FDCAN TT cycle sync mark register" hexmask.long.word 0x14 0.--15. 1. "CSM,Cycle sync mark" group.long 0x300++0x3 line.long 0x0 "FDCAN_TTTS,FDCAN TT trigger select register" bitfld.long 0x0 4.--5. "EVTSEL,Event trigger input selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "SWTDEL,Stop watch trigger input selection" "B_0x0,B_0x1,B_0x2,B_0x3" tree.end tree "FDCAN2" base ad:0x402E0000 rgroup.long 0x0++0x3 line.long 0x0 "FDCAN_CREL,FDCAN core release register" hexmask.long.byte 0x0 28.--31. 1. "REL,Core release = 3" hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of core release = 2" hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of core release = 1" hexmask.long.byte 0x0 16.--19. 1. "YEAR,Timestamp year = 4" hexmask.long.byte 0x0 8.--15. 1. "MON,Timestamp month = 12" hexmask.long.byte 0x0 0.--7. 1. "DAY,Timestamp day =18" rgroup.long 0x0++0x7 line.long 0x0 "FDCAN_CCU_CREL,Clock calibration unit core release register" hexmask.long.byte 0x0 28.--31. 1. "REL,Core release = 1" hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of core release = 1" hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of core release = 1" hexmask.long.byte 0x0 16.--19. 1. "YEAR,Timestamp year =" hexmask.long.byte 0x0 8.--15. 1. "MON,Timestamp month = 12" hexmask.long.byte 0x0 0.--7. 1. "DAY,Timestamp day = 18" line.long 0x4 "FDCAN_ENDN,FDCAN Endian register" hexmask.long 0x4 0.--31. 1. "ETV,Endianness test value" group.long 0x4++0x3 line.long 0x0 "FDCAN_CCU_CCFG,Calibration configuration register" bitfld.long 0x0 31. "SWR,Software reset" "0,1" hexmask.long.byte 0x0 16.--19. 1. "CDIV,Clock divider" hexmask.long.byte 0x0 8.--15. 1. "OCPM,Oscillator clock periods minimum" bitfld.long 0x0 7. "CFL,Calibration field length" "B_0x0,B_0x1" bitfld.long 0x0 6. "BCC,Bypass clock calibration" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--4. 1. "TQBT,Time quanta per bit time" rgroup.long 0x8++0x3 line.long 0x0 "FDCAN_CCU_CSTAT,Calibration status register" bitfld.long 0x0 30.--31. "CALS,Calibration state" "B_0x0,B_0x1,B_0x2,?" hexmask.long.word 0x0 18.--28. 1. "TQC,Time quanta counter" hexmask.long.tbyte 0x0 0.--17. 1. "OCPC,Oscillator clock period counter" group.long 0xC++0x3 line.long 0x0 "FDCAN_DBTP,FDCAN data bit timing and prescaler register" bitfld.long 0x0 23. "TDC,Transceiver delay compensation" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--20. 1. "DBRP,Data bitrate prescaler" hexmask.long.byte 0x0 8.--12. 1. "DTSEG1,Data time segment before sample point" hexmask.long.byte 0x0 4.--7. 1. "DTSEG2,Data time segment after sample point" hexmask.long.byte 0x0 0.--3. 1. "DSJW,Synchronization jump width" group.long 0xC++0x7 line.long 0x0 "FDCAN_CCU_CWD,Calibration watchdog register" hexmask.long.word 0x0 16.--31. 1. "WDV,Watchdog value" hexmask.long.word 0x0 0.--15. 1. "WDC,WDC" line.long 0x4 "FDCAN_TEST,FDCAN test register" rbitfld.long 0x4 7. "RX,Receive pin" "B_0x0,B_0x1" bitfld.long 0x4 5.--6. "TX,Control of transmit pin" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 4. "LBCK,Loop back mode" "B_0x0,B_0x1" group.long 0x10++0x7 line.long 0x0 "FDCAN_CCU_IR,Clock calibration unit interrupt register" bitfld.long 0x0 1. "CSC,Calibration state changed" "B_0x0,B_0x1" bitfld.long 0x0 0. "CWE,Calibration watchdog event" "B_0x0,B_0x1" line.long 0x4 "FDCAN_RWD,FDCAN RAM watchdog register" hexmask.long.byte 0x4 8.--15. 1. "WDV,Watchdog value" hexmask.long.byte 0x4 0.--7. 1. "WDC,Watchdog configuration" group.long 0x14++0x1B line.long 0x0 "FDCAN_CCU_IE,Clock calibration unit interrupt enable register" bitfld.long 0x0 1. "CSCE,Calibration state changed enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CWEE,Calibration watchdog event enable" "B_0x0,B_0x1" line.long 0x4 "FDCAN_CCCR,FDCAN CC control register" bitfld.long 0x4 15. "NISO,Non ISO operation" "B_0x0,B_0x1" bitfld.long 0x4 14. "TXP,If this bit is set the FDCAN pauses for two CAN bit times before starting the next transmission after successfully transmitting a frame." "B_0x0,B_0x1" bitfld.long 0x4 13. "EFBI,Edge filtering during bus integration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PXHD,Protocol exception handling disable" "B_0x0,B_0x1" bitfld.long 0x4 9. "BRSE,FDCAN bitrate switching" "B_0x0,B_0x1" bitfld.long 0x4 8. "FDOE,FD operation enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "TEST,Test mode enable" "B_0x0,B_0x1" newline bitfld.long 0x4 6. "DAR,Disable automatic retransmission" "B_0x0,B_0x1" bitfld.long 0x4 5. "MON,Bus monitoring mode" "B_0x0,B_0x1" bitfld.long 0x4 4. "CSR,Clock stop request" "B_0x0,B_0x1" rbitfld.long 0x4 3. "CSA,Clock stop acknowledge" "B_0x0,B_0x1" bitfld.long 0x4 2. "ASM,ASM restricted operation mode" "B_0x0,B_0x1" bitfld.long 0x4 1. "CCE,Configuration change enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "INIT,Initialization" "B_0x0,B_0x1" line.long 0x8 "FDCAN_NBTP,FDCAN nominal bit timing and prescaler register" hexmask.long.byte 0x8 25.--31. 1. "NSJW,Nominal (re)synchronization jump width" hexmask.long.word 0x8 16.--24. 1. "NBRP,Bitrate prescaler" hexmask.long.byte 0x8 8.--15. 1. "NTSEG1,Nominal time segment before sample point" hexmask.long.byte 0x8 0.--6. 1. "NTSEG2,Nominal time segment after sample point" line.long 0xC "FDCAN_TSCC,FDCAN timestamp counter configuration register" hexmask.long.byte 0xC 16.--19. 1. "TCP,Timestamp counter prescaler" bitfld.long 0xC 0.--1. "TSS,Timestamp select" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x10 "FDCAN_TSCV,FDCAN timestamp counter value register" hexmask.long.word 0x10 0.--15. 1. "TSC,Timestamp counter" line.long 0x14 "FDCAN_TOCC,FDCAN timeout counter configuration register" hexmask.long.word 0x14 16.--31. 1. "TOP,Timeout period" bitfld.long 0x14 1.--2. "TOS,Timeout select" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 0. "ETOC,Enable timeout counter" "B_0x0,B_0x1" line.long 0x18 "FDCAN_TOCV,FDCAN timeout counter value register" hexmask.long.word 0x18 0.--15. 1. "TOC,Timeout counter" group.long 0x40++0xB line.long 0x0 "FDCAN_ECR,FDCAN error counter register" hexmask.long.byte 0x0 16.--23. 1. "CEL,CAN error logging" rbitfld.long 0x0 15. "RP,Receive error passive" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--14. 1. "REC,Receive error counter" hexmask.long.byte 0x0 0.--7. 1. "TEC,Transmit error counter" line.long 0x4 "FDCAN_PSR,FDCAN protocol status register" hexmask.long.byte 0x4 16.--22. 1. "TDCV,Transmitter delay compensation value" bitfld.long 0x4 14. "PXE,Protocol exception event" "B_0x0,B_0x1" bitfld.long 0x4 13. "REDL,Received FDCAN message" "B_0x0,B_0x1" bitfld.long 0x4 12. "RBRS,BRS flag of last received FDCAN message" "B_0x0,B_0x1" bitfld.long 0x4 11. "RESI,ESI flag of last received FDCAN message" "B_0x0,B_0x1" rbitfld.long 0x4 8.--10. "DLEC,Data last error code" "0,1,2,3,4,5,6,7" rbitfld.long 0x4 7. "BO,Bus_Off status" "B_0x0,B_0x1" newline rbitfld.long 0x4 6. "EW,Warning status" "B_0x0,B_0x1" rbitfld.long 0x4 5. "EP,Error passive" "B_0x0,B_0x1" rbitfld.long 0x4 3.--4. "ACT,Activity" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x4 0.--2. "LEC,Last error code" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "FDCAN_TDCR,FDCAN transmitter delay compensation register" hexmask.long.byte 0x8 8.--14. 1. "TDCO,Transmitter delay compensation offset" hexmask.long.byte 0x8 0.--6. 1. "TDCF,Transmitter delay compensation filter window length" group.long 0x50++0xF line.long 0x0 "FDCAN_IR,FDCAN interrupt register" bitfld.long 0x0 29. "ARA,Access to reserved address" "B_0x0,B_0x1" bitfld.long 0x0 28. "PED,Protocol error in data phase (data bit time is used)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PEA,Protocol error in arbitration phase (nominal bit time is used)" "B_0x0,B_0x1" bitfld.long 0x0 26. "WDI,Watchdog interrupt" "B_0x0,B_0x1" bitfld.long 0x0 25. "BO,Bus_Off status" "B_0x0,B_0x1" bitfld.long 0x0 24. "EW,Warning status" "B_0x0,B_0x1" bitfld.long 0x0 23. "EP,Error passive" "B_0x0,B_0x1" newline bitfld.long 0x0 22. "ELO,Error logging overflow" "B_0x0,B_0x1" bitfld.long 0x0 19. "DRX,Message stored to dedicated Rx buffer" "B_0x0,B_0x1" bitfld.long 0x0 18. "TOO,Timeout occurred" "B_0x0,B_0x1" bitfld.long 0x0 17. "MRAF,Message RAM access failure" "B_0x0,B_0x1" bitfld.long 0x0 16. "TSW,Timestamp wraparound" "B_0x0,B_0x1" bitfld.long 0x0 15. "TEFL,Tx event FIFO element lost" "B_0x0,B_0x1" bitfld.long 0x0 14. "TEFF,Tx event FIFO full" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "TEFW,Tx event FIFO watermark reached" "B_0x0,B_0x1" bitfld.long 0x0 12. "TEFN,Tx event FIFO new entry" "B_0x0,B_0x1" bitfld.long 0x0 11. "TFE,Tx FIFO empty" "B_0x0,B_0x1" bitfld.long 0x0 10. "TCF,Transmission cancellation finished" "B_0x0,B_0x1" bitfld.long 0x0 9. "TC,Transmission completed" "B_0x0,B_0x1" bitfld.long 0x0 8. "HPM,High priority message" "B_0x0,B_0x1" bitfld.long 0x0 7. "RF1L,Rx FIFO 1 message lost" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "RF1F,Rx FIFO 1 full" "B_0x0,B_0x1" bitfld.long 0x0 5. "RF1W,Rx FIFO 1 watermark reached" "B_0x0,B_0x1" bitfld.long 0x0 4. "RF1N,Rx FIFO 1 new message" "B_0x0,B_0x1" bitfld.long 0x0 3. "RF0L,Rx FIFO 0 message lost" "B_0x0,B_0x1" bitfld.long 0x0 2. "RF0F,Rx FIFO 0 full" "B_0x0,B_0x1" bitfld.long 0x0 1. "RF0W,Rx FIFO 0 watermark reached" "B_0x0,B_0x1" bitfld.long 0x0 0. "RF0N,Rx FIFO 0 New message" "B_0x0,B_0x1" line.long 0x4 "FDCAN_IE,FDCAN interrupt enable register" bitfld.long 0x4 29. "ARAE,Access to Reserved address enable" "0,1" bitfld.long 0x4 28. "PEDE,Protocol error in data phase enable" "0,1" bitfld.long 0x4 27. "PEAE,Protocol error in Arbitration phase enable" "0,1" bitfld.long 0x4 26. "WDIE,Watchdog interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 25. "BOE,Bus_Off status" "B_0x0,B_0x1" bitfld.long 0x4 24. "EWE,Warning status interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "EPE,Error passive interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 22. "ELOE,Error logging overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "DRXE,Message stored to dedicated Rx buffer interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 18. "TOOE,Timeout occurred interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 17. "MRAFE,Message RAM access failure interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "TSWE,Timestamp wraparound interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 15. "TEFLE,Tx event FIFO element lost interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 14. "TEFFE,Tx event FIFO full interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "TEFWE,Tx event FIFO watermark reached interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 12. "TEFNE,Tx event FIFO new entry interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "TFEE,Tx FIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 10. "TCFE,Transmission cancellation finished interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "TCE,Transmission completed interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "HPME,High priority message interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "RF1LE,Rx FIFO 1 message lost interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 6. "RF1FE,Rx FIFO 1 full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "RF1WE,Rx FIFO 1 watermark reached interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "RF1NE,Rx FIFO 1 new message interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "RF0LE,Rx FIFO 0 message lost interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "RF0FE,Rx FIFO 0 full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "RF0WE,Rx FIFO 0 watermark reached interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "RF0NE,Rx FIFO 0 new message interrupt enable" "B_0x0,B_0x1" line.long 0x8 "FDCAN_ILS,FDCAN interrupt line select register" bitfld.long 0x8 29. "ARAL,Access to reserved address line" "0,1" bitfld.long 0x8 28. "PEDL,Protocol error in data phase line" "0,1" bitfld.long 0x8 27. "PEAL,Protocol error in arbitration phase line" "0,1" bitfld.long 0x8 26. "WDIL,Watchdog interrupt line" "0,1" bitfld.long 0x8 25. "BOL,Bus_Off status" "0,1" bitfld.long 0x8 24. "EWL,Warning status interrupt line" "0,1" bitfld.long 0x8 23. "EPL,Error passive interrupt line" "0,1" newline bitfld.long 0x8 22. "ELOL,Error logging overflow interrupt line" "0,1" bitfld.long 0x8 19. "DRXL,Message stored to dedicated Rx buffer interrupt line" "0,1" bitfld.long 0x8 18. "TOOL,Timeout occurred interrupt line" "0,1" bitfld.long 0x8 17. "MRAFL,Message RAM access failure interrupt line" "0,1" bitfld.long 0x8 16. "TSWL,Timestamp wraparound interrupt line" "0,1" bitfld.long 0x8 15. "TEFLL,Tx event FIFO element Lost interrupt line" "0,1" bitfld.long 0x8 14. "TEFFL,Tx event FIFO full interrupt line" "0,1" newline bitfld.long 0x8 13. "TEFWL,Tx event FIFO watermark reached interrupt line" "0,1" bitfld.long 0x8 12. "TEFNL,Tx event FIFO new entry interrupt line" "0,1" bitfld.long 0x8 11. "TFEL,Tx FIFO empty interrupt line" "0,1" bitfld.long 0x8 10. "TCFL,Transmission cancellation finished interrupt line" "0,1" bitfld.long 0x8 9. "TCL,Transmission completed interrupt line" "0,1" bitfld.long 0x8 8. "HPML,High priority message interrupt line" "0,1" bitfld.long 0x8 7. "RF1LL,Rx FIFO 1 message lost interrupt line" "0,1" newline bitfld.long 0x8 6. "RF1FL,Rx FIFO 1 full interrupt line" "0,1" bitfld.long 0x8 5. "RF1WL,Rx FIFO 1 watermark reached interrupt line" "0,1" bitfld.long 0x8 4. "RF1NL,Rx FIFO 1 new message interrupt line" "0,1" bitfld.long 0x8 3. "RF0LL,Rx FIFO 0 message lost interrupt line" "0,1" bitfld.long 0x8 2. "RF0FL,Rx FIFO 0 full interrupt line" "0,1" bitfld.long 0x8 1. "RF0WL,Rx FIFO 0 watermark reached interrupt line" "0,1" bitfld.long 0x8 0. "RF0NL,Rx FIFO 0 new message interrupt line" "0,1" line.long 0xC "FDCAN_ILE,FDCAN interrupt line enable register" bitfld.long 0xC 1. "EINT1,Enable interrupt line 1" "B_0x0,B_0x1" bitfld.long 0xC 0. "EINT0,Enable interrupt line 0" "B_0x0,B_0x1" group.long 0x80++0xB line.long 0x0 "FDCAN_GFC,FDCAN global filter configuration register" bitfld.long 0x0 4.--5. "ANFS,Accept non-matching frames standard" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "ANFE,Accept non-matching frames extended" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "RRFS,Reject remote frames standard" "B_0x0,B_0x1" bitfld.long 0x0 0. "RRFE,Reject remote frames extended" "B_0x0,B_0x1" line.long 0x4 "FDCAN_SIDFC,FDCAN standard ID filter configuration register" hexmask.long.byte 0x4 16.--23. 1. "LSS,List size standard" hexmask.long.word 0x4 2.--15. 1. "FLSSA,Filter list standard start address" line.long 0x8 "FDCAN_XIDFC,FDCAN extended ID filter configuration register" hexmask.long.byte 0x8 16.--23. 1. "LSE,List size extended" hexmask.long.word 0x8 2.--15. 1. "FLESA,Filter list extended start address" group.long 0x90++0x3 line.long 0x0 "FDCAN_XIDAM,FDCAN extended ID and mask register" hexmask.long 0x0 0.--28. 1. "EIDM,Extended ID Mask" rgroup.long 0x94++0x3 line.long 0x0 "FDCAN_HPMS,FDCAN high priority message status register" bitfld.long 0x0 15. "FLST,Filter list" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--14. 1. "FIDX,Filter index" bitfld.long 0x0 6.--7. "MSI,Message storage indicator" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 0.--5. 1. "BIDX,Buffer index" group.long 0x98++0x1B line.long 0x0 "FDCAN_NDAT1,FDCAN new data 1 register" bitfld.long 0x0 31. "ND31,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 30. "ND30,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 29. "ND29,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 28. "ND28,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 27. "ND27,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 26. "ND26,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 25. "ND25,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "ND24,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 23. "ND23,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 22. "ND22,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 21. "ND21,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 20. "ND20,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 19. "ND19,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 18. "ND18,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "ND17,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 16. "ND16,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 15. "ND15,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 14. "ND14,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 13. "ND13,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 12. "ND12,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 11. "ND11,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "ND10,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 9. "ND9,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 8. "ND8,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 7. "ND7,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 6. "ND6,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 5. "ND5,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 4. "ND4,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "ND3,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 2. "ND2,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 1. "ND1,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 0. "ND0,New data[31:0]" "B_0x0,B_0x1" line.long 0x4 "FDCAN_NDAT2,FDCAN new data 2 register" bitfld.long 0x4 31. "ND63,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 30. "ND62,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 29. "ND61,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 28. "ND60,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 27. "ND59,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 26. "ND58,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 25. "ND57,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "ND56,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 23. "ND55,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 22. "ND54,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 21. "ND53,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 20. "ND52,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 19. "ND51,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 18. "ND50,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "ND49,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 16. "ND48,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 15. "ND47,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 14. "ND46,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 13. "ND45,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 12. "ND44,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 11. "ND43,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "ND42,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 9. "ND41,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 8. "ND40,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 7. "ND39,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 6. "ND38,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 5. "ND37,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 4. "ND36,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "ND35,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 2. "ND34,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 1. "ND33,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 0. "ND32,New data[63:32]" "B_0x0,B_0x1" line.long 0x8 "FDCAN_RXF0C,FDCAN Rx FIFO 0 configuration register" bitfld.long 0x8 31. "F0OM,FIFO 0 operation mode" "B_0x0,B_0x1" hexmask.long.byte 0x8 24.--30. 1. "F0WM,FIFO 0 watermark" hexmask.long.byte 0x8 16.--22. 1. "F0S,Rx FIFO 0 size" hexmask.long.word 0x8 2.--15. 1. "F0SA,Rx FIFO 0 start address" line.long 0xC "FDCAN_RXF0S,FDCAN Rx FIFO 0 status register" bitfld.long 0xC 25. "RF0L,Rx FIFO 0 message lost" "B_0x0,B_0x1" bitfld.long 0xC 24. "F0F,Rx FIFO 0 full" "B_0x0,B_0x1" hexmask.long.byte 0xC 16.--21. 1. "F0PI,Rx FIFO 0 put index" hexmask.long.byte 0xC 8.--13. 1. "F0GI,Rx FIFO 0 get index" hexmask.long.byte 0xC 0.--6. 1. "F0FL,Rx FIFO 0 fill level" line.long 0x10 "FDCAN_RXF0A,FDCAN Rx FIFO 0 acknowledge register" hexmask.long.byte 0x10 0.--5. 1. "F0AI,Rx FIFO 0 acknowledge index" line.long 0x14 "FDCAN_RXBC,FDCAN Rx buffer configuration register" hexmask.long.word 0x14 2.--15. 1. "RBSA,Rx buffer start address" line.long 0x18 "FDCAN_RXF1C,FDCAN Rx FIFO 1 configuration register" bitfld.long 0x18 31. "F1OM,FIFO 1 operation mode" "B_0x0,B_0x1" hexmask.long.byte 0x18 24.--30. 1. "F1WM,Rx FIFO 1 watermark" hexmask.long.byte 0x18 16.--22. 1. "F1S,Rx FIFO 1 size" hexmask.long.word 0x18 2.--15. 1. "F1SA,Rx FIFO 1 start address" rgroup.long 0xB4++0x3 line.long 0x0 "FDCAN_RXF1S,FDCAN Rx FIFO 1 status register" bitfld.long 0x0 30.--31. "DMS,Debug message status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 25. "RF1L,Rx FIFO 1 message lost" "B_0x0,B_0x1" bitfld.long 0x0 24. "F1F,Rx FIFO 1 full" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--21. 1. "F1PI,Rx FIFO 1 put index" hexmask.long.byte 0x0 8.--13. 1. "F1GI,Rx FIFO 1 get index" hexmask.long.byte 0x0 0.--6. 1. "F1FL,Rx FIFO 1 fill level" group.long 0xB8++0x3 line.long 0x0 "FDCAN_RXF1A,FDCAN Rx FIFO 1 acknowledge register" hexmask.long.byte 0x0 0.--5. 1. "F1AI,Rx FIFO 1 acknowledge index" rgroup.long 0xBC++0x3 line.long 0x0 "FDCAN_RXESC,FDCAN Rx buffer element size configuration register" bitfld.long 0x0 8.--10. "RBDS,Rx buffer data field size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 4.--6. "F1DS,Rx FIFO 0 data field size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 0.--2. "F0DS,Rx FIFO 1 data field size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" group.long 0xC0++0x3 line.long 0x0 "FDCAN_TXBC,FDCAN Tx buffer configuration register" bitfld.long 0x0 30. "TFQM,Tx FIFO/queue mode" "B_0x0,B_0x1" hexmask.long.byte 0x0 24.--29. 1. "TFQS,Transmit FIFO/queue size" hexmask.long.byte 0x0 16.--21. 1. "NDTB,Number of dedicated transmit buffers" hexmask.long.word 0x0 2.--15. 1. "TBSA,Tx buffers start address" rgroup.long 0xC4++0xB line.long 0x0 "FDCAN_TXFQS,FDCAN Tx FIFO/queue status register" bitfld.long 0x0 21. "TFQF,Tx FIFO/queue full" "0,1" hexmask.long.byte 0x0 16.--20. 1. "TFQPI,Tx FIFO/queue put index" hexmask.long.byte 0x0 8.--12. 1. "TFGI,Tx FIFO get index." hexmask.long.byte 0x0 0.--5. 1. "TFFL,Tx FIFO free level" line.long 0x4 "FDCAN_TXESC,FDCAN Tx buffer element size configuration register" bitfld.long 0x4 0.--2. "TBDS,Tx buffer data Field size:" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "FDCAN_TXBRP,FDCAN Tx buffer request pending register" hexmask.long 0x8 0.--31. 1. "TRP,Transmission request pending" group.long 0xD0++0x7 line.long 0x0 "FDCAN_TXBAR,FDCAN Tx buffer add request register" hexmask.long 0x0 0.--31. 1. "AR,Add request" line.long 0x4 "FDCAN_TXBCR,FDCAN Tx buffer cancellation request register" hexmask.long 0x4 0.--31. 1. "CR,Cancellation request" rgroup.long 0xD8++0x7 line.long 0x0 "FDCAN_TXBTO,FDCAN Tx buffer transmission occurred register" hexmask.long 0x0 0.--31. 1. "TO,Transmission occurred" line.long 0x4 "FDCAN_TXBCF,FDCAN Tx buffer cancellation finished register" hexmask.long 0x4 0.--31. 1. "CF,Cancellation finished" group.long 0xE0++0x7 line.long 0x0 "FDCAN_TXBTIE,FDCAN Tx buffer transmission interrupt enable register" hexmask.long 0x0 0.--31. 1. "TIE,Transmission interrupt enable" line.long 0x4 "FDCAN_TXBCIE,FDCAN Tx buffer cancellation finished interrupt enable register" hexmask.long 0x4 0.--31. 1. "CFIE,Cancellation finished interrupt enable" group.long 0xF0++0x3 line.long 0x0 "FDCAN_TXEFC,FDCAN Tx event FIFO configuration register" hexmask.long.byte 0x0 24.--29. 1. "EFWM,Event FIFO watermark" hexmask.long.byte 0x0 16.--21. 1. "EFS,Event FIFO size." hexmask.long.word 0x0 2.--15. 1. "EFSA,Event FIFO start address" rgroup.long 0xF4++0x3 line.long 0x0 "FDCAN_TXEFS,FDCAN Tx event FIFO status register" bitfld.long 0x0 25. "TEFL,Tx event FIFO element lost" "0,1" bitfld.long 0x0 24. "EFF,Event FIFO full" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--20. 1. "EFPI,Event FIFO put index" hexmask.long.byte 0x0 8.--12. 1. "EFGI,Event FIFO get index" hexmask.long.byte 0x0 0.--5. 1. "EFFL,Event FIFO fill level" group.long 0xF8++0x3 line.long 0x0 "FDCAN_TXEFA,FDCAN Tx event FIFO acknowledge register" hexmask.long.byte 0x0 0.--4. 1. "EFAI,Event FIFO acknowledge index" group.long 0x100++0x2B line.long 0x0 "FDCAN_TTTMC,FDCAN TT trigger memory configuration register" hexmask.long.byte 0x0 16.--22. 1. "TME,Trigger memory elements" hexmask.long.word 0x0 2.--15. 1. "TMSA,Trigger memory start address." line.long 0x4 "FDCAN_TTRMC,FDCAN TT reference message configuration register" bitfld.long 0x4 31. "RMPS,Reference message payload select" "B_0x0,B_0x1" bitfld.long 0x4 30. "XTD,Extended identifier" "B_0x0,B_0x1" hexmask.long 0x4 0.--28. 1. "RID,Reference identifier." line.long 0x8 "FDCAN_TTOCF,FDCAN TT operation configuration register" bitfld.long 0x8 26. "EVTP,Event trigger polarity." "B_0x0,B_0x1" bitfld.long 0x8 25. "ECC,Enable clock calibration." "B_0x0,B_0x1" bitfld.long 0x8 24. "EGTF,Enable global time filtering." "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--23. 1. "AWL,Application watchdog limit." bitfld.long 0x8 15. "EECS,Enable external clock synchronization" "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--14. 1. "IRTO,Initial reference trigger offset." bitfld.long 0x8 5.--7. "LDSDL,LD of synchronization deviation limit." "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 4. "TM,Time master." "B_0x0,B_0x1" bitfld.long 0x8 3. "GEN,Gap enable." "B_0x0,B_0x1" bitfld.long 0x8 0.--1. "OM,Operation mode." "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "FDCAN_TTMLM,FDCAN TT matrix limits register" hexmask.long.word 0xC 16.--27. 1. "ENTT,Expected number of Tx triggers" hexmask.long.byte 0xC 8.--11. 1. "TXEW,Tx enable window" bitfld.long 0xC 6.--7. "CSS,Cycle start synchronization" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0xC 0.--5. 1. "CCM,Cycle count Max" line.long 0x10 "FDCAN_TURCF,FDCAN TUR configuration register" bitfld.long 0x10 31. "ELT,Enable local time." "B_0x0,B_0x1" hexmask.long.word 0x10 16.--29. 1. "DC,Denominator configuration." hexmask.long.word 0x10 0.--15. 1. "NCL,Numerator configuration low." line.long 0x14 "FDCAN_TTOCN,FDCAN TT operation control register" rbitfld.long 0x14 15. "LCKC,TT operation control register locked." "B_0x0,B_0x1" bitfld.long 0x14 13. "ESCN,External synchronization control" "B_0x0,B_0x1" bitfld.long 0x14 12. "NIG,Next is gap." "B_0x0,B_0x1" bitfld.long 0x14 11. "TMG,Time mark gap." "B_0x0,B_0x1" bitfld.long 0x14 10. "FGP,Finish gap." "B_0x0,B_0x1" bitfld.long 0x14 9. "GCS,Gap control select" "B_0x0,B_0x1" bitfld.long 0x14 8. "TTIE,Trigger time mark interrupt pulse enable" "B_0x0,B_0x1" newline bitfld.long 0x14 6.--7. "TMC,Register time mark compare." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 5. "RTIE,Register time mark interrupt pulse enable." "B_0x0,B_0x1" bitfld.long 0x14 3.--4. "SWS,Stop watch source." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 2. "SWP,Stop watch polarity." "B_0x0,B_0x1" bitfld.long 0x14 1. "ECS,External clock synchronization." "0,1" bitfld.long 0x14 0. "SGT,Set global time." "0,1" line.long 0x18 "FDCAN_TTGTP,FDCAN TT global time preset register" hexmask.long.word 0x18 16.--31. 1. "CTP,Cycle time target phase" hexmask.long.word 0x18 0.--15. 1. "TP,Time preset" line.long 0x1C "FDCAN_TTTMK,FDCAN TT time mark register" rbitfld.long 0x1C 31. "LCKM,TT time mark register locked" "B_0x0,B_0x1" hexmask.long.byte 0x1C 16.--22. 1. "TICC,Time mark cycle code" hexmask.long.word 0x1C 0.--15. 1. "TM,Time mark" line.long 0x20 "FDCAN_TTIR,FDCAN TT interrupt register" bitfld.long 0x20 18. "CER,Configuration error" "B_0x0,B_0x1" bitfld.long 0x20 17. "AW,Application watchdog" "B_0x0,B_0x1" bitfld.long 0x20 16. "WT,Watch trigger" "B_0x0,B_0x1" bitfld.long 0x20 15. "IWTG,Initialization watch trigger" "0,1" bitfld.long 0x20 14. "ELC,Error level changed" "B_0x0,B_0x1" bitfld.long 0x20 13. "SE2,Scheduling error 2" "B_0x0,B_0x1" bitfld.long 0x20 12. "SE1,Scheduling error 1" "B_0x0,B_0x1" newline bitfld.long 0x20 11. "TXO,Tx count overflow" "B_0x0,B_0x1" bitfld.long 0x20 10. "TXU,Tx count underflow" "B_0x0,B_0x1" bitfld.long 0x20 9. "GTE,Global time error" "B_0x0,B_0x1" bitfld.long 0x20 8. "GTD,Global time discontinuity" "B_0x0,B_0x1" bitfld.long 0x20 7. "GTW,Global time wrap" "B_0x0,B_0x1" bitfld.long 0x20 6. "SWE,Stop watch event" "B_0x0,B_0x1" bitfld.long 0x20 5. "TTMI,Trigger time mark event internal" "B_0x0,B_0x1" newline bitfld.long 0x20 4. "RTMI,Register time mark interrupt" "B_0x0,B_0x1" bitfld.long 0x20 3. "SOG,Start of gap" "0,1" bitfld.long 0x20 2. "CSM,Change of synchronization mode" "B_0x0,B_0x1" bitfld.long 0x20 1. "SMC,Start of matrix cycle" "B_0x0,B_0x1" bitfld.long 0x20 0. "SBC,Start of basic cycle" "B_0x0,B_0x1" line.long 0x24 "FDCAN_TTIE,FDCAN TT interrupt enable register" bitfld.long 0x24 18. "CERE,Configuration error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 17. "AWE,Application watchdog interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 16. "WTE,Watch trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 15. "IWTE,Initialization watch trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 14. "ELCE,Change error level interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 13. "SE2E,Scheduling error 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 12. "SE1E,Scheduling error 1 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x24 11. "TXOE,Tx count overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 10. "TXUE,Tx count underflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 9. "GTEE,Global time error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 8. "GTDE,Global time discontinuity interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 7. "GTWE,Global time wrap interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 6. "SWEE,Stop watch event interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 5. "TTMIE,Trigger time mark event internal interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x24 4. "RTMIE,Register time mark interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 3. "SOGE,Start of gap interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 2. "CSME,Change of synchronization mode interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 1. "SMCE,Start of matrix cycle interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "SBCE,Start of basic cycle interrupt enable" "B_0x0,B_0x1" line.long 0x28 "FDCAN_TTILS,FDCAN TT interrupt line select register" bitfld.long 0x28 18. "CERL,Configuration error interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 17. "AWL,Application watchdog interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 16. "WTL,Watch trigger interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 15. "IWTL,Initialization watch trigger interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 14. "ELCL,Change error level interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 13. "SE2L,Scheduling error 2 interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 12. "SE1L,Scheduling error 1 interrupt line" "B_0x0,B_0x1" newline bitfld.long 0x28 11. "TXOL,Tx count overflow interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 10. "TXUL,Tx count underflow interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 9. "GTEL,Global time error interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 8. "GTDL,Global time discontinuity interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 7. "GTWL,Global time wrap interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 6. "SWEL,Stop watch event interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 5. "TTMIL,Trigger time mark event internal interrupt line" "B_0x0,B_0x1" newline bitfld.long 0x28 4. "RTMIL,Register time mark interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 3. "SOGL,Start of gap interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 2. "CSML,Change of synchronization mode interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 1. "SMCL,Start of matrix cycle interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 0. "SBCL,Start of basic cycle interrupt line" "B_0x0,B_0x1" rgroup.long 0x12C++0x17 line.long 0x0 "FDCAN_TTOST,FDCAN TT operation status register" bitfld.long 0x0 31. "SPL,Schedule phase lock" "B_0x0,B_0x1" bitfld.long 0x0 30. "WECS,Wait for external clock synchronization." "B_0x0,B_0x1" bitfld.long 0x0 29. "AWE,Application watchdog event" "B_0x0,B_0x1" bitfld.long 0x0 28. "WFE,Wait for event" "B_0x0,B_0x1" bitfld.long 0x0 27. "GSI,Gap started indicator" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "TMP,Time master priority" "0,1,2,3,4,5,6,7" bitfld.long 0x0 23. "GFI,Gap finished indicator" "B_0x0,B_0x1" newline bitfld.long 0x0 22. "WGTD,Wait for global time discontinuity" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "RTO,Reference trigger offset" bitfld.long 0x0 7. "QCS,Quality of clock speed" "B_0x0,B_0x1" bitfld.long 0x0 6. "QGTP,Quality of global time phase" "B_0x0,B_0x1" bitfld.long 0x0 4.--5. "SYS,Synchronization state" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MS,Master state" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "EL,Error level" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "FDCAN_TURNA,FDCAN TUR numerator actual register" hexmask.long.tbyte 0x4 0.--17. 1. "NAV,Numerator actual value" line.long 0x8 "FDCAN_TTLGT,FDCAN TT local and global time register" hexmask.long.word 0x8 16.--31. 1. "GT,Global time" hexmask.long.word 0x8 0.--15. 1. "LT,Local time" line.long 0xC "FDCAN_TTCTC,FDCAN TT cycle time and count register" hexmask.long.byte 0xC 16.--21. 1. "CC,Cycle count" hexmask.long.word 0xC 0.--15. 1. "CT,Cycle time" line.long 0x10 "FDCAN_TTCPT,FDCAN TT capture time register" hexmask.long.word 0x10 16.--31. 1. "SWV,Stop watch value" hexmask.long.byte 0x10 0.--5. 1. "CCV,Cycle count value" line.long 0x14 "FDCAN_TTCSM,FDCAN TT cycle sync mark register" hexmask.long.word 0x14 0.--15. 1. "CSM,Cycle sync mark" group.long 0x300++0x3 line.long 0x0 "FDCAN_TTTS,FDCAN TT trigger select register" bitfld.long 0x0 4.--5. "EVTSEL,Event trigger input selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "SWTDEL,Stop watch trigger input selection" "B_0x0,B_0x1,B_0x2,B_0x3" tree.end tree "FDCAN2_S" base ad:0x502E0000 rgroup.long 0x0++0x3 line.long 0x0 "FDCAN_CREL,FDCAN core release register" hexmask.long.byte 0x0 28.--31. 1. "REL,Core release = 3" hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of core release = 2" hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of core release = 1" hexmask.long.byte 0x0 16.--19. 1. "YEAR,Timestamp year = 4" hexmask.long.byte 0x0 8.--15. 1. "MON,Timestamp month = 12" hexmask.long.byte 0x0 0.--7. 1. "DAY,Timestamp day =18" rgroup.long 0x0++0x7 line.long 0x0 "FDCAN_CCU_CREL,Clock calibration unit core release register" hexmask.long.byte 0x0 28.--31. 1. "REL,Core release = 1" hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of core release = 1" hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of core release = 1" hexmask.long.byte 0x0 16.--19. 1. "YEAR,Timestamp year =" hexmask.long.byte 0x0 8.--15. 1. "MON,Timestamp month = 12" hexmask.long.byte 0x0 0.--7. 1. "DAY,Timestamp day = 18" line.long 0x4 "FDCAN_ENDN,FDCAN Endian register" hexmask.long 0x4 0.--31. 1. "ETV,Endianness test value" group.long 0x4++0x3 line.long 0x0 "FDCAN_CCU_CCFG,Calibration configuration register" bitfld.long 0x0 31. "SWR,Software reset" "0,1" hexmask.long.byte 0x0 16.--19. 1. "CDIV,Clock divider" hexmask.long.byte 0x0 8.--15. 1. "OCPM,Oscillator clock periods minimum" bitfld.long 0x0 7. "CFL,Calibration field length" "B_0x0,B_0x1" bitfld.long 0x0 6. "BCC,Bypass clock calibration" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--4. 1. "TQBT,Time quanta per bit time" rgroup.long 0x8++0x3 line.long 0x0 "FDCAN_CCU_CSTAT,Calibration status register" bitfld.long 0x0 30.--31. "CALS,Calibration state" "B_0x0,B_0x1,B_0x2,?" hexmask.long.word 0x0 18.--28. 1. "TQC,Time quanta counter" hexmask.long.tbyte 0x0 0.--17. 1. "OCPC,Oscillator clock period counter" group.long 0xC++0x3 line.long 0x0 "FDCAN_DBTP,FDCAN data bit timing and prescaler register" bitfld.long 0x0 23. "TDC,Transceiver delay compensation" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--20. 1. "DBRP,Data bitrate prescaler" hexmask.long.byte 0x0 8.--12. 1. "DTSEG1,Data time segment before sample point" hexmask.long.byte 0x0 4.--7. 1. "DTSEG2,Data time segment after sample point" hexmask.long.byte 0x0 0.--3. 1. "DSJW,Synchronization jump width" group.long 0xC++0x7 line.long 0x0 "FDCAN_CCU_CWD,Calibration watchdog register" hexmask.long.word 0x0 16.--31. 1. "WDV,Watchdog value" hexmask.long.word 0x0 0.--15. 1. "WDC,WDC" line.long 0x4 "FDCAN_TEST,FDCAN test register" rbitfld.long 0x4 7. "RX,Receive pin" "B_0x0,B_0x1" bitfld.long 0x4 5.--6. "TX,Control of transmit pin" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 4. "LBCK,Loop back mode" "B_0x0,B_0x1" group.long 0x10++0x7 line.long 0x0 "FDCAN_CCU_IR,Clock calibration unit interrupt register" bitfld.long 0x0 1. "CSC,Calibration state changed" "B_0x0,B_0x1" bitfld.long 0x0 0. "CWE,Calibration watchdog event" "B_0x0,B_0x1" line.long 0x4 "FDCAN_RWD,FDCAN RAM watchdog register" hexmask.long.byte 0x4 8.--15. 1. "WDV,Watchdog value" hexmask.long.byte 0x4 0.--7. 1. "WDC,Watchdog configuration" group.long 0x14++0x1B line.long 0x0 "FDCAN_CCU_IE,Clock calibration unit interrupt enable register" bitfld.long 0x0 1. "CSCE,Calibration state changed enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CWEE,Calibration watchdog event enable" "B_0x0,B_0x1" line.long 0x4 "FDCAN_CCCR,FDCAN CC control register" bitfld.long 0x4 15. "NISO,Non ISO operation" "B_0x0,B_0x1" bitfld.long 0x4 14. "TXP,If this bit is set the FDCAN pauses for two CAN bit times before starting the next transmission after successfully transmitting a frame." "B_0x0,B_0x1" bitfld.long 0x4 13. "EFBI,Edge filtering during bus integration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PXHD,Protocol exception handling disable" "B_0x0,B_0x1" bitfld.long 0x4 9. "BRSE,FDCAN bitrate switching" "B_0x0,B_0x1" bitfld.long 0x4 8. "FDOE,FD operation enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "TEST,Test mode enable" "B_0x0,B_0x1" newline bitfld.long 0x4 6. "DAR,Disable automatic retransmission" "B_0x0,B_0x1" bitfld.long 0x4 5. "MON,Bus monitoring mode" "B_0x0,B_0x1" bitfld.long 0x4 4. "CSR,Clock stop request" "B_0x0,B_0x1" rbitfld.long 0x4 3. "CSA,Clock stop acknowledge" "B_0x0,B_0x1" bitfld.long 0x4 2. "ASM,ASM restricted operation mode" "B_0x0,B_0x1" bitfld.long 0x4 1. "CCE,Configuration change enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "INIT,Initialization" "B_0x0,B_0x1" line.long 0x8 "FDCAN_NBTP,FDCAN nominal bit timing and prescaler register" hexmask.long.byte 0x8 25.--31. 1. "NSJW,Nominal (re)synchronization jump width" hexmask.long.word 0x8 16.--24. 1. "NBRP,Bitrate prescaler" hexmask.long.byte 0x8 8.--15. 1. "NTSEG1,Nominal time segment before sample point" hexmask.long.byte 0x8 0.--6. 1. "NTSEG2,Nominal time segment after sample point" line.long 0xC "FDCAN_TSCC,FDCAN timestamp counter configuration register" hexmask.long.byte 0xC 16.--19. 1. "TCP,Timestamp counter prescaler" bitfld.long 0xC 0.--1. "TSS,Timestamp select" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x10 "FDCAN_TSCV,FDCAN timestamp counter value register" hexmask.long.word 0x10 0.--15. 1. "TSC,Timestamp counter" line.long 0x14 "FDCAN_TOCC,FDCAN timeout counter configuration register" hexmask.long.word 0x14 16.--31. 1. "TOP,Timeout period" bitfld.long 0x14 1.--2. "TOS,Timeout select" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 0. "ETOC,Enable timeout counter" "B_0x0,B_0x1" line.long 0x18 "FDCAN_TOCV,FDCAN timeout counter value register" hexmask.long.word 0x18 0.--15. 1. "TOC,Timeout counter" group.long 0x40++0xB line.long 0x0 "FDCAN_ECR,FDCAN error counter register" hexmask.long.byte 0x0 16.--23. 1. "CEL,CAN error logging" rbitfld.long 0x0 15. "RP,Receive error passive" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--14. 1. "REC,Receive error counter" hexmask.long.byte 0x0 0.--7. 1. "TEC,Transmit error counter" line.long 0x4 "FDCAN_PSR,FDCAN protocol status register" hexmask.long.byte 0x4 16.--22. 1. "TDCV,Transmitter delay compensation value" bitfld.long 0x4 14. "PXE,Protocol exception event" "B_0x0,B_0x1" bitfld.long 0x4 13. "REDL,Received FDCAN message" "B_0x0,B_0x1" bitfld.long 0x4 12. "RBRS,BRS flag of last received FDCAN message" "B_0x0,B_0x1" bitfld.long 0x4 11. "RESI,ESI flag of last received FDCAN message" "B_0x0,B_0x1" rbitfld.long 0x4 8.--10. "DLEC,Data last error code" "0,1,2,3,4,5,6,7" rbitfld.long 0x4 7. "BO,Bus_Off status" "B_0x0,B_0x1" newline rbitfld.long 0x4 6. "EW,Warning status" "B_0x0,B_0x1" rbitfld.long 0x4 5. "EP,Error passive" "B_0x0,B_0x1" rbitfld.long 0x4 3.--4. "ACT,Activity" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x4 0.--2. "LEC,Last error code" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "FDCAN_TDCR,FDCAN transmitter delay compensation register" hexmask.long.byte 0x8 8.--14. 1. "TDCO,Transmitter delay compensation offset" hexmask.long.byte 0x8 0.--6. 1. "TDCF,Transmitter delay compensation filter window length" group.long 0x50++0xF line.long 0x0 "FDCAN_IR,FDCAN interrupt register" bitfld.long 0x0 29. "ARA,Access to reserved address" "B_0x0,B_0x1" bitfld.long 0x0 28. "PED,Protocol error in data phase (data bit time is used)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PEA,Protocol error in arbitration phase (nominal bit time is used)" "B_0x0,B_0x1" bitfld.long 0x0 26. "WDI,Watchdog interrupt" "B_0x0,B_0x1" bitfld.long 0x0 25. "BO,Bus_Off status" "B_0x0,B_0x1" bitfld.long 0x0 24. "EW,Warning status" "B_0x0,B_0x1" bitfld.long 0x0 23. "EP,Error passive" "B_0x0,B_0x1" newline bitfld.long 0x0 22. "ELO,Error logging overflow" "B_0x0,B_0x1" bitfld.long 0x0 19. "DRX,Message stored to dedicated Rx buffer" "B_0x0,B_0x1" bitfld.long 0x0 18. "TOO,Timeout occurred" "B_0x0,B_0x1" bitfld.long 0x0 17. "MRAF,Message RAM access failure" "B_0x0,B_0x1" bitfld.long 0x0 16. "TSW,Timestamp wraparound" "B_0x0,B_0x1" bitfld.long 0x0 15. "TEFL,Tx event FIFO element lost" "B_0x0,B_0x1" bitfld.long 0x0 14. "TEFF,Tx event FIFO full" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "TEFW,Tx event FIFO watermark reached" "B_0x0,B_0x1" bitfld.long 0x0 12. "TEFN,Tx event FIFO new entry" "B_0x0,B_0x1" bitfld.long 0x0 11. "TFE,Tx FIFO empty" "B_0x0,B_0x1" bitfld.long 0x0 10. "TCF,Transmission cancellation finished" "B_0x0,B_0x1" bitfld.long 0x0 9. "TC,Transmission completed" "B_0x0,B_0x1" bitfld.long 0x0 8. "HPM,High priority message" "B_0x0,B_0x1" bitfld.long 0x0 7. "RF1L,Rx FIFO 1 message lost" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "RF1F,Rx FIFO 1 full" "B_0x0,B_0x1" bitfld.long 0x0 5. "RF1W,Rx FIFO 1 watermark reached" "B_0x0,B_0x1" bitfld.long 0x0 4. "RF1N,Rx FIFO 1 new message" "B_0x0,B_0x1" bitfld.long 0x0 3. "RF0L,Rx FIFO 0 message lost" "B_0x0,B_0x1" bitfld.long 0x0 2. "RF0F,Rx FIFO 0 full" "B_0x0,B_0x1" bitfld.long 0x0 1. "RF0W,Rx FIFO 0 watermark reached" "B_0x0,B_0x1" bitfld.long 0x0 0. "RF0N,Rx FIFO 0 New message" "B_0x0,B_0x1" line.long 0x4 "FDCAN_IE,FDCAN interrupt enable register" bitfld.long 0x4 29. "ARAE,Access to Reserved address enable" "0,1" bitfld.long 0x4 28. "PEDE,Protocol error in data phase enable" "0,1" bitfld.long 0x4 27. "PEAE,Protocol error in Arbitration phase enable" "0,1" bitfld.long 0x4 26. "WDIE,Watchdog interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 25. "BOE,Bus_Off status" "B_0x0,B_0x1" bitfld.long 0x4 24. "EWE,Warning status interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "EPE,Error passive interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 22. "ELOE,Error logging overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "DRXE,Message stored to dedicated Rx buffer interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 18. "TOOE,Timeout occurred interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 17. "MRAFE,Message RAM access failure interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "TSWE,Timestamp wraparound interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 15. "TEFLE,Tx event FIFO element lost interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 14. "TEFFE,Tx event FIFO full interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "TEFWE,Tx event FIFO watermark reached interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 12. "TEFNE,Tx event FIFO new entry interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "TFEE,Tx FIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 10. "TCFE,Transmission cancellation finished interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "TCE,Transmission completed interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "HPME,High priority message interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "RF1LE,Rx FIFO 1 message lost interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 6. "RF1FE,Rx FIFO 1 full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "RF1WE,Rx FIFO 1 watermark reached interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "RF1NE,Rx FIFO 1 new message interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "RF0LE,Rx FIFO 0 message lost interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "RF0FE,Rx FIFO 0 full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "RF0WE,Rx FIFO 0 watermark reached interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "RF0NE,Rx FIFO 0 new message interrupt enable" "B_0x0,B_0x1" line.long 0x8 "FDCAN_ILS,FDCAN interrupt line select register" bitfld.long 0x8 29. "ARAL,Access to reserved address line" "0,1" bitfld.long 0x8 28. "PEDL,Protocol error in data phase line" "0,1" bitfld.long 0x8 27. "PEAL,Protocol error in arbitration phase line" "0,1" bitfld.long 0x8 26. "WDIL,Watchdog interrupt line" "0,1" bitfld.long 0x8 25. "BOL,Bus_Off status" "0,1" bitfld.long 0x8 24. "EWL,Warning status interrupt line" "0,1" bitfld.long 0x8 23. "EPL,Error passive interrupt line" "0,1" newline bitfld.long 0x8 22. "ELOL,Error logging overflow interrupt line" "0,1" bitfld.long 0x8 19. "DRXL,Message stored to dedicated Rx buffer interrupt line" "0,1" bitfld.long 0x8 18. "TOOL,Timeout occurred interrupt line" "0,1" bitfld.long 0x8 17. "MRAFL,Message RAM access failure interrupt line" "0,1" bitfld.long 0x8 16. "TSWL,Timestamp wraparound interrupt line" "0,1" bitfld.long 0x8 15. "TEFLL,Tx event FIFO element Lost interrupt line" "0,1" bitfld.long 0x8 14. "TEFFL,Tx event FIFO full interrupt line" "0,1" newline bitfld.long 0x8 13. "TEFWL,Tx event FIFO watermark reached interrupt line" "0,1" bitfld.long 0x8 12. "TEFNL,Tx event FIFO new entry interrupt line" "0,1" bitfld.long 0x8 11. "TFEL,Tx FIFO empty interrupt line" "0,1" bitfld.long 0x8 10. "TCFL,Transmission cancellation finished interrupt line" "0,1" bitfld.long 0x8 9. "TCL,Transmission completed interrupt line" "0,1" bitfld.long 0x8 8. "HPML,High priority message interrupt line" "0,1" bitfld.long 0x8 7. "RF1LL,Rx FIFO 1 message lost interrupt line" "0,1" newline bitfld.long 0x8 6. "RF1FL,Rx FIFO 1 full interrupt line" "0,1" bitfld.long 0x8 5. "RF1WL,Rx FIFO 1 watermark reached interrupt line" "0,1" bitfld.long 0x8 4. "RF1NL,Rx FIFO 1 new message interrupt line" "0,1" bitfld.long 0x8 3. "RF0LL,Rx FIFO 0 message lost interrupt line" "0,1" bitfld.long 0x8 2. "RF0FL,Rx FIFO 0 full interrupt line" "0,1" bitfld.long 0x8 1. "RF0WL,Rx FIFO 0 watermark reached interrupt line" "0,1" bitfld.long 0x8 0. "RF0NL,Rx FIFO 0 new message interrupt line" "0,1" line.long 0xC "FDCAN_ILE,FDCAN interrupt line enable register" bitfld.long 0xC 1. "EINT1,Enable interrupt line 1" "B_0x0,B_0x1" bitfld.long 0xC 0. "EINT0,Enable interrupt line 0" "B_0x0,B_0x1" group.long 0x80++0xB line.long 0x0 "FDCAN_GFC,FDCAN global filter configuration register" bitfld.long 0x0 4.--5. "ANFS,Accept non-matching frames standard" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "ANFE,Accept non-matching frames extended" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "RRFS,Reject remote frames standard" "B_0x0,B_0x1" bitfld.long 0x0 0. "RRFE,Reject remote frames extended" "B_0x0,B_0x1" line.long 0x4 "FDCAN_SIDFC,FDCAN standard ID filter configuration register" hexmask.long.byte 0x4 16.--23. 1. "LSS,List size standard" hexmask.long.word 0x4 2.--15. 1. "FLSSA,Filter list standard start address" line.long 0x8 "FDCAN_XIDFC,FDCAN extended ID filter configuration register" hexmask.long.byte 0x8 16.--23. 1. "LSE,List size extended" hexmask.long.word 0x8 2.--15. 1. "FLESA,Filter list extended start address" group.long 0x90++0x3 line.long 0x0 "FDCAN_XIDAM,FDCAN extended ID and mask register" hexmask.long 0x0 0.--28. 1. "EIDM,Extended ID Mask" rgroup.long 0x94++0x3 line.long 0x0 "FDCAN_HPMS,FDCAN high priority message status register" bitfld.long 0x0 15. "FLST,Filter list" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--14. 1. "FIDX,Filter index" bitfld.long 0x0 6.--7. "MSI,Message storage indicator" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 0.--5. 1. "BIDX,Buffer index" group.long 0x98++0x1B line.long 0x0 "FDCAN_NDAT1,FDCAN new data 1 register" bitfld.long 0x0 31. "ND31,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 30. "ND30,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 29. "ND29,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 28. "ND28,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 27. "ND27,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 26. "ND26,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 25. "ND25,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "ND24,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 23. "ND23,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 22. "ND22,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 21. "ND21,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 20. "ND20,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 19. "ND19,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 18. "ND18,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "ND17,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 16. "ND16,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 15. "ND15,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 14. "ND14,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 13. "ND13,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 12. "ND12,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 11. "ND11,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "ND10,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 9. "ND9,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 8. "ND8,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 7. "ND7,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 6. "ND6,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 5. "ND5,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 4. "ND4,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "ND3,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 2. "ND2,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 1. "ND1,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 0. "ND0,New data[31:0]" "B_0x0,B_0x1" line.long 0x4 "FDCAN_NDAT2,FDCAN new data 2 register" bitfld.long 0x4 31. "ND63,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 30. "ND62,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 29. "ND61,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 28. "ND60,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 27. "ND59,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 26. "ND58,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 25. "ND57,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "ND56,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 23. "ND55,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 22. "ND54,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 21. "ND53,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 20. "ND52,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 19. "ND51,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 18. "ND50,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "ND49,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 16. "ND48,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 15. "ND47,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 14. "ND46,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 13. "ND45,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 12. "ND44,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 11. "ND43,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "ND42,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 9. "ND41,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 8. "ND40,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 7. "ND39,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 6. "ND38,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 5. "ND37,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 4. "ND36,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "ND35,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 2. "ND34,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 1. "ND33,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 0. "ND32,New data[63:32]" "B_0x0,B_0x1" line.long 0x8 "FDCAN_RXF0C,FDCAN Rx FIFO 0 configuration register" bitfld.long 0x8 31. "F0OM,FIFO 0 operation mode" "B_0x0,B_0x1" hexmask.long.byte 0x8 24.--30. 1. "F0WM,FIFO 0 watermark" hexmask.long.byte 0x8 16.--22. 1. "F0S,Rx FIFO 0 size" hexmask.long.word 0x8 2.--15. 1. "F0SA,Rx FIFO 0 start address" line.long 0xC "FDCAN_RXF0S,FDCAN Rx FIFO 0 status register" bitfld.long 0xC 25. "RF0L,Rx FIFO 0 message lost" "B_0x0,B_0x1" bitfld.long 0xC 24. "F0F,Rx FIFO 0 full" "B_0x0,B_0x1" hexmask.long.byte 0xC 16.--21. 1. "F0PI,Rx FIFO 0 put index" hexmask.long.byte 0xC 8.--13. 1. "F0GI,Rx FIFO 0 get index" hexmask.long.byte 0xC 0.--6. 1. "F0FL,Rx FIFO 0 fill level" line.long 0x10 "FDCAN_RXF0A,FDCAN Rx FIFO 0 acknowledge register" hexmask.long.byte 0x10 0.--5. 1. "F0AI,Rx FIFO 0 acknowledge index" line.long 0x14 "FDCAN_RXBC,FDCAN Rx buffer configuration register" hexmask.long.word 0x14 2.--15. 1. "RBSA,Rx buffer start address" line.long 0x18 "FDCAN_RXF1C,FDCAN Rx FIFO 1 configuration register" bitfld.long 0x18 31. "F1OM,FIFO 1 operation mode" "B_0x0,B_0x1" hexmask.long.byte 0x18 24.--30. 1. "F1WM,Rx FIFO 1 watermark" hexmask.long.byte 0x18 16.--22. 1. "F1S,Rx FIFO 1 size" hexmask.long.word 0x18 2.--15. 1. "F1SA,Rx FIFO 1 start address" rgroup.long 0xB4++0x3 line.long 0x0 "FDCAN_RXF1S,FDCAN Rx FIFO 1 status register" bitfld.long 0x0 30.--31. "DMS,Debug message status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 25. "RF1L,Rx FIFO 1 message lost" "B_0x0,B_0x1" bitfld.long 0x0 24. "F1F,Rx FIFO 1 full" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--21. 1. "F1PI,Rx FIFO 1 put index" hexmask.long.byte 0x0 8.--13. 1. "F1GI,Rx FIFO 1 get index" hexmask.long.byte 0x0 0.--6. 1. "F1FL,Rx FIFO 1 fill level" group.long 0xB8++0x3 line.long 0x0 "FDCAN_RXF1A,FDCAN Rx FIFO 1 acknowledge register" hexmask.long.byte 0x0 0.--5. 1. "F1AI,Rx FIFO 1 acknowledge index" rgroup.long 0xBC++0x3 line.long 0x0 "FDCAN_RXESC,FDCAN Rx buffer element size configuration register" bitfld.long 0x0 8.--10. "RBDS,Rx buffer data field size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 4.--6. "F1DS,Rx FIFO 0 data field size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 0.--2. "F0DS,Rx FIFO 1 data field size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" group.long 0xC0++0x3 line.long 0x0 "FDCAN_TXBC,FDCAN Tx buffer configuration register" bitfld.long 0x0 30. "TFQM,Tx FIFO/queue mode" "B_0x0,B_0x1" hexmask.long.byte 0x0 24.--29. 1. "TFQS,Transmit FIFO/queue size" hexmask.long.byte 0x0 16.--21. 1. "NDTB,Number of dedicated transmit buffers" hexmask.long.word 0x0 2.--15. 1. "TBSA,Tx buffers start address" rgroup.long 0xC4++0xB line.long 0x0 "FDCAN_TXFQS,FDCAN Tx FIFO/queue status register" bitfld.long 0x0 21. "TFQF,Tx FIFO/queue full" "0,1" hexmask.long.byte 0x0 16.--20. 1. "TFQPI,Tx FIFO/queue put index" hexmask.long.byte 0x0 8.--12. 1. "TFGI,Tx FIFO get index." hexmask.long.byte 0x0 0.--5. 1. "TFFL,Tx FIFO free level" line.long 0x4 "FDCAN_TXESC,FDCAN Tx buffer element size configuration register" bitfld.long 0x4 0.--2. "TBDS,Tx buffer data Field size:" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "FDCAN_TXBRP,FDCAN Tx buffer request pending register" hexmask.long 0x8 0.--31. 1. "TRP,Transmission request pending" group.long 0xD0++0x7 line.long 0x0 "FDCAN_TXBAR,FDCAN Tx buffer add request register" hexmask.long 0x0 0.--31. 1. "AR,Add request" line.long 0x4 "FDCAN_TXBCR,FDCAN Tx buffer cancellation request register" hexmask.long 0x4 0.--31. 1. "CR,Cancellation request" rgroup.long 0xD8++0x7 line.long 0x0 "FDCAN_TXBTO,FDCAN Tx buffer transmission occurred register" hexmask.long 0x0 0.--31. 1. "TO,Transmission occurred" line.long 0x4 "FDCAN_TXBCF,FDCAN Tx buffer cancellation finished register" hexmask.long 0x4 0.--31. 1. "CF,Cancellation finished" group.long 0xE0++0x7 line.long 0x0 "FDCAN_TXBTIE,FDCAN Tx buffer transmission interrupt enable register" hexmask.long 0x0 0.--31. 1. "TIE,Transmission interrupt enable" line.long 0x4 "FDCAN_TXBCIE,FDCAN Tx buffer cancellation finished interrupt enable register" hexmask.long 0x4 0.--31. 1. "CFIE,Cancellation finished interrupt enable" group.long 0xF0++0x3 line.long 0x0 "FDCAN_TXEFC,FDCAN Tx event FIFO configuration register" hexmask.long.byte 0x0 24.--29. 1. "EFWM,Event FIFO watermark" hexmask.long.byte 0x0 16.--21. 1. "EFS,Event FIFO size." hexmask.long.word 0x0 2.--15. 1. "EFSA,Event FIFO start address" rgroup.long 0xF4++0x3 line.long 0x0 "FDCAN_TXEFS,FDCAN Tx event FIFO status register" bitfld.long 0x0 25. "TEFL,Tx event FIFO element lost" "0,1" bitfld.long 0x0 24. "EFF,Event FIFO full" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--20. 1. "EFPI,Event FIFO put index" hexmask.long.byte 0x0 8.--12. 1. "EFGI,Event FIFO get index" hexmask.long.byte 0x0 0.--5. 1. "EFFL,Event FIFO fill level" group.long 0xF8++0x3 line.long 0x0 "FDCAN_TXEFA,FDCAN Tx event FIFO acknowledge register" hexmask.long.byte 0x0 0.--4. 1. "EFAI,Event FIFO acknowledge index" group.long 0x100++0x2B line.long 0x0 "FDCAN_TTTMC,FDCAN TT trigger memory configuration register" hexmask.long.byte 0x0 16.--22. 1. "TME,Trigger memory elements" hexmask.long.word 0x0 2.--15. 1. "TMSA,Trigger memory start address." line.long 0x4 "FDCAN_TTRMC,FDCAN TT reference message configuration register" bitfld.long 0x4 31. "RMPS,Reference message payload select" "B_0x0,B_0x1" bitfld.long 0x4 30. "XTD,Extended identifier" "B_0x0,B_0x1" hexmask.long 0x4 0.--28. 1. "RID,Reference identifier." line.long 0x8 "FDCAN_TTOCF,FDCAN TT operation configuration register" bitfld.long 0x8 26. "EVTP,Event trigger polarity." "B_0x0,B_0x1" bitfld.long 0x8 25. "ECC,Enable clock calibration." "B_0x0,B_0x1" bitfld.long 0x8 24. "EGTF,Enable global time filtering." "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--23. 1. "AWL,Application watchdog limit." bitfld.long 0x8 15. "EECS,Enable external clock synchronization" "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--14. 1. "IRTO,Initial reference trigger offset." bitfld.long 0x8 5.--7. "LDSDL,LD of synchronization deviation limit." "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 4. "TM,Time master." "B_0x0,B_0x1" bitfld.long 0x8 3. "GEN,Gap enable." "B_0x0,B_0x1" bitfld.long 0x8 0.--1. "OM,Operation mode." "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "FDCAN_TTMLM,FDCAN TT matrix limits register" hexmask.long.word 0xC 16.--27. 1. "ENTT,Expected number of Tx triggers" hexmask.long.byte 0xC 8.--11. 1. "TXEW,Tx enable window" bitfld.long 0xC 6.--7. "CSS,Cycle start synchronization" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0xC 0.--5. 1. "CCM,Cycle count Max" line.long 0x10 "FDCAN_TURCF,FDCAN TUR configuration register" bitfld.long 0x10 31. "ELT,Enable local time." "B_0x0,B_0x1" hexmask.long.word 0x10 16.--29. 1. "DC,Denominator configuration." hexmask.long.word 0x10 0.--15. 1. "NCL,Numerator configuration low." line.long 0x14 "FDCAN_TTOCN,FDCAN TT operation control register" rbitfld.long 0x14 15. "LCKC,TT operation control register locked." "B_0x0,B_0x1" bitfld.long 0x14 13. "ESCN,External synchronization control" "B_0x0,B_0x1" bitfld.long 0x14 12. "NIG,Next is gap." "B_0x0,B_0x1" bitfld.long 0x14 11. "TMG,Time mark gap." "B_0x0,B_0x1" bitfld.long 0x14 10. "FGP,Finish gap." "B_0x0,B_0x1" bitfld.long 0x14 9. "GCS,Gap control select" "B_0x0,B_0x1" bitfld.long 0x14 8. "TTIE,Trigger time mark interrupt pulse enable" "B_0x0,B_0x1" newline bitfld.long 0x14 6.--7. "TMC,Register time mark compare." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 5. "RTIE,Register time mark interrupt pulse enable." "B_0x0,B_0x1" bitfld.long 0x14 3.--4. "SWS,Stop watch source." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 2. "SWP,Stop watch polarity." "B_0x0,B_0x1" bitfld.long 0x14 1. "ECS,External clock synchronization." "0,1" bitfld.long 0x14 0. "SGT,Set global time." "0,1" line.long 0x18 "FDCAN_TTGTP,FDCAN TT global time preset register" hexmask.long.word 0x18 16.--31. 1. "CTP,Cycle time target phase" hexmask.long.word 0x18 0.--15. 1. "TP,Time preset" line.long 0x1C "FDCAN_TTTMK,FDCAN TT time mark register" rbitfld.long 0x1C 31. "LCKM,TT time mark register locked" "B_0x0,B_0x1" hexmask.long.byte 0x1C 16.--22. 1. "TICC,Time mark cycle code" hexmask.long.word 0x1C 0.--15. 1. "TM,Time mark" line.long 0x20 "FDCAN_TTIR,FDCAN TT interrupt register" bitfld.long 0x20 18. "CER,Configuration error" "B_0x0,B_0x1" bitfld.long 0x20 17. "AW,Application watchdog" "B_0x0,B_0x1" bitfld.long 0x20 16. "WT,Watch trigger" "B_0x0,B_0x1" bitfld.long 0x20 15. "IWTG,Initialization watch trigger" "0,1" bitfld.long 0x20 14. "ELC,Error level changed" "B_0x0,B_0x1" bitfld.long 0x20 13. "SE2,Scheduling error 2" "B_0x0,B_0x1" bitfld.long 0x20 12. "SE1,Scheduling error 1" "B_0x0,B_0x1" newline bitfld.long 0x20 11. "TXO,Tx count overflow" "B_0x0,B_0x1" bitfld.long 0x20 10. "TXU,Tx count underflow" "B_0x0,B_0x1" bitfld.long 0x20 9. "GTE,Global time error" "B_0x0,B_0x1" bitfld.long 0x20 8. "GTD,Global time discontinuity" "B_0x0,B_0x1" bitfld.long 0x20 7. "GTW,Global time wrap" "B_0x0,B_0x1" bitfld.long 0x20 6. "SWE,Stop watch event" "B_0x0,B_0x1" bitfld.long 0x20 5. "TTMI,Trigger time mark event internal" "B_0x0,B_0x1" newline bitfld.long 0x20 4. "RTMI,Register time mark interrupt" "B_0x0,B_0x1" bitfld.long 0x20 3. "SOG,Start of gap" "0,1" bitfld.long 0x20 2. "CSM,Change of synchronization mode" "B_0x0,B_0x1" bitfld.long 0x20 1. "SMC,Start of matrix cycle" "B_0x0,B_0x1" bitfld.long 0x20 0. "SBC,Start of basic cycle" "B_0x0,B_0x1" line.long 0x24 "FDCAN_TTIE,FDCAN TT interrupt enable register" bitfld.long 0x24 18. "CERE,Configuration error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 17. "AWE,Application watchdog interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 16. "WTE,Watch trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 15. "IWTE,Initialization watch trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 14. "ELCE,Change error level interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 13. "SE2E,Scheduling error 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 12. "SE1E,Scheduling error 1 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x24 11. "TXOE,Tx count overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 10. "TXUE,Tx count underflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 9. "GTEE,Global time error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 8. "GTDE,Global time discontinuity interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 7. "GTWE,Global time wrap interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 6. "SWEE,Stop watch event interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 5. "TTMIE,Trigger time mark event internal interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x24 4. "RTMIE,Register time mark interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 3. "SOGE,Start of gap interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 2. "CSME,Change of synchronization mode interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 1. "SMCE,Start of matrix cycle interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "SBCE,Start of basic cycle interrupt enable" "B_0x0,B_0x1" line.long 0x28 "FDCAN_TTILS,FDCAN TT interrupt line select register" bitfld.long 0x28 18. "CERL,Configuration error interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 17. "AWL,Application watchdog interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 16. "WTL,Watch trigger interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 15. "IWTL,Initialization watch trigger interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 14. "ELCL,Change error level interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 13. "SE2L,Scheduling error 2 interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 12. "SE1L,Scheduling error 1 interrupt line" "B_0x0,B_0x1" newline bitfld.long 0x28 11. "TXOL,Tx count overflow interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 10. "TXUL,Tx count underflow interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 9. "GTEL,Global time error interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 8. "GTDL,Global time discontinuity interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 7. "GTWL,Global time wrap interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 6. "SWEL,Stop watch event interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 5. "TTMIL,Trigger time mark event internal interrupt line" "B_0x0,B_0x1" newline bitfld.long 0x28 4. "RTMIL,Register time mark interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 3. "SOGL,Start of gap interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 2. "CSML,Change of synchronization mode interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 1. "SMCL,Start of matrix cycle interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 0. "SBCL,Start of basic cycle interrupt line" "B_0x0,B_0x1" rgroup.long 0x12C++0x17 line.long 0x0 "FDCAN_TTOST,FDCAN TT operation status register" bitfld.long 0x0 31. "SPL,Schedule phase lock" "B_0x0,B_0x1" bitfld.long 0x0 30. "WECS,Wait for external clock synchronization." "B_0x0,B_0x1" bitfld.long 0x0 29. "AWE,Application watchdog event" "B_0x0,B_0x1" bitfld.long 0x0 28. "WFE,Wait for event" "B_0x0,B_0x1" bitfld.long 0x0 27. "GSI,Gap started indicator" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "TMP,Time master priority" "0,1,2,3,4,5,6,7" bitfld.long 0x0 23. "GFI,Gap finished indicator" "B_0x0,B_0x1" newline bitfld.long 0x0 22. "WGTD,Wait for global time discontinuity" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "RTO,Reference trigger offset" bitfld.long 0x0 7. "QCS,Quality of clock speed" "B_0x0,B_0x1" bitfld.long 0x0 6. "QGTP,Quality of global time phase" "B_0x0,B_0x1" bitfld.long 0x0 4.--5. "SYS,Synchronization state" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MS,Master state" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "EL,Error level" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "FDCAN_TURNA,FDCAN TUR numerator actual register" hexmask.long.tbyte 0x4 0.--17. 1. "NAV,Numerator actual value" line.long 0x8 "FDCAN_TTLGT,FDCAN TT local and global time register" hexmask.long.word 0x8 16.--31. 1. "GT,Global time" hexmask.long.word 0x8 0.--15. 1. "LT,Local time" line.long 0xC "FDCAN_TTCTC,FDCAN TT cycle time and count register" hexmask.long.byte 0xC 16.--21. 1. "CC,Cycle count" hexmask.long.word 0xC 0.--15. 1. "CT,Cycle time" line.long 0x10 "FDCAN_TTCPT,FDCAN TT capture time register" hexmask.long.word 0x10 16.--31. 1. "SWV,Stop watch value" hexmask.long.byte 0x10 0.--5. 1. "CCV,Cycle count value" line.long 0x14 "FDCAN_TTCSM,FDCAN TT cycle sync mark register" hexmask.long.word 0x14 0.--15. 1. "CSM,Cycle sync mark" group.long 0x300++0x3 line.long 0x0 "FDCAN_TTTS,FDCAN TT trigger select register" bitfld.long 0x0 4.--5. "EVTSEL,Event trigger input selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "SWTDEL,Stop watch trigger input selection" "B_0x0,B_0x1,B_0x2,B_0x3" tree.end tree "FDCAN3" base ad:0x402F0000 rgroup.long 0x0++0x3 line.long 0x0 "FDCAN_CREL,FDCAN core release register" hexmask.long.byte 0x0 28.--31. 1. "REL,Core release = 3" hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of core release = 2" hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of core release = 1" hexmask.long.byte 0x0 16.--19. 1. "YEAR,Timestamp year = 4" hexmask.long.byte 0x0 8.--15. 1. "MON,Timestamp month = 12" hexmask.long.byte 0x0 0.--7. 1. "DAY,Timestamp day =18" rgroup.long 0x0++0x7 line.long 0x0 "FDCAN_CCU_CREL,Clock calibration unit core release register" hexmask.long.byte 0x0 28.--31. 1. "REL,Core release = 1" hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of core release = 1" hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of core release = 1" hexmask.long.byte 0x0 16.--19. 1. "YEAR,Timestamp year =" hexmask.long.byte 0x0 8.--15. 1. "MON,Timestamp month = 12" hexmask.long.byte 0x0 0.--7. 1. "DAY,Timestamp day = 18" line.long 0x4 "FDCAN_ENDN,FDCAN Endian register" hexmask.long 0x4 0.--31. 1. "ETV,Endianness test value" group.long 0x4++0x3 line.long 0x0 "FDCAN_CCU_CCFG,Calibration configuration register" bitfld.long 0x0 31. "SWR,Software reset" "0,1" hexmask.long.byte 0x0 16.--19. 1. "CDIV,Clock divider" hexmask.long.byte 0x0 8.--15. 1. "OCPM,Oscillator clock periods minimum" bitfld.long 0x0 7. "CFL,Calibration field length" "B_0x0,B_0x1" bitfld.long 0x0 6. "BCC,Bypass clock calibration" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--4. 1. "TQBT,Time quanta per bit time" rgroup.long 0x8++0x3 line.long 0x0 "FDCAN_CCU_CSTAT,Calibration status register" bitfld.long 0x0 30.--31. "CALS,Calibration state" "B_0x0,B_0x1,B_0x2,?" hexmask.long.word 0x0 18.--28. 1. "TQC,Time quanta counter" hexmask.long.tbyte 0x0 0.--17. 1. "OCPC,Oscillator clock period counter" group.long 0xC++0x3 line.long 0x0 "FDCAN_DBTP,FDCAN data bit timing and prescaler register" bitfld.long 0x0 23. "TDC,Transceiver delay compensation" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--20. 1. "DBRP,Data bitrate prescaler" hexmask.long.byte 0x0 8.--12. 1. "DTSEG1,Data time segment before sample point" hexmask.long.byte 0x0 4.--7. 1. "DTSEG2,Data time segment after sample point" hexmask.long.byte 0x0 0.--3. 1. "DSJW,Synchronization jump width" group.long 0xC++0x7 line.long 0x0 "FDCAN_CCU_CWD,Calibration watchdog register" hexmask.long.word 0x0 16.--31. 1. "WDV,Watchdog value" hexmask.long.word 0x0 0.--15. 1. "WDC,WDC" line.long 0x4 "FDCAN_TEST,FDCAN test register" rbitfld.long 0x4 7. "RX,Receive pin" "B_0x0,B_0x1" bitfld.long 0x4 5.--6. "TX,Control of transmit pin" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 4. "LBCK,Loop back mode" "B_0x0,B_0x1" group.long 0x10++0x7 line.long 0x0 "FDCAN_CCU_IR,Clock calibration unit interrupt register" bitfld.long 0x0 1. "CSC,Calibration state changed" "B_0x0,B_0x1" bitfld.long 0x0 0. "CWE,Calibration watchdog event" "B_0x0,B_0x1" line.long 0x4 "FDCAN_RWD,FDCAN RAM watchdog register" hexmask.long.byte 0x4 8.--15. 1. "WDV,Watchdog value" hexmask.long.byte 0x4 0.--7. 1. "WDC,Watchdog configuration" group.long 0x14++0x1B line.long 0x0 "FDCAN_CCU_IE,Clock calibration unit interrupt enable register" bitfld.long 0x0 1. "CSCE,Calibration state changed enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CWEE,Calibration watchdog event enable" "B_0x0,B_0x1" line.long 0x4 "FDCAN_CCCR,FDCAN CC control register" bitfld.long 0x4 15. "NISO,Non ISO operation" "B_0x0,B_0x1" bitfld.long 0x4 14. "TXP,If this bit is set the FDCAN pauses for two CAN bit times before starting the next transmission after successfully transmitting a frame." "B_0x0,B_0x1" bitfld.long 0x4 13. "EFBI,Edge filtering during bus integration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PXHD,Protocol exception handling disable" "B_0x0,B_0x1" bitfld.long 0x4 9. "BRSE,FDCAN bitrate switching" "B_0x0,B_0x1" bitfld.long 0x4 8. "FDOE,FD operation enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "TEST,Test mode enable" "B_0x0,B_0x1" newline bitfld.long 0x4 6. "DAR,Disable automatic retransmission" "B_0x0,B_0x1" bitfld.long 0x4 5. "MON,Bus monitoring mode" "B_0x0,B_0x1" bitfld.long 0x4 4. "CSR,Clock stop request" "B_0x0,B_0x1" rbitfld.long 0x4 3. "CSA,Clock stop acknowledge" "B_0x0,B_0x1" bitfld.long 0x4 2. "ASM,ASM restricted operation mode" "B_0x0,B_0x1" bitfld.long 0x4 1. "CCE,Configuration change enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "INIT,Initialization" "B_0x0,B_0x1" line.long 0x8 "FDCAN_NBTP,FDCAN nominal bit timing and prescaler register" hexmask.long.byte 0x8 25.--31. 1. "NSJW,Nominal (re)synchronization jump width" hexmask.long.word 0x8 16.--24. 1. "NBRP,Bitrate prescaler" hexmask.long.byte 0x8 8.--15. 1. "NTSEG1,Nominal time segment before sample point" hexmask.long.byte 0x8 0.--6. 1. "NTSEG2,Nominal time segment after sample point" line.long 0xC "FDCAN_TSCC,FDCAN timestamp counter configuration register" hexmask.long.byte 0xC 16.--19. 1. "TCP,Timestamp counter prescaler" bitfld.long 0xC 0.--1. "TSS,Timestamp select" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x10 "FDCAN_TSCV,FDCAN timestamp counter value register" hexmask.long.word 0x10 0.--15. 1. "TSC,Timestamp counter" line.long 0x14 "FDCAN_TOCC,FDCAN timeout counter configuration register" hexmask.long.word 0x14 16.--31. 1. "TOP,Timeout period" bitfld.long 0x14 1.--2. "TOS,Timeout select" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 0. "ETOC,Enable timeout counter" "B_0x0,B_0x1" line.long 0x18 "FDCAN_TOCV,FDCAN timeout counter value register" hexmask.long.word 0x18 0.--15. 1. "TOC,Timeout counter" group.long 0x40++0xB line.long 0x0 "FDCAN_ECR,FDCAN error counter register" hexmask.long.byte 0x0 16.--23. 1. "CEL,CAN error logging" rbitfld.long 0x0 15. "RP,Receive error passive" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--14. 1. "REC,Receive error counter" hexmask.long.byte 0x0 0.--7. 1. "TEC,Transmit error counter" line.long 0x4 "FDCAN_PSR,FDCAN protocol status register" hexmask.long.byte 0x4 16.--22. 1. "TDCV,Transmitter delay compensation value" bitfld.long 0x4 14. "PXE,Protocol exception event" "B_0x0,B_0x1" bitfld.long 0x4 13. "REDL,Received FDCAN message" "B_0x0,B_0x1" bitfld.long 0x4 12. "RBRS,BRS flag of last received FDCAN message" "B_0x0,B_0x1" bitfld.long 0x4 11. "RESI,ESI flag of last received FDCAN message" "B_0x0,B_0x1" rbitfld.long 0x4 8.--10. "DLEC,Data last error code" "0,1,2,3,4,5,6,7" rbitfld.long 0x4 7. "BO,Bus_Off status" "B_0x0,B_0x1" newline rbitfld.long 0x4 6. "EW,Warning status" "B_0x0,B_0x1" rbitfld.long 0x4 5. "EP,Error passive" "B_0x0,B_0x1" rbitfld.long 0x4 3.--4. "ACT,Activity" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x4 0.--2. "LEC,Last error code" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "FDCAN_TDCR,FDCAN transmitter delay compensation register" hexmask.long.byte 0x8 8.--14. 1. "TDCO,Transmitter delay compensation offset" hexmask.long.byte 0x8 0.--6. 1. "TDCF,Transmitter delay compensation filter window length" group.long 0x50++0xF line.long 0x0 "FDCAN_IR,FDCAN interrupt register" bitfld.long 0x0 29. "ARA,Access to reserved address" "B_0x0,B_0x1" bitfld.long 0x0 28. "PED,Protocol error in data phase (data bit time is used)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PEA,Protocol error in arbitration phase (nominal bit time is used)" "B_0x0,B_0x1" bitfld.long 0x0 26. "WDI,Watchdog interrupt" "B_0x0,B_0x1" bitfld.long 0x0 25. "BO,Bus_Off status" "B_0x0,B_0x1" bitfld.long 0x0 24. "EW,Warning status" "B_0x0,B_0x1" bitfld.long 0x0 23. "EP,Error passive" "B_0x0,B_0x1" newline bitfld.long 0x0 22. "ELO,Error logging overflow" "B_0x0,B_0x1" bitfld.long 0x0 19. "DRX,Message stored to dedicated Rx buffer" "B_0x0,B_0x1" bitfld.long 0x0 18. "TOO,Timeout occurred" "B_0x0,B_0x1" bitfld.long 0x0 17. "MRAF,Message RAM access failure" "B_0x0,B_0x1" bitfld.long 0x0 16. "TSW,Timestamp wraparound" "B_0x0,B_0x1" bitfld.long 0x0 15. "TEFL,Tx event FIFO element lost" "B_0x0,B_0x1" bitfld.long 0x0 14. "TEFF,Tx event FIFO full" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "TEFW,Tx event FIFO watermark reached" "B_0x0,B_0x1" bitfld.long 0x0 12. "TEFN,Tx event FIFO new entry" "B_0x0,B_0x1" bitfld.long 0x0 11. "TFE,Tx FIFO empty" "B_0x0,B_0x1" bitfld.long 0x0 10. "TCF,Transmission cancellation finished" "B_0x0,B_0x1" bitfld.long 0x0 9. "TC,Transmission completed" "B_0x0,B_0x1" bitfld.long 0x0 8. "HPM,High priority message" "B_0x0,B_0x1" bitfld.long 0x0 7. "RF1L,Rx FIFO 1 message lost" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "RF1F,Rx FIFO 1 full" "B_0x0,B_0x1" bitfld.long 0x0 5. "RF1W,Rx FIFO 1 watermark reached" "B_0x0,B_0x1" bitfld.long 0x0 4. "RF1N,Rx FIFO 1 new message" "B_0x0,B_0x1" bitfld.long 0x0 3. "RF0L,Rx FIFO 0 message lost" "B_0x0,B_0x1" bitfld.long 0x0 2. "RF0F,Rx FIFO 0 full" "B_0x0,B_0x1" bitfld.long 0x0 1. "RF0W,Rx FIFO 0 watermark reached" "B_0x0,B_0x1" bitfld.long 0x0 0. "RF0N,Rx FIFO 0 New message" "B_0x0,B_0x1" line.long 0x4 "FDCAN_IE,FDCAN interrupt enable register" bitfld.long 0x4 29. "ARAE,Access to Reserved address enable" "0,1" bitfld.long 0x4 28. "PEDE,Protocol error in data phase enable" "0,1" bitfld.long 0x4 27. "PEAE,Protocol error in Arbitration phase enable" "0,1" bitfld.long 0x4 26. "WDIE,Watchdog interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 25. "BOE,Bus_Off status" "B_0x0,B_0x1" bitfld.long 0x4 24. "EWE,Warning status interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "EPE,Error passive interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 22. "ELOE,Error logging overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "DRXE,Message stored to dedicated Rx buffer interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 18. "TOOE,Timeout occurred interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 17. "MRAFE,Message RAM access failure interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "TSWE,Timestamp wraparound interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 15. "TEFLE,Tx event FIFO element lost interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 14. "TEFFE,Tx event FIFO full interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "TEFWE,Tx event FIFO watermark reached interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 12. "TEFNE,Tx event FIFO new entry interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "TFEE,Tx FIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 10. "TCFE,Transmission cancellation finished interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "TCE,Transmission completed interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "HPME,High priority message interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "RF1LE,Rx FIFO 1 message lost interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 6. "RF1FE,Rx FIFO 1 full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "RF1WE,Rx FIFO 1 watermark reached interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "RF1NE,Rx FIFO 1 new message interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "RF0LE,Rx FIFO 0 message lost interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "RF0FE,Rx FIFO 0 full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "RF0WE,Rx FIFO 0 watermark reached interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "RF0NE,Rx FIFO 0 new message interrupt enable" "B_0x0,B_0x1" line.long 0x8 "FDCAN_ILS,FDCAN interrupt line select register" bitfld.long 0x8 29. "ARAL,Access to reserved address line" "0,1" bitfld.long 0x8 28. "PEDL,Protocol error in data phase line" "0,1" bitfld.long 0x8 27. "PEAL,Protocol error in arbitration phase line" "0,1" bitfld.long 0x8 26. "WDIL,Watchdog interrupt line" "0,1" bitfld.long 0x8 25. "BOL,Bus_Off status" "0,1" bitfld.long 0x8 24. "EWL,Warning status interrupt line" "0,1" bitfld.long 0x8 23. "EPL,Error passive interrupt line" "0,1" newline bitfld.long 0x8 22. "ELOL,Error logging overflow interrupt line" "0,1" bitfld.long 0x8 19. "DRXL,Message stored to dedicated Rx buffer interrupt line" "0,1" bitfld.long 0x8 18. "TOOL,Timeout occurred interrupt line" "0,1" bitfld.long 0x8 17. "MRAFL,Message RAM access failure interrupt line" "0,1" bitfld.long 0x8 16. "TSWL,Timestamp wraparound interrupt line" "0,1" bitfld.long 0x8 15. "TEFLL,Tx event FIFO element Lost interrupt line" "0,1" bitfld.long 0x8 14. "TEFFL,Tx event FIFO full interrupt line" "0,1" newline bitfld.long 0x8 13. "TEFWL,Tx event FIFO watermark reached interrupt line" "0,1" bitfld.long 0x8 12. "TEFNL,Tx event FIFO new entry interrupt line" "0,1" bitfld.long 0x8 11. "TFEL,Tx FIFO empty interrupt line" "0,1" bitfld.long 0x8 10. "TCFL,Transmission cancellation finished interrupt line" "0,1" bitfld.long 0x8 9. "TCL,Transmission completed interrupt line" "0,1" bitfld.long 0x8 8. "HPML,High priority message interrupt line" "0,1" bitfld.long 0x8 7. "RF1LL,Rx FIFO 1 message lost interrupt line" "0,1" newline bitfld.long 0x8 6. "RF1FL,Rx FIFO 1 full interrupt line" "0,1" bitfld.long 0x8 5. "RF1WL,Rx FIFO 1 watermark reached interrupt line" "0,1" bitfld.long 0x8 4. "RF1NL,Rx FIFO 1 new message interrupt line" "0,1" bitfld.long 0x8 3. "RF0LL,Rx FIFO 0 message lost interrupt line" "0,1" bitfld.long 0x8 2. "RF0FL,Rx FIFO 0 full interrupt line" "0,1" bitfld.long 0x8 1. "RF0WL,Rx FIFO 0 watermark reached interrupt line" "0,1" bitfld.long 0x8 0. "RF0NL,Rx FIFO 0 new message interrupt line" "0,1" line.long 0xC "FDCAN_ILE,FDCAN interrupt line enable register" bitfld.long 0xC 1. "EINT1,Enable interrupt line 1" "B_0x0,B_0x1" bitfld.long 0xC 0. "EINT0,Enable interrupt line 0" "B_0x0,B_0x1" group.long 0x80++0xB line.long 0x0 "FDCAN_GFC,FDCAN global filter configuration register" bitfld.long 0x0 4.--5. "ANFS,Accept non-matching frames standard" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "ANFE,Accept non-matching frames extended" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "RRFS,Reject remote frames standard" "B_0x0,B_0x1" bitfld.long 0x0 0. "RRFE,Reject remote frames extended" "B_0x0,B_0x1" line.long 0x4 "FDCAN_SIDFC,FDCAN standard ID filter configuration register" hexmask.long.byte 0x4 16.--23. 1. "LSS,List size standard" hexmask.long.word 0x4 2.--15. 1. "FLSSA,Filter list standard start address" line.long 0x8 "FDCAN_XIDFC,FDCAN extended ID filter configuration register" hexmask.long.byte 0x8 16.--23. 1. "LSE,List size extended" hexmask.long.word 0x8 2.--15. 1. "FLESA,Filter list extended start address" group.long 0x90++0x3 line.long 0x0 "FDCAN_XIDAM,FDCAN extended ID and mask register" hexmask.long 0x0 0.--28. 1. "EIDM,Extended ID Mask" rgroup.long 0x94++0x3 line.long 0x0 "FDCAN_HPMS,FDCAN high priority message status register" bitfld.long 0x0 15. "FLST,Filter list" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--14. 1. "FIDX,Filter index" bitfld.long 0x0 6.--7. "MSI,Message storage indicator" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 0.--5. 1. "BIDX,Buffer index" group.long 0x98++0x1B line.long 0x0 "FDCAN_NDAT1,FDCAN new data 1 register" bitfld.long 0x0 31. "ND31,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 30. "ND30,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 29. "ND29,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 28. "ND28,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 27. "ND27,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 26. "ND26,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 25. "ND25,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "ND24,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 23. "ND23,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 22. "ND22,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 21. "ND21,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 20. "ND20,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 19. "ND19,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 18. "ND18,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "ND17,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 16. "ND16,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 15. "ND15,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 14. "ND14,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 13. "ND13,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 12. "ND12,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 11. "ND11,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "ND10,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 9. "ND9,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 8. "ND8,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 7. "ND7,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 6. "ND6,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 5. "ND5,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 4. "ND4,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "ND3,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 2. "ND2,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 1. "ND1,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 0. "ND0,New data[31:0]" "B_0x0,B_0x1" line.long 0x4 "FDCAN_NDAT2,FDCAN new data 2 register" bitfld.long 0x4 31. "ND63,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 30. "ND62,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 29. "ND61,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 28. "ND60,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 27. "ND59,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 26. "ND58,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 25. "ND57,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "ND56,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 23. "ND55,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 22. "ND54,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 21. "ND53,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 20. "ND52,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 19. "ND51,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 18. "ND50,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "ND49,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 16. "ND48,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 15. "ND47,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 14. "ND46,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 13. "ND45,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 12. "ND44,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 11. "ND43,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "ND42,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 9. "ND41,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 8. "ND40,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 7. "ND39,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 6. "ND38,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 5. "ND37,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 4. "ND36,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "ND35,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 2. "ND34,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 1. "ND33,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 0. "ND32,New data[63:32]" "B_0x0,B_0x1" line.long 0x8 "FDCAN_RXF0C,FDCAN Rx FIFO 0 configuration register" bitfld.long 0x8 31. "F0OM,FIFO 0 operation mode" "B_0x0,B_0x1" hexmask.long.byte 0x8 24.--30. 1. "F0WM,FIFO 0 watermark" hexmask.long.byte 0x8 16.--22. 1. "F0S,Rx FIFO 0 size" hexmask.long.word 0x8 2.--15. 1. "F0SA,Rx FIFO 0 start address" line.long 0xC "FDCAN_RXF0S,FDCAN Rx FIFO 0 status register" bitfld.long 0xC 25. "RF0L,Rx FIFO 0 message lost" "B_0x0,B_0x1" bitfld.long 0xC 24. "F0F,Rx FIFO 0 full" "B_0x0,B_0x1" hexmask.long.byte 0xC 16.--21. 1. "F0PI,Rx FIFO 0 put index" hexmask.long.byte 0xC 8.--13. 1. "F0GI,Rx FIFO 0 get index" hexmask.long.byte 0xC 0.--6. 1. "F0FL,Rx FIFO 0 fill level" line.long 0x10 "FDCAN_RXF0A,FDCAN Rx FIFO 0 acknowledge register" hexmask.long.byte 0x10 0.--5. 1. "F0AI,Rx FIFO 0 acknowledge index" line.long 0x14 "FDCAN_RXBC,FDCAN Rx buffer configuration register" hexmask.long.word 0x14 2.--15. 1. "RBSA,Rx buffer start address" line.long 0x18 "FDCAN_RXF1C,FDCAN Rx FIFO 1 configuration register" bitfld.long 0x18 31. "F1OM,FIFO 1 operation mode" "B_0x0,B_0x1" hexmask.long.byte 0x18 24.--30. 1. "F1WM,Rx FIFO 1 watermark" hexmask.long.byte 0x18 16.--22. 1. "F1S,Rx FIFO 1 size" hexmask.long.word 0x18 2.--15. 1. "F1SA,Rx FIFO 1 start address" rgroup.long 0xB4++0x3 line.long 0x0 "FDCAN_RXF1S,FDCAN Rx FIFO 1 status register" bitfld.long 0x0 30.--31. "DMS,Debug message status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 25. "RF1L,Rx FIFO 1 message lost" "B_0x0,B_0x1" bitfld.long 0x0 24. "F1F,Rx FIFO 1 full" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--21. 1. "F1PI,Rx FIFO 1 put index" hexmask.long.byte 0x0 8.--13. 1. "F1GI,Rx FIFO 1 get index" hexmask.long.byte 0x0 0.--6. 1. "F1FL,Rx FIFO 1 fill level" group.long 0xB8++0x3 line.long 0x0 "FDCAN_RXF1A,FDCAN Rx FIFO 1 acknowledge register" hexmask.long.byte 0x0 0.--5. 1. "F1AI,Rx FIFO 1 acknowledge index" rgroup.long 0xBC++0x3 line.long 0x0 "FDCAN_RXESC,FDCAN Rx buffer element size configuration register" bitfld.long 0x0 8.--10. "RBDS,Rx buffer data field size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 4.--6. "F1DS,Rx FIFO 0 data field size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 0.--2. "F0DS,Rx FIFO 1 data field size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" group.long 0xC0++0x3 line.long 0x0 "FDCAN_TXBC,FDCAN Tx buffer configuration register" bitfld.long 0x0 30. "TFQM,Tx FIFO/queue mode" "B_0x0,B_0x1" hexmask.long.byte 0x0 24.--29. 1. "TFQS,Transmit FIFO/queue size" hexmask.long.byte 0x0 16.--21. 1. "NDTB,Number of dedicated transmit buffers" hexmask.long.word 0x0 2.--15. 1. "TBSA,Tx buffers start address" rgroup.long 0xC4++0xB line.long 0x0 "FDCAN_TXFQS,FDCAN Tx FIFO/queue status register" bitfld.long 0x0 21. "TFQF,Tx FIFO/queue full" "0,1" hexmask.long.byte 0x0 16.--20. 1. "TFQPI,Tx FIFO/queue put index" hexmask.long.byte 0x0 8.--12. 1. "TFGI,Tx FIFO get index." hexmask.long.byte 0x0 0.--5. 1. "TFFL,Tx FIFO free level" line.long 0x4 "FDCAN_TXESC,FDCAN Tx buffer element size configuration register" bitfld.long 0x4 0.--2. "TBDS,Tx buffer data Field size:" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "FDCAN_TXBRP,FDCAN Tx buffer request pending register" hexmask.long 0x8 0.--31. 1. "TRP,Transmission request pending" group.long 0xD0++0x7 line.long 0x0 "FDCAN_TXBAR,FDCAN Tx buffer add request register" hexmask.long 0x0 0.--31. 1. "AR,Add request" line.long 0x4 "FDCAN_TXBCR,FDCAN Tx buffer cancellation request register" hexmask.long 0x4 0.--31. 1. "CR,Cancellation request" rgroup.long 0xD8++0x7 line.long 0x0 "FDCAN_TXBTO,FDCAN Tx buffer transmission occurred register" hexmask.long 0x0 0.--31. 1. "TO,Transmission occurred" line.long 0x4 "FDCAN_TXBCF,FDCAN Tx buffer cancellation finished register" hexmask.long 0x4 0.--31. 1. "CF,Cancellation finished" group.long 0xE0++0x7 line.long 0x0 "FDCAN_TXBTIE,FDCAN Tx buffer transmission interrupt enable register" hexmask.long 0x0 0.--31. 1. "TIE,Transmission interrupt enable" line.long 0x4 "FDCAN_TXBCIE,FDCAN Tx buffer cancellation finished interrupt enable register" hexmask.long 0x4 0.--31. 1. "CFIE,Cancellation finished interrupt enable" group.long 0xF0++0x3 line.long 0x0 "FDCAN_TXEFC,FDCAN Tx event FIFO configuration register" hexmask.long.byte 0x0 24.--29. 1. "EFWM,Event FIFO watermark" hexmask.long.byte 0x0 16.--21. 1. "EFS,Event FIFO size." hexmask.long.word 0x0 2.--15. 1. "EFSA,Event FIFO start address" rgroup.long 0xF4++0x3 line.long 0x0 "FDCAN_TXEFS,FDCAN Tx event FIFO status register" bitfld.long 0x0 25. "TEFL,Tx event FIFO element lost" "0,1" bitfld.long 0x0 24. "EFF,Event FIFO full" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--20. 1. "EFPI,Event FIFO put index" hexmask.long.byte 0x0 8.--12. 1. "EFGI,Event FIFO get index" hexmask.long.byte 0x0 0.--5. 1. "EFFL,Event FIFO fill level" group.long 0xF8++0x3 line.long 0x0 "FDCAN_TXEFA,FDCAN Tx event FIFO acknowledge register" hexmask.long.byte 0x0 0.--4. 1. "EFAI,Event FIFO acknowledge index" group.long 0x100++0x2B line.long 0x0 "FDCAN_TTTMC,FDCAN TT trigger memory configuration register" hexmask.long.byte 0x0 16.--22. 1. "TME,Trigger memory elements" hexmask.long.word 0x0 2.--15. 1. "TMSA,Trigger memory start address." line.long 0x4 "FDCAN_TTRMC,FDCAN TT reference message configuration register" bitfld.long 0x4 31. "RMPS,Reference message payload select" "B_0x0,B_0x1" bitfld.long 0x4 30. "XTD,Extended identifier" "B_0x0,B_0x1" hexmask.long 0x4 0.--28. 1. "RID,Reference identifier." line.long 0x8 "FDCAN_TTOCF,FDCAN TT operation configuration register" bitfld.long 0x8 26. "EVTP,Event trigger polarity." "B_0x0,B_0x1" bitfld.long 0x8 25. "ECC,Enable clock calibration." "B_0x0,B_0x1" bitfld.long 0x8 24. "EGTF,Enable global time filtering." "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--23. 1. "AWL,Application watchdog limit." bitfld.long 0x8 15. "EECS,Enable external clock synchronization" "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--14. 1. "IRTO,Initial reference trigger offset." bitfld.long 0x8 5.--7. "LDSDL,LD of synchronization deviation limit." "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 4. "TM,Time master." "B_0x0,B_0x1" bitfld.long 0x8 3. "GEN,Gap enable." "B_0x0,B_0x1" bitfld.long 0x8 0.--1. "OM,Operation mode." "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "FDCAN_TTMLM,FDCAN TT matrix limits register" hexmask.long.word 0xC 16.--27. 1. "ENTT,Expected number of Tx triggers" hexmask.long.byte 0xC 8.--11. 1. "TXEW,Tx enable window" bitfld.long 0xC 6.--7. "CSS,Cycle start synchronization" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0xC 0.--5. 1. "CCM,Cycle count Max" line.long 0x10 "FDCAN_TURCF,FDCAN TUR configuration register" bitfld.long 0x10 31. "ELT,Enable local time." "B_0x0,B_0x1" hexmask.long.word 0x10 16.--29. 1. "DC,Denominator configuration." hexmask.long.word 0x10 0.--15. 1. "NCL,Numerator configuration low." line.long 0x14 "FDCAN_TTOCN,FDCAN TT operation control register" rbitfld.long 0x14 15. "LCKC,TT operation control register locked." "B_0x0,B_0x1" bitfld.long 0x14 13. "ESCN,External synchronization control" "B_0x0,B_0x1" bitfld.long 0x14 12. "NIG,Next is gap." "B_0x0,B_0x1" bitfld.long 0x14 11. "TMG,Time mark gap." "B_0x0,B_0x1" bitfld.long 0x14 10. "FGP,Finish gap." "B_0x0,B_0x1" bitfld.long 0x14 9. "GCS,Gap control select" "B_0x0,B_0x1" bitfld.long 0x14 8. "TTIE,Trigger time mark interrupt pulse enable" "B_0x0,B_0x1" newline bitfld.long 0x14 6.--7. "TMC,Register time mark compare." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 5. "RTIE,Register time mark interrupt pulse enable." "B_0x0,B_0x1" bitfld.long 0x14 3.--4. "SWS,Stop watch source." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 2. "SWP,Stop watch polarity." "B_0x0,B_0x1" bitfld.long 0x14 1. "ECS,External clock synchronization." "0,1" bitfld.long 0x14 0. "SGT,Set global time." "0,1" line.long 0x18 "FDCAN_TTGTP,FDCAN TT global time preset register" hexmask.long.word 0x18 16.--31. 1. "CTP,Cycle time target phase" hexmask.long.word 0x18 0.--15. 1. "TP,Time preset" line.long 0x1C "FDCAN_TTTMK,FDCAN TT time mark register" rbitfld.long 0x1C 31. "LCKM,TT time mark register locked" "B_0x0,B_0x1" hexmask.long.byte 0x1C 16.--22. 1. "TICC,Time mark cycle code" hexmask.long.word 0x1C 0.--15. 1. "TM,Time mark" line.long 0x20 "FDCAN_TTIR,FDCAN TT interrupt register" bitfld.long 0x20 18. "CER,Configuration error" "B_0x0,B_0x1" bitfld.long 0x20 17. "AW,Application watchdog" "B_0x0,B_0x1" bitfld.long 0x20 16. "WT,Watch trigger" "B_0x0,B_0x1" bitfld.long 0x20 15. "IWTG,Initialization watch trigger" "0,1" bitfld.long 0x20 14. "ELC,Error level changed" "B_0x0,B_0x1" bitfld.long 0x20 13. "SE2,Scheduling error 2" "B_0x0,B_0x1" bitfld.long 0x20 12. "SE1,Scheduling error 1" "B_0x0,B_0x1" newline bitfld.long 0x20 11. "TXO,Tx count overflow" "B_0x0,B_0x1" bitfld.long 0x20 10. "TXU,Tx count underflow" "B_0x0,B_0x1" bitfld.long 0x20 9. "GTE,Global time error" "B_0x0,B_0x1" bitfld.long 0x20 8. "GTD,Global time discontinuity" "B_0x0,B_0x1" bitfld.long 0x20 7. "GTW,Global time wrap" "B_0x0,B_0x1" bitfld.long 0x20 6. "SWE,Stop watch event" "B_0x0,B_0x1" bitfld.long 0x20 5. "TTMI,Trigger time mark event internal" "B_0x0,B_0x1" newline bitfld.long 0x20 4. "RTMI,Register time mark interrupt" "B_0x0,B_0x1" bitfld.long 0x20 3. "SOG,Start of gap" "0,1" bitfld.long 0x20 2. "CSM,Change of synchronization mode" "B_0x0,B_0x1" bitfld.long 0x20 1. "SMC,Start of matrix cycle" "B_0x0,B_0x1" bitfld.long 0x20 0. "SBC,Start of basic cycle" "B_0x0,B_0x1" line.long 0x24 "FDCAN_TTIE,FDCAN TT interrupt enable register" bitfld.long 0x24 18. "CERE,Configuration error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 17. "AWE,Application watchdog interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 16. "WTE,Watch trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 15. "IWTE,Initialization watch trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 14. "ELCE,Change error level interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 13. "SE2E,Scheduling error 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 12. "SE1E,Scheduling error 1 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x24 11. "TXOE,Tx count overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 10. "TXUE,Tx count underflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 9. "GTEE,Global time error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 8. "GTDE,Global time discontinuity interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 7. "GTWE,Global time wrap interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 6. "SWEE,Stop watch event interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 5. "TTMIE,Trigger time mark event internal interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x24 4. "RTMIE,Register time mark interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 3. "SOGE,Start of gap interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 2. "CSME,Change of synchronization mode interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 1. "SMCE,Start of matrix cycle interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "SBCE,Start of basic cycle interrupt enable" "B_0x0,B_0x1" line.long 0x28 "FDCAN_TTILS,FDCAN TT interrupt line select register" bitfld.long 0x28 18. "CERL,Configuration error interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 17. "AWL,Application watchdog interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 16. "WTL,Watch trigger interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 15. "IWTL,Initialization watch trigger interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 14. "ELCL,Change error level interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 13. "SE2L,Scheduling error 2 interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 12. "SE1L,Scheduling error 1 interrupt line" "B_0x0,B_0x1" newline bitfld.long 0x28 11. "TXOL,Tx count overflow interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 10. "TXUL,Tx count underflow interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 9. "GTEL,Global time error interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 8. "GTDL,Global time discontinuity interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 7. "GTWL,Global time wrap interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 6. "SWEL,Stop watch event interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 5. "TTMIL,Trigger time mark event internal interrupt line" "B_0x0,B_0x1" newline bitfld.long 0x28 4. "RTMIL,Register time mark interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 3. "SOGL,Start of gap interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 2. "CSML,Change of synchronization mode interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 1. "SMCL,Start of matrix cycle interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 0. "SBCL,Start of basic cycle interrupt line" "B_0x0,B_0x1" rgroup.long 0x12C++0x17 line.long 0x0 "FDCAN_TTOST,FDCAN TT operation status register" bitfld.long 0x0 31. "SPL,Schedule phase lock" "B_0x0,B_0x1" bitfld.long 0x0 30. "WECS,Wait for external clock synchronization." "B_0x0,B_0x1" bitfld.long 0x0 29. "AWE,Application watchdog event" "B_0x0,B_0x1" bitfld.long 0x0 28. "WFE,Wait for event" "B_0x0,B_0x1" bitfld.long 0x0 27. "GSI,Gap started indicator" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "TMP,Time master priority" "0,1,2,3,4,5,6,7" bitfld.long 0x0 23. "GFI,Gap finished indicator" "B_0x0,B_0x1" newline bitfld.long 0x0 22. "WGTD,Wait for global time discontinuity" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "RTO,Reference trigger offset" bitfld.long 0x0 7. "QCS,Quality of clock speed" "B_0x0,B_0x1" bitfld.long 0x0 6. "QGTP,Quality of global time phase" "B_0x0,B_0x1" bitfld.long 0x0 4.--5. "SYS,Synchronization state" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MS,Master state" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "EL,Error level" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "FDCAN_TURNA,FDCAN TUR numerator actual register" hexmask.long.tbyte 0x4 0.--17. 1. "NAV,Numerator actual value" line.long 0x8 "FDCAN_TTLGT,FDCAN TT local and global time register" hexmask.long.word 0x8 16.--31. 1. "GT,Global time" hexmask.long.word 0x8 0.--15. 1. "LT,Local time" line.long 0xC "FDCAN_TTCTC,FDCAN TT cycle time and count register" hexmask.long.byte 0xC 16.--21. 1. "CC,Cycle count" hexmask.long.word 0xC 0.--15. 1. "CT,Cycle time" line.long 0x10 "FDCAN_TTCPT,FDCAN TT capture time register" hexmask.long.word 0x10 16.--31. 1. "SWV,Stop watch value" hexmask.long.byte 0x10 0.--5. 1. "CCV,Cycle count value" line.long 0x14 "FDCAN_TTCSM,FDCAN TT cycle sync mark register" hexmask.long.word 0x14 0.--15. 1. "CSM,Cycle sync mark" group.long 0x300++0x3 line.long 0x0 "FDCAN_TTTS,FDCAN TT trigger select register" bitfld.long 0x0 4.--5. "EVTSEL,Event trigger input selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "SWTDEL,Stop watch trigger input selection" "B_0x0,B_0x1,B_0x2,B_0x3" tree.end tree "FDCAN3_S" base ad:0x502F0000 rgroup.long 0x0++0x3 line.long 0x0 "FDCAN_CREL,FDCAN core release register" hexmask.long.byte 0x0 28.--31. 1. "REL,Core release = 3" hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of core release = 2" hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of core release = 1" hexmask.long.byte 0x0 16.--19. 1. "YEAR,Timestamp year = 4" hexmask.long.byte 0x0 8.--15. 1. "MON,Timestamp month = 12" hexmask.long.byte 0x0 0.--7. 1. "DAY,Timestamp day =18" rgroup.long 0x0++0x7 line.long 0x0 "FDCAN_CCU_CREL,Clock calibration unit core release register" hexmask.long.byte 0x0 28.--31. 1. "REL,Core release = 1" hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of core release = 1" hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of core release = 1" hexmask.long.byte 0x0 16.--19. 1. "YEAR,Timestamp year =" hexmask.long.byte 0x0 8.--15. 1. "MON,Timestamp month = 12" hexmask.long.byte 0x0 0.--7. 1. "DAY,Timestamp day = 18" line.long 0x4 "FDCAN_ENDN,FDCAN Endian register" hexmask.long 0x4 0.--31. 1. "ETV,Endianness test value" group.long 0x4++0x3 line.long 0x0 "FDCAN_CCU_CCFG,Calibration configuration register" bitfld.long 0x0 31. "SWR,Software reset" "0,1" hexmask.long.byte 0x0 16.--19. 1. "CDIV,Clock divider" hexmask.long.byte 0x0 8.--15. 1. "OCPM,Oscillator clock periods minimum" bitfld.long 0x0 7. "CFL,Calibration field length" "B_0x0,B_0x1" bitfld.long 0x0 6. "BCC,Bypass clock calibration" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--4. 1. "TQBT,Time quanta per bit time" rgroup.long 0x8++0x3 line.long 0x0 "FDCAN_CCU_CSTAT,Calibration status register" bitfld.long 0x0 30.--31. "CALS,Calibration state" "B_0x0,B_0x1,B_0x2,?" hexmask.long.word 0x0 18.--28. 1. "TQC,Time quanta counter" hexmask.long.tbyte 0x0 0.--17. 1. "OCPC,Oscillator clock period counter" group.long 0xC++0x3 line.long 0x0 "FDCAN_DBTP,FDCAN data bit timing and prescaler register" bitfld.long 0x0 23. "TDC,Transceiver delay compensation" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--20. 1. "DBRP,Data bitrate prescaler" hexmask.long.byte 0x0 8.--12. 1. "DTSEG1,Data time segment before sample point" hexmask.long.byte 0x0 4.--7. 1. "DTSEG2,Data time segment after sample point" hexmask.long.byte 0x0 0.--3. 1. "DSJW,Synchronization jump width" group.long 0xC++0x7 line.long 0x0 "FDCAN_CCU_CWD,Calibration watchdog register" hexmask.long.word 0x0 16.--31. 1. "WDV,Watchdog value" hexmask.long.word 0x0 0.--15. 1. "WDC,WDC" line.long 0x4 "FDCAN_TEST,FDCAN test register" rbitfld.long 0x4 7. "RX,Receive pin" "B_0x0,B_0x1" bitfld.long 0x4 5.--6. "TX,Control of transmit pin" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 4. "LBCK,Loop back mode" "B_0x0,B_0x1" group.long 0x10++0x7 line.long 0x0 "FDCAN_CCU_IR,Clock calibration unit interrupt register" bitfld.long 0x0 1. "CSC,Calibration state changed" "B_0x0,B_0x1" bitfld.long 0x0 0. "CWE,Calibration watchdog event" "B_0x0,B_0x1" line.long 0x4 "FDCAN_RWD,FDCAN RAM watchdog register" hexmask.long.byte 0x4 8.--15. 1. "WDV,Watchdog value" hexmask.long.byte 0x4 0.--7. 1. "WDC,Watchdog configuration" group.long 0x14++0x1B line.long 0x0 "FDCAN_CCU_IE,Clock calibration unit interrupt enable register" bitfld.long 0x0 1. "CSCE,Calibration state changed enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CWEE,Calibration watchdog event enable" "B_0x0,B_0x1" line.long 0x4 "FDCAN_CCCR,FDCAN CC control register" bitfld.long 0x4 15. "NISO,Non ISO operation" "B_0x0,B_0x1" bitfld.long 0x4 14. "TXP,If this bit is set the FDCAN pauses for two CAN bit times before starting the next transmission after successfully transmitting a frame." "B_0x0,B_0x1" bitfld.long 0x4 13. "EFBI,Edge filtering during bus integration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PXHD,Protocol exception handling disable" "B_0x0,B_0x1" bitfld.long 0x4 9. "BRSE,FDCAN bitrate switching" "B_0x0,B_0x1" bitfld.long 0x4 8. "FDOE,FD operation enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "TEST,Test mode enable" "B_0x0,B_0x1" newline bitfld.long 0x4 6. "DAR,Disable automatic retransmission" "B_0x0,B_0x1" bitfld.long 0x4 5. "MON,Bus monitoring mode" "B_0x0,B_0x1" bitfld.long 0x4 4. "CSR,Clock stop request" "B_0x0,B_0x1" rbitfld.long 0x4 3. "CSA,Clock stop acknowledge" "B_0x0,B_0x1" bitfld.long 0x4 2. "ASM,ASM restricted operation mode" "B_0x0,B_0x1" bitfld.long 0x4 1. "CCE,Configuration change enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "INIT,Initialization" "B_0x0,B_0x1" line.long 0x8 "FDCAN_NBTP,FDCAN nominal bit timing and prescaler register" hexmask.long.byte 0x8 25.--31. 1. "NSJW,Nominal (re)synchronization jump width" hexmask.long.word 0x8 16.--24. 1. "NBRP,Bitrate prescaler" hexmask.long.byte 0x8 8.--15. 1. "NTSEG1,Nominal time segment before sample point" hexmask.long.byte 0x8 0.--6. 1. "NTSEG2,Nominal time segment after sample point" line.long 0xC "FDCAN_TSCC,FDCAN timestamp counter configuration register" hexmask.long.byte 0xC 16.--19. 1. "TCP,Timestamp counter prescaler" bitfld.long 0xC 0.--1. "TSS,Timestamp select" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x10 "FDCAN_TSCV,FDCAN timestamp counter value register" hexmask.long.word 0x10 0.--15. 1. "TSC,Timestamp counter" line.long 0x14 "FDCAN_TOCC,FDCAN timeout counter configuration register" hexmask.long.word 0x14 16.--31. 1. "TOP,Timeout period" bitfld.long 0x14 1.--2. "TOS,Timeout select" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 0. "ETOC,Enable timeout counter" "B_0x0,B_0x1" line.long 0x18 "FDCAN_TOCV,FDCAN timeout counter value register" hexmask.long.word 0x18 0.--15. 1. "TOC,Timeout counter" group.long 0x40++0xB line.long 0x0 "FDCAN_ECR,FDCAN error counter register" hexmask.long.byte 0x0 16.--23. 1. "CEL,CAN error logging" rbitfld.long 0x0 15. "RP,Receive error passive" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--14. 1. "REC,Receive error counter" hexmask.long.byte 0x0 0.--7. 1. "TEC,Transmit error counter" line.long 0x4 "FDCAN_PSR,FDCAN protocol status register" hexmask.long.byte 0x4 16.--22. 1. "TDCV,Transmitter delay compensation value" bitfld.long 0x4 14. "PXE,Protocol exception event" "B_0x0,B_0x1" bitfld.long 0x4 13. "REDL,Received FDCAN message" "B_0x0,B_0x1" bitfld.long 0x4 12. "RBRS,BRS flag of last received FDCAN message" "B_0x0,B_0x1" bitfld.long 0x4 11. "RESI,ESI flag of last received FDCAN message" "B_0x0,B_0x1" rbitfld.long 0x4 8.--10. "DLEC,Data last error code" "0,1,2,3,4,5,6,7" rbitfld.long 0x4 7. "BO,Bus_Off status" "B_0x0,B_0x1" newline rbitfld.long 0x4 6. "EW,Warning status" "B_0x0,B_0x1" rbitfld.long 0x4 5. "EP,Error passive" "B_0x0,B_0x1" rbitfld.long 0x4 3.--4. "ACT,Activity" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x4 0.--2. "LEC,Last error code" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "FDCAN_TDCR,FDCAN transmitter delay compensation register" hexmask.long.byte 0x8 8.--14. 1. "TDCO,Transmitter delay compensation offset" hexmask.long.byte 0x8 0.--6. 1. "TDCF,Transmitter delay compensation filter window length" group.long 0x50++0xF line.long 0x0 "FDCAN_IR,FDCAN interrupt register" bitfld.long 0x0 29. "ARA,Access to reserved address" "B_0x0,B_0x1" bitfld.long 0x0 28. "PED,Protocol error in data phase (data bit time is used)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PEA,Protocol error in arbitration phase (nominal bit time is used)" "B_0x0,B_0x1" bitfld.long 0x0 26. "WDI,Watchdog interrupt" "B_0x0,B_0x1" bitfld.long 0x0 25. "BO,Bus_Off status" "B_0x0,B_0x1" bitfld.long 0x0 24. "EW,Warning status" "B_0x0,B_0x1" bitfld.long 0x0 23. "EP,Error passive" "B_0x0,B_0x1" newline bitfld.long 0x0 22. "ELO,Error logging overflow" "B_0x0,B_0x1" bitfld.long 0x0 19. "DRX,Message stored to dedicated Rx buffer" "B_0x0,B_0x1" bitfld.long 0x0 18. "TOO,Timeout occurred" "B_0x0,B_0x1" bitfld.long 0x0 17. "MRAF,Message RAM access failure" "B_0x0,B_0x1" bitfld.long 0x0 16. "TSW,Timestamp wraparound" "B_0x0,B_0x1" bitfld.long 0x0 15. "TEFL,Tx event FIFO element lost" "B_0x0,B_0x1" bitfld.long 0x0 14. "TEFF,Tx event FIFO full" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "TEFW,Tx event FIFO watermark reached" "B_0x0,B_0x1" bitfld.long 0x0 12. "TEFN,Tx event FIFO new entry" "B_0x0,B_0x1" bitfld.long 0x0 11. "TFE,Tx FIFO empty" "B_0x0,B_0x1" bitfld.long 0x0 10. "TCF,Transmission cancellation finished" "B_0x0,B_0x1" bitfld.long 0x0 9. "TC,Transmission completed" "B_0x0,B_0x1" bitfld.long 0x0 8. "HPM,High priority message" "B_0x0,B_0x1" bitfld.long 0x0 7. "RF1L,Rx FIFO 1 message lost" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "RF1F,Rx FIFO 1 full" "B_0x0,B_0x1" bitfld.long 0x0 5. "RF1W,Rx FIFO 1 watermark reached" "B_0x0,B_0x1" bitfld.long 0x0 4. "RF1N,Rx FIFO 1 new message" "B_0x0,B_0x1" bitfld.long 0x0 3. "RF0L,Rx FIFO 0 message lost" "B_0x0,B_0x1" bitfld.long 0x0 2. "RF0F,Rx FIFO 0 full" "B_0x0,B_0x1" bitfld.long 0x0 1. "RF0W,Rx FIFO 0 watermark reached" "B_0x0,B_0x1" bitfld.long 0x0 0. "RF0N,Rx FIFO 0 New message" "B_0x0,B_0x1" line.long 0x4 "FDCAN_IE,FDCAN interrupt enable register" bitfld.long 0x4 29. "ARAE,Access to Reserved address enable" "0,1" bitfld.long 0x4 28. "PEDE,Protocol error in data phase enable" "0,1" bitfld.long 0x4 27. "PEAE,Protocol error in Arbitration phase enable" "0,1" bitfld.long 0x4 26. "WDIE,Watchdog interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 25. "BOE,Bus_Off status" "B_0x0,B_0x1" bitfld.long 0x4 24. "EWE,Warning status interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "EPE,Error passive interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 22. "ELOE,Error logging overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "DRXE,Message stored to dedicated Rx buffer interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 18. "TOOE,Timeout occurred interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 17. "MRAFE,Message RAM access failure interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "TSWE,Timestamp wraparound interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 15. "TEFLE,Tx event FIFO element lost interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 14. "TEFFE,Tx event FIFO full interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "TEFWE,Tx event FIFO watermark reached interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 12. "TEFNE,Tx event FIFO new entry interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "TFEE,Tx FIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 10. "TCFE,Transmission cancellation finished interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "TCE,Transmission completed interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "HPME,High priority message interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "RF1LE,Rx FIFO 1 message lost interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 6. "RF1FE,Rx FIFO 1 full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "RF1WE,Rx FIFO 1 watermark reached interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "RF1NE,Rx FIFO 1 new message interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "RF0LE,Rx FIFO 0 message lost interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "RF0FE,Rx FIFO 0 full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "RF0WE,Rx FIFO 0 watermark reached interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "RF0NE,Rx FIFO 0 new message interrupt enable" "B_0x0,B_0x1" line.long 0x8 "FDCAN_ILS,FDCAN interrupt line select register" bitfld.long 0x8 29. "ARAL,Access to reserved address line" "0,1" bitfld.long 0x8 28. "PEDL,Protocol error in data phase line" "0,1" bitfld.long 0x8 27. "PEAL,Protocol error in arbitration phase line" "0,1" bitfld.long 0x8 26. "WDIL,Watchdog interrupt line" "0,1" bitfld.long 0x8 25. "BOL,Bus_Off status" "0,1" bitfld.long 0x8 24. "EWL,Warning status interrupt line" "0,1" bitfld.long 0x8 23. "EPL,Error passive interrupt line" "0,1" newline bitfld.long 0x8 22. "ELOL,Error logging overflow interrupt line" "0,1" bitfld.long 0x8 19. "DRXL,Message stored to dedicated Rx buffer interrupt line" "0,1" bitfld.long 0x8 18. "TOOL,Timeout occurred interrupt line" "0,1" bitfld.long 0x8 17. "MRAFL,Message RAM access failure interrupt line" "0,1" bitfld.long 0x8 16. "TSWL,Timestamp wraparound interrupt line" "0,1" bitfld.long 0x8 15. "TEFLL,Tx event FIFO element Lost interrupt line" "0,1" bitfld.long 0x8 14. "TEFFL,Tx event FIFO full interrupt line" "0,1" newline bitfld.long 0x8 13. "TEFWL,Tx event FIFO watermark reached interrupt line" "0,1" bitfld.long 0x8 12. "TEFNL,Tx event FIFO new entry interrupt line" "0,1" bitfld.long 0x8 11. "TFEL,Tx FIFO empty interrupt line" "0,1" bitfld.long 0x8 10. "TCFL,Transmission cancellation finished interrupt line" "0,1" bitfld.long 0x8 9. "TCL,Transmission completed interrupt line" "0,1" bitfld.long 0x8 8. "HPML,High priority message interrupt line" "0,1" bitfld.long 0x8 7. "RF1LL,Rx FIFO 1 message lost interrupt line" "0,1" newline bitfld.long 0x8 6. "RF1FL,Rx FIFO 1 full interrupt line" "0,1" bitfld.long 0x8 5. "RF1WL,Rx FIFO 1 watermark reached interrupt line" "0,1" bitfld.long 0x8 4. "RF1NL,Rx FIFO 1 new message interrupt line" "0,1" bitfld.long 0x8 3. "RF0LL,Rx FIFO 0 message lost interrupt line" "0,1" bitfld.long 0x8 2. "RF0FL,Rx FIFO 0 full interrupt line" "0,1" bitfld.long 0x8 1. "RF0WL,Rx FIFO 0 watermark reached interrupt line" "0,1" bitfld.long 0x8 0. "RF0NL,Rx FIFO 0 new message interrupt line" "0,1" line.long 0xC "FDCAN_ILE,FDCAN interrupt line enable register" bitfld.long 0xC 1. "EINT1,Enable interrupt line 1" "B_0x0,B_0x1" bitfld.long 0xC 0. "EINT0,Enable interrupt line 0" "B_0x0,B_0x1" group.long 0x80++0xB line.long 0x0 "FDCAN_GFC,FDCAN global filter configuration register" bitfld.long 0x0 4.--5. "ANFS,Accept non-matching frames standard" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "ANFE,Accept non-matching frames extended" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "RRFS,Reject remote frames standard" "B_0x0,B_0x1" bitfld.long 0x0 0. "RRFE,Reject remote frames extended" "B_0x0,B_0x1" line.long 0x4 "FDCAN_SIDFC,FDCAN standard ID filter configuration register" hexmask.long.byte 0x4 16.--23. 1. "LSS,List size standard" hexmask.long.word 0x4 2.--15. 1. "FLSSA,Filter list standard start address" line.long 0x8 "FDCAN_XIDFC,FDCAN extended ID filter configuration register" hexmask.long.byte 0x8 16.--23. 1. "LSE,List size extended" hexmask.long.word 0x8 2.--15. 1. "FLESA,Filter list extended start address" group.long 0x90++0x3 line.long 0x0 "FDCAN_XIDAM,FDCAN extended ID and mask register" hexmask.long 0x0 0.--28. 1. "EIDM,Extended ID Mask" rgroup.long 0x94++0x3 line.long 0x0 "FDCAN_HPMS,FDCAN high priority message status register" bitfld.long 0x0 15. "FLST,Filter list" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--14. 1. "FIDX,Filter index" bitfld.long 0x0 6.--7. "MSI,Message storage indicator" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 0.--5. 1. "BIDX,Buffer index" group.long 0x98++0x1B line.long 0x0 "FDCAN_NDAT1,FDCAN new data 1 register" bitfld.long 0x0 31. "ND31,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 30. "ND30,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 29. "ND29,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 28. "ND28,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 27. "ND27,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 26. "ND26,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 25. "ND25,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "ND24,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 23. "ND23,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 22. "ND22,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 21. "ND21,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 20. "ND20,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 19. "ND19,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 18. "ND18,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "ND17,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 16. "ND16,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 15. "ND15,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 14. "ND14,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 13. "ND13,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 12. "ND12,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 11. "ND11,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "ND10,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 9. "ND9,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 8. "ND8,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 7. "ND7,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 6. "ND6,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 5. "ND5,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 4. "ND4,New data[31:0]" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "ND3,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 2. "ND2,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 1. "ND1,New data[31:0]" "B_0x0,B_0x1" bitfld.long 0x0 0. "ND0,New data[31:0]" "B_0x0,B_0x1" line.long 0x4 "FDCAN_NDAT2,FDCAN new data 2 register" bitfld.long 0x4 31. "ND63,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 30. "ND62,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 29. "ND61,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 28. "ND60,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 27. "ND59,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 26. "ND58,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 25. "ND57,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "ND56,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 23. "ND55,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 22. "ND54,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 21. "ND53,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 20. "ND52,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 19. "ND51,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 18. "ND50,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "ND49,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 16. "ND48,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 15. "ND47,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 14. "ND46,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 13. "ND45,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 12. "ND44,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 11. "ND43,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "ND42,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 9. "ND41,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 8. "ND40,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 7. "ND39,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 6. "ND38,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 5. "ND37,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 4. "ND36,New data[63:32]" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "ND35,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 2. "ND34,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 1. "ND33,New data[63:32]" "B_0x0,B_0x1" bitfld.long 0x4 0. "ND32,New data[63:32]" "B_0x0,B_0x1" line.long 0x8 "FDCAN_RXF0C,FDCAN Rx FIFO 0 configuration register" bitfld.long 0x8 31. "F0OM,FIFO 0 operation mode" "B_0x0,B_0x1" hexmask.long.byte 0x8 24.--30. 1. "F0WM,FIFO 0 watermark" hexmask.long.byte 0x8 16.--22. 1. "F0S,Rx FIFO 0 size" hexmask.long.word 0x8 2.--15. 1. "F0SA,Rx FIFO 0 start address" line.long 0xC "FDCAN_RXF0S,FDCAN Rx FIFO 0 status register" bitfld.long 0xC 25. "RF0L,Rx FIFO 0 message lost" "B_0x0,B_0x1" bitfld.long 0xC 24. "F0F,Rx FIFO 0 full" "B_0x0,B_0x1" hexmask.long.byte 0xC 16.--21. 1. "F0PI,Rx FIFO 0 put index" hexmask.long.byte 0xC 8.--13. 1. "F0GI,Rx FIFO 0 get index" hexmask.long.byte 0xC 0.--6. 1. "F0FL,Rx FIFO 0 fill level" line.long 0x10 "FDCAN_RXF0A,FDCAN Rx FIFO 0 acknowledge register" hexmask.long.byte 0x10 0.--5. 1. "F0AI,Rx FIFO 0 acknowledge index" line.long 0x14 "FDCAN_RXBC,FDCAN Rx buffer configuration register" hexmask.long.word 0x14 2.--15. 1. "RBSA,Rx buffer start address" line.long 0x18 "FDCAN_RXF1C,FDCAN Rx FIFO 1 configuration register" bitfld.long 0x18 31. "F1OM,FIFO 1 operation mode" "B_0x0,B_0x1" hexmask.long.byte 0x18 24.--30. 1. "F1WM,Rx FIFO 1 watermark" hexmask.long.byte 0x18 16.--22. 1. "F1S,Rx FIFO 1 size" hexmask.long.word 0x18 2.--15. 1. "F1SA,Rx FIFO 1 start address" rgroup.long 0xB4++0x3 line.long 0x0 "FDCAN_RXF1S,FDCAN Rx FIFO 1 status register" bitfld.long 0x0 30.--31. "DMS,Debug message status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 25. "RF1L,Rx FIFO 1 message lost" "B_0x0,B_0x1" bitfld.long 0x0 24. "F1F,Rx FIFO 1 full" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--21. 1. "F1PI,Rx FIFO 1 put index" hexmask.long.byte 0x0 8.--13. 1. "F1GI,Rx FIFO 1 get index" hexmask.long.byte 0x0 0.--6. 1. "F1FL,Rx FIFO 1 fill level" group.long 0xB8++0x3 line.long 0x0 "FDCAN_RXF1A,FDCAN Rx FIFO 1 acknowledge register" hexmask.long.byte 0x0 0.--5. 1. "F1AI,Rx FIFO 1 acknowledge index" rgroup.long 0xBC++0x3 line.long 0x0 "FDCAN_RXESC,FDCAN Rx buffer element size configuration register" bitfld.long 0x0 8.--10. "RBDS,Rx buffer data field size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 4.--6. "F1DS,Rx FIFO 0 data field size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 0.--2. "F0DS,Rx FIFO 1 data field size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" group.long 0xC0++0x3 line.long 0x0 "FDCAN_TXBC,FDCAN Tx buffer configuration register" bitfld.long 0x0 30. "TFQM,Tx FIFO/queue mode" "B_0x0,B_0x1" hexmask.long.byte 0x0 24.--29. 1. "TFQS,Transmit FIFO/queue size" hexmask.long.byte 0x0 16.--21. 1. "NDTB,Number of dedicated transmit buffers" hexmask.long.word 0x0 2.--15. 1. "TBSA,Tx buffers start address" rgroup.long 0xC4++0xB line.long 0x0 "FDCAN_TXFQS,FDCAN Tx FIFO/queue status register" bitfld.long 0x0 21. "TFQF,Tx FIFO/queue full" "0,1" hexmask.long.byte 0x0 16.--20. 1. "TFQPI,Tx FIFO/queue put index" hexmask.long.byte 0x0 8.--12. 1. "TFGI,Tx FIFO get index." hexmask.long.byte 0x0 0.--5. 1. "TFFL,Tx FIFO free level" line.long 0x4 "FDCAN_TXESC,FDCAN Tx buffer element size configuration register" bitfld.long 0x4 0.--2. "TBDS,Tx buffer data Field size:" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "FDCAN_TXBRP,FDCAN Tx buffer request pending register" hexmask.long 0x8 0.--31. 1. "TRP,Transmission request pending" group.long 0xD0++0x7 line.long 0x0 "FDCAN_TXBAR,FDCAN Tx buffer add request register" hexmask.long 0x0 0.--31. 1. "AR,Add request" line.long 0x4 "FDCAN_TXBCR,FDCAN Tx buffer cancellation request register" hexmask.long 0x4 0.--31. 1. "CR,Cancellation request" rgroup.long 0xD8++0x7 line.long 0x0 "FDCAN_TXBTO,FDCAN Tx buffer transmission occurred register" hexmask.long 0x0 0.--31. 1. "TO,Transmission occurred" line.long 0x4 "FDCAN_TXBCF,FDCAN Tx buffer cancellation finished register" hexmask.long 0x4 0.--31. 1. "CF,Cancellation finished" group.long 0xE0++0x7 line.long 0x0 "FDCAN_TXBTIE,FDCAN Tx buffer transmission interrupt enable register" hexmask.long 0x0 0.--31. 1. "TIE,Transmission interrupt enable" line.long 0x4 "FDCAN_TXBCIE,FDCAN Tx buffer cancellation finished interrupt enable register" hexmask.long 0x4 0.--31. 1. "CFIE,Cancellation finished interrupt enable" group.long 0xF0++0x3 line.long 0x0 "FDCAN_TXEFC,FDCAN Tx event FIFO configuration register" hexmask.long.byte 0x0 24.--29. 1. "EFWM,Event FIFO watermark" hexmask.long.byte 0x0 16.--21. 1. "EFS,Event FIFO size." hexmask.long.word 0x0 2.--15. 1. "EFSA,Event FIFO start address" rgroup.long 0xF4++0x3 line.long 0x0 "FDCAN_TXEFS,FDCAN Tx event FIFO status register" bitfld.long 0x0 25. "TEFL,Tx event FIFO element lost" "0,1" bitfld.long 0x0 24. "EFF,Event FIFO full" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--20. 1. "EFPI,Event FIFO put index" hexmask.long.byte 0x0 8.--12. 1. "EFGI,Event FIFO get index" hexmask.long.byte 0x0 0.--5. 1. "EFFL,Event FIFO fill level" group.long 0xF8++0x3 line.long 0x0 "FDCAN_TXEFA,FDCAN Tx event FIFO acknowledge register" hexmask.long.byte 0x0 0.--4. 1. "EFAI,Event FIFO acknowledge index" group.long 0x100++0x2B line.long 0x0 "FDCAN_TTTMC,FDCAN TT trigger memory configuration register" hexmask.long.byte 0x0 16.--22. 1. "TME,Trigger memory elements" hexmask.long.word 0x0 2.--15. 1. "TMSA,Trigger memory start address." line.long 0x4 "FDCAN_TTRMC,FDCAN TT reference message configuration register" bitfld.long 0x4 31. "RMPS,Reference message payload select" "B_0x0,B_0x1" bitfld.long 0x4 30. "XTD,Extended identifier" "B_0x0,B_0x1" hexmask.long 0x4 0.--28. 1. "RID,Reference identifier." line.long 0x8 "FDCAN_TTOCF,FDCAN TT operation configuration register" bitfld.long 0x8 26. "EVTP,Event trigger polarity." "B_0x0,B_0x1" bitfld.long 0x8 25. "ECC,Enable clock calibration." "B_0x0,B_0x1" bitfld.long 0x8 24. "EGTF,Enable global time filtering." "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--23. 1. "AWL,Application watchdog limit." bitfld.long 0x8 15. "EECS,Enable external clock synchronization" "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--14. 1. "IRTO,Initial reference trigger offset." bitfld.long 0x8 5.--7. "LDSDL,LD of synchronization deviation limit." "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 4. "TM,Time master." "B_0x0,B_0x1" bitfld.long 0x8 3. "GEN,Gap enable." "B_0x0,B_0x1" bitfld.long 0x8 0.--1. "OM,Operation mode." "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "FDCAN_TTMLM,FDCAN TT matrix limits register" hexmask.long.word 0xC 16.--27. 1. "ENTT,Expected number of Tx triggers" hexmask.long.byte 0xC 8.--11. 1. "TXEW,Tx enable window" bitfld.long 0xC 6.--7. "CSS,Cycle start synchronization" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0xC 0.--5. 1. "CCM,Cycle count Max" line.long 0x10 "FDCAN_TURCF,FDCAN TUR configuration register" bitfld.long 0x10 31. "ELT,Enable local time." "B_0x0,B_0x1" hexmask.long.word 0x10 16.--29. 1. "DC,Denominator configuration." hexmask.long.word 0x10 0.--15. 1. "NCL,Numerator configuration low." line.long 0x14 "FDCAN_TTOCN,FDCAN TT operation control register" rbitfld.long 0x14 15. "LCKC,TT operation control register locked." "B_0x0,B_0x1" bitfld.long 0x14 13. "ESCN,External synchronization control" "B_0x0,B_0x1" bitfld.long 0x14 12. "NIG,Next is gap." "B_0x0,B_0x1" bitfld.long 0x14 11. "TMG,Time mark gap." "B_0x0,B_0x1" bitfld.long 0x14 10. "FGP,Finish gap." "B_0x0,B_0x1" bitfld.long 0x14 9. "GCS,Gap control select" "B_0x0,B_0x1" bitfld.long 0x14 8. "TTIE,Trigger time mark interrupt pulse enable" "B_0x0,B_0x1" newline bitfld.long 0x14 6.--7. "TMC,Register time mark compare." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 5. "RTIE,Register time mark interrupt pulse enable." "B_0x0,B_0x1" bitfld.long 0x14 3.--4. "SWS,Stop watch source." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 2. "SWP,Stop watch polarity." "B_0x0,B_0x1" bitfld.long 0x14 1. "ECS,External clock synchronization." "0,1" bitfld.long 0x14 0. "SGT,Set global time." "0,1" line.long 0x18 "FDCAN_TTGTP,FDCAN TT global time preset register" hexmask.long.word 0x18 16.--31. 1. "CTP,Cycle time target phase" hexmask.long.word 0x18 0.--15. 1. "TP,Time preset" line.long 0x1C "FDCAN_TTTMK,FDCAN TT time mark register" rbitfld.long 0x1C 31. "LCKM,TT time mark register locked" "B_0x0,B_0x1" hexmask.long.byte 0x1C 16.--22. 1. "TICC,Time mark cycle code" hexmask.long.word 0x1C 0.--15. 1. "TM,Time mark" line.long 0x20 "FDCAN_TTIR,FDCAN TT interrupt register" bitfld.long 0x20 18. "CER,Configuration error" "B_0x0,B_0x1" bitfld.long 0x20 17. "AW,Application watchdog" "B_0x0,B_0x1" bitfld.long 0x20 16. "WT,Watch trigger" "B_0x0,B_0x1" bitfld.long 0x20 15. "IWTG,Initialization watch trigger" "0,1" bitfld.long 0x20 14. "ELC,Error level changed" "B_0x0,B_0x1" bitfld.long 0x20 13. "SE2,Scheduling error 2" "B_0x0,B_0x1" bitfld.long 0x20 12. "SE1,Scheduling error 1" "B_0x0,B_0x1" newline bitfld.long 0x20 11. "TXO,Tx count overflow" "B_0x0,B_0x1" bitfld.long 0x20 10. "TXU,Tx count underflow" "B_0x0,B_0x1" bitfld.long 0x20 9. "GTE,Global time error" "B_0x0,B_0x1" bitfld.long 0x20 8. "GTD,Global time discontinuity" "B_0x0,B_0x1" bitfld.long 0x20 7. "GTW,Global time wrap" "B_0x0,B_0x1" bitfld.long 0x20 6. "SWE,Stop watch event" "B_0x0,B_0x1" bitfld.long 0x20 5. "TTMI,Trigger time mark event internal" "B_0x0,B_0x1" newline bitfld.long 0x20 4. "RTMI,Register time mark interrupt" "B_0x0,B_0x1" bitfld.long 0x20 3. "SOG,Start of gap" "0,1" bitfld.long 0x20 2. "CSM,Change of synchronization mode" "B_0x0,B_0x1" bitfld.long 0x20 1. "SMC,Start of matrix cycle" "B_0x0,B_0x1" bitfld.long 0x20 0. "SBC,Start of basic cycle" "B_0x0,B_0x1" line.long 0x24 "FDCAN_TTIE,FDCAN TT interrupt enable register" bitfld.long 0x24 18. "CERE,Configuration error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 17. "AWE,Application watchdog interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 16. "WTE,Watch trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 15. "IWTE,Initialization watch trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 14. "ELCE,Change error level interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 13. "SE2E,Scheduling error 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 12. "SE1E,Scheduling error 1 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x24 11. "TXOE,Tx count overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 10. "TXUE,Tx count underflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 9. "GTEE,Global time error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 8. "GTDE,Global time discontinuity interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 7. "GTWE,Global time wrap interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 6. "SWEE,Stop watch event interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 5. "TTMIE,Trigger time mark event internal interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x24 4. "RTMIE,Register time mark interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 3. "SOGE,Start of gap interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 2. "CSME,Change of synchronization mode interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 1. "SMCE,Start of matrix cycle interrupt enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "SBCE,Start of basic cycle interrupt enable" "B_0x0,B_0x1" line.long 0x28 "FDCAN_TTILS,FDCAN TT interrupt line select register" bitfld.long 0x28 18. "CERL,Configuration error interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 17. "AWL,Application watchdog interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 16. "WTL,Watch trigger interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 15. "IWTL,Initialization watch trigger interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 14. "ELCL,Change error level interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 13. "SE2L,Scheduling error 2 interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 12. "SE1L,Scheduling error 1 interrupt line" "B_0x0,B_0x1" newline bitfld.long 0x28 11. "TXOL,Tx count overflow interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 10. "TXUL,Tx count underflow interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 9. "GTEL,Global time error interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 8. "GTDL,Global time discontinuity interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 7. "GTWL,Global time wrap interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 6. "SWEL,Stop watch event interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 5. "TTMIL,Trigger time mark event internal interrupt line" "B_0x0,B_0x1" newline bitfld.long 0x28 4. "RTMIL,Register time mark interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 3. "SOGL,Start of gap interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 2. "CSML,Change of synchronization mode interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 1. "SMCL,Start of matrix cycle interrupt line" "B_0x0,B_0x1" bitfld.long 0x28 0. "SBCL,Start of basic cycle interrupt line" "B_0x0,B_0x1" rgroup.long 0x12C++0x17 line.long 0x0 "FDCAN_TTOST,FDCAN TT operation status register" bitfld.long 0x0 31. "SPL,Schedule phase lock" "B_0x0,B_0x1" bitfld.long 0x0 30. "WECS,Wait for external clock synchronization." "B_0x0,B_0x1" bitfld.long 0x0 29. "AWE,Application watchdog event" "B_0x0,B_0x1" bitfld.long 0x0 28. "WFE,Wait for event" "B_0x0,B_0x1" bitfld.long 0x0 27. "GSI,Gap started indicator" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "TMP,Time master priority" "0,1,2,3,4,5,6,7" bitfld.long 0x0 23. "GFI,Gap finished indicator" "B_0x0,B_0x1" newline bitfld.long 0x0 22. "WGTD,Wait for global time discontinuity" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "RTO,Reference trigger offset" bitfld.long 0x0 7. "QCS,Quality of clock speed" "B_0x0,B_0x1" bitfld.long 0x0 6. "QGTP,Quality of global time phase" "B_0x0,B_0x1" bitfld.long 0x0 4.--5. "SYS,Synchronization state" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MS,Master state" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "EL,Error level" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "FDCAN_TURNA,FDCAN TUR numerator actual register" hexmask.long.tbyte 0x4 0.--17. 1. "NAV,Numerator actual value" line.long 0x8 "FDCAN_TTLGT,FDCAN TT local and global time register" hexmask.long.word 0x8 16.--31. 1. "GT,Global time" hexmask.long.word 0x8 0.--15. 1. "LT,Local time" line.long 0xC "FDCAN_TTCTC,FDCAN TT cycle time and count register" hexmask.long.byte 0xC 16.--21. 1. "CC,Cycle count" hexmask.long.word 0xC 0.--15. 1. "CT,Cycle time" line.long 0x10 "FDCAN_TTCPT,FDCAN TT capture time register" hexmask.long.word 0x10 16.--31. 1. "SWV,Stop watch value" hexmask.long.byte 0x10 0.--5. 1. "CCV,Cycle count value" line.long 0x14 "FDCAN_TTCSM,FDCAN TT cycle sync mark register" hexmask.long.word 0x14 0.--15. 1. "CSM,Cycle sync mark" group.long 0x300++0x3 line.long 0x0 "FDCAN_TTTS,FDCAN TT trigger select register" bitfld.long 0x0 4.--5. "EVTSEL,Event trigger input selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "SWTDEL,Stop watch trigger input selection" "B_0x0,B_0x1,B_0x2,B_0x3" tree.end tree.end tree "FMC (Flexible Memory Controller)" base ad:0x0 tree "FMC" base ad:0x48200000 group.long 0x0++0x23 line.long 0x0 "FMC_BCR1,SRAM/NOR flash chip-select control register for memory region 1" bitfld.long 0x0 22.--23. "NBLSET,Byte lane (NBL) setup" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 21. "CSCOUNT1,Chip Select (CS) counter" "B_0x0,B_0x1" bitfld.long 0x0 20. "CSCOUNT0,Chip Select (CS) counter" "B_0x0,B_0x1" bitfld.long 0x0 19. "CBURSTRW,Write burst enable" "B_0x0,B_0x1" bitfld.long 0x0 16.--18. "CPSIZE,CRAM page size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 15. "ASYNCWAIT,Wait signal during asynchronous transfers" "B_0x0,B_0x1" newline bitfld.long 0x0 14. "EXTMOD,Extended mode enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "WAITEN,Wait enable bit" "B_0x0,B_0x1" bitfld.long 0x0 12. "WREN,Write enable bit" "B_0x0,B_0x1" bitfld.long 0x0 11. "WAITCFG,Wait timing configuration" "B_0x0,B_0x1" bitfld.long 0x0 9. "WAITPOL,Wait signal polarity bit" "B_0x0,B_0x1" bitfld.long 0x0 8. "BURSTEN,Burst enable bit" "B_0x0,B_0x1" newline bitfld.long 0x0 4.--5. "MWID,Memory data bus width" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MTYP,Memory type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "MUXEN,Address/data multiplexing enable bit" "B_0x0,B_0x1" bitfld.long 0x0 0. "MBKEN,Memory region enable bit" "B_0x0,B_0x1" line.long 0x4 "FMC_BTR1,SRAM/NOR flash chip-select timing registers for memory region 1" bitfld.long 0x4 30.--31. "DATAHLD,Data Hold phase duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 28.--29. "ACCMOD,Access mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 24.--27. 1. "DATLAT,Data latency for synchronous memory (see note below bit descriptions)" hexmask.long.byte 0x4 20.--23. 1. "CLKDIV,Clock divide ratio (for FMC_CLK signal)" hexmask.long.byte 0x4 16.--19. 1. "BUSTURN,Bus turnaround phase duration" hexmask.long.byte 0x4 8.--15. 1. "DATAST,Data-phase duration" newline hexmask.long.byte 0x4 4.--7. 1. "ADDHLD,Address-hold phase duration" hexmask.long.byte 0x4 0.--3. 1. "ADDSET,Address setup phase duration" line.long 0x8 "FMC_BCR2,SRAM/NOR flash chip-select control register for memory region 2" bitfld.long 0x8 22.--23. "NBLSET,Byte lane (NBL) setup" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 21. "CSCOUNT1,Chip Select (CS) counter" "B_0x0,B_0x1" bitfld.long 0x8 20. "CSCOUNT0,Chip Select (CS) counter" "B_0x0,B_0x1" bitfld.long 0x8 19. "CBURSTRW,Write burst enable" "B_0x0,B_0x1" bitfld.long 0x8 16.--18. "CPSIZE,CRAM page size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x8 15. "ASYNCWAIT,Wait signal during asynchronous transfers" "B_0x0,B_0x1" newline bitfld.long 0x8 14. "EXTMOD,Extended mode enable" "B_0x0,B_0x1" bitfld.long 0x8 13. "WAITEN,Wait enable bit" "B_0x0,B_0x1" bitfld.long 0x8 12. "WREN,Write enable bit" "B_0x0,B_0x1" bitfld.long 0x8 11. "WAITCFG,Wait timing configuration" "B_0x0,B_0x1" bitfld.long 0x8 9. "WAITPOL,Wait signal polarity bit" "B_0x0,B_0x1" bitfld.long 0x8 8. "BURSTEN,Burst enable bit" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--5. "MWID,Memory data bus width" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "MTYP,Memory type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 1. "MUXEN,Address/data multiplexing enable bit" "B_0x0,B_0x1" bitfld.long 0x8 0. "MBKEN,Memory region enable bit" "B_0x0,B_0x1" line.long 0xC "FMC_BTR2,SRAM/NOR flash chip-select timing registers for memory region 2" bitfld.long 0xC 30.--31. "DATAHLD,Data Hold phase duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 28.--29. "ACCMOD,Access mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0xC 24.--27. 1. "DATLAT,Data latency for synchronous memory (see note below bit descriptions)" hexmask.long.byte 0xC 20.--23. 1. "CLKDIV,Clock divide ratio (for FMC_CLK signal)" hexmask.long.byte 0xC 16.--19. 1. "BUSTURN,Bus turnaround phase duration" hexmask.long.byte 0xC 8.--15. 1. "DATAST,Data-phase duration" newline hexmask.long.byte 0xC 4.--7. 1. "ADDHLD,Address-hold phase duration" hexmask.long.byte 0xC 0.--3. 1. "ADDSET,Address setup phase duration" line.long 0x10 "FMC_BCR3,SRAM/NOR flash chip-select control register for memory region 3" bitfld.long 0x10 22.--23. "NBLSET,Byte lane (NBL) setup" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 21. "CSCOUNT1,Chip Select (CS) counter" "B_0x0,B_0x1" bitfld.long 0x10 20. "CSCOUNT0,Chip Select (CS) counter" "B_0x0,B_0x1" bitfld.long 0x10 19. "CBURSTRW,Write burst enable" "B_0x0,B_0x1" bitfld.long 0x10 16.--18. "CPSIZE,CRAM page size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x10 15. "ASYNCWAIT,Wait signal during asynchronous transfers" "B_0x0,B_0x1" newline bitfld.long 0x10 14. "EXTMOD,Extended mode enable" "B_0x0,B_0x1" bitfld.long 0x10 13. "WAITEN,Wait enable bit" "B_0x0,B_0x1" bitfld.long 0x10 12. "WREN,Write enable bit" "B_0x0,B_0x1" bitfld.long 0x10 11. "WAITCFG,Wait timing configuration" "B_0x0,B_0x1" bitfld.long 0x10 9. "WAITPOL,Wait signal polarity bit" "B_0x0,B_0x1" bitfld.long 0x10 8. "BURSTEN,Burst enable bit" "B_0x0,B_0x1" newline bitfld.long 0x10 4.--5. "MWID,Memory data bus width" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 2.--3. "MTYP,Memory type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 1. "MUXEN,Address/data multiplexing enable bit" "B_0x0,B_0x1" bitfld.long 0x10 0. "MBKEN,Memory region enable bit" "B_0x0,B_0x1" line.long 0x14 "FMC_BTR3,SRAM/NOR flash chip-select timing registers for memory region 3" bitfld.long 0x14 30.--31. "DATAHLD,Data Hold phase duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 28.--29. "ACCMOD,Access mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x14 24.--27. 1. "DATLAT,Data latency for synchronous memory (see note below bit descriptions)" hexmask.long.byte 0x14 20.--23. 1. "CLKDIV,Clock divide ratio (for FMC_CLK signal)" hexmask.long.byte 0x14 16.--19. 1. "BUSTURN,Bus turnaround phase duration" hexmask.long.byte 0x14 8.--15. 1. "DATAST,Data-phase duration" newline hexmask.long.byte 0x14 4.--7. 1. "ADDHLD,Address-hold phase duration" hexmask.long.byte 0x14 0.--3. 1. "ADDSET,Address setup phase duration" line.long 0x18 "FMC_BCR4,SRAM/NOR flash chip-select control register for memory region 4" bitfld.long 0x18 22.--23. "NBLSET,Byte lane (NBL) setup" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x18 21. "CSCOUNT1,Chip Select (CS) counter" "B_0x0,B_0x1" bitfld.long 0x18 20. "CSCOUNT0,Chip Select (CS) counter" "B_0x0,B_0x1" bitfld.long 0x18 19. "CBURSTRW,Write burst enable" "B_0x0,B_0x1" bitfld.long 0x18 16.--18. "CPSIZE,CRAM page size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x18 15. "ASYNCWAIT,Wait signal during asynchronous transfers" "B_0x0,B_0x1" newline bitfld.long 0x18 14. "EXTMOD,Extended mode enable" "B_0x0,B_0x1" bitfld.long 0x18 13. "WAITEN,Wait enable bit" "B_0x0,B_0x1" bitfld.long 0x18 12. "WREN,Write enable bit" "B_0x0,B_0x1" bitfld.long 0x18 11. "WAITCFG,Wait timing configuration" "B_0x0,B_0x1" bitfld.long 0x18 9. "WAITPOL,Wait signal polarity bit" "B_0x0,B_0x1" bitfld.long 0x18 8. "BURSTEN,Burst enable bit" "B_0x0,B_0x1" newline bitfld.long 0x18 4.--5. "MWID,Memory data bus width" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x18 2.--3. "MTYP,Memory type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x18 1. "MUXEN,Address/data multiplexing enable bit" "B_0x0,B_0x1" bitfld.long 0x18 0. "MBKEN,Memory region enable bit" "B_0x0,B_0x1" line.long 0x1C "FMC_BTR4,SRAM/NOR flash chip-select timing registers for memory region 4" bitfld.long 0x1C 30.--31. "DATAHLD,Data Hold phase duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x1C 28.--29. "ACCMOD,Access mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x1C 24.--27. 1. "DATLAT,Data latency for synchronous memory (see note below bit descriptions)" hexmask.long.byte 0x1C 20.--23. 1. "CLKDIV,Clock divide ratio (for FMC_CLK signal)" hexmask.long.byte 0x1C 16.--19. 1. "BUSTURN,Bus turnaround phase duration" hexmask.long.byte 0x1C 8.--15. 1. "DATAST,Data-phase duration" newline hexmask.long.byte 0x1C 4.--7. 1. "ADDHLD,Address-hold phase duration" hexmask.long.byte 0x1C 0.--3. 1. "ADDSET,Address setup phase duration" line.long 0x20 "FMC_CFGR,FMC common configuration register" bitfld.long 0x20 31. "FMCEN,FMC enable" "B_0x0,B_0x1" bitfld.long 0x20 20. "CCLKEN,Continuous clock enable" "B_0x0,B_0x1" hexmask.long.byte 0x20 16.--19. 1. "CLKDIV,Clock divide ratio (for FMC_CLK signal)" group.long 0x80++0x3 line.long 0x0 "FMC_PCR,NAND flash programmable control register" bitfld.long 0x0 25. "WEN,Write enable" "B_0x0,B_0x1" bitfld.long 0x0 24. "BCHECC,BCH error correction capability" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "ECCSS,ECC sector size (used to access spare area)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" hexmask.long.byte 0x0 13.--16. 1. "TAR,ALE to RE delay." hexmask.long.byte 0x0 9.--12. 1. "TCLR,CLE to RE delay." bitfld.long 0x0 8. "ECCALG,ECC algorithm" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "ECCEN,ECC computation logic enable bit" "B_0x0,B_0x1" bitfld.long 0x0 4.--5. "PWID,Data bus width" "B_0x0,B_0x1,?,?" bitfld.long 0x0 2. "PBKEN,NAND flash memory region enable bit" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWAITEN,Wait feature enable bit" "B_0x0,B_0x1" rgroup.long 0x84++0x3 line.long 0x0 "FMC_SR,FMC status register" bitfld.long 0x0 6. "NWRF,NAND write request flag" "B_0x0,B_0x1" bitfld.long 0x0 4. "PEF,Pipe Empty Flag" "0,1" bitfld.long 0x0 0.--1. "ISOST,FMC isolation state with respect to the AXI interface" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x88++0x7 line.long 0x0 "FMC_PMEM,FMC common memory space timing register" hexmask.long.byte 0x0 24.--31. 1. "MEMHIZ,Common memory data bus Hi-Z time" hexmask.long.byte 0x0 16.--23. 1. "MEMHOLD,Common memory hold time" hexmask.long.byte 0x0 8.--15. 1. "MEMWAIT,Common memory wait time" hexmask.long.byte 0x0 0.--7. 1. "MEMSET,Common memory setup time" line.long 0x4 "FMC_PATT,FMC attribute memory space timing registers" hexmask.long.byte 0x4 24.--31. 1. "ATTHIZ,Attribute memory data bus Hi-Z time" hexmask.long.byte 0x4 16.--23. 1. "ATTHOLD,Attribute memory hold time" hexmask.long.byte 0x4 8.--15. 1. "ATTWAIT,Attribute memory wait time" hexmask.long.byte 0x4 0.--7. 1. "ATTSET,Attribute memory setup time" rgroup.long 0x90++0x7 line.long 0x0 "FMC_HPR,FMC Hamming parity result registers" hexmask.long 0x0 0.--31. 1. "HPR,Hamming parity result" line.long 0x4 "FMC_HECCR,FMC Hamming code ECC result register" hexmask.long 0x4 0.--31. 1. "HECC,ECC result" group.long 0x104++0x3 line.long 0x0 "FMC_BWTR1,SRAM/NOR-flash write timing registers for memory region 1" bitfld.long 0x0 30.--31. "DATAHLD,Data Hold phase duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "ACCMOD,Access mode." "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 16.--19. 1. "BUSTURN,Bus turnaround phase duration" hexmask.long.byte 0x0 8.--15. 1. "DATAST,Data-phase duration." hexmask.long.byte 0x0 4.--7. 1. "ADDHLD,Address-hold phase duration." hexmask.long.byte 0x0 0.--3. 1. "ADDSET,Address setup phase duration." group.long 0x10C++0x3 line.long 0x0 "FMC_BWTR2,SRAM/NOR-flash write timing registers for memory region 2" bitfld.long 0x0 30.--31. "DATAHLD,Data Hold phase duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "ACCMOD,Access mode." "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 16.--19. 1. "BUSTURN,Bus turnaround phase duration" hexmask.long.byte 0x0 8.--15. 1. "DATAST,Data-phase duration." hexmask.long.byte 0x0 4.--7. 1. "ADDHLD,Address-hold phase duration." hexmask.long.byte 0x0 0.--3. 1. "ADDSET,Address setup phase duration." group.long 0x114++0x3 line.long 0x0 "FMC_BWTR3,SRAM/NOR-flash write timing registers for memory region 3" bitfld.long 0x0 30.--31. "DATAHLD,Data Hold phase duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "ACCMOD,Access mode." "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 16.--19. 1. "BUSTURN,Bus turnaround phase duration" hexmask.long.byte 0x0 8.--15. 1. "DATAST,Data-phase duration." hexmask.long.byte 0x0 4.--7. 1. "ADDHLD,Address-hold phase duration." hexmask.long.byte 0x0 0.--3. 1. "ADDSET,Address setup phase duration." group.long 0x11C++0x3 line.long 0x0 "FMC_BWTR4,SRAM/NOR-flash write timing registers for memory region 4" bitfld.long 0x0 30.--31. "DATAHLD,Data Hold phase duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "ACCMOD,Access mode." "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 16.--19. 1. "BUSTURN,Bus turnaround phase duration" hexmask.long.byte 0x0 8.--15. 1. "DATAST,Data-phase duration." hexmask.long.byte 0x0 4.--7. 1. "ADDHLD,Address-hold phase duration." hexmask.long.byte 0x0 0.--3. 1. "ADDSET,Address setup phase duration." group.long 0x180++0x3 line.long 0x0 "FMC_IER,FMC NAND interrupt enable register" bitfld.long 0x0 2. "IFEE,Interrupt falling edge detection enable bit" "B_0x0,B_0x1" bitfld.long 0x0 1. "IHLE,Interrupt high-level detection enable bit" "B_0x0,B_0x1" bitfld.long 0x0 0. "IREE,Interrupt rising edge detection enable bit" "B_0x0,B_0x1" rgroup.long 0x184++0x3 line.long 0x0 "FMC_ISR,FMC interrupt status register" bitfld.long 0x0 2. "IFEF,Interrupt falling edge flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "IHLF,Interrupt high-level flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "IREF,Interrupt rising edge flag" "B_0x0,B_0x1" wgroup.long 0x188++0x3 line.long 0x0 "FMC_ICR,FMC NAND controller interrupt clear register" bitfld.long 0x0 2. "CIFEF,Clear Interrupt falling edge flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "CIHLF,Clear Interrupt high-level flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "CIREF,Clear Interrupt rising edge flag" "B_0x0,B_0x1" wgroup.long 0x200++0x3 line.long 0x0 "FMC_CSQCR,FMC NAND command sequencer control register" bitfld.long 0x0 0. "CSQSTART,Command Sequencer Enable" "0,1" group.long 0x204++0x13 line.long 0x0 "FMC_CSQCFGR1,FMC NAND command sequencer configuration register 1" bitfld.long 0x0 25. "CMD2T,Command 2 Sequencer timings" "B_0x0,B_0x1" bitfld.long 0x0 24. "CMD1T,Command 1 Sequencer timings" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--23. 1. "CMD2,Command 2 sequencer" hexmask.long.byte 0x0 8.--15. 1. "CMD1,Command 1 sequencer" bitfld.long 0x0 4.--6. "ACYNBR,Address Cycle number" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 2. "DMADEN,Command sequencer DMA request data enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CMD2EN,Command cycle 2 Enable" "B_0x0,B_0x1" line.long 0x4 "FMC_CSQCFGR2,FMC NAND command sequencer configuration register 2" bitfld.long 0x4 25. "RCMD2T,Command 1 sequencer timings" "B_0x0,B_0x1" bitfld.long 0x4 24. "RCMD1T,Command 1 sequencer timings" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "RCMD2,Random Command 2 sequencer" hexmask.long.byte 0x4 8.--15. 1. "RCMD1,Random Command 1 sequencer" bitfld.long 0x4 2. "DMASEN,Command sequencer DMA request decoding status enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "RCMD2EN,Random Command 2 sequencer enable" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "SQSDTEN,Sequencer spare data transfer enable" "B_0x0,B_0x1" line.long 0x8 "FMC_CSQCFGR3,FMC NAND sequencer configuration register 3" bitfld.long 0x8 23. "RAC2T,Random Address cycle 2 sequencer timings" "B_0x0,B_0x1" bitfld.long 0x8 22. "RAC1T,Random Address cycle 1 sequencer timings" "B_0x0,B_0x1" bitfld.long 0x8 21. "SDT,Spare data transfer sequencer timings" "B_0x0,B_0x1" bitfld.long 0x8 20. "AC5T,Address cycle 5 sequencer timings" "B_0x0,B_0x1" bitfld.long 0x8 19. "AC4T,Address cycle 4sequencer timings" "B_0x0,B_0x1" bitfld.long 0x8 18. "AC3T,Address cycle 3 sequencer timings" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "AC2T,Address cycle 2 sequencer timings" "B_0x0,B_0x1" bitfld.long 0x8 16. "AC1T,Address cycle 1 sequencer timings" "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--13. 1. "SNBR,Number of sectors to be read/written" line.long 0xC "FMC_CSQAR1,FMC NAND command sequencer address register 1" hexmask.long.byte 0xC 24.--31. 1. "ADDC4,Address Cycle 4" hexmask.long.byte 0xC 16.--23. 1. "ADDC3,Address Cycle 3" hexmask.long.byte 0xC 8.--15. 1. "ADDC2,Address Cycle 2" hexmask.long.byte 0xC 0.--7. 1. "ADDC1,Address Cycle 1" line.long 0x10 "FMC_CSQAR2,FMC NAND command sequencer address register 2" hexmask.long.word 0x10 16.--31. 1. "SAO,Spare Area Address Offset" bitfld.long 0x10 11. "NANDCEN1,NAND flash chip enable number" "B_0x0,B_0x1" bitfld.long 0x10 10. "NANDCEN0,NAND flash chip enable number" "B_0x0,B_0x1" hexmask.long.byte 0x10 0.--7. 1. "ADDC5,Address Cycle 5" group.long 0x220++0x7 line.long 0x0 "FMC_CSQIER,FMC NAND command sequencer interrupt enable register" bitfld.long 0x0 4. "CMDTCIE,Command Transfer Complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "SUEIE,Sector Uncorrectable Error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEIE,Sector Error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "SCIE,Sector Complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "TCIE,Transfer Complete Interrupt enable" "B_0x0,B_0x1" line.long 0x4 "FMC_CSQISR,FMC NAND command sequencer interrupt status register" bitfld.long 0x4 4. "CMDTCF,Command Transfer Complete flag" "0,1" bitfld.long 0x4 3. "SUEF,Sector Uncorrectable Error flag" "0,1" bitfld.long 0x4 2. "SEF,Sector Error flag" "0,1" bitfld.long 0x4 1. "SCF,Sector Complete flag" "0,1" bitfld.long 0x4 0. "TCF,Transfer Complete flag" "0,1" wgroup.long 0x228++0x3 line.long 0x0 "FMC_CSQICR,FMC NAND command sequencer interrupt clear register" bitfld.long 0x0 4. "CCMDTCF,Clear Command Transfer Complete flag" "0,1" bitfld.long 0x0 3. "CSUEF,Clear Sector uncorrectable Error flag" "0,1" bitfld.long 0x0 2. "CSEF,Clear Sector Error flag" "0,1" bitfld.long 0x0 1. "CSCF,Clear Sector Complete flag" "0,1" bitfld.long 0x0 0. "CTCF,Clear Transfer Complete flag" "0,1" rgroup.long 0x230++0x3 line.long 0x0 "FMC_CSQEMSR,FMC command sequencer error mapping status register" hexmask.long.word 0x0 0.--15. 1. "SEM,Sector Error mapping" group.long 0x250++0x3 line.long 0x0 "FMC_BCHIER,FMC BCH interrupt enable register" bitfld.long 0x0 4. "EPBRIE,Decoder Parity Bits Ready Interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "DSRIE,Decoder Syndrome Ready Interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "DEFIE,Decoder Error Found Interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "DERIE,Decoder Error Ready Interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "DUEIE,Decoder Uncorrectable Errors Interrupt enable" "B_0x0,B_0x1" rgroup.long 0x254++0x3 line.long 0x0 "FMC_BCHISR,FMC BCH interrupt and status register" bitfld.long 0x0 4. "EPBRF,Encoder Parity Bits Ready flag" "0,1" bitfld.long 0x0 3. "DSRF,Decoder Syndrome Ready flag" "0,1" bitfld.long 0x0 2. "DEFF,Decoder Error Found flag" "0,1" bitfld.long 0x0 1. "DERF,Decoder Error Ready flag" "0,1" bitfld.long 0x0 0. "DUEF,Decoder Uncorrectable Errors flag" "0,1" wgroup.long 0x258++0x3 line.long 0x0 "FMC_BCHICR,FMC BCH interrupt clear register" bitfld.long 0x0 4. "CEPBRF,Clear Encoder Parity Bits Ready flag" "0,1" bitfld.long 0x0 3. "CDSRF,Clear Decoder Syndrome Ready flag" "0,1" bitfld.long 0x0 2. "CDEFF,Clear Decoder Error Found flag" "0,1" bitfld.long 0x0 1. "CDERF,Clear Decoder Error ready flag" "0,1" bitfld.long 0x0 0. "CDUEF,Clear Decoder Uncorrectable Error flag" "0,1" rgroup.long 0x260++0xF line.long 0x0 "FMC_BCHPBR1,FMC BCH parity bits register 1" hexmask.long 0x0 0.--31. 1. "BCHPB,BCH parity bits" line.long 0x4 "FMC_BCHPBR2,FMC BCH parity bits register 2" hexmask.long 0x4 0.--31. 1. "BCHPB,BCH parity bits" line.long 0x8 "FMC_BCHPBR3,FMC BCH parity bits register 3" hexmask.long 0x8 0.--31. 1. "BCHPB,BCH parity bits" line.long 0xC "FMC_BCHPBR4,FMC BCH parity bits register 4" hexmask.long.byte 0xC 0.--7. 1. "BCHPB,BCH parity bits" rgroup.long 0x27C++0x13 line.long 0x0 "FMC_BCHDSR0,FMC BCH decoder status register 0" hexmask.long.byte 0x0 4.--7. 1. "DEN,Decoder error number" bitfld.long 0x0 1. "DEF,Decoder error found" "0,1" bitfld.long 0x0 0. "DUE,Decoder uncorrectable error" "0,1" line.long 0x4 "FMC_BCHDSR1,FMC BCH decoder status register for memory region 1" hexmask.long.word 0x4 16.--28. 1. "EBP2,Error bit position for error number 2" hexmask.long.word 0x4 0.--12. 1. "EBP1,Error bit position for error number 1" line.long 0x8 "FMC_BCHDSR2,FMC BCH decoder status register for memory region 2" hexmask.long.word 0x8 16.--28. 1. "EBP4,Error bit position for error number 4" hexmask.long.word 0x8 0.--12. 1. "EBP3,Error bit position for error number 3" line.long 0xC "FMC_BCHDSR3,FMC BCH decoder status register for memory region 3" hexmask.long.word 0xC 16.--28. 1. "EBP6,Error bit position for error number 6" hexmask.long.word 0xC 0.--12. 1. "EBP5,Error bit position for error number 5" line.long 0x10 "FMC_BCHDSR4,FMC BCH decoder status register for memory region 4" hexmask.long.word 0x10 16.--28. 1. "EBP8,Error bit position for error number 8" hexmask.long.word 0x10 0.--12. 1. "EBP7,Error bit position for error number 7" group.long 0x300++0x3B line.long 0x0 "FMC_SECCFGR,FMC security configuration register" bitfld.long 0x0 5. "SEC5,Security configuration for NAND controller" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Security state for NOR/PSRAM controller for Chip Select NE4" "B_0x0,B_0x1" bitfld.long 0x0 3. "SEC3,Security state for NOR/PSRAM controller for Chip Select NE3" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Security state for NOR/PSRAM controller for Chip Select NE2" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Security state for NOR/PSRAM controller for Chip Select NE1" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,Security state for FMC_CFGR common control register" "B_0x0,B_0x1" line.long 0x4 "FMC_PRIVCFGR,FMC security configuration register" bitfld.long 0x4 5. "PRIV5,Privileged state for NAND controller" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged state for NOR/PSRAM controller for Chip Select NE4" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged state for NOR/PSRAM controller for Chip Select NE3" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged state for NOR/PSRAM controller for Chip Select NE2" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged state for NOR/PSRAM controller for Chip Select NE1" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,Privileged state for common control: FMC_CFGR" "B_0x0,B_0x1" line.long 0x8 "FMC_RCFGLOCKR,FMC CID configuration lock register" bitfld.long 0x8 5. "LOCK5,Lock NAND controller until a global FMC reset" "B_0x0,B_0x1" bitfld.long 0x8 4. "LOCK4,Lock NOR/PSRAM controller for Chip Select NE4 until a global FMC reset" "B_0x0,B_0x1" bitfld.long 0x8 3. "LOCK3,Lock NOR/PSRAM controller for Chip Select NE3 until a global FMC reset" "B_0x0,B_0x1" bitfld.long 0x8 2. "LOCK2,Lock NOR/PSRAM controller for Chip Select NE2 until a global FMC reset" "B_0x0,B_0x1" bitfld.long 0x8 1. "LOCK1,Lock NOR/PSRAM controller for Chip Select NE1 until a global FMC reset" "B_0x0,B_0x1" bitfld.long 0x8 0. "LOCK0,Lock FMC_CFGR until a global FMC reset" "B_0x0,B_0x1" line.long 0xC "FMC_CIDCFGR0,FMC resource 0 CID register" bitfld.long 0xC 23. "SEMWLC7,White-listed CID in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0xC 22. "SEMWLC6,White-listed CID0 in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0xC 21. "SEMWLC5,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0xC 20. "SEMWLC4,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0xC 19. "SEMWLC3,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0xC 18. "SEMWLC2,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "SEMWLC1,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0xC 16. "SEMWLC0,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0xC 4.--6. "SCID,Static CID for resource x" "0,1,2,3,4,5,6,7" bitfld.long 0xC 1. "SEMEN,Semaphore enable for resource x" "B_0x0,B_0x1" bitfld.long 0xC 0. "CFEN,CID filtering enable for resource x" "B_0x0,B_0x1" line.long 0x10 "FMC_SEMCR0,FMC resource 0 semaphore control register" rbitfld.long 0x10 4.--6. "SEMCID,Current CID allocated to resource x in semaphore mode" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0. "SEM_MUTEX,Mutex for the CID allocation of resource x in semaphore mode" "0,1" line.long 0x14 "FMC_CIDCFGR1,FMC resource 1 CID register" bitfld.long 0x14 23. "SEMWLC7,White-listed CID in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x14 22. "SEMWLC6,White-listed CID0 in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x14 21. "SEMWLC5,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x14 20. "SEMWLC4,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x14 19. "SEMWLC3,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x14 18. "SEMWLC2,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "SEMWLC1,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x14 16. "SEMWLC0,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x14 4.--6. "SCID,Static CID for resource x" "0,1,2,3,4,5,6,7" bitfld.long 0x14 1. "SEMEN,Semaphore enable for resource x" "B_0x0,B_0x1" bitfld.long 0x14 0. "CFEN,CID filtering enable for resource x" "B_0x0,B_0x1" line.long 0x18 "FMC_SEMCR1,FMC resource 1 semaphore control register" rbitfld.long 0x18 4.--6. "SEMCID,Current CID allocated to resource x in semaphore mode" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0. "SEM_MUTEX,Mutex for the CID allocation of resource x in semaphore mode" "0,1" line.long 0x1C "FMC_CIDCFGR2,FMC resource 2 CID register" bitfld.long 0x1C 23. "SEMWLC7,White-listed CID in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x1C 22. "SEMWLC6,White-listed CID0 in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x1C 21. "SEMWLC5,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x1C 20. "SEMWLC4,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x1C 19. "SEMWLC3,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x1C 18. "SEMWLC2,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" newline bitfld.long 0x1C 17. "SEMWLC1,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x1C 16. "SEMWLC0,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x1C 4.--6. "SCID,Static CID for resource x" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 1. "SEMEN,Semaphore enable for resource x" "B_0x0,B_0x1" bitfld.long 0x1C 0. "CFEN,CID filtering enable for resource x" "B_0x0,B_0x1" line.long 0x20 "FMC_SEMCR2,FMC resource 2 semaphore control register" rbitfld.long 0x20 4.--6. "SEMCID,Current CID allocated to resource x in semaphore mode" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0. "SEM_MUTEX,Mutex for the CID allocation of resource x in semaphore mode" "0,1" line.long 0x24 "FMC_CIDCFGR3,FMC resource 3 CID register" bitfld.long 0x24 23. "SEMWLC7,White-listed CID in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x24 22. "SEMWLC6,White-listed CID0 in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x24 21. "SEMWLC5,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x24 20. "SEMWLC4,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x24 19. "SEMWLC3,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x24 18. "SEMWLC2,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" newline bitfld.long 0x24 17. "SEMWLC1,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x24 16. "SEMWLC0,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x24 4.--6. "SCID,Static CID for resource x" "0,1,2,3,4,5,6,7" bitfld.long 0x24 1. "SEMEN,Semaphore enable for resource x" "B_0x0,B_0x1" bitfld.long 0x24 0. "CFEN,CID filtering enable for resource x" "B_0x0,B_0x1" line.long 0x28 "FMC_SEMCR3,FMC resource 3 semaphore control register" rbitfld.long 0x28 4.--6. "SEMCID,Current CID allocated to resource x in semaphore mode" "0,1,2,3,4,5,6,7" bitfld.long 0x28 0. "SEM_MUTEX,Mutex for the CID allocation of resource x in semaphore mode" "0,1" line.long 0x2C "FMC_CIDCFGR4,FMC resource 4 CID register" bitfld.long 0x2C 23. "SEMWLC7,White-listed CID in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x2C 22. "SEMWLC6,White-listed CID0 in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x2C 21. "SEMWLC5,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x2C 20. "SEMWLC4,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x2C 19. "SEMWLC3,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x2C 18. "SEMWLC2,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" newline bitfld.long 0x2C 17. "SEMWLC1,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x2C 16. "SEMWLC0,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x2C 4.--6. "SCID,Static CID for resource x" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 1. "SEMEN,Semaphore enable for resource x" "B_0x0,B_0x1" bitfld.long 0x2C 0. "CFEN,CID filtering enable for resource x" "B_0x0,B_0x1" line.long 0x30 "FMC_SEMCR4,FMC resource 4 semaphore control register" rbitfld.long 0x30 4.--6. "SEMCID,Current CID allocated to resource x in semaphore mode" "0,1,2,3,4,5,6,7" bitfld.long 0x30 0. "SEM_MUTEX,Mutex for the CID allocation of resource x in semaphore mode" "0,1" line.long 0x34 "FMC_CIDCFGR5,FMC resource 5 CID register" bitfld.long 0x34 23. "SEMWLC7,White-listed CID in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x34 22. "SEMWLC6,White-listed CID0 in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x34 21. "SEMWLC5,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x34 20. "SEMWLC4,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x34 19. "SEMWLC3,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x34 18. "SEMWLC2,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" newline bitfld.long 0x34 17. "SEMWLC1,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x34 16. "SEMWLC0,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x34 4.--6. "SCID,Static CID for resource x" "0,1,2,3,4,5,6,7" bitfld.long 0x34 1. "SEMEN,Semaphore enable for resource x" "B_0x0,B_0x1" bitfld.long 0x34 0. "CFEN,CID filtering enable for resource x" "B_0x0,B_0x1" line.long 0x38 "FMC_SEMCR5,FMC resource 5 semaphore control register" rbitfld.long 0x38 4.--6. "SEMCID,Current CID allocated to resource x in semaphore mode" "0,1,2,3,4,5,6,7" bitfld.long 0x38 0. "SEM_MUTEX,Mutex for the CID allocation of resource x in semaphore mode" "0,1" rgroup.long 0x3E8++0x17 line.long 0x0 "FMC_HWCFGR3,FMC hardware configuration register 3" hexmask.long.byte 0x0 4.--7. 1. "CID_WIDTH,CID bus width" hexmask.long.byte 0x0 0.--3. 1. "MAX_CID,Maximum compartment ID (or CID)" line.long 0x4 "FMC_HWCFGR2,FMC hardware configuration register 2" bitfld.long 0x4 28. "SECURE,Support for Armsup/sup TrustZonesup/sup" "B_0x0,B_0x1" bitfld.long 0x4 24. "PRIVILEGE,Support for Privileged mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 20.--23. 1. "SDRAM2_BASE,SDRAM bank 2 base address" hexmask.long.byte 0x4 16.--19. 1. "SDRAM1_BASE,SDRAM bank 1 base address" hexmask.long.byte 0x4 12.--15. 1. "NAND_BASE,NAND base address" hexmask.long.byte 0x4 8.--11. 1. "SDRAM_RBASE,SDRAM remap base address" newline hexmask.long.byte 0x4 4.--7. 1. "NOR_BASE,NOR base address" hexmask.long.byte 0x4 0.--3. 1. "RD_LN2DPTH,AXI read data FIFO depth" line.long 0x8 "FMC_HWCFGR1,FMC hardware configuration register 1" hexmask.long.byte 0x8 28.--31. 1. "RA_LN2DPTH,AXI read address FIFO depth" hexmask.long.byte 0x8 24.--27. 1. "WR_LN2DPTH,AXI write response FIFO depth" hexmask.long.byte 0x8 20.--23. 1. "WD_LN2DPTH,AXI write data FIFO depth" hexmask.long.byte 0x8 16.--19. 1. "WA_LN2DPTH,AXI write address FIFO depth" hexmask.long.byte 0x8 12.--15. 1. "ID_SIZE,AXI ID width" bitfld.long 0x8 8. "SDRAM_SEL,SDRAM controller selection" "B_0x0,B_0x1" newline bitfld.long 0x8 4. "NAND_ECC,NAND ECC" "B_0x0,B_0x1" bitfld.long 0x8 0. "NAND_SEL,NAND Controller Selection" "B_0x0,B_0x1" line.long 0xC "FMC_VERR,FMC version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,Minor revision" line.long 0x10 "FMC_IPIDR,FMC identification register" hexmask.long 0x10 0.--31. 1. "ID,FMC Identifier" line.long 0x14 "FMC_SIDR,FMC size identification register" hexmask.long 0x14 0.--31. 1. "SID,Size Identification" tree.end tree "FMC_S" base ad:0x58200000 group.long 0x0++0x23 line.long 0x0 "FMC_BCR1,SRAM/NOR flash chip-select control register for memory region 1" bitfld.long 0x0 22.--23. "NBLSET,Byte lane (NBL) setup" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 21. "CSCOUNT1,Chip Select (CS) counter" "B_0x0,B_0x1" bitfld.long 0x0 20. "CSCOUNT0,Chip Select (CS) counter" "B_0x0,B_0x1" bitfld.long 0x0 19. "CBURSTRW,Write burst enable" "B_0x0,B_0x1" bitfld.long 0x0 16.--18. "CPSIZE,CRAM page size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 15. "ASYNCWAIT,Wait signal during asynchronous transfers" "B_0x0,B_0x1" newline bitfld.long 0x0 14. "EXTMOD,Extended mode enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "WAITEN,Wait enable bit" "B_0x0,B_0x1" bitfld.long 0x0 12. "WREN,Write enable bit" "B_0x0,B_0x1" bitfld.long 0x0 11. "WAITCFG,Wait timing configuration" "B_0x0,B_0x1" bitfld.long 0x0 9. "WAITPOL,Wait signal polarity bit" "B_0x0,B_0x1" bitfld.long 0x0 8. "BURSTEN,Burst enable bit" "B_0x0,B_0x1" newline bitfld.long 0x0 4.--5. "MWID,Memory data bus width" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MTYP,Memory type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1. "MUXEN,Address/data multiplexing enable bit" "B_0x0,B_0x1" bitfld.long 0x0 0. "MBKEN,Memory region enable bit" "B_0x0,B_0x1" line.long 0x4 "FMC_BTR1,SRAM/NOR flash chip-select timing registers for memory region 1" bitfld.long 0x4 30.--31. "DATAHLD,Data Hold phase duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 28.--29. "ACCMOD,Access mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 24.--27. 1. "DATLAT,Data latency for synchronous memory (see note below bit descriptions)" hexmask.long.byte 0x4 20.--23. 1. "CLKDIV,Clock divide ratio (for FMC_CLK signal)" hexmask.long.byte 0x4 16.--19. 1. "BUSTURN,Bus turnaround phase duration" hexmask.long.byte 0x4 8.--15. 1. "DATAST,Data-phase duration" newline hexmask.long.byte 0x4 4.--7. 1. "ADDHLD,Address-hold phase duration" hexmask.long.byte 0x4 0.--3. 1. "ADDSET,Address setup phase duration" line.long 0x8 "FMC_BCR2,SRAM/NOR flash chip-select control register for memory region 2" bitfld.long 0x8 22.--23. "NBLSET,Byte lane (NBL) setup" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 21. "CSCOUNT1,Chip Select (CS) counter" "B_0x0,B_0x1" bitfld.long 0x8 20. "CSCOUNT0,Chip Select (CS) counter" "B_0x0,B_0x1" bitfld.long 0x8 19. "CBURSTRW,Write burst enable" "B_0x0,B_0x1" bitfld.long 0x8 16.--18. "CPSIZE,CRAM page size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x8 15. "ASYNCWAIT,Wait signal during asynchronous transfers" "B_0x0,B_0x1" newline bitfld.long 0x8 14. "EXTMOD,Extended mode enable" "B_0x0,B_0x1" bitfld.long 0x8 13. "WAITEN,Wait enable bit" "B_0x0,B_0x1" bitfld.long 0x8 12. "WREN,Write enable bit" "B_0x0,B_0x1" bitfld.long 0x8 11. "WAITCFG,Wait timing configuration" "B_0x0,B_0x1" bitfld.long 0x8 9. "WAITPOL,Wait signal polarity bit" "B_0x0,B_0x1" bitfld.long 0x8 8. "BURSTEN,Burst enable bit" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--5. "MWID,Memory data bus width" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "MTYP,Memory type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 1. "MUXEN,Address/data multiplexing enable bit" "B_0x0,B_0x1" bitfld.long 0x8 0. "MBKEN,Memory region enable bit" "B_0x0,B_0x1" line.long 0xC "FMC_BTR2,SRAM/NOR flash chip-select timing registers for memory region 2" bitfld.long 0xC 30.--31. "DATAHLD,Data Hold phase duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 28.--29. "ACCMOD,Access mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0xC 24.--27. 1. "DATLAT,Data latency for synchronous memory (see note below bit descriptions)" hexmask.long.byte 0xC 20.--23. 1. "CLKDIV,Clock divide ratio (for FMC_CLK signal)" hexmask.long.byte 0xC 16.--19. 1. "BUSTURN,Bus turnaround phase duration" hexmask.long.byte 0xC 8.--15. 1. "DATAST,Data-phase duration" newline hexmask.long.byte 0xC 4.--7. 1. "ADDHLD,Address-hold phase duration" hexmask.long.byte 0xC 0.--3. 1. "ADDSET,Address setup phase duration" line.long 0x10 "FMC_BCR3,SRAM/NOR flash chip-select control register for memory region 3" bitfld.long 0x10 22.--23. "NBLSET,Byte lane (NBL) setup" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 21. "CSCOUNT1,Chip Select (CS) counter" "B_0x0,B_0x1" bitfld.long 0x10 20. "CSCOUNT0,Chip Select (CS) counter" "B_0x0,B_0x1" bitfld.long 0x10 19. "CBURSTRW,Write burst enable" "B_0x0,B_0x1" bitfld.long 0x10 16.--18. "CPSIZE,CRAM page size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x10 15. "ASYNCWAIT,Wait signal during asynchronous transfers" "B_0x0,B_0x1" newline bitfld.long 0x10 14. "EXTMOD,Extended mode enable" "B_0x0,B_0x1" bitfld.long 0x10 13. "WAITEN,Wait enable bit" "B_0x0,B_0x1" bitfld.long 0x10 12. "WREN,Write enable bit" "B_0x0,B_0x1" bitfld.long 0x10 11. "WAITCFG,Wait timing configuration" "B_0x0,B_0x1" bitfld.long 0x10 9. "WAITPOL,Wait signal polarity bit" "B_0x0,B_0x1" bitfld.long 0x10 8. "BURSTEN,Burst enable bit" "B_0x0,B_0x1" newline bitfld.long 0x10 4.--5. "MWID,Memory data bus width" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 2.--3. "MTYP,Memory type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 1. "MUXEN,Address/data multiplexing enable bit" "B_0x0,B_0x1" bitfld.long 0x10 0. "MBKEN,Memory region enable bit" "B_0x0,B_0x1" line.long 0x14 "FMC_BTR3,SRAM/NOR flash chip-select timing registers for memory region 3" bitfld.long 0x14 30.--31. "DATAHLD,Data Hold phase duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x14 28.--29. "ACCMOD,Access mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x14 24.--27. 1. "DATLAT,Data latency for synchronous memory (see note below bit descriptions)" hexmask.long.byte 0x14 20.--23. 1. "CLKDIV,Clock divide ratio (for FMC_CLK signal)" hexmask.long.byte 0x14 16.--19. 1. "BUSTURN,Bus turnaround phase duration" hexmask.long.byte 0x14 8.--15. 1. "DATAST,Data-phase duration" newline hexmask.long.byte 0x14 4.--7. 1. "ADDHLD,Address-hold phase duration" hexmask.long.byte 0x14 0.--3. 1. "ADDSET,Address setup phase duration" line.long 0x18 "FMC_BCR4,SRAM/NOR flash chip-select control register for memory region 4" bitfld.long 0x18 22.--23. "NBLSET,Byte lane (NBL) setup" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x18 21. "CSCOUNT1,Chip Select (CS) counter" "B_0x0,B_0x1" bitfld.long 0x18 20. "CSCOUNT0,Chip Select (CS) counter" "B_0x0,B_0x1" bitfld.long 0x18 19. "CBURSTRW,Write burst enable" "B_0x0,B_0x1" bitfld.long 0x18 16.--18. "CPSIZE,CRAM page size" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x18 15. "ASYNCWAIT,Wait signal during asynchronous transfers" "B_0x0,B_0x1" newline bitfld.long 0x18 14. "EXTMOD,Extended mode enable" "B_0x0,B_0x1" bitfld.long 0x18 13. "WAITEN,Wait enable bit" "B_0x0,B_0x1" bitfld.long 0x18 12. "WREN,Write enable bit" "B_0x0,B_0x1" bitfld.long 0x18 11. "WAITCFG,Wait timing configuration" "B_0x0,B_0x1" bitfld.long 0x18 9. "WAITPOL,Wait signal polarity bit" "B_0x0,B_0x1" bitfld.long 0x18 8. "BURSTEN,Burst enable bit" "B_0x0,B_0x1" newline bitfld.long 0x18 4.--5. "MWID,Memory data bus width" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x18 2.--3. "MTYP,Memory type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x18 1. "MUXEN,Address/data multiplexing enable bit" "B_0x0,B_0x1" bitfld.long 0x18 0. "MBKEN,Memory region enable bit" "B_0x0,B_0x1" line.long 0x1C "FMC_BTR4,SRAM/NOR flash chip-select timing registers for memory region 4" bitfld.long 0x1C 30.--31. "DATAHLD,Data Hold phase duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x1C 28.--29. "ACCMOD,Access mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x1C 24.--27. 1. "DATLAT,Data latency for synchronous memory (see note below bit descriptions)" hexmask.long.byte 0x1C 20.--23. 1. "CLKDIV,Clock divide ratio (for FMC_CLK signal)" hexmask.long.byte 0x1C 16.--19. 1. "BUSTURN,Bus turnaround phase duration" hexmask.long.byte 0x1C 8.--15. 1. "DATAST,Data-phase duration" newline hexmask.long.byte 0x1C 4.--7. 1. "ADDHLD,Address-hold phase duration" hexmask.long.byte 0x1C 0.--3. 1. "ADDSET,Address setup phase duration" line.long 0x20 "FMC_CFGR,FMC common configuration register" bitfld.long 0x20 31. "FMCEN,FMC enable" "B_0x0,B_0x1" bitfld.long 0x20 20. "CCLKEN,Continuous clock enable" "B_0x0,B_0x1" hexmask.long.byte 0x20 16.--19. 1. "CLKDIV,Clock divide ratio (for FMC_CLK signal)" group.long 0x80++0x3 line.long 0x0 "FMC_PCR,NAND flash programmable control register" bitfld.long 0x0 25. "WEN,Write enable" "B_0x0,B_0x1" bitfld.long 0x0 24. "BCHECC,BCH error correction capability" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "ECCSS,ECC sector size (used to access spare area)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" hexmask.long.byte 0x0 13.--16. 1. "TAR,ALE to RE delay." hexmask.long.byte 0x0 9.--12. 1. "TCLR,CLE to RE delay." bitfld.long 0x0 8. "ECCALG,ECC algorithm" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "ECCEN,ECC computation logic enable bit" "B_0x0,B_0x1" bitfld.long 0x0 4.--5. "PWID,Data bus width" "B_0x0,B_0x1,?,?" bitfld.long 0x0 2. "PBKEN,NAND flash memory region enable bit" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWAITEN,Wait feature enable bit" "B_0x0,B_0x1" rgroup.long 0x84++0x3 line.long 0x0 "FMC_SR,FMC status register" bitfld.long 0x0 6. "NWRF,NAND write request flag" "B_0x0,B_0x1" bitfld.long 0x0 4. "PEF,Pipe Empty Flag" "0,1" bitfld.long 0x0 0.--1. "ISOST,FMC isolation state with respect to the AXI interface" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x88++0x7 line.long 0x0 "FMC_PMEM,FMC common memory space timing register" hexmask.long.byte 0x0 24.--31. 1. "MEMHIZ,Common memory data bus Hi-Z time" hexmask.long.byte 0x0 16.--23. 1. "MEMHOLD,Common memory hold time" hexmask.long.byte 0x0 8.--15. 1. "MEMWAIT,Common memory wait time" hexmask.long.byte 0x0 0.--7. 1. "MEMSET,Common memory setup time" line.long 0x4 "FMC_PATT,FMC attribute memory space timing registers" hexmask.long.byte 0x4 24.--31. 1. "ATTHIZ,Attribute memory data bus Hi-Z time" hexmask.long.byte 0x4 16.--23. 1. "ATTHOLD,Attribute memory hold time" hexmask.long.byte 0x4 8.--15. 1. "ATTWAIT,Attribute memory wait time" hexmask.long.byte 0x4 0.--7. 1. "ATTSET,Attribute memory setup time" rgroup.long 0x90++0x7 line.long 0x0 "FMC_HPR,FMC Hamming parity result registers" hexmask.long 0x0 0.--31. 1. "HPR,Hamming parity result" line.long 0x4 "FMC_HECCR,FMC Hamming code ECC result register" hexmask.long 0x4 0.--31. 1. "HECC,ECC result" group.long 0x104++0x3 line.long 0x0 "FMC_BWTR1,SRAM/NOR-flash write timing registers for memory region 1" bitfld.long 0x0 30.--31. "DATAHLD,Data Hold phase duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "ACCMOD,Access mode." "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 16.--19. 1. "BUSTURN,Bus turnaround phase duration" hexmask.long.byte 0x0 8.--15. 1. "DATAST,Data-phase duration." hexmask.long.byte 0x0 4.--7. 1. "ADDHLD,Address-hold phase duration." hexmask.long.byte 0x0 0.--3. 1. "ADDSET,Address setup phase duration." group.long 0x10C++0x3 line.long 0x0 "FMC_BWTR2,SRAM/NOR-flash write timing registers for memory region 2" bitfld.long 0x0 30.--31. "DATAHLD,Data Hold phase duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "ACCMOD,Access mode." "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 16.--19. 1. "BUSTURN,Bus turnaround phase duration" hexmask.long.byte 0x0 8.--15. 1. "DATAST,Data-phase duration." hexmask.long.byte 0x0 4.--7. 1. "ADDHLD,Address-hold phase duration." hexmask.long.byte 0x0 0.--3. 1. "ADDSET,Address setup phase duration." group.long 0x114++0x3 line.long 0x0 "FMC_BWTR3,SRAM/NOR-flash write timing registers for memory region 3" bitfld.long 0x0 30.--31. "DATAHLD,Data Hold phase duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "ACCMOD,Access mode." "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 16.--19. 1. "BUSTURN,Bus turnaround phase duration" hexmask.long.byte 0x0 8.--15. 1. "DATAST,Data-phase duration." hexmask.long.byte 0x0 4.--7. 1. "ADDHLD,Address-hold phase duration." hexmask.long.byte 0x0 0.--3. 1. "ADDSET,Address setup phase duration." group.long 0x11C++0x3 line.long 0x0 "FMC_BWTR4,SRAM/NOR-flash write timing registers for memory region 4" bitfld.long 0x0 30.--31. "DATAHLD,Data Hold phase duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "ACCMOD,Access mode." "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 16.--19. 1. "BUSTURN,Bus turnaround phase duration" hexmask.long.byte 0x0 8.--15. 1. "DATAST,Data-phase duration." hexmask.long.byte 0x0 4.--7. 1. "ADDHLD,Address-hold phase duration." hexmask.long.byte 0x0 0.--3. 1. "ADDSET,Address setup phase duration." group.long 0x180++0x3 line.long 0x0 "FMC_IER,FMC NAND interrupt enable register" bitfld.long 0x0 2. "IFEE,Interrupt falling edge detection enable bit" "B_0x0,B_0x1" bitfld.long 0x0 1. "IHLE,Interrupt high-level detection enable bit" "B_0x0,B_0x1" bitfld.long 0x0 0. "IREE,Interrupt rising edge detection enable bit" "B_0x0,B_0x1" rgroup.long 0x184++0x3 line.long 0x0 "FMC_ISR,FMC interrupt status register" bitfld.long 0x0 2. "IFEF,Interrupt falling edge flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "IHLF,Interrupt high-level flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "IREF,Interrupt rising edge flag" "B_0x0,B_0x1" wgroup.long 0x188++0x3 line.long 0x0 "FMC_ICR,FMC NAND controller interrupt clear register" bitfld.long 0x0 2. "CIFEF,Clear Interrupt falling edge flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "CIHLF,Clear Interrupt high-level flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "CIREF,Clear Interrupt rising edge flag" "B_0x0,B_0x1" wgroup.long 0x200++0x3 line.long 0x0 "FMC_CSQCR,FMC NAND command sequencer control register" bitfld.long 0x0 0. "CSQSTART,Command Sequencer Enable" "0,1" group.long 0x204++0x13 line.long 0x0 "FMC_CSQCFGR1,FMC NAND command sequencer configuration register 1" bitfld.long 0x0 25. "CMD2T,Command 2 Sequencer timings" "B_0x0,B_0x1" bitfld.long 0x0 24. "CMD1T,Command 1 Sequencer timings" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--23. 1. "CMD2,Command 2 sequencer" hexmask.long.byte 0x0 8.--15. 1. "CMD1,Command 1 sequencer" bitfld.long 0x0 4.--6. "ACYNBR,Address Cycle number" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 2. "DMADEN,Command sequencer DMA request data enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CMD2EN,Command cycle 2 Enable" "B_0x0,B_0x1" line.long 0x4 "FMC_CSQCFGR2,FMC NAND command sequencer configuration register 2" bitfld.long 0x4 25. "RCMD2T,Command 1 sequencer timings" "B_0x0,B_0x1" bitfld.long 0x4 24. "RCMD1T,Command 1 sequencer timings" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "RCMD2,Random Command 2 sequencer" hexmask.long.byte 0x4 8.--15. 1. "RCMD1,Random Command 1 sequencer" bitfld.long 0x4 2. "DMASEN,Command sequencer DMA request decoding status enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "RCMD2EN,Random Command 2 sequencer enable" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "SQSDTEN,Sequencer spare data transfer enable" "B_0x0,B_0x1" line.long 0x8 "FMC_CSQCFGR3,FMC NAND sequencer configuration register 3" bitfld.long 0x8 23. "RAC2T,Random Address cycle 2 sequencer timings" "B_0x0,B_0x1" bitfld.long 0x8 22. "RAC1T,Random Address cycle 1 sequencer timings" "B_0x0,B_0x1" bitfld.long 0x8 21. "SDT,Spare data transfer sequencer timings" "B_0x0,B_0x1" bitfld.long 0x8 20. "AC5T,Address cycle 5 sequencer timings" "B_0x0,B_0x1" bitfld.long 0x8 19. "AC4T,Address cycle 4sequencer timings" "B_0x0,B_0x1" bitfld.long 0x8 18. "AC3T,Address cycle 3 sequencer timings" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "AC2T,Address cycle 2 sequencer timings" "B_0x0,B_0x1" bitfld.long 0x8 16. "AC1T,Address cycle 1 sequencer timings" "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--13. 1. "SNBR,Number of sectors to be read/written" line.long 0xC "FMC_CSQAR1,FMC NAND command sequencer address register 1" hexmask.long.byte 0xC 24.--31. 1. "ADDC4,Address Cycle 4" hexmask.long.byte 0xC 16.--23. 1. "ADDC3,Address Cycle 3" hexmask.long.byte 0xC 8.--15. 1. "ADDC2,Address Cycle 2" hexmask.long.byte 0xC 0.--7. 1. "ADDC1,Address Cycle 1" line.long 0x10 "FMC_CSQAR2,FMC NAND command sequencer address register 2" hexmask.long.word 0x10 16.--31. 1. "SAO,Spare Area Address Offset" bitfld.long 0x10 11. "NANDCEN1,NAND flash chip enable number" "B_0x0,B_0x1" bitfld.long 0x10 10. "NANDCEN0,NAND flash chip enable number" "B_0x0,B_0x1" hexmask.long.byte 0x10 0.--7. 1. "ADDC5,Address Cycle 5" group.long 0x220++0x7 line.long 0x0 "FMC_CSQIER,FMC NAND command sequencer interrupt enable register" bitfld.long 0x0 4. "CMDTCIE,Command Transfer Complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "SUEIE,Sector Uncorrectable Error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEIE,Sector Error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "SCIE,Sector Complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "TCIE,Transfer Complete Interrupt enable" "B_0x0,B_0x1" line.long 0x4 "FMC_CSQISR,FMC NAND command sequencer interrupt status register" bitfld.long 0x4 4. "CMDTCF,Command Transfer Complete flag" "0,1" bitfld.long 0x4 3. "SUEF,Sector Uncorrectable Error flag" "0,1" bitfld.long 0x4 2. "SEF,Sector Error flag" "0,1" bitfld.long 0x4 1. "SCF,Sector Complete flag" "0,1" bitfld.long 0x4 0. "TCF,Transfer Complete flag" "0,1" wgroup.long 0x228++0x3 line.long 0x0 "FMC_CSQICR,FMC NAND command sequencer interrupt clear register" bitfld.long 0x0 4. "CCMDTCF,Clear Command Transfer Complete flag" "0,1" bitfld.long 0x0 3. "CSUEF,Clear Sector uncorrectable Error flag" "0,1" bitfld.long 0x0 2. "CSEF,Clear Sector Error flag" "0,1" bitfld.long 0x0 1. "CSCF,Clear Sector Complete flag" "0,1" bitfld.long 0x0 0. "CTCF,Clear Transfer Complete flag" "0,1" rgroup.long 0x230++0x3 line.long 0x0 "FMC_CSQEMSR,FMC command sequencer error mapping status register" hexmask.long.word 0x0 0.--15. 1. "SEM,Sector Error mapping" group.long 0x250++0x3 line.long 0x0 "FMC_BCHIER,FMC BCH interrupt enable register" bitfld.long 0x0 4. "EPBRIE,Decoder Parity Bits Ready Interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "DSRIE,Decoder Syndrome Ready Interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "DEFIE,Decoder Error Found Interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "DERIE,Decoder Error Ready Interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "DUEIE,Decoder Uncorrectable Errors Interrupt enable" "B_0x0,B_0x1" rgroup.long 0x254++0x3 line.long 0x0 "FMC_BCHISR,FMC BCH interrupt and status register" bitfld.long 0x0 4. "EPBRF,Encoder Parity Bits Ready flag" "0,1" bitfld.long 0x0 3. "DSRF,Decoder Syndrome Ready flag" "0,1" bitfld.long 0x0 2. "DEFF,Decoder Error Found flag" "0,1" bitfld.long 0x0 1. "DERF,Decoder Error Ready flag" "0,1" bitfld.long 0x0 0. "DUEF,Decoder Uncorrectable Errors flag" "0,1" wgroup.long 0x258++0x3 line.long 0x0 "FMC_BCHICR,FMC BCH interrupt clear register" bitfld.long 0x0 4. "CEPBRF,Clear Encoder Parity Bits Ready flag" "0,1" bitfld.long 0x0 3. "CDSRF,Clear Decoder Syndrome Ready flag" "0,1" bitfld.long 0x0 2. "CDEFF,Clear Decoder Error Found flag" "0,1" bitfld.long 0x0 1. "CDERF,Clear Decoder Error ready flag" "0,1" bitfld.long 0x0 0. "CDUEF,Clear Decoder Uncorrectable Error flag" "0,1" rgroup.long 0x260++0xF line.long 0x0 "FMC_BCHPBR1,FMC BCH parity bits register 1" hexmask.long 0x0 0.--31. 1. "BCHPB,BCH parity bits" line.long 0x4 "FMC_BCHPBR2,FMC BCH parity bits register 2" hexmask.long 0x4 0.--31. 1. "BCHPB,BCH parity bits" line.long 0x8 "FMC_BCHPBR3,FMC BCH parity bits register 3" hexmask.long 0x8 0.--31. 1. "BCHPB,BCH parity bits" line.long 0xC "FMC_BCHPBR4,FMC BCH parity bits register 4" hexmask.long.byte 0xC 0.--7. 1. "BCHPB,BCH parity bits" rgroup.long 0x27C++0x13 line.long 0x0 "FMC_BCHDSR0,FMC BCH decoder status register 0" hexmask.long.byte 0x0 4.--7. 1. "DEN,Decoder error number" bitfld.long 0x0 1. "DEF,Decoder error found" "0,1" bitfld.long 0x0 0. "DUE,Decoder uncorrectable error" "0,1" line.long 0x4 "FMC_BCHDSR1,FMC BCH decoder status register for memory region 1" hexmask.long.word 0x4 16.--28. 1. "EBP2,Error bit position for error number 2" hexmask.long.word 0x4 0.--12. 1. "EBP1,Error bit position for error number 1" line.long 0x8 "FMC_BCHDSR2,FMC BCH decoder status register for memory region 2" hexmask.long.word 0x8 16.--28. 1. "EBP4,Error bit position for error number 4" hexmask.long.word 0x8 0.--12. 1. "EBP3,Error bit position for error number 3" line.long 0xC "FMC_BCHDSR3,FMC BCH decoder status register for memory region 3" hexmask.long.word 0xC 16.--28. 1. "EBP6,Error bit position for error number 6" hexmask.long.word 0xC 0.--12. 1. "EBP5,Error bit position for error number 5" line.long 0x10 "FMC_BCHDSR4,FMC BCH decoder status register for memory region 4" hexmask.long.word 0x10 16.--28. 1. "EBP8,Error bit position for error number 8" hexmask.long.word 0x10 0.--12. 1. "EBP7,Error bit position for error number 7" group.long 0x300++0x3B line.long 0x0 "FMC_SECCFGR,FMC security configuration register" bitfld.long 0x0 5. "SEC5,Security configuration for NAND controller" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Security state for NOR/PSRAM controller for Chip Select NE4" "B_0x0,B_0x1" bitfld.long 0x0 3. "SEC3,Security state for NOR/PSRAM controller for Chip Select NE3" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Security state for NOR/PSRAM controller for Chip Select NE2" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Security state for NOR/PSRAM controller for Chip Select NE1" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,Security state for FMC_CFGR common control register" "B_0x0,B_0x1" line.long 0x4 "FMC_PRIVCFGR,FMC security configuration register" bitfld.long 0x4 5. "PRIV5,Privileged state for NAND controller" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged state for NOR/PSRAM controller for Chip Select NE4" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged state for NOR/PSRAM controller for Chip Select NE3" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged state for NOR/PSRAM controller for Chip Select NE2" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged state for NOR/PSRAM controller for Chip Select NE1" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,Privileged state for common control: FMC_CFGR" "B_0x0,B_0x1" line.long 0x8 "FMC_RCFGLOCKR,FMC CID configuration lock register" bitfld.long 0x8 5. "LOCK5,Lock NAND controller until a global FMC reset" "B_0x0,B_0x1" bitfld.long 0x8 4. "LOCK4,Lock NOR/PSRAM controller for Chip Select NE4 until a global FMC reset" "B_0x0,B_0x1" bitfld.long 0x8 3. "LOCK3,Lock NOR/PSRAM controller for Chip Select NE3 until a global FMC reset" "B_0x0,B_0x1" bitfld.long 0x8 2. "LOCK2,Lock NOR/PSRAM controller for Chip Select NE2 until a global FMC reset" "B_0x0,B_0x1" bitfld.long 0x8 1. "LOCK1,Lock NOR/PSRAM controller for Chip Select NE1 until a global FMC reset" "B_0x0,B_0x1" bitfld.long 0x8 0. "LOCK0,Lock FMC_CFGR until a global FMC reset" "B_0x0,B_0x1" line.long 0xC "FMC_CIDCFGR0,FMC resource 0 CID register" bitfld.long 0xC 23. "SEMWLC7,White-listed CID in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0xC 22. "SEMWLC6,White-listed CID0 in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0xC 21. "SEMWLC5,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0xC 20. "SEMWLC4,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0xC 19. "SEMWLC3,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0xC 18. "SEMWLC2,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "SEMWLC1,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0xC 16. "SEMWLC0,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0xC 4.--6. "SCID,Static CID for resource x" "0,1,2,3,4,5,6,7" bitfld.long 0xC 1. "SEMEN,Semaphore enable for resource x" "B_0x0,B_0x1" bitfld.long 0xC 0. "CFEN,CID filtering enable for resource x" "B_0x0,B_0x1" line.long 0x10 "FMC_SEMCR0,FMC resource 0 semaphore control register" rbitfld.long 0x10 4.--6. "SEMCID,Current CID allocated to resource x in semaphore mode" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0. "SEM_MUTEX,Mutex for the CID allocation of resource x in semaphore mode" "0,1" line.long 0x14 "FMC_CIDCFGR1,FMC resource 1 CID register" bitfld.long 0x14 23. "SEMWLC7,White-listed CID in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x14 22. "SEMWLC6,White-listed CID0 in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x14 21. "SEMWLC5,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x14 20. "SEMWLC4,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x14 19. "SEMWLC3,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x14 18. "SEMWLC2,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "SEMWLC1,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x14 16. "SEMWLC0,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x14 4.--6. "SCID,Static CID for resource x" "0,1,2,3,4,5,6,7" bitfld.long 0x14 1. "SEMEN,Semaphore enable for resource x" "B_0x0,B_0x1" bitfld.long 0x14 0. "CFEN,CID filtering enable for resource x" "B_0x0,B_0x1" line.long 0x18 "FMC_SEMCR1,FMC resource 1 semaphore control register" rbitfld.long 0x18 4.--6. "SEMCID,Current CID allocated to resource x in semaphore mode" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0. "SEM_MUTEX,Mutex for the CID allocation of resource x in semaphore mode" "0,1" line.long 0x1C "FMC_CIDCFGR2,FMC resource 2 CID register" bitfld.long 0x1C 23. "SEMWLC7,White-listed CID in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x1C 22. "SEMWLC6,White-listed CID0 in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x1C 21. "SEMWLC5,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x1C 20. "SEMWLC4,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x1C 19. "SEMWLC3,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x1C 18. "SEMWLC2,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" newline bitfld.long 0x1C 17. "SEMWLC1,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x1C 16. "SEMWLC0,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x1C 4.--6. "SCID,Static CID for resource x" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 1. "SEMEN,Semaphore enable for resource x" "B_0x0,B_0x1" bitfld.long 0x1C 0. "CFEN,CID filtering enable for resource x" "B_0x0,B_0x1" line.long 0x20 "FMC_SEMCR2,FMC resource 2 semaphore control register" rbitfld.long 0x20 4.--6. "SEMCID,Current CID allocated to resource x in semaphore mode" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0. "SEM_MUTEX,Mutex for the CID allocation of resource x in semaphore mode" "0,1" line.long 0x24 "FMC_CIDCFGR3,FMC resource 3 CID register" bitfld.long 0x24 23. "SEMWLC7,White-listed CID in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x24 22. "SEMWLC6,White-listed CID0 in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x24 21. "SEMWLC5,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x24 20. "SEMWLC4,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x24 19. "SEMWLC3,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x24 18. "SEMWLC2,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" newline bitfld.long 0x24 17. "SEMWLC1,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x24 16. "SEMWLC0,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x24 4.--6. "SCID,Static CID for resource x" "0,1,2,3,4,5,6,7" bitfld.long 0x24 1. "SEMEN,Semaphore enable for resource x" "B_0x0,B_0x1" bitfld.long 0x24 0. "CFEN,CID filtering enable for resource x" "B_0x0,B_0x1" line.long 0x28 "FMC_SEMCR3,FMC resource 3 semaphore control register" rbitfld.long 0x28 4.--6. "SEMCID,Current CID allocated to resource x in semaphore mode" "0,1,2,3,4,5,6,7" bitfld.long 0x28 0. "SEM_MUTEX,Mutex for the CID allocation of resource x in semaphore mode" "0,1" line.long 0x2C "FMC_CIDCFGR4,FMC resource 4 CID register" bitfld.long 0x2C 23. "SEMWLC7,White-listed CID in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x2C 22. "SEMWLC6,White-listed CID0 in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x2C 21. "SEMWLC5,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x2C 20. "SEMWLC4,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x2C 19. "SEMWLC3,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x2C 18. "SEMWLC2,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" newline bitfld.long 0x2C 17. "SEMWLC1,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x2C 16. "SEMWLC0,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x2C 4.--6. "SCID,Static CID for resource x" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 1. "SEMEN,Semaphore enable for resource x" "B_0x0,B_0x1" bitfld.long 0x2C 0. "CFEN,CID filtering enable for resource x" "B_0x0,B_0x1" line.long 0x30 "FMC_SEMCR4,FMC resource 4 semaphore control register" rbitfld.long 0x30 4.--6. "SEMCID,Current CID allocated to resource x in semaphore mode" "0,1,2,3,4,5,6,7" bitfld.long 0x30 0. "SEM_MUTEX,Mutex for the CID allocation of resource x in semaphore mode" "0,1" line.long 0x34 "FMC_CIDCFGR5,FMC resource 5 CID register" bitfld.long 0x34 23. "SEMWLC7,White-listed CID in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x34 22. "SEMWLC6,White-listed CID0 in the CID allocation pool for resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x34 21. "SEMWLC5,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x34 20. "SEMWLC4,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x34 19. "SEMWLC3,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x34 18. "SEMWLC2,White-listed CID in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" newline bitfld.long 0x34 17. "SEMWLC1,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x34 16. "SEMWLC0,White-listed CID0 in the CID allocation pool of resource x in semaphore mode" "B_0x0,B_0x1" bitfld.long 0x34 4.--6. "SCID,Static CID for resource x" "0,1,2,3,4,5,6,7" bitfld.long 0x34 1. "SEMEN,Semaphore enable for resource x" "B_0x0,B_0x1" bitfld.long 0x34 0. "CFEN,CID filtering enable for resource x" "B_0x0,B_0x1" line.long 0x38 "FMC_SEMCR5,FMC resource 5 semaphore control register" rbitfld.long 0x38 4.--6. "SEMCID,Current CID allocated to resource x in semaphore mode" "0,1,2,3,4,5,6,7" bitfld.long 0x38 0. "SEM_MUTEX,Mutex for the CID allocation of resource x in semaphore mode" "0,1" rgroup.long 0x3E8++0x17 line.long 0x0 "FMC_HWCFGR3,FMC hardware configuration register 3" hexmask.long.byte 0x0 4.--7. 1. "CID_WIDTH,CID bus width" hexmask.long.byte 0x0 0.--3. 1. "MAX_CID,Maximum compartment ID (or CID)" line.long 0x4 "FMC_HWCFGR2,FMC hardware configuration register 2" bitfld.long 0x4 28. "SECURE,Support for Armsup/sup TrustZonesup/sup" "B_0x0,B_0x1" bitfld.long 0x4 24. "PRIVILEGE,Support for Privileged mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 20.--23. 1. "SDRAM2_BASE,SDRAM bank 2 base address" hexmask.long.byte 0x4 16.--19. 1. "SDRAM1_BASE,SDRAM bank 1 base address" hexmask.long.byte 0x4 12.--15. 1. "NAND_BASE,NAND base address" hexmask.long.byte 0x4 8.--11. 1. "SDRAM_RBASE,SDRAM remap base address" newline hexmask.long.byte 0x4 4.--7. 1. "NOR_BASE,NOR base address" hexmask.long.byte 0x4 0.--3. 1. "RD_LN2DPTH,AXI read data FIFO depth" line.long 0x8 "FMC_HWCFGR1,FMC hardware configuration register 1" hexmask.long.byte 0x8 28.--31. 1. "RA_LN2DPTH,AXI read address FIFO depth" hexmask.long.byte 0x8 24.--27. 1. "WR_LN2DPTH,AXI write response FIFO depth" hexmask.long.byte 0x8 20.--23. 1. "WD_LN2DPTH,AXI write data FIFO depth" hexmask.long.byte 0x8 16.--19. 1. "WA_LN2DPTH,AXI write address FIFO depth" hexmask.long.byte 0x8 12.--15. 1. "ID_SIZE,AXI ID width" bitfld.long 0x8 8. "SDRAM_SEL,SDRAM controller selection" "B_0x0,B_0x1" newline bitfld.long 0x8 4. "NAND_ECC,NAND ECC" "B_0x0,B_0x1" bitfld.long 0x8 0. "NAND_SEL,NAND Controller Selection" "B_0x0,B_0x1" line.long 0xC "FMC_VERR,FMC version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,Minor revision" line.long 0x10 "FMC_IPIDR,FMC identification register" hexmask.long 0x10 0.--31. 1. "ID,FMC Identifier" line.long 0x14 "FMC_SIDR,FMC size identification register" hexmask.long 0x14 0.--31. 1. "SID,Size Identification" tree.end tree.end tree "GICV2M (PCIE Message Signaling Interrupt Support)" base ad:0x0 tree "GICV2M" base ad:0x48090000 rgroup.long 0x8++0x3 line.long 0x0 "GICV2M_TYPER,GICV2M TYPER register" hexmask.long.word 0x0 16.--25. 1. "BASE_SPI_NUMBER,Returns the lowest SPI ID assigned to the frame" hexmask.long.word 0x0 0.--9. 1. "NUMBER_OF_SPIS,Returns the number-1 of contiguous SPIs assigned to the frame." group.long 0x40++0x3 line.long 0x0 "GICV2M_SETSPI,GICV2M SETSPI register" hexmask.long.word 0x0 0.--9. 1. "SPI1_NUM,On a write an edge-triggered interrupt is generated to the GIC generic interrupt controller for an SPI with the ID identified by the value of this field. If the resulting value does not identify an SPI that is allocated to this frame then the.." group.long 0x100++0x3 line.long 0x0 "GICV2M_MISC_CTRL,GICV2M MISC CTRL register" bitfld.long 0x0 1. "SPI1_MERGED" "B_0x0,B_0x1" rgroup.long 0xFCC++0x3 line.long 0x0 "GICV2M_IIDR,GICV2M IIDR register" hexmask.long.word 0x0 20.--31. 1. "PRODUCT_ID,Product identifier" hexmask.long.byte 0x0 16.--19. 1. "ARCH_VERSION,GICV2M architecture version" hexmask.long.byte 0x0 12.--15. 1. "REVISION,Revision number for the component" hexmask.long.word 0x0 0.--11. 1. "IMPLEMENTER,JEP106 code of the company that implements the GICV2M" tree.end tree "GICV2M_S" base ad:0x58090000 rgroup.long 0x8++0x3 line.long 0x0 "GICV2M_TYPER,GICV2M TYPER register" hexmask.long.word 0x0 16.--25. 1. "BASE_SPI_NUMBER,Returns the lowest SPI ID assigned to the frame" hexmask.long.word 0x0 0.--9. 1. "NUMBER_OF_SPIS,Returns the number-1 of contiguous SPIs assigned to the frame." group.long 0x40++0x3 line.long 0x0 "GICV2M_SETSPI,GICV2M SETSPI register" hexmask.long.word 0x0 0.--9. 1. "SPI1_NUM,On a write an edge-triggered interrupt is generated to the GIC generic interrupt controller for an SPI with the ID identified by the value of this field. If the resulting value does not identify an SPI that is allocated to this frame then the.." group.long 0x100++0x3 line.long 0x0 "GICV2M_MISC_CTRL,GICV2M MISC CTRL register" bitfld.long 0x0 1. "SPI1_MERGED" "B_0x0,B_0x1" rgroup.long 0xFCC++0x3 line.long 0x0 "GICV2M_IIDR,GICV2M IIDR register" hexmask.long.word 0x0 20.--31. 1. "PRODUCT_ID,Product identifier" hexmask.long.byte 0x0 16.--19. 1. "ARCH_VERSION,GICV2M architecture version" hexmask.long.byte 0x0 12.--15. 1. "REVISION,Revision number for the component" hexmask.long.word 0x0 0.--11. 1. "IMPLEMENTER,JEP106 code of the company that implements the GICV2M" tree.end tree.end endif tree "GPIO (General-Purpose I/Os)" base ad:0x0 sif (cpuis("*CA35")||cpuis("*CM33F")) tree "GPIOA" base ad:0x0 tree "GPIOA" base ad:0x44240000 group.long 0x0++0xF line.long 0x0 "GPIOA_MODER,GPIO port A mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOA_OTYPER,GPIO port A output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOA_OSPEEDR,GPIO port A output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOA_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOA_IDR,GPIO port A input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOA_ODR,GPIO port A output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOA_BSRR,GPIO port A bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOA_LCKR,GPIO port A configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOA_AFRL,GPIO port A alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOA_AFRH,GPIO port A alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOA_BRR,GPIO port A bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOA_SECCFGR,GPIO port A secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOA_PRIVCFGR,GPIO port A privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOA_RCFGLOCKR,GPIO port A resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOA_DELAYRL,GPIO port A delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOA_DELAYRH,GPIO port A delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOA_ADVCFGRL,GPIO port A advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOA_ADVCFGRH,GPIO port A advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOA_CIDCFGR0,GPIO port A CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOA_SEMCR0,GPIO port A semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOA_CIDCFGR1,GPIO port A CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOA_SEMCR1,GPIO port A semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOA_CIDCFGR2,GPIO port A CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOA_SEMCR2,GPIO port A semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOA_CIDCFGR3,GPIO port A CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOA_SEMCR3,GPIO port A semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOA_CIDCFGR4,GPIO port A CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOA_SEMCR4,GPIO port A semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOA_CIDCFGR5,GPIO port A CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOA_SEMCR5,GPIO port A semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOA_CIDCFGR6,GPIO port A CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOA_SEMCR6,GPIO port A semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOA_CIDCFGR7,GPIO port A CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOA_SEMCR7,GPIO port A semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOA_CIDCFGR8,GPIO port A CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOA_SEMCR8,GPIO port A semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOA_CIDCFGR9,GPIO port A CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOA_SEMCR9,GPIO port A semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOA_CIDCFGR10,GPIO port A CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOA_SEMCR10,GPIO port A semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOA_CIDCFGR11,GPIO port A CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOA_SEMCR11,GPIO port A semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOA_CIDCFGR12,GPIO port A CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOA_SEMCR12,GPIO port A semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOA_CIDCFGR13,GPIO port A CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOA_SEMCR13,GPIO port A semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOA_CIDCFGR14,GPIO port A CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOA_SEMCR14,GPIO port A semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOA_CIDCFGR15,GPIO port A CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOA_SEMCR15,GPIO port A semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOA_HWCFGR11,GPIO port A hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOA_HWCFGR10,GPIO port A hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOA_HWCFGR9,GPIO port A hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOA_HWCFGR8,GPIO port A hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOA_HWCFGR7,GPIO port A hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOA_HWCFGR6,GPIO port A hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOA_HWCFGR5,GPIO port A hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOA_HWCFGR4,GPIO port A hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOA_HWCFGR3,GPIO port A hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOA_HWCFGR2,GPIO port A hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOA_HWCFGR1,GPIO port A hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOA_VERR,GPIO port A version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOA_IPIDR,GPIO port A identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOA_SIDR,GPIO port A size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree "GPIOA_S" base ad:0x54240000 group.long 0x0++0xF line.long 0x0 "GPIOA_MODER,GPIO port A mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOA_OTYPER,GPIO port A output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOA_OSPEEDR,GPIO port A output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOA_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOA_IDR,GPIO port A input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOA_ODR,GPIO port A output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOA_BSRR,GPIO port A bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOA_LCKR,GPIO port A configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOA_AFRL,GPIO port A alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOA_AFRH,GPIO port A alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOA_BRR,GPIO port A bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOA_SECCFGR,GPIO port A secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOA_PRIVCFGR,GPIO port A privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOA_RCFGLOCKR,GPIO port A resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOA_DELAYRL,GPIO port A delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOA_DELAYRH,GPIO port A delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOA_ADVCFGRL,GPIO port A advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOA_ADVCFGRH,GPIO port A advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOA_CIDCFGR0,GPIO port A CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOA_SEMCR0,GPIO port A semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOA_CIDCFGR1,GPIO port A CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOA_SEMCR1,GPIO port A semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOA_CIDCFGR2,GPIO port A CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOA_SEMCR2,GPIO port A semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOA_CIDCFGR3,GPIO port A CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOA_SEMCR3,GPIO port A semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOA_CIDCFGR4,GPIO port A CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOA_SEMCR4,GPIO port A semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOA_CIDCFGR5,GPIO port A CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOA_SEMCR5,GPIO port A semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOA_CIDCFGR6,GPIO port A CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOA_SEMCR6,GPIO port A semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOA_CIDCFGR7,GPIO port A CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOA_SEMCR7,GPIO port A semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOA_CIDCFGR8,GPIO port A CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOA_SEMCR8,GPIO port A semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOA_CIDCFGR9,GPIO port A CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOA_SEMCR9,GPIO port A semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOA_CIDCFGR10,GPIO port A CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOA_SEMCR10,GPIO port A semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOA_CIDCFGR11,GPIO port A CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOA_SEMCR11,GPIO port A semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOA_CIDCFGR12,GPIO port A CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOA_SEMCR12,GPIO port A semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOA_CIDCFGR13,GPIO port A CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOA_SEMCR13,GPIO port A semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOA_CIDCFGR14,GPIO port A CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOA_SEMCR14,GPIO port A semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOA_CIDCFGR15,GPIO port A CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOA_SEMCR15,GPIO port A semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOA_HWCFGR11,GPIO port A hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOA_HWCFGR10,GPIO port A hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOA_HWCFGR9,GPIO port A hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOA_HWCFGR8,GPIO port A hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOA_HWCFGR7,GPIO port A hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOA_HWCFGR6,GPIO port A hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOA_HWCFGR5,GPIO port A hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOA_HWCFGR4,GPIO port A hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOA_HWCFGR3,GPIO port A hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOA_HWCFGR2,GPIO port A hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOA_HWCFGR1,GPIO port A hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOA_VERR,GPIO port A version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOA_IPIDR,GPIO port A identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOA_SIDR,GPIO port A size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "GPIOB" base ad:0x0 tree "GPIOB" base ad:0x44250000 group.long 0x0++0xF line.long 0x0 "GPIOB_MODER,GPIO port B mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOB_OTYPER,GPIO port B output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOB_OSPEEDR,GPIO port B output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOB_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOB_IDR,GPIO port B input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOB_ODR,GPIO port B output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOB_BSRR,GPIO port B bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOB_LCKR,GPIO port B configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOB_AFRL,GPIO port B alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOB_AFRH,GPIO port B alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOB_BRR,GPIO port B bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOB_SECCFGR,GPIO port B secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOB_PRIVCFGR,GPIO port B privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOB_RCFGLOCKR,GPIO port B resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOB_DELAYRL,GPIO port B delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOB_DELAYRH,GPIO port B delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOB_ADVCFGRL,GPIO port B advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOB_ADVCFGRH,GPIO port B advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOB_CIDCFGR0,GPIO port B CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOB_SEMCR0,GPIO port B semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOB_CIDCFGR1,GPIO port B CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOB_SEMCR1,GPIO port B semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOB_CIDCFGR2,GPIO port B CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOB_SEMCR2,GPIO port B semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOB_CIDCFGR3,GPIO port B CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOB_SEMCR3,GPIO port B semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOB_CIDCFGR4,GPIO port B CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOB_SEMCR4,GPIO port B semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOB_CIDCFGR5,GPIO port B CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOB_SEMCR5,GPIO port B semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOB_CIDCFGR6,GPIO port B CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOB_SEMCR6,GPIO port B semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOB_CIDCFGR7,GPIO port B CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOB_SEMCR7,GPIO port B semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOB_CIDCFGR8,GPIO port B CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOB_SEMCR8,GPIO port B semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOB_CIDCFGR9,GPIO port B CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOB_SEMCR9,GPIO port B semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOB_CIDCFGR10,GPIO port B CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOB_SEMCR10,GPIO port B semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOB_CIDCFGR11,GPIO port B CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOB_SEMCR11,GPIO port B semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOB_CIDCFGR12,GPIO port B CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOB_SEMCR12,GPIO port B semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOB_CIDCFGR13,GPIO port B CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOB_SEMCR13,GPIO port B semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOB_CIDCFGR14,GPIO port B CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOB_SEMCR14,GPIO port B semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOB_CIDCFGR15,GPIO port B CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOB_SEMCR15,GPIO port B semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOB_HWCFGR11,GPIO port B hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOB_HWCFGR10,GPIO port B hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOB_HWCFGR9,GPIO port B hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOB_HWCFGR8,GPIO port B hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOB_HWCFGR7,GPIO port B hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOB_HWCFGR6,GPIO port B hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOB_HWCFGR5,GPIO port B hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOB_HWCFGR4,GPIO port B hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOB_HWCFGR3,GPIO port B hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOB_HWCFGR2,GPIO port B hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOB_HWCFGR1,GPIO port B hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOB_VERR,GPIO port B version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOB_IPIDR,GPIO port B identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOB_SIDR,GPIO port B size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree "GPIOB_S" base ad:0x54250000 group.long 0x0++0xF line.long 0x0 "GPIOB_MODER,GPIO port B mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOB_OTYPER,GPIO port B output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOB_OSPEEDR,GPIO port B output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOB_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOB_IDR,GPIO port B input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOB_ODR,GPIO port B output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOB_BSRR,GPIO port B bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOB_LCKR,GPIO port B configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOB_AFRL,GPIO port B alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOB_AFRH,GPIO port B alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOB_BRR,GPIO port B bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOB_SECCFGR,GPIO port B secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOB_PRIVCFGR,GPIO port B privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOB_RCFGLOCKR,GPIO port B resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOB_DELAYRL,GPIO port B delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOB_DELAYRH,GPIO port B delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOB_ADVCFGRL,GPIO port B advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOB_ADVCFGRH,GPIO port B advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOB_CIDCFGR0,GPIO port B CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOB_SEMCR0,GPIO port B semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOB_CIDCFGR1,GPIO port B CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOB_SEMCR1,GPIO port B semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOB_CIDCFGR2,GPIO port B CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOB_SEMCR2,GPIO port B semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOB_CIDCFGR3,GPIO port B CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOB_SEMCR3,GPIO port B semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOB_CIDCFGR4,GPIO port B CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOB_SEMCR4,GPIO port B semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOB_CIDCFGR5,GPIO port B CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOB_SEMCR5,GPIO port B semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOB_CIDCFGR6,GPIO port B CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOB_SEMCR6,GPIO port B semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOB_CIDCFGR7,GPIO port B CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOB_SEMCR7,GPIO port B semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOB_CIDCFGR8,GPIO port B CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOB_SEMCR8,GPIO port B semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOB_CIDCFGR9,GPIO port B CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOB_SEMCR9,GPIO port B semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOB_CIDCFGR10,GPIO port B CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOB_SEMCR10,GPIO port B semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOB_CIDCFGR11,GPIO port B CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOB_SEMCR11,GPIO port B semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOB_CIDCFGR12,GPIO port B CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOB_SEMCR12,GPIO port B semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOB_CIDCFGR13,GPIO port B CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOB_SEMCR13,GPIO port B semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOB_CIDCFGR14,GPIO port B CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOB_SEMCR14,GPIO port B semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOB_CIDCFGR15,GPIO port B CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOB_SEMCR15,GPIO port B semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOB_HWCFGR11,GPIO port B hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOB_HWCFGR10,GPIO port B hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOB_HWCFGR9,GPIO port B hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOB_HWCFGR8,GPIO port B hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOB_HWCFGR7,GPIO port B hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOB_HWCFGR6,GPIO port B hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOB_HWCFGR5,GPIO port B hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOB_HWCFGR4,GPIO port B hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOB_HWCFGR3,GPIO port B hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOB_HWCFGR2,GPIO port B hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOB_HWCFGR1,GPIO port B hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOB_VERR,GPIO port B version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOB_IPIDR,GPIO port B identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOB_SIDR,GPIO port B size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "GPIOC" base ad:0x0 tree "GPIOC" base ad:0x44260000 group.long 0x0++0xF line.long 0x0 "GPIOC_MODER,GPIO port C mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOC_OTYPER,GPIO port C output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOC_OSPEEDR,GPIO port C output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOC_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOC_IDR,GPIO port C input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOC_ODR,GPIO port C output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOC_BSRR,GPIO port C bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOC_LCKR,GPIO port C configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOC_AFRL,GPIO port C alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOC_AFRH,GPIO port C alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOC_BRR,GPIO port C bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOC_SECCFGR,GPIO port C secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOC_PRIVCFGR,GPIO port C privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOC_RCFGLOCKR,GPIO port C resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOC_DELAYRL,GPIO port C delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOC_DELAYRH,GPIO port C delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOC_ADVCFGRL,GPIO port C advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOC_ADVCFGRH,GPIO port C advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOC_CIDCFGR0,GPIO port C CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOC_SEMCR0,GPIO port C semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOC_CIDCFGR1,GPIO port C CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOC_SEMCR1,GPIO port C semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOC_CIDCFGR2,GPIO port C CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOC_SEMCR2,GPIO port C semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOC_CIDCFGR3,GPIO port C CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOC_SEMCR3,GPIO port C semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOC_CIDCFGR4,GPIO port C CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOC_SEMCR4,GPIO port C semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOC_CIDCFGR5,GPIO port C CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOC_SEMCR5,GPIO port C semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOC_CIDCFGR6,GPIO port C CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOC_SEMCR6,GPIO port C semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOC_CIDCFGR7,GPIO port C CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOC_SEMCR7,GPIO port C semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOC_CIDCFGR8,GPIO port C CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOC_SEMCR8,GPIO port C semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOC_CIDCFGR9,GPIO port C CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOC_SEMCR9,GPIO port C semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOC_CIDCFGR10,GPIO port C CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOC_SEMCR10,GPIO port C semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOC_CIDCFGR11,GPIO port C CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOC_SEMCR11,GPIO port C semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOC_CIDCFGR12,GPIO port C CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOC_SEMCR12,GPIO port C semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOC_CIDCFGR13,GPIO port C CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOC_SEMCR13,GPIO port C semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOC_CIDCFGR14,GPIO port C CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOC_SEMCR14,GPIO port C semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOC_CIDCFGR15,GPIO port C CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOC_SEMCR15,GPIO port C semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOC_HWCFGR11,GPIO port C hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOC_HWCFGR10,GPIO port C hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOC_HWCFGR9,GPIO port C hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOC_HWCFGR8,GPIO port C hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOC_HWCFGR7,GPIO port C hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOC_HWCFGR6,GPIO port C hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOC_HWCFGR5,GPIO port C hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOC_HWCFGR4,GPIO port C hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOC_HWCFGR3,GPIO port C hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOC_HWCFGR2,GPIO port C hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOC_HWCFGR1,GPIO port C hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOC_VERR,GPIO port C version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOC_IPIDR,GPIO port C identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOC_SIDR,GPIO port C size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree "GPIOC_S" base ad:0x54260000 group.long 0x0++0xF line.long 0x0 "GPIOC_MODER,GPIO port C mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOC_OTYPER,GPIO port C output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOC_OSPEEDR,GPIO port C output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOC_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOC_IDR,GPIO port C input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOC_ODR,GPIO port C output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOC_BSRR,GPIO port C bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOC_LCKR,GPIO port C configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOC_AFRL,GPIO port C alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOC_AFRH,GPIO port C alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOC_BRR,GPIO port C bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOC_SECCFGR,GPIO port C secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOC_PRIVCFGR,GPIO port C privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOC_RCFGLOCKR,GPIO port C resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOC_DELAYRL,GPIO port C delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOC_DELAYRH,GPIO port C delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOC_ADVCFGRL,GPIO port C advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOC_ADVCFGRH,GPIO port C advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOC_CIDCFGR0,GPIO port C CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOC_SEMCR0,GPIO port C semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOC_CIDCFGR1,GPIO port C CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOC_SEMCR1,GPIO port C semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOC_CIDCFGR2,GPIO port C CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOC_SEMCR2,GPIO port C semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOC_CIDCFGR3,GPIO port C CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOC_SEMCR3,GPIO port C semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOC_CIDCFGR4,GPIO port C CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOC_SEMCR4,GPIO port C semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOC_CIDCFGR5,GPIO port C CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOC_SEMCR5,GPIO port C semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOC_CIDCFGR6,GPIO port C CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOC_SEMCR6,GPIO port C semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOC_CIDCFGR7,GPIO port C CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOC_SEMCR7,GPIO port C semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOC_CIDCFGR8,GPIO port C CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOC_SEMCR8,GPIO port C semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOC_CIDCFGR9,GPIO port C CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOC_SEMCR9,GPIO port C semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOC_CIDCFGR10,GPIO port C CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOC_SEMCR10,GPIO port C semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOC_CIDCFGR11,GPIO port C CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOC_SEMCR11,GPIO port C semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOC_CIDCFGR12,GPIO port C CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOC_SEMCR12,GPIO port C semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOC_CIDCFGR13,GPIO port C CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOC_SEMCR13,GPIO port C semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOC_CIDCFGR14,GPIO port C CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOC_SEMCR14,GPIO port C semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOC_CIDCFGR15,GPIO port C CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOC_SEMCR15,GPIO port C semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOC_HWCFGR11,GPIO port C hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOC_HWCFGR10,GPIO port C hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOC_HWCFGR9,GPIO port C hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOC_HWCFGR8,GPIO port C hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOC_HWCFGR7,GPIO port C hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOC_HWCFGR6,GPIO port C hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOC_HWCFGR5,GPIO port C hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOC_HWCFGR4,GPIO port C hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOC_HWCFGR3,GPIO port C hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOC_HWCFGR2,GPIO port C hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOC_HWCFGR1,GPIO port C hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOC_VERR,GPIO port C version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOC_IPIDR,GPIO port C identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOC_SIDR,GPIO port C size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "GPIOD" base ad:0x0 tree "GPIOD" base ad:0x44270000 group.long 0x0++0xF line.long 0x0 "GPIOD_MODER,GPIO port D mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOD_OTYPER,GPIO port D output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOD_OSPEEDR,GPIO port D output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOD_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOD_IDR,GPIO port D input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOD_ODR,GPIO port D output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOD_BSRR,GPIO port D bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOD_LCKR,GPIO port D configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOD_AFRL,GPIO port D alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOD_AFRH,GPIO port D alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOD_BRR,GPIO port D bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOD_SECCFGR,GPIO port D secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOD_PRIVCFGR,GPIO port D privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOD_RCFGLOCKR,GPIO port D resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOD_DELAYRL,GPIO port D delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOD_DELAYRH,GPIO port D delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOD_ADVCFGRL,GPIO port D advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOD_ADVCFGRH,GPIO port D advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOD_CIDCFGR0,GPIO port D CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOD_SEMCR0,GPIO port D semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOD_CIDCFGR1,GPIO port D CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOD_SEMCR1,GPIO port D semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOD_CIDCFGR2,GPIO port D CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOD_SEMCR2,GPIO port D semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOD_CIDCFGR3,GPIO port D CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOD_SEMCR3,GPIO port D semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOD_CIDCFGR4,GPIO port D CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOD_SEMCR4,GPIO port D semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOD_CIDCFGR5,GPIO port D CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOD_SEMCR5,GPIO port D semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOD_CIDCFGR6,GPIO port D CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOD_SEMCR6,GPIO port D semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOD_CIDCFGR7,GPIO port D CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOD_SEMCR7,GPIO port D semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOD_CIDCFGR8,GPIO port D CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOD_SEMCR8,GPIO port D semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOD_CIDCFGR9,GPIO port D CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOD_SEMCR9,GPIO port D semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOD_CIDCFGR10,GPIO port D CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOD_SEMCR10,GPIO port D semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOD_CIDCFGR11,GPIO port D CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOD_SEMCR11,GPIO port D semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOD_CIDCFGR12,GPIO port D CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOD_SEMCR12,GPIO port D semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOD_CIDCFGR13,GPIO port D CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOD_SEMCR13,GPIO port D semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOD_CIDCFGR14,GPIO port D CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOD_SEMCR14,GPIO port D semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOD_CIDCFGR15,GPIO port D CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOD_SEMCR15,GPIO port D semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOD_HWCFGR11,GPIO port D hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOD_HWCFGR10,GPIO port D hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOD_HWCFGR9,GPIO port D hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOD_HWCFGR8,GPIO port D hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOD_HWCFGR7,GPIO port D hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOD_HWCFGR6,GPIO port D hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOD_HWCFGR5,GPIO port D hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOD_HWCFGR4,GPIO port D hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOD_HWCFGR3,GPIO port D hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOD_HWCFGR2,GPIO port D hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOD_HWCFGR1,GPIO port D hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOD_VERR,GPIO port D version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOD_IPIDR,GPIO port D identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOD_SIDR,GPIO port D size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree "GPIOD_S" base ad:0x54270000 group.long 0x0++0xF line.long 0x0 "GPIOD_MODER,GPIO port D mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOD_OTYPER,GPIO port D output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOD_OSPEEDR,GPIO port D output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOD_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOD_IDR,GPIO port D input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOD_ODR,GPIO port D output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOD_BSRR,GPIO port D bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOD_LCKR,GPIO port D configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOD_AFRL,GPIO port D alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOD_AFRH,GPIO port D alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOD_BRR,GPIO port D bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOD_SECCFGR,GPIO port D secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOD_PRIVCFGR,GPIO port D privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOD_RCFGLOCKR,GPIO port D resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOD_DELAYRL,GPIO port D delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOD_DELAYRH,GPIO port D delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOD_ADVCFGRL,GPIO port D advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOD_ADVCFGRH,GPIO port D advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOD_CIDCFGR0,GPIO port D CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOD_SEMCR0,GPIO port D semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOD_CIDCFGR1,GPIO port D CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOD_SEMCR1,GPIO port D semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOD_CIDCFGR2,GPIO port D CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOD_SEMCR2,GPIO port D semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOD_CIDCFGR3,GPIO port D CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOD_SEMCR3,GPIO port D semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOD_CIDCFGR4,GPIO port D CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOD_SEMCR4,GPIO port D semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOD_CIDCFGR5,GPIO port D CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOD_SEMCR5,GPIO port D semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOD_CIDCFGR6,GPIO port D CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOD_SEMCR6,GPIO port D semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOD_CIDCFGR7,GPIO port D CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOD_SEMCR7,GPIO port D semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOD_CIDCFGR8,GPIO port D CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOD_SEMCR8,GPIO port D semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOD_CIDCFGR9,GPIO port D CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOD_SEMCR9,GPIO port D semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOD_CIDCFGR10,GPIO port D CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOD_SEMCR10,GPIO port D semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOD_CIDCFGR11,GPIO port D CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOD_SEMCR11,GPIO port D semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOD_CIDCFGR12,GPIO port D CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOD_SEMCR12,GPIO port D semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOD_CIDCFGR13,GPIO port D CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOD_SEMCR13,GPIO port D semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOD_CIDCFGR14,GPIO port D CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOD_SEMCR14,GPIO port D semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOD_CIDCFGR15,GPIO port D CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOD_SEMCR15,GPIO port D semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOD_HWCFGR11,GPIO port D hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOD_HWCFGR10,GPIO port D hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOD_HWCFGR9,GPIO port D hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOD_HWCFGR8,GPIO port D hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOD_HWCFGR7,GPIO port D hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOD_HWCFGR6,GPIO port D hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOD_HWCFGR5,GPIO port D hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOD_HWCFGR4,GPIO port D hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOD_HWCFGR3,GPIO port D hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOD_HWCFGR2,GPIO port D hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOD_HWCFGR1,GPIO port D hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOD_VERR,GPIO port D version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOD_IPIDR,GPIO port D identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOD_SIDR,GPIO port D size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "GPIOE" base ad:0x0 tree "GPIOE" base ad:0x44280000 group.long 0x0++0xF line.long 0x0 "GPIOE_MODER,GPIO port E mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOE_OTYPER,GPIO port E output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOE_OSPEEDR,GPIO port E output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOE_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOE_IDR,GPIO port E input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOE_ODR,GPIO port E output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOE_BSRR,GPIO port E bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOE_LCKR,GPIO port E configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOE_AFRL,GPIO port E alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOE_AFRH,GPIO port E alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOE_BRR,GPIO port E bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOE_SECCFGR,GPIO port E secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOE_PRIVCFGR,GPIO port E privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOE_RCFGLOCKR,GPIO port E resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOE_DELAYRL,GPIO port E delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOE_DELAYRH,GPIO port E delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOE_ADVCFGRL,GPIO port E advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOE_ADVCFGRH,GPIO port E advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOE_CIDCFGR0,GPIO port E CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOE_SEMCR0,GPIO port E semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOE_CIDCFGR1,GPIO port E CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOE_SEMCR1,GPIO port E semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOE_CIDCFGR2,GPIO port E CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOE_SEMCR2,GPIO port E semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOE_CIDCFGR3,GPIO port E CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOE_SEMCR3,GPIO port E semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOE_CIDCFGR4,GPIO port E CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOE_SEMCR4,GPIO port E semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOE_CIDCFGR5,GPIO port E CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOE_SEMCR5,GPIO port E semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOE_CIDCFGR6,GPIO port E CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOE_SEMCR6,GPIO port E semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOE_CIDCFGR7,GPIO port E CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOE_SEMCR7,GPIO port E semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOE_CIDCFGR8,GPIO port E CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOE_SEMCR8,GPIO port E semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOE_CIDCFGR9,GPIO port E CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOE_SEMCR9,GPIO port E semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOE_CIDCFGR10,GPIO port E CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOE_SEMCR10,GPIO port E semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOE_CIDCFGR11,GPIO port E CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOE_SEMCR11,GPIO port E semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOE_CIDCFGR12,GPIO port E CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOE_SEMCR12,GPIO port E semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOE_CIDCFGR13,GPIO port E CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOE_SEMCR13,GPIO port E semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOE_CIDCFGR14,GPIO port E CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOE_SEMCR14,GPIO port E semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOE_CIDCFGR15,GPIO port E CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOE_SEMCR15,GPIO port E semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOE_HWCFGR11,GPIO port E hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOE_HWCFGR10,GPIO port E hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOE_HWCFGR9,GPIO port E hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOE_HWCFGR8,GPIO port E hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOE_HWCFGR7,GPIO port E hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOE_HWCFGR6,GPIO port E hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOE_HWCFGR5,GPIO port E hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOE_HWCFGR4,GPIO port E hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOE_HWCFGR3,GPIO port E hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOE_HWCFGR2,GPIO port E hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOE_HWCFGR1,GPIO port E hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOE_VERR,GPIO port E version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOE_IPIDR,GPIO port E identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOE_SIDR,GPIO port E size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree "GPIOE_S" base ad:0x54280000 group.long 0x0++0xF line.long 0x0 "GPIOE_MODER,GPIO port E mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOE_OTYPER,GPIO port E output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOE_OSPEEDR,GPIO port E output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOE_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOE_IDR,GPIO port E input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOE_ODR,GPIO port E output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOE_BSRR,GPIO port E bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOE_LCKR,GPIO port E configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOE_AFRL,GPIO port E alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOE_AFRH,GPIO port E alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOE_BRR,GPIO port E bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOE_SECCFGR,GPIO port E secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOE_PRIVCFGR,GPIO port E privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOE_RCFGLOCKR,GPIO port E resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOE_DELAYRL,GPIO port E delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOE_DELAYRH,GPIO port E delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOE_ADVCFGRL,GPIO port E advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOE_ADVCFGRH,GPIO port E advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOE_CIDCFGR0,GPIO port E CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOE_SEMCR0,GPIO port E semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOE_CIDCFGR1,GPIO port E CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOE_SEMCR1,GPIO port E semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOE_CIDCFGR2,GPIO port E CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOE_SEMCR2,GPIO port E semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOE_CIDCFGR3,GPIO port E CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOE_SEMCR3,GPIO port E semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOE_CIDCFGR4,GPIO port E CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOE_SEMCR4,GPIO port E semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOE_CIDCFGR5,GPIO port E CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOE_SEMCR5,GPIO port E semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOE_CIDCFGR6,GPIO port E CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOE_SEMCR6,GPIO port E semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOE_CIDCFGR7,GPIO port E CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOE_SEMCR7,GPIO port E semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOE_CIDCFGR8,GPIO port E CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOE_SEMCR8,GPIO port E semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOE_CIDCFGR9,GPIO port E CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOE_SEMCR9,GPIO port E semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOE_CIDCFGR10,GPIO port E CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOE_SEMCR10,GPIO port E semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOE_CIDCFGR11,GPIO port E CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOE_SEMCR11,GPIO port E semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOE_CIDCFGR12,GPIO port E CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOE_SEMCR12,GPIO port E semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOE_CIDCFGR13,GPIO port E CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOE_SEMCR13,GPIO port E semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOE_CIDCFGR14,GPIO port E CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOE_SEMCR14,GPIO port E semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOE_CIDCFGR15,GPIO port E CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOE_SEMCR15,GPIO port E semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOE_HWCFGR11,GPIO port E hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOE_HWCFGR10,GPIO port E hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOE_HWCFGR9,GPIO port E hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOE_HWCFGR8,GPIO port E hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOE_HWCFGR7,GPIO port E hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOE_HWCFGR6,GPIO port E hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOE_HWCFGR5,GPIO port E hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOE_HWCFGR4,GPIO port E hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOE_HWCFGR3,GPIO port E hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOE_HWCFGR2,GPIO port E hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOE_HWCFGR1,GPIO port E hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOE_VERR,GPIO port E version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOE_IPIDR,GPIO port E identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOE_SIDR,GPIO port E size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "GPIOF" base ad:0x0 tree "GPIOF" base ad:0x44290000 group.long 0x0++0xF line.long 0x0 "GPIOF_MODER,GPIO port F mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOF_OTYPER,GPIO port F output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOF_OSPEEDR,GPIO port F output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOF_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOF_IDR,GPIO port F input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOF_ODR,GPIO port F output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOF_BSRR,GPIO port F bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOF_LCKR,GPIO port F configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOF_AFRL,GPIO port F alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOF_AFRH,GPIO port F alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOF_BRR,GPIO port F bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOF_SECCFGR,GPIO port F secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOF_PRIVCFGR,GPIO port F privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOF_RCFGLOCKR,GPIO port F resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOF_DELAYRL,GPIO port F delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOF_DELAYRH,GPIO port F delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOF_ADVCFGRL,GPIO port F advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOF_ADVCFGRH,GPIO port F advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOF_CIDCFGR0,GPIO port F CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOF_SEMCR0,GPIO port F semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOF_CIDCFGR1,GPIO port F CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOF_SEMCR1,GPIO port F semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOF_CIDCFGR2,GPIO port F CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOF_SEMCR2,GPIO port F semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOF_CIDCFGR3,GPIO port F CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOF_SEMCR3,GPIO port F semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOF_CIDCFGR4,GPIO port F CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOF_SEMCR4,GPIO port F semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOF_CIDCFGR5,GPIO port F CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOF_SEMCR5,GPIO port F semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOF_CIDCFGR6,GPIO port F CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOF_SEMCR6,GPIO port F semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOF_CIDCFGR7,GPIO port F CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOF_SEMCR7,GPIO port F semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOF_CIDCFGR8,GPIO port F CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOF_SEMCR8,GPIO port F semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOF_CIDCFGR9,GPIO port F CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOF_SEMCR9,GPIO port F semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOF_CIDCFGR10,GPIO port F CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOF_SEMCR10,GPIO port F semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOF_CIDCFGR11,GPIO port F CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOF_SEMCR11,GPIO port F semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOF_CIDCFGR12,GPIO port F CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOF_SEMCR12,GPIO port F semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOF_CIDCFGR13,GPIO port F CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOF_SEMCR13,GPIO port F semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOF_CIDCFGR14,GPIO port F CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOF_SEMCR14,GPIO port F semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOF_CIDCFGR15,GPIO port F CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOF_SEMCR15,GPIO port F semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOF_HWCFGR11,GPIO port F hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOF_HWCFGR10,GPIO port F hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOF_HWCFGR9,GPIO port F hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOF_HWCFGR8,GPIO port F hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOF_HWCFGR7,GPIO port F hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOF_HWCFGR6,GPIO port F hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOF_HWCFGR5,GPIO port F hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOF_HWCFGR4,GPIO port F hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOF_HWCFGR3,GPIO port F hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOF_HWCFGR2,GPIO port F hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOF_HWCFGR1,GPIO port F hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOF_VERR,GPIO port F version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOF_IPIDR,GPIO port F identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOF_SIDR,GPIO port F size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree "GPIOF_S" base ad:0x54290000 group.long 0x0++0xF line.long 0x0 "GPIOF_MODER,GPIO port F mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOF_OTYPER,GPIO port F output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOF_OSPEEDR,GPIO port F output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOF_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOF_IDR,GPIO port F input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOF_ODR,GPIO port F output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOF_BSRR,GPIO port F bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOF_LCKR,GPIO port F configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOF_AFRL,GPIO port F alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOF_AFRH,GPIO port F alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOF_BRR,GPIO port F bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOF_SECCFGR,GPIO port F secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOF_PRIVCFGR,GPIO port F privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOF_RCFGLOCKR,GPIO port F resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOF_DELAYRL,GPIO port F delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOF_DELAYRH,GPIO port F delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOF_ADVCFGRL,GPIO port F advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOF_ADVCFGRH,GPIO port F advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOF_CIDCFGR0,GPIO port F CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOF_SEMCR0,GPIO port F semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOF_CIDCFGR1,GPIO port F CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOF_SEMCR1,GPIO port F semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOF_CIDCFGR2,GPIO port F CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOF_SEMCR2,GPIO port F semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOF_CIDCFGR3,GPIO port F CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOF_SEMCR3,GPIO port F semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOF_CIDCFGR4,GPIO port F CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOF_SEMCR4,GPIO port F semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOF_CIDCFGR5,GPIO port F CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOF_SEMCR5,GPIO port F semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOF_CIDCFGR6,GPIO port F CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOF_SEMCR6,GPIO port F semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOF_CIDCFGR7,GPIO port F CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOF_SEMCR7,GPIO port F semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOF_CIDCFGR8,GPIO port F CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOF_SEMCR8,GPIO port F semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOF_CIDCFGR9,GPIO port F CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOF_SEMCR9,GPIO port F semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOF_CIDCFGR10,GPIO port F CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOF_SEMCR10,GPIO port F semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOF_CIDCFGR11,GPIO port F CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOF_SEMCR11,GPIO port F semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOF_CIDCFGR12,GPIO port F CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOF_SEMCR12,GPIO port F semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOF_CIDCFGR13,GPIO port F CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOF_SEMCR13,GPIO port F semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOF_CIDCFGR14,GPIO port F CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOF_SEMCR14,GPIO port F semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOF_CIDCFGR15,GPIO port F CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOF_SEMCR15,GPIO port F semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOF_HWCFGR11,GPIO port F hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOF_HWCFGR10,GPIO port F hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOF_HWCFGR9,GPIO port F hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOF_HWCFGR8,GPIO port F hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOF_HWCFGR7,GPIO port F hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOF_HWCFGR6,GPIO port F hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOF_HWCFGR5,GPIO port F hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOF_HWCFGR4,GPIO port F hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOF_HWCFGR3,GPIO port F hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOF_HWCFGR2,GPIO port F hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOF_HWCFGR1,GPIO port F hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOF_VERR,GPIO port F version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOF_IPIDR,GPIO port F identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOF_SIDR,GPIO port F size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "GPIOG" base ad:0x0 tree "GPIOG" base ad:0x442A0000 group.long 0x0++0xF line.long 0x0 "GPIOG_MODER,GPIO port G mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOG_OTYPER,GPIO port G output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOG_OSPEEDR,GPIO port G output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOG_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOG_IDR,GPIO port G input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOG_ODR,GPIO port G output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOG_BSRR,GPIO port G bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOG_LCKR,GPIO port G configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOG_AFRL,GPIO port G alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOG_AFRH,GPIO port G alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOG_BRR,GPIO port G bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOG_SECCFGR,GPIO port G secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOG_PRIVCFGR,GPIO port G privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOG_RCFGLOCKR,GPIO port G resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOG_DELAYRL,GPIO port G delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOG_DELAYRH,GPIO port G delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOG_ADVCFGRL,GPIO port G advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOG_ADVCFGRH,GPIO port G advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOG_CIDCFGR0,GPIO port G CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOG_SEMCR0,GPIO port G semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOG_CIDCFGR1,GPIO port G CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOG_SEMCR1,GPIO port G semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOG_CIDCFGR2,GPIO port G CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOG_SEMCR2,GPIO port G semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOG_CIDCFGR3,GPIO port G CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOG_SEMCR3,GPIO port G semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOG_CIDCFGR4,GPIO port G CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOG_SEMCR4,GPIO port G semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOG_CIDCFGR5,GPIO port G CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOG_SEMCR5,GPIO port G semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOG_CIDCFGR6,GPIO port G CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOG_SEMCR6,GPIO port G semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOG_CIDCFGR7,GPIO port G CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOG_SEMCR7,GPIO port G semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOG_CIDCFGR8,GPIO port G CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOG_SEMCR8,GPIO port G semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOG_CIDCFGR9,GPIO port G CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOG_SEMCR9,GPIO port G semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOG_CIDCFGR10,GPIO port G CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOG_SEMCR10,GPIO port G semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOG_CIDCFGR11,GPIO port G CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOG_SEMCR11,GPIO port G semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOG_CIDCFGR12,GPIO port G CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOG_SEMCR12,GPIO port G semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOG_CIDCFGR13,GPIO port G CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOG_SEMCR13,GPIO port G semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOG_CIDCFGR14,GPIO port G CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOG_SEMCR14,GPIO port G semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOG_CIDCFGR15,GPIO port G CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOG_SEMCR15,GPIO port G semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOG_HWCFGR11,GPIO port G hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOG_HWCFGR10,GPIO port G hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOG_HWCFGR9,GPIO port G hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOG_HWCFGR8,GPIO port G hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOG_HWCFGR7,GPIO port G hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOG_HWCFGR6,GPIO port G hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOG_HWCFGR5,GPIO port G hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOG_HWCFGR4,GPIO port G hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOG_HWCFGR3,GPIO port G hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOG_HWCFGR2,GPIO port G hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOG_HWCFGR1,GPIO port G hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOG_VERR,GPIO port G version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOG_IPIDR,GPIO port G identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOG_SIDR,GPIO port G size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree "GPIOG_S" base ad:0x542A0000 group.long 0x0++0xF line.long 0x0 "GPIOG_MODER,GPIO port G mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOG_OTYPER,GPIO port G output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOG_OSPEEDR,GPIO port G output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOG_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOG_IDR,GPIO port G input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOG_ODR,GPIO port G output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOG_BSRR,GPIO port G bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOG_LCKR,GPIO port G configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOG_AFRL,GPIO port G alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOG_AFRH,GPIO port G alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOG_BRR,GPIO port G bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOG_SECCFGR,GPIO port G secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOG_PRIVCFGR,GPIO port G privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOG_RCFGLOCKR,GPIO port G resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOG_DELAYRL,GPIO port G delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOG_DELAYRH,GPIO port G delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOG_ADVCFGRL,GPIO port G advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOG_ADVCFGRH,GPIO port G advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOG_CIDCFGR0,GPIO port G CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOG_SEMCR0,GPIO port G semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOG_CIDCFGR1,GPIO port G CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOG_SEMCR1,GPIO port G semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOG_CIDCFGR2,GPIO port G CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOG_SEMCR2,GPIO port G semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOG_CIDCFGR3,GPIO port G CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOG_SEMCR3,GPIO port G semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOG_CIDCFGR4,GPIO port G CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOG_SEMCR4,GPIO port G semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOG_CIDCFGR5,GPIO port G CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOG_SEMCR5,GPIO port G semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOG_CIDCFGR6,GPIO port G CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOG_SEMCR6,GPIO port G semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOG_CIDCFGR7,GPIO port G CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOG_SEMCR7,GPIO port G semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOG_CIDCFGR8,GPIO port G CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOG_SEMCR8,GPIO port G semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOG_CIDCFGR9,GPIO port G CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOG_SEMCR9,GPIO port G semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOG_CIDCFGR10,GPIO port G CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOG_SEMCR10,GPIO port G semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOG_CIDCFGR11,GPIO port G CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOG_SEMCR11,GPIO port G semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOG_CIDCFGR12,GPIO port G CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOG_SEMCR12,GPIO port G semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOG_CIDCFGR13,GPIO port G CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOG_SEMCR13,GPIO port G semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOG_CIDCFGR14,GPIO port G CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOG_SEMCR14,GPIO port G semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOG_CIDCFGR15,GPIO port G CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOG_SEMCR15,GPIO port G semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOG_HWCFGR11,GPIO port G hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOG_HWCFGR10,GPIO port G hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOG_HWCFGR9,GPIO port G hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOG_HWCFGR8,GPIO port G hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOG_HWCFGR7,GPIO port G hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOG_HWCFGR6,GPIO port G hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOG_HWCFGR5,GPIO port G hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOG_HWCFGR4,GPIO port G hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOG_HWCFGR3,GPIO port G hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOG_HWCFGR2,GPIO port G hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOG_HWCFGR1,GPIO port G hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOG_VERR,GPIO port G version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOG_IPIDR,GPIO port G identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOG_SIDR,GPIO port G size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "GPIOH" base ad:0x0 tree "GPIOH" base ad:0x442B0000 group.long 0x0++0xF line.long 0x0 "GPIOH_MODER,GPIO port H mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOH_OTYPER,GPIO port H output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOH_OSPEEDR,GPIO port H output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOH_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOH_IDR,GPIO port H input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOH_ODR,GPIO port H output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOH_BSRR,GPIO port H bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOH_LCKR,GPIO port H configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOH_AFRL,GPIO port H alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOH_AFRH,GPIO port H alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOH_BRR,GPIO port H bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOH_SECCFGR,GPIO port H secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOH_PRIVCFGR,GPIO port H privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOH_RCFGLOCKR,GPIO port H resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOH_DELAYRL,GPIO port H delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOH_DELAYRH,GPIO port H delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOH_ADVCFGRL,GPIO port H advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOH_ADVCFGRH,GPIO port H advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOH_CIDCFGR0,GPIO port H CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOH_SEMCR0,GPIO port H semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOH_CIDCFGR1,GPIO port H CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOH_SEMCR1,GPIO port H semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOH_CIDCFGR2,GPIO port H CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOH_SEMCR2,GPIO port H semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOH_CIDCFGR3,GPIO port H CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOH_SEMCR3,GPIO port H semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOH_CIDCFGR4,GPIO port H CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOH_SEMCR4,GPIO port H semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOH_CIDCFGR5,GPIO port H CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOH_SEMCR5,GPIO port H semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOH_CIDCFGR6,GPIO port H CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOH_SEMCR6,GPIO port H semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOH_CIDCFGR7,GPIO port H CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOH_SEMCR7,GPIO port H semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOH_CIDCFGR8,GPIO port H CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOH_SEMCR8,GPIO port H semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOH_CIDCFGR9,GPIO port H CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOH_SEMCR9,GPIO port H semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOH_CIDCFGR10,GPIO port H CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOH_SEMCR10,GPIO port H semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOH_CIDCFGR11,GPIO port H CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOH_SEMCR11,GPIO port H semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOH_CIDCFGR12,GPIO port H CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOH_SEMCR12,GPIO port H semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOH_CIDCFGR13,GPIO port H CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOH_SEMCR13,GPIO port H semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOH_CIDCFGR14,GPIO port H CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOH_SEMCR14,GPIO port H semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOH_CIDCFGR15,GPIO port H CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOH_SEMCR15,GPIO port H semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOH_HWCFGR11,GPIO port H hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOH_HWCFGR10,GPIO port H hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOH_HWCFGR9,GPIO port H hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOH_HWCFGR8,GPIO port H hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOH_HWCFGR7,GPIO port H hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOH_HWCFGR6,GPIO port H hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOH_HWCFGR5,GPIO port H hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOH_HWCFGR4,GPIO port H hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOH_HWCFGR3,GPIO port H hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOH_HWCFGR2,GPIO port H hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOH_HWCFGR1,GPIO port H hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOH_VERR,GPIO port H version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOH_IPIDR,GPIO port H identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOH_SIDR,GPIO port H size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree "GPIOH_S" base ad:0x542B0000 group.long 0x0++0xF line.long 0x0 "GPIOH_MODER,GPIO port H mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOH_OTYPER,GPIO port H output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOH_OSPEEDR,GPIO port H output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOH_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOH_IDR,GPIO port H input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOH_ODR,GPIO port H output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOH_BSRR,GPIO port H bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOH_LCKR,GPIO port H configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOH_AFRL,GPIO port H alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOH_AFRH,GPIO port H alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOH_BRR,GPIO port H bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOH_SECCFGR,GPIO port H secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOH_PRIVCFGR,GPIO port H privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOH_RCFGLOCKR,GPIO port H resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOH_DELAYRL,GPIO port H delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOH_DELAYRH,GPIO port H delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOH_ADVCFGRL,GPIO port H advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOH_ADVCFGRH,GPIO port H advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOH_CIDCFGR0,GPIO port H CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOH_SEMCR0,GPIO port H semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOH_CIDCFGR1,GPIO port H CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOH_SEMCR1,GPIO port H semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOH_CIDCFGR2,GPIO port H CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOH_SEMCR2,GPIO port H semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOH_CIDCFGR3,GPIO port H CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOH_SEMCR3,GPIO port H semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOH_CIDCFGR4,GPIO port H CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOH_SEMCR4,GPIO port H semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOH_CIDCFGR5,GPIO port H CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOH_SEMCR5,GPIO port H semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOH_CIDCFGR6,GPIO port H CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOH_SEMCR6,GPIO port H semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOH_CIDCFGR7,GPIO port H CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOH_SEMCR7,GPIO port H semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOH_CIDCFGR8,GPIO port H CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOH_SEMCR8,GPIO port H semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOH_CIDCFGR9,GPIO port H CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOH_SEMCR9,GPIO port H semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOH_CIDCFGR10,GPIO port H CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOH_SEMCR10,GPIO port H semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOH_CIDCFGR11,GPIO port H CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOH_SEMCR11,GPIO port H semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOH_CIDCFGR12,GPIO port H CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOH_SEMCR12,GPIO port H semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOH_CIDCFGR13,GPIO port H CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOH_SEMCR13,GPIO port H semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOH_CIDCFGR14,GPIO port H CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOH_SEMCR14,GPIO port H semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOH_CIDCFGR15,GPIO port H CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOH_SEMCR15,GPIO port H semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOH_HWCFGR11,GPIO port H hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOH_HWCFGR10,GPIO port H hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOH_HWCFGR9,GPIO port H hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOH_HWCFGR8,GPIO port H hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOH_HWCFGR7,GPIO port H hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOH_HWCFGR6,GPIO port H hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOH_HWCFGR5,GPIO port H hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOH_HWCFGR4,GPIO port H hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOH_HWCFGR3,GPIO port H hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOH_HWCFGR2,GPIO port H hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOH_HWCFGR1,GPIO port H hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOH_VERR,GPIO port H version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOH_IPIDR,GPIO port H identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOH_SIDR,GPIO port H size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "GPIOI" base ad:0x0 tree "GPIOI" base ad:0x442C0000 group.long 0x0++0xF line.long 0x0 "GPIOI_MODER,GPIO port I mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOI_OTYPER,GPIO port I output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOI_OSPEEDR,GPIO port I output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOI_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOI_IDR,GPIO port I input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOI_ODR,GPIO port I output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOI_BSRR,GPIO port I bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOI_LCKR,GPIO port I configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOI_AFRL,GPIO port I alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOI_AFRH,GPIO port I alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOI_BRR,GPIO port I bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOI_SECCFGR,GPIO port I secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOI_PRIVCFGR,GPIO port I privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOI_RCFGLOCKR,GPIO port I resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOI_DELAYRL,GPIO port I delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOI_DELAYRH,GPIO port I delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOI_ADVCFGRL,GPIO port I advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOI_ADVCFGRH,GPIO port I advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOI_CIDCFGR0,GPIO port I CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOI_SEMCR0,GPIO port I semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOI_CIDCFGR1,GPIO port I CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOI_SEMCR1,GPIO port I semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOI_CIDCFGR2,GPIO port I CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOI_SEMCR2,GPIO port I semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOI_CIDCFGR3,GPIO port I CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOI_SEMCR3,GPIO port I semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOI_CIDCFGR4,GPIO port I CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOI_SEMCR4,GPIO port I semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOI_CIDCFGR5,GPIO port I CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOI_SEMCR5,GPIO port I semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOI_CIDCFGR6,GPIO port I CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOI_SEMCR6,GPIO port I semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOI_CIDCFGR7,GPIO port I CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOI_SEMCR7,GPIO port I semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOI_CIDCFGR8,GPIO port I CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOI_SEMCR8,GPIO port I semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOI_CIDCFGR9,GPIO port I CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOI_SEMCR9,GPIO port I semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOI_CIDCFGR10,GPIO port I CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOI_SEMCR10,GPIO port I semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOI_CIDCFGR11,GPIO port I CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOI_SEMCR11,GPIO port I semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOI_CIDCFGR12,GPIO port I CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOI_SEMCR12,GPIO port I semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOI_CIDCFGR13,GPIO port I CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOI_SEMCR13,GPIO port I semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOI_CIDCFGR14,GPIO port I CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOI_SEMCR14,GPIO port I semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOI_CIDCFGR15,GPIO port I CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOI_SEMCR15,GPIO port I semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOI_HWCFGR11,GPIO port I hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOI_HWCFGR10,GPIO port I hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOI_HWCFGR9,GPIO port I hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOI_HWCFGR8,GPIO port I hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOI_HWCFGR7,GPIO port I hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOI_HWCFGR6,GPIO port I hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOI_HWCFGR5,GPIO port I hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOI_HWCFGR4,GPIO port I hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOI_HWCFGR3,GPIO port I hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOI_HWCFGR2,GPIO port I hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOI_HWCFGR1,GPIO port I hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOI_VERR,GPIO port I version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOI_IPIDR,GPIO port I identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOI_SIDR,GPIO port I size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree "GPIOI_S" base ad:0x542C0000 group.long 0x0++0xF line.long 0x0 "GPIOI_MODER,GPIO port I mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOI_OTYPER,GPIO port I output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOI_OSPEEDR,GPIO port I output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOI_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOI_IDR,GPIO port I input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOI_ODR,GPIO port I output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOI_BSRR,GPIO port I bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOI_LCKR,GPIO port I configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOI_AFRL,GPIO port I alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOI_AFRH,GPIO port I alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOI_BRR,GPIO port I bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOI_SECCFGR,GPIO port I secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOI_PRIVCFGR,GPIO port I privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOI_RCFGLOCKR,GPIO port I resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOI_DELAYRL,GPIO port I delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOI_DELAYRH,GPIO port I delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOI_ADVCFGRL,GPIO port I advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOI_ADVCFGRH,GPIO port I advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOI_CIDCFGR0,GPIO port I CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOI_SEMCR0,GPIO port I semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOI_CIDCFGR1,GPIO port I CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOI_SEMCR1,GPIO port I semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOI_CIDCFGR2,GPIO port I CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOI_SEMCR2,GPIO port I semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOI_CIDCFGR3,GPIO port I CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOI_SEMCR3,GPIO port I semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOI_CIDCFGR4,GPIO port I CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOI_SEMCR4,GPIO port I semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOI_CIDCFGR5,GPIO port I CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOI_SEMCR5,GPIO port I semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOI_CIDCFGR6,GPIO port I CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOI_SEMCR6,GPIO port I semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOI_CIDCFGR7,GPIO port I CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOI_SEMCR7,GPIO port I semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOI_CIDCFGR8,GPIO port I CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOI_SEMCR8,GPIO port I semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOI_CIDCFGR9,GPIO port I CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOI_SEMCR9,GPIO port I semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOI_CIDCFGR10,GPIO port I CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOI_SEMCR10,GPIO port I semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOI_CIDCFGR11,GPIO port I CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOI_SEMCR11,GPIO port I semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOI_CIDCFGR12,GPIO port I CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOI_SEMCR12,GPIO port I semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOI_CIDCFGR13,GPIO port I CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOI_SEMCR13,GPIO port I semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOI_CIDCFGR14,GPIO port I CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOI_SEMCR14,GPIO port I semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOI_CIDCFGR15,GPIO port I CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOI_SEMCR15,GPIO port I semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOI_HWCFGR11,GPIO port I hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOI_HWCFGR10,GPIO port I hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOI_HWCFGR9,GPIO port I hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOI_HWCFGR8,GPIO port I hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOI_HWCFGR7,GPIO port I hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOI_HWCFGR6,GPIO port I hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOI_HWCFGR5,GPIO port I hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOI_HWCFGR4,GPIO port I hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOI_HWCFGR3,GPIO port I hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOI_HWCFGR2,GPIO port I hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOI_HWCFGR1,GPIO port I hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOI_VERR,GPIO port I version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOI_IPIDR,GPIO port I identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOI_SIDR,GPIO port I size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "GPIOJ" base ad:0x0 tree "GPIOJ" base ad:0x442D0000 group.long 0x0++0xF line.long 0x0 "GPIOJ_MODER,GPIO port J mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOJ_OTYPER,GPIO port J output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOJ_OSPEEDR,GPIO port J output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOJ_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOJ_IDR,GPIO port J input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOJ_ODR,GPIO port J output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOJ_BSRR,GPIO port J bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOJ_LCKR,GPIO port J configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOJ_AFRL,GPIO port J alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOJ_AFRH,GPIO port J alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOJ_BRR,GPIO port J bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOJ_SECCFGR,GPIO port J secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOJ_PRIVCFGR,GPIO port J privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOJ_RCFGLOCKR,GPIO port J resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOJ_DELAYRL,GPIO port J delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOJ_DELAYRH,GPIO port J delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOJ_ADVCFGRL,GPIO port J advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOJ_ADVCFGRH,GPIO port J advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOJ_CIDCFGR0,GPIO port J CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOJ_SEMCR0,GPIO port J semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOJ_CIDCFGR1,GPIO port J CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOJ_SEMCR1,GPIO port J semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOJ_CIDCFGR2,GPIO port J CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOJ_SEMCR2,GPIO port J semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOJ_CIDCFGR3,GPIO port J CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOJ_SEMCR3,GPIO port J semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOJ_CIDCFGR4,GPIO port J CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOJ_SEMCR4,GPIO port J semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOJ_CIDCFGR5,GPIO port J CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOJ_SEMCR5,GPIO port J semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOJ_CIDCFGR6,GPIO port J CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOJ_SEMCR6,GPIO port J semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOJ_CIDCFGR7,GPIO port J CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOJ_SEMCR7,GPIO port J semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOJ_CIDCFGR8,GPIO port J CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOJ_SEMCR8,GPIO port J semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOJ_CIDCFGR9,GPIO port J CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOJ_SEMCR9,GPIO port J semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOJ_CIDCFGR10,GPIO port J CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOJ_SEMCR10,GPIO port J semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOJ_CIDCFGR11,GPIO port J CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOJ_SEMCR11,GPIO port J semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOJ_CIDCFGR12,GPIO port J CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOJ_SEMCR12,GPIO port J semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOJ_CIDCFGR13,GPIO port J CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOJ_SEMCR13,GPIO port J semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOJ_CIDCFGR14,GPIO port J CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOJ_SEMCR14,GPIO port J semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOJ_CIDCFGR15,GPIO port J CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOJ_SEMCR15,GPIO port J semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOJ_HWCFGR11,GPIO port J hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOJ_HWCFGR10,GPIO port J hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOJ_HWCFGR9,GPIO port J hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOJ_HWCFGR8,GPIO port J hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOJ_HWCFGR7,GPIO port J hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOJ_HWCFGR6,GPIO port J hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOJ_HWCFGR5,GPIO port J hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOJ_HWCFGR4,GPIO port J hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOJ_HWCFGR3,GPIO port J hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOJ_HWCFGR2,GPIO port J hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOJ_HWCFGR1,GPIO port J hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOJ_VERR,GPIO port J version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOJ_IPIDR,GPIO port J identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOJ_SIDR,GPIO port J size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree "GPIOJ_S" base ad:0x542D0000 group.long 0x0++0xF line.long 0x0 "GPIOJ_MODER,GPIO port J mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOJ_OTYPER,GPIO port J output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOJ_OSPEEDR,GPIO port J output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOJ_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOJ_IDR,GPIO port J input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOJ_ODR,GPIO port J output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOJ_BSRR,GPIO port J bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOJ_LCKR,GPIO port J configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOJ_AFRL,GPIO port J alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOJ_AFRH,GPIO port J alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOJ_BRR,GPIO port J bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOJ_SECCFGR,GPIO port J secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOJ_PRIVCFGR,GPIO port J privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOJ_RCFGLOCKR,GPIO port J resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOJ_DELAYRL,GPIO port J delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOJ_DELAYRH,GPIO port J delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOJ_ADVCFGRL,GPIO port J advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOJ_ADVCFGRH,GPIO port J advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOJ_CIDCFGR0,GPIO port J CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOJ_SEMCR0,GPIO port J semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOJ_CIDCFGR1,GPIO port J CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOJ_SEMCR1,GPIO port J semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOJ_CIDCFGR2,GPIO port J CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOJ_SEMCR2,GPIO port J semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOJ_CIDCFGR3,GPIO port J CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOJ_SEMCR3,GPIO port J semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOJ_CIDCFGR4,GPIO port J CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOJ_SEMCR4,GPIO port J semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOJ_CIDCFGR5,GPIO port J CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOJ_SEMCR5,GPIO port J semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOJ_CIDCFGR6,GPIO port J CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOJ_SEMCR6,GPIO port J semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOJ_CIDCFGR7,GPIO port J CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOJ_SEMCR7,GPIO port J semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOJ_CIDCFGR8,GPIO port J CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOJ_SEMCR8,GPIO port J semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOJ_CIDCFGR9,GPIO port J CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOJ_SEMCR9,GPIO port J semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOJ_CIDCFGR10,GPIO port J CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOJ_SEMCR10,GPIO port J semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOJ_CIDCFGR11,GPIO port J CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOJ_SEMCR11,GPIO port J semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOJ_CIDCFGR12,GPIO port J CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOJ_SEMCR12,GPIO port J semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOJ_CIDCFGR13,GPIO port J CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOJ_SEMCR13,GPIO port J semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOJ_CIDCFGR14,GPIO port J CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOJ_SEMCR14,GPIO port J semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOJ_CIDCFGR15,GPIO port J CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOJ_SEMCR15,GPIO port J semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOJ_HWCFGR11,GPIO port J hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOJ_HWCFGR10,GPIO port J hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOJ_HWCFGR9,GPIO port J hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOJ_HWCFGR8,GPIO port J hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOJ_HWCFGR7,GPIO port J hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOJ_HWCFGR6,GPIO port J hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOJ_HWCFGR5,GPIO port J hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOJ_HWCFGR4,GPIO port J hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOJ_HWCFGR3,GPIO port J hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOJ_HWCFGR2,GPIO port J hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOJ_HWCFGR1,GPIO port J hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOJ_VERR,GPIO port J version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOJ_IPIDR,GPIO port J identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOJ_SIDR,GPIO port J size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "GPIOK" base ad:0x0 tree "GPIOK" base ad:0x442E0000 group.long 0x0++0xF line.long 0x0 "GPIOK_MODER,GPIO port K mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOK_OTYPER,GPIO port K output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOK_OSPEEDR,GPIO port K output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOK_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOK_IDR,GPIO port K input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOK_ODR,GPIO port K output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOK_BSRR,GPIO port K bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOK_LCKR,GPIO port K configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOK_AFRL,GPIO port K alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOK_AFRH,GPIO port K alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOK_BRR,GPIO port K bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOK_SECCFGR,GPIO port K secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOK_PRIVCFGR,GPIO port K privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOK_RCFGLOCKR,GPIO port K resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOK_DELAYRL,GPIO port K delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOK_DELAYRH,GPIO port K delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOK_ADVCFGRL,GPIO port K advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOK_ADVCFGRH,GPIO port K advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOK_CIDCFGR0,GPIO port K CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOK_SEMCR0,GPIO port K semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOK_CIDCFGR1,GPIO port K CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOK_SEMCR1,GPIO port K semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOK_CIDCFGR2,GPIO port K CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOK_SEMCR2,GPIO port K semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOK_CIDCFGR3,GPIO port K CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOK_SEMCR3,GPIO port K semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOK_CIDCFGR4,GPIO port K CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOK_SEMCR4,GPIO port K semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOK_CIDCFGR5,GPIO port K CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOK_SEMCR5,GPIO port K semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOK_CIDCFGR6,GPIO port K CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOK_SEMCR6,GPIO port K semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOK_CIDCFGR7,GPIO port K CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOK_SEMCR7,GPIO port K semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOK_CIDCFGR8,GPIO port K CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOK_SEMCR8,GPIO port K semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOK_CIDCFGR9,GPIO port K CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOK_SEMCR9,GPIO port K semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOK_CIDCFGR10,GPIO port K CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOK_SEMCR10,GPIO port K semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOK_CIDCFGR11,GPIO port K CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOK_SEMCR11,GPIO port K semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOK_CIDCFGR12,GPIO port K CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOK_SEMCR12,GPIO port K semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOK_CIDCFGR13,GPIO port K CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOK_SEMCR13,GPIO port K semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOK_CIDCFGR14,GPIO port K CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOK_SEMCR14,GPIO port K semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOK_CIDCFGR15,GPIO port K CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOK_SEMCR15,GPIO port K semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOK_HWCFGR11,GPIO port K hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOK_HWCFGR10,GPIO port K hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOK_HWCFGR9,GPIO port K hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOK_HWCFGR8,GPIO port K hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOK_HWCFGR7,GPIO port K hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOK_HWCFGR6,GPIO port K hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOK_HWCFGR5,GPIO port K hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOK_HWCFGR4,GPIO port K hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOK_HWCFGR3,GPIO port K hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOK_HWCFGR2,GPIO port K hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOK_HWCFGR1,GPIO port K hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOK_VERR,GPIO port K version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOK_IPIDR,GPIO port K identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOK_SIDR,GPIO port K size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree "GPIOK_S" base ad:0x542E0000 group.long 0x0++0xF line.long 0x0 "GPIOK_MODER,GPIO port K mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOK_OTYPER,GPIO port K output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOK_OSPEEDR,GPIO port K output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOK_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOK_IDR,GPIO port K input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOK_ODR,GPIO port K output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOK_BSRR,GPIO port K bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOK_LCKR,GPIO port K configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOK_AFRL,GPIO port K alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOK_AFRH,GPIO port K alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOK_BRR,GPIO port K bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOK_SECCFGR,GPIO port K secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOK_PRIVCFGR,GPIO port K privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOK_RCFGLOCKR,GPIO port K resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOK_DELAYRL,GPIO port K delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOK_DELAYRH,GPIO port K delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOK_ADVCFGRL,GPIO port K advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOK_ADVCFGRH,GPIO port K advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOK_CIDCFGR0,GPIO port K CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOK_SEMCR0,GPIO port K semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOK_CIDCFGR1,GPIO port K CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOK_SEMCR1,GPIO port K semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOK_CIDCFGR2,GPIO port K CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOK_SEMCR2,GPIO port K semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOK_CIDCFGR3,GPIO port K CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOK_SEMCR3,GPIO port K semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOK_CIDCFGR4,GPIO port K CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOK_SEMCR4,GPIO port K semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOK_CIDCFGR5,GPIO port K CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOK_SEMCR5,GPIO port K semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOK_CIDCFGR6,GPIO port K CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOK_SEMCR6,GPIO port K semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOK_CIDCFGR7,GPIO port K CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOK_SEMCR7,GPIO port K semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOK_CIDCFGR8,GPIO port K CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOK_SEMCR8,GPIO port K semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOK_CIDCFGR9,GPIO port K CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOK_SEMCR9,GPIO port K semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOK_CIDCFGR10,GPIO port K CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOK_SEMCR10,GPIO port K semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOK_CIDCFGR11,GPIO port K CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOK_SEMCR11,GPIO port K semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOK_CIDCFGR12,GPIO port K CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOK_SEMCR12,GPIO port K semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOK_CIDCFGR13,GPIO port K CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOK_SEMCR13,GPIO port K semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOK_CIDCFGR14,GPIO port K CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOK_SEMCR14,GPIO port K semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOK_CIDCFGR15,GPIO port K CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOK_SEMCR15,GPIO port K semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOK_HWCFGR11,GPIO port K hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOK_HWCFGR10,GPIO port K hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOK_HWCFGR9,GPIO port K hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOK_HWCFGR8,GPIO port K hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOK_HWCFGR7,GPIO port K hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOK_HWCFGR6,GPIO port K hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOK_HWCFGR5,GPIO port K hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOK_HWCFGR4,GPIO port K hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOK_HWCFGR3,GPIO port K hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOK_HWCFGR2,GPIO port K hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOK_HWCFGR1,GPIO port K hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOK_VERR,GPIO port K version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOK_IPIDR,GPIO port K identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOK_SIDR,GPIO port K size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "GPIOZ" base ad:0x0 tree "GPIOZ" base ad:0x46200000 group.long 0x0++0xF line.long 0x0 "GPIOZ_MODER,GPIO port Z mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOZ_OTYPER,GPIO port Z output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOZ_OSPEEDR,GPIO port Z output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOZ_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOZ_IDR,GPIO port Z input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOZ_ODR,GPIO port Z output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOZ_BSRR,GPIO port Z bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOZ_LCKR,GPIO port Z configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOZ_AFRL,GPIO port Z alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOZ_AFRH,GPIO port Z alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOZ_BRR,GPIO port Z bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOZ_SECCFGR,GPIO port Z secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOZ_PRIVCFGR,GPIO port Z privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOZ_RCFGLOCKR,GPIO port Z resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOZ_DELAYRL,GPIO port Z delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOZ_DELAYRH,GPIO port Z delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOZ_ADVCFGRL,GPIO port Z advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOZ_ADVCFGRH,GPIO port Z advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOZ_CIDCFGR0,GPIO port Z CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOZ_SEMCR0,GPIO port Z semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOZ_CIDCFGR1,GPIO port Z CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOZ_SEMCR1,GPIO port Z semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOZ_CIDCFGR2,GPIO port Z CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOZ_SEMCR2,GPIO port Z semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOZ_CIDCFGR3,GPIO port Z CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOZ_SEMCR3,GPIO port Z semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOZ_CIDCFGR4,GPIO port Z CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOZ_SEMCR4,GPIO port Z semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOZ_CIDCFGR5,GPIO port Z CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOZ_SEMCR5,GPIO port Z semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOZ_CIDCFGR6,GPIO port Z CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOZ_SEMCR6,GPIO port Z semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOZ_CIDCFGR7,GPIO port Z CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOZ_SEMCR7,GPIO port Z semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOZ_CIDCFGR8,GPIO port Z CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOZ_SEMCR8,GPIO port Z semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOZ_CIDCFGR9,GPIO port Z CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOZ_SEMCR9,GPIO port Z semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOZ_CIDCFGR10,GPIO port Z CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOZ_SEMCR10,GPIO port Z semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOZ_CIDCFGR11,GPIO port Z CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOZ_SEMCR11,GPIO port Z semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOZ_CIDCFGR12,GPIO port Z CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOZ_SEMCR12,GPIO port Z semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOZ_CIDCFGR13,GPIO port Z CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOZ_SEMCR13,GPIO port Z semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOZ_CIDCFGR14,GPIO port Z CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOZ_SEMCR14,GPIO port Z semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOZ_CIDCFGR15,GPIO port Z CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOZ_SEMCR15,GPIO port Z semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOZ_HWCFGR11,GPIO port Z hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOZ_HWCFGR10,GPIO port Z hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOZ_HWCFGR9,GPIO port Z hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOZ_HWCFGR8,GPIO port Z hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOZ_HWCFGR7,GPIO port Z hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOZ_HWCFGR6,GPIO port Z hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOZ_HWCFGR5,GPIO port Z hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOZ_HWCFGR4,GPIO port Z hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOZ_HWCFGR3,GPIO port Z hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOZ_HWCFGR2,GPIO port Z hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOZ_HWCFGR1,GPIO port Z hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOZ_VERR,GPIO port Z version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOZ_IPIDR,GPIO port Z identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOZ_SIDR,GPIO port Z size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree "GPIOZ_S" base ad:0x56200000 group.long 0x0++0xF line.long 0x0 "GPIOZ_MODER,GPIO port Z mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOZ_OTYPER,GPIO port Z output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOZ_OSPEEDR,GPIO port Z output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOZ_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOZ_IDR,GPIO port Z input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOZ_ODR,GPIO port Z output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOZ_BSRR,GPIO port Z bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOZ_LCKR,GPIO port Z configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOZ_AFRL,GPIO port Z alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOZ_AFRH,GPIO port Z alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOZ_BRR,GPIO port Z bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOZ_SECCFGR,GPIO port Z secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOZ_PRIVCFGR,GPIO port Z privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOZ_RCFGLOCKR,GPIO port Z resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOZ_DELAYRL,GPIO port Z delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOZ_DELAYRH,GPIO port Z delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOZ_ADVCFGRL,GPIO port Z advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOZ_ADVCFGRH,GPIO port Z advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOZ_CIDCFGR0,GPIO port Z CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOZ_SEMCR0,GPIO port Z semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOZ_CIDCFGR1,GPIO port Z CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOZ_SEMCR1,GPIO port Z semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOZ_CIDCFGR2,GPIO port Z CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOZ_SEMCR2,GPIO port Z semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOZ_CIDCFGR3,GPIO port Z CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOZ_SEMCR3,GPIO port Z semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOZ_CIDCFGR4,GPIO port Z CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOZ_SEMCR4,GPIO port Z semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOZ_CIDCFGR5,GPIO port Z CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOZ_SEMCR5,GPIO port Z semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOZ_CIDCFGR6,GPIO port Z CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOZ_SEMCR6,GPIO port Z semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOZ_CIDCFGR7,GPIO port Z CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOZ_SEMCR7,GPIO port Z semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOZ_CIDCFGR8,GPIO port Z CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOZ_SEMCR8,GPIO port Z semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOZ_CIDCFGR9,GPIO port Z CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOZ_SEMCR9,GPIO port Z semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOZ_CIDCFGR10,GPIO port Z CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOZ_SEMCR10,GPIO port Z semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOZ_CIDCFGR11,GPIO port Z CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOZ_SEMCR11,GPIO port Z semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOZ_CIDCFGR12,GPIO port Z CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOZ_SEMCR12,GPIO port Z semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOZ_CIDCFGR13,GPIO port Z CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOZ_SEMCR13,GPIO port Z semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOZ_CIDCFGR14,GPIO port Z CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOZ_SEMCR14,GPIO port Z semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOZ_CIDCFGR15,GPIO port Z CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOZ_SEMCR15,GPIO port Z semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOZ_HWCFGR11,GPIO port Z hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOZ_HWCFGR10,GPIO port Z hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOZ_HWCFGR9,GPIO port Z hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOZ_HWCFGR8,GPIO port Z hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOZ_HWCFGR7,GPIO port Z hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOZ_HWCFGR6,GPIO port Z hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOZ_HWCFGR5,GPIO port Z hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOZ_HWCFGR4,GPIO port Z hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOZ_HWCFGR3,GPIO port Z hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOZ_HWCFGR2,GPIO port Z hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOZ_HWCFGR1,GPIO port Z hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOZ_VERR,GPIO port Z version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOZ_IPIDR,GPIO port Z identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOZ_SIDR,GPIO port Z size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree.end endif sif (cpuis("*CM0+")) tree "GPIOZ" base ad:0x0 tree "GPIOZ" base ad:0x46200000 group.long 0x0++0xF line.long 0x0 "GPIOZ_MODER,GPIO port Z mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 18.--19. "MODE9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8.--9. "MODE4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 6.--7. "MODE3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "GPIOZ_OTYPER,GPIO port Z output type register" bitfld.long 0x4 15. "OT15,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 14. "OT14,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 13. "OT13,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 12. "OT12,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 11. "OT11,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 10. "OT10,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "OT9,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 8. "OT8,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 7. "OT7,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 6. "OT6,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 5. "OT5,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 4. "OT4,Port x configuration I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "OT3,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 2. "OT2,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 1. "OT1,Port x configuration I/O pin y" "B_0x0,B_0x1" bitfld.long 0x4 0. "OT0,Port x configuration I/O pin y" "B_0x0,B_0x1" line.long 0x8 "GPIOZ_OSPEEDR,GPIO port Z output speed register" bitfld.long 0x8 30.--31. "OSPEED15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 28.--29. "OSPEED14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 26.--27. "OSPEED13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 24.--25. "OSPEED12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 22.--23. "OSPEED11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 20.--21. "OSPEED10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 18.--19. "OSPEED9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 16.--17. "OSPEED8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 14.--15. "OSPEED7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 12.--13. "OSPEED6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 10.--11. "OSPEED5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 8.--9. "OSPEED4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x8 6.--7. "OSPEED3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 4.--5. "OSPEED2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 2.--3. "OSPEED1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0.--1. "OSPEED0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0xC "GPIOZ_PUPDR,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 18.--19. "PUPD9,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8.--9. "PUPD4,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0xC 6.--7. "PUPD3,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration I/O pin y" "B_0x0,B_0x1,B_0x2,?" rgroup.long 0x10++0x3 line.long 0x0 "GPIOZ_IDR,GPIO port Z input data register" bitfld.long 0x0 15. "ID15,Port x input data I/O pin y" "0,1" bitfld.long 0x0 14. "ID14,Port x input data I/O pin y" "0,1" bitfld.long 0x0 13. "ID13,Port x input data I/O pin y" "0,1" bitfld.long 0x0 12. "ID12,Port x input data I/O pin y" "0,1" bitfld.long 0x0 11. "ID11,Port x input data I/O pin y" "0,1" bitfld.long 0x0 10. "ID10,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 9. "ID9,Port x input data I/O pin y" "0,1" bitfld.long 0x0 8. "ID8,Port x input data I/O pin y" "0,1" bitfld.long 0x0 7. "ID7,Port x input data I/O pin y" "0,1" bitfld.long 0x0 6. "ID6,Port x input data I/O pin y" "0,1" bitfld.long 0x0 5. "ID5,Port x input data I/O pin y" "0,1" bitfld.long 0x0 4. "ID4,Port x input data I/O pin y" "0,1" newline bitfld.long 0x0 3. "ID3,Port x input data I/O pin y" "0,1" bitfld.long 0x0 2. "ID2,Port x input data I/O pin y" "0,1" bitfld.long 0x0 1. "ID1,Port x input data I/O pin y" "0,1" bitfld.long 0x0 0. "ID0,Port x input data I/O pin y" "0,1" group.long 0x14++0x3 line.long 0x0 "GPIOZ_ODR,GPIO port Z output data register" bitfld.long 0x0 15. "OD15,Port x output data I/O pin y" "0,1" bitfld.long 0x0 14. "OD14,Port x output data I/O pin y" "0,1" bitfld.long 0x0 13. "OD13,Port x output data I/O pin y" "0,1" bitfld.long 0x0 12. "OD12,Port x output data I/O pin y" "0,1" bitfld.long 0x0 11. "OD11,Port x output data I/O pin y" "0,1" bitfld.long 0x0 10. "OD10,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 9. "OD9,Port x output data I/O pin y" "0,1" bitfld.long 0x0 8. "OD8,Port x output data I/O pin y" "0,1" bitfld.long 0x0 7. "OD7,Port x output data I/O pin y" "0,1" bitfld.long 0x0 6. "OD6,Port x output data I/O pin y" "0,1" bitfld.long 0x0 5. "OD5,Port x output data I/O pin y" "0,1" bitfld.long 0x0 4. "OD4,Port x output data I/O pin y" "0,1" newline bitfld.long 0x0 3. "OD3,Port x output data I/O pin y" "0,1" bitfld.long 0x0 2. "OD2,Port x output data I/O pin y" "0,1" bitfld.long 0x0 1. "OD1,Port x output data I/O pin y" "0,1" bitfld.long 0x0 0. "OD0,Port x output data I/O pin y" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "GPIOZ_BSRR,GPIO port Z bit set/reset register" bitfld.long 0x0 31. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 30. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 29. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 28. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 27. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 26. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 24. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 23. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 22. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 21. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 20. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 18. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 17. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 16. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 15. "BS15,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BS14,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BS13,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BS12,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BS11,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BS10,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "BS9,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BS8,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "BS7,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BS6,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BS5,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BS4,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "BS3,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BS2,Port x set I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "BS1,Port x set I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BS0,Port x set I/O pin y" "B_0x0,B_0x1" group.long 0x1C++0xB line.long 0x0 "GPIOZ_LCKR,GPIO port Z configuration lock register" bitfld.long 0x0 16. "LCKK,Lock key" "B_0x0,B_0x1" bitfld.long 0x0 15. "LCK15,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "LCK14,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "LCK13,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "LCK12,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "LCK11,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "LCK10,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 9. "LCK9,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "LCK8,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "LCK7,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "LCK6,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "LCK5,Port x lock I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "LCK4,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 3. "LCK3,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "LCK2,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "LCK1,Port x lock I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "LCK0,Port x lock I/O pin y" "B_0x0,B_0x1" line.long 0x4 "GPIOZ_AFRL,GPIO port Z alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port x I/O pin y" line.long 0x8 "GPIOZ_AFRH,GPIO port Z alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port x I/O pin y" newline hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port x I/O pin y" hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port x I/O pin y" wgroup.long 0x28++0x3 line.long 0x0 "GPIOZ_BRR,GPIO port Z bit reset register" bitfld.long 0x0 15. "BR15,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 14. "BR14,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 13. "BR13,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 12. "BR12,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 11. "BR11,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 10. "BR10,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "BR9,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 8. "BR8,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 7. "BR7,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 6. "BR6,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 5. "BR5,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 4. "BR4,Port x reset I/O pin y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "BR3,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 2. "BR2,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 1. "BR1,Port x reset I/O pin y" "B_0x0,B_0x1" bitfld.long 0x0 0. "BR0,Port x reset I/O pin y" "B_0x0,B_0x1" group.long 0x30++0xB line.long 0x0 "GPIOZ_SECCFGR,GPIO port Z secure configuration register" bitfld.long 0x0 15. "SEC15,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "SEC9,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 7. "SEC7,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,I/O pin y of Port x security configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,I/O pin y of Port x security configuration" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,I/O pin y of Port x security configuration" "B_0x0,B_0x1" line.long 0x4 "GPIOZ_PRIVCFGR,GPIO port Z privileged configuration register" bitfld.long 0x4 15. "PRIV15,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV11,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "PRIV9,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 7. "PRIV7,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,I/O pin y of port x privilege configuration" "B_0x0,B_0x1" line.long 0x8 "GPIOZ_RCFGLOCKR,GPIO port Z resource configuration lock register" bitfld.long 0x8 15. "RLOCK15,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK14,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 13. "RLOCK13,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK12,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK11,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK10,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "RLOCK9,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK8,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 7. "RLOCK7,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK6,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK5,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK4,I/O pin y of port x resource lock" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "RLOCK3,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK2,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 1. "RLOCK1,I/O pin y of port x resource lock" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK0,I/O pin y of port x resource lock" "B_0x0,B_0x1" group.long 0x40++0x8F line.long 0x0 "GPIOZ_DELAYRL,GPIO port Z delay low register" hexmask.long.byte 0x0 28.--31. 1. "DLY7,Port x IO pin y delay setup" hexmask.long.byte 0x0 24.--27. 1. "DLY6,Port x IO pin y delay setup" hexmask.long.byte 0x0 20.--23. 1. "DLY5,Port x IO pin y delay setup" hexmask.long.byte 0x0 16.--19. 1. "DLY4,Port x IO pin y delay setup" hexmask.long.byte 0x0 12.--15. 1. "DLY3,Port x IO pin y delay setup" hexmask.long.byte 0x0 8.--11. 1. "DLY2,Port x IO pin y delay setup" newline hexmask.long.byte 0x0 4.--7. 1. "DLY1,Port x IO pin y delay setup" hexmask.long.byte 0x0 0.--3. 1. "DLY0,Port x IO pin y delay setup" line.long 0x4 "GPIOZ_DELAYRH,GPIO port Z delay high register" hexmask.long.byte 0x4 28.--31. 1. "DLY15,Port x IO pin y delay setup" hexmask.long.byte 0x4 24.--27. 1. "DLY14,Port x IO pin y delay setup" hexmask.long.byte 0x4 20.--23. 1. "DLY13,Port x IO pin y delay setup" hexmask.long.byte 0x4 16.--19. 1. "DLY12,Port x IO pin y delay setup" hexmask.long.byte 0x4 12.--15. 1. "DLY11,Port x IO pin y delay setup" hexmask.long.byte 0x4 8.--11. 1. "DLY10,Port x IO pin y delay setup" newline hexmask.long.byte 0x4 4.--7. 1. "DLY9,Port x IO pin y delay setup" hexmask.long.byte 0x4 0.--3. 1. "DLY8,Port x IO pin y delay setup" line.long 0x8 "GPIOZ_ADVCFGRL,GPIO port Z advanced configuration low register" bitfld.long 0x8 31. "RET7,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 30. "INVCLK7,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 29. "DE7,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 28. "DLYPATH7,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 27. "RET6,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 26. "INVCLK6,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "DE6,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 24. "DLYPATH6,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 23. "RET5,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 22. "INVCLK5,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 21. "DE5,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 20. "DLYPATH5,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RET4,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 18. "INVCLK4,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 17. "DE4,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 16. "DLYPATH4,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 15. "RET3,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 14. "INVCLK3,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DE3,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 12. "DLYPATH3,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 11. "RET2,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 10. "INVCLK2,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 9. "DE2,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "DLYPATH2,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RET1,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 6. "INVCLK1,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 5. "DE1,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 4. "DLYPATH1,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 3. "RET0,Data retime selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 2. "INVCLK0,Clock inversion selection y (y=7to0)" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "DE0,Input/Output data double edge selection y (y=7to0)" "B_0x0,B_0x1" bitfld.long 0x8 0. "DLYPATH0,Controls which path contains the configurable delay input or output y (y=7to0)" "B_0x0,B_0x1" line.long 0xC "GPIOZ_ADVCFGRH,GPIO port Z advanced configuration high register" bitfld.long 0xC 31. "RET15,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 30. "INVCLK15,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 29. "DE15,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 28. "DLYPATH15,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 27. "RET14,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 26. "INVCLK14,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "DE14,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 24. "DLYPATH14,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 23. "RET13,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 22. "INVCLK13,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 21. "DE13,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 20. "DLYPATH13,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RET12,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 18. "INVCLK12,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 17. "DE12,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 16. "DLYPATH12,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 15. "RET11,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 14. "INVCLK11,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "DE11,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 12. "DLYPATH11,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 11. "RET10,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 10. "INVCLK10,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 9. "DE10,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 8. "DLYPATH10,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RET9,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 6. "INVCLK9,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 5. "DE9,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 4. "DLYPATH9,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 3. "RET8,Data retime selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 2. "INVCLK8,Clock inversion selection y (y=15to8)" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "DE8,Input/Output data double edge selection y (y=15to8)" "B_0x0,B_0x1" bitfld.long 0xC 0. "DLYPATH8,Controls which path contains the configurable delay input or output y (y=15to8)" "B_0x0,B_0x1" line.long 0x10 "GPIOZ_CIDCFGR0,GPIO port Z CID configuration register for I/O pin 0" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x10 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "GPIOZ_SEMCR0,GPIO port Z semaphore control register for I/O pin 0" rbitfld.long 0x14 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "GPIOZ_CIDCFGR1,GPIO port Z CID configuration register for I/O pin 1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x18 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "GPIOZ_SEMCR1,GPIO port Z semaphore control register for I/O pin 1" rbitfld.long 0x1C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "GPIOZ_CIDCFGR2,GPIO port Z CID configuration register for I/O pin 2" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x20 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "GPIOZ_SEMCR2,GPIO port Z semaphore control register for I/O pin 2" rbitfld.long 0x24 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "GPIOZ_CIDCFGR3,GPIO port Z CID configuration register for I/O pin 3" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "GPIOZ_SEMCR3,GPIO port Z semaphore control register for I/O pin 3" rbitfld.long 0x2C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "GPIOZ_CIDCFGR4,GPIO port Z CID configuration register for I/O pin 4" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x30 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "GPIOZ_SEMCR4,GPIO port Z semaphore control register for I/O pin 4" rbitfld.long 0x34 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "GPIOZ_CIDCFGR5,GPIO port Z CID configuration register for I/O pin 5" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x38 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "GPIOZ_SEMCR5,GPIO port Z semaphore control register for I/O pin 5" rbitfld.long 0x3C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "GPIOZ_CIDCFGR6,GPIO port Z CID configuration register for I/O pin 6" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "GPIOZ_SEMCR6,GPIO port Z semaphore control register for I/O pin 6" rbitfld.long 0x44 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "GPIOZ_CIDCFGR7,GPIO port Z CID configuration register for I/O pin 7" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x48 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "GPIOZ_SEMCR7,GPIO port Z semaphore control register for I/O pin 7" rbitfld.long 0x4C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "GPIOZ_CIDCFGR8,GPIO port Z CID configuration register for I/O pin 8" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x50 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "GPIOZ_SEMCR8,GPIO port Z semaphore control register for I/O pin 8" rbitfld.long 0x54 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "GPIOZ_CIDCFGR9,GPIO port Z CID configuration register for I/O pin 9" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x58 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "GPIOZ_SEMCR9,GPIO port Z semaphore control register for I/O pin 9" rbitfld.long 0x5C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "GPIOZ_CIDCFGR10,GPIO port Z CID configuration register for I/O pin 10" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x60 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "GPIOZ_SEMCR10,GPIO port Z semaphore control register for I/O pin 10" rbitfld.long 0x64 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "GPIOZ_CIDCFGR11,GPIO port Z CID configuration register for I/O pin 11" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x68 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "GPIOZ_SEMCR11,GPIO port Z semaphore control register for I/O pin 11" rbitfld.long 0x6C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "GPIOZ_CIDCFGR12,GPIO port Z CID configuration register for I/O pin 12" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x70 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "GPIOZ_SEMCR12,GPIO port Z semaphore control register for I/O pin 12" rbitfld.long 0x74 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "GPIOZ_CIDCFGR13,GPIO port Z CID configuration register for I/O pin 13" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x78 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "GPIOZ_SEMCR13,GPIO port Z semaphore control register for I/O pin 13" rbitfld.long 0x7C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "GPIOZ_CIDCFGR14,GPIO port Z CID configuration register for I/O pin 14" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x80 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "GPIOZ_SEMCR14,GPIO port Z semaphore control register for I/O pin 14" rbitfld.long 0x84 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "GPIOZ_CIDCFGR15,GPIO port Z CID configuration register for I/O pin 15" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment z" "B_0x0,B_0x1" bitfld.long 0x88 4.--5. "SCID,Static CID" "0,1,2,3" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "GPIOZ_SEMCR15,GPIO port Z semaphore control register for I/O pin 15" rbitfld.long 0x8C 4.--5. "SEMCID,Semaphore current CID" "0,1,2,3" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x3C8++0x37 line.long 0x0 "GPIOZ_HWCFGR11,GPIO port Z hardware configuration register 11" hexmask.long.byte 0x0 24.--27. 1. "PRIV_CFG,Privilege mechanism activation" hexmask.long.byte 0x0 20.--23. 1. "OR_CFG,Option register configuration" hexmask.long.byte 0x0 16.--19. 1. "SEC_CFG,Security activation" hexmask.long.byte 0x0 12.--15. 1. "LOCK_CFG,Lock mechanism activation" hexmask.long.byte 0x0 8.--11. 1. "SPEED_CFG,Number of speed lines for each I/O" hexmask.long.byte 0x0 4.--7. 1. "AFSIZE_CFG,Number of AF available for each I/O" newline hexmask.long.byte 0x0 0.--3. 1. "AHB_IOP,Bus interface selection" line.long 0x4 "GPIOZ_HWCFGR10,GPIO port Z hardware configuration register 10" hexmask.long.word 0x4 0.--15. 1. "EN_IO,Presence granularity each bit indicate the I/O presence" line.long 0x8 "GPIOZ_HWCFGR9,GPIO port Z hardware configuration register 9" hexmask.long.byte 0x8 28.--31. 1. "FAST_AF_IO15,Indicate which is the fastest AF for I/O15 (0 to F)" hexmask.long.byte 0x8 24.--27. 1. "FAST_AF_IO14,Indicate which is the fastest AF for I/O14 (0 to F)" hexmask.long.byte 0x8 20.--23. 1. "FAST_AF_IO13,Indicate which is the fastest AF for I/O13 (0 to F)" hexmask.long.byte 0x8 16.--19. 1. "FAST_AF_IO12,Indicate which is the fastest AF for I/O12 (0 to F)" hexmask.long.byte 0x8 12.--15. 1. "FAST_AF_IO11,Indicate which is the fastest AF for I/O11 (0 to F)" hexmask.long.byte 0x8 8.--11. 1. "FAST_AF_IO10,Indicate which is the fastest AF for I/O10 (0 to F)" newline hexmask.long.byte 0x8 4.--7. 1. "FAST_AF_IO9,Indicate which is the fastest AF for I/O9 (0 to F)" hexmask.long.byte 0x8 0.--3. 1. "FAST_AF_IO8,Indicate which is the fastest AF for I/O8 (0 to F)" line.long 0xC "GPIOZ_HWCFGR8,GPIO port Z hardware configuration register 8" hexmask.long.byte 0xC 28.--31. 1. "FAST_AF_IO7,Indicate which is the fastest AF for I/O7 (0 to F)" hexmask.long.byte 0xC 24.--27. 1. "FAST_AF_IO6,Indicate which is the fastest AF for I/O6 (0 to F)" hexmask.long.byte 0xC 20.--23. 1. "FAST_AF_IO5,Indicate which is the fastest AF for I/O5 (0 to F)" hexmask.long.byte 0xC 16.--19. 1. "FAST_AF_IO4,Indicate which is the fastest AF for I/O4 (0 to F)" hexmask.long.byte 0xC 12.--15. 1. "FAST_AF_IO3,Indicate which is the fastest AF for I/O3 (0 to F)" hexmask.long.byte 0xC 8.--11. 1. "FAST_AF_IO2,Indicate which is the fastest AF for I/O2 (0 to F)" newline hexmask.long.byte 0xC 4.--7. 1. "FAST_AF_IO1,Indicate which is the fastest AF for I/O1 (0 to F)" hexmask.long.byte 0xC 0.--3. 1. "FAST_AF_IO0,Indicate which is the fastest AF for I/O0 (0 to F)" line.long 0x10 "GPIOZ_HWCFGR7,GPIO port Z hardware configuration register 7" hexmask.long 0x10 0.--31. 1. "MODER_RES,MODER register reset value" line.long 0x14 "GPIOZ_HWCFGR6,GPIO port Z hardware configuration register 6" hexmask.long 0x14 0.--31. 1. "PUPDR_RES,Pull-up/pull-down register reset value" line.long 0x18 "GPIOZ_HWCFGR5,GPIO port Z hardware configuration register 5" hexmask.long 0x18 0.--31. 1. "OSPEED_RES,OSPEED register reset value" line.long 0x1C "GPIOZ_HWCFGR4,GPIO port Z hardware configuration register 4" hexmask.long.word 0x1C 16.--31. 1. "OTYPER_RES,Output type register reset value" hexmask.long.word 0x1C 0.--15. 1. "ODR_RES,Output data register reset value" line.long 0x20 "GPIOZ_HWCFGR3,GPIO port Z hardware configuration register 3" hexmask.long 0x20 0.--31. 1. "AFRL_RES,AF register low reset value" line.long 0x24 "GPIOZ_HWCFGR2,GPIO port Z hardware configuration register 2" hexmask.long 0x24 0.--31. 1. "AFRH_RES,AF register high reset value" line.long 0x28 "GPIOZ_HWCFGR1,GPIO port Z hardware configuration register 1" hexmask.long.word 0x28 0.--15. 1. "OR_RES,Option register reset value" line.long 0x2C "GPIOZ_VERR,GPIO port Z version register" hexmask.long.byte 0x2C 4.--7. 1. "MAJREV,GPIO major revision" hexmask.long.byte 0x2C 0.--3. 1. "MINREV,GPIO minor revision" line.long 0x30 "GPIOZ_IPIDR,GPIO port Z identification register" hexmask.long 0x30 0.--31. 1. "IPID,GPIO identifier" line.long 0x34 "GPIOZ_SIDR,GPIO port Z size identification register" hexmask.long 0x34 0.--31. 1. "SID,Size identifier" tree.end tree.end endif tree.end sif (cpuis("*CA35")||cpuis("*CM33F")) tree "GPU (Graphic Processing Unit)" base ad:0x0 tree "GPU" base ad:0x48280000 group.long 0x0++0x3 line.long 0x0 "GPU_AQHICLOCKCONTROL,GPU AQ Hi clock control register" bitfld.long 0x0 28. "SOFT_RESET_L2,Soft resets the L2." "0,1" hexmask.long.byte 0x0 20.--23. 1. "MULTI_PIPE_REG_SELECT,Determines which HI/MC to use while reading registers" newline bitfld.long 0x0 19. "ISOLATE_GPU,Isolate GPU bit" "0,1" rbitfld.long 0x0 16. "IDLE3_D,3D pipe is idle" "0,1" newline bitfld.long 0x0 13. "DISABLE_RAM_POWER_OPTIMIZATION,Disables ram power optimization" "0,1" bitfld.long 0x0 10. "DISABLE_RAM_CLOCK_GATING,Disables clock gating for rams" "0,1" newline bitfld.long 0x0 9. "FSCALE_CMD_LOAD,Core clock frequency scale value enable." "0,1" hexmask.long.byte 0x0 2.--8. 1. "FSCALE_VAL,Core clock frequency scale value" newline bitfld.long 0x0 1. "CLK2D_DIS,Clock 2D Disable. The AXI interface clock is the only block not stalled." "B_0x0,B_0x1" bitfld.long 0x0 0. "CLK3D_DIS,Clock 2D Disable. The AXI interface clock is the only block not stalled." "B_0x0,B_0x1" rgroup.long 0x4++0x3 line.long 0x0 "GPU_AQHIIDLE,GPU AQ Hi Idle Register" bitfld.long 0x0 31. "AXI_LP,AXI is in low power mode" "0,1" bitfld.long 0x0 14. "IDLE_MC,MC is idle" "0,1" newline bitfld.long 0x0 13. "IDLE_FE_BLT,FE BLT Parser is idle" "0,1" bitfld.long 0x0 12. "IDLE_BLT,BLT is idle" "0,1" newline bitfld.long 0x0 7. "IDLE_TX,TX is idle" "0,1" bitfld.long 0x0 6. "IDLE_RA,RA is idle" "0,1" newline bitfld.long 0x0 5. "IDLE_SE,SE is idle" "0,1" bitfld.long 0x0 3. "IDLE_SH,SH is idle" "0,1" newline bitfld.long 0x0 2. "IDLE_PE,PE is idle" "0,1" bitfld.long 0x0 0. "IDLE_FE,FE is idle" "0,1" rgroup.long 0xC++0x7 line.long 0x0 "GPU_AQAXISTATUS,GPU AQ AXI status register" bitfld.long 0x0 9. "DET_RD_ERR,1: Detect read error" "0,1" bitfld.long 0x0 8. "DET_WR_ERR,1: Detect write error" "0,1" newline hexmask.long.byte 0x0 4.--7. 1. "RD_ERR_ID,Read error ID" hexmask.long.byte 0x0 0.--3. 1. "WR_ERR_ID,Write error ID" line.long 0x4 "GPU_AQINTRACKNOWLEDGE,GPU AQ interrupt acknowledge register" hexmask.long 0x4 0.--31. 1. "INTR_VEC,Interrupt read-reset Vector." group.long 0x14++0x3 line.long 0x0 "GPU_AQINTRENBL,GPU AQ interrupt enable register" hexmask.long 0x0 0.--31. 1. "INTR_ENBL_VEC,Interrupt Enable Vector." rgroup.long 0x24++0x7 line.long 0x0 "GPU_GCCHIPREV,GPU GC chip revision register" hexmask.long 0x0 0.--31. 1. "REV,IP Revision number in BCD." line.long 0x4 "GPU_GCCHIPDATE,GPU GC chip date register" hexmask.long 0x4 0.--31. 1. "DATE,IP Date in BCD as YYYYMMDD." group.long 0x78++0x3 line.long 0x0 "GPU_GCTOTALCYCLES,GPU GC total cycles register" hexmask.long 0x0 0.--31. 1. "CYCLES,Total Cycles." rgroup.long 0x98++0x3 line.long 0x0 "GPU_GCREGHICHIPPATCHREV,GPU GC registration Hi chip patch revision register" hexmask.long.byte 0x0 0.--7. 1. "PATCH_REV,Patch revision level for the chip." rgroup.long 0xA8++0x3 line.long 0x0 "GPU_GCPRODUCTID,GPU GC product identification register" hexmask.long.byte 0x0 24.--27. 1. "TYPE,0:GC (2D or 3D Graphic Cores)" hexmask.long.tbyte 0x0 4.--23. 1. "NUM,Product Number: 0x8000 for this core." newline hexmask.long.byte 0x0 0.--3. 1. "GRADE_LEVEL,None" rgroup.long 0xE8++0x3 line.long 0x0 "GPU_GCECOID,GPU GC ECO identification register" hexmask.long.tbyte 0x0 8.--31. 1. "CONV_COUNT,Convolution Cores Count:" hexmask.long.byte 0x0 0.--7. 1. "ID,ECO ID." group.long 0x100++0x3 line.long 0x0 "GPU_GCMODULEPOWERCONTROLS,GPU GC module power control register" hexmask.long.word 0x0 16.--31. 1. "TURN_OFF_COUNTER,Counter value for clock gating the module if the module is idle for this amount of clock cycles." hexmask.long.byte 0x0 4.--7. 1. "TURN_ON_COUNTER,Number of clock cycles to wait after turning on the clock" newline bitfld.long 0x0 2. "DISABLE_STARVE_MODULE_CLOCK_GATING,Disables module level clock gating" "0,1" bitfld.long 0x0 1. "DISABLE_STALL_MODULE_CLOCK_GATING,Disables module level clock gating for stall condition." "0,1" newline bitfld.long 0x0 0. "ENABLE_MODULE_CLOCK_GATING,Enables module level clock gating" "0,1" wgroup.long 0x388++0x3 line.long 0x0 "GPU_GCREGMMUAHBCONTROL,GPU GC MMU AHB control register" bitfld.long 0x0 0. "MMU,Enable the MMU. For security reasons once the MMU is enabled it cannot be disabled anymore:" "B_0x0,B_0x1" group.long 0x38C++0x13 line.long 0x0 "GPU_GCREGMMUAHBTABLEARRAYBASEADDRESSLOW,GPU GC MMU AHB table array base address low register" hexmask.long 0x0 0.--31. 1. "ADDRESS,32 bit Address for MMU Table Array Base Low." line.long 0x4 "GPU_GCREGMMUAHBTABLEARRAYBASEADDRESSHIGH,GPU GC MMU AHB table array base address high register" bitfld.long 0x4 9. "MASTER_TLB_SHAREABLE,Bit that defines whether the master TLB address is shareable or not." "0,1" bitfld.long 0x4 8. "MASTER_TLB_SECURE,Bit that defines whether the master TLB address is secure or not" "0,1" newline hexmask.long.byte 0x4 0.--7. 1. "MASTER_TLB,Upper 8-bits of the master TLB address to form a true 40-bit address" line.long 0x8 "GPU_GCREGMMUAHBTABLEARRAYSIZE,GPU GC MMU AHB table array size register" hexmask.long.word 0x8 0.--15. 1. "SIZE,Size of MMU Table" line.long 0xC "GPU_GCREGMMUAHBSAFENONSECUREADDRESS,GPU GC MMU AHB safe non-secure address register" hexmask.long 0xC 0.--31. 1. "ADDRESS,A 64-byte address that acts as a 'safe' zone. Any address that would cause an exception is routed to this safe zone. Reads happen and writes go to this address but with a write-enable of 0. This register can only be programmed once after a.." line.long 0x10 "GPU_GCREGMMUAHBSAFESECUREADDRESS,GPU GC MMU AHB safe secure address register" hexmask.long 0x10 0.--31. 1. "ADDRESS,A 64-byte address that acts as a 'safe' zone. Any address that causes an exception is routed to this safe zone. Reads happen and writes go to this address but with a write-enable of 0. This register can only be programmed once after a reset -.." wgroup.long 0x3A4++0x3 line.long 0x0 "GPU_GCREGCMDBUFFERAHBCTRL,GPU GC command buffer AHB control register" bitfld.long 0x0 16. "ENABLE,Enable the command parser:" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "PREFETCH,Number of 64-bit words to fetch from the command buffer." group.long 0x3A8++0x7 line.long 0x0 "GPU_GCREGHIAHBCONTROL,GPU GC Hi AHB control register" bitfld.long 0x0 1. "DEBUG_MODE,Enable debug mode if disabled debug registers return 0xFFFF FFFF." "B_0x0,B_0x1" bitfld.long 0x0 0. "SOFT_RESET,Soft resets the IP:" "B_0x0,B_0x1" line.long 0x4 "GPU_GCREGAXIAHBCONFIG,GPU GC AXI AHB configuration register" hexmask.long.byte 0x4 20.--23. 1. "AXCACHE_OVERRIDE_SHARED,Force AXCACHE to this value when the transaction is shared" bitfld.long 0x4 18.--19. "AXDOMAIN_NON_SHARED,Which AXDOMAIN to choose when non-shared" "0,1,2,3" newline bitfld.long 0x4 16.--17. "AXDOMAIN_SHARED,Which AXDOMAIN to choose when shared" "0,1,2,3" hexmask.long.byte 0x4 12.--15. 1. "ARCACHE,Write CACHE attribute" newline hexmask.long.byte 0x4 8.--11. 1. "AWCACHE,Read CACHE attribute" hexmask.long.byte 0x4 4.--7. 1. "ARID,Read ID modifier" newline hexmask.long.byte 0x4 0.--3. 1. "AWID,Write ID" group.long 0x414++0x3 line.long 0x0 "GPU_AQMEMORYDEBUG,GPU AQ memory debug register" hexmask.long.byte 0x0 0.--7. 1. "MAX_OUTSTANDING_READS,Limits the total number of outstanding read requests." group.long 0x42C++0x3 line.long 0x0 "GPU_AQREGISTERTIMINGCONTROL,GPU AQ timing control register" bitfld.long 0x0 22. "LIGHT_SLEEP,Light sleep" "0,1" bitfld.long 0x0 21. "DEEP_SLEEP,Deep sleep" "0,1" newline bitfld.long 0x0 20. "POWER_DOWN,Power-down memory" "0,1" bitfld.long 0x0 18.--19. "FAST_WTC,WTC for fast rams" "0,1,2,3" newline bitfld.long 0x0 16.--17. "FAST_RTC,RTC for fast rams" "0,1,2,3" hexmask.long.byte 0x0 8.--15. 1. "FOR_RF2P,for 2 port RAM" newline hexmask.long.byte 0x0 0.--7. 1. "FOR_RF1P,for 4 port RAM" wgroup.long 0x654++0x3 line.long 0x0 "GPU_AQCMDBUFFERADDR,GPU AQ command buffer address register" bitfld.long 0x0 31. "TYPE,None" "B_0x0,B_0x1" hexmask.long 0x0 0.--30. 1. "ADDRESS,Base address for the command buffer." rgroup.long 0x664++0x3 line.long 0x0 "GPU_AQFEDEBUGCURCMDADR,GPU AQ FE debug current command address register" hexmask.long 0x0 3.--31. 1. "CUR_CMD_ADR,This is the command decoder address." tree.end tree "GPU_S" base ad:0x58280000 group.long 0x0++0x3 line.long 0x0 "GPU_AQHICLOCKCONTROL,GPU AQ Hi clock control register" bitfld.long 0x0 28. "SOFT_RESET_L2,Soft resets the L2." "0,1" hexmask.long.byte 0x0 20.--23. 1. "MULTI_PIPE_REG_SELECT,Determines which HI/MC to use while reading registers" newline bitfld.long 0x0 19. "ISOLATE_GPU,Isolate GPU bit" "0,1" rbitfld.long 0x0 16. "IDLE3_D,3D pipe is idle" "0,1" newline bitfld.long 0x0 13. "DISABLE_RAM_POWER_OPTIMIZATION,Disables ram power optimization" "0,1" bitfld.long 0x0 10. "DISABLE_RAM_CLOCK_GATING,Disables clock gating for rams" "0,1" newline bitfld.long 0x0 9. "FSCALE_CMD_LOAD,Core clock frequency scale value enable." "0,1" hexmask.long.byte 0x0 2.--8. 1. "FSCALE_VAL,Core clock frequency scale value" newline bitfld.long 0x0 1. "CLK2D_DIS,Clock 2D Disable. The AXI interface clock is the only block not stalled." "B_0x0,B_0x1" bitfld.long 0x0 0. "CLK3D_DIS,Clock 2D Disable. The AXI interface clock is the only block not stalled." "B_0x0,B_0x1" rgroup.long 0x4++0x3 line.long 0x0 "GPU_AQHIIDLE,GPU AQ Hi Idle Register" bitfld.long 0x0 31. "AXI_LP,AXI is in low power mode" "0,1" bitfld.long 0x0 14. "IDLE_MC,MC is idle" "0,1" newline bitfld.long 0x0 13. "IDLE_FE_BLT,FE BLT Parser is idle" "0,1" bitfld.long 0x0 12. "IDLE_BLT,BLT is idle" "0,1" newline bitfld.long 0x0 7. "IDLE_TX,TX is idle" "0,1" bitfld.long 0x0 6. "IDLE_RA,RA is idle" "0,1" newline bitfld.long 0x0 5. "IDLE_SE,SE is idle" "0,1" bitfld.long 0x0 3. "IDLE_SH,SH is idle" "0,1" newline bitfld.long 0x0 2. "IDLE_PE,PE is idle" "0,1" bitfld.long 0x0 0. "IDLE_FE,FE is idle" "0,1" rgroup.long 0xC++0x7 line.long 0x0 "GPU_AQAXISTATUS,GPU AQ AXI status register" bitfld.long 0x0 9. "DET_RD_ERR,1: Detect read error" "0,1" bitfld.long 0x0 8. "DET_WR_ERR,1: Detect write error" "0,1" newline hexmask.long.byte 0x0 4.--7. 1. "RD_ERR_ID,Read error ID" hexmask.long.byte 0x0 0.--3. 1. "WR_ERR_ID,Write error ID" line.long 0x4 "GPU_AQINTRACKNOWLEDGE,GPU AQ interrupt acknowledge register" hexmask.long 0x4 0.--31. 1. "INTR_VEC,Interrupt read-reset Vector." group.long 0x14++0x3 line.long 0x0 "GPU_AQINTRENBL,GPU AQ interrupt enable register" hexmask.long 0x0 0.--31. 1. "INTR_ENBL_VEC,Interrupt Enable Vector." rgroup.long 0x24++0x7 line.long 0x0 "GPU_GCCHIPREV,GPU GC chip revision register" hexmask.long 0x0 0.--31. 1. "REV,IP Revision number in BCD." line.long 0x4 "GPU_GCCHIPDATE,GPU GC chip date register" hexmask.long 0x4 0.--31. 1. "DATE,IP Date in BCD as YYYYMMDD." group.long 0x78++0x3 line.long 0x0 "GPU_GCTOTALCYCLES,GPU GC total cycles register" hexmask.long 0x0 0.--31. 1. "CYCLES,Total Cycles." rgroup.long 0x98++0x3 line.long 0x0 "GPU_GCREGHICHIPPATCHREV,GPU GC registration Hi chip patch revision register" hexmask.long.byte 0x0 0.--7. 1. "PATCH_REV,Patch revision level for the chip." rgroup.long 0xA8++0x3 line.long 0x0 "GPU_GCPRODUCTID,GPU GC product identification register" hexmask.long.byte 0x0 24.--27. 1. "TYPE,0:GC (2D or 3D Graphic Cores)" hexmask.long.tbyte 0x0 4.--23. 1. "NUM,Product Number: 0x8000 for this core." newline hexmask.long.byte 0x0 0.--3. 1. "GRADE_LEVEL,None" rgroup.long 0xE8++0x3 line.long 0x0 "GPU_GCECOID,GPU GC ECO identification register" hexmask.long.tbyte 0x0 8.--31. 1. "CONV_COUNT,Convolution Cores Count:" hexmask.long.byte 0x0 0.--7. 1. "ID,ECO ID." group.long 0x100++0x3 line.long 0x0 "GPU_GCMODULEPOWERCONTROLS,GPU GC module power control register" hexmask.long.word 0x0 16.--31. 1. "TURN_OFF_COUNTER,Counter value for clock gating the module if the module is idle for this amount of clock cycles." hexmask.long.byte 0x0 4.--7. 1. "TURN_ON_COUNTER,Number of clock cycles to wait after turning on the clock" newline bitfld.long 0x0 2. "DISABLE_STARVE_MODULE_CLOCK_GATING,Disables module level clock gating" "0,1" bitfld.long 0x0 1. "DISABLE_STALL_MODULE_CLOCK_GATING,Disables module level clock gating for stall condition." "0,1" newline bitfld.long 0x0 0. "ENABLE_MODULE_CLOCK_GATING,Enables module level clock gating" "0,1" wgroup.long 0x388++0x3 line.long 0x0 "GPU_GCREGMMUAHBCONTROL,GPU GC MMU AHB control register" bitfld.long 0x0 0. "MMU,Enable the MMU. For security reasons once the MMU is enabled it cannot be disabled anymore:" "B_0x0,B_0x1" group.long 0x38C++0x13 line.long 0x0 "GPU_GCREGMMUAHBTABLEARRAYBASEADDRESSLOW,GPU GC MMU AHB table array base address low register" hexmask.long 0x0 0.--31. 1. "ADDRESS,32 bit Address for MMU Table Array Base Low." line.long 0x4 "GPU_GCREGMMUAHBTABLEARRAYBASEADDRESSHIGH,GPU GC MMU AHB table array base address high register" bitfld.long 0x4 9. "MASTER_TLB_SHAREABLE,Bit that defines whether the master TLB address is shareable or not." "0,1" bitfld.long 0x4 8. "MASTER_TLB_SECURE,Bit that defines whether the master TLB address is secure or not" "0,1" newline hexmask.long.byte 0x4 0.--7. 1. "MASTER_TLB,Upper 8-bits of the master TLB address to form a true 40-bit address" line.long 0x8 "GPU_GCREGMMUAHBTABLEARRAYSIZE,GPU GC MMU AHB table array size register" hexmask.long.word 0x8 0.--15. 1. "SIZE,Size of MMU Table" line.long 0xC "GPU_GCREGMMUAHBSAFENONSECUREADDRESS,GPU GC MMU AHB safe non-secure address register" hexmask.long 0xC 0.--31. 1. "ADDRESS,A 64-byte address that acts as a 'safe' zone. Any address that would cause an exception is routed to this safe zone. Reads happen and writes go to this address but with a write-enable of 0. This register can only be programmed once after a.." line.long 0x10 "GPU_GCREGMMUAHBSAFESECUREADDRESS,GPU GC MMU AHB safe secure address register" hexmask.long 0x10 0.--31. 1. "ADDRESS,A 64-byte address that acts as a 'safe' zone. Any address that causes an exception is routed to this safe zone. Reads happen and writes go to this address but with a write-enable of 0. This register can only be programmed once after a reset -.." wgroup.long 0x3A4++0x3 line.long 0x0 "GPU_GCREGCMDBUFFERAHBCTRL,GPU GC command buffer AHB control register" bitfld.long 0x0 16. "ENABLE,Enable the command parser:" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "PREFETCH,Number of 64-bit words to fetch from the command buffer." group.long 0x3A8++0x7 line.long 0x0 "GPU_GCREGHIAHBCONTROL,GPU GC Hi AHB control register" bitfld.long 0x0 1. "DEBUG_MODE,Enable debug mode if disabled debug registers return 0xFFFF FFFF." "B_0x0,B_0x1" bitfld.long 0x0 0. "SOFT_RESET,Soft resets the IP:" "B_0x0,B_0x1" line.long 0x4 "GPU_GCREGAXIAHBCONFIG,GPU GC AXI AHB configuration register" hexmask.long.byte 0x4 20.--23. 1. "AXCACHE_OVERRIDE_SHARED,Force AXCACHE to this value when the transaction is shared" bitfld.long 0x4 18.--19. "AXDOMAIN_NON_SHARED,Which AXDOMAIN to choose when non-shared" "0,1,2,3" newline bitfld.long 0x4 16.--17. "AXDOMAIN_SHARED,Which AXDOMAIN to choose when shared" "0,1,2,3" hexmask.long.byte 0x4 12.--15. 1. "ARCACHE,Write CACHE attribute" newline hexmask.long.byte 0x4 8.--11. 1. "AWCACHE,Read CACHE attribute" hexmask.long.byte 0x4 4.--7. 1. "ARID,Read ID modifier" newline hexmask.long.byte 0x4 0.--3. 1. "AWID,Write ID" group.long 0x414++0x3 line.long 0x0 "GPU_AQMEMORYDEBUG,GPU AQ memory debug register" hexmask.long.byte 0x0 0.--7. 1. "MAX_OUTSTANDING_READS,Limits the total number of outstanding read requests." group.long 0x42C++0x3 line.long 0x0 "GPU_AQREGISTERTIMINGCONTROL,GPU AQ timing control register" bitfld.long 0x0 22. "LIGHT_SLEEP,Light sleep" "0,1" bitfld.long 0x0 21. "DEEP_SLEEP,Deep sleep" "0,1" newline bitfld.long 0x0 20. "POWER_DOWN,Power-down memory" "0,1" bitfld.long 0x0 18.--19. "FAST_WTC,WTC for fast rams" "0,1,2,3" newline bitfld.long 0x0 16.--17. "FAST_RTC,RTC for fast rams" "0,1,2,3" hexmask.long.byte 0x0 8.--15. 1. "FOR_RF2P,for 2 port RAM" newline hexmask.long.byte 0x0 0.--7. 1. "FOR_RF1P,for 4 port RAM" wgroup.long 0x654++0x3 line.long 0x0 "GPU_AQCMDBUFFERADDR,GPU AQ command buffer address register" bitfld.long 0x0 31. "TYPE,None" "B_0x0,B_0x1" hexmask.long 0x0 0.--30. 1. "ADDRESS,Base address for the command buffer." rgroup.long 0x664++0x3 line.long 0x0 "GPU_AQFEDEBUGCURCMDADR,GPU AQ FE debug current command address register" hexmask.long 0x0 3.--31. 1. "CUR_CMD_ADR,This is the command decoder address." tree.end tree.end tree "HASH (Hash Processor)" base ad:0x0 tree "HASH" base ad:0x42010000 group.long 0x0++0x3 line.long 0x0 "HASH_CR,HASH control register" hexmask.long.byte 0x0 17.--20. 1. "ALGO,Algorithm selection" bitfld.long 0x0 16. "LKEY,Long key selection" "B_0x0,B_0x1" bitfld.long 0x0 13. "MDMAT,Multiple DMA transfers" "B_0x0,B_0x1" rbitfld.long 0x0 12. "DINNE,DIN not empty" "0,1" hexmask.long.byte 0x0 8.--11. 1. "NBW,Number of words already pushed" bitfld.long 0x0 6. "MODE,Mode selection" "B_0x0,B_0x1" bitfld.long 0x0 4.--5. "DATATYPE,Data type selection" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 3. "DMAE,DMA enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "INIT,Initialize message digest calculation" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "HASH_DIN,HASH data input register" hexmask.long 0x0 0.--31. 1. "DATAIN,Data input" group.long 0x8++0x3 line.long 0x0 "HASH_STR,HASH start register" bitfld.long 0x0 8. "DCAL,Digest calculation" "0,1" hexmask.long.byte 0x0 0.--4. 1. "NBLW,Number of valid bits in the last word" rgroup.long 0xC++0x13 line.long 0x0 "HASH_HRA0,HASH aliased digest register 0" hexmask.long 0x0 0.--31. 1. "H0,Hash data x" line.long 0x4 "HASH_HRA1,HASH aliased digest register 1" hexmask.long 0x4 0.--31. 1. "H1,Hash data x" line.long 0x8 "HASH_HRA2,HASH aliased digest register 2" hexmask.long 0x8 0.--31. 1. "H2,Hash data x" line.long 0xC "HASH_HRA3,HASH aliased digest register 3" hexmask.long 0xC 0.--31. 1. "H3,Hash data x" line.long 0x10 "HASH_HRA4,HASH aliased digest register 4" hexmask.long 0x10 0.--31. 1. "H4,Hash data x" group.long 0x20++0xB line.long 0x0 "HASH_IMR,HASH interrupt enable register" bitfld.long 0x0 1. "DCIE,Digest calculation completion interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "DINIE,Data input interrupt enable" "B_0x0,B_0x1" line.long 0x4 "HASH_SR,HASH status register" hexmask.long.byte 0x4 16.--21. 1. "NBWE,Number of words expected" rbitfld.long 0x4 15. "DINNE,DIN not empty" "B_0x0,B_0x1" hexmask.long.byte 0x4 9.--14. 1. "NBWP,Number of words already pushed" rbitfld.long 0x4 3. "BUSY,Busy bit" "B_0x0,B_0x1" rbitfld.long 0x4 2. "DMAS,DMA Status" "B_0x0,B_0x1" bitfld.long 0x4 1. "DCIS,Digest calculation completion interrupt status" "B_0x0,B_0x1" bitfld.long 0x4 0. "DINIS,Data input interrupt status" "B_0x0,B_0x1" line.long 0x8 "HASH_SHA3CFGR,HASH SHA-3 configuration register" hexmask.long.byte 0x8 19.--24. 1. "IN_RATE,Input rate" hexmask.long.byte 0x8 14.--18. 1. "END_RND,Last round number" hexmask.long.byte 0x8 9.--13. 1. "START_RND,Starting round number" bitfld.long 0x8 8. "PADCONFIG,Padding bit configuration" "B_0x0,B_0x1" hexmask.long.byte 0x8 0.--7. 1. "PADBYTE,Padding byte value" group.long 0xF8++0x19B line.long 0x0 "HASH_CSR0,HASH context swap register 0" hexmask.long 0x0 0.--31. 1. "CS0,Context swap x" line.long 0x4 "HASH_CSR1,HASH context swap register 1" hexmask.long 0x4 0.--31. 1. "CS1,Context swap x" line.long 0x8 "HASH_CSR2,HASH context swap register 2" hexmask.long 0x8 0.--31. 1. "CS2,Context swap x" line.long 0xC "HASH_CSR3,HASH context swap register 3" hexmask.long 0xC 0.--31. 1. "CS3,Context swap x" line.long 0x10 "HASH_CSR4,HASH context swap register 4" hexmask.long 0x10 0.--31. 1. "CS4,Context swap x" line.long 0x14 "HASH_CSR5,HASH context swap register 5" hexmask.long 0x14 0.--31. 1. "CS5,Context swap x" line.long 0x18 "HASH_CSR6,HASH context swap register 6" hexmask.long 0x18 0.--31. 1. "CS6,Context swap x" line.long 0x1C "HASH_CSR7,HASH context swap register 7" hexmask.long 0x1C 0.--31. 1. "CS7,Context swap x" line.long 0x20 "HASH_CSR8,HASH context swap register 8" hexmask.long 0x20 0.--31. 1. "CS8,Context swap x" line.long 0x24 "HASH_CSR9,HASH context swap register 9" hexmask.long 0x24 0.--31. 1. "CS9,Context swap x" line.long 0x28 "HASH_CSR10,HASH context swap register 10" hexmask.long 0x28 0.--31. 1. "CS10,Context swap x" line.long 0x2C "HASH_CSR11,HASH context swap register 11" hexmask.long 0x2C 0.--31. 1. "CS11,Context swap x" line.long 0x30 "HASH_CSR12,HASH context swap register 12" hexmask.long 0x30 0.--31. 1. "CS12,Context swap x" line.long 0x34 "HASH_CSR13,HASH context swap register 13" hexmask.long 0x34 0.--31. 1. "CS13,Context swap x" line.long 0x38 "HASH_CSR14,HASH context swap register 14" hexmask.long 0x38 0.--31. 1. "CS14,Context swap x" line.long 0x3C "HASH_CSR15,HASH context swap register 15" hexmask.long 0x3C 0.--31. 1. "CS15,Context swap x" line.long 0x40 "HASH_CSR16,HASH context swap register 16" hexmask.long 0x40 0.--31. 1. "CS16,Context swap x" line.long 0x44 "HASH_CSR17,HASH context swap register 17" hexmask.long 0x44 0.--31. 1. "CS17,Context swap x" line.long 0x48 "HASH_CSR18,HASH context swap register 18" hexmask.long 0x48 0.--31. 1. "CS18,Context swap x" line.long 0x4C "HASH_CSR19,HASH context swap register 19" hexmask.long 0x4C 0.--31. 1. "CS19,Context swap x" line.long 0x50 "HASH_CSR20,HASH context swap register 20" hexmask.long 0x50 0.--31. 1. "CS20,Context swap x" line.long 0x54 "HASH_CSR21,HASH context swap register 21" hexmask.long 0x54 0.--31. 1. "CS21,Context swap x" line.long 0x58 "HASH_CSR22,HASH context swap register 22" hexmask.long 0x58 0.--31. 1. "CS22,Context swap x" line.long 0x5C "HASH_CSR23,HASH context swap register 23" hexmask.long 0x5C 0.--31. 1. "CS23,Context swap x" line.long 0x60 "HASH_CSR24,HASH context swap register 24" hexmask.long 0x60 0.--31. 1. "CS24,Context swap x" line.long 0x64 "HASH_CSR25,HASH context swap register 25" hexmask.long 0x64 0.--31. 1. "CS25,Context swap x" line.long 0x68 "HASH_CSR26,HASH context swap register 26" hexmask.long 0x68 0.--31. 1. "CS26,Context swap x" line.long 0x6C "HASH_CSR27,HASH context swap register 27" hexmask.long 0x6C 0.--31. 1. "CS27,Context swap x" line.long 0x70 "HASH_CSR28,HASH context swap register 28" hexmask.long 0x70 0.--31. 1. "CS28,Context swap x" line.long 0x74 "HASH_CSR29,HASH context swap register 29" hexmask.long 0x74 0.--31. 1. "CS29,Context swap x" line.long 0x78 "HASH_CSR30,HASH context swap register 30" hexmask.long 0x78 0.--31. 1. "CS30,Context swap x" line.long 0x7C "HASH_CSR31,HASH context swap register 31" hexmask.long 0x7C 0.--31. 1. "CS31,Context swap x" line.long 0x80 "HASH_CSR32,HASH context swap register 32" hexmask.long 0x80 0.--31. 1. "CS32,Context swap x" line.long 0x84 "HASH_CSR33,HASH context swap register 33" hexmask.long 0x84 0.--31. 1. "CS33,Context swap x" line.long 0x88 "HASH_CSR34,HASH context swap register 34" hexmask.long 0x88 0.--31. 1. "CS34,Context swap x" line.long 0x8C "HASH_CSR35,HASH context swap register 35" hexmask.long 0x8C 0.--31. 1. "CS35,Context swap x" line.long 0x90 "HASH_CSR36,HASH context swap register 36" hexmask.long 0x90 0.--31. 1. "CS36,Context swap x" line.long 0x94 "HASH_CSR37,HASH context swap register 37" hexmask.long 0x94 0.--31. 1. "CS37,Context swap x" line.long 0x98 "HASH_CSR38,HASH context swap register 38" hexmask.long 0x98 0.--31. 1. "CS38,Context swap x" line.long 0x9C "HASH_CSR39,HASH context swap register 39" hexmask.long 0x9C 0.--31. 1. "CS39,Context swap x" line.long 0xA0 "HASH_CSR40,HASH context swap register 40" hexmask.long 0xA0 0.--31. 1. "CS40,Context swap x" line.long 0xA4 "HASH_CSR41,HASH context swap register 41" hexmask.long 0xA4 0.--31. 1. "CS41,Context swap x" line.long 0xA8 "HASH_CSR42,HASH context swap register 42" hexmask.long 0xA8 0.--31. 1. "CS42,Context swap x" line.long 0xAC "HASH_CSR43,HASH context swap register 43" hexmask.long 0xAC 0.--31. 1. "CS43,Context swap x" line.long 0xB0 "HASH_CSR44,HASH context swap register 44" hexmask.long 0xB0 0.--31. 1. "CS44,Context swap x" line.long 0xB4 "HASH_CSR45,HASH context swap register 45" hexmask.long 0xB4 0.--31. 1. "CS45,Context swap x" line.long 0xB8 "HASH_CSR46,HASH context swap register 46" hexmask.long 0xB8 0.--31. 1. "CS46,Context swap x" line.long 0xBC "HASH_CSR47,HASH context swap register 47" hexmask.long 0xBC 0.--31. 1. "CS47,Context swap x" line.long 0xC0 "HASH_CSR48,HASH context swap register 48" hexmask.long 0xC0 0.--31. 1. "CS48,Context swap x" line.long 0xC4 "HASH_CSR49,HASH context swap register 49" hexmask.long 0xC4 0.--31. 1. "CS49,Context swap x" line.long 0xC8 "HASH_CSR50,HASH context swap register 50" hexmask.long 0xC8 0.--31. 1. "CS50,Context swap x" line.long 0xCC "HASH_CSR51,HASH context swap register 51" hexmask.long 0xCC 0.--31. 1. "CS51,Context swap x" line.long 0xD0 "HASH_CSR52,HASH context swap register 52" hexmask.long 0xD0 0.--31. 1. "CS52,Context swap x" line.long 0xD4 "HASH_CSR53,HASH context swap register 53" hexmask.long 0xD4 0.--31. 1. "CS53,Context swap x" line.long 0xD8 "HASH_CSR54,HASH context swap register 54" hexmask.long 0xD8 0.--31. 1. "CS54,Context swap x" line.long 0xDC "HASH_CSR55,HASH context swap register 55" hexmask.long 0xDC 0.--31. 1. "CS55,Context swap x" line.long 0xE0 "HASH_CSR56,HASH context swap register 56" hexmask.long 0xE0 0.--31. 1. "CS56,Context swap x" line.long 0xE4 "HASH_CSR57,HASH context swap register 57" hexmask.long 0xE4 0.--31. 1. "CS57,Context swap x" line.long 0xE8 "HASH_CSR58,HASH context swap register 58" hexmask.long 0xE8 0.--31. 1. "CS58,Context swap x" line.long 0xEC "HASH_CSR59,HASH context swap register 59" hexmask.long 0xEC 0.--31. 1. "CS59,Context swap x" line.long 0xF0 "HASH_CSR60,HASH context swap register 60" hexmask.long 0xF0 0.--31. 1. "CS60,Context swap x" line.long 0xF4 "HASH_CSR61,HASH context swap register 61" hexmask.long 0xF4 0.--31. 1. "CS61,Context swap x" line.long 0xF8 "HASH_CSR62,HASH context swap register 62" hexmask.long 0xF8 0.--31. 1. "CS62,Context swap x" line.long 0xFC "HASH_CSR63,HASH context swap register 63" hexmask.long 0xFC 0.--31. 1. "CS63,Context swap x" line.long 0x100 "HASH_CSR64,HASH context swap register 64" hexmask.long 0x100 0.--31. 1. "CS64,Context swap x" line.long 0x104 "HASH_CSR65,HASH context swap register 65" hexmask.long 0x104 0.--31. 1. "CS65,Context swap x" line.long 0x108 "HASH_CSR66,HASH context swap register 66" hexmask.long 0x108 0.--31. 1. "CS66,Context swap x" line.long 0x10C "HASH_CSR67,HASH context swap register 67" hexmask.long 0x10C 0.--31. 1. "CS67,Context swap x" line.long 0x110 "HASH_CSR68,HASH context swap register 68" hexmask.long 0x110 0.--31. 1. "CS68,Context swap x" line.long 0x114 "HASH_CSR69,HASH context swap register 69" hexmask.long 0x114 0.--31. 1. "CS69,Context swap x" line.long 0x118 "HASH_CSR70,HASH context swap register 70" hexmask.long 0x118 0.--31. 1. "CS70,Context swap x" line.long 0x11C "HASH_CSR71,HASH context swap register 71" hexmask.long 0x11C 0.--31. 1. "CS71,Context swap x" line.long 0x120 "HASH_CSR72,HASH context swap register 72" hexmask.long 0x120 0.--31. 1. "CS72,Context swap x" line.long 0x124 "HASH_CSR73,HASH context swap register 73" hexmask.long 0x124 0.--31. 1. "CS73,Context swap x" line.long 0x128 "HASH_CSR74,HASH context swap register 74" hexmask.long 0x128 0.--31. 1. "CS74,Context swap x" line.long 0x12C "HASH_CSR75,HASH context swap register 75" hexmask.long 0x12C 0.--31. 1. "CS75,Context swap x" line.long 0x130 "HASH_CSR76,HASH context swap register 76" hexmask.long 0x130 0.--31. 1. "CS76,Context swap x" line.long 0x134 "HASH_CSR77,HASH context swap register 77" hexmask.long 0x134 0.--31. 1. "CS77,Context swap x" line.long 0x138 "HASH_CSR78,HASH context swap register 78" hexmask.long 0x138 0.--31. 1. "CS78,Context swap x" line.long 0x13C "HASH_CSR79,HASH context swap register 79" hexmask.long 0x13C 0.--31. 1. "CS79,Context swap x" line.long 0x140 "HASH_CSR80,HASH context swap register 80" hexmask.long 0x140 0.--31. 1. "CS80,Context swap x" line.long 0x144 "HASH_CSR81,HASH context swap register 81" hexmask.long 0x144 0.--31. 1. "CS81,Context swap x" line.long 0x148 "HASH_CSR82,HASH context swap register 82" hexmask.long 0x148 0.--31. 1. "CS82,Context swap x" line.long 0x14C "HASH_CSR83,HASH context swap register 83" hexmask.long 0x14C 0.--31. 1. "CS83,Context swap x" line.long 0x150 "HASH_CSR84,HASH context swap register 84" hexmask.long 0x150 0.--31. 1. "CS84,Context swap x" line.long 0x154 "HASH_CSR85,HASH context swap register 85" hexmask.long 0x154 0.--31. 1. "CS85,Context swap x" line.long 0x158 "HASH_CSR86,HASH context swap register 86" hexmask.long 0x158 0.--31. 1. "CS86,Context swap x" line.long 0x15C "HASH_CSR87,HASH context swap register 87" hexmask.long 0x15C 0.--31. 1. "CS87,Context swap x" line.long 0x160 "HASH_CSR88,HASH context swap register 88" hexmask.long 0x160 0.--31. 1. "CS88,Context swap x" line.long 0x164 "HASH_CSR89,HASH context swap register 89" hexmask.long 0x164 0.--31. 1. "CS89,Context swap x" line.long 0x168 "HASH_CSR90,HASH context swap register 90" hexmask.long 0x168 0.--31. 1. "CS90,Context swap x" line.long 0x16C "HASH_CSR91,HASH context swap register 91" hexmask.long 0x16C 0.--31. 1. "CS91,Context swap x" line.long 0x170 "HASH_CSR92,HASH context swap register 92" hexmask.long 0x170 0.--31. 1. "CS92,Context swap x" line.long 0x174 "HASH_CSR93,HASH context swap register 93" hexmask.long 0x174 0.--31. 1. "CS93,Context swap x" line.long 0x178 "HASH_CSR94,HASH context swap register 94" hexmask.long 0x178 0.--31. 1. "CS94,Context swap x" line.long 0x17C "HASH_CSR95,HASH context swap register 95" hexmask.long 0x17C 0.--31. 1. "CS95,Context swap x" line.long 0x180 "HASH_CSR96,HASH context swap register 96" hexmask.long 0x180 0.--31. 1. "CS96,Context swap x" line.long 0x184 "HASH_CSR97,HASH context swap register 97" hexmask.long 0x184 0.--31. 1. "CS97,Context swap x" line.long 0x188 "HASH_CSR98,HASH context swap register 98" hexmask.long 0x188 0.--31. 1. "CS98,Context swap x" line.long 0x18C "HASH_CSR99,HASH context swap register 99" hexmask.long 0x18C 0.--31. 1. "CS99,Context swap x" line.long 0x190 "HASH_CSR100,HASH context swap register 100" hexmask.long 0x190 0.--31. 1. "CS100,Context swap x" line.long 0x194 "HASH_CSR101,HASH context swap register 101" hexmask.long 0x194 0.--31. 1. "CS101,Context swap x" line.long 0x198 "HASH_CSR102,HASH context swap register 102" hexmask.long 0x198 0.--31. 1. "CS102,Context swap x" rgroup.long 0x310++0xC7 line.long 0x0 "HASH_HR0,HASH digest register 0" hexmask.long 0x0 0.--31. 1. "H0,Hash data x" line.long 0x4 "HASH_HR1,HASH digest register 1" hexmask.long 0x4 0.--31. 1. "H1,Hash data x" line.long 0x8 "HASH_HR2,HASH digest register 2" hexmask.long 0x8 0.--31. 1. "H2,Hash data x" line.long 0xC "HASH_HR3,HASH digest register 3" hexmask.long 0xC 0.--31. 1. "H3,Hash data x" line.long 0x10 "HASH_HR4,HASH digest register 4" hexmask.long 0x10 0.--31. 1. "H4,Hash data x" line.long 0x14 "HASH_HR5,HASH supplementary digest register 5" hexmask.long 0x14 0.--31. 1. "H5,Hash data x" line.long 0x18 "HASH_HR6,HASH supplementary digest register 6" hexmask.long 0x18 0.--31. 1. "H6,Hash data x" line.long 0x1C "HASH_HR7,HASH supplementary digest register 7" hexmask.long 0x1C 0.--31. 1. "H7,Hash data x" line.long 0x20 "HASH_HR8,HASH supplementary digest register 8" hexmask.long 0x20 0.--31. 1. "H8,Hash data x" line.long 0x24 "HASH_HR9,HASH supplementary digest register 9" hexmask.long 0x24 0.--31. 1. "H9,Hash data x" line.long 0x28 "HASH_HR10,HASH supplementary digest register 10" hexmask.long 0x28 0.--31. 1. "H10,Hash data x" line.long 0x2C "HASH_HR11,HASH supplementary digest register 11" hexmask.long 0x2C 0.--31. 1. "H11,Hash data x" line.long 0x30 "HASH_HR12,HASH supplementary digest register 12" hexmask.long 0x30 0.--31. 1. "H12,Hash data x" line.long 0x34 "HASH_HR13,HASH supplementary digest register 13" hexmask.long 0x34 0.--31. 1. "H13,Hash data x" line.long 0x38 "HASH_HR14,HASH supplementary digest register 14" hexmask.long 0x38 0.--31. 1. "H14,Hash data x" line.long 0x3C "HASH_HR15,HASH supplementary digest register 15" hexmask.long 0x3C 0.--31. 1. "H15,Hash data x" line.long 0x40 "HASH_HR16,HASH supplementary digest register 16" hexmask.long 0x40 0.--31. 1. "H16,Hash data x" line.long 0x44 "HASH_HR17,HASH supplementary digest register 17" hexmask.long 0x44 0.--31. 1. "H17,Hash data x" line.long 0x48 "HASH_HR18,HASH supplementary digest register 18" hexmask.long 0x48 0.--31. 1. "H18,Hash data x" line.long 0x4C "HASH_HR19,HASH supplementary digest register 19" hexmask.long 0x4C 0.--31. 1. "H19,Hash data x" line.long 0x50 "HASH_HR20,HASH supplementary digest register 20" hexmask.long 0x50 0.--31. 1. "H20,Hash data x" line.long 0x54 "HASH_HR21,HASH supplementary digest register 21" hexmask.long 0x54 0.--31. 1. "H21,Hash data x" line.long 0x58 "HASH_HR22,HASH supplementary digest register 22" hexmask.long 0x58 0.--31. 1. "H22,Hash data x" line.long 0x5C "HASH_HR23,HASH supplementary digest register 23" hexmask.long 0x5C 0.--31. 1. "H23,Hash data x" line.long 0x60 "HASH_HR24,HASH supplementary digest register 24" hexmask.long 0x60 0.--31. 1. "H24,Hash data x" line.long 0x64 "HASH_HR25,HASH supplementary digest register 25" hexmask.long 0x64 0.--31. 1. "H25,Hash data x" line.long 0x68 "HASH_HR26,HASH supplementary digest register 26" hexmask.long 0x68 0.--31. 1. "H26,Hash data x" line.long 0x6C "HASH_HR27,HASH supplementary digest register 27" hexmask.long 0x6C 0.--31. 1. "H27,Hash data x" line.long 0x70 "HASH_HR28,HASH supplementary digest register 28" hexmask.long 0x70 0.--31. 1. "H28,Hash data x" line.long 0x74 "HASH_HR29,HASH supplementary digest register 29" hexmask.long 0x74 0.--31. 1. "H29,Hash data x" line.long 0x78 "HASH_HR30,HASH supplementary digest register 30" hexmask.long 0x78 0.--31. 1. "H30,Hash data x" line.long 0x7C "HASH_HR31,HASH supplementary digest register 31" hexmask.long 0x7C 0.--31. 1. "H31,Hash data x" line.long 0x80 "HASH_HR32,HASH supplementary digest register 32" hexmask.long 0x80 0.--31. 1. "H32,Hash data x" line.long 0x84 "HASH_HR33,HASH supplementary digest register 33" hexmask.long 0x84 0.--31. 1. "H33,Hash data x" line.long 0x88 "HASH_HR34,HASH supplementary digest register 34" hexmask.long 0x88 0.--31. 1. "H34,Hash data x" line.long 0x8C "HASH_HR35,HASH supplementary digest register 35" hexmask.long 0x8C 0.--31. 1. "H35,Hash data x" line.long 0x90 "HASH_HR36,HASH supplementary digest register 36" hexmask.long 0x90 0.--31. 1. "H36,Hash data x" line.long 0x94 "HASH_HR37,HASH supplementary digest register 37" hexmask.long 0x94 0.--31. 1. "H37,Hash data x" line.long 0x98 "HASH_HR38,HASH supplementary digest register 38" hexmask.long 0x98 0.--31. 1. "H38,Hash data x" line.long 0x9C "HASH_HR39,HASH supplementary digest register 39" hexmask.long 0x9C 0.--31. 1. "H39,Hash data x" line.long 0xA0 "HASH_HR40,HASH supplementary digest register 40" hexmask.long 0xA0 0.--31. 1. "H40,Hash data x" line.long 0xA4 "HASH_HR41,HASH supplementary digest register 41" hexmask.long 0xA4 0.--31. 1. "H41,Hash data x" line.long 0xA8 "HASH_HR42,HASH supplementary digest register 42" hexmask.long 0xA8 0.--31. 1. "H42,Hash data x" line.long 0xAC "HASH_HR43,HASH supplementary digest register 43" hexmask.long 0xAC 0.--31. 1. "H43,Hash data x" line.long 0xB0 "HASH_HR44,HASH supplementary digest register 44" hexmask.long 0xB0 0.--31. 1. "H44,Hash data x" line.long 0xB4 "HASH_HR45,HASH supplementary digest register 45" hexmask.long 0xB4 0.--31. 1. "H45,Hash data x" line.long 0xB8 "HASH_HR46,HASH supplementary digest register 46" hexmask.long 0xB8 0.--31. 1. "H46,Hash data x" line.long 0xBC "HASH_HR47,HASH supplementary digest register 47" hexmask.long 0xBC 0.--31. 1. "H47,Hash data x" line.long 0xC0 "HASH_HR48,HASH supplementary digest register 48" hexmask.long 0xC0 0.--31. 1. "H48,Hash data x" line.long 0xC4 "HASH_HR49,HASH supplementary digest register 49" hexmask.long 0xC4 0.--31. 1. "H49,Hash data x" rgroup.long 0x3F0++0xF line.long 0x0 "HASH_HWCFGR,HASH hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "CFG5,HW generic 5" hexmask.long.byte 0x0 12.--15. 1. "CFG4,HW generic 4" hexmask.long.byte 0x0 8.--11. 1. "CFG3,HW generic 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,HW generic 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,HW generic 1" line.long 0x4 "HASH_VERR,HASH version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "HASH_IPIDR,HASH identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier" line.long 0xC "HASH_SIDR,HASH size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code" tree.end tree "HASH_S" base ad:0x52010000 group.long 0x0++0x3 line.long 0x0 "HASH_CR,HASH control register" hexmask.long.byte 0x0 17.--20. 1. "ALGO,Algorithm selection" bitfld.long 0x0 16. "LKEY,Long key selection" "B_0x0,B_0x1" bitfld.long 0x0 13. "MDMAT,Multiple DMA transfers" "B_0x0,B_0x1" rbitfld.long 0x0 12. "DINNE,DIN not empty" "0,1" hexmask.long.byte 0x0 8.--11. 1. "NBW,Number of words already pushed" bitfld.long 0x0 6. "MODE,Mode selection" "B_0x0,B_0x1" bitfld.long 0x0 4.--5. "DATATYPE,Data type selection" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 3. "DMAE,DMA enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "INIT,Initialize message digest calculation" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "HASH_DIN,HASH data input register" hexmask.long 0x0 0.--31. 1. "DATAIN,Data input" group.long 0x8++0x3 line.long 0x0 "HASH_STR,HASH start register" bitfld.long 0x0 8. "DCAL,Digest calculation" "0,1" hexmask.long.byte 0x0 0.--4. 1. "NBLW,Number of valid bits in the last word" rgroup.long 0xC++0x13 line.long 0x0 "HASH_HRA0,HASH aliased digest register 0" hexmask.long 0x0 0.--31. 1. "H0,Hash data x" line.long 0x4 "HASH_HRA1,HASH aliased digest register 1" hexmask.long 0x4 0.--31. 1. "H1,Hash data x" line.long 0x8 "HASH_HRA2,HASH aliased digest register 2" hexmask.long 0x8 0.--31. 1. "H2,Hash data x" line.long 0xC "HASH_HRA3,HASH aliased digest register 3" hexmask.long 0xC 0.--31. 1. "H3,Hash data x" line.long 0x10 "HASH_HRA4,HASH aliased digest register 4" hexmask.long 0x10 0.--31. 1. "H4,Hash data x" group.long 0x20++0xB line.long 0x0 "HASH_IMR,HASH interrupt enable register" bitfld.long 0x0 1. "DCIE,Digest calculation completion interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "DINIE,Data input interrupt enable" "B_0x0,B_0x1" line.long 0x4 "HASH_SR,HASH status register" hexmask.long.byte 0x4 16.--21. 1. "NBWE,Number of words expected" rbitfld.long 0x4 15. "DINNE,DIN not empty" "B_0x0,B_0x1" hexmask.long.byte 0x4 9.--14. 1. "NBWP,Number of words already pushed" rbitfld.long 0x4 3. "BUSY,Busy bit" "B_0x0,B_0x1" rbitfld.long 0x4 2. "DMAS,DMA Status" "B_0x0,B_0x1" bitfld.long 0x4 1. "DCIS,Digest calculation completion interrupt status" "B_0x0,B_0x1" bitfld.long 0x4 0. "DINIS,Data input interrupt status" "B_0x0,B_0x1" line.long 0x8 "HASH_SHA3CFGR,HASH SHA-3 configuration register" hexmask.long.byte 0x8 19.--24. 1. "IN_RATE,Input rate" hexmask.long.byte 0x8 14.--18. 1. "END_RND,Last round number" hexmask.long.byte 0x8 9.--13. 1. "START_RND,Starting round number" bitfld.long 0x8 8. "PADCONFIG,Padding bit configuration" "B_0x0,B_0x1" hexmask.long.byte 0x8 0.--7. 1. "PADBYTE,Padding byte value" group.long 0xF8++0x19B line.long 0x0 "HASH_CSR0,HASH context swap register 0" hexmask.long 0x0 0.--31. 1. "CS0,Context swap x" line.long 0x4 "HASH_CSR1,HASH context swap register 1" hexmask.long 0x4 0.--31. 1. "CS1,Context swap x" line.long 0x8 "HASH_CSR2,HASH context swap register 2" hexmask.long 0x8 0.--31. 1. "CS2,Context swap x" line.long 0xC "HASH_CSR3,HASH context swap register 3" hexmask.long 0xC 0.--31. 1. "CS3,Context swap x" line.long 0x10 "HASH_CSR4,HASH context swap register 4" hexmask.long 0x10 0.--31. 1. "CS4,Context swap x" line.long 0x14 "HASH_CSR5,HASH context swap register 5" hexmask.long 0x14 0.--31. 1. "CS5,Context swap x" line.long 0x18 "HASH_CSR6,HASH context swap register 6" hexmask.long 0x18 0.--31. 1. "CS6,Context swap x" line.long 0x1C "HASH_CSR7,HASH context swap register 7" hexmask.long 0x1C 0.--31. 1. "CS7,Context swap x" line.long 0x20 "HASH_CSR8,HASH context swap register 8" hexmask.long 0x20 0.--31. 1. "CS8,Context swap x" line.long 0x24 "HASH_CSR9,HASH context swap register 9" hexmask.long 0x24 0.--31. 1. "CS9,Context swap x" line.long 0x28 "HASH_CSR10,HASH context swap register 10" hexmask.long 0x28 0.--31. 1. "CS10,Context swap x" line.long 0x2C "HASH_CSR11,HASH context swap register 11" hexmask.long 0x2C 0.--31. 1. "CS11,Context swap x" line.long 0x30 "HASH_CSR12,HASH context swap register 12" hexmask.long 0x30 0.--31. 1. "CS12,Context swap x" line.long 0x34 "HASH_CSR13,HASH context swap register 13" hexmask.long 0x34 0.--31. 1. "CS13,Context swap x" line.long 0x38 "HASH_CSR14,HASH context swap register 14" hexmask.long 0x38 0.--31. 1. "CS14,Context swap x" line.long 0x3C "HASH_CSR15,HASH context swap register 15" hexmask.long 0x3C 0.--31. 1. "CS15,Context swap x" line.long 0x40 "HASH_CSR16,HASH context swap register 16" hexmask.long 0x40 0.--31. 1. "CS16,Context swap x" line.long 0x44 "HASH_CSR17,HASH context swap register 17" hexmask.long 0x44 0.--31. 1. "CS17,Context swap x" line.long 0x48 "HASH_CSR18,HASH context swap register 18" hexmask.long 0x48 0.--31. 1. "CS18,Context swap x" line.long 0x4C "HASH_CSR19,HASH context swap register 19" hexmask.long 0x4C 0.--31. 1. "CS19,Context swap x" line.long 0x50 "HASH_CSR20,HASH context swap register 20" hexmask.long 0x50 0.--31. 1. "CS20,Context swap x" line.long 0x54 "HASH_CSR21,HASH context swap register 21" hexmask.long 0x54 0.--31. 1. "CS21,Context swap x" line.long 0x58 "HASH_CSR22,HASH context swap register 22" hexmask.long 0x58 0.--31. 1. "CS22,Context swap x" line.long 0x5C "HASH_CSR23,HASH context swap register 23" hexmask.long 0x5C 0.--31. 1. "CS23,Context swap x" line.long 0x60 "HASH_CSR24,HASH context swap register 24" hexmask.long 0x60 0.--31. 1. "CS24,Context swap x" line.long 0x64 "HASH_CSR25,HASH context swap register 25" hexmask.long 0x64 0.--31. 1. "CS25,Context swap x" line.long 0x68 "HASH_CSR26,HASH context swap register 26" hexmask.long 0x68 0.--31. 1. "CS26,Context swap x" line.long 0x6C "HASH_CSR27,HASH context swap register 27" hexmask.long 0x6C 0.--31. 1. "CS27,Context swap x" line.long 0x70 "HASH_CSR28,HASH context swap register 28" hexmask.long 0x70 0.--31. 1. "CS28,Context swap x" line.long 0x74 "HASH_CSR29,HASH context swap register 29" hexmask.long 0x74 0.--31. 1. "CS29,Context swap x" line.long 0x78 "HASH_CSR30,HASH context swap register 30" hexmask.long 0x78 0.--31. 1. "CS30,Context swap x" line.long 0x7C "HASH_CSR31,HASH context swap register 31" hexmask.long 0x7C 0.--31. 1. "CS31,Context swap x" line.long 0x80 "HASH_CSR32,HASH context swap register 32" hexmask.long 0x80 0.--31. 1. "CS32,Context swap x" line.long 0x84 "HASH_CSR33,HASH context swap register 33" hexmask.long 0x84 0.--31. 1. "CS33,Context swap x" line.long 0x88 "HASH_CSR34,HASH context swap register 34" hexmask.long 0x88 0.--31. 1. "CS34,Context swap x" line.long 0x8C "HASH_CSR35,HASH context swap register 35" hexmask.long 0x8C 0.--31. 1. "CS35,Context swap x" line.long 0x90 "HASH_CSR36,HASH context swap register 36" hexmask.long 0x90 0.--31. 1. "CS36,Context swap x" line.long 0x94 "HASH_CSR37,HASH context swap register 37" hexmask.long 0x94 0.--31. 1. "CS37,Context swap x" line.long 0x98 "HASH_CSR38,HASH context swap register 38" hexmask.long 0x98 0.--31. 1. "CS38,Context swap x" line.long 0x9C "HASH_CSR39,HASH context swap register 39" hexmask.long 0x9C 0.--31. 1. "CS39,Context swap x" line.long 0xA0 "HASH_CSR40,HASH context swap register 40" hexmask.long 0xA0 0.--31. 1. "CS40,Context swap x" line.long 0xA4 "HASH_CSR41,HASH context swap register 41" hexmask.long 0xA4 0.--31. 1. "CS41,Context swap x" line.long 0xA8 "HASH_CSR42,HASH context swap register 42" hexmask.long 0xA8 0.--31. 1. "CS42,Context swap x" line.long 0xAC "HASH_CSR43,HASH context swap register 43" hexmask.long 0xAC 0.--31. 1. "CS43,Context swap x" line.long 0xB0 "HASH_CSR44,HASH context swap register 44" hexmask.long 0xB0 0.--31. 1. "CS44,Context swap x" line.long 0xB4 "HASH_CSR45,HASH context swap register 45" hexmask.long 0xB4 0.--31. 1. "CS45,Context swap x" line.long 0xB8 "HASH_CSR46,HASH context swap register 46" hexmask.long 0xB8 0.--31. 1. "CS46,Context swap x" line.long 0xBC "HASH_CSR47,HASH context swap register 47" hexmask.long 0xBC 0.--31. 1. "CS47,Context swap x" line.long 0xC0 "HASH_CSR48,HASH context swap register 48" hexmask.long 0xC0 0.--31. 1. "CS48,Context swap x" line.long 0xC4 "HASH_CSR49,HASH context swap register 49" hexmask.long 0xC4 0.--31. 1. "CS49,Context swap x" line.long 0xC8 "HASH_CSR50,HASH context swap register 50" hexmask.long 0xC8 0.--31. 1. "CS50,Context swap x" line.long 0xCC "HASH_CSR51,HASH context swap register 51" hexmask.long 0xCC 0.--31. 1. "CS51,Context swap x" line.long 0xD0 "HASH_CSR52,HASH context swap register 52" hexmask.long 0xD0 0.--31. 1. "CS52,Context swap x" line.long 0xD4 "HASH_CSR53,HASH context swap register 53" hexmask.long 0xD4 0.--31. 1. "CS53,Context swap x" line.long 0xD8 "HASH_CSR54,HASH context swap register 54" hexmask.long 0xD8 0.--31. 1. "CS54,Context swap x" line.long 0xDC "HASH_CSR55,HASH context swap register 55" hexmask.long 0xDC 0.--31. 1. "CS55,Context swap x" line.long 0xE0 "HASH_CSR56,HASH context swap register 56" hexmask.long 0xE0 0.--31. 1. "CS56,Context swap x" line.long 0xE4 "HASH_CSR57,HASH context swap register 57" hexmask.long 0xE4 0.--31. 1. "CS57,Context swap x" line.long 0xE8 "HASH_CSR58,HASH context swap register 58" hexmask.long 0xE8 0.--31. 1. "CS58,Context swap x" line.long 0xEC "HASH_CSR59,HASH context swap register 59" hexmask.long 0xEC 0.--31. 1. "CS59,Context swap x" line.long 0xF0 "HASH_CSR60,HASH context swap register 60" hexmask.long 0xF0 0.--31. 1. "CS60,Context swap x" line.long 0xF4 "HASH_CSR61,HASH context swap register 61" hexmask.long 0xF4 0.--31. 1. "CS61,Context swap x" line.long 0xF8 "HASH_CSR62,HASH context swap register 62" hexmask.long 0xF8 0.--31. 1. "CS62,Context swap x" line.long 0xFC "HASH_CSR63,HASH context swap register 63" hexmask.long 0xFC 0.--31. 1. "CS63,Context swap x" line.long 0x100 "HASH_CSR64,HASH context swap register 64" hexmask.long 0x100 0.--31. 1. "CS64,Context swap x" line.long 0x104 "HASH_CSR65,HASH context swap register 65" hexmask.long 0x104 0.--31. 1. "CS65,Context swap x" line.long 0x108 "HASH_CSR66,HASH context swap register 66" hexmask.long 0x108 0.--31. 1. "CS66,Context swap x" line.long 0x10C "HASH_CSR67,HASH context swap register 67" hexmask.long 0x10C 0.--31. 1. "CS67,Context swap x" line.long 0x110 "HASH_CSR68,HASH context swap register 68" hexmask.long 0x110 0.--31. 1. "CS68,Context swap x" line.long 0x114 "HASH_CSR69,HASH context swap register 69" hexmask.long 0x114 0.--31. 1. "CS69,Context swap x" line.long 0x118 "HASH_CSR70,HASH context swap register 70" hexmask.long 0x118 0.--31. 1. "CS70,Context swap x" line.long 0x11C "HASH_CSR71,HASH context swap register 71" hexmask.long 0x11C 0.--31. 1. "CS71,Context swap x" line.long 0x120 "HASH_CSR72,HASH context swap register 72" hexmask.long 0x120 0.--31. 1. "CS72,Context swap x" line.long 0x124 "HASH_CSR73,HASH context swap register 73" hexmask.long 0x124 0.--31. 1. "CS73,Context swap x" line.long 0x128 "HASH_CSR74,HASH context swap register 74" hexmask.long 0x128 0.--31. 1. "CS74,Context swap x" line.long 0x12C "HASH_CSR75,HASH context swap register 75" hexmask.long 0x12C 0.--31. 1. "CS75,Context swap x" line.long 0x130 "HASH_CSR76,HASH context swap register 76" hexmask.long 0x130 0.--31. 1. "CS76,Context swap x" line.long 0x134 "HASH_CSR77,HASH context swap register 77" hexmask.long 0x134 0.--31. 1. "CS77,Context swap x" line.long 0x138 "HASH_CSR78,HASH context swap register 78" hexmask.long 0x138 0.--31. 1. "CS78,Context swap x" line.long 0x13C "HASH_CSR79,HASH context swap register 79" hexmask.long 0x13C 0.--31. 1. "CS79,Context swap x" line.long 0x140 "HASH_CSR80,HASH context swap register 80" hexmask.long 0x140 0.--31. 1. "CS80,Context swap x" line.long 0x144 "HASH_CSR81,HASH context swap register 81" hexmask.long 0x144 0.--31. 1. "CS81,Context swap x" line.long 0x148 "HASH_CSR82,HASH context swap register 82" hexmask.long 0x148 0.--31. 1. "CS82,Context swap x" line.long 0x14C "HASH_CSR83,HASH context swap register 83" hexmask.long 0x14C 0.--31. 1. "CS83,Context swap x" line.long 0x150 "HASH_CSR84,HASH context swap register 84" hexmask.long 0x150 0.--31. 1. "CS84,Context swap x" line.long 0x154 "HASH_CSR85,HASH context swap register 85" hexmask.long 0x154 0.--31. 1. "CS85,Context swap x" line.long 0x158 "HASH_CSR86,HASH context swap register 86" hexmask.long 0x158 0.--31. 1. "CS86,Context swap x" line.long 0x15C "HASH_CSR87,HASH context swap register 87" hexmask.long 0x15C 0.--31. 1. "CS87,Context swap x" line.long 0x160 "HASH_CSR88,HASH context swap register 88" hexmask.long 0x160 0.--31. 1. "CS88,Context swap x" line.long 0x164 "HASH_CSR89,HASH context swap register 89" hexmask.long 0x164 0.--31. 1. "CS89,Context swap x" line.long 0x168 "HASH_CSR90,HASH context swap register 90" hexmask.long 0x168 0.--31. 1. "CS90,Context swap x" line.long 0x16C "HASH_CSR91,HASH context swap register 91" hexmask.long 0x16C 0.--31. 1. "CS91,Context swap x" line.long 0x170 "HASH_CSR92,HASH context swap register 92" hexmask.long 0x170 0.--31. 1. "CS92,Context swap x" line.long 0x174 "HASH_CSR93,HASH context swap register 93" hexmask.long 0x174 0.--31. 1. "CS93,Context swap x" line.long 0x178 "HASH_CSR94,HASH context swap register 94" hexmask.long 0x178 0.--31. 1. "CS94,Context swap x" line.long 0x17C "HASH_CSR95,HASH context swap register 95" hexmask.long 0x17C 0.--31. 1. "CS95,Context swap x" line.long 0x180 "HASH_CSR96,HASH context swap register 96" hexmask.long 0x180 0.--31. 1. "CS96,Context swap x" line.long 0x184 "HASH_CSR97,HASH context swap register 97" hexmask.long 0x184 0.--31. 1. "CS97,Context swap x" line.long 0x188 "HASH_CSR98,HASH context swap register 98" hexmask.long 0x188 0.--31. 1. "CS98,Context swap x" line.long 0x18C "HASH_CSR99,HASH context swap register 99" hexmask.long 0x18C 0.--31. 1. "CS99,Context swap x" line.long 0x190 "HASH_CSR100,HASH context swap register 100" hexmask.long 0x190 0.--31. 1. "CS100,Context swap x" line.long 0x194 "HASH_CSR101,HASH context swap register 101" hexmask.long 0x194 0.--31. 1. "CS101,Context swap x" line.long 0x198 "HASH_CSR102,HASH context swap register 102" hexmask.long 0x198 0.--31. 1. "CS102,Context swap x" rgroup.long 0x310++0xC7 line.long 0x0 "HASH_HR0,HASH digest register 0" hexmask.long 0x0 0.--31. 1. "H0,Hash data x" line.long 0x4 "HASH_HR1,HASH digest register 1" hexmask.long 0x4 0.--31. 1. "H1,Hash data x" line.long 0x8 "HASH_HR2,HASH digest register 2" hexmask.long 0x8 0.--31. 1. "H2,Hash data x" line.long 0xC "HASH_HR3,HASH digest register 3" hexmask.long 0xC 0.--31. 1. "H3,Hash data x" line.long 0x10 "HASH_HR4,HASH digest register 4" hexmask.long 0x10 0.--31. 1. "H4,Hash data x" line.long 0x14 "HASH_HR5,HASH supplementary digest register 5" hexmask.long 0x14 0.--31. 1. "H5,Hash data x" line.long 0x18 "HASH_HR6,HASH supplementary digest register 6" hexmask.long 0x18 0.--31. 1. "H6,Hash data x" line.long 0x1C "HASH_HR7,HASH supplementary digest register 7" hexmask.long 0x1C 0.--31. 1. "H7,Hash data x" line.long 0x20 "HASH_HR8,HASH supplementary digest register 8" hexmask.long 0x20 0.--31. 1. "H8,Hash data x" line.long 0x24 "HASH_HR9,HASH supplementary digest register 9" hexmask.long 0x24 0.--31. 1. "H9,Hash data x" line.long 0x28 "HASH_HR10,HASH supplementary digest register 10" hexmask.long 0x28 0.--31. 1. "H10,Hash data x" line.long 0x2C "HASH_HR11,HASH supplementary digest register 11" hexmask.long 0x2C 0.--31. 1. "H11,Hash data x" line.long 0x30 "HASH_HR12,HASH supplementary digest register 12" hexmask.long 0x30 0.--31. 1. "H12,Hash data x" line.long 0x34 "HASH_HR13,HASH supplementary digest register 13" hexmask.long 0x34 0.--31. 1. "H13,Hash data x" line.long 0x38 "HASH_HR14,HASH supplementary digest register 14" hexmask.long 0x38 0.--31. 1. "H14,Hash data x" line.long 0x3C "HASH_HR15,HASH supplementary digest register 15" hexmask.long 0x3C 0.--31. 1. "H15,Hash data x" line.long 0x40 "HASH_HR16,HASH supplementary digest register 16" hexmask.long 0x40 0.--31. 1. "H16,Hash data x" line.long 0x44 "HASH_HR17,HASH supplementary digest register 17" hexmask.long 0x44 0.--31. 1. "H17,Hash data x" line.long 0x48 "HASH_HR18,HASH supplementary digest register 18" hexmask.long 0x48 0.--31. 1. "H18,Hash data x" line.long 0x4C "HASH_HR19,HASH supplementary digest register 19" hexmask.long 0x4C 0.--31. 1. "H19,Hash data x" line.long 0x50 "HASH_HR20,HASH supplementary digest register 20" hexmask.long 0x50 0.--31. 1. "H20,Hash data x" line.long 0x54 "HASH_HR21,HASH supplementary digest register 21" hexmask.long 0x54 0.--31. 1. "H21,Hash data x" line.long 0x58 "HASH_HR22,HASH supplementary digest register 22" hexmask.long 0x58 0.--31. 1. "H22,Hash data x" line.long 0x5C "HASH_HR23,HASH supplementary digest register 23" hexmask.long 0x5C 0.--31. 1. "H23,Hash data x" line.long 0x60 "HASH_HR24,HASH supplementary digest register 24" hexmask.long 0x60 0.--31. 1. "H24,Hash data x" line.long 0x64 "HASH_HR25,HASH supplementary digest register 25" hexmask.long 0x64 0.--31. 1. "H25,Hash data x" line.long 0x68 "HASH_HR26,HASH supplementary digest register 26" hexmask.long 0x68 0.--31. 1. "H26,Hash data x" line.long 0x6C "HASH_HR27,HASH supplementary digest register 27" hexmask.long 0x6C 0.--31. 1. "H27,Hash data x" line.long 0x70 "HASH_HR28,HASH supplementary digest register 28" hexmask.long 0x70 0.--31. 1. "H28,Hash data x" line.long 0x74 "HASH_HR29,HASH supplementary digest register 29" hexmask.long 0x74 0.--31. 1. "H29,Hash data x" line.long 0x78 "HASH_HR30,HASH supplementary digest register 30" hexmask.long 0x78 0.--31. 1. "H30,Hash data x" line.long 0x7C "HASH_HR31,HASH supplementary digest register 31" hexmask.long 0x7C 0.--31. 1. "H31,Hash data x" line.long 0x80 "HASH_HR32,HASH supplementary digest register 32" hexmask.long 0x80 0.--31. 1. "H32,Hash data x" line.long 0x84 "HASH_HR33,HASH supplementary digest register 33" hexmask.long 0x84 0.--31. 1. "H33,Hash data x" line.long 0x88 "HASH_HR34,HASH supplementary digest register 34" hexmask.long 0x88 0.--31. 1. "H34,Hash data x" line.long 0x8C "HASH_HR35,HASH supplementary digest register 35" hexmask.long 0x8C 0.--31. 1. "H35,Hash data x" line.long 0x90 "HASH_HR36,HASH supplementary digest register 36" hexmask.long 0x90 0.--31. 1. "H36,Hash data x" line.long 0x94 "HASH_HR37,HASH supplementary digest register 37" hexmask.long 0x94 0.--31. 1. "H37,Hash data x" line.long 0x98 "HASH_HR38,HASH supplementary digest register 38" hexmask.long 0x98 0.--31. 1. "H38,Hash data x" line.long 0x9C "HASH_HR39,HASH supplementary digest register 39" hexmask.long 0x9C 0.--31. 1. "H39,Hash data x" line.long 0xA0 "HASH_HR40,HASH supplementary digest register 40" hexmask.long 0xA0 0.--31. 1. "H40,Hash data x" line.long 0xA4 "HASH_HR41,HASH supplementary digest register 41" hexmask.long 0xA4 0.--31. 1. "H41,Hash data x" line.long 0xA8 "HASH_HR42,HASH supplementary digest register 42" hexmask.long 0xA8 0.--31. 1. "H42,Hash data x" line.long 0xAC "HASH_HR43,HASH supplementary digest register 43" hexmask.long 0xAC 0.--31. 1. "H43,Hash data x" line.long 0xB0 "HASH_HR44,HASH supplementary digest register 44" hexmask.long 0xB0 0.--31. 1. "H44,Hash data x" line.long 0xB4 "HASH_HR45,HASH supplementary digest register 45" hexmask.long 0xB4 0.--31. 1. "H45,Hash data x" line.long 0xB8 "HASH_HR46,HASH supplementary digest register 46" hexmask.long 0xB8 0.--31. 1. "H46,Hash data x" line.long 0xBC "HASH_HR47,HASH supplementary digest register 47" hexmask.long 0xBC 0.--31. 1. "H47,Hash data x" line.long 0xC0 "HASH_HR48,HASH supplementary digest register 48" hexmask.long 0xC0 0.--31. 1. "H48,Hash data x" line.long 0xC4 "HASH_HR49,HASH supplementary digest register 49" hexmask.long 0xC4 0.--31. 1. "H49,Hash data x" rgroup.long 0x3F0++0xF line.long 0x0 "HASH_HWCFGR,HASH hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "CFG5,HW generic 5" hexmask.long.byte 0x0 12.--15. 1. "CFG4,HW generic 4" hexmask.long.byte 0x0 8.--11. 1. "CFG3,HW generic 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,HW generic 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,HW generic 1" line.long 0x4 "HASH_VERR,HASH version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "HASH_IPIDR,HASH identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier" line.long 0xC "HASH_SIDR,HASH size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code" tree.end tree.end tree "HDP (Hardware Debug Port)" base ad:0x0 tree "HDP" base ad:0x44090000 group.long 0x0++0x7 line.long 0x0 "HDP_CTRL,HDP control register" bitfld.long 0x0 0. "EN,HDP enable (valid if enabled in BSEC)" "0,1" line.long 0x4 "HDP_MUX,HDP multiplexer control register" hexmask.long.byte 0x4 28.--31. 1. "MUX7,Selection of the HDPy output among the 16 available signals" hexmask.long.byte 0x4 24.--27. 1. "MUX6,Selection of the HDPy output among the 16 available signals" hexmask.long.byte 0x4 20.--23. 1. "MUX5,Selection of the HDPy output among the 16 available signals" hexmask.long.byte 0x4 16.--19. 1. "MUX4,Selection of the HDPy output among the 16 available signals" hexmask.long.byte 0x4 12.--15. 1. "MUX3,Selection of the HDPy output among the 16 available signals" hexmask.long.byte 0x4 8.--11. 1. "MUX2,Selection of the HDPy output among the 16 available signals" hexmask.long.byte 0x4 4.--7. 1. "MUX1,Selection of the HDPy output among the 16 available signals" hexmask.long.byte 0x4 0.--3. 1. "MUX0,Selection of the HDPy output among the 16 available signals" rgroup.long 0x10++0x3 line.long 0x0 "HDP_VAL,HDP read back value register" hexmask.long.byte 0x0 0.--7. 1. "HDPVAL,Value of the HDP signals" wgroup.long 0x14++0x7 line.long 0x0 "HDP_GPOSET,HDP general purpose output set register" hexmask.long.byte 0x0 0.--7. 1. "HDPGPOSET,When a bit is written to 1 the corresponding HDP GPO is set." line.long 0x4 "HDP_GPOCLR,HDP general purpose output clear register" hexmask.long.byte 0x4 0.--7. 1. "HDPGPOCLR,When a bit is written to 1 the corresponding HDP GPO is cleared." group.long 0x1C++0x3 line.long 0x0 "HDP_GPOVAL,HDP general purpose output value register" hexmask.long.byte 0x0 0.--7. 1. "HDPGPOVAL,When written this bit field defines the value of the HDP GPO." rgroup.long 0x3F4++0xB line.long 0x0 "HDP_VERR,HDP version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,HDP major revision" hexmask.long.byte 0x0 0.--3. 1. "MINREV,HDP minor revision" line.long 0x4 "HDP_IPIDR,HDP identification register" hexmask.long 0x4 0.--31. 1. "ID,HDP identifier" line.long 0x8 "HDP_SIDR,HDP size identification register" hexmask.long 0x8 0.--31. 1. "SID,Size identifier" tree.end tree "HDP_S" base ad:0x54090000 group.long 0x0++0x7 line.long 0x0 "HDP_CTRL,HDP control register" bitfld.long 0x0 0. "EN,HDP enable (valid if enabled in BSEC)" "0,1" line.long 0x4 "HDP_MUX,HDP multiplexer control register" hexmask.long.byte 0x4 28.--31. 1. "MUX7,Selection of the HDPy output among the 16 available signals" hexmask.long.byte 0x4 24.--27. 1. "MUX6,Selection of the HDPy output among the 16 available signals" hexmask.long.byte 0x4 20.--23. 1. "MUX5,Selection of the HDPy output among the 16 available signals" hexmask.long.byte 0x4 16.--19. 1. "MUX4,Selection of the HDPy output among the 16 available signals" hexmask.long.byte 0x4 12.--15. 1. "MUX3,Selection of the HDPy output among the 16 available signals" hexmask.long.byte 0x4 8.--11. 1. "MUX2,Selection of the HDPy output among the 16 available signals" hexmask.long.byte 0x4 4.--7. 1. "MUX1,Selection of the HDPy output among the 16 available signals" hexmask.long.byte 0x4 0.--3. 1. "MUX0,Selection of the HDPy output among the 16 available signals" rgroup.long 0x10++0x3 line.long 0x0 "HDP_VAL,HDP read back value register" hexmask.long.byte 0x0 0.--7. 1. "HDPVAL,Value of the HDP signals" wgroup.long 0x14++0x7 line.long 0x0 "HDP_GPOSET,HDP general purpose output set register" hexmask.long.byte 0x0 0.--7. 1. "HDPGPOSET,When a bit is written to 1 the corresponding HDP GPO is set." line.long 0x4 "HDP_GPOCLR,HDP general purpose output clear register" hexmask.long.byte 0x4 0.--7. 1. "HDPGPOCLR,When a bit is written to 1 the corresponding HDP GPO is cleared." group.long 0x1C++0x3 line.long 0x0 "HDP_GPOVAL,HDP general purpose output value register" hexmask.long.byte 0x0 0.--7. 1. "HDPGPOVAL,When written this bit field defines the value of the HDP GPO." rgroup.long 0x3F4++0xB line.long 0x0 "HDP_VERR,HDP version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,HDP major revision" hexmask.long.byte 0x0 0.--3. 1. "MINREV,HDP minor revision" line.long 0x4 "HDP_IPIDR,HDP identification register" hexmask.long 0x4 0.--31. 1. "ID,HDP identifier" line.long 0x8 "HDP_SIDR,HDP size identification register" hexmask.long 0x8 0.--31. 1. "SID,Size identifier" tree.end tree.end tree "HPDMA (High-Performance Direct Memory Access Controller)" base ad:0x0 tree "HPDMA" base ad:0x40400000 group.long 0x0++0xB line.long 0x0 "HPDMA_SECCFGR,HPDMA secure configuration register" bitfld.long 0x0 15. "SEC15,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,Secure state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "SEC11,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 9. "SEC9,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,Secure state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "SEC7,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Secure state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,Secure state of channel x" "B_0x0,B_0x1" line.long 0x4 "HPDMA_PRIVCFGR,HPDMA privileged configuration register" bitfld.long 0x4 15. "PRIV15,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,Privileged state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "PRIV11,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 9. "PRIV9,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,Privileged state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "PRIV7,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,Privileged state of channel x" "B_0x0,B_0x1" line.long 0x8 "HPDMA_RCFGLOCKR,HPDMA configuration lock register" bitfld.long 0x8 15. "LOCK15,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 14. "LOCK14,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 13. "LOCK13,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 12. "LOCK12,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" newline bitfld.long 0x8 11. "LOCK11,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 10. "LOCK10,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 9. "LOCK9,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 8. "LOCK8,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" newline bitfld.long 0x8 7. "LOCK7,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 6. "LOCK6,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 5. "LOCK5,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 4. "LOCK4,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "LOCK3,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 2. "LOCK2,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 1. "LOCK1,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 0. "LOCK0,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" rgroup.long 0xC++0x7 line.long 0x0 "HPDMA_MISR,HPDMA nonsecure masked interrupt status register" bitfld.long 0x0 15. "MIS15,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 14. "MIS14,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 13. "MIS13,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 12. "MIS12,Masked interrupt status of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "MIS11,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 10. "MIS10,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 9. "MIS9,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 8. "MIS8,Masked interrupt status of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "MIS7,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 6. "MIS6,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 5. "MIS5,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 4. "MIS4,Masked interrupt status of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "MIS3,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 2. "MIS2,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 1. "MIS1,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 0. "MIS0,Masked interrupt status of channel x" "B_0x0,B_0x1" line.long 0x4 "HPDMA_SMISR,HPDMA secure masked interrupt status register" bitfld.long 0x4 15. "MIS15,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 14. "MIS14,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 13. "MIS13,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 12. "MIS12,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "MIS11,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 10. "MIS10,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 9. "MIS9,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 8. "MIS8,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "MIS7,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 6. "MIS6,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 5. "MIS5,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 4. "MIS4,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "MIS3,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 2. "MIS2,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 1. "MIS1,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 0. "MIS0,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" group.long 0x50++0xB line.long 0x0 "HPDMA_C0LBAR,HPDMA channel 0 linked-list base address register" hexmask.long.word 0x0 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x4 "HPDMA_C0CIDCFGR,HPDMA channel 0 CID register" bitfld.long 0x4 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x4 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x4 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0x8 "HPDMA_C0SEMCR,HPDMA channel 0 semaphore control register" rbitfld.long 0x8 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x5C++0x3 line.long 0x0 "HPDMA_C0FCR,HPDMA channel 0 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x60++0x3 line.long 0x0 "HPDMA_C0SR,HPDMA channel 0 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x64++0x3 line.long 0x0 "HPDMA_C0CR,HPDMA channel 0 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x90++0x13 line.long 0x0 "HPDMA_C0TR1,HPDMA channel 0 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C0TR2,HPDMA channel 0 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C0BR1,HPDMA channel 0 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C0SAR,HPDMA channel 0 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C0DAR,HPDMA channel 0 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0xCC++0xF line.long 0x0 "HPDMA_C0LLR,HPDMA channel 0 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C1LBAR,HPDMA channel 1 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C1CIDCFGR,HPDMA channel 1 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C1SEMCR,HPDMA channel 1 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0xDC++0x3 line.long 0x0 "HPDMA_C1FCR,HPDMA channel 1 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0xE0++0x3 line.long 0x0 "HPDMA_C1SR,HPDMA channel 1 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0xE4++0x3 line.long 0x0 "HPDMA_C1CR,HPDMA channel 1 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x110++0x13 line.long 0x0 "HPDMA_C1TR1,HPDMA channel 1 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C1TR2,HPDMA channel 1 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C1BR1,HPDMA channel 1 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C1SAR,HPDMA channel 1 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C1DAR,HPDMA channel 1 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x14C++0xF line.long 0x0 "HPDMA_C1LLR,HPDMA channel 1 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C2LBAR,HPDMA channel 2 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C2CIDCFGR,HPDMA channel 2 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C2SEMCR,HPDMA channel 2 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x15C++0x3 line.long 0x0 "HPDMA_C2FCR,HPDMA channel 2 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x160++0x3 line.long 0x0 "HPDMA_C2SR,HPDMA channel 2 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x164++0x3 line.long 0x0 "HPDMA_C2CR,HPDMA channel 2 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x190++0x13 line.long 0x0 "HPDMA_C2TR1,HPDMA channel 2 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C2TR2,HPDMA channel 2 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C2BR1,HPDMA channel 2 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C2SAR,HPDMA channel 2 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C2DAR,HPDMA channel 2 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x1CC++0xF line.long 0x0 "HPDMA_C2LLR,HPDMA channel 2 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C3LBAR,HPDMA channel 3 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C3CIDCFGR,HPDMA channel 3 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C3SEMCR,HPDMA channel 3 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x1DC++0x3 line.long 0x0 "HPDMA_C3FCR,HPDMA channel 3 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x1E0++0x3 line.long 0x0 "HPDMA_C3SR,HPDMA channel 3 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x1E4++0x3 line.long 0x0 "HPDMA_C3CR,HPDMA channel 3 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x210++0x13 line.long 0x0 "HPDMA_C3TR1,HPDMA channel 3 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C3TR2,HPDMA channel 3 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C3BR1,HPDMA channel 3 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C3SAR,HPDMA channel 3 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C3DAR,HPDMA channel 3 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x24C++0xF line.long 0x0 "HPDMA_C3LLR,HPDMA channel 3 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C4LBAR,HPDMA channel 4 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C4CIDCFGR,HPDMA channel 4 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C4SEMCR,HPDMA channel 4 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x25C++0x3 line.long 0x0 "HPDMA_C4FCR,HPDMA channel 4 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x260++0x3 line.long 0x0 "HPDMA_C4SR,HPDMA channel 4 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x264++0x3 line.long 0x0 "HPDMA_C4CR,HPDMA channel 4 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x290++0x13 line.long 0x0 "HPDMA_C4TR1,HPDMA channel 4 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C4TR2,HPDMA channel 4 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C4BR1,HPDMA channel 4 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C4SAR,HPDMA channel 4 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C4DAR,HPDMA channel 4 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x2CC++0xF line.long 0x0 "HPDMA_C4LLR,HPDMA channel 4 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C5LBAR,HPDMA channel 5 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C5CIDCFGR,HPDMA channel 5 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C5SEMCR,HPDMA channel 5 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x2DC++0x3 line.long 0x0 "HPDMA_C5FCR,HPDMA channel 5 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x2E0++0x3 line.long 0x0 "HPDMA_C5SR,HPDMA channel 5 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x2E4++0x3 line.long 0x0 "HPDMA_C5CR,HPDMA channel 5 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x310++0x13 line.long 0x0 "HPDMA_C5TR1,HPDMA channel 5 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C5TR2,HPDMA channel 5 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C5BR1,HPDMA channel 5 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C5SAR,HPDMA channel 5 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C5DAR,HPDMA channel 5 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x34C++0xF line.long 0x0 "HPDMA_C5LLR,HPDMA channel 5 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C6LBAR,HPDMA channel 6 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C6CIDCFGR,HPDMA channel 6 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C6SEMCR,HPDMA channel 6 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x35C++0x3 line.long 0x0 "HPDMA_C6FCR,HPDMA channel 6 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x360++0x3 line.long 0x0 "HPDMA_C6SR,HPDMA channel 6 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x364++0x3 line.long 0x0 "HPDMA_C6CR,HPDMA channel 6 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x390++0x13 line.long 0x0 "HPDMA_C6TR1,HPDMA channel 6 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C6TR2,HPDMA channel 6 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C6BR1,HPDMA channel 6 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C6SAR,HPDMA channel 6 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C6DAR,HPDMA channel 6 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x3CC++0xF line.long 0x0 "HPDMA_C6LLR,HPDMA channel 6 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C7LBAR,HPDMA channel 7 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C7CIDCFGR,HPDMA channel 7 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C7SEMCR,HPDMA channel 7 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x3DC++0x3 line.long 0x0 "HPDMA_C7FCR,HPDMA channel 7 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x3E0++0x3 line.long 0x0 "HPDMA_C7SR,HPDMA channel 7 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x3E4++0x3 line.long 0x0 "HPDMA_C7CR,HPDMA channel 7 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x410++0x13 line.long 0x0 "HPDMA_C7TR1,HPDMA channel 7 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C7TR2,HPDMA channel 7 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C7BR1,HPDMA channel 7 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C7SAR,HPDMA channel 7 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C7DAR,HPDMA channel 7 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x44C++0xF line.long 0x0 "HPDMA_C7LLR,HPDMA channel 7 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C8LBAR,HPDMA channel 8 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C8CIDCFGR,HPDMA channel 8 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C8SEMCR,HPDMA channel 8 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x45C++0x3 line.long 0x0 "HPDMA_C8FCR,HPDMA channel 8 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x460++0x3 line.long 0x0 "HPDMA_C8SR,HPDMA channel 8 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x464++0x3 line.long 0x0 "HPDMA_C8CR,HPDMA channel 8 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x490++0x13 line.long 0x0 "HPDMA_C8TR1,HPDMA channel 8 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C8TR2,HPDMA channel 8 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C8BR1,HPDMA channel 8 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C8SAR,HPDMA channel 8 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C8DAR,HPDMA channel 8 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x4CC++0xF line.long 0x0 "HPDMA_C8LLR,HPDMA channel 8 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C9LBAR,HPDMA channel 9 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C9CIDCFGR,HPDMA channel 9 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C9SEMCR,HPDMA channel 9 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x4DC++0x3 line.long 0x0 "HPDMA_C9FCR,HPDMA channel 9 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x4E0++0x3 line.long 0x0 "HPDMA_C9SR,HPDMA channel 9 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x4E4++0x3 line.long 0x0 "HPDMA_C9CR,HPDMA channel 9 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x510++0x13 line.long 0x0 "HPDMA_C9TR1,HPDMA channel 9 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C9TR2,HPDMA channel 9 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C9BR1,HPDMA channel 9 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C9SAR,HPDMA channel 9 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C9DAR,HPDMA channel 9 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x54C++0xF line.long 0x0 "HPDMA_C9LLR,HPDMA channel 9 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C10LBAR,HPDMA channel 10 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C10CIDCFGR,HPDMA channel 10 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C10SEMCR,HPDMA channel 10 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x55C++0x3 line.long 0x0 "HPDMA_C10FCR,HPDMA channel 10 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x560++0x3 line.long 0x0 "HPDMA_C10SR,HPDMA channel 10 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x564++0x3 line.long 0x0 "HPDMA_C10CR,HPDMA channel 10 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x590++0x13 line.long 0x0 "HPDMA_C10TR1,HPDMA channel 10 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C10TR2,HPDMA channel 10 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C10BR1,HPDMA channel 10 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C10SAR,HPDMA channel 10 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C10DAR,HPDMA channel 10 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x5CC++0xF line.long 0x0 "HPDMA_C10LLR,HPDMA channel 10 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C11LBAR,HPDMA channel 11 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C11CIDCFGR,HPDMA channel 11 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C11SEMCR,HPDMA channel 11 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x5DC++0x3 line.long 0x0 "HPDMA_C11FCR,HPDMA channel 11 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x5E0++0x3 line.long 0x0 "HPDMA_C11SR,HPDMA channel 11 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x5E4++0x3 line.long 0x0 "HPDMA_C11CR,HPDMA channel 11 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x610++0x13 line.long 0x0 "HPDMA_C11TR1,HPDMA channel 11 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C11TR2,HPDMA channel 11 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C11BR1,HPDMA channel 11 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C11SAR,HPDMA channel 11 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C11DAR,HPDMA channel 11 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x64C++0xF line.long 0x0 "HPDMA_C11LLR,HPDMA channel 11 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C12LBAR,HPDMA channel 12 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C12CIDCFGR,HPDMA channel 12 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C12SEMCR,HPDMA channel 12 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x65C++0x3 line.long 0x0 "HPDMA_C12FCR,HPDMA channel 12 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x660++0x3 line.long 0x0 "HPDMA_C12SR,HPDMA channel 12 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x664++0x3 line.long 0x0 "HPDMA_C12CR,HPDMA channel 12 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x690++0x1B line.long 0x0 "HPDMA_C12TR1,HPDMA channel 12 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C12TR2,HPDMA channel 12 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C12BR1,HPDMA channel 12 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C12SAR,HPDMA channel 12 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C12DAR,HPDMA channel 12 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C12TR3,HPDMA channel 12 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C12BR2,HPDMA channel 12 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x6CC++0xF line.long 0x0 "HPDMA_C12LLR,HPDMA channel 12 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C13LBAR,HPDMA channel 13 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C13CIDCFGR,HPDMA channel 13 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C13SEMCR,HPDMA channel 13 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x6DC++0x3 line.long 0x0 "HPDMA_C13FCR,HPDMA channel 13 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x6E0++0x3 line.long 0x0 "HPDMA_C13SR,HPDMA channel 13 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x6E4++0x3 line.long 0x0 "HPDMA_C13CR,HPDMA channel 13 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x710++0x1B line.long 0x0 "HPDMA_C13TR1,HPDMA channel 13 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C13TR2,HPDMA channel 13 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C13BR1,HPDMA channel 13 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C13SAR,HPDMA channel 13 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C13DAR,HPDMA channel 13 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C13TR3,HPDMA channel 13 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C13BR2,HPDMA channel 13 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x74C++0xF line.long 0x0 "HPDMA_C13LLR,HPDMA channel 13 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C14LBAR,HPDMA channel 14 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C14CIDCFGR,HPDMA channel 14 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C14SEMCR,HPDMA channel 14 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x75C++0x3 line.long 0x0 "HPDMA_C14FCR,HPDMA channel 14 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x760++0x3 line.long 0x0 "HPDMA_C14SR,HPDMA channel 14 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x764++0x3 line.long 0x0 "HPDMA_C14CR,HPDMA channel 14 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x790++0x1B line.long 0x0 "HPDMA_C14TR1,HPDMA channel 14 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C14TR2,HPDMA channel 14 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C14BR1,HPDMA channel 14 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C14SAR,HPDMA channel 14 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C14DAR,HPDMA channel 14 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C14TR3,HPDMA channel 14 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C14BR2,HPDMA channel 14 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x7CC++0xF line.long 0x0 "HPDMA_C14LLR,HPDMA channel 14 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C15LBAR,HPDMA channel 15 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C15CIDCFGR,HPDMA channel 15 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C15SEMCR,HPDMA channel 15 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x7DC++0x3 line.long 0x0 "HPDMA_C15FCR,HPDMA channel 15 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x7E0++0x3 line.long 0x0 "HPDMA_C15SR,HPDMA channel 15 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x7E4++0x3 line.long 0x0 "HPDMA_C15CR,HPDMA channel 15 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x810++0x1B line.long 0x0 "HPDMA_C15TR1,HPDMA channel 15 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C15TR2,HPDMA channel 15 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C15BR1,HPDMA channel 15 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C15SAR,HPDMA channel 15 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C15DAR,HPDMA channel 15 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C15TR3,HPDMA channel 15 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C15BR2,HPDMA channel 15 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x84C++0x3 line.long 0x0 "HPDMA_C15LLR,HPDMA channel 15 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" rgroup.long 0xFC0++0x3F line.long 0x0 "HPDMA_HWCFGR13,HPDMA hardware configuration 13 register" bitfld.long 0x0 28. "G_PER_CTRL15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x0 24. "G_PER_CTRL14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x0 20. "G_PER_CTRL13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x0 16. "G_PER_CTRL12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "G_PER_CTRL11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x0 8. "G_PER_CTRL10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x0 4. "G_PER_CTRL9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x0 0. "G_PER_CTRL8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x4 "HPDMA_HWCFGR12,HPDMA hardware configuration 12 register" bitfld.long 0x4 28. "G_PER_CTRL7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x4 24. "G_PER_CTRL6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x4 20. "G_PER_CTRL5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x4 16. "G_PER_CTRL4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "G_PER_CTRL3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x4 8. "G_PER_CTRL2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x4 4. "G_PER_CTRL1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x4 0. "G_PER_CTRL0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x8 "HPDMA_HWCFGR11,HPDMA hardware configuration 11 register" bitfld.long 0x8 24. "G_TST_LL_IMPORT,Master port for the link transfer (DFT purpose only)" "B_0x0,B_0x1" bitfld.long 0x8 20.--22. "G_NUM_RESYNC_FFS,Number of resynchronization flip-flops in the range 2 to 6" "0,1,2,3,4,5,6,7" bitfld.long 0x8 16.--18. "G_CID_WIDTH,CID bus width in the range 1 to 4" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 8.--13. 1. "G_SEC_OPTIONREG,Secure optional register width in the range 0 to 32" newline hexmask.long.byte 0x8 0.--5. 1. "G_NONSEC_OPTIONREG,nonsecure optional register width in the range 0 to 32" line.long 0xC "HPDMA_HWCFGR10,HPDMA hardware configuration 10 register" bitfld.long 0xC 28.--29. "G_ADDRESSING15,DMA transfer type for channel 15" "B_0x0,B_0x1,?,?" bitfld.long 0xC 24.--25. "G_ADDRESSING14,DMA transfer type for channel 14" "B_0x0,B_0x1,?,?" bitfld.long 0xC 20.--21. "G_ADDRESSING13,DMA transfer type for channel 13" "B_0x0,B_0x1,?,?" bitfld.long 0xC 16.--17. "G_ADDRESSING12,DMA transfer type for channel 12" "B_0x0,B_0x1,?,?" newline bitfld.long 0xC 12.--13. "G_ADDRESSING11,DMA transfer type for channel 11" "B_0x0,B_0x1,?,?" bitfld.long 0xC 8.--9. "G_ADDRESSING10,DMA transfer type for channel 10" "B_0x0,B_0x1,?,?" bitfld.long 0xC 4.--5. "G_ADDRESSING9,DMA transfer type for channel 9" "B_0x0,B_0x1,?,?" bitfld.long 0xC 0.--1. "G_ADDRESSING8,DMA transfer type for channel 8" "B_0x0,B_0x1,?,?" line.long 0x10 "HPDMA_HWCFGR9,HPDMA hardware configuration 9 register" bitfld.long 0x10 28.--29. "G_ADDRESSING7,DMA transfer type for channel 7" "B_0x0,B_0x1,?,?" bitfld.long 0x10 24.--25. "G_ADDRESSING6,DMA transfer type for channel 6" "B_0x0,B_0x1,?,?" bitfld.long 0x10 20.--21. "G_ADDRESSING5,DMA transfer type for channel 5" "B_0x0,B_0x1,?,?" bitfld.long 0x10 16.--17. "G_ADDRESSING4,DMA transfer type for channel 4" "B_0x0,B_0x1,?,?" newline bitfld.long 0x10 12.--13. "G_ADDRESSING3,DMA transfer type for channel 3" "B_0x0,B_0x1,?,?" bitfld.long 0x10 8.--9. "G_ADDRESSING2,DMA transfer type for channel 2" "B_0x0,B_0x1,?,?" bitfld.long 0x10 4.--5. "G_ADDRESSING1,DMA transfer type for channel 1" "B_0x0,B_0x1,?,?" bitfld.long 0x10 0.--1. "G_ADDRESSING0,DMA transfer type for channel 0" "B_0x0,B_0x1,?,?" line.long 0x14 "HPDMA_HWCFGR8,HPDMA hardware configuration 8 register" bitfld.long 0x14 28. "G_LINKED_LIST15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x14 24. "G_LINKED_LIST14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x14 20. "G_LINKED_LIST13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x14 16. "G_LINKED_LIST12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x14 12. "G_LINKED_LIST11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x14 8. "G_LINKED_LIST10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x14 4. "G_LINKED_LIST9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x14 0. "G_LINKED_LIST8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x18 "HPDMA_HWCFGR7,HPDMA hardware configuration 7 register" bitfld.long 0x18 28. "G_LINKED_LIST7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x18 24. "G_LINKED_LIST6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x18 20. "G_LINKED_LIST5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x18 16. "G_LINKED_LIST4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x18 12. "G_LINKED_LIST3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x18 8. "G_LINKED_LIST2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x18 4. "G_LINKED_LIST1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x18 0. "G_LINKED_LIST0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x1C "HPDMA_HWCFGR6,HPDMA hardware configuration 6 register" bitfld.long 0x1C 28. "G_TRANSFERS15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x1C 24. "G_TRANSFERS14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x1C 20. "G_TRANSFERS13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x1C 16. "G_TRANSFERS12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x1C 12. "G_TRANSFERS11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x1C 8. "G_TRANSFERS10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x1C 4. "G_TRANSFERS9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x1C 0. "G_TRANSFERS8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x20 "HPDMA_HWCFGR5,HPDMA hardware configuration 5 register" bitfld.long 0x20 28. "G_TRANSFERS7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x20 24. "G_TRANSFERS6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x20 20. "G_TRANSFERS5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x20 16. "G_TRANSFERS4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x20 12. "G_TRANSFERS3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x20 8. "G_TRANSFERS2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x20 4. "G_TRANSFERS1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x20 0. "G_TRANSFERS0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x24 "HPDMA_HWCFGR4,HPDMA hardware configuration 4 register" bitfld.long 0x24 28.--30. "G_FIFO_SIZE15,FIFO size for the channel 15 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 24.--26. "G_FIFO_SIZE14,FIFO size for the channel 14 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 20.--22. "G_FIFO_SIZE13,FIFO size for the channel 13 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 16.--18. "G_FIFO_SIZE12,FIFO size for the channel 12 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x24 12.--14. "G_FIFO_SIZE11,FIFO size for the channel 11 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 8.--10. "G_FIFO_SIZE10,FIFO size for the channel 10 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 4.--6. "G_FIFO_SIZE9,FIFO size for the channel 9 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 0.--2. "G_FIFO_SIZE8,FIFO size for the channel 8 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" line.long 0x28 "HPDMA_HWCFGR3,HPDMA hardware configuration 3 register" bitfld.long 0x28 28.--30. "G_FIFO_SIZE7,FIFO size for the channel 7 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 24.--26. "G_FIFO_SIZE6,FIFO size for the channel 6 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 20.--22. "G_FIFO_SIZE5,FIFO size for the channel 5 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 16.--18. "G_FIFO_SIZE4,FIFO size for the channel 4 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x28 12.--14. "G_FIFO_SIZE3,FIFO size for the channel 3 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 8.--10. "G_FIFO_SIZE2,FIFO size for the channel 2 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 4.--6. "G_FIFO_SIZE1,FIFO size for the channel 1 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 0.--2. "G_FIFO_SIZE0,FIFO size for the channel 0 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" line.long 0x2C "HPDMA_HWCFGR2,HPDMA hardware configuration 2 register" hexmask.long.byte 0x2C 8.--14. 1. "G_MAX_TRIG_ID,Maximum trigger event identification (in the range 0 to 127)" hexmask.long.byte 0x2C 0.--7. 1. "G_MAX_REQ_ID,Maximum peripheral request identification (in the range 0 to 255)" line.long 0x30 "HPDMA_HWCFGR1,HPDMA hardware configuration 1 register" bitfld.long 0x30 28.--29. "G_M1_DATA_WIDTH_ENC,in the range 0 to 2" "B_0x0,B_0x1,?,?" bitfld.long 0x30 24.--25. "G_M0_DATA_WIDTH_ENC,in the range 0 to 2" "B_0x0,B_0x1,?,?" hexmask.long.byte 0x30 20.--23. 1. "G_MAX_CID,in the range 0 to 15" bitfld.long 0x30 16. "G_TRUSTZONE,TrustZone" "B_0x0,B_0x1" newline hexmask.long.byte 0x30 8.--12. 1. "G_NUM_CHANNELS,in the range 2 to 16" bitfld.long 0x30 4. "G_PRIVILEGE,privilege" "B_0x0,B_0x1" bitfld.long 0x30 0.--2. "G_MASTER_PORTS,in the range 0 to 5" "B_0x0,B_0x1,?,?,?,?,?,?" line.long 0x34 "HPDMA_VERR,HPDMA version register" hexmask.long.byte 0x34 4.--7. 1. "MAJREV,HPDMA major revision" hexmask.long.byte 0x34 0.--3. 1. "MINREV,HPDMA minor revision" line.long 0x38 "HPDMA_IPIDR,HPDMA identification register" hexmask.long 0x38 0.--31. 1. "ID,HPDMA identification" line.long 0x3C "HPDMA_SIDR,HPDMA size identification register" hexmask.long 0x3C 0.--31. 1. "SID,size identification" tree.end tree "HPDMA1_S" base ad:0x50400000 group.long 0x0++0xB line.long 0x0 "HPDMA_SECCFGR,HPDMA secure configuration register" bitfld.long 0x0 15. "SEC15,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,Secure state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "SEC11,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 9. "SEC9,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,Secure state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "SEC7,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Secure state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,Secure state of channel x" "B_0x0,B_0x1" line.long 0x4 "HPDMA_PRIVCFGR,HPDMA privileged configuration register" bitfld.long 0x4 15. "PRIV15,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,Privileged state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "PRIV11,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 9. "PRIV9,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,Privileged state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "PRIV7,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,Privileged state of channel x" "B_0x0,B_0x1" line.long 0x8 "HPDMA_RCFGLOCKR,HPDMA configuration lock register" bitfld.long 0x8 15. "LOCK15,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 14. "LOCK14,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 13. "LOCK13,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 12. "LOCK12,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" newline bitfld.long 0x8 11. "LOCK11,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 10. "LOCK10,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 9. "LOCK9,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 8. "LOCK8,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" newline bitfld.long 0x8 7. "LOCK7,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 6. "LOCK6,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 5. "LOCK5,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 4. "LOCK4,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "LOCK3,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 2. "LOCK2,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 1. "LOCK1,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 0. "LOCK0,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" rgroup.long 0xC++0x7 line.long 0x0 "HPDMA_MISR,HPDMA nonsecure masked interrupt status register" bitfld.long 0x0 15. "MIS15,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 14. "MIS14,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 13. "MIS13,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 12. "MIS12,Masked interrupt status of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "MIS11,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 10. "MIS10,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 9. "MIS9,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 8. "MIS8,Masked interrupt status of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "MIS7,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 6. "MIS6,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 5. "MIS5,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 4. "MIS4,Masked interrupt status of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "MIS3,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 2. "MIS2,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 1. "MIS1,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 0. "MIS0,Masked interrupt status of channel x" "B_0x0,B_0x1" line.long 0x4 "HPDMA_SMISR,HPDMA secure masked interrupt status register" bitfld.long 0x4 15. "MIS15,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 14. "MIS14,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 13. "MIS13,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 12. "MIS12,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "MIS11,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 10. "MIS10,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 9. "MIS9,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 8. "MIS8,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "MIS7,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 6. "MIS6,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 5. "MIS5,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 4. "MIS4,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "MIS3,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 2. "MIS2,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 1. "MIS1,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 0. "MIS0,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" group.long 0x50++0xB line.long 0x0 "HPDMA_C0LBAR,HPDMA channel 0 linked-list base address register" hexmask.long.word 0x0 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x4 "HPDMA_C0CIDCFGR,HPDMA channel 0 CID register" bitfld.long 0x4 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x4 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x4 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0x8 "HPDMA_C0SEMCR,HPDMA channel 0 semaphore control register" rbitfld.long 0x8 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x5C++0x3 line.long 0x0 "HPDMA_C0FCR,HPDMA channel 0 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x60++0x3 line.long 0x0 "HPDMA_C0SR,HPDMA channel 0 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x64++0x3 line.long 0x0 "HPDMA_C0CR,HPDMA channel 0 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x90++0x13 line.long 0x0 "HPDMA_C0TR1,HPDMA channel 0 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C0TR2,HPDMA channel 0 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C0BR1,HPDMA channel 0 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C0SAR,HPDMA channel 0 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C0DAR,HPDMA channel 0 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0xCC++0xF line.long 0x0 "HPDMA_C0LLR,HPDMA channel 0 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C1LBAR,HPDMA channel 1 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C1CIDCFGR,HPDMA channel 1 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C1SEMCR,HPDMA channel 1 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0xDC++0x3 line.long 0x0 "HPDMA_C1FCR,HPDMA channel 1 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0xE0++0x3 line.long 0x0 "HPDMA_C1SR,HPDMA channel 1 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0xE4++0x3 line.long 0x0 "HPDMA_C1CR,HPDMA channel 1 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x110++0x13 line.long 0x0 "HPDMA_C1TR1,HPDMA channel 1 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C1TR2,HPDMA channel 1 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C1BR1,HPDMA channel 1 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C1SAR,HPDMA channel 1 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C1DAR,HPDMA channel 1 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x14C++0xF line.long 0x0 "HPDMA_C1LLR,HPDMA channel 1 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C2LBAR,HPDMA channel 2 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C2CIDCFGR,HPDMA channel 2 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C2SEMCR,HPDMA channel 2 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x15C++0x3 line.long 0x0 "HPDMA_C2FCR,HPDMA channel 2 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x160++0x3 line.long 0x0 "HPDMA_C2SR,HPDMA channel 2 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x164++0x3 line.long 0x0 "HPDMA_C2CR,HPDMA channel 2 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x190++0x13 line.long 0x0 "HPDMA_C2TR1,HPDMA channel 2 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C2TR2,HPDMA channel 2 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C2BR1,HPDMA channel 2 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C2SAR,HPDMA channel 2 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C2DAR,HPDMA channel 2 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x1CC++0xF line.long 0x0 "HPDMA_C2LLR,HPDMA channel 2 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C3LBAR,HPDMA channel 3 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C3CIDCFGR,HPDMA channel 3 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C3SEMCR,HPDMA channel 3 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x1DC++0x3 line.long 0x0 "HPDMA_C3FCR,HPDMA channel 3 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x1E0++0x3 line.long 0x0 "HPDMA_C3SR,HPDMA channel 3 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x1E4++0x3 line.long 0x0 "HPDMA_C3CR,HPDMA channel 3 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x210++0x13 line.long 0x0 "HPDMA_C3TR1,HPDMA channel 3 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C3TR2,HPDMA channel 3 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C3BR1,HPDMA channel 3 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C3SAR,HPDMA channel 3 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C3DAR,HPDMA channel 3 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x24C++0xF line.long 0x0 "HPDMA_C3LLR,HPDMA channel 3 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C4LBAR,HPDMA channel 4 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C4CIDCFGR,HPDMA channel 4 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C4SEMCR,HPDMA channel 4 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x25C++0x3 line.long 0x0 "HPDMA_C4FCR,HPDMA channel 4 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x260++0x3 line.long 0x0 "HPDMA_C4SR,HPDMA channel 4 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x264++0x3 line.long 0x0 "HPDMA_C4CR,HPDMA channel 4 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x290++0x13 line.long 0x0 "HPDMA_C4TR1,HPDMA channel 4 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C4TR2,HPDMA channel 4 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C4BR1,HPDMA channel 4 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C4SAR,HPDMA channel 4 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C4DAR,HPDMA channel 4 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x2CC++0xF line.long 0x0 "HPDMA_C4LLR,HPDMA channel 4 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C5LBAR,HPDMA channel 5 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C5CIDCFGR,HPDMA channel 5 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C5SEMCR,HPDMA channel 5 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x2DC++0x3 line.long 0x0 "HPDMA_C5FCR,HPDMA channel 5 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x2E0++0x3 line.long 0x0 "HPDMA_C5SR,HPDMA channel 5 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x2E4++0x3 line.long 0x0 "HPDMA_C5CR,HPDMA channel 5 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x310++0x13 line.long 0x0 "HPDMA_C5TR1,HPDMA channel 5 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C5TR2,HPDMA channel 5 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C5BR1,HPDMA channel 5 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C5SAR,HPDMA channel 5 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C5DAR,HPDMA channel 5 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x34C++0xF line.long 0x0 "HPDMA_C5LLR,HPDMA channel 5 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C6LBAR,HPDMA channel 6 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C6CIDCFGR,HPDMA channel 6 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C6SEMCR,HPDMA channel 6 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x35C++0x3 line.long 0x0 "HPDMA_C6FCR,HPDMA channel 6 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x360++0x3 line.long 0x0 "HPDMA_C6SR,HPDMA channel 6 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x364++0x3 line.long 0x0 "HPDMA_C6CR,HPDMA channel 6 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x390++0x13 line.long 0x0 "HPDMA_C6TR1,HPDMA channel 6 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C6TR2,HPDMA channel 6 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C6BR1,HPDMA channel 6 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C6SAR,HPDMA channel 6 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C6DAR,HPDMA channel 6 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x3CC++0xF line.long 0x0 "HPDMA_C6LLR,HPDMA channel 6 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C7LBAR,HPDMA channel 7 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C7CIDCFGR,HPDMA channel 7 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C7SEMCR,HPDMA channel 7 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x3DC++0x3 line.long 0x0 "HPDMA_C7FCR,HPDMA channel 7 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x3E0++0x3 line.long 0x0 "HPDMA_C7SR,HPDMA channel 7 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x3E4++0x3 line.long 0x0 "HPDMA_C7CR,HPDMA channel 7 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x410++0x13 line.long 0x0 "HPDMA_C7TR1,HPDMA channel 7 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C7TR2,HPDMA channel 7 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C7BR1,HPDMA channel 7 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C7SAR,HPDMA channel 7 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C7DAR,HPDMA channel 7 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x44C++0xF line.long 0x0 "HPDMA_C7LLR,HPDMA channel 7 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C8LBAR,HPDMA channel 8 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C8CIDCFGR,HPDMA channel 8 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C8SEMCR,HPDMA channel 8 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x45C++0x3 line.long 0x0 "HPDMA_C8FCR,HPDMA channel 8 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x460++0x3 line.long 0x0 "HPDMA_C8SR,HPDMA channel 8 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x464++0x3 line.long 0x0 "HPDMA_C8CR,HPDMA channel 8 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x490++0x13 line.long 0x0 "HPDMA_C8TR1,HPDMA channel 8 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C8TR2,HPDMA channel 8 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C8BR1,HPDMA channel 8 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C8SAR,HPDMA channel 8 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C8DAR,HPDMA channel 8 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x4CC++0xF line.long 0x0 "HPDMA_C8LLR,HPDMA channel 8 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C9LBAR,HPDMA channel 9 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C9CIDCFGR,HPDMA channel 9 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C9SEMCR,HPDMA channel 9 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x4DC++0x3 line.long 0x0 "HPDMA_C9FCR,HPDMA channel 9 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x4E0++0x3 line.long 0x0 "HPDMA_C9SR,HPDMA channel 9 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x4E4++0x3 line.long 0x0 "HPDMA_C9CR,HPDMA channel 9 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x510++0x13 line.long 0x0 "HPDMA_C9TR1,HPDMA channel 9 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C9TR2,HPDMA channel 9 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C9BR1,HPDMA channel 9 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C9SAR,HPDMA channel 9 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C9DAR,HPDMA channel 9 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x54C++0xF line.long 0x0 "HPDMA_C9LLR,HPDMA channel 9 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C10LBAR,HPDMA channel 10 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C10CIDCFGR,HPDMA channel 10 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C10SEMCR,HPDMA channel 10 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x55C++0x3 line.long 0x0 "HPDMA_C10FCR,HPDMA channel 10 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x560++0x3 line.long 0x0 "HPDMA_C10SR,HPDMA channel 10 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x564++0x3 line.long 0x0 "HPDMA_C10CR,HPDMA channel 10 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x590++0x13 line.long 0x0 "HPDMA_C10TR1,HPDMA channel 10 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C10TR2,HPDMA channel 10 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C10BR1,HPDMA channel 10 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C10SAR,HPDMA channel 10 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C10DAR,HPDMA channel 10 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x5CC++0xF line.long 0x0 "HPDMA_C10LLR,HPDMA channel 10 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C11LBAR,HPDMA channel 11 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C11CIDCFGR,HPDMA channel 11 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C11SEMCR,HPDMA channel 11 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x5DC++0x3 line.long 0x0 "HPDMA_C11FCR,HPDMA channel 11 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x5E0++0x3 line.long 0x0 "HPDMA_C11SR,HPDMA channel 11 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x5E4++0x3 line.long 0x0 "HPDMA_C11CR,HPDMA channel 11 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x610++0x13 line.long 0x0 "HPDMA_C11TR1,HPDMA channel 11 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C11TR2,HPDMA channel 11 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C11BR1,HPDMA channel 11 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C11SAR,HPDMA channel 11 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C11DAR,HPDMA channel 11 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x64C++0xF line.long 0x0 "HPDMA_C11LLR,HPDMA channel 11 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C12LBAR,HPDMA channel 12 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C12CIDCFGR,HPDMA channel 12 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C12SEMCR,HPDMA channel 12 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x65C++0x3 line.long 0x0 "HPDMA_C12FCR,HPDMA channel 12 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x660++0x3 line.long 0x0 "HPDMA_C12SR,HPDMA channel 12 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x664++0x3 line.long 0x0 "HPDMA_C12CR,HPDMA channel 12 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x690++0x1B line.long 0x0 "HPDMA_C12TR1,HPDMA channel 12 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C12TR2,HPDMA channel 12 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C12BR1,HPDMA channel 12 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C12SAR,HPDMA channel 12 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C12DAR,HPDMA channel 12 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C12TR3,HPDMA channel 12 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C12BR2,HPDMA channel 12 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x6CC++0xF line.long 0x0 "HPDMA_C12LLR,HPDMA channel 12 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C13LBAR,HPDMA channel 13 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C13CIDCFGR,HPDMA channel 13 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C13SEMCR,HPDMA channel 13 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x6DC++0x3 line.long 0x0 "HPDMA_C13FCR,HPDMA channel 13 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x6E0++0x3 line.long 0x0 "HPDMA_C13SR,HPDMA channel 13 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x6E4++0x3 line.long 0x0 "HPDMA_C13CR,HPDMA channel 13 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x710++0x1B line.long 0x0 "HPDMA_C13TR1,HPDMA channel 13 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C13TR2,HPDMA channel 13 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C13BR1,HPDMA channel 13 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C13SAR,HPDMA channel 13 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C13DAR,HPDMA channel 13 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C13TR3,HPDMA channel 13 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C13BR2,HPDMA channel 13 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x74C++0xF line.long 0x0 "HPDMA_C13LLR,HPDMA channel 13 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C14LBAR,HPDMA channel 14 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C14CIDCFGR,HPDMA channel 14 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C14SEMCR,HPDMA channel 14 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x75C++0x3 line.long 0x0 "HPDMA_C14FCR,HPDMA channel 14 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x760++0x3 line.long 0x0 "HPDMA_C14SR,HPDMA channel 14 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x764++0x3 line.long 0x0 "HPDMA_C14CR,HPDMA channel 14 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x790++0x1B line.long 0x0 "HPDMA_C14TR1,HPDMA channel 14 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C14TR2,HPDMA channel 14 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C14BR1,HPDMA channel 14 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C14SAR,HPDMA channel 14 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C14DAR,HPDMA channel 14 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C14TR3,HPDMA channel 14 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C14BR2,HPDMA channel 14 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x7CC++0xF line.long 0x0 "HPDMA_C14LLR,HPDMA channel 14 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C15LBAR,HPDMA channel 15 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C15CIDCFGR,HPDMA channel 15 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C15SEMCR,HPDMA channel 15 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x7DC++0x3 line.long 0x0 "HPDMA_C15FCR,HPDMA channel 15 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x7E0++0x3 line.long 0x0 "HPDMA_C15SR,HPDMA channel 15 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x7E4++0x3 line.long 0x0 "HPDMA_C15CR,HPDMA channel 15 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x810++0x1B line.long 0x0 "HPDMA_C15TR1,HPDMA channel 15 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C15TR2,HPDMA channel 15 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C15BR1,HPDMA channel 15 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C15SAR,HPDMA channel 15 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C15DAR,HPDMA channel 15 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C15TR3,HPDMA channel 15 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C15BR2,HPDMA channel 15 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x84C++0x3 line.long 0x0 "HPDMA_C15LLR,HPDMA channel 15 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" rgroup.long 0xFC0++0x3F line.long 0x0 "HPDMA_HWCFGR13,HPDMA hardware configuration 13 register" bitfld.long 0x0 28. "G_PER_CTRL15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x0 24. "G_PER_CTRL14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x0 20. "G_PER_CTRL13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x0 16. "G_PER_CTRL12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "G_PER_CTRL11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x0 8. "G_PER_CTRL10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x0 4. "G_PER_CTRL9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x0 0. "G_PER_CTRL8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x4 "HPDMA_HWCFGR12,HPDMA hardware configuration 12 register" bitfld.long 0x4 28. "G_PER_CTRL7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x4 24. "G_PER_CTRL6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x4 20. "G_PER_CTRL5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x4 16. "G_PER_CTRL4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "G_PER_CTRL3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x4 8. "G_PER_CTRL2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x4 4. "G_PER_CTRL1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x4 0. "G_PER_CTRL0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x8 "HPDMA_HWCFGR11,HPDMA hardware configuration 11 register" bitfld.long 0x8 24. "G_TST_LL_IMPORT,Master port for the link transfer (DFT purpose only)" "B_0x0,B_0x1" bitfld.long 0x8 20.--22. "G_NUM_RESYNC_FFS,Number of resynchronization flip-flops in the range 2 to 6" "0,1,2,3,4,5,6,7" bitfld.long 0x8 16.--18. "G_CID_WIDTH,CID bus width in the range 1 to 4" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 8.--13. 1. "G_SEC_OPTIONREG,Secure optional register width in the range 0 to 32" newline hexmask.long.byte 0x8 0.--5. 1. "G_NONSEC_OPTIONREG,nonsecure optional register width in the range 0 to 32" line.long 0xC "HPDMA_HWCFGR10,HPDMA hardware configuration 10 register" bitfld.long 0xC 28.--29. "G_ADDRESSING15,DMA transfer type for channel 15" "B_0x0,B_0x1,?,?" bitfld.long 0xC 24.--25. "G_ADDRESSING14,DMA transfer type for channel 14" "B_0x0,B_0x1,?,?" bitfld.long 0xC 20.--21. "G_ADDRESSING13,DMA transfer type for channel 13" "B_0x0,B_0x1,?,?" bitfld.long 0xC 16.--17. "G_ADDRESSING12,DMA transfer type for channel 12" "B_0x0,B_0x1,?,?" newline bitfld.long 0xC 12.--13. "G_ADDRESSING11,DMA transfer type for channel 11" "B_0x0,B_0x1,?,?" bitfld.long 0xC 8.--9. "G_ADDRESSING10,DMA transfer type for channel 10" "B_0x0,B_0x1,?,?" bitfld.long 0xC 4.--5. "G_ADDRESSING9,DMA transfer type for channel 9" "B_0x0,B_0x1,?,?" bitfld.long 0xC 0.--1. "G_ADDRESSING8,DMA transfer type for channel 8" "B_0x0,B_0x1,?,?" line.long 0x10 "HPDMA_HWCFGR9,HPDMA hardware configuration 9 register" bitfld.long 0x10 28.--29. "G_ADDRESSING7,DMA transfer type for channel 7" "B_0x0,B_0x1,?,?" bitfld.long 0x10 24.--25. "G_ADDRESSING6,DMA transfer type for channel 6" "B_0x0,B_0x1,?,?" bitfld.long 0x10 20.--21. "G_ADDRESSING5,DMA transfer type for channel 5" "B_0x0,B_0x1,?,?" bitfld.long 0x10 16.--17. "G_ADDRESSING4,DMA transfer type for channel 4" "B_0x0,B_0x1,?,?" newline bitfld.long 0x10 12.--13. "G_ADDRESSING3,DMA transfer type for channel 3" "B_0x0,B_0x1,?,?" bitfld.long 0x10 8.--9. "G_ADDRESSING2,DMA transfer type for channel 2" "B_0x0,B_0x1,?,?" bitfld.long 0x10 4.--5. "G_ADDRESSING1,DMA transfer type for channel 1" "B_0x0,B_0x1,?,?" bitfld.long 0x10 0.--1. "G_ADDRESSING0,DMA transfer type for channel 0" "B_0x0,B_0x1,?,?" line.long 0x14 "HPDMA_HWCFGR8,HPDMA hardware configuration 8 register" bitfld.long 0x14 28. "G_LINKED_LIST15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x14 24. "G_LINKED_LIST14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x14 20. "G_LINKED_LIST13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x14 16. "G_LINKED_LIST12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x14 12. "G_LINKED_LIST11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x14 8. "G_LINKED_LIST10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x14 4. "G_LINKED_LIST9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x14 0. "G_LINKED_LIST8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x18 "HPDMA_HWCFGR7,HPDMA hardware configuration 7 register" bitfld.long 0x18 28. "G_LINKED_LIST7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x18 24. "G_LINKED_LIST6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x18 20. "G_LINKED_LIST5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x18 16. "G_LINKED_LIST4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x18 12. "G_LINKED_LIST3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x18 8. "G_LINKED_LIST2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x18 4. "G_LINKED_LIST1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x18 0. "G_LINKED_LIST0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x1C "HPDMA_HWCFGR6,HPDMA hardware configuration 6 register" bitfld.long 0x1C 28. "G_TRANSFERS15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x1C 24. "G_TRANSFERS14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x1C 20. "G_TRANSFERS13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x1C 16. "G_TRANSFERS12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x1C 12. "G_TRANSFERS11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x1C 8. "G_TRANSFERS10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x1C 4. "G_TRANSFERS9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x1C 0. "G_TRANSFERS8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x20 "HPDMA_HWCFGR5,HPDMA hardware configuration 5 register" bitfld.long 0x20 28. "G_TRANSFERS7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x20 24. "G_TRANSFERS6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x20 20. "G_TRANSFERS5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x20 16. "G_TRANSFERS4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x20 12. "G_TRANSFERS3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x20 8. "G_TRANSFERS2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x20 4. "G_TRANSFERS1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x20 0. "G_TRANSFERS0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x24 "HPDMA_HWCFGR4,HPDMA hardware configuration 4 register" bitfld.long 0x24 28.--30. "G_FIFO_SIZE15,FIFO size for the channel 15 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 24.--26. "G_FIFO_SIZE14,FIFO size for the channel 14 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 20.--22. "G_FIFO_SIZE13,FIFO size for the channel 13 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 16.--18. "G_FIFO_SIZE12,FIFO size for the channel 12 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x24 12.--14. "G_FIFO_SIZE11,FIFO size for the channel 11 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 8.--10. "G_FIFO_SIZE10,FIFO size for the channel 10 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 4.--6. "G_FIFO_SIZE9,FIFO size for the channel 9 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 0.--2. "G_FIFO_SIZE8,FIFO size for the channel 8 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" line.long 0x28 "HPDMA_HWCFGR3,HPDMA hardware configuration 3 register" bitfld.long 0x28 28.--30. "G_FIFO_SIZE7,FIFO size for the channel 7 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 24.--26. "G_FIFO_SIZE6,FIFO size for the channel 6 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 20.--22. "G_FIFO_SIZE5,FIFO size for the channel 5 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 16.--18. "G_FIFO_SIZE4,FIFO size for the channel 4 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x28 12.--14. "G_FIFO_SIZE3,FIFO size for the channel 3 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 8.--10. "G_FIFO_SIZE2,FIFO size for the channel 2 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 4.--6. "G_FIFO_SIZE1,FIFO size for the channel 1 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 0.--2. "G_FIFO_SIZE0,FIFO size for the channel 0 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" line.long 0x2C "HPDMA_HWCFGR2,HPDMA hardware configuration 2 register" hexmask.long.byte 0x2C 8.--14. 1. "G_MAX_TRIG_ID,Maximum trigger event identification (in the range 0 to 127)" hexmask.long.byte 0x2C 0.--7. 1. "G_MAX_REQ_ID,Maximum peripheral request identification (in the range 0 to 255)" line.long 0x30 "HPDMA_HWCFGR1,HPDMA hardware configuration 1 register" bitfld.long 0x30 28.--29. "G_M1_DATA_WIDTH_ENC,in the range 0 to 2" "B_0x0,B_0x1,?,?" bitfld.long 0x30 24.--25. "G_M0_DATA_WIDTH_ENC,in the range 0 to 2" "B_0x0,B_0x1,?,?" hexmask.long.byte 0x30 20.--23. 1. "G_MAX_CID,in the range 0 to 15" bitfld.long 0x30 16. "G_TRUSTZONE,TrustZone" "B_0x0,B_0x1" newline hexmask.long.byte 0x30 8.--12. 1. "G_NUM_CHANNELS,in the range 2 to 16" bitfld.long 0x30 4. "G_PRIVILEGE,privilege" "B_0x0,B_0x1" bitfld.long 0x30 0.--2. "G_MASTER_PORTS,in the range 0 to 5" "B_0x0,B_0x1,?,?,?,?,?,?" line.long 0x34 "HPDMA_VERR,HPDMA version register" hexmask.long.byte 0x34 4.--7. 1. "MAJREV,HPDMA major revision" hexmask.long.byte 0x34 0.--3. 1. "MINREV,HPDMA minor revision" line.long 0x38 "HPDMA_IPIDR,HPDMA identification register" hexmask.long 0x38 0.--31. 1. "ID,HPDMA identification" line.long 0x3C "HPDMA_SIDR,HPDMA size identification register" hexmask.long 0x3C 0.--31. 1. "SID,size identification" tree.end tree "HPDMA2" base ad:0x40410000 group.long 0x0++0xB line.long 0x0 "HPDMA_SECCFGR,HPDMA secure configuration register" bitfld.long 0x0 15. "SEC15,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,Secure state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "SEC11,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 9. "SEC9,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,Secure state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "SEC7,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Secure state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,Secure state of channel x" "B_0x0,B_0x1" line.long 0x4 "HPDMA_PRIVCFGR,HPDMA privileged configuration register" bitfld.long 0x4 15. "PRIV15,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,Privileged state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "PRIV11,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 9. "PRIV9,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,Privileged state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "PRIV7,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,Privileged state of channel x" "B_0x0,B_0x1" line.long 0x8 "HPDMA_RCFGLOCKR,HPDMA configuration lock register" bitfld.long 0x8 15. "LOCK15,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 14. "LOCK14,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 13. "LOCK13,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 12. "LOCK12,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" newline bitfld.long 0x8 11. "LOCK11,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 10. "LOCK10,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 9. "LOCK9,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 8. "LOCK8,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" newline bitfld.long 0x8 7. "LOCK7,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 6. "LOCK6,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 5. "LOCK5,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 4. "LOCK4,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "LOCK3,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 2. "LOCK2,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 1. "LOCK1,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 0. "LOCK0,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" rgroup.long 0xC++0x7 line.long 0x0 "HPDMA_MISR,HPDMA nonsecure masked interrupt status register" bitfld.long 0x0 15. "MIS15,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 14. "MIS14,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 13. "MIS13,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 12. "MIS12,Masked interrupt status of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "MIS11,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 10. "MIS10,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 9. "MIS9,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 8. "MIS8,Masked interrupt status of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "MIS7,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 6. "MIS6,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 5. "MIS5,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 4. "MIS4,Masked interrupt status of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "MIS3,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 2. "MIS2,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 1. "MIS1,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 0. "MIS0,Masked interrupt status of channel x" "B_0x0,B_0x1" line.long 0x4 "HPDMA_SMISR,HPDMA secure masked interrupt status register" bitfld.long 0x4 15. "MIS15,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 14. "MIS14,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 13. "MIS13,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 12. "MIS12,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "MIS11,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 10. "MIS10,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 9. "MIS9,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 8. "MIS8,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "MIS7,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 6. "MIS6,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 5. "MIS5,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 4. "MIS4,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "MIS3,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 2. "MIS2,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 1. "MIS1,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 0. "MIS0,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" group.long 0x50++0xB line.long 0x0 "HPDMA_C0LBAR,HPDMA channel 0 linked-list base address register" hexmask.long.word 0x0 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x4 "HPDMA_C0CIDCFGR,HPDMA channel 0 CID register" bitfld.long 0x4 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x4 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x4 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0x8 "HPDMA_C0SEMCR,HPDMA channel 0 semaphore control register" rbitfld.long 0x8 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x5C++0x3 line.long 0x0 "HPDMA_C0FCR,HPDMA channel 0 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x60++0x3 line.long 0x0 "HPDMA_C0SR,HPDMA channel 0 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x64++0x3 line.long 0x0 "HPDMA_C0CR,HPDMA channel 0 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x90++0x13 line.long 0x0 "HPDMA_C0TR1,HPDMA channel 0 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C0TR2,HPDMA channel 0 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C0BR1,HPDMA channel 0 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C0SAR,HPDMA channel 0 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C0DAR,HPDMA channel 0 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0xCC++0xF line.long 0x0 "HPDMA_C0LLR,HPDMA channel 0 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C1LBAR,HPDMA channel 1 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C1CIDCFGR,HPDMA channel 1 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C1SEMCR,HPDMA channel 1 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0xDC++0x3 line.long 0x0 "HPDMA_C1FCR,HPDMA channel 1 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0xE0++0x3 line.long 0x0 "HPDMA_C1SR,HPDMA channel 1 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0xE4++0x3 line.long 0x0 "HPDMA_C1CR,HPDMA channel 1 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x110++0x13 line.long 0x0 "HPDMA_C1TR1,HPDMA channel 1 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C1TR2,HPDMA channel 1 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C1BR1,HPDMA channel 1 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C1SAR,HPDMA channel 1 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C1DAR,HPDMA channel 1 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x14C++0xF line.long 0x0 "HPDMA_C1LLR,HPDMA channel 1 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C2LBAR,HPDMA channel 2 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C2CIDCFGR,HPDMA channel 2 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C2SEMCR,HPDMA channel 2 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x15C++0x3 line.long 0x0 "HPDMA_C2FCR,HPDMA channel 2 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x160++0x3 line.long 0x0 "HPDMA_C2SR,HPDMA channel 2 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x164++0x3 line.long 0x0 "HPDMA_C2CR,HPDMA channel 2 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x190++0x13 line.long 0x0 "HPDMA_C2TR1,HPDMA channel 2 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C2TR2,HPDMA channel 2 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C2BR1,HPDMA channel 2 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C2SAR,HPDMA channel 2 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C2DAR,HPDMA channel 2 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x1CC++0xF line.long 0x0 "HPDMA_C2LLR,HPDMA channel 2 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C3LBAR,HPDMA channel 3 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C3CIDCFGR,HPDMA channel 3 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C3SEMCR,HPDMA channel 3 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x1DC++0x3 line.long 0x0 "HPDMA_C3FCR,HPDMA channel 3 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x1E0++0x3 line.long 0x0 "HPDMA_C3SR,HPDMA channel 3 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x1E4++0x3 line.long 0x0 "HPDMA_C3CR,HPDMA channel 3 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x210++0x13 line.long 0x0 "HPDMA_C3TR1,HPDMA channel 3 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C3TR2,HPDMA channel 3 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C3BR1,HPDMA channel 3 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C3SAR,HPDMA channel 3 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C3DAR,HPDMA channel 3 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x24C++0xF line.long 0x0 "HPDMA_C3LLR,HPDMA channel 3 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C4LBAR,HPDMA channel 4 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C4CIDCFGR,HPDMA channel 4 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C4SEMCR,HPDMA channel 4 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x25C++0x3 line.long 0x0 "HPDMA_C4FCR,HPDMA channel 4 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x260++0x3 line.long 0x0 "HPDMA_C4SR,HPDMA channel 4 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x264++0x3 line.long 0x0 "HPDMA_C4CR,HPDMA channel 4 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x290++0x13 line.long 0x0 "HPDMA_C4TR1,HPDMA channel 4 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C4TR2,HPDMA channel 4 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C4BR1,HPDMA channel 4 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C4SAR,HPDMA channel 4 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C4DAR,HPDMA channel 4 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x2CC++0xF line.long 0x0 "HPDMA_C4LLR,HPDMA channel 4 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C5LBAR,HPDMA channel 5 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C5CIDCFGR,HPDMA channel 5 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C5SEMCR,HPDMA channel 5 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x2DC++0x3 line.long 0x0 "HPDMA_C5FCR,HPDMA channel 5 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x2E0++0x3 line.long 0x0 "HPDMA_C5SR,HPDMA channel 5 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x2E4++0x3 line.long 0x0 "HPDMA_C5CR,HPDMA channel 5 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x310++0x13 line.long 0x0 "HPDMA_C5TR1,HPDMA channel 5 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C5TR2,HPDMA channel 5 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C5BR1,HPDMA channel 5 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C5SAR,HPDMA channel 5 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C5DAR,HPDMA channel 5 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x34C++0xF line.long 0x0 "HPDMA_C5LLR,HPDMA channel 5 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C6LBAR,HPDMA channel 6 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C6CIDCFGR,HPDMA channel 6 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C6SEMCR,HPDMA channel 6 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x35C++0x3 line.long 0x0 "HPDMA_C6FCR,HPDMA channel 6 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x360++0x3 line.long 0x0 "HPDMA_C6SR,HPDMA channel 6 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x364++0x3 line.long 0x0 "HPDMA_C6CR,HPDMA channel 6 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x390++0x13 line.long 0x0 "HPDMA_C6TR1,HPDMA channel 6 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C6TR2,HPDMA channel 6 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C6BR1,HPDMA channel 6 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C6SAR,HPDMA channel 6 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C6DAR,HPDMA channel 6 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x3CC++0xF line.long 0x0 "HPDMA_C6LLR,HPDMA channel 6 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C7LBAR,HPDMA channel 7 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C7CIDCFGR,HPDMA channel 7 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C7SEMCR,HPDMA channel 7 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x3DC++0x3 line.long 0x0 "HPDMA_C7FCR,HPDMA channel 7 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x3E0++0x3 line.long 0x0 "HPDMA_C7SR,HPDMA channel 7 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x3E4++0x3 line.long 0x0 "HPDMA_C7CR,HPDMA channel 7 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x410++0x13 line.long 0x0 "HPDMA_C7TR1,HPDMA channel 7 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C7TR2,HPDMA channel 7 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C7BR1,HPDMA channel 7 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C7SAR,HPDMA channel 7 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C7DAR,HPDMA channel 7 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x44C++0xF line.long 0x0 "HPDMA_C7LLR,HPDMA channel 7 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C8LBAR,HPDMA channel 8 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C8CIDCFGR,HPDMA channel 8 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C8SEMCR,HPDMA channel 8 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x45C++0x3 line.long 0x0 "HPDMA_C8FCR,HPDMA channel 8 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x460++0x3 line.long 0x0 "HPDMA_C8SR,HPDMA channel 8 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x464++0x3 line.long 0x0 "HPDMA_C8CR,HPDMA channel 8 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x490++0x13 line.long 0x0 "HPDMA_C8TR1,HPDMA channel 8 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C8TR2,HPDMA channel 8 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C8BR1,HPDMA channel 8 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C8SAR,HPDMA channel 8 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C8DAR,HPDMA channel 8 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x4CC++0xF line.long 0x0 "HPDMA_C8LLR,HPDMA channel 8 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C9LBAR,HPDMA channel 9 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C9CIDCFGR,HPDMA channel 9 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C9SEMCR,HPDMA channel 9 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x4DC++0x3 line.long 0x0 "HPDMA_C9FCR,HPDMA channel 9 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x4E0++0x3 line.long 0x0 "HPDMA_C9SR,HPDMA channel 9 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x4E4++0x3 line.long 0x0 "HPDMA_C9CR,HPDMA channel 9 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x510++0x13 line.long 0x0 "HPDMA_C9TR1,HPDMA channel 9 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C9TR2,HPDMA channel 9 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C9BR1,HPDMA channel 9 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C9SAR,HPDMA channel 9 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C9DAR,HPDMA channel 9 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x54C++0xF line.long 0x0 "HPDMA_C9LLR,HPDMA channel 9 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C10LBAR,HPDMA channel 10 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C10CIDCFGR,HPDMA channel 10 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C10SEMCR,HPDMA channel 10 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x55C++0x3 line.long 0x0 "HPDMA_C10FCR,HPDMA channel 10 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x560++0x3 line.long 0x0 "HPDMA_C10SR,HPDMA channel 10 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x564++0x3 line.long 0x0 "HPDMA_C10CR,HPDMA channel 10 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x590++0x13 line.long 0x0 "HPDMA_C10TR1,HPDMA channel 10 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C10TR2,HPDMA channel 10 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C10BR1,HPDMA channel 10 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C10SAR,HPDMA channel 10 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C10DAR,HPDMA channel 10 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x5CC++0xF line.long 0x0 "HPDMA_C10LLR,HPDMA channel 10 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C11LBAR,HPDMA channel 11 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C11CIDCFGR,HPDMA channel 11 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C11SEMCR,HPDMA channel 11 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x5DC++0x3 line.long 0x0 "HPDMA_C11FCR,HPDMA channel 11 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x5E0++0x3 line.long 0x0 "HPDMA_C11SR,HPDMA channel 11 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x5E4++0x3 line.long 0x0 "HPDMA_C11CR,HPDMA channel 11 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x610++0x13 line.long 0x0 "HPDMA_C11TR1,HPDMA channel 11 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C11TR2,HPDMA channel 11 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C11BR1,HPDMA channel 11 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C11SAR,HPDMA channel 11 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C11DAR,HPDMA channel 11 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x64C++0xF line.long 0x0 "HPDMA_C11LLR,HPDMA channel 11 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C12LBAR,HPDMA channel 12 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C12CIDCFGR,HPDMA channel 12 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C12SEMCR,HPDMA channel 12 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x65C++0x3 line.long 0x0 "HPDMA_C12FCR,HPDMA channel 12 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x660++0x3 line.long 0x0 "HPDMA_C12SR,HPDMA channel 12 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x664++0x3 line.long 0x0 "HPDMA_C12CR,HPDMA channel 12 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x690++0x1B line.long 0x0 "HPDMA_C12TR1,HPDMA channel 12 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C12TR2,HPDMA channel 12 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C12BR1,HPDMA channel 12 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C12SAR,HPDMA channel 12 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C12DAR,HPDMA channel 12 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C12TR3,HPDMA channel 12 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C12BR2,HPDMA channel 12 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x6CC++0xF line.long 0x0 "HPDMA_C12LLR,HPDMA channel 12 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C13LBAR,HPDMA channel 13 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C13CIDCFGR,HPDMA channel 13 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C13SEMCR,HPDMA channel 13 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x6DC++0x3 line.long 0x0 "HPDMA_C13FCR,HPDMA channel 13 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x6E0++0x3 line.long 0x0 "HPDMA_C13SR,HPDMA channel 13 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x6E4++0x3 line.long 0x0 "HPDMA_C13CR,HPDMA channel 13 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x710++0x1B line.long 0x0 "HPDMA_C13TR1,HPDMA channel 13 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C13TR2,HPDMA channel 13 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C13BR1,HPDMA channel 13 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C13SAR,HPDMA channel 13 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C13DAR,HPDMA channel 13 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C13TR3,HPDMA channel 13 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C13BR2,HPDMA channel 13 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x74C++0xF line.long 0x0 "HPDMA_C13LLR,HPDMA channel 13 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C14LBAR,HPDMA channel 14 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C14CIDCFGR,HPDMA channel 14 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C14SEMCR,HPDMA channel 14 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x75C++0x3 line.long 0x0 "HPDMA_C14FCR,HPDMA channel 14 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x760++0x3 line.long 0x0 "HPDMA_C14SR,HPDMA channel 14 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x764++0x3 line.long 0x0 "HPDMA_C14CR,HPDMA channel 14 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x790++0x1B line.long 0x0 "HPDMA_C14TR1,HPDMA channel 14 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C14TR2,HPDMA channel 14 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C14BR1,HPDMA channel 14 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C14SAR,HPDMA channel 14 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C14DAR,HPDMA channel 14 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C14TR3,HPDMA channel 14 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C14BR2,HPDMA channel 14 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x7CC++0xF line.long 0x0 "HPDMA_C14LLR,HPDMA channel 14 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C15LBAR,HPDMA channel 15 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C15CIDCFGR,HPDMA channel 15 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C15SEMCR,HPDMA channel 15 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x7DC++0x3 line.long 0x0 "HPDMA_C15FCR,HPDMA channel 15 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x7E0++0x3 line.long 0x0 "HPDMA_C15SR,HPDMA channel 15 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x7E4++0x3 line.long 0x0 "HPDMA_C15CR,HPDMA channel 15 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x810++0x1B line.long 0x0 "HPDMA_C15TR1,HPDMA channel 15 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C15TR2,HPDMA channel 15 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C15BR1,HPDMA channel 15 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C15SAR,HPDMA channel 15 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C15DAR,HPDMA channel 15 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C15TR3,HPDMA channel 15 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C15BR2,HPDMA channel 15 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x84C++0x3 line.long 0x0 "HPDMA_C15LLR,HPDMA channel 15 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" rgroup.long 0xFC0++0x3F line.long 0x0 "HPDMA_HWCFGR13,HPDMA hardware configuration 13 register" bitfld.long 0x0 28. "G_PER_CTRL15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x0 24. "G_PER_CTRL14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x0 20. "G_PER_CTRL13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x0 16. "G_PER_CTRL12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "G_PER_CTRL11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x0 8. "G_PER_CTRL10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x0 4. "G_PER_CTRL9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x0 0. "G_PER_CTRL8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x4 "HPDMA_HWCFGR12,HPDMA hardware configuration 12 register" bitfld.long 0x4 28. "G_PER_CTRL7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x4 24. "G_PER_CTRL6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x4 20. "G_PER_CTRL5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x4 16. "G_PER_CTRL4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "G_PER_CTRL3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x4 8. "G_PER_CTRL2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x4 4. "G_PER_CTRL1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x4 0. "G_PER_CTRL0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x8 "HPDMA_HWCFGR11,HPDMA hardware configuration 11 register" bitfld.long 0x8 24. "G_TST_LL_IMPORT,Master port for the link transfer (DFT purpose only)" "B_0x0,B_0x1" bitfld.long 0x8 20.--22. "G_NUM_RESYNC_FFS,Number of resynchronization flip-flops in the range 2 to 6" "0,1,2,3,4,5,6,7" bitfld.long 0x8 16.--18. "G_CID_WIDTH,CID bus width in the range 1 to 4" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 8.--13. 1. "G_SEC_OPTIONREG,Secure optional register width in the range 0 to 32" newline hexmask.long.byte 0x8 0.--5. 1. "G_NONSEC_OPTIONREG,nonsecure optional register width in the range 0 to 32" line.long 0xC "HPDMA_HWCFGR10,HPDMA hardware configuration 10 register" bitfld.long 0xC 28.--29. "G_ADDRESSING15,DMA transfer type for channel 15" "B_0x0,B_0x1,?,?" bitfld.long 0xC 24.--25. "G_ADDRESSING14,DMA transfer type for channel 14" "B_0x0,B_0x1,?,?" bitfld.long 0xC 20.--21. "G_ADDRESSING13,DMA transfer type for channel 13" "B_0x0,B_0x1,?,?" bitfld.long 0xC 16.--17. "G_ADDRESSING12,DMA transfer type for channel 12" "B_0x0,B_0x1,?,?" newline bitfld.long 0xC 12.--13. "G_ADDRESSING11,DMA transfer type for channel 11" "B_0x0,B_0x1,?,?" bitfld.long 0xC 8.--9. "G_ADDRESSING10,DMA transfer type for channel 10" "B_0x0,B_0x1,?,?" bitfld.long 0xC 4.--5. "G_ADDRESSING9,DMA transfer type for channel 9" "B_0x0,B_0x1,?,?" bitfld.long 0xC 0.--1. "G_ADDRESSING8,DMA transfer type for channel 8" "B_0x0,B_0x1,?,?" line.long 0x10 "HPDMA_HWCFGR9,HPDMA hardware configuration 9 register" bitfld.long 0x10 28.--29. "G_ADDRESSING7,DMA transfer type for channel 7" "B_0x0,B_0x1,?,?" bitfld.long 0x10 24.--25. "G_ADDRESSING6,DMA transfer type for channel 6" "B_0x0,B_0x1,?,?" bitfld.long 0x10 20.--21. "G_ADDRESSING5,DMA transfer type for channel 5" "B_0x0,B_0x1,?,?" bitfld.long 0x10 16.--17. "G_ADDRESSING4,DMA transfer type for channel 4" "B_0x0,B_0x1,?,?" newline bitfld.long 0x10 12.--13. "G_ADDRESSING3,DMA transfer type for channel 3" "B_0x0,B_0x1,?,?" bitfld.long 0x10 8.--9. "G_ADDRESSING2,DMA transfer type for channel 2" "B_0x0,B_0x1,?,?" bitfld.long 0x10 4.--5. "G_ADDRESSING1,DMA transfer type for channel 1" "B_0x0,B_0x1,?,?" bitfld.long 0x10 0.--1. "G_ADDRESSING0,DMA transfer type for channel 0" "B_0x0,B_0x1,?,?" line.long 0x14 "HPDMA_HWCFGR8,HPDMA hardware configuration 8 register" bitfld.long 0x14 28. "G_LINKED_LIST15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x14 24. "G_LINKED_LIST14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x14 20. "G_LINKED_LIST13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x14 16. "G_LINKED_LIST12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x14 12. "G_LINKED_LIST11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x14 8. "G_LINKED_LIST10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x14 4. "G_LINKED_LIST9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x14 0. "G_LINKED_LIST8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x18 "HPDMA_HWCFGR7,HPDMA hardware configuration 7 register" bitfld.long 0x18 28. "G_LINKED_LIST7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x18 24. "G_LINKED_LIST6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x18 20. "G_LINKED_LIST5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x18 16. "G_LINKED_LIST4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x18 12. "G_LINKED_LIST3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x18 8. "G_LINKED_LIST2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x18 4. "G_LINKED_LIST1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x18 0. "G_LINKED_LIST0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x1C "HPDMA_HWCFGR6,HPDMA hardware configuration 6 register" bitfld.long 0x1C 28. "G_TRANSFERS15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x1C 24. "G_TRANSFERS14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x1C 20. "G_TRANSFERS13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x1C 16. "G_TRANSFERS12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x1C 12. "G_TRANSFERS11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x1C 8. "G_TRANSFERS10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x1C 4. "G_TRANSFERS9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x1C 0. "G_TRANSFERS8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x20 "HPDMA_HWCFGR5,HPDMA hardware configuration 5 register" bitfld.long 0x20 28. "G_TRANSFERS7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x20 24. "G_TRANSFERS6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x20 20. "G_TRANSFERS5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x20 16. "G_TRANSFERS4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x20 12. "G_TRANSFERS3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x20 8. "G_TRANSFERS2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x20 4. "G_TRANSFERS1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x20 0. "G_TRANSFERS0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x24 "HPDMA_HWCFGR4,HPDMA hardware configuration 4 register" bitfld.long 0x24 28.--30. "G_FIFO_SIZE15,FIFO size for the channel 15 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 24.--26. "G_FIFO_SIZE14,FIFO size for the channel 14 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 20.--22. "G_FIFO_SIZE13,FIFO size for the channel 13 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 16.--18. "G_FIFO_SIZE12,FIFO size for the channel 12 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x24 12.--14. "G_FIFO_SIZE11,FIFO size for the channel 11 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 8.--10. "G_FIFO_SIZE10,FIFO size for the channel 10 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 4.--6. "G_FIFO_SIZE9,FIFO size for the channel 9 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 0.--2. "G_FIFO_SIZE8,FIFO size for the channel 8 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" line.long 0x28 "HPDMA_HWCFGR3,HPDMA hardware configuration 3 register" bitfld.long 0x28 28.--30. "G_FIFO_SIZE7,FIFO size for the channel 7 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 24.--26. "G_FIFO_SIZE6,FIFO size for the channel 6 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 20.--22. "G_FIFO_SIZE5,FIFO size for the channel 5 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 16.--18. "G_FIFO_SIZE4,FIFO size for the channel 4 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x28 12.--14. "G_FIFO_SIZE3,FIFO size for the channel 3 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 8.--10. "G_FIFO_SIZE2,FIFO size for the channel 2 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 4.--6. "G_FIFO_SIZE1,FIFO size for the channel 1 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 0.--2. "G_FIFO_SIZE0,FIFO size for the channel 0 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" line.long 0x2C "HPDMA_HWCFGR2,HPDMA hardware configuration 2 register" hexmask.long.byte 0x2C 8.--14. 1. "G_MAX_TRIG_ID,Maximum trigger event identification (in the range 0 to 127)" hexmask.long.byte 0x2C 0.--7. 1. "G_MAX_REQ_ID,Maximum peripheral request identification (in the range 0 to 255)" line.long 0x30 "HPDMA_HWCFGR1,HPDMA hardware configuration 1 register" bitfld.long 0x30 28.--29. "G_M1_DATA_WIDTH_ENC,in the range 0 to 2" "B_0x0,B_0x1,?,?" bitfld.long 0x30 24.--25. "G_M0_DATA_WIDTH_ENC,in the range 0 to 2" "B_0x0,B_0x1,?,?" hexmask.long.byte 0x30 20.--23. 1. "G_MAX_CID,in the range 0 to 15" bitfld.long 0x30 16. "G_TRUSTZONE,TrustZone" "B_0x0,B_0x1" newline hexmask.long.byte 0x30 8.--12. 1. "G_NUM_CHANNELS,in the range 2 to 16" bitfld.long 0x30 4. "G_PRIVILEGE,privilege" "B_0x0,B_0x1" bitfld.long 0x30 0.--2. "G_MASTER_PORTS,in the range 0 to 5" "B_0x0,B_0x1,?,?,?,?,?,?" line.long 0x34 "HPDMA_VERR,HPDMA version register" hexmask.long.byte 0x34 4.--7. 1. "MAJREV,HPDMA major revision" hexmask.long.byte 0x34 0.--3. 1. "MINREV,HPDMA minor revision" line.long 0x38 "HPDMA_IPIDR,HPDMA identification register" hexmask.long 0x38 0.--31. 1. "ID,HPDMA identification" line.long 0x3C "HPDMA_SIDR,HPDMA size identification register" hexmask.long 0x3C 0.--31. 1. "SID,size identification" tree.end tree "HPDMA2_S" base ad:0x50410000 group.long 0x0++0xB line.long 0x0 "HPDMA_SECCFGR,HPDMA secure configuration register" bitfld.long 0x0 15. "SEC15,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,Secure state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "SEC11,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 9. "SEC9,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,Secure state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "SEC7,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Secure state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,Secure state of channel x" "B_0x0,B_0x1" line.long 0x4 "HPDMA_PRIVCFGR,HPDMA privileged configuration register" bitfld.long 0x4 15. "PRIV15,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,Privileged state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "PRIV11,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 9. "PRIV9,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,Privileged state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "PRIV7,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,Privileged state of channel x" "B_0x0,B_0x1" line.long 0x8 "HPDMA_RCFGLOCKR,HPDMA configuration lock register" bitfld.long 0x8 15. "LOCK15,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 14. "LOCK14,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 13. "LOCK13,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 12. "LOCK12,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" newline bitfld.long 0x8 11. "LOCK11,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 10. "LOCK10,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 9. "LOCK9,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 8. "LOCK8,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" newline bitfld.long 0x8 7. "LOCK7,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 6. "LOCK6,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 5. "LOCK5,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 4. "LOCK4,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "LOCK3,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 2. "LOCK2,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 1. "LOCK1,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 0. "LOCK0,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" rgroup.long 0xC++0x7 line.long 0x0 "HPDMA_MISR,HPDMA nonsecure masked interrupt status register" bitfld.long 0x0 15. "MIS15,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 14. "MIS14,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 13. "MIS13,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 12. "MIS12,Masked interrupt status of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "MIS11,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 10. "MIS10,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 9. "MIS9,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 8. "MIS8,Masked interrupt status of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "MIS7,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 6. "MIS6,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 5. "MIS5,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 4. "MIS4,Masked interrupt status of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "MIS3,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 2. "MIS2,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 1. "MIS1,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 0. "MIS0,Masked interrupt status of channel x" "B_0x0,B_0x1" line.long 0x4 "HPDMA_SMISR,HPDMA secure masked interrupt status register" bitfld.long 0x4 15. "MIS15,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 14. "MIS14,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 13. "MIS13,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 12. "MIS12,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "MIS11,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 10. "MIS10,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 9. "MIS9,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 8. "MIS8,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "MIS7,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 6. "MIS6,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 5. "MIS5,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 4. "MIS4,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "MIS3,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 2. "MIS2,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 1. "MIS1,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 0. "MIS0,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" group.long 0x50++0xB line.long 0x0 "HPDMA_C0LBAR,HPDMA channel 0 linked-list base address register" hexmask.long.word 0x0 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x4 "HPDMA_C0CIDCFGR,HPDMA channel 0 CID register" bitfld.long 0x4 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x4 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x4 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0x8 "HPDMA_C0SEMCR,HPDMA channel 0 semaphore control register" rbitfld.long 0x8 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x5C++0x3 line.long 0x0 "HPDMA_C0FCR,HPDMA channel 0 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x60++0x3 line.long 0x0 "HPDMA_C0SR,HPDMA channel 0 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x64++0x3 line.long 0x0 "HPDMA_C0CR,HPDMA channel 0 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x90++0x13 line.long 0x0 "HPDMA_C0TR1,HPDMA channel 0 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C0TR2,HPDMA channel 0 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C0BR1,HPDMA channel 0 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C0SAR,HPDMA channel 0 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C0DAR,HPDMA channel 0 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0xCC++0xF line.long 0x0 "HPDMA_C0LLR,HPDMA channel 0 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C1LBAR,HPDMA channel 1 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C1CIDCFGR,HPDMA channel 1 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C1SEMCR,HPDMA channel 1 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0xDC++0x3 line.long 0x0 "HPDMA_C1FCR,HPDMA channel 1 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0xE0++0x3 line.long 0x0 "HPDMA_C1SR,HPDMA channel 1 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0xE4++0x3 line.long 0x0 "HPDMA_C1CR,HPDMA channel 1 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x110++0x13 line.long 0x0 "HPDMA_C1TR1,HPDMA channel 1 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C1TR2,HPDMA channel 1 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C1BR1,HPDMA channel 1 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C1SAR,HPDMA channel 1 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C1DAR,HPDMA channel 1 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x14C++0xF line.long 0x0 "HPDMA_C1LLR,HPDMA channel 1 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C2LBAR,HPDMA channel 2 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C2CIDCFGR,HPDMA channel 2 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C2SEMCR,HPDMA channel 2 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x15C++0x3 line.long 0x0 "HPDMA_C2FCR,HPDMA channel 2 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x160++0x3 line.long 0x0 "HPDMA_C2SR,HPDMA channel 2 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x164++0x3 line.long 0x0 "HPDMA_C2CR,HPDMA channel 2 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x190++0x13 line.long 0x0 "HPDMA_C2TR1,HPDMA channel 2 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C2TR2,HPDMA channel 2 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C2BR1,HPDMA channel 2 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C2SAR,HPDMA channel 2 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C2DAR,HPDMA channel 2 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x1CC++0xF line.long 0x0 "HPDMA_C2LLR,HPDMA channel 2 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C3LBAR,HPDMA channel 3 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C3CIDCFGR,HPDMA channel 3 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C3SEMCR,HPDMA channel 3 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x1DC++0x3 line.long 0x0 "HPDMA_C3FCR,HPDMA channel 3 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x1E0++0x3 line.long 0x0 "HPDMA_C3SR,HPDMA channel 3 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x1E4++0x3 line.long 0x0 "HPDMA_C3CR,HPDMA channel 3 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x210++0x13 line.long 0x0 "HPDMA_C3TR1,HPDMA channel 3 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C3TR2,HPDMA channel 3 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C3BR1,HPDMA channel 3 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C3SAR,HPDMA channel 3 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C3DAR,HPDMA channel 3 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x24C++0xF line.long 0x0 "HPDMA_C3LLR,HPDMA channel 3 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C4LBAR,HPDMA channel 4 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C4CIDCFGR,HPDMA channel 4 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C4SEMCR,HPDMA channel 4 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x25C++0x3 line.long 0x0 "HPDMA_C4FCR,HPDMA channel 4 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x260++0x3 line.long 0x0 "HPDMA_C4SR,HPDMA channel 4 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x264++0x3 line.long 0x0 "HPDMA_C4CR,HPDMA channel 4 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x290++0x13 line.long 0x0 "HPDMA_C4TR1,HPDMA channel 4 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C4TR2,HPDMA channel 4 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C4BR1,HPDMA channel 4 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C4SAR,HPDMA channel 4 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C4DAR,HPDMA channel 4 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x2CC++0xF line.long 0x0 "HPDMA_C4LLR,HPDMA channel 4 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C5LBAR,HPDMA channel 5 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C5CIDCFGR,HPDMA channel 5 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C5SEMCR,HPDMA channel 5 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x2DC++0x3 line.long 0x0 "HPDMA_C5FCR,HPDMA channel 5 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x2E0++0x3 line.long 0x0 "HPDMA_C5SR,HPDMA channel 5 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x2E4++0x3 line.long 0x0 "HPDMA_C5CR,HPDMA channel 5 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x310++0x13 line.long 0x0 "HPDMA_C5TR1,HPDMA channel 5 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C5TR2,HPDMA channel 5 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C5BR1,HPDMA channel 5 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C5SAR,HPDMA channel 5 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C5DAR,HPDMA channel 5 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x34C++0xF line.long 0x0 "HPDMA_C5LLR,HPDMA channel 5 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C6LBAR,HPDMA channel 6 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C6CIDCFGR,HPDMA channel 6 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C6SEMCR,HPDMA channel 6 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x35C++0x3 line.long 0x0 "HPDMA_C6FCR,HPDMA channel 6 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x360++0x3 line.long 0x0 "HPDMA_C6SR,HPDMA channel 6 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x364++0x3 line.long 0x0 "HPDMA_C6CR,HPDMA channel 6 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x390++0x13 line.long 0x0 "HPDMA_C6TR1,HPDMA channel 6 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C6TR2,HPDMA channel 6 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C6BR1,HPDMA channel 6 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C6SAR,HPDMA channel 6 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C6DAR,HPDMA channel 6 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x3CC++0xF line.long 0x0 "HPDMA_C6LLR,HPDMA channel 6 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C7LBAR,HPDMA channel 7 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C7CIDCFGR,HPDMA channel 7 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C7SEMCR,HPDMA channel 7 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x3DC++0x3 line.long 0x0 "HPDMA_C7FCR,HPDMA channel 7 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x3E0++0x3 line.long 0x0 "HPDMA_C7SR,HPDMA channel 7 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x3E4++0x3 line.long 0x0 "HPDMA_C7CR,HPDMA channel 7 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x410++0x13 line.long 0x0 "HPDMA_C7TR1,HPDMA channel 7 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C7TR2,HPDMA channel 7 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C7BR1,HPDMA channel 7 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C7SAR,HPDMA channel 7 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C7DAR,HPDMA channel 7 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x44C++0xF line.long 0x0 "HPDMA_C7LLR,HPDMA channel 7 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C8LBAR,HPDMA channel 8 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C8CIDCFGR,HPDMA channel 8 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C8SEMCR,HPDMA channel 8 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x45C++0x3 line.long 0x0 "HPDMA_C8FCR,HPDMA channel 8 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x460++0x3 line.long 0x0 "HPDMA_C8SR,HPDMA channel 8 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x464++0x3 line.long 0x0 "HPDMA_C8CR,HPDMA channel 8 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x490++0x13 line.long 0x0 "HPDMA_C8TR1,HPDMA channel 8 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C8TR2,HPDMA channel 8 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C8BR1,HPDMA channel 8 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C8SAR,HPDMA channel 8 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C8DAR,HPDMA channel 8 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x4CC++0xF line.long 0x0 "HPDMA_C8LLR,HPDMA channel 8 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C9LBAR,HPDMA channel 9 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C9CIDCFGR,HPDMA channel 9 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C9SEMCR,HPDMA channel 9 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x4DC++0x3 line.long 0x0 "HPDMA_C9FCR,HPDMA channel 9 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x4E0++0x3 line.long 0x0 "HPDMA_C9SR,HPDMA channel 9 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x4E4++0x3 line.long 0x0 "HPDMA_C9CR,HPDMA channel 9 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x510++0x13 line.long 0x0 "HPDMA_C9TR1,HPDMA channel 9 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C9TR2,HPDMA channel 9 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C9BR1,HPDMA channel 9 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C9SAR,HPDMA channel 9 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C9DAR,HPDMA channel 9 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x54C++0xF line.long 0x0 "HPDMA_C9LLR,HPDMA channel 9 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C10LBAR,HPDMA channel 10 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C10CIDCFGR,HPDMA channel 10 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C10SEMCR,HPDMA channel 10 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x55C++0x3 line.long 0x0 "HPDMA_C10FCR,HPDMA channel 10 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x560++0x3 line.long 0x0 "HPDMA_C10SR,HPDMA channel 10 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x564++0x3 line.long 0x0 "HPDMA_C10CR,HPDMA channel 10 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x590++0x13 line.long 0x0 "HPDMA_C10TR1,HPDMA channel 10 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C10TR2,HPDMA channel 10 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C10BR1,HPDMA channel 10 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C10SAR,HPDMA channel 10 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C10DAR,HPDMA channel 10 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x5CC++0xF line.long 0x0 "HPDMA_C10LLR,HPDMA channel 10 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C11LBAR,HPDMA channel 11 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C11CIDCFGR,HPDMA channel 11 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C11SEMCR,HPDMA channel 11 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x5DC++0x3 line.long 0x0 "HPDMA_C11FCR,HPDMA channel 11 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x5E0++0x3 line.long 0x0 "HPDMA_C11SR,HPDMA channel 11 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x5E4++0x3 line.long 0x0 "HPDMA_C11CR,HPDMA channel 11 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x610++0x13 line.long 0x0 "HPDMA_C11TR1,HPDMA channel 11 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C11TR2,HPDMA channel 11 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C11BR1,HPDMA channel 11 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C11SAR,HPDMA channel 11 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C11DAR,HPDMA channel 11 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x64C++0xF line.long 0x0 "HPDMA_C11LLR,HPDMA channel 11 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C12LBAR,HPDMA channel 12 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C12CIDCFGR,HPDMA channel 12 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C12SEMCR,HPDMA channel 12 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x65C++0x3 line.long 0x0 "HPDMA_C12FCR,HPDMA channel 12 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x660++0x3 line.long 0x0 "HPDMA_C12SR,HPDMA channel 12 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x664++0x3 line.long 0x0 "HPDMA_C12CR,HPDMA channel 12 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x690++0x1B line.long 0x0 "HPDMA_C12TR1,HPDMA channel 12 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C12TR2,HPDMA channel 12 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C12BR1,HPDMA channel 12 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C12SAR,HPDMA channel 12 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C12DAR,HPDMA channel 12 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C12TR3,HPDMA channel 12 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C12BR2,HPDMA channel 12 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x6CC++0xF line.long 0x0 "HPDMA_C12LLR,HPDMA channel 12 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C13LBAR,HPDMA channel 13 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C13CIDCFGR,HPDMA channel 13 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C13SEMCR,HPDMA channel 13 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x6DC++0x3 line.long 0x0 "HPDMA_C13FCR,HPDMA channel 13 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x6E0++0x3 line.long 0x0 "HPDMA_C13SR,HPDMA channel 13 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x6E4++0x3 line.long 0x0 "HPDMA_C13CR,HPDMA channel 13 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x710++0x1B line.long 0x0 "HPDMA_C13TR1,HPDMA channel 13 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C13TR2,HPDMA channel 13 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C13BR1,HPDMA channel 13 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C13SAR,HPDMA channel 13 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C13DAR,HPDMA channel 13 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C13TR3,HPDMA channel 13 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C13BR2,HPDMA channel 13 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x74C++0xF line.long 0x0 "HPDMA_C13LLR,HPDMA channel 13 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C14LBAR,HPDMA channel 14 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C14CIDCFGR,HPDMA channel 14 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C14SEMCR,HPDMA channel 14 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x75C++0x3 line.long 0x0 "HPDMA_C14FCR,HPDMA channel 14 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x760++0x3 line.long 0x0 "HPDMA_C14SR,HPDMA channel 14 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x764++0x3 line.long 0x0 "HPDMA_C14CR,HPDMA channel 14 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x790++0x1B line.long 0x0 "HPDMA_C14TR1,HPDMA channel 14 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C14TR2,HPDMA channel 14 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C14BR1,HPDMA channel 14 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C14SAR,HPDMA channel 14 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C14DAR,HPDMA channel 14 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C14TR3,HPDMA channel 14 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C14BR2,HPDMA channel 14 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x7CC++0xF line.long 0x0 "HPDMA_C14LLR,HPDMA channel 14 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C15LBAR,HPDMA channel 15 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C15CIDCFGR,HPDMA channel 15 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C15SEMCR,HPDMA channel 15 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x7DC++0x3 line.long 0x0 "HPDMA_C15FCR,HPDMA channel 15 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x7E0++0x3 line.long 0x0 "HPDMA_C15SR,HPDMA channel 15 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x7E4++0x3 line.long 0x0 "HPDMA_C15CR,HPDMA channel 15 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x810++0x1B line.long 0x0 "HPDMA_C15TR1,HPDMA channel 15 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C15TR2,HPDMA channel 15 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C15BR1,HPDMA channel 15 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C15SAR,HPDMA channel 15 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C15DAR,HPDMA channel 15 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C15TR3,HPDMA channel 15 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C15BR2,HPDMA channel 15 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x84C++0x3 line.long 0x0 "HPDMA_C15LLR,HPDMA channel 15 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" rgroup.long 0xFC0++0x3F line.long 0x0 "HPDMA_HWCFGR13,HPDMA hardware configuration 13 register" bitfld.long 0x0 28. "G_PER_CTRL15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x0 24. "G_PER_CTRL14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x0 20. "G_PER_CTRL13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x0 16. "G_PER_CTRL12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "G_PER_CTRL11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x0 8. "G_PER_CTRL10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x0 4. "G_PER_CTRL9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x0 0. "G_PER_CTRL8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x4 "HPDMA_HWCFGR12,HPDMA hardware configuration 12 register" bitfld.long 0x4 28. "G_PER_CTRL7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x4 24. "G_PER_CTRL6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x4 20. "G_PER_CTRL5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x4 16. "G_PER_CTRL4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "G_PER_CTRL3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x4 8. "G_PER_CTRL2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x4 4. "G_PER_CTRL1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x4 0. "G_PER_CTRL0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x8 "HPDMA_HWCFGR11,HPDMA hardware configuration 11 register" bitfld.long 0x8 24. "G_TST_LL_IMPORT,Master port for the link transfer (DFT purpose only)" "B_0x0,B_0x1" bitfld.long 0x8 20.--22. "G_NUM_RESYNC_FFS,Number of resynchronization flip-flops in the range 2 to 6" "0,1,2,3,4,5,6,7" bitfld.long 0x8 16.--18. "G_CID_WIDTH,CID bus width in the range 1 to 4" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 8.--13. 1. "G_SEC_OPTIONREG,Secure optional register width in the range 0 to 32" newline hexmask.long.byte 0x8 0.--5. 1. "G_NONSEC_OPTIONREG,nonsecure optional register width in the range 0 to 32" line.long 0xC "HPDMA_HWCFGR10,HPDMA hardware configuration 10 register" bitfld.long 0xC 28.--29. "G_ADDRESSING15,DMA transfer type for channel 15" "B_0x0,B_0x1,?,?" bitfld.long 0xC 24.--25. "G_ADDRESSING14,DMA transfer type for channel 14" "B_0x0,B_0x1,?,?" bitfld.long 0xC 20.--21. "G_ADDRESSING13,DMA transfer type for channel 13" "B_0x0,B_0x1,?,?" bitfld.long 0xC 16.--17. "G_ADDRESSING12,DMA transfer type for channel 12" "B_0x0,B_0x1,?,?" newline bitfld.long 0xC 12.--13. "G_ADDRESSING11,DMA transfer type for channel 11" "B_0x0,B_0x1,?,?" bitfld.long 0xC 8.--9. "G_ADDRESSING10,DMA transfer type for channel 10" "B_0x0,B_0x1,?,?" bitfld.long 0xC 4.--5. "G_ADDRESSING9,DMA transfer type for channel 9" "B_0x0,B_0x1,?,?" bitfld.long 0xC 0.--1. "G_ADDRESSING8,DMA transfer type for channel 8" "B_0x0,B_0x1,?,?" line.long 0x10 "HPDMA_HWCFGR9,HPDMA hardware configuration 9 register" bitfld.long 0x10 28.--29. "G_ADDRESSING7,DMA transfer type for channel 7" "B_0x0,B_0x1,?,?" bitfld.long 0x10 24.--25. "G_ADDRESSING6,DMA transfer type for channel 6" "B_0x0,B_0x1,?,?" bitfld.long 0x10 20.--21. "G_ADDRESSING5,DMA transfer type for channel 5" "B_0x0,B_0x1,?,?" bitfld.long 0x10 16.--17. "G_ADDRESSING4,DMA transfer type for channel 4" "B_0x0,B_0x1,?,?" newline bitfld.long 0x10 12.--13. "G_ADDRESSING3,DMA transfer type for channel 3" "B_0x0,B_0x1,?,?" bitfld.long 0x10 8.--9. "G_ADDRESSING2,DMA transfer type for channel 2" "B_0x0,B_0x1,?,?" bitfld.long 0x10 4.--5. "G_ADDRESSING1,DMA transfer type for channel 1" "B_0x0,B_0x1,?,?" bitfld.long 0x10 0.--1. "G_ADDRESSING0,DMA transfer type for channel 0" "B_0x0,B_0x1,?,?" line.long 0x14 "HPDMA_HWCFGR8,HPDMA hardware configuration 8 register" bitfld.long 0x14 28. "G_LINKED_LIST15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x14 24. "G_LINKED_LIST14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x14 20. "G_LINKED_LIST13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x14 16. "G_LINKED_LIST12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x14 12. "G_LINKED_LIST11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x14 8. "G_LINKED_LIST10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x14 4. "G_LINKED_LIST9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x14 0. "G_LINKED_LIST8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x18 "HPDMA_HWCFGR7,HPDMA hardware configuration 7 register" bitfld.long 0x18 28. "G_LINKED_LIST7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x18 24. "G_LINKED_LIST6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x18 20. "G_LINKED_LIST5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x18 16. "G_LINKED_LIST4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x18 12. "G_LINKED_LIST3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x18 8. "G_LINKED_LIST2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x18 4. "G_LINKED_LIST1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x18 0. "G_LINKED_LIST0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x1C "HPDMA_HWCFGR6,HPDMA hardware configuration 6 register" bitfld.long 0x1C 28. "G_TRANSFERS15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x1C 24. "G_TRANSFERS14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x1C 20. "G_TRANSFERS13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x1C 16. "G_TRANSFERS12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x1C 12. "G_TRANSFERS11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x1C 8. "G_TRANSFERS10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x1C 4. "G_TRANSFERS9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x1C 0. "G_TRANSFERS8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x20 "HPDMA_HWCFGR5,HPDMA hardware configuration 5 register" bitfld.long 0x20 28. "G_TRANSFERS7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x20 24. "G_TRANSFERS6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x20 20. "G_TRANSFERS5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x20 16. "G_TRANSFERS4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x20 12. "G_TRANSFERS3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x20 8. "G_TRANSFERS2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x20 4. "G_TRANSFERS1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x20 0. "G_TRANSFERS0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x24 "HPDMA_HWCFGR4,HPDMA hardware configuration 4 register" bitfld.long 0x24 28.--30. "G_FIFO_SIZE15,FIFO size for the channel 15 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 24.--26. "G_FIFO_SIZE14,FIFO size for the channel 14 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 20.--22. "G_FIFO_SIZE13,FIFO size for the channel 13 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 16.--18. "G_FIFO_SIZE12,FIFO size for the channel 12 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x24 12.--14. "G_FIFO_SIZE11,FIFO size for the channel 11 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 8.--10. "G_FIFO_SIZE10,FIFO size for the channel 10 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 4.--6. "G_FIFO_SIZE9,FIFO size for the channel 9 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 0.--2. "G_FIFO_SIZE8,FIFO size for the channel 8 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" line.long 0x28 "HPDMA_HWCFGR3,HPDMA hardware configuration 3 register" bitfld.long 0x28 28.--30. "G_FIFO_SIZE7,FIFO size for the channel 7 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 24.--26. "G_FIFO_SIZE6,FIFO size for the channel 6 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 20.--22. "G_FIFO_SIZE5,FIFO size for the channel 5 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 16.--18. "G_FIFO_SIZE4,FIFO size for the channel 4 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x28 12.--14. "G_FIFO_SIZE3,FIFO size for the channel 3 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 8.--10. "G_FIFO_SIZE2,FIFO size for the channel 2 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 4.--6. "G_FIFO_SIZE1,FIFO size for the channel 1 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 0.--2. "G_FIFO_SIZE0,FIFO size for the channel 0 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" line.long 0x2C "HPDMA_HWCFGR2,HPDMA hardware configuration 2 register" hexmask.long.byte 0x2C 8.--14. 1. "G_MAX_TRIG_ID,Maximum trigger event identification (in the range 0 to 127)" hexmask.long.byte 0x2C 0.--7. 1. "G_MAX_REQ_ID,Maximum peripheral request identification (in the range 0 to 255)" line.long 0x30 "HPDMA_HWCFGR1,HPDMA hardware configuration 1 register" bitfld.long 0x30 28.--29. "G_M1_DATA_WIDTH_ENC,in the range 0 to 2" "B_0x0,B_0x1,?,?" bitfld.long 0x30 24.--25. "G_M0_DATA_WIDTH_ENC,in the range 0 to 2" "B_0x0,B_0x1,?,?" hexmask.long.byte 0x30 20.--23. 1. "G_MAX_CID,in the range 0 to 15" bitfld.long 0x30 16. "G_TRUSTZONE,TrustZone" "B_0x0,B_0x1" newline hexmask.long.byte 0x30 8.--12. 1. "G_NUM_CHANNELS,in the range 2 to 16" bitfld.long 0x30 4. "G_PRIVILEGE,privilege" "B_0x0,B_0x1" bitfld.long 0x30 0.--2. "G_MASTER_PORTS,in the range 0 to 5" "B_0x0,B_0x1,?,?,?,?,?,?" line.long 0x34 "HPDMA_VERR,HPDMA version register" hexmask.long.byte 0x34 4.--7. 1. "MAJREV,HPDMA major revision" hexmask.long.byte 0x34 0.--3. 1. "MINREV,HPDMA minor revision" line.long 0x38 "HPDMA_IPIDR,HPDMA identification register" hexmask.long 0x38 0.--31. 1. "ID,HPDMA identification" line.long 0x3C "HPDMA_SIDR,HPDMA size identification register" hexmask.long 0x3C 0.--31. 1. "SID,size identification" tree.end tree "HPDMA3" base ad:0x40420000 group.long 0x0++0xB line.long 0x0 "HPDMA_SECCFGR,HPDMA secure configuration register" bitfld.long 0x0 15. "SEC15,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,Secure state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "SEC11,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 9. "SEC9,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,Secure state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "SEC7,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Secure state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,Secure state of channel x" "B_0x0,B_0x1" line.long 0x4 "HPDMA_PRIVCFGR,HPDMA privileged configuration register" bitfld.long 0x4 15. "PRIV15,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,Privileged state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "PRIV11,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 9. "PRIV9,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,Privileged state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "PRIV7,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,Privileged state of channel x" "B_0x0,B_0x1" line.long 0x8 "HPDMA_RCFGLOCKR,HPDMA configuration lock register" bitfld.long 0x8 15. "LOCK15,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 14. "LOCK14,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 13. "LOCK13,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 12. "LOCK12,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" newline bitfld.long 0x8 11. "LOCK11,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 10. "LOCK10,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 9. "LOCK9,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 8. "LOCK8,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" newline bitfld.long 0x8 7. "LOCK7,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 6. "LOCK6,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 5. "LOCK5,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 4. "LOCK4,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "LOCK3,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 2. "LOCK2,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 1. "LOCK1,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 0. "LOCK0,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" rgroup.long 0xC++0x7 line.long 0x0 "HPDMA_MISR,HPDMA nonsecure masked interrupt status register" bitfld.long 0x0 15. "MIS15,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 14. "MIS14,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 13. "MIS13,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 12. "MIS12,Masked interrupt status of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "MIS11,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 10. "MIS10,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 9. "MIS9,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 8. "MIS8,Masked interrupt status of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "MIS7,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 6. "MIS6,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 5. "MIS5,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 4. "MIS4,Masked interrupt status of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "MIS3,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 2. "MIS2,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 1. "MIS1,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 0. "MIS0,Masked interrupt status of channel x" "B_0x0,B_0x1" line.long 0x4 "HPDMA_SMISR,HPDMA secure masked interrupt status register" bitfld.long 0x4 15. "MIS15,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 14. "MIS14,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 13. "MIS13,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 12. "MIS12,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "MIS11,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 10. "MIS10,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 9. "MIS9,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 8. "MIS8,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "MIS7,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 6. "MIS6,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 5. "MIS5,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 4. "MIS4,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "MIS3,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 2. "MIS2,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 1. "MIS1,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 0. "MIS0,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" group.long 0x50++0xB line.long 0x0 "HPDMA_C0LBAR,HPDMA channel 0 linked-list base address register" hexmask.long.word 0x0 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x4 "HPDMA_C0CIDCFGR,HPDMA channel 0 CID register" bitfld.long 0x4 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x4 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x4 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0x8 "HPDMA_C0SEMCR,HPDMA channel 0 semaphore control register" rbitfld.long 0x8 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x5C++0x3 line.long 0x0 "HPDMA_C0FCR,HPDMA channel 0 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x60++0x3 line.long 0x0 "HPDMA_C0SR,HPDMA channel 0 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x64++0x3 line.long 0x0 "HPDMA_C0CR,HPDMA channel 0 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x90++0x13 line.long 0x0 "HPDMA_C0TR1,HPDMA channel 0 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C0TR2,HPDMA channel 0 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C0BR1,HPDMA channel 0 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C0SAR,HPDMA channel 0 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C0DAR,HPDMA channel 0 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0xCC++0xF line.long 0x0 "HPDMA_C0LLR,HPDMA channel 0 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C1LBAR,HPDMA channel 1 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C1CIDCFGR,HPDMA channel 1 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C1SEMCR,HPDMA channel 1 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0xDC++0x3 line.long 0x0 "HPDMA_C1FCR,HPDMA channel 1 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0xE0++0x3 line.long 0x0 "HPDMA_C1SR,HPDMA channel 1 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0xE4++0x3 line.long 0x0 "HPDMA_C1CR,HPDMA channel 1 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x110++0x13 line.long 0x0 "HPDMA_C1TR1,HPDMA channel 1 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C1TR2,HPDMA channel 1 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C1BR1,HPDMA channel 1 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C1SAR,HPDMA channel 1 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C1DAR,HPDMA channel 1 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x14C++0xF line.long 0x0 "HPDMA_C1LLR,HPDMA channel 1 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C2LBAR,HPDMA channel 2 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C2CIDCFGR,HPDMA channel 2 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C2SEMCR,HPDMA channel 2 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x15C++0x3 line.long 0x0 "HPDMA_C2FCR,HPDMA channel 2 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x160++0x3 line.long 0x0 "HPDMA_C2SR,HPDMA channel 2 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x164++0x3 line.long 0x0 "HPDMA_C2CR,HPDMA channel 2 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x190++0x13 line.long 0x0 "HPDMA_C2TR1,HPDMA channel 2 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C2TR2,HPDMA channel 2 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C2BR1,HPDMA channel 2 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C2SAR,HPDMA channel 2 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C2DAR,HPDMA channel 2 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x1CC++0xF line.long 0x0 "HPDMA_C2LLR,HPDMA channel 2 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C3LBAR,HPDMA channel 3 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C3CIDCFGR,HPDMA channel 3 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C3SEMCR,HPDMA channel 3 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x1DC++0x3 line.long 0x0 "HPDMA_C3FCR,HPDMA channel 3 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x1E0++0x3 line.long 0x0 "HPDMA_C3SR,HPDMA channel 3 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x1E4++0x3 line.long 0x0 "HPDMA_C3CR,HPDMA channel 3 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x210++0x13 line.long 0x0 "HPDMA_C3TR1,HPDMA channel 3 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C3TR2,HPDMA channel 3 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C3BR1,HPDMA channel 3 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C3SAR,HPDMA channel 3 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C3DAR,HPDMA channel 3 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x24C++0xF line.long 0x0 "HPDMA_C3LLR,HPDMA channel 3 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C4LBAR,HPDMA channel 4 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C4CIDCFGR,HPDMA channel 4 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C4SEMCR,HPDMA channel 4 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x25C++0x3 line.long 0x0 "HPDMA_C4FCR,HPDMA channel 4 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x260++0x3 line.long 0x0 "HPDMA_C4SR,HPDMA channel 4 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x264++0x3 line.long 0x0 "HPDMA_C4CR,HPDMA channel 4 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x290++0x13 line.long 0x0 "HPDMA_C4TR1,HPDMA channel 4 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C4TR2,HPDMA channel 4 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C4BR1,HPDMA channel 4 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C4SAR,HPDMA channel 4 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C4DAR,HPDMA channel 4 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x2CC++0xF line.long 0x0 "HPDMA_C4LLR,HPDMA channel 4 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C5LBAR,HPDMA channel 5 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C5CIDCFGR,HPDMA channel 5 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C5SEMCR,HPDMA channel 5 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x2DC++0x3 line.long 0x0 "HPDMA_C5FCR,HPDMA channel 5 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x2E0++0x3 line.long 0x0 "HPDMA_C5SR,HPDMA channel 5 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x2E4++0x3 line.long 0x0 "HPDMA_C5CR,HPDMA channel 5 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x310++0x13 line.long 0x0 "HPDMA_C5TR1,HPDMA channel 5 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C5TR2,HPDMA channel 5 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C5BR1,HPDMA channel 5 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C5SAR,HPDMA channel 5 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C5DAR,HPDMA channel 5 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x34C++0xF line.long 0x0 "HPDMA_C5LLR,HPDMA channel 5 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C6LBAR,HPDMA channel 6 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C6CIDCFGR,HPDMA channel 6 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C6SEMCR,HPDMA channel 6 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x35C++0x3 line.long 0x0 "HPDMA_C6FCR,HPDMA channel 6 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x360++0x3 line.long 0x0 "HPDMA_C6SR,HPDMA channel 6 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x364++0x3 line.long 0x0 "HPDMA_C6CR,HPDMA channel 6 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x390++0x13 line.long 0x0 "HPDMA_C6TR1,HPDMA channel 6 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C6TR2,HPDMA channel 6 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C6BR1,HPDMA channel 6 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C6SAR,HPDMA channel 6 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C6DAR,HPDMA channel 6 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x3CC++0xF line.long 0x0 "HPDMA_C6LLR,HPDMA channel 6 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C7LBAR,HPDMA channel 7 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C7CIDCFGR,HPDMA channel 7 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C7SEMCR,HPDMA channel 7 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x3DC++0x3 line.long 0x0 "HPDMA_C7FCR,HPDMA channel 7 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x3E0++0x3 line.long 0x0 "HPDMA_C7SR,HPDMA channel 7 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x3E4++0x3 line.long 0x0 "HPDMA_C7CR,HPDMA channel 7 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x410++0x13 line.long 0x0 "HPDMA_C7TR1,HPDMA channel 7 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C7TR2,HPDMA channel 7 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C7BR1,HPDMA channel 7 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C7SAR,HPDMA channel 7 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C7DAR,HPDMA channel 7 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x44C++0xF line.long 0x0 "HPDMA_C7LLR,HPDMA channel 7 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C8LBAR,HPDMA channel 8 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C8CIDCFGR,HPDMA channel 8 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C8SEMCR,HPDMA channel 8 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x45C++0x3 line.long 0x0 "HPDMA_C8FCR,HPDMA channel 8 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x460++0x3 line.long 0x0 "HPDMA_C8SR,HPDMA channel 8 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x464++0x3 line.long 0x0 "HPDMA_C8CR,HPDMA channel 8 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x490++0x13 line.long 0x0 "HPDMA_C8TR1,HPDMA channel 8 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C8TR2,HPDMA channel 8 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C8BR1,HPDMA channel 8 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C8SAR,HPDMA channel 8 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C8DAR,HPDMA channel 8 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x4CC++0xF line.long 0x0 "HPDMA_C8LLR,HPDMA channel 8 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C9LBAR,HPDMA channel 9 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C9CIDCFGR,HPDMA channel 9 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C9SEMCR,HPDMA channel 9 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x4DC++0x3 line.long 0x0 "HPDMA_C9FCR,HPDMA channel 9 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x4E0++0x3 line.long 0x0 "HPDMA_C9SR,HPDMA channel 9 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x4E4++0x3 line.long 0x0 "HPDMA_C9CR,HPDMA channel 9 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x510++0x13 line.long 0x0 "HPDMA_C9TR1,HPDMA channel 9 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C9TR2,HPDMA channel 9 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C9BR1,HPDMA channel 9 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C9SAR,HPDMA channel 9 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C9DAR,HPDMA channel 9 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x54C++0xF line.long 0x0 "HPDMA_C9LLR,HPDMA channel 9 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C10LBAR,HPDMA channel 10 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C10CIDCFGR,HPDMA channel 10 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C10SEMCR,HPDMA channel 10 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x55C++0x3 line.long 0x0 "HPDMA_C10FCR,HPDMA channel 10 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x560++0x3 line.long 0x0 "HPDMA_C10SR,HPDMA channel 10 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x564++0x3 line.long 0x0 "HPDMA_C10CR,HPDMA channel 10 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x590++0x13 line.long 0x0 "HPDMA_C10TR1,HPDMA channel 10 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C10TR2,HPDMA channel 10 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C10BR1,HPDMA channel 10 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C10SAR,HPDMA channel 10 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C10DAR,HPDMA channel 10 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x5CC++0xF line.long 0x0 "HPDMA_C10LLR,HPDMA channel 10 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C11LBAR,HPDMA channel 11 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C11CIDCFGR,HPDMA channel 11 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C11SEMCR,HPDMA channel 11 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x5DC++0x3 line.long 0x0 "HPDMA_C11FCR,HPDMA channel 11 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x5E0++0x3 line.long 0x0 "HPDMA_C11SR,HPDMA channel 11 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x5E4++0x3 line.long 0x0 "HPDMA_C11CR,HPDMA channel 11 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x610++0x13 line.long 0x0 "HPDMA_C11TR1,HPDMA channel 11 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C11TR2,HPDMA channel 11 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C11BR1,HPDMA channel 11 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C11SAR,HPDMA channel 11 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C11DAR,HPDMA channel 11 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x64C++0xF line.long 0x0 "HPDMA_C11LLR,HPDMA channel 11 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C12LBAR,HPDMA channel 12 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C12CIDCFGR,HPDMA channel 12 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C12SEMCR,HPDMA channel 12 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x65C++0x3 line.long 0x0 "HPDMA_C12FCR,HPDMA channel 12 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x660++0x3 line.long 0x0 "HPDMA_C12SR,HPDMA channel 12 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x664++0x3 line.long 0x0 "HPDMA_C12CR,HPDMA channel 12 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x690++0x1B line.long 0x0 "HPDMA_C12TR1,HPDMA channel 12 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C12TR2,HPDMA channel 12 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C12BR1,HPDMA channel 12 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C12SAR,HPDMA channel 12 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C12DAR,HPDMA channel 12 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C12TR3,HPDMA channel 12 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C12BR2,HPDMA channel 12 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x6CC++0xF line.long 0x0 "HPDMA_C12LLR,HPDMA channel 12 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C13LBAR,HPDMA channel 13 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C13CIDCFGR,HPDMA channel 13 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C13SEMCR,HPDMA channel 13 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x6DC++0x3 line.long 0x0 "HPDMA_C13FCR,HPDMA channel 13 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x6E0++0x3 line.long 0x0 "HPDMA_C13SR,HPDMA channel 13 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x6E4++0x3 line.long 0x0 "HPDMA_C13CR,HPDMA channel 13 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x710++0x1B line.long 0x0 "HPDMA_C13TR1,HPDMA channel 13 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C13TR2,HPDMA channel 13 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C13BR1,HPDMA channel 13 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C13SAR,HPDMA channel 13 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C13DAR,HPDMA channel 13 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C13TR3,HPDMA channel 13 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C13BR2,HPDMA channel 13 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x74C++0xF line.long 0x0 "HPDMA_C13LLR,HPDMA channel 13 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C14LBAR,HPDMA channel 14 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C14CIDCFGR,HPDMA channel 14 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C14SEMCR,HPDMA channel 14 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x75C++0x3 line.long 0x0 "HPDMA_C14FCR,HPDMA channel 14 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x760++0x3 line.long 0x0 "HPDMA_C14SR,HPDMA channel 14 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x764++0x3 line.long 0x0 "HPDMA_C14CR,HPDMA channel 14 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x790++0x1B line.long 0x0 "HPDMA_C14TR1,HPDMA channel 14 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C14TR2,HPDMA channel 14 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C14BR1,HPDMA channel 14 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C14SAR,HPDMA channel 14 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C14DAR,HPDMA channel 14 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C14TR3,HPDMA channel 14 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C14BR2,HPDMA channel 14 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x7CC++0xF line.long 0x0 "HPDMA_C14LLR,HPDMA channel 14 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C15LBAR,HPDMA channel 15 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C15CIDCFGR,HPDMA channel 15 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C15SEMCR,HPDMA channel 15 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x7DC++0x3 line.long 0x0 "HPDMA_C15FCR,HPDMA channel 15 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x7E0++0x3 line.long 0x0 "HPDMA_C15SR,HPDMA channel 15 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x7E4++0x3 line.long 0x0 "HPDMA_C15CR,HPDMA channel 15 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x810++0x1B line.long 0x0 "HPDMA_C15TR1,HPDMA channel 15 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C15TR2,HPDMA channel 15 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C15BR1,HPDMA channel 15 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C15SAR,HPDMA channel 15 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C15DAR,HPDMA channel 15 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C15TR3,HPDMA channel 15 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C15BR2,HPDMA channel 15 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x84C++0x3 line.long 0x0 "HPDMA_C15LLR,HPDMA channel 15 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" rgroup.long 0xFC0++0x3F line.long 0x0 "HPDMA_HWCFGR13,HPDMA hardware configuration 13 register" bitfld.long 0x0 28. "G_PER_CTRL15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x0 24. "G_PER_CTRL14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x0 20. "G_PER_CTRL13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x0 16. "G_PER_CTRL12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "G_PER_CTRL11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x0 8. "G_PER_CTRL10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x0 4. "G_PER_CTRL9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x0 0. "G_PER_CTRL8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x4 "HPDMA_HWCFGR12,HPDMA hardware configuration 12 register" bitfld.long 0x4 28. "G_PER_CTRL7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x4 24. "G_PER_CTRL6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x4 20. "G_PER_CTRL5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x4 16. "G_PER_CTRL4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "G_PER_CTRL3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x4 8. "G_PER_CTRL2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x4 4. "G_PER_CTRL1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x4 0. "G_PER_CTRL0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x8 "HPDMA_HWCFGR11,HPDMA hardware configuration 11 register" bitfld.long 0x8 24. "G_TST_LL_IMPORT,Master port for the link transfer (DFT purpose only)" "B_0x0,B_0x1" bitfld.long 0x8 20.--22. "G_NUM_RESYNC_FFS,Number of resynchronization flip-flops in the range 2 to 6" "0,1,2,3,4,5,6,7" bitfld.long 0x8 16.--18. "G_CID_WIDTH,CID bus width in the range 1 to 4" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 8.--13. 1. "G_SEC_OPTIONREG,Secure optional register width in the range 0 to 32" newline hexmask.long.byte 0x8 0.--5. 1. "G_NONSEC_OPTIONREG,nonsecure optional register width in the range 0 to 32" line.long 0xC "HPDMA_HWCFGR10,HPDMA hardware configuration 10 register" bitfld.long 0xC 28.--29. "G_ADDRESSING15,DMA transfer type for channel 15" "B_0x0,B_0x1,?,?" bitfld.long 0xC 24.--25. "G_ADDRESSING14,DMA transfer type for channel 14" "B_0x0,B_0x1,?,?" bitfld.long 0xC 20.--21. "G_ADDRESSING13,DMA transfer type for channel 13" "B_0x0,B_0x1,?,?" bitfld.long 0xC 16.--17. "G_ADDRESSING12,DMA transfer type for channel 12" "B_0x0,B_0x1,?,?" newline bitfld.long 0xC 12.--13. "G_ADDRESSING11,DMA transfer type for channel 11" "B_0x0,B_0x1,?,?" bitfld.long 0xC 8.--9. "G_ADDRESSING10,DMA transfer type for channel 10" "B_0x0,B_0x1,?,?" bitfld.long 0xC 4.--5. "G_ADDRESSING9,DMA transfer type for channel 9" "B_0x0,B_0x1,?,?" bitfld.long 0xC 0.--1. "G_ADDRESSING8,DMA transfer type for channel 8" "B_0x0,B_0x1,?,?" line.long 0x10 "HPDMA_HWCFGR9,HPDMA hardware configuration 9 register" bitfld.long 0x10 28.--29. "G_ADDRESSING7,DMA transfer type for channel 7" "B_0x0,B_0x1,?,?" bitfld.long 0x10 24.--25. "G_ADDRESSING6,DMA transfer type for channel 6" "B_0x0,B_0x1,?,?" bitfld.long 0x10 20.--21. "G_ADDRESSING5,DMA transfer type for channel 5" "B_0x0,B_0x1,?,?" bitfld.long 0x10 16.--17. "G_ADDRESSING4,DMA transfer type for channel 4" "B_0x0,B_0x1,?,?" newline bitfld.long 0x10 12.--13. "G_ADDRESSING3,DMA transfer type for channel 3" "B_0x0,B_0x1,?,?" bitfld.long 0x10 8.--9. "G_ADDRESSING2,DMA transfer type for channel 2" "B_0x0,B_0x1,?,?" bitfld.long 0x10 4.--5. "G_ADDRESSING1,DMA transfer type for channel 1" "B_0x0,B_0x1,?,?" bitfld.long 0x10 0.--1. "G_ADDRESSING0,DMA transfer type for channel 0" "B_0x0,B_0x1,?,?" line.long 0x14 "HPDMA_HWCFGR8,HPDMA hardware configuration 8 register" bitfld.long 0x14 28. "G_LINKED_LIST15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x14 24. "G_LINKED_LIST14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x14 20. "G_LINKED_LIST13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x14 16. "G_LINKED_LIST12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x14 12. "G_LINKED_LIST11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x14 8. "G_LINKED_LIST10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x14 4. "G_LINKED_LIST9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x14 0. "G_LINKED_LIST8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x18 "HPDMA_HWCFGR7,HPDMA hardware configuration 7 register" bitfld.long 0x18 28. "G_LINKED_LIST7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x18 24. "G_LINKED_LIST6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x18 20. "G_LINKED_LIST5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x18 16. "G_LINKED_LIST4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x18 12. "G_LINKED_LIST3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x18 8. "G_LINKED_LIST2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x18 4. "G_LINKED_LIST1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x18 0. "G_LINKED_LIST0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x1C "HPDMA_HWCFGR6,HPDMA hardware configuration 6 register" bitfld.long 0x1C 28. "G_TRANSFERS15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x1C 24. "G_TRANSFERS14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x1C 20. "G_TRANSFERS13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x1C 16. "G_TRANSFERS12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x1C 12. "G_TRANSFERS11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x1C 8. "G_TRANSFERS10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x1C 4. "G_TRANSFERS9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x1C 0. "G_TRANSFERS8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x20 "HPDMA_HWCFGR5,HPDMA hardware configuration 5 register" bitfld.long 0x20 28. "G_TRANSFERS7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x20 24. "G_TRANSFERS6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x20 20. "G_TRANSFERS5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x20 16. "G_TRANSFERS4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x20 12. "G_TRANSFERS3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x20 8. "G_TRANSFERS2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x20 4. "G_TRANSFERS1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x20 0. "G_TRANSFERS0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x24 "HPDMA_HWCFGR4,HPDMA hardware configuration 4 register" bitfld.long 0x24 28.--30. "G_FIFO_SIZE15,FIFO size for the channel 15 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 24.--26. "G_FIFO_SIZE14,FIFO size for the channel 14 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 20.--22. "G_FIFO_SIZE13,FIFO size for the channel 13 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 16.--18. "G_FIFO_SIZE12,FIFO size for the channel 12 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x24 12.--14. "G_FIFO_SIZE11,FIFO size for the channel 11 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 8.--10. "G_FIFO_SIZE10,FIFO size for the channel 10 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 4.--6. "G_FIFO_SIZE9,FIFO size for the channel 9 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 0.--2. "G_FIFO_SIZE8,FIFO size for the channel 8 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" line.long 0x28 "HPDMA_HWCFGR3,HPDMA hardware configuration 3 register" bitfld.long 0x28 28.--30. "G_FIFO_SIZE7,FIFO size for the channel 7 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 24.--26. "G_FIFO_SIZE6,FIFO size for the channel 6 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 20.--22. "G_FIFO_SIZE5,FIFO size for the channel 5 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 16.--18. "G_FIFO_SIZE4,FIFO size for the channel 4 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x28 12.--14. "G_FIFO_SIZE3,FIFO size for the channel 3 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 8.--10. "G_FIFO_SIZE2,FIFO size for the channel 2 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 4.--6. "G_FIFO_SIZE1,FIFO size for the channel 1 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 0.--2. "G_FIFO_SIZE0,FIFO size for the channel 0 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" line.long 0x2C "HPDMA_HWCFGR2,HPDMA hardware configuration 2 register" hexmask.long.byte 0x2C 8.--14. 1. "G_MAX_TRIG_ID,Maximum trigger event identification (in the range 0 to 127)" hexmask.long.byte 0x2C 0.--7. 1. "G_MAX_REQ_ID,Maximum peripheral request identification (in the range 0 to 255)" line.long 0x30 "HPDMA_HWCFGR1,HPDMA hardware configuration 1 register" bitfld.long 0x30 28.--29. "G_M1_DATA_WIDTH_ENC,in the range 0 to 2" "B_0x0,B_0x1,?,?" bitfld.long 0x30 24.--25. "G_M0_DATA_WIDTH_ENC,in the range 0 to 2" "B_0x0,B_0x1,?,?" hexmask.long.byte 0x30 20.--23. 1. "G_MAX_CID,in the range 0 to 15" bitfld.long 0x30 16. "G_TRUSTZONE,TrustZone" "B_0x0,B_0x1" newline hexmask.long.byte 0x30 8.--12. 1. "G_NUM_CHANNELS,in the range 2 to 16" bitfld.long 0x30 4. "G_PRIVILEGE,privilege" "B_0x0,B_0x1" bitfld.long 0x30 0.--2. "G_MASTER_PORTS,in the range 0 to 5" "B_0x0,B_0x1,?,?,?,?,?,?" line.long 0x34 "HPDMA_VERR,HPDMA version register" hexmask.long.byte 0x34 4.--7. 1. "MAJREV,HPDMA major revision" hexmask.long.byte 0x34 0.--3. 1. "MINREV,HPDMA minor revision" line.long 0x38 "HPDMA_IPIDR,HPDMA identification register" hexmask.long 0x38 0.--31. 1. "ID,HPDMA identification" line.long 0x3C "HPDMA_SIDR,HPDMA size identification register" hexmask.long 0x3C 0.--31. 1. "SID,size identification" tree.end tree "HPDMA3_S" base ad:0x50420000 group.long 0x0++0xB line.long 0x0 "HPDMA_SECCFGR,HPDMA secure configuration register" bitfld.long 0x0 15. "SEC15,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 13. "SEC13,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,Secure state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "SEC11,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 9. "SEC9,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,Secure state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "SEC7,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Secure state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "SEC3,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,Secure state of channel x" "B_0x0,B_0x1" line.long 0x4 "HPDMA_PRIVCFGR,HPDMA privileged configuration register" bitfld.long 0x4 15. "PRIV15,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV14,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV13,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV12,Privileged state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "PRIV11,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV10,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 9. "PRIV9,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV8,Privileged state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "PRIV7,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged state of channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "PRIV3,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,Privileged state of channel x" "B_0x0,B_0x1" line.long 0x8 "HPDMA_RCFGLOCKR,HPDMA configuration lock register" bitfld.long 0x8 15. "LOCK15,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 14. "LOCK14,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 13. "LOCK13,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 12. "LOCK12,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" newline bitfld.long 0x8 11. "LOCK11,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 10. "LOCK10,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 9. "LOCK9,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 8. "LOCK8,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" newline bitfld.long 0x8 7. "LOCK7,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 6. "LOCK6,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 5. "LOCK5,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 4. "LOCK4,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "LOCK3,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 2. "LOCK2,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 1. "LOCK1,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" bitfld.long 0x8 0. "LOCK0,Lock of the configuration of HPDMA_SECCFGR." "B_0x0,B_0x1" rgroup.long 0xC++0x7 line.long 0x0 "HPDMA_MISR,HPDMA nonsecure masked interrupt status register" bitfld.long 0x0 15. "MIS15,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 14. "MIS14,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 13. "MIS13,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 12. "MIS12,Masked interrupt status of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "MIS11,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 10. "MIS10,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 9. "MIS9,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 8. "MIS8,Masked interrupt status of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "MIS7,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 6. "MIS6,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 5. "MIS5,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 4. "MIS4,Masked interrupt status of channel x" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "MIS3,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 2. "MIS2,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 1. "MIS1,Masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 0. "MIS0,Masked interrupt status of channel x" "B_0x0,B_0x1" line.long 0x4 "HPDMA_SMISR,HPDMA secure masked interrupt status register" bitfld.long 0x4 15. "MIS15,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 14. "MIS14,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 13. "MIS13,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 12. "MIS12,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "MIS11,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 10. "MIS10,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 9. "MIS9,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 8. "MIS8,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "MIS7,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 6. "MIS6,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 5. "MIS5,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 4. "MIS4,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "MIS3,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 2. "MIS2,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 1. "MIS1,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 0. "MIS0,Masked interrupt status of the secure channel x" "B_0x0,B_0x1" group.long 0x50++0xB line.long 0x0 "HPDMA_C0LBAR,HPDMA channel 0 linked-list base address register" hexmask.long.word 0x0 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x4 "HPDMA_C0CIDCFGR,HPDMA channel 0 CID register" bitfld.long 0x4 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x4 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x4 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0x8 "HPDMA_C0SEMCR,HPDMA channel 0 semaphore control register" rbitfld.long 0x8 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x5C++0x3 line.long 0x0 "HPDMA_C0FCR,HPDMA channel 0 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x60++0x3 line.long 0x0 "HPDMA_C0SR,HPDMA channel 0 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x64++0x3 line.long 0x0 "HPDMA_C0CR,HPDMA channel 0 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x90++0x13 line.long 0x0 "HPDMA_C0TR1,HPDMA channel 0 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C0TR2,HPDMA channel 0 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C0BR1,HPDMA channel 0 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C0SAR,HPDMA channel 0 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C0DAR,HPDMA channel 0 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0xCC++0xF line.long 0x0 "HPDMA_C0LLR,HPDMA channel 0 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C1LBAR,HPDMA channel 1 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C1CIDCFGR,HPDMA channel 1 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C1SEMCR,HPDMA channel 1 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0xDC++0x3 line.long 0x0 "HPDMA_C1FCR,HPDMA channel 1 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0xE0++0x3 line.long 0x0 "HPDMA_C1SR,HPDMA channel 1 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0xE4++0x3 line.long 0x0 "HPDMA_C1CR,HPDMA channel 1 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x110++0x13 line.long 0x0 "HPDMA_C1TR1,HPDMA channel 1 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C1TR2,HPDMA channel 1 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C1BR1,HPDMA channel 1 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C1SAR,HPDMA channel 1 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C1DAR,HPDMA channel 1 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x14C++0xF line.long 0x0 "HPDMA_C1LLR,HPDMA channel 1 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C2LBAR,HPDMA channel 2 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C2CIDCFGR,HPDMA channel 2 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C2SEMCR,HPDMA channel 2 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x15C++0x3 line.long 0x0 "HPDMA_C2FCR,HPDMA channel 2 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x160++0x3 line.long 0x0 "HPDMA_C2SR,HPDMA channel 2 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x164++0x3 line.long 0x0 "HPDMA_C2CR,HPDMA channel 2 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x190++0x13 line.long 0x0 "HPDMA_C2TR1,HPDMA channel 2 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C2TR2,HPDMA channel 2 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C2BR1,HPDMA channel 2 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C2SAR,HPDMA channel 2 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C2DAR,HPDMA channel 2 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x1CC++0xF line.long 0x0 "HPDMA_C2LLR,HPDMA channel 2 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C3LBAR,HPDMA channel 3 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C3CIDCFGR,HPDMA channel 3 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C3SEMCR,HPDMA channel 3 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x1DC++0x3 line.long 0x0 "HPDMA_C3FCR,HPDMA channel 3 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x1E0++0x3 line.long 0x0 "HPDMA_C3SR,HPDMA channel 3 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x1E4++0x3 line.long 0x0 "HPDMA_C3CR,HPDMA channel 3 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x210++0x13 line.long 0x0 "HPDMA_C3TR1,HPDMA channel 3 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C3TR2,HPDMA channel 3 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C3BR1,HPDMA channel 3 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C3SAR,HPDMA channel 3 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C3DAR,HPDMA channel 3 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x24C++0xF line.long 0x0 "HPDMA_C3LLR,HPDMA channel 3 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C4LBAR,HPDMA channel 4 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C4CIDCFGR,HPDMA channel 4 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C4SEMCR,HPDMA channel 4 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x25C++0x3 line.long 0x0 "HPDMA_C4FCR,HPDMA channel 4 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x260++0x3 line.long 0x0 "HPDMA_C4SR,HPDMA channel 4 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x264++0x3 line.long 0x0 "HPDMA_C4CR,HPDMA channel 4 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x290++0x13 line.long 0x0 "HPDMA_C4TR1,HPDMA channel 4 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C4TR2,HPDMA channel 4 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C4BR1,HPDMA channel 4 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C4SAR,HPDMA channel 4 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C4DAR,HPDMA channel 4 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x2CC++0xF line.long 0x0 "HPDMA_C4LLR,HPDMA channel 4 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C5LBAR,HPDMA channel 5 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C5CIDCFGR,HPDMA channel 5 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C5SEMCR,HPDMA channel 5 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x2DC++0x3 line.long 0x0 "HPDMA_C5FCR,HPDMA channel 5 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x2E0++0x3 line.long 0x0 "HPDMA_C5SR,HPDMA channel 5 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x2E4++0x3 line.long 0x0 "HPDMA_C5CR,HPDMA channel 5 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x310++0x13 line.long 0x0 "HPDMA_C5TR1,HPDMA channel 5 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C5TR2,HPDMA channel 5 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C5BR1,HPDMA channel 5 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C5SAR,HPDMA channel 5 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C5DAR,HPDMA channel 5 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x34C++0xF line.long 0x0 "HPDMA_C5LLR,HPDMA channel 5 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C6LBAR,HPDMA channel 6 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C6CIDCFGR,HPDMA channel 6 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C6SEMCR,HPDMA channel 6 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x35C++0x3 line.long 0x0 "HPDMA_C6FCR,HPDMA channel 6 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x360++0x3 line.long 0x0 "HPDMA_C6SR,HPDMA channel 6 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x364++0x3 line.long 0x0 "HPDMA_C6CR,HPDMA channel 6 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x390++0x13 line.long 0x0 "HPDMA_C6TR1,HPDMA channel 6 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C6TR2,HPDMA channel 6 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C6BR1,HPDMA channel 6 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C6SAR,HPDMA channel 6 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C6DAR,HPDMA channel 6 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x3CC++0xF line.long 0x0 "HPDMA_C6LLR,HPDMA channel 6 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C7LBAR,HPDMA channel 7 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C7CIDCFGR,HPDMA channel 7 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C7SEMCR,HPDMA channel 7 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x3DC++0x3 line.long 0x0 "HPDMA_C7FCR,HPDMA channel 7 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x3E0++0x3 line.long 0x0 "HPDMA_C7SR,HPDMA channel 7 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x3E4++0x3 line.long 0x0 "HPDMA_C7CR,HPDMA channel 7 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x410++0x13 line.long 0x0 "HPDMA_C7TR1,HPDMA channel 7 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C7TR2,HPDMA channel 7 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C7BR1,HPDMA channel 7 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C7SAR,HPDMA channel 7 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C7DAR,HPDMA channel 7 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x44C++0xF line.long 0x0 "HPDMA_C7LLR,HPDMA channel 7 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C8LBAR,HPDMA channel 8 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C8CIDCFGR,HPDMA channel 8 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C8SEMCR,HPDMA channel 8 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x45C++0x3 line.long 0x0 "HPDMA_C8FCR,HPDMA channel 8 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x460++0x3 line.long 0x0 "HPDMA_C8SR,HPDMA channel 8 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x464++0x3 line.long 0x0 "HPDMA_C8CR,HPDMA channel 8 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x490++0x13 line.long 0x0 "HPDMA_C8TR1,HPDMA channel 8 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C8TR2,HPDMA channel 8 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C8BR1,HPDMA channel 8 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C8SAR,HPDMA channel 8 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C8DAR,HPDMA channel 8 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x4CC++0xF line.long 0x0 "HPDMA_C8LLR,HPDMA channel 8 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C9LBAR,HPDMA channel 9 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C9CIDCFGR,HPDMA channel 9 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C9SEMCR,HPDMA channel 9 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x4DC++0x3 line.long 0x0 "HPDMA_C9FCR,HPDMA channel 9 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x4E0++0x3 line.long 0x0 "HPDMA_C9SR,HPDMA channel 9 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x4E4++0x3 line.long 0x0 "HPDMA_C9CR,HPDMA channel 9 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x510++0x13 line.long 0x0 "HPDMA_C9TR1,HPDMA channel 9 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C9TR2,HPDMA channel 9 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C9BR1,HPDMA channel 9 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C9SAR,HPDMA channel 9 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C9DAR,HPDMA channel 9 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x54C++0xF line.long 0x0 "HPDMA_C9LLR,HPDMA channel 9 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C10LBAR,HPDMA channel 10 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C10CIDCFGR,HPDMA channel 10 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C10SEMCR,HPDMA channel 10 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x55C++0x3 line.long 0x0 "HPDMA_C10FCR,HPDMA channel 10 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x560++0x3 line.long 0x0 "HPDMA_C10SR,HPDMA channel 10 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x564++0x3 line.long 0x0 "HPDMA_C10CR,HPDMA channel 10 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x590++0x13 line.long 0x0 "HPDMA_C10TR1,HPDMA channel 10 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C10TR2,HPDMA channel 10 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C10BR1,HPDMA channel 10 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C10SAR,HPDMA channel 10 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C10DAR,HPDMA channel 10 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x5CC++0xF line.long 0x0 "HPDMA_C10LLR,HPDMA channel 10 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C11LBAR,HPDMA channel 11 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C11CIDCFGR,HPDMA channel 11 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C11SEMCR,HPDMA channel 11 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x5DC++0x3 line.long 0x0 "HPDMA_C11FCR,HPDMA channel 11 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x5E0++0x3 line.long 0x0 "HPDMA_C11SR,HPDMA channel 11 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x5E4++0x3 line.long 0x0 "HPDMA_C11CR,HPDMA channel 11 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x610++0x13 line.long 0x0 "HPDMA_C11TR1,HPDMA channel 11 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C11TR2,HPDMA channel 11 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C11BR1,HPDMA channel 11 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C11SAR,HPDMA channel 11 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C11DAR,HPDMA channel 11 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x64C++0xF line.long 0x0 "HPDMA_C11LLR,HPDMA channel 11 linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C12LBAR,HPDMA channel 12 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C12CIDCFGR,HPDMA channel 12 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C12SEMCR,HPDMA channel 12 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x65C++0x3 line.long 0x0 "HPDMA_C12FCR,HPDMA channel 12 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x660++0x3 line.long 0x0 "HPDMA_C12SR,HPDMA channel 12 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x664++0x3 line.long 0x0 "HPDMA_C12CR,HPDMA channel 12 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x690++0x1B line.long 0x0 "HPDMA_C12TR1,HPDMA channel 12 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C12TR2,HPDMA channel 12 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C12BR1,HPDMA channel 12 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C12SAR,HPDMA channel 12 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C12DAR,HPDMA channel 12 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C12TR3,HPDMA channel 12 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C12BR2,HPDMA channel 12 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x6CC++0xF line.long 0x0 "HPDMA_C12LLR,HPDMA channel 12 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C13LBAR,HPDMA channel 13 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C13CIDCFGR,HPDMA channel 13 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C13SEMCR,HPDMA channel 13 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x6DC++0x3 line.long 0x0 "HPDMA_C13FCR,HPDMA channel 13 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x6E0++0x3 line.long 0x0 "HPDMA_C13SR,HPDMA channel 13 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x6E4++0x3 line.long 0x0 "HPDMA_C13CR,HPDMA channel 13 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x710++0x1B line.long 0x0 "HPDMA_C13TR1,HPDMA channel 13 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C13TR2,HPDMA channel 13 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C13BR1,HPDMA channel 13 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C13SAR,HPDMA channel 13 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C13DAR,HPDMA channel 13 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C13TR3,HPDMA channel 13 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C13BR2,HPDMA channel 13 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x74C++0xF line.long 0x0 "HPDMA_C13LLR,HPDMA channel 13 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C14LBAR,HPDMA channel 14 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C14CIDCFGR,HPDMA channel 14 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C14SEMCR,HPDMA channel 14 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x75C++0x3 line.long 0x0 "HPDMA_C14FCR,HPDMA channel 14 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x760++0x3 line.long 0x0 "HPDMA_C14SR,HPDMA channel 14 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x764++0x3 line.long 0x0 "HPDMA_C14CR,HPDMA channel 14 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x790++0x1B line.long 0x0 "HPDMA_C14TR1,HPDMA channel 14 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C14TR2,HPDMA channel 14 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C14BR1,HPDMA channel 14 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C14SAR,HPDMA channel 14 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C14DAR,HPDMA channel 14 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C14TR3,HPDMA channel 14 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C14BR2,HPDMA channel 14 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x7CC++0xF line.long 0x0 "HPDMA_C14LLR,HPDMA channel 14 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "HPDMA_C15LBAR,HPDMA channel 15 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,Linked-list base address of HPDMA channel x" line.long 0x8 "HPDMA_C15CIDCFGR,HPDMA channel 15 CID register" bitfld.long 0x8 18. "SEM_WLIST_CID2,White-listed CID2 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,White-listed CID1 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,White-listed CID0 in the CID allocation pool (for when the channel x" "B_0x0,B_0x1" bitfld.long 0x8 4.--5. "SCID,Allocation of a static/single CID to the channel x (for when the channel x CID configuration is not in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 1. "SEM_EN,Semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "HPDMA_C15SEMCR,HPDMA channel 15 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,Current CID allocated to the channel x (in semaphore mode)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 0. "SEM_MUTEX,Mutual exclusion semaphore for the CID allocation of the channel x" "B_0x0_WRITE,B_0x1_WRITE" wgroup.long 0x7DC++0x3 line.long 0x0 "HPDMA_C15FCR,HPDMA channel 15 flag clear register" bitfld.long 0x0 14. "TOF,Trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,Completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,User setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,Update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,Data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,Half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,Transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x7E0++0x3 line.long 0x0 "HPDMA_C15SR,HPDMA channel 15 status register" hexmask.long.word 0x0 16.--24. 1. "FIFOL,None" group.long 0x7E4++0x3 line.long 0x0 "HPDMA_C15CR,HPDMA channel 15 control register" bitfld.long 0x0 22.--23. "PRIO,Priority level of the channel x HPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 17. "LAP,lLnked-list allocated port" "B_0x0,B_0x1" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,Trigger overrun interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SUSPIE,cCmpleted suspension interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEIE,User setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,Update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,Data transfer error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "HTIE,Half transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,Suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,Reset" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x810++0x1B line.long 0x0 "HPDMA_C15TR1,HPDMA channel 15 transfer register 1" bitfld.long 0x0 31. "DSEC,Security attribute of the HPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 30. "DAP,Destination allocated port" "B_0x0,B_0x1" bitfld.long 0x0 28. "DWX,Destination word exchange" "B_0x0,B_0x1" bitfld.long 0x0 27. "DHX,Destination half-word exchange" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "DBX,Destination byte exchange" "B_0x0,B_0x1" hexmask.long.byte 0x0 20.--25. 1. "DBL_1,Destination burst length minus 1 between 0 and 63" bitfld.long 0x0 19. "DINC,Destination incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,Binary logarithm of the destination data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 15. "SSEC,Security attribute of the HPDMA transfer from the source" "B_0x0,B_0x1" bitfld.long 0x0 14. "SAP,Source allocated port" "B_0x0,B_0x1" bitfld.long 0x0 13. "SBX,Source byte exchange within the unaligned half-word of each source word" "B_0x0,B_0x1" bitfld.long 0x0 11.--12. "PAM,Padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1,B_0x2_PAM_1,B_0x3_PAM_1" newline hexmask.long.byte 0x0 4.--9. 1. "SBL_1,Source burst length minus 1 between 0 and 63" bitfld.long 0x0 3. "SINC,Source incrementing burst" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,Binary logarithm of the source data width of a burst in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "HPDMA_C15TR2,HPDMA channel 15 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,Transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,Trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--22. 1. "TRIGSEL,Trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,Trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,Block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 10. "DREQ,Destination hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,Software request" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "REQSEL,Hardware request selection" line.long 0x8 "HPDMA_C15BR1,HPDMA channel 15 alternate block register 1" bitfld.long 0x8 31. "BRDDEC,Block repeat destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 30. "BRSDEC,Block repeat source address decrement" "B_0x0,B_0x1" bitfld.long 0x8 29. "DDEC,destination address decrement" "B_0x0,B_0x1" bitfld.long 0x8 28. "SDEC,source address decrement" "B_0x0,B_0x1" newline hexmask.long.word 0x8 16.--26. 1. "BRC,Block repeat counter" hexmask.long.word 0x8 0.--15. 1. "BNDT,Block number of data bytes to transfer from the source" line.long 0xC "HPDMA_C15SAR,HPDMA channel 15 source address register" hexmask.long 0xC 0.--31. 1. "SA,Source address" line.long 0x10 "HPDMA_C15DAR,HPDMA channel 15 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" line.long 0x14 "HPDMA_C15TR3,HPDMA channel 15 transfer register 3" bitfld.long 0x14 30.--31. "BRAM,Block repeated alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 16.--28. 1. "DAO,Destination address offset increment" bitfld.long 0x14 14.--15. "BAM,Block alignment mode" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x14 0.--12. 1. "SAO,Source address offset increment" line.long 0x18 "HPDMA_C15BR2,HPDMA channel 15 block register 2" hexmask.long.word 0x18 16.--31. 1. "BRDAO,Block repeated destination address offset" hexmask.long.word 0x18 0.--15. 1. "BRSAO,Block repeated source address offset" group.long 0x84C++0x3 line.long 0x0 "HPDMA_C15LLR,HPDMA channel 15 alternate linked-list address register" bitfld.long 0x0 31. "UT1,Update HPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update HPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update HPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,Update HPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update HPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 26. "UT3,Update HPDMA_CxTR3 from memory" "B_0x0,B_0x1" bitfld.long 0x0 25. "UB2,Update HPDMA_CxBR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update HPDMA_CxLLR register from memory" "B_0x0,B_0x1" newline hexmask.long.word 0x0 2.--15. 1. "LA,Pointer (16-bit low-significant address) to the next linked-list data structure" rgroup.long 0xFC0++0x3F line.long 0x0 "HPDMA_HWCFGR13,HPDMA hardware configuration 13 register" bitfld.long 0x0 28. "G_PER_CTRL15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x0 24. "G_PER_CTRL14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x0 20. "G_PER_CTRL13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x0 16. "G_PER_CTRL12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "G_PER_CTRL11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x0 8. "G_PER_CTRL10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x0 4. "G_PER_CTRL9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x0 0. "G_PER_CTRL8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x4 "HPDMA_HWCFGR12,HPDMA hardware configuration 12 register" bitfld.long 0x4 28. "G_PER_CTRL7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x4 24. "G_PER_CTRL6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x4 20. "G_PER_CTRL5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x4 16. "G_PER_CTRL4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "G_PER_CTRL3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x4 8. "G_PER_CTRL2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x4 4. "G_PER_CTRL1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x4 0. "G_PER_CTRL0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x8 "HPDMA_HWCFGR11,HPDMA hardware configuration 11 register" bitfld.long 0x8 24. "G_TST_LL_IMPORT,Master port for the link transfer (DFT purpose only)" "B_0x0,B_0x1" bitfld.long 0x8 20.--22. "G_NUM_RESYNC_FFS,Number of resynchronization flip-flops in the range 2 to 6" "0,1,2,3,4,5,6,7" bitfld.long 0x8 16.--18. "G_CID_WIDTH,CID bus width in the range 1 to 4" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 8.--13. 1. "G_SEC_OPTIONREG,Secure optional register width in the range 0 to 32" newline hexmask.long.byte 0x8 0.--5. 1. "G_NONSEC_OPTIONREG,nonsecure optional register width in the range 0 to 32" line.long 0xC "HPDMA_HWCFGR10,HPDMA hardware configuration 10 register" bitfld.long 0xC 28.--29. "G_ADDRESSING15,DMA transfer type for channel 15" "B_0x0,B_0x1,?,?" bitfld.long 0xC 24.--25. "G_ADDRESSING14,DMA transfer type for channel 14" "B_0x0,B_0x1,?,?" bitfld.long 0xC 20.--21. "G_ADDRESSING13,DMA transfer type for channel 13" "B_0x0,B_0x1,?,?" bitfld.long 0xC 16.--17. "G_ADDRESSING12,DMA transfer type for channel 12" "B_0x0,B_0x1,?,?" newline bitfld.long 0xC 12.--13. "G_ADDRESSING11,DMA transfer type for channel 11" "B_0x0,B_0x1,?,?" bitfld.long 0xC 8.--9. "G_ADDRESSING10,DMA transfer type for channel 10" "B_0x0,B_0x1,?,?" bitfld.long 0xC 4.--5. "G_ADDRESSING9,DMA transfer type for channel 9" "B_0x0,B_0x1,?,?" bitfld.long 0xC 0.--1. "G_ADDRESSING8,DMA transfer type for channel 8" "B_0x0,B_0x1,?,?" line.long 0x10 "HPDMA_HWCFGR9,HPDMA hardware configuration 9 register" bitfld.long 0x10 28.--29. "G_ADDRESSING7,DMA transfer type for channel 7" "B_0x0,B_0x1,?,?" bitfld.long 0x10 24.--25. "G_ADDRESSING6,DMA transfer type for channel 6" "B_0x0,B_0x1,?,?" bitfld.long 0x10 20.--21. "G_ADDRESSING5,DMA transfer type for channel 5" "B_0x0,B_0x1,?,?" bitfld.long 0x10 16.--17. "G_ADDRESSING4,DMA transfer type for channel 4" "B_0x0,B_0x1,?,?" newline bitfld.long 0x10 12.--13. "G_ADDRESSING3,DMA transfer type for channel 3" "B_0x0,B_0x1,?,?" bitfld.long 0x10 8.--9. "G_ADDRESSING2,DMA transfer type for channel 2" "B_0x0,B_0x1,?,?" bitfld.long 0x10 4.--5. "G_ADDRESSING1,DMA transfer type for channel 1" "B_0x0,B_0x1,?,?" bitfld.long 0x10 0.--1. "G_ADDRESSING0,DMA transfer type for channel 0" "B_0x0,B_0x1,?,?" line.long 0x14 "HPDMA_HWCFGR8,HPDMA hardware configuration 8 register" bitfld.long 0x14 28. "G_LINKED_LIST15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x14 24. "G_LINKED_LIST14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x14 20. "G_LINKED_LIST13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x14 16. "G_LINKED_LIST12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x14 12. "G_LINKED_LIST11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x14 8. "G_LINKED_LIST10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x14 4. "G_LINKED_LIST9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x14 0. "G_LINKED_LIST8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x18 "HPDMA_HWCFGR7,HPDMA hardware configuration 7 register" bitfld.long 0x18 28. "G_LINKED_LIST7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x18 24. "G_LINKED_LIST6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x18 20. "G_LINKED_LIST5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x18 16. "G_LINKED_LIST4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x18 12. "G_LINKED_LIST3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x18 8. "G_LINKED_LIST2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x18 4. "G_LINKED_LIST1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x18 0. "G_LINKED_LIST0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x1C "HPDMA_HWCFGR6,HPDMA hardware configuration 6 register" bitfld.long 0x1C 28. "G_TRANSFERS15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x1C 24. "G_TRANSFERS14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x1C 20. "G_TRANSFERS13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x1C 16. "G_TRANSFERS12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x1C 12. "G_TRANSFERS11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x1C 8. "G_TRANSFERS10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x1C 4. "G_TRANSFERS9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x1C 0. "G_TRANSFERS8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x20 "HPDMA_HWCFGR5,HPDMA hardware configuration 5 register" bitfld.long 0x20 28. "G_TRANSFERS7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x20 24. "G_TRANSFERS6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x20 20. "G_TRANSFERS5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x20 16. "G_TRANSFERS4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x20 12. "G_TRANSFERS3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x20 8. "G_TRANSFERS2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x20 4. "G_TRANSFERS1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x20 0. "G_TRANSFERS0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x24 "HPDMA_HWCFGR4,HPDMA hardware configuration 4 register" bitfld.long 0x24 28.--30. "G_FIFO_SIZE15,FIFO size for the channel 15 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 24.--26. "G_FIFO_SIZE14,FIFO size for the channel 14 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 20.--22. "G_FIFO_SIZE13,FIFO size for the channel 13 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 16.--18. "G_FIFO_SIZE12,FIFO size for the channel 12 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x24 12.--14. "G_FIFO_SIZE11,FIFO size for the channel 11 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 8.--10. "G_FIFO_SIZE10,FIFO size for the channel 10 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 4.--6. "G_FIFO_SIZE9,FIFO size for the channel 9 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 0.--2. "G_FIFO_SIZE8,FIFO size for the channel 8 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" line.long 0x28 "HPDMA_HWCFGR3,HPDMA hardware configuration 3 register" bitfld.long 0x28 28.--30. "G_FIFO_SIZE7,FIFO size for the channel 7 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 24.--26. "G_FIFO_SIZE6,FIFO size for the channel 6 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 20.--22. "G_FIFO_SIZE5,FIFO size for the channel 5 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 16.--18. "G_FIFO_SIZE4,FIFO size for the channel 4 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x28 12.--14. "G_FIFO_SIZE3,FIFO size for the channel 3 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 8.--10. "G_FIFO_SIZE2,FIFO size for the channel 2 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 4.--6. "G_FIFO_SIZE1,FIFO size for the channel 1 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 0.--2. "G_FIFO_SIZE0,FIFO size for the channel 0 in the range 0 to 7" "B_0x0,?,?,?,?,?,?,?" line.long 0x2C "HPDMA_HWCFGR2,HPDMA hardware configuration 2 register" hexmask.long.byte 0x2C 8.--14. 1. "G_MAX_TRIG_ID,Maximum trigger event identification (in the range 0 to 127)" hexmask.long.byte 0x2C 0.--7. 1. "G_MAX_REQ_ID,Maximum peripheral request identification (in the range 0 to 255)" line.long 0x30 "HPDMA_HWCFGR1,HPDMA hardware configuration 1 register" bitfld.long 0x30 28.--29. "G_M1_DATA_WIDTH_ENC,in the range 0 to 2" "B_0x0,B_0x1,?,?" bitfld.long 0x30 24.--25. "G_M0_DATA_WIDTH_ENC,in the range 0 to 2" "B_0x0,B_0x1,?,?" hexmask.long.byte 0x30 20.--23. 1. "G_MAX_CID,in the range 0 to 15" bitfld.long 0x30 16. "G_TRUSTZONE,TrustZone" "B_0x0,B_0x1" newline hexmask.long.byte 0x30 8.--12. 1. "G_NUM_CHANNELS,in the range 2 to 16" bitfld.long 0x30 4. "G_PRIVILEGE,privilege" "B_0x0,B_0x1" bitfld.long 0x30 0.--2. "G_MASTER_PORTS,in the range 0 to 5" "B_0x0,B_0x1,?,?,?,?,?,?" line.long 0x34 "HPDMA_VERR,HPDMA version register" hexmask.long.byte 0x34 4.--7. 1. "MAJREV,HPDMA major revision" hexmask.long.byte 0x34 0.--3. 1. "MINREV,HPDMA minor revision" line.long 0x38 "HPDMA_IPIDR,HPDMA identification register" hexmask.long 0x38 0.--31. 1. "ID,HPDMA identification" line.long 0x3C "HPDMA_SIDR,HPDMA size identification register" hexmask.long 0x3C 0.--31. 1. "SID,size identification" tree.end tree.end endif tree "HSEM (Hardware Semaphore)" base ad:0x0 tree "HSEM" base ad:0x46240000 group.long 0x0++0x3F line.long 0x0 "HSEM_R0,HSEM register semaphore 0" bitfld.long 0x0 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x0 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x0 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x4 "HSEM_R1,HSEM register semaphore 1" bitfld.long 0x4 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x4 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x4 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x4 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x4 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x8 "HSEM_R2,HSEM register semaphore 2" bitfld.long 0x8 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x8 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x8 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x8 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x8 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0xC "HSEM_R3,HSEM register semaphore 3" bitfld.long 0xC 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0xC 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0xC 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0xC 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0xC 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x10 "HSEM_R4,HSEM register semaphore 4" bitfld.long 0x10 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x10 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x10 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x10 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x10 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x10 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x14 "HSEM_R5,HSEM register semaphore 5" bitfld.long 0x14 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x14 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x14 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x14 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x14 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x14 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x18 "HSEM_R6,HSEM register semaphore 6" bitfld.long 0x18 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x18 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x18 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x18 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x18 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x18 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x1C "HSEM_R7,HSEM register semaphore 7" bitfld.long 0x1C 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x1C 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x1C 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x1C 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x1C 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x1C 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x20 "HSEM_R8,HSEM register semaphore 8" bitfld.long 0x20 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x20 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x20 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x20 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x20 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x20 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x24 "HSEM_R9,HSEM register semaphore 9" bitfld.long 0x24 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x24 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x24 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x24 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x24 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x24 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x28 "HSEM_R10,HSEM register semaphore 10" bitfld.long 0x28 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x28 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x28 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x28 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x28 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x28 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x2C "HSEM_R11,HSEM register semaphore 11" bitfld.long 0x2C 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x2C 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x2C 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x2C 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x2C 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x2C 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x30 "HSEM_R12,HSEM register semaphore 12" bitfld.long 0x30 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x30 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x30 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x30 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x30 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x30 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x34 "HSEM_R13,HSEM register semaphore 13" bitfld.long 0x34 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x34 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x34 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x34 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x34 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x34 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x38 "HSEM_R14,HSEM register semaphore 14" bitfld.long 0x38 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x38 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x38 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x38 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x38 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x38 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x3C "HSEM_R15,HSEM register semaphore 15" bitfld.long 0x3C 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x3C 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x3C 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x3C 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x3C 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x3C 0.--7. 1. "PROCID,Semaphore PROCID" rgroup.long 0x80++0x3F line.long 0x0 "HSEM_RLR0,HSEM read lock register semaphore 0" bitfld.long 0x0 31. "LOCK,Lock indication" "0,1" bitfld.long 0x0 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x0 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x4 "HSEM_RLR1,HSEM read lock register semaphore 1" bitfld.long 0x4 31. "LOCK,Lock indication" "0,1" bitfld.long 0x4 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x4 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x4 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x4 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x8 "HSEM_RLR2,HSEM read lock register semaphore 2" bitfld.long 0x8 31. "LOCK,Lock indication" "0,1" bitfld.long 0x8 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x8 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x8 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x8 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0xC "HSEM_RLR3,HSEM read lock register semaphore 3" bitfld.long 0xC 31. "LOCK,Lock indication" "0,1" bitfld.long 0xC 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0xC 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0xC 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0xC 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x10 "HSEM_RLR4,HSEM read lock register semaphore 4" bitfld.long 0x10 31. "LOCK,Lock indication" "0,1" bitfld.long 0x10 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x10 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x10 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x10 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x10 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x14 "HSEM_RLR5,HSEM read lock register semaphore 5" bitfld.long 0x14 31. "LOCK,Lock indication" "0,1" bitfld.long 0x14 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x14 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x14 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x14 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x14 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x18 "HSEM_RLR6,HSEM read lock register semaphore 6" bitfld.long 0x18 31. "LOCK,Lock indication" "0,1" bitfld.long 0x18 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x18 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x18 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x18 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x18 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x1C "HSEM_RLR7,HSEM read lock register semaphore 7" bitfld.long 0x1C 31. "LOCK,Lock indication" "0,1" bitfld.long 0x1C 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x1C 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x1C 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x1C 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x1C 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x20 "HSEM_RLR8,HSEM read lock register semaphore 8" bitfld.long 0x20 31. "LOCK,Lock indication" "0,1" bitfld.long 0x20 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x20 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x20 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x20 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x20 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x24 "HSEM_RLR9,HSEM read lock register semaphore 9" bitfld.long 0x24 31. "LOCK,Lock indication" "0,1" bitfld.long 0x24 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x24 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x24 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x24 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x24 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x28 "HSEM_RLR10,HSEM read lock register semaphore 10" bitfld.long 0x28 31. "LOCK,Lock indication" "0,1" bitfld.long 0x28 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x28 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x28 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x28 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x28 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x2C "HSEM_RLR11,HSEM read lock register semaphore 11" bitfld.long 0x2C 31. "LOCK,Lock indication" "0,1" bitfld.long 0x2C 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x2C 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x2C 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x2C 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x2C 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x30 "HSEM_RLR12,HSEM read lock register semaphore 12" bitfld.long 0x30 31. "LOCK,Lock indication" "0,1" bitfld.long 0x30 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x30 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x30 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x30 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x30 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x34 "HSEM_RLR13,HSEM read lock register semaphore 13" bitfld.long 0x34 31. "LOCK,Lock indication" "0,1" bitfld.long 0x34 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x34 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x34 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x34 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x34 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x38 "HSEM_RLR14,HSEM read lock register semaphore 14" bitfld.long 0x38 31. "LOCK,Lock indication" "0,1" bitfld.long 0x38 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x38 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x38 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x38 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x38 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x3C "HSEM_RLR15,HSEM read lock register semaphore 15" bitfld.long 0x3C 31. "LOCK,Lock indication" "0,1" bitfld.long 0x3C 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x3C 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x3C 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x3C 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x3C 0.--7. 1. "PROCID,Semaphore processor ID" group.long 0x100++0x7 line.long 0x0 "HSEM_C1IER,HSEM non-secure interrupt enable register" hexmask.long.word 0x0 0.--15. 1. "ISE,Non-secure Interrupt(n) semaphore x enable bit" line.long 0x4 "HSEM_C1ICR,HSEM non-secure interrupt clear register" hexmask.long.word 0x4 0.--15. 1. "ISC,Non-secure Interrupt(n) semaphore x clear bit" rgroup.long 0x108++0x7 line.long 0x0 "HSEM_C1ISR,HSEM non-secure interrupt status register" hexmask.long.word 0x0 0.--15. 1. "ISF,Interrupt semaphore x status bit before enable (mask)" line.long 0x4 "HSEM_C1MISR,HSEM non-secure interrupt status register" hexmask.long.word 0x4 0.--15. 1. "MISF,Masked non-secure interrupt(n) semaphore x status bit after enable (mask)" group.long 0x110++0x7 line.long 0x0 "HSEM_C2IER,HSEM non-secure interrupt enable register" hexmask.long.word 0x0 0.--15. 1. "ISE,Non-secure Interrupt(n) semaphore x enable bit" line.long 0x4 "HSEM_C2ICR,HSEM non-secure interrupt clear register" hexmask.long.word 0x4 0.--15. 1. "ISC,Non-secure Interrupt(n) semaphore x clear bit" rgroup.long 0x118++0x7 line.long 0x0 "HSEM_C2ISR,HSEM non-secure interrupt status register" hexmask.long.word 0x0 0.--15. 1. "ISF,Interrupt semaphore x status bit before enable (mask)" line.long 0x4 "HSEM_C2MISR,HSEM non-secure interrupt status register" hexmask.long.word 0x4 0.--15. 1. "MISF,Masked non-secure interrupt(n) semaphore x status bit after enable (mask)" group.long 0x120++0x7 line.long 0x0 "HSEM_C3IER,HSEM non-secure interrupt enable register" hexmask.long.word 0x0 0.--15. 1. "ISE,Non-secure Interrupt(n) semaphore x enable bit" line.long 0x4 "HSEM_C3ICR,HSEM non-secure interrupt clear register" hexmask.long.word 0x4 0.--15. 1. "ISC,Non-secure Interrupt(n) semaphore x clear bit" rgroup.long 0x128++0x7 line.long 0x0 "HSEM_C3ISR,HSEM non-secure interrupt status register" hexmask.long.word 0x0 0.--15. 1. "ISF,Interrupt semaphore x status bit before enable (mask)" line.long 0x4 "HSEM_C3MISR,HSEM non-secure interrupt status register" hexmask.long.word 0x4 0.--15. 1. "MISF,Masked non-secure interrupt(n) semaphore x status bit after enable (mask)" group.long 0x180++0x7 line.long 0x0 "HSEM_SC1IER,HSEM secure interrupt enable register" hexmask.long.word 0x0 0.--15. 1. "SISE,Secure interrupt(n) semaphore x enable bit" line.long 0x4 "HSEM_SC1ICR,HSEM secure interrupt clear register" hexmask.long.word 0x4 0.--15. 1. "SISC,Secure interrupt(n) semaphore x clear bit" rgroup.long 0x188++0x7 line.long 0x0 "HSEM_SC1ISR,HSEM secure interrupt status register" hexmask.long.word 0x0 0.--15. 1. "SISF,Secure interrupt(n) semaphore x status bit before enable (mask)" line.long 0x4 "HSEM_SC1MISR,HSEM secure masked interrupt status register" hexmask.long.word 0x4 0.--15. 1. "SMISF,Secure masked interrupt(n) semaphore x status bit after enable (mask)" group.long 0x190++0x7 line.long 0x0 "HSEM_SC2IER,HSEM secure interrupt enable register" hexmask.long.word 0x0 0.--15. 1. "SISE,Secure interrupt(n) semaphore x enable bit" line.long 0x4 "HSEM_SC2ICR,HSEM secure interrupt clear register" hexmask.long.word 0x4 0.--15. 1. "SISC,Secure interrupt(n) semaphore x clear bit" rgroup.long 0x198++0x7 line.long 0x0 "HSEM_SC2ISR,HSEM secure interrupt status register" hexmask.long.word 0x0 0.--15. 1. "SISF,Secure interrupt(n) semaphore x status bit before enable (mask)" line.long 0x4 "HSEM_SC2MISR,HSEM secure masked interrupt status register" hexmask.long.word 0x4 0.--15. 1. "SMISF,Secure masked interrupt(n) semaphore x status bit after enable (mask)" group.long 0x1A0++0x7 line.long 0x0 "HSEM_SC3IER,HSEM secure interrupt enable register" hexmask.long.word 0x0 0.--15. 1. "SISE,Secure interrupt(n) semaphore x enable bit" line.long 0x4 "HSEM_SC3ICR,HSEM secure interrupt clear register" hexmask.long.word 0x4 0.--15. 1. "SISC,Secure interrupt(n) semaphore x clear bit" rgroup.long 0x1A8++0x7 line.long 0x0 "HSEM_SC3ISR,HSEM secure interrupt status register" hexmask.long.word 0x0 0.--15. 1. "SISF,Secure interrupt(n) semaphore x status bit before enable (mask)" line.long 0x4 "HSEM_SC3MISR,HSEM secure masked interrupt status register" hexmask.long.word 0x4 0.--15. 1. "SMISF,Secure masked interrupt(n) semaphore x status bit after enable (mask)" group.long 0x200++0x3 line.long 0x0 "HSEM_SECCFGR,HSEM security configuration register" hexmask.long.word 0x0 0.--15. 1. "SEC,Semaphore x security attribute" group.long 0x210++0x3 line.long 0x0 "HSEM_PRIVCFGR,HSEM privilege configuration register" hexmask.long.word 0x0 0.--15. 1. "PRIV,Semaphore x privilege attribute" group.long 0x220++0xB line.long 0x0 "HSEM_C1CIDCFGR,HSEM processor 1 CID configuration register" bitfld.long 0x0 4.--6. "CID,processor[n] CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "CFEN,processor[n] CID filtering enabled for HSEM_(S)CnIER HSEM_(S)CnICR HSEM_(S)CnISR and HSEM_(S)CnMISR registers and for white list filter usage in HSEM_GpCIDCFGR.SEM_WLIST_Cn" "B_0x0,B_0x1" line.long 0x4 "HSEM_C2CIDCFGR,HSEM processor 2 CID configuration register" bitfld.long 0x4 4.--6. "CID,processor[n] CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "CFEN,processor[n] CID filtering enabled for HSEM_(S)CnIER HSEM_(S)CnICR HSEM_(S)CnISR and HSEM_(S)CnMISR registers and for white list filter usage in HSEM_GpCIDCFGR.SEM_WLIST_Cn" "B_0x0,B_0x1" line.long 0x8 "HSEM_C3CIDCFGR,HSEM processor 3 CID configuration register" bitfld.long 0x8 4.--6. "CID,processor[n] CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "CFEN,processor[n] CID filtering enabled for HSEM_(S)CnIER HSEM_(S)CnICR HSEM_(S)CnISR and HSEM_(S)CnMISR registers and for white list filter usage in HSEM_GpCIDCFGR.SEM_WLIST_Cn" "B_0x0,B_0x1" wgroup.long 0x230++0x3 line.long 0x0 "HSEM_CR,HSEM clear register" hexmask.long.word 0x0 16.--31. 1. "KEY,Semaphore clear key" bitfld.long 0x0 13. "PRIV,PRIV value of semaphores to be cleared." "0,1" bitfld.long 0x0 12. "SEC,SEC value of semaphores to be cleared." "0,1" hexmask.long.byte 0x0 8.--11. 1. "LOCKID,LOCKID of semaphores to be cleared" bitfld.long 0x0 0. "CFEN,Semaphore CID filtered." "B_0x0,B_0x1" group.long 0x234++0x3 line.long 0x0 "HSEM_KEYR,HSEM clear semaphore key register" hexmask.long.word 0x0 16.--31. 1. "KEY,Semaphore clear key" group.long 0x240++0xF line.long 0x0 "HSEM_G0CIDCFGR,HSEM CID configuration register" bitfld.long 0x0 16.--18. "SEM_WLIST_C,Semaphore group p CID filtering enable for processor n CID (n = 1 to 3)." "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x0 0. "CFEN,Semaphore group p global CID filtering enable." "B_0x0,B_0x1" line.long 0x4 "HSEM_G1CIDCFGR,HSEM CID configuration register" bitfld.long 0x4 16.--18. "SEM_WLIST_C,Semaphore group p CID filtering enable for processor n CID (n = 1 to 3)." "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 0. "CFEN,Semaphore group p global CID filtering enable." "B_0x0,B_0x1" line.long 0x8 "HSEM_G2CIDCFGR,HSEM CID configuration register" bitfld.long 0x8 16.--18. "SEM_WLIST_C,Semaphore group p CID filtering enable for processor n CID (n = 1 to 3)." "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x8 0. "CFEN,Semaphore group p global CID filtering enable." "B_0x0,B_0x1" line.long 0xC "HSEM_G3CIDCFGR,HSEM CID configuration register" bitfld.long 0xC 16.--18. "SEM_WLIST_C,Semaphore group p CID filtering enable for processor n CID (n = 1 to 3)." "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 0. "CFEN,Semaphore group p global CID filtering enable." "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "HSEM_HWCFGR2,HSEM hardware configuration register 2" hexmask.long.byte 0x0 12.--15. 1. "MASTERID4,Hardware configuration valid bus masters ID4" hexmask.long.byte 0x0 8.--11. 1. "MASTERID3,Hardware configuration valid bus masters ID3" hexmask.long.byte 0x0 4.--7. 1. "MASTERID2,Hardware configuration valid bus masters ID2" hexmask.long.byte 0x0 0.--3. 1. "MASTERID1,Hardware configuration valid bus masters ID1" line.long 0x4 "HSEM_HWCFGR1,HSEM hardware configuration register 1" bitfld.long 0x4 18. "CFEN,Hardware configuration compartment filtering enable" "0,1" bitfld.long 0x4 17. "PRIVEN,Hardware configuration privilege protection enable" "0,1" bitfld.long 0x4 16. "SECEN,Hardware configuration security protection enable" "0,1" hexmask.long.byte 0x4 12.--15. 1. "CID_WIDTH,Hardware configuration compartment isolation bus width" hexmask.long.byte 0x4 8.--11. 1. "NBINT,Hardware configuration number of interrupts/supported number of master ID." hexmask.long.byte 0x4 0.--7. 1. "NBSEM,Hardware configuration number of semaphores" line.long 0x8 "HSEM_VERR,HSEM version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,HSEM major revision number" hexmask.long.byte 0x8 0.--3. 1. "MINREV,HSEM minor revision number" line.long 0xC "HSEM_IPIDR,HSEM identification register" hexmask.long 0xC 0.--31. 1. "IPID,HSEM identifier" line.long 0x10 "HSEM_SIDR,HSEM size identification register" hexmask.long 0x10 0.--31. 1. "SID,HSEM size" tree.end sif (cpuis("*CA35")) tree "HSEM_S" base ad:0x56240000 group.long 0x0++0x3F line.long 0x0 "HSEM_R0,HSEM register semaphore 0" bitfld.long 0x0 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x0 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x0 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x4 "HSEM_R1,HSEM register semaphore 1" bitfld.long 0x4 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x4 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x4 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x4 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x4 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x8 "HSEM_R2,HSEM register semaphore 2" bitfld.long 0x8 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x8 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x8 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x8 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x8 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0xC "HSEM_R3,HSEM register semaphore 3" bitfld.long 0xC 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0xC 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0xC 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0xC 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0xC 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x10 "HSEM_R4,HSEM register semaphore 4" bitfld.long 0x10 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x10 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x10 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x10 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x10 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x10 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x14 "HSEM_R5,HSEM register semaphore 5" bitfld.long 0x14 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x14 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x14 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x14 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x14 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x14 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x18 "HSEM_R6,HSEM register semaphore 6" bitfld.long 0x18 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x18 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x18 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x18 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x18 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x18 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x1C "HSEM_R7,HSEM register semaphore 7" bitfld.long 0x1C 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x1C 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x1C 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x1C 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x1C 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x1C 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x20 "HSEM_R8,HSEM register semaphore 8" bitfld.long 0x20 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x20 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x20 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x20 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x20 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x20 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x24 "HSEM_R9,HSEM register semaphore 9" bitfld.long 0x24 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x24 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x24 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x24 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x24 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x24 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x28 "HSEM_R10,HSEM register semaphore 10" bitfld.long 0x28 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x28 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x28 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x28 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x28 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x28 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x2C "HSEM_R11,HSEM register semaphore 11" bitfld.long 0x2C 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x2C 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x2C 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x2C 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x2C 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x2C 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x30 "HSEM_R12,HSEM register semaphore 12" bitfld.long 0x30 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x30 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x30 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x30 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x30 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x30 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x34 "HSEM_R13,HSEM register semaphore 13" bitfld.long 0x34 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x34 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x34 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x34 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x34 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x34 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x38 "HSEM_R14,HSEM register semaphore 14" bitfld.long 0x38 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x38 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x38 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x38 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x38 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x38 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x3C "HSEM_R15,HSEM register semaphore 15" bitfld.long 0x3C 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x3C 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x3C 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x3C 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x3C 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x3C 0.--7. 1. "PROCID,Semaphore PROCID" rgroup.long 0x80++0x3F line.long 0x0 "HSEM_RLR0,HSEM read lock register semaphore 0" bitfld.long 0x0 31. "LOCK,Lock indication" "0,1" bitfld.long 0x0 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x0 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x4 "HSEM_RLR1,HSEM read lock register semaphore 1" bitfld.long 0x4 31. "LOCK,Lock indication" "0,1" bitfld.long 0x4 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x4 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x4 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x4 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x8 "HSEM_RLR2,HSEM read lock register semaphore 2" bitfld.long 0x8 31. "LOCK,Lock indication" "0,1" bitfld.long 0x8 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x8 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x8 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x8 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0xC "HSEM_RLR3,HSEM read lock register semaphore 3" bitfld.long 0xC 31. "LOCK,Lock indication" "0,1" bitfld.long 0xC 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0xC 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0xC 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0xC 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x10 "HSEM_RLR4,HSEM read lock register semaphore 4" bitfld.long 0x10 31. "LOCK,Lock indication" "0,1" bitfld.long 0x10 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x10 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x10 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x10 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x10 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x14 "HSEM_RLR5,HSEM read lock register semaphore 5" bitfld.long 0x14 31. "LOCK,Lock indication" "0,1" bitfld.long 0x14 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x14 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x14 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x14 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x14 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x18 "HSEM_RLR6,HSEM read lock register semaphore 6" bitfld.long 0x18 31. "LOCK,Lock indication" "0,1" bitfld.long 0x18 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x18 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x18 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x18 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x18 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x1C "HSEM_RLR7,HSEM read lock register semaphore 7" bitfld.long 0x1C 31. "LOCK,Lock indication" "0,1" bitfld.long 0x1C 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x1C 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x1C 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x1C 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x1C 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x20 "HSEM_RLR8,HSEM read lock register semaphore 8" bitfld.long 0x20 31. "LOCK,Lock indication" "0,1" bitfld.long 0x20 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x20 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x20 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x20 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x20 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x24 "HSEM_RLR9,HSEM read lock register semaphore 9" bitfld.long 0x24 31. "LOCK,Lock indication" "0,1" bitfld.long 0x24 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x24 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x24 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x24 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x24 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x28 "HSEM_RLR10,HSEM read lock register semaphore 10" bitfld.long 0x28 31. "LOCK,Lock indication" "0,1" bitfld.long 0x28 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x28 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x28 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x28 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x28 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x2C "HSEM_RLR11,HSEM read lock register semaphore 11" bitfld.long 0x2C 31. "LOCK,Lock indication" "0,1" bitfld.long 0x2C 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x2C 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x2C 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x2C 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x2C 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x30 "HSEM_RLR12,HSEM read lock register semaphore 12" bitfld.long 0x30 31. "LOCK,Lock indication" "0,1" bitfld.long 0x30 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x30 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x30 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x30 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x30 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x34 "HSEM_RLR13,HSEM read lock register semaphore 13" bitfld.long 0x34 31. "LOCK,Lock indication" "0,1" bitfld.long 0x34 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x34 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x34 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x34 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x34 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x38 "HSEM_RLR14,HSEM read lock register semaphore 14" bitfld.long 0x38 31. "LOCK,Lock indication" "0,1" bitfld.long 0x38 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x38 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x38 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x38 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x38 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x3C "HSEM_RLR15,HSEM read lock register semaphore 15" bitfld.long 0x3C 31. "LOCK,Lock indication" "0,1" bitfld.long 0x3C 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x3C 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x3C 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x3C 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x3C 0.--7. 1. "PROCID,Semaphore processor ID" group.long 0x100++0x7 line.long 0x0 "HSEM_C1IER,HSEM non-secure interrupt enable register" hexmask.long.word 0x0 0.--15. 1. "ISE,Non-secure Interrupt(n) semaphore x enable bit" line.long 0x4 "HSEM_C1ICR,HSEM non-secure interrupt clear register" hexmask.long.word 0x4 0.--15. 1. "ISC,Non-secure Interrupt(n) semaphore x clear bit" rgroup.long 0x108++0x7 line.long 0x0 "HSEM_C1ISR,HSEM non-secure interrupt status register" hexmask.long.word 0x0 0.--15. 1. "ISF,Interrupt semaphore x status bit before enable (mask)" line.long 0x4 "HSEM_C1MISR,HSEM non-secure interrupt status register" hexmask.long.word 0x4 0.--15. 1. "MISF,Masked non-secure interrupt(n) semaphore x status bit after enable (mask)" group.long 0x110++0x7 line.long 0x0 "HSEM_C2IER,HSEM non-secure interrupt enable register" hexmask.long.word 0x0 0.--15. 1. "ISE,Non-secure Interrupt(n) semaphore x enable bit" line.long 0x4 "HSEM_C2ICR,HSEM non-secure interrupt clear register" hexmask.long.word 0x4 0.--15. 1. "ISC,Non-secure Interrupt(n) semaphore x clear bit" rgroup.long 0x118++0x7 line.long 0x0 "HSEM_C2ISR,HSEM non-secure interrupt status register" hexmask.long.word 0x0 0.--15. 1. "ISF,Interrupt semaphore x status bit before enable (mask)" line.long 0x4 "HSEM_C2MISR,HSEM non-secure interrupt status register" hexmask.long.word 0x4 0.--15. 1. "MISF,Masked non-secure interrupt(n) semaphore x status bit after enable (mask)" group.long 0x120++0x7 line.long 0x0 "HSEM_C3IER,HSEM non-secure interrupt enable register" hexmask.long.word 0x0 0.--15. 1. "ISE,Non-secure Interrupt(n) semaphore x enable bit" line.long 0x4 "HSEM_C3ICR,HSEM non-secure interrupt clear register" hexmask.long.word 0x4 0.--15. 1. "ISC,Non-secure Interrupt(n) semaphore x clear bit" rgroup.long 0x128++0x7 line.long 0x0 "HSEM_C3ISR,HSEM non-secure interrupt status register" hexmask.long.word 0x0 0.--15. 1. "ISF,Interrupt semaphore x status bit before enable (mask)" line.long 0x4 "HSEM_C3MISR,HSEM non-secure interrupt status register" hexmask.long.word 0x4 0.--15. 1. "MISF,Masked non-secure interrupt(n) semaphore x status bit after enable (mask)" group.long 0x180++0x7 line.long 0x0 "HSEM_SC1IER,HSEM secure interrupt enable register" hexmask.long.word 0x0 0.--15. 1. "SISE,Secure interrupt(n) semaphore x enable bit" line.long 0x4 "HSEM_SC1ICR,HSEM secure interrupt clear register" hexmask.long.word 0x4 0.--15. 1. "SISC,Secure interrupt(n) semaphore x clear bit" rgroup.long 0x188++0x7 line.long 0x0 "HSEM_SC1ISR,HSEM secure interrupt status register" hexmask.long.word 0x0 0.--15. 1. "SISF,Secure interrupt(n) semaphore x status bit before enable (mask)" line.long 0x4 "HSEM_SC1MISR,HSEM secure masked interrupt status register" hexmask.long.word 0x4 0.--15. 1. "SMISF,Secure masked interrupt(n) semaphore x status bit after enable (mask)" group.long 0x190++0x7 line.long 0x0 "HSEM_SC2IER,HSEM secure interrupt enable register" hexmask.long.word 0x0 0.--15. 1. "SISE,Secure interrupt(n) semaphore x enable bit" line.long 0x4 "HSEM_SC2ICR,HSEM secure interrupt clear register" hexmask.long.word 0x4 0.--15. 1. "SISC,Secure interrupt(n) semaphore x clear bit" rgroup.long 0x198++0x7 line.long 0x0 "HSEM_SC2ISR,HSEM secure interrupt status register" hexmask.long.word 0x0 0.--15. 1. "SISF,Secure interrupt(n) semaphore x status bit before enable (mask)" line.long 0x4 "HSEM_SC2MISR,HSEM secure masked interrupt status register" hexmask.long.word 0x4 0.--15. 1. "SMISF,Secure masked interrupt(n) semaphore x status bit after enable (mask)" group.long 0x1A0++0x7 line.long 0x0 "HSEM_SC3IER,HSEM secure interrupt enable register" hexmask.long.word 0x0 0.--15. 1. "SISE,Secure interrupt(n) semaphore x enable bit" line.long 0x4 "HSEM_SC3ICR,HSEM secure interrupt clear register" hexmask.long.word 0x4 0.--15. 1. "SISC,Secure interrupt(n) semaphore x clear bit" rgroup.long 0x1A8++0x7 line.long 0x0 "HSEM_SC3ISR,HSEM secure interrupt status register" hexmask.long.word 0x0 0.--15. 1. "SISF,Secure interrupt(n) semaphore x status bit before enable (mask)" line.long 0x4 "HSEM_SC3MISR,HSEM secure masked interrupt status register" hexmask.long.word 0x4 0.--15. 1. "SMISF,Secure masked interrupt(n) semaphore x status bit after enable (mask)" group.long 0x200++0x3 line.long 0x0 "HSEM_SECCFGR,HSEM security configuration register" hexmask.long.word 0x0 0.--15. 1. "SEC,Semaphore x security attribute" group.long 0x210++0x3 line.long 0x0 "HSEM_PRIVCFGR,HSEM privilege configuration register" hexmask.long.word 0x0 0.--15. 1. "PRIV,Semaphore x privilege attribute" group.long 0x220++0xB line.long 0x0 "HSEM_C1CIDCFGR,HSEM processor 1 CID configuration register" bitfld.long 0x0 4.--6. "CID,processor[n] CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "CFEN,processor[n] CID filtering enabled for HSEM_(S)CnIER HSEM_(S)CnICR HSEM_(S)CnISR and HSEM_(S)CnMISR registers and for white list filter usage in HSEM_GpCIDCFGR.SEM_WLIST_Cn" "B_0x0,B_0x1" line.long 0x4 "HSEM_C2CIDCFGR,HSEM processor 2 CID configuration register" bitfld.long 0x4 4.--6. "CID,processor[n] CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "CFEN,processor[n] CID filtering enabled for HSEM_(S)CnIER HSEM_(S)CnICR HSEM_(S)CnISR and HSEM_(S)CnMISR registers and for white list filter usage in HSEM_GpCIDCFGR.SEM_WLIST_Cn" "B_0x0,B_0x1" line.long 0x8 "HSEM_C3CIDCFGR,HSEM processor 3 CID configuration register" bitfld.long 0x8 4.--6. "CID,processor[n] CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "CFEN,processor[n] CID filtering enabled for HSEM_(S)CnIER HSEM_(S)CnICR HSEM_(S)CnISR and HSEM_(S)CnMISR registers and for white list filter usage in HSEM_GpCIDCFGR.SEM_WLIST_Cn" "B_0x0,B_0x1" wgroup.long 0x230++0x3 line.long 0x0 "HSEM_CR,HSEM clear register" hexmask.long.word 0x0 16.--31. 1. "KEY,Semaphore clear key" bitfld.long 0x0 13. "PRIV,PRIV value of semaphores to be cleared." "0,1" bitfld.long 0x0 12. "SEC,SEC value of semaphores to be cleared." "0,1" hexmask.long.byte 0x0 8.--11. 1. "LOCKID,LOCKID of semaphores to be cleared" bitfld.long 0x0 0. "CFEN,Semaphore CID filtered." "B_0x0,B_0x1" group.long 0x234++0x3 line.long 0x0 "HSEM_KEYR,HSEM clear semaphore key register" hexmask.long.word 0x0 16.--31. 1. "KEY,Semaphore clear key" group.long 0x240++0xF line.long 0x0 "HSEM_G0CIDCFGR,HSEM CID configuration register" bitfld.long 0x0 16.--18. "SEM_WLIST_C,Semaphore group p CID filtering enable for processor n CID (n = 1 to 3)." "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x0 0. "CFEN,Semaphore group p global CID filtering enable." "B_0x0,B_0x1" line.long 0x4 "HSEM_G1CIDCFGR,HSEM CID configuration register" bitfld.long 0x4 16.--18. "SEM_WLIST_C,Semaphore group p CID filtering enable for processor n CID (n = 1 to 3)." "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 0. "CFEN,Semaphore group p global CID filtering enable." "B_0x0,B_0x1" line.long 0x8 "HSEM_G2CIDCFGR,HSEM CID configuration register" bitfld.long 0x8 16.--18. "SEM_WLIST_C,Semaphore group p CID filtering enable for processor n CID (n = 1 to 3)." "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x8 0. "CFEN,Semaphore group p global CID filtering enable." "B_0x0,B_0x1" line.long 0xC "HSEM_G3CIDCFGR,HSEM CID configuration register" bitfld.long 0xC 16.--18. "SEM_WLIST_C,Semaphore group p CID filtering enable for processor n CID (n = 1 to 3)." "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 0. "CFEN,Semaphore group p global CID filtering enable." "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "HSEM_HWCFGR2,HSEM hardware configuration register 2" hexmask.long.byte 0x0 12.--15. 1. "MASTERID4,Hardware configuration valid bus masters ID4" hexmask.long.byte 0x0 8.--11. 1. "MASTERID3,Hardware configuration valid bus masters ID3" hexmask.long.byte 0x0 4.--7. 1. "MASTERID2,Hardware configuration valid bus masters ID2" hexmask.long.byte 0x0 0.--3. 1. "MASTERID1,Hardware configuration valid bus masters ID1" line.long 0x4 "HSEM_HWCFGR1,HSEM hardware configuration register 1" bitfld.long 0x4 18. "CFEN,Hardware configuration compartment filtering enable" "0,1" bitfld.long 0x4 17. "PRIVEN,Hardware configuration privilege protection enable" "0,1" bitfld.long 0x4 16. "SECEN,Hardware configuration security protection enable" "0,1" hexmask.long.byte 0x4 12.--15. 1. "CID_WIDTH,Hardware configuration compartment isolation bus width" hexmask.long.byte 0x4 8.--11. 1. "NBINT,Hardware configuration number of interrupts/supported number of master ID." hexmask.long.byte 0x4 0.--7. 1. "NBSEM,Hardware configuration number of semaphores" line.long 0x8 "HSEM_VERR,HSEM version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,HSEM major revision number" hexmask.long.byte 0x8 0.--3. 1. "MINREV,HSEM minor revision number" line.long 0xC "HSEM_IPIDR,HSEM identification register" hexmask.long 0xC 0.--31. 1. "IPID,HSEM identifier" line.long 0x10 "HSEM_SIDR,HSEM size identification register" hexmask.long 0x10 0.--31. 1. "SID,HSEM size" tree.end endif sif (cpuis("*CM33F")) tree "HSEM_S" base ad:0x56240000 group.long 0x0++0x3F line.long 0x0 "HSEM_R0,HSEM register semaphore 0" bitfld.long 0x0 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x0 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x0 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x4 "HSEM_R1,HSEM register semaphore 1" bitfld.long 0x4 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x4 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x4 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x4 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x4 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x8 "HSEM_R2,HSEM register semaphore 2" bitfld.long 0x8 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x8 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x8 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x8 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x8 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0xC "HSEM_R3,HSEM register semaphore 3" bitfld.long 0xC 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0xC 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0xC 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0xC 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0xC 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x10 "HSEM_R4,HSEM register semaphore 4" bitfld.long 0x10 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x10 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x10 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x10 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x10 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x10 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x14 "HSEM_R5,HSEM register semaphore 5" bitfld.long 0x14 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x14 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x14 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x14 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x14 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x14 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x18 "HSEM_R6,HSEM register semaphore 6" bitfld.long 0x18 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x18 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x18 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x18 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x18 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x18 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x1C "HSEM_R7,HSEM register semaphore 7" bitfld.long 0x1C 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x1C 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x1C 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x1C 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x1C 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x1C 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x20 "HSEM_R8,HSEM register semaphore 8" bitfld.long 0x20 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x20 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x20 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x20 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x20 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x20 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x24 "HSEM_R9,HSEM register semaphore 9" bitfld.long 0x24 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x24 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x24 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x24 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x24 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x24 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x28 "HSEM_R10,HSEM register semaphore 10" bitfld.long 0x28 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x28 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x28 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x28 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x28 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x28 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x2C "HSEM_R11,HSEM register semaphore 11" bitfld.long 0x2C 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x2C 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x2C 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x2C 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x2C 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x2C 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x30 "HSEM_R12,HSEM register semaphore 12" bitfld.long 0x30 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x30 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x30 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x30 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x30 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x30 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x34 "HSEM_R13,HSEM register semaphore 13" bitfld.long 0x34 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x34 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x34 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x34 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x34 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x34 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x38 "HSEM_R14,HSEM register semaphore 14" bitfld.long 0x38 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x38 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x38 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x38 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x38 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x38 0.--7. 1. "PROCID,Semaphore PROCID" line.long 0x3C "HSEM_R15,HSEM register semaphore 15" bitfld.long 0x3C 31. "LOCK,Lock indication" "B_0x0,B_0x1" rbitfld.long 0x3C 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x3C 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x3C 12. "SEC,Semaphore secure" "B_0x0,B_0x1" hexmask.long.byte 0x3C 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x3C 0.--7. 1. "PROCID,Semaphore PROCID" rgroup.long 0x80++0x3F line.long 0x0 "HSEM_RLR0,HSEM read lock register semaphore 0" bitfld.long 0x0 31. "LOCK,Lock indication" "0,1" bitfld.long 0x0 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x0 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x4 "HSEM_RLR1,HSEM read lock register semaphore 1" bitfld.long 0x4 31. "LOCK,Lock indication" "0,1" bitfld.long 0x4 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x4 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x4 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x4 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x4 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x8 "HSEM_RLR2,HSEM read lock register semaphore 2" bitfld.long 0x8 31. "LOCK,Lock indication" "0,1" bitfld.long 0x8 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x8 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x8 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x8 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0xC "HSEM_RLR3,HSEM read lock register semaphore 3" bitfld.long 0xC 31. "LOCK,Lock indication" "0,1" bitfld.long 0xC 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0xC 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0xC 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0xC 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x10 "HSEM_RLR4,HSEM read lock register semaphore 4" bitfld.long 0x10 31. "LOCK,Lock indication" "0,1" bitfld.long 0x10 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x10 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x10 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x10 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x10 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x14 "HSEM_RLR5,HSEM read lock register semaphore 5" bitfld.long 0x14 31. "LOCK,Lock indication" "0,1" bitfld.long 0x14 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x14 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x14 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x14 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x14 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x18 "HSEM_RLR6,HSEM read lock register semaphore 6" bitfld.long 0x18 31. "LOCK,Lock indication" "0,1" bitfld.long 0x18 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x18 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x18 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x18 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x18 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x1C "HSEM_RLR7,HSEM read lock register semaphore 7" bitfld.long 0x1C 31. "LOCK,Lock indication" "0,1" bitfld.long 0x1C 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x1C 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x1C 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x1C 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x1C 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x20 "HSEM_RLR8,HSEM read lock register semaphore 8" bitfld.long 0x20 31. "LOCK,Lock indication" "0,1" bitfld.long 0x20 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x20 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x20 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x20 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x20 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x24 "HSEM_RLR9,HSEM read lock register semaphore 9" bitfld.long 0x24 31. "LOCK,Lock indication" "0,1" bitfld.long 0x24 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x24 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x24 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x24 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x24 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x28 "HSEM_RLR10,HSEM read lock register semaphore 10" bitfld.long 0x28 31. "LOCK,Lock indication" "0,1" bitfld.long 0x28 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x28 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x28 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x28 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x28 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x2C "HSEM_RLR11,HSEM read lock register semaphore 11" bitfld.long 0x2C 31. "LOCK,Lock indication" "0,1" bitfld.long 0x2C 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x2C 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x2C 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x2C 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x2C 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x30 "HSEM_RLR12,HSEM read lock register semaphore 12" bitfld.long 0x30 31. "LOCK,Lock indication" "0,1" bitfld.long 0x30 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x30 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x30 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x30 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x30 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x34 "HSEM_RLR13,HSEM read lock register semaphore 13" bitfld.long 0x34 31. "LOCK,Lock indication" "0,1" bitfld.long 0x34 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x34 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x34 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x34 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x34 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x38 "HSEM_RLR14,HSEM read lock register semaphore 14" bitfld.long 0x38 31. "LOCK,Lock indication" "0,1" bitfld.long 0x38 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x38 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x38 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x38 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x38 0.--7. 1. "PROCID,Semaphore processor ID" line.long 0x3C "HSEM_RLR15,HSEM read lock register semaphore 15" bitfld.long 0x3C 31. "LOCK,Lock indication" "0,1" bitfld.long 0x3C 30. "CFEN,Semaphore CID filter indication" "B_0x0,B_0x1" bitfld.long 0x3C 13. "PRIV,Semaphore privilege" "B_0x0,B_0x1" bitfld.long 0x3C 12. "SEC,Semaphore secure." "B_0x0,B_0x1" hexmask.long.byte 0x3C 8.--11. 1. "LOCKID,Semaphore LOCKID" hexmask.long.byte 0x3C 0.--7. 1. "PROCID,Semaphore processor ID" group.long 0x100++0x7 line.long 0x0 "HSEM_C1IER,HSEM non-secure interrupt enable register" hexmask.long.word 0x0 0.--15. 1. "ISE,Non-secure Interrupt(n) semaphore x enable bit" line.long 0x4 "HSEM_C1ICR,HSEM non-secure interrupt clear register" hexmask.long.word 0x4 0.--15. 1. "ISC,Non-secure Interrupt(n) semaphore x clear bit" rgroup.long 0x108++0x7 line.long 0x0 "HSEM_C1ISR,HSEM non-secure interrupt status register" hexmask.long.word 0x0 0.--15. 1. "ISF,Interrupt semaphore x status bit before enable (mask)" line.long 0x4 "HSEM_C1MISR,HSEM non-secure interrupt status register" hexmask.long.word 0x4 0.--15. 1. "MISF,Masked non-secure interrupt(n) semaphore x status bit after enable (mask)" group.long 0x110++0x7 line.long 0x0 "HSEM_C2IER,HSEM non-secure interrupt enable register" hexmask.long.word 0x0 0.--15. 1. "ISE,Non-secure Interrupt(n) semaphore x enable bit" line.long 0x4 "HSEM_C2ICR,HSEM non-secure interrupt clear register" hexmask.long.word 0x4 0.--15. 1. "ISC,Non-secure Interrupt(n) semaphore x clear bit" rgroup.long 0x118++0x7 line.long 0x0 "HSEM_C2ISR,HSEM non-secure interrupt status register" hexmask.long.word 0x0 0.--15. 1. "ISF,Interrupt semaphore x status bit before enable (mask)" line.long 0x4 "HSEM_C2MISR,HSEM non-secure interrupt status register" hexmask.long.word 0x4 0.--15. 1. "MISF,Masked non-secure interrupt(n) semaphore x status bit after enable (mask)" group.long 0x120++0x7 line.long 0x0 "HSEM_C3IER,HSEM non-secure interrupt enable register" hexmask.long.word 0x0 0.--15. 1. "ISE,Non-secure Interrupt(n) semaphore x enable bit" line.long 0x4 "HSEM_C3ICR,HSEM non-secure interrupt clear register" hexmask.long.word 0x4 0.--15. 1. "ISC,Non-secure Interrupt(n) semaphore x clear bit" rgroup.long 0x128++0x7 line.long 0x0 "HSEM_C3ISR,HSEM non-secure interrupt status register" hexmask.long.word 0x0 0.--15. 1. "ISF,Interrupt semaphore x status bit before enable (mask)" line.long 0x4 "HSEM_C3MISR,HSEM non-secure interrupt status register" hexmask.long.word 0x4 0.--15. 1. "MISF,Masked non-secure interrupt(n) semaphore x status bit after enable (mask)" group.long 0x180++0x7 line.long 0x0 "HSEM_SC1IER,HSEM secure interrupt enable register" hexmask.long.word 0x0 0.--15. 1. "SISE,Secure interrupt(n) semaphore x enable bit" line.long 0x4 "HSEM_SC1ICR,HSEM secure interrupt clear register" hexmask.long.word 0x4 0.--15. 1. "SISC,Secure interrupt(n) semaphore x clear bit" rgroup.long 0x188++0x7 line.long 0x0 "HSEM_SC1ISR,HSEM secure interrupt status register" hexmask.long.word 0x0 0.--15. 1. "SISF,Secure interrupt(n) semaphore x status bit before enable (mask)" line.long 0x4 "HSEM_SC1MISR,HSEM secure masked interrupt status register" hexmask.long.word 0x4 0.--15. 1. "SMISF,Secure masked interrupt(n) semaphore x status bit after enable (mask)" group.long 0x190++0x7 line.long 0x0 "HSEM_SC2IER,HSEM secure interrupt enable register" hexmask.long.word 0x0 0.--15. 1. "SISE,Secure interrupt(n) semaphore x enable bit" line.long 0x4 "HSEM_SC2ICR,HSEM secure interrupt clear register" hexmask.long.word 0x4 0.--15. 1. "SISC,Secure interrupt(n) semaphore x clear bit" rgroup.long 0x198++0x7 line.long 0x0 "HSEM_SC2ISR,HSEM secure interrupt status register" hexmask.long.word 0x0 0.--15. 1. "SISF,Secure interrupt(n) semaphore x status bit before enable (mask)" line.long 0x4 "HSEM_SC2MISR,HSEM secure masked interrupt status register" hexmask.long.word 0x4 0.--15. 1. "SMISF,Secure masked interrupt(n) semaphore x status bit after enable (mask)" group.long 0x1A0++0x7 line.long 0x0 "HSEM_SC3IER,HSEM secure interrupt enable register" hexmask.long.word 0x0 0.--15. 1. "SISE,Secure interrupt(n) semaphore x enable bit" line.long 0x4 "HSEM_SC3ICR,HSEM secure interrupt clear register" hexmask.long.word 0x4 0.--15. 1. "SISC,Secure interrupt(n) semaphore x clear bit" rgroup.long 0x1A8++0x7 line.long 0x0 "HSEM_SC3ISR,HSEM secure interrupt status register" hexmask.long.word 0x0 0.--15. 1. "SISF,Secure interrupt(n) semaphore x status bit before enable (mask)" line.long 0x4 "HSEM_SC3MISR,HSEM secure masked interrupt status register" hexmask.long.word 0x4 0.--15. 1. "SMISF,Secure masked interrupt(n) semaphore x status bit after enable (mask)" group.long 0x200++0x3 line.long 0x0 "HSEM_SECCFGR,HSEM security configuration register" hexmask.long.word 0x0 0.--15. 1. "SEC,Semaphore x security attribute" group.long 0x210++0x3 line.long 0x0 "HSEM_PRIVCFGR,HSEM privilege configuration register" hexmask.long.word 0x0 0.--15. 1. "PRIV,Semaphore x privilege attribute" group.long 0x220++0xB line.long 0x0 "HSEM_C1CIDCFGR,HSEM processor 1 CID configuration register" bitfld.long 0x0 4.--6. "CID,processor[n] CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "CFEN,processor[n] CID filtering enabled for HSEM_(S)CnIER HSEM_(S)CnICR HSEM_(S)CnISR and HSEM_(S)CnMISR registers and for white list filter usage in HSEM_GpCIDCFGR.SEM_WLIST_Cn" "B_0x0,B_0x1" line.long 0x4 "HSEM_C2CIDCFGR,HSEM processor 2 CID configuration register" bitfld.long 0x4 4.--6. "CID,processor[n] CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "CFEN,processor[n] CID filtering enabled for HSEM_(S)CnIER HSEM_(S)CnICR HSEM_(S)CnISR and HSEM_(S)CnMISR registers and for white list filter usage in HSEM_GpCIDCFGR.SEM_WLIST_Cn" "B_0x0,B_0x1" line.long 0x8 "HSEM_C3CIDCFGR,HSEM processor 3 CID configuration register" bitfld.long 0x8 4.--6. "CID,processor[n] CID domain identification" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "CFEN,processor[n] CID filtering enabled for HSEM_(S)CnIER HSEM_(S)CnICR HSEM_(S)CnISR and HSEM_(S)CnMISR registers and for white list filter usage in HSEM_GpCIDCFGR.SEM_WLIST_Cn" "B_0x0,B_0x1" wgroup.long 0x230++0x3 line.long 0x0 "HSEM_CR,HSEM clear register" hexmask.long.word 0x0 16.--31. 1. "KEY,Semaphore clear key" bitfld.long 0x0 13. "PRIV,PRIV value of semaphores to be cleared." "0,1" bitfld.long 0x0 12. "SEC,SEC value of semaphores to be cleared." "0,1" hexmask.long.byte 0x0 8.--11. 1. "LOCKID,LOCKID of semaphores to be cleared" bitfld.long 0x0 0. "CFEN,Semaphore CID filtered." "B_0x0,B_0x1" group.long 0x234++0x3 line.long 0x0 "HSEM_KEYR,HSEM clear semaphore key register" hexmask.long.word 0x0 16.--31. 1. "KEY,Semaphore clear key" group.long 0x240++0xF line.long 0x0 "HSEM_G0CIDCFGR,HSEM CID configuration register" bitfld.long 0x0 16.--18. "SEM_WLIST_C,Semaphore group p CID filtering enable for processor n CID (n = 1 to 3)." "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x0 0. "CFEN,Semaphore group p global CID filtering enable." "B_0x0,B_0x1" line.long 0x4 "HSEM_G1CIDCFGR,HSEM CID configuration register" bitfld.long 0x4 16.--18. "SEM_WLIST_C,Semaphore group p CID filtering enable for processor n CID (n = 1 to 3)." "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x4 0. "CFEN,Semaphore group p global CID filtering enable." "B_0x0,B_0x1" line.long 0x8 "HSEM_G2CIDCFGR,HSEM CID configuration register" bitfld.long 0x8 16.--18. "SEM_WLIST_C,Semaphore group p CID filtering enable for processor n CID (n = 1 to 3)." "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x8 0. "CFEN,Semaphore group p global CID filtering enable." "B_0x0,B_0x1" line.long 0xC "HSEM_G3CIDCFGR,HSEM CID configuration register" bitfld.long 0xC 16.--18. "SEM_WLIST_C,Semaphore group p CID filtering enable for processor n CID (n = 1 to 3)." "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 0. "CFEN,Semaphore group p global CID filtering enable." "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "HSEM_HWCFGR2,HSEM hardware configuration register 2" hexmask.long.byte 0x0 12.--15. 1. "MASTERID4,Hardware configuration valid bus masters ID4" hexmask.long.byte 0x0 8.--11. 1. "MASTERID3,Hardware configuration valid bus masters ID3" hexmask.long.byte 0x0 4.--7. 1. "MASTERID2,Hardware configuration valid bus masters ID2" hexmask.long.byte 0x0 0.--3. 1. "MASTERID1,Hardware configuration valid bus masters ID1" line.long 0x4 "HSEM_HWCFGR1,HSEM hardware configuration register 1" bitfld.long 0x4 18. "CFEN,Hardware configuration compartment filtering enable" "0,1" bitfld.long 0x4 17. "PRIVEN,Hardware configuration privilege protection enable" "0,1" bitfld.long 0x4 16. "SECEN,Hardware configuration security protection enable" "0,1" hexmask.long.byte 0x4 12.--15. 1. "CID_WIDTH,Hardware configuration compartment isolation bus width" hexmask.long.byte 0x4 8.--11. 1. "NBINT,Hardware configuration number of interrupts/supported number of master ID." hexmask.long.byte 0x4 0.--7. 1. "NBSEM,Hardware configuration number of semaphores" line.long 0x8 "HSEM_VERR,HSEM version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,HSEM major revision number" hexmask.long.byte 0x8 0.--3. 1. "MINREV,HSEM minor revision number" line.long 0xC "HSEM_IPIDR,HSEM identification register" hexmask.long 0xC 0.--31. 1. "IPID,HSEM identifier" line.long 0x10 "HSEM_SIDR,HSEM size identification register" hexmask.long 0x10 0.--31. 1. "SID,HSEM size" tree.end endif tree.end tree "I2C (Inter-integrated Circuit Interface)" base ad:0x0 sif (cpuis("*CA35")) tree "I2C" base ad:0x40120000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C1_S" base ad:0x50120000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C2" base ad:0x40130000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C2_S" base ad:0x50130000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C3" base ad:0x40140000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C3_S" base ad:0x50140000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C4" base ad:0x40150000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C4_S" base ad:0x50150000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C5" base ad:0x40160000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C5_S" base ad:0x50160000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C6" base ad:0x40170000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C6_S" base ad:0x50170000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C7" base ad:0x40180000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C7_S" base ad:0x50180000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C8_S" base ad:0x56040000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end endif sif (cpuis("*CM33F")) tree "I2C" base ad:0x40120000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C2" base ad:0x40130000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C3" base ad:0x40140000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C4" base ad:0x40150000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C5" base ad:0x40160000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C6" base ad:0x40170000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C7" base ad:0x40180000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C8" base ad:0x46040000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end endif sif (cpuis("*CA35")||cpuis("*CM0+")) tree "I2C8" base ad:0x46040000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." sif (cpuis("*CM0+")) wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" newline bitfld.long 0x0 11. "PECCF,PEC Error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/Underrun flag clear" "0,1" newline bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" newline bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" bitfld.long 0x0 4. "NACKCF,Not Acknowledge flag clear" "0,1" newline bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" endif sif (cpuis("*CM0+")) rgroup.long 0x20++0x3 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" endif sif (cpuis("*CM0+")) rgroup.long 0x24++0x3 line.long 0x0 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x0 0.--7. 1. "RXDATA,8-bit receive data" endif sif (cpuis("*CM0+")) rgroup.long 0x3F0++0x3 line.long 0x0 "I2C_HWCFGR" hexmask.long.byte 0x0 12.--15. 1. "AUTON" hexmask.long.byte 0x0 8.--11. 1. "WKP" newline hexmask.long.byte 0x0 4.--7. 1. "ASYN" hexmask.long.byte 0x0 0.--3. 1. "SMBUS" endif sif (cpuis("*CM0+")) rgroup.long 0x3F4++0x3 line.long 0x0 "I2C_VERR" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x0 0.--3. 1. "MINREV,Minor revision" endif sif (cpuis("*CM0+")) rgroup.long 0x3F8++0x3 line.long 0x0 "I2C_IPIDR" hexmask.long 0x0 0.--31. 1. "ID,Identifier." endif sif (cpuis("*CM0+")) rgroup.long 0x3FC++0x3 line.long 0x0 "I2C_SIDR" hexmask.long 0x0 0.--31. 1. "SID,Size identifier." endif tree.end endif sif (cpuis("*CM33F")) tree "I2C1_S" base ad:0x50120000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C2_S" base ad:0x50130000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C3_S" base ad:0x50140000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C4_S" base ad:0x50150000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C5_S" base ad:0x50160000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C6_S" base ad:0x50170000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C7_S" base ad:0x50180000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end tree "I2C8_S" base ad:0x56040000 group.long 0x0++0x1B line.long 0x0 "I2C_CR1,I2C control register 1" bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "B_0x0,B_0x1" bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "PECEN,PEC enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "GCEN,General call enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "B_0x0,B_0x1" bitfld.long 0x0 16. "SBC,Slave byte control" "B_0x0,B_0x1" bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "STOPIE,Stop detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXIE,RX interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXIE,TX interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Peripheral enable" "B_0x0,B_0x1" line.long 0x4 "I2C_CR2,I2C control register 2" bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "B_0x0,B_0x1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes" bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "B_0x0,B_0x1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 13. "START,Start generation" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)" line.long 0x8 "I2C_OAR1,I2C own address 1 register" bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address" line.long 0xC "I2C_OAR2,I2C own address 2 register" bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "B_0x0,B_0x1" bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address" line.long 0x10 "I2C_TIMINGR,I2C timing register" hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "I2C_TIMEOUTR,I2C timeout register" bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "B_0x0,B_0x1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "I2C_ISR,I2C interrupt and status register" hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)" rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "B_0x0,B_0x1" rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1" rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1" rbitfld.long 0x18 12. "TIMEOUT,Timeout or tsubLOW/sub detection flag" "0,1" rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1" rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1" newline rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1" rbitfld.long 0x18 8. "BERR,Bus error" "0,1" rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1" rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1" rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1" newline rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1" bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1" bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "I2C_ICR,I2C interrupt clear register" bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1" bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1" bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1" bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1" newline bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1" bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "I2C_PECR,I2C PEC register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register" line.long 0x4 "I2C_RXDR,I2C receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x7 line.long 0x0 "I2C_TXDR,I2C transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register" bitfld.long 0x4 21. "TRIGEN,Trigger enable" "B_0x0,B_0x1" bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section75.4.2: I2C pins and internal signals I2C interconnections tables)." bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "B_0x0,B_0x1" bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "I2C_HWCFGR,I2C hardware configuration register" hexmask.long.byte 0x0 12.--15. 1. "AUTON,None" hexmask.long.byte 0x0 8.--11. 1. "WKP,None" hexmask.long.byte 0x0 4.--7. 1. "ASYN,None" hexmask.long.byte 0x0 0.--3. 1. "SMBUS,None" line.long 0x4 "I2C_VERR,I2C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "I2C_IPIDR,I2C identification register" hexmask.long 0x8 0.--31. 1. "ID,Identifier." line.long 0xC "I2C_SIDR,I2C size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier." tree.end endif tree.end tree "I3C (Improved Inter-Integrated Circuit)" base ad:0x0 sif (cpuis("*CA35")) tree "I3C" base ad:0x40190000 wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)" hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Isup2/supC static target address (when I3C acts as controller)" bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)" wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)" hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes" group.long 0x4++0x3 line.long 0x0 "I3C_CFGR,I3C configuration register" bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXTHRES,TX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 13. "TXFLUSH,TX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 12. "TXDMAEN,TX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "RXTHRES,RX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 9. "RXFLUSH,RX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "RXDMAEN,RX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 4. "EXITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "I3C_RDR,I3C receive data byte register" hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus." line.long 0x4 "I3C_RDWR,I3C receive data word register" hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)." wgroup.long 0x18++0x7 line.long 0x0 "I3C_TDR,I3C transmit data byte register" hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus." line.long 0x4 "I3C_TDWR,I3C transmit data word register" hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)" group.long 0x20++0x7 line.long 0x0 "I3C_IBIDR,I3C IBI payload data register" hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)." hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])." hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])." hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)." line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register" bitfld.long 0x4 16. "PRELOAD,Preload of the TX-FIFO (when I3C is configured as target)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)" rgroup.long 0x30++0x7 line.long 0x0 "I3C_SR,I3C status register" hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)" bitfld.long 0x0 18. "DIR,Message direction" "B_0x0,B_0x1" bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "XDCNT,Data counter" line.long 0x4 "I3C_SER,I3C status error register" bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "B_0x0,B_0x1" bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 6. "DOVR,RX-FIFO overrun or TX-FIFO underrun" "B_0x0,B_0x1" bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "PERR,Protocol error" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type" rgroup.long 0x40++0x3 line.long 0x0 "I3C_RMR,I3C received message register" hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)" hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)" bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7" rgroup.long 0x50++0x7 line.long 0x0 "I3C_EVR,I3C event register" bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1" newline bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 10. "RXTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 7. "RXLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 6. "TXLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 5. "RXFNEF,RX-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 4. "TXFNFF,TX-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 1. "TXFEF,TX-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1" line.long 0x4 "I3C_IER,I3C interrupt enable register" bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RXTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXFNEIE,RX-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 4. "TXFNFIE,TX-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" wgroup.long 0x58++0x3 line.long 0x0 "I3C_CEVR,I3C clear event register" bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CRXTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" group.long 0x60++0x13 line.long 0x0 "I3C_DEVR0,I3C own device characteristics register" rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1" rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address" bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1" line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register" rbitfld.long 0x4 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register" rbitfld.long 0x8 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register" rbitfld.long 0xC 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register" rbitfld.long 0x10 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" group.long 0x90++0x7 line.long 0x0 "I3C_MAXRLR,I3C maximum read length register" bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)" line.long 0x4 "I3C_MAXWLR,I3C maximum write length register" hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)" group.long 0xA0++0xB line.long 0x0 "I3C_TIMINGR0,I3C timing register 0" hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Isup2/supC messages in number of kernel clocks cycles:" hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Isup2/supC messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during direct/private/IBI payload) in.." hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:" hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:" line.long 0x4 "I3C_TIMINGR1,I3C timing register 1" bitfld.long 0x4 28. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tsubHD_PP/sub):" "0,1" hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)" bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3" hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 s whatever I3C acts as controller or target." line.long 0x8 "I3C_TIMINGR2,I3C timing register 2" hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles" bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "B_0x0,B_0x1" bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "B_0x0,B_0x1" bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "B_0x0,B_0x1" bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data (and on the ACK/NACK phase of data byte of a legacy Isup2/supC read)" "B_0x0,B_0x1" group.long 0xC0++0x17 line.long 0x0 "I3C_BCR,I3C bus characteristics register" bitfld.long 0x0 6. "BCR6,Controller capable" "B_0x0,B_0x1" bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "B_0x0,B_0x1" bitfld.long 0x0 0. "BCR0,max data speed limitation" "B_0x0,B_0x1" line.long 0x4 "I3C_DCR,I3C device characteristics register" hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID" line.long 0x8 "I3C_GETCAPR,I3C get capability register" bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "B_0x0,B_0x1" line.long 0xC "I3C_CRCAPR,I3C controller-role capability register" bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "B_0x0,B_0x1" bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "B_0x0,B_0x1" line.long 0x10 "I3C_GETMXDSR,I3C get max data speed register" bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tsubSCO/sub)" "B_0x0,B_0x1" hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)" bitfld.long 0x10 8.--9. "FMT,GETMXDS CCC format" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register" hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID" rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1" hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID" rgroup.long 0x3F0++0xF line.long 0x0 "I3C_HWCFGR,I3C hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "NBT,number of targets whose the IBI/controller-role request can be managed in parallel by this I3C IP when acting as controller" hexmask.long.byte 0x0 12.--15. 1. "RSIZE,RX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 8.--11. 1. "TSIZE,TX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 4.--7. 1. "SSIZE,S-FIFO size in multiple of (32-bit) words." hexmask.long.byte 0x0 0.--3. 1. "CSIZE,C-FIFO size in multiple of (32-bit) words." line.long 0x4 "I3C_VERR,I3C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,I3C major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,I3C minor revision" line.long 0x8 "I3C_IPIDR,I3C identification register" hexmask.long 0x8 0.--31. 1. "ID,I3C identification" line.long 0xC "I3C_SIDR,I3C size identification register" hexmask.long 0xC 0.--31. 1. "SID,I3C address space size identification (1 Kbyte)" tree.end tree "I3C1_S" base ad:0x50190000 wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)" hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Isup2/supC static target address (when I3C acts as controller)" bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)" wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)" hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes" group.long 0x4++0x3 line.long 0x0 "I3C_CFGR,I3C configuration register" bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXTHRES,TX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 13. "TXFLUSH,TX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 12. "TXDMAEN,TX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "RXTHRES,RX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 9. "RXFLUSH,RX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "RXDMAEN,RX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 4. "EXITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "I3C_RDR,I3C receive data byte register" hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus." line.long 0x4 "I3C_RDWR,I3C receive data word register" hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)." wgroup.long 0x18++0x7 line.long 0x0 "I3C_TDR,I3C transmit data byte register" hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus." line.long 0x4 "I3C_TDWR,I3C transmit data word register" hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)" group.long 0x20++0x7 line.long 0x0 "I3C_IBIDR,I3C IBI payload data register" hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)." hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])." hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])." hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)." line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register" bitfld.long 0x4 16. "PRELOAD,Preload of the TX-FIFO (when I3C is configured as target)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)" rgroup.long 0x30++0x7 line.long 0x0 "I3C_SR,I3C status register" hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)" bitfld.long 0x0 18. "DIR,Message direction" "B_0x0,B_0x1" bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "XDCNT,Data counter" line.long 0x4 "I3C_SER,I3C status error register" bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "B_0x0,B_0x1" bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 6. "DOVR,RX-FIFO overrun or TX-FIFO underrun" "B_0x0,B_0x1" bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "PERR,Protocol error" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type" rgroup.long 0x40++0x3 line.long 0x0 "I3C_RMR,I3C received message register" hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)" hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)" bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7" rgroup.long 0x50++0x7 line.long 0x0 "I3C_EVR,I3C event register" bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1" newline bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 10. "RXTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 7. "RXLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 6. "TXLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 5. "RXFNEF,RX-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 4. "TXFNFF,TX-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 1. "TXFEF,TX-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1" line.long 0x4 "I3C_IER,I3C interrupt enable register" bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RXTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXFNEIE,RX-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 4. "TXFNFIE,TX-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" wgroup.long 0x58++0x3 line.long 0x0 "I3C_CEVR,I3C clear event register" bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CRXTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" group.long 0x60++0x13 line.long 0x0 "I3C_DEVR0,I3C own device characteristics register" rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1" rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address" bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1" line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register" rbitfld.long 0x4 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register" rbitfld.long 0x8 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register" rbitfld.long 0xC 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register" rbitfld.long 0x10 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" group.long 0x90++0x7 line.long 0x0 "I3C_MAXRLR,I3C maximum read length register" bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)" line.long 0x4 "I3C_MAXWLR,I3C maximum write length register" hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)" group.long 0xA0++0xB line.long 0x0 "I3C_TIMINGR0,I3C timing register 0" hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Isup2/supC messages in number of kernel clocks cycles:" hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Isup2/supC messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during direct/private/IBI payload) in.." hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:" hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:" line.long 0x4 "I3C_TIMINGR1,I3C timing register 1" bitfld.long 0x4 28. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tsubHD_PP/sub):" "0,1" hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)" bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3" hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 s whatever I3C acts as controller or target." line.long 0x8 "I3C_TIMINGR2,I3C timing register 2" hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles" bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "B_0x0,B_0x1" bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "B_0x0,B_0x1" bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "B_0x0,B_0x1" bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data (and on the ACK/NACK phase of data byte of a legacy Isup2/supC read)" "B_0x0,B_0x1" group.long 0xC0++0x17 line.long 0x0 "I3C_BCR,I3C bus characteristics register" bitfld.long 0x0 6. "BCR6,Controller capable" "B_0x0,B_0x1" bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "B_0x0,B_0x1" bitfld.long 0x0 0. "BCR0,max data speed limitation" "B_0x0,B_0x1" line.long 0x4 "I3C_DCR,I3C device characteristics register" hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID" line.long 0x8 "I3C_GETCAPR,I3C get capability register" bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "B_0x0,B_0x1" line.long 0xC "I3C_CRCAPR,I3C controller-role capability register" bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "B_0x0,B_0x1" bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "B_0x0,B_0x1" line.long 0x10 "I3C_GETMXDSR,I3C get max data speed register" bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tsubSCO/sub)" "B_0x0,B_0x1" hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)" bitfld.long 0x10 8.--9. "FMT,GETMXDS CCC format" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register" hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID" rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1" hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID" rgroup.long 0x3F0++0xF line.long 0x0 "I3C_HWCFGR,I3C hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "NBT,number of targets whose the IBI/controller-role request can be managed in parallel by this I3C IP when acting as controller" hexmask.long.byte 0x0 12.--15. 1. "RSIZE,RX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 8.--11. 1. "TSIZE,TX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 4.--7. 1. "SSIZE,S-FIFO size in multiple of (32-bit) words." hexmask.long.byte 0x0 0.--3. 1. "CSIZE,C-FIFO size in multiple of (32-bit) words." line.long 0x4 "I3C_VERR,I3C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,I3C major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,I3C minor revision" line.long 0x8 "I3C_IPIDR,I3C identification register" hexmask.long 0x8 0.--31. 1. "ID,I3C identification" line.long 0xC "I3C_SIDR,I3C size identification register" hexmask.long 0xC 0.--31. 1. "SID,I3C address space size identification (1 Kbyte)" tree.end tree "I3C2" base ad:0x401A0000 wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)" hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Isup2/supC static target address (when I3C acts as controller)" bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)" wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)" hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes" group.long 0x4++0x3 line.long 0x0 "I3C_CFGR,I3C configuration register" bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXTHRES,TX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 13. "TXFLUSH,TX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 12. "TXDMAEN,TX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "RXTHRES,RX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 9. "RXFLUSH,RX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "RXDMAEN,RX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 4. "EXITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "I3C_RDR,I3C receive data byte register" hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus." line.long 0x4 "I3C_RDWR,I3C receive data word register" hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)." wgroup.long 0x18++0x7 line.long 0x0 "I3C_TDR,I3C transmit data byte register" hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus." line.long 0x4 "I3C_TDWR,I3C transmit data word register" hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)" group.long 0x20++0x7 line.long 0x0 "I3C_IBIDR,I3C IBI payload data register" hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)." hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])." hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])." hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)." line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register" bitfld.long 0x4 16. "PRELOAD,Preload of the TX-FIFO (when I3C is configured as target)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)" rgroup.long 0x30++0x7 line.long 0x0 "I3C_SR,I3C status register" hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)" bitfld.long 0x0 18. "DIR,Message direction" "B_0x0,B_0x1" bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "XDCNT,Data counter" line.long 0x4 "I3C_SER,I3C status error register" bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "B_0x0,B_0x1" bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 6. "DOVR,RX-FIFO overrun or TX-FIFO underrun" "B_0x0,B_0x1" bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "PERR,Protocol error" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type" rgroup.long 0x40++0x3 line.long 0x0 "I3C_RMR,I3C received message register" hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)" hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)" bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7" rgroup.long 0x50++0x7 line.long 0x0 "I3C_EVR,I3C event register" bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1" newline bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 10. "RXTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 7. "RXLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 6. "TXLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 5. "RXFNEF,RX-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 4. "TXFNFF,TX-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 1. "TXFEF,TX-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1" line.long 0x4 "I3C_IER,I3C interrupt enable register" bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RXTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXFNEIE,RX-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 4. "TXFNFIE,TX-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" wgroup.long 0x58++0x3 line.long 0x0 "I3C_CEVR,I3C clear event register" bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CRXTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" group.long 0x60++0x13 line.long 0x0 "I3C_DEVR0,I3C own device characteristics register" rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1" rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address" bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1" line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register" rbitfld.long 0x4 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register" rbitfld.long 0x8 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register" rbitfld.long 0xC 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register" rbitfld.long 0x10 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" group.long 0x90++0x7 line.long 0x0 "I3C_MAXRLR,I3C maximum read length register" bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)" line.long 0x4 "I3C_MAXWLR,I3C maximum write length register" hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)" group.long 0xA0++0xB line.long 0x0 "I3C_TIMINGR0,I3C timing register 0" hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Isup2/supC messages in number of kernel clocks cycles:" hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Isup2/supC messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during direct/private/IBI payload) in.." hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:" hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:" line.long 0x4 "I3C_TIMINGR1,I3C timing register 1" bitfld.long 0x4 28. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tsubHD_PP/sub):" "0,1" hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)" bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3" hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 s whatever I3C acts as controller or target." line.long 0x8 "I3C_TIMINGR2,I3C timing register 2" hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles" bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "B_0x0,B_0x1" bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "B_0x0,B_0x1" bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "B_0x0,B_0x1" bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data (and on the ACK/NACK phase of data byte of a legacy Isup2/supC read)" "B_0x0,B_0x1" group.long 0xC0++0x17 line.long 0x0 "I3C_BCR,I3C bus characteristics register" bitfld.long 0x0 6. "BCR6,Controller capable" "B_0x0,B_0x1" bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "B_0x0,B_0x1" bitfld.long 0x0 0. "BCR0,max data speed limitation" "B_0x0,B_0x1" line.long 0x4 "I3C_DCR,I3C device characteristics register" hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID" line.long 0x8 "I3C_GETCAPR,I3C get capability register" bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "B_0x0,B_0x1" line.long 0xC "I3C_CRCAPR,I3C controller-role capability register" bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "B_0x0,B_0x1" bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "B_0x0,B_0x1" line.long 0x10 "I3C_GETMXDSR,I3C get max data speed register" bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tsubSCO/sub)" "B_0x0,B_0x1" hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)" bitfld.long 0x10 8.--9. "FMT,GETMXDS CCC format" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register" hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID" rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1" hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID" rgroup.long 0x3F0++0xF line.long 0x0 "I3C_HWCFGR,I3C hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "NBT,number of targets whose the IBI/controller-role request can be managed in parallel by this I3C IP when acting as controller" hexmask.long.byte 0x0 12.--15. 1. "RSIZE,RX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 8.--11. 1. "TSIZE,TX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 4.--7. 1. "SSIZE,S-FIFO size in multiple of (32-bit) words." hexmask.long.byte 0x0 0.--3. 1. "CSIZE,C-FIFO size in multiple of (32-bit) words." line.long 0x4 "I3C_VERR,I3C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,I3C major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,I3C minor revision" line.long 0x8 "I3C_IPIDR,I3C identification register" hexmask.long 0x8 0.--31. 1. "ID,I3C identification" line.long 0xC "I3C_SIDR,I3C size identification register" hexmask.long 0xC 0.--31. 1. "SID,I3C address space size identification (1 Kbyte)" tree.end tree "I3C2_S" base ad:0x501A0000 wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)" hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Isup2/supC static target address (when I3C acts as controller)" bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)" wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)" hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes" group.long 0x4++0x3 line.long 0x0 "I3C_CFGR,I3C configuration register" bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXTHRES,TX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 13. "TXFLUSH,TX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 12. "TXDMAEN,TX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "RXTHRES,RX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 9. "RXFLUSH,RX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "RXDMAEN,RX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 4. "EXITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "I3C_RDR,I3C receive data byte register" hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus." line.long 0x4 "I3C_RDWR,I3C receive data word register" hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)." wgroup.long 0x18++0x7 line.long 0x0 "I3C_TDR,I3C transmit data byte register" hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus." line.long 0x4 "I3C_TDWR,I3C transmit data word register" hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)" group.long 0x20++0x7 line.long 0x0 "I3C_IBIDR,I3C IBI payload data register" hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)." hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])." hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])." hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)." line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register" bitfld.long 0x4 16. "PRELOAD,Preload of the TX-FIFO (when I3C is configured as target)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)" rgroup.long 0x30++0x7 line.long 0x0 "I3C_SR,I3C status register" hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)" bitfld.long 0x0 18. "DIR,Message direction" "B_0x0,B_0x1" bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "XDCNT,Data counter" line.long 0x4 "I3C_SER,I3C status error register" bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "B_0x0,B_0x1" bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 6. "DOVR,RX-FIFO overrun or TX-FIFO underrun" "B_0x0,B_0x1" bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "PERR,Protocol error" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type" rgroup.long 0x40++0x3 line.long 0x0 "I3C_RMR,I3C received message register" hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)" hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)" bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7" rgroup.long 0x50++0x7 line.long 0x0 "I3C_EVR,I3C event register" bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1" newline bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 10. "RXTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 7. "RXLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 6. "TXLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 5. "RXFNEF,RX-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 4. "TXFNFF,TX-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 1. "TXFEF,TX-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1" line.long 0x4 "I3C_IER,I3C interrupt enable register" bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RXTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXFNEIE,RX-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 4. "TXFNFIE,TX-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" wgroup.long 0x58++0x3 line.long 0x0 "I3C_CEVR,I3C clear event register" bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CRXTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" group.long 0x60++0x13 line.long 0x0 "I3C_DEVR0,I3C own device characteristics register" rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1" rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address" bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1" line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register" rbitfld.long 0x4 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register" rbitfld.long 0x8 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register" rbitfld.long 0xC 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register" rbitfld.long 0x10 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" group.long 0x90++0x7 line.long 0x0 "I3C_MAXRLR,I3C maximum read length register" bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)" line.long 0x4 "I3C_MAXWLR,I3C maximum write length register" hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)" group.long 0xA0++0xB line.long 0x0 "I3C_TIMINGR0,I3C timing register 0" hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Isup2/supC messages in number of kernel clocks cycles:" hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Isup2/supC messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during direct/private/IBI payload) in.." hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:" hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:" line.long 0x4 "I3C_TIMINGR1,I3C timing register 1" bitfld.long 0x4 28. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tsubHD_PP/sub):" "0,1" hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)" bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3" hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 s whatever I3C acts as controller or target." line.long 0x8 "I3C_TIMINGR2,I3C timing register 2" hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles" bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "B_0x0,B_0x1" bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "B_0x0,B_0x1" bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "B_0x0,B_0x1" bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data (and on the ACK/NACK phase of data byte of a legacy Isup2/supC read)" "B_0x0,B_0x1" group.long 0xC0++0x17 line.long 0x0 "I3C_BCR,I3C bus characteristics register" bitfld.long 0x0 6. "BCR6,Controller capable" "B_0x0,B_0x1" bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "B_0x0,B_0x1" bitfld.long 0x0 0. "BCR0,max data speed limitation" "B_0x0,B_0x1" line.long 0x4 "I3C_DCR,I3C device characteristics register" hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID" line.long 0x8 "I3C_GETCAPR,I3C get capability register" bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "B_0x0,B_0x1" line.long 0xC "I3C_CRCAPR,I3C controller-role capability register" bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "B_0x0,B_0x1" bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "B_0x0,B_0x1" line.long 0x10 "I3C_GETMXDSR,I3C get max data speed register" bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tsubSCO/sub)" "B_0x0,B_0x1" hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)" bitfld.long 0x10 8.--9. "FMT,GETMXDS CCC format" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register" hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID" rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1" hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID" rgroup.long 0x3F0++0xF line.long 0x0 "I3C_HWCFGR,I3C hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "NBT,number of targets whose the IBI/controller-role request can be managed in parallel by this I3C IP when acting as controller" hexmask.long.byte 0x0 12.--15. 1. "RSIZE,RX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 8.--11. 1. "TSIZE,TX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 4.--7. 1. "SSIZE,S-FIFO size in multiple of (32-bit) words." hexmask.long.byte 0x0 0.--3. 1. "CSIZE,C-FIFO size in multiple of (32-bit) words." line.long 0x4 "I3C_VERR,I3C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,I3C major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,I3C minor revision" line.long 0x8 "I3C_IPIDR,I3C identification register" hexmask.long 0x8 0.--31. 1. "ID,I3C identification" line.long 0xC "I3C_SIDR,I3C size identification register" hexmask.long 0xC 0.--31. 1. "SID,I3C address space size identification (1 Kbyte)" tree.end tree "I3C3" base ad:0x401B0000 wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)" hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Isup2/supC static target address (when I3C acts as controller)" bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)" wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)" hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes" group.long 0x4++0x3 line.long 0x0 "I3C_CFGR,I3C configuration register" bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXTHRES,TX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 13. "TXFLUSH,TX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 12. "TXDMAEN,TX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "RXTHRES,RX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 9. "RXFLUSH,RX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "RXDMAEN,RX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 4. "EXITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "I3C_RDR,I3C receive data byte register" hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus." line.long 0x4 "I3C_RDWR,I3C receive data word register" hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)." wgroup.long 0x18++0x7 line.long 0x0 "I3C_TDR,I3C transmit data byte register" hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus." line.long 0x4 "I3C_TDWR,I3C transmit data word register" hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)" group.long 0x20++0x7 line.long 0x0 "I3C_IBIDR,I3C IBI payload data register" hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)." hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])." hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])." hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)." line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register" bitfld.long 0x4 16. "PRELOAD,Preload of the TX-FIFO (when I3C is configured as target)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)" rgroup.long 0x30++0x7 line.long 0x0 "I3C_SR,I3C status register" hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)" bitfld.long 0x0 18. "DIR,Message direction" "B_0x0,B_0x1" bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "XDCNT,Data counter" line.long 0x4 "I3C_SER,I3C status error register" bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "B_0x0,B_0x1" bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 6. "DOVR,RX-FIFO overrun or TX-FIFO underrun" "B_0x0,B_0x1" bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "PERR,Protocol error" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type" rgroup.long 0x40++0x3 line.long 0x0 "I3C_RMR,I3C received message register" hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)" hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)" bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7" rgroup.long 0x50++0x7 line.long 0x0 "I3C_EVR,I3C event register" bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1" newline bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 10. "RXTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 7. "RXLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 6. "TXLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 5. "RXFNEF,RX-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 4. "TXFNFF,TX-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 1. "TXFEF,TX-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1" line.long 0x4 "I3C_IER,I3C interrupt enable register" bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RXTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXFNEIE,RX-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 4. "TXFNFIE,TX-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" wgroup.long 0x58++0x3 line.long 0x0 "I3C_CEVR,I3C clear event register" bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CRXTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" group.long 0x60++0x13 line.long 0x0 "I3C_DEVR0,I3C own device characteristics register" rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1" rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address" bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1" line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register" rbitfld.long 0x4 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register" rbitfld.long 0x8 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register" rbitfld.long 0xC 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register" rbitfld.long 0x10 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" group.long 0x90++0x7 line.long 0x0 "I3C_MAXRLR,I3C maximum read length register" bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)" line.long 0x4 "I3C_MAXWLR,I3C maximum write length register" hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)" group.long 0xA0++0xB line.long 0x0 "I3C_TIMINGR0,I3C timing register 0" hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Isup2/supC messages in number of kernel clocks cycles:" hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Isup2/supC messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during direct/private/IBI payload) in.." hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:" hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:" line.long 0x4 "I3C_TIMINGR1,I3C timing register 1" bitfld.long 0x4 28. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tsubHD_PP/sub):" "0,1" hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)" bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3" hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 s whatever I3C acts as controller or target." line.long 0x8 "I3C_TIMINGR2,I3C timing register 2" hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles" bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "B_0x0,B_0x1" bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "B_0x0,B_0x1" bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "B_0x0,B_0x1" bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data (and on the ACK/NACK phase of data byte of a legacy Isup2/supC read)" "B_0x0,B_0x1" group.long 0xC0++0x17 line.long 0x0 "I3C_BCR,I3C bus characteristics register" bitfld.long 0x0 6. "BCR6,Controller capable" "B_0x0,B_0x1" bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "B_0x0,B_0x1" bitfld.long 0x0 0. "BCR0,max data speed limitation" "B_0x0,B_0x1" line.long 0x4 "I3C_DCR,I3C device characteristics register" hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID" line.long 0x8 "I3C_GETCAPR,I3C get capability register" bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "B_0x0,B_0x1" line.long 0xC "I3C_CRCAPR,I3C controller-role capability register" bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "B_0x0,B_0x1" bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "B_0x0,B_0x1" line.long 0x10 "I3C_GETMXDSR,I3C get max data speed register" bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tsubSCO/sub)" "B_0x0,B_0x1" hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)" bitfld.long 0x10 8.--9. "FMT,GETMXDS CCC format" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register" hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID" rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1" hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID" rgroup.long 0x3F0++0xF line.long 0x0 "I3C_HWCFGR,I3C hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "NBT,number of targets whose the IBI/controller-role request can be managed in parallel by this I3C IP when acting as controller" hexmask.long.byte 0x0 12.--15. 1. "RSIZE,RX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 8.--11. 1. "TSIZE,TX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 4.--7. 1. "SSIZE,S-FIFO size in multiple of (32-bit) words." hexmask.long.byte 0x0 0.--3. 1. "CSIZE,C-FIFO size in multiple of (32-bit) words." line.long 0x4 "I3C_VERR,I3C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,I3C major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,I3C minor revision" line.long 0x8 "I3C_IPIDR,I3C identification register" hexmask.long 0x8 0.--31. 1. "ID,I3C identification" line.long 0xC "I3C_SIDR,I3C size identification register" hexmask.long 0xC 0.--31. 1. "SID,I3C address space size identification (1 Kbyte)" tree.end tree "I3C3_S" base ad:0x501B0000 wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)" hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Isup2/supC static target address (when I3C acts as controller)" bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)" wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)" hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes" group.long 0x4++0x3 line.long 0x0 "I3C_CFGR,I3C configuration register" bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXTHRES,TX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 13. "TXFLUSH,TX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 12. "TXDMAEN,TX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "RXTHRES,RX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 9. "RXFLUSH,RX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "RXDMAEN,RX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 4. "EXITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "I3C_RDR,I3C receive data byte register" hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus." line.long 0x4 "I3C_RDWR,I3C receive data word register" hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)." wgroup.long 0x18++0x7 line.long 0x0 "I3C_TDR,I3C transmit data byte register" hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus." line.long 0x4 "I3C_TDWR,I3C transmit data word register" hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)" group.long 0x20++0x7 line.long 0x0 "I3C_IBIDR,I3C IBI payload data register" hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)." hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])." hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])." hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)." line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register" bitfld.long 0x4 16. "PRELOAD,Preload of the TX-FIFO (when I3C is configured as target)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)" rgroup.long 0x30++0x7 line.long 0x0 "I3C_SR,I3C status register" hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)" bitfld.long 0x0 18. "DIR,Message direction" "B_0x0,B_0x1" bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "XDCNT,Data counter" line.long 0x4 "I3C_SER,I3C status error register" bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "B_0x0,B_0x1" bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 6. "DOVR,RX-FIFO overrun or TX-FIFO underrun" "B_0x0,B_0x1" bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "PERR,Protocol error" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type" rgroup.long 0x40++0x3 line.long 0x0 "I3C_RMR,I3C received message register" hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)" hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)" bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7" rgroup.long 0x50++0x7 line.long 0x0 "I3C_EVR,I3C event register" bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1" newline bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 10. "RXTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 7. "RXLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 6. "TXLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 5. "RXFNEF,RX-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 4. "TXFNFF,TX-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 1. "TXFEF,TX-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1" line.long 0x4 "I3C_IER,I3C interrupt enable register" bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RXTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXFNEIE,RX-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 4. "TXFNFIE,TX-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" wgroup.long 0x58++0x3 line.long 0x0 "I3C_CEVR,I3C clear event register" bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CRXTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" group.long 0x60++0x13 line.long 0x0 "I3C_DEVR0,I3C own device characteristics register" rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1" rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address" bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1" line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register" rbitfld.long 0x4 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register" rbitfld.long 0x8 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register" rbitfld.long 0xC 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register" rbitfld.long 0x10 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" group.long 0x90++0x7 line.long 0x0 "I3C_MAXRLR,I3C maximum read length register" bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)" line.long 0x4 "I3C_MAXWLR,I3C maximum write length register" hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)" group.long 0xA0++0xB line.long 0x0 "I3C_TIMINGR0,I3C timing register 0" hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Isup2/supC messages in number of kernel clocks cycles:" hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Isup2/supC messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during direct/private/IBI payload) in.." hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:" hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:" line.long 0x4 "I3C_TIMINGR1,I3C timing register 1" bitfld.long 0x4 28. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tsubHD_PP/sub):" "0,1" hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)" bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3" hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 s whatever I3C acts as controller or target." line.long 0x8 "I3C_TIMINGR2,I3C timing register 2" hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles" bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "B_0x0,B_0x1" bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "B_0x0,B_0x1" bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "B_0x0,B_0x1" bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data (and on the ACK/NACK phase of data byte of a legacy Isup2/supC read)" "B_0x0,B_0x1" group.long 0xC0++0x17 line.long 0x0 "I3C_BCR,I3C bus characteristics register" bitfld.long 0x0 6. "BCR6,Controller capable" "B_0x0,B_0x1" bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "B_0x0,B_0x1" bitfld.long 0x0 0. "BCR0,max data speed limitation" "B_0x0,B_0x1" line.long 0x4 "I3C_DCR,I3C device characteristics register" hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID" line.long 0x8 "I3C_GETCAPR,I3C get capability register" bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "B_0x0,B_0x1" line.long 0xC "I3C_CRCAPR,I3C controller-role capability register" bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "B_0x0,B_0x1" bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "B_0x0,B_0x1" line.long 0x10 "I3C_GETMXDSR,I3C get max data speed register" bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tsubSCO/sub)" "B_0x0,B_0x1" hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)" bitfld.long 0x10 8.--9. "FMT,GETMXDS CCC format" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register" hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID" rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1" hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID" rgroup.long 0x3F0++0xF line.long 0x0 "I3C_HWCFGR,I3C hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "NBT,number of targets whose the IBI/controller-role request can be managed in parallel by this I3C IP when acting as controller" hexmask.long.byte 0x0 12.--15. 1. "RSIZE,RX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 8.--11. 1. "TSIZE,TX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 4.--7. 1. "SSIZE,S-FIFO size in multiple of (32-bit) words." hexmask.long.byte 0x0 0.--3. 1. "CSIZE,C-FIFO size in multiple of (32-bit) words." line.long 0x4 "I3C_VERR,I3C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,I3C major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,I3C minor revision" line.long 0x8 "I3C_IPIDR,I3C identification register" hexmask.long 0x8 0.--31. 1. "ID,I3C identification" line.long 0xC "I3C_SIDR,I3C size identification register" hexmask.long 0xC 0.--31. 1. "SID,I3C address space size identification (1 Kbyte)" tree.end tree "I3C4_S" base ad:0x56080000 wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)" hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Isup2/supC static target address (when I3C acts as controller)" bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)" wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)" hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes" group.long 0x4++0x3 line.long 0x0 "I3C_CFGR,I3C configuration register" bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXTHRES,TX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 13. "TXFLUSH,TX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 12. "TXDMAEN,TX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "RXTHRES,RX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 9. "RXFLUSH,RX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "RXDMAEN,RX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 4. "EXITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "I3C_RDR,I3C receive data byte register" hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus." line.long 0x4 "I3C_RDWR,I3C receive data word register" hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)." wgroup.long 0x18++0x7 line.long 0x0 "I3C_TDR,I3C transmit data byte register" hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus." line.long 0x4 "I3C_TDWR,I3C transmit data word register" hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)" group.long 0x20++0x7 line.long 0x0 "I3C_IBIDR,I3C IBI payload data register" hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)." hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])." hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])." hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)." line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register" bitfld.long 0x4 16. "PRELOAD,Preload of the TX-FIFO (when I3C is configured as target)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)" rgroup.long 0x30++0x7 line.long 0x0 "I3C_SR,I3C status register" hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)" bitfld.long 0x0 18. "DIR,Message direction" "B_0x0,B_0x1" bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "XDCNT,Data counter" line.long 0x4 "I3C_SER,I3C status error register" bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "B_0x0,B_0x1" bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 6. "DOVR,RX-FIFO overrun or TX-FIFO underrun" "B_0x0,B_0x1" bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "PERR,Protocol error" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type" rgroup.long 0x40++0x3 line.long 0x0 "I3C_RMR,I3C received message register" hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)" hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)" bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7" rgroup.long 0x50++0x7 line.long 0x0 "I3C_EVR,I3C event register" bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1" newline bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 10. "RXTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 7. "RXLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 6. "TXLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 5. "RXFNEF,RX-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 4. "TXFNFF,TX-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 1. "TXFEF,TX-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1" line.long 0x4 "I3C_IER,I3C interrupt enable register" bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RXTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXFNEIE,RX-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 4. "TXFNFIE,TX-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" wgroup.long 0x58++0x3 line.long 0x0 "I3C_CEVR,I3C clear event register" bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CRXTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" group.long 0x60++0x13 line.long 0x0 "I3C_DEVR0,I3C own device characteristics register" rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1" rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address" bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1" line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register" rbitfld.long 0x4 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register" rbitfld.long 0x8 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register" rbitfld.long 0xC 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register" rbitfld.long 0x10 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" group.long 0x90++0x7 line.long 0x0 "I3C_MAXRLR,I3C maximum read length register" bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)" line.long 0x4 "I3C_MAXWLR,I3C maximum write length register" hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)" group.long 0xA0++0xB line.long 0x0 "I3C_TIMINGR0,I3C timing register 0" hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Isup2/supC messages in number of kernel clocks cycles:" hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Isup2/supC messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during direct/private/IBI payload) in.." hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:" hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:" line.long 0x4 "I3C_TIMINGR1,I3C timing register 1" bitfld.long 0x4 28. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tsubHD_PP/sub):" "0,1" hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)" bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3" hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 s whatever I3C acts as controller or target." line.long 0x8 "I3C_TIMINGR2,I3C timing register 2" hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles" bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "B_0x0,B_0x1" bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "B_0x0,B_0x1" bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "B_0x0,B_0x1" bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data (and on the ACK/NACK phase of data byte of a legacy Isup2/supC read)" "B_0x0,B_0x1" group.long 0xC0++0x17 line.long 0x0 "I3C_BCR,I3C bus characteristics register" bitfld.long 0x0 6. "BCR6,Controller capable" "B_0x0,B_0x1" bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "B_0x0,B_0x1" bitfld.long 0x0 0. "BCR0,max data speed limitation" "B_0x0,B_0x1" line.long 0x4 "I3C_DCR,I3C device characteristics register" hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID" line.long 0x8 "I3C_GETCAPR,I3C get capability register" bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "B_0x0,B_0x1" line.long 0xC "I3C_CRCAPR,I3C controller-role capability register" bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "B_0x0,B_0x1" bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "B_0x0,B_0x1" line.long 0x10 "I3C_GETMXDSR,I3C get max data speed register" bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tsubSCO/sub)" "B_0x0,B_0x1" hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)" bitfld.long 0x10 8.--9. "FMT,GETMXDS CCC format" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register" hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID" rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1" hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID" rgroup.long 0x3F0++0xF line.long 0x0 "I3C_HWCFGR,I3C hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "NBT,number of targets whose the IBI/controller-role request can be managed in parallel by this I3C IP when acting as controller" hexmask.long.byte 0x0 12.--15. 1. "RSIZE,RX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 8.--11. 1. "TSIZE,TX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 4.--7. 1. "SSIZE,S-FIFO size in multiple of (32-bit) words." hexmask.long.byte 0x0 0.--3. 1. "CSIZE,C-FIFO size in multiple of (32-bit) words." line.long 0x4 "I3C_VERR,I3C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,I3C major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,I3C minor revision" line.long 0x8 "I3C_IPIDR,I3C identification register" hexmask.long 0x8 0.--31. 1. "ID,I3C identification" line.long 0xC "I3C_SIDR,I3C size identification register" hexmask.long 0xC 0.--31. 1. "SID,I3C address space size identification (1 Kbyte)" tree.end endif sif (cpuis("*CM33F")) tree "I3C" base ad:0x40190000 wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)" hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Isup2/supC static target address (when I3C acts as controller)" bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)" wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)" hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes" group.long 0x4++0x3 line.long 0x0 "I3C_CFGR,I3C configuration register" bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXTHRES,TX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 13. "TXFLUSH,TX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 12. "TXDMAEN,TX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "RXTHRES,RX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 9. "RXFLUSH,RX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "RXDMAEN,RX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 4. "EXITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "I3C_RDR,I3C receive data byte register" hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus." line.long 0x4 "I3C_RDWR,I3C receive data word register" hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)." wgroup.long 0x18++0x7 line.long 0x0 "I3C_TDR,I3C transmit data byte register" hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus." line.long 0x4 "I3C_TDWR,I3C transmit data word register" hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)" group.long 0x20++0x7 line.long 0x0 "I3C_IBIDR,I3C IBI payload data register" hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)." hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])." hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])." hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)." line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register" bitfld.long 0x4 16. "PRELOAD,Preload of the TX-FIFO (when I3C is configured as target)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)" rgroup.long 0x30++0x7 line.long 0x0 "I3C_SR,I3C status register" hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)" bitfld.long 0x0 18. "DIR,Message direction" "B_0x0,B_0x1" bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "XDCNT,Data counter" line.long 0x4 "I3C_SER,I3C status error register" bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "B_0x0,B_0x1" bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 6. "DOVR,RX-FIFO overrun or TX-FIFO underrun" "B_0x0,B_0x1" bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "PERR,Protocol error" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type" rgroup.long 0x40++0x3 line.long 0x0 "I3C_RMR,I3C received message register" hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)" hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)" bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7" rgroup.long 0x50++0x7 line.long 0x0 "I3C_EVR,I3C event register" bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1" newline bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 10. "RXTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 7. "RXLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 6. "TXLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 5. "RXFNEF,RX-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 4. "TXFNFF,TX-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 1. "TXFEF,TX-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1" line.long 0x4 "I3C_IER,I3C interrupt enable register" bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RXTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXFNEIE,RX-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 4. "TXFNFIE,TX-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" wgroup.long 0x58++0x3 line.long 0x0 "I3C_CEVR,I3C clear event register" bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CRXTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" group.long 0x60++0x13 line.long 0x0 "I3C_DEVR0,I3C own device characteristics register" rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1" rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address" bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1" line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register" rbitfld.long 0x4 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register" rbitfld.long 0x8 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register" rbitfld.long 0xC 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register" rbitfld.long 0x10 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" group.long 0x90++0x7 line.long 0x0 "I3C_MAXRLR,I3C maximum read length register" bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)" line.long 0x4 "I3C_MAXWLR,I3C maximum write length register" hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)" group.long 0xA0++0xB line.long 0x0 "I3C_TIMINGR0,I3C timing register 0" hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Isup2/supC messages in number of kernel clocks cycles:" hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Isup2/supC messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during direct/private/IBI payload) in.." hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:" hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:" line.long 0x4 "I3C_TIMINGR1,I3C timing register 1" bitfld.long 0x4 28. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tsubHD_PP/sub):" "0,1" hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)" bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3" hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 s whatever I3C acts as controller or target." line.long 0x8 "I3C_TIMINGR2,I3C timing register 2" hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles" bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "B_0x0,B_0x1" bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "B_0x0,B_0x1" bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "B_0x0,B_0x1" bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data (and on the ACK/NACK phase of data byte of a legacy Isup2/supC read)" "B_0x0,B_0x1" group.long 0xC0++0x17 line.long 0x0 "I3C_BCR,I3C bus characteristics register" bitfld.long 0x0 6. "BCR6,Controller capable" "B_0x0,B_0x1" bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "B_0x0,B_0x1" bitfld.long 0x0 0. "BCR0,max data speed limitation" "B_0x0,B_0x1" line.long 0x4 "I3C_DCR,I3C device characteristics register" hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID" line.long 0x8 "I3C_GETCAPR,I3C get capability register" bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "B_0x0,B_0x1" line.long 0xC "I3C_CRCAPR,I3C controller-role capability register" bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "B_0x0,B_0x1" bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "B_0x0,B_0x1" line.long 0x10 "I3C_GETMXDSR,I3C get max data speed register" bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tsubSCO/sub)" "B_0x0,B_0x1" hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)" bitfld.long 0x10 8.--9. "FMT,GETMXDS CCC format" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register" hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID" rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1" hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID" rgroup.long 0x3F0++0xF line.long 0x0 "I3C_HWCFGR,I3C hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "NBT,number of targets whose the IBI/controller-role request can be managed in parallel by this I3C IP when acting as controller" hexmask.long.byte 0x0 12.--15. 1. "RSIZE,RX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 8.--11. 1. "TSIZE,TX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 4.--7. 1. "SSIZE,S-FIFO size in multiple of (32-bit) words." hexmask.long.byte 0x0 0.--3. 1. "CSIZE,C-FIFO size in multiple of (32-bit) words." line.long 0x4 "I3C_VERR,I3C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,I3C major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,I3C minor revision" line.long 0x8 "I3C_IPIDR,I3C identification register" hexmask.long 0x8 0.--31. 1. "ID,I3C identification" line.long 0xC "I3C_SIDR,I3C size identification register" hexmask.long 0xC 0.--31. 1. "SID,I3C address space size identification (1 Kbyte)" tree.end tree "I3C2" base ad:0x401A0000 wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)" hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Isup2/supC static target address (when I3C acts as controller)" bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)" wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)" hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes" group.long 0x4++0x3 line.long 0x0 "I3C_CFGR,I3C configuration register" bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXTHRES,TX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 13. "TXFLUSH,TX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 12. "TXDMAEN,TX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "RXTHRES,RX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 9. "RXFLUSH,RX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "RXDMAEN,RX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 4. "EXITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "I3C_RDR,I3C receive data byte register" hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus." line.long 0x4 "I3C_RDWR,I3C receive data word register" hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)." wgroup.long 0x18++0x7 line.long 0x0 "I3C_TDR,I3C transmit data byte register" hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus." line.long 0x4 "I3C_TDWR,I3C transmit data word register" hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)" group.long 0x20++0x7 line.long 0x0 "I3C_IBIDR,I3C IBI payload data register" hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)." hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])." hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])." hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)." line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register" bitfld.long 0x4 16. "PRELOAD,Preload of the TX-FIFO (when I3C is configured as target)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)" rgroup.long 0x30++0x7 line.long 0x0 "I3C_SR,I3C status register" hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)" bitfld.long 0x0 18. "DIR,Message direction" "B_0x0,B_0x1" bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "XDCNT,Data counter" line.long 0x4 "I3C_SER,I3C status error register" bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "B_0x0,B_0x1" bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 6. "DOVR,RX-FIFO overrun or TX-FIFO underrun" "B_0x0,B_0x1" bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "PERR,Protocol error" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type" rgroup.long 0x40++0x3 line.long 0x0 "I3C_RMR,I3C received message register" hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)" hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)" bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7" rgroup.long 0x50++0x7 line.long 0x0 "I3C_EVR,I3C event register" bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1" newline bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 10. "RXTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 7. "RXLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 6. "TXLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 5. "RXFNEF,RX-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 4. "TXFNFF,TX-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 1. "TXFEF,TX-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1" line.long 0x4 "I3C_IER,I3C interrupt enable register" bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RXTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXFNEIE,RX-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 4. "TXFNFIE,TX-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" wgroup.long 0x58++0x3 line.long 0x0 "I3C_CEVR,I3C clear event register" bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CRXTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" group.long 0x60++0x13 line.long 0x0 "I3C_DEVR0,I3C own device characteristics register" rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1" rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address" bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1" line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register" rbitfld.long 0x4 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register" rbitfld.long 0x8 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register" rbitfld.long 0xC 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register" rbitfld.long 0x10 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" group.long 0x90++0x7 line.long 0x0 "I3C_MAXRLR,I3C maximum read length register" bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)" line.long 0x4 "I3C_MAXWLR,I3C maximum write length register" hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)" group.long 0xA0++0xB line.long 0x0 "I3C_TIMINGR0,I3C timing register 0" hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Isup2/supC messages in number of kernel clocks cycles:" hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Isup2/supC messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during direct/private/IBI payload) in.." hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:" hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:" line.long 0x4 "I3C_TIMINGR1,I3C timing register 1" bitfld.long 0x4 28. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tsubHD_PP/sub):" "0,1" hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)" bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3" hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 s whatever I3C acts as controller or target." line.long 0x8 "I3C_TIMINGR2,I3C timing register 2" hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles" bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "B_0x0,B_0x1" bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "B_0x0,B_0x1" bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "B_0x0,B_0x1" bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data (and on the ACK/NACK phase of data byte of a legacy Isup2/supC read)" "B_0x0,B_0x1" group.long 0xC0++0x17 line.long 0x0 "I3C_BCR,I3C bus characteristics register" bitfld.long 0x0 6. "BCR6,Controller capable" "B_0x0,B_0x1" bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "B_0x0,B_0x1" bitfld.long 0x0 0. "BCR0,max data speed limitation" "B_0x0,B_0x1" line.long 0x4 "I3C_DCR,I3C device characteristics register" hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID" line.long 0x8 "I3C_GETCAPR,I3C get capability register" bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "B_0x0,B_0x1" line.long 0xC "I3C_CRCAPR,I3C controller-role capability register" bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "B_0x0,B_0x1" bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "B_0x0,B_0x1" line.long 0x10 "I3C_GETMXDSR,I3C get max data speed register" bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tsubSCO/sub)" "B_0x0,B_0x1" hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)" bitfld.long 0x10 8.--9. "FMT,GETMXDS CCC format" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register" hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID" rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1" hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID" rgroup.long 0x3F0++0xF line.long 0x0 "I3C_HWCFGR,I3C hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "NBT,number of targets whose the IBI/controller-role request can be managed in parallel by this I3C IP when acting as controller" hexmask.long.byte 0x0 12.--15. 1. "RSIZE,RX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 8.--11. 1. "TSIZE,TX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 4.--7. 1. "SSIZE,S-FIFO size in multiple of (32-bit) words." hexmask.long.byte 0x0 0.--3. 1. "CSIZE,C-FIFO size in multiple of (32-bit) words." line.long 0x4 "I3C_VERR,I3C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,I3C major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,I3C minor revision" line.long 0x8 "I3C_IPIDR,I3C identification register" hexmask.long 0x8 0.--31. 1. "ID,I3C identification" line.long 0xC "I3C_SIDR,I3C size identification register" hexmask.long 0xC 0.--31. 1. "SID,I3C address space size identification (1 Kbyte)" tree.end tree "I3C3" base ad:0x401B0000 wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)" hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Isup2/supC static target address (when I3C acts as controller)" bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)" wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)" hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes" group.long 0x4++0x3 line.long 0x0 "I3C_CFGR,I3C configuration register" bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXTHRES,TX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 13. "TXFLUSH,TX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 12. "TXDMAEN,TX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "RXTHRES,RX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 9. "RXFLUSH,RX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "RXDMAEN,RX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 4. "EXITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "I3C_RDR,I3C receive data byte register" hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus." line.long 0x4 "I3C_RDWR,I3C receive data word register" hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)." wgroup.long 0x18++0x7 line.long 0x0 "I3C_TDR,I3C transmit data byte register" hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus." line.long 0x4 "I3C_TDWR,I3C transmit data word register" hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)" group.long 0x20++0x7 line.long 0x0 "I3C_IBIDR,I3C IBI payload data register" hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)." hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])." hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])." hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)." line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register" bitfld.long 0x4 16. "PRELOAD,Preload of the TX-FIFO (when I3C is configured as target)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)" rgroup.long 0x30++0x7 line.long 0x0 "I3C_SR,I3C status register" hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)" bitfld.long 0x0 18. "DIR,Message direction" "B_0x0,B_0x1" bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "XDCNT,Data counter" line.long 0x4 "I3C_SER,I3C status error register" bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "B_0x0,B_0x1" bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 6. "DOVR,RX-FIFO overrun or TX-FIFO underrun" "B_0x0,B_0x1" bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "PERR,Protocol error" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type" rgroup.long 0x40++0x3 line.long 0x0 "I3C_RMR,I3C received message register" hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)" hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)" bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7" rgroup.long 0x50++0x7 line.long 0x0 "I3C_EVR,I3C event register" bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1" newline bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 10. "RXTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 7. "RXLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 6. "TXLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 5. "RXFNEF,RX-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 4. "TXFNFF,TX-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 1. "TXFEF,TX-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1" line.long 0x4 "I3C_IER,I3C interrupt enable register" bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RXTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXFNEIE,RX-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 4. "TXFNFIE,TX-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" wgroup.long 0x58++0x3 line.long 0x0 "I3C_CEVR,I3C clear event register" bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CRXTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" group.long 0x60++0x13 line.long 0x0 "I3C_DEVR0,I3C own device characteristics register" rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1" rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address" bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1" line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register" rbitfld.long 0x4 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register" rbitfld.long 0x8 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register" rbitfld.long 0xC 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register" rbitfld.long 0x10 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" group.long 0x90++0x7 line.long 0x0 "I3C_MAXRLR,I3C maximum read length register" bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)" line.long 0x4 "I3C_MAXWLR,I3C maximum write length register" hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)" group.long 0xA0++0xB line.long 0x0 "I3C_TIMINGR0,I3C timing register 0" hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Isup2/supC messages in number of kernel clocks cycles:" hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Isup2/supC messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during direct/private/IBI payload) in.." hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:" hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:" line.long 0x4 "I3C_TIMINGR1,I3C timing register 1" bitfld.long 0x4 28. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tsubHD_PP/sub):" "0,1" hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)" bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3" hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 s whatever I3C acts as controller or target." line.long 0x8 "I3C_TIMINGR2,I3C timing register 2" hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles" bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "B_0x0,B_0x1" bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "B_0x0,B_0x1" bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "B_0x0,B_0x1" bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data (and on the ACK/NACK phase of data byte of a legacy Isup2/supC read)" "B_0x0,B_0x1" group.long 0xC0++0x17 line.long 0x0 "I3C_BCR,I3C bus characteristics register" bitfld.long 0x0 6. "BCR6,Controller capable" "B_0x0,B_0x1" bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "B_0x0,B_0x1" bitfld.long 0x0 0. "BCR0,max data speed limitation" "B_0x0,B_0x1" line.long 0x4 "I3C_DCR,I3C device characteristics register" hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID" line.long 0x8 "I3C_GETCAPR,I3C get capability register" bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "B_0x0,B_0x1" line.long 0xC "I3C_CRCAPR,I3C controller-role capability register" bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "B_0x0,B_0x1" bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "B_0x0,B_0x1" line.long 0x10 "I3C_GETMXDSR,I3C get max data speed register" bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tsubSCO/sub)" "B_0x0,B_0x1" hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)" bitfld.long 0x10 8.--9. "FMT,GETMXDS CCC format" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register" hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID" rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1" hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID" rgroup.long 0x3F0++0xF line.long 0x0 "I3C_HWCFGR,I3C hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "NBT,number of targets whose the IBI/controller-role request can be managed in parallel by this I3C IP when acting as controller" hexmask.long.byte 0x0 12.--15. 1. "RSIZE,RX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 8.--11. 1. "TSIZE,TX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 4.--7. 1. "SSIZE,S-FIFO size in multiple of (32-bit) words." hexmask.long.byte 0x0 0.--3. 1. "CSIZE,C-FIFO size in multiple of (32-bit) words." line.long 0x4 "I3C_VERR,I3C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,I3C major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,I3C minor revision" line.long 0x8 "I3C_IPIDR,I3C identification register" hexmask.long 0x8 0.--31. 1. "ID,I3C identification" line.long 0xC "I3C_SIDR,I3C size identification register" hexmask.long 0xC 0.--31. 1. "SID,I3C address space size identification (1 Kbyte)" tree.end tree "I3C4" base ad:0x46080000 wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)" hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Isup2/supC static target address (when I3C acts as controller)" bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)" wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)" hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes" group.long 0x4++0x3 line.long 0x0 "I3C_CFGR,I3C configuration register" bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXTHRES,TX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 13. "TXFLUSH,TX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 12. "TXDMAEN,TX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "RXTHRES,RX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 9. "RXFLUSH,RX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "RXDMAEN,RX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 4. "EXITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "I3C_RDR,I3C receive data byte register" hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus." line.long 0x4 "I3C_RDWR,I3C receive data word register" hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)." wgroup.long 0x18++0x7 line.long 0x0 "I3C_TDR,I3C transmit data byte register" hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus." line.long 0x4 "I3C_TDWR,I3C transmit data word register" hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)" group.long 0x20++0x7 line.long 0x0 "I3C_IBIDR,I3C IBI payload data register" hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)." hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])." hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])." hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)." line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register" bitfld.long 0x4 16. "PRELOAD,Preload of the TX-FIFO (when I3C is configured as target)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)" rgroup.long 0x30++0x7 line.long 0x0 "I3C_SR,I3C status register" hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)" bitfld.long 0x0 18. "DIR,Message direction" "B_0x0,B_0x1" bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "XDCNT,Data counter" line.long 0x4 "I3C_SER,I3C status error register" bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "B_0x0,B_0x1" bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 6. "DOVR,RX-FIFO overrun or TX-FIFO underrun" "B_0x0,B_0x1" bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "PERR,Protocol error" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type" rgroup.long 0x40++0x3 line.long 0x0 "I3C_RMR,I3C received message register" hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)" hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)" bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7" rgroup.long 0x50++0x7 line.long 0x0 "I3C_EVR,I3C event register" bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1" newline bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 10. "RXTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 7. "RXLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 6. "TXLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 5. "RXFNEF,RX-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 4. "TXFNFF,TX-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 1. "TXFEF,TX-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1" line.long 0x4 "I3C_IER,I3C interrupt enable register" bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RXTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXFNEIE,RX-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 4. "TXFNFIE,TX-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" wgroup.long 0x58++0x3 line.long 0x0 "I3C_CEVR,I3C clear event register" bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CRXTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" group.long 0x60++0x13 line.long 0x0 "I3C_DEVR0,I3C own device characteristics register" rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1" rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address" bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1" line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register" rbitfld.long 0x4 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register" rbitfld.long 0x8 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register" rbitfld.long 0xC 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register" rbitfld.long 0x10 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" group.long 0x90++0x7 line.long 0x0 "I3C_MAXRLR,I3C maximum read length register" bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)" line.long 0x4 "I3C_MAXWLR,I3C maximum write length register" hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)" group.long 0xA0++0xB line.long 0x0 "I3C_TIMINGR0,I3C timing register 0" hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Isup2/supC messages in number of kernel clocks cycles:" hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Isup2/supC messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during direct/private/IBI payload) in.." hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:" hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:" line.long 0x4 "I3C_TIMINGR1,I3C timing register 1" bitfld.long 0x4 28. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tsubHD_PP/sub):" "0,1" hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)" bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3" hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 s whatever I3C acts as controller or target." line.long 0x8 "I3C_TIMINGR2,I3C timing register 2" hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles" bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "B_0x0,B_0x1" bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "B_0x0,B_0x1" bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "B_0x0,B_0x1" bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data (and on the ACK/NACK phase of data byte of a legacy Isup2/supC read)" "B_0x0,B_0x1" group.long 0xC0++0x17 line.long 0x0 "I3C_BCR,I3C bus characteristics register" bitfld.long 0x0 6. "BCR6,Controller capable" "B_0x0,B_0x1" bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "B_0x0,B_0x1" bitfld.long 0x0 0. "BCR0,max data speed limitation" "B_0x0,B_0x1" line.long 0x4 "I3C_DCR,I3C device characteristics register" hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID" line.long 0x8 "I3C_GETCAPR,I3C get capability register" bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "B_0x0,B_0x1" line.long 0xC "I3C_CRCAPR,I3C controller-role capability register" bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "B_0x0,B_0x1" bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "B_0x0,B_0x1" line.long 0x10 "I3C_GETMXDSR,I3C get max data speed register" bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tsubSCO/sub)" "B_0x0,B_0x1" hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)" bitfld.long 0x10 8.--9. "FMT,GETMXDS CCC format" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register" hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID" rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1" hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID" rgroup.long 0x3F0++0xF line.long 0x0 "I3C_HWCFGR,I3C hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "NBT,number of targets whose the IBI/controller-role request can be managed in parallel by this I3C IP when acting as controller" hexmask.long.byte 0x0 12.--15. 1. "RSIZE,RX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 8.--11. 1. "TSIZE,TX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 4.--7. 1. "SSIZE,S-FIFO size in multiple of (32-bit) words." hexmask.long.byte 0x0 0.--3. 1. "CSIZE,C-FIFO size in multiple of (32-bit) words." line.long 0x4 "I3C_VERR,I3C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,I3C major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,I3C minor revision" line.long 0x8 "I3C_IPIDR,I3C identification register" hexmask.long 0x8 0.--31. 1. "ID,I3C identification" line.long 0xC "I3C_SIDR,I3C size identification register" hexmask.long 0xC 0.--31. 1. "SID,I3C address space size identification (1 Kbyte)" tree.end endif sif (cpuis("*CA35")||cpuis("*CM0+")) tree "I3C4" base ad:0x46080000 wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "B_0x0,B_0x1" sif (cpuis("*CA35")) hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)" endif sif (cpuis("*CM0+")) hexmask.long.byte 0x0 27.--30. 1. "MTYPE,message type (whatever I3C is acting as controller/target)" endif hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Isup2/supC static target address (when I3C acts as controller)" bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "B_0x0,B_0x1" newline sif (cpuis("*CM0+")) hexmask.long.word 0x0 0.--15. 1. "DCNT,count of data to transfer during a read or write message in bytes (whatever I3C is acting as controller/target)" endif group.long 0x4++0x3 line.long 0x0 "I3C_CFGR,I3C configuration register" bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "B_0x0,B_0x1" sif (cpuis("*CA35")) bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "B_0x0,B_0x1" newline endif sif (cpuis("*CM0+")) bitfld.long 0x0 18. "RMODE,S-FIFO enable / status receive mode (when I3C is acting as controller)" "B_0x0,B_0x1" endif bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXTHRES,TX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 13. "TXFLUSH,TX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 12. "TXDMAEN,TX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "RXTHRES,RX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 9. "RXFLUSH,RX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 8. "RXDMAEN,RX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 4. "EXITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "B_0x0,B_0x1" sif (cpuis("*CM0+")) bitfld.long 0x0 1. "CTRLINIT,initial controller/target role" "B_0x0,B_0x1" endif bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "I3C_RDR,I3C receive data byte register" sif (cpuis("*CA35")) hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus." endif sif (cpuis("*CM0+")) hexmask.long.byte 0x0 0.--7. 1. "RXDB0,8-bit received data on I3C bus." endif line.long 0x4 "I3C_RDWR,I3C receive data word register" sif (cpuis("*CA35")) hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)." endif sif (cpuis("*CM0+")) hexmask.long.byte 0x4 24.--31. 1. "RXDB3,8-bit received data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "RXDB2,8-bit received data (next byte after RXDB1 on I3C bus)." newline hexmask.long.byte 0x4 8.--15. 1. "RXDB1,8-bit received data (next byte after RXDB0 on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "RXDB0,8-bit received data (earliest byte on I3C bus)." endif wgroup.long 0x18++0x7 line.long 0x0 "I3C_TDR,I3C transmit data byte register" sif (cpuis("*CA35")) hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus." endif sif (cpuis("*CM0+")) hexmask.long.byte 0x0 0.--7. 1. "TXDB0,8-bit data to transmit on I3C bus." endif line.long 0x4 "I3C_TDWR,I3C transmit data word register" sif (cpuis("*CA35")) hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)" endif sif (cpuis("*CM0+")) hexmask.long.byte 0x4 24.--31. 1. "TXDB3,8-bit transmit data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "TXDB2,8-bit transmit data (next byte after TXDB1[7:0] on I3C bus)." newline hexmask.long.byte 0x4 8.--15. 1. "TXDB1,8-bit transmit data (next byte after TXDB0[7:0] on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "TXDB0,8-bit transmit data (earliest byte on I3C bus)" endif group.long 0x20++0x7 line.long 0x0 "I3C_IBIDR,I3C IBI payload data register" hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)." hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])." hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])." hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)." line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register" bitfld.long 0x4 16. "PRELOAD,Preload of the TX-FIFO (when I3C is configured as target)" "B_0x0,B_0x1" sif (cpuis("*CA35")) hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)" endif sif (cpuis("*CM0+")) hexmask.long.word 0x4 0.--15. 1. "TXDCNT,transmit data counter in bytes (when I3C is configured as target)" endif rgroup.long 0x30++0x7 line.long 0x0 "I3C_SR,I3C status register" hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)" bitfld.long 0x0 18. "DIR,Message direction" "B_0x0,B_0x1" bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "B_0x0,B_0x1" sif (cpuis("*CA35")) hexmask.long.word 0x0 0.--15. 1. "XDCNT,Data counter" endif sif (cpuis("*CM0+")) hexmask.long.word 0x0 0.--15. 1. "XDATACNT,data counter" endif line.long 0x4 "I3C_SER,I3C status error register" bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "B_0x0,B_0x1" bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 6. "DOVR,RX-FIFO overrun or TX-FIFO underrun" "B_0x0,B_0x1" bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "PERR,Protocol error" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type" rgroup.long 0x50++0x7 line.long 0x0 "I3C_EVR,I3C event register" rbitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1" rbitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1" rbitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1" rbitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1" rbitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1" rbitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1" newline rbitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1" rbitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1" rbitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1" rbitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1" rbitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1" rbitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1" newline sif (cpuis("*CA35")) rbitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1" rbitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1" endif sif (cpuis("*CM0+")) rbitfld.long 0x0 18. "BCUPDF,bus control update flag (when the I3C is acting as target)" "0,1" rbitfld.long 0x0 17. "BCF,bus control request flag (when the I3C is acting as controller)" "0,1" endif rbitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1" rbitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1" newline rbitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1" rbitfld.long 0x0 10. "RXTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1" rbitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1" rbitfld.long 0x0 7. "RXLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1" rbitfld.long 0x0 6. "TXLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1" rbitfld.long 0x0 5. "RXFNEF,RX-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1" newline rbitfld.long 0x0 4. "TXFNFF,TX-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1" rbitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1" rbitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1" rbitfld.long 0x0 1. "TXFEF,TX-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1" rbitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1" line.long 0x4 "I3C_IER,I3C interrupt enable register" rbitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" rbitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" rbitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" rbitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" rbitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" rbitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" newline rbitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" rbitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" rbitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" rbitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" rbitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" rbitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline sif (cpuis("*CA35")) rbitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" rbitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" endif sif (cpuis("*CM0+")) rbitfld.long 0x4 18. "BCUPDIE,bus control update interrupt enable (when the I3C is acting as target)" "B_0x0,B_0x1" rbitfld.long 0x4 17. "BCIE,bus control request interrupt enable (when the I3C is acting as controller)" "B_0x0,B_0x1" endif rbitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" rbitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline rbitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" rbitfld.long 0x4 10. "RXTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" rbitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" rbitfld.long 0x4 5. "RXFNEIE,RX-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" rbitfld.long 0x4 4. "TXFNFIE,TX-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" rbitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" newline rbitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" wgroup.long 0x58++0x3 line.long 0x0 "I3C_CEVR,I3C clear event register" bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline sif (cpuis("*CA35")) bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "B_0x0,B_0x1" endif sif (cpuis("*CM0+")) bitfld.long 0x0 18. "CBCUPDF,clear bus control update flag (when the I3C is acting as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CBCF,clear bus control request flag (when the I3C is acting as controller)" "B_0x0,B_0x1" endif bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CRXTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" group.long 0x60++0x13 line.long 0x0 "I3C_DEVR0,I3C own device characteristics register" rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1" rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "B_0x0,B_0x1" sif (cpuis("*CA35")) bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "B_0x0,B_0x1" endif sif (cpuis("*CM0+")) bitfld.long 0x0 17. "BCEN,bus control request enable (when the I3C is acting as target)" "B_0x0,B_0x1" newline endif bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "B_0x0,B_0x1" hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address" bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1" line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register" rbitfld.long 0x4 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" sif (cpuis("*CA35")) bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" endif sif (cpuis("*CM0+")) bitfld.long 0x4 17. "BCACK,bus control request acknowledge (when the I3C is acting as controller)" "B_0x0,B_0x1" endif bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register" rbitfld.long 0x8 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" sif (cpuis("*CA35")) bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" endif sif (cpuis("*CM0+")) bitfld.long 0x8 17. "BCACK,bus control request acknowledge (when the I3C is acting as controller)" "B_0x0,B_0x1" endif bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" newline hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register" rbitfld.long 0xC 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" sif (cpuis("*CA35")) bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" endif sif (cpuis("*CM0+")) bitfld.long 0xC 17. "BCACK,bus control request acknowledge (when the I3C is acting as controller)" "B_0x0,B_0x1" endif bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" newline hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register" rbitfld.long 0x10 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" sif (cpuis("*CA35")) bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" endif sif (cpuis("*CM0+")) bitfld.long 0x10 17. "BCACK,bus control request acknowledge (when the I3C is acting as controller)" "B_0x0,B_0x1" endif bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" newline hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" group.long 0x90++0x7 line.long 0x0 "I3C_MAXRLR,I3C maximum read length register" bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)" line.long 0x4 "I3C_MAXWLR,I3C maximum write length register" hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)" group.long 0xA0++0xB line.long 0x0 "I3C_TIMINGR0,I3C timing register 0" hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Isup2/supC messages in number of kernel clocks cycles:" hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Isup2/supC messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during direct/private/IBI payload) in.." hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:" hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:" line.long 0x4 "I3C_TIMINGR1,I3C timing register 1" sif (cpuis("*CA35")) bitfld.long 0x4 28. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tsubHD_PP/sub):" "0,1" bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3" endif sif (cpuis("*CM0+")) bitfld.long 0x4 28. "SDA_HD,SDA hold time (when the I3C is acting as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tHD_PP):" "B_0x0,B_0x1" endif hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)" sif (cpuis("*CM0+")) bitfld.long 0x4 8.--9. "AM,activity state of the new master (when I3C is acting as controller)" "0,1,2,3" endif hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 s whatever I3C acts as controller or target." line.long 0x8 "I3C_TIMINGR2,I3C timing register 2" hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles" bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "B_0x0,B_0x1" sif (cpuis("*CA35")) bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "B_0x0,B_0x1" bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "B_0x0,B_0x1" bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data (and on the ACK/NACK phase of data byte of a legacy Isup2/supC read)" "B_0x0,B_0x1" endif sif (cpuis("*CM0+")) bitfld.long 0x8 2. "STALLC,controller clock stall on PAR phase of CCC enable" "0,1" newline bitfld.long 0x8 1. "STALLD,controller clock stall on PAR phase of Data enable" "0,1" endif group.long 0xC0++0xB line.long 0x0 "I3C_BCR,I3C bus characteristics register" bitfld.long 0x0 6. "BCR6,Controller capable" "B_0x0,B_0x1" bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "B_0x0,B_0x1" bitfld.long 0x0 0. "BCR0,max data speed limitation" "B_0x0,B_0x1" line.long 0x4 "I3C_DCR,I3C device characteristics register" sif (cpuis("*CA35")) hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID" endif sif (cpuis("*CM0+")) hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID" endif line.long 0x8 "I3C_GETCAPR,I3C get capability register" bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "B_0x0,B_0x1" group.long 0xD0++0x7 line.long 0x0 "I3C_GETMXDSR,I3C get max data speed register" sif (cpuis("*CA35")) bitfld.long 0x0 24. "TSCO,clock-to-data turnaround time (tsubSCO/sub)" "B_0x0,B_0x1" endif hexmask.long.byte 0x0 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)" bitfld.long 0x0 8.--9. "FMT,GETMXDS CCC format" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "HOFFAS,Controller hand-off activity state" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "I3C_EPIDR,I3C extended provisioned ID register" hexmask.long.word 0x4 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID" rbitfld.long 0x4 16. "IDTSEL,provisioned ID type selector" "0,1" hexmask.long.byte 0x4 12.--15. 1. "MIPIID,4-bit MIPI Instance ID" rgroup.long 0x3F0++0xF line.long 0x0 "I3C_HWCFGR,I3C hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "NBT,number of targets whose the IBI/controller-role request can be managed in parallel by this I3C IP when acting as controller" hexmask.long.byte 0x0 12.--15. 1. "RSIZE,RX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 8.--11. 1. "TSIZE,TX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 4.--7. 1. "SSIZE,S-FIFO size in multiple of (32-bit) words." hexmask.long.byte 0x0 0.--3. 1. "CSIZE,C-FIFO size in multiple of (32-bit) words." line.long 0x4 "I3C_VERR,I3C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,I3C major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,I3C minor revision" line.long 0x8 "I3C_IPIDR,I3C identification register" hexmask.long 0x8 0.--31. 1. "ID,I3C identification" line.long 0xC "I3C_SIDR,I3C size identification register" hexmask.long 0xC 0.--31. 1. "SID,I3C address space size identification (1 Kbyte)" sif (cpuis("*CA35")) wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)" newline hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes" rgroup.long 0x40++0x3 line.long 0x0 "I3C_RMR,I3C received message register" hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)" hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)" newline bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7" group.long 0xCC++0x3 line.long 0x0 "I3C_CRCAPR,I3C controller-role capability register" bitfld.long 0x0 9. "CAPGRP,group management support (when acting as controller)" "B_0x0,B_0x1" bitfld.long 0x0 3. "CAPDHOFF,delayed controller-role hand-off" "B_0x0,B_0x1" endif sif (cpuis("*CM0+")) wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR,I3C message control register" bitfld.long 0x0 31. "MEND,message end type (when the I3C is acting as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / I2C static target address (when I3C is acting as controller)" newline bitfld.long 0x0 16. "RNW,read / non-write message (when I3C is acting as controller)" "B_0x0,B_0x1" endif sif (cpuis("*CM0+")) group.long 0x10++0x3 line.long 0x0 "I3C_RDR,I3C receive data byte register" endif sif (cpuis("*CM0+")) group.long 0x14++0x3 line.long 0x0 "I3C_RDWR,I3C receive data word register" endif sif (cpuis("*CM0+")) group.long 0x18++0x3 line.long 0x0 "I3C_TDR,I3C transmit data byte register" endif sif (cpuis("*CM0+")) group.long 0x1C++0x3 line.long 0x0 "I3C_TDWR,I3C transmit data word register" endif sif (cpuis("*CM0+")) rgroup.long 0x30++0x3 line.long 0x0 "I3C_SR,I3C status register" hexmask.long.byte 0x0 24.--31. 1. "MID,message identifier/counter of a given frame (when the I3C is acting as controller)" bitfld.long 0x0 18. "DIR,message direction" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "ABT,a private read message is completed/aborted prematurely by the target (when the I3C is acting as controller)" "B_0x0,B_0x1" endif sif (cpuis("*CM0+")) rgroup.long 0x34++0x3 line.long 0x0 "I3C_SER,I3C status error register" bitfld.long 0x0 10. "DERR,data error (when the I3C is acting as controller)" "B_0x0,B_0x1" bitfld.long 0x0 9. "DNACK,data not acknowledged (when the I3C is acting as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "ANACK,address not acknowledged (when the I3C is configured as controller)" "B_0x0,B_0x1" bitfld.long 0x0 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C is acting as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "DOVR,RX-FIFO overrun or TX-FIFO underrun" "B_0x0,B_0x1" bitfld.long 0x0 5. "STALL,SCL stall error (when the I3C is acting as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "PERR,protocol error" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--3. 1. "CODERR,protocol error code/type" rgroup.long 0x40++0x3 line.long 0x0 "I3C_RXMR,I3C received message register" hexmask.long.byte 0x0 17.--23. 1. "RXADD,received target address (when the I3C is configured as controller)" hexmask.long.byte 0x0 8.--15. 1. "RXCODE,received CCC code (when the I3C is configured as target)" newline bitfld.long 0x0 0.--2. "IBIRXDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7" endif sif (cpuis("*CM0+")) rgroup.long 0x50++0x3 line.long 0x0 "I3C_EVR,I3C event register" bitfld.long 0x0 31. "GRPF,group addressing flag (when the I3C is acting as target)" "0,1" bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C is acting as target)" "0,1" newline bitfld.long 0x0 29. "INTUPDF,interrupt/bus control/hot-join update flag (when the I3C is acting as target)" "0,1" bitfld.long 0x0 28. "ASUPDF,activity state update flag (when the I3C is acting as target)" "0,1" newline bitfld.long 0x0 27. "RSTF,reset flag (when the I3C is acting as target)" "0,1" bitfld.long 0x0 26. "MRLUPDF,maximum read length update flag (when the I3C is acting as target)" "0,1" newline bitfld.long 0x0 25. "MWLUPDF,maximum write length update flag (when the I3C is acting as target)" "0,1" bitfld.long 0x0 24. "DAUPDF,dynamic address update flag (when the I3C is acting as target)" "0,1" newline bitfld.long 0x0 23. "STAF,get status flag (when the I3C is acting as target)" "0,1" bitfld.long 0x0 22. "GETF,get flag (when the I3C is acting as target)" "0,1" newline bitfld.long 0x0 21. "WKPF,wakeup flag (when the I3C is acting as target)" "0,1" bitfld.long 0x0 19. "HJF,hot-join flag (when the I3C is acting as controller)" "0,1" newline bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C is acting as target)" "0,1" bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C is acting as controller)" "0,1" newline bitfld.long 0x0 11. "ERRF,flag (whatever the I3C is acting as controller/target)" "0,1" bitfld.long 0x0 10. "RXTGTENDF,target-initiated read end flag (when the I3C is acting as controller)" "0,1" newline bitfld.long 0x0 9. "FCF,frame complete flag (whatever the I3C is acting as controller/target)" "0,1" bitfld.long 0x0 7. "RXLASTF,last read data byte/word flag (whatever the I3C is acting as controller/target)" "0,1" newline bitfld.long 0x0 6. "TXLASTF,last written data byte/word flag (whatever the I3C is acting as controller/target)" "0,1" bitfld.long 0x0 5. "RXFNEF,RX-FIFO not empty flag (whatever the I3C is acting as controller/target)" "0,1" newline bitfld.long 0x0 4. "TXFNFF,TX-FIFO not full flag (whatever the I3C is acting as controller/target)" "0,1" bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C is acting as controller)" "0,1" newline bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C is acting as controller)" "0,1" bitfld.long 0x0 1. "TXFEF,TX-FIFO empty flag (whatever the I3C is acting as controller/target)" "0,1" newline bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C is acting as controller/target)" "0,1" endif sif (cpuis("*CM0+")) rgroup.long 0x54++0x3 line.long 0x0 "I3C_IER,I3C interrupt enable register" bitfld.long 0x0 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C is acting as target)" "B_0x0,B_0x1" bitfld.long 0x0 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C is acting as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C is acting as target)" "B_0x0,B_0x1" bitfld.long 0x0 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C is acting as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "RSTIE,reset pattern interrupt enable (when the I3C is acting as target)" "B_0x0,B_0x1" bitfld.long 0x0 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C is acting as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C is acting as target)" "B_0x0,B_0x1" bitfld.long 0x0 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C is acting as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 23. "STAIE,GETSTATUS CCC interrupt enable (when the I3C is acting as target)" "B_0x0,B_0x1" bitfld.long 0x0 22. "GETIE,GETxxx CCC interrupt enable (when the I3C is acting as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 21. "WKPIE,wakeup interrupt enable (when the I3C is acting as target)" "B_0x0,B_0x1" bitfld.long 0x0 19. "HJIE,hot-join interrupt enable (when the I3C is acting as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "IBIENDIE,IBI end interrupt enable (when the I3C is acting as target)" "B_0x0,B_0x1" bitfld.long 0x0 15. "IBIIE,IBI request interrupt enable (when the I3C is acting as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ERRIE,error interrupt enable (whatever the I3C is acting as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "RXTGTENDIE,target-initiated read end interrupt enable (when the I3C is acting as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "FCIE,frame complete interrupt enable (whatever the I3C is acting as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXFNEIE,RX-FIFO not empty interrupt enable (whatever the I3C is acting as controller/target)" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "TXFNFIE,TX-FIFO not full interrupt enable (whatever the I3C is acting as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 3. "SFNEIE,S-FIFO not empty interrupt enable (whatever the I3C is acting as controller/target)" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "CFNFIE,C-FIFO not full interrupt enable (whatever the I3C is acting as controller/target)" "B_0x0,B_0x1" endif sif (cpuis("*CM0+")) wgroup.long 0x58++0x3 line.long 0x0 "I3C_CEVR,I3C clear event register" bitfld.long 0x0 31. "CGRPF,clear DEFGRPA CCC flag (when the I3C is acting as target)" "B_0x0,B_0x1" bitfld.long 0x0 30. "CDEFF,clear DEFTGTS CCC flag (when the I3C is acting as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 29. "CINTUPDF,clear ENEC/DISEC CCC flag (when the I3C is acting as target)" "B_0x0,B_0x1" bitfld.long 0x0 28. "CASUPDF,clear ENTASx CCC flag (when the I3C is acting as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "CRSTF,clear reset pattern flag (when the I3C is acting as target)" "B_0x0,B_0x1" bitfld.long 0x0 26. "CMRLUPDF,clear SETMRL CCC flag (when the I3C is acting as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "CMWLUPDF,clear SETMWL CCC flag (when the I3C is acting as target)" "B_0x0,B_0x1" bitfld.long 0x0 24. "CDAUPDF,clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C is acting as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 23. "CSTAF,clear GETSTATUS CCC flag (when the I3C is acting as target)" "B_0x0,B_0x1" bitfld.long 0x0 22. "CGETF,clear GETxxx CCC flag (when the I3C is acting as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 21. "CWKPF,clear wakeup flag (when the I3C is acting as target)" "B_0x0,B_0x1" bitfld.long 0x0 19. "CHJF,clear hot-join flag (when the I3C is acting as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "CIBIENDF,clear IBI end flag (when the I3C is acting as target)" "B_0x0,B_0x1" bitfld.long 0x0 15. "CIBIF,clear IBI request flag (when the I3C is acting as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "CERRF,clear error flag (whatever the I3C is acting as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CRXTGTENDF,clear target-initiated read end flag (when the I3C is acting as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "CFCF,clear frame complete flag (whatever the I3C is acting as controller/target)" "B_0x0,B_0x1" group.long 0xCC++0x3 line.long 0x0 "I3C_CTRLCAPR,I3C controller capability register" bitfld.long 0x0 9. "CAPGRP,group management support (when acting as controller)" "B_0x0,B_0x1" bitfld.long 0x0 3. "CAPDHOFF,delayed bus control hand-off" "B_0x0,B_0x1" endif sif (cpuis("*CM0+")) rgroup.long 0x3F0++0x3 line.long 0x0 "I3C_HWCFGR,I3C hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "NBT,number of targets whose the IBI/bus control request can be managed in parallel by this I3C IP when acting as controller" hexmask.long.byte 0x0 12.--15. 1. "RSIZE,RX-FIFO size in multiple of 4 bytes." newline hexmask.long.byte 0x0 8.--11. 1. "TSIZE,TX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 4.--7. 1. "SSIZE,S-FIFO size in multiple of (32-bit) words." newline hexmask.long.byte 0x0 0.--3. 1. "CSIZE,C-FIFO size in multiple of (32-bit) words." endif sif (cpuis("*CM0+")) rgroup.long 0x3F4++0x3 line.long 0x0 "I3C_VERR,I3C version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,major IP revision" hexmask.long.byte 0x0 0.--3. 1. "MINREV,minor IP revision" endif sif (cpuis("*CM0+")) rgroup.long 0x3F8++0x3 line.long 0x0 "I3C_IPIDR,I3C IP identification register" hexmask.long 0x0 0.--31. 1. "ID,IP identification" endif sif (cpuis("*CM0+")) rgroup.long 0x3FC++0x3 line.long 0x0 "I3C_SIDR,I3C IP size identification register" hexmask.long 0x0 0.--31. 1. "SID,IP address space size identification" endif tree.end endif sif (cpuis("*CM33F")) tree "I3C1_S" base ad:0x50190000 wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)" hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Isup2/supC static target address (when I3C acts as controller)" bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)" wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)" hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes" group.long 0x4++0x3 line.long 0x0 "I3C_CFGR,I3C configuration register" bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXTHRES,TX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 13. "TXFLUSH,TX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 12. "TXDMAEN,TX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "RXTHRES,RX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 9. "RXFLUSH,RX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "RXDMAEN,RX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 4. "EXITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "I3C_RDR,I3C receive data byte register" hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus." line.long 0x4 "I3C_RDWR,I3C receive data word register" hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)." wgroup.long 0x18++0x7 line.long 0x0 "I3C_TDR,I3C transmit data byte register" hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus." line.long 0x4 "I3C_TDWR,I3C transmit data word register" hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)" group.long 0x20++0x7 line.long 0x0 "I3C_IBIDR,I3C IBI payload data register" hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)." hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])." hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])." hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)." line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register" bitfld.long 0x4 16. "PRELOAD,Preload of the TX-FIFO (when I3C is configured as target)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)" rgroup.long 0x30++0x7 line.long 0x0 "I3C_SR,I3C status register" hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)" bitfld.long 0x0 18. "DIR,Message direction" "B_0x0,B_0x1" bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "XDCNT,Data counter" line.long 0x4 "I3C_SER,I3C status error register" bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "B_0x0,B_0x1" bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 6. "DOVR,RX-FIFO overrun or TX-FIFO underrun" "B_0x0,B_0x1" bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "PERR,Protocol error" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type" rgroup.long 0x40++0x3 line.long 0x0 "I3C_RMR,I3C received message register" hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)" hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)" bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7" rgroup.long 0x50++0x7 line.long 0x0 "I3C_EVR,I3C event register" bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1" newline bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 10. "RXTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 7. "RXLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 6. "TXLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 5. "RXFNEF,RX-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 4. "TXFNFF,TX-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 1. "TXFEF,TX-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1" line.long 0x4 "I3C_IER,I3C interrupt enable register" bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RXTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXFNEIE,RX-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 4. "TXFNFIE,TX-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" wgroup.long 0x58++0x3 line.long 0x0 "I3C_CEVR,I3C clear event register" bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CRXTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" group.long 0x60++0x13 line.long 0x0 "I3C_DEVR0,I3C own device characteristics register" rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1" rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address" bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1" line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register" rbitfld.long 0x4 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register" rbitfld.long 0x8 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register" rbitfld.long 0xC 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register" rbitfld.long 0x10 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" group.long 0x90++0x7 line.long 0x0 "I3C_MAXRLR,I3C maximum read length register" bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)" line.long 0x4 "I3C_MAXWLR,I3C maximum write length register" hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)" group.long 0xA0++0xB line.long 0x0 "I3C_TIMINGR0,I3C timing register 0" hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Isup2/supC messages in number of kernel clocks cycles:" hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Isup2/supC messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during direct/private/IBI payload) in.." hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:" hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:" line.long 0x4 "I3C_TIMINGR1,I3C timing register 1" bitfld.long 0x4 28. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tsubHD_PP/sub):" "0,1" hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)" bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3" hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 s whatever I3C acts as controller or target." line.long 0x8 "I3C_TIMINGR2,I3C timing register 2" hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles" bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "B_0x0,B_0x1" bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "B_0x0,B_0x1" bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "B_0x0,B_0x1" bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data (and on the ACK/NACK phase of data byte of a legacy Isup2/supC read)" "B_0x0,B_0x1" group.long 0xC0++0x17 line.long 0x0 "I3C_BCR,I3C bus characteristics register" bitfld.long 0x0 6. "BCR6,Controller capable" "B_0x0,B_0x1" bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "B_0x0,B_0x1" bitfld.long 0x0 0. "BCR0,max data speed limitation" "B_0x0,B_0x1" line.long 0x4 "I3C_DCR,I3C device characteristics register" hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID" line.long 0x8 "I3C_GETCAPR,I3C get capability register" bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "B_0x0,B_0x1" line.long 0xC "I3C_CRCAPR,I3C controller-role capability register" bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "B_0x0,B_0x1" bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "B_0x0,B_0x1" line.long 0x10 "I3C_GETMXDSR,I3C get max data speed register" bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tsubSCO/sub)" "B_0x0,B_0x1" hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)" bitfld.long 0x10 8.--9. "FMT,GETMXDS CCC format" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register" hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID" rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1" hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID" rgroup.long 0x3F0++0xF line.long 0x0 "I3C_HWCFGR,I3C hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "NBT,number of targets whose the IBI/controller-role request can be managed in parallel by this I3C IP when acting as controller" hexmask.long.byte 0x0 12.--15. 1. "RSIZE,RX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 8.--11. 1. "TSIZE,TX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 4.--7. 1. "SSIZE,S-FIFO size in multiple of (32-bit) words." hexmask.long.byte 0x0 0.--3. 1. "CSIZE,C-FIFO size in multiple of (32-bit) words." line.long 0x4 "I3C_VERR,I3C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,I3C major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,I3C minor revision" line.long 0x8 "I3C_IPIDR,I3C identification register" hexmask.long 0x8 0.--31. 1. "ID,I3C identification" line.long 0xC "I3C_SIDR,I3C size identification register" hexmask.long 0xC 0.--31. 1. "SID,I3C address space size identification (1 Kbyte)" tree.end tree "I3C2_S" base ad:0x501A0000 wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)" hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Isup2/supC static target address (when I3C acts as controller)" bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)" wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)" hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes" group.long 0x4++0x3 line.long 0x0 "I3C_CFGR,I3C configuration register" bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXTHRES,TX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 13. "TXFLUSH,TX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 12. "TXDMAEN,TX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "RXTHRES,RX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 9. "RXFLUSH,RX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "RXDMAEN,RX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 4. "EXITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "I3C_RDR,I3C receive data byte register" hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus." line.long 0x4 "I3C_RDWR,I3C receive data word register" hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)." wgroup.long 0x18++0x7 line.long 0x0 "I3C_TDR,I3C transmit data byte register" hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus." line.long 0x4 "I3C_TDWR,I3C transmit data word register" hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)" group.long 0x20++0x7 line.long 0x0 "I3C_IBIDR,I3C IBI payload data register" hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)." hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])." hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])." hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)." line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register" bitfld.long 0x4 16. "PRELOAD,Preload of the TX-FIFO (when I3C is configured as target)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)" rgroup.long 0x30++0x7 line.long 0x0 "I3C_SR,I3C status register" hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)" bitfld.long 0x0 18. "DIR,Message direction" "B_0x0,B_0x1" bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "XDCNT,Data counter" line.long 0x4 "I3C_SER,I3C status error register" bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "B_0x0,B_0x1" bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 6. "DOVR,RX-FIFO overrun or TX-FIFO underrun" "B_0x0,B_0x1" bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "PERR,Protocol error" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type" rgroup.long 0x40++0x3 line.long 0x0 "I3C_RMR,I3C received message register" hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)" hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)" bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7" rgroup.long 0x50++0x7 line.long 0x0 "I3C_EVR,I3C event register" bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1" newline bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 10. "RXTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 7. "RXLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 6. "TXLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 5. "RXFNEF,RX-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 4. "TXFNFF,TX-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 1. "TXFEF,TX-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1" line.long 0x4 "I3C_IER,I3C interrupt enable register" bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RXTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXFNEIE,RX-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 4. "TXFNFIE,TX-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" wgroup.long 0x58++0x3 line.long 0x0 "I3C_CEVR,I3C clear event register" bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CRXTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" group.long 0x60++0x13 line.long 0x0 "I3C_DEVR0,I3C own device characteristics register" rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1" rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address" bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1" line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register" rbitfld.long 0x4 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register" rbitfld.long 0x8 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register" rbitfld.long 0xC 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register" rbitfld.long 0x10 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" group.long 0x90++0x7 line.long 0x0 "I3C_MAXRLR,I3C maximum read length register" bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)" line.long 0x4 "I3C_MAXWLR,I3C maximum write length register" hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)" group.long 0xA0++0xB line.long 0x0 "I3C_TIMINGR0,I3C timing register 0" hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Isup2/supC messages in number of kernel clocks cycles:" hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Isup2/supC messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during direct/private/IBI payload) in.." hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:" hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:" line.long 0x4 "I3C_TIMINGR1,I3C timing register 1" bitfld.long 0x4 28. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tsubHD_PP/sub):" "0,1" hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)" bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3" hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 s whatever I3C acts as controller or target." line.long 0x8 "I3C_TIMINGR2,I3C timing register 2" hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles" bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "B_0x0,B_0x1" bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "B_0x0,B_0x1" bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "B_0x0,B_0x1" bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data (and on the ACK/NACK phase of data byte of a legacy Isup2/supC read)" "B_0x0,B_0x1" group.long 0xC0++0x17 line.long 0x0 "I3C_BCR,I3C bus characteristics register" bitfld.long 0x0 6. "BCR6,Controller capable" "B_0x0,B_0x1" bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "B_0x0,B_0x1" bitfld.long 0x0 0. "BCR0,max data speed limitation" "B_0x0,B_0x1" line.long 0x4 "I3C_DCR,I3C device characteristics register" hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID" line.long 0x8 "I3C_GETCAPR,I3C get capability register" bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "B_0x0,B_0x1" line.long 0xC "I3C_CRCAPR,I3C controller-role capability register" bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "B_0x0,B_0x1" bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "B_0x0,B_0x1" line.long 0x10 "I3C_GETMXDSR,I3C get max data speed register" bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tsubSCO/sub)" "B_0x0,B_0x1" hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)" bitfld.long 0x10 8.--9. "FMT,GETMXDS CCC format" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register" hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID" rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1" hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID" rgroup.long 0x3F0++0xF line.long 0x0 "I3C_HWCFGR,I3C hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "NBT,number of targets whose the IBI/controller-role request can be managed in parallel by this I3C IP when acting as controller" hexmask.long.byte 0x0 12.--15. 1. "RSIZE,RX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 8.--11. 1. "TSIZE,TX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 4.--7. 1. "SSIZE,S-FIFO size in multiple of (32-bit) words." hexmask.long.byte 0x0 0.--3. 1. "CSIZE,C-FIFO size in multiple of (32-bit) words." line.long 0x4 "I3C_VERR,I3C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,I3C major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,I3C minor revision" line.long 0x8 "I3C_IPIDR,I3C identification register" hexmask.long 0x8 0.--31. 1. "ID,I3C identification" line.long 0xC "I3C_SIDR,I3C size identification register" hexmask.long 0xC 0.--31. 1. "SID,I3C address space size identification (1 Kbyte)" tree.end tree "I3C3_S" base ad:0x501B0000 wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)" hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Isup2/supC static target address (when I3C acts as controller)" bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)" wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)" hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes" group.long 0x4++0x3 line.long 0x0 "I3C_CFGR,I3C configuration register" bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXTHRES,TX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 13. "TXFLUSH,TX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 12. "TXDMAEN,TX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "RXTHRES,RX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 9. "RXFLUSH,RX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "RXDMAEN,RX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 4. "EXITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "I3C_RDR,I3C receive data byte register" hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus." line.long 0x4 "I3C_RDWR,I3C receive data word register" hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)." wgroup.long 0x18++0x7 line.long 0x0 "I3C_TDR,I3C transmit data byte register" hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus." line.long 0x4 "I3C_TDWR,I3C transmit data word register" hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)" group.long 0x20++0x7 line.long 0x0 "I3C_IBIDR,I3C IBI payload data register" hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)." hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])." hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])." hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)." line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register" bitfld.long 0x4 16. "PRELOAD,Preload of the TX-FIFO (when I3C is configured as target)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)" rgroup.long 0x30++0x7 line.long 0x0 "I3C_SR,I3C status register" hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)" bitfld.long 0x0 18. "DIR,Message direction" "B_0x0,B_0x1" bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "XDCNT,Data counter" line.long 0x4 "I3C_SER,I3C status error register" bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "B_0x0,B_0x1" bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 6. "DOVR,RX-FIFO overrun or TX-FIFO underrun" "B_0x0,B_0x1" bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "PERR,Protocol error" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type" rgroup.long 0x40++0x3 line.long 0x0 "I3C_RMR,I3C received message register" hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)" hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)" bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7" rgroup.long 0x50++0x7 line.long 0x0 "I3C_EVR,I3C event register" bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1" newline bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 10. "RXTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 7. "RXLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 6. "TXLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 5. "RXFNEF,RX-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 4. "TXFNFF,TX-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 1. "TXFEF,TX-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1" line.long 0x4 "I3C_IER,I3C interrupt enable register" bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RXTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXFNEIE,RX-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 4. "TXFNFIE,TX-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" wgroup.long 0x58++0x3 line.long 0x0 "I3C_CEVR,I3C clear event register" bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CRXTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" group.long 0x60++0x13 line.long 0x0 "I3C_DEVR0,I3C own device characteristics register" rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1" rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address" bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1" line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register" rbitfld.long 0x4 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register" rbitfld.long 0x8 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register" rbitfld.long 0xC 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register" rbitfld.long 0x10 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" group.long 0x90++0x7 line.long 0x0 "I3C_MAXRLR,I3C maximum read length register" bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)" line.long 0x4 "I3C_MAXWLR,I3C maximum write length register" hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)" group.long 0xA0++0xB line.long 0x0 "I3C_TIMINGR0,I3C timing register 0" hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Isup2/supC messages in number of kernel clocks cycles:" hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Isup2/supC messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during direct/private/IBI payload) in.." hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:" hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:" line.long 0x4 "I3C_TIMINGR1,I3C timing register 1" bitfld.long 0x4 28. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tsubHD_PP/sub):" "0,1" hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)" bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3" hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 s whatever I3C acts as controller or target." line.long 0x8 "I3C_TIMINGR2,I3C timing register 2" hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles" bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "B_0x0,B_0x1" bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "B_0x0,B_0x1" bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "B_0x0,B_0x1" bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data (and on the ACK/NACK phase of data byte of a legacy Isup2/supC read)" "B_0x0,B_0x1" group.long 0xC0++0x17 line.long 0x0 "I3C_BCR,I3C bus characteristics register" bitfld.long 0x0 6. "BCR6,Controller capable" "B_0x0,B_0x1" bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "B_0x0,B_0x1" bitfld.long 0x0 0. "BCR0,max data speed limitation" "B_0x0,B_0x1" line.long 0x4 "I3C_DCR,I3C device characteristics register" hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID" line.long 0x8 "I3C_GETCAPR,I3C get capability register" bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "B_0x0,B_0x1" line.long 0xC "I3C_CRCAPR,I3C controller-role capability register" bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "B_0x0,B_0x1" bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "B_0x0,B_0x1" line.long 0x10 "I3C_GETMXDSR,I3C get max data speed register" bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tsubSCO/sub)" "B_0x0,B_0x1" hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)" bitfld.long 0x10 8.--9. "FMT,GETMXDS CCC format" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register" hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID" rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1" hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID" rgroup.long 0x3F0++0xF line.long 0x0 "I3C_HWCFGR,I3C hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "NBT,number of targets whose the IBI/controller-role request can be managed in parallel by this I3C IP when acting as controller" hexmask.long.byte 0x0 12.--15. 1. "RSIZE,RX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 8.--11. 1. "TSIZE,TX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 4.--7. 1. "SSIZE,S-FIFO size in multiple of (32-bit) words." hexmask.long.byte 0x0 0.--3. 1. "CSIZE,C-FIFO size in multiple of (32-bit) words." line.long 0x4 "I3C_VERR,I3C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,I3C major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,I3C minor revision" line.long 0x8 "I3C_IPIDR,I3C identification register" hexmask.long 0x8 0.--31. 1. "ID,I3C identification" line.long 0xC "I3C_SIDR,I3C size identification register" hexmask.long 0xC 0.--31. 1. "SID,I3C address space size identification (1 Kbyte)" tree.end tree "I3C4_S" base ad:0x56080000 wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)" hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Isup2/supC static target address (when I3C acts as controller)" bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)" wgroup.long 0x0++0x3 line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register" bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)" hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)" hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes" group.long 0x4++0x3 line.long 0x0 "I3C_CFGR,I3C configuration register" bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 14. "TXTHRES,TX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 13. "TXFLUSH,TX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 12. "TXDMAEN,TX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "RXTHRES,RX-FIFO threshold (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 9. "RXFLUSH,RX-FIFO flush (whatever I3C acts as controller/target)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "RXDMAEN,RX-FIFO DMA request enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 4. "EXITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "B_0x0,B_0x1" bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "I3C_RDR,I3C receive data byte register" hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus." line.long 0x4 "I3C_RDWR,I3C receive data word register" hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)." wgroup.long 0x18++0x7 line.long 0x0 "I3C_TDR,I3C transmit data byte register" hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus." line.long 0x4 "I3C_TDWR,I3C transmit data word register" hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)." hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)." hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)." hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)" group.long 0x20++0x7 line.long 0x0 "I3C_IBIDR,I3C IBI payload data register" hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)." hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])." hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])." hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)." line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register" bitfld.long 0x4 16. "PRELOAD,Preload of the TX-FIFO (when I3C is configured as target)" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)" rgroup.long 0x30++0x7 line.long 0x0 "I3C_SR,I3C status register" hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)" bitfld.long 0x0 18. "DIR,Message direction" "B_0x0,B_0x1" bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--15. 1. "XDCNT,Data counter" line.long 0x4 "I3C_SER,I3C status error register" bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "B_0x0,B_0x1" bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 6. "DOVR,RX-FIFO overrun or TX-FIFO underrun" "B_0x0,B_0x1" bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "PERR,Protocol error" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type" rgroup.long 0x40++0x3 line.long 0x0 "I3C_RMR,I3C received message register" hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)" hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)" bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7" rgroup.long 0x50++0x7 line.long 0x0 "I3C_EVR,I3C event register" bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1" newline bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1" bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 10. "RXTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 7. "RXLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 6. "TXLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 5. "RXFNEF,RX-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 4. "TXFNFF,TX-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1" newline bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1" bitfld.long 0x0 1. "TXFEF,TX-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1" bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1" line.long 0x4 "I3C_IER,I3C interrupt enable register" bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 10. "RXTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXFNEIE,RX-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 4. "TXFNFIE,TX-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "B_0x0,B_0x1" wgroup.long 0x58++0x3 line.long 0x0 "I3C_CEVR,I3C clear event register" bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CRXTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "B_0x0,B_0x1" group.long 0x60++0x13 line.long 0x0 "I3C_DEVR0,I3C own device characteristics register" rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1" rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "B_0x0,B_0x1" bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address" bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1" line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register" rbitfld.long 0x4 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register" rbitfld.long 0x8 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register" rbitfld.long 0xC 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register" rbitfld.long 0x10 31. "DIS,DA[6:0] write disabled (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "B_0x0,B_0x1" hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)" group.long 0x90++0x7 line.long 0x0 "I3C_MAXRLR,I3C maximum read length register" bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)" line.long 0x4 "I3C_MAXWLR,I3C maximum write length register" hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)" group.long 0xA0++0xB line.long 0x0 "I3C_TIMINGR0,I3C timing register 0" hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Isup2/supC messages in number of kernel clocks cycles:" hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Isup2/supC messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during direct/private/IBI payload) in.." hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:" hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:" line.long 0x4 "I3C_TIMINGR1,I3C timing register 1" bitfld.long 0x4 28. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tsubHD_PP/sub):" "0,1" hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)" bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3" hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 s whatever I3C acts as controller or target." line.long 0x8 "I3C_TIMINGR2,I3C timing register 2" hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles" bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "B_0x0,B_0x1" bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "B_0x0,B_0x1" bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "B_0x0,B_0x1" bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data (and on the ACK/NACK phase of data byte of a legacy Isup2/supC read)" "B_0x0,B_0x1" group.long 0xC0++0x17 line.long 0x0 "I3C_BCR,I3C bus characteristics register" bitfld.long 0x0 6. "BCR6,Controller capable" "B_0x0,B_0x1" bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "B_0x0,B_0x1" bitfld.long 0x0 0. "BCR0,max data speed limitation" "B_0x0,B_0x1" line.long 0x4 "I3C_DCR,I3C device characteristics register" hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID" line.long 0x8 "I3C_GETCAPR,I3C get capability register" bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "B_0x0,B_0x1" line.long 0xC "I3C_CRCAPR,I3C controller-role capability register" bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "B_0x0,B_0x1" bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "B_0x0,B_0x1" line.long 0x10 "I3C_GETMXDSR,I3C get max data speed register" bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tsubSCO/sub)" "B_0x0,B_0x1" hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)" bitfld.long 0x10 8.--9. "FMT,GETMXDS CCC format" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register" hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID" rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1" hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID" rgroup.long 0x3F0++0xF line.long 0x0 "I3C_HWCFGR,I3C hardware configuration register" hexmask.long.byte 0x0 16.--19. 1. "NBT,number of targets whose the IBI/controller-role request can be managed in parallel by this I3C IP when acting as controller" hexmask.long.byte 0x0 12.--15. 1. "RSIZE,RX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 8.--11. 1. "TSIZE,TX-FIFO size in multiple of 4 bytes." hexmask.long.byte 0x0 4.--7. 1. "SSIZE,S-FIFO size in multiple of (32-bit) words." hexmask.long.byte 0x0 0.--3. 1. "CSIZE,C-FIFO size in multiple of (32-bit) words." line.long 0x4 "I3C_VERR,I3C version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,I3C major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,I3C minor revision" line.long 0x8 "I3C_IPIDR,I3C identification register" hexmask.long 0x8 0.--31. 1. "ID,I3C identification" line.long 0xC "I3C_SIDR,I3C size identification register" hexmask.long 0xC 0.--31. 1. "SID,I3C address space size identification (1 Kbyte)" tree.end endif tree.end sif (cpuis("*CA35")||cpuis("*CM33F")) tree "IAC (Illegal Access Controller)" base ad:0x0 tree "IAC" base ad:0x42090000 group.long 0x0++0x17 line.long 0x0 "IAC_IER0,IAC interrupt enable register 0" bitfld.long 0x0 31. "IAIE31,Illegal access interrupt enable for peripheral 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "IAIE30,Illegal access interrupt enable for peripheral 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "IAIE29,Illegal access interrupt enable for peripheral 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "IAIE28,Illegal access interrupt enable for peripheral 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "IAIE27,Illegal access interrupt enable for peripheral 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "IAIE26,Illegal access interrupt enable for peripheral 26" "B_0x0,B_0x1" bitfld.long 0x0 25. "IAIE25,Illegal access interrupt enable for peripheral 25" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "IAIE24,Illegal access interrupt enable for peripheral 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "IAIE23,Illegal access interrupt enable for peripheral 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "IAIE22,Illegal access interrupt enable for peripheral 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "IAIE21,Illegal access interrupt enable for peripheral 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "IAIE20,Illegal access interrupt enable for peripheral 20" "B_0x0,B_0x1" bitfld.long 0x0 19. "IAIE19,Illegal access interrupt enable for peripheral 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "IAIE18,Illegal access interrupt enable for peripheral 18" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "IAIE17,Illegal access interrupt enable for peripheral 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "IAIE16,Illegal access interrupt enable for peripheral 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "IAIE15,Illegal access interrupt enable for peripheral 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "IAIE14,Illegal access interrupt enable for peripheral 14" "B_0x0,B_0x1" bitfld.long 0x0 13. "IAIE13,Illegal access interrupt enable for peripheral 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "IAIE12,Illegal access interrupt enable for peripheral 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "IAIE11,Illegal access interrupt enable for peripheral 11" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "IAIE10,Illegal access interrupt enable for peripheral 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "IAIE9,Illegal access interrupt enable for peripheral 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "IAIE8,Illegal access interrupt enable for peripheral 8" "B_0x0,B_0x1" bitfld.long 0x0 7. "IAIE7,Illegal access interrupt enable for peripheral 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "IAIE6,Illegal access interrupt enable for peripheral 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "IAIE5,Illegal access interrupt enable for peripheral 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAIE4,Illegal access interrupt enable for peripheral 4" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "IAIE3,Illegal access interrupt enable for peripheral 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "IAIE2,Illegal access interrupt enable for peripheral 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "IAIE1,Illegal access interrupt enable for peripheral 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "IAIE0,Illegal access interrupt enable for peripheral 0" "B_0x0,B_0x1" line.long 0x4 "IAC_IER1,IAC interrupt enable register 1" bitfld.long 0x4 31. "IAIE63,Illegal access interrupt enable for peripheral 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "IAIE62,Illegal access interrupt enable for peripheral 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "IAIE61,Illegal access interrupt enable for peripheral 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "IAIE60,Illegal access interrupt enable for peripheral 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "IAIE59,Illegal access interrupt enable for peripheral 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "IAIE58,Illegal access interrupt enable for peripheral 58" "B_0x0,B_0x1" bitfld.long 0x4 25. "IAIE57,Illegal access interrupt enable for peripheral 57" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "IAIE56,Illegal access interrupt enable for peripheral 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "IAIE55,Illegal access interrupt enable for peripheral 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "IAIE54,Illegal access interrupt enable for peripheral 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "IAIE53,Illegal access interrupt enable for peripheral 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "IAIE52,Illegal access interrupt enable for peripheral 52" "B_0x0,B_0x1" bitfld.long 0x4 19. "IAIE51,Illegal access interrupt enable for peripheral 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "IAIE50,Illegal access interrupt enable for peripheral 50" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "IAIE49,Illegal access interrupt enable for peripheral 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "IAIE48,Illegal access interrupt enable for peripheral 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "IAIE47,Illegal access interrupt enable for peripheral 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "IAIE46,Illegal access interrupt enable for peripheral 46" "B_0x0,B_0x1" bitfld.long 0x4 13. "IAIE45,Illegal access interrupt enable for peripheral 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "IAIE44,Illegal access interrupt enable for peripheral 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "IAIE43,Illegal access interrupt enable for peripheral 43" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "IAIE42,Illegal access interrupt enable for peripheral 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "IAIE41,Illegal access interrupt enable for peripheral 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "IAIE40,Illegal access interrupt enable for peripheral 40" "B_0x0,B_0x1" bitfld.long 0x4 7. "IAIE39,Illegal access interrupt enable for peripheral 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "IAIE38,Illegal access interrupt enable for peripheral 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "IAIE37,Illegal access interrupt enable for peripheral 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "IAIE36,Illegal access interrupt enable for peripheral 36" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "IAIE35,Illegal access interrupt enable for peripheral 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "IAIE34,Illegal access interrupt enable for peripheral 34" "B_0x0,B_0x1" bitfld.long 0x4 1. "IAIE33,Illegal access interrupt enable for peripheral 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "IAIE32,Illegal access interrupt enable for peripheral 32" "B_0x0,B_0x1" line.long 0x8 "IAC_IER2,IAC interrupt enable register 2" bitfld.long 0x8 31. "IAIE95,Illegal access interrupt enable for peripheral 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "IAIE94,Illegal access interrupt enable for peripheral 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "IAIE93,Illegal access interrupt enable for peripheral 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "IAIE92,Illegal access interrupt enable for peripheral 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "IAIE91,Illegal access interrupt enable for peripheral 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "IAIE90,Illegal access interrupt enable for peripheral 90" "B_0x0,B_0x1" bitfld.long 0x8 25. "IAIE89,Illegal access interrupt enable for peripheral 89" "B_0x0,B_0x1" newline bitfld.long 0x8 24. "IAIE88,Illegal access interrupt enable for peripheral 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "IAIE87,Illegal access interrupt enable for peripheral 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "IAIE86,Illegal access interrupt enable for peripheral 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "IAIE85,Illegal access interrupt enable for peripheral 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "IAIE84,Illegal access interrupt enable for peripheral 84" "B_0x0,B_0x1" bitfld.long 0x8 19. "IAIE83,Illegal access interrupt enable for peripheral 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "IAIE82,Illegal access interrupt enable for peripheral 82" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "IAIE81,Illegal access interrupt enable for peripheral 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "IAIE80,Illegal access interrupt enable for peripheral 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "IAIE79,Illegal access interrupt enable for peripheral 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "IAIE78,Illegal access interrupt enable for peripheral 78" "B_0x0,B_0x1" bitfld.long 0x8 13. "IAIE77,Illegal access interrupt enable for peripheral 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "IAIE76,Illegal access interrupt enable for peripheral 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "IAIE75,Illegal access interrupt enable for peripheral 75" "B_0x0,B_0x1" newline bitfld.long 0x8 10. "IAIE74,Illegal access interrupt enable for peripheral 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "IAIE73,Illegal access interrupt enable for peripheral 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "IAIE72,Illegal access interrupt enable for peripheral 72" "B_0x0,B_0x1" bitfld.long 0x8 7. "IAIE71,Illegal access interrupt enable for peripheral 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "IAIE70,Illegal access interrupt enable for peripheral 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "IAIE69,Illegal access interrupt enable for peripheral 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "IAIE68,Illegal access interrupt enable for peripheral 68" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "IAIE67,Illegal access interrupt enable for peripheral 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "IAIE66,Illegal access interrupt enable for peripheral 66" "B_0x0,B_0x1" bitfld.long 0x8 1. "IAIE65,Illegal access interrupt enable for peripheral 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "IAIE64,Illegal access interrupt enable for peripheral 64" "B_0x0,B_0x1" line.long 0xC "IAC_IER3,IAC interrupt enable register 3" bitfld.long 0xC 31. "IAIE127,Illegal access interrupt enable for peripheral 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "IAIE126,Illegal access interrupt enable for peripheral 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "IAIE125,Illegal access interrupt enable for peripheral 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "IAIE124,Illegal access interrupt enable for peripheral 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "IAIE123,Illegal access interrupt enable for peripheral 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "IAIE122,Illegal access interrupt enable for peripheral 122" "B_0x0,B_0x1" bitfld.long 0xC 25. "IAIE121,Illegal access interrupt enable for peripheral 121" "B_0x0,B_0x1" newline bitfld.long 0xC 24. "IAIE120,Illegal access interrupt enable for peripheral 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "IAIE119,Illegal access interrupt enable for peripheral 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "IAIE118,Illegal access interrupt enable for peripheral 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "IAIE117,Illegal access interrupt enable for peripheral 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "IAIE116,Illegal access interrupt enable for peripheral 116" "B_0x0,B_0x1" bitfld.long 0xC 19. "IAIE115,Illegal access interrupt enable for peripheral 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "IAIE114,Illegal access interrupt enable for peripheral 114" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "IAIE113,Illegal access interrupt enable for peripheral 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "IAIE112,Illegal access interrupt enable for peripheral 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "IAIE111,Illegal access interrupt enable for peripheral 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "IAIE110,Illegal access interrupt enable for peripheral 110" "B_0x0,B_0x1" bitfld.long 0xC 13. "IAIE109,Illegal access interrupt enable for peripheral 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "IAIE108,Illegal access interrupt enable for peripheral 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "IAIE107,Illegal access interrupt enable for peripheral 107" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "IAIE106,Illegal access interrupt enable for peripheral 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "IAIE105,Illegal access interrupt enable for peripheral 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "IAIE104,Illegal access interrupt enable for peripheral 104" "B_0x0,B_0x1" bitfld.long 0xC 7. "IAIE103,Illegal access interrupt enable for peripheral 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "IAIE102,Illegal access interrupt enable for peripheral 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "IAIE101,Illegal access interrupt enable for peripheral 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "IAIE100,Illegal access interrupt enable for peripheral 100" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "IAIE99,Illegal access interrupt enable for peripheral 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "IAIE98,Illegal access interrupt enable for peripheral 98" "B_0x0,B_0x1" bitfld.long 0xC 1. "IAIE97,Illegal access interrupt enable for peripheral 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "IAIE96,Illegal access interrupt enable for peripheral 96" "B_0x0,B_0x1" line.long 0x10 "IAC_IER4,IAC interrupt enable register 4" bitfld.long 0x10 31. "IAIE159,Illegal access interrupt enable for peripheral 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "IAIE158,Illegal access interrupt enable for peripheral 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "IAIE157,Illegal access interrupt enable for peripheral 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "IAIE156,Illegal access interrupt enable for peripheral 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "IAIE155,Illegal access interrupt enable for peripheral 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "IAIE154,Illegal access interrupt enable for peripheral 154" "B_0x0,B_0x1" bitfld.long 0x10 25. "IAIE153,Illegal access interrupt enable for peripheral 153" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "IAIE152,Illegal access interrupt enable for peripheral 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "IAIE151,Illegal access interrupt enable for peripheral 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "IAIE150,Illegal access interrupt enable for peripheral 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "IAIE149,Illegal access interrupt enable for peripheral 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "IAIE148,Illegal access interrupt enable for peripheral 148" "B_0x0,B_0x1" bitfld.long 0x10 19. "IAIE147,Illegal access interrupt enable for peripheral 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "IAIE146,Illegal access interrupt enable for peripheral 146" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "IAIE145,Illegal access interrupt enable for peripheral 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "IAIE144,Illegal access interrupt enable for peripheral 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "IAIE143,Illegal access interrupt enable for peripheral 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "IAIE142,Illegal access interrupt enable for peripheral 142" "B_0x0,B_0x1" bitfld.long 0x10 13. "IAIE141,Illegal access interrupt enable for peripheral 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "IAIE140,Illegal access interrupt enable for peripheral 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "IAIE139,Illegal access interrupt enable for peripheral 139" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "IAIE138,Illegal access interrupt enable for peripheral 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "IAIE137,Illegal access interrupt enable for peripheral 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "IAIE136,Illegal access interrupt enable for peripheral 136" "B_0x0,B_0x1" bitfld.long 0x10 7. "IAIE135,Illegal access interrupt enable for peripheral 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "IAIE134,Illegal access interrupt enable for peripheral 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "IAIE133,Illegal access interrupt enable for peripheral 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "IAIE132,Illegal access interrupt enable for peripheral 132" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "IAIE131,Illegal access interrupt enable for peripheral 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "IAIE130,Illegal access interrupt enable for peripheral 130" "B_0x0,B_0x1" bitfld.long 0x10 1. "IAIE129,Illegal access interrupt enable for peripheral 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "IAIE128,Illegal access interrupt enable for peripheral 128" "B_0x0,B_0x1" line.long 0x14 "IAC_IER5,IAC interrupt enable register 5" bitfld.long 0x14 31. "IAIE191,Illegal access interrupt enable for peripheral 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "IAIE190,Illegal access interrupt enable for peripheral 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "IAIE189,Illegal access interrupt enable for peripheral 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "IAIE188,Illegal access interrupt enable for peripheral 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "IAIE187,Illegal access interrupt enable for peripheral 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "IAIE186,Illegal access interrupt enable for peripheral 186" "B_0x0,B_0x1" bitfld.long 0x14 25. "IAIE185,Illegal access interrupt enable for peripheral 185" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "IAIE184,Illegal access interrupt enable for peripheral 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "IAIE183,Illegal access interrupt enable for peripheral 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "IAIE182,Illegal access interrupt enable for peripheral 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "IAIE181,Illegal access interrupt enable for peripheral 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "IAIE180,Illegal access interrupt enable for peripheral 180" "B_0x0,B_0x1" bitfld.long 0x14 19. "IAIE179,Illegal access interrupt enable for peripheral 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "IAIE178,Illegal access interrupt enable for peripheral 178" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "IAIE177,Illegal access interrupt enable for peripheral 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "IAIE176,Illegal access interrupt enable for peripheral 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "IAIE175,Illegal access interrupt enable for peripheral 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "IAIE174,Illegal access interrupt enable for peripheral 174" "B_0x0,B_0x1" bitfld.long 0x14 13. "IAIE173,Illegal access interrupt enable for peripheral 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "IAIE172,Illegal access interrupt enable for peripheral 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "IAIE171,Illegal access interrupt enable for peripheral 171" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "IAIE170,Illegal access interrupt enable for peripheral 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "IAIE169,Illegal access interrupt enable for peripheral 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "IAIE168,Illegal access interrupt enable for peripheral 168" "B_0x0,B_0x1" bitfld.long 0x14 7. "IAIE167,Illegal access interrupt enable for peripheral 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "IAIE166,Illegal access interrupt enable for peripheral 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "IAIE165,Illegal access interrupt enable for peripheral 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "IAIE164,Illegal access interrupt enable for peripheral 164" "B_0x0,B_0x1" newline bitfld.long 0x14 3. "IAIE163,Illegal access interrupt enable for peripheral 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "IAIE162,Illegal access interrupt enable for peripheral 162" "B_0x0,B_0x1" bitfld.long 0x14 1. "IAIE161,Illegal access interrupt enable for peripheral 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "IAIE160,Illegal access interrupt enable for peripheral 160" "B_0x0,B_0x1" rgroup.long 0x80++0x17 line.long 0x0 "IAC_ISR0,IAC interrupt status register 0" bitfld.long 0x0 31. "IAF31,Illegal access interrupt enable for peripheral 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "IAF30,Illegal access interrupt enable for peripheral 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "IAF29,Illegal access interrupt enable for peripheral 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "IAF28,Illegal access interrupt enable for peripheral 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "IAF27,Illegal access interrupt enable for peripheral 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "IAF26,Illegal access interrupt enable for peripheral 26" "B_0x0,B_0x1" bitfld.long 0x0 25. "IAF25,Illegal access interrupt enable for peripheral 25" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "IAF24,Illegal access interrupt enable for peripheral 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "IAF23,Illegal access interrupt enable for peripheral 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "IAF22,Illegal access interrupt enable for peripheral 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "IAF21,Illegal access interrupt enable for peripheral 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "IAF20,Illegal access interrupt enable for peripheral 20" "B_0x0,B_0x1" bitfld.long 0x0 19. "IAF19,Illegal access interrupt enable for peripheral 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "IAF18,Illegal access interrupt enable for peripheral 18" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "IAF17,Illegal access interrupt enable for peripheral 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "IAF16,Illegal access interrupt enable for peripheral 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "IAF15,Illegal access interrupt enable for peripheral 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "IAF14,Illegal access interrupt enable for peripheral 14" "B_0x0,B_0x1" bitfld.long 0x0 13. "IAF13,Illegal access interrupt enable for peripheral 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "IAF12,Illegal access interrupt enable for peripheral 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "IAF11,Illegal access interrupt enable for peripheral 11" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "IAF10,Illegal access interrupt enable for peripheral 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "IAF9,Illegal access interrupt enable for peripheral 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "IAF8,Illegal access interrupt enable for peripheral 8" "B_0x0,B_0x1" bitfld.long 0x0 7. "IAF7,Illegal access interrupt enable for peripheral 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "IAF6,Illegal access interrupt enable for peripheral 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "IAF5,Illegal access interrupt enable for peripheral 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAF4,Illegal access interrupt enable for peripheral 4" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "IAF3,Illegal access interrupt enable for peripheral 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "IAF2,Illegal access interrupt enable for peripheral 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "IAF1,Illegal access interrupt enable for peripheral 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "IAF0,Illegal access interrupt enable for peripheral 0" "B_0x0,B_0x1" line.long 0x4 "IAC_ISR1,IAC interrupt status register 1" bitfld.long 0x4 31. "IAF63,Illegal access interrupt enable for peripheral 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "IAF62,Illegal access interrupt enable for peripheral 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "IAF61,Illegal access interrupt enable for peripheral 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "IAF60,Illegal access interrupt enable for peripheral 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "IAF59,Illegal access interrupt enable for peripheral 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "IAF58,Illegal access interrupt enable for peripheral 58" "B_0x0,B_0x1" bitfld.long 0x4 25. "IAF57,Illegal access interrupt enable for peripheral 57" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "IAF56,Illegal access interrupt enable for peripheral 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "IAF55,Illegal access interrupt enable for peripheral 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "IAF54,Illegal access interrupt enable for peripheral 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "IAF53,Illegal access interrupt enable for peripheral 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "IAF52,Illegal access interrupt enable for peripheral 52" "B_0x0,B_0x1" bitfld.long 0x4 19. "IAF51,Illegal access interrupt enable for peripheral 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "IAF50,Illegal access interrupt enable for peripheral 50" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "IAF49,Illegal access interrupt enable for peripheral 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "IAF48,Illegal access interrupt enable for peripheral 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "IAF47,Illegal access interrupt enable for peripheral 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "IAF46,Illegal access interrupt enable for peripheral 46" "B_0x0,B_0x1" bitfld.long 0x4 13. "IAF45,Illegal access interrupt enable for peripheral 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "IAF44,Illegal access interrupt enable for peripheral 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "IAF43,Illegal access interrupt enable for peripheral 43" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "IAF42,Illegal access interrupt enable for peripheral 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "IAF41,Illegal access interrupt enable for peripheral 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "IAF40,Illegal access interrupt enable for peripheral 40" "B_0x0,B_0x1" bitfld.long 0x4 7. "IAF39,Illegal access interrupt enable for peripheral 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "IAF38,Illegal access interrupt enable for peripheral 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "IAF37,Illegal access interrupt enable for peripheral 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "IAF36,Illegal access interrupt enable for peripheral 36" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "IAF35,Illegal access interrupt enable for peripheral 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "IAF34,Illegal access interrupt enable for peripheral 34" "B_0x0,B_0x1" bitfld.long 0x4 1. "IAF33,Illegal access interrupt enable for peripheral 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "IAF32,Illegal access interrupt enable for peripheral 32" "B_0x0,B_0x1" line.long 0x8 "IAC_ISR2,IAC interrupt status register 2" bitfld.long 0x8 31. "IAF95,Illegal access interrupt enable for peripheral 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "IAF94,Illegal access interrupt enable for peripheral 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "IAF93,Illegal access interrupt enable for peripheral 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "IAF92,Illegal access interrupt enable for peripheral 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "IAF91,Illegal access interrupt enable for peripheral 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "IAF90,Illegal access interrupt enable for peripheral 90" "B_0x0,B_0x1" bitfld.long 0x8 25. "IAF89,Illegal access interrupt enable for peripheral 89" "B_0x0,B_0x1" newline bitfld.long 0x8 24. "IAF88,Illegal access interrupt enable for peripheral 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "IAF87,Illegal access interrupt enable for peripheral 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "IAF86,Illegal access interrupt enable for peripheral 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "IAF85,Illegal access interrupt enable for peripheral 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "IAF84,Illegal access interrupt enable for peripheral 84" "B_0x0,B_0x1" bitfld.long 0x8 19. "IAF83,Illegal access interrupt enable for peripheral 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "IAF82,Illegal access interrupt enable for peripheral 82" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "IAF81,Illegal access interrupt enable for peripheral 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "IAF80,Illegal access interrupt enable for peripheral 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "IAF79,Illegal access interrupt enable for peripheral 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "IAF78,Illegal access interrupt enable for peripheral 78" "B_0x0,B_0x1" bitfld.long 0x8 13. "IAF77,Illegal access interrupt enable for peripheral 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "IAF76,Illegal access interrupt enable for peripheral 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "IAF75,Illegal access interrupt enable for peripheral 75" "B_0x0,B_0x1" newline bitfld.long 0x8 10. "IAF74,Illegal access interrupt enable for peripheral 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "IAF73,Illegal access interrupt enable for peripheral 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "IAF72,Illegal access interrupt enable for peripheral 72" "B_0x0,B_0x1" bitfld.long 0x8 7. "IAF71,Illegal access interrupt enable for peripheral 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "IAF70,Illegal access interrupt enable for peripheral 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "IAF69,Illegal access interrupt enable for peripheral 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "IAF68,Illegal access interrupt enable for peripheral 68" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "IAF67,Illegal access interrupt enable for peripheral 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "IAF66,Illegal access interrupt enable for peripheral 66" "B_0x0,B_0x1" bitfld.long 0x8 1. "IAF65,Illegal access interrupt enable for peripheral 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "IAF64,Illegal access interrupt enable for peripheral 64" "B_0x0,B_0x1" line.long 0xC "IAC_ISR3,IAC interrupt status register 3" bitfld.long 0xC 31. "IAF127,Illegal access interrupt enable for peripheral 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "IAF126,Illegal access interrupt enable for peripheral 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "IAF125,Illegal access interrupt enable for peripheral 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "IAF124,Illegal access interrupt enable for peripheral 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "IAF123,Illegal access interrupt enable for peripheral 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "IAF122,Illegal access interrupt enable for peripheral 122" "B_0x0,B_0x1" bitfld.long 0xC 25. "IAF121,Illegal access interrupt enable for peripheral 121" "B_0x0,B_0x1" newline bitfld.long 0xC 24. "IAF120,Illegal access interrupt enable for peripheral 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "IAF119,Illegal access interrupt enable for peripheral 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "IAF118,Illegal access interrupt enable for peripheral 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "IAF117,Illegal access interrupt enable for peripheral 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "IAF116,Illegal access interrupt enable for peripheral 116" "B_0x0,B_0x1" bitfld.long 0xC 19. "IAF115,Illegal access interrupt enable for peripheral 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "IAF114,Illegal access interrupt enable for peripheral 114" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "IAF113,Illegal access interrupt enable for peripheral 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "IAF112,Illegal access interrupt enable for peripheral 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "IAF111,Illegal access interrupt enable for peripheral 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "IAF110,Illegal access interrupt enable for peripheral 110" "B_0x0,B_0x1" bitfld.long 0xC 13. "IAF109,Illegal access interrupt enable for peripheral 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "IAF108,Illegal access interrupt enable for peripheral 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "IAF107,Illegal access interrupt enable for peripheral 107" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "IAF106,Illegal access interrupt enable for peripheral 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "IAF105,Illegal access interrupt enable for peripheral 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "IAF104,Illegal access interrupt enable for peripheral 104" "B_0x0,B_0x1" bitfld.long 0xC 7. "IAF103,Illegal access interrupt enable for peripheral 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "IAF102,Illegal access interrupt enable for peripheral 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "IAF101,Illegal access interrupt enable for peripheral 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "IAF100,Illegal access interrupt enable for peripheral 100" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "IAF99,Illegal access interrupt enable for peripheral 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "IAF98,Illegal access interrupt enable for peripheral 98" "B_0x0,B_0x1" bitfld.long 0xC 1. "IAF97,Illegal access interrupt enable for peripheral 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "IAF96,Illegal access interrupt enable for peripheral 96" "B_0x0,B_0x1" line.long 0x10 "IAC_ISR4,IAC interrupt status register 4" bitfld.long 0x10 31. "IAF159,Illegal access interrupt enable for peripheral 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "IAF158,Illegal access interrupt enable for peripheral 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "IAF157,Illegal access interrupt enable for peripheral 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "IAF156,Illegal access interrupt enable for peripheral 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "IAF155,Illegal access interrupt enable for peripheral 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "IAF154,Illegal access interrupt enable for peripheral 154" "B_0x0,B_0x1" bitfld.long 0x10 25. "IAF153,Illegal access interrupt enable for peripheral 153" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "IAF152,Illegal access interrupt enable for peripheral 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "IAF151,Illegal access interrupt enable for peripheral 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "IAF150,Illegal access interrupt enable for peripheral 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "IAF149,Illegal access interrupt enable for peripheral 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "IAF148,Illegal access interrupt enable for peripheral 148" "B_0x0,B_0x1" bitfld.long 0x10 19. "IAF147,Illegal access interrupt enable for peripheral 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "IAF146,Illegal access interrupt enable for peripheral 146" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "IAF145,Illegal access interrupt enable for peripheral 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "IAF144,Illegal access interrupt enable for peripheral 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "IAF143,Illegal access interrupt enable for peripheral 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "IAF142,Illegal access interrupt enable for peripheral 142" "B_0x0,B_0x1" bitfld.long 0x10 13. "IAF141,Illegal access interrupt enable for peripheral 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "IAF140,Illegal access interrupt enable for peripheral 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "IAF139,Illegal access interrupt enable for peripheral 139" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "IAF138,Illegal access interrupt enable for peripheral 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "IAF137,Illegal access interrupt enable for peripheral 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "IAF136,Illegal access interrupt enable for peripheral 136" "B_0x0,B_0x1" bitfld.long 0x10 7. "IAF135,Illegal access interrupt enable for peripheral 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "IAF134,Illegal access interrupt enable for peripheral 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "IAF133,Illegal access interrupt enable for peripheral 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "IAF132,Illegal access interrupt enable for peripheral 132" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "IAF131,Illegal access interrupt enable for peripheral 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "IAF130,Illegal access interrupt enable for peripheral 130" "B_0x0,B_0x1" bitfld.long 0x10 1. "IAF129,Illegal access interrupt enable for peripheral 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "IAF128,Illegal access interrupt enable for peripheral 128" "B_0x0,B_0x1" line.long 0x14 "IAC_ISR5,IAC interrupt status register 5" bitfld.long 0x14 31. "IAF191,Illegal access interrupt enable for peripheral 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "IAF190,Illegal access interrupt enable for peripheral 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "IAF189,Illegal access interrupt enable for peripheral 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "IAF188,Illegal access interrupt enable for peripheral 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "IAF187,Illegal access interrupt enable for peripheral 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "IAF186,Illegal access interrupt enable for peripheral 186" "B_0x0,B_0x1" bitfld.long 0x14 25. "IAF185,Illegal access interrupt enable for peripheral 185" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "IAF184,Illegal access interrupt enable for peripheral 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "IAF183,Illegal access interrupt enable for peripheral 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "IAF182,Illegal access interrupt enable for peripheral 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "IAF181,Illegal access interrupt enable for peripheral 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "IAF180,Illegal access interrupt enable for peripheral 180" "B_0x0,B_0x1" bitfld.long 0x14 19. "IAF179,Illegal access interrupt enable for peripheral 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "IAF178,Illegal access interrupt enable for peripheral 178" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "IAF177,Illegal access interrupt enable for peripheral 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "IAF176,Illegal access interrupt enable for peripheral 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "IAF175,Illegal access interrupt enable for peripheral 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "IAF174,Illegal access interrupt enable for peripheral 174" "B_0x0,B_0x1" bitfld.long 0x14 13. "IAF173,Illegal access interrupt enable for peripheral 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "IAF172,Illegal access interrupt enable for peripheral 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "IAF171,Illegal access interrupt enable for peripheral 171" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "IAF170,Illegal access interrupt enable for peripheral 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "IAF169,Illegal access interrupt enable for peripheral 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "IAF168,Illegal access interrupt enable for peripheral 168" "B_0x0,B_0x1" bitfld.long 0x14 7. "IAF167,Illegal access interrupt enable for peripheral 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "IAF166,Illegal access interrupt enable for peripheral 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "IAF165,Illegal access interrupt enable for peripheral 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "IAF164,Illegal access interrupt enable for peripheral 164" "B_0x0,B_0x1" newline bitfld.long 0x14 3. "IAF163,Illegal access interrupt enable for peripheral 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "IAF162,Illegal access interrupt enable for peripheral 162" "B_0x0,B_0x1" bitfld.long 0x14 1. "IAF161,Illegal access interrupt enable for peripheral 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "IAF160,Illegal access interrupt enable for peripheral 160" "B_0x0,B_0x1" wgroup.long 0x100++0x17 line.long 0x0 "IAC_ICR0,IAC interrupt clear register 0" bitfld.long 0x0 31. "IAF31,Illegal access flag clear for peripheral 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "IAF30,Illegal access flag clear for peripheral 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "IAF29,Illegal access flag clear for peripheral 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "IAF28,Illegal access flag clear for peripheral 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "IAF27,Illegal access flag clear for peripheral 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "IAF26,Illegal access flag clear for peripheral 26" "B_0x0,B_0x1" bitfld.long 0x0 25. "IAF25,Illegal access flag clear for peripheral 25" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "IAF24,Illegal access flag clear for peripheral 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "IAF23,Illegal access flag clear for peripheral 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "IAF22,Illegal access flag clear for peripheral 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "IAF21,Illegal access flag clear for peripheral 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "IAF20,Illegal access flag clear for peripheral 20" "B_0x0,B_0x1" bitfld.long 0x0 19. "IAF19,Illegal access flag clear for peripheral 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "IAF18,Illegal access flag clear for peripheral 18" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "IAF17,Illegal access flag clear for peripheral 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "IAF16,Illegal access flag clear for peripheral 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "IAF15,Illegal access flag clear for peripheral 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "IAF14,Illegal access flag clear for peripheral 14" "B_0x0,B_0x1" bitfld.long 0x0 13. "IAF13,Illegal access flag clear for peripheral 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "IAF12,Illegal access flag clear for peripheral 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "IAF11,Illegal access flag clear for peripheral 11" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "IAF10,Illegal access flag clear for peripheral 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "IAF9,Illegal access flag clear for peripheral 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "IAF8,Illegal access flag clear for peripheral 8" "B_0x0,B_0x1" bitfld.long 0x0 7. "IAF7,Illegal access flag clear for peripheral 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "IAF6,Illegal access flag clear for peripheral 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "IAF5,Illegal access flag clear for peripheral 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAF4,Illegal access flag clear for peripheral 4" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "IAF3,Illegal access flag clear for peripheral 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "IAF2,Illegal access flag clear for peripheral 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "IAF1,Illegal access flag clear for peripheral 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "IAF0,Illegal access flag clear for peripheral 0" "B_0x0,B_0x1" line.long 0x4 "IAC_ICR1,IAC interrupt clear register 1" bitfld.long 0x4 31. "IAF63,Illegal access flag clear for peripheral 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "IAF62,Illegal access flag clear for peripheral 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "IAF61,Illegal access flag clear for peripheral 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "IAF60,Illegal access flag clear for peripheral 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "IAF59,Illegal access flag clear for peripheral 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "IAF58,Illegal access flag clear for peripheral 58" "B_0x0,B_0x1" bitfld.long 0x4 25. "IAF57,Illegal access flag clear for peripheral 57" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "IAF56,Illegal access flag clear for peripheral 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "IAF55,Illegal access flag clear for peripheral 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "IAF54,Illegal access flag clear for peripheral 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "IAF53,Illegal access flag clear for peripheral 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "IAF52,Illegal access flag clear for peripheral 52" "B_0x0,B_0x1" bitfld.long 0x4 19. "IAF51,Illegal access flag clear for peripheral 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "IAF50,Illegal access flag clear for peripheral 50" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "IAF49,Illegal access flag clear for peripheral 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "IAF48,Illegal access flag clear for peripheral 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "IAF47,Illegal access flag clear for peripheral 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "IAF46,Illegal access flag clear for peripheral 46" "B_0x0,B_0x1" bitfld.long 0x4 13. "IAF45,Illegal access flag clear for peripheral 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "IAF44,Illegal access flag clear for peripheral 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "IAF43,Illegal access flag clear for peripheral 43" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "IAF42,Illegal access flag clear for peripheral 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "IAF41,Illegal access flag clear for peripheral 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "IAF40,Illegal access flag clear for peripheral 40" "B_0x0,B_0x1" bitfld.long 0x4 7. "IAF39,Illegal access flag clear for peripheral 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "IAF38,Illegal access flag clear for peripheral 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "IAF37,Illegal access flag clear for peripheral 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "IAF36,Illegal access flag clear for peripheral 36" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "IAF35,Illegal access flag clear for peripheral 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "IAF34,Illegal access flag clear for peripheral 34" "B_0x0,B_0x1" bitfld.long 0x4 1. "IAF33,Illegal access flag clear for peripheral 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "IAF32,Illegal access flag clear for peripheral 32" "B_0x0,B_0x1" line.long 0x8 "IAC_ICR2,IAC interrupt clear register 2" bitfld.long 0x8 31. "IAF95,Illegal access flag clear for peripheral 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "IAF94,Illegal access flag clear for peripheral 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "IAF93,Illegal access flag clear for peripheral 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "IAF92,Illegal access flag clear for peripheral 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "IAF91,Illegal access flag clear for peripheral 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "IAF90,Illegal access flag clear for peripheral 90" "B_0x0,B_0x1" bitfld.long 0x8 25. "IAF89,Illegal access flag clear for peripheral 89" "B_0x0,B_0x1" newline bitfld.long 0x8 24. "IAF88,Illegal access flag clear for peripheral 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "IAF87,Illegal access flag clear for peripheral 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "IAF86,Illegal access flag clear for peripheral 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "IAF85,Illegal access flag clear for peripheral 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "IAF84,Illegal access flag clear for peripheral 84" "B_0x0,B_0x1" bitfld.long 0x8 19. "IAF83,Illegal access flag clear for peripheral 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "IAF82,Illegal access flag clear for peripheral 82" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "IAF81,Illegal access flag clear for peripheral 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "IAF80,Illegal access flag clear for peripheral 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "IAF79,Illegal access flag clear for peripheral 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "IAF78,Illegal access flag clear for peripheral 78" "B_0x0,B_0x1" bitfld.long 0x8 13. "IAF77,Illegal access flag clear for peripheral 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "IAF76,Illegal access flag clear for peripheral 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "IAF75,Illegal access flag clear for peripheral 75" "B_0x0,B_0x1" newline bitfld.long 0x8 10. "IAF74,Illegal access flag clear for peripheral 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "IAF73,Illegal access flag clear for peripheral 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "IAF72,Illegal access flag clear for peripheral 72" "B_0x0,B_0x1" bitfld.long 0x8 7. "IAF71,Illegal access flag clear for peripheral 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "IAF70,Illegal access flag clear for peripheral 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "IAF69,Illegal access flag clear for peripheral 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "IAF68,Illegal access flag clear for peripheral 68" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "IAF67,Illegal access flag clear for peripheral 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "IAF66,Illegal access flag clear for peripheral 66" "B_0x0,B_0x1" bitfld.long 0x8 1. "IAF65,Illegal access flag clear for peripheral 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "IAF64,Illegal access flag clear for peripheral 64" "B_0x0,B_0x1" line.long 0xC "IAC_ICR3,IAC interrupt clear register 3" bitfld.long 0xC 31. "IAF127,Illegal access flag clear for peripheral 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "IAF126,Illegal access flag clear for peripheral 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "IAF125,Illegal access flag clear for peripheral 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "IAF124,Illegal access flag clear for peripheral 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "IAF123,Illegal access flag clear for peripheral 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "IAF122,Illegal access flag clear for peripheral 122" "B_0x0,B_0x1" bitfld.long 0xC 25. "IAF121,Illegal access flag clear for peripheral 121" "B_0x0,B_0x1" newline bitfld.long 0xC 24. "IAF120,Illegal access flag clear for peripheral 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "IAF119,Illegal access flag clear for peripheral 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "IAF118,Illegal access flag clear for peripheral 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "IAF117,Illegal access flag clear for peripheral 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "IAF116,Illegal access flag clear for peripheral 116" "B_0x0,B_0x1" bitfld.long 0xC 19. "IAF115,Illegal access flag clear for peripheral 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "IAF114,Illegal access flag clear for peripheral 114" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "IAF113,Illegal access flag clear for peripheral 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "IAF112,Illegal access flag clear for peripheral 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "IAF111,Illegal access flag clear for peripheral 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "IAF110,Illegal access flag clear for peripheral 110" "B_0x0,B_0x1" bitfld.long 0xC 13. "IAF109,Illegal access flag clear for peripheral 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "IAF108,Illegal access flag clear for peripheral 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "IAF107,Illegal access flag clear for peripheral 107" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "IAF106,Illegal access flag clear for peripheral 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "IAF105,Illegal access flag clear for peripheral 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "IAF104,Illegal access flag clear for peripheral 104" "B_0x0,B_0x1" bitfld.long 0xC 7. "IAF103,Illegal access flag clear for peripheral 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "IAF102,Illegal access flag clear for peripheral 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "IAF101,Illegal access flag clear for peripheral 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "IAF100,Illegal access flag clear for peripheral 100" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "IAF99,Illegal access flag clear for peripheral 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "IAF98,Illegal access flag clear for peripheral 98" "B_0x0,B_0x1" bitfld.long 0xC 1. "IAF97,Illegal access flag clear for peripheral 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "IAF96,Illegal access flag clear for peripheral 96" "B_0x0,B_0x1" line.long 0x10 "IAC_ICR4,IAC interrupt clear register 4" bitfld.long 0x10 31. "IAF159,Illegal access flag clear for peripheral 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "IAF158,Illegal access flag clear for peripheral 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "IAF157,Illegal access flag clear for peripheral 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "IAF156,Illegal access flag clear for peripheral 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "IAF155,Illegal access flag clear for peripheral 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "IAF154,Illegal access flag clear for peripheral 154" "B_0x0,B_0x1" bitfld.long 0x10 25. "IAF153,Illegal access flag clear for peripheral 153" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "IAF152,Illegal access flag clear for peripheral 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "IAF151,Illegal access flag clear for peripheral 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "IAF150,Illegal access flag clear for peripheral 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "IAF149,Illegal access flag clear for peripheral 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "IAF148,Illegal access flag clear for peripheral 148" "B_0x0,B_0x1" bitfld.long 0x10 19. "IAF147,Illegal access flag clear for peripheral 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "IAF146,Illegal access flag clear for peripheral 146" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "IAF145,Illegal access flag clear for peripheral 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "IAF144,Illegal access flag clear for peripheral 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "IAF143,Illegal access flag clear for peripheral 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "IAF142,Illegal access flag clear for peripheral 142" "B_0x0,B_0x1" bitfld.long 0x10 13. "IAF141,Illegal access flag clear for peripheral 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "IAF140,Illegal access flag clear for peripheral 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "IAF139,Illegal access flag clear for peripheral 139" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "IAF138,Illegal access flag clear for peripheral 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "IAF137,Illegal access flag clear for peripheral 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "IAF136,Illegal access flag clear for peripheral 136" "B_0x0,B_0x1" bitfld.long 0x10 7. "IAF135,Illegal access flag clear for peripheral 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "IAF134,Illegal access flag clear for peripheral 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "IAF133,Illegal access flag clear for peripheral 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "IAF132,Illegal access flag clear for peripheral 132" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "IAF131,Illegal access flag clear for peripheral 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "IAF130,Illegal access flag clear for peripheral 130" "B_0x0,B_0x1" bitfld.long 0x10 1. "IAF129,Illegal access flag clear for peripheral 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "IAF128,Illegal access flag clear for peripheral 128" "B_0x0,B_0x1" line.long 0x14 "IAC_ICR5,IAC interrupt clear register 5" bitfld.long 0x14 31. "IAF191,Illegal access flag clear for peripheral 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "IAF190,Illegal access flag clear for peripheral 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "IAF189,Illegal access flag clear for peripheral 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "IAF188,Illegal access flag clear for peripheral 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "IAF187,Illegal access flag clear for peripheral 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "IAF186,Illegal access flag clear for peripheral 186" "B_0x0,B_0x1" bitfld.long 0x14 25. "IAF185,Illegal access flag clear for peripheral 185" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "IAF184,Illegal access flag clear for peripheral 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "IAF183,Illegal access flag clear for peripheral 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "IAF182,Illegal access flag clear for peripheral 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "IAF181,Illegal access flag clear for peripheral 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "IAF180,Illegal access flag clear for peripheral 180" "B_0x0,B_0x1" bitfld.long 0x14 19. "IAF179,Illegal access flag clear for peripheral 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "IAF178,Illegal access flag clear for peripheral 178" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "IAF177,Illegal access flag clear for peripheral 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "IAF176,Illegal access flag clear for peripheral 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "IAF175,Illegal access flag clear for peripheral 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "IAF174,Illegal access flag clear for peripheral 174" "B_0x0,B_0x1" bitfld.long 0x14 13. "IAF173,Illegal access flag clear for peripheral 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "IAF172,Illegal access flag clear for peripheral 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "IAF171,Illegal access flag clear for peripheral 171" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "IAF170,Illegal access flag clear for peripheral 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "IAF169,Illegal access flag clear for peripheral 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "IAF168,Illegal access flag clear for peripheral 168" "B_0x0,B_0x1" bitfld.long 0x14 7. "IAF167,Illegal access flag clear for peripheral 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "IAF166,Illegal access flag clear for peripheral 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "IAF165,Illegal access flag clear for peripheral 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "IAF164,Illegal access flag clear for peripheral 164" "B_0x0,B_0x1" newline bitfld.long 0x14 3. "IAF163,Illegal access flag clear for peripheral 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "IAF162,Illegal access flag clear for peripheral 162" "B_0x0,B_0x1" bitfld.long 0x14 1. "IAF161,Illegal access flag clear for peripheral 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "IAF160,Illegal access flag clear for peripheral 160" "B_0x0,B_0x1" rgroup.long 0x36C++0x17 line.long 0x0 "IAC_IISR0,IAC ILAC input status register 0" bitfld.long 0x0 31. "ILACIN31,Illegal access input 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "ILACIN30,Illegal access input 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "ILACIN29,Illegal access input 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "ILACIN28,Illegal access input 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "ILACIN27,Illegal access input 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "ILACIN26,Illegal access input 26" "B_0x0,B_0x1" bitfld.long 0x0 25. "ILACIN25,Illegal access input 25" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "ILACIN24,Illegal access input 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "ILACIN23,Illegal access input 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "ILACIN22,Illegal access input 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "ILACIN21,Illegal access input 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "ILACIN20,Illegal access input 20" "B_0x0,B_0x1" bitfld.long 0x0 19. "ILACIN19,Illegal access input 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "ILACIN18,Illegal access input 18" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "ILACIN17,Illegal access input 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "ILACIN16,Illegal access input 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "ILACIN15,Illegal access input 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "ILACIN14,Illegal access input 14" "B_0x0,B_0x1" bitfld.long 0x0 13. "ILACIN13,Illegal access input 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "ILACIN12,Illegal access input 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "ILACIN11,Illegal access input 11" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "ILACIN10,Illegal access input 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "ILACIN9,Illegal access input 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "ILACIN8,Illegal access input 8" "B_0x0,B_0x1" bitfld.long 0x0 7. "ILACIN7,Illegal access input 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "ILACIN6,Illegal access input 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "ILACIN5,Illegal access input 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "ILACIN4,Illegal access input 4" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "ILACIN3,Illegal access input 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "ILACIN2,Illegal access input 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "ILACIN1,Illegal access input 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "ILACIN0,Illegal access input 0" "B_0x0,B_0x1" line.long 0x4 "IAC_IISR1,IAC ILAC input status register 1" bitfld.long 0x4 31. "ILACIN63,Illegal access input 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "ILACIN62,Illegal access input 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "ILACIN61,Illegal access input 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "ILACIN60,Illegal access input 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "ILACIN59,Illegal access input 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "ILACIN58,Illegal access input 58" "B_0x0,B_0x1" bitfld.long 0x4 25. "ILACIN57,Illegal access input 57" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "ILACIN56,Illegal access input 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "ILACIN55,Illegal access input 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "ILACIN54,Illegal access input 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "ILACIN53,Illegal access input 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "ILACIN52,Illegal access input 52" "B_0x0,B_0x1" bitfld.long 0x4 19. "ILACIN51,Illegal access input 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "ILACIN50,Illegal access input 50" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "ILACIN49,Illegal access input 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "ILACIN48,Illegal access input 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "ILACIN47,Illegal access input 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "ILACIN46,Illegal access input 46" "B_0x0,B_0x1" bitfld.long 0x4 13. "ILACIN45,Illegal access input 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "ILACIN44,Illegal access input 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "ILACIN43,Illegal access input 43" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "ILACIN42,Illegal access input 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "ILACIN41,Illegal access input 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "ILACIN40,Illegal access input 40" "B_0x0,B_0x1" bitfld.long 0x4 7. "ILACIN39,Illegal access input 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "ILACIN38,Illegal access input 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "ILACIN37,Illegal access input 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "ILACIN36,Illegal access input 36" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "ILACIN35,Illegal access input 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "ILACIN34,Illegal access input 34" "B_0x0,B_0x1" bitfld.long 0x4 1. "ILACIN33,Illegal access input 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "ILACIN32,Illegal access input 32" "B_0x0,B_0x1" line.long 0x8 "IAC_IISR2,IAC ILAC input status register 2" bitfld.long 0x8 31. "ILACIN95,Illegal access input 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "ILACIN94,Illegal access input 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "ILACIN93,Illegal access input 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "ILACIN92,Illegal access input 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "ILACIN91,Illegal access input 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "ILACIN90,Illegal access input 90" "B_0x0,B_0x1" bitfld.long 0x8 25. "ILACIN89,Illegal access input 89" "B_0x0,B_0x1" newline bitfld.long 0x8 24. "ILACIN88,Illegal access input 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "ILACIN87,Illegal access input 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "ILACIN86,Illegal access input 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "ILACIN85,Illegal access input 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "ILACIN84,Illegal access input 84" "B_0x0,B_0x1" bitfld.long 0x8 19. "ILACIN83,Illegal access input 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "ILACIN82,Illegal access input 82" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "ILACIN81,Illegal access input 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "ILACIN80,Illegal access input 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "ILACIN79,Illegal access input 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "ILACIN78,Illegal access input 78" "B_0x0,B_0x1" bitfld.long 0x8 13. "ILACIN77,Illegal access input 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "ILACIN76,Illegal access input 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "ILACIN75,Illegal access input 75" "B_0x0,B_0x1" newline bitfld.long 0x8 10. "ILACIN74,Illegal access input 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "ILACIN73,Illegal access input 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "ILACIN72,Illegal access input 72" "B_0x0,B_0x1" bitfld.long 0x8 7. "ILACIN71,Illegal access input 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "ILACIN70,Illegal access input 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "ILACIN69,Illegal access input 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "ILACIN68,Illegal access input 68" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "ILACIN67,Illegal access input 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "ILACIN66,Illegal access input 66" "B_0x0,B_0x1" bitfld.long 0x8 1. "ILACIN65,Illegal access input 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "ILACIN64,Illegal access input 64" "B_0x0,B_0x1" line.long 0xC "IAC_IISR3,IAC ILAC input status register 3" bitfld.long 0xC 31. "ILACIN127,Illegal access input 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "ILACIN126,Illegal access input 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "ILACIN125,Illegal access input 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "ILACIN124,Illegal access input 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "ILACIN123,Illegal access input 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "ILACIN122,Illegal access input 122" "B_0x0,B_0x1" bitfld.long 0xC 25. "ILACIN121,Illegal access input 121" "B_0x0,B_0x1" newline bitfld.long 0xC 24. "ILACIN120,Illegal access input 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "ILACIN119,Illegal access input 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "ILACIN118,Illegal access input 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "ILACIN117,Illegal access input 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "ILACIN116,Illegal access input 116" "B_0x0,B_0x1" bitfld.long 0xC 19. "ILACIN115,Illegal access input 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "ILACIN114,Illegal access input 114" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "ILACIN113,Illegal access input 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "ILACIN112,Illegal access input 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "ILACIN111,Illegal access input 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "ILACIN110,Illegal access input 110" "B_0x0,B_0x1" bitfld.long 0xC 13. "ILACIN109,Illegal access input 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "ILACIN108,Illegal access input 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "ILACIN107,Illegal access input 107" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "ILACIN106,Illegal access input 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "ILACIN105,Illegal access input 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "ILACIN104,Illegal access input 104" "B_0x0,B_0x1" bitfld.long 0xC 7. "ILACIN103,Illegal access input 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "ILACIN102,Illegal access input 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "ILACIN101,Illegal access input 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "ILACIN100,Illegal access input 100" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "ILACIN99,Illegal access input 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "ILACIN98,Illegal access input 98" "B_0x0,B_0x1" bitfld.long 0xC 1. "ILACIN97,Illegal access input 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "ILACIN96,Illegal access input 96" "B_0x0,B_0x1" line.long 0x10 "IAC_IISR4,IAC ILAC input status register 4" bitfld.long 0x10 31. "ILACIN159,Illegal access input 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "ILACIN158,Illegal access input 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "ILACIN157,Illegal access input 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "ILACIN156,Illegal access input 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "ILACIN155,Illegal access input 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "ILACIN154,Illegal access input 154" "B_0x0,B_0x1" bitfld.long 0x10 25. "ILACIN153,Illegal access input 153" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "ILACIN152,Illegal access input 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "ILACIN151,Illegal access input 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "ILACIN150,Illegal access input 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "ILACIN149,Illegal access input 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "ILACIN148,Illegal access input 148" "B_0x0,B_0x1" bitfld.long 0x10 19. "ILACIN147,Illegal access input 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "ILACIN146,Illegal access input 146" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "ILACIN145,Illegal access input 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "ILACIN144,Illegal access input 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "ILACIN143,Illegal access input 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "ILACIN142,Illegal access input 142" "B_0x0,B_0x1" bitfld.long 0x10 13. "ILACIN141,Illegal access input 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "ILACIN140,Illegal access input 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "ILACIN139,Illegal access input 139" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "ILACIN138,Illegal access input 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "ILACIN137,Illegal access input 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "ILACIN136,Illegal access input 136" "B_0x0,B_0x1" bitfld.long 0x10 7. "ILACIN135,Illegal access input 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "ILACIN134,Illegal access input 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "ILACIN133,Illegal access input 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "ILACIN132,Illegal access input 132" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "ILACIN131,Illegal access input 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "ILACIN130,Illegal access input 130" "B_0x0,B_0x1" bitfld.long 0x10 1. "ILACIN129,Illegal access input 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "ILACIN128,Illegal access input 128" "B_0x0,B_0x1" line.long 0x14 "IAC_IISR5,IAC ILAC input status register 5" bitfld.long 0x14 31. "ILACIN191,Illegal access input 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "ILACIN190,Illegal access input 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "ILACIN189,Illegal access input 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "ILACIN188,Illegal access input 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "ILACIN187,Illegal access input 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "ILACIN186,Illegal access input 186" "B_0x0,B_0x1" bitfld.long 0x14 25. "ILACIN185,Illegal access input 185" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "ILACIN184,Illegal access input 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "ILACIN183,Illegal access input 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "ILACIN182,Illegal access input 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "ILACIN181,Illegal access input 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "ILACIN180,Illegal access input 180" "B_0x0,B_0x1" bitfld.long 0x14 19. "ILACIN179,Illegal access input 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "ILACIN178,Illegal access input 178" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "ILACIN177,Illegal access input 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "ILACIN176,Illegal access input 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "ILACIN175,Illegal access input 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "ILACIN174,Illegal access input 174" "B_0x0,B_0x1" bitfld.long 0x14 13. "ILACIN173,Illegal access input 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "ILACIN172,Illegal access input 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "ILACIN171,Illegal access input 171" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "ILACIN170,Illegal access input 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "ILACIN169,Illegal access input 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "ILACIN168,Illegal access input 168" "B_0x0,B_0x1" bitfld.long 0x14 7. "ILACIN167,Illegal access input 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "ILACIN166,Illegal access input 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "ILACIN165,Illegal access input 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "ILACIN164,Illegal access input 164" "B_0x0,B_0x1" newline bitfld.long 0x14 3. "ILACIN163,Illegal access input 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "ILACIN162,Illegal access input 162" "B_0x0,B_0x1" bitfld.long 0x14 1. "ILACIN161,Illegal access input 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "ILACIN160,Illegal access input 160" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "IAC_HWCFGR2,IAC hardware configuration register 2" hexmask.long.byte 0x0 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0x4 "IAC_HWCFGR1,IAC hardware configuration register 1" hexmask.long.word 0x4 16.--24. 1. "CFG5,Hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,Hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x4 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0x8 "IAC_VERR,IAC version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,IAC major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,IAC minor revision" line.long 0xC "IAC_IPIDR,IAC identification register" hexmask.long 0xC 0.--31. 1. "ID,IAC identification code" line.long 0x10 "IAC_SIDR,IAC size identification register" hexmask.long 0x10 0.--31. 1. "SID,IAC size identification code" tree.end tree "IAC_S" base ad:0x52090000 group.long 0x0++0x17 line.long 0x0 "IAC_IER0,IAC interrupt enable register 0" bitfld.long 0x0 31. "IAIE31,Illegal access interrupt enable for peripheral 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "IAIE30,Illegal access interrupt enable for peripheral 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "IAIE29,Illegal access interrupt enable for peripheral 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "IAIE28,Illegal access interrupt enable for peripheral 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "IAIE27,Illegal access interrupt enable for peripheral 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "IAIE26,Illegal access interrupt enable for peripheral 26" "B_0x0,B_0x1" bitfld.long 0x0 25. "IAIE25,Illegal access interrupt enable for peripheral 25" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "IAIE24,Illegal access interrupt enable for peripheral 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "IAIE23,Illegal access interrupt enable for peripheral 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "IAIE22,Illegal access interrupt enable for peripheral 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "IAIE21,Illegal access interrupt enable for peripheral 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "IAIE20,Illegal access interrupt enable for peripheral 20" "B_0x0,B_0x1" bitfld.long 0x0 19. "IAIE19,Illegal access interrupt enable for peripheral 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "IAIE18,Illegal access interrupt enable for peripheral 18" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "IAIE17,Illegal access interrupt enable for peripheral 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "IAIE16,Illegal access interrupt enable for peripheral 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "IAIE15,Illegal access interrupt enable for peripheral 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "IAIE14,Illegal access interrupt enable for peripheral 14" "B_0x0,B_0x1" bitfld.long 0x0 13. "IAIE13,Illegal access interrupt enable for peripheral 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "IAIE12,Illegal access interrupt enable for peripheral 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "IAIE11,Illegal access interrupt enable for peripheral 11" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "IAIE10,Illegal access interrupt enable for peripheral 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "IAIE9,Illegal access interrupt enable for peripheral 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "IAIE8,Illegal access interrupt enable for peripheral 8" "B_0x0,B_0x1" bitfld.long 0x0 7. "IAIE7,Illegal access interrupt enable for peripheral 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "IAIE6,Illegal access interrupt enable for peripheral 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "IAIE5,Illegal access interrupt enable for peripheral 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAIE4,Illegal access interrupt enable for peripheral 4" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "IAIE3,Illegal access interrupt enable for peripheral 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "IAIE2,Illegal access interrupt enable for peripheral 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "IAIE1,Illegal access interrupt enable for peripheral 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "IAIE0,Illegal access interrupt enable for peripheral 0" "B_0x0,B_0x1" line.long 0x4 "IAC_IER1,IAC interrupt enable register 1" bitfld.long 0x4 31. "IAIE63,Illegal access interrupt enable for peripheral 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "IAIE62,Illegal access interrupt enable for peripheral 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "IAIE61,Illegal access interrupt enable for peripheral 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "IAIE60,Illegal access interrupt enable for peripheral 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "IAIE59,Illegal access interrupt enable for peripheral 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "IAIE58,Illegal access interrupt enable for peripheral 58" "B_0x0,B_0x1" bitfld.long 0x4 25. "IAIE57,Illegal access interrupt enable for peripheral 57" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "IAIE56,Illegal access interrupt enable for peripheral 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "IAIE55,Illegal access interrupt enable for peripheral 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "IAIE54,Illegal access interrupt enable for peripheral 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "IAIE53,Illegal access interrupt enable for peripheral 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "IAIE52,Illegal access interrupt enable for peripheral 52" "B_0x0,B_0x1" bitfld.long 0x4 19. "IAIE51,Illegal access interrupt enable for peripheral 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "IAIE50,Illegal access interrupt enable for peripheral 50" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "IAIE49,Illegal access interrupt enable for peripheral 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "IAIE48,Illegal access interrupt enable for peripheral 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "IAIE47,Illegal access interrupt enable for peripheral 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "IAIE46,Illegal access interrupt enable for peripheral 46" "B_0x0,B_0x1" bitfld.long 0x4 13. "IAIE45,Illegal access interrupt enable for peripheral 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "IAIE44,Illegal access interrupt enable for peripheral 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "IAIE43,Illegal access interrupt enable for peripheral 43" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "IAIE42,Illegal access interrupt enable for peripheral 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "IAIE41,Illegal access interrupt enable for peripheral 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "IAIE40,Illegal access interrupt enable for peripheral 40" "B_0x0,B_0x1" bitfld.long 0x4 7. "IAIE39,Illegal access interrupt enable for peripheral 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "IAIE38,Illegal access interrupt enable for peripheral 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "IAIE37,Illegal access interrupt enable for peripheral 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "IAIE36,Illegal access interrupt enable for peripheral 36" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "IAIE35,Illegal access interrupt enable for peripheral 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "IAIE34,Illegal access interrupt enable for peripheral 34" "B_0x0,B_0x1" bitfld.long 0x4 1. "IAIE33,Illegal access interrupt enable for peripheral 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "IAIE32,Illegal access interrupt enable for peripheral 32" "B_0x0,B_0x1" line.long 0x8 "IAC_IER2,IAC interrupt enable register 2" bitfld.long 0x8 31. "IAIE95,Illegal access interrupt enable for peripheral 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "IAIE94,Illegal access interrupt enable for peripheral 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "IAIE93,Illegal access interrupt enable for peripheral 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "IAIE92,Illegal access interrupt enable for peripheral 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "IAIE91,Illegal access interrupt enable for peripheral 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "IAIE90,Illegal access interrupt enable for peripheral 90" "B_0x0,B_0x1" bitfld.long 0x8 25. "IAIE89,Illegal access interrupt enable for peripheral 89" "B_0x0,B_0x1" newline bitfld.long 0x8 24. "IAIE88,Illegal access interrupt enable for peripheral 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "IAIE87,Illegal access interrupt enable for peripheral 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "IAIE86,Illegal access interrupt enable for peripheral 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "IAIE85,Illegal access interrupt enable for peripheral 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "IAIE84,Illegal access interrupt enable for peripheral 84" "B_0x0,B_0x1" bitfld.long 0x8 19. "IAIE83,Illegal access interrupt enable for peripheral 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "IAIE82,Illegal access interrupt enable for peripheral 82" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "IAIE81,Illegal access interrupt enable for peripheral 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "IAIE80,Illegal access interrupt enable for peripheral 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "IAIE79,Illegal access interrupt enable for peripheral 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "IAIE78,Illegal access interrupt enable for peripheral 78" "B_0x0,B_0x1" bitfld.long 0x8 13. "IAIE77,Illegal access interrupt enable for peripheral 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "IAIE76,Illegal access interrupt enable for peripheral 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "IAIE75,Illegal access interrupt enable for peripheral 75" "B_0x0,B_0x1" newline bitfld.long 0x8 10. "IAIE74,Illegal access interrupt enable for peripheral 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "IAIE73,Illegal access interrupt enable for peripheral 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "IAIE72,Illegal access interrupt enable for peripheral 72" "B_0x0,B_0x1" bitfld.long 0x8 7. "IAIE71,Illegal access interrupt enable for peripheral 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "IAIE70,Illegal access interrupt enable for peripheral 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "IAIE69,Illegal access interrupt enable for peripheral 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "IAIE68,Illegal access interrupt enable for peripheral 68" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "IAIE67,Illegal access interrupt enable for peripheral 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "IAIE66,Illegal access interrupt enable for peripheral 66" "B_0x0,B_0x1" bitfld.long 0x8 1. "IAIE65,Illegal access interrupt enable for peripheral 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "IAIE64,Illegal access interrupt enable for peripheral 64" "B_0x0,B_0x1" line.long 0xC "IAC_IER3,IAC interrupt enable register 3" bitfld.long 0xC 31. "IAIE127,Illegal access interrupt enable for peripheral 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "IAIE126,Illegal access interrupt enable for peripheral 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "IAIE125,Illegal access interrupt enable for peripheral 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "IAIE124,Illegal access interrupt enable for peripheral 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "IAIE123,Illegal access interrupt enable for peripheral 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "IAIE122,Illegal access interrupt enable for peripheral 122" "B_0x0,B_0x1" bitfld.long 0xC 25. "IAIE121,Illegal access interrupt enable for peripheral 121" "B_0x0,B_0x1" newline bitfld.long 0xC 24. "IAIE120,Illegal access interrupt enable for peripheral 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "IAIE119,Illegal access interrupt enable for peripheral 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "IAIE118,Illegal access interrupt enable for peripheral 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "IAIE117,Illegal access interrupt enable for peripheral 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "IAIE116,Illegal access interrupt enable for peripheral 116" "B_0x0,B_0x1" bitfld.long 0xC 19. "IAIE115,Illegal access interrupt enable for peripheral 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "IAIE114,Illegal access interrupt enable for peripheral 114" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "IAIE113,Illegal access interrupt enable for peripheral 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "IAIE112,Illegal access interrupt enable for peripheral 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "IAIE111,Illegal access interrupt enable for peripheral 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "IAIE110,Illegal access interrupt enable for peripheral 110" "B_0x0,B_0x1" bitfld.long 0xC 13. "IAIE109,Illegal access interrupt enable for peripheral 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "IAIE108,Illegal access interrupt enable for peripheral 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "IAIE107,Illegal access interrupt enable for peripheral 107" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "IAIE106,Illegal access interrupt enable for peripheral 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "IAIE105,Illegal access interrupt enable for peripheral 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "IAIE104,Illegal access interrupt enable for peripheral 104" "B_0x0,B_0x1" bitfld.long 0xC 7. "IAIE103,Illegal access interrupt enable for peripheral 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "IAIE102,Illegal access interrupt enable for peripheral 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "IAIE101,Illegal access interrupt enable for peripheral 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "IAIE100,Illegal access interrupt enable for peripheral 100" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "IAIE99,Illegal access interrupt enable for peripheral 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "IAIE98,Illegal access interrupt enable for peripheral 98" "B_0x0,B_0x1" bitfld.long 0xC 1. "IAIE97,Illegal access interrupt enable for peripheral 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "IAIE96,Illegal access interrupt enable for peripheral 96" "B_0x0,B_0x1" line.long 0x10 "IAC_IER4,IAC interrupt enable register 4" bitfld.long 0x10 31. "IAIE159,Illegal access interrupt enable for peripheral 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "IAIE158,Illegal access interrupt enable for peripheral 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "IAIE157,Illegal access interrupt enable for peripheral 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "IAIE156,Illegal access interrupt enable for peripheral 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "IAIE155,Illegal access interrupt enable for peripheral 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "IAIE154,Illegal access interrupt enable for peripheral 154" "B_0x0,B_0x1" bitfld.long 0x10 25. "IAIE153,Illegal access interrupt enable for peripheral 153" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "IAIE152,Illegal access interrupt enable for peripheral 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "IAIE151,Illegal access interrupt enable for peripheral 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "IAIE150,Illegal access interrupt enable for peripheral 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "IAIE149,Illegal access interrupt enable for peripheral 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "IAIE148,Illegal access interrupt enable for peripheral 148" "B_0x0,B_0x1" bitfld.long 0x10 19. "IAIE147,Illegal access interrupt enable for peripheral 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "IAIE146,Illegal access interrupt enable for peripheral 146" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "IAIE145,Illegal access interrupt enable for peripheral 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "IAIE144,Illegal access interrupt enable for peripheral 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "IAIE143,Illegal access interrupt enable for peripheral 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "IAIE142,Illegal access interrupt enable for peripheral 142" "B_0x0,B_0x1" bitfld.long 0x10 13. "IAIE141,Illegal access interrupt enable for peripheral 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "IAIE140,Illegal access interrupt enable for peripheral 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "IAIE139,Illegal access interrupt enable for peripheral 139" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "IAIE138,Illegal access interrupt enable for peripheral 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "IAIE137,Illegal access interrupt enable for peripheral 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "IAIE136,Illegal access interrupt enable for peripheral 136" "B_0x0,B_0x1" bitfld.long 0x10 7. "IAIE135,Illegal access interrupt enable for peripheral 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "IAIE134,Illegal access interrupt enable for peripheral 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "IAIE133,Illegal access interrupt enable for peripheral 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "IAIE132,Illegal access interrupt enable for peripheral 132" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "IAIE131,Illegal access interrupt enable for peripheral 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "IAIE130,Illegal access interrupt enable for peripheral 130" "B_0x0,B_0x1" bitfld.long 0x10 1. "IAIE129,Illegal access interrupt enable for peripheral 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "IAIE128,Illegal access interrupt enable for peripheral 128" "B_0x0,B_0x1" line.long 0x14 "IAC_IER5,IAC interrupt enable register 5" bitfld.long 0x14 31. "IAIE191,Illegal access interrupt enable for peripheral 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "IAIE190,Illegal access interrupt enable for peripheral 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "IAIE189,Illegal access interrupt enable for peripheral 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "IAIE188,Illegal access interrupt enable for peripheral 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "IAIE187,Illegal access interrupt enable for peripheral 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "IAIE186,Illegal access interrupt enable for peripheral 186" "B_0x0,B_0x1" bitfld.long 0x14 25. "IAIE185,Illegal access interrupt enable for peripheral 185" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "IAIE184,Illegal access interrupt enable for peripheral 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "IAIE183,Illegal access interrupt enable for peripheral 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "IAIE182,Illegal access interrupt enable for peripheral 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "IAIE181,Illegal access interrupt enable for peripheral 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "IAIE180,Illegal access interrupt enable for peripheral 180" "B_0x0,B_0x1" bitfld.long 0x14 19. "IAIE179,Illegal access interrupt enable for peripheral 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "IAIE178,Illegal access interrupt enable for peripheral 178" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "IAIE177,Illegal access interrupt enable for peripheral 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "IAIE176,Illegal access interrupt enable for peripheral 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "IAIE175,Illegal access interrupt enable for peripheral 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "IAIE174,Illegal access interrupt enable for peripheral 174" "B_0x0,B_0x1" bitfld.long 0x14 13. "IAIE173,Illegal access interrupt enable for peripheral 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "IAIE172,Illegal access interrupt enable for peripheral 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "IAIE171,Illegal access interrupt enable for peripheral 171" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "IAIE170,Illegal access interrupt enable for peripheral 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "IAIE169,Illegal access interrupt enable for peripheral 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "IAIE168,Illegal access interrupt enable for peripheral 168" "B_0x0,B_0x1" bitfld.long 0x14 7. "IAIE167,Illegal access interrupt enable for peripheral 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "IAIE166,Illegal access interrupt enable for peripheral 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "IAIE165,Illegal access interrupt enable for peripheral 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "IAIE164,Illegal access interrupt enable for peripheral 164" "B_0x0,B_0x1" newline bitfld.long 0x14 3. "IAIE163,Illegal access interrupt enable for peripheral 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "IAIE162,Illegal access interrupt enable for peripheral 162" "B_0x0,B_0x1" bitfld.long 0x14 1. "IAIE161,Illegal access interrupt enable for peripheral 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "IAIE160,Illegal access interrupt enable for peripheral 160" "B_0x0,B_0x1" rgroup.long 0x80++0x17 line.long 0x0 "IAC_ISR0,IAC interrupt status register 0" bitfld.long 0x0 31. "IAF31,Illegal access interrupt enable for peripheral 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "IAF30,Illegal access interrupt enable for peripheral 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "IAF29,Illegal access interrupt enable for peripheral 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "IAF28,Illegal access interrupt enable for peripheral 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "IAF27,Illegal access interrupt enable for peripheral 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "IAF26,Illegal access interrupt enable for peripheral 26" "B_0x0,B_0x1" bitfld.long 0x0 25. "IAF25,Illegal access interrupt enable for peripheral 25" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "IAF24,Illegal access interrupt enable for peripheral 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "IAF23,Illegal access interrupt enable for peripheral 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "IAF22,Illegal access interrupt enable for peripheral 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "IAF21,Illegal access interrupt enable for peripheral 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "IAF20,Illegal access interrupt enable for peripheral 20" "B_0x0,B_0x1" bitfld.long 0x0 19. "IAF19,Illegal access interrupt enable for peripheral 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "IAF18,Illegal access interrupt enable for peripheral 18" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "IAF17,Illegal access interrupt enable for peripheral 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "IAF16,Illegal access interrupt enable for peripheral 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "IAF15,Illegal access interrupt enable for peripheral 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "IAF14,Illegal access interrupt enable for peripheral 14" "B_0x0,B_0x1" bitfld.long 0x0 13. "IAF13,Illegal access interrupt enable for peripheral 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "IAF12,Illegal access interrupt enable for peripheral 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "IAF11,Illegal access interrupt enable for peripheral 11" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "IAF10,Illegal access interrupt enable for peripheral 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "IAF9,Illegal access interrupt enable for peripheral 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "IAF8,Illegal access interrupt enable for peripheral 8" "B_0x0,B_0x1" bitfld.long 0x0 7. "IAF7,Illegal access interrupt enable for peripheral 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "IAF6,Illegal access interrupt enable for peripheral 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "IAF5,Illegal access interrupt enable for peripheral 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAF4,Illegal access interrupt enable for peripheral 4" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "IAF3,Illegal access interrupt enable for peripheral 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "IAF2,Illegal access interrupt enable for peripheral 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "IAF1,Illegal access interrupt enable for peripheral 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "IAF0,Illegal access interrupt enable for peripheral 0" "B_0x0,B_0x1" line.long 0x4 "IAC_ISR1,IAC interrupt status register 1" bitfld.long 0x4 31. "IAF63,Illegal access interrupt enable for peripheral 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "IAF62,Illegal access interrupt enable for peripheral 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "IAF61,Illegal access interrupt enable for peripheral 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "IAF60,Illegal access interrupt enable for peripheral 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "IAF59,Illegal access interrupt enable for peripheral 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "IAF58,Illegal access interrupt enable for peripheral 58" "B_0x0,B_0x1" bitfld.long 0x4 25. "IAF57,Illegal access interrupt enable for peripheral 57" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "IAF56,Illegal access interrupt enable for peripheral 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "IAF55,Illegal access interrupt enable for peripheral 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "IAF54,Illegal access interrupt enable for peripheral 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "IAF53,Illegal access interrupt enable for peripheral 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "IAF52,Illegal access interrupt enable for peripheral 52" "B_0x0,B_0x1" bitfld.long 0x4 19. "IAF51,Illegal access interrupt enable for peripheral 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "IAF50,Illegal access interrupt enable for peripheral 50" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "IAF49,Illegal access interrupt enable for peripheral 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "IAF48,Illegal access interrupt enable for peripheral 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "IAF47,Illegal access interrupt enable for peripheral 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "IAF46,Illegal access interrupt enable for peripheral 46" "B_0x0,B_0x1" bitfld.long 0x4 13. "IAF45,Illegal access interrupt enable for peripheral 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "IAF44,Illegal access interrupt enable for peripheral 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "IAF43,Illegal access interrupt enable for peripheral 43" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "IAF42,Illegal access interrupt enable for peripheral 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "IAF41,Illegal access interrupt enable for peripheral 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "IAF40,Illegal access interrupt enable for peripheral 40" "B_0x0,B_0x1" bitfld.long 0x4 7. "IAF39,Illegal access interrupt enable for peripheral 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "IAF38,Illegal access interrupt enable for peripheral 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "IAF37,Illegal access interrupt enable for peripheral 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "IAF36,Illegal access interrupt enable for peripheral 36" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "IAF35,Illegal access interrupt enable for peripheral 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "IAF34,Illegal access interrupt enable for peripheral 34" "B_0x0,B_0x1" bitfld.long 0x4 1. "IAF33,Illegal access interrupt enable for peripheral 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "IAF32,Illegal access interrupt enable for peripheral 32" "B_0x0,B_0x1" line.long 0x8 "IAC_ISR2,IAC interrupt status register 2" bitfld.long 0x8 31. "IAF95,Illegal access interrupt enable for peripheral 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "IAF94,Illegal access interrupt enable for peripheral 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "IAF93,Illegal access interrupt enable for peripheral 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "IAF92,Illegal access interrupt enable for peripheral 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "IAF91,Illegal access interrupt enable for peripheral 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "IAF90,Illegal access interrupt enable for peripheral 90" "B_0x0,B_0x1" bitfld.long 0x8 25. "IAF89,Illegal access interrupt enable for peripheral 89" "B_0x0,B_0x1" newline bitfld.long 0x8 24. "IAF88,Illegal access interrupt enable for peripheral 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "IAF87,Illegal access interrupt enable for peripheral 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "IAF86,Illegal access interrupt enable for peripheral 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "IAF85,Illegal access interrupt enable for peripheral 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "IAF84,Illegal access interrupt enable for peripheral 84" "B_0x0,B_0x1" bitfld.long 0x8 19. "IAF83,Illegal access interrupt enable for peripheral 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "IAF82,Illegal access interrupt enable for peripheral 82" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "IAF81,Illegal access interrupt enable for peripheral 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "IAF80,Illegal access interrupt enable for peripheral 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "IAF79,Illegal access interrupt enable for peripheral 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "IAF78,Illegal access interrupt enable for peripheral 78" "B_0x0,B_0x1" bitfld.long 0x8 13. "IAF77,Illegal access interrupt enable for peripheral 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "IAF76,Illegal access interrupt enable for peripheral 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "IAF75,Illegal access interrupt enable for peripheral 75" "B_0x0,B_0x1" newline bitfld.long 0x8 10. "IAF74,Illegal access interrupt enable for peripheral 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "IAF73,Illegal access interrupt enable for peripheral 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "IAF72,Illegal access interrupt enable for peripheral 72" "B_0x0,B_0x1" bitfld.long 0x8 7. "IAF71,Illegal access interrupt enable for peripheral 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "IAF70,Illegal access interrupt enable for peripheral 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "IAF69,Illegal access interrupt enable for peripheral 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "IAF68,Illegal access interrupt enable for peripheral 68" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "IAF67,Illegal access interrupt enable for peripheral 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "IAF66,Illegal access interrupt enable for peripheral 66" "B_0x0,B_0x1" bitfld.long 0x8 1. "IAF65,Illegal access interrupt enable for peripheral 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "IAF64,Illegal access interrupt enable for peripheral 64" "B_0x0,B_0x1" line.long 0xC "IAC_ISR3,IAC interrupt status register 3" bitfld.long 0xC 31. "IAF127,Illegal access interrupt enable for peripheral 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "IAF126,Illegal access interrupt enable for peripheral 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "IAF125,Illegal access interrupt enable for peripheral 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "IAF124,Illegal access interrupt enable for peripheral 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "IAF123,Illegal access interrupt enable for peripheral 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "IAF122,Illegal access interrupt enable for peripheral 122" "B_0x0,B_0x1" bitfld.long 0xC 25. "IAF121,Illegal access interrupt enable for peripheral 121" "B_0x0,B_0x1" newline bitfld.long 0xC 24. "IAF120,Illegal access interrupt enable for peripheral 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "IAF119,Illegal access interrupt enable for peripheral 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "IAF118,Illegal access interrupt enable for peripheral 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "IAF117,Illegal access interrupt enable for peripheral 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "IAF116,Illegal access interrupt enable for peripheral 116" "B_0x0,B_0x1" bitfld.long 0xC 19. "IAF115,Illegal access interrupt enable for peripheral 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "IAF114,Illegal access interrupt enable for peripheral 114" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "IAF113,Illegal access interrupt enable for peripheral 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "IAF112,Illegal access interrupt enable for peripheral 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "IAF111,Illegal access interrupt enable for peripheral 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "IAF110,Illegal access interrupt enable for peripheral 110" "B_0x0,B_0x1" bitfld.long 0xC 13. "IAF109,Illegal access interrupt enable for peripheral 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "IAF108,Illegal access interrupt enable for peripheral 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "IAF107,Illegal access interrupt enable for peripheral 107" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "IAF106,Illegal access interrupt enable for peripheral 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "IAF105,Illegal access interrupt enable for peripheral 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "IAF104,Illegal access interrupt enable for peripheral 104" "B_0x0,B_0x1" bitfld.long 0xC 7. "IAF103,Illegal access interrupt enable for peripheral 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "IAF102,Illegal access interrupt enable for peripheral 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "IAF101,Illegal access interrupt enable for peripheral 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "IAF100,Illegal access interrupt enable for peripheral 100" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "IAF99,Illegal access interrupt enable for peripheral 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "IAF98,Illegal access interrupt enable for peripheral 98" "B_0x0,B_0x1" bitfld.long 0xC 1. "IAF97,Illegal access interrupt enable for peripheral 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "IAF96,Illegal access interrupt enable for peripheral 96" "B_0x0,B_0x1" line.long 0x10 "IAC_ISR4,IAC interrupt status register 4" bitfld.long 0x10 31. "IAF159,Illegal access interrupt enable for peripheral 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "IAF158,Illegal access interrupt enable for peripheral 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "IAF157,Illegal access interrupt enable for peripheral 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "IAF156,Illegal access interrupt enable for peripheral 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "IAF155,Illegal access interrupt enable for peripheral 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "IAF154,Illegal access interrupt enable for peripheral 154" "B_0x0,B_0x1" bitfld.long 0x10 25. "IAF153,Illegal access interrupt enable for peripheral 153" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "IAF152,Illegal access interrupt enable for peripheral 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "IAF151,Illegal access interrupt enable for peripheral 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "IAF150,Illegal access interrupt enable for peripheral 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "IAF149,Illegal access interrupt enable for peripheral 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "IAF148,Illegal access interrupt enable for peripheral 148" "B_0x0,B_0x1" bitfld.long 0x10 19. "IAF147,Illegal access interrupt enable for peripheral 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "IAF146,Illegal access interrupt enable for peripheral 146" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "IAF145,Illegal access interrupt enable for peripheral 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "IAF144,Illegal access interrupt enable for peripheral 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "IAF143,Illegal access interrupt enable for peripheral 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "IAF142,Illegal access interrupt enable for peripheral 142" "B_0x0,B_0x1" bitfld.long 0x10 13. "IAF141,Illegal access interrupt enable for peripheral 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "IAF140,Illegal access interrupt enable for peripheral 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "IAF139,Illegal access interrupt enable for peripheral 139" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "IAF138,Illegal access interrupt enable for peripheral 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "IAF137,Illegal access interrupt enable for peripheral 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "IAF136,Illegal access interrupt enable for peripheral 136" "B_0x0,B_0x1" bitfld.long 0x10 7. "IAF135,Illegal access interrupt enable for peripheral 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "IAF134,Illegal access interrupt enable for peripheral 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "IAF133,Illegal access interrupt enable for peripheral 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "IAF132,Illegal access interrupt enable for peripheral 132" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "IAF131,Illegal access interrupt enable for peripheral 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "IAF130,Illegal access interrupt enable for peripheral 130" "B_0x0,B_0x1" bitfld.long 0x10 1. "IAF129,Illegal access interrupt enable for peripheral 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "IAF128,Illegal access interrupt enable for peripheral 128" "B_0x0,B_0x1" line.long 0x14 "IAC_ISR5,IAC interrupt status register 5" bitfld.long 0x14 31. "IAF191,Illegal access interrupt enable for peripheral 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "IAF190,Illegal access interrupt enable for peripheral 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "IAF189,Illegal access interrupt enable for peripheral 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "IAF188,Illegal access interrupt enable for peripheral 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "IAF187,Illegal access interrupt enable for peripheral 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "IAF186,Illegal access interrupt enable for peripheral 186" "B_0x0,B_0x1" bitfld.long 0x14 25. "IAF185,Illegal access interrupt enable for peripheral 185" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "IAF184,Illegal access interrupt enable for peripheral 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "IAF183,Illegal access interrupt enable for peripheral 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "IAF182,Illegal access interrupt enable for peripheral 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "IAF181,Illegal access interrupt enable for peripheral 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "IAF180,Illegal access interrupt enable for peripheral 180" "B_0x0,B_0x1" bitfld.long 0x14 19. "IAF179,Illegal access interrupt enable for peripheral 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "IAF178,Illegal access interrupt enable for peripheral 178" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "IAF177,Illegal access interrupt enable for peripheral 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "IAF176,Illegal access interrupt enable for peripheral 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "IAF175,Illegal access interrupt enable for peripheral 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "IAF174,Illegal access interrupt enable for peripheral 174" "B_0x0,B_0x1" bitfld.long 0x14 13. "IAF173,Illegal access interrupt enable for peripheral 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "IAF172,Illegal access interrupt enable for peripheral 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "IAF171,Illegal access interrupt enable for peripheral 171" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "IAF170,Illegal access interrupt enable for peripheral 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "IAF169,Illegal access interrupt enable for peripheral 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "IAF168,Illegal access interrupt enable for peripheral 168" "B_0x0,B_0x1" bitfld.long 0x14 7. "IAF167,Illegal access interrupt enable for peripheral 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "IAF166,Illegal access interrupt enable for peripheral 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "IAF165,Illegal access interrupt enable for peripheral 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "IAF164,Illegal access interrupt enable for peripheral 164" "B_0x0,B_0x1" newline bitfld.long 0x14 3. "IAF163,Illegal access interrupt enable for peripheral 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "IAF162,Illegal access interrupt enable for peripheral 162" "B_0x0,B_0x1" bitfld.long 0x14 1. "IAF161,Illegal access interrupt enable for peripheral 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "IAF160,Illegal access interrupt enable for peripheral 160" "B_0x0,B_0x1" wgroup.long 0x100++0x17 line.long 0x0 "IAC_ICR0,IAC interrupt clear register 0" bitfld.long 0x0 31. "IAF31,Illegal access flag clear for peripheral 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "IAF30,Illegal access flag clear for peripheral 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "IAF29,Illegal access flag clear for peripheral 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "IAF28,Illegal access flag clear for peripheral 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "IAF27,Illegal access flag clear for peripheral 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "IAF26,Illegal access flag clear for peripheral 26" "B_0x0,B_0x1" bitfld.long 0x0 25. "IAF25,Illegal access flag clear for peripheral 25" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "IAF24,Illegal access flag clear for peripheral 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "IAF23,Illegal access flag clear for peripheral 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "IAF22,Illegal access flag clear for peripheral 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "IAF21,Illegal access flag clear for peripheral 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "IAF20,Illegal access flag clear for peripheral 20" "B_0x0,B_0x1" bitfld.long 0x0 19. "IAF19,Illegal access flag clear for peripheral 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "IAF18,Illegal access flag clear for peripheral 18" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "IAF17,Illegal access flag clear for peripheral 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "IAF16,Illegal access flag clear for peripheral 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "IAF15,Illegal access flag clear for peripheral 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "IAF14,Illegal access flag clear for peripheral 14" "B_0x0,B_0x1" bitfld.long 0x0 13. "IAF13,Illegal access flag clear for peripheral 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "IAF12,Illegal access flag clear for peripheral 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "IAF11,Illegal access flag clear for peripheral 11" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "IAF10,Illegal access flag clear for peripheral 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "IAF9,Illegal access flag clear for peripheral 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "IAF8,Illegal access flag clear for peripheral 8" "B_0x0,B_0x1" bitfld.long 0x0 7. "IAF7,Illegal access flag clear for peripheral 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "IAF6,Illegal access flag clear for peripheral 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "IAF5,Illegal access flag clear for peripheral 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAF4,Illegal access flag clear for peripheral 4" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "IAF3,Illegal access flag clear for peripheral 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "IAF2,Illegal access flag clear for peripheral 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "IAF1,Illegal access flag clear for peripheral 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "IAF0,Illegal access flag clear for peripheral 0" "B_0x0,B_0x1" line.long 0x4 "IAC_ICR1,IAC interrupt clear register 1" bitfld.long 0x4 31. "IAF63,Illegal access flag clear for peripheral 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "IAF62,Illegal access flag clear for peripheral 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "IAF61,Illegal access flag clear for peripheral 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "IAF60,Illegal access flag clear for peripheral 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "IAF59,Illegal access flag clear for peripheral 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "IAF58,Illegal access flag clear for peripheral 58" "B_0x0,B_0x1" bitfld.long 0x4 25. "IAF57,Illegal access flag clear for peripheral 57" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "IAF56,Illegal access flag clear for peripheral 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "IAF55,Illegal access flag clear for peripheral 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "IAF54,Illegal access flag clear for peripheral 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "IAF53,Illegal access flag clear for peripheral 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "IAF52,Illegal access flag clear for peripheral 52" "B_0x0,B_0x1" bitfld.long 0x4 19. "IAF51,Illegal access flag clear for peripheral 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "IAF50,Illegal access flag clear for peripheral 50" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "IAF49,Illegal access flag clear for peripheral 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "IAF48,Illegal access flag clear for peripheral 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "IAF47,Illegal access flag clear for peripheral 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "IAF46,Illegal access flag clear for peripheral 46" "B_0x0,B_0x1" bitfld.long 0x4 13. "IAF45,Illegal access flag clear for peripheral 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "IAF44,Illegal access flag clear for peripheral 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "IAF43,Illegal access flag clear for peripheral 43" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "IAF42,Illegal access flag clear for peripheral 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "IAF41,Illegal access flag clear for peripheral 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "IAF40,Illegal access flag clear for peripheral 40" "B_0x0,B_0x1" bitfld.long 0x4 7. "IAF39,Illegal access flag clear for peripheral 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "IAF38,Illegal access flag clear for peripheral 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "IAF37,Illegal access flag clear for peripheral 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "IAF36,Illegal access flag clear for peripheral 36" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "IAF35,Illegal access flag clear for peripheral 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "IAF34,Illegal access flag clear for peripheral 34" "B_0x0,B_0x1" bitfld.long 0x4 1. "IAF33,Illegal access flag clear for peripheral 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "IAF32,Illegal access flag clear for peripheral 32" "B_0x0,B_0x1" line.long 0x8 "IAC_ICR2,IAC interrupt clear register 2" bitfld.long 0x8 31. "IAF95,Illegal access flag clear for peripheral 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "IAF94,Illegal access flag clear for peripheral 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "IAF93,Illegal access flag clear for peripheral 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "IAF92,Illegal access flag clear for peripheral 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "IAF91,Illegal access flag clear for peripheral 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "IAF90,Illegal access flag clear for peripheral 90" "B_0x0,B_0x1" bitfld.long 0x8 25. "IAF89,Illegal access flag clear for peripheral 89" "B_0x0,B_0x1" newline bitfld.long 0x8 24. "IAF88,Illegal access flag clear for peripheral 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "IAF87,Illegal access flag clear for peripheral 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "IAF86,Illegal access flag clear for peripheral 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "IAF85,Illegal access flag clear for peripheral 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "IAF84,Illegal access flag clear for peripheral 84" "B_0x0,B_0x1" bitfld.long 0x8 19. "IAF83,Illegal access flag clear for peripheral 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "IAF82,Illegal access flag clear for peripheral 82" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "IAF81,Illegal access flag clear for peripheral 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "IAF80,Illegal access flag clear for peripheral 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "IAF79,Illegal access flag clear for peripheral 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "IAF78,Illegal access flag clear for peripheral 78" "B_0x0,B_0x1" bitfld.long 0x8 13. "IAF77,Illegal access flag clear for peripheral 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "IAF76,Illegal access flag clear for peripheral 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "IAF75,Illegal access flag clear for peripheral 75" "B_0x0,B_0x1" newline bitfld.long 0x8 10. "IAF74,Illegal access flag clear for peripheral 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "IAF73,Illegal access flag clear for peripheral 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "IAF72,Illegal access flag clear for peripheral 72" "B_0x0,B_0x1" bitfld.long 0x8 7. "IAF71,Illegal access flag clear for peripheral 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "IAF70,Illegal access flag clear for peripheral 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "IAF69,Illegal access flag clear for peripheral 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "IAF68,Illegal access flag clear for peripheral 68" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "IAF67,Illegal access flag clear for peripheral 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "IAF66,Illegal access flag clear for peripheral 66" "B_0x0,B_0x1" bitfld.long 0x8 1. "IAF65,Illegal access flag clear for peripheral 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "IAF64,Illegal access flag clear for peripheral 64" "B_0x0,B_0x1" line.long 0xC "IAC_ICR3,IAC interrupt clear register 3" bitfld.long 0xC 31. "IAF127,Illegal access flag clear for peripheral 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "IAF126,Illegal access flag clear for peripheral 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "IAF125,Illegal access flag clear for peripheral 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "IAF124,Illegal access flag clear for peripheral 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "IAF123,Illegal access flag clear for peripheral 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "IAF122,Illegal access flag clear for peripheral 122" "B_0x0,B_0x1" bitfld.long 0xC 25. "IAF121,Illegal access flag clear for peripheral 121" "B_0x0,B_0x1" newline bitfld.long 0xC 24. "IAF120,Illegal access flag clear for peripheral 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "IAF119,Illegal access flag clear for peripheral 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "IAF118,Illegal access flag clear for peripheral 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "IAF117,Illegal access flag clear for peripheral 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "IAF116,Illegal access flag clear for peripheral 116" "B_0x0,B_0x1" bitfld.long 0xC 19. "IAF115,Illegal access flag clear for peripheral 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "IAF114,Illegal access flag clear for peripheral 114" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "IAF113,Illegal access flag clear for peripheral 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "IAF112,Illegal access flag clear for peripheral 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "IAF111,Illegal access flag clear for peripheral 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "IAF110,Illegal access flag clear for peripheral 110" "B_0x0,B_0x1" bitfld.long 0xC 13. "IAF109,Illegal access flag clear for peripheral 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "IAF108,Illegal access flag clear for peripheral 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "IAF107,Illegal access flag clear for peripheral 107" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "IAF106,Illegal access flag clear for peripheral 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "IAF105,Illegal access flag clear for peripheral 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "IAF104,Illegal access flag clear for peripheral 104" "B_0x0,B_0x1" bitfld.long 0xC 7. "IAF103,Illegal access flag clear for peripheral 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "IAF102,Illegal access flag clear for peripheral 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "IAF101,Illegal access flag clear for peripheral 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "IAF100,Illegal access flag clear for peripheral 100" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "IAF99,Illegal access flag clear for peripheral 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "IAF98,Illegal access flag clear for peripheral 98" "B_0x0,B_0x1" bitfld.long 0xC 1. "IAF97,Illegal access flag clear for peripheral 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "IAF96,Illegal access flag clear for peripheral 96" "B_0x0,B_0x1" line.long 0x10 "IAC_ICR4,IAC interrupt clear register 4" bitfld.long 0x10 31. "IAF159,Illegal access flag clear for peripheral 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "IAF158,Illegal access flag clear for peripheral 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "IAF157,Illegal access flag clear for peripheral 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "IAF156,Illegal access flag clear for peripheral 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "IAF155,Illegal access flag clear for peripheral 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "IAF154,Illegal access flag clear for peripheral 154" "B_0x0,B_0x1" bitfld.long 0x10 25. "IAF153,Illegal access flag clear for peripheral 153" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "IAF152,Illegal access flag clear for peripheral 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "IAF151,Illegal access flag clear for peripheral 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "IAF150,Illegal access flag clear for peripheral 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "IAF149,Illegal access flag clear for peripheral 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "IAF148,Illegal access flag clear for peripheral 148" "B_0x0,B_0x1" bitfld.long 0x10 19. "IAF147,Illegal access flag clear for peripheral 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "IAF146,Illegal access flag clear for peripheral 146" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "IAF145,Illegal access flag clear for peripheral 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "IAF144,Illegal access flag clear for peripheral 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "IAF143,Illegal access flag clear for peripheral 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "IAF142,Illegal access flag clear for peripheral 142" "B_0x0,B_0x1" bitfld.long 0x10 13. "IAF141,Illegal access flag clear for peripheral 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "IAF140,Illegal access flag clear for peripheral 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "IAF139,Illegal access flag clear for peripheral 139" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "IAF138,Illegal access flag clear for peripheral 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "IAF137,Illegal access flag clear for peripheral 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "IAF136,Illegal access flag clear for peripheral 136" "B_0x0,B_0x1" bitfld.long 0x10 7. "IAF135,Illegal access flag clear for peripheral 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "IAF134,Illegal access flag clear for peripheral 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "IAF133,Illegal access flag clear for peripheral 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "IAF132,Illegal access flag clear for peripheral 132" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "IAF131,Illegal access flag clear for peripheral 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "IAF130,Illegal access flag clear for peripheral 130" "B_0x0,B_0x1" bitfld.long 0x10 1. "IAF129,Illegal access flag clear for peripheral 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "IAF128,Illegal access flag clear for peripheral 128" "B_0x0,B_0x1" line.long 0x14 "IAC_ICR5,IAC interrupt clear register 5" bitfld.long 0x14 31. "IAF191,Illegal access flag clear for peripheral 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "IAF190,Illegal access flag clear for peripheral 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "IAF189,Illegal access flag clear for peripheral 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "IAF188,Illegal access flag clear for peripheral 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "IAF187,Illegal access flag clear for peripheral 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "IAF186,Illegal access flag clear for peripheral 186" "B_0x0,B_0x1" bitfld.long 0x14 25. "IAF185,Illegal access flag clear for peripheral 185" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "IAF184,Illegal access flag clear for peripheral 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "IAF183,Illegal access flag clear for peripheral 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "IAF182,Illegal access flag clear for peripheral 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "IAF181,Illegal access flag clear for peripheral 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "IAF180,Illegal access flag clear for peripheral 180" "B_0x0,B_0x1" bitfld.long 0x14 19. "IAF179,Illegal access flag clear for peripheral 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "IAF178,Illegal access flag clear for peripheral 178" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "IAF177,Illegal access flag clear for peripheral 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "IAF176,Illegal access flag clear for peripheral 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "IAF175,Illegal access flag clear for peripheral 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "IAF174,Illegal access flag clear for peripheral 174" "B_0x0,B_0x1" bitfld.long 0x14 13. "IAF173,Illegal access flag clear for peripheral 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "IAF172,Illegal access flag clear for peripheral 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "IAF171,Illegal access flag clear for peripheral 171" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "IAF170,Illegal access flag clear for peripheral 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "IAF169,Illegal access flag clear for peripheral 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "IAF168,Illegal access flag clear for peripheral 168" "B_0x0,B_0x1" bitfld.long 0x14 7. "IAF167,Illegal access flag clear for peripheral 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "IAF166,Illegal access flag clear for peripheral 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "IAF165,Illegal access flag clear for peripheral 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "IAF164,Illegal access flag clear for peripheral 164" "B_0x0,B_0x1" newline bitfld.long 0x14 3. "IAF163,Illegal access flag clear for peripheral 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "IAF162,Illegal access flag clear for peripheral 162" "B_0x0,B_0x1" bitfld.long 0x14 1. "IAF161,Illegal access flag clear for peripheral 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "IAF160,Illegal access flag clear for peripheral 160" "B_0x0,B_0x1" rgroup.long 0x36C++0x17 line.long 0x0 "IAC_IISR0,IAC ILAC input status register 0" bitfld.long 0x0 31. "ILACIN31,Illegal access input 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "ILACIN30,Illegal access input 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "ILACIN29,Illegal access input 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "ILACIN28,Illegal access input 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "ILACIN27,Illegal access input 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "ILACIN26,Illegal access input 26" "B_0x0,B_0x1" bitfld.long 0x0 25. "ILACIN25,Illegal access input 25" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "ILACIN24,Illegal access input 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "ILACIN23,Illegal access input 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "ILACIN22,Illegal access input 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "ILACIN21,Illegal access input 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "ILACIN20,Illegal access input 20" "B_0x0,B_0x1" bitfld.long 0x0 19. "ILACIN19,Illegal access input 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "ILACIN18,Illegal access input 18" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "ILACIN17,Illegal access input 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "ILACIN16,Illegal access input 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "ILACIN15,Illegal access input 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "ILACIN14,Illegal access input 14" "B_0x0,B_0x1" bitfld.long 0x0 13. "ILACIN13,Illegal access input 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "ILACIN12,Illegal access input 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "ILACIN11,Illegal access input 11" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "ILACIN10,Illegal access input 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "ILACIN9,Illegal access input 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "ILACIN8,Illegal access input 8" "B_0x0,B_0x1" bitfld.long 0x0 7. "ILACIN7,Illegal access input 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "ILACIN6,Illegal access input 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "ILACIN5,Illegal access input 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "ILACIN4,Illegal access input 4" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "ILACIN3,Illegal access input 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "ILACIN2,Illegal access input 2" "B_0x0,B_0x1" bitfld.long 0x0 1. "ILACIN1,Illegal access input 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "ILACIN0,Illegal access input 0" "B_0x0,B_0x1" line.long 0x4 "IAC_IISR1,IAC ILAC input status register 1" bitfld.long 0x4 31. "ILACIN63,Illegal access input 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "ILACIN62,Illegal access input 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "ILACIN61,Illegal access input 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "ILACIN60,Illegal access input 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "ILACIN59,Illegal access input 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "ILACIN58,Illegal access input 58" "B_0x0,B_0x1" bitfld.long 0x4 25. "ILACIN57,Illegal access input 57" "B_0x0,B_0x1" newline bitfld.long 0x4 24. "ILACIN56,Illegal access input 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "ILACIN55,Illegal access input 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "ILACIN54,Illegal access input 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "ILACIN53,Illegal access input 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "ILACIN52,Illegal access input 52" "B_0x0,B_0x1" bitfld.long 0x4 19. "ILACIN51,Illegal access input 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "ILACIN50,Illegal access input 50" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "ILACIN49,Illegal access input 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "ILACIN48,Illegal access input 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "ILACIN47,Illegal access input 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "ILACIN46,Illegal access input 46" "B_0x0,B_0x1" bitfld.long 0x4 13. "ILACIN45,Illegal access input 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "ILACIN44,Illegal access input 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "ILACIN43,Illegal access input 43" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "ILACIN42,Illegal access input 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "ILACIN41,Illegal access input 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "ILACIN40,Illegal access input 40" "B_0x0,B_0x1" bitfld.long 0x4 7. "ILACIN39,Illegal access input 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "ILACIN38,Illegal access input 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "ILACIN37,Illegal access input 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "ILACIN36,Illegal access input 36" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "ILACIN35,Illegal access input 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "ILACIN34,Illegal access input 34" "B_0x0,B_0x1" bitfld.long 0x4 1. "ILACIN33,Illegal access input 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "ILACIN32,Illegal access input 32" "B_0x0,B_0x1" line.long 0x8 "IAC_IISR2,IAC ILAC input status register 2" bitfld.long 0x8 31. "ILACIN95,Illegal access input 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "ILACIN94,Illegal access input 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "ILACIN93,Illegal access input 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "ILACIN92,Illegal access input 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "ILACIN91,Illegal access input 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "ILACIN90,Illegal access input 90" "B_0x0,B_0x1" bitfld.long 0x8 25. "ILACIN89,Illegal access input 89" "B_0x0,B_0x1" newline bitfld.long 0x8 24. "ILACIN88,Illegal access input 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "ILACIN87,Illegal access input 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "ILACIN86,Illegal access input 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "ILACIN85,Illegal access input 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "ILACIN84,Illegal access input 84" "B_0x0,B_0x1" bitfld.long 0x8 19. "ILACIN83,Illegal access input 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "ILACIN82,Illegal access input 82" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "ILACIN81,Illegal access input 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "ILACIN80,Illegal access input 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "ILACIN79,Illegal access input 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "ILACIN78,Illegal access input 78" "B_0x0,B_0x1" bitfld.long 0x8 13. "ILACIN77,Illegal access input 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "ILACIN76,Illegal access input 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "ILACIN75,Illegal access input 75" "B_0x0,B_0x1" newline bitfld.long 0x8 10. "ILACIN74,Illegal access input 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "ILACIN73,Illegal access input 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "ILACIN72,Illegal access input 72" "B_0x0,B_0x1" bitfld.long 0x8 7. "ILACIN71,Illegal access input 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "ILACIN70,Illegal access input 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "ILACIN69,Illegal access input 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "ILACIN68,Illegal access input 68" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "ILACIN67,Illegal access input 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "ILACIN66,Illegal access input 66" "B_0x0,B_0x1" bitfld.long 0x8 1. "ILACIN65,Illegal access input 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "ILACIN64,Illegal access input 64" "B_0x0,B_0x1" line.long 0xC "IAC_IISR3,IAC ILAC input status register 3" bitfld.long 0xC 31. "ILACIN127,Illegal access input 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "ILACIN126,Illegal access input 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "ILACIN125,Illegal access input 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "ILACIN124,Illegal access input 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "ILACIN123,Illegal access input 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "ILACIN122,Illegal access input 122" "B_0x0,B_0x1" bitfld.long 0xC 25. "ILACIN121,Illegal access input 121" "B_0x0,B_0x1" newline bitfld.long 0xC 24. "ILACIN120,Illegal access input 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "ILACIN119,Illegal access input 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "ILACIN118,Illegal access input 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "ILACIN117,Illegal access input 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "ILACIN116,Illegal access input 116" "B_0x0,B_0x1" bitfld.long 0xC 19. "ILACIN115,Illegal access input 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "ILACIN114,Illegal access input 114" "B_0x0,B_0x1" newline bitfld.long 0xC 17. "ILACIN113,Illegal access input 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "ILACIN112,Illegal access input 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "ILACIN111,Illegal access input 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "ILACIN110,Illegal access input 110" "B_0x0,B_0x1" bitfld.long 0xC 13. "ILACIN109,Illegal access input 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "ILACIN108,Illegal access input 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "ILACIN107,Illegal access input 107" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "ILACIN106,Illegal access input 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "ILACIN105,Illegal access input 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "ILACIN104,Illegal access input 104" "B_0x0,B_0x1" bitfld.long 0xC 7. "ILACIN103,Illegal access input 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "ILACIN102,Illegal access input 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "ILACIN101,Illegal access input 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "ILACIN100,Illegal access input 100" "B_0x0,B_0x1" newline bitfld.long 0xC 3. "ILACIN99,Illegal access input 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "ILACIN98,Illegal access input 98" "B_0x0,B_0x1" bitfld.long 0xC 1. "ILACIN97,Illegal access input 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "ILACIN96,Illegal access input 96" "B_0x0,B_0x1" line.long 0x10 "IAC_IISR4,IAC ILAC input status register 4" bitfld.long 0x10 31. "ILACIN159,Illegal access input 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "ILACIN158,Illegal access input 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "ILACIN157,Illegal access input 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "ILACIN156,Illegal access input 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "ILACIN155,Illegal access input 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "ILACIN154,Illegal access input 154" "B_0x0,B_0x1" bitfld.long 0x10 25. "ILACIN153,Illegal access input 153" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "ILACIN152,Illegal access input 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "ILACIN151,Illegal access input 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "ILACIN150,Illegal access input 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "ILACIN149,Illegal access input 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "ILACIN148,Illegal access input 148" "B_0x0,B_0x1" bitfld.long 0x10 19. "ILACIN147,Illegal access input 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "ILACIN146,Illegal access input 146" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "ILACIN145,Illegal access input 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "ILACIN144,Illegal access input 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "ILACIN143,Illegal access input 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "ILACIN142,Illegal access input 142" "B_0x0,B_0x1" bitfld.long 0x10 13. "ILACIN141,Illegal access input 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "ILACIN140,Illegal access input 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "ILACIN139,Illegal access input 139" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "ILACIN138,Illegal access input 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "ILACIN137,Illegal access input 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "ILACIN136,Illegal access input 136" "B_0x0,B_0x1" bitfld.long 0x10 7. "ILACIN135,Illegal access input 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "ILACIN134,Illegal access input 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "ILACIN133,Illegal access input 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "ILACIN132,Illegal access input 132" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "ILACIN131,Illegal access input 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "ILACIN130,Illegal access input 130" "B_0x0,B_0x1" bitfld.long 0x10 1. "ILACIN129,Illegal access input 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "ILACIN128,Illegal access input 128" "B_0x0,B_0x1" line.long 0x14 "IAC_IISR5,IAC ILAC input status register 5" bitfld.long 0x14 31. "ILACIN191,Illegal access input 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "ILACIN190,Illegal access input 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "ILACIN189,Illegal access input 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "ILACIN188,Illegal access input 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "ILACIN187,Illegal access input 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "ILACIN186,Illegal access input 186" "B_0x0,B_0x1" bitfld.long 0x14 25. "ILACIN185,Illegal access input 185" "B_0x0,B_0x1" newline bitfld.long 0x14 24. "ILACIN184,Illegal access input 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "ILACIN183,Illegal access input 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "ILACIN182,Illegal access input 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "ILACIN181,Illegal access input 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "ILACIN180,Illegal access input 180" "B_0x0,B_0x1" bitfld.long 0x14 19. "ILACIN179,Illegal access input 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "ILACIN178,Illegal access input 178" "B_0x0,B_0x1" newline bitfld.long 0x14 17. "ILACIN177,Illegal access input 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "ILACIN176,Illegal access input 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "ILACIN175,Illegal access input 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "ILACIN174,Illegal access input 174" "B_0x0,B_0x1" bitfld.long 0x14 13. "ILACIN173,Illegal access input 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "ILACIN172,Illegal access input 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "ILACIN171,Illegal access input 171" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "ILACIN170,Illegal access input 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "ILACIN169,Illegal access input 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "ILACIN168,Illegal access input 168" "B_0x0,B_0x1" bitfld.long 0x14 7. "ILACIN167,Illegal access input 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "ILACIN166,Illegal access input 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "ILACIN165,Illegal access input 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "ILACIN164,Illegal access input 164" "B_0x0,B_0x1" newline bitfld.long 0x14 3. "ILACIN163,Illegal access input 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "ILACIN162,Illegal access input 162" "B_0x0,B_0x1" bitfld.long 0x14 1. "ILACIN161,Illegal access input 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "ILACIN160,Illegal access input 160" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "IAC_HWCFGR2,IAC hardware configuration register 2" hexmask.long.byte 0x0 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0x4 "IAC_HWCFGR1,IAC hardware configuration register 1" hexmask.long.word 0x4 16.--24. 1. "CFG5,Hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,Hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x4 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0x8 "IAC_VERR,IAC version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,IAC major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,IAC minor revision" line.long 0xC "IAC_IPIDR,IAC identification register" hexmask.long 0xC 0.--31. 1. "ID,IAC identification code" line.long 0x10 "IAC_SIDR,IAC size identification register" hexmask.long 0x10 0.--31. 1. "SID,IAC size identification code" tree.end tree.end tree "ICACHE (Instruction Cache)" base ad:0x0 tree "ICACHE" base ad:0x40470000 group.long 0x0++0x3 line.long 0x0 "ICACHE_CR,ICACHE control register" bitfld.long 0x0 19. "MISSMRST,miss monitor reset" "B_0x0,B_0x1" bitfld.long 0x0 18. "HITMRST,hit monitor reset" "B_0x0,B_0x1" bitfld.long 0x0 17. "MISSMEN,miss monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "HITMEN,hit monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "WAYSEL,cache associativity mode selection" "B_0x0,B_0x1" bitfld.long 0x0 1. "CACHEINV,cache invalidation" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,enable" "B_0x0,B_0x1" rgroup.long 0x4++0x3 line.long 0x0 "ICACHE_SR,ICACHE status register" bitfld.long 0x0 2. "ERRF,cache error flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "BSYENDF,busy end flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "BUSYF,busy flag" "B_0x0,B_0x1" group.long 0x8++0x3 line.long 0x0 "ICACHE_IER,ICACHE interrupt enable register" bitfld.long 0x0 2. "ERRIE,interrupt enable on cache error" "B_0x0,B_0x1" bitfld.long 0x0 1. "BSYENDIE,interrupt enable on busy end" "B_0x0,B_0x1" wgroup.long 0xC++0x3 line.long 0x0 "ICACHE_FCR,ICACHE flag clear register" bitfld.long 0x0 2. "CERRF,clear cache error flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "CBSYENDF,clear busy end flag" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "ICACHE_HMONR,ICACHE hit monitor register" hexmask.long 0x0 0.--31. 1. "HITMON,cache hit monitor counter" line.long 0x4 "ICACHE_MMONR,ICACHE miss monitor register" hexmask.long.word 0x4 0.--15. 1. "MISSMON,cache miss monitor counter" group.long 0x20++0xF line.long 0x0 "ICACHE_CRR0,ICACHE region 0 configuration register" bitfld.long 0x0 31. "HBURST,output burst type for region x" "B_0x0,B_0x1" bitfld.long 0x0 28. "MSTSEL,AHB cache master selection for region x" "B_0x0,B_0x1" hexmask.long.word 0x0 16.--26. 1. "REMAPADDR,remapped address for region x" bitfld.long 0x0 15. "REN,enable for region x" "B_0x0,B_0x1" bitfld.long 0x0 9.--11. "RSIZE,size for region x" "?,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0x0 0.--7. 1. "BASEADDR,base address for region x" line.long 0x4 "ICACHE_CRR1,ICACHE region 1 configuration register" bitfld.long 0x4 31. "HBURST,output burst type for region x" "B_0x0,B_0x1" bitfld.long 0x4 28. "MSTSEL,AHB cache master selection for region x" "B_0x0,B_0x1" hexmask.long.word 0x4 16.--26. 1. "REMAPADDR,remapped address for region x" bitfld.long 0x4 15. "REN,enable for region x" "B_0x0,B_0x1" bitfld.long 0x4 9.--11. "RSIZE,size for region x" "?,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0x4 0.--7. 1. "BASEADDR,base address for region x" line.long 0x8 "ICACHE_CRR2,ICACHE region 2 configuration register" bitfld.long 0x8 31. "HBURST,output burst type for region x" "B_0x0,B_0x1" bitfld.long 0x8 28. "MSTSEL,AHB cache master selection for region x" "B_0x0,B_0x1" hexmask.long.word 0x8 16.--26. 1. "REMAPADDR,remapped address for region x" bitfld.long 0x8 15. "REN,enable for region x" "B_0x0,B_0x1" bitfld.long 0x8 9.--11. "RSIZE,size for region x" "?,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0x8 0.--7. 1. "BASEADDR,base address for region x" line.long 0xC "ICACHE_CRR3,ICACHE region 3 configuration register" bitfld.long 0xC 31. "HBURST,output burst type for region x" "B_0x0,B_0x1" bitfld.long 0xC 28. "MSTSEL,AHB cache master selection for region x" "B_0x0,B_0x1" hexmask.long.word 0xC 16.--26. 1. "REMAPADDR,remapped address for region x" bitfld.long 0xC 15. "REN,enable for region x" "B_0x0,B_0x1" bitfld.long 0xC 9.--11. "RSIZE,size for region x" "?,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 0.--7. 1. "BASEADDR,base address for region x" rgroup.long 0x3F0++0xF line.long 0x0 "ICACHE_HWCFGR,ICACHE hardware configuration register" bitfld.long 0x0 31. "ECC,error detection and correction support" "B_0x0,B_0x1" bitfld.long 0x0 26.--27. "GSWIDTH,data size of the AHB slave interface" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 23.--24. "SMASTER,data size of the second AHB master interface (master2)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 21.--22. "FMASTER,data size of the first AHB master interface (master1)" "?,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--18. "REGION,number of regions that can be remapped" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.byte 0x0 12.--15. 1. "RANGE,range granularity of remapped memory regions" bitfld.long 0x0 9.--10. "LWIDTH,cache line width" "?,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 4.--6. "SIZE,cache size" "?,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 0.--1. "WAYS,cache associativity number of ways" "?,B_0x1,B_0x2,?" line.long 0x4 "ICACHE_VERR,ICACHE version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,ICACHE major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,ICACHE minor revision" line.long 0x8 "ICACHE_IPIDR,ICACHE identification register" hexmask.long 0x8 0.--31. 1. "ID,ICACHE identification" line.long 0xC "ICACHE_SIDR,ICACHE size identification register" hexmask.long 0xC 0.--31. 1. "SID,ICACHE address space size identification" tree.end tree "ICACHE_S" base ad:0x50470000 group.long 0x0++0x3 line.long 0x0 "ICACHE_CR,ICACHE control register" bitfld.long 0x0 19. "MISSMRST,miss monitor reset" "B_0x0,B_0x1" bitfld.long 0x0 18. "HITMRST,hit monitor reset" "B_0x0,B_0x1" bitfld.long 0x0 17. "MISSMEN,miss monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "HITMEN,hit monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "WAYSEL,cache associativity mode selection" "B_0x0,B_0x1" bitfld.long 0x0 1. "CACHEINV,cache invalidation" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,enable" "B_0x0,B_0x1" rgroup.long 0x4++0x3 line.long 0x0 "ICACHE_SR,ICACHE status register" bitfld.long 0x0 2. "ERRF,cache error flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "BSYENDF,busy end flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "BUSYF,busy flag" "B_0x0,B_0x1" group.long 0x8++0x3 line.long 0x0 "ICACHE_IER,ICACHE interrupt enable register" bitfld.long 0x0 2. "ERRIE,interrupt enable on cache error" "B_0x0,B_0x1" bitfld.long 0x0 1. "BSYENDIE,interrupt enable on busy end" "B_0x0,B_0x1" wgroup.long 0xC++0x3 line.long 0x0 "ICACHE_FCR,ICACHE flag clear register" bitfld.long 0x0 2. "CERRF,clear cache error flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "CBSYENDF,clear busy end flag" "B_0x0,B_0x1" rgroup.long 0x10++0x7 line.long 0x0 "ICACHE_HMONR,ICACHE hit monitor register" hexmask.long 0x0 0.--31. 1. "HITMON,cache hit monitor counter" line.long 0x4 "ICACHE_MMONR,ICACHE miss monitor register" hexmask.long.word 0x4 0.--15. 1. "MISSMON,cache miss monitor counter" group.long 0x20++0xF line.long 0x0 "ICACHE_CRR0,ICACHE region 0 configuration register" bitfld.long 0x0 31. "HBURST,output burst type for region x" "B_0x0,B_0x1" bitfld.long 0x0 28. "MSTSEL,AHB cache master selection for region x" "B_0x0,B_0x1" hexmask.long.word 0x0 16.--26. 1. "REMAPADDR,remapped address for region x" bitfld.long 0x0 15. "REN,enable for region x" "B_0x0,B_0x1" bitfld.long 0x0 9.--11. "RSIZE,size for region x" "?,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0x0 0.--7. 1. "BASEADDR,base address for region x" line.long 0x4 "ICACHE_CRR1,ICACHE region 1 configuration register" bitfld.long 0x4 31. "HBURST,output burst type for region x" "B_0x0,B_0x1" bitfld.long 0x4 28. "MSTSEL,AHB cache master selection for region x" "B_0x0,B_0x1" hexmask.long.word 0x4 16.--26. 1. "REMAPADDR,remapped address for region x" bitfld.long 0x4 15. "REN,enable for region x" "B_0x0,B_0x1" bitfld.long 0x4 9.--11. "RSIZE,size for region x" "?,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0x4 0.--7. 1. "BASEADDR,base address for region x" line.long 0x8 "ICACHE_CRR2,ICACHE region 2 configuration register" bitfld.long 0x8 31. "HBURST,output burst type for region x" "B_0x0,B_0x1" bitfld.long 0x8 28. "MSTSEL,AHB cache master selection for region x" "B_0x0,B_0x1" hexmask.long.word 0x8 16.--26. 1. "REMAPADDR,remapped address for region x" bitfld.long 0x8 15. "REN,enable for region x" "B_0x0,B_0x1" bitfld.long 0x8 9.--11. "RSIZE,size for region x" "?,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0x8 0.--7. 1. "BASEADDR,base address for region x" line.long 0xC "ICACHE_CRR3,ICACHE region 3 configuration register" bitfld.long 0xC 31. "HBURST,output burst type for region x" "B_0x0,B_0x1" bitfld.long 0xC 28. "MSTSEL,AHB cache master selection for region x" "B_0x0,B_0x1" hexmask.long.word 0xC 16.--26. 1. "REMAPADDR,remapped address for region x" bitfld.long 0xC 15. "REN,enable for region x" "B_0x0,B_0x1" bitfld.long 0xC 9.--11. "RSIZE,size for region x" "?,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0xC 0.--7. 1. "BASEADDR,base address for region x" rgroup.long 0x3F0++0xF line.long 0x0 "ICACHE_HWCFGR,ICACHE hardware configuration register" bitfld.long 0x0 31. "ECC,error detection and correction support" "B_0x0,B_0x1" bitfld.long 0x0 26.--27. "GSWIDTH,data size of the AHB slave interface" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 23.--24. "SMASTER,data size of the second AHB master interface (master2)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 21.--22. "FMASTER,data size of the first AHB master interface (master1)" "?,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--18. "REGION,number of regions that can be remapped" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" hexmask.long.byte 0x0 12.--15. 1. "RANGE,range granularity of remapped memory regions" bitfld.long 0x0 9.--10. "LWIDTH,cache line width" "?,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 4.--6. "SIZE,cache size" "?,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 0.--1. "WAYS,cache associativity number of ways" "?,B_0x1,B_0x2,?" line.long 0x4 "ICACHE_VERR,ICACHE version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,ICACHE major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,ICACHE minor revision" line.long 0x8 "ICACHE_IPIDR,ICACHE identification register" hexmask.long 0x8 0.--31. 1. "ID,ICACHE identification" line.long 0xC "ICACHE_SIDR,ICACHE size identification register" hexmask.long 0xC 0.--31. 1. "SID,ICACHE address space size identification" tree.end tree.end endif tree "IPCC (Inter-Processor Communication Controller)" base ad:0x0 sif (cpuis("*CA35")||cpuis("*CM33F")) tree "IPCC" base ad:0x40490000 group.long 0x0++0xB line.long 0x0 "IPCC_C1CR,IPCC processor 1 control register" bitfld.long 0x0 17. "SECTXFIE,Processor 1 transmit channel free secure interrupt enable." "B_0x0,B_0x1" bitfld.long 0x0 16. "TXFIE,Processor 1 transmit channel free non-secure interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "SECRXOIE,Processor 1 receive channel occupied secure interrupt enable." "B_0x0,B_0x1" bitfld.long 0x0 0. "RXOIE,Processor 1 receive channel occupied interrupt enable" "B_0x0,B_0x1" line.long 0x4 "IPCC_C1MR,IPCC processor 1 mask register" bitfld.long 0x4 31. "CH16FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 30. "CH15FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 29. "CH14FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 28. "CH13FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 27. "CH12FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 26. "CH11FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 25. "CH10FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 24. "CH9FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 23. "CH8FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 22. "CH7FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 21. "CH6FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 20. "CH5FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 19. "CH4FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 18. "CH3FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 17. "CH2FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 16. "CH1FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 15. "CH16OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 14. "CH15OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 13. "CH14OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 12. "CH13OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 11. "CH12OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CH11OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 9. "CH10OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 8. "CH9OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 7. "CH8OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 6. "CH7OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 5. "CH6OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 4. "CH5OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 3. "CH4OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 2. "CH3OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 1. "CH2OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 0. "CH1OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x8 "IPCC_C1SCR,IPCC processor 1 status set clear register" bitfld.long 0x8 31. "CH16S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 30. "CH15S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 29. "CH14S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 28. "CH13S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 27. "CH12S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 26. "CH11S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 25. "CH10S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 24. "CH9S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 23. "CH8S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 22. "CH7S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 21. "CH6S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 20. "CH5S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 19. "CH4S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 18. "CH3S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 17. "CH2S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 16. "CH1S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 15. "CH16C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 14. "CH15C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 13. "CH14C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 12. "CH13C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 11. "CH12C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 10. "CH11C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 9. "CH10C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 8. "CH9C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 7. "CH8C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 6. "CH7C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 5. "CH6C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 4. "CH5C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CH4C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 2. "CH3C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 1. "CH2C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 0. "CH1C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" rgroup.long 0xC++0x3 line.long 0x0 "IPCC_C1TOC2SR,IPCC processor 1 to processor 2 status register" bitfld.long 0x0 15. "CH16F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 14. "CH15F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 13. "CH14F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 12. "CH13F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 11. "CH12F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 10. "CH11F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 9. "CH10F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x0 8. "CH9F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 7. "CH8F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 6. "CH7F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 5. "CH6F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 4. "CH5F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 3. "CH4F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 2. "CH3F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CH2F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 0. "CH1F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" group.long 0x10++0xB line.long 0x0 "IPCC_C2CR,IPCC processor 2 control register" bitfld.long 0x0 17. "SECTXFIE,Processor 2 secure transmit channel free interrupt enable." "B_0x0,B_0x1" bitfld.long 0x0 16. "TXFIE,Processor 2 transmit channel free interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "SECRXOIE,Processor 2 secure Receive channel occupied interrupt enable." "B_0x0,B_0x1" bitfld.long 0x0 0. "RXOIE,Processor 2 receive channel occupied interrupt enable" "B_0x0,B_0x1" line.long 0x4 "IPCC_C2MR,IPCC processor 2 mask register" bitfld.long 0x4 31. "CH16FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 30. "CH15FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 29. "CH14FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 28. "CH13FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 27. "CH12FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 26. "CH11FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 25. "CH10FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 24. "CH9FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 23. "CH8FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 22. "CH7FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 21. "CH6FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 20. "CH5FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 19. "CH4FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 18. "CH3FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 17. "CH2FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 16. "CH1FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 15. "CH16OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 14. "CH15OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 13. "CH14OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 12. "CH13OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 11. "CH12OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CH11OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 9. "CH10OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 8. "CH9OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 7. "CH8OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 6. "CH7OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 5. "CH6OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 4. "CH5OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 3. "CH4OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 2. "CH3OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 1. "CH2OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 0. "CH1OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x8 "IPCC_C2SCR,IPCC processor 2 status set clear register" bitfld.long 0x8 31. "CH16S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 30. "CH15S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 29. "CH14S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 28. "CH13S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 27. "CH12S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 26. "CH11S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 25. "CH10S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 24. "CH9S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 23. "CH8S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 22. "CH7S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 21. "CH6S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 20. "CH5S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 19. "CH4S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 18. "CH3S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 17. "CH2S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 16. "CH1S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 15. "CH16C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 14. "CH15C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 13. "CH14C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 12. "CH13C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 11. "CH12C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 10. "CH11C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 9. "CH10C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 8. "CH9C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 7. "CH8C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 6. "CH7C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 5. "CH6C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 4. "CH5C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CH4C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 2. "CH3C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 1. "CH2C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 0. "CH1C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "IPCC_C2TOC1SR,IPCC processor 2 to processor 1 status register" bitfld.long 0x0 15. "CH16F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 14. "CH15F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 13. "CH14F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 12. "CH13F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CH12F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CH11F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 9. "CH10F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "CH9F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 7. "CH8F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 6. "CH7F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 5. "CH6F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 4. "CH5F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 3. "CH4F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 2. "CH3F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CH2F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 0. "CH1F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" group.long 0x80++0xB line.long 0x0 "IPCC_C1SECCFGR,IPCC processor 1 security configuration register" bitfld.long 0x0 15. "CH16SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 14. "CH15SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 13. "CH14SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 12. "CH13SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 11. "CH12SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 10. "CH11SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 9. "CH10SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x0 8. "CH9SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 7. "CH8SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 6. "CH7SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 5. "CH6SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 4. "CH5SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 3. "CH4SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 2. "CH3SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CH2SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 0. "CH1SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x4 "IPCC_C1PRIVCFGR,IPCC processor 1 privilege configuration register" bitfld.long 0x4 15. "CH16PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 14. "CH15PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 13. "CH14PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 12. "CH13PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 11. "CH12PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 10. "CH11PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 9. "CH10PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 8. "CH9PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 7. "CH8PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 6. "CH7PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 5. "CH6PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 4. "CH5PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 3. "CH4PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 2. "CH3PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 1. "CH2PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 0. "CH1PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x8 "IPCC_C1CIDCFGR,IPCC processor 1 CID configuration register" hexmask.long.byte 0x8 4.--7. 1. "CID,Processor 1 CID domain identification" bitfld.long 0x8 0. "CFEN,CID filtering enabled for processor 1" "B_0x0,B_0x1" group.long 0x90++0xB line.long 0x0 "IPCC_C2SECCFGR,IPCC processor 2 security configuration register" bitfld.long 0x0 15. "CH16SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "CH15SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "CH14SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "CH13SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "CH12SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CH11SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CH10SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "CH9SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "CH8SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "CH7SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "CH6SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "CH5SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "CH4SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "CH3SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CH2SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CH1SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" line.long 0x4 "IPCC_C2PRIVCFGR,IPCC processor 2 privilege configuration register" bitfld.long 0x4 15. "CH16PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 14. "CH15PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 13. "CH14PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 12. "CH13PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 11. "CH12PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 10. "CH11PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 9. "CH10PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 8. "CH9PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 7. "CH8PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 6. "CH7PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 5. "CH6PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 4. "CH5PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 3. "CH4PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 2. "CH3PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 1. "CH2PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 0. "CH1PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x8 "IPCC_C2CIDCFGR,IPCC processor 2 CID configuration register" hexmask.long.byte 0x8 4.--7. 1. "CID,Processor 2 CID domain identification" bitfld.long 0x8 0. "CFEN,CID filtering enabled for processor 2" "B_0x0,B_0x1" rgroup.long 0x3F4++0xB line.long 0x0 "IPCC_VERR,IPCC version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,IPCC major revision number" hexmask.long.byte 0x0 0.--3. 1. "MINREV,IPCC minor revision number." line.long 0x4 "IPCC_IPIDR,IPCC identification register" hexmask.long 0x4 0.--31. 1. "IPID,IPCC identification." line.long 0x8 "IPCC_SIDR,IPCC size identification register" hexmask.long 0x8 0.--31. 1. "SID,IPCC size identification." tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "IPCC1_S" base ad:0x50490000 group.long 0x0++0xB line.long 0x0 "IPCC_C1CR,IPCC processor 1 control register" bitfld.long 0x0 17. "SECTXFIE,Processor 1 transmit channel free secure interrupt enable." "B_0x0,B_0x1" bitfld.long 0x0 16. "TXFIE,Processor 1 transmit channel free non-secure interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "SECRXOIE,Processor 1 receive channel occupied secure interrupt enable." "B_0x0,B_0x1" bitfld.long 0x0 0. "RXOIE,Processor 1 receive channel occupied interrupt enable" "B_0x0,B_0x1" line.long 0x4 "IPCC_C1MR,IPCC processor 1 mask register" bitfld.long 0x4 31. "CH16FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 30. "CH15FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 29. "CH14FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 28. "CH13FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 27. "CH12FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 26. "CH11FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 25. "CH10FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 24. "CH9FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 23. "CH8FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 22. "CH7FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 21. "CH6FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 20. "CH5FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 19. "CH4FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 18. "CH3FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 17. "CH2FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 16. "CH1FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 15. "CH16OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 14. "CH15OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 13. "CH14OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 12. "CH13OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 11. "CH12OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CH11OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 9. "CH10OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 8. "CH9OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 7. "CH8OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 6. "CH7OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 5. "CH6OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 4. "CH5OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 3. "CH4OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 2. "CH3OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 1. "CH2OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 0. "CH1OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x8 "IPCC_C1SCR,IPCC processor 1 status set clear register" bitfld.long 0x8 31. "CH16S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 30. "CH15S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 29. "CH14S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 28. "CH13S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 27. "CH12S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 26. "CH11S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 25. "CH10S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 24. "CH9S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 23. "CH8S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 22. "CH7S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 21. "CH6S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 20. "CH5S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 19. "CH4S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 18. "CH3S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 17. "CH2S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 16. "CH1S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 15. "CH16C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 14. "CH15C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 13. "CH14C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 12. "CH13C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 11. "CH12C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 10. "CH11C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 9. "CH10C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 8. "CH9C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 7. "CH8C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 6. "CH7C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 5. "CH6C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 4. "CH5C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CH4C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 2. "CH3C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 1. "CH2C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 0. "CH1C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" rgroup.long 0xC++0x3 line.long 0x0 "IPCC_C1TOC2SR,IPCC processor 1 to processor 2 status register" bitfld.long 0x0 15. "CH16F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 14. "CH15F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 13. "CH14F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 12. "CH13F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 11. "CH12F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 10. "CH11F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 9. "CH10F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x0 8. "CH9F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 7. "CH8F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 6. "CH7F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 5. "CH6F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 4. "CH5F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 3. "CH4F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 2. "CH3F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CH2F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 0. "CH1F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" group.long 0x10++0xB line.long 0x0 "IPCC_C2CR,IPCC processor 2 control register" bitfld.long 0x0 17. "SECTXFIE,Processor 2 secure transmit channel free interrupt enable." "B_0x0,B_0x1" bitfld.long 0x0 16. "TXFIE,Processor 2 transmit channel free interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "SECRXOIE,Processor 2 secure Receive channel occupied interrupt enable." "B_0x0,B_0x1" bitfld.long 0x0 0. "RXOIE,Processor 2 receive channel occupied interrupt enable" "B_0x0,B_0x1" line.long 0x4 "IPCC_C2MR,IPCC processor 2 mask register" bitfld.long 0x4 31. "CH16FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 30. "CH15FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 29. "CH14FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 28. "CH13FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 27. "CH12FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 26. "CH11FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 25. "CH10FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 24. "CH9FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 23. "CH8FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 22. "CH7FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 21. "CH6FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 20. "CH5FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 19. "CH4FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 18. "CH3FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 17. "CH2FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 16. "CH1FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 15. "CH16OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 14. "CH15OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 13. "CH14OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 12. "CH13OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 11. "CH12OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CH11OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 9. "CH10OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 8. "CH9OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 7. "CH8OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 6. "CH7OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 5. "CH6OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 4. "CH5OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 3. "CH4OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 2. "CH3OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 1. "CH2OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 0. "CH1OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x8 "IPCC_C2SCR,IPCC processor 2 status set clear register" bitfld.long 0x8 31. "CH16S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 30. "CH15S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 29. "CH14S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 28. "CH13S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 27. "CH12S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 26. "CH11S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 25. "CH10S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 24. "CH9S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 23. "CH8S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 22. "CH7S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 21. "CH6S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 20. "CH5S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 19. "CH4S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 18. "CH3S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 17. "CH2S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 16. "CH1S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 15. "CH16C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 14. "CH15C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 13. "CH14C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 12. "CH13C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 11. "CH12C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 10. "CH11C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 9. "CH10C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 8. "CH9C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 7. "CH8C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 6. "CH7C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 5. "CH6C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 4. "CH5C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CH4C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 2. "CH3C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 1. "CH2C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 0. "CH1C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "IPCC_C2TOC1SR,IPCC processor 2 to processor 1 status register" bitfld.long 0x0 15. "CH16F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 14. "CH15F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 13. "CH14F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 12. "CH13F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CH12F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CH11F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 9. "CH10F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "CH9F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 7. "CH8F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 6. "CH7F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 5. "CH6F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 4. "CH5F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 3. "CH4F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 2. "CH3F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CH2F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 0. "CH1F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" group.long 0x80++0xB line.long 0x0 "IPCC_C1SECCFGR,IPCC processor 1 security configuration register" bitfld.long 0x0 15. "CH16SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 14. "CH15SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 13. "CH14SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 12. "CH13SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 11. "CH12SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 10. "CH11SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 9. "CH10SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x0 8. "CH9SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 7. "CH8SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 6. "CH7SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 5. "CH6SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 4. "CH5SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 3. "CH4SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 2. "CH3SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CH2SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 0. "CH1SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x4 "IPCC_C1PRIVCFGR,IPCC processor 1 privilege configuration register" bitfld.long 0x4 15. "CH16PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 14. "CH15PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 13. "CH14PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 12. "CH13PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 11. "CH12PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 10. "CH11PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 9. "CH10PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 8. "CH9PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 7. "CH8PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 6. "CH7PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 5. "CH6PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 4. "CH5PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 3. "CH4PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 2. "CH3PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 1. "CH2PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 0. "CH1PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x8 "IPCC_C1CIDCFGR,IPCC processor 1 CID configuration register" hexmask.long.byte 0x8 4.--7. 1. "CID,Processor 1 CID domain identification" bitfld.long 0x8 0. "CFEN,CID filtering enabled for processor 1" "B_0x0,B_0x1" group.long 0x90++0xB line.long 0x0 "IPCC_C2SECCFGR,IPCC processor 2 security configuration register" bitfld.long 0x0 15. "CH16SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "CH15SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "CH14SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "CH13SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "CH12SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CH11SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CH10SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "CH9SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "CH8SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "CH7SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "CH6SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "CH5SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "CH4SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "CH3SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CH2SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CH1SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" line.long 0x4 "IPCC_C2PRIVCFGR,IPCC processor 2 privilege configuration register" bitfld.long 0x4 15. "CH16PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 14. "CH15PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 13. "CH14PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 12. "CH13PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 11. "CH12PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 10. "CH11PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 9. "CH10PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 8. "CH9PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 7. "CH8PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 6. "CH7PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 5. "CH6PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 4. "CH5PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 3. "CH4PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 2. "CH3PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 1. "CH2PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 0. "CH1PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x8 "IPCC_C2CIDCFGR,IPCC processor 2 CID configuration register" hexmask.long.byte 0x8 4.--7. 1. "CID,Processor 2 CID domain identification" bitfld.long 0x8 0. "CFEN,CID filtering enabled for processor 2" "B_0x0,B_0x1" rgroup.long 0x3F4++0xB line.long 0x0 "IPCC_VERR,IPCC version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,IPCC major revision number" hexmask.long.byte 0x0 0.--3. 1. "MINREV,IPCC minor revision number." line.long 0x4 "IPCC_IPIDR,IPCC identification register" hexmask.long 0x4 0.--31. 1. "IPID,IPCC identification." line.long 0x8 "IPCC_SIDR,IPCC size identification register" hexmask.long 0x8 0.--31. 1. "SID,IPCC size identification." tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "IPCC2" base ad:0x46250000 group.long 0x0++0xB line.long 0x0 "IPCC_C1CR,IPCC processor 1 control register" bitfld.long 0x0 17. "SECTXFIE,Processor 1 transmit channel free secure interrupt enable." "B_0x0,B_0x1" bitfld.long 0x0 16. "TXFIE,Processor 1 transmit channel free non-secure interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "SECRXOIE,Processor 1 receive channel occupied secure interrupt enable." "B_0x0,B_0x1" bitfld.long 0x0 0. "RXOIE,Processor 1 receive channel occupied interrupt enable" "B_0x0,B_0x1" line.long 0x4 "IPCC_C1MR,IPCC processor 1 mask register" bitfld.long 0x4 31. "CH16FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 30. "CH15FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 29. "CH14FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 28. "CH13FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 27. "CH12FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 26. "CH11FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 25. "CH10FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 24. "CH9FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 23. "CH8FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 22. "CH7FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 21. "CH6FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 20. "CH5FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 19. "CH4FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 18. "CH3FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 17. "CH2FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 16. "CH1FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 15. "CH16OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 14. "CH15OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 13. "CH14OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 12. "CH13OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 11. "CH12OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CH11OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 9. "CH10OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 8. "CH9OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 7. "CH8OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 6. "CH7OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 5. "CH6OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 4. "CH5OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 3. "CH4OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 2. "CH3OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 1. "CH2OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 0. "CH1OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x8 "IPCC_C1SCR,IPCC processor 1 status set clear register" bitfld.long 0x8 31. "CH16S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 30. "CH15S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 29. "CH14S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 28. "CH13S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 27. "CH12S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 26. "CH11S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 25. "CH10S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 24. "CH9S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 23. "CH8S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 22. "CH7S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 21. "CH6S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 20. "CH5S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 19. "CH4S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 18. "CH3S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 17. "CH2S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 16. "CH1S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 15. "CH16C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 14. "CH15C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 13. "CH14C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 12. "CH13C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 11. "CH12C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 10. "CH11C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 9. "CH10C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 8. "CH9C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 7. "CH8C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 6. "CH7C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 5. "CH6C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 4. "CH5C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CH4C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 2. "CH3C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 1. "CH2C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 0. "CH1C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" rgroup.long 0xC++0x3 line.long 0x0 "IPCC_C1TOC2SR,IPCC processor 1 to processor 2 status register" bitfld.long 0x0 15. "CH16F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 14. "CH15F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 13. "CH14F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 12. "CH13F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 11. "CH12F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 10. "CH11F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 9. "CH10F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x0 8. "CH9F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 7. "CH8F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 6. "CH7F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 5. "CH6F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 4. "CH5F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 3. "CH4F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 2. "CH3F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CH2F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 0. "CH1F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" group.long 0x10++0xB line.long 0x0 "IPCC_C2CR,IPCC processor 2 control register" bitfld.long 0x0 17. "SECTXFIE,Processor 2 secure transmit channel free interrupt enable." "B_0x0,B_0x1" bitfld.long 0x0 16. "TXFIE,Processor 2 transmit channel free interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "SECRXOIE,Processor 2 secure Receive channel occupied interrupt enable." "B_0x0,B_0x1" bitfld.long 0x0 0. "RXOIE,Processor 2 receive channel occupied interrupt enable" "B_0x0,B_0x1" line.long 0x4 "IPCC_C2MR,IPCC processor 2 mask register" bitfld.long 0x4 31. "CH16FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 30. "CH15FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 29. "CH14FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 28. "CH13FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 27. "CH12FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 26. "CH11FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 25. "CH10FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 24. "CH9FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 23. "CH8FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 22. "CH7FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 21. "CH6FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 20. "CH5FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 19. "CH4FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 18. "CH3FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 17. "CH2FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 16. "CH1FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 15. "CH16OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 14. "CH15OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 13. "CH14OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 12. "CH13OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 11. "CH12OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CH11OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 9. "CH10OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 8. "CH9OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 7. "CH8OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 6. "CH7OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 5. "CH6OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 4. "CH5OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 3. "CH4OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 2. "CH3OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 1. "CH2OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 0. "CH1OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x8 "IPCC_C2SCR,IPCC processor 2 status set clear register" bitfld.long 0x8 31. "CH16S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 30. "CH15S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 29. "CH14S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 28. "CH13S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 27. "CH12S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 26. "CH11S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 25. "CH10S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 24. "CH9S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 23. "CH8S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 22. "CH7S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 21. "CH6S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 20. "CH5S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 19. "CH4S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 18. "CH3S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 17. "CH2S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 16. "CH1S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 15. "CH16C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 14. "CH15C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 13. "CH14C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 12. "CH13C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 11. "CH12C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 10. "CH11C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 9. "CH10C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 8. "CH9C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 7. "CH8C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 6. "CH7C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 5. "CH6C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 4. "CH5C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CH4C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 2. "CH3C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 1. "CH2C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 0. "CH1C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "IPCC_C2TOC1SR,IPCC processor 2 to processor 1 status register" bitfld.long 0x0 15. "CH16F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 14. "CH15F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 13. "CH14F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 12. "CH13F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CH12F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CH11F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 9. "CH10F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "CH9F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 7. "CH8F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 6. "CH7F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 5. "CH6F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 4. "CH5F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 3. "CH4F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 2. "CH3F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CH2F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 0. "CH1F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" group.long 0x80++0xB line.long 0x0 "IPCC_C1SECCFGR,IPCC processor 1 security configuration register" bitfld.long 0x0 15. "CH16SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 14. "CH15SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 13. "CH14SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 12. "CH13SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 11. "CH12SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 10. "CH11SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 9. "CH10SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x0 8. "CH9SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 7. "CH8SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 6. "CH7SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 5. "CH6SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 4. "CH5SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 3. "CH4SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 2. "CH3SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CH2SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 0. "CH1SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x4 "IPCC_C1PRIVCFGR,IPCC processor 1 privilege configuration register" bitfld.long 0x4 15. "CH16PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 14. "CH15PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 13. "CH14PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 12. "CH13PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 11. "CH12PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 10. "CH11PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 9. "CH10PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 8. "CH9PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 7. "CH8PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 6. "CH7PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 5. "CH6PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 4. "CH5PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 3. "CH4PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 2. "CH3PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 1. "CH2PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 0. "CH1PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x8 "IPCC_C1CIDCFGR,IPCC processor 1 CID configuration register" hexmask.long.byte 0x8 4.--7. 1. "CID,Processor 1 CID domain identification" bitfld.long 0x8 0. "CFEN,CID filtering enabled for processor 1" "B_0x0,B_0x1" group.long 0x90++0xB line.long 0x0 "IPCC_C2SECCFGR,IPCC processor 2 security configuration register" bitfld.long 0x0 15. "CH16SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "CH15SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "CH14SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "CH13SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "CH12SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CH11SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CH10SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "CH9SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "CH8SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "CH7SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "CH6SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "CH5SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "CH4SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "CH3SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CH2SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CH1SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" line.long 0x4 "IPCC_C2PRIVCFGR,IPCC processor 2 privilege configuration register" bitfld.long 0x4 15. "CH16PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 14. "CH15PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 13. "CH14PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 12. "CH13PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 11. "CH12PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 10. "CH11PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 9. "CH10PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 8. "CH9PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 7. "CH8PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 6. "CH7PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 5. "CH6PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 4. "CH5PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 3. "CH4PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 2. "CH3PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 1. "CH2PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 0. "CH1PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x8 "IPCC_C2CIDCFGR,IPCC processor 2 CID configuration register" hexmask.long.byte 0x8 4.--7. 1. "CID,Processor 2 CID domain identification" bitfld.long 0x8 0. "CFEN,CID filtering enabled for processor 2" "B_0x0,B_0x1" rgroup.long 0x3F4++0xB line.long 0x0 "IPCC_VERR,IPCC version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,IPCC major revision number" hexmask.long.byte 0x0 0.--3. 1. "MINREV,IPCC minor revision number." line.long 0x4 "IPCC_IPIDR,IPCC identification register" hexmask.long 0x4 0.--31. 1. "IPID,IPCC identification." line.long 0x8 "IPCC_SIDR,IPCC size identification register" hexmask.long 0x8 0.--31. 1. "SID,IPCC size identification." tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "IPCC2_S" base ad:0x56250000 group.long 0x0++0xB line.long 0x0 "IPCC_C1CR,IPCC processor 1 control register" bitfld.long 0x0 17. "SECTXFIE,Processor 1 transmit channel free secure interrupt enable." "B_0x0,B_0x1" bitfld.long 0x0 16. "TXFIE,Processor 1 transmit channel free non-secure interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "SECRXOIE,Processor 1 receive channel occupied secure interrupt enable." "B_0x0,B_0x1" bitfld.long 0x0 0. "RXOIE,Processor 1 receive channel occupied interrupt enable" "B_0x0,B_0x1" line.long 0x4 "IPCC_C1MR,IPCC processor 1 mask register" bitfld.long 0x4 31. "CH16FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 30. "CH15FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 29. "CH14FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 28. "CH13FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 27. "CH12FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 26. "CH11FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 25. "CH10FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 24. "CH9FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 23. "CH8FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 22. "CH7FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 21. "CH6FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 20. "CH5FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 19. "CH4FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 18. "CH3FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 17. "CH2FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 16. "CH1FM,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 15. "CH16OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 14. "CH15OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 13. "CH14OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 12. "CH13OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 11. "CH12OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CH11OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 9. "CH10OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 8. "CH9OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 7. "CH8OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 6. "CH7OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 5. "CH6OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 4. "CH5OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 3. "CH4OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 2. "CH3OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 1. "CH2OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 0. "CH1OM,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x8 "IPCC_C1SCR,IPCC processor 1 status set clear register" bitfld.long 0x8 31. "CH16S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 30. "CH15S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 29. "CH14S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 28. "CH13S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 27. "CH12S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 26. "CH11S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 25. "CH10S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 24. "CH9S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 23. "CH8S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 22. "CH7S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 21. "CH6S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 20. "CH5S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 19. "CH4S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 18. "CH3S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 17. "CH2S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 16. "CH1S,Processor 1 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 15. "CH16C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 14. "CH15C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 13. "CH14C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 12. "CH13C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 11. "CH12C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 10. "CH11C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 9. "CH10C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 8. "CH9C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 7. "CH8C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 6. "CH7C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 5. "CH6C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 4. "CH5C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CH4C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 2. "CH3C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 1. "CH2C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 0. "CH1C,Processor 1 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" rgroup.long 0xC++0x3 line.long 0x0 "IPCC_C1TOC2SR,IPCC processor 1 to processor 2 status register" bitfld.long 0x0 15. "CH16F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 14. "CH15F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 13. "CH14F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 12. "CH13F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 11. "CH12F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 10. "CH11F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 9. "CH10F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x0 8. "CH9F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 7. "CH8F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 6. "CH7F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 5. "CH6F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 4. "CH5F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 3. "CH4F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 2. "CH3F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CH2F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 0. "CH1F,Processor 1 transmit to processor 2 receive channel n status flag before masking (n=16 to 1)." "B_0x0,B_0x1" group.long 0x10++0xB line.long 0x0 "IPCC_C2CR,IPCC processor 2 control register" bitfld.long 0x0 17. "SECTXFIE,Processor 2 secure transmit channel free interrupt enable." "B_0x0,B_0x1" bitfld.long 0x0 16. "TXFIE,Processor 2 transmit channel free interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "SECRXOIE,Processor 2 secure Receive channel occupied interrupt enable." "B_0x0,B_0x1" bitfld.long 0x0 0. "RXOIE,Processor 2 receive channel occupied interrupt enable" "B_0x0,B_0x1" line.long 0x4 "IPCC_C2MR,IPCC processor 2 mask register" bitfld.long 0x4 31. "CH16FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 30. "CH15FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 29. "CH14FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 28. "CH13FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 27. "CH12FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 26. "CH11FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 25. "CH10FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 24. "CH9FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 23. "CH8FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 22. "CH7FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 21. "CH6FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 20. "CH5FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 19. "CH4FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 18. "CH3FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 17. "CH2FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 16. "CH1FM,Processor 2 transmit channel n free interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 15. "CH16OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 14. "CH15OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 13. "CH14OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 12. "CH13OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 11. "CH12OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CH11OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 9. "CH10OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 8. "CH9OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 7. "CH8OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 6. "CH7OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 5. "CH6OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 4. "CH5OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 3. "CH4OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 2. "CH3OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 1. "CH2OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 0. "CH1OM,Processor 2 receive channel n occupied interrupt mask (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x8 "IPCC_C2SCR,IPCC processor 2 status set clear register" bitfld.long 0x8 31. "CH16S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 30. "CH15S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 29. "CH14S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 28. "CH13S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 27. "CH12S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 26. "CH11S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 25. "CH10S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 24. "CH9S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 23. "CH8S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 22. "CH7S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 21. "CH6S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 20. "CH5S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 19. "CH4S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 18. "CH3S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 17. "CH2S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 16. "CH1S,Processor 2 transmit channel n status set (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 15. "CH16C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 14. "CH15C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 13. "CH14C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 12. "CH13C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 11. "CH12C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 10. "CH11C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 9. "CH10C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 8. "CH9C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 7. "CH8C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 6. "CH7C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 5. "CH6C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 4. "CH5C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CH4C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 2. "CH3C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 1. "CH2C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x8 0. "CH1C,Processor 2 receive channel n status clear (n = 16 to 1)." "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "IPCC_C2TOC1SR,IPCC processor 2 to processor 1 status register" bitfld.long 0x0 15. "CH16F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 14. "CH15F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 13. "CH14F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 12. "CH13F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 11. "CH12F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 10. "CH11F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 9. "CH10F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "CH9F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 7. "CH8F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 6. "CH7F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 5. "CH6F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 4. "CH5F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 3. "CH4F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 2. "CH3F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CH2F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" bitfld.long 0x0 0. "CH1F,Processor 2 transmit to processor 1 receive channel n status flag before masking (n=16 to 1)" "B_0x0,B_0x1" group.long 0x80++0xB line.long 0x0 "IPCC_C1SECCFGR,IPCC processor 1 security configuration register" bitfld.long 0x0 15. "CH16SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 14. "CH15SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 13. "CH14SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 12. "CH13SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 11. "CH12SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 10. "CH11SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 9. "CH10SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x0 8. "CH9SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 7. "CH8SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 6. "CH7SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 5. "CH6SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 4. "CH5SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 3. "CH4SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 2. "CH3SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CH2SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x0 0. "CH1SEC,Processor 1 channel n security enable (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x4 "IPCC_C1PRIVCFGR,IPCC processor 1 privilege configuration register" bitfld.long 0x4 15. "CH16PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 14. "CH15PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 13. "CH14PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 12. "CH13PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 11. "CH12PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 10. "CH11PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 9. "CH10PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 8. "CH9PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 7. "CH8PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 6. "CH7PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 5. "CH6PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 4. "CH5PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 3. "CH4PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 2. "CH3PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 1. "CH2PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 0. "CH1PRIV,Processor 1 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x8 "IPCC_C1CIDCFGR,IPCC processor 1 CID configuration register" hexmask.long.byte 0x8 4.--7. 1. "CID,Processor 1 CID domain identification" bitfld.long 0x8 0. "CFEN,CID filtering enabled for processor 1" "B_0x0,B_0x1" group.long 0x90++0xB line.long 0x0 "IPCC_C2SECCFGR,IPCC processor 2 security configuration register" bitfld.long 0x0 15. "CH16SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "CH15SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "CH14SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "CH13SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "CH12SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CH11SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CH10SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "CH9SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "CH8SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "CH7SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "CH6SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "CH5SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "CH4SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "CH3SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "CH2SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CH1SEC,Processor 2 channel n security enable" "B_0x0,B_0x1" line.long 0x4 "IPCC_C2PRIVCFGR,IPCC processor 2 privilege configuration register" bitfld.long 0x4 15. "CH16PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 14. "CH15PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 13. "CH14PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 12. "CH13PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 11. "CH12PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 10. "CH11PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 9. "CH10PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 8. "CH9PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 7. "CH8PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 6. "CH7PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 5. "CH6PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 4. "CH5PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 3. "CH4PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 2. "CH3PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" newline bitfld.long 0x4 1. "CH2PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" bitfld.long 0x4 0. "CH1PRIV,Processor 2 channel n privilege enable (n = 16 to 1)." "B_0x0,B_0x1" line.long 0x8 "IPCC_C2CIDCFGR,IPCC processor 2 CID configuration register" hexmask.long.byte 0x8 4.--7. 1. "CID,Processor 2 CID domain identification" bitfld.long 0x8 0. "CFEN,CID filtering enabled for processor 2" "B_0x0,B_0x1" rgroup.long 0x3F4++0xB line.long 0x0 "IPCC_VERR,IPCC version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,IPCC major revision number" hexmask.long.byte 0x0 0.--3. 1. "MINREV,IPCC minor revision number." line.long 0x4 "IPCC_IPIDR,IPCC identification register" hexmask.long 0x4 0.--31. 1. "IPID,IPCC identification." line.long 0x8 "IPCC_SIDR,IPCC size identification register" hexmask.long 0x8 0.--31. 1. "SID,IPCC size identification." tree.end endif sif (cpuis("*CM0+")) tree "IPCC2" base ad:0x46250000 rgroup.long 0x3F0++0x3 line.long 0x0 "IPCC2_HWCFGR,IPCC hardware configuration register" hexmask.long.byte 0x0 24.--27. 1. "CIDWIDTH,CID bit field width range 0 to 12." hexmask.long.byte 0x0 16.--23. 1. "OPTBITS,reserved for future use" hexmask.long.byte 0x0 8.--11. 1. "SECCTRL,security options range 1 to 16." hexmask.long.byte 0x0 0.--7. 1. "CHANNELS,Number of channels per CPU supported by the IP range 1 to 16" tree.end endif tree.end tree "IWDG (Independent Watchdog)" base ad:0x0 sif (cpuis("*CA35")) tree "IWDG" base ad:0x44010000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end tree "IWDG1_S" base ad:0x54010000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end tree "IWDG2" base ad:0x44020000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end tree "IWDG2_S" base ad:0x54020000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end tree "IWDG3" base ad:0x44030000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end tree "IWDG3_S" base ad:0x54030000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end tree "IWDG4" base ad:0x44040000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end tree "IWDG4_S" base ad:0x54040000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end tree "IWDG5_S" base ad:0x56090000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end endif sif (cpuis("*CM33F")) tree "IWDG" base ad:0x44010000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end tree "IWDG2" base ad:0x44020000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end tree "IWDG3" base ad:0x44030000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end tree "IWDG4" base ad:0x44040000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end tree "IWDG5" base ad:0x46090000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end endif sif (cpuis("*CA35")||cpuis("*CM0+")) tree "IWDG5" base ad:0x46090000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" sif (cpuis("*CA35")) hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" endif sif (cpuis("*CM0+")) hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" endif hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" sif (cpuis("*CM0+")) wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" endif sif (cpuis("*CM0+")) rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog Early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" newline bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" endif sif (cpuis("*CM0+")) rgroup.long 0x3F0++0x3 line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" endif sif (cpuis("*CM0+")) rgroup.long 0x3F4++0x3 line.long 0x0 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x0 0.--3. 1. "MINREV,Minor revision" endif sif (cpuis("*CM0+")) rgroup.long 0x3F8++0x3 line.long 0x0 "IWDG_IDR,IWDG identification register" hexmask.long 0x0 0.--31. 1. "ID,IWDG identifier" endif sif (cpuis("*CM0+")) rgroup.long 0x3FC++0x3 line.long 0x0 "IWDG_SIDR,IWDG size identification register" hexmask.long 0x0 0.--31. 1. "SID,IWDG size identifier" endif tree.end endif sif (cpuis("*CM33F")) tree "IWDG1_S" base ad:0x54010000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end tree "IWDG2_S" base ad:0x54020000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end tree "IWDG3_S" base ad:0x54030000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end tree "IWDG4_S" base ad:0x54040000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end tree "IWDG5_S" base ad:0x56090000 wgroup.long 0x0++0x3 line.long 0x0 "IWDG_KR,IWDG key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)" group.long 0x4++0x7 line.long 0x0 "IWDG_PR,IWDG prescaler register" hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider" line.long 0x4 "IWDG_RLR,IWDG reload register" hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "IWDG_SR,IWDG status register" bitfld.long 0x0 15. "EWIF,Watchdog early interrupt flag" "0,1" bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1" bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1" group.long 0x10++0xB line.long 0x0 "IWDG_WINR,IWDG window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register" bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value" line.long 0x8 "IWDG_ICR,IWDG interrupt clear register" bitfld.long 0x8 15. "EWIC,Watchdog early interrupt acknowledge" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "IWDG_HWCFGR,IWDG hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "PR_DEFAULT,Prescaler default value" hexmask.long.byte 0x0 0.--3. 1. "WINDOW,Support of Window function" line.long 0x4 "IWDG_VERR,IWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IWDG minor revision" line.long 0x8 "IWDG_IDR,IWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,IWDG identifier" line.long 0xC "IWDG_SIDR,IWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,IWDG size identifier" tree.end endif tree.end tree "LPDMA (Low-Power Direct Memory Access Controller)" base ad:0x0 tree "LPDMA" base ad:0x46210000 group.long 0x0++0xB line.long 0x0 "LPDMA_SECCFGR,LPDMA secure configuration register" bitfld.long 0x0 3. "SEC3,secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,secure state of channel x" "B_0x0,B_0x1" line.long 0x4 "LPDMA_PRIVCFGR,LPDMA privileged configuration register" bitfld.long 0x4 3. "PRIV3,privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,privileged state of channel x" "B_0x0,B_0x1" line.long 0x8 "LPDMA_RCFGLOCKR,LPDMA configuration lock register" bitfld.long 0x8 3. "LOCK3,lock the configuration of LPDMA_SECCFGR.SECx LPDMA_PRIVCFGR.PRIVx and LPDMA_CxCIDCFGR until a global DMA reset" "B_0x0,B_0x1" bitfld.long 0x8 2. "LOCK2,lock the configuration of LPDMA_SECCFGR.SECx LPDMA_PRIVCFGR.PRIVx and LPDMA_CxCIDCFGR until a global DMA reset" "B_0x0,B_0x1" bitfld.long 0x8 1. "LOCK1,lock the configuration of LPDMA_SECCFGR.SECx LPDMA_PRIVCFGR.PRIVx and LPDMA_CxCIDCFGR until a global DMA reset" "B_0x0,B_0x1" bitfld.long 0x8 0. "LOCK0,lock the configuration of LPDMA_SECCFGR.SECx LPDMA_PRIVCFGR.PRIVx and LPDMA_CxCIDCFGR until a global DMA reset" "B_0x0,B_0x1" rgroup.long 0xC++0x7 line.long 0x0 "LPDMA_MISR,LPDMA nonsecure masked interrupt status register" bitfld.long 0x0 3. "MIS3,masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 2. "MIS2,masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 1. "MIS1,masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 0. "MIS0,masked interrupt status of channel x" "B_0x0,B_0x1" line.long 0x4 "LPDMA_SMISR,LPDMA secure masked interrupt status register" bitfld.long 0x4 3. "MIS3,masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 2. "MIS2,masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 1. "MIS1,masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 0. "MIS0,masked interrupt status of the secure channel x" "B_0x0,B_0x1" group.long 0x50++0xB line.long 0x0 "LPDMA_C0LBAR,LPDMA channel 0 linked-list base address register" hexmask.long.word 0x0 16.--31. 1. "LBA,linked-list base address of LPDMA channel x" line.long 0x4 "LPDMA_C0CIDCFGR,LPDMA channel 0 CID register" bitfld.long 0x4 19. "SEM_WLIST_CID3,white-listed CID3 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x4 18. "SEM_WLIST_CID2,white-listed CID2 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x4 17. "SEM_WLIST_CID1,white-listed CID1 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x4 16. "SEM_WLIST_CID0,white-listed CID0 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" newline bitfld.long 0x4 4.--5. "SCID,static CID selection to channel x" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1. "SEM_EN,semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0x8 "LPDMA_C0SEMCR,LPDMA channel 0 semaphore control register" rbitfld.long 0x8 4.--5. "SEM_CCID,current CID allocated to channel x in semaphore mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0. "SEM_MUTEX,mutex exclusion semaphore for the CID allocation of channel x (insemaphoremode)" "B_0x0,B_0x1" wgroup.long 0x5C++0x3 line.long 0x0 "LPDMA_C0FCR,LPDMA channel 0 flag clear register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x60++0x3 line.long 0x0 "LPDMA_C0SR,LPDMA channel 0 status register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "IDLEF,idle flag" "B_0x0,B_0x1" group.long 0x64++0x3 line.long 0x0 "LPDMA_C0CR,LPDMA channel 0 control register" bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x LPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,reset" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,enable" "B_0x0,B_0x1" group.long 0x90++0x13 line.long 0x0 "LPDMA_C0TR1,LPDMA channel 0 transfer register 1" bitfld.long 0x0 31. "DSEC,security attribute of the LPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 19. "DINC,destination incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 15. "SSEC,security attribute of the LPDMA transfer from the source" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "PAM,padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1" bitfld.long 0x0 3. "SINC,source incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "LPDMA_C0TR2,LPDMA channel 0 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,software request" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "REQSEL,DMA hardware request selection" line.long 0x8 "LPDMA_C0BR1,LPDMA channel 0 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source" line.long 0xC "LPDMA_C0SAR,LPDMA channel 0 source address register" hexmask.long 0xC 0.--31. 1. "SA,source address" line.long 0x10 "LPDMA_C0DAR,LPDMA channel 0 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0xCC++0xF line.long 0x0 "LPDMA_C0LLR,LPDMA channel 0 linked-list address register" bitfld.long 0x0 31. "UT1,Update LPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update LPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update LPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,update LPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update LPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update LPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "LPDMA_C1LBAR,LPDMA channel 1 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of LPDMA channel x" line.long 0x8 "LPDMA_C1CIDCFGR,LPDMA channel 1 CID register" bitfld.long 0x8 19. "SEM_WLIST_CID3,white-listed CID3 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 18. "SEM_WLIST_CID2,white-listed CID2 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,white-listed CID1 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,white-listed CID0 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--5. "SCID,static CID selection to channel x" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 1. "SEM_EN,semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "LPDMA_C1SEMCR,LPDMA channel 1 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,current CID allocated to channel x in semaphore mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0. "SEM_MUTEX,mutex exclusion semaphore for the CID allocation of channel x (insemaphoremode)" "B_0x0,B_0x1" wgroup.long 0xDC++0x3 line.long 0x0 "LPDMA_C1FCR,LPDMA channel 1 flag clear register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0xE0++0x3 line.long 0x0 "LPDMA_C1SR,LPDMA channel 1 status register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "IDLEF,idle flag" "B_0x0,B_0x1" group.long 0xE4++0x3 line.long 0x0 "LPDMA_C1CR,LPDMA channel 1 control register" bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x LPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,reset" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,enable" "B_0x0,B_0x1" group.long 0x110++0x13 line.long 0x0 "LPDMA_C1TR1,LPDMA channel 1 transfer register 1" bitfld.long 0x0 31. "DSEC,security attribute of the LPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 19. "DINC,destination incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 15. "SSEC,security attribute of the LPDMA transfer from the source" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "PAM,padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1" bitfld.long 0x0 3. "SINC,source incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "LPDMA_C1TR2,LPDMA channel 1 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,software request" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "REQSEL,DMA hardware request selection" line.long 0x8 "LPDMA_C1BR1,LPDMA channel 1 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source" line.long 0xC "LPDMA_C1SAR,LPDMA channel 1 source address register" hexmask.long 0xC 0.--31. 1. "SA,source address" line.long 0x10 "LPDMA_C1DAR,LPDMA channel 1 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x14C++0xF line.long 0x0 "LPDMA_C1LLR,LPDMA channel 1 linked-list address register" bitfld.long 0x0 31. "UT1,Update LPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update LPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update LPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,update LPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update LPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update LPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "LPDMA_C2LBAR,LPDMA channel 2 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of LPDMA channel x" line.long 0x8 "LPDMA_C2CIDCFGR,LPDMA channel 2 CID register" bitfld.long 0x8 19. "SEM_WLIST_CID3,white-listed CID3 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 18. "SEM_WLIST_CID2,white-listed CID2 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,white-listed CID1 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,white-listed CID0 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--5. "SCID,static CID selection to channel x" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 1. "SEM_EN,semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "LPDMA_C2SEMCR,LPDMA channel 2 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,current CID allocated to channel x in semaphore mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0. "SEM_MUTEX,mutex exclusion semaphore for the CID allocation of channel x (insemaphoremode)" "B_0x0,B_0x1" wgroup.long 0x15C++0x3 line.long 0x0 "LPDMA_C2FCR,LPDMA channel 2 flag clear register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x160++0x3 line.long 0x0 "LPDMA_C2SR,LPDMA channel 2 status register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "IDLEF,idle flag" "B_0x0,B_0x1" group.long 0x164++0x3 line.long 0x0 "LPDMA_C2CR,LPDMA channel 2 control register" bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x LPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,reset" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,enable" "B_0x0,B_0x1" group.long 0x190++0x13 line.long 0x0 "LPDMA_C2TR1,LPDMA channel 2 transfer register 1" bitfld.long 0x0 31. "DSEC,security attribute of the LPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 19. "DINC,destination incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 15. "SSEC,security attribute of the LPDMA transfer from the source" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "PAM,padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1" bitfld.long 0x0 3. "SINC,source incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "LPDMA_C2TR2,LPDMA channel 2 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,software request" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "REQSEL,DMA hardware request selection" line.long 0x8 "LPDMA_C2BR1,LPDMA channel 2 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source" line.long 0xC "LPDMA_C2SAR,LPDMA channel 2 source address register" hexmask.long 0xC 0.--31. 1. "SA,source address" line.long 0x10 "LPDMA_C2DAR,LPDMA channel 2 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x1CC++0xF line.long 0x0 "LPDMA_C2LLR,LPDMA channel 2 linked-list address register" bitfld.long 0x0 31. "UT1,Update LPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update LPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update LPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,update LPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update LPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update LPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "LPDMA_C3LBAR,LPDMA channel 3 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of LPDMA channel x" line.long 0x8 "LPDMA_C3CIDCFGR,LPDMA channel 3 CID register" bitfld.long 0x8 19. "SEM_WLIST_CID3,white-listed CID3 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 18. "SEM_WLIST_CID2,white-listed CID2 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,white-listed CID1 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,white-listed CID0 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--5. "SCID,static CID selection to channel x" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 1. "SEM_EN,semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "LPDMA_C3SEMCR,LPDMA channel 3 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,current CID allocated to channel x in semaphore mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0. "SEM_MUTEX,mutex exclusion semaphore for the CID allocation of channel x (insemaphoremode)" "B_0x0,B_0x1" wgroup.long 0x1DC++0x3 line.long 0x0 "LPDMA_C3FCR,LPDMA channel 3 flag clear register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x1E0++0x3 line.long 0x0 "LPDMA_C3SR,LPDMA channel 3 status register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "IDLEF,idle flag" "B_0x0,B_0x1" group.long 0x1E4++0x3 line.long 0x0 "LPDMA_C3CR,LPDMA channel 3 control register" bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x LPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,reset" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,enable" "B_0x0,B_0x1" group.long 0x210++0x13 line.long 0x0 "LPDMA_C3TR1,LPDMA channel 3 transfer register 1" bitfld.long 0x0 31. "DSEC,security attribute of the LPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 19. "DINC,destination incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 15. "SSEC,security attribute of the LPDMA transfer from the source" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "PAM,padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1" bitfld.long 0x0 3. "SINC,source incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "LPDMA_C3TR2,LPDMA channel 3 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,software request" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "REQSEL,DMA hardware request selection" line.long 0x8 "LPDMA_C3BR1,LPDMA channel 3 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source" line.long 0xC "LPDMA_C3SAR,LPDMA channel 3 source address register" hexmask.long 0xC 0.--31. 1. "SA,source address" line.long 0x10 "LPDMA_C3DAR,LPDMA channel 3 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x24C++0x3 line.long 0x0 "LPDMA_C3LLR,LPDMA channel 3 linked-list address register" bitfld.long 0x0 31. "UT1,Update LPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update LPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update LPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,update LPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update LPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update LPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure" rgroup.long 0xFC0++0x3F line.long 0x0 "LPDMA_HWCFGR13,LPDMA hardware configuration 13 register" bitfld.long 0x0 28. "G_PER_CTRL15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x0 24. "G_PER_CTRL14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x0 20. "G_PER_CTRL13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x0 16. "G_PER_CTRL12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "G_PER_CTRL11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x0 8. "G_PER_CTRL10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x0 4. "G_PER_CTRL9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x0 0. "G_PER_CTRL8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x4 "LPDMA_HWCFGR12,LPDMA hardware configuration 12 register" bitfld.long 0x4 28. "G_PER_CTRL7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x4 24. "G_PER_CTRL6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x4 20. "G_PER_CTRL5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x4 16. "G_PER_CTRL4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "G_PER_CTRL3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x4 8. "G_PER_CTRL2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x4 4. "G_PER_CTRL1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x4 0. "G_PER_CTRL0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x8 "LPDMA_HWCFGR11,LPDMA hardware configuration 11 register" bitfld.long 0x8 24. "G_TST_LL_IMPORT,master port for the link transfer (DFT purpose only)" "B_0x0,B_0x1" bitfld.long 0x8 20.--22. "G_NUM_RESYNC_FFS,number of resynchronization flip-flops in the range 2 to 6" "0,1,2,3,4,5,6,7" bitfld.long 0x8 16.--18. "G_CID_WIDTH,CID bus width in the range of 1 to 4" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 8.--13. 1. "G_SEC_OPTIONREG,secure optional register width in the range of 0 to 32" newline hexmask.long.byte 0x8 0.--5. 1. "G_NONSEC_OPTIONREG,nonsecure optional register width in the range of 0 to 32" line.long 0xC "LPDMA_HWCFGR10,LPDMA hardware configuration 10 register" bitfld.long 0xC 28.--29. "G_ADDRESSING15,DMA transfers type for the channel 15" "B_0x0,B_0x1,?,?" bitfld.long 0xC 24.--25. "G_ADDRESSING14,DMA transfers type for the channel 14" "B_0x0,B_0x1,?,?" bitfld.long 0xC 20.--21. "G_ADDRESSING13,DMA transfers type for the channel 13" "B_0x0,B_0x1,?,?" bitfld.long 0xC 16.--17. "G_ADDRESSING12,DMA transfers type for the channel 12" "B_0x0,B_0x1,?,?" newline bitfld.long 0xC 12.--13. "G_ADDRESSING11,DMA transfers type for the channel 11" "B_0x0,B_0x1,?,?" bitfld.long 0xC 8.--9. "G_ADDRESSING10,DMA transfers type for the channel 10" "B_0x0,B_0x1,?,?" bitfld.long 0xC 4.--5. "G_ADDRESSING9,DMA transfers type for the channel 9" "B_0x0,B_0x1,?,?" bitfld.long 0xC 0.--1. "G_ADDRESSING8,DMA transfers type for the channel 8" "B_0x0,B_0x1,?,?" line.long 0x10 "LPDMA_HWCFGR9,LPDMA hardware configuration 9 register" bitfld.long 0x10 28.--29. "G_ADDRESSING7,DMA transfers type for the channel 7" "B_0x0,B_0x1,?,?" bitfld.long 0x10 24.--25. "G_ADDRESSING6,DMA transfers type for the channel 6" "B_0x0,B_0x1,?,?" bitfld.long 0x10 20.--21. "G_ADDRESSING5,DMA transfers type for the channel 5" "B_0x0,B_0x1,?,?" bitfld.long 0x10 16.--17. "G_ADDRESSING4,DMA transfers type for the channel 4" "B_0x0,B_0x1,?,?" newline bitfld.long 0x10 12.--13. "G_ADDRESSING3,DMA transfers type for the channel 3" "B_0x0,B_0x1,?,?" bitfld.long 0x10 8.--9. "G_ADDRESSING2,DMA transfers type for the channel 2" "B_0x0,B_0x1,?,?" bitfld.long 0x10 4.--5. "G_ADDRESSING1,DMA transfers type for the channel 1" "B_0x0,B_0x1,?,?" bitfld.long 0x10 0.--1. "G_ADDRESSING0,DMA transfers type for the channel 0" "B_0x0,B_0x1,?,?" line.long 0x14 "LPDMA_HWCFGR8,LPDMA hardware configuration 8 register" bitfld.long 0x14 28. "G_LINKED_LIST15,DMA transfers type for the channel 15" "B_0x0,B_0x1" bitfld.long 0x14 24. "G_LINKED_LIST14,DMA transfers type for the channel 14" "B_0x0,B_0x1" bitfld.long 0x14 20. "G_LINKED_LIST13,DMA transfers type for the channel 13" "B_0x0,B_0x1" bitfld.long 0x14 16. "G_LINKED_LIST12,DMA transfers type for the channel 12" "B_0x0,B_0x1" newline bitfld.long 0x14 12. "G_LINKED_LIST11,DMA transfers type for the channel 11" "B_0x0,B_0x1" bitfld.long 0x14 8. "G_LINKED_LIST10,DMA transfers type for the channel 10" "B_0x0,B_0x1" bitfld.long 0x14 4. "G_LINKED_LIST9,DMA transfers type for the channel 9" "B_0x0,B_0x1" bitfld.long 0x14 0. "G_LINKED_LIST8,DMA transfers type for the channel 8" "B_0x0,B_0x1" line.long 0x18 "LPDMA_HWCFGR7,LPDMA hardware configuration 7 register" bitfld.long 0x18 28. "G_LINKED_LIST7,DMA transfers type for the channel 7" "B_0x0,B_0x1" bitfld.long 0x18 24. "G_LINKED_LIST6,DMA transfers type for the channel 6" "B_0x0,B_0x1" bitfld.long 0x18 20. "G_LINKED_LIST5,DMA transfers type for the channel 5" "B_0x0,B_0x1" bitfld.long 0x18 16. "G_LINKED_LIST4,DMA transfers type for the channel 4" "B_0x0,B_0x1" newline bitfld.long 0x18 12. "G_LINKED_LIST3,DMA transfers type for the channel 3" "B_0x0,B_0x1" bitfld.long 0x18 8. "G_LINKED_LIST2,DMA transfers type for the channel 2" "B_0x0,B_0x1" bitfld.long 0x18 4. "G_LINKED_LIST1,DMA transfers type for the channel 1" "B_0x0,B_0x1" bitfld.long 0x18 0. "G_LINKED_LIST0,DMA transfers type for the channel 0" "B_0x0,B_0x1" line.long 0x1C "LPDMA_HWCFGR6,LPDMA hardware configuration 6 register" bitfld.long 0x1C 28. "G_TRANSFERS15,DMA transfers type for the channel 15" "B_0x0,B_0x1" bitfld.long 0x1C 24. "G_TRANSFERS14,DMA transfers type for the channel 14" "B_0x0,B_0x1" bitfld.long 0x1C 20. "G_TRANSFERS13,DMA transfers type for the channel 13" "B_0x0,B_0x1" bitfld.long 0x1C 16. "G_TRANSFERS12,DMA transfers type for the channel 12" "B_0x0,B_0x1" newline bitfld.long 0x1C 12. "G_TRANSFERS11,DMA transfers type for the channel 11" "B_0x0,B_0x1" bitfld.long 0x1C 8. "G_TRANSFERS10,DMA transfers type for the channel 10" "B_0x0,B_0x1" bitfld.long 0x1C 4. "G_TRANSFERS9,DMA transfers type for the channel 9" "B_0x0,B_0x1" bitfld.long 0x1C 0. "G_TRANSFERS8,DMA transfers type for the channel 8" "B_0x0,B_0x1" line.long 0x20 "LPDMA_HWCFGR5,LPDMA hardware configuration 5 register" bitfld.long 0x20 28. "G_TRANSFERS7,DMA transfers type for the channel 7" "B_0x0,B_0x1" bitfld.long 0x20 24. "G_TRANSFERS6,DMA transfers type for the channel 6" "B_0x0,B_0x1" bitfld.long 0x20 20. "G_TRANSFERS5,DMA transfers type for the channel 6" "B_0x0,B_0x1" bitfld.long 0x20 16. "G_TRANSFERS4,DMA transfers type for the channel 4" "B_0x0,B_0x1" newline bitfld.long 0x20 12. "G_TRANSFERS3,DMA transfers type for the channel 3" "B_0x0,B_0x1" bitfld.long 0x20 8. "G_TRANSFERS2,DMA transfers type for the channel 2" "B_0x0,B_0x1" bitfld.long 0x20 4. "G_TRANSFERS1,DMA transfers type for the channel 1" "B_0x0,B_0x1" bitfld.long 0x20 0. "G_TRANSFERS0,DMA transfers type for the channel 0" "B_0x0,B_0x1" line.long 0x24 "LPDMA_HWCFGR4,LPDMA hardware configuration 4 register" bitfld.long 0x24 28.--30. "G_FIFO_SIZE15,FIFO size for the channel 15 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 24.--26. "G_FIFO_SIZE14,FIFO size for the channel 14 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 20.--22. "G_FIFO_SIZE13,FIFO size for the channel 13 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 16.--18. "G_FIFO_SIZE12,FIFO size for the channel 12 (0 to 7):" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x24 12.--14. "G_FIFO_SIZE11,FIFO size for the channel 11 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 8.--10. "G_FIFO_SIZE10,FIFO size for the channel 10 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 4.--6. "G_FIFO_SIZE9,FIFO size for the channel 9 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 0.--2. "G_FIFO_SIZE8,FIFO size for the channel 8 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" line.long 0x28 "LPDMA_HWCFGR3,LPDMA hardware configuration 3 register" bitfld.long 0x28 28.--30. "G_FIFO_SIZE7,FIFO size for the channel 7 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 24.--26. "G_FIFO_SIZE6,FIFO size for the channel 6 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 20.--22. "G_FIFO_SIZE5,FIFO size for the channel 5 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 16.--18. "G_FIFO_SIZE4,FIFO size for the channel 4 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x28 12.--14. "G_FIFO_SIZE3,FIFO size for the channel 3 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 8.--10. "G_FIFO_SIZE2,FIFO size for the channel 2 (0 to 7):" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 4.--6. "G_FIFO_SIZE1,FIFO size for the channel 1 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 0.--2. "G_FIFO_SIZE0,FIFO size for the channel 0 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" line.long 0x2C "LPDMA_HWCFGR2,LPDMA hardware configuration 2 register" hexmask.long.byte 0x2C 8.--14. 1. "G_MAX_TRIG_ID,maximum trigger event ID (0 to 127)" hexmask.long.byte 0x2C 0.--7. 1. "G_MAX_REQ_ID,maximum peripheral request ID (0 to 255)" line.long 0x30 "LPDMA_HWCFGR1,LPDMA hardware configuration 1 register" bitfld.long 0x30 28.--29. "G_M1_DATA_WIDTH_ENC,master port 1 data bus width" "B_0x0,B_0x1,?,?" bitfld.long 0x30 24.--25. "G_M0_DATA_WIDTH_ENC,master port 0 data bus width" "B_0x0,B_0x1,?,?" hexmask.long.byte 0x30 20.--23. 1. "G_MAX_CID,maximum compartment ID (CID)" bitfld.long 0x30 16. "G_TRUSTZONE,TrustZone" "B_0x0,B_0x1" newline hexmask.long.byte 0x30 8.--12. 1. "G_NUM_CHANNELS,Number of DMA channels" bitfld.long 0x30 4. "G_PRIVILEGE,None" "B_0x0,B_0x1" bitfld.long 0x30 0.--2. "G_MASTER_PORTS,master ports type" "B_0x0,B_0x1,?,?,?,?,?,?" line.long 0x34 "LPDMA_VERR,LPDMA version register" hexmask.long.byte 0x34 4.--7. 1. "MAJREV,LPDMA major revision" hexmask.long.byte 0x34 0.--3. 1. "MINREV,LPDMA minor revision" line.long 0x38 "LPDMA_IPIDR,LPDMA identification register" hexmask.long 0x38 0.--31. 1. "ID,LPDMA identification" line.long 0x3C "LPDMA_SIDR,LPDMA size identification register" hexmask.long 0x3C 0.--31. 1. "SID,Size identification" tree.end sif (cpuis("*CA35")) tree "LPDMA_S" base ad:0x56210000 group.long 0x0++0xB line.long 0x0 "LPDMA_SECCFGR,LPDMA secure configuration register" bitfld.long 0x0 3. "SEC3,secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,secure state of channel x" "B_0x0,B_0x1" line.long 0x4 "LPDMA_PRIVCFGR,LPDMA privileged configuration register" bitfld.long 0x4 3. "PRIV3,privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,privileged state of channel x" "B_0x0,B_0x1" line.long 0x8 "LPDMA_RCFGLOCKR,LPDMA configuration lock register" bitfld.long 0x8 3. "LOCK3,lock the configuration of LPDMA_SECCFGR.SECx LPDMA_PRIVCFGR.PRIVx and LPDMA_CxCIDCFGR until a global DMA reset" "B_0x0,B_0x1" bitfld.long 0x8 2. "LOCK2,lock the configuration of LPDMA_SECCFGR.SECx LPDMA_PRIVCFGR.PRIVx and LPDMA_CxCIDCFGR until a global DMA reset" "B_0x0,B_0x1" bitfld.long 0x8 1. "LOCK1,lock the configuration of LPDMA_SECCFGR.SECx LPDMA_PRIVCFGR.PRIVx and LPDMA_CxCIDCFGR until a global DMA reset" "B_0x0,B_0x1" bitfld.long 0x8 0. "LOCK0,lock the configuration of LPDMA_SECCFGR.SECx LPDMA_PRIVCFGR.PRIVx and LPDMA_CxCIDCFGR until a global DMA reset" "B_0x0,B_0x1" rgroup.long 0xC++0x7 line.long 0x0 "LPDMA_MISR,LPDMA nonsecure masked interrupt status register" bitfld.long 0x0 3. "MIS3,masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 2. "MIS2,masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 1. "MIS1,masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 0. "MIS0,masked interrupt status of channel x" "B_0x0,B_0x1" line.long 0x4 "LPDMA_SMISR,LPDMA secure masked interrupt status register" bitfld.long 0x4 3. "MIS3,masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 2. "MIS2,masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 1. "MIS1,masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 0. "MIS0,masked interrupt status of the secure channel x" "B_0x0,B_0x1" group.long 0x50++0xB line.long 0x0 "LPDMA_C0LBAR,LPDMA channel 0 linked-list base address register" hexmask.long.word 0x0 16.--31. 1. "LBA,linked-list base address of LPDMA channel x" line.long 0x4 "LPDMA_C0CIDCFGR,LPDMA channel 0 CID register" bitfld.long 0x4 19. "SEM_WLIST_CID3,white-listed CID3 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x4 18. "SEM_WLIST_CID2,white-listed CID2 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x4 17. "SEM_WLIST_CID1,white-listed CID1 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x4 16. "SEM_WLIST_CID0,white-listed CID0 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" newline bitfld.long 0x4 4.--5. "SCID,static CID selection to channel x" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1. "SEM_EN,semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0x8 "LPDMA_C0SEMCR,LPDMA channel 0 semaphore control register" rbitfld.long 0x8 4.--5. "SEM_CCID,current CID allocated to channel x in semaphore mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0. "SEM_MUTEX,mutex exclusion semaphore for the CID allocation of channel x (insemaphoremode)" "B_0x0,B_0x1" wgroup.long 0x5C++0x3 line.long 0x0 "LPDMA_C0FCR,LPDMA channel 0 flag clear register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x60++0x3 line.long 0x0 "LPDMA_C0SR,LPDMA channel 0 status register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "IDLEF,idle flag" "B_0x0,B_0x1" group.long 0x64++0x3 line.long 0x0 "LPDMA_C0CR,LPDMA channel 0 control register" bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x LPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,reset" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,enable" "B_0x0,B_0x1" group.long 0x90++0x13 line.long 0x0 "LPDMA_C0TR1,LPDMA channel 0 transfer register 1" bitfld.long 0x0 31. "DSEC,security attribute of the LPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 19. "DINC,destination incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 15. "SSEC,security attribute of the LPDMA transfer from the source" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "PAM,padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1" bitfld.long 0x0 3. "SINC,source incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "LPDMA_C0TR2,LPDMA channel 0 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,software request" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "REQSEL,DMA hardware request selection" line.long 0x8 "LPDMA_C0BR1,LPDMA channel 0 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source" line.long 0xC "LPDMA_C0SAR,LPDMA channel 0 source address register" hexmask.long 0xC 0.--31. 1. "SA,source address" line.long 0x10 "LPDMA_C0DAR,LPDMA channel 0 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0xCC++0xF line.long 0x0 "LPDMA_C0LLR,LPDMA channel 0 linked-list address register" bitfld.long 0x0 31. "UT1,Update LPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update LPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update LPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,update LPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update LPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update LPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "LPDMA_C1LBAR,LPDMA channel 1 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of LPDMA channel x" line.long 0x8 "LPDMA_C1CIDCFGR,LPDMA channel 1 CID register" bitfld.long 0x8 19. "SEM_WLIST_CID3,white-listed CID3 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 18. "SEM_WLIST_CID2,white-listed CID2 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,white-listed CID1 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,white-listed CID0 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--5. "SCID,static CID selection to channel x" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 1. "SEM_EN,semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "LPDMA_C1SEMCR,LPDMA channel 1 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,current CID allocated to channel x in semaphore mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0. "SEM_MUTEX,mutex exclusion semaphore for the CID allocation of channel x (insemaphoremode)" "B_0x0,B_0x1" wgroup.long 0xDC++0x3 line.long 0x0 "LPDMA_C1FCR,LPDMA channel 1 flag clear register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0xE0++0x3 line.long 0x0 "LPDMA_C1SR,LPDMA channel 1 status register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "IDLEF,idle flag" "B_0x0,B_0x1" group.long 0xE4++0x3 line.long 0x0 "LPDMA_C1CR,LPDMA channel 1 control register" bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x LPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,reset" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,enable" "B_0x0,B_0x1" group.long 0x110++0x13 line.long 0x0 "LPDMA_C1TR1,LPDMA channel 1 transfer register 1" bitfld.long 0x0 31. "DSEC,security attribute of the LPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 19. "DINC,destination incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 15. "SSEC,security attribute of the LPDMA transfer from the source" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "PAM,padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1" bitfld.long 0x0 3. "SINC,source incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "LPDMA_C1TR2,LPDMA channel 1 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,software request" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "REQSEL,DMA hardware request selection" line.long 0x8 "LPDMA_C1BR1,LPDMA channel 1 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source" line.long 0xC "LPDMA_C1SAR,LPDMA channel 1 source address register" hexmask.long 0xC 0.--31. 1. "SA,source address" line.long 0x10 "LPDMA_C1DAR,LPDMA channel 1 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x14C++0xF line.long 0x0 "LPDMA_C1LLR,LPDMA channel 1 linked-list address register" bitfld.long 0x0 31. "UT1,Update LPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update LPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update LPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,update LPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update LPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update LPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "LPDMA_C2LBAR,LPDMA channel 2 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of LPDMA channel x" line.long 0x8 "LPDMA_C2CIDCFGR,LPDMA channel 2 CID register" bitfld.long 0x8 19. "SEM_WLIST_CID3,white-listed CID3 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 18. "SEM_WLIST_CID2,white-listed CID2 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,white-listed CID1 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,white-listed CID0 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--5. "SCID,static CID selection to channel x" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 1. "SEM_EN,semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "LPDMA_C2SEMCR,LPDMA channel 2 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,current CID allocated to channel x in semaphore mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0. "SEM_MUTEX,mutex exclusion semaphore for the CID allocation of channel x (insemaphoremode)" "B_0x0,B_0x1" wgroup.long 0x15C++0x3 line.long 0x0 "LPDMA_C2FCR,LPDMA channel 2 flag clear register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x160++0x3 line.long 0x0 "LPDMA_C2SR,LPDMA channel 2 status register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "IDLEF,idle flag" "B_0x0,B_0x1" group.long 0x164++0x3 line.long 0x0 "LPDMA_C2CR,LPDMA channel 2 control register" bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x LPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,reset" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,enable" "B_0x0,B_0x1" group.long 0x190++0x13 line.long 0x0 "LPDMA_C2TR1,LPDMA channel 2 transfer register 1" bitfld.long 0x0 31. "DSEC,security attribute of the LPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 19. "DINC,destination incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 15. "SSEC,security attribute of the LPDMA transfer from the source" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "PAM,padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1" bitfld.long 0x0 3. "SINC,source incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "LPDMA_C2TR2,LPDMA channel 2 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,software request" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "REQSEL,DMA hardware request selection" line.long 0x8 "LPDMA_C2BR1,LPDMA channel 2 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source" line.long 0xC "LPDMA_C2SAR,LPDMA channel 2 source address register" hexmask.long 0xC 0.--31. 1. "SA,source address" line.long 0x10 "LPDMA_C2DAR,LPDMA channel 2 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x1CC++0xF line.long 0x0 "LPDMA_C2LLR,LPDMA channel 2 linked-list address register" bitfld.long 0x0 31. "UT1,Update LPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update LPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update LPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,update LPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update LPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update LPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "LPDMA_C3LBAR,LPDMA channel 3 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of LPDMA channel x" line.long 0x8 "LPDMA_C3CIDCFGR,LPDMA channel 3 CID register" bitfld.long 0x8 19. "SEM_WLIST_CID3,white-listed CID3 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 18. "SEM_WLIST_CID2,white-listed CID2 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,white-listed CID1 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,white-listed CID0 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--5. "SCID,static CID selection to channel x" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 1. "SEM_EN,semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "LPDMA_C3SEMCR,LPDMA channel 3 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,current CID allocated to channel x in semaphore mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0. "SEM_MUTEX,mutex exclusion semaphore for the CID allocation of channel x (insemaphoremode)" "B_0x0,B_0x1" wgroup.long 0x1DC++0x3 line.long 0x0 "LPDMA_C3FCR,LPDMA channel 3 flag clear register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x1E0++0x3 line.long 0x0 "LPDMA_C3SR,LPDMA channel 3 status register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "IDLEF,idle flag" "B_0x0,B_0x1" group.long 0x1E4++0x3 line.long 0x0 "LPDMA_C3CR,LPDMA channel 3 control register" bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x LPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,reset" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,enable" "B_0x0,B_0x1" group.long 0x210++0x13 line.long 0x0 "LPDMA_C3TR1,LPDMA channel 3 transfer register 1" bitfld.long 0x0 31. "DSEC,security attribute of the LPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 19. "DINC,destination incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 15. "SSEC,security attribute of the LPDMA transfer from the source" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "PAM,padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1" bitfld.long 0x0 3. "SINC,source incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "LPDMA_C3TR2,LPDMA channel 3 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,software request" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "REQSEL,DMA hardware request selection" line.long 0x8 "LPDMA_C3BR1,LPDMA channel 3 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source" line.long 0xC "LPDMA_C3SAR,LPDMA channel 3 source address register" hexmask.long 0xC 0.--31. 1. "SA,source address" line.long 0x10 "LPDMA_C3DAR,LPDMA channel 3 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x24C++0x3 line.long 0x0 "LPDMA_C3LLR,LPDMA channel 3 linked-list address register" bitfld.long 0x0 31. "UT1,Update LPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update LPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update LPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,update LPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update LPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update LPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure" rgroup.long 0xFC0++0x3F line.long 0x0 "LPDMA_HWCFGR13,LPDMA hardware configuration 13 register" bitfld.long 0x0 28. "G_PER_CTRL15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x0 24. "G_PER_CTRL14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x0 20. "G_PER_CTRL13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x0 16. "G_PER_CTRL12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "G_PER_CTRL11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x0 8. "G_PER_CTRL10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x0 4. "G_PER_CTRL9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x0 0. "G_PER_CTRL8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x4 "LPDMA_HWCFGR12,LPDMA hardware configuration 12 register" bitfld.long 0x4 28. "G_PER_CTRL7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x4 24. "G_PER_CTRL6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x4 20. "G_PER_CTRL5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x4 16. "G_PER_CTRL4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "G_PER_CTRL3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x4 8. "G_PER_CTRL2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x4 4. "G_PER_CTRL1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x4 0. "G_PER_CTRL0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x8 "LPDMA_HWCFGR11,LPDMA hardware configuration 11 register" bitfld.long 0x8 24. "G_TST_LL_IMPORT,master port for the link transfer (DFT purpose only)" "B_0x0,B_0x1" bitfld.long 0x8 20.--22. "G_NUM_RESYNC_FFS,number of resynchronization flip-flops in the range 2 to 6" "0,1,2,3,4,5,6,7" bitfld.long 0x8 16.--18. "G_CID_WIDTH,CID bus width in the range of 1 to 4" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 8.--13. 1. "G_SEC_OPTIONREG,secure optional register width in the range of 0 to 32" newline hexmask.long.byte 0x8 0.--5. 1. "G_NONSEC_OPTIONREG,nonsecure optional register width in the range of 0 to 32" line.long 0xC "LPDMA_HWCFGR10,LPDMA hardware configuration 10 register" bitfld.long 0xC 28.--29. "G_ADDRESSING15,DMA transfers type for the channel 15" "B_0x0,B_0x1,?,?" bitfld.long 0xC 24.--25. "G_ADDRESSING14,DMA transfers type for the channel 14" "B_0x0,B_0x1,?,?" bitfld.long 0xC 20.--21. "G_ADDRESSING13,DMA transfers type for the channel 13" "B_0x0,B_0x1,?,?" bitfld.long 0xC 16.--17. "G_ADDRESSING12,DMA transfers type for the channel 12" "B_0x0,B_0x1,?,?" newline bitfld.long 0xC 12.--13. "G_ADDRESSING11,DMA transfers type for the channel 11" "B_0x0,B_0x1,?,?" bitfld.long 0xC 8.--9. "G_ADDRESSING10,DMA transfers type for the channel 10" "B_0x0,B_0x1,?,?" bitfld.long 0xC 4.--5. "G_ADDRESSING9,DMA transfers type for the channel 9" "B_0x0,B_0x1,?,?" bitfld.long 0xC 0.--1. "G_ADDRESSING8,DMA transfers type for the channel 8" "B_0x0,B_0x1,?,?" line.long 0x10 "LPDMA_HWCFGR9,LPDMA hardware configuration 9 register" bitfld.long 0x10 28.--29. "G_ADDRESSING7,DMA transfers type for the channel 7" "B_0x0,B_0x1,?,?" bitfld.long 0x10 24.--25. "G_ADDRESSING6,DMA transfers type for the channel 6" "B_0x0,B_0x1,?,?" bitfld.long 0x10 20.--21. "G_ADDRESSING5,DMA transfers type for the channel 5" "B_0x0,B_0x1,?,?" bitfld.long 0x10 16.--17. "G_ADDRESSING4,DMA transfers type for the channel 4" "B_0x0,B_0x1,?,?" newline bitfld.long 0x10 12.--13. "G_ADDRESSING3,DMA transfers type for the channel 3" "B_0x0,B_0x1,?,?" bitfld.long 0x10 8.--9. "G_ADDRESSING2,DMA transfers type for the channel 2" "B_0x0,B_0x1,?,?" bitfld.long 0x10 4.--5. "G_ADDRESSING1,DMA transfers type for the channel 1" "B_0x0,B_0x1,?,?" bitfld.long 0x10 0.--1. "G_ADDRESSING0,DMA transfers type for the channel 0" "B_0x0,B_0x1,?,?" line.long 0x14 "LPDMA_HWCFGR8,LPDMA hardware configuration 8 register" bitfld.long 0x14 28. "G_LINKED_LIST15,DMA transfers type for the channel 15" "B_0x0,B_0x1" bitfld.long 0x14 24. "G_LINKED_LIST14,DMA transfers type for the channel 14" "B_0x0,B_0x1" bitfld.long 0x14 20. "G_LINKED_LIST13,DMA transfers type for the channel 13" "B_0x0,B_0x1" bitfld.long 0x14 16. "G_LINKED_LIST12,DMA transfers type for the channel 12" "B_0x0,B_0x1" newline bitfld.long 0x14 12. "G_LINKED_LIST11,DMA transfers type for the channel 11" "B_0x0,B_0x1" bitfld.long 0x14 8. "G_LINKED_LIST10,DMA transfers type for the channel 10" "B_0x0,B_0x1" bitfld.long 0x14 4. "G_LINKED_LIST9,DMA transfers type for the channel 9" "B_0x0,B_0x1" bitfld.long 0x14 0. "G_LINKED_LIST8,DMA transfers type for the channel 8" "B_0x0,B_0x1" line.long 0x18 "LPDMA_HWCFGR7,LPDMA hardware configuration 7 register" bitfld.long 0x18 28. "G_LINKED_LIST7,DMA transfers type for the channel 7" "B_0x0,B_0x1" bitfld.long 0x18 24. "G_LINKED_LIST6,DMA transfers type for the channel 6" "B_0x0,B_0x1" bitfld.long 0x18 20. "G_LINKED_LIST5,DMA transfers type for the channel 5" "B_0x0,B_0x1" bitfld.long 0x18 16. "G_LINKED_LIST4,DMA transfers type for the channel 4" "B_0x0,B_0x1" newline bitfld.long 0x18 12. "G_LINKED_LIST3,DMA transfers type for the channel 3" "B_0x0,B_0x1" bitfld.long 0x18 8. "G_LINKED_LIST2,DMA transfers type for the channel 2" "B_0x0,B_0x1" bitfld.long 0x18 4. "G_LINKED_LIST1,DMA transfers type for the channel 1" "B_0x0,B_0x1" bitfld.long 0x18 0. "G_LINKED_LIST0,DMA transfers type for the channel 0" "B_0x0,B_0x1" line.long 0x1C "LPDMA_HWCFGR6,LPDMA hardware configuration 6 register" bitfld.long 0x1C 28. "G_TRANSFERS15,DMA transfers type for the channel 15" "B_0x0,B_0x1" bitfld.long 0x1C 24. "G_TRANSFERS14,DMA transfers type for the channel 14" "B_0x0,B_0x1" bitfld.long 0x1C 20. "G_TRANSFERS13,DMA transfers type for the channel 13" "B_0x0,B_0x1" bitfld.long 0x1C 16. "G_TRANSFERS12,DMA transfers type for the channel 12" "B_0x0,B_0x1" newline bitfld.long 0x1C 12. "G_TRANSFERS11,DMA transfers type for the channel 11" "B_0x0,B_0x1" bitfld.long 0x1C 8. "G_TRANSFERS10,DMA transfers type for the channel 10" "B_0x0,B_0x1" bitfld.long 0x1C 4. "G_TRANSFERS9,DMA transfers type for the channel 9" "B_0x0,B_0x1" bitfld.long 0x1C 0. "G_TRANSFERS8,DMA transfers type for the channel 8" "B_0x0,B_0x1" line.long 0x20 "LPDMA_HWCFGR5,LPDMA hardware configuration 5 register" bitfld.long 0x20 28. "G_TRANSFERS7,DMA transfers type for the channel 7" "B_0x0,B_0x1" bitfld.long 0x20 24. "G_TRANSFERS6,DMA transfers type for the channel 6" "B_0x0,B_0x1" bitfld.long 0x20 20. "G_TRANSFERS5,DMA transfers type for the channel 6" "B_0x0,B_0x1" bitfld.long 0x20 16. "G_TRANSFERS4,DMA transfers type for the channel 4" "B_0x0,B_0x1" newline bitfld.long 0x20 12. "G_TRANSFERS3,DMA transfers type for the channel 3" "B_0x0,B_0x1" bitfld.long 0x20 8. "G_TRANSFERS2,DMA transfers type for the channel 2" "B_0x0,B_0x1" bitfld.long 0x20 4. "G_TRANSFERS1,DMA transfers type for the channel 1" "B_0x0,B_0x1" bitfld.long 0x20 0. "G_TRANSFERS0,DMA transfers type for the channel 0" "B_0x0,B_0x1" line.long 0x24 "LPDMA_HWCFGR4,LPDMA hardware configuration 4 register" bitfld.long 0x24 28.--30. "G_FIFO_SIZE15,FIFO size for the channel 15 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 24.--26. "G_FIFO_SIZE14,FIFO size for the channel 14 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 20.--22. "G_FIFO_SIZE13,FIFO size for the channel 13 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 16.--18. "G_FIFO_SIZE12,FIFO size for the channel 12 (0 to 7):" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x24 12.--14. "G_FIFO_SIZE11,FIFO size for the channel 11 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 8.--10. "G_FIFO_SIZE10,FIFO size for the channel 10 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 4.--6. "G_FIFO_SIZE9,FIFO size for the channel 9 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 0.--2. "G_FIFO_SIZE8,FIFO size for the channel 8 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" line.long 0x28 "LPDMA_HWCFGR3,LPDMA hardware configuration 3 register" bitfld.long 0x28 28.--30. "G_FIFO_SIZE7,FIFO size for the channel 7 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 24.--26. "G_FIFO_SIZE6,FIFO size for the channel 6 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 20.--22. "G_FIFO_SIZE5,FIFO size for the channel 5 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 16.--18. "G_FIFO_SIZE4,FIFO size for the channel 4 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x28 12.--14. "G_FIFO_SIZE3,FIFO size for the channel 3 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 8.--10. "G_FIFO_SIZE2,FIFO size for the channel 2 (0 to 7):" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 4.--6. "G_FIFO_SIZE1,FIFO size for the channel 1 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 0.--2. "G_FIFO_SIZE0,FIFO size for the channel 0 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" line.long 0x2C "LPDMA_HWCFGR2,LPDMA hardware configuration 2 register" hexmask.long.byte 0x2C 8.--14. 1. "G_MAX_TRIG_ID,maximum trigger event ID (0 to 127)" hexmask.long.byte 0x2C 0.--7. 1. "G_MAX_REQ_ID,maximum peripheral request ID (0 to 255)" line.long 0x30 "LPDMA_HWCFGR1,LPDMA hardware configuration 1 register" bitfld.long 0x30 28.--29. "G_M1_DATA_WIDTH_ENC,master port 1 data bus width" "B_0x0,B_0x1,?,?" bitfld.long 0x30 24.--25. "G_M0_DATA_WIDTH_ENC,master port 0 data bus width" "B_0x0,B_0x1,?,?" hexmask.long.byte 0x30 20.--23. 1. "G_MAX_CID,maximum compartment ID (CID)" bitfld.long 0x30 16. "G_TRUSTZONE,TrustZone" "B_0x0,B_0x1" newline hexmask.long.byte 0x30 8.--12. 1. "G_NUM_CHANNELS,Number of DMA channels" bitfld.long 0x30 4. "G_PRIVILEGE,None" "B_0x0,B_0x1" bitfld.long 0x30 0.--2. "G_MASTER_PORTS,master ports type" "B_0x0,B_0x1,?,?,?,?,?,?" line.long 0x34 "LPDMA_VERR,LPDMA version register" hexmask.long.byte 0x34 4.--7. 1. "MAJREV,LPDMA major revision" hexmask.long.byte 0x34 0.--3. 1. "MINREV,LPDMA minor revision" line.long 0x38 "LPDMA_IPIDR,LPDMA identification register" hexmask.long 0x38 0.--31. 1. "ID,LPDMA identification" line.long 0x3C "LPDMA_SIDR,LPDMA size identification register" hexmask.long 0x3C 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CM33F")) tree "LPDMA_S" base ad:0x56210000 group.long 0x0++0xB line.long 0x0 "LPDMA_SECCFGR,LPDMA secure configuration register" bitfld.long 0x0 3. "SEC3,secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,secure state of channel x" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,secure state of channel x" "B_0x0,B_0x1" line.long 0x4 "LPDMA_PRIVCFGR,LPDMA privileged configuration register" bitfld.long 0x4 3. "PRIV3,privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,privileged state of channel x" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV0,privileged state of channel x" "B_0x0,B_0x1" line.long 0x8 "LPDMA_RCFGLOCKR,LPDMA configuration lock register" bitfld.long 0x8 3. "LOCK3,lock the configuration of LPDMA_SECCFGR.SECx LPDMA_PRIVCFGR.PRIVx and LPDMA_CxCIDCFGR until a global DMA reset" "B_0x0,B_0x1" bitfld.long 0x8 2. "LOCK2,lock the configuration of LPDMA_SECCFGR.SECx LPDMA_PRIVCFGR.PRIVx and LPDMA_CxCIDCFGR until a global DMA reset" "B_0x0,B_0x1" bitfld.long 0x8 1. "LOCK1,lock the configuration of LPDMA_SECCFGR.SECx LPDMA_PRIVCFGR.PRIVx and LPDMA_CxCIDCFGR until a global DMA reset" "B_0x0,B_0x1" bitfld.long 0x8 0. "LOCK0,lock the configuration of LPDMA_SECCFGR.SECx LPDMA_PRIVCFGR.PRIVx and LPDMA_CxCIDCFGR until a global DMA reset" "B_0x0,B_0x1" rgroup.long 0xC++0x7 line.long 0x0 "LPDMA_MISR,LPDMA nonsecure masked interrupt status register" bitfld.long 0x0 3. "MIS3,masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 2. "MIS2,masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 1. "MIS1,masked interrupt status of channel x" "B_0x0,B_0x1" bitfld.long 0x0 0. "MIS0,masked interrupt status of channel x" "B_0x0,B_0x1" line.long 0x4 "LPDMA_SMISR,LPDMA secure masked interrupt status register" bitfld.long 0x4 3. "MIS3,masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 2. "MIS2,masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 1. "MIS1,masked interrupt status of the secure channel x" "B_0x0,B_0x1" bitfld.long 0x4 0. "MIS0,masked interrupt status of the secure channel x" "B_0x0,B_0x1" group.long 0x50++0xB line.long 0x0 "LPDMA_C0LBAR,LPDMA channel 0 linked-list base address register" hexmask.long.word 0x0 16.--31. 1. "LBA,linked-list base address of LPDMA channel x" line.long 0x4 "LPDMA_C0CIDCFGR,LPDMA channel 0 CID register" bitfld.long 0x4 19. "SEM_WLIST_CID3,white-listed CID3 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x4 18. "SEM_WLIST_CID2,white-listed CID2 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x4 17. "SEM_WLIST_CID1,white-listed CID1 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x4 16. "SEM_WLIST_CID0,white-listed CID0 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" newline bitfld.long 0x4 4.--5. "SCID,static CID selection to channel x" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1. "SEM_EN,semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0x8 "LPDMA_C0SEMCR,LPDMA channel 0 semaphore control register" rbitfld.long 0x8 4.--5. "SEM_CCID,current CID allocated to channel x in semaphore mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 0. "SEM_MUTEX,mutex exclusion semaphore for the CID allocation of channel x (insemaphoremode)" "B_0x0,B_0x1" wgroup.long 0x5C++0x3 line.long 0x0 "LPDMA_C0FCR,LPDMA channel 0 flag clear register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x60++0x3 line.long 0x0 "LPDMA_C0SR,LPDMA channel 0 status register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "IDLEF,idle flag" "B_0x0,B_0x1" group.long 0x64++0x3 line.long 0x0 "LPDMA_C0CR,LPDMA channel 0 control register" bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x LPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,reset" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,enable" "B_0x0,B_0x1" group.long 0x90++0x13 line.long 0x0 "LPDMA_C0TR1,LPDMA channel 0 transfer register 1" bitfld.long 0x0 31. "DSEC,security attribute of the LPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 19. "DINC,destination incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 15. "SSEC,security attribute of the LPDMA transfer from the source" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "PAM,padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1" bitfld.long 0x0 3. "SINC,source incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "LPDMA_C0TR2,LPDMA channel 0 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,software request" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "REQSEL,DMA hardware request selection" line.long 0x8 "LPDMA_C0BR1,LPDMA channel 0 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source" line.long 0xC "LPDMA_C0SAR,LPDMA channel 0 source address register" hexmask.long 0xC 0.--31. 1. "SA,source address" line.long 0x10 "LPDMA_C0DAR,LPDMA channel 0 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0xCC++0xF line.long 0x0 "LPDMA_C0LLR,LPDMA channel 0 linked-list address register" bitfld.long 0x0 31. "UT1,Update LPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update LPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update LPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,update LPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update LPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update LPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "LPDMA_C1LBAR,LPDMA channel 1 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of LPDMA channel x" line.long 0x8 "LPDMA_C1CIDCFGR,LPDMA channel 1 CID register" bitfld.long 0x8 19. "SEM_WLIST_CID3,white-listed CID3 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 18. "SEM_WLIST_CID2,white-listed CID2 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,white-listed CID1 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,white-listed CID0 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--5. "SCID,static CID selection to channel x" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 1. "SEM_EN,semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "LPDMA_C1SEMCR,LPDMA channel 1 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,current CID allocated to channel x in semaphore mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0. "SEM_MUTEX,mutex exclusion semaphore for the CID allocation of channel x (insemaphoremode)" "B_0x0,B_0x1" wgroup.long 0xDC++0x3 line.long 0x0 "LPDMA_C1FCR,LPDMA channel 1 flag clear register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0xE0++0x3 line.long 0x0 "LPDMA_C1SR,LPDMA channel 1 status register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "IDLEF,idle flag" "B_0x0,B_0x1" group.long 0xE4++0x3 line.long 0x0 "LPDMA_C1CR,LPDMA channel 1 control register" bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x LPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,reset" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,enable" "B_0x0,B_0x1" group.long 0x110++0x13 line.long 0x0 "LPDMA_C1TR1,LPDMA channel 1 transfer register 1" bitfld.long 0x0 31. "DSEC,security attribute of the LPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 19. "DINC,destination incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 15. "SSEC,security attribute of the LPDMA transfer from the source" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "PAM,padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1" bitfld.long 0x0 3. "SINC,source incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "LPDMA_C1TR2,LPDMA channel 1 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,software request" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "REQSEL,DMA hardware request selection" line.long 0x8 "LPDMA_C1BR1,LPDMA channel 1 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source" line.long 0xC "LPDMA_C1SAR,LPDMA channel 1 source address register" hexmask.long 0xC 0.--31. 1. "SA,source address" line.long 0x10 "LPDMA_C1DAR,LPDMA channel 1 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x14C++0xF line.long 0x0 "LPDMA_C1LLR,LPDMA channel 1 linked-list address register" bitfld.long 0x0 31. "UT1,Update LPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update LPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update LPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,update LPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update LPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update LPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "LPDMA_C2LBAR,LPDMA channel 2 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of LPDMA channel x" line.long 0x8 "LPDMA_C2CIDCFGR,LPDMA channel 2 CID register" bitfld.long 0x8 19. "SEM_WLIST_CID3,white-listed CID3 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 18. "SEM_WLIST_CID2,white-listed CID2 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,white-listed CID1 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,white-listed CID0 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--5. "SCID,static CID selection to channel x" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 1. "SEM_EN,semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "LPDMA_C2SEMCR,LPDMA channel 2 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,current CID allocated to channel x in semaphore mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0. "SEM_MUTEX,mutex exclusion semaphore for the CID allocation of channel x (insemaphoremode)" "B_0x0,B_0x1" wgroup.long 0x15C++0x3 line.long 0x0 "LPDMA_C2FCR,LPDMA channel 2 flag clear register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x160++0x3 line.long 0x0 "LPDMA_C2SR,LPDMA channel 2 status register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "IDLEF,idle flag" "B_0x0,B_0x1" group.long 0x164++0x3 line.long 0x0 "LPDMA_C2CR,LPDMA channel 2 control register" bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x LPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,reset" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,enable" "B_0x0,B_0x1" group.long 0x190++0x13 line.long 0x0 "LPDMA_C2TR1,LPDMA channel 2 transfer register 1" bitfld.long 0x0 31. "DSEC,security attribute of the LPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 19. "DINC,destination incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 15. "SSEC,security attribute of the LPDMA transfer from the source" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "PAM,padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1" bitfld.long 0x0 3. "SINC,source incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "LPDMA_C2TR2,LPDMA channel 2 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,software request" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "REQSEL,DMA hardware request selection" line.long 0x8 "LPDMA_C2BR1,LPDMA channel 2 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source" line.long 0xC "LPDMA_C2SAR,LPDMA channel 2 source address register" hexmask.long 0xC 0.--31. 1. "SA,source address" line.long 0x10 "LPDMA_C2DAR,LPDMA channel 2 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x1CC++0xF line.long 0x0 "LPDMA_C2LLR,LPDMA channel 2 linked-list address register" bitfld.long 0x0 31. "UT1,Update LPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update LPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update LPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,update LPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update LPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update LPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure" line.long 0x4 "LPDMA_C3LBAR,LPDMA channel 3 linked-list base address register" hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of LPDMA channel x" line.long 0x8 "LPDMA_C3CIDCFGR,LPDMA channel 3 CID register" bitfld.long 0x8 19. "SEM_WLIST_CID3,white-listed CID3 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 18. "SEM_WLIST_CID2,white-listed CID2 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEM_WLIST_CID1,white-listed CID1 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEM_WLIST_CID0,white-listed CID0 in the CID allocation pool (of channel x in semaphoremode)" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--5. "SCID,static CID selection to channel x" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 1. "SEM_EN,semaphore mode enable (for the CID allocation policy to the channel x)" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable of the channel x" "B_0x0,B_0x1" line.long 0xC "LPDMA_C3SEMCR,LPDMA channel 3 semaphore control register" rbitfld.long 0xC 4.--5. "SEM_CCID,current CID allocated to channel x in semaphore mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0. "SEM_MUTEX,mutex exclusion semaphore for the CID allocation of channel x (insemaphoremode)" "B_0x0,B_0x1" wgroup.long 0x1DC++0x3 line.long 0x0 "LPDMA_C3FCR,LPDMA channel 3 flag clear register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag clear" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag clear" "B_0x0,B_0x1" rgroup.long 0x1E0++0x3 line.long 0x0 "LPDMA_C3SR,LPDMA channel 3 status register" bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPF,completed suspension flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "USEF,user setting error flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEF,update link transfer error flag" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "DTEF,data transfer error flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTF,half transfer flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "TCF,transfer complete flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "IDLEF,idle flag" "B_0x0,B_0x1" group.long 0x1E4++0x3 line.long 0x0 "LPDMA_C3CR,LPDMA channel 3 control register" bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x LPDMA transfer versus others" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16. "LSM,Link step mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "SUSP,suspend" "B_0x0,B_0x1" bitfld.long 0x0 1. "RESET,reset" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,enable" "B_0x0,B_0x1" group.long 0x210++0x13 line.long 0x0 "LPDMA_C3TR1,LPDMA channel 3 transfer register 1" bitfld.long 0x0 31. "DSEC,security attribute of the LPDMA transfer to the destination" "B_0x0,B_0x1" bitfld.long 0x0 19. "DINC,destination incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 15. "SSEC,security attribute of the LPDMA transfer from the source" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "PAM,padding/alignment mode" "B_0x0_PAM_1,B_0x1_PAM_1" bitfld.long 0x0 3. "SINC,source incrementing single" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a single in bytes" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "LPDMA_C3TR2,LPDMA channel 3 transfer register 2" bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection" bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 12. "PFREQ,Hardware request in peripheral flow control mode" "B_0x0,B_0x1" bitfld.long 0x4 11. "BREQ,block hardware request" "B_0x0,B_0x1" bitfld.long 0x4 9. "SWREQ,software request" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "REQSEL,DMA hardware request selection" line.long 0x8 "LPDMA_C3BR1,LPDMA channel 3 block register 1" hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source" line.long 0xC "LPDMA_C3SAR,LPDMA channel 3 source address register" hexmask.long 0xC 0.--31. 1. "SA,source address" line.long 0x10 "LPDMA_C3DAR,LPDMA channel 3 destination address register" hexmask.long 0x10 0.--31. 1. "DA,destination address" group.long 0x24C++0x3 line.long 0x0 "LPDMA_C3LLR,LPDMA channel 3 linked-list address register" bitfld.long 0x0 31. "UT1,Update LPDMA_CxTR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 30. "UT2,Update LPDMA_CxTR2 from memory" "B_0x0,B_0x1" bitfld.long 0x0 29. "UB1,Update LPDMA_CxBR1 from memory" "B_0x0,B_0x1" bitfld.long 0x0 28. "USA,update LPDMA_CxSAR from memory" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UDA,Update LPDMA_CxDAR register from memory" "B_0x0,B_0x1" bitfld.long 0x0 16. "ULL,Update LPDMA_CxLLR register from memory" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure" rgroup.long 0xFC0++0x3F line.long 0x0 "LPDMA_HWCFGR13,LPDMA hardware configuration 13 register" bitfld.long 0x0 28. "G_PER_CTRL15,DMA transfer type for channel 15" "B_0x0,B_0x1" bitfld.long 0x0 24. "G_PER_CTRL14,DMA transfer type for channel 14" "B_0x0,B_0x1" bitfld.long 0x0 20. "G_PER_CTRL13,DMA transfer type for channel 13" "B_0x0,B_0x1" bitfld.long 0x0 16. "G_PER_CTRL12,DMA transfer type for channel 12" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "G_PER_CTRL11,DMA transfer type for channel 11" "B_0x0,B_0x1" bitfld.long 0x0 8. "G_PER_CTRL10,DMA transfer type for channel 10" "B_0x0,B_0x1" bitfld.long 0x0 4. "G_PER_CTRL9,DMA transfer type for channel 9" "B_0x0,B_0x1" bitfld.long 0x0 0. "G_PER_CTRL8,DMA transfer type for channel 8" "B_0x0,B_0x1" line.long 0x4 "LPDMA_HWCFGR12,LPDMA hardware configuration 12 register" bitfld.long 0x4 28. "G_PER_CTRL7,DMA transfer type for channel 7" "B_0x0,B_0x1" bitfld.long 0x4 24. "G_PER_CTRL6,DMA transfer type for channel 6" "B_0x0,B_0x1" bitfld.long 0x4 20. "G_PER_CTRL5,DMA transfer type for channel 5" "B_0x0,B_0x1" bitfld.long 0x4 16. "G_PER_CTRL4,DMA transfer type for channel 4" "B_0x0,B_0x1" newline bitfld.long 0x4 12. "G_PER_CTRL3,DMA transfer type for channel 3" "B_0x0,B_0x1" bitfld.long 0x4 8. "G_PER_CTRL2,DMA transfer type for channel 2" "B_0x0,B_0x1" bitfld.long 0x4 4. "G_PER_CTRL1,DMA transfer type for channel 1" "B_0x0,B_0x1" bitfld.long 0x4 0. "G_PER_CTRL0,DMA transfer type for channel 0" "B_0x0,B_0x1" line.long 0x8 "LPDMA_HWCFGR11,LPDMA hardware configuration 11 register" bitfld.long 0x8 24. "G_TST_LL_IMPORT,master port for the link transfer (DFT purpose only)" "B_0x0,B_0x1" bitfld.long 0x8 20.--22. "G_NUM_RESYNC_FFS,number of resynchronization flip-flops in the range 2 to 6" "0,1,2,3,4,5,6,7" bitfld.long 0x8 16.--18. "G_CID_WIDTH,CID bus width in the range of 1 to 4" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 8.--13. 1. "G_SEC_OPTIONREG,secure optional register width in the range of 0 to 32" newline hexmask.long.byte 0x8 0.--5. 1. "G_NONSEC_OPTIONREG,nonsecure optional register width in the range of 0 to 32" line.long 0xC "LPDMA_HWCFGR10,LPDMA hardware configuration 10 register" bitfld.long 0xC 28.--29. "G_ADDRESSING15,DMA transfers type for the channel 15" "B_0x0,B_0x1,?,?" bitfld.long 0xC 24.--25. "G_ADDRESSING14,DMA transfers type for the channel 14" "B_0x0,B_0x1,?,?" bitfld.long 0xC 20.--21. "G_ADDRESSING13,DMA transfers type for the channel 13" "B_0x0,B_0x1,?,?" bitfld.long 0xC 16.--17. "G_ADDRESSING12,DMA transfers type for the channel 12" "B_0x0,B_0x1,?,?" newline bitfld.long 0xC 12.--13. "G_ADDRESSING11,DMA transfers type for the channel 11" "B_0x0,B_0x1,?,?" bitfld.long 0xC 8.--9. "G_ADDRESSING10,DMA transfers type for the channel 10" "B_0x0,B_0x1,?,?" bitfld.long 0xC 4.--5. "G_ADDRESSING9,DMA transfers type for the channel 9" "B_0x0,B_0x1,?,?" bitfld.long 0xC 0.--1. "G_ADDRESSING8,DMA transfers type for the channel 8" "B_0x0,B_0x1,?,?" line.long 0x10 "LPDMA_HWCFGR9,LPDMA hardware configuration 9 register" bitfld.long 0x10 28.--29. "G_ADDRESSING7,DMA transfers type for the channel 7" "B_0x0,B_0x1,?,?" bitfld.long 0x10 24.--25. "G_ADDRESSING6,DMA transfers type for the channel 6" "B_0x0,B_0x1,?,?" bitfld.long 0x10 20.--21. "G_ADDRESSING5,DMA transfers type for the channel 5" "B_0x0,B_0x1,?,?" bitfld.long 0x10 16.--17. "G_ADDRESSING4,DMA transfers type for the channel 4" "B_0x0,B_0x1,?,?" newline bitfld.long 0x10 12.--13. "G_ADDRESSING3,DMA transfers type for the channel 3" "B_0x0,B_0x1,?,?" bitfld.long 0x10 8.--9. "G_ADDRESSING2,DMA transfers type for the channel 2" "B_0x0,B_0x1,?,?" bitfld.long 0x10 4.--5. "G_ADDRESSING1,DMA transfers type for the channel 1" "B_0x0,B_0x1,?,?" bitfld.long 0x10 0.--1. "G_ADDRESSING0,DMA transfers type for the channel 0" "B_0x0,B_0x1,?,?" line.long 0x14 "LPDMA_HWCFGR8,LPDMA hardware configuration 8 register" bitfld.long 0x14 28. "G_LINKED_LIST15,DMA transfers type for the channel 15" "B_0x0,B_0x1" bitfld.long 0x14 24. "G_LINKED_LIST14,DMA transfers type for the channel 14" "B_0x0,B_0x1" bitfld.long 0x14 20. "G_LINKED_LIST13,DMA transfers type for the channel 13" "B_0x0,B_0x1" bitfld.long 0x14 16. "G_LINKED_LIST12,DMA transfers type for the channel 12" "B_0x0,B_0x1" newline bitfld.long 0x14 12. "G_LINKED_LIST11,DMA transfers type for the channel 11" "B_0x0,B_0x1" bitfld.long 0x14 8. "G_LINKED_LIST10,DMA transfers type for the channel 10" "B_0x0,B_0x1" bitfld.long 0x14 4. "G_LINKED_LIST9,DMA transfers type for the channel 9" "B_0x0,B_0x1" bitfld.long 0x14 0. "G_LINKED_LIST8,DMA transfers type for the channel 8" "B_0x0,B_0x1" line.long 0x18 "LPDMA_HWCFGR7,LPDMA hardware configuration 7 register" bitfld.long 0x18 28. "G_LINKED_LIST7,DMA transfers type for the channel 7" "B_0x0,B_0x1" bitfld.long 0x18 24. "G_LINKED_LIST6,DMA transfers type for the channel 6" "B_0x0,B_0x1" bitfld.long 0x18 20. "G_LINKED_LIST5,DMA transfers type for the channel 5" "B_0x0,B_0x1" bitfld.long 0x18 16. "G_LINKED_LIST4,DMA transfers type for the channel 4" "B_0x0,B_0x1" newline bitfld.long 0x18 12. "G_LINKED_LIST3,DMA transfers type for the channel 3" "B_0x0,B_0x1" bitfld.long 0x18 8. "G_LINKED_LIST2,DMA transfers type for the channel 2" "B_0x0,B_0x1" bitfld.long 0x18 4. "G_LINKED_LIST1,DMA transfers type for the channel 1" "B_0x0,B_0x1" bitfld.long 0x18 0. "G_LINKED_LIST0,DMA transfers type for the channel 0" "B_0x0,B_0x1" line.long 0x1C "LPDMA_HWCFGR6,LPDMA hardware configuration 6 register" bitfld.long 0x1C 28. "G_TRANSFERS15,DMA transfers type for the channel 15" "B_0x0,B_0x1" bitfld.long 0x1C 24. "G_TRANSFERS14,DMA transfers type for the channel 14" "B_0x0,B_0x1" bitfld.long 0x1C 20. "G_TRANSFERS13,DMA transfers type for the channel 13" "B_0x0,B_0x1" bitfld.long 0x1C 16. "G_TRANSFERS12,DMA transfers type for the channel 12" "B_0x0,B_0x1" newline bitfld.long 0x1C 12. "G_TRANSFERS11,DMA transfers type for the channel 11" "B_0x0,B_0x1" bitfld.long 0x1C 8. "G_TRANSFERS10,DMA transfers type for the channel 10" "B_0x0,B_0x1" bitfld.long 0x1C 4. "G_TRANSFERS9,DMA transfers type for the channel 9" "B_0x0,B_0x1" bitfld.long 0x1C 0. "G_TRANSFERS8,DMA transfers type for the channel 8" "B_0x0,B_0x1" line.long 0x20 "LPDMA_HWCFGR5,LPDMA hardware configuration 5 register" bitfld.long 0x20 28. "G_TRANSFERS7,DMA transfers type for the channel 7" "B_0x0,B_0x1" bitfld.long 0x20 24. "G_TRANSFERS6,DMA transfers type for the channel 6" "B_0x0,B_0x1" bitfld.long 0x20 20. "G_TRANSFERS5,DMA transfers type for the channel 6" "B_0x0,B_0x1" bitfld.long 0x20 16. "G_TRANSFERS4,DMA transfers type for the channel 4" "B_0x0,B_0x1" newline bitfld.long 0x20 12. "G_TRANSFERS3,DMA transfers type for the channel 3" "B_0x0,B_0x1" bitfld.long 0x20 8. "G_TRANSFERS2,DMA transfers type for the channel 2" "B_0x0,B_0x1" bitfld.long 0x20 4. "G_TRANSFERS1,DMA transfers type for the channel 1" "B_0x0,B_0x1" bitfld.long 0x20 0. "G_TRANSFERS0,DMA transfers type for the channel 0" "B_0x0,B_0x1" line.long 0x24 "LPDMA_HWCFGR4,LPDMA hardware configuration 4 register" bitfld.long 0x24 28.--30. "G_FIFO_SIZE15,FIFO size for the channel 15 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 24.--26. "G_FIFO_SIZE14,FIFO size for the channel 14 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 20.--22. "G_FIFO_SIZE13,FIFO size for the channel 13 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 16.--18. "G_FIFO_SIZE12,FIFO size for the channel 12 (0 to 7):" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x24 12.--14. "G_FIFO_SIZE11,FIFO size for the channel 11 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 8.--10. "G_FIFO_SIZE10,FIFO size for the channel 10 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 4.--6. "G_FIFO_SIZE9,FIFO size for the channel 9 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x24 0.--2. "G_FIFO_SIZE8,FIFO size for the channel 8 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" line.long 0x28 "LPDMA_HWCFGR3,LPDMA hardware configuration 3 register" bitfld.long 0x28 28.--30. "G_FIFO_SIZE7,FIFO size for the channel 7 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 24.--26. "G_FIFO_SIZE6,FIFO size for the channel 6 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 20.--22. "G_FIFO_SIZE5,FIFO size for the channel 5 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 16.--18. "G_FIFO_SIZE4,FIFO size for the channel 4 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x28 12.--14. "G_FIFO_SIZE3,FIFO size for the channel 3 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 8.--10. "G_FIFO_SIZE2,FIFO size for the channel 2 (0 to 7):" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 4.--6. "G_FIFO_SIZE1,FIFO size for the channel 1 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x28 0.--2. "G_FIFO_SIZE0,FIFO size for the channel 0 (0 to 7)" "B_0x0,?,?,?,?,?,?,?" line.long 0x2C "LPDMA_HWCFGR2,LPDMA hardware configuration 2 register" hexmask.long.byte 0x2C 8.--14. 1. "G_MAX_TRIG_ID,maximum trigger event ID (0 to 127)" hexmask.long.byte 0x2C 0.--7. 1. "G_MAX_REQ_ID,maximum peripheral request ID (0 to 255)" line.long 0x30 "LPDMA_HWCFGR1,LPDMA hardware configuration 1 register" bitfld.long 0x30 28.--29. "G_M1_DATA_WIDTH_ENC,master port 1 data bus width" "B_0x0,B_0x1,?,?" bitfld.long 0x30 24.--25. "G_M0_DATA_WIDTH_ENC,master port 0 data bus width" "B_0x0,B_0x1,?,?" hexmask.long.byte 0x30 20.--23. 1. "G_MAX_CID,maximum compartment ID (CID)" bitfld.long 0x30 16. "G_TRUSTZONE,TrustZone" "B_0x0,B_0x1" newline hexmask.long.byte 0x30 8.--12. 1. "G_NUM_CHANNELS,Number of DMA channels" bitfld.long 0x30 4. "G_PRIVILEGE,None" "B_0x0,B_0x1" bitfld.long 0x30 0.--2. "G_MASTER_PORTS,master ports type" "B_0x0,B_0x1,?,?,?,?,?,?" line.long 0x34 "LPDMA_VERR,LPDMA version register" hexmask.long.byte 0x34 4.--7. 1. "MAJREV,LPDMA major revision" hexmask.long.byte 0x34 0.--3. 1. "MINREV,LPDMA minor revision" line.long 0x38 "LPDMA_IPIDR,LPDMA identification register" hexmask.long 0x38 0.--31. 1. "ID,LPDMA identification" line.long 0x3C "LPDMA_SIDR,LPDMA size identification register" hexmask.long 0x3C 0.--31. 1. "SID,Size identification" tree.end endif tree.end tree "LPTIM (Low-Power Timer)" base ad:0x0 sif (cpuis("*CA35")||cpuis("*CM33F")) tree "LPTIM1" base ad:0x40090000 rgroup.long 0x0++0x3 line.long 0x0 "LPTIM1_ISR,LPTIM1 interrupt and status register [alternate]" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1" bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" newline bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" newline bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "B_0x0,B_0x1" rgroup.long 0x0++0x3 line.long 0x0 "LPTIM1_ISR_ALTERNATE1,LPTIM1 interrupt and status register" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" newline bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "B_0x0,B_0x1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM1_ICR,LPTIM1 interrupt clear register [alternate]" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" newline bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" newline bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM1_ICR_ALTERNATE1,LPTIM1 interrupt clear register" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1" bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" newline bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" newline bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" group.long 0x8++0x3 line.long 0x0 "LPTIM1_DIER,LPTIM1 interrupt enable register [alternate]" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" group.long 0x8++0x13 line.long 0x0 "LPTIM1_DIER_ALTERNATE1,LPTIM1 interrupt enable register" bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR,LPTIM configuration register" bitfld.long 0x4 24. "ENC,Encoder mode enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "B_0x0,B_0x1" bitfld.long 0x4 22. "PRELOAD,Registers update mode" "B_0x0,B_0x1" bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 20. "WAVE,Waveform shape" "B_0x0,B_0x1" bitfld.long 0x4 19. "TIMOUT,Timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 0. "CKSEL,Clock selector" "B_0x0,B_0x1" line.long 0x8 "LPTIM_CR,LPTIM control register" bitfld.long 0x8 4. "RSTARE,Reset after read enable" "0,1" bitfld.long 0x8 3. "COUNTRST,Counter reset" "0,1" bitfld.long 0x8 2. "CNTSTRT,Timer start in Continuous mode" "0,1" bitfld.long 0x8 1. "SNGSTRT,LPTIM start in Single mode" "0,1" newline bitfld.long 0x8 0. "ENABLE,LPTIM enable" "B_0x0,B_0x1" line.long 0xC "LPTIM_CCR1,LPTIM compare register 1" hexmask.long.word 0xC 0.--15. 1. "CCR1,Capture/compare 1 value" line.long 0x10 "LPTIM_ARR,LPTIM autoreload register" hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value" rgroup.long 0x1C++0x3 line.long 0x0 "LPTIM_CNT,LPTIM counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.long 0x20++0xF line.long 0x0 "LPTIM1_OR,LPTIM1 option register" bitfld.long 0x0 0. "OR_0,Option register bit 0" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR2,LPTIM configuration register 2" bitfld.long 0x4 20.--21. "IC2SEL,LPTIM input capture 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16.--17. "IC1SEL,LPTIM input capture 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 4.--5. "IN2SEL,LPTIM input 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0.--1. "IN1SEL,LPTIM input 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "LPTIM_RCR,LPTIM repetition register" hexmask.long.byte 0x8 0.--7. 1. "REP,Repetition register value" line.long 0xC "LPTIM_CCMR1,LPTIM capture/compare mode register 1" bitfld.long 0xC 28.--29. "IC2F,Input capture 2 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 24.--25. "IC2PSC,Input capture 2 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 18.--19. "CC2P,Capture/compare 2 output polarity." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT,B_0x2_CC2_AS_INPUT,B_0x3_CC2_AS_INPUT" bitfld.long 0xC 17. "CC2E,Capture/compare 2 output enable." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT" newline bitfld.long 0xC 16. "CC2SEL,Capture/compare 2 selection" "B_0x0,B_0x1" bitfld.long 0xC 12.--13. "IC1F,Input capture 1 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 8.--9. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 2.--3. "CC1P,Capture/compare 1 output polarity." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT,?,?" newline bitfld.long 0xC 1. "CC1E,Capture/compare 1 output enable." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT" bitfld.long 0xC 0. "CC1SEL,Capture/compare 1 selection" "B_0x0,B_0x1" group.long 0x34++0x3 line.long 0x0 "LPTIM_CCR2,LPTIM compare register 2" hexmask.long.word 0x0 0.--15. 1. "CCR2,Capture/compare 2 value" rgroup.long 0x3EC++0x13 line.long 0x0 "LPTIM_HWCFGR2,LPTIM peripheral hardware configuration register 2" bitfld.long 0x0 16. "CFG3,peripheral hardware configuration 3" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,peripheral hardware configuration 1" line.long 0x4 "LPTIM_HWCFGR1,LPTIM peripheral hardware configuration register 1" hexmask.long.byte 0x4 24.--31. 1. "CFG4,peripheral hardware configuration 4" hexmask.long.byte 0x4 16.--19. 1. "CFG3,peripheral hardware configuration 3" hexmask.long.byte 0x4 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x4 0.--7. 1. "CFG1,peripheral hardware configuration 1" line.long 0x8 "LPTIM_VERR,LPTIM peripheral version identification register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "LPTIM_PIDR,LPTIM peripheral type identification register" hexmask.long 0xC 0.--31. 1. "P_ID,Peripheral type identifier" line.long 0x10 "LPTIM_SIDR,LPTIM registers map size identification register" hexmask.long 0x10 0.--31. 1. "S_ID,Registers map size identifier" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "LPTIM1_S" base ad:0x50090000 rgroup.long 0x0++0x3 line.long 0x0 "LPTIM1_ISR,LPTIM1 interrupt and status register [alternate]" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1" bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" newline bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" newline bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "B_0x0,B_0x1" rgroup.long 0x0++0x3 line.long 0x0 "LPTIM1_ISR_ALTERNATE1,LPTIM1 interrupt and status register" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" newline bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "B_0x0,B_0x1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM1_ICR,LPTIM1 interrupt clear register [alternate]" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" newline bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" newline bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM1_ICR_ALTERNATE1,LPTIM1 interrupt clear register" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1" bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" newline bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" newline bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" group.long 0x8++0x3 line.long 0x0 "LPTIM1_DIER,LPTIM1 interrupt enable register [alternate]" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" group.long 0x8++0x13 line.long 0x0 "LPTIM1_DIER_ALTERNATE1,LPTIM1 interrupt enable register" bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR,LPTIM configuration register" bitfld.long 0x4 24. "ENC,Encoder mode enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "B_0x0,B_0x1" bitfld.long 0x4 22. "PRELOAD,Registers update mode" "B_0x0,B_0x1" bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 20. "WAVE,Waveform shape" "B_0x0,B_0x1" bitfld.long 0x4 19. "TIMOUT,Timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 0. "CKSEL,Clock selector" "B_0x0,B_0x1" line.long 0x8 "LPTIM_CR,LPTIM control register" bitfld.long 0x8 4. "RSTARE,Reset after read enable" "0,1" bitfld.long 0x8 3. "COUNTRST,Counter reset" "0,1" bitfld.long 0x8 2. "CNTSTRT,Timer start in Continuous mode" "0,1" bitfld.long 0x8 1. "SNGSTRT,LPTIM start in Single mode" "0,1" newline bitfld.long 0x8 0. "ENABLE,LPTIM enable" "B_0x0,B_0x1" line.long 0xC "LPTIM_CCR1,LPTIM compare register 1" hexmask.long.word 0xC 0.--15. 1. "CCR1,Capture/compare 1 value" line.long 0x10 "LPTIM_ARR,LPTIM autoreload register" hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value" rgroup.long 0x1C++0x3 line.long 0x0 "LPTIM_CNT,LPTIM counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.long 0x20++0xF line.long 0x0 "LPTIM1_OR,LPTIM1 option register" bitfld.long 0x0 0. "OR_0,Option register bit 0" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR2,LPTIM configuration register 2" bitfld.long 0x4 20.--21. "IC2SEL,LPTIM input capture 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16.--17. "IC1SEL,LPTIM input capture 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 4.--5. "IN2SEL,LPTIM input 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0.--1. "IN1SEL,LPTIM input 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "LPTIM_RCR,LPTIM repetition register" hexmask.long.byte 0x8 0.--7. 1. "REP,Repetition register value" line.long 0xC "LPTIM_CCMR1,LPTIM capture/compare mode register 1" bitfld.long 0xC 28.--29. "IC2F,Input capture 2 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 24.--25. "IC2PSC,Input capture 2 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 18.--19. "CC2P,Capture/compare 2 output polarity." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT,B_0x2_CC2_AS_INPUT,B_0x3_CC2_AS_INPUT" bitfld.long 0xC 17. "CC2E,Capture/compare 2 output enable." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT" newline bitfld.long 0xC 16. "CC2SEL,Capture/compare 2 selection" "B_0x0,B_0x1" bitfld.long 0xC 12.--13. "IC1F,Input capture 1 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 8.--9. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 2.--3. "CC1P,Capture/compare 1 output polarity." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT,?,?" newline bitfld.long 0xC 1. "CC1E,Capture/compare 1 output enable." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT" bitfld.long 0xC 0. "CC1SEL,Capture/compare 1 selection" "B_0x0,B_0x1" group.long 0x34++0x3 line.long 0x0 "LPTIM_CCR2,LPTIM compare register 2" hexmask.long.word 0x0 0.--15. 1. "CCR2,Capture/compare 2 value" rgroup.long 0x3EC++0x13 line.long 0x0 "LPTIM_HWCFGR2,LPTIM peripheral hardware configuration register 2" bitfld.long 0x0 16. "CFG3,peripheral hardware configuration 3" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,peripheral hardware configuration 1" line.long 0x4 "LPTIM_HWCFGR1,LPTIM peripheral hardware configuration register 1" hexmask.long.byte 0x4 24.--31. 1. "CFG4,peripheral hardware configuration 4" hexmask.long.byte 0x4 16.--19. 1. "CFG3,peripheral hardware configuration 3" hexmask.long.byte 0x4 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x4 0.--7. 1. "CFG1,peripheral hardware configuration 1" line.long 0x8 "LPTIM_VERR,LPTIM peripheral version identification register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "LPTIM_PIDR,LPTIM peripheral type identification register" hexmask.long 0xC 0.--31. 1. "P_ID,Peripheral type identifier" line.long 0x10 "LPTIM_SIDR,LPTIM registers map size identification register" hexmask.long 0x10 0.--31. 1. "S_ID,Registers map size identifier" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "LPTIM2" base ad:0x400A0000 rgroup.long 0x0++0x3 line.long 0x0 "LPTIM1_ISR,LPTIM1 interrupt and status register [alternate]" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1" bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" newline bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" newline bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "B_0x0,B_0x1" rgroup.long 0x0++0x3 line.long 0x0 "LPTIM1_ISR_ALTERNATE1,LPTIM1 interrupt and status register" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" newline bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "B_0x0,B_0x1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM1_ICR,LPTIM1 interrupt clear register [alternate]" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" newline bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" newline bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM1_ICR_ALTERNATE1,LPTIM1 interrupt clear register" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1" bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" newline bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" newline bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" group.long 0x8++0x3 line.long 0x0 "LPTIM1_DIER,LPTIM1 interrupt enable register [alternate]" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" group.long 0x8++0x13 line.long 0x0 "LPTIM1_DIER_ALTERNATE1,LPTIM1 interrupt enable register" bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR,LPTIM configuration register" bitfld.long 0x4 24. "ENC,Encoder mode enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "B_0x0,B_0x1" bitfld.long 0x4 22. "PRELOAD,Registers update mode" "B_0x0,B_0x1" bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 20. "WAVE,Waveform shape" "B_0x0,B_0x1" bitfld.long 0x4 19. "TIMOUT,Timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 0. "CKSEL,Clock selector" "B_0x0,B_0x1" line.long 0x8 "LPTIM_CR,LPTIM control register" bitfld.long 0x8 4. "RSTARE,Reset after read enable" "0,1" bitfld.long 0x8 3. "COUNTRST,Counter reset" "0,1" bitfld.long 0x8 2. "CNTSTRT,Timer start in Continuous mode" "0,1" bitfld.long 0x8 1. "SNGSTRT,LPTIM start in Single mode" "0,1" newline bitfld.long 0x8 0. "ENABLE,LPTIM enable" "B_0x0,B_0x1" line.long 0xC "LPTIM_CCR1,LPTIM compare register 1" hexmask.long.word 0xC 0.--15. 1. "CCR1,Capture/compare 1 value" line.long 0x10 "LPTIM_ARR,LPTIM autoreload register" hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value" rgroup.long 0x1C++0x3 line.long 0x0 "LPTIM_CNT,LPTIM counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.long 0x20++0xF line.long 0x0 "LPTIM1_OR,LPTIM1 option register" bitfld.long 0x0 0. "OR_0,Option register bit 0" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR2,LPTIM configuration register 2" bitfld.long 0x4 20.--21. "IC2SEL,LPTIM input capture 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16.--17. "IC1SEL,LPTIM input capture 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 4.--5. "IN2SEL,LPTIM input 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0.--1. "IN1SEL,LPTIM input 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "LPTIM_RCR,LPTIM repetition register" hexmask.long.byte 0x8 0.--7. 1. "REP,Repetition register value" line.long 0xC "LPTIM_CCMR1,LPTIM capture/compare mode register 1" bitfld.long 0xC 28.--29. "IC2F,Input capture 2 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 24.--25. "IC2PSC,Input capture 2 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 18.--19. "CC2P,Capture/compare 2 output polarity." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT,B_0x2_CC2_AS_INPUT,B_0x3_CC2_AS_INPUT" bitfld.long 0xC 17. "CC2E,Capture/compare 2 output enable." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT" newline bitfld.long 0xC 16. "CC2SEL,Capture/compare 2 selection" "B_0x0,B_0x1" bitfld.long 0xC 12.--13. "IC1F,Input capture 1 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 8.--9. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 2.--3. "CC1P,Capture/compare 1 output polarity." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT,?,?" newline bitfld.long 0xC 1. "CC1E,Capture/compare 1 output enable." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT" bitfld.long 0xC 0. "CC1SEL,Capture/compare 1 selection" "B_0x0,B_0x1" group.long 0x34++0x3 line.long 0x0 "LPTIM_CCR2,LPTIM compare register 2" hexmask.long.word 0x0 0.--15. 1. "CCR2,Capture/compare 2 value" rgroup.long 0x3EC++0x13 line.long 0x0 "LPTIM_HWCFGR2,LPTIM peripheral hardware configuration register 2" bitfld.long 0x0 16. "CFG3,peripheral hardware configuration 3" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,peripheral hardware configuration 1" line.long 0x4 "LPTIM_HWCFGR1,LPTIM peripheral hardware configuration register 1" hexmask.long.byte 0x4 24.--31. 1. "CFG4,peripheral hardware configuration 4" hexmask.long.byte 0x4 16.--19. 1. "CFG3,peripheral hardware configuration 3" hexmask.long.byte 0x4 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x4 0.--7. 1. "CFG1,peripheral hardware configuration 1" line.long 0x8 "LPTIM_VERR,LPTIM peripheral version identification register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "LPTIM_PIDR,LPTIM peripheral type identification register" hexmask.long 0xC 0.--31. 1. "P_ID,Peripheral type identifier" line.long 0x10 "LPTIM_SIDR,LPTIM registers map size identification register" hexmask.long 0x10 0.--31. 1. "S_ID,Registers map size identifier" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "LPTIM2_S" base ad:0x500A0000 rgroup.long 0x0++0x3 line.long 0x0 "LPTIM1_ISR,LPTIM1 interrupt and status register [alternate]" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1" bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" newline bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" newline bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "B_0x0,B_0x1" rgroup.long 0x0++0x3 line.long 0x0 "LPTIM1_ISR_ALTERNATE1,LPTIM1 interrupt and status register" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" newline bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "B_0x0,B_0x1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM1_ICR,LPTIM1 interrupt clear register [alternate]" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" newline bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" newline bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM1_ICR_ALTERNATE1,LPTIM1 interrupt clear register" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1" bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" newline bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" newline bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" group.long 0x8++0x3 line.long 0x0 "LPTIM1_DIER,LPTIM1 interrupt enable register [alternate]" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" group.long 0x8++0x13 line.long 0x0 "LPTIM1_DIER_ALTERNATE1,LPTIM1 interrupt enable register" bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR,LPTIM configuration register" bitfld.long 0x4 24. "ENC,Encoder mode enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "B_0x0,B_0x1" bitfld.long 0x4 22. "PRELOAD,Registers update mode" "B_0x0,B_0x1" bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 20. "WAVE,Waveform shape" "B_0x0,B_0x1" bitfld.long 0x4 19. "TIMOUT,Timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 0. "CKSEL,Clock selector" "B_0x0,B_0x1" line.long 0x8 "LPTIM_CR,LPTIM control register" bitfld.long 0x8 4. "RSTARE,Reset after read enable" "0,1" bitfld.long 0x8 3. "COUNTRST,Counter reset" "0,1" bitfld.long 0x8 2. "CNTSTRT,Timer start in Continuous mode" "0,1" bitfld.long 0x8 1. "SNGSTRT,LPTIM start in Single mode" "0,1" newline bitfld.long 0x8 0. "ENABLE,LPTIM enable" "B_0x0,B_0x1" line.long 0xC "LPTIM_CCR1,LPTIM compare register 1" hexmask.long.word 0xC 0.--15. 1. "CCR1,Capture/compare 1 value" line.long 0x10 "LPTIM_ARR,LPTIM autoreload register" hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value" rgroup.long 0x1C++0x3 line.long 0x0 "LPTIM_CNT,LPTIM counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.long 0x20++0xF line.long 0x0 "LPTIM1_OR,LPTIM1 option register" bitfld.long 0x0 0. "OR_0,Option register bit 0" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR2,LPTIM configuration register 2" bitfld.long 0x4 20.--21. "IC2SEL,LPTIM input capture 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16.--17. "IC1SEL,LPTIM input capture 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 4.--5. "IN2SEL,LPTIM input 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0.--1. "IN1SEL,LPTIM input 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "LPTIM_RCR,LPTIM repetition register" hexmask.long.byte 0x8 0.--7. 1. "REP,Repetition register value" line.long 0xC "LPTIM_CCMR1,LPTIM capture/compare mode register 1" bitfld.long 0xC 28.--29. "IC2F,Input capture 2 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 24.--25. "IC2PSC,Input capture 2 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 18.--19. "CC2P,Capture/compare 2 output polarity." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT,B_0x2_CC2_AS_INPUT,B_0x3_CC2_AS_INPUT" bitfld.long 0xC 17. "CC2E,Capture/compare 2 output enable." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT" newline bitfld.long 0xC 16. "CC2SEL,Capture/compare 2 selection" "B_0x0,B_0x1" bitfld.long 0xC 12.--13. "IC1F,Input capture 1 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 8.--9. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 2.--3. "CC1P,Capture/compare 1 output polarity." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT,?,?" newline bitfld.long 0xC 1. "CC1E,Capture/compare 1 output enable." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT" bitfld.long 0xC 0. "CC1SEL,Capture/compare 1 selection" "B_0x0,B_0x1" group.long 0x34++0x3 line.long 0x0 "LPTIM_CCR2,LPTIM compare register 2" hexmask.long.word 0x0 0.--15. 1. "CCR2,Capture/compare 2 value" rgroup.long 0x3EC++0x13 line.long 0x0 "LPTIM_HWCFGR2,LPTIM peripheral hardware configuration register 2" bitfld.long 0x0 16. "CFG3,peripheral hardware configuration 3" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,peripheral hardware configuration 1" line.long 0x4 "LPTIM_HWCFGR1,LPTIM peripheral hardware configuration register 1" hexmask.long.byte 0x4 24.--31. 1. "CFG4,peripheral hardware configuration 4" hexmask.long.byte 0x4 16.--19. 1. "CFG3,peripheral hardware configuration 3" hexmask.long.byte 0x4 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x4 0.--7. 1. "CFG1,peripheral hardware configuration 1" line.long 0x8 "LPTIM_VERR,LPTIM peripheral version identification register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "LPTIM_PIDR,LPTIM peripheral type identification register" hexmask.long 0xC 0.--31. 1. "P_ID,Peripheral type identifier" line.long 0x10 "LPTIM_SIDR,LPTIM registers map size identification register" hexmask.long 0x10 0.--31. 1. "S_ID,Registers map size identifier" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "LPTIM3" base ad:0x46050000 rgroup.long 0x0++0x3 line.long 0x0 "LPTIM1_ISR,LPTIM1 interrupt and status register [alternate]" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1" bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" newline bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" newline bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "B_0x0,B_0x1" rgroup.long 0x0++0x3 line.long 0x0 "LPTIM1_ISR_ALTERNATE1,LPTIM1 interrupt and status register" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" newline bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "B_0x0,B_0x1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM1_ICR,LPTIM1 interrupt clear register [alternate]" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" newline bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" newline bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM1_ICR_ALTERNATE1,LPTIM1 interrupt clear register" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1" bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" newline bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" newline bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" group.long 0x8++0x3 line.long 0x0 "LPTIM1_DIER,LPTIM1 interrupt enable register [alternate]" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" group.long 0x8++0x13 line.long 0x0 "LPTIM1_DIER_ALTERNATE1,LPTIM1 interrupt enable register" bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR,LPTIM configuration register" bitfld.long 0x4 24. "ENC,Encoder mode enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "B_0x0,B_0x1" bitfld.long 0x4 22. "PRELOAD,Registers update mode" "B_0x0,B_0x1" bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 20. "WAVE,Waveform shape" "B_0x0,B_0x1" bitfld.long 0x4 19. "TIMOUT,Timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 0. "CKSEL,Clock selector" "B_0x0,B_0x1" line.long 0x8 "LPTIM_CR,LPTIM control register" bitfld.long 0x8 4. "RSTARE,Reset after read enable" "0,1" bitfld.long 0x8 3. "COUNTRST,Counter reset" "0,1" bitfld.long 0x8 2. "CNTSTRT,Timer start in Continuous mode" "0,1" bitfld.long 0x8 1. "SNGSTRT,LPTIM start in Single mode" "0,1" newline bitfld.long 0x8 0. "ENABLE,LPTIM enable" "B_0x0,B_0x1" line.long 0xC "LPTIM_CCR1,LPTIM compare register 1" hexmask.long.word 0xC 0.--15. 1. "CCR1,Capture/compare 1 value" line.long 0x10 "LPTIM_ARR,LPTIM autoreload register" hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value" rgroup.long 0x1C++0x3 line.long 0x0 "LPTIM_CNT,LPTIM counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.long 0x20++0xF line.long 0x0 "LPTIM1_OR,LPTIM1 option register" bitfld.long 0x0 0. "OR_0,Option register bit 0" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR2,LPTIM configuration register 2" bitfld.long 0x4 20.--21. "IC2SEL,LPTIM input capture 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16.--17. "IC1SEL,LPTIM input capture 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 4.--5. "IN2SEL,LPTIM input 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0.--1. "IN1SEL,LPTIM input 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "LPTIM_RCR,LPTIM repetition register" hexmask.long.byte 0x8 0.--7. 1. "REP,Repetition register value" line.long 0xC "LPTIM_CCMR1,LPTIM capture/compare mode register 1" bitfld.long 0xC 28.--29. "IC2F,Input capture 2 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 24.--25. "IC2PSC,Input capture 2 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 18.--19. "CC2P,Capture/compare 2 output polarity." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT,B_0x2_CC2_AS_INPUT,B_0x3_CC2_AS_INPUT" bitfld.long 0xC 17. "CC2E,Capture/compare 2 output enable." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT" newline bitfld.long 0xC 16. "CC2SEL,Capture/compare 2 selection" "B_0x0,B_0x1" bitfld.long 0xC 12.--13. "IC1F,Input capture 1 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 8.--9. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 2.--3. "CC1P,Capture/compare 1 output polarity." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT,?,?" newline bitfld.long 0xC 1. "CC1E,Capture/compare 1 output enable." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT" bitfld.long 0xC 0. "CC1SEL,Capture/compare 1 selection" "B_0x0,B_0x1" group.long 0x34++0x3 line.long 0x0 "LPTIM_CCR2,LPTIM compare register 2" hexmask.long.word 0x0 0.--15. 1. "CCR2,Capture/compare 2 value" rgroup.long 0x3EC++0x13 line.long 0x0 "LPTIM_HWCFGR2,LPTIM peripheral hardware configuration register 2" bitfld.long 0x0 16. "CFG3,peripheral hardware configuration 3" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,peripheral hardware configuration 1" line.long 0x4 "LPTIM_HWCFGR1,LPTIM peripheral hardware configuration register 1" hexmask.long.byte 0x4 24.--31. 1. "CFG4,peripheral hardware configuration 4" hexmask.long.byte 0x4 16.--19. 1. "CFG3,peripheral hardware configuration 3" hexmask.long.byte 0x4 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x4 0.--7. 1. "CFG1,peripheral hardware configuration 1" line.long 0x8 "LPTIM_VERR,LPTIM peripheral version identification register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "LPTIM_PIDR,LPTIM peripheral type identification register" hexmask.long 0xC 0.--31. 1. "P_ID,Peripheral type identifier" line.long 0x10 "LPTIM_SIDR,LPTIM registers map size identification register" hexmask.long 0x10 0.--31. 1. "S_ID,Registers map size identifier" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "LPTIM3_S" base ad:0x56050000 rgroup.long 0x0++0x3 line.long 0x0 "LPTIM1_ISR,LPTIM1 interrupt and status register [alternate]" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1" bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" newline bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" newline bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "B_0x0,B_0x1" rgroup.long 0x0++0x3 line.long 0x0 "LPTIM1_ISR_ALTERNATE1,LPTIM1 interrupt and status register" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" newline bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "B_0x0,B_0x1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM1_ICR,LPTIM1 interrupt clear register [alternate]" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" newline bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" newline bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM1_ICR_ALTERNATE1,LPTIM1 interrupt clear register" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1" bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" newline bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" newline bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" group.long 0x8++0x3 line.long 0x0 "LPTIM1_DIER,LPTIM1 interrupt enable register [alternate]" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" group.long 0x8++0x13 line.long 0x0 "LPTIM1_DIER_ALTERNATE1,LPTIM1 interrupt enable register" bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR,LPTIM configuration register" bitfld.long 0x4 24. "ENC,Encoder mode enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "B_0x0,B_0x1" bitfld.long 0x4 22. "PRELOAD,Registers update mode" "B_0x0,B_0x1" bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 20. "WAVE,Waveform shape" "B_0x0,B_0x1" bitfld.long 0x4 19. "TIMOUT,Timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 0. "CKSEL,Clock selector" "B_0x0,B_0x1" line.long 0x8 "LPTIM_CR,LPTIM control register" bitfld.long 0x8 4. "RSTARE,Reset after read enable" "0,1" bitfld.long 0x8 3. "COUNTRST,Counter reset" "0,1" bitfld.long 0x8 2. "CNTSTRT,Timer start in Continuous mode" "0,1" bitfld.long 0x8 1. "SNGSTRT,LPTIM start in Single mode" "0,1" newline bitfld.long 0x8 0. "ENABLE,LPTIM enable" "B_0x0,B_0x1" line.long 0xC "LPTIM_CCR1,LPTIM compare register 1" hexmask.long.word 0xC 0.--15. 1. "CCR1,Capture/compare 1 value" line.long 0x10 "LPTIM_ARR,LPTIM autoreload register" hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value" rgroup.long 0x1C++0x3 line.long 0x0 "LPTIM_CNT,LPTIM counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.long 0x20++0xF line.long 0x0 "LPTIM1_OR,LPTIM1 option register" bitfld.long 0x0 0. "OR_0,Option register bit 0" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR2,LPTIM configuration register 2" bitfld.long 0x4 20.--21. "IC2SEL,LPTIM input capture 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16.--17. "IC1SEL,LPTIM input capture 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 4.--5. "IN2SEL,LPTIM input 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0.--1. "IN1SEL,LPTIM input 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "LPTIM_RCR,LPTIM repetition register" hexmask.long.byte 0x8 0.--7. 1. "REP,Repetition register value" line.long 0xC "LPTIM_CCMR1,LPTIM capture/compare mode register 1" bitfld.long 0xC 28.--29. "IC2F,Input capture 2 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 24.--25. "IC2PSC,Input capture 2 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 18.--19. "CC2P,Capture/compare 2 output polarity." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT,B_0x2_CC2_AS_INPUT,B_0x3_CC2_AS_INPUT" bitfld.long 0xC 17. "CC2E,Capture/compare 2 output enable." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT" newline bitfld.long 0xC 16. "CC2SEL,Capture/compare 2 selection" "B_0x0,B_0x1" bitfld.long 0xC 12.--13. "IC1F,Input capture 1 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 8.--9. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 2.--3. "CC1P,Capture/compare 1 output polarity." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT,?,?" newline bitfld.long 0xC 1. "CC1E,Capture/compare 1 output enable." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT" bitfld.long 0xC 0. "CC1SEL,Capture/compare 1 selection" "B_0x0,B_0x1" group.long 0x34++0x3 line.long 0x0 "LPTIM_CCR2,LPTIM compare register 2" hexmask.long.word 0x0 0.--15. 1. "CCR2,Capture/compare 2 value" rgroup.long 0x3EC++0x13 line.long 0x0 "LPTIM_HWCFGR2,LPTIM peripheral hardware configuration register 2" bitfld.long 0x0 16. "CFG3,peripheral hardware configuration 3" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,peripheral hardware configuration 1" line.long 0x4 "LPTIM_HWCFGR1,LPTIM peripheral hardware configuration register 1" hexmask.long.byte 0x4 24.--31. 1. "CFG4,peripheral hardware configuration 4" hexmask.long.byte 0x4 16.--19. 1. "CFG3,peripheral hardware configuration 3" hexmask.long.byte 0x4 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x4 0.--7. 1. "CFG1,peripheral hardware configuration 1" line.long 0x8 "LPTIM_VERR,LPTIM peripheral version identification register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "LPTIM_PIDR,LPTIM peripheral type identification register" hexmask.long 0xC 0.--31. 1. "P_ID,Peripheral type identifier" line.long 0x10 "LPTIM_SIDR,LPTIM registers map size identification register" hexmask.long 0x10 0.--31. 1. "S_ID,Registers map size identifier" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "LPTIM4" base ad:0x46060000 rgroup.long 0x0++0x3 line.long 0x0 "LPTIM1_ISR,LPTIM1 interrupt and status register [alternate]" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1" bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" newline bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" newline bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "B_0x0,B_0x1" rgroup.long 0x0++0x3 line.long 0x0 "LPTIM1_ISR_ALTERNATE1,LPTIM1 interrupt and status register" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" newline bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "B_0x0,B_0x1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM1_ICR,LPTIM1 interrupt clear register [alternate]" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" newline bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" newline bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM1_ICR_ALTERNATE1,LPTIM1 interrupt clear register" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1" bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" newline bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" newline bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" group.long 0x8++0x3 line.long 0x0 "LPTIM1_DIER,LPTIM1 interrupt enable register [alternate]" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" group.long 0x8++0x13 line.long 0x0 "LPTIM1_DIER_ALTERNATE1,LPTIM1 interrupt enable register" bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR,LPTIM configuration register" bitfld.long 0x4 24. "ENC,Encoder mode enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "B_0x0,B_0x1" bitfld.long 0x4 22. "PRELOAD,Registers update mode" "B_0x0,B_0x1" bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 20. "WAVE,Waveform shape" "B_0x0,B_0x1" bitfld.long 0x4 19. "TIMOUT,Timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 0. "CKSEL,Clock selector" "B_0x0,B_0x1" line.long 0x8 "LPTIM_CR,LPTIM control register" bitfld.long 0x8 4. "RSTARE,Reset after read enable" "0,1" bitfld.long 0x8 3. "COUNTRST,Counter reset" "0,1" bitfld.long 0x8 2. "CNTSTRT,Timer start in Continuous mode" "0,1" bitfld.long 0x8 1. "SNGSTRT,LPTIM start in Single mode" "0,1" newline bitfld.long 0x8 0. "ENABLE,LPTIM enable" "B_0x0,B_0x1" line.long 0xC "LPTIM_CCR1,LPTIM compare register 1" hexmask.long.word 0xC 0.--15. 1. "CCR1,Capture/compare 1 value" line.long 0x10 "LPTIM_ARR,LPTIM autoreload register" hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value" rgroup.long 0x1C++0x3 line.long 0x0 "LPTIM_CNT,LPTIM counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.long 0x20++0xF line.long 0x0 "LPTIM1_OR,LPTIM1 option register" bitfld.long 0x0 0. "OR_0,Option register bit 0" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR2,LPTIM configuration register 2" bitfld.long 0x4 20.--21. "IC2SEL,LPTIM input capture 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16.--17. "IC1SEL,LPTIM input capture 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 4.--5. "IN2SEL,LPTIM input 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0.--1. "IN1SEL,LPTIM input 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "LPTIM_RCR,LPTIM repetition register" hexmask.long.byte 0x8 0.--7. 1. "REP,Repetition register value" line.long 0xC "LPTIM_CCMR1,LPTIM capture/compare mode register 1" bitfld.long 0xC 28.--29. "IC2F,Input capture 2 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 24.--25. "IC2PSC,Input capture 2 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 18.--19. "CC2P,Capture/compare 2 output polarity." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT,B_0x2_CC2_AS_INPUT,B_0x3_CC2_AS_INPUT" bitfld.long 0xC 17. "CC2E,Capture/compare 2 output enable." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT" newline bitfld.long 0xC 16. "CC2SEL,Capture/compare 2 selection" "B_0x0,B_0x1" bitfld.long 0xC 12.--13. "IC1F,Input capture 1 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 8.--9. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 2.--3. "CC1P,Capture/compare 1 output polarity." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT,?,?" newline bitfld.long 0xC 1. "CC1E,Capture/compare 1 output enable." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT" bitfld.long 0xC 0. "CC1SEL,Capture/compare 1 selection" "B_0x0,B_0x1" group.long 0x34++0x3 line.long 0x0 "LPTIM_CCR2,LPTIM compare register 2" hexmask.long.word 0x0 0.--15. 1. "CCR2,Capture/compare 2 value" rgroup.long 0x3EC++0x13 line.long 0x0 "LPTIM_HWCFGR2,LPTIM peripheral hardware configuration register 2" bitfld.long 0x0 16. "CFG3,peripheral hardware configuration 3" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,peripheral hardware configuration 1" line.long 0x4 "LPTIM_HWCFGR1,LPTIM peripheral hardware configuration register 1" hexmask.long.byte 0x4 24.--31. 1. "CFG4,peripheral hardware configuration 4" hexmask.long.byte 0x4 16.--19. 1. "CFG3,peripheral hardware configuration 3" hexmask.long.byte 0x4 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x4 0.--7. 1. "CFG1,peripheral hardware configuration 1" line.long 0x8 "LPTIM_VERR,LPTIM peripheral version identification register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "LPTIM_PIDR,LPTIM peripheral type identification register" hexmask.long 0xC 0.--31. 1. "P_ID,Peripheral type identifier" line.long 0x10 "LPTIM_SIDR,LPTIM registers map size identification register" hexmask.long 0x10 0.--31. 1. "S_ID,Registers map size identifier" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "LPTIM4_S" base ad:0x56060000 rgroup.long 0x0++0x3 line.long 0x0 "LPTIM1_ISR,LPTIM1 interrupt and status register [alternate]" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1" bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" newline bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" newline bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "B_0x0,B_0x1" rgroup.long 0x0++0x3 line.long 0x0 "LPTIM1_ISR_ALTERNATE1,LPTIM1 interrupt and status register" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" newline bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "B_0x0,B_0x1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM1_ICR,LPTIM1 interrupt clear register [alternate]" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" newline bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" newline bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM1_ICR_ALTERNATE1,LPTIM1 interrupt clear register" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1" bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" newline bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" newline bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" group.long 0x8++0x3 line.long 0x0 "LPTIM1_DIER,LPTIM1 interrupt enable register [alternate]" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" group.long 0x8++0x13 line.long 0x0 "LPTIM1_DIER_ALTERNATE1,LPTIM1 interrupt enable register" bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR,LPTIM configuration register" bitfld.long 0x4 24. "ENC,Encoder mode enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "B_0x0,B_0x1" bitfld.long 0x4 22. "PRELOAD,Registers update mode" "B_0x0,B_0x1" bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 20. "WAVE,Waveform shape" "B_0x0,B_0x1" bitfld.long 0x4 19. "TIMOUT,Timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 0. "CKSEL,Clock selector" "B_0x0,B_0x1" line.long 0x8 "LPTIM_CR,LPTIM control register" bitfld.long 0x8 4. "RSTARE,Reset after read enable" "0,1" bitfld.long 0x8 3. "COUNTRST,Counter reset" "0,1" bitfld.long 0x8 2. "CNTSTRT,Timer start in Continuous mode" "0,1" bitfld.long 0x8 1. "SNGSTRT,LPTIM start in Single mode" "0,1" newline bitfld.long 0x8 0. "ENABLE,LPTIM enable" "B_0x0,B_0x1" line.long 0xC "LPTIM_CCR1,LPTIM compare register 1" hexmask.long.word 0xC 0.--15. 1. "CCR1,Capture/compare 1 value" line.long 0x10 "LPTIM_ARR,LPTIM autoreload register" hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value" rgroup.long 0x1C++0x3 line.long 0x0 "LPTIM_CNT,LPTIM counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.long 0x20++0xF line.long 0x0 "LPTIM1_OR,LPTIM1 option register" bitfld.long 0x0 0. "OR_0,Option register bit 0" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR2,LPTIM configuration register 2" bitfld.long 0x4 20.--21. "IC2SEL,LPTIM input capture 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16.--17. "IC1SEL,LPTIM input capture 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 4.--5. "IN2SEL,LPTIM input 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0.--1. "IN1SEL,LPTIM input 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "LPTIM_RCR,LPTIM repetition register" hexmask.long.byte 0x8 0.--7. 1. "REP,Repetition register value" line.long 0xC "LPTIM_CCMR1,LPTIM capture/compare mode register 1" bitfld.long 0xC 28.--29. "IC2F,Input capture 2 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 24.--25. "IC2PSC,Input capture 2 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 18.--19. "CC2P,Capture/compare 2 output polarity." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT,B_0x2_CC2_AS_INPUT,B_0x3_CC2_AS_INPUT" bitfld.long 0xC 17. "CC2E,Capture/compare 2 output enable." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT" newline bitfld.long 0xC 16. "CC2SEL,Capture/compare 2 selection" "B_0x0,B_0x1" bitfld.long 0xC 12.--13. "IC1F,Input capture 1 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 8.--9. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 2.--3. "CC1P,Capture/compare 1 output polarity." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT,?,?" newline bitfld.long 0xC 1. "CC1E,Capture/compare 1 output enable." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT" bitfld.long 0xC 0. "CC1SEL,Capture/compare 1 selection" "B_0x0,B_0x1" group.long 0x34++0x3 line.long 0x0 "LPTIM_CCR2,LPTIM compare register 2" hexmask.long.word 0x0 0.--15. 1. "CCR2,Capture/compare 2 value" rgroup.long 0x3EC++0x13 line.long 0x0 "LPTIM_HWCFGR2,LPTIM peripheral hardware configuration register 2" bitfld.long 0x0 16. "CFG3,peripheral hardware configuration 3" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,peripheral hardware configuration 1" line.long 0x4 "LPTIM_HWCFGR1,LPTIM peripheral hardware configuration register 1" hexmask.long.byte 0x4 24.--31. 1. "CFG4,peripheral hardware configuration 4" hexmask.long.byte 0x4 16.--19. 1. "CFG3,peripheral hardware configuration 3" hexmask.long.byte 0x4 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x4 0.--7. 1. "CFG1,peripheral hardware configuration 1" line.long 0x8 "LPTIM_VERR,LPTIM peripheral version identification register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "LPTIM_PIDR,LPTIM peripheral type identification register" hexmask.long 0xC 0.--31. 1. "P_ID,Peripheral type identifier" line.long 0x10 "LPTIM_SIDR,LPTIM registers map size identification register" hexmask.long 0x10 0.--31. 1. "S_ID,Registers map size identifier" tree.end endif tree "LPTIM5" base ad:0x46070000 rgroup.long 0x0++0x3 line.long 0x0 "LPTIM5_ISR,LPTIM5 interrupt and status register" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" newline bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "B_0x0,B_0x1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM5_ICR,LPTIM5 interrupt clear register" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" newline bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" group.long 0x8++0x3 line.long 0x0 "LPTIM5_DIER,LPTIM5 interrupt enable register" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" tree.end sif (cpuis("*CA35")||cpuis("*CM33F")) tree "LPTIM5_S" base ad:0x56070000 rgroup.long 0x0++0x3 line.long 0x0 "LPTIM5_ISR,LPTIM5 interrupt and status register" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" newline bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "B_0x0,B_0x1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM5_ICR,LPTIM5 interrupt clear register" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" newline bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" group.long 0x8++0x3 line.long 0x0 "LPTIM5_DIER,LPTIM5 interrupt enable register" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" tree.end endif sif (cpuis("*CM0+")) tree "LPTIM3" base ad:0x46050000 rgroup.long 0x0++0x3 line.long 0x0 "LPTIM3_ISR,LPTIM1 interrupt and status register [alternate]" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1" bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" newline bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" newline bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "B_0x0,B_0x1" rgroup.long 0x0++0x3 line.long 0x0 "LPTIM3_ISR_ALTERNATE1,LPTIM1 interrupt and status register" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" newline bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "B_0x0,B_0x1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM3_ICR,LPTIM1 interrupt clear register [alternate]" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" newline bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" newline bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM3_ICR_ALTERNATE1,LPTIM1 interrupt clear register" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1" bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" newline bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" newline bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" group.long 0x8++0x3 line.long 0x0 "LPTIM3_DIER,LPTIM1 interrupt enable register [alternate]" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" group.long 0x8++0x13 line.long 0x0 "LPTIM3_DIER_ALTERNATE1,LPTIM1 interrupt enable register" bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR,LPTIM configuration register" bitfld.long 0x4 24. "ENC,Encoder mode enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "B_0x0,B_0x1" bitfld.long 0x4 22. "PRELOAD,Registers update mode" "B_0x0,B_0x1" bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 20. "WAVE,Waveform shape" "B_0x0,B_0x1" bitfld.long 0x4 19. "TIMOUT,Timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 0. "CKSEL,Clock selector" "B_0x0,B_0x1" line.long 0x8 "LPTIM_CR,LPTIM control register" bitfld.long 0x8 4. "RSTARE,Reset after read enable" "0,1" bitfld.long 0x8 3. "COUNTRST,Counter reset" "0,1" bitfld.long 0x8 2. "CNTSTRT,Timer start in Continuous mode" "0,1" bitfld.long 0x8 1. "SNGSTRT,LPTIM start in Single mode" "0,1" newline bitfld.long 0x8 0. "ENABLE,LPTIM enable" "B_0x0,B_0x1" line.long 0xC "LPTIM_CCR1,LPTIM compare register 1" hexmask.long.word 0xC 0.--15. 1. "CCR1,Capture/compare 1 value" line.long 0x10 "LPTIM_ARR,LPTIM autoreload register" hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value" rgroup.long 0x1C++0x3 line.long 0x0 "LPTIM_CNT,LPTIM counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.long 0x20++0xF line.long 0x0 "LPTIM3_OR,LPTIM1 option register" bitfld.long 0x0 0. "OR_0,Option register bit 0" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR2,LPTIM configuration register 2" bitfld.long 0x4 20.--21. "IC2SEL,LPTIM input capture 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16.--17. "IC1SEL,LPTIM input capture 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 4.--5. "IN2SEL,LPTIM input 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0.--1. "IN1SEL,LPTIM input 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "LPTIM_RCR,LPTIM repetition register" hexmask.long.byte 0x8 0.--7. 1. "REP,Repetition register value" line.long 0xC "LPTIM_CCMR1,LPTIM capture/compare mode register 1" bitfld.long 0xC 28.--29. "IC2F,Input capture 2 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 24.--25. "IC2PSC,Input capture 2 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 18.--19. "CC2P,Capture/compare 2 output polarity." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT,B_0x2_CC2_AS_INPUT,B_0x3_CC2_AS_INPUT" bitfld.long 0xC 17. "CC2E,Capture/compare 2 output enable." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT" newline bitfld.long 0xC 16. "CC2SEL,Capture/compare 2 selection" "B_0x0,B_0x1" bitfld.long 0xC 12.--13. "IC1F,Input capture 1 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 8.--9. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 2.--3. "CC1P,Capture/compare 1 output polarity." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT,?,?" newline bitfld.long 0xC 1. "CC1E,Capture/compare 1 output enable." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT" bitfld.long 0xC 0. "CC1SEL,Capture/compare 1 selection" "B_0x0,B_0x1" group.long 0x34++0x3 line.long 0x0 "LPTIM_CCR2,LPTIM compare register 2" hexmask.long.word 0x0 0.--15. 1. "CCR2,Capture/compare 2 value" rgroup.long 0x3EC++0x13 line.long 0x0 "LPTIM_HWCFGR2,LPTIM peripheral hardware configuration register 2" bitfld.long 0x0 16. "CFG3,peripheral hardware configuration 3" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,peripheral hardware configuration 1" line.long 0x4 "LPTIM_HWCFGR1,LPTIM peripheral hardware configuration register 1" hexmask.long.byte 0x4 24.--31. 1. "CFG4,peripheral hardware configuration 4" hexmask.long.byte 0x4 16.--19. 1. "CFG3,peripheral hardware configuration 3" hexmask.long.byte 0x4 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x4 0.--7. 1. "CFG1,peripheral hardware configuration 1" line.long 0x8 "LPTIM_VERR,LPTIM peripheral version identification register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "LPTIM_PIDR,LPTIM peripheral type identification register" hexmask.long 0xC 0.--31. 1. "P_ID,Peripheral type identifier" line.long 0x10 "LPTIM_SIDR,LPTIM registers map size identification register" hexmask.long 0x10 0.--31. 1. "S_ID,Registers map size identifier" tree.end endif sif (cpuis("*CM0+")) tree "LPTIM4" base ad:0x46060000 rgroup.long 0x0++0x3 line.long 0x0 "LPTIM3_ISR,LPTIM1 interrupt and status register [alternate]" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1" bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" newline bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" newline bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "B_0x0,B_0x1" rgroup.long 0x0++0x3 line.long 0x0 "LPTIM3_ISR_ALTERNATE1,LPTIM1 interrupt and status register" bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1" bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1" bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1" bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1" bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1" newline bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1" bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1" bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1" bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "B_0x0,B_0x1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM3_ICR,LPTIM1 interrupt clear register [alternate]" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" newline bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" newline bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "LPTIM3_ICR_ALTERNATE1,LPTIM1 interrupt clear register" bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1" bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1" bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1" bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1" newline bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1" bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1" bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1" bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1" newline bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1" bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1" bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1" bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1" group.long 0x8++0x3 line.long 0x0 "LPTIM3_DIER,LPTIM1 interrupt enable register [alternate]" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" group.long 0x8++0x13 line.long 0x0 "LPTIM3_DIER_ALTERNATE1,LPTIM1 interrupt enable register" bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR,LPTIM configuration register" bitfld.long 0x4 24. "ENC,Encoder mode enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "B_0x0,B_0x1" bitfld.long 0x4 22. "PRELOAD,Registers update mode" "B_0x0,B_0x1" bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 20. "WAVE,Waveform shape" "B_0x0,B_0x1" bitfld.long 0x4 19. "TIMOUT,Timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x4 0. "CKSEL,Clock selector" "B_0x0,B_0x1" line.long 0x8 "LPTIM_CR,LPTIM control register" bitfld.long 0x8 4. "RSTARE,Reset after read enable" "0,1" bitfld.long 0x8 3. "COUNTRST,Counter reset" "0,1" bitfld.long 0x8 2. "CNTSTRT,Timer start in Continuous mode" "0,1" bitfld.long 0x8 1. "SNGSTRT,LPTIM start in Single mode" "0,1" newline bitfld.long 0x8 0. "ENABLE,LPTIM enable" "B_0x0,B_0x1" line.long 0xC "LPTIM_CCR1,LPTIM compare register 1" hexmask.long.word 0xC 0.--15. 1. "CCR1,Capture/compare 1 value" line.long 0x10 "LPTIM_ARR,LPTIM autoreload register" hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value" rgroup.long 0x1C++0x3 line.long 0x0 "LPTIM_CNT,LPTIM counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.long 0x20++0xF line.long 0x0 "LPTIM3_OR,LPTIM1 option register" bitfld.long 0x0 0. "OR_0,Option register bit 0" "B_0x0,B_0x1" line.long 0x4 "LPTIM_CFGR2,LPTIM configuration register 2" bitfld.long 0x4 20.--21. "IC2SEL,LPTIM input capture 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16.--17. "IC1SEL,LPTIM input capture 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 4.--5. "IN2SEL,LPTIM input 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0.--1. "IN1SEL,LPTIM input 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "LPTIM_RCR,LPTIM repetition register" hexmask.long.byte 0x8 0.--7. 1. "REP,Repetition register value" line.long 0xC "LPTIM_CCMR1,LPTIM capture/compare mode register 1" bitfld.long 0xC 28.--29. "IC2F,Input capture 2 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 24.--25. "IC2PSC,Input capture 2 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 18.--19. "CC2P,Capture/compare 2 output polarity." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT,B_0x2_CC2_AS_INPUT,B_0x3_CC2_AS_INPUT" bitfld.long 0xC 17. "CC2E,Capture/compare 2 output enable." "B_0x0_CC2_AS_OUTPUT,B_0x1_CC2_AS_OUTPUT" newline bitfld.long 0xC 16. "CC2SEL,Capture/compare 2 selection" "B_0x0,B_0x1" bitfld.long 0xC 12.--13. "IC1F,Input capture 1 filter" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 8.--9. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 2.--3. "CC1P,Capture/compare 1 output polarity." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT,?,?" newline bitfld.long 0xC 1. "CC1E,Capture/compare 1 output enable." "B_0x0_CC1_AS_OUTPUT,B_0x1_CC1_AS_OUTPUT" bitfld.long 0xC 0. "CC1SEL,Capture/compare 1 selection" "B_0x0,B_0x1" group.long 0x34++0x3 line.long 0x0 "LPTIM_CCR2,LPTIM compare register 2" hexmask.long.word 0x0 0.--15. 1. "CCR2,Capture/compare 2 value" rgroup.long 0x3EC++0x13 line.long 0x0 "LPTIM_HWCFGR2,LPTIM peripheral hardware configuration register 2" bitfld.long 0x0 16. "CFG3,peripheral hardware configuration 3" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,peripheral hardware configuration 1" line.long 0x4 "LPTIM_HWCFGR1,LPTIM peripheral hardware configuration register 1" hexmask.long.byte 0x4 24.--31. 1. "CFG4,peripheral hardware configuration 4" hexmask.long.byte 0x4 16.--19. 1. "CFG3,peripheral hardware configuration 3" hexmask.long.byte 0x4 8.--15. 1. "CFG2,peripheral hardware configuration 2" hexmask.long.byte 0x4 0.--7. 1. "CFG1,peripheral hardware configuration 1" line.long 0x8 "LPTIM_VERR,LPTIM peripheral version identification register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "LPTIM_PIDR,LPTIM peripheral type identification register" hexmask.long 0xC 0.--31. 1. "P_ID,Peripheral type identifier" line.long 0x10 "LPTIM_SIDR,LPTIM registers map size identification register" hexmask.long 0x10 0.--31. 1. "S_ID,Registers map size identifier" tree.end endif tree.end tree "LPUART (Low Power Universal Asynchronous Receiver Transmitter)" base ad:0x0 tree "LPUART" base ad:0x46030000 group.long 0x0++0x3 line.long 0x0 "LPUART_CR1,LPUART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,LPUART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,LPUART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "LPUART_CR1_ALTERNATE1,LPUART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,LPUART enable in low-power mode" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "UE,LPUART enable" "B_0x0,B_0x1" line.long 0x4 "LPUART_CR2,LPUART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the LPUART node" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" newline bitfld.long 0x4 12.--13. "STOP,STOP bits" "B_0x0,?,B_0x2,?" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" line.long 0x8 "LPUART_CR3,LPUART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,?,B_0x3,B_0x4,B_0x5,B_0x6,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,?,B_0x3,B_0x4,B_0x5,B_0x6,?" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" newline bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0x7 line.long 0x0 "LPUART_CR3_ALTERNATE1,LPUART control register 3" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "LPUART_BRR,LPUART baud rate register" hexmask.long.tbyte 0x4 0.--19. 1. "BRR,LPUART baud rate division (LPUARTDIV)" wgroup.long 0x18++0x3 line.long 0x0 "LPUART_RQR,LPUART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "LPUART_ISR,LPUART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" newline bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Start bit noise detection flag" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "LPUART_ISR_ALTERNATE1,LPUART interrupt and status register" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Start bit noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "LPUART_ICR,LPUART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "LPUART_RDR,LPUART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "LPUART_TDR,LPUART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "LPUART_PRESC,LPUART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "LPUART_AUTOCR,LPUART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDC transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "LPUART_HWCFGR2,LPUART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,LPUART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,LPUART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,LPUART hardware configuration 1" line.long 0x4 "LPUART_HWCFGR1,LPUART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,LPUART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,LPUART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,LPUART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,LPUART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,LPUART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,LPUART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,LPUART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,LPUART hardware configuration 1" line.long 0x8 "LPUART_VERR,LPUART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "LPUART_IPIDR,LPUART identification register" hexmask.long 0xC 0.--31. 1. "ID,Peripheral identifier" line.long 0x10 "LPUART_SIDR,LPUART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end sif (cpuis("*CA35")) tree "LPUART1_S" base ad:0x56030000 group.long 0x0++0x3 line.long 0x0 "LPUART_CR1,LPUART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,LPUART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,LPUART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "LPUART_CR1_ALTERNATE1,LPUART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,LPUART enable in low-power mode" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "UE,LPUART enable" "B_0x0,B_0x1" line.long 0x4 "LPUART_CR2,LPUART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the LPUART node" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" newline bitfld.long 0x4 12.--13. "STOP,STOP bits" "B_0x0,?,B_0x2,?" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" line.long 0x8 "LPUART_CR3,LPUART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,?,B_0x3,B_0x4,B_0x5,B_0x6,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,?,B_0x3,B_0x4,B_0x5,B_0x6,?" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" newline bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0x7 line.long 0x0 "LPUART_CR3_ALTERNATE1,LPUART control register 3" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "LPUART_BRR,LPUART baud rate register" hexmask.long.tbyte 0x4 0.--19. 1. "BRR,LPUART baud rate division (LPUARTDIV)" wgroup.long 0x18++0x3 line.long 0x0 "LPUART_RQR,LPUART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "LPUART_ISR,LPUART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" newline bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Start bit noise detection flag" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "LPUART_ISR_ALTERNATE1,LPUART interrupt and status register" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Start bit noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "LPUART_ICR,LPUART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "LPUART_RDR,LPUART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "LPUART_TDR,LPUART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "LPUART_PRESC,LPUART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "LPUART_AUTOCR,LPUART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDC transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "LPUART_HWCFGR2,LPUART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,LPUART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,LPUART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,LPUART hardware configuration 1" line.long 0x4 "LPUART_HWCFGR1,LPUART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,LPUART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,LPUART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,LPUART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,LPUART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,LPUART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,LPUART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,LPUART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,LPUART hardware configuration 1" line.long 0x8 "LPUART_VERR,LPUART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "LPUART_IPIDR,LPUART identification register" hexmask.long 0xC 0.--31. 1. "ID,Peripheral identifier" line.long 0x10 "LPUART_SIDR,LPUART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CM33F")) tree "LPUART1_S" base ad:0x56030000 group.long 0x0++0x3 line.long 0x0 "LPUART_CR1,LPUART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,LPUART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,LPUART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "LPUART_CR1_ALTERNATE1,LPUART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,LPUART enable in low-power mode" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "UE,LPUART enable" "B_0x0,B_0x1" line.long 0x4 "LPUART_CR2,LPUART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the LPUART node" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" newline bitfld.long 0x4 12.--13. "STOP,STOP bits" "B_0x0,?,B_0x2,?" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" line.long 0x8 "LPUART_CR3,LPUART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,?,B_0x3,B_0x4,B_0x5,B_0x6,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,?,B_0x3,B_0x4,B_0x5,B_0x6,?" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" newline bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0x7 line.long 0x0 "LPUART_CR3_ALTERNATE1,LPUART control register 3" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "LPUART_BRR,LPUART baud rate register" hexmask.long.tbyte 0x4 0.--19. 1. "BRR,LPUART baud rate division (LPUARTDIV)" wgroup.long 0x18++0x3 line.long 0x0 "LPUART_RQR,LPUART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "LPUART_ISR,LPUART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" newline bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Start bit noise detection flag" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "LPUART_ISR_ALTERNATE1,LPUART interrupt and status register" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Start bit noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "LPUART_ICR,LPUART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "LPUART_RDR,LPUART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "LPUART_TDR,LPUART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "LPUART_PRESC,LPUART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "LPUART_AUTOCR,LPUART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDC transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "LPUART_HWCFGR2,LPUART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,LPUART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,LPUART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,LPUART hardware configuration 1" line.long 0x4 "LPUART_HWCFGR1,LPUART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,LPUART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,LPUART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,LPUART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,LPUART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,LPUART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,LPUART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,LPUART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,LPUART hardware configuration 1" line.long 0x8 "LPUART_VERR,LPUART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "LPUART_IPIDR,LPUART identification register" hexmask.long 0xC 0.--31. 1. "ID,Peripheral identifier" line.long 0x10 "LPUART_SIDR,LPUART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif tree.end sif (cpuis("*CA35")||cpuis("*CM33F")) tree "LTDC (LCD-TFT Display Controller)" base ad:0x0 tree "LTDC" base ad:0x48010000 rgroup.long 0x0++0x7 line.long 0x0 "LTDC_IDR,LTDC identification register" hexmask.long.byte 0x0 16.--23. 1. "MAJVER,LTDC major version" hexmask.long.byte 0x0 8.--15. 1. "MINVER,LTDC minor version" hexmask.long.byte 0x0 0.--7. 1. "REV,Revision" line.long 0x4 "LTDC_LCR,LDTC layer count register" hexmask.long.byte 0x4 0.--7. 1. "LNBR,Number of layers" group.long 0x8++0x13 line.long 0x0 "LTDC_SSCR,LTDC synchronization size configuration register" hexmask.long.word 0x0 16.--27. 1. "HSW,Horizontal synchronization width (in units of pixel clock period)" hexmask.long.word 0x0 0.--11. 1. "VSH,Vertical synchronization height (in units of horizontal scan line)" line.long 0x4 "LTDC_BPCR,LTDC back porch configuration register" hexmask.long.word 0x4 16.--27. 1. "AHBP,Accumulated horizontal back porch (in units of pixel clock period)" hexmask.long.word 0x4 0.--11. 1. "AVBP,Accumulated Vertical back porch (in units of horizontal scan line)" line.long 0x8 "LTDC_AWCR,LTDC active width configuration register" hexmask.long.word 0x8 16.--27. 1. "AAW,Accumulated active width (in units of pixel clock period)" hexmask.long.word 0x8 0.--11. 1. "AAH,Accumulated active height (in units of horizontal scan line)" line.long 0xC "LTDC_TWCR,LTDC total width configuration register" hexmask.long.word 0xC 16.--27. 1. "TOTALW,Total width (in units of pixel clock period)" hexmask.long.word 0xC 0.--11. 1. "TOTALH,Total height (in units of horizontal scan line)" line.long 0x10 "LTDC_GCR,LTDC global control register" bitfld.long 0x10 31. "HSPOL,Horizontal synchronization polarity" "B_0x0,B_0x1" bitfld.long 0x10 30. "VSPOL,Vertical synchronization polarity" "B_0x0,B_0x1" bitfld.long 0x10 29. "DEPOL,Blanking (no data/pixel) polarity" "B_0x0,B_0x1" bitfld.long 0x10 28. "PCPOL,Pixel clock polarity" "B_0x0,B_0x1" bitfld.long 0x10 26. "SFEXEN,Single-frame mode: external trigger enable" "B_0x0,B_0x1" bitfld.long 0x10 25. "SFSWTR,Single-frame mode software trigger" "B_0x0,B_0x1" bitfld.long 0x10 24. "SFEN,Single-frame mode enable" "B_0x0,B_0x1" newline bitfld.long 0x10 19. "CRCEN,CRC enable" "B_0x0,B_0x1" bitfld.long 0x10 16. "DEN,Dither enable" "B_0x0,B_0x1" rbitfld.long 0x10 12.--14. "DRW,Dither red width" "0,1,2,3,4,5,6,7" rbitfld.long 0x10 8.--10. "DGW,Dither green width" "0,1,2,3,4,5,6,7" rbitfld.long 0x10 4.--6. "DBW,Dither blue width" "0,1,2,3,4,5,6,7" bitfld.long 0x10 2. "ROTEN,Rotation enable" "B_0x0,B_0x1" bitfld.long 0x10 1. "GAMEN,Gamma correction enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "LTDCEN,LTDC global enable" "B_0x0,B_0x1" rgroup.long 0x1C++0x7 line.long 0x0 "LTDC_GC1R,LTDC global configuration 1 register" bitfld.long 0x0 31. "BMA,Blind mode ability" "0,1" bitfld.long 0x0 30. "CRMA,Configuration reading mode ability" "0,1" bitfld.long 0x0 29. "STRA,Status register ability" "0,1" bitfld.long 0x0 28. "DWP,Dither width programmability" "0,1" bitfld.long 0x0 27. "SPP,Sync polarity programmability" "0,1" bitfld.long 0x0 25. "TP,Timing programmability" "0,1" bitfld.long 0x0 24. "LNIP,Line-IRQ: line position programmability" "0,1" newline bitfld.long 0x0 23. "BBA,Background blending ability" "0,1" bitfld.long 0x0 22. "BCP,Background color programmability (unique color blended as background)" "0,1" bitfld.long 0x0 21. "SHRA,Shadow register ability" "0,1" bitfld.long 0x0 17.--19. "GCT,Gamma correction technique implemented" "B_0x0,B_0x1,B_0x2,?,?,?,?,?" bitfld.long 0x0 14.--15. "DT,Dithering technique implemented" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "PRBA,Precise blending ability" "0,1" hexmask.long.byte 0x0 8.--11. 1. "WRCH,Width of red channel output" newline hexmask.long.byte 0x0 4.--7. 1. "WGCH,Width of green channel output" hexmask.long.byte 0x0 0.--3. 1. "WBCH,Width of blue channel output" line.long 0x4 "LTDC_GC2R,LTDC global configuration 2 register" bitfld.long 0x4 15. "BOA,Blending order ability" "B_0x0,B_0x1" bitfld.long 0x4 13. "CRCA,CRC ability" "B_0x0,B_0x1" bitfld.long 0x4 12. "SFA,Single frame mode ability" "B_0x0,B_0x1" bitfld.long 0x4 11. "SISA,Second interrupt set ability" "B_0x0,B_0x1" bitfld.long 0x4 10. "ROTA,Rotation support ability" "0,1" bitfld.long 0x4 9. "AXIIDA,AXIID ability" "0,1" bitfld.long 0x4 8. "OCA,Output conversion ability (RGB to YCbCr)" "0,1" newline bitfld.long 0x4 7. "EDCA,External display control ability" "0,1" bitfld.long 0x4 4.--6. "BW,Bus width (log2 of number of bytes)" "?,?,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x4 3. "DPA,Secondary RGB output port ability" "0,1" bitfld.long 0x4 2. "DVA,Dual-view ability" "0,1" bitfld.long 0x4 1. "STSA,Slave timings synchronization ability" "0,1" bitfld.long 0x4 0. "BLA,Background layer ability (pixels of background layer are read from memory)" "0,1" group.long 0x24++0x3 line.long 0x0 "LTDC_SRCR,LTDC shadow reload configuration register" bitfld.long 0x0 1. "VBR,Vertical blanking reload request" "B_0x0,B_0x1" bitfld.long 0x0 0. "IMR,Immediate reload trigger" "B_0x0,B_0x1" wgroup.long 0x28++0x3 line.long 0x0 "LTDC_GCCR,LTDC gamma correction configuration register" bitfld.long 0x0 18. "REN,Write trigger to the red table" "B_0x0,B_0x1" bitfld.long 0x0 17. "GEN,Write trigger to the green table" "B_0x0,B_0x1" bitfld.long 0x0 16. "BEN,Write trigger to the blue table" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "COMP,Color component to be written in either (or all) the R G B tables" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address of the R G B table where the COMP component is written" group.long 0x2C++0x3 line.long 0x0 "LTDC_BCCR,LTDC background color configuration register" hexmask.long.byte 0x0 16.--23. 1. "BCRED,Background color red value" hexmask.long.byte 0x0 8.--15. 1. "BCGREEN,Background color green value" hexmask.long.byte 0x0 0.--7. 1. "BCBLUE,Background color blue value" group.long 0x34++0x3 line.long 0x0 "LTDC_IER,LTDC interrupt enable register" bitfld.long 0x0 8. "FURIE,FIFO underrun at rotation interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "FUIE,FIFO underrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "RRIE,Register reload interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "TERRIE,Transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "FUWIE,FIFO underrun warning interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "LIE,Line interrupt enable" "B_0x0,B_0x1" rgroup.long 0x38++0x3 line.long 0x0 "LTDC_ISR,LTDC interrupt status register" bitfld.long 0x0 8. "FURIF,FIFO underrun at rotation interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCIF,CRC error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 6. "FUIF,FIFO underrun interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 3. "RRIF,Register reload interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "TERRIF,Transfer error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FUWIF,FIFO underrun warning interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "LIF,Line interrupt flag" "B_0x0,B_0x1" wgroup.long 0x3C++0x3 line.long 0x0 "LTDC_ICR,LTDC interrupt clear register" bitfld.long 0x0 8. "CFURIF,FIFO underrun at rotation interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 7. "CCRCIF,CRC error interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 6. "CFUIF,FIFO underrun interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 3. "CRRIF,Register reload interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 2. "CTERRIF,Transfer error interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 1. "CFUWIF,FIFO underrun warning interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 0. "CLIF,Line-interrupt flag clear" "B_0x0,B_0x1" group.long 0x40++0x3 line.long 0x0 "LTDC_LIPCR,LTDC line interrupt position configuration register" hexmask.long.word 0x0 0.--11. 1. "LIPOS,Line interrupt position" rgroup.long 0x44++0x7 line.long 0x0 "LTDC_CPSR,LTDC current position status register" hexmask.long.word 0x0 16.--27. 1. "CXPOS,Current X position" hexmask.long.word 0x0 0.--11. 1. "CYPOS,Current Y position" line.long 0x4 "LTDC_CDSR,LTDC current display status register" bitfld.long 0x4 3. "HSYNCS,Horizontal synchronization display status" "B_0x0,B_0x1" bitfld.long 0x4 2. "VSYNCS,Vertical synchronization display status" "B_0x0,B_0x1" bitfld.long 0x4 1. "HDES,Horizontal data enable display status" "B_0x0,B_0x1" bitfld.long 0x4 0. "VDES,Vertical data enable display status" "B_0x0,B_0x1" group.long 0x60++0x7 line.long 0x0 "LTDC_EDCR,LTDC external display control register" bitfld.long 0x0 27. "OCYCO,Output conversion to YCbCr 422" "B_0x0,B_0x1" bitfld.long 0x0 26. "OCYSEL,Output conversion to YCbCr 422" "B_0x0,B_0x1" bitfld.long 0x0 25. "OCYEN,Output conversion to YCbCr 422 enable" "B_0x0,B_0x1" line.long 0x4 "LTDC_IER2,LTDC interrupt enable register 2" bitfld.long 0x4 8. "FURIE,FIFO underrun at rotation interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "CRCIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "FUIE,FIFO underrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "RRIE,Register reload interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "TERRIE,Transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "FUWIE,FIFO underrun warning interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "LIE,Line interrupt enable" "B_0x0,B_0x1" rgroup.long 0x68++0x3 line.long 0x0 "LTDC_ISR2,LTDC interrupt status register 2" bitfld.long 0x0 8. "FURIF,FIFO underrun at rotation interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCIF,CRC Error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 6. "FUIF,FIFO underrun interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 3. "RRIF,Register reload interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "TERRIF,Transfer error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FUWIF,FIFO underrun warning interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "LIF,Line interrupt flag" "B_0x0,B_0x1" wgroup.long 0x6C++0x3 line.long 0x0 "LTDC_ICR2,LTDC interrupt clear register 2" bitfld.long 0x0 8. "CFURIF,Clear FIFO underrun at rotation interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "CCRCIF,Clear the CRC error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 6. "CFUIF,Clear the FIFO underrun interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 3. "CRRIF,Clear register reload interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "CTERRIF,Clear the transfer error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "CFUWIF,Clear the FIFO underrun warning interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "CLIF,Clear the line interrupt flag" "B_0x0,B_0x1" group.long 0x70++0x3 line.long 0x0 "LTDC_LIPCR2,LTDC line interrupt position configuration register 2" hexmask.long.word 0x0 0.--11. 1. "LIPOS,Line interrupt position" group.long 0x78++0x3 line.long 0x0 "LTDC_ECRCR,LTDC expected CRC register" hexmask.long.word 0x0 0.--15. 1. "ECRC,Expected CRC of frame" rgroup.long 0x7C++0x3 line.long 0x0 "LTDC_CCRCR,LTDC computed CRC register" hexmask.long.word 0x0 0.--15. 1. "CCRC,Computed CRC of frame" group.long 0x80++0x13 line.long 0x0 "LTDC_RB0AR,LTDC rotation buffer 0 address register" hexmask.long 0x0 0.--31. 1. "ADDR,Address of the rotation buffer 0" line.long 0x4 "LTDC_RB1AR,LTDC rotation buffer 1 address register" hexmask.long 0x4 0.--31. 1. "ADDR,Address of the rotation buffer 1" line.long 0x8 "LTDC_RBPR,LTDC rotation buffer pitch register" hexmask.long.word 0x8 0.--11. 1. "PITCH,Pitch in bytes of the rotation buffers 0 and 1" line.long 0xC "LTDC_RIFCR,LTDC rotation intermediate frame color register" hexmask.long.byte 0xC 16.--23. 1. "RIFRED,Red component of the rotation intermediate frame" hexmask.long.byte 0xC 8.--15. 1. "RIFGREEN,Green component of the rotation intermediate frame" hexmask.long.byte 0xC 0.--7. 1. "RIFBLUE,Blue component of the rotation intermediate frame" line.long 0x10 "LTDC_FUTR,LTDC FIFO underrun threshold register" hexmask.long.word 0x10 0.--15. 1. "THRE,Threshold to trigger a FIFO underrun interrupt (per FIFO word 64 bits)" rgroup.long 0x100++0x7 line.long 0x0 "LTDC_L1C0R,LTDC layer 1 configuration 0 register" bitfld.long 0x0 31. "ARGB8888,Pixel format ability for argb8888" "0,1" bitfld.long 0x0 30. "ABGR8888,Pixel format ability for abgr8888" "0,1" bitfld.long 0x0 29. "RGBA8888,Pixel format ability for rgba8888" "0,1" bitfld.long 0x0 28. "BGRA888,Pixel format ability for bgra8888" "0,1" bitfld.long 0x0 27. "RGB565,Pixel format ability for rgb565" "0,1" bitfld.long 0x0 26. "BGR565,Pixel format ability for bgr565" "0,1" bitfld.long 0x0 25. "RGB888,Pixel format ability for rgb888" "0,1" newline bitfld.long 0x0 24. "FF,Flexible pixel format ability" "0,1" bitfld.long 0x0 23. "F11PC,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 22. "F1PC,Blending factor 1 ability for pixel_alpha * constant_alpha" "0,1" bitfld.long 0x0 21. "F11C,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 20. "F1C,Blending factor 1 ability for constant_alpha" "0,1" bitfld.long 0x0 19. "F11P,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 18. "F1P,Blending factor 1 ability for pixel_alpha" "0,1" newline bitfld.long 0x0 17. "F10,Blending factor 1 ability for 0." "0,1" bitfld.long 0x0 16. "F11,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 15. "F21PC,Blending factor 2 ability for 1." "0,1" bitfld.long 0x0 14. "F2PC,Blending factor 2 ability for pixel_alpha * constant_alpha" "0,1" bitfld.long 0x0 13. "F21C,Blending factor 2 ability for 1." "0,1" bitfld.long 0x0 12. "F2C,Blending factor 2 ability for constant_alpha" "0,1" bitfld.long 0x0 11. "F21P,Blending factor 2 ability for 1." "0,1" newline bitfld.long 0x0 10. "F2P,Blending factor 2 ability for pixel_alpha" "0,1" bitfld.long 0x0 9. "F20,Blending factor 2 ability for 0." "0,1" bitfld.long 0x0 8. "F21,Blending factor 2 ability for 1." "0,1" bitfld.long 0x0 7. "CKRA,Color key replace ability" "0,1" bitfld.long 0x0 6. "CLUTA,CLUT ability" "0,1" bitfld.long 0x0 5. "WINA,Windowing ability" "0,1" bitfld.long 0x0 4. "DCP,Default color programmability" "0,1" newline bitfld.long 0x0 3. "APA,Alpha plane ability" "0,1" bitfld.long 0x0 2. "CFBPA,Color frame buffer pitch ability" "0,1" bitfld.long 0x0 1. "CFBDA,Color frame buffer duplication ability" "0,1" bitfld.long 0x0 0. "CKTA,Color key transparency ability" "0,1" line.long 0x4 "LTDC_L1C1R,LTDC layer 1 configuration 1 register" bitfld.long 0x4 31. "SCA,Scaling ability for this layer" "B_0x0,B_0x1" bitfld.long 0x4 2. "YFPA,YCbCr 420 full-planar ability for this layer" "B_0x0,B_0x1" bitfld.long 0x4 1. "YSPA,YCbCr 420 semi-planar ability for this layer" "B_0x0,B_0x1" bitfld.long 0x4 0. "YIA,YCbCr 422 interleaved ability for this layer" "B_0x0,B_0x1" group.long 0x108++0x47 line.long 0x0 "LTDC_L1RCR,LTDC layer 1 reload control register" bitfld.long 0x0 2. "GRMSK,Shadow reload control global (centralized) reload masked" "B_0x0,B_0x1" bitfld.long 0x0 1. "VBR,Vertical blanking reload request" "B_0x0,B_0x1" bitfld.long 0x0 0. "IMR,Immediate reload trigger" "B_0x0,B_0x1" line.long 0x4 "LTDC_L1CR,LTDC layer 1 control register" bitfld.long 0x4 10. "SCEN,Scaler enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "DCBEN,Default color blending enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "HMEN,Horizontal mirroring enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "CLUTEN,Color look-up table enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CKEN,Color keying enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "LEN,Layer enable" "B_0x0,B_0x1" line.long 0x8 "LTDC_L1WHPCR,LTDC layer 1 window horizontal position configuration register" hexmask.long.word 0x8 16.--27. 1. "WHSPPOS,Window horizontal stop position" hexmask.long.word 0x8 0.--11. 1. "WHSTPOS,Window horizontal start position" line.long 0xC "LTDC_L1WVPCR,LTDC layer 1 window vertical position configuration register" hexmask.long.word 0xC 16.--27. 1. "WVSPPOS,Window vertical stop position" hexmask.long.word 0xC 0.--11. 1. "WVSTPOS,Window vertical start position" line.long 0x10 "LTDC_L1CKCR,LTDC layer 1 color keying configuration register" hexmask.long.byte 0x10 16.--23. 1. "CKRED,Color key red value" hexmask.long.byte 0x10 8.--15. 1. "CKGREEN,Color key green value" hexmask.long.byte 0x10 0.--7. 1. "CKBLUE,Color key blue value" line.long 0x14 "LTDC_L1PFCR,LTDC layer 1 pixel format configuration register" bitfld.long 0x14 0.--2. "PF,Pixel format" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x18 "LTDC_L1CACR,LTDC layer 1 constant alpha configuration register" hexmask.long.byte 0x18 0.--7. 1. "CONSTA,Constant alpha" line.long 0x1C "LTDC_L1DCCR,LTDC layer 1 default color configuration register" hexmask.long.byte 0x1C 24.--31. 1. "DCALPHA,Default color alpha" hexmask.long.byte 0x1C 16.--23. 1. "DCRED,Default color red" hexmask.long.byte 0x1C 8.--15. 1. "DCGREEN,Default color green" hexmask.long.byte 0x1C 0.--7. 1. "DCBLUE,Default color blue" line.long 0x20 "LTDC_L1BFCR,LTDC layer 1 blending factors configuration register" bitfld.long 0x20 16.--18. "BOR,Blending order" "B_0x0,?,?,?,?,?,?,B_0x7" bitfld.long 0x20 8.--10. "BF1,Default factor 1" "?,?,?,?,B_0x4,?,B_0x6,?" bitfld.long 0x20 0.--2. "BF2,Blending factor 2" "?,?,?,?,?,B_0x5,?,B_0x7" line.long 0x24 "LTDC_L1BLCR,LTDC layer 1 burst length configuration register" hexmask.long.byte 0x24 0.--4. 1. "BL,Burst length" line.long 0x28 "LTDC_L1PCR,LTDC layer 1 planar configuration register" bitfld.long 0x28 9. "YREN,Y rescale enable for the color dynamic range" "B_0x0,B_0x1" bitfld.long 0x28 8. "OF,Odd pixel first" "B_0x0,B_0x1" bitfld.long 0x28 7. "CBF,Cb component first" "B_0x0,B_0x1" bitfld.long 0x28 6. "YF,Y component first" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "YCM,YCbCr conversion mode" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x28 3. "YCEN,YCbCr-to-RGB conversion enable" "B_0x0,B_0x1" line.long 0x2C "LTDC_L1CFBAR,LTDC layer 1 color frame buffer address register" hexmask.long 0x2C 0.--31. 1. "CFBADD,Color frame buffer start address" line.long 0x30 "LTDC_L1CFBLR,LTDC layer 1 color frame buffer length register" hexmask.long.word 0x30 16.--30. 1. "CFBP,Color frame buffer pitch in bytes" hexmask.long.word 0x30 0.--13. 1. "CFBLL,Color frame buffer line length" line.long 0x34 "LTDC_L1CFBLNR,LTDC layer 1 color frame buffer line number register" hexmask.long.word 0x34 0.--11. 1. "CFBLNBR,Frame buffer line number" line.long 0x38 "LTDC_L1AFBA0R,LTDC layer 1 auxiliary frame buffer address 0 register" hexmask.long 0x38 0.--31. 1. "AFBADD0,Frame buffer start address" line.long 0x3C "LTDC_L1AFBA1R,LTDC layer 1 auxiliary frame buffer address 1 register" hexmask.long 0x3C 0.--31. 1. "AFBADD1,Auxiliary frame buffer start address" line.long 0x40 "LTDC_L1AFBLR,LTDC layer 1 auxiliary frame buffer length register" hexmask.long.word 0x40 16.--30. 1. "AFBP,Auxiliary frame buffer pitch in bytes" hexmask.long.word 0x40 0.--13. 1. "AFBLL,Auxiliary frame buffer line length" line.long 0x44 "LTDC_L1AFBLNR,LTDC layer 1 auxiliary frame buffer line number register" hexmask.long.word 0x44 0.--11. 1. "AFBLNBR,Auxiliary frame buffer line number" wgroup.long 0x150++0x3 line.long 0x0 "LTDC_L1CLUTWR,LTDC layer 1 CLUT write register" hexmask.long.byte 0x0 24.--31. 1. "CLUTADD,CLUT address" hexmask.long.byte 0x0 16.--23. 1. "RED,Red value" hexmask.long.byte 0x0 8.--15. 1. "GREEN,Green value" hexmask.long.byte 0x0 0.--7. 1. "BLUE,Blue value" group.long 0x154++0x27 line.long 0x0 "LTDC_L1SISR,LTDC layer 1 scaler input size register" hexmask.long.word 0x0 16.--27. 1. "SIV,Scaler vertical input size (input height)" hexmask.long.word 0x0 0.--11. 1. "SIH,Scaler horizontal input size (input width)" line.long 0x4 "LTDC_L1SOSR,LTDC layer 1 scaler output size register" hexmask.long.word 0x4 16.--27. 1. "SOV,Scaler vertical output size (output height)" hexmask.long.word 0x4 0.--11. 1. "SOH,Scaler horizontal output size (output width)" line.long 0x8 "LTDC_L1SVSFR,LTDC layer 1 scaler vertical scaling factor register" hexmask.long.word 0x8 0.--15. 1. "SVF,Scaler vertical scaling factor" line.long 0xC "LTDC_L1SVSPR,LTDC layer 1 scaler vertical scaling phase register" hexmask.long.word 0xC 0.--15. 1. "SVP,Scaler vertical scaling factor" line.long 0x10 "LTDC_L1SHSFR,LTDC layer 1 scaler horizontal scaling factor register" hexmask.long.word 0x10 0.--15. 1. "SHF,Scaler horizontal scaling factor" line.long 0x14 "LTDC_L1SHSPR,LTDC layer 1 scaler horizontal scaling phase register" hexmask.long.word 0x14 0.--15. 1. "SHP,Scaler horizontal scaling phase" line.long 0x18 "LTDC_L1CYR0R,LTDC layer 1 conversion YCbCr RGB 0 register" hexmask.long.word 0x18 16.--25. 1. "CB2B,Cb-to-Blue coefficient with bits 9:8 as positive integer and 7:0 as decimals." hexmask.long.word 0x18 0.--9. 1. "CR2R,Cr-to-Red coefficient with bits 9:8 as positive integer and 7:0 as decimals." line.long 0x1C "LTDC_L1CYR1R,LTDC layer 1 conversion YCbCr RGB 1 register" hexmask.long.word 0x1C 16.--25. 1. "CB2G,Cb-to-Green coefficient with bits 9:8 as positive integer and 7:0 as decimals." hexmask.long.word 0x1C 0.--9. 1. "CR2G,Cr-to-Green coefficient with bits 9:8 as positive integer and 7:0 as decimals." line.long 0x20 "LTDC_L1FPF0R,LTDC layer 1 flexible pixel format 0 register" hexmask.long.byte 0x20 14.--17. 1. "RLEN,Width of the red component (in bits)" hexmask.long.byte 0x20 9.--13. 1. "RPOS,Location of the red component inside the pixel memory word (in bits)" hexmask.long.byte 0x20 5.--8. 1. "ALEN,Width of the alpha component (in bits)" hexmask.long.byte 0x20 0.--4. 1. "APOS,Location of the alpha component inside the pixel memory word (in bits)" line.long 0x24 "LTDC_L1FPF1R,LTDC layer 1 flexible pixel format 1 register" bitfld.long 0x24 18.--20. "PSIZE,Pixel size (in bytes)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x24 14.--17. 1. "BLEN,Width of the blue component (in bits)" hexmask.long.byte 0x24 9.--13. 1. "BPOS,Location of the blue component inside the pixel memory word (in bits)" hexmask.long.byte 0x24 5.--8. 1. "GLEN,Width of the green component (in bits)" hexmask.long.byte 0x24 0.--4. 1. "GPOS,Location of the green component inside the pixel memory word (in bits)" rgroup.long 0x200++0x7 line.long 0x0 "LTDC_L2C0R,LTDC layer 2 configuration 0 register" bitfld.long 0x0 31. "ARGB8888,Pixel format ability for argb8888" "0,1" bitfld.long 0x0 30. "ABGR8888,Pixel format ability for abgr8888" "0,1" bitfld.long 0x0 29. "RGBA8888,Pixel format ability for rgba8888" "0,1" bitfld.long 0x0 28. "BGRA888,Pixel format ability for bgra8888" "0,1" bitfld.long 0x0 27. "RGB565,Pixel format ability for rgb565" "0,1" bitfld.long 0x0 26. "BGR565,Pixel format ability for bgr565" "0,1" bitfld.long 0x0 25. "RGB888,Pixel format ability for rgb888" "0,1" newline bitfld.long 0x0 24. "FF,Flexible pixel format ability" "0,1" bitfld.long 0x0 23. "F11PC,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 22. "F1PC,Blending factor 1 ability for pixel_alpha * constant_alpha" "0,1" bitfld.long 0x0 21. "F11C,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 20. "F1C,Blending factor 1 ability for constant_alpha" "0,1" bitfld.long 0x0 19. "F11P,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 18. "F1P,Blending factor 1 ability for pixel_alpha" "0,1" newline bitfld.long 0x0 17. "F10,Blending factor 1 ability for 0." "0,1" bitfld.long 0x0 16. "F11,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 15. "F21PC,Blending factor 2 ability for 1." "0,1" bitfld.long 0x0 14. "F2PC,Blending factor 2 ability for pixel_alpha * constant_alpha" "0,1" bitfld.long 0x0 13. "F21C,Blending factor 2 ability for 1." "0,1" bitfld.long 0x0 12. "F2C,Blending factor 2 ability for constant_alpha" "0,1" bitfld.long 0x0 11. "F21P,Blending factor 2 ability for 1." "0,1" newline bitfld.long 0x0 10. "F2P,Blending factor 2 ability for pixel_alpha" "0,1" bitfld.long 0x0 9. "F20,Blending factor 2 ability for 0." "0,1" bitfld.long 0x0 8. "F21,Blending factor 2 ability for 1." "0,1" bitfld.long 0x0 7. "CKRA,Color key replace ability" "0,1" bitfld.long 0x0 6. "CLUTA,CLUT ability" "0,1" bitfld.long 0x0 5. "WINA,Windowing ability" "0,1" bitfld.long 0x0 4. "DCP,Default color programmability" "0,1" newline bitfld.long 0x0 3. "APA,Alpha plane ability" "0,1" bitfld.long 0x0 2. "CFBPA,Color frame buffer pitch ability" "0,1" bitfld.long 0x0 1. "CFBDA,Color frame buffer duplication ability" "0,1" bitfld.long 0x0 0. "CKTA,Color key transparency ability" "0,1" line.long 0x4 "LTDC_L2C1R,LTDC layer 2 configuration 1 register" bitfld.long 0x4 31. "SCA,Scaling ability for this layer" "B_0x0,B_0x1" bitfld.long 0x4 2. "YFPA,YCbCr 420 full-planar ability for this layer" "B_0x0,B_0x1" bitfld.long 0x4 1. "YSPA,YCbCr 420 semi-planar ability for this layer" "B_0x0,B_0x1" bitfld.long 0x4 0. "YIA,YCbCr 422 interleaved ability for this layer" "B_0x0,B_0x1" group.long 0x208++0x47 line.long 0x0 "LTDC_L2RCR,LTDC layer 2 reload control register" bitfld.long 0x0 2. "GRMSK,Shadow reload control global (centralized) reload masked" "B_0x0,B_0x1" bitfld.long 0x0 1. "VBR,Vertical blanking reload request" "B_0x0,B_0x1" bitfld.long 0x0 0. "IMR,Immediate reload trigger" "B_0x0,B_0x1" line.long 0x4 "LTDC_L2CR,LTDC layer 2 control register" bitfld.long 0x4 10. "SCEN,Scaler enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "DCBEN,Default color blending enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "HMEN,Horizontal mirroring enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "CLUTEN,Color look-up table enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CKEN,Color keying enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "LEN,Layer enable" "B_0x0,B_0x1" line.long 0x8 "LTDC_L2WHPCR,LTDC layer 2 window horizontal position configuration register" hexmask.long.word 0x8 16.--27. 1. "WHSPPOS,Window horizontal stop position" hexmask.long.word 0x8 0.--11. 1. "WHSTPOS,Window horizontal start position" line.long 0xC "LTDC_L2WVPCR,LTDC layer 2 window vertical position configuration register" hexmask.long.word 0xC 16.--27. 1. "WVSPPOS,Window vertical stop position" hexmask.long.word 0xC 0.--11. 1. "WVSTPOS,Window vertical start position" line.long 0x10 "LTDC_L2CKCR,LTDC layer 2 color keying configuration register" hexmask.long.byte 0x10 16.--23. 1. "CKRED,Color key red value" hexmask.long.byte 0x10 8.--15. 1. "CKGREEN,Color key green value" hexmask.long.byte 0x10 0.--7. 1. "CKBLUE,Color key blue value" line.long 0x14 "LTDC_L2PFCR,LTDC layer 2 pixel format configuration register" bitfld.long 0x14 0.--2. "PF,Pixel format" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x18 "LTDC_L2CACR,LTDC layer 2 constant alpha configuration register" hexmask.long.byte 0x18 0.--7. 1. "CONSTA,Constant alpha" line.long 0x1C "LTDC_L2DCCR,LTDC layer 2 default color configuration register" hexmask.long.byte 0x1C 24.--31. 1. "DCALPHA,Default color alpha" hexmask.long.byte 0x1C 16.--23. 1. "DCRED,Default color red" hexmask.long.byte 0x1C 8.--15. 1. "DCGREEN,Default color green" hexmask.long.byte 0x1C 0.--7. 1. "DCBLUE,Default color blue" line.long 0x20 "LTDC_L2BFCR,LTDC layer 2 blending factors configuration register" bitfld.long 0x20 16.--18. "BOR,Blending order" "B_0x0,?,?,?,?,?,?,B_0x7" bitfld.long 0x20 8.--10. "BF1,Default factor 1" "?,?,?,?,B_0x4,?,B_0x6,?" bitfld.long 0x20 0.--2. "BF2,Blending factor 2" "?,?,?,?,?,B_0x5,?,B_0x7" line.long 0x24 "LTDC_L2BLCR,LTDC layer 2 burst length configuration register" hexmask.long.byte 0x24 0.--4. 1. "BL,Burst length" line.long 0x28 "LTDC_L2PCR,LTDC layer 2 planar configuration register" bitfld.long 0x28 9. "YREN,Y rescale enable for the color dynamic range" "B_0x0,B_0x1" bitfld.long 0x28 8. "OF,Odd pixel first" "B_0x0,B_0x1" bitfld.long 0x28 7. "CBF,Cb component first" "B_0x0,B_0x1" bitfld.long 0x28 6. "YF,Y component first" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "YCM,YCbCr conversion mode" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x28 3. "YCEN,YCbCr-to-RGB conversion enable" "B_0x0,B_0x1" line.long 0x2C "LTDC_L2CFBAR,LTDC layer 2 color frame buffer address register" hexmask.long 0x2C 0.--31. 1. "CFBADD,Color frame buffer start address" line.long 0x30 "LTDC_L2CFBLR,LTDC layer 2 color frame buffer length register" hexmask.long.word 0x30 16.--30. 1. "CFBP,Color frame buffer pitch in bytes" hexmask.long.word 0x30 0.--13. 1. "CFBLL,Color frame buffer line length" line.long 0x34 "LTDC_L2CFBLNR,LTDC layer 2 color frame buffer line number register" hexmask.long.word 0x34 0.--11. 1. "CFBLNBR,Frame buffer line number" line.long 0x38 "LTDC_L2AFBA0R,LTDC layer 2 auxiliary frame buffer address 0 register" hexmask.long 0x38 0.--31. 1. "AFBADD0,Frame buffer start address" line.long 0x3C "LTDC_L2AFBA1R,LTDC layer 2 auxiliary frame buffer address 1 register" hexmask.long 0x3C 0.--31. 1. "AFBADD1,Auxiliary frame buffer start address" line.long 0x40 "LTDC_L2AFBLR,LTDC layer 2 auxiliary frame buffer length register" hexmask.long.word 0x40 16.--30. 1. "AFBP,Auxiliary frame buffer pitch in bytes" hexmask.long.word 0x40 0.--13. 1. "AFBLL,Auxiliary frame buffer line length" line.long 0x44 "LTDC_L2AFBLNR,LTDC layer 2 auxiliary frame buffer line number register" hexmask.long.word 0x44 0.--11. 1. "AFBLNBR,Auxiliary frame buffer line number" wgroup.long 0x250++0x3 line.long 0x0 "LTDC_L2CLUTWR,LTDC layer 2 CLUT write register" hexmask.long.byte 0x0 24.--31. 1. "CLUTADD,CLUT address" hexmask.long.byte 0x0 16.--23. 1. "RED,Red value" hexmask.long.byte 0x0 8.--15. 1. "GREEN,Green value" hexmask.long.byte 0x0 0.--7. 1. "BLUE,Blue value" group.long 0x254++0x27 line.long 0x0 "LTDC_L2SISR,LTDC layer 2 scaler input size register" hexmask.long.word 0x0 16.--27. 1. "SIV,Scaler vertical input size (input height)" hexmask.long.word 0x0 0.--11. 1. "SIH,Scaler horizontal input size (input width)" line.long 0x4 "LTDC_L2SOSR,LTDC layer 2 scaler output size register" hexmask.long.word 0x4 16.--27. 1. "SOV,Scaler vertical output size (output height)" hexmask.long.word 0x4 0.--11. 1. "SOH,Scaler horizontal output size (output width)" line.long 0x8 "LTDC_L2SVSFR,LTDC layer 2 scaler vertical scaling factor register" hexmask.long.word 0x8 0.--15. 1. "SVF,Scaler vertical scaling factor" line.long 0xC "LTDC_L2SVSPR,LTDC layer 2 scaler vertical scaling phase register" hexmask.long.word 0xC 0.--15. 1. "SVP,Scaler vertical scaling factor" line.long 0x10 "LTDC_L2SHSFR,LTDC layer 2 scaler horizontal scaling factor register" hexmask.long.word 0x10 0.--15. 1. "SHF,Scaler horizontal scaling factor" line.long 0x14 "LTDC_L2SHSPR,LTDC layer 2 scaler horizontal scaling phase register" hexmask.long.word 0x14 0.--15. 1. "SHP,Scaler horizontal scaling phase" line.long 0x18 "LTDC_L2CYR0R,LTDC layer 2 conversion YCbCr RGB 0 register" hexmask.long.word 0x18 16.--25. 1. "CB2B,Cb-to-Blue coefficient with bits 9:8 as positive integer and 7:0 as decimals." hexmask.long.word 0x18 0.--9. 1. "CR2R,Cr-to-Red coefficient with bits 9:8 as positive integer and 7:0 as decimals." line.long 0x1C "LTDC_L2CYR1R,LTDC layer 2 conversion YCbCr RGB 1 register" hexmask.long.word 0x1C 16.--25. 1. "CB2G,Cb-to-Green coefficient with bits 9:8 as positive integer and 7:0 as decimals." hexmask.long.word 0x1C 0.--9. 1. "CR2G,Cr-to-Green coefficient with bits 9:8 as positive integer and 7:0 as decimals." line.long 0x20 "LTDC_L2FPF0R,LTDC layer 2 flexible pixel format 0 register" hexmask.long.byte 0x20 14.--17. 1. "RLEN,Width of the red component (in bits)" hexmask.long.byte 0x20 9.--13. 1. "RPOS,Location of the red component inside the pixel memory word (in bits)" hexmask.long.byte 0x20 5.--8. 1. "ALEN,Width of the alpha component (in bits)" hexmask.long.byte 0x20 0.--4. 1. "APOS,Location of the alpha component inside the pixel memory word (in bits)" line.long 0x24 "LTDC_L2FPF1R,LTDC layer 2 flexible pixel format 1 register" bitfld.long 0x24 18.--20. "PSIZE,Pixel size (in bytes)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x24 14.--17. 1. "BLEN,Width of the blue component (in bits)" hexmask.long.byte 0x24 9.--13. 1. "BPOS,Location of the blue component inside the pixel memory word (in bits)" hexmask.long.byte 0x24 5.--8. 1. "GLEN,Width of the green component (in bits)" hexmask.long.byte 0x24 0.--4. 1. "GPOS,Location of the green component inside the pixel memory word (in bits)" rgroup.long 0x300++0x7 line.long 0x0 "LTDC_L3C0R,LTDC layer 3 configuration 0 register" bitfld.long 0x0 31. "ARGB8888,Pixel format ability for argb8888" "0,1" bitfld.long 0x0 30. "ABGR8888,Pixel format ability for abgr8888" "0,1" bitfld.long 0x0 29. "RGBA8888,Pixel format ability for rgba8888" "0,1" bitfld.long 0x0 28. "BGRA888,Pixel format ability for bgra8888" "0,1" bitfld.long 0x0 27. "RGB565,Pixel format ability for rgb565" "0,1" bitfld.long 0x0 26. "BGR565,Pixel format ability for bgr565" "0,1" bitfld.long 0x0 25. "RGB888,Pixel format ability for rgb888" "0,1" newline bitfld.long 0x0 24. "FF,Flexible pixel format ability" "0,1" bitfld.long 0x0 23. "F11PC,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 22. "F1PC,Blending factor 1 ability for pixel_alpha * constant_alpha" "0,1" bitfld.long 0x0 21. "F11C,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 20. "F1C,Blending factor 1 ability for constant_alpha" "0,1" bitfld.long 0x0 19. "F11P,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 18. "F1P,Blending factor 1 ability for pixel_alpha" "0,1" newline bitfld.long 0x0 17. "F10,Blending factor 1 ability for 0." "0,1" bitfld.long 0x0 16. "F11,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 15. "F21PC,Blending factor 2 ability for 1." "0,1" bitfld.long 0x0 14. "F2PC,Blending factor 2 ability for pixel_alpha * constant_alpha" "0,1" bitfld.long 0x0 13. "F21C,Blending factor 2 ability for 1." "0,1" bitfld.long 0x0 12. "F2C,Blending factor 2 ability for constant_alpha" "0,1" bitfld.long 0x0 11. "F21P,Blending factor 2 ability for 1." "0,1" newline bitfld.long 0x0 10. "F2P,Blending factor 2 ability for pixel_alpha" "0,1" bitfld.long 0x0 9. "F20,Blending factor 2 ability for 0." "0,1" bitfld.long 0x0 8. "F21,Blending factor 2 ability for 1." "0,1" bitfld.long 0x0 7. "CKRA,Color key replace ability" "0,1" bitfld.long 0x0 6. "CLUTA,CLUT ability" "0,1" bitfld.long 0x0 5. "WINA,Windowing ability" "0,1" bitfld.long 0x0 4. "DCP,Default color programmability" "0,1" newline bitfld.long 0x0 3. "APA,Alpha plane ability" "0,1" bitfld.long 0x0 2. "CFBPA,Color frame buffer pitch ability" "0,1" bitfld.long 0x0 1. "CFBDA,Color frame buffer duplication ability" "0,1" bitfld.long 0x0 0. "CKTA,Color key transparency ability" "0,1" line.long 0x4 "LTDC_L3C1R,LTDC layer 3 configuration 1 register" bitfld.long 0x4 31. "SCA,Scaling ability for this layer" "B_0x0,B_0x1" bitfld.long 0x4 2. "YFPA,YCbCr 420 full-planar ability for this layer" "B_0x0,B_0x1" bitfld.long 0x4 1. "YSPA,YCbCr 420 semi-planar ability for this layer" "B_0x0,B_0x1" bitfld.long 0x4 0. "YIA,YCbCr 422 interleaved ability for this layer" "B_0x0,B_0x1" group.long 0x308++0x27 line.long 0x0 "LTDC_L3RCR,LTDC layer 3 reload control register" bitfld.long 0x0 2. "GRMSK,Shadow reload control global (centralized) reload masked" "B_0x0,B_0x1" bitfld.long 0x0 1. "VBR,Vertical blanking reload request" "B_0x0,B_0x1" bitfld.long 0x0 0. "IMR,Immediate reload trigger" "B_0x0,B_0x1" line.long 0x4 "LTDC_L3CR,LTDC layer 3 control register" bitfld.long 0x4 10. "SCEN,Scaler enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "DCBEN,Default color blending enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "HMEN,Horizontal mirroring enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "CLUTEN,Color look-up table enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CKEN,Color keying enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "LEN,Layer enable" "B_0x0,B_0x1" line.long 0x8 "LTDC_L3WHPCR,LTDC layer 3 window horizontal position configuration register" hexmask.long.word 0x8 16.--27. 1. "WHSPPOS,Window horizontal stop position" hexmask.long.word 0x8 0.--11. 1. "WHSTPOS,Window horizontal start position" line.long 0xC "LTDC_L3WVPCR,LTDC layer 3 window vertical position configuration register" hexmask.long.word 0xC 16.--27. 1. "WVSPPOS,Window vertical stop position" hexmask.long.word 0xC 0.--11. 1. "WVSTPOS,Window vertical start position" line.long 0x10 "LTDC_L3CKCR,LTDC layer 3 color keying configuration register" hexmask.long.byte 0x10 16.--23. 1. "CKRED,Color key red value" hexmask.long.byte 0x10 8.--15. 1. "CKGREEN,Color key green value" hexmask.long.byte 0x10 0.--7. 1. "CKBLUE,Color key blue value" line.long 0x14 "LTDC_L3PFCR,LTDC layer 3 pixel format configuration register" bitfld.long 0x14 0.--2. "PF,Pixel format" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x18 "LTDC_L3CACR,LTDC layer 3 constant alpha configuration register" hexmask.long.byte 0x18 0.--7. 1. "CONSTA,Constant alpha" line.long 0x1C "LTDC_L3DCCR,LTDC layer 3 default color configuration register" hexmask.long.byte 0x1C 24.--31. 1. "DCALPHA,Default color alpha" hexmask.long.byte 0x1C 16.--23. 1. "DCRED,Default color red" hexmask.long.byte 0x1C 8.--15. 1. "DCGREEN,Default color green" hexmask.long.byte 0x1C 0.--7. 1. "DCBLUE,Default color blue" line.long 0x20 "LTDC_L3BFCR,LTDC layer 3 blending factors configuration register" bitfld.long 0x20 16.--18. "BOR,Blending order" "B_0x0,?,?,?,?,?,?,B_0x7" bitfld.long 0x20 8.--10. "BF1,Default factor 1" "?,?,?,?,B_0x4,?,B_0x6,?" bitfld.long 0x20 0.--2. "BF2,Blending factor 2" "?,?,?,?,?,B_0x5,?,B_0x7" line.long 0x24 "LTDC_L3BLCR,LTDC layer 3 burst length configuration register" hexmask.long.byte 0x24 0.--4. 1. "BL,Burst length" group.long 0x334++0xB line.long 0x0 "LTDC_L3CFBAR,LTDC layer 3 color frame buffer address register" hexmask.long 0x0 0.--31. 1. "CFBADD,Color frame buffer start address" line.long 0x4 "LTDC_L3CFBLR,LTDC layer 3 color frame buffer length register" hexmask.long.word 0x4 16.--30. 1. "CFBP,Color frame buffer pitch in bytes" hexmask.long.word 0x4 0.--13. 1. "CFBLL,Color frame buffer line length" line.long 0x8 "LTDC_L3CFBLNR,LTDC layer 3 color frame buffer line number register" hexmask.long.word 0x8 0.--11. 1. "CFBLNBR,Frame buffer line number" wgroup.long 0x350++0x3 line.long 0x0 "LTDC_L3CLUTWR,LTDC layer 3 CLUT write register" hexmask.long.byte 0x0 24.--31. 1. "CLUTADD,CLUT address" hexmask.long.byte 0x0 16.--23. 1. "RED,Red value" hexmask.long.byte 0x0 8.--15. 1. "GREEN,Green value" hexmask.long.byte 0x0 0.--7. 1. "BLUE,Blue value" group.long 0x374++0x7 line.long 0x0 "LTDC_L3FPF0R,LTDC layer 3 flexible pixel format 0 register" hexmask.long.byte 0x0 14.--17. 1. "RLEN,Width of the red component (in bits)" hexmask.long.byte 0x0 9.--13. 1. "RPOS,Location of the red component inside the pixel memory word (in bits)" hexmask.long.byte 0x0 5.--8. 1. "ALEN,Width of the alpha component (in bits)" hexmask.long.byte 0x0 0.--4. 1. "APOS,Location of the alpha component inside the pixel memory word (in bits)" line.long 0x4 "LTDC_L3FPF1R,LTDC layer 3 flexible pixel format 1 register" bitfld.long 0x4 18.--20. "PSIZE,Pixel size (in bytes)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 14.--17. 1. "BLEN,Width of the blue component (in bits)" hexmask.long.byte 0x4 9.--13. 1. "BPOS,Location of the blue component inside the pixel memory word (in bits)" hexmask.long.byte 0x4 5.--8. 1. "GLEN,Width of the green component (in bits)" hexmask.long.byte 0x4 0.--4. 1. "GPOS,Location of the green component inside the pixel memory word (in bits)" tree.end tree "LTDC_S" base ad:0x58010000 rgroup.long 0x0++0x7 line.long 0x0 "LTDC_IDR,LTDC identification register" hexmask.long.byte 0x0 16.--23. 1. "MAJVER,LTDC major version" hexmask.long.byte 0x0 8.--15. 1. "MINVER,LTDC minor version" hexmask.long.byte 0x0 0.--7. 1. "REV,Revision" line.long 0x4 "LTDC_LCR,LDTC layer count register" hexmask.long.byte 0x4 0.--7. 1. "LNBR,Number of layers" group.long 0x8++0x13 line.long 0x0 "LTDC_SSCR,LTDC synchronization size configuration register" hexmask.long.word 0x0 16.--27. 1. "HSW,Horizontal synchronization width (in units of pixel clock period)" hexmask.long.word 0x0 0.--11. 1. "VSH,Vertical synchronization height (in units of horizontal scan line)" line.long 0x4 "LTDC_BPCR,LTDC back porch configuration register" hexmask.long.word 0x4 16.--27. 1. "AHBP,Accumulated horizontal back porch (in units of pixel clock period)" hexmask.long.word 0x4 0.--11. 1. "AVBP,Accumulated Vertical back porch (in units of horizontal scan line)" line.long 0x8 "LTDC_AWCR,LTDC active width configuration register" hexmask.long.word 0x8 16.--27. 1. "AAW,Accumulated active width (in units of pixel clock period)" hexmask.long.word 0x8 0.--11. 1. "AAH,Accumulated active height (in units of horizontal scan line)" line.long 0xC "LTDC_TWCR,LTDC total width configuration register" hexmask.long.word 0xC 16.--27. 1. "TOTALW,Total width (in units of pixel clock period)" hexmask.long.word 0xC 0.--11. 1. "TOTALH,Total height (in units of horizontal scan line)" line.long 0x10 "LTDC_GCR,LTDC global control register" bitfld.long 0x10 31. "HSPOL,Horizontal synchronization polarity" "B_0x0,B_0x1" bitfld.long 0x10 30. "VSPOL,Vertical synchronization polarity" "B_0x0,B_0x1" bitfld.long 0x10 29. "DEPOL,Blanking (no data/pixel) polarity" "B_0x0,B_0x1" bitfld.long 0x10 28. "PCPOL,Pixel clock polarity" "B_0x0,B_0x1" bitfld.long 0x10 26. "SFEXEN,Single-frame mode: external trigger enable" "B_0x0,B_0x1" bitfld.long 0x10 25. "SFSWTR,Single-frame mode software trigger" "B_0x0,B_0x1" bitfld.long 0x10 24. "SFEN,Single-frame mode enable" "B_0x0,B_0x1" newline bitfld.long 0x10 19. "CRCEN,CRC enable" "B_0x0,B_0x1" bitfld.long 0x10 16. "DEN,Dither enable" "B_0x0,B_0x1" rbitfld.long 0x10 12.--14. "DRW,Dither red width" "0,1,2,3,4,5,6,7" rbitfld.long 0x10 8.--10. "DGW,Dither green width" "0,1,2,3,4,5,6,7" rbitfld.long 0x10 4.--6. "DBW,Dither blue width" "0,1,2,3,4,5,6,7" bitfld.long 0x10 2. "ROTEN,Rotation enable" "B_0x0,B_0x1" bitfld.long 0x10 1. "GAMEN,Gamma correction enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "LTDCEN,LTDC global enable" "B_0x0,B_0x1" rgroup.long 0x1C++0x7 line.long 0x0 "LTDC_GC1R,LTDC global configuration 1 register" bitfld.long 0x0 31. "BMA,Blind mode ability" "0,1" bitfld.long 0x0 30. "CRMA,Configuration reading mode ability" "0,1" bitfld.long 0x0 29. "STRA,Status register ability" "0,1" bitfld.long 0x0 28. "DWP,Dither width programmability" "0,1" bitfld.long 0x0 27. "SPP,Sync polarity programmability" "0,1" bitfld.long 0x0 25. "TP,Timing programmability" "0,1" bitfld.long 0x0 24. "LNIP,Line-IRQ: line position programmability" "0,1" newline bitfld.long 0x0 23. "BBA,Background blending ability" "0,1" bitfld.long 0x0 22. "BCP,Background color programmability (unique color blended as background)" "0,1" bitfld.long 0x0 21. "SHRA,Shadow register ability" "0,1" bitfld.long 0x0 17.--19. "GCT,Gamma correction technique implemented" "B_0x0,B_0x1,B_0x2,?,?,?,?,?" bitfld.long 0x0 14.--15. "DT,Dithering technique implemented" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "PRBA,Precise blending ability" "0,1" hexmask.long.byte 0x0 8.--11. 1. "WRCH,Width of red channel output" newline hexmask.long.byte 0x0 4.--7. 1. "WGCH,Width of green channel output" hexmask.long.byte 0x0 0.--3. 1. "WBCH,Width of blue channel output" line.long 0x4 "LTDC_GC2R,LTDC global configuration 2 register" bitfld.long 0x4 15. "BOA,Blending order ability" "B_0x0,B_0x1" bitfld.long 0x4 13. "CRCA,CRC ability" "B_0x0,B_0x1" bitfld.long 0x4 12. "SFA,Single frame mode ability" "B_0x0,B_0x1" bitfld.long 0x4 11. "SISA,Second interrupt set ability" "B_0x0,B_0x1" bitfld.long 0x4 10. "ROTA,Rotation support ability" "0,1" bitfld.long 0x4 9. "AXIIDA,AXIID ability" "0,1" bitfld.long 0x4 8. "OCA,Output conversion ability (RGB to YCbCr)" "0,1" newline bitfld.long 0x4 7. "EDCA,External display control ability" "0,1" bitfld.long 0x4 4.--6. "BW,Bus width (log2 of number of bytes)" "?,?,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x4 3. "DPA,Secondary RGB output port ability" "0,1" bitfld.long 0x4 2. "DVA,Dual-view ability" "0,1" bitfld.long 0x4 1. "STSA,Slave timings synchronization ability" "0,1" bitfld.long 0x4 0. "BLA,Background layer ability (pixels of background layer are read from memory)" "0,1" group.long 0x24++0x3 line.long 0x0 "LTDC_SRCR,LTDC shadow reload configuration register" bitfld.long 0x0 1. "VBR,Vertical blanking reload request" "B_0x0,B_0x1" bitfld.long 0x0 0. "IMR,Immediate reload trigger" "B_0x0,B_0x1" wgroup.long 0x28++0x3 line.long 0x0 "LTDC_GCCR,LTDC gamma correction configuration register" bitfld.long 0x0 18. "REN,Write trigger to the red table" "B_0x0,B_0x1" bitfld.long 0x0 17. "GEN,Write trigger to the green table" "B_0x0,B_0x1" bitfld.long 0x0 16. "BEN,Write trigger to the blue table" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--15. 1. "COMP,Color component to be written in either (or all) the R G B tables" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address of the R G B table where the COMP component is written" group.long 0x2C++0x3 line.long 0x0 "LTDC_BCCR,LTDC background color configuration register" hexmask.long.byte 0x0 16.--23. 1. "BCRED,Background color red value" hexmask.long.byte 0x0 8.--15. 1. "BCGREEN,Background color green value" hexmask.long.byte 0x0 0.--7. 1. "BCBLUE,Background color blue value" group.long 0x34++0x3 line.long 0x0 "LTDC_IER,LTDC interrupt enable register" bitfld.long 0x0 8. "FURIE,FIFO underrun at rotation interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "FUIE,FIFO underrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "RRIE,Register reload interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "TERRIE,Transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "FUWIE,FIFO underrun warning interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "LIE,Line interrupt enable" "B_0x0,B_0x1" rgroup.long 0x38++0x3 line.long 0x0 "LTDC_ISR,LTDC interrupt status register" bitfld.long 0x0 8. "FURIF,FIFO underrun at rotation interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCIF,CRC error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 6. "FUIF,FIFO underrun interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 3. "RRIF,Register reload interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "TERRIF,Transfer error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FUWIF,FIFO underrun warning interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "LIF,Line interrupt flag" "B_0x0,B_0x1" wgroup.long 0x3C++0x3 line.long 0x0 "LTDC_ICR,LTDC interrupt clear register" bitfld.long 0x0 8. "CFURIF,FIFO underrun at rotation interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 7. "CCRCIF,CRC error interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 6. "CFUIF,FIFO underrun interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 3. "CRRIF,Register reload interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 2. "CTERRIF,Transfer error interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 1. "CFUWIF,FIFO underrun warning interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 0. "CLIF,Line-interrupt flag clear" "B_0x0,B_0x1" group.long 0x40++0x3 line.long 0x0 "LTDC_LIPCR,LTDC line interrupt position configuration register" hexmask.long.word 0x0 0.--11. 1. "LIPOS,Line interrupt position" rgroup.long 0x44++0x7 line.long 0x0 "LTDC_CPSR,LTDC current position status register" hexmask.long.word 0x0 16.--27. 1. "CXPOS,Current X position" hexmask.long.word 0x0 0.--11. 1. "CYPOS,Current Y position" line.long 0x4 "LTDC_CDSR,LTDC current display status register" bitfld.long 0x4 3. "HSYNCS,Horizontal synchronization display status" "B_0x0,B_0x1" bitfld.long 0x4 2. "VSYNCS,Vertical synchronization display status" "B_0x0,B_0x1" bitfld.long 0x4 1. "HDES,Horizontal data enable display status" "B_0x0,B_0x1" bitfld.long 0x4 0. "VDES,Vertical data enable display status" "B_0x0,B_0x1" group.long 0x60++0x7 line.long 0x0 "LTDC_EDCR,LTDC external display control register" bitfld.long 0x0 27. "OCYCO,Output conversion to YCbCr 422" "B_0x0,B_0x1" bitfld.long 0x0 26. "OCYSEL,Output conversion to YCbCr 422" "B_0x0,B_0x1" bitfld.long 0x0 25. "OCYEN,Output conversion to YCbCr 422 enable" "B_0x0,B_0x1" line.long 0x4 "LTDC_IER2,LTDC interrupt enable register 2" bitfld.long 0x4 8. "FURIE,FIFO underrun at rotation interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "CRCIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "FUIE,FIFO underrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "RRIE,Register reload interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "TERRIE,Transfer error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "FUWIE,FIFO underrun warning interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "LIE,Line interrupt enable" "B_0x0,B_0x1" rgroup.long 0x68++0x3 line.long 0x0 "LTDC_ISR2,LTDC interrupt status register 2" bitfld.long 0x0 8. "FURIF,FIFO underrun at rotation interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCIF,CRC Error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 6. "FUIF,FIFO underrun interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 3. "RRIF,Register reload interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "TERRIF,Transfer error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FUWIF,FIFO underrun warning interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "LIF,Line interrupt flag" "B_0x0,B_0x1" wgroup.long 0x6C++0x3 line.long 0x0 "LTDC_ICR2,LTDC interrupt clear register 2" bitfld.long 0x0 8. "CFURIF,Clear FIFO underrun at rotation interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "CCRCIF,Clear the CRC error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 6. "CFUIF,Clear the FIFO underrun interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 3. "CRRIF,Clear register reload interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "CTERRIF,Clear the transfer error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "CFUWIF,Clear the FIFO underrun warning interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "CLIF,Clear the line interrupt flag" "B_0x0,B_0x1" group.long 0x70++0x3 line.long 0x0 "LTDC_LIPCR2,LTDC line interrupt position configuration register 2" hexmask.long.word 0x0 0.--11. 1. "LIPOS,Line interrupt position" group.long 0x78++0x3 line.long 0x0 "LTDC_ECRCR,LTDC expected CRC register" hexmask.long.word 0x0 0.--15. 1. "ECRC,Expected CRC of frame" rgroup.long 0x7C++0x3 line.long 0x0 "LTDC_CCRCR,LTDC computed CRC register" hexmask.long.word 0x0 0.--15. 1. "CCRC,Computed CRC of frame" group.long 0x80++0x13 line.long 0x0 "LTDC_RB0AR,LTDC rotation buffer 0 address register" hexmask.long 0x0 0.--31. 1. "ADDR,Address of the rotation buffer 0" line.long 0x4 "LTDC_RB1AR,LTDC rotation buffer 1 address register" hexmask.long 0x4 0.--31. 1. "ADDR,Address of the rotation buffer 1" line.long 0x8 "LTDC_RBPR,LTDC rotation buffer pitch register" hexmask.long.word 0x8 0.--11. 1. "PITCH,Pitch in bytes of the rotation buffers 0 and 1" line.long 0xC "LTDC_RIFCR,LTDC rotation intermediate frame color register" hexmask.long.byte 0xC 16.--23. 1. "RIFRED,Red component of the rotation intermediate frame" hexmask.long.byte 0xC 8.--15. 1. "RIFGREEN,Green component of the rotation intermediate frame" hexmask.long.byte 0xC 0.--7. 1. "RIFBLUE,Blue component of the rotation intermediate frame" line.long 0x10 "LTDC_FUTR,LTDC FIFO underrun threshold register" hexmask.long.word 0x10 0.--15. 1. "THRE,Threshold to trigger a FIFO underrun interrupt (per FIFO word 64 bits)" rgroup.long 0x100++0x7 line.long 0x0 "LTDC_L1C0R,LTDC layer 1 configuration 0 register" bitfld.long 0x0 31. "ARGB8888,Pixel format ability for argb8888" "0,1" bitfld.long 0x0 30. "ABGR8888,Pixel format ability for abgr8888" "0,1" bitfld.long 0x0 29. "RGBA8888,Pixel format ability for rgba8888" "0,1" bitfld.long 0x0 28. "BGRA888,Pixel format ability for bgra8888" "0,1" bitfld.long 0x0 27. "RGB565,Pixel format ability for rgb565" "0,1" bitfld.long 0x0 26. "BGR565,Pixel format ability for bgr565" "0,1" bitfld.long 0x0 25. "RGB888,Pixel format ability for rgb888" "0,1" newline bitfld.long 0x0 24. "FF,Flexible pixel format ability" "0,1" bitfld.long 0x0 23. "F11PC,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 22. "F1PC,Blending factor 1 ability for pixel_alpha * constant_alpha" "0,1" bitfld.long 0x0 21. "F11C,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 20. "F1C,Blending factor 1 ability for constant_alpha" "0,1" bitfld.long 0x0 19. "F11P,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 18. "F1P,Blending factor 1 ability for pixel_alpha" "0,1" newline bitfld.long 0x0 17. "F10,Blending factor 1 ability for 0." "0,1" bitfld.long 0x0 16. "F11,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 15. "F21PC,Blending factor 2 ability for 1." "0,1" bitfld.long 0x0 14. "F2PC,Blending factor 2 ability for pixel_alpha * constant_alpha" "0,1" bitfld.long 0x0 13. "F21C,Blending factor 2 ability for 1." "0,1" bitfld.long 0x0 12. "F2C,Blending factor 2 ability for constant_alpha" "0,1" bitfld.long 0x0 11. "F21P,Blending factor 2 ability for 1." "0,1" newline bitfld.long 0x0 10. "F2P,Blending factor 2 ability for pixel_alpha" "0,1" bitfld.long 0x0 9. "F20,Blending factor 2 ability for 0." "0,1" bitfld.long 0x0 8. "F21,Blending factor 2 ability for 1." "0,1" bitfld.long 0x0 7. "CKRA,Color key replace ability" "0,1" bitfld.long 0x0 6. "CLUTA,CLUT ability" "0,1" bitfld.long 0x0 5. "WINA,Windowing ability" "0,1" bitfld.long 0x0 4. "DCP,Default color programmability" "0,1" newline bitfld.long 0x0 3. "APA,Alpha plane ability" "0,1" bitfld.long 0x0 2. "CFBPA,Color frame buffer pitch ability" "0,1" bitfld.long 0x0 1. "CFBDA,Color frame buffer duplication ability" "0,1" bitfld.long 0x0 0. "CKTA,Color key transparency ability" "0,1" line.long 0x4 "LTDC_L1C1R,LTDC layer 1 configuration 1 register" bitfld.long 0x4 31. "SCA,Scaling ability for this layer" "B_0x0,B_0x1" bitfld.long 0x4 2. "YFPA,YCbCr 420 full-planar ability for this layer" "B_0x0,B_0x1" bitfld.long 0x4 1. "YSPA,YCbCr 420 semi-planar ability for this layer" "B_0x0,B_0x1" bitfld.long 0x4 0. "YIA,YCbCr 422 interleaved ability for this layer" "B_0x0,B_0x1" group.long 0x108++0x47 line.long 0x0 "LTDC_L1RCR,LTDC layer 1 reload control register" bitfld.long 0x0 2. "GRMSK,Shadow reload control global (centralized) reload masked" "B_0x0,B_0x1" bitfld.long 0x0 1. "VBR,Vertical blanking reload request" "B_0x0,B_0x1" bitfld.long 0x0 0. "IMR,Immediate reload trigger" "B_0x0,B_0x1" line.long 0x4 "LTDC_L1CR,LTDC layer 1 control register" bitfld.long 0x4 10. "SCEN,Scaler enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "DCBEN,Default color blending enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "HMEN,Horizontal mirroring enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "CLUTEN,Color look-up table enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CKEN,Color keying enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "LEN,Layer enable" "B_0x0,B_0x1" line.long 0x8 "LTDC_L1WHPCR,LTDC layer 1 window horizontal position configuration register" hexmask.long.word 0x8 16.--27. 1. "WHSPPOS,Window horizontal stop position" hexmask.long.word 0x8 0.--11. 1. "WHSTPOS,Window horizontal start position" line.long 0xC "LTDC_L1WVPCR,LTDC layer 1 window vertical position configuration register" hexmask.long.word 0xC 16.--27. 1. "WVSPPOS,Window vertical stop position" hexmask.long.word 0xC 0.--11. 1. "WVSTPOS,Window vertical start position" line.long 0x10 "LTDC_L1CKCR,LTDC layer 1 color keying configuration register" hexmask.long.byte 0x10 16.--23. 1. "CKRED,Color key red value" hexmask.long.byte 0x10 8.--15. 1. "CKGREEN,Color key green value" hexmask.long.byte 0x10 0.--7. 1. "CKBLUE,Color key blue value" line.long 0x14 "LTDC_L1PFCR,LTDC layer 1 pixel format configuration register" bitfld.long 0x14 0.--2. "PF,Pixel format" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x18 "LTDC_L1CACR,LTDC layer 1 constant alpha configuration register" hexmask.long.byte 0x18 0.--7. 1. "CONSTA,Constant alpha" line.long 0x1C "LTDC_L1DCCR,LTDC layer 1 default color configuration register" hexmask.long.byte 0x1C 24.--31. 1. "DCALPHA,Default color alpha" hexmask.long.byte 0x1C 16.--23. 1. "DCRED,Default color red" hexmask.long.byte 0x1C 8.--15. 1. "DCGREEN,Default color green" hexmask.long.byte 0x1C 0.--7. 1. "DCBLUE,Default color blue" line.long 0x20 "LTDC_L1BFCR,LTDC layer 1 blending factors configuration register" bitfld.long 0x20 16.--18. "BOR,Blending order" "B_0x0,?,?,?,?,?,?,B_0x7" bitfld.long 0x20 8.--10. "BF1,Default factor 1" "?,?,?,?,B_0x4,?,B_0x6,?" bitfld.long 0x20 0.--2. "BF2,Blending factor 2" "?,?,?,?,?,B_0x5,?,B_0x7" line.long 0x24 "LTDC_L1BLCR,LTDC layer 1 burst length configuration register" hexmask.long.byte 0x24 0.--4. 1. "BL,Burst length" line.long 0x28 "LTDC_L1PCR,LTDC layer 1 planar configuration register" bitfld.long 0x28 9. "YREN,Y rescale enable for the color dynamic range" "B_0x0,B_0x1" bitfld.long 0x28 8. "OF,Odd pixel first" "B_0x0,B_0x1" bitfld.long 0x28 7. "CBF,Cb component first" "B_0x0,B_0x1" bitfld.long 0x28 6. "YF,Y component first" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "YCM,YCbCr conversion mode" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x28 3. "YCEN,YCbCr-to-RGB conversion enable" "B_0x0,B_0x1" line.long 0x2C "LTDC_L1CFBAR,LTDC layer 1 color frame buffer address register" hexmask.long 0x2C 0.--31. 1. "CFBADD,Color frame buffer start address" line.long 0x30 "LTDC_L1CFBLR,LTDC layer 1 color frame buffer length register" hexmask.long.word 0x30 16.--30. 1. "CFBP,Color frame buffer pitch in bytes" hexmask.long.word 0x30 0.--13. 1. "CFBLL,Color frame buffer line length" line.long 0x34 "LTDC_L1CFBLNR,LTDC layer 1 color frame buffer line number register" hexmask.long.word 0x34 0.--11. 1. "CFBLNBR,Frame buffer line number" line.long 0x38 "LTDC_L1AFBA0R,LTDC layer 1 auxiliary frame buffer address 0 register" hexmask.long 0x38 0.--31. 1. "AFBADD0,Frame buffer start address" line.long 0x3C "LTDC_L1AFBA1R,LTDC layer 1 auxiliary frame buffer address 1 register" hexmask.long 0x3C 0.--31. 1. "AFBADD1,Auxiliary frame buffer start address" line.long 0x40 "LTDC_L1AFBLR,LTDC layer 1 auxiliary frame buffer length register" hexmask.long.word 0x40 16.--30. 1. "AFBP,Auxiliary frame buffer pitch in bytes" hexmask.long.word 0x40 0.--13. 1. "AFBLL,Auxiliary frame buffer line length" line.long 0x44 "LTDC_L1AFBLNR,LTDC layer 1 auxiliary frame buffer line number register" hexmask.long.word 0x44 0.--11. 1. "AFBLNBR,Auxiliary frame buffer line number" wgroup.long 0x150++0x3 line.long 0x0 "LTDC_L1CLUTWR,LTDC layer 1 CLUT write register" hexmask.long.byte 0x0 24.--31. 1. "CLUTADD,CLUT address" hexmask.long.byte 0x0 16.--23. 1. "RED,Red value" hexmask.long.byte 0x0 8.--15. 1. "GREEN,Green value" hexmask.long.byte 0x0 0.--7. 1. "BLUE,Blue value" group.long 0x154++0x27 line.long 0x0 "LTDC_L1SISR,LTDC layer 1 scaler input size register" hexmask.long.word 0x0 16.--27. 1. "SIV,Scaler vertical input size (input height)" hexmask.long.word 0x0 0.--11. 1. "SIH,Scaler horizontal input size (input width)" line.long 0x4 "LTDC_L1SOSR,LTDC layer 1 scaler output size register" hexmask.long.word 0x4 16.--27. 1. "SOV,Scaler vertical output size (output height)" hexmask.long.word 0x4 0.--11. 1. "SOH,Scaler horizontal output size (output width)" line.long 0x8 "LTDC_L1SVSFR,LTDC layer 1 scaler vertical scaling factor register" hexmask.long.word 0x8 0.--15. 1. "SVF,Scaler vertical scaling factor" line.long 0xC "LTDC_L1SVSPR,LTDC layer 1 scaler vertical scaling phase register" hexmask.long.word 0xC 0.--15. 1. "SVP,Scaler vertical scaling factor" line.long 0x10 "LTDC_L1SHSFR,LTDC layer 1 scaler horizontal scaling factor register" hexmask.long.word 0x10 0.--15. 1. "SHF,Scaler horizontal scaling factor" line.long 0x14 "LTDC_L1SHSPR,LTDC layer 1 scaler horizontal scaling phase register" hexmask.long.word 0x14 0.--15. 1. "SHP,Scaler horizontal scaling phase" line.long 0x18 "LTDC_L1CYR0R,LTDC layer 1 conversion YCbCr RGB 0 register" hexmask.long.word 0x18 16.--25. 1. "CB2B,Cb-to-Blue coefficient with bits 9:8 as positive integer and 7:0 as decimals." hexmask.long.word 0x18 0.--9. 1. "CR2R,Cr-to-Red coefficient with bits 9:8 as positive integer and 7:0 as decimals." line.long 0x1C "LTDC_L1CYR1R,LTDC layer 1 conversion YCbCr RGB 1 register" hexmask.long.word 0x1C 16.--25. 1. "CB2G,Cb-to-Green coefficient with bits 9:8 as positive integer and 7:0 as decimals." hexmask.long.word 0x1C 0.--9. 1. "CR2G,Cr-to-Green coefficient with bits 9:8 as positive integer and 7:0 as decimals." line.long 0x20 "LTDC_L1FPF0R,LTDC layer 1 flexible pixel format 0 register" hexmask.long.byte 0x20 14.--17. 1. "RLEN,Width of the red component (in bits)" hexmask.long.byte 0x20 9.--13. 1. "RPOS,Location of the red component inside the pixel memory word (in bits)" hexmask.long.byte 0x20 5.--8. 1. "ALEN,Width of the alpha component (in bits)" hexmask.long.byte 0x20 0.--4. 1. "APOS,Location of the alpha component inside the pixel memory word (in bits)" line.long 0x24 "LTDC_L1FPF1R,LTDC layer 1 flexible pixel format 1 register" bitfld.long 0x24 18.--20. "PSIZE,Pixel size (in bytes)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x24 14.--17. 1. "BLEN,Width of the blue component (in bits)" hexmask.long.byte 0x24 9.--13. 1. "BPOS,Location of the blue component inside the pixel memory word (in bits)" hexmask.long.byte 0x24 5.--8. 1. "GLEN,Width of the green component (in bits)" hexmask.long.byte 0x24 0.--4. 1. "GPOS,Location of the green component inside the pixel memory word (in bits)" rgroup.long 0x200++0x7 line.long 0x0 "LTDC_L2C0R,LTDC layer 2 configuration 0 register" bitfld.long 0x0 31. "ARGB8888,Pixel format ability for argb8888" "0,1" bitfld.long 0x0 30. "ABGR8888,Pixel format ability for abgr8888" "0,1" bitfld.long 0x0 29. "RGBA8888,Pixel format ability for rgba8888" "0,1" bitfld.long 0x0 28. "BGRA888,Pixel format ability for bgra8888" "0,1" bitfld.long 0x0 27. "RGB565,Pixel format ability for rgb565" "0,1" bitfld.long 0x0 26. "BGR565,Pixel format ability for bgr565" "0,1" bitfld.long 0x0 25. "RGB888,Pixel format ability for rgb888" "0,1" newline bitfld.long 0x0 24. "FF,Flexible pixel format ability" "0,1" bitfld.long 0x0 23. "F11PC,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 22. "F1PC,Blending factor 1 ability for pixel_alpha * constant_alpha" "0,1" bitfld.long 0x0 21. "F11C,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 20. "F1C,Blending factor 1 ability for constant_alpha" "0,1" bitfld.long 0x0 19. "F11P,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 18. "F1P,Blending factor 1 ability for pixel_alpha" "0,1" newline bitfld.long 0x0 17. "F10,Blending factor 1 ability for 0." "0,1" bitfld.long 0x0 16. "F11,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 15. "F21PC,Blending factor 2 ability for 1." "0,1" bitfld.long 0x0 14. "F2PC,Blending factor 2 ability for pixel_alpha * constant_alpha" "0,1" bitfld.long 0x0 13. "F21C,Blending factor 2 ability for 1." "0,1" bitfld.long 0x0 12. "F2C,Blending factor 2 ability for constant_alpha" "0,1" bitfld.long 0x0 11. "F21P,Blending factor 2 ability for 1." "0,1" newline bitfld.long 0x0 10. "F2P,Blending factor 2 ability for pixel_alpha" "0,1" bitfld.long 0x0 9. "F20,Blending factor 2 ability for 0." "0,1" bitfld.long 0x0 8. "F21,Blending factor 2 ability for 1." "0,1" bitfld.long 0x0 7. "CKRA,Color key replace ability" "0,1" bitfld.long 0x0 6. "CLUTA,CLUT ability" "0,1" bitfld.long 0x0 5. "WINA,Windowing ability" "0,1" bitfld.long 0x0 4. "DCP,Default color programmability" "0,1" newline bitfld.long 0x0 3. "APA,Alpha plane ability" "0,1" bitfld.long 0x0 2. "CFBPA,Color frame buffer pitch ability" "0,1" bitfld.long 0x0 1. "CFBDA,Color frame buffer duplication ability" "0,1" bitfld.long 0x0 0. "CKTA,Color key transparency ability" "0,1" line.long 0x4 "LTDC_L2C1R,LTDC layer 2 configuration 1 register" bitfld.long 0x4 31. "SCA,Scaling ability for this layer" "B_0x0,B_0x1" bitfld.long 0x4 2. "YFPA,YCbCr 420 full-planar ability for this layer" "B_0x0,B_0x1" bitfld.long 0x4 1. "YSPA,YCbCr 420 semi-planar ability for this layer" "B_0x0,B_0x1" bitfld.long 0x4 0. "YIA,YCbCr 422 interleaved ability for this layer" "B_0x0,B_0x1" group.long 0x208++0x47 line.long 0x0 "LTDC_L2RCR,LTDC layer 2 reload control register" bitfld.long 0x0 2. "GRMSK,Shadow reload control global (centralized) reload masked" "B_0x0,B_0x1" bitfld.long 0x0 1. "VBR,Vertical blanking reload request" "B_0x0,B_0x1" bitfld.long 0x0 0. "IMR,Immediate reload trigger" "B_0x0,B_0x1" line.long 0x4 "LTDC_L2CR,LTDC layer 2 control register" bitfld.long 0x4 10. "SCEN,Scaler enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "DCBEN,Default color blending enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "HMEN,Horizontal mirroring enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "CLUTEN,Color look-up table enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CKEN,Color keying enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "LEN,Layer enable" "B_0x0,B_0x1" line.long 0x8 "LTDC_L2WHPCR,LTDC layer 2 window horizontal position configuration register" hexmask.long.word 0x8 16.--27. 1. "WHSPPOS,Window horizontal stop position" hexmask.long.word 0x8 0.--11. 1. "WHSTPOS,Window horizontal start position" line.long 0xC "LTDC_L2WVPCR,LTDC layer 2 window vertical position configuration register" hexmask.long.word 0xC 16.--27. 1. "WVSPPOS,Window vertical stop position" hexmask.long.word 0xC 0.--11. 1. "WVSTPOS,Window vertical start position" line.long 0x10 "LTDC_L2CKCR,LTDC layer 2 color keying configuration register" hexmask.long.byte 0x10 16.--23. 1. "CKRED,Color key red value" hexmask.long.byte 0x10 8.--15. 1. "CKGREEN,Color key green value" hexmask.long.byte 0x10 0.--7. 1. "CKBLUE,Color key blue value" line.long 0x14 "LTDC_L2PFCR,LTDC layer 2 pixel format configuration register" bitfld.long 0x14 0.--2. "PF,Pixel format" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x18 "LTDC_L2CACR,LTDC layer 2 constant alpha configuration register" hexmask.long.byte 0x18 0.--7. 1. "CONSTA,Constant alpha" line.long 0x1C "LTDC_L2DCCR,LTDC layer 2 default color configuration register" hexmask.long.byte 0x1C 24.--31. 1. "DCALPHA,Default color alpha" hexmask.long.byte 0x1C 16.--23. 1. "DCRED,Default color red" hexmask.long.byte 0x1C 8.--15. 1. "DCGREEN,Default color green" hexmask.long.byte 0x1C 0.--7. 1. "DCBLUE,Default color blue" line.long 0x20 "LTDC_L2BFCR,LTDC layer 2 blending factors configuration register" bitfld.long 0x20 16.--18. "BOR,Blending order" "B_0x0,?,?,?,?,?,?,B_0x7" bitfld.long 0x20 8.--10. "BF1,Default factor 1" "?,?,?,?,B_0x4,?,B_0x6,?" bitfld.long 0x20 0.--2. "BF2,Blending factor 2" "?,?,?,?,?,B_0x5,?,B_0x7" line.long 0x24 "LTDC_L2BLCR,LTDC layer 2 burst length configuration register" hexmask.long.byte 0x24 0.--4. 1. "BL,Burst length" line.long 0x28 "LTDC_L2PCR,LTDC layer 2 planar configuration register" bitfld.long 0x28 9. "YREN,Y rescale enable for the color dynamic range" "B_0x0,B_0x1" bitfld.long 0x28 8. "OF,Odd pixel first" "B_0x0,B_0x1" bitfld.long 0x28 7. "CBF,Cb component first" "B_0x0,B_0x1" bitfld.long 0x28 6. "YF,Y component first" "B_0x0,B_0x1" bitfld.long 0x28 4.--5. "YCM,YCbCr conversion mode" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x28 3. "YCEN,YCbCr-to-RGB conversion enable" "B_0x0,B_0x1" line.long 0x2C "LTDC_L2CFBAR,LTDC layer 2 color frame buffer address register" hexmask.long 0x2C 0.--31. 1. "CFBADD,Color frame buffer start address" line.long 0x30 "LTDC_L2CFBLR,LTDC layer 2 color frame buffer length register" hexmask.long.word 0x30 16.--30. 1. "CFBP,Color frame buffer pitch in bytes" hexmask.long.word 0x30 0.--13. 1. "CFBLL,Color frame buffer line length" line.long 0x34 "LTDC_L2CFBLNR,LTDC layer 2 color frame buffer line number register" hexmask.long.word 0x34 0.--11. 1. "CFBLNBR,Frame buffer line number" line.long 0x38 "LTDC_L2AFBA0R,LTDC layer 2 auxiliary frame buffer address 0 register" hexmask.long 0x38 0.--31. 1. "AFBADD0,Frame buffer start address" line.long 0x3C "LTDC_L2AFBA1R,LTDC layer 2 auxiliary frame buffer address 1 register" hexmask.long 0x3C 0.--31. 1. "AFBADD1,Auxiliary frame buffer start address" line.long 0x40 "LTDC_L2AFBLR,LTDC layer 2 auxiliary frame buffer length register" hexmask.long.word 0x40 16.--30. 1. "AFBP,Auxiliary frame buffer pitch in bytes" hexmask.long.word 0x40 0.--13. 1. "AFBLL,Auxiliary frame buffer line length" line.long 0x44 "LTDC_L2AFBLNR,LTDC layer 2 auxiliary frame buffer line number register" hexmask.long.word 0x44 0.--11. 1. "AFBLNBR,Auxiliary frame buffer line number" wgroup.long 0x250++0x3 line.long 0x0 "LTDC_L2CLUTWR,LTDC layer 2 CLUT write register" hexmask.long.byte 0x0 24.--31. 1. "CLUTADD,CLUT address" hexmask.long.byte 0x0 16.--23. 1. "RED,Red value" hexmask.long.byte 0x0 8.--15. 1. "GREEN,Green value" hexmask.long.byte 0x0 0.--7. 1. "BLUE,Blue value" group.long 0x254++0x27 line.long 0x0 "LTDC_L2SISR,LTDC layer 2 scaler input size register" hexmask.long.word 0x0 16.--27. 1. "SIV,Scaler vertical input size (input height)" hexmask.long.word 0x0 0.--11. 1. "SIH,Scaler horizontal input size (input width)" line.long 0x4 "LTDC_L2SOSR,LTDC layer 2 scaler output size register" hexmask.long.word 0x4 16.--27. 1. "SOV,Scaler vertical output size (output height)" hexmask.long.word 0x4 0.--11. 1. "SOH,Scaler horizontal output size (output width)" line.long 0x8 "LTDC_L2SVSFR,LTDC layer 2 scaler vertical scaling factor register" hexmask.long.word 0x8 0.--15. 1. "SVF,Scaler vertical scaling factor" line.long 0xC "LTDC_L2SVSPR,LTDC layer 2 scaler vertical scaling phase register" hexmask.long.word 0xC 0.--15. 1. "SVP,Scaler vertical scaling factor" line.long 0x10 "LTDC_L2SHSFR,LTDC layer 2 scaler horizontal scaling factor register" hexmask.long.word 0x10 0.--15. 1. "SHF,Scaler horizontal scaling factor" line.long 0x14 "LTDC_L2SHSPR,LTDC layer 2 scaler horizontal scaling phase register" hexmask.long.word 0x14 0.--15. 1. "SHP,Scaler horizontal scaling phase" line.long 0x18 "LTDC_L2CYR0R,LTDC layer 2 conversion YCbCr RGB 0 register" hexmask.long.word 0x18 16.--25. 1. "CB2B,Cb-to-Blue coefficient with bits 9:8 as positive integer and 7:0 as decimals." hexmask.long.word 0x18 0.--9. 1. "CR2R,Cr-to-Red coefficient with bits 9:8 as positive integer and 7:0 as decimals." line.long 0x1C "LTDC_L2CYR1R,LTDC layer 2 conversion YCbCr RGB 1 register" hexmask.long.word 0x1C 16.--25. 1. "CB2G,Cb-to-Green coefficient with bits 9:8 as positive integer and 7:0 as decimals." hexmask.long.word 0x1C 0.--9. 1. "CR2G,Cr-to-Green coefficient with bits 9:8 as positive integer and 7:0 as decimals." line.long 0x20 "LTDC_L2FPF0R,LTDC layer 2 flexible pixel format 0 register" hexmask.long.byte 0x20 14.--17. 1. "RLEN,Width of the red component (in bits)" hexmask.long.byte 0x20 9.--13. 1. "RPOS,Location of the red component inside the pixel memory word (in bits)" hexmask.long.byte 0x20 5.--8. 1. "ALEN,Width of the alpha component (in bits)" hexmask.long.byte 0x20 0.--4. 1. "APOS,Location of the alpha component inside the pixel memory word (in bits)" line.long 0x24 "LTDC_L2FPF1R,LTDC layer 2 flexible pixel format 1 register" bitfld.long 0x24 18.--20. "PSIZE,Pixel size (in bytes)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x24 14.--17. 1. "BLEN,Width of the blue component (in bits)" hexmask.long.byte 0x24 9.--13. 1. "BPOS,Location of the blue component inside the pixel memory word (in bits)" hexmask.long.byte 0x24 5.--8. 1. "GLEN,Width of the green component (in bits)" hexmask.long.byte 0x24 0.--4. 1. "GPOS,Location of the green component inside the pixel memory word (in bits)" rgroup.long 0x300++0x7 line.long 0x0 "LTDC_L3C0R,LTDC layer 3 configuration 0 register" bitfld.long 0x0 31. "ARGB8888,Pixel format ability for argb8888" "0,1" bitfld.long 0x0 30. "ABGR8888,Pixel format ability for abgr8888" "0,1" bitfld.long 0x0 29. "RGBA8888,Pixel format ability for rgba8888" "0,1" bitfld.long 0x0 28. "BGRA888,Pixel format ability for bgra8888" "0,1" bitfld.long 0x0 27. "RGB565,Pixel format ability for rgb565" "0,1" bitfld.long 0x0 26. "BGR565,Pixel format ability for bgr565" "0,1" bitfld.long 0x0 25. "RGB888,Pixel format ability for rgb888" "0,1" newline bitfld.long 0x0 24. "FF,Flexible pixel format ability" "0,1" bitfld.long 0x0 23. "F11PC,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 22. "F1PC,Blending factor 1 ability for pixel_alpha * constant_alpha" "0,1" bitfld.long 0x0 21. "F11C,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 20. "F1C,Blending factor 1 ability for constant_alpha" "0,1" bitfld.long 0x0 19. "F11P,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 18. "F1P,Blending factor 1 ability for pixel_alpha" "0,1" newline bitfld.long 0x0 17. "F10,Blending factor 1 ability for 0." "0,1" bitfld.long 0x0 16. "F11,Blending factor 1 ability for 1." "0,1" bitfld.long 0x0 15. "F21PC,Blending factor 2 ability for 1." "0,1" bitfld.long 0x0 14. "F2PC,Blending factor 2 ability for pixel_alpha * constant_alpha" "0,1" bitfld.long 0x0 13. "F21C,Blending factor 2 ability for 1." "0,1" bitfld.long 0x0 12. "F2C,Blending factor 2 ability for constant_alpha" "0,1" bitfld.long 0x0 11. "F21P,Blending factor 2 ability for 1." "0,1" newline bitfld.long 0x0 10. "F2P,Blending factor 2 ability for pixel_alpha" "0,1" bitfld.long 0x0 9. "F20,Blending factor 2 ability for 0." "0,1" bitfld.long 0x0 8. "F21,Blending factor 2 ability for 1." "0,1" bitfld.long 0x0 7. "CKRA,Color key replace ability" "0,1" bitfld.long 0x0 6. "CLUTA,CLUT ability" "0,1" bitfld.long 0x0 5. "WINA,Windowing ability" "0,1" bitfld.long 0x0 4. "DCP,Default color programmability" "0,1" newline bitfld.long 0x0 3. "APA,Alpha plane ability" "0,1" bitfld.long 0x0 2. "CFBPA,Color frame buffer pitch ability" "0,1" bitfld.long 0x0 1. "CFBDA,Color frame buffer duplication ability" "0,1" bitfld.long 0x0 0. "CKTA,Color key transparency ability" "0,1" line.long 0x4 "LTDC_L3C1R,LTDC layer 3 configuration 1 register" bitfld.long 0x4 31. "SCA,Scaling ability for this layer" "B_0x0,B_0x1" bitfld.long 0x4 2. "YFPA,YCbCr 420 full-planar ability for this layer" "B_0x0,B_0x1" bitfld.long 0x4 1. "YSPA,YCbCr 420 semi-planar ability for this layer" "B_0x0,B_0x1" bitfld.long 0x4 0. "YIA,YCbCr 422 interleaved ability for this layer" "B_0x0,B_0x1" group.long 0x308++0x27 line.long 0x0 "LTDC_L3RCR,LTDC layer 3 reload control register" bitfld.long 0x0 2. "GRMSK,Shadow reload control global (centralized) reload masked" "B_0x0,B_0x1" bitfld.long 0x0 1. "VBR,Vertical blanking reload request" "B_0x0,B_0x1" bitfld.long 0x0 0. "IMR,Immediate reload trigger" "B_0x0,B_0x1" line.long 0x4 "LTDC_L3CR,LTDC layer 3 control register" bitfld.long 0x4 10. "SCEN,Scaler enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "DCBEN,Default color blending enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "HMEN,Horizontal mirroring enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "CLUTEN,Color look-up table enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CKEN,Color keying enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "LEN,Layer enable" "B_0x0,B_0x1" line.long 0x8 "LTDC_L3WHPCR,LTDC layer 3 window horizontal position configuration register" hexmask.long.word 0x8 16.--27. 1. "WHSPPOS,Window horizontal stop position" hexmask.long.word 0x8 0.--11. 1. "WHSTPOS,Window horizontal start position" line.long 0xC "LTDC_L3WVPCR,LTDC layer 3 window vertical position configuration register" hexmask.long.word 0xC 16.--27. 1. "WVSPPOS,Window vertical stop position" hexmask.long.word 0xC 0.--11. 1. "WVSTPOS,Window vertical start position" line.long 0x10 "LTDC_L3CKCR,LTDC layer 3 color keying configuration register" hexmask.long.byte 0x10 16.--23. 1. "CKRED,Color key red value" hexmask.long.byte 0x10 8.--15. 1. "CKGREEN,Color key green value" hexmask.long.byte 0x10 0.--7. 1. "CKBLUE,Color key blue value" line.long 0x14 "LTDC_L3PFCR,LTDC layer 3 pixel format configuration register" bitfld.long 0x14 0.--2. "PF,Pixel format" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x18 "LTDC_L3CACR,LTDC layer 3 constant alpha configuration register" hexmask.long.byte 0x18 0.--7. 1. "CONSTA,Constant alpha" line.long 0x1C "LTDC_L3DCCR,LTDC layer 3 default color configuration register" hexmask.long.byte 0x1C 24.--31. 1. "DCALPHA,Default color alpha" hexmask.long.byte 0x1C 16.--23. 1. "DCRED,Default color red" hexmask.long.byte 0x1C 8.--15. 1. "DCGREEN,Default color green" hexmask.long.byte 0x1C 0.--7. 1. "DCBLUE,Default color blue" line.long 0x20 "LTDC_L3BFCR,LTDC layer 3 blending factors configuration register" bitfld.long 0x20 16.--18. "BOR,Blending order" "B_0x0,?,?,?,?,?,?,B_0x7" bitfld.long 0x20 8.--10. "BF1,Default factor 1" "?,?,?,?,B_0x4,?,B_0x6,?" bitfld.long 0x20 0.--2. "BF2,Blending factor 2" "?,?,?,?,?,B_0x5,?,B_0x7" line.long 0x24 "LTDC_L3BLCR,LTDC layer 3 burst length configuration register" hexmask.long.byte 0x24 0.--4. 1. "BL,Burst length" group.long 0x334++0xB line.long 0x0 "LTDC_L3CFBAR,LTDC layer 3 color frame buffer address register" hexmask.long 0x0 0.--31. 1. "CFBADD,Color frame buffer start address" line.long 0x4 "LTDC_L3CFBLR,LTDC layer 3 color frame buffer length register" hexmask.long.word 0x4 16.--30. 1. "CFBP,Color frame buffer pitch in bytes" hexmask.long.word 0x4 0.--13. 1. "CFBLL,Color frame buffer line length" line.long 0x8 "LTDC_L3CFBLNR,LTDC layer 3 color frame buffer line number register" hexmask.long.word 0x8 0.--11. 1. "CFBLNBR,Frame buffer line number" wgroup.long 0x350++0x3 line.long 0x0 "LTDC_L3CLUTWR,LTDC layer 3 CLUT write register" hexmask.long.byte 0x0 24.--31. 1. "CLUTADD,CLUT address" hexmask.long.byte 0x0 16.--23. 1. "RED,Red value" hexmask.long.byte 0x0 8.--15. 1. "GREEN,Green value" hexmask.long.byte 0x0 0.--7. 1. "BLUE,Blue value" group.long 0x374++0x7 line.long 0x0 "LTDC_L3FPF0R,LTDC layer 3 flexible pixel format 0 register" hexmask.long.byte 0x0 14.--17. 1. "RLEN,Width of the red component (in bits)" hexmask.long.byte 0x0 9.--13. 1. "RPOS,Location of the red component inside the pixel memory word (in bits)" hexmask.long.byte 0x0 5.--8. 1. "ALEN,Width of the alpha component (in bits)" hexmask.long.byte 0x0 0.--4. 1. "APOS,Location of the alpha component inside the pixel memory word (in bits)" line.long 0x4 "LTDC_L3FPF1R,LTDC layer 3 flexible pixel format 1 register" bitfld.long 0x4 18.--20. "PSIZE,Pixel size (in bytes)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 14.--17. 1. "BLEN,Width of the blue component (in bits)" hexmask.long.byte 0x4 9.--13. 1. "BPOS,Location of the blue component inside the pixel memory word (in bits)" hexmask.long.byte 0x4 5.--8. 1. "GLEN,Width of the green component (in bits)" hexmask.long.byte 0x4 0.--4. 1. "GPOS,Location of the green component inside the pixel memory word (in bits)" tree.end tree.end tree "LVDS (LVDS Display Interface Transmitter)" base ad:0x0 tree "LVDS" base ad:0x48060000 group.long 0x0++0x33 line.long 0x0 "LVDS_CR,LVDS configuration register" hexmask.long.byte 0x0 21.--25. 1. "LK2POL,Link-2 output polarity defined per output data/clock lane from Lane-[4:0]" hexmask.long.byte 0x0 16.--20. 1. "LK1POL,Link-1 output polarity defined per output data/clock lane from Lane-[4:0]" bitfld.long 0x0 6. "LKPHA,Link phase for both links" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "LKMOD,Link mode for both links which impacts the clock used" "B_0x0,B_0x1" bitfld.long 0x0 4. "CI,Control internal (software controlled bit that can be inserted among output data)" "B_0x0,B_0x1" bitfld.long 0x0 3. "DEPOL,Data enable polarity" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "VSPOL,Vertical synchronization polarity" "B_0x0,B_0x1" bitfld.long 0x0 1. "HSPOL,Horizontal synchronization polarity" "B_0x0,B_0x1" bitfld.long 0x0 0. "LVDSEN,LVDS PHY enable" "B_0x0,B_0x1" line.long 0x4 "LVDS_DMLCR0,LVDS data mapping LSB configuration register 0" hexmask.long.byte 0x4 15.--19. 1. "MAP3,Mapping for bit 3 of that data lane" hexmask.long.byte 0x4 10.--14. 1. "MAP2,Mapping for bit 2 of that data lane" hexmask.long.byte 0x4 5.--9. 1. "MAP1,Mapping for bit 1 of that data lane" newline hexmask.long.byte 0x4 0.--4. 1. "MAP0,Mapping for bit 0 of that data lane" line.long 0x8 "LVDS_DMMCR0,LVDS data mapping MSB configuration register 0" hexmask.long.byte 0x8 10.--14. 1. "MAP6,Mapping for bit 6 of that data lane" hexmask.long.byte 0x8 5.--9. 1. "MAP5,Mapping for bit 5 of that data lane" hexmask.long.byte 0x8 0.--4. 1. "MAP4,Mapping for bit 4 of that data lane" line.long 0xC "LVDS_DMLCR1,LVDS data mapping LSB configuration register 1" hexmask.long.byte 0xC 15.--19. 1. "MAP3,Mapping for bit 3 of that data lane" hexmask.long.byte 0xC 10.--14. 1. "MAP2,Mapping for bit 2 of that data lane" hexmask.long.byte 0xC 5.--9. 1. "MAP1,Mapping for bit 1 of that data lane" newline hexmask.long.byte 0xC 0.--4. 1. "MAP0,Mapping for bit 0 of that data lane" line.long 0x10 "LVDS_DMMCR1,LVDS data mapping MSB configuration register 1" hexmask.long.byte 0x10 10.--14. 1. "MAP6,Mapping for bit 6 of that data lane" hexmask.long.byte 0x10 5.--9. 1. "MAP5,Mapping for bit 5 of that data lane" hexmask.long.byte 0x10 0.--4. 1. "MAP4,Mapping for bit 4 of that data lane" line.long 0x14 "LVDS_DMLCR2,LVDS data mapping LSB configuration register 2" hexmask.long.byte 0x14 15.--19. 1. "MAP3,Mapping for bit 3 of that DataLane." hexmask.long.byte 0x14 10.--14. 1. "MAP2,Mapping for bit 2 of that DataLane." hexmask.long.byte 0x14 5.--9. 1. "MAP1,Mapping for bit 1 of that DataLane." newline hexmask.long.byte 0x14 0.--4. 1. "MAP0,Mapping for bit 0 of that DataLane." line.long 0x18 "LVDS_DMMCR2,LVDS data mapping MSB configuration register 2" hexmask.long.byte 0x18 10.--14. 1. "MAP6,Mapping for bit 6 of that DataLane." hexmask.long.byte 0x18 5.--9. 1. "MAP5,Mapping for bit 5 of that DataLane." hexmask.long.byte 0x18 0.--4. 1. "MAP4,Mapping for bit 4 of that DataLane." line.long 0x1C "LVDS_DMLCR3,LVDS data mapping LSB configuration register 3" hexmask.long.byte 0x1C 15.--19. 1. "MAP3,Mapping for bit 3 of that DataLane." hexmask.long.byte 0x1C 10.--14. 1. "MAP2,Mapping for bit 2 of that DataLane." hexmask.long.byte 0x1C 5.--9. 1. "MAP1,Mapping for bit 1 of that DataLane." newline hexmask.long.byte 0x1C 0.--4. 1. "MAP0,Mapping for bit 0 of that DataLane." line.long 0x20 "LVDS_DMMCR3,LVDS data mapping MSB configuration register 3" hexmask.long.byte 0x20 10.--14. 1. "MAP6,Mapping for bit 6 of that DataLane." hexmask.long.byte 0x20 5.--9. 1. "MAP5,Mapping for bit 5 of that DataLane." hexmask.long.byte 0x20 0.--4. 1. "MAP4,Mapping for bit 4 of that DataLane." line.long 0x24 "LVDS_DMLCR4,LVDS data mapping LSB configuration register 4" hexmask.long.byte 0x24 15.--19. 1. "MAP3,Mapping for bit 3 of that DataLane." hexmask.long.byte 0x24 10.--14. 1. "MAP2,Mapping for bit 2 of that DataLane." hexmask.long.byte 0x24 5.--9. 1. "MAP1,Mapping for bit 1 of that DataLane." newline hexmask.long.byte 0x24 0.--4. 1. "MAP0,Mapping for bit 0 of that DataLane." line.long 0x28 "LVDS_DMMCR4,LVDS data mapping MSB configuration register 4" hexmask.long.byte 0x28 10.--14. 1. "MAP6,Mapping for bit 6 of that DataLane." hexmask.long.byte 0x28 5.--9. 1. "MAP5,Mapping for bit 5 of that DataLane." hexmask.long.byte 0x28 0.--4. 1. "MAP4,Mapping for bit 4 of that DataLane." line.long 0x2C "LVDS_CDL1CR,LVDS channel distribution link 1configuration register" hexmask.long.byte 0x2C 16.--19. 1. "DISTR4,channel distribution for Lane 4" hexmask.long.byte 0x2C 12.--15. 1. "DISTR3,channel distribution for Lane 3" hexmask.long.byte 0x2C 8.--11. 1. "DISTR2,channel distribution for Lane 2" newline hexmask.long.byte 0x2C 4.--7. 1. "DISTR1,channel distribution for Lane 1" hexmask.long.byte 0x2C 0.--3. 1. "DISTR0,channel distribution for Lane 0" line.long 0x30 "LVDS_CDL2CR,LVDS channel distribution link 2 configuration register" bitfld.long 0x30 24.--25. "PRBS,PRBS polynomial type" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x30 16.--19. 1. "DISTR4,channel distribution for Lane 4" hexmask.long.byte 0x30 12.--15. 1. "DISTR3,channel distribution for Lane 3" newline hexmask.long.byte 0x30 8.--11. 1. "DISTR2,channel distribution for Lane 2" hexmask.long.byte 0x30 4.--7. 1. "DISTR1,channel distribution for Lane 1" hexmask.long.byte 0x30 0.--3. 1. "DISTR0,channel distribution for Lane 0" group.long 0x1000++0x17 line.long 0x0 "LVDS_PMGCR,LVDS PHY-Master global control register" bitfld.long 0x0 25. "MST_DIVIDERS_RSTN,Output divider reset" "B_0x0,B_0x1" bitfld.long 0x0 24. "MST_RSTZ,When set to 0 this bit places the LVDS-PHY digital section in reset state." "0,1" bitfld.long 0x0 8. "MST_DP_CLK_OUT_ENABLE,Enable LVDS-PHY dp_clk clock" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "MST_LS_CLK_OUT_ENABLE,Enable LVDS-PHY ls_clk clock" "B_0x0,B_0x1" bitfld.long 0x0 0. "MST_BIT_CLK_OUT_ENABLE,Enable LVDS-PHY bit_clk clock" "B_0x0,B_0x1" line.long 0x4 "LVDS_PMPEACR,LVDS PHY-Master pre-emphasis amplitude control register" hexmask.long.byte 0x4 16.--19. 1. "MST_PRE_EMPH_AMP_DL4,Amplitude control for pre-emphasis for lane4" hexmask.long.byte 0x4 12.--15. 1. "MST_PRE_EMPH_AMP_DL3,Amplitude control for pre-emphasis for lane3" hexmask.long.byte 0x4 8.--11. 1. "MST_PRE_EMPH_AMP_DL2,Amplitude control for pre-emphasis for lane2" newline hexmask.long.byte 0x4 4.--7. 1. "MST_PRE_EMPH_AMP_DL1,Amplitude control for pre-emphasis for lane1" hexmask.long.byte 0x4 0.--3. 1. "MST_PRE_EMPH_AMP_DL0,Amplitude control for pre-mphasis for lane0" line.long 0x8 "LVDS_PMPETCR,LVDS PHY-Master pre-emphasis time control register" bitfld.long 0x8 16.--17. "MST_PRE_EMPH_TIME_DL4,Time duration control for pre-emphasis for lane4" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 12.--13. "MST_PRE_EMPH_TIME_DL3,Time duration control for pre-emphasis for lane3" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 8.--9. "MST_PRE_EMPH_TIME_DL2,Time duration control for pre-emphasis for lane2" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 4.--5. "MST_PRE_EMPH_TIME_DL1,Time duration control for pre-emphasis for lane1" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 0.--1. "MST_PRE_EMPH_TIME_DL0,Time duration control for pre-emphasis for lane0" "B_0x0,B_0x1,B_0x2,?" line.long 0xC "LVDS_PMCMCR1,LVDS PHY-Master current mode control register 1" bitfld.long 0xC 30. "MST_CM_USE_VM_VMID_DL3,common mode of datalane3" "0,1" bitfld.long 0xC 29. "MST_CM_USE_VDD_REF_DL3,common mode of data lane3" "0,1" bitfld.long 0xC 28. "MST_CM_EN_DL3,Enable for current mode driver data lane3" "0,1" newline hexmask.long.byte 0xC 24.--27. 1. "MST_CM_AMP_CTRL_DL3,Amplitude control for current mode driver data lane3" bitfld.long 0xC 22. "MST_CM_USE_VM_VMID_DL2,common mode of data lane2" "0,1" bitfld.long 0xC 21. "MST_CM_USE_VDD_REF_DL2,common mode of data lane2" "0,1" newline bitfld.long 0xC 20. "MST_CM_EN_DL2,Enable for current mode driver data lane2" "0,1" hexmask.long.byte 0xC 16.--19. 1. "MST_CM_AMP_CTRL_DL2,Amplitude control for current mode driver data lane2" bitfld.long 0xC 14. "MST_CM_USE_VM_VMID_DL1,common mode of data lane1" "0,1" newline bitfld.long 0xC 13. "MST_CM_USE_VDD_REF_DL1,common mode of data lane1" "0,1" bitfld.long 0xC 12. "MST_CM_EN_DL1,Enable for current mode driver data lane1" "0,1" hexmask.long.byte 0xC 8.--11. 1. "MST_CM_AMP_CTRL_DL1,Amplitude control for current mode driver data lane1" newline bitfld.long 0xC 6. "MST_CM_USE_VM_VMID_DL0,common mode of data lane0" "0,1" bitfld.long 0xC 5. "MST_CM_USE_VDD_REF_DL0,common mode of datalane0" "0,1" bitfld.long 0xC 4. "MST_CM_EN_DL0,Enable for current mode driver data lane0" "0,1" newline hexmask.long.byte 0xC 0.--3. 1. "MST_CM_AMP_CTRL_DL0,Amplitude control for current mode driver data lane0" line.long 0x10 "LVDS_PMCMCR2,LVDS PHY-Master current mode control register 2" bitfld.long 0x10 16. "MST_AC_COUPLING_MODE,AC Coupling Mode." "0,1" bitfld.long 0x10 6. "MST_CM_USE_VM_VMID_DL4,common mode of data lane4" "0,1" bitfld.long 0x10 5. "MST_CM_USE_VDD_REF_DL4,common mode of data lane4" "0,1" newline bitfld.long 0x10 4. "MST_CM_EN_DL4,Enable for current mode driver data lane4" "0,1" hexmask.long.byte 0x10 0.--3. 1. "MST_CM_AMP_CTRL_DL4,Amplitude control for current mode driver data lane4" line.long 0x14 "LVDS_PMRLPCR,LVDS PHY-Master Rx loopback control register" bitfld.long 0x14 28. "MST_EN_LOOP_BACK_DL4,Enable the loop back RX used for continuous monitoring datalane4" "0,1" bitfld.long 0x14 27. "MST_EN_LOOP_BACK_DL3,Enable the loop back RX used for continuous monitoring datalane3" "0,1" bitfld.long 0x14 26. "MST_EN_LOOP_BACK_DL2,Enable the loop back RX used for continuous monitoring datalane2" "0,1" newline bitfld.long 0x14 25. "MST_EN_LOOP_BACK_DL1,Enable the loop back RX used for continuous monitoring datalane1" "0,1" bitfld.long 0x14 24. "MST_EN_LOOP_BACK_DL0,Enable the loop back RX used for continuous monitoring datalane0" "0,1" hexmask.long.byte 0x14 16.--19. 1. "MST_RX_LOOP_BACK_CFG_DL4,Rx loop back configuration for data lane4" newline hexmask.long.byte 0x14 12.--15. 1. "MST_RX_LOOP_BACK_CFG_DL3,Rx loop back configuration for data lane3" hexmask.long.byte 0x14 8.--11. 1. "MST_RX_LOOP_BACK_CFG_DL2,Rx loop back configuration for data lane2" hexmask.long.byte 0x14 4.--7. 1. "MST_RX_LOOP_BACK_CFG_DL1,Rx loop back configuration for data lane1" newline hexmask.long.byte 0x14 0.--3. 1. "MST_RX_LOOP_BACK_CFG_DL0,Rx loop back configuration for data lane0" rgroup.long 0x1018++0x3 line.long 0x0 "LVDS_PMRLPSR,LVDS PHY-master Rx loopback status register" bitfld.long 0x0 16. "MST_RX_LOOP_BACK_A_DL4,Rx loop back output for lane4" "0,1" bitfld.long 0x0 12. "MST_RX_LOOP_BACK_A_DL3,Rx loop back output for lane3" "0,1" bitfld.long 0x0 8. "MST_RX_LOOP_BACK_A_DL2,Rx loop back output for lane2" "0,1" newline bitfld.long 0x0 4. "MST_RX_LOOP_BACK_A_DL1,Rx loop back output for lane1" "0,1" bitfld.long 0x0 0. "MST_RX_LOOP_BACK_A_DL0,Rx loop back output for lane0" "0,1" group.long 0x101C++0x2B line.long 0x0 "LVDS_PMFCR,LVDS PHY-Master flipedge control register" bitfld.long 0x0 20. "MST_FLIP_CLK_EDGE_DL4,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane4" "0,1" bitfld.long 0x0 19. "MST_FLIP_CLK_EDGE_DL3,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane3" "0,1" bitfld.long 0x0 18. "MST_FLIP_CLK_EDGE_DL2,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane2" "0,1" newline bitfld.long 0x0 17. "MST_FLIP_CLK_EDGE_DL1,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane1" "0,1" bitfld.long 0x0 16. "MST_FLIP_CLK_EDGE_DL0,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane0" "0,1" bitfld.long 0x0 4. "MST_FLIP_CLK_EDGE_ANA_DL4,Flips the clock edge used by the pre-driver data lane4" "0,1" newline bitfld.long 0x0 3. "MST_FLIP_CLK_EDGE_ANA_DL3,Flips the clock edge used by the pre-driver data lane3" "0,1" bitfld.long 0x0 2. "MST_FLIP_CLK_EDGE_ANA_DL2,Flips the clock edge used by the pre-driver data lane2" "0,1" bitfld.long 0x0 1. "MST_FLIP_CLK_EDGE_ANA_DL1,Flips the clock edge used by the pre-driver data lane1" "0,1" newline bitfld.long 0x0 0. "MST_FLIP_CLK_EDGE_ANA_DL0,Flips the clock edge used by the pre-driver data lane0" "0,1" line.long 0x4 "LVDS_PMSCR,LVDS PHY-Master serial control register" bitfld.long 0x4 16. "MST_SER_DATA_OK,Indicates transmission of data" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "MST_SER_SWAP_DPDN,Inverts output data (1 bit per lane" line.long 0x8 "LVDS_PMSCR1,LVDS PHY-Master spare control register 1" hexmask.long.byte 0x8 24.--31. 1. "MST_DRV_A3_SPARE,Spare inputs for data lane3" hexmask.long.byte 0x8 16.--23. 1. "MST_DRV_A2_SPARE,Spare inputs for data lane2" hexmask.long.byte 0x8 8.--15. 1. "MST_DRV_A1_SPARE,Spare inputs for data lane1" newline hexmask.long.byte 0x8 0.--7. 1. "MST_DRV_A0_SPARE,Spare inputs for data lane0" line.long 0xC "LVDS_PMSCR2,LVDS PHY-Master spare control register 2" hexmask.long.byte 0xC 0.--7. 1. "MST_DRV_A4_SPARE,Spare inputs for data lane4" line.long 0x10 "LVDS_PMBCR1,LVDS PHY-Master bias control register 1" bitfld.long 0x10 16. "MST_EN_BIAS_DL4,Enable the local bias at data lane4" "B_0x0,B_0x1" bitfld.long 0x10 12. "MST_EN_BIAS_DL3,Enable the local bias at data lane3" "B_0x0,B_0x1" bitfld.long 0x10 8. "MST_EN_BIAS_DL2,Enable the local bias at data lane2" "B_0x0,B_0x1" newline bitfld.long 0x10 4. "MST_EN_BIAS_DL1,Enable the local bias at data lane1" "B_0x0,B_0x1" bitfld.long 0x10 0. "MST_EN_BIAS_DL0,Enable the local bias at data lane0" "B_0x0,B_0x1" line.long 0x14 "LVDS_PMBCR2,LVDS PHY-Master bias control register 2" bitfld.long 0x14 29. "MST_BIAS_VREF_SEL,Selection for current generation internal reference" "B_0x0,B_0x1" bitfld.long 0x14 28. "MST_BIAS_EN,LVDS macro global bias enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "MST_BIAS_VREFTRIM,None" newline hexmask.long.word 0x14 0.--14. 1. "MST_BIAS_TRIM,0x0: 27.71 uA" line.long 0x18 "LVDS_PMBCR3,LVDS PHY-Master bias control register 3" bitfld.long 0x18 18. "MST_VM_USE_VDD_REF_DL4,Sets the voltage mode driver to use a reference derived from the power supply data lane4" "0,1" bitfld.long 0x18 17. "MST_VM_BOOST_BIAS_DL4,Bias booster for the voltage mode driver LDOS data lane4" "B_0x0,B_0x1" bitfld.long 0x18 16. "MST_VM_EN_DL4,Enable the voltage mode driver for data lane4" "B_0x0,B_0x1" newline bitfld.long 0x18 14. "MST_VM_USE_VDD_REF_DL3,Sets the voltage mode driver to use a reference derived from the power supply data lane3" "0,1" bitfld.long 0x18 13. "MST_VM_BOOST_BIAS_DL3,Bias booster for the voltage mode driver LDOS data lane3" "B_0x0,B_0x1" bitfld.long 0x18 12. "MST_VM_EN_DL3,Enable the voltage mode driver for data lane3" "B_0x0,B_0x1" newline bitfld.long 0x18 10. "MST_VM_USE_VDD_REF_DL2,Sets the voltage mode driver to use a reference derived from the power supply data lane2" "0,1" bitfld.long 0x18 9. "MST_VM_BOOST_BIAS_DL2,Bias booster for the voltage mode driver LDOS data lane2" "B_0x0,B_0x1" bitfld.long 0x18 8. "MST_VM_EN_DL2,Enable the voltage mode driver for data lane2" "B_0x0,B_0x1" newline bitfld.long 0x18 6. "MST_VM_USE_VDD_REF_DL1,Sets the voltage mode driver to use a reference derived from the power supply data lane1" "0,1" bitfld.long 0x18 5. "MST_VM_BOOST_BIAS_DL1,Bias booster for the voltage mode driver LDOS data lane1" "B_0x0,B_0x1" bitfld.long 0x18 4. "MST_VM_EN_DL1,Enable the voltage mode driver for data lane1" "B_0x0,B_0x1" newline bitfld.long 0x18 2. "MST_VM_USE_VDD_REF_DL0,Sets the voltage mode driver to use a reference derived from the power supply data lane0" "0,1" bitfld.long 0x18 1. "MST_VM_BOOST_BIAS_DL0,Bias booster for the voltage mode driver LDOS data lane0" "B_0x0,B_0x1" bitfld.long 0x18 0. "MST_VM_EN_DL0,Enable the voltage mode driver for data lane0" "B_0x0,B_0x1" line.long 0x1C "LVDS_PMBCR4,LVDS PHY-Master bias control register 4" hexmask.long.byte 0x1C 16.--19. 1. "MST_VM_VOUT_VOH_CTRL_DL4,Fine tuning for the voltage mode driver VOH datalane4" hexmask.long.byte 0x1C 12.--15. 1. "MST_VM_VOUT_VOH_CTRL_DL3,Fine tuning for the voltage mode driver VOH datalane3" hexmask.long.byte 0x1C 8.--11. 1. "MST_VM_VOUT_VOH_CTRL_DL2,Fine tuning for the voltage mode driver VOH datalane2" newline hexmask.long.byte 0x1C 4.--7. 1. "MST_VM_VOUT_VOH_CTRL_DL1,Fine tuning for the voltage mode driver VOH datalane1" hexmask.long.byte 0x1C 0.--3. 1. "MST_VM_VOUT_VOH_CTRL_DL0,Fine tuning for the voltage mode driver VOH datalane0" line.long 0x20 "LVDS_PMBCR5,LVDS PHY-Master bias control register 5" hexmask.long.byte 0x20 16.--19. 1. "MST_VM_VOUT_VOL_CTRL_DL4,Fine tuning for the voltage mode driver VOL datalane4" hexmask.long.byte 0x20 12.--15. 1. "MST_VM_VOUT_VOL_CTRL_DL3,Fine tuning for the voltage mode driver VOL datalane3" hexmask.long.byte 0x20 8.--11. 1. "MST_VM_VOUT_VOL_CTRL_DL2,Fine tuning for the voltage mode driver VOL datalane2" newline hexmask.long.byte 0x20 4.--7. 1. "MST_VM_VOUT_VOL_CTRL_DL1,Fine tuning for the voltage mode driver VOL datalane1" hexmask.long.byte 0x20 0.--3. 1. "MST_VM_VOUT_VOL_CTRL_DL0,Fine tuning for the voltage mode driver VOL datalane0" line.long 0x24 "LVDS_PMICR,LVDS PHY-Master impedance control register" bitfld.long 0x24 16.--18. "MST_IMP_CTRL_DL4,Impedance control for data lane4" "0,1,2,3,4,5,6,7" bitfld.long 0x24 12.--14. "MST_IMP_CTRL_DL3,Impedance control for data lane3" "0,1,2,3,4,5,6,7" bitfld.long 0x24 8.--10. "MST_IMP_CTRL_DL2,Impedance control for data lane0" "0,1,2,3,4,5,6,7" newline bitfld.long 0x24 4.--6. "MST_IMP_CTRL_DL1,Impedance control for data lane1" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0.--2. "MST_IMP_CTRL_DL0,Impedance control for data lane0" "0,1,2,3,4,5,6,7" line.long 0x28 "LVDS_PMMBCCR,LVDS PHY-Master monitor bandgap current control register" hexmask.long.word 0x28 16.--24. 1. "MST_MON_BG_CURR_UNMASK_TUNE,Bandgap current timing control for the monitor unmask after startup" bitfld.long 0x28 4. "MST_MON_BG_CURR_CLEAR_FAULT,Bandgap current monitor clear fault" "0,1" bitfld.long 0x28 0. "MST_MON_BG_CURR_FORCE_FAULT,Bandgap current monitor force fault" "0,1" rgroup.long 0x1048++0x3 line.long 0x0 "LVDS_PMMBCSR,LVDS PHY-Master monitor bandgap current status register" bitfld.long 0x0 4. "MST_MON_BG_CURR_FAULT,Bandgap current monitor fault" "0,1" bitfld.long 0x0 0. "MST_MON_BG_CURR_PERMANENT_FAULT,Bandgap current monitor permanent fault" "0,1" group.long 0x104C++0x3 line.long 0x0 "LVDS_PMMBLCR,LVDS PHY-Master monitor bandgap loop control register" hexmask.long.word 0x0 16.--24. 1. "MST_MON_BG_LOOP_UNMASK_TUNE,Bandgap loop timing control for the monitor unmask after startup" bitfld.long 0x0 4. "MST_MON_BG_LOOP_CLEAR_FAULT,Bandgap loop monitor clear fault" "0,1" bitfld.long 0x0 0. "MST_MON_BG_LOOP_FORCE_FAULT,Bandgap loop monitor force fault" "0,1" rgroup.long 0x1050++0x3 line.long 0x0 "LVDS_PMMBLSR,LVDS PHY-Master monitor bandgap loop status register" bitfld.long 0x0 4. "MST_MON_BG_LOOP_FAULT,Bandgap loop monitor fault" "0,1" bitfld.long 0x0 0. "MST_MON_BG_LOOP_PERMANENT_FAULT,Bandgap loop monitor permanent fault" "0,1" group.long 0x1054++0x3 line.long 0x0 "LVDS_PMMBOVCR,LVDS PHY-Master monitor bandgap output voltage control register" hexmask.long.word 0x0 16.--24. 1. "MST_MON_BG_VOLT_UNMASK_TUNE,Bandgap output voltage timing control for the monitor unmask after startup" bitfld.long 0x0 4. "MST_MON_BG_VOLT_CLEAR_FAULT,Bandgap output voltage monitor clear fault" "0,1" bitfld.long 0x0 0. "MST_MON_BG_VOLT_FORCE_FAULT,Bandgap output voltage monitor force fault" "0,1" rgroup.long 0x1058++0x3 line.long 0x0 "LVDS_PMMBOVSR,LVDS PHY-Master monitor bandgap output voltage status register" bitfld.long 0x0 4. "MST_MON_BG_VOLT_FAULT,Bandgap output voltage monitor fault" "0,1" bitfld.long 0x0 0. "MST_MON_BG_VOLT_PERMANENT_FAULT,Bandgap output voltage monitor permanent fault" "0,1" group.long 0x105C++0x3 line.long 0x0 "LVDS_PMMPLOVCR,LVDS PHY-Master monitor PLL LDO output voltage control register" hexmask.long.word 0x0 16.--24. 1. "MST_MON_LDO_OK_UNMASK_TUNE,PLL LDO output voltage timing control for the monitor unmask after startup" bitfld.long 0x0 4. "MST_MON_LDO_OK_CLEAR_FAULT,PLL LDO output voltage monitor clear fault" "0,1" bitfld.long 0x0 0. "MST_MON_LDO_OK_FORCE_FAULT,PLL LDO output voltage monitor force fault" "0,1" rgroup.long 0x1060++0x3 line.long 0x0 "LVDS_PMMPLOVSR,LVDS PHY-Master monitor PLL LDO output voltage status register" bitfld.long 0x0 4. "MST_MON_LDO_OK_FAULT,PLL LDO output voltage monitor fault" "0,1" bitfld.long 0x0 0. "MST_MON_LDO_OK_PERMANENT_FAULT,PLL LDO output voltage monitor permanent fault" "0,1" group.long 0x1064++0x3 line.long 0x0 "LVDS_PMMPLCR,LVDS PHY-Master monitor PLL lock control register" hexmask.long.word 0x0 16.--24. 1. "MST_MON_PLL_LOCK_UNMASK_TUNE,PLL Lock timing control for the monitor unmask after startup" bitfld.long 0x0 4. "MST_MON_PLL_LOCK_CLEAR_FAULT,PLL Lock monitor clear fault" "0,1" bitfld.long 0x0 0. "MST_MON_PLL_LOCK_FORCE_FAULT,PLL Lock monitor force fault" "0,1" rgroup.long 0x1068++0x3 line.long 0x0 "LVDS_PMMPLSR,LVDS PHY-Master monitor PLL lock status register" bitfld.long 0x0 4. "MST_MON_PLL_LOCK_FAULT,PLL Lock monitor fault" "0,1" bitfld.long 0x0 0. "MST_MON_PLL_LOCK_PERMANENT_FAULT,PLL Lock monitor permanent fault" "0,1" group.long 0x106C++0x3 line.long 0x0 "LVDS_PMMPROCR,LVDS PHY-Master monitor PLL reference OK control register" hexmask.long.word 0x0 16.--24. 1. "MST_MON_REF_OK_UNMASK_TUNE,PLL Reference timing control for the monitor unmask after startup" bitfld.long 0x0 4. "MST_MON_REF_OK_CLEAR_FAULT,PLL Reference monitor clear fault" "0,1" bitfld.long 0x0 0. "MST_MON_REF_OK_FORCE_FAULT,PLL Reference monitor force fault" "0,1" rgroup.long 0x1070++0x3 line.long 0x0 "LVDS_PMMPROSR,LVDS PHY-Master monitor PLL reference OK status register" bitfld.long 0x0 4. "MST_MON_REF_OK_FAULT,PLL Reference OK monitor fault" "0,1" bitfld.long 0x0 0. "MST_MON_REF_OK_PERMANENT_FAULT,PLL Reference OK monitor permanent fault" "0,1" group.long 0x1074++0x3 line.long 0x0 "LVDS_PMMSCCR,LVDS PHY-Master monitor serializer clock control register" bitfld.long 0x0 4. "MST_SER_CLK_CLEAR_FAULT,Serializer clock checking fault clearing" "0,1" bitfld.long 0x0 0. "MST_SER_CLK_ERROR_INJ,Serializer clock checking error injection" "0,1" rgroup.long 0x1078++0x3 line.long 0x0 "LVDS_PMMSCSR,LVDS PHY-Master monitor serializer clock status register" bitfld.long 0x0 0. "MST_SER_CLK_FAULT,Serializer clock checking fault" "0,1" group.long 0x107C++0x3 line.long 0x0 "LVDS_PMMSCR,LVDS PHY-Master monitor serializer control register" hexmask.long.byte 0x0 16.--20. 1. "MST_SER_LPBCK,Serializer fault loopback" hexmask.long.byte 0x0 8.--12. 1. "MST_SER_FAULT_CLEAR,Serializer fault clearing" hexmask.long.byte 0x0 0.--4. 1. "MST_SER_ERROR_INJ,Serializer error injection" rgroup.long 0x1080++0x3 line.long 0x0 "LVDS_PMMSSR,LVDS PHY-Master monitor serializer status register" hexmask.long.byte 0x0 0.--4. 1. "MST_SER_FAULT,Serializer fault" group.long 0x1084++0x3 line.long 0x0 "LVDS_PMDCR,LVDS PHY-Master debug control register" bitfld.long 0x0 12. "MST_POWER_OK,When set to 1 this bit masks some functions in the LVDS-PHY" "0,1" bitfld.long 0x0 8. "MST_PLL_FORCE_LOCK,When set to 1 this bit masks some functions in the LVDS-PHY" "0,1" bitfld.long 0x0 4. "MST_PLL_FORCE_LDO_OK,When set to 1 this bit masks some functions in the LVDS-PHY" "0,1" newline bitfld.long 0x0 0. "MST_FORCE_ANALOG_OK,When set to 1 this bit masks some functions in the LVDS-PHY" "0,1" rgroup.long 0x1088++0x7 line.long 0x0 "LVDS_PMSSR1,LVDS PHY-Master spare status register 1" hexmask.long.byte 0x0 24.--31. 1. "MST_DRV_A3_SPARE_RD,Spare outputs for data lane3" hexmask.long.byte 0x0 16.--23. 1. "MST_DRV_A2_SPARE_RD,Spare outputs for data lane2" hexmask.long.byte 0x0 8.--15. 1. "MST_DRV_A1_SPARE_RD,Spare outputs for data lane1" newline hexmask.long.byte 0x0 0.--7. 1. "MST_DRV_A0_SPARE_RD,Spare outputs for data lane0" line.long 0x4 "LVDS_PMSSR2,LVDS PHY-Master spare status register 2" hexmask.long.byte 0x4 0.--7. 1. "MST_DRV_A4_SPARE_RD,Spare outputs for data lane4" group.long 0x10A0++0x3 line.long 0x0 "LVDS_PMCFGCR,LVDS PHY-Master configuration control register" hexmask.long.byte 0x0 0.--4. 1. "MST_EN_DIG_DL,Enables Digital DataLanes DL4...DL0" group.long 0x10C0++0x7 line.long 0x0 "LVDS_PMPLLCR1,LVDS PHY-Master PLL_MODE 1 control register" rbitfld.long 0x0 12. "MST_PLL_BYPASS_START_DECT,Bypass start DECT." "0,1" bitfld.long 0x0 8. "MST_PLL_DIVIDERS_ENABLE,0x0: Dividers disabled" "?,B_0x1" bitfld.long 0x0 4. "MST_PLL_BYPASS,0x0: from VCO output" "?,B_0x1" newline bitfld.long 0x0 2. "MST_PLL_TWG_ENABLE,Triangular wave pattern used to modulate MDIV" "B_0x0,B_0x1" bitfld.long 0x0 1. "MST_PLL_SD_ENABLE,sigma-delta enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "MST_PLL_ENABLE,0x0: LVDS-PHY PLL Disable" "?,B_0x1" line.long 0x4 "LVDS_PMPLLCR2,LVDS PHY-Master PLL_MODE 2 control register" hexmask.long.word 0x4 16.--25. 1. "MST_PLL_INPUT_DIV,PLL Input Clock Divider (NDIV divides input reference clock)" hexmask.long.word 0x4 0.--9. 1. "MST_PLL_BIT_DIV,PLL Output Clock Divider (BDIV divides output VCO)" rgroup.long 0x10C8++0x3 line.long 0x0 "LVDS_PMPLLSR,LVDS PHY-Master PLL status register" bitfld.long 0x0 0. "MST_PLL_LOCK,PLL lock During a certain number of cycles of reference clock pll_lock is asserted high and then goes low waiting for the LVDS-PHY PLL t0 lock" "0,1" group.long 0x10CC++0x1F line.long 0x0 "LVDS_PMPLLSDCR1,LVDS PHY-Master PLL_SD_1 control register" hexmask.long.word 0x0 0.--9. 1. "MST_PLL_SD_INT_RATIO,Integer Setting of PLL Feedback Clock Divider (MDIV divides VCO clock for feedback)" line.long 0x4 "LVDS_PMPLLSDCR2,LVDS PHY-Master PLL_SD_2 control register" bitfld.long 0x4 28. "MST_PLL_SD_CLK_EDGE_CNTRL,Sigma Delta Edge Control." "0,1" rbitfld.long 0x4 26. "MST_PLL_SD_BYPASS_FB_CLK,Bypass start SD feedback clock." "0,1" bitfld.long 0x4 24.--25. "MST_PLL_SD_BYPASS_VCO_MUX,Bypass control for the PLL sigma delta VCO mux" "0,1,2,3" newline hexmask.long.tbyte 0x4 0.--22. 1. "MST_PLL_SD_INPUT_CODE_BYPASS,Fractional Setting of PLL Feedback Clock Divider (MDIV divides VCO clock for feedback)" line.long 0x8 "LVDS_PMPLLTWGCR1,LVDS PHY-Master PLL_TWG_1 control register" bitfld.long 0x8 20. "MST_PLL_TWG_DOWN_SPREAD,TWG pattern spreading" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--19. 1. "MST_PLL_TWG_STEP,MDIV divdier used in integer N and Fractional N PLL modes" line.long 0xC "LVDS_PMPLLTWGCR2,LVDS PHY-Master PLL_TWG_2 control register" hexmask.long.tbyte 0xC 0.--22. 1. "MST_PLL_TWG_THRESHOLD,TWG_THRESHOLD setting" line.long 0x10 "LVDS_PMPLLLDOCR,LVDS PHY-Master PLL_LDO control register" bitfld.long 0x10 0.--2. "MST_PLL_LDO_FRREGVTRIM,PLL LDO output voltage fine tuning:" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x14 "LVDS_PMPLLCPCR,LVDS PHY-Master PLL_CP control register" hexmask.long.byte 0x14 0.--3. 1. "MST_PLL_CPCTRL,PLL charge pump control default=1." line.long 0x18 "LVDS_PMPLLCFGCR,LVDS PHY-Master PLL_CFG control register" hexmask.long.byte 0x18 0.--7. 1. "MST_PLL_CFG,PLL configuration" line.long 0x1C "LVDS_PMPLLTESTCR,LVDS PHY-Master PLL_TEST control register" hexmask.long.word 0x1C 16.--25. 1. "MST_PLL_TEST_DIV_SETTINGS,lvds_pll_test_clk dividers value" bitfld.long 0x1C 8. "MST_PLL_TEST_DIV_EN,lvds_pll_test_clk dividers enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "MST_PLL_TEST_CLK_EN,lvds_pll_test_clk enable" "B_0x0,B_0x1" group.long 0x1100++0x17 line.long 0x0 "LVDS_PSGCR,LVDS PHY-Slave global control register" bitfld.long 0x0 25. "SLV_DIVIDERS_RSTN,When set to 0 reset the output dividers" "0,1" bitfld.long 0x0 24. "SLV_RSTZ,When set to 0 this bit places the digital section of the LVDS-PHY in the reset state" "0,1" bitfld.long 0x0 8. "SLV_DP_CLK_OUT_ENABLE,Enable LVDS-PHY dp_clk clock" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "SLV_LS_CLK_OUT_ENABLE,Enable LVDS-PHY ls_clk clock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SLV_BIT_CLK_OUT_ENABLE,Enable LVDS-PHY bit_clk clock" "B_0x0,B_0x1" line.long 0x4 "LVDS_PSPEACR,LVDS PHY-Slave pre-emphasis amplitude control register" hexmask.long.byte 0x4 16.--19. 1. "SLV_PRE_EMPH_AMP_DL4,Amplitude control for pre-emphasis for lane4" hexmask.long.byte 0x4 12.--15. 1. "SLV_PRE_EMPH_AMP_DL3,Amplitude control for pre-emphasis for lane3" hexmask.long.byte 0x4 8.--11. 1. "SLV_PRE_EMPH_AMP_DL2,Amplitude control for pre-emphasis for lane2" newline hexmask.long.byte 0x4 4.--7. 1. "SLV_PRE_EMPH_AMP_DL1,Amplitude control for pre-emphasis for lane1" hexmask.long.byte 0x4 0.--3. 1. "SLV_PRE_EMPH_AMP_DL0,Amplitude control for pre-emphasis for lane0" line.long 0x8 "LVDS_PSPETCR,LVDS PHY-Slave pre-emphasis time control register" bitfld.long 0x8 16.--17. "SLV_PRE_EMPH_TIME_DL4,Time duration control for pre-emphasis for lane4" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 12.--13. "SLV_PRE_EMPH_TIME_DL3,Time duration control for pre-emphasis for lane3" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 8.--9. "SLV_PRE_EMPH_TIME_DL2,Time duration control for pre-emphasis for lane2" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 4.--5. "SLV_PRE_EMPH_TIME_DL1,Time duration control for pre-emphasis for lane1" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 0.--1. "SLV_PRE_EMPH_TIME_DL0,Time duration control for pre-emphasis for lane0" "B_0x0,B_0x1,B_0x2,?" line.long 0xC "LVDS_PSCMCR1,LVDS PHY-Slave current mode control register 1" bitfld.long 0xC 30. "SLV_CM_USE_VM_VMID_DL3,common mode of datalane3: when high reference is mid voltage of the driver levels" "0,1" bitfld.long 0xC 29. "SLV_CM_USE_VDD_REF_DL3,common mode of datalane3: when high reference is derived from AVDD_IO voltage" "0,1" bitfld.long 0xC 28. "SLV_CM_EN_DL3,Enable for current mode driver data lane3" "0,1" newline hexmask.long.byte 0xC 24.--27. 1. "SLV_CM_AMP_CTRL_DL3,Amplitude control for current mode driver data lane3" bitfld.long 0xC 22. "SLV_CM_USE_VM_VMID_DL2,common mode of datalane2: when high reference is mid voltage of the driver levels" "0,1" bitfld.long 0xC 21. "SLV_CM_USE_VDD_REF_DL2,common mode of datalane2: when high reference is derived from AVDD_IO voltage" "0,1" newline bitfld.long 0xC 20. "SLV_CM_EN_DL2,Enable for current mode driver data lane2" "0,1" hexmask.long.byte 0xC 16.--19. 1. "SLV_CM_AMP_CTRL_DL2,Amplitude control for current mode driver data lane2" bitfld.long 0xC 14. "SLV_CM_USE_VM_VMID_DL1,common mode of datalane1: when high reference is mid voltage of the driver levels" "0,1" newline bitfld.long 0xC 13. "SLV_CM_USE_VDD_REF_DL1,common mode of datalane1: when high reference is derived from AVDD_IO voltage" "0,1" bitfld.long 0xC 12. "SLV_CM_EN_DL1,Enable for current mode driver data lane1" "0,1" hexmask.long.byte 0xC 8.--11. 1. "SLV_CM_AMP_CTRL_DL1,Amplitude control for current mode driver data lane1" newline bitfld.long 0xC 6. "SLV_CM_USE_VM_VMID_DL0,common mode of datalane0: when high reference is mid voltage of the driver levels" "0,1" bitfld.long 0xC 5. "SLV_CM_USE_VDD_REF_DL0,common mode of datalane0: when high reference is derived from AVDD_IO voltage" "0,1" bitfld.long 0xC 4. "SLV_CM_EN_DL0,Enable for current mode driver data lane0" "0,1" newline hexmask.long.byte 0xC 0.--3. 1. "SLV_CM_AMP_CTRL_DL0,Amplitude control for current mode driver data lane0" line.long 0x10 "LVDS_PSCMCR2,LVDS PHY-Slave current mode control register 2" bitfld.long 0x10 16. "SLV_AC_COUPLING_MODE,AC Coupling Mode." "0,1" bitfld.long 0x10 6. "SLV_CM_USE_VM_VMID_DL4,common mode of datalane4: when high reference is mid voltage of the driver levels" "0,1" bitfld.long 0x10 5. "SLV_CM_USE_VDD_REF_DL4,common mode of datalane4: when high reference is derived from AVDD_IO voltage" "0,1" newline bitfld.long 0x10 4. "SLV_CM_EN_DL4,Enable for current mode driver data lane4" "0,1" hexmask.long.byte 0x10 0.--3. 1. "SLV_CM_AMP_CTRL_DL4,Amplitude control for current mode driver data lane4" line.long 0x14 "LVDS_PSRLPCR,LVDS PHY-Slave Rx loopback control register" bitfld.long 0x14 28. "SLV_EN_LOOP_BACK_DL4,Enable the loop back RX used for continuous monitoring data lane4" "0,1" bitfld.long 0x14 27. "SLV_EN_LOOP_BACK_DL3,Enable the loop back RX used for continuous monitoring data lane3" "0,1" bitfld.long 0x14 26. "SLV_EN_LOOP_BACK_DL2,Enable the loop back RX used for continuous monitoring data lane2" "0,1" newline bitfld.long 0x14 25. "SLV_EN_LOOP_BACK_DL1,Enable the loop back RX used for continuous monitoring data lane1" "0,1" bitfld.long 0x14 24. "SLV_EN_LOOP_BACK_DL0,Enable the loop back RX used for continuous monitoring data lane0" "0,1" hexmask.long.byte 0x14 16.--19. 1. "SLV_RX_LOOP_BACK_CFG_DL4,Rx loop back configuration for datalane4" newline hexmask.long.byte 0x14 12.--15. 1. "SLV_RX_LOOP_BACK_CFG_DL3,Rx loop back configuration for datalane3" hexmask.long.byte 0x14 8.--11. 1. "SLV_RX_LOOP_BACK_CFG_DL2,Rx loop back configuration for datalane2" hexmask.long.byte 0x14 4.--7. 1. "SLV_RX_LOOP_BACK_CFG_DL1,Rx loop back configuration for datalane1" newline hexmask.long.byte 0x14 0.--3. 1. "SLV_RX_LOOP_BACK_CFG_DL0,Rx loop back configuration for datalane0" rgroup.long 0x1118++0x3 line.long 0x0 "LVDS_PSRLPSR,LVDS PHY-slave Rx loopback status register" bitfld.long 0x0 16. "SLV_RX_LOOP_BACK_A_DL4,Rx loop back output for lane0" "0,1" bitfld.long 0x0 12. "SLV_RX_LOOP_BACK_A_DL3,Rx loop back output for lane1" "0,1" bitfld.long 0x0 8. "SLV_RX_LOOP_BACK_A_DL2,Rx loop back output for lane2" "0,1" newline bitfld.long 0x0 4. "SLV_RX_LOOP_BACK_A_DL1,Rx loop back output for lane3" "0,1" bitfld.long 0x0 0. "SLV_RX_LOOP_BACK_A_DL0,Rx loop back output for lane4" "0,1" group.long 0x111C++0x2B line.long 0x0 "LVDS_PSFCR,LVDS PHY-Slave flipedge control register" bitfld.long 0x0 20. "SLV_FLIP_CLK_EDGE_DL4,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane4" "0,1" bitfld.long 0x0 19. "SLV_FLIP_CLK_EDGE_DL3,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane3" "0,1" bitfld.long 0x0 18. "SLV_FLIP_CLK_EDGE_DL2,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane2" "0,1" newline bitfld.long 0x0 17. "SLV_FLIP_CLK_EDGE_DL1,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane1" "0,1" bitfld.long 0x0 16. "SLV_FLIP_CLK_EDGE_DL0,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane0" "0,1" bitfld.long 0x0 4. "SLV_FLIP_CLK_EDGE_ANA_DL4,Flips the clock edge used by the pre-driver data lane4" "0,1" newline bitfld.long 0x0 3. "SLV_FLIP_CLK_EDGE_ANA_DL3,Flips the clock edge used by the pre-driver data lane3" "0,1" bitfld.long 0x0 2. "SLV_FLIP_CLK_EDGE_ANA_DL2,Flips the clock edge used by the pre-driver data lane2" "0,1" bitfld.long 0x0 1. "SLV_FLIP_CLK_EDGE_ANA_DL1,Flips the clock edge used by the pre-driver data lane1" "0,1" newline bitfld.long 0x0 0. "SLV_FLIP_CLK_EDGE_ANA_DL0,Flips the clock edge used by the pre-driver data lane0" "0,1" line.long 0x4 "LVDS_PSSCR,LVDS PHY-Slave serial control register" bitfld.long 0x4 16. "SLV_SER_DATA_OK,Indicates transmission of data" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "SLV_SER_SWAP_DPDN,Inverts output data" line.long 0x8 "LVDS_PSSCR1,LVDS PHY-Slave spare control register 1" hexmask.long.byte 0x8 24.--31. 1. "SLV_DRV_A3_SPARE,Spare inputs for data lane3" hexmask.long.byte 0x8 16.--23. 1. "SLV_DRV_A2_SPARE,Spare inputs for data lane2" hexmask.long.byte 0x8 8.--15. 1. "SLV_DRV_A1_SPARE,Spare inputs for data lane1" newline hexmask.long.byte 0x8 0.--7. 1. "SLV_DRV_A0_SPARE,Spare inputs for data lane0" line.long 0xC "LVDS_PSSCR2,LVDS PHY-Slave spare control register 2" hexmask.long.byte 0xC 0.--7. 1. "SLV_DRV_A4_SPARE,Spare inputs for data lane4" line.long 0x10 "LVDS_PSBCR1,LVDS PHY-Slave bias control register 1" bitfld.long 0x10 16. "SLV_EN_BIAS_DL4,Enable the local bias at data lane4" "B_0x0,B_0x1" bitfld.long 0x10 12. "SLV_EN_BIAS_DL3,Enable the local bias at data lane3" "B_0x0,B_0x1" bitfld.long 0x10 8. "SLV_EN_BIAS_DL2,Enable the local bias at data lane2" "B_0x0,B_0x1" newline bitfld.long 0x10 4. "SLV_EN_BIAS_DL1,Enable the local bias at data lane1" "B_0x0,B_0x1" bitfld.long 0x10 0. "SLV_EN_BIAS_DL0,Enable the local bias at data lane0" "B_0x0,B_0x1" line.long 0x14 "LVDS_PSBCR2,LVDS PHY-Slave bias control register 2" bitfld.long 0x14 29. "SLV_BIAS_VREF_SEL,Selection for current generation internal reference" "B_0x0,B_0x1" bitfld.long 0x14 28. "SLV_BIAS_EN,lvds macro global bias enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "SLV_BIAS_VREFTRIM,None" newline hexmask.long.word 0x14 0.--14. 1. "SLV_BIAS_TRIM,None" line.long 0x18 "LVDS_PSBCR3,LVDS PHY-Slave bias control register 3" bitfld.long 0x18 18. "SLV_VM_USE_VDD_REF_DL4,Sets the voltage mode driver to use a reference derived from the power supply data lane4" "0,1" bitfld.long 0x18 17. "SLV_VM_BOOST_BIAS_DL4,Bias booster for the voltage mode driver LDOS data lane4" "B_0x0,B_0x1" bitfld.long 0x18 16. "SLV_VM_EN_DL4,Enable the voltage mode driver for data lane4" "B_0x0,B_0x1" newline bitfld.long 0x18 14. "SLV_VM_USE_VDD_REF_DL3,Sets the voltage mode driver to use a reference derived from the power supply data lane3" "0,1" bitfld.long 0x18 13. "SLV_VM_BOOST_BIAS_DL3,Bias booster for the voltage mode driver LDOS data lane3" "B_0x0,B_0x1" bitfld.long 0x18 12. "SLV_VM_EN_DL3,Enable the voltage mode driver for data lane3" "B_0x0,B_0x1" newline bitfld.long 0x18 10. "SLV_VM_USE_VDD_REF_DL2,Sets the voltage mode driver to use a reference derived from the power supply data lane2" "0,1" bitfld.long 0x18 9. "SLV_VM_BOOST_BIAS_DL2,Bias booster for the voltage mode driver LDOS data lane2" "B_0x0,B_0x1" bitfld.long 0x18 8. "SLV_VM_EN_DL2,Enable the voltage mode driver for data lane2" "B_0x0,B_0x1" newline bitfld.long 0x18 6. "SLV_VM_USE_VDD_REF_DL1,Sets the voltage mode driver to use a reference derived from the power supply data lane1" "0,1" bitfld.long 0x18 5. "SLV_VM_BOOST_BIAS_DL1,Bias booster for the voltage mode driver LDOS data lane1" "B_0x0,B_0x1" bitfld.long 0x18 4. "SLV_VM_EN_DL1,Enable the voltage mode driver for data lane1" "B_0x0,B_0x1" newline bitfld.long 0x18 2. "SLV_VM_USE_VDD_REF_DL0,Sets the voltage mode driver to use a reference derived from the power supply data lane0" "0,1" bitfld.long 0x18 1. "SLV_VM_BOOST_BIAS_DL0,Bias booster for the voltage mode driver LDOS data lane0" "B_0x0,B_0x1" bitfld.long 0x18 0. "SLV_VM_EN_DL0,Enable the voltage mode driver for data lane0" "B_0x0,B_0x1" line.long 0x1C "LVDS_PSBCR4,LVDS PHY-Slave bias control register 4" hexmask.long.byte 0x1C 16.--19. 1. "SLV_VM_VOUT_VOH_CTRL_DL4,Fine tuning for the voltage mode driver VOH data lane4" hexmask.long.byte 0x1C 12.--15. 1. "SLV_VM_VOUT_VOH_CTRL_DL3,Fine tuning for the voltage mode driver VOH data lane3" hexmask.long.byte 0x1C 8.--11. 1. "SLV_VM_VOUT_VOH_CTRL_DL2,Fine tuning for the voltage mode driver VOH data lane2" newline hexmask.long.byte 0x1C 4.--7. 1. "SLV_VM_VOUT_VOH_CTRL_DL1,Fine tuning for the voltage mode driver VOH data lane1" hexmask.long.byte 0x1C 0.--3. 1. "SLV_VM_VOUT_VOH_CTRL_DL0,Fine tuning for the voltage mode driver VOH data lane0" line.long 0x20 "LVDS_PSBCR5,LVDS PHY-Slave bias control register 5" hexmask.long.byte 0x20 16.--19. 1. "SLV_VM_VOUT_VOL_CTRL_DL4,Fine tuning for the voltage mode driver VOL data lane4" hexmask.long.byte 0x20 12.--15. 1. "SLV_VM_VOUT_VOL_CTRL_DL3,Fine tuning for the voltage mode driver VOL data lane3" hexmask.long.byte 0x20 8.--11. 1. "SLV_VM_VOUT_VOL_CTRL_DL2,Fine tuning for the voltage mode driver VOL data lane2" newline hexmask.long.byte 0x20 4.--7. 1. "SLV_VM_VOUT_VOL_CTRL_DL1,Fine tuning for the voltage mode driver VOL data lane1" hexmask.long.byte 0x20 0.--3. 1. "SLV_VM_VOUT_VOL_CTRL_DL0,Fine tuning for the voltage mode driver VOL data lane0" line.long 0x24 "LVDS_PSICR,LVDS PHY-Slave impedance control register" bitfld.long 0x24 16.--18. "SLV_IMP_CTRL_DL4,Impedance control for data lane4" "0,1,2,3,4,5,6,7" bitfld.long 0x24 12.--14. "SLV_IMP_CTRL_DL3,Impedance control for data lane3" "0,1,2,3,4,5,6,7" bitfld.long 0x24 8.--10. "SLV_IMP_CTRL_DL2,Impedance control for data lane0" "0,1,2,3,4,5,6,7" newline bitfld.long 0x24 4.--6. "SLV_IMP_CTRL_DL1,Impedance control for data lane1" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0.--2. "SLV_IMP_CTRL_DL0,Impedance control for data lane0" "0,1,2,3,4,5,6,7" line.long 0x28 "LVDS_PSMBCCR,LVDS PHY-Slave monitor bandgap current control register" hexmask.long.word 0x28 16.--24. 1. "SLV_MON_BG_CURR_UNMASK_TUNE,Bandgap current timing control for the monitor unmask after startup" bitfld.long 0x28 4. "SLV_MON_BG_CURR_CLEAR_FAULT,Bandgap current monitor clear fault" "0,1" bitfld.long 0x28 0. "SLV_MON_BG_CURR_FORCE_FAULT,Bandgap current monitor force fault" "0,1" rgroup.long 0x1148++0x3 line.long 0x0 "LVDS_PSMBCSR,LVDS PHY-Slave monitor bandgap current status register" bitfld.long 0x0 4. "SLV_MON_BG_CURR_FAULT,Bandgap current monitor fault" "0,1" bitfld.long 0x0 0. "SLV_MON_BG_CURR_PERMANENT_FAULT,Bandgap current monitor permanent fault" "0,1" group.long 0x114C++0x3 line.long 0x0 "LVDS_PSMBLCR,LVDS PHY-Slave monitor bandgap loop control register" hexmask.long.word 0x0 16.--24. 1. "SLV_MON_BG_LOOP_UNMASK_TUNE,Bandgap loop timing control for the monitor unmask after startup" bitfld.long 0x0 4. "SLV_MON_BG_LOOP_CLEAR_FAULT,Bandgap loop monitor clear fault" "0,1" bitfld.long 0x0 0. "SLV_MON_BG_LOOP_FORCE_FAULT,Bandgap loop monitor force fault" "0,1" rgroup.long 0x1150++0x3 line.long 0x0 "LVDS_PSMBLSR,LVDS PHY-Slave monitor bandgap loop status register" bitfld.long 0x0 4. "SLV_MON_BG_LOOP_FAULT,Bandgap loop monitor fault" "0,1" bitfld.long 0x0 0. "SLV_MON_BG_LOOP_PERMANENT_FAULT,Bandgap loop monitor permanent fault" "0,1" group.long 0x1154++0x3 line.long 0x0 "LVDS_PSMBOVCR,LVDS PHY-Slave monitor bandgap output voltage control register" hexmask.long.word 0x0 16.--24. 1. "SLV_MON_BG_VOLT_UNMASK_TUNE,Bandgap output voltage timing control for the monitor unmask after startup" bitfld.long 0x0 4. "SLV_MON_BG_VOLT_CLEAR_FAULT,Bandgap output voltage monitor clear fault" "0,1" bitfld.long 0x0 0. "SLV_MON_BG_VOLT_FORCE_FAULT,Bandgap output voltage monitor force fault" "0,1" rgroup.long 0x1158++0x3 line.long 0x0 "LVDS_PSMBOVSR,LVDS PHY-Slave monitor bandgap output voltage status register" bitfld.long 0x0 4. "SLV_MON_BG_VOLT_FAULT,Bandgap output voltage monitor fault" "0,1" bitfld.long 0x0 0. "SLV_MON_BG_VOLT_PERMANENT_FAULT,Bandgap output voltage monitor permanent fault" "0,1" group.long 0x1174++0x3 line.long 0x0 "LVDS_PSMSCCR,LVDS PHY-Slave monitor serializer clock control register" bitfld.long 0x0 4. "SLV_SER_CLK_CLEAR_FAULT,Serializer clock checking fault clearing" "0,1" bitfld.long 0x0 0. "SLV_SER_CLK_ERROR_INJ,Serializer clock checking error injection" "0,1" rgroup.long 0x1178++0x3 line.long 0x0 "LVDS_PSMSCSR,LVDS PHY-Slave monitor serializer clock status register" bitfld.long 0x0 0. "SLV_SER_CLK_FAULT,Serializer clock checking fault" "0,1" group.long 0x117C++0x3 line.long 0x0 "LVDS_PSMSCR,LVDS PHY-Slave monitor serializer control register" hexmask.long.byte 0x0 16.--20. 1. "SLV_SER_LPBCK,Serializer fault loopback" hexmask.long.byte 0x0 8.--12. 1. "SLV_SER_FAULT_CLEAR,Serializer fault clearing" hexmask.long.byte 0x0 0.--4. 1. "SLV_SER_ERROR_INJ,Serializer error injection" rgroup.long 0x1180++0x3 line.long 0x0 "LVDS_PSMSSR,LVDS PHY-Slave monitor serializer status register" hexmask.long.byte 0x0 0.--4. 1. "SLV_SER_FAULT,Serializer fault" group.long 0x1184++0x3 line.long 0x0 "LVDS_PSDCR,LVDS PHY-Slave debug control register" bitfld.long 0x0 12. "SLV_POWER_OK,When set to 1 this bit masks some functions in the LVDS-PHY. This bit can be used as a work around to functional problems with some of the monitor blocks" "0,1" bitfld.long 0x0 0. "SLV_FORCE_ANALOG_OK,When set to 1 this bit masks some functions in the LVDS-PHY. This bit can be used as a work around to functional problems with some of the monitor blocks" "0,1" rgroup.long 0x1188++0x7 line.long 0x0 "LVDS_PSSSR1,LVDS PHY-Slave spare status register 1" hexmask.long.byte 0x0 24.--31. 1. "SLV_DRV_A3_SPARE_RD,Spare outputs for data lane3" hexmask.long.byte 0x0 16.--23. 1. "SLV_DRV_A2_SPARE_RD,Spare outputs for data lane2" hexmask.long.byte 0x0 8.--15. 1. "SLV_DRV_A1_SPARE_RD,Spare outputs for data lane1" newline hexmask.long.byte 0x0 0.--7. 1. "SLV_DRV_A0_SPARE_RD,Spare outputs for data lane0" line.long 0x4 "LVDS_PSSSR2,LVDS PHY-Slave spare status register 2" hexmask.long.byte 0x4 0.--7. 1. "SLV_DRV_A4_SPARE_RD,Spare outputs for data lane4" group.long 0x11A0++0x3 line.long 0x0 "LVDS_PSCFGCR,LVDS PHY-Slave configuration control register" hexmask.long.byte 0x0 0.--4. 1. "SLV_EN_DIG_DL,Enables Digital DataLanes DL4...DL0" group.long 0x11C0++0x7 line.long 0x0 "LVDS_PSPLLCR1,LVDS PHY-Slave PLL_MODE 1 control register" rbitfld.long 0x0 12. "SLV_PLL_BYPASS_START_DECT,Bypass start DECT." "0,1" bitfld.long 0x0 8. "SLV_PLL_DIVIDERS_ENABLE,0x0: Dividers disabled" "?,B_0x1" bitfld.long 0x0 4. "SLV_PLL_BYPASS,0x0: from VCO output" "?,B_0x1" newline bitfld.long 0x0 2. "SLV_PLL_TWG_ENABLE,Triangular wave pattern used to modulate MDIV" "B_0x0,B_0x1" bitfld.long 0x0 1. "SLV_PLL_SD_ENABLE,sigma-delta enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SLV_PLL_ENABLE,0x0: LVDS-PHY PLL Disable" "?,B_0x1" line.long 0x4 "LVDS_WCLKCR,LVDS wrapper clock control register" bitfld.long 0x4 8. "SRCSEL,Source Selection for the Pixel Clock between master and slave PHY:" "B_0x0,B_0x1" bitfld.long 0x4 0. "SLV_CLKPIX_SEL,Pixel clock selection:" "B_0x0,B_0x1" group.long 0x11C4++0x3 line.long 0x0 "LVDS_PSPLLCR2,LVDS PHY-Slave PLL_MODE 2 control register" hexmask.long.word 0x0 16.--25. 1. "SLV_PLL_INPUT_DIV,PLL Input Clock Divider (NDIV divides input reference clock)" hexmask.long.word 0x0 0.--9. 1. "SLV_PLL_BIT_DIV,PLL Output Clock Divider (BDIV divides output VCO)" rgroup.long 0x11C8++0x3 line.long 0x0 "LVDS_PSPLLSR,LVDS PHY-Slave PLL status register" bitfld.long 0x0 0. "SLV_PLL_LOCK,PLL lock During a certain number of cycles of reference clock pll_lock is asserted high and then goes low waiting for the LVDS-PHY PLL t0 lock" "0,1" group.long 0x11CC++0x1F line.long 0x0 "LVDS_PSPLLSDCR1,LVDS PHY-Slave PLL_SD_1 control register" hexmask.long.word 0x0 0.--9. 1. "SLV_PLL_SD_INT_RATIO,Integer" line.long 0x4 "LVDS_PSPLLSDCR2,LVDS PHY-Slave PLL_SD_2 control register" bitfld.long 0x4 28. "SLV_PLL_SD_CLK_EDGE_CNTRL,Sigma--delta edge control." "0,1" rbitfld.long 0x4 26. "SLV_PLL_SD_BYPASS_FB_CLK,Bypass start SD feedback clock." "0,1" bitfld.long 0x4 24.--25. "SLV_PLL_SD_BYPASS_VCO_MUX,Bypass control for the PLL sigma delta VCO mux" "0,1,2,3" newline hexmask.long.tbyte 0x4 0.--22. 1. "SLV_PLL_SD_INPUT_CODE_BYPASS,Fractional Setting of PLL feedback clock Divider (MDIV divides VCO clock for feedback)" line.long 0x8 "LVDS_PSPLLTWGCR1,LVDS PHY-Slave PLL_TWG_1 control register" bitfld.long 0x8 20. "SLV_PLL_TWG_DOWN_SPREAD,TWG pattern spreading" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--19. 1. "SLV_PLL_TWG_STEP,MDIV divdier used in integer N and Fractional N PLL modes" line.long 0xC "LVDS_PSPLLTWGCR2,LVDS PHY-Slave PLL_TWG_2 control register" hexmask.long.tbyte 0xC 0.--22. 1. "SLV_PLL_TWG_THRESHOLD,TWG_THRESHOLD setting" line.long 0x10 "LVDS_PSPLLLDOCR,LVDS PHY-Slave PLL_LDO control register" bitfld.long 0x10 0.--2. "SLV_PLL_LDO_FRREGVTRIM,PLL LDO output voltage fine tuning:" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x14 "LVDS_PSPLLCPCR,LVDS PHY-Slave PLL_CP control register" hexmask.long.byte 0x14 0.--3. 1. "SLV_PLL_CPCTRL,PLL charge pump control default=1." line.long 0x18 "LVDS_PSPLLCFGCR,LVDS PHY-Slave PLL_CFG control register" hexmask.long.byte 0x18 0.--7. 1. "SLV_PLL_CFG,PLL configuration" line.long 0x1C "LVDS_PSPLLTESTCR,LVDS PHY-Slave PLL_TEST control register" hexmask.long.word 0x1C 16.--25. 1. "SLV_PLL_TEST_DIV_SETTINGS,lvds_pll_test_clk dividers value" bitfld.long 0x1C 8. "SLV_PLL_TEST_DIV_EN,lvds_pll_test_clk dividers enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "SLV_PLL_TEST_CLK_EN,lvds_pll_test_clk enable" "B_0x0,B_0x1" group.long 0x1200++0xF line.long 0x0 "LVDS_PMATCR1,LVDS PHY-Master analog test control register 1" hexmask.long.byte 0x0 24.--31. 1. "PMATDL3,PHY-Master analog test data lane 3" hexmask.long.byte 0x0 16.--23. 1. "PMATDL2,PHY-Master analog test data lane 2" hexmask.long.byte 0x0 8.--15. 1. "PMATDL1,PHY-Master analog test data lane 1" newline hexmask.long.byte 0x0 0.--7. 1. "PMATDL0,PHY-Master analog test data lane 0" line.long 0x4 "LVDS_PMATCR2,LVDS PHY-Master analog test control register 2" hexmask.long.byte 0x4 16.--22. 1. "PMATPC,Phy-Master analog test PLL control" hexmask.long.byte 0x4 8.--15. 1. "PMATB,Phy-Master analog test bias" hexmask.long.byte 0x4 0.--7. 1. "PMATDL4,PHY-Master analog test data lane 4" line.long 0x8 "LVDS_PMDTCR1,LVDS PHY-Master digital test control register 1" hexmask.long.byte 0x8 24.--31. 1. "PMDTDL3,PHY-Master digital test data lane 3" hexmask.long.byte 0x8 16.--23. 1. "PMDTDL2,PHY-Master digital test data lane 2" hexmask.long.byte 0x8 8.--15. 1. "PMDTDL1,PHY-Master digital test data lane 1" newline hexmask.long.byte 0x8 0.--7. 1. "PMDTDL0,PHY-Master digital test data lane 0" line.long 0xC "LVDS_PMDTCR2,LVDS PHY-Master digital test control register 2" hexmask.long.byte 0xC 8.--14. 1. "PMDTMC,Phy-Master digital test mux control" hexmask.long.byte 0xC 0.--7. 1. "PMDTDL4,PHY-Master digital test data lane 4" rgroup.long 0x1210++0x3 line.long 0x0 "LVDS_PMDTSR,LVDS PHY-Master digital test status register" bitfld.long 0x0 5. "PMDTPS,Phy-Master digital test PLL status" "0,1" bitfld.long 0x0 4. "PMDTDLS4,Phy-Master digital test data lane status 4" "0,1" bitfld.long 0x0 3. "PMDTDLS3,Phy-Masterdigital test data lane status 3" "0,1" newline bitfld.long 0x0 2. "PMDTDLS2,Phy-Master digital test data lane status 2" "0,1" bitfld.long 0x0 1. "PMDTDLS1,Phy-Master digital test data lane status 1" "0,1" bitfld.long 0x0 0. "PMDTDLS0,Phy-Master digital test data lane status 0" "0,1" group.long 0x1220++0x13 line.long 0x0 "LVDS_PSATCR1,LVDS PHY-Slave analog test control register 1" hexmask.long.byte 0x0 24.--31. 1. "PSATDL3,PHY Slave analog test data lane 3" hexmask.long.byte 0x0 16.--23. 1. "PSATDL2,PHY-Slave analog test data lane 2" hexmask.long.byte 0x0 8.--15. 1. "PSATDL1,PHY-Slave analog test data lane 1" newline hexmask.long.byte 0x0 0.--7. 1. "PSATDL0,PHY-Slave analog test data lane 4" line.long 0x4 "LVDS_PSATCR2,LVDS PHY-Slave analog test control register 2" hexmask.long.byte 0x4 16.--22. 1. "PSATPC,Phy-Slave analog test PLL control" hexmask.long.byte 0x4 8.--15. 1. "PSATB,Phy-Slave analog test bias" hexmask.long.byte 0x4 0.--7. 1. "PSATDL4,PHY-Slave analog test data lane 4" line.long 0x8 "LVDS_PSDTCR1,LVDS PHY-Slave digital test control register 1" hexmask.long.byte 0x8 24.--31. 1. "PSDTDL3,PHY-Slave digital test data lane 3" hexmask.long.byte 0x8 16.--23. 1. "PSDTDL2,PHY-Slave digital test data lane 2" hexmask.long.byte 0x8 8.--15. 1. "PSDTDL1,PHY-Slave digital test data lane 1" newline hexmask.long.byte 0x8 0.--7. 1. "PSDTDL0,PHY-Slave digital test data lane 0" line.long 0xC "LVDS_PSDTCR2,LVDS PHY-Slave digital test control register 2" hexmask.long.byte 0xC 8.--14. 1. "PSDTMC,PHY-Slave digital test" hexmask.long.byte 0xC 0.--7. 1. "PSDTDL4,PHY-Slave digital test data lane 4" line.long 0x10 "LVDS_PSDTSR,LVDS PHY-Slave digital test status register" bitfld.long 0x10 5. "PSDTPS,Phy-Slave digital test PLL status" "0,1" bitfld.long 0x10 4. "PSDTDLS4,Phy-Slave digital test data lane status 4" "0,1" bitfld.long 0x10 3. "PSDTDLS3,Phy-Slave digital test data lane status 3" "0,1" newline bitfld.long 0x10 2. "PSDTDLS2,Phy-Slave digital test data lane status 2" "0,1" bitfld.long 0x10 1. "PSDTDLS1,Phy-Slave digital test data lane status 1" "0,1" bitfld.long 0x10 0. "PSDTDLS0,Phy-Slave digital test data lane status 0" "0,1" rgroup.long 0x1FF0++0xF line.long 0x0 "LVDS_HWCFGR,LVDS hardware configuration register" hexmask.long.byte 0x0 8.--11. 1. "LINKS,amount of LVDS PHY links" hexmask.long.byte 0x0 4.--7. 1. "LANES,amount of LVDS PHY Lanes (including the LVDS PHY clock lane) in one link" hexmask.long.byte 0x0 0.--3. 1. "TECHNO,PHY technology (and version)" line.long 0x4 "LVDS_VERR,LVDS version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,LVDS PHY host major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,LVDS PHY host minor revision" line.long 0x8 "LVDS_IPIDR,LVDS identification register" hexmask.long 0x8 0.--31. 1. "IDR,LVDS PHY host identification (0x0016_00A1)" line.long 0xC "LVDS_SIDR,LVDS size register" hexmask.long 0xC 0.--31. 1. "SID,LVDS PHY host address space: 8 Kbytes (4 K for host 4 K for PHY/Wrapper)" tree.end tree "LVDS_S" base ad:0x58060000 group.long 0x0++0x33 line.long 0x0 "LVDS_CR,LVDS configuration register" hexmask.long.byte 0x0 21.--25. 1. "LK2POL,Link-2 output polarity defined per output data/clock lane from Lane-[4:0]" hexmask.long.byte 0x0 16.--20. 1. "LK1POL,Link-1 output polarity defined per output data/clock lane from Lane-[4:0]" bitfld.long 0x0 6. "LKPHA,Link phase for both links" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "LKMOD,Link mode for both links which impacts the clock used" "B_0x0,B_0x1" bitfld.long 0x0 4. "CI,Control internal (software controlled bit that can be inserted among output data)" "B_0x0,B_0x1" bitfld.long 0x0 3. "DEPOL,Data enable polarity" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "VSPOL,Vertical synchronization polarity" "B_0x0,B_0x1" bitfld.long 0x0 1. "HSPOL,Horizontal synchronization polarity" "B_0x0,B_0x1" bitfld.long 0x0 0. "LVDSEN,LVDS PHY enable" "B_0x0,B_0x1" line.long 0x4 "LVDS_DMLCR0,LVDS data mapping LSB configuration register 0" hexmask.long.byte 0x4 15.--19. 1. "MAP3,Mapping for bit 3 of that data lane" hexmask.long.byte 0x4 10.--14. 1. "MAP2,Mapping for bit 2 of that data lane" hexmask.long.byte 0x4 5.--9. 1. "MAP1,Mapping for bit 1 of that data lane" newline hexmask.long.byte 0x4 0.--4. 1. "MAP0,Mapping for bit 0 of that data lane" line.long 0x8 "LVDS_DMMCR0,LVDS data mapping MSB configuration register 0" hexmask.long.byte 0x8 10.--14. 1. "MAP6,Mapping for bit 6 of that data lane" hexmask.long.byte 0x8 5.--9. 1. "MAP5,Mapping for bit 5 of that data lane" hexmask.long.byte 0x8 0.--4. 1. "MAP4,Mapping for bit 4 of that data lane" line.long 0xC "LVDS_DMLCR1,LVDS data mapping LSB configuration register 1" hexmask.long.byte 0xC 15.--19. 1. "MAP3,Mapping for bit 3 of that data lane" hexmask.long.byte 0xC 10.--14. 1. "MAP2,Mapping for bit 2 of that data lane" hexmask.long.byte 0xC 5.--9. 1. "MAP1,Mapping for bit 1 of that data lane" newline hexmask.long.byte 0xC 0.--4. 1. "MAP0,Mapping for bit 0 of that data lane" line.long 0x10 "LVDS_DMMCR1,LVDS data mapping MSB configuration register 1" hexmask.long.byte 0x10 10.--14. 1. "MAP6,Mapping for bit 6 of that data lane" hexmask.long.byte 0x10 5.--9. 1. "MAP5,Mapping for bit 5 of that data lane" hexmask.long.byte 0x10 0.--4. 1. "MAP4,Mapping for bit 4 of that data lane" line.long 0x14 "LVDS_DMLCR2,LVDS data mapping LSB configuration register 2" hexmask.long.byte 0x14 15.--19. 1. "MAP3,Mapping for bit 3 of that DataLane." hexmask.long.byte 0x14 10.--14. 1. "MAP2,Mapping for bit 2 of that DataLane." hexmask.long.byte 0x14 5.--9. 1. "MAP1,Mapping for bit 1 of that DataLane." newline hexmask.long.byte 0x14 0.--4. 1. "MAP0,Mapping for bit 0 of that DataLane." line.long 0x18 "LVDS_DMMCR2,LVDS data mapping MSB configuration register 2" hexmask.long.byte 0x18 10.--14. 1. "MAP6,Mapping for bit 6 of that DataLane." hexmask.long.byte 0x18 5.--9. 1. "MAP5,Mapping for bit 5 of that DataLane." hexmask.long.byte 0x18 0.--4. 1. "MAP4,Mapping for bit 4 of that DataLane." line.long 0x1C "LVDS_DMLCR3,LVDS data mapping LSB configuration register 3" hexmask.long.byte 0x1C 15.--19. 1. "MAP3,Mapping for bit 3 of that DataLane." hexmask.long.byte 0x1C 10.--14. 1. "MAP2,Mapping for bit 2 of that DataLane." hexmask.long.byte 0x1C 5.--9. 1. "MAP1,Mapping for bit 1 of that DataLane." newline hexmask.long.byte 0x1C 0.--4. 1. "MAP0,Mapping for bit 0 of that DataLane." line.long 0x20 "LVDS_DMMCR3,LVDS data mapping MSB configuration register 3" hexmask.long.byte 0x20 10.--14. 1. "MAP6,Mapping for bit 6 of that DataLane." hexmask.long.byte 0x20 5.--9. 1. "MAP5,Mapping for bit 5 of that DataLane." hexmask.long.byte 0x20 0.--4. 1. "MAP4,Mapping for bit 4 of that DataLane." line.long 0x24 "LVDS_DMLCR4,LVDS data mapping LSB configuration register 4" hexmask.long.byte 0x24 15.--19. 1. "MAP3,Mapping for bit 3 of that DataLane." hexmask.long.byte 0x24 10.--14. 1. "MAP2,Mapping for bit 2 of that DataLane." hexmask.long.byte 0x24 5.--9. 1. "MAP1,Mapping for bit 1 of that DataLane." newline hexmask.long.byte 0x24 0.--4. 1. "MAP0,Mapping for bit 0 of that DataLane." line.long 0x28 "LVDS_DMMCR4,LVDS data mapping MSB configuration register 4" hexmask.long.byte 0x28 10.--14. 1. "MAP6,Mapping for bit 6 of that DataLane." hexmask.long.byte 0x28 5.--9. 1. "MAP5,Mapping for bit 5 of that DataLane." hexmask.long.byte 0x28 0.--4. 1. "MAP4,Mapping for bit 4 of that DataLane." line.long 0x2C "LVDS_CDL1CR,LVDS channel distribution link 1configuration register" hexmask.long.byte 0x2C 16.--19. 1. "DISTR4,channel distribution for Lane 4" hexmask.long.byte 0x2C 12.--15. 1. "DISTR3,channel distribution for Lane 3" hexmask.long.byte 0x2C 8.--11. 1. "DISTR2,channel distribution for Lane 2" newline hexmask.long.byte 0x2C 4.--7. 1. "DISTR1,channel distribution for Lane 1" hexmask.long.byte 0x2C 0.--3. 1. "DISTR0,channel distribution for Lane 0" line.long 0x30 "LVDS_CDL2CR,LVDS channel distribution link 2 configuration register" bitfld.long 0x30 24.--25. "PRBS,PRBS polynomial type" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x30 16.--19. 1. "DISTR4,channel distribution for Lane 4" hexmask.long.byte 0x30 12.--15. 1. "DISTR3,channel distribution for Lane 3" newline hexmask.long.byte 0x30 8.--11. 1. "DISTR2,channel distribution for Lane 2" hexmask.long.byte 0x30 4.--7. 1. "DISTR1,channel distribution for Lane 1" hexmask.long.byte 0x30 0.--3. 1. "DISTR0,channel distribution for Lane 0" group.long 0x1000++0x17 line.long 0x0 "LVDS_PMGCR,LVDS PHY-Master global control register" bitfld.long 0x0 25. "MST_DIVIDERS_RSTN,Output divider reset" "B_0x0,B_0x1" bitfld.long 0x0 24. "MST_RSTZ,When set to 0 this bit places the LVDS-PHY digital section in reset state." "0,1" bitfld.long 0x0 8. "MST_DP_CLK_OUT_ENABLE,Enable LVDS-PHY dp_clk clock" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "MST_LS_CLK_OUT_ENABLE,Enable LVDS-PHY ls_clk clock" "B_0x0,B_0x1" bitfld.long 0x0 0. "MST_BIT_CLK_OUT_ENABLE,Enable LVDS-PHY bit_clk clock" "B_0x0,B_0x1" line.long 0x4 "LVDS_PMPEACR,LVDS PHY-Master pre-emphasis amplitude control register" hexmask.long.byte 0x4 16.--19. 1. "MST_PRE_EMPH_AMP_DL4,Amplitude control for pre-emphasis for lane4" hexmask.long.byte 0x4 12.--15. 1. "MST_PRE_EMPH_AMP_DL3,Amplitude control for pre-emphasis for lane3" hexmask.long.byte 0x4 8.--11. 1. "MST_PRE_EMPH_AMP_DL2,Amplitude control for pre-emphasis for lane2" newline hexmask.long.byte 0x4 4.--7. 1. "MST_PRE_EMPH_AMP_DL1,Amplitude control for pre-emphasis for lane1" hexmask.long.byte 0x4 0.--3. 1. "MST_PRE_EMPH_AMP_DL0,Amplitude control for pre-mphasis for lane0" line.long 0x8 "LVDS_PMPETCR,LVDS PHY-Master pre-emphasis time control register" bitfld.long 0x8 16.--17. "MST_PRE_EMPH_TIME_DL4,Time duration control for pre-emphasis for lane4" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 12.--13. "MST_PRE_EMPH_TIME_DL3,Time duration control for pre-emphasis for lane3" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 8.--9. "MST_PRE_EMPH_TIME_DL2,Time duration control for pre-emphasis for lane2" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 4.--5. "MST_PRE_EMPH_TIME_DL1,Time duration control for pre-emphasis for lane1" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 0.--1. "MST_PRE_EMPH_TIME_DL0,Time duration control for pre-emphasis for lane0" "B_0x0,B_0x1,B_0x2,?" line.long 0xC "LVDS_PMCMCR1,LVDS PHY-Master current mode control register 1" bitfld.long 0xC 30. "MST_CM_USE_VM_VMID_DL3,common mode of datalane3" "0,1" bitfld.long 0xC 29. "MST_CM_USE_VDD_REF_DL3,common mode of data lane3" "0,1" bitfld.long 0xC 28. "MST_CM_EN_DL3,Enable for current mode driver data lane3" "0,1" newline hexmask.long.byte 0xC 24.--27. 1. "MST_CM_AMP_CTRL_DL3,Amplitude control for current mode driver data lane3" bitfld.long 0xC 22. "MST_CM_USE_VM_VMID_DL2,common mode of data lane2" "0,1" bitfld.long 0xC 21. "MST_CM_USE_VDD_REF_DL2,common mode of data lane2" "0,1" newline bitfld.long 0xC 20. "MST_CM_EN_DL2,Enable for current mode driver data lane2" "0,1" hexmask.long.byte 0xC 16.--19. 1. "MST_CM_AMP_CTRL_DL2,Amplitude control for current mode driver data lane2" bitfld.long 0xC 14. "MST_CM_USE_VM_VMID_DL1,common mode of data lane1" "0,1" newline bitfld.long 0xC 13. "MST_CM_USE_VDD_REF_DL1,common mode of data lane1" "0,1" bitfld.long 0xC 12. "MST_CM_EN_DL1,Enable for current mode driver data lane1" "0,1" hexmask.long.byte 0xC 8.--11. 1. "MST_CM_AMP_CTRL_DL1,Amplitude control for current mode driver data lane1" newline bitfld.long 0xC 6. "MST_CM_USE_VM_VMID_DL0,common mode of data lane0" "0,1" bitfld.long 0xC 5. "MST_CM_USE_VDD_REF_DL0,common mode of datalane0" "0,1" bitfld.long 0xC 4. "MST_CM_EN_DL0,Enable for current mode driver data lane0" "0,1" newline hexmask.long.byte 0xC 0.--3. 1. "MST_CM_AMP_CTRL_DL0,Amplitude control for current mode driver data lane0" line.long 0x10 "LVDS_PMCMCR2,LVDS PHY-Master current mode control register 2" bitfld.long 0x10 16. "MST_AC_COUPLING_MODE,AC Coupling Mode." "0,1" bitfld.long 0x10 6. "MST_CM_USE_VM_VMID_DL4,common mode of data lane4" "0,1" bitfld.long 0x10 5. "MST_CM_USE_VDD_REF_DL4,common mode of data lane4" "0,1" newline bitfld.long 0x10 4. "MST_CM_EN_DL4,Enable for current mode driver data lane4" "0,1" hexmask.long.byte 0x10 0.--3. 1. "MST_CM_AMP_CTRL_DL4,Amplitude control for current mode driver data lane4" line.long 0x14 "LVDS_PMRLPCR,LVDS PHY-Master Rx loopback control register" bitfld.long 0x14 28. "MST_EN_LOOP_BACK_DL4,Enable the loop back RX used for continuous monitoring datalane4" "0,1" bitfld.long 0x14 27. "MST_EN_LOOP_BACK_DL3,Enable the loop back RX used for continuous monitoring datalane3" "0,1" bitfld.long 0x14 26. "MST_EN_LOOP_BACK_DL2,Enable the loop back RX used for continuous monitoring datalane2" "0,1" newline bitfld.long 0x14 25. "MST_EN_LOOP_BACK_DL1,Enable the loop back RX used for continuous monitoring datalane1" "0,1" bitfld.long 0x14 24. "MST_EN_LOOP_BACK_DL0,Enable the loop back RX used for continuous monitoring datalane0" "0,1" hexmask.long.byte 0x14 16.--19. 1. "MST_RX_LOOP_BACK_CFG_DL4,Rx loop back configuration for data lane4" newline hexmask.long.byte 0x14 12.--15. 1. "MST_RX_LOOP_BACK_CFG_DL3,Rx loop back configuration for data lane3" hexmask.long.byte 0x14 8.--11. 1. "MST_RX_LOOP_BACK_CFG_DL2,Rx loop back configuration for data lane2" hexmask.long.byte 0x14 4.--7. 1. "MST_RX_LOOP_BACK_CFG_DL1,Rx loop back configuration for data lane1" newline hexmask.long.byte 0x14 0.--3. 1. "MST_RX_LOOP_BACK_CFG_DL0,Rx loop back configuration for data lane0" rgroup.long 0x1018++0x3 line.long 0x0 "LVDS_PMRLPSR,LVDS PHY-master Rx loopback status register" bitfld.long 0x0 16. "MST_RX_LOOP_BACK_A_DL4,Rx loop back output for lane4" "0,1" bitfld.long 0x0 12. "MST_RX_LOOP_BACK_A_DL3,Rx loop back output for lane3" "0,1" bitfld.long 0x0 8. "MST_RX_LOOP_BACK_A_DL2,Rx loop back output for lane2" "0,1" newline bitfld.long 0x0 4. "MST_RX_LOOP_BACK_A_DL1,Rx loop back output for lane1" "0,1" bitfld.long 0x0 0. "MST_RX_LOOP_BACK_A_DL0,Rx loop back output for lane0" "0,1" group.long 0x101C++0x2B line.long 0x0 "LVDS_PMFCR,LVDS PHY-Master flipedge control register" bitfld.long 0x0 20. "MST_FLIP_CLK_EDGE_DL4,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane4" "0,1" bitfld.long 0x0 19. "MST_FLIP_CLK_EDGE_DL3,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane3" "0,1" bitfld.long 0x0 18. "MST_FLIP_CLK_EDGE_DL2,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane2" "0,1" newline bitfld.long 0x0 17. "MST_FLIP_CLK_EDGE_DL1,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane1" "0,1" bitfld.long 0x0 16. "MST_FLIP_CLK_EDGE_DL0,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane0" "0,1" bitfld.long 0x0 4. "MST_FLIP_CLK_EDGE_ANA_DL4,Flips the clock edge used by the pre-driver data lane4" "0,1" newline bitfld.long 0x0 3. "MST_FLIP_CLK_EDGE_ANA_DL3,Flips the clock edge used by the pre-driver data lane3" "0,1" bitfld.long 0x0 2. "MST_FLIP_CLK_EDGE_ANA_DL2,Flips the clock edge used by the pre-driver data lane2" "0,1" bitfld.long 0x0 1. "MST_FLIP_CLK_EDGE_ANA_DL1,Flips the clock edge used by the pre-driver data lane1" "0,1" newline bitfld.long 0x0 0. "MST_FLIP_CLK_EDGE_ANA_DL0,Flips the clock edge used by the pre-driver data lane0" "0,1" line.long 0x4 "LVDS_PMSCR,LVDS PHY-Master serial control register" bitfld.long 0x4 16. "MST_SER_DATA_OK,Indicates transmission of data" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "MST_SER_SWAP_DPDN,Inverts output data (1 bit per lane" line.long 0x8 "LVDS_PMSCR1,LVDS PHY-Master spare control register 1" hexmask.long.byte 0x8 24.--31. 1. "MST_DRV_A3_SPARE,Spare inputs for data lane3" hexmask.long.byte 0x8 16.--23. 1. "MST_DRV_A2_SPARE,Spare inputs for data lane2" hexmask.long.byte 0x8 8.--15. 1. "MST_DRV_A1_SPARE,Spare inputs for data lane1" newline hexmask.long.byte 0x8 0.--7. 1. "MST_DRV_A0_SPARE,Spare inputs for data lane0" line.long 0xC "LVDS_PMSCR2,LVDS PHY-Master spare control register 2" hexmask.long.byte 0xC 0.--7. 1. "MST_DRV_A4_SPARE,Spare inputs for data lane4" line.long 0x10 "LVDS_PMBCR1,LVDS PHY-Master bias control register 1" bitfld.long 0x10 16. "MST_EN_BIAS_DL4,Enable the local bias at data lane4" "B_0x0,B_0x1" bitfld.long 0x10 12. "MST_EN_BIAS_DL3,Enable the local bias at data lane3" "B_0x0,B_0x1" bitfld.long 0x10 8. "MST_EN_BIAS_DL2,Enable the local bias at data lane2" "B_0x0,B_0x1" newline bitfld.long 0x10 4. "MST_EN_BIAS_DL1,Enable the local bias at data lane1" "B_0x0,B_0x1" bitfld.long 0x10 0. "MST_EN_BIAS_DL0,Enable the local bias at data lane0" "B_0x0,B_0x1" line.long 0x14 "LVDS_PMBCR2,LVDS PHY-Master bias control register 2" bitfld.long 0x14 29. "MST_BIAS_VREF_SEL,Selection for current generation internal reference" "B_0x0,B_0x1" bitfld.long 0x14 28. "MST_BIAS_EN,LVDS macro global bias enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "MST_BIAS_VREFTRIM,None" newline hexmask.long.word 0x14 0.--14. 1. "MST_BIAS_TRIM,0x0: 27.71 uA" line.long 0x18 "LVDS_PMBCR3,LVDS PHY-Master bias control register 3" bitfld.long 0x18 18. "MST_VM_USE_VDD_REF_DL4,Sets the voltage mode driver to use a reference derived from the power supply data lane4" "0,1" bitfld.long 0x18 17. "MST_VM_BOOST_BIAS_DL4,Bias booster for the voltage mode driver LDOS data lane4" "B_0x0,B_0x1" bitfld.long 0x18 16. "MST_VM_EN_DL4,Enable the voltage mode driver for data lane4" "B_0x0,B_0x1" newline bitfld.long 0x18 14. "MST_VM_USE_VDD_REF_DL3,Sets the voltage mode driver to use a reference derived from the power supply data lane3" "0,1" bitfld.long 0x18 13. "MST_VM_BOOST_BIAS_DL3,Bias booster for the voltage mode driver LDOS data lane3" "B_0x0,B_0x1" bitfld.long 0x18 12. "MST_VM_EN_DL3,Enable the voltage mode driver for data lane3" "B_0x0,B_0x1" newline bitfld.long 0x18 10. "MST_VM_USE_VDD_REF_DL2,Sets the voltage mode driver to use a reference derived from the power supply data lane2" "0,1" bitfld.long 0x18 9. "MST_VM_BOOST_BIAS_DL2,Bias booster for the voltage mode driver LDOS data lane2" "B_0x0,B_0x1" bitfld.long 0x18 8. "MST_VM_EN_DL2,Enable the voltage mode driver for data lane2" "B_0x0,B_0x1" newline bitfld.long 0x18 6. "MST_VM_USE_VDD_REF_DL1,Sets the voltage mode driver to use a reference derived from the power supply data lane1" "0,1" bitfld.long 0x18 5. "MST_VM_BOOST_BIAS_DL1,Bias booster for the voltage mode driver LDOS data lane1" "B_0x0,B_0x1" bitfld.long 0x18 4. "MST_VM_EN_DL1,Enable the voltage mode driver for data lane1" "B_0x0,B_0x1" newline bitfld.long 0x18 2. "MST_VM_USE_VDD_REF_DL0,Sets the voltage mode driver to use a reference derived from the power supply data lane0" "0,1" bitfld.long 0x18 1. "MST_VM_BOOST_BIAS_DL0,Bias booster for the voltage mode driver LDOS data lane0" "B_0x0,B_0x1" bitfld.long 0x18 0. "MST_VM_EN_DL0,Enable the voltage mode driver for data lane0" "B_0x0,B_0x1" line.long 0x1C "LVDS_PMBCR4,LVDS PHY-Master bias control register 4" hexmask.long.byte 0x1C 16.--19. 1. "MST_VM_VOUT_VOH_CTRL_DL4,Fine tuning for the voltage mode driver VOH datalane4" hexmask.long.byte 0x1C 12.--15. 1. "MST_VM_VOUT_VOH_CTRL_DL3,Fine tuning for the voltage mode driver VOH datalane3" hexmask.long.byte 0x1C 8.--11. 1. "MST_VM_VOUT_VOH_CTRL_DL2,Fine tuning for the voltage mode driver VOH datalane2" newline hexmask.long.byte 0x1C 4.--7. 1. "MST_VM_VOUT_VOH_CTRL_DL1,Fine tuning for the voltage mode driver VOH datalane1" hexmask.long.byte 0x1C 0.--3. 1. "MST_VM_VOUT_VOH_CTRL_DL0,Fine tuning for the voltage mode driver VOH datalane0" line.long 0x20 "LVDS_PMBCR5,LVDS PHY-Master bias control register 5" hexmask.long.byte 0x20 16.--19. 1. "MST_VM_VOUT_VOL_CTRL_DL4,Fine tuning for the voltage mode driver VOL datalane4" hexmask.long.byte 0x20 12.--15. 1. "MST_VM_VOUT_VOL_CTRL_DL3,Fine tuning for the voltage mode driver VOL datalane3" hexmask.long.byte 0x20 8.--11. 1. "MST_VM_VOUT_VOL_CTRL_DL2,Fine tuning for the voltage mode driver VOL datalane2" newline hexmask.long.byte 0x20 4.--7. 1. "MST_VM_VOUT_VOL_CTRL_DL1,Fine tuning for the voltage mode driver VOL datalane1" hexmask.long.byte 0x20 0.--3. 1. "MST_VM_VOUT_VOL_CTRL_DL0,Fine tuning for the voltage mode driver VOL datalane0" line.long 0x24 "LVDS_PMICR,LVDS PHY-Master impedance control register" bitfld.long 0x24 16.--18. "MST_IMP_CTRL_DL4,Impedance control for data lane4" "0,1,2,3,4,5,6,7" bitfld.long 0x24 12.--14. "MST_IMP_CTRL_DL3,Impedance control for data lane3" "0,1,2,3,4,5,6,7" bitfld.long 0x24 8.--10. "MST_IMP_CTRL_DL2,Impedance control for data lane0" "0,1,2,3,4,5,6,7" newline bitfld.long 0x24 4.--6. "MST_IMP_CTRL_DL1,Impedance control for data lane1" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0.--2. "MST_IMP_CTRL_DL0,Impedance control for data lane0" "0,1,2,3,4,5,6,7" line.long 0x28 "LVDS_PMMBCCR,LVDS PHY-Master monitor bandgap current control register" hexmask.long.word 0x28 16.--24. 1. "MST_MON_BG_CURR_UNMASK_TUNE,Bandgap current timing control for the monitor unmask after startup" bitfld.long 0x28 4. "MST_MON_BG_CURR_CLEAR_FAULT,Bandgap current monitor clear fault" "0,1" bitfld.long 0x28 0. "MST_MON_BG_CURR_FORCE_FAULT,Bandgap current monitor force fault" "0,1" rgroup.long 0x1048++0x3 line.long 0x0 "LVDS_PMMBCSR,LVDS PHY-Master monitor bandgap current status register" bitfld.long 0x0 4. "MST_MON_BG_CURR_FAULT,Bandgap current monitor fault" "0,1" bitfld.long 0x0 0. "MST_MON_BG_CURR_PERMANENT_FAULT,Bandgap current monitor permanent fault" "0,1" group.long 0x104C++0x3 line.long 0x0 "LVDS_PMMBLCR,LVDS PHY-Master monitor bandgap loop control register" hexmask.long.word 0x0 16.--24. 1. "MST_MON_BG_LOOP_UNMASK_TUNE,Bandgap loop timing control for the monitor unmask after startup" bitfld.long 0x0 4. "MST_MON_BG_LOOP_CLEAR_FAULT,Bandgap loop monitor clear fault" "0,1" bitfld.long 0x0 0. "MST_MON_BG_LOOP_FORCE_FAULT,Bandgap loop monitor force fault" "0,1" rgroup.long 0x1050++0x3 line.long 0x0 "LVDS_PMMBLSR,LVDS PHY-Master monitor bandgap loop status register" bitfld.long 0x0 4. "MST_MON_BG_LOOP_FAULT,Bandgap loop monitor fault" "0,1" bitfld.long 0x0 0. "MST_MON_BG_LOOP_PERMANENT_FAULT,Bandgap loop monitor permanent fault" "0,1" group.long 0x1054++0x3 line.long 0x0 "LVDS_PMMBOVCR,LVDS PHY-Master monitor bandgap output voltage control register" hexmask.long.word 0x0 16.--24. 1. "MST_MON_BG_VOLT_UNMASK_TUNE,Bandgap output voltage timing control for the monitor unmask after startup" bitfld.long 0x0 4. "MST_MON_BG_VOLT_CLEAR_FAULT,Bandgap output voltage monitor clear fault" "0,1" bitfld.long 0x0 0. "MST_MON_BG_VOLT_FORCE_FAULT,Bandgap output voltage monitor force fault" "0,1" rgroup.long 0x1058++0x3 line.long 0x0 "LVDS_PMMBOVSR,LVDS PHY-Master monitor bandgap output voltage status register" bitfld.long 0x0 4. "MST_MON_BG_VOLT_FAULT,Bandgap output voltage monitor fault" "0,1" bitfld.long 0x0 0. "MST_MON_BG_VOLT_PERMANENT_FAULT,Bandgap output voltage monitor permanent fault" "0,1" group.long 0x105C++0x3 line.long 0x0 "LVDS_PMMPLOVCR,LVDS PHY-Master monitor PLL LDO output voltage control register" hexmask.long.word 0x0 16.--24. 1. "MST_MON_LDO_OK_UNMASK_TUNE,PLL LDO output voltage timing control for the monitor unmask after startup" bitfld.long 0x0 4. "MST_MON_LDO_OK_CLEAR_FAULT,PLL LDO output voltage monitor clear fault" "0,1" bitfld.long 0x0 0. "MST_MON_LDO_OK_FORCE_FAULT,PLL LDO output voltage monitor force fault" "0,1" rgroup.long 0x1060++0x3 line.long 0x0 "LVDS_PMMPLOVSR,LVDS PHY-Master monitor PLL LDO output voltage status register" bitfld.long 0x0 4. "MST_MON_LDO_OK_FAULT,PLL LDO output voltage monitor fault" "0,1" bitfld.long 0x0 0. "MST_MON_LDO_OK_PERMANENT_FAULT,PLL LDO output voltage monitor permanent fault" "0,1" group.long 0x1064++0x3 line.long 0x0 "LVDS_PMMPLCR,LVDS PHY-Master monitor PLL lock control register" hexmask.long.word 0x0 16.--24. 1. "MST_MON_PLL_LOCK_UNMASK_TUNE,PLL Lock timing control for the monitor unmask after startup" bitfld.long 0x0 4. "MST_MON_PLL_LOCK_CLEAR_FAULT,PLL Lock monitor clear fault" "0,1" bitfld.long 0x0 0. "MST_MON_PLL_LOCK_FORCE_FAULT,PLL Lock monitor force fault" "0,1" rgroup.long 0x1068++0x3 line.long 0x0 "LVDS_PMMPLSR,LVDS PHY-Master monitor PLL lock status register" bitfld.long 0x0 4. "MST_MON_PLL_LOCK_FAULT,PLL Lock monitor fault" "0,1" bitfld.long 0x0 0. "MST_MON_PLL_LOCK_PERMANENT_FAULT,PLL Lock monitor permanent fault" "0,1" group.long 0x106C++0x3 line.long 0x0 "LVDS_PMMPROCR,LVDS PHY-Master monitor PLL reference OK control register" hexmask.long.word 0x0 16.--24. 1. "MST_MON_REF_OK_UNMASK_TUNE,PLL Reference timing control for the monitor unmask after startup" bitfld.long 0x0 4. "MST_MON_REF_OK_CLEAR_FAULT,PLL Reference monitor clear fault" "0,1" bitfld.long 0x0 0. "MST_MON_REF_OK_FORCE_FAULT,PLL Reference monitor force fault" "0,1" rgroup.long 0x1070++0x3 line.long 0x0 "LVDS_PMMPROSR,LVDS PHY-Master monitor PLL reference OK status register" bitfld.long 0x0 4. "MST_MON_REF_OK_FAULT,PLL Reference OK monitor fault" "0,1" bitfld.long 0x0 0. "MST_MON_REF_OK_PERMANENT_FAULT,PLL Reference OK monitor permanent fault" "0,1" group.long 0x1074++0x3 line.long 0x0 "LVDS_PMMSCCR,LVDS PHY-Master monitor serializer clock control register" bitfld.long 0x0 4. "MST_SER_CLK_CLEAR_FAULT,Serializer clock checking fault clearing" "0,1" bitfld.long 0x0 0. "MST_SER_CLK_ERROR_INJ,Serializer clock checking error injection" "0,1" rgroup.long 0x1078++0x3 line.long 0x0 "LVDS_PMMSCSR,LVDS PHY-Master monitor serializer clock status register" bitfld.long 0x0 0. "MST_SER_CLK_FAULT,Serializer clock checking fault" "0,1" group.long 0x107C++0x3 line.long 0x0 "LVDS_PMMSCR,LVDS PHY-Master monitor serializer control register" hexmask.long.byte 0x0 16.--20. 1. "MST_SER_LPBCK,Serializer fault loopback" hexmask.long.byte 0x0 8.--12. 1. "MST_SER_FAULT_CLEAR,Serializer fault clearing" hexmask.long.byte 0x0 0.--4. 1. "MST_SER_ERROR_INJ,Serializer error injection" rgroup.long 0x1080++0x3 line.long 0x0 "LVDS_PMMSSR,LVDS PHY-Master monitor serializer status register" hexmask.long.byte 0x0 0.--4. 1. "MST_SER_FAULT,Serializer fault" group.long 0x1084++0x3 line.long 0x0 "LVDS_PMDCR,LVDS PHY-Master debug control register" bitfld.long 0x0 12. "MST_POWER_OK,When set to 1 this bit masks some functions in the LVDS-PHY" "0,1" bitfld.long 0x0 8. "MST_PLL_FORCE_LOCK,When set to 1 this bit masks some functions in the LVDS-PHY" "0,1" bitfld.long 0x0 4. "MST_PLL_FORCE_LDO_OK,When set to 1 this bit masks some functions in the LVDS-PHY" "0,1" newline bitfld.long 0x0 0. "MST_FORCE_ANALOG_OK,When set to 1 this bit masks some functions in the LVDS-PHY" "0,1" rgroup.long 0x1088++0x7 line.long 0x0 "LVDS_PMSSR1,LVDS PHY-Master spare status register 1" hexmask.long.byte 0x0 24.--31. 1. "MST_DRV_A3_SPARE_RD,Spare outputs for data lane3" hexmask.long.byte 0x0 16.--23. 1. "MST_DRV_A2_SPARE_RD,Spare outputs for data lane2" hexmask.long.byte 0x0 8.--15. 1. "MST_DRV_A1_SPARE_RD,Spare outputs for data lane1" newline hexmask.long.byte 0x0 0.--7. 1. "MST_DRV_A0_SPARE_RD,Spare outputs for data lane0" line.long 0x4 "LVDS_PMSSR2,LVDS PHY-Master spare status register 2" hexmask.long.byte 0x4 0.--7. 1. "MST_DRV_A4_SPARE_RD,Spare outputs for data lane4" group.long 0x10A0++0x3 line.long 0x0 "LVDS_PMCFGCR,LVDS PHY-Master configuration control register" hexmask.long.byte 0x0 0.--4. 1. "MST_EN_DIG_DL,Enables Digital DataLanes DL4...DL0" group.long 0x10C0++0x7 line.long 0x0 "LVDS_PMPLLCR1,LVDS PHY-Master PLL_MODE 1 control register" rbitfld.long 0x0 12. "MST_PLL_BYPASS_START_DECT,Bypass start DECT." "0,1" bitfld.long 0x0 8. "MST_PLL_DIVIDERS_ENABLE,0x0: Dividers disabled" "?,B_0x1" bitfld.long 0x0 4. "MST_PLL_BYPASS,0x0: from VCO output" "?,B_0x1" newline bitfld.long 0x0 2. "MST_PLL_TWG_ENABLE,Triangular wave pattern used to modulate MDIV" "B_0x0,B_0x1" bitfld.long 0x0 1. "MST_PLL_SD_ENABLE,sigma-delta enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "MST_PLL_ENABLE,0x0: LVDS-PHY PLL Disable" "?,B_0x1" line.long 0x4 "LVDS_PMPLLCR2,LVDS PHY-Master PLL_MODE 2 control register" hexmask.long.word 0x4 16.--25. 1. "MST_PLL_INPUT_DIV,PLL Input Clock Divider (NDIV divides input reference clock)" hexmask.long.word 0x4 0.--9. 1. "MST_PLL_BIT_DIV,PLL Output Clock Divider (BDIV divides output VCO)" rgroup.long 0x10C8++0x3 line.long 0x0 "LVDS_PMPLLSR,LVDS PHY-Master PLL status register" bitfld.long 0x0 0. "MST_PLL_LOCK,PLL lock During a certain number of cycles of reference clock pll_lock is asserted high and then goes low waiting for the LVDS-PHY PLL t0 lock" "0,1" group.long 0x10CC++0x1F line.long 0x0 "LVDS_PMPLLSDCR1,LVDS PHY-Master PLL_SD_1 control register" hexmask.long.word 0x0 0.--9. 1. "MST_PLL_SD_INT_RATIO,Integer Setting of PLL Feedback Clock Divider (MDIV divides VCO clock for feedback)" line.long 0x4 "LVDS_PMPLLSDCR2,LVDS PHY-Master PLL_SD_2 control register" bitfld.long 0x4 28. "MST_PLL_SD_CLK_EDGE_CNTRL,Sigma Delta Edge Control." "0,1" rbitfld.long 0x4 26. "MST_PLL_SD_BYPASS_FB_CLK,Bypass start SD feedback clock." "0,1" bitfld.long 0x4 24.--25. "MST_PLL_SD_BYPASS_VCO_MUX,Bypass control for the PLL sigma delta VCO mux" "0,1,2,3" newline hexmask.long.tbyte 0x4 0.--22. 1. "MST_PLL_SD_INPUT_CODE_BYPASS,Fractional Setting of PLL Feedback Clock Divider (MDIV divides VCO clock for feedback)" line.long 0x8 "LVDS_PMPLLTWGCR1,LVDS PHY-Master PLL_TWG_1 control register" bitfld.long 0x8 20. "MST_PLL_TWG_DOWN_SPREAD,TWG pattern spreading" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--19. 1. "MST_PLL_TWG_STEP,MDIV divdier used in integer N and Fractional N PLL modes" line.long 0xC "LVDS_PMPLLTWGCR2,LVDS PHY-Master PLL_TWG_2 control register" hexmask.long.tbyte 0xC 0.--22. 1. "MST_PLL_TWG_THRESHOLD,TWG_THRESHOLD setting" line.long 0x10 "LVDS_PMPLLLDOCR,LVDS PHY-Master PLL_LDO control register" bitfld.long 0x10 0.--2. "MST_PLL_LDO_FRREGVTRIM,PLL LDO output voltage fine tuning:" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x14 "LVDS_PMPLLCPCR,LVDS PHY-Master PLL_CP control register" hexmask.long.byte 0x14 0.--3. 1. "MST_PLL_CPCTRL,PLL charge pump control default=1." line.long 0x18 "LVDS_PMPLLCFGCR,LVDS PHY-Master PLL_CFG control register" hexmask.long.byte 0x18 0.--7. 1. "MST_PLL_CFG,PLL configuration" line.long 0x1C "LVDS_PMPLLTESTCR,LVDS PHY-Master PLL_TEST control register" hexmask.long.word 0x1C 16.--25. 1. "MST_PLL_TEST_DIV_SETTINGS,lvds_pll_test_clk dividers value" bitfld.long 0x1C 8. "MST_PLL_TEST_DIV_EN,lvds_pll_test_clk dividers enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "MST_PLL_TEST_CLK_EN,lvds_pll_test_clk enable" "B_0x0,B_0x1" group.long 0x1100++0x17 line.long 0x0 "LVDS_PSGCR,LVDS PHY-Slave global control register" bitfld.long 0x0 25. "SLV_DIVIDERS_RSTN,When set to 0 reset the output dividers" "0,1" bitfld.long 0x0 24. "SLV_RSTZ,When set to 0 this bit places the digital section of the LVDS-PHY in the reset state" "0,1" bitfld.long 0x0 8. "SLV_DP_CLK_OUT_ENABLE,Enable LVDS-PHY dp_clk clock" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "SLV_LS_CLK_OUT_ENABLE,Enable LVDS-PHY ls_clk clock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SLV_BIT_CLK_OUT_ENABLE,Enable LVDS-PHY bit_clk clock" "B_0x0,B_0x1" line.long 0x4 "LVDS_PSPEACR,LVDS PHY-Slave pre-emphasis amplitude control register" hexmask.long.byte 0x4 16.--19. 1. "SLV_PRE_EMPH_AMP_DL4,Amplitude control for pre-emphasis for lane4" hexmask.long.byte 0x4 12.--15. 1. "SLV_PRE_EMPH_AMP_DL3,Amplitude control for pre-emphasis for lane3" hexmask.long.byte 0x4 8.--11. 1. "SLV_PRE_EMPH_AMP_DL2,Amplitude control for pre-emphasis for lane2" newline hexmask.long.byte 0x4 4.--7. 1. "SLV_PRE_EMPH_AMP_DL1,Amplitude control for pre-emphasis for lane1" hexmask.long.byte 0x4 0.--3. 1. "SLV_PRE_EMPH_AMP_DL0,Amplitude control for pre-emphasis for lane0" line.long 0x8 "LVDS_PSPETCR,LVDS PHY-Slave pre-emphasis time control register" bitfld.long 0x8 16.--17. "SLV_PRE_EMPH_TIME_DL4,Time duration control for pre-emphasis for lane4" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 12.--13. "SLV_PRE_EMPH_TIME_DL3,Time duration control for pre-emphasis for lane3" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 8.--9. "SLV_PRE_EMPH_TIME_DL2,Time duration control for pre-emphasis for lane2" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x8 4.--5. "SLV_PRE_EMPH_TIME_DL1,Time duration control for pre-emphasis for lane1" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 0.--1. "SLV_PRE_EMPH_TIME_DL0,Time duration control for pre-emphasis for lane0" "B_0x0,B_0x1,B_0x2,?" line.long 0xC "LVDS_PSCMCR1,LVDS PHY-Slave current mode control register 1" bitfld.long 0xC 30. "SLV_CM_USE_VM_VMID_DL3,common mode of datalane3: when high reference is mid voltage of the driver levels" "0,1" bitfld.long 0xC 29. "SLV_CM_USE_VDD_REF_DL3,common mode of datalane3: when high reference is derived from AVDD_IO voltage" "0,1" bitfld.long 0xC 28. "SLV_CM_EN_DL3,Enable for current mode driver data lane3" "0,1" newline hexmask.long.byte 0xC 24.--27. 1. "SLV_CM_AMP_CTRL_DL3,Amplitude control for current mode driver data lane3" bitfld.long 0xC 22. "SLV_CM_USE_VM_VMID_DL2,common mode of datalane2: when high reference is mid voltage of the driver levels" "0,1" bitfld.long 0xC 21. "SLV_CM_USE_VDD_REF_DL2,common mode of datalane2: when high reference is derived from AVDD_IO voltage" "0,1" newline bitfld.long 0xC 20. "SLV_CM_EN_DL2,Enable for current mode driver data lane2" "0,1" hexmask.long.byte 0xC 16.--19. 1. "SLV_CM_AMP_CTRL_DL2,Amplitude control for current mode driver data lane2" bitfld.long 0xC 14. "SLV_CM_USE_VM_VMID_DL1,common mode of datalane1: when high reference is mid voltage of the driver levels" "0,1" newline bitfld.long 0xC 13. "SLV_CM_USE_VDD_REF_DL1,common mode of datalane1: when high reference is derived from AVDD_IO voltage" "0,1" bitfld.long 0xC 12. "SLV_CM_EN_DL1,Enable for current mode driver data lane1" "0,1" hexmask.long.byte 0xC 8.--11. 1. "SLV_CM_AMP_CTRL_DL1,Amplitude control for current mode driver data lane1" newline bitfld.long 0xC 6. "SLV_CM_USE_VM_VMID_DL0,common mode of datalane0: when high reference is mid voltage of the driver levels" "0,1" bitfld.long 0xC 5. "SLV_CM_USE_VDD_REF_DL0,common mode of datalane0: when high reference is derived from AVDD_IO voltage" "0,1" bitfld.long 0xC 4. "SLV_CM_EN_DL0,Enable for current mode driver data lane0" "0,1" newline hexmask.long.byte 0xC 0.--3. 1. "SLV_CM_AMP_CTRL_DL0,Amplitude control for current mode driver data lane0" line.long 0x10 "LVDS_PSCMCR2,LVDS PHY-Slave current mode control register 2" bitfld.long 0x10 16. "SLV_AC_COUPLING_MODE,AC Coupling Mode." "0,1" bitfld.long 0x10 6. "SLV_CM_USE_VM_VMID_DL4,common mode of datalane4: when high reference is mid voltage of the driver levels" "0,1" bitfld.long 0x10 5. "SLV_CM_USE_VDD_REF_DL4,common mode of datalane4: when high reference is derived from AVDD_IO voltage" "0,1" newline bitfld.long 0x10 4. "SLV_CM_EN_DL4,Enable for current mode driver data lane4" "0,1" hexmask.long.byte 0x10 0.--3. 1. "SLV_CM_AMP_CTRL_DL4,Amplitude control for current mode driver data lane4" line.long 0x14 "LVDS_PSRLPCR,LVDS PHY-Slave Rx loopback control register" bitfld.long 0x14 28. "SLV_EN_LOOP_BACK_DL4,Enable the loop back RX used for continuous monitoring data lane4" "0,1" bitfld.long 0x14 27. "SLV_EN_LOOP_BACK_DL3,Enable the loop back RX used for continuous monitoring data lane3" "0,1" bitfld.long 0x14 26. "SLV_EN_LOOP_BACK_DL2,Enable the loop back RX used for continuous monitoring data lane2" "0,1" newline bitfld.long 0x14 25. "SLV_EN_LOOP_BACK_DL1,Enable the loop back RX used for continuous monitoring data lane1" "0,1" bitfld.long 0x14 24. "SLV_EN_LOOP_BACK_DL0,Enable the loop back RX used for continuous monitoring data lane0" "0,1" hexmask.long.byte 0x14 16.--19. 1. "SLV_RX_LOOP_BACK_CFG_DL4,Rx loop back configuration for datalane4" newline hexmask.long.byte 0x14 12.--15. 1. "SLV_RX_LOOP_BACK_CFG_DL3,Rx loop back configuration for datalane3" hexmask.long.byte 0x14 8.--11. 1. "SLV_RX_LOOP_BACK_CFG_DL2,Rx loop back configuration for datalane2" hexmask.long.byte 0x14 4.--7. 1. "SLV_RX_LOOP_BACK_CFG_DL1,Rx loop back configuration for datalane1" newline hexmask.long.byte 0x14 0.--3. 1. "SLV_RX_LOOP_BACK_CFG_DL0,Rx loop back configuration for datalane0" rgroup.long 0x1118++0x3 line.long 0x0 "LVDS_PSRLPSR,LVDS PHY-slave Rx loopback status register" bitfld.long 0x0 16. "SLV_RX_LOOP_BACK_A_DL4,Rx loop back output for lane0" "0,1" bitfld.long 0x0 12. "SLV_RX_LOOP_BACK_A_DL3,Rx loop back output for lane1" "0,1" bitfld.long 0x0 8. "SLV_RX_LOOP_BACK_A_DL2,Rx loop back output for lane2" "0,1" newline bitfld.long 0x0 4. "SLV_RX_LOOP_BACK_A_DL1,Rx loop back output for lane3" "0,1" bitfld.long 0x0 0. "SLV_RX_LOOP_BACK_A_DL0,Rx loop back output for lane4" "0,1" group.long 0x111C++0x2B line.long 0x0 "LVDS_PSFCR,LVDS PHY-Slave flipedge control register" bitfld.long 0x0 20. "SLV_FLIP_CLK_EDGE_DL4,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane4" "0,1" bitfld.long 0x0 19. "SLV_FLIP_CLK_EDGE_DL3,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane3" "0,1" bitfld.long 0x0 18. "SLV_FLIP_CLK_EDGE_DL2,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane2" "0,1" newline bitfld.long 0x0 17. "SLV_FLIP_CLK_EDGE_DL1,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane1" "0,1" bitfld.long 0x0 16. "SLV_FLIP_CLK_EDGE_DL0,Flips the clock edge used by the first analog stage to resample the incoming data stream data lane0" "0,1" bitfld.long 0x0 4. "SLV_FLIP_CLK_EDGE_ANA_DL4,Flips the clock edge used by the pre-driver data lane4" "0,1" newline bitfld.long 0x0 3. "SLV_FLIP_CLK_EDGE_ANA_DL3,Flips the clock edge used by the pre-driver data lane3" "0,1" bitfld.long 0x0 2. "SLV_FLIP_CLK_EDGE_ANA_DL2,Flips the clock edge used by the pre-driver data lane2" "0,1" bitfld.long 0x0 1. "SLV_FLIP_CLK_EDGE_ANA_DL1,Flips the clock edge used by the pre-driver data lane1" "0,1" newline bitfld.long 0x0 0. "SLV_FLIP_CLK_EDGE_ANA_DL0,Flips the clock edge used by the pre-driver data lane0" "0,1" line.long 0x4 "LVDS_PSSCR,LVDS PHY-Slave serial control register" bitfld.long 0x4 16. "SLV_SER_DATA_OK,Indicates transmission of data" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "SLV_SER_SWAP_DPDN,Inverts output data" line.long 0x8 "LVDS_PSSCR1,LVDS PHY-Slave spare control register 1" hexmask.long.byte 0x8 24.--31. 1. "SLV_DRV_A3_SPARE,Spare inputs for data lane3" hexmask.long.byte 0x8 16.--23. 1. "SLV_DRV_A2_SPARE,Spare inputs for data lane2" hexmask.long.byte 0x8 8.--15. 1. "SLV_DRV_A1_SPARE,Spare inputs for data lane1" newline hexmask.long.byte 0x8 0.--7. 1. "SLV_DRV_A0_SPARE,Spare inputs for data lane0" line.long 0xC "LVDS_PSSCR2,LVDS PHY-Slave spare control register 2" hexmask.long.byte 0xC 0.--7. 1. "SLV_DRV_A4_SPARE,Spare inputs for data lane4" line.long 0x10 "LVDS_PSBCR1,LVDS PHY-Slave bias control register 1" bitfld.long 0x10 16. "SLV_EN_BIAS_DL4,Enable the local bias at data lane4" "B_0x0,B_0x1" bitfld.long 0x10 12. "SLV_EN_BIAS_DL3,Enable the local bias at data lane3" "B_0x0,B_0x1" bitfld.long 0x10 8. "SLV_EN_BIAS_DL2,Enable the local bias at data lane2" "B_0x0,B_0x1" newline bitfld.long 0x10 4. "SLV_EN_BIAS_DL1,Enable the local bias at data lane1" "B_0x0,B_0x1" bitfld.long 0x10 0. "SLV_EN_BIAS_DL0,Enable the local bias at data lane0" "B_0x0,B_0x1" line.long 0x14 "LVDS_PSBCR2,LVDS PHY-Slave bias control register 2" bitfld.long 0x14 29. "SLV_BIAS_VREF_SEL,Selection for current generation internal reference" "B_0x0,B_0x1" bitfld.long 0x14 28. "SLV_BIAS_EN,lvds macro global bias enable" "B_0x0,B_0x1" hexmask.long.word 0x14 16.--27. 1. "SLV_BIAS_VREFTRIM,None" newline hexmask.long.word 0x14 0.--14. 1. "SLV_BIAS_TRIM,None" line.long 0x18 "LVDS_PSBCR3,LVDS PHY-Slave bias control register 3" bitfld.long 0x18 18. "SLV_VM_USE_VDD_REF_DL4,Sets the voltage mode driver to use a reference derived from the power supply data lane4" "0,1" bitfld.long 0x18 17. "SLV_VM_BOOST_BIAS_DL4,Bias booster for the voltage mode driver LDOS data lane4" "B_0x0,B_0x1" bitfld.long 0x18 16. "SLV_VM_EN_DL4,Enable the voltage mode driver for data lane4" "B_0x0,B_0x1" newline bitfld.long 0x18 14. "SLV_VM_USE_VDD_REF_DL3,Sets the voltage mode driver to use a reference derived from the power supply data lane3" "0,1" bitfld.long 0x18 13. "SLV_VM_BOOST_BIAS_DL3,Bias booster for the voltage mode driver LDOS data lane3" "B_0x0,B_0x1" bitfld.long 0x18 12. "SLV_VM_EN_DL3,Enable the voltage mode driver for data lane3" "B_0x0,B_0x1" newline bitfld.long 0x18 10. "SLV_VM_USE_VDD_REF_DL2,Sets the voltage mode driver to use a reference derived from the power supply data lane2" "0,1" bitfld.long 0x18 9. "SLV_VM_BOOST_BIAS_DL2,Bias booster for the voltage mode driver LDOS data lane2" "B_0x0,B_0x1" bitfld.long 0x18 8. "SLV_VM_EN_DL2,Enable the voltage mode driver for data lane2" "B_0x0,B_0x1" newline bitfld.long 0x18 6. "SLV_VM_USE_VDD_REF_DL1,Sets the voltage mode driver to use a reference derived from the power supply data lane1" "0,1" bitfld.long 0x18 5. "SLV_VM_BOOST_BIAS_DL1,Bias booster for the voltage mode driver LDOS data lane1" "B_0x0,B_0x1" bitfld.long 0x18 4. "SLV_VM_EN_DL1,Enable the voltage mode driver for data lane1" "B_0x0,B_0x1" newline bitfld.long 0x18 2. "SLV_VM_USE_VDD_REF_DL0,Sets the voltage mode driver to use a reference derived from the power supply data lane0" "0,1" bitfld.long 0x18 1. "SLV_VM_BOOST_BIAS_DL0,Bias booster for the voltage mode driver LDOS data lane0" "B_0x0,B_0x1" bitfld.long 0x18 0. "SLV_VM_EN_DL0,Enable the voltage mode driver for data lane0" "B_0x0,B_0x1" line.long 0x1C "LVDS_PSBCR4,LVDS PHY-Slave bias control register 4" hexmask.long.byte 0x1C 16.--19. 1. "SLV_VM_VOUT_VOH_CTRL_DL4,Fine tuning for the voltage mode driver VOH data lane4" hexmask.long.byte 0x1C 12.--15. 1. "SLV_VM_VOUT_VOH_CTRL_DL3,Fine tuning for the voltage mode driver VOH data lane3" hexmask.long.byte 0x1C 8.--11. 1. "SLV_VM_VOUT_VOH_CTRL_DL2,Fine tuning for the voltage mode driver VOH data lane2" newline hexmask.long.byte 0x1C 4.--7. 1. "SLV_VM_VOUT_VOH_CTRL_DL1,Fine tuning for the voltage mode driver VOH data lane1" hexmask.long.byte 0x1C 0.--3. 1. "SLV_VM_VOUT_VOH_CTRL_DL0,Fine tuning for the voltage mode driver VOH data lane0" line.long 0x20 "LVDS_PSBCR5,LVDS PHY-Slave bias control register 5" hexmask.long.byte 0x20 16.--19. 1. "SLV_VM_VOUT_VOL_CTRL_DL4,Fine tuning for the voltage mode driver VOL data lane4" hexmask.long.byte 0x20 12.--15. 1. "SLV_VM_VOUT_VOL_CTRL_DL3,Fine tuning for the voltage mode driver VOL data lane3" hexmask.long.byte 0x20 8.--11. 1. "SLV_VM_VOUT_VOL_CTRL_DL2,Fine tuning for the voltage mode driver VOL data lane2" newline hexmask.long.byte 0x20 4.--7. 1. "SLV_VM_VOUT_VOL_CTRL_DL1,Fine tuning for the voltage mode driver VOL data lane1" hexmask.long.byte 0x20 0.--3. 1. "SLV_VM_VOUT_VOL_CTRL_DL0,Fine tuning for the voltage mode driver VOL data lane0" line.long 0x24 "LVDS_PSICR,LVDS PHY-Slave impedance control register" bitfld.long 0x24 16.--18. "SLV_IMP_CTRL_DL4,Impedance control for data lane4" "0,1,2,3,4,5,6,7" bitfld.long 0x24 12.--14. "SLV_IMP_CTRL_DL3,Impedance control for data lane3" "0,1,2,3,4,5,6,7" bitfld.long 0x24 8.--10. "SLV_IMP_CTRL_DL2,Impedance control for data lane0" "0,1,2,3,4,5,6,7" newline bitfld.long 0x24 4.--6. "SLV_IMP_CTRL_DL1,Impedance control for data lane1" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0.--2. "SLV_IMP_CTRL_DL0,Impedance control for data lane0" "0,1,2,3,4,5,6,7" line.long 0x28 "LVDS_PSMBCCR,LVDS PHY-Slave monitor bandgap current control register" hexmask.long.word 0x28 16.--24. 1. "SLV_MON_BG_CURR_UNMASK_TUNE,Bandgap current timing control for the monitor unmask after startup" bitfld.long 0x28 4. "SLV_MON_BG_CURR_CLEAR_FAULT,Bandgap current monitor clear fault" "0,1" bitfld.long 0x28 0. "SLV_MON_BG_CURR_FORCE_FAULT,Bandgap current monitor force fault" "0,1" rgroup.long 0x1148++0x3 line.long 0x0 "LVDS_PSMBCSR,LVDS PHY-Slave monitor bandgap current status register" bitfld.long 0x0 4. "SLV_MON_BG_CURR_FAULT,Bandgap current monitor fault" "0,1" bitfld.long 0x0 0. "SLV_MON_BG_CURR_PERMANENT_FAULT,Bandgap current monitor permanent fault" "0,1" group.long 0x114C++0x3 line.long 0x0 "LVDS_PSMBLCR,LVDS PHY-Slave monitor bandgap loop control register" hexmask.long.word 0x0 16.--24. 1. "SLV_MON_BG_LOOP_UNMASK_TUNE,Bandgap loop timing control for the monitor unmask after startup" bitfld.long 0x0 4. "SLV_MON_BG_LOOP_CLEAR_FAULT,Bandgap loop monitor clear fault" "0,1" bitfld.long 0x0 0. "SLV_MON_BG_LOOP_FORCE_FAULT,Bandgap loop monitor force fault" "0,1" rgroup.long 0x1150++0x3 line.long 0x0 "LVDS_PSMBLSR,LVDS PHY-Slave monitor bandgap loop status register" bitfld.long 0x0 4. "SLV_MON_BG_LOOP_FAULT,Bandgap loop monitor fault" "0,1" bitfld.long 0x0 0. "SLV_MON_BG_LOOP_PERMANENT_FAULT,Bandgap loop monitor permanent fault" "0,1" group.long 0x1154++0x3 line.long 0x0 "LVDS_PSMBOVCR,LVDS PHY-Slave monitor bandgap output voltage control register" hexmask.long.word 0x0 16.--24. 1. "SLV_MON_BG_VOLT_UNMASK_TUNE,Bandgap output voltage timing control for the monitor unmask after startup" bitfld.long 0x0 4. "SLV_MON_BG_VOLT_CLEAR_FAULT,Bandgap output voltage monitor clear fault" "0,1" bitfld.long 0x0 0. "SLV_MON_BG_VOLT_FORCE_FAULT,Bandgap output voltage monitor force fault" "0,1" rgroup.long 0x1158++0x3 line.long 0x0 "LVDS_PSMBOVSR,LVDS PHY-Slave monitor bandgap output voltage status register" bitfld.long 0x0 4. "SLV_MON_BG_VOLT_FAULT,Bandgap output voltage monitor fault" "0,1" bitfld.long 0x0 0. "SLV_MON_BG_VOLT_PERMANENT_FAULT,Bandgap output voltage monitor permanent fault" "0,1" group.long 0x1174++0x3 line.long 0x0 "LVDS_PSMSCCR,LVDS PHY-Slave monitor serializer clock control register" bitfld.long 0x0 4. "SLV_SER_CLK_CLEAR_FAULT,Serializer clock checking fault clearing" "0,1" bitfld.long 0x0 0. "SLV_SER_CLK_ERROR_INJ,Serializer clock checking error injection" "0,1" rgroup.long 0x1178++0x3 line.long 0x0 "LVDS_PSMSCSR,LVDS PHY-Slave monitor serializer clock status register" bitfld.long 0x0 0. "SLV_SER_CLK_FAULT,Serializer clock checking fault" "0,1" group.long 0x117C++0x3 line.long 0x0 "LVDS_PSMSCR,LVDS PHY-Slave monitor serializer control register" hexmask.long.byte 0x0 16.--20. 1. "SLV_SER_LPBCK,Serializer fault loopback" hexmask.long.byte 0x0 8.--12. 1. "SLV_SER_FAULT_CLEAR,Serializer fault clearing" hexmask.long.byte 0x0 0.--4. 1. "SLV_SER_ERROR_INJ,Serializer error injection" rgroup.long 0x1180++0x3 line.long 0x0 "LVDS_PSMSSR,LVDS PHY-Slave monitor serializer status register" hexmask.long.byte 0x0 0.--4. 1. "SLV_SER_FAULT,Serializer fault" group.long 0x1184++0x3 line.long 0x0 "LVDS_PSDCR,LVDS PHY-Slave debug control register" bitfld.long 0x0 12. "SLV_POWER_OK,When set to 1 this bit masks some functions in the LVDS-PHY. This bit can be used as a work around to functional problems with some of the monitor blocks" "0,1" bitfld.long 0x0 0. "SLV_FORCE_ANALOG_OK,When set to 1 this bit masks some functions in the LVDS-PHY. This bit can be used as a work around to functional problems with some of the monitor blocks" "0,1" rgroup.long 0x1188++0x7 line.long 0x0 "LVDS_PSSSR1,LVDS PHY-Slave spare status register 1" hexmask.long.byte 0x0 24.--31. 1. "SLV_DRV_A3_SPARE_RD,Spare outputs for data lane3" hexmask.long.byte 0x0 16.--23. 1. "SLV_DRV_A2_SPARE_RD,Spare outputs for data lane2" hexmask.long.byte 0x0 8.--15. 1. "SLV_DRV_A1_SPARE_RD,Spare outputs for data lane1" newline hexmask.long.byte 0x0 0.--7. 1. "SLV_DRV_A0_SPARE_RD,Spare outputs for data lane0" line.long 0x4 "LVDS_PSSSR2,LVDS PHY-Slave spare status register 2" hexmask.long.byte 0x4 0.--7. 1. "SLV_DRV_A4_SPARE_RD,Spare outputs for data lane4" group.long 0x11A0++0x3 line.long 0x0 "LVDS_PSCFGCR,LVDS PHY-Slave configuration control register" hexmask.long.byte 0x0 0.--4. 1. "SLV_EN_DIG_DL,Enables Digital DataLanes DL4...DL0" group.long 0x11C0++0x7 line.long 0x0 "LVDS_PSPLLCR1,LVDS PHY-Slave PLL_MODE 1 control register" rbitfld.long 0x0 12. "SLV_PLL_BYPASS_START_DECT,Bypass start DECT." "0,1" bitfld.long 0x0 8. "SLV_PLL_DIVIDERS_ENABLE,0x0: Dividers disabled" "?,B_0x1" bitfld.long 0x0 4. "SLV_PLL_BYPASS,0x0: from VCO output" "?,B_0x1" newline bitfld.long 0x0 2. "SLV_PLL_TWG_ENABLE,Triangular wave pattern used to modulate MDIV" "B_0x0,B_0x1" bitfld.long 0x0 1. "SLV_PLL_SD_ENABLE,sigma-delta enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SLV_PLL_ENABLE,0x0: LVDS-PHY PLL Disable" "?,B_0x1" line.long 0x4 "LVDS_WCLKCR,LVDS wrapper clock control register" bitfld.long 0x4 8. "SRCSEL,Source Selection for the Pixel Clock between master and slave PHY:" "B_0x0,B_0x1" bitfld.long 0x4 0. "SLV_CLKPIX_SEL,Pixel clock selection:" "B_0x0,B_0x1" group.long 0x11C4++0x3 line.long 0x0 "LVDS_PSPLLCR2,LVDS PHY-Slave PLL_MODE 2 control register" hexmask.long.word 0x0 16.--25. 1. "SLV_PLL_INPUT_DIV,PLL Input Clock Divider (NDIV divides input reference clock)" hexmask.long.word 0x0 0.--9. 1. "SLV_PLL_BIT_DIV,PLL Output Clock Divider (BDIV divides output VCO)" rgroup.long 0x11C8++0x3 line.long 0x0 "LVDS_PSPLLSR,LVDS PHY-Slave PLL status register" bitfld.long 0x0 0. "SLV_PLL_LOCK,PLL lock During a certain number of cycles of reference clock pll_lock is asserted high and then goes low waiting for the LVDS-PHY PLL t0 lock" "0,1" group.long 0x11CC++0x1F line.long 0x0 "LVDS_PSPLLSDCR1,LVDS PHY-Slave PLL_SD_1 control register" hexmask.long.word 0x0 0.--9. 1. "SLV_PLL_SD_INT_RATIO,Integer" line.long 0x4 "LVDS_PSPLLSDCR2,LVDS PHY-Slave PLL_SD_2 control register" bitfld.long 0x4 28. "SLV_PLL_SD_CLK_EDGE_CNTRL,Sigma--delta edge control." "0,1" rbitfld.long 0x4 26. "SLV_PLL_SD_BYPASS_FB_CLK,Bypass start SD feedback clock." "0,1" bitfld.long 0x4 24.--25. "SLV_PLL_SD_BYPASS_VCO_MUX,Bypass control for the PLL sigma delta VCO mux" "0,1,2,3" newline hexmask.long.tbyte 0x4 0.--22. 1. "SLV_PLL_SD_INPUT_CODE_BYPASS,Fractional Setting of PLL feedback clock Divider (MDIV divides VCO clock for feedback)" line.long 0x8 "LVDS_PSPLLTWGCR1,LVDS PHY-Slave PLL_TWG_1 control register" bitfld.long 0x8 20. "SLV_PLL_TWG_DOWN_SPREAD,TWG pattern spreading" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--19. 1. "SLV_PLL_TWG_STEP,MDIV divdier used in integer N and Fractional N PLL modes" line.long 0xC "LVDS_PSPLLTWGCR2,LVDS PHY-Slave PLL_TWG_2 control register" hexmask.long.tbyte 0xC 0.--22. 1. "SLV_PLL_TWG_THRESHOLD,TWG_THRESHOLD setting" line.long 0x10 "LVDS_PSPLLLDOCR,LVDS PHY-Slave PLL_LDO control register" bitfld.long 0x10 0.--2. "SLV_PLL_LDO_FRREGVTRIM,PLL LDO output voltage fine tuning:" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x14 "LVDS_PSPLLCPCR,LVDS PHY-Slave PLL_CP control register" hexmask.long.byte 0x14 0.--3. 1. "SLV_PLL_CPCTRL,PLL charge pump control default=1." line.long 0x18 "LVDS_PSPLLCFGCR,LVDS PHY-Slave PLL_CFG control register" hexmask.long.byte 0x18 0.--7. 1. "SLV_PLL_CFG,PLL configuration" line.long 0x1C "LVDS_PSPLLTESTCR,LVDS PHY-Slave PLL_TEST control register" hexmask.long.word 0x1C 16.--25. 1. "SLV_PLL_TEST_DIV_SETTINGS,lvds_pll_test_clk dividers value" bitfld.long 0x1C 8. "SLV_PLL_TEST_DIV_EN,lvds_pll_test_clk dividers enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "SLV_PLL_TEST_CLK_EN,lvds_pll_test_clk enable" "B_0x0,B_0x1" group.long 0x1200++0xF line.long 0x0 "LVDS_PMATCR1,LVDS PHY-Master analog test control register 1" hexmask.long.byte 0x0 24.--31. 1. "PMATDL3,PHY-Master analog test data lane 3" hexmask.long.byte 0x0 16.--23. 1. "PMATDL2,PHY-Master analog test data lane 2" hexmask.long.byte 0x0 8.--15. 1. "PMATDL1,PHY-Master analog test data lane 1" newline hexmask.long.byte 0x0 0.--7. 1. "PMATDL0,PHY-Master analog test data lane 0" line.long 0x4 "LVDS_PMATCR2,LVDS PHY-Master analog test control register 2" hexmask.long.byte 0x4 16.--22. 1. "PMATPC,Phy-Master analog test PLL control" hexmask.long.byte 0x4 8.--15. 1. "PMATB,Phy-Master analog test bias" hexmask.long.byte 0x4 0.--7. 1. "PMATDL4,PHY-Master analog test data lane 4" line.long 0x8 "LVDS_PMDTCR1,LVDS PHY-Master digital test control register 1" hexmask.long.byte 0x8 24.--31. 1. "PMDTDL3,PHY-Master digital test data lane 3" hexmask.long.byte 0x8 16.--23. 1. "PMDTDL2,PHY-Master digital test data lane 2" hexmask.long.byte 0x8 8.--15. 1. "PMDTDL1,PHY-Master digital test data lane 1" newline hexmask.long.byte 0x8 0.--7. 1. "PMDTDL0,PHY-Master digital test data lane 0" line.long 0xC "LVDS_PMDTCR2,LVDS PHY-Master digital test control register 2" hexmask.long.byte 0xC 8.--14. 1. "PMDTMC,Phy-Master digital test mux control" hexmask.long.byte 0xC 0.--7. 1. "PMDTDL4,PHY-Master digital test data lane 4" rgroup.long 0x1210++0x3 line.long 0x0 "LVDS_PMDTSR,LVDS PHY-Master digital test status register" bitfld.long 0x0 5. "PMDTPS,Phy-Master digital test PLL status" "0,1" bitfld.long 0x0 4. "PMDTDLS4,Phy-Master digital test data lane status 4" "0,1" bitfld.long 0x0 3. "PMDTDLS3,Phy-Masterdigital test data lane status 3" "0,1" newline bitfld.long 0x0 2. "PMDTDLS2,Phy-Master digital test data lane status 2" "0,1" bitfld.long 0x0 1. "PMDTDLS1,Phy-Master digital test data lane status 1" "0,1" bitfld.long 0x0 0. "PMDTDLS0,Phy-Master digital test data lane status 0" "0,1" group.long 0x1220++0x13 line.long 0x0 "LVDS_PSATCR1,LVDS PHY-Slave analog test control register 1" hexmask.long.byte 0x0 24.--31. 1. "PSATDL3,PHY Slave analog test data lane 3" hexmask.long.byte 0x0 16.--23. 1. "PSATDL2,PHY-Slave analog test data lane 2" hexmask.long.byte 0x0 8.--15. 1. "PSATDL1,PHY-Slave analog test data lane 1" newline hexmask.long.byte 0x0 0.--7. 1. "PSATDL0,PHY-Slave analog test data lane 4" line.long 0x4 "LVDS_PSATCR2,LVDS PHY-Slave analog test control register 2" hexmask.long.byte 0x4 16.--22. 1. "PSATPC,Phy-Slave analog test PLL control" hexmask.long.byte 0x4 8.--15. 1. "PSATB,Phy-Slave analog test bias" hexmask.long.byte 0x4 0.--7. 1. "PSATDL4,PHY-Slave analog test data lane 4" line.long 0x8 "LVDS_PSDTCR1,LVDS PHY-Slave digital test control register 1" hexmask.long.byte 0x8 24.--31. 1. "PSDTDL3,PHY-Slave digital test data lane 3" hexmask.long.byte 0x8 16.--23. 1. "PSDTDL2,PHY-Slave digital test data lane 2" hexmask.long.byte 0x8 8.--15. 1. "PSDTDL1,PHY-Slave digital test data lane 1" newline hexmask.long.byte 0x8 0.--7. 1. "PSDTDL0,PHY-Slave digital test data lane 0" line.long 0xC "LVDS_PSDTCR2,LVDS PHY-Slave digital test control register 2" hexmask.long.byte 0xC 8.--14. 1. "PSDTMC,PHY-Slave digital test" hexmask.long.byte 0xC 0.--7. 1. "PSDTDL4,PHY-Slave digital test data lane 4" line.long 0x10 "LVDS_PSDTSR,LVDS PHY-Slave digital test status register" bitfld.long 0x10 5. "PSDTPS,Phy-Slave digital test PLL status" "0,1" bitfld.long 0x10 4. "PSDTDLS4,Phy-Slave digital test data lane status 4" "0,1" bitfld.long 0x10 3. "PSDTDLS3,Phy-Slave digital test data lane status 3" "0,1" newline bitfld.long 0x10 2. "PSDTDLS2,Phy-Slave digital test data lane status 2" "0,1" bitfld.long 0x10 1. "PSDTDLS1,Phy-Slave digital test data lane status 1" "0,1" bitfld.long 0x10 0. "PSDTDLS0,Phy-Slave digital test data lane status 0" "0,1" rgroup.long 0x1FF0++0xF line.long 0x0 "LVDS_HWCFGR,LVDS hardware configuration register" hexmask.long.byte 0x0 8.--11. 1. "LINKS,amount of LVDS PHY links" hexmask.long.byte 0x0 4.--7. 1. "LANES,amount of LVDS PHY Lanes (including the LVDS PHY clock lane) in one link" hexmask.long.byte 0x0 0.--3. 1. "TECHNO,PHY technology (and version)" line.long 0x4 "LVDS_VERR,LVDS version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,LVDS PHY host major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,LVDS PHY host minor revision" line.long 0x8 "LVDS_IPIDR,LVDS identification register" hexmask.long 0x8 0.--31. 1. "IDR,LVDS PHY host identification (0x0016_00A1)" line.long 0xC "LVDS_SIDR,LVDS size register" hexmask.long 0xC 0.--31. 1. "SID,LVDS PHY host address space: 8 Kbytes (4 K for host 4 K for PHY/Wrapper)" tree.end tree.end tree "MDF (Multi-Function Digital Filter)" base ad:0x0 tree "MDF" base ad:0x404D0000 group.long 0x0++0x7 line.long 0x0 "MDF_GCR,MDF global control register" hexmask.long.byte 0x0 4.--7. 1. "ILVNB,Interleaved number" bitfld.long 0x0 0. "TRGO,Trigger output control" "B_0x0,B_0x1" line.long 0x4 "MDF_CKGCR,MDF clock generator control register" rbitfld.long 0x4 31. "CKGACTIVE,Clock generator active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 24.--30. 1. "PROCDIV,Divider to control the serial interface clock" hexmask.long.byte 0x4 16.--19. 1. "CCKDIV,Divider to control the MDF_CCK clock" hexmask.long.byte 0x4 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x4 8. "TRGSENS,CKGEN trigger sensitivity selection" "B_0x0,B_0x1" bitfld.long 0x4 6. "CCK1DIR,MDF_CCK1 direction" "B_0x0,B_0x1" newline bitfld.long 0x4 5. "CCK0DIR,MDF_CCK0 direction" "B_0x0,B_0x1" bitfld.long 0x4 4. "CKGMOD,Clock generator mode" "B_0x0,B_0x1" bitfld.long 0x4 2. "CCK1EN,MDF_CCK1 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CCK0EN,MDF_CCK0 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CKGDEN,CKGEN dividers enable" "B_0x0,B_0x1" group.long 0x80++0x37 line.long 0x0 "MDF_SITF0CR,MDF serial interface control register 0" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "MDF_BSMX0CR,MDF bitstream matrix control register 0" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream Selection" line.long 0x8 "MDF_DFLT0CR,MDF digital filter control register 0" rbitfld.long 0x8 31. "DFLTACTIVE,Digital filter active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,Digital filter run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" bitfld.long 0x8 16. "SNPSFMT,Snapshot data format" "B_0x0,B_0x1" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x8 8. "TRGSENS,Digital filter trigger sensitivity selection" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ACQMOD,Digital filter trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,Digital filter enable" "B_0x0,B_0x1" line.long 0xC "MDF_DFLT0CICR,MDF digital filter configuration register 0" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "MDF_DFLT0RSFR,MDF reshape filter configuration register 0" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" line.long 0x14 "MDF_DFLT0INTR,MDF integrator configuration register 0" hexmask.long.byte 0x14 4.--10. 1. "INTVAL,Integration value selection" bitfld.long 0x14 0.--1. "INTDIV,Integrator output division" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "MDF_OLD0CR,MDF out-of limit detector control register 0" rbitfld.long 0x18 31. "OLDACTIVE,OLDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x18 17.--21. 1. "ACICD,OLDx CIC decimation ratio selection" bitfld.long 0x18 12.--13. "ACICN,OLDx CIC order selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x18 4.--7. 1. "BKOLD,Break signal assignment for out-of limit detector" bitfld.long 0x18 1. "THINB,Threshold In band" "B_0x0,B_0x1" bitfld.long 0x18 0. "OLDEN,OLDx enable" "B_0x0,B_0x1" line.long 0x1C "MDF_OLD0THLR,MDF OLD0 low threshold register 0" hexmask.long 0x1C 0.--25. 1. "OLDTHL,OLD low threshold value" line.long 0x20 "MDF_OLD0THHR,MDF OLD0 high threshold register 0" hexmask.long 0x20 0.--25. 1. "OLDTHH,OLDx high threshold value" line.long 0x24 "MDF_DLY0CR,MDF delay control register 0" rbitfld.long 0x24 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" line.long 0x28 "MDF_SCD0CR,MDF short circuit detector control register 0" rbitfld.long 0x28 31. "SCDACTIVE,SCDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x28 12.--19. 1. "SCDT,SCDx threshold" hexmask.long.byte 0x28 4.--7. 1. "BKSCD,Break signal assignment for short circuit detector" bitfld.long 0x28 0. "SCDEN,SCDx enable" "B_0x0,B_0x1" line.long 0x2C "MDF_DFLT0IER,MDF DFLT0 interrupt enable register 0" bitfld.long 0x2C 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SCDIE,SCD0 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SSOVRIE,Snapshot overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 4. "OLDIE,OLD0 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 2. "SSDRIE,Snapshot data ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x30 "MDF_DFLT0ISR,MDF DFLT0 interrupt status register 0" bitfld.long 0x30 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x30 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x30 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" bitfld.long 0x30 8. "SCDF,Short-circuit detector flag" "B_0x0,B_0x1" bitfld.long 0x30 7. "SSOVRF,Snapshot overrun flag" "B_0x0,B_0x1" rbitfld.long 0x30 6. "THHF,High-threshold status flag" "B_0x0,B_0x1" newline rbitfld.long 0x30 5. "THLF,Low-threshold status flag" "B_0x0,B_0x1" bitfld.long 0x30 4. "OLDF,OLD0 flag" "B_0x0,B_0x1" rbitfld.long 0x30 3. "RXNEF,RXFIFO not-empty flag" "B_0x0,B_0x1" bitfld.long 0x30 2. "SSDRF,Snapshot data ready flag" "B_0x0,B_0x1" bitfld.long 0x30 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x30 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" line.long 0x34 "MDF_OEC0CR,MDF offset error compensation control register 0" hexmask.long 0x34 0.--25. 1. "OFFSET,Offset error compensation" rgroup.long 0xEC++0x7 line.long 0x0 "MDF_SNPS0DR,MDF snapshot data register 0" hexmask.long.word 0x0 16.--31. 1. "SDR,Contains the 16 MSB of the last valid data processed by the digital filter." hexmask.long.byte 0x0 9.--15. 1. "EXTSDR,Extended data size" hexmask.long.word 0x0 0.--8. 1. "MCICDC,Contains the MCIC decimation counter value when the last trigger event occurs (MCIC_CNT)" line.long 0x4 "MDF_DFLT0DR,MDF digital filter data register 0" hexmask.long.tbyte 0x4 8.--31. 1. "DR,Data processed by digital filter" group.long 0x100++0x37 line.long 0x0 "MDF_SITF1CR,MDF serial interface control register 1" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "MDF_BSMX1CR,MDF bitstream matrix control register 1" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream Selection" line.long 0x8 "MDF_DFLT1CR,MDF digital filter control register 1" rbitfld.long 0x8 31. "DFLTACTIVE,Digital filter active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,Digital filter run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" bitfld.long 0x8 16. "SNPSFMT,Snapshot data format" "B_0x0,B_0x1" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x8 8. "TRGSENS,Digital filter trigger sensitivity selection" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ACQMOD,Digital filter trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,Digital filter enable" "B_0x0,B_0x1" line.long 0xC "MDF_DFLT1CICR,MDF digital filter configuration register 1" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "MDF_DFLT1RSFR,MDF reshape filter configuration register 1" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" line.long 0x14 "MDF_DFLT1INTR,MDF integrator configuration register 1" hexmask.long.byte 0x14 4.--10. 1. "INTVAL,Integration value selection" bitfld.long 0x14 0.--1. "INTDIV,Integrator output division" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "MDF_OLD1CR,MDF out-of limit detector control register 1" rbitfld.long 0x18 31. "OLDACTIVE,OLDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x18 17.--21. 1. "ACICD,OLDx CIC decimation ratio selection" bitfld.long 0x18 12.--13. "ACICN,OLDx CIC order selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x18 4.--7. 1. "BKOLD,Break signal assignment for out-of limit detector" bitfld.long 0x18 1. "THINB,Threshold In band" "B_0x0,B_0x1" bitfld.long 0x18 0. "OLDEN,OLDx enable" "B_0x0,B_0x1" line.long 0x1C "MDF_OLD1THLR,MDF OLD1 low threshold register 1" hexmask.long 0x1C 0.--25. 1. "OLDTHL,OLD low threshold value" line.long 0x20 "MDF_OLD1THHR,MDF OLD1 high threshold register 1" hexmask.long 0x20 0.--25. 1. "OLDTHH,OLDx high threshold value" line.long 0x24 "MDF_DLY1CR,MDF delay control register 1" rbitfld.long 0x24 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" line.long 0x28 "MDF_SCD1CR,MDF short circuit detector control register 1" rbitfld.long 0x28 31. "SCDACTIVE,SCDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x28 12.--19. 1. "SCDT,SCDx threshold" hexmask.long.byte 0x28 4.--7. 1. "BKSCD,Break signal assignment for short circuit detector" bitfld.long 0x28 0. "SCDEN,SCDx enable" "B_0x0,B_0x1" line.long 0x2C "MDF_DFLT1IER,MDF DFLT1 interrupt enable register 1" bitfld.long 0x2C 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SCDIE,SCDx interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SSOVRIE,Snapshot overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 4. "OLDIE,OLDx interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 2. "SSDRIE,Snapshot data ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x30 "MDF_DFLT1ISR,MDF DFLT1 interrupt status register 1" bitfld.long 0x30 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x30 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x30 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" bitfld.long 0x30 8. "SCDF,Short-circuit detector flag" "B_0x0,B_0x1" bitfld.long 0x30 7. "SSOVRF,Snapshot overrun flag" "B_0x0,B_0x1" rbitfld.long 0x30 6. "THHF,High-threshold status flag" "B_0x0,B_0x1" newline rbitfld.long 0x30 5. "THLF,Low-threshold status flag" "B_0x0,B_0x1" bitfld.long 0x30 4. "OLDF,OLDx flag" "B_0x0,B_0x1" rbitfld.long 0x30 3. "RXNEF,RXFIFO not-empty flag" "B_0x0,B_0x1" bitfld.long 0x30 2. "SSDRF,Snapshot data ready flag" "B_0x0,B_0x1" bitfld.long 0x30 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x30 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" line.long 0x34 "MDF_OEC1CR,MDF offset error compensation control register 1" hexmask.long 0x34 0.--25. 1. "OFFSET,Offset error compensation" rgroup.long 0x16C++0x7 line.long 0x0 "MDF_SNPS1DR,MDF snapshot data register 1" hexmask.long.word 0x0 16.--31. 1. "SDR,Contains the 16 MSB of the last valid data processed by the digital filter." hexmask.long.byte 0x0 9.--15. 1. "EXTSDR,Extended data size" hexmask.long.word 0x0 0.--8. 1. "MCICDC,Contains the MCIC decimation counter value when the last trigger event occurs (MCIC_CNT)" line.long 0x4 "MDF_DFLT1DR,MDF digital filter data register 1" hexmask.long.tbyte 0x4 8.--31. 1. "DR,Data processed by digital filter" group.long 0x180++0x37 line.long 0x0 "MDF_SITF2CR,MDF serial interface control register 2" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "MDF_BSMX2CR,MDF bitstream matrix control register 2" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream Selection" line.long 0x8 "MDF_DFLT2CR,MDF digital filter control register 2" rbitfld.long 0x8 31. "DFLTACTIVE,Digital filter active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,Digital filter run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" bitfld.long 0x8 16. "SNPSFMT,Snapshot data format" "B_0x0,B_0x1" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x8 8. "TRGSENS,Digital filter trigger sensitivity selection" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ACQMOD,Digital filter trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,Digital filter enable" "B_0x0,B_0x1" line.long 0xC "MDF_DFLT2CICR,MDF digital filter configuration register 2" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "MDF_DFLT2RSFR,MDF reshape filter configuration register 2" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" line.long 0x14 "MDF_DFLT2INTR,MDF integrator configuration register 2" hexmask.long.byte 0x14 4.--10. 1. "INTVAL,Integration value selection" bitfld.long 0x14 0.--1. "INTDIV,Integrator output division" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "MDF_OLD2CR,MDF out-of limit detector control register 2" rbitfld.long 0x18 31. "OLDACTIVE,OLDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x18 17.--21. 1. "ACICD,OLDx CIC decimation ratio selection" bitfld.long 0x18 12.--13. "ACICN,OLDx CIC order selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x18 4.--7. 1. "BKOLD,Break signal assignment for out-of limit detector" bitfld.long 0x18 1. "THINB,Threshold In band" "B_0x0,B_0x1" bitfld.long 0x18 0. "OLDEN,OLDx enable" "B_0x0,B_0x1" line.long 0x1C "MDF_OLD2THLR,MDF OLD2 low threshold register 2" hexmask.long 0x1C 0.--25. 1. "OLDTHL,OLD low threshold value" line.long 0x20 "MDF_OLD2THHR,MDF OLD2 high threshold register 2" hexmask.long 0x20 0.--25. 1. "OLDTHH,OLDx high threshold value" line.long 0x24 "MDF_DLY2CR,MDF delay control register 2" rbitfld.long 0x24 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" line.long 0x28 "MDF_SCD2CR,MDF short circuit detector control register 2" rbitfld.long 0x28 31. "SCDACTIVE,SCDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x28 12.--19. 1. "SCDT,SCDx threshold" hexmask.long.byte 0x28 4.--7. 1. "BKSCD,Break signal assignment for short circuit detector" bitfld.long 0x28 0. "SCDEN,SCDx enable" "B_0x0,B_0x1" line.long 0x2C "MDF_DFLT2IER,MDF DFLT2 interrupt enable register 2" bitfld.long 0x2C 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SCDIE,SCDx interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SSOVRIE,Snapshot overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 4. "OLDIE,OLDx interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 2. "SSDRIE,Snapshot data ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x30 "MDF_DFLT2ISR,MDF DFLT2 interrupt status register 2" bitfld.long 0x30 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x30 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x30 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" bitfld.long 0x30 8. "SCDF,Short-circuit detector flag" "B_0x0,B_0x1" bitfld.long 0x30 7. "SSOVRF,Snapshot overrun flag" "B_0x0,B_0x1" rbitfld.long 0x30 6. "THHF,High-threshold status flag" "B_0x0,B_0x1" newline rbitfld.long 0x30 5. "THLF,Low-threshold status flag" "B_0x0,B_0x1" bitfld.long 0x30 4. "OLDF,OLDx flag" "B_0x0,B_0x1" rbitfld.long 0x30 3. "RXNEF,RXFIFO not-empty flag" "B_0x0,B_0x1" bitfld.long 0x30 2. "SSDRF,Snapshot data ready flag" "B_0x0,B_0x1" bitfld.long 0x30 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x30 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" line.long 0x34 "MDF_OEC2CR,MDF offset error compensation control register 2" hexmask.long 0x34 0.--25. 1. "OFFSET,Offset error compensation" rgroup.long 0x1EC++0x7 line.long 0x0 "MDF_SNPS2DR,MDF snapshot data register 2" hexmask.long.word 0x0 16.--31. 1. "SDR,Contains the 16 MSB of the last valid data processed by the digital filter." hexmask.long.byte 0x0 9.--15. 1. "EXTSDR,Extended data size" hexmask.long.word 0x0 0.--8. 1. "MCICDC,Contains the MCIC decimation counter value when the last trigger event occurs (MCIC_CNT)" line.long 0x4 "MDF_DFLT2DR,MDF digital filter data register 2" hexmask.long.tbyte 0x4 8.--31. 1. "DR,Data processed by digital filter" group.long 0x200++0x37 line.long 0x0 "MDF_SITF3CR,MDF serial interface control register 3" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "MDF_BSMX3CR,MDF bitstream matrix control register 3" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream Selection" line.long 0x8 "MDF_DFLT3CR,MDF digital filter control register 3" rbitfld.long 0x8 31. "DFLTACTIVE,Digital filter active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,Digital filter run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" bitfld.long 0x8 16. "SNPSFMT,Snapshot data format" "B_0x0,B_0x1" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x8 8. "TRGSENS,Digital filter trigger sensitivity selection" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ACQMOD,Digital filter trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,Digital filter enable" "B_0x0,B_0x1" line.long 0xC "MDF_DFLT3CICR,MDF digital filter configuration register 3" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "MDF_DFLT3RSFR,MDF reshape filter configuration register 3" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" line.long 0x14 "MDF_DFLT3INTR,MDF integrator configuration register 3" hexmask.long.byte 0x14 4.--10. 1. "INTVAL,Integration value selection" bitfld.long 0x14 0.--1. "INTDIV,Integrator output division" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "MDF_OLD3CR,MDF out-of limit detector control register 3" rbitfld.long 0x18 31. "OLDACTIVE,OLDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x18 17.--21. 1. "ACICD,OLDx CIC decimation ratio selection" bitfld.long 0x18 12.--13. "ACICN,OLDx CIC order selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x18 4.--7. 1. "BKOLD,Break signal assignment for out-of limit detector" bitfld.long 0x18 1. "THINB,Threshold In band" "B_0x0,B_0x1" bitfld.long 0x18 0. "OLDEN,OLDx enable" "B_0x0,B_0x1" line.long 0x1C "MDF_OLD3THLR,MDF OLD3 low threshold register 3" hexmask.long 0x1C 0.--25. 1. "OLDTHL,OLD low threshold value" line.long 0x20 "MDF_OLD3THHR,MDF OLD3 high threshold register 3" hexmask.long 0x20 0.--25. 1. "OLDTHH,OLDx high threshold value" line.long 0x24 "MDF_DLY3CR,MDF delay control register 3" rbitfld.long 0x24 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" line.long 0x28 "MDF_SCD3CR,MDF short circuit detector control register 3" rbitfld.long 0x28 31. "SCDACTIVE,SCDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x28 12.--19. 1. "SCDT,SCDx threshold" hexmask.long.byte 0x28 4.--7. 1. "BKSCD,Break signal assignment for short circuit detector" bitfld.long 0x28 0. "SCDEN,SCDx enable" "B_0x0,B_0x1" line.long 0x2C "MDF_DFLT3IER,MDF DFLT3 interrupt enable register 3" bitfld.long 0x2C 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SCDIE,SCDx interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SSOVRIE,Snapshot overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 4. "OLDIE,OLDx interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 2. "SSDRIE,Snapshot data ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x30 "MDF_DFLT3ISR,MDF DFLT3 interrupt status register 3" bitfld.long 0x30 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x30 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x30 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" bitfld.long 0x30 8. "SCDF,Short-circuit detector flag" "B_0x0,B_0x1" bitfld.long 0x30 7. "SSOVRF,Snapshot overrun flag" "B_0x0,B_0x1" rbitfld.long 0x30 6. "THHF,High-threshold status flag" "B_0x0,B_0x1" newline rbitfld.long 0x30 5. "THLF,Low-threshold status flag" "B_0x0,B_0x1" bitfld.long 0x30 4. "OLDF,OLDx flag" "B_0x0,B_0x1" rbitfld.long 0x30 3. "RXNEF,RXFIFO not-empty flag" "B_0x0,B_0x1" bitfld.long 0x30 2. "SSDRF,Snapshot data ready flag" "B_0x0,B_0x1" bitfld.long 0x30 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x30 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" line.long 0x34 "MDF_OEC3CR,MDF offset error compensation control register 3" hexmask.long 0x34 0.--25. 1. "OFFSET,Offset error compensation" rgroup.long 0x26C++0x7 line.long 0x0 "MDF_SNPS3DR,MDF snapshot data register 3" hexmask.long.word 0x0 16.--31. 1. "SDR,Contains the 16 MSB of the last valid data processed by the digital filter." hexmask.long.byte 0x0 9.--15. 1. "EXTSDR,Extended data size" hexmask.long.word 0x0 0.--8. 1. "MCICDC,Contains the MCIC decimation counter value when the last trigger event occurs (MCIC_CNT)" line.long 0x4 "MDF_DFLT3DR,MDF digital filter data register 3" hexmask.long.tbyte 0x4 8.--31. 1. "DR,Data processed by digital filter" group.long 0x280++0x37 line.long 0x0 "MDF_SITF4CR,MDF serial interface control register 4" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "MDF_BSMX4CR,MDF bitstream matrix control register 4" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream Selection" line.long 0x8 "MDF_DFLT4CR,MDF digital filter control register 4" rbitfld.long 0x8 31. "DFLTACTIVE,Digital filter active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,Digital filter run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" bitfld.long 0x8 16. "SNPSFMT,Snapshot data format" "B_0x0,B_0x1" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x8 8. "TRGSENS,Digital filter trigger sensitivity selection" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ACQMOD,Digital filter trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,Digital filter enable" "B_0x0,B_0x1" line.long 0xC "MDF_DFLT4CICR,MDF digital filter configuration register 4" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "MDF_DFLT4RSFR,MDF reshape filter configuration register 4" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" line.long 0x14 "MDF_DFLT4INTR,MDF integrator configuration register 4" hexmask.long.byte 0x14 4.--10. 1. "INTVAL,Integration value selection" bitfld.long 0x14 0.--1. "INTDIV,Integrator output division" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "MDF_OLD4CR,MDF out-of limit detector control register 4" rbitfld.long 0x18 31. "OLDACTIVE,OLDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x18 17.--21. 1. "ACICD,OLDx CIC decimation ratio selection" bitfld.long 0x18 12.--13. "ACICN,OLDx CIC order selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x18 4.--7. 1. "BKOLD,Break signal assignment for out-of limit detector" bitfld.long 0x18 1. "THINB,Threshold In band" "B_0x0,B_0x1" bitfld.long 0x18 0. "OLDEN,OLDx enable" "B_0x0,B_0x1" line.long 0x1C "MDF_OLD4THLR,MDF OLD4 low threshold register 4" hexmask.long 0x1C 0.--25. 1. "OLDTHL,OLD low threshold value" line.long 0x20 "MDF_OLD4THHR,MDF OLD4 high threshold register 4" hexmask.long 0x20 0.--25. 1. "OLDTHH,OLDx high threshold value" line.long 0x24 "MDF_DLY4CR,MDF delay control register 4" rbitfld.long 0x24 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" line.long 0x28 "MDF_SCD4CR,MDF short circuit detector control register 4" rbitfld.long 0x28 31. "SCDACTIVE,SCDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x28 12.--19. 1. "SCDT,SCDx threshold" hexmask.long.byte 0x28 4.--7. 1. "BKSCD,Break signal assignment for short circuit detector" bitfld.long 0x28 0. "SCDEN,SCDx enable" "B_0x0,B_0x1" line.long 0x2C "MDF_DFLT4IER,MDF DFLT4 interrupt enable register 4" bitfld.long 0x2C 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SCDIE,SCDx interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SSOVRIE,Snapshot overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 4. "OLDIE,OLDx interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 2. "SSDRIE,Snapshot data ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x30 "MDF_DFLT4ISR,MDF DFLT4 interrupt status register 4" bitfld.long 0x30 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x30 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x30 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" bitfld.long 0x30 8. "SCDF,Short-circuit detector flag" "B_0x0,B_0x1" bitfld.long 0x30 7. "SSOVRF,Snapshot overrun flag" "B_0x0,B_0x1" rbitfld.long 0x30 6. "THHF,High-threshold status flag" "B_0x0,B_0x1" newline rbitfld.long 0x30 5. "THLF,Low-threshold status flag" "B_0x0,B_0x1" bitfld.long 0x30 4. "OLDF,OLDx flag" "B_0x0,B_0x1" rbitfld.long 0x30 3. "RXNEF,RXFIFO not-empty flag" "B_0x0,B_0x1" bitfld.long 0x30 2. "SSDRF,Snapshot data ready flag" "B_0x0,B_0x1" bitfld.long 0x30 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x30 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" line.long 0x34 "MDF_OEC4CR,MDF offset error compensation control register 4" hexmask.long 0x34 0.--25. 1. "OFFSET,Offset error compensation" rgroup.long 0x2EC++0x7 line.long 0x0 "MDF_SNPS4DR,MDF snapshot data register 4" hexmask.long.word 0x0 16.--31. 1. "SDR,Contains the 16 MSB of the last valid data processed by the digital filter." hexmask.long.byte 0x0 9.--15. 1. "EXTSDR,Extended data size" hexmask.long.word 0x0 0.--8. 1. "MCICDC,Contains the MCIC decimation counter value when the last trigger event occurs (MCIC_CNT)" line.long 0x4 "MDF_DFLT4DR,MDF digital filter data register 4" hexmask.long.tbyte 0x4 8.--31. 1. "DR,Data processed by digital filter" group.long 0x300++0x37 line.long 0x0 "MDF_SITF5CR,MDF serial interface control register 5" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "MDF_BSMX5CR,MDF bitstream matrix control register 5" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream Selection" line.long 0x8 "MDF_DFLT5CR,MDF digital filter control register 5" rbitfld.long 0x8 31. "DFLTACTIVE,Digital filter active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,Digital filter run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" bitfld.long 0x8 16. "SNPSFMT,Snapshot data format" "B_0x0,B_0x1" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x8 8. "TRGSENS,Digital filter trigger sensitivity selection" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ACQMOD,Digital filter trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,Digital filter enable" "B_0x0,B_0x1" line.long 0xC "MDF_DFLT5CICR,MDF digital filter configuration register 5" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "MDF_DFLT5RSFR,MDF reshape filter configuration register 5" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" line.long 0x14 "MDF_DFLT5INTR,MDF integrator configuration register 5" hexmask.long.byte 0x14 4.--10. 1. "INTVAL,Integration value selection" bitfld.long 0x14 0.--1. "INTDIV,Integrator output division" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "MDF_OLD5CR,MDF out-of limit detector control register 5" rbitfld.long 0x18 31. "OLDACTIVE,OLDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x18 17.--21. 1. "ACICD,OLDx CIC decimation ratio selection" bitfld.long 0x18 12.--13. "ACICN,OLDx CIC order selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x18 4.--7. 1. "BKOLD,Break signal assignment for out-of limit detector" bitfld.long 0x18 1. "THINB,Threshold In band" "B_0x0,B_0x1" bitfld.long 0x18 0. "OLDEN,OLDx enable" "B_0x0,B_0x1" line.long 0x1C "MDF_OLD5THLR,MDF OLD5 low threshold register 5" hexmask.long 0x1C 0.--25. 1. "OLDTHL,OLD low threshold value" line.long 0x20 "MDF_OLD5THHR,MDF OLD5 high threshold register 5" hexmask.long 0x20 0.--25. 1. "OLDTHH,OLDx high threshold value" line.long 0x24 "MDF_DLY5CR,MDF delay control register 5" rbitfld.long 0x24 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" line.long 0x28 "MDF_SCD5CR,MDF short circuit detector control register 5" rbitfld.long 0x28 31. "SCDACTIVE,SCDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x28 12.--19. 1. "SCDT,SCDx threshold" hexmask.long.byte 0x28 4.--7. 1. "BKSCD,Break signal assignment for short circuit detector" bitfld.long 0x28 0. "SCDEN,SCDx enable" "B_0x0,B_0x1" line.long 0x2C "MDF_DFLT5IER,MDF DFLT5 interrupt enable register 5" bitfld.long 0x2C 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SCDIE,SCDx interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SSOVRIE,Snapshot overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 4. "OLDIE,OLDx interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 2. "SSDRIE,Snapshot data ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x30 "MDF_DFLT5ISR,MDF DFLT5 interrupt status register 5" bitfld.long 0x30 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x30 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x30 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" bitfld.long 0x30 8. "SCDF,Short-circuit detector flag" "B_0x0,B_0x1" bitfld.long 0x30 7. "SSOVRF,Snapshot overrun flag" "B_0x0,B_0x1" rbitfld.long 0x30 6. "THHF,High-threshold status flag" "B_0x0,B_0x1" newline rbitfld.long 0x30 5. "THLF,Low-threshold status flag" "B_0x0,B_0x1" bitfld.long 0x30 4. "OLDF,OLDx flag" "B_0x0,B_0x1" rbitfld.long 0x30 3. "RXNEF,RXFIFO not-empty flag" "B_0x0,B_0x1" bitfld.long 0x30 2. "SSDRF,Snapshot data ready flag" "B_0x0,B_0x1" bitfld.long 0x30 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x30 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" line.long 0x34 "MDF_OEC5CR,MDF offset error compensation control register 5" hexmask.long 0x34 0.--25. 1. "OFFSET,Offset error compensation" rgroup.long 0x36C++0x7 line.long 0x0 "MDF_SNPS5DR,MDF snapshot data register 5" hexmask.long.word 0x0 16.--31. 1. "SDR,Contains the 16 MSB of the last valid data processed by the digital filter." hexmask.long.byte 0x0 9.--15. 1. "EXTSDR,Extended data size" hexmask.long.word 0x0 0.--8. 1. "MCICDC,Contains the MCIC decimation counter value when the last trigger event occurs (MCIC_CNT)" line.long 0x4 "MDF_DFLT5DR,MDF digital filter data register 5" hexmask.long.tbyte 0x4 8.--31. 1. "DR,Data processed by digital filter" group.long 0x380++0x37 line.long 0x0 "MDF_SITF6CR,MDF serial interface control register 6" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "MDF_BSMX6CR,MDF bitstream matrix control register 6" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream Selection" line.long 0x8 "MDF_DFLT6CR,MDF digital filter control register 6" rbitfld.long 0x8 31. "DFLTACTIVE,Digital filter active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,Digital filter run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" bitfld.long 0x8 16. "SNPSFMT,Snapshot data format" "B_0x0,B_0x1" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x8 8. "TRGSENS,Digital filter trigger sensitivity selection" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ACQMOD,Digital filter trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,Digital filter enable" "B_0x0,B_0x1" line.long 0xC "MDF_DFLT6CICR,MDF digital filter configuration register 6" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "MDF_DFLT6RSFR,MDF reshape filter configuration register 6" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" line.long 0x14 "MDF_DFLT6INTR,MDF integrator configuration register 6" hexmask.long.byte 0x14 4.--10. 1. "INTVAL,Integration value selection" bitfld.long 0x14 0.--1. "INTDIV,Integrator output division" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "MDF_OLD6CR,MDF out-of limit detector control register 6" rbitfld.long 0x18 31. "OLDACTIVE,OLDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x18 17.--21. 1. "ACICD,OLDx CIC decimation ratio selection" bitfld.long 0x18 12.--13. "ACICN,OLDx CIC order selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x18 4.--7. 1. "BKOLD,Break signal assignment for out-of limit detector" bitfld.long 0x18 1. "THINB,Threshold In band" "B_0x0,B_0x1" bitfld.long 0x18 0. "OLDEN,OLDx enable" "B_0x0,B_0x1" line.long 0x1C "MDF_OLD6THLR,MDF OLD6 low threshold register 6" hexmask.long 0x1C 0.--25. 1. "OLDTHL,OLD low threshold value" line.long 0x20 "MDF_OLD6THHR,MDF OLD6 high threshold register 6" hexmask.long 0x20 0.--25. 1. "OLDTHH,OLDx high threshold value" line.long 0x24 "MDF_DLY6CR,MDF delay control register 6" rbitfld.long 0x24 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" line.long 0x28 "MDF_SCD6CR,MDF short circuit detector control register 6" rbitfld.long 0x28 31. "SCDACTIVE,SCDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x28 12.--19. 1. "SCDT,SCDx threshold" hexmask.long.byte 0x28 4.--7. 1. "BKSCD,Break signal assignment for short circuit detector" bitfld.long 0x28 0. "SCDEN,SCDx enable" "B_0x0,B_0x1" line.long 0x2C "MDF_DFLT6IER,MDF DFLT6 interrupt enable register 6" bitfld.long 0x2C 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SCDIE,SCDx interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SSOVRIE,Snapshot overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 4. "OLDIE,OLDx interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 2. "SSDRIE,Snapshot data ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x30 "MDF_DFLT6ISR,MDF DFLT6 interrupt status register 6" bitfld.long 0x30 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x30 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x30 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" bitfld.long 0x30 8. "SCDF,Short-circuit detector flag" "B_0x0,B_0x1" bitfld.long 0x30 7. "SSOVRF,Snapshot overrun flag" "B_0x0,B_0x1" rbitfld.long 0x30 6. "THHF,High-threshold status flag" "B_0x0,B_0x1" newline rbitfld.long 0x30 5. "THLF,Low-threshold status flag" "B_0x0,B_0x1" bitfld.long 0x30 4. "OLDF,OLDx flag" "B_0x0,B_0x1" rbitfld.long 0x30 3. "RXNEF,RXFIFO not-empty flag" "B_0x0,B_0x1" bitfld.long 0x30 2. "SSDRF,Snapshot data ready flag" "B_0x0,B_0x1" bitfld.long 0x30 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x30 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" line.long 0x34 "MDF_OEC6CR,MDF offset error compensation control register 6" hexmask.long 0x34 0.--25. 1. "OFFSET,Offset error compensation" rgroup.long 0x3EC++0x7 line.long 0x0 "MDF_SNPS6DR,MDF snapshot data register 6" hexmask.long.word 0x0 16.--31. 1. "SDR,Contains the 16 MSB of the last valid data processed by the digital filter." hexmask.long.byte 0x0 9.--15. 1. "EXTSDR,Extended data size" hexmask.long.word 0x0 0.--8. 1. "MCICDC,Contains the MCIC decimation counter value when the last trigger event occurs (MCIC_CNT)" line.long 0x4 "MDF_DFLT6DR,MDF digital filter data register 6" hexmask.long.tbyte 0x4 8.--31. 1. "DR,Data processed by digital filter" group.long 0x400++0x37 line.long 0x0 "MDF_SITF7CR,MDF serial interface control register 7" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "MDF_BSMX7CR,MDF bitstream matrix control register 7" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream Selection" line.long 0x8 "MDF_DFLT7CR,MDF digital filter control register 7" rbitfld.long 0x8 31. "DFLTACTIVE,Digital filter active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,Digital filter run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" bitfld.long 0x8 16. "SNPSFMT,Snapshot data format" "B_0x0,B_0x1" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x8 8. "TRGSENS,Digital filter trigger sensitivity selection" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ACQMOD,Digital filter trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,Digital filter enable" "B_0x0,B_0x1" line.long 0xC "MDF_DFLT7CICR,MDF digital filter configuration register 7" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "MDF_DFLT7RSFR,MDF reshape filter configuration register 7" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" line.long 0x14 "MDF_DFLT7INTR,MDF integrator configuration register 7" hexmask.long.byte 0x14 4.--10. 1. "INTVAL,Integration value selection" bitfld.long 0x14 0.--1. "INTDIV,Integrator output division" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "MDF_OLD7CR,MDF out-of limit detector control register 7" rbitfld.long 0x18 31. "OLDACTIVE,OLDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x18 17.--21. 1. "ACICD,OLDx CIC decimation ratio selection" bitfld.long 0x18 12.--13. "ACICN,OLDx CIC order selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x18 4.--7. 1. "BKOLD,Break signal assignment for out-of limit detector" bitfld.long 0x18 1. "THINB,Threshold In band" "B_0x0,B_0x1" bitfld.long 0x18 0. "OLDEN,OLDx enable" "B_0x0,B_0x1" line.long 0x1C "MDF_OLD7THLR,MDF OLD7 low threshold register 7" hexmask.long 0x1C 0.--25. 1. "OLDTHL,OLD low threshold value" line.long 0x20 "MDF_OLD7THHR,MDF OLD7 high threshold register 7" hexmask.long 0x20 0.--25. 1. "OLDTHH,OLDx high threshold value" line.long 0x24 "MDF_DLY7CR,MDF delay control register 7" rbitfld.long 0x24 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" line.long 0x28 "MDF_SCD7CR,MDF short circuit detector control register 7" rbitfld.long 0x28 31. "SCDACTIVE,SCDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x28 12.--19. 1. "SCDT,SCDx threshold" hexmask.long.byte 0x28 4.--7. 1. "BKSCD,Break signal assignment for short circuit detector" bitfld.long 0x28 0. "SCDEN,SCDx enable" "B_0x0,B_0x1" line.long 0x2C "MDF_DFLT7IER,MDF DFLT7 interrupt enable register 7" bitfld.long 0x2C 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SCDIE,SCDx interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SSOVRIE,Snapshot overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 4. "OLDIE,OLDx interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 2. "SSDRIE,Snapshot data ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x30 "MDF_DFLT7ISR,MDF DFLT7 interrupt status register 7" bitfld.long 0x30 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x30 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x30 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" bitfld.long 0x30 8. "SCDF,Short-circuit detector flag" "B_0x0,B_0x1" bitfld.long 0x30 7. "SSOVRF,Snapshot overrun flag" "B_0x0,B_0x1" rbitfld.long 0x30 6. "THHF,High-threshold status flag" "B_0x0,B_0x1" newline rbitfld.long 0x30 5. "THLF,Low-threshold status flag" "B_0x0,B_0x1" bitfld.long 0x30 4. "OLDF,OLDx flag" "B_0x0,B_0x1" rbitfld.long 0x30 3. "RXNEF,RXFIFO not-empty flag" "B_0x0,B_0x1" bitfld.long 0x30 2. "SSDRF,Snapshot data ready flag" "B_0x0,B_0x1" bitfld.long 0x30 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x30 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" line.long 0x34 "MDF_OEC7CR,MDF offset error compensation control register 7" hexmask.long 0x34 0.--25. 1. "OFFSET,Offset error compensation" rgroup.long 0x46C++0x7 line.long 0x0 "MDF_SNPS7DR,MDF snapshot data register 7" hexmask.long.word 0x0 16.--31. 1. "SDR,Contains the 16 MSB of the last valid data processed by the digital filter." hexmask.long.byte 0x0 9.--15. 1. "EXTSDR,Extended data size" hexmask.long.word 0x0 0.--8. 1. "MCICDC,Contains the MCIC decimation counter value when the last trigger event occurs (MCIC_CNT)" line.long 0x4 "MDF_DFLT7DR,MDF digital filter data register 7" hexmask.long.tbyte 0x4 8.--31. 1. "DR,Data processed by digital filter" rgroup.long 0xFF0++0xF line.long 0x0 "MDF_HWCFGR,MDF hardware configuration register" hexmask.long.byte 0x0 24.--31. 1. "OPTION_REGOUT,Support of MDF_OR register" hexmask.long.byte 0x0 20.--23. 1. "SAD,Sound activity detection" hexmask.long.byte 0x0 16.--19. 1. "FLT_CFG,Digital filter configuration" hexmask.long.byte 0x0 8.--15. 1. "NBF,Number of digital filter paths and serial interfaces" hexmask.long.byte 0x0 0.--7. 1. "FIFO_SIZE,FIFO size for MDF" line.long 0x4 "MDF_VERR,MDF version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,MDF major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,MDF minor revision" line.long 0x8 "MDF_IPIDR,MDF identification register" hexmask.long 0x8 0.--31. 1. "ID,MDF identifier value" line.long 0xC "MDF_SIDR,MDF size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification" tree.end tree "MDF1_S" base ad:0x504D0000 group.long 0x0++0x7 line.long 0x0 "MDF_GCR,MDF global control register" hexmask.long.byte 0x0 4.--7. 1. "ILVNB,Interleaved number" bitfld.long 0x0 0. "TRGO,Trigger output control" "B_0x0,B_0x1" line.long 0x4 "MDF_CKGCR,MDF clock generator control register" rbitfld.long 0x4 31. "CKGACTIVE,Clock generator active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 24.--30. 1. "PROCDIV,Divider to control the serial interface clock" hexmask.long.byte 0x4 16.--19. 1. "CCKDIV,Divider to control the MDF_CCK clock" hexmask.long.byte 0x4 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x4 8. "TRGSENS,CKGEN trigger sensitivity selection" "B_0x0,B_0x1" bitfld.long 0x4 6. "CCK1DIR,MDF_CCK1 direction" "B_0x0,B_0x1" newline bitfld.long 0x4 5. "CCK0DIR,MDF_CCK0 direction" "B_0x0,B_0x1" bitfld.long 0x4 4. "CKGMOD,Clock generator mode" "B_0x0,B_0x1" bitfld.long 0x4 2. "CCK1EN,MDF_CCK1 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CCK0EN,MDF_CCK0 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CKGDEN,CKGEN dividers enable" "B_0x0,B_0x1" group.long 0x80++0x37 line.long 0x0 "MDF_SITF0CR,MDF serial interface control register 0" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "MDF_BSMX0CR,MDF bitstream matrix control register 0" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream Selection" line.long 0x8 "MDF_DFLT0CR,MDF digital filter control register 0" rbitfld.long 0x8 31. "DFLTACTIVE,Digital filter active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,Digital filter run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" bitfld.long 0x8 16. "SNPSFMT,Snapshot data format" "B_0x0,B_0x1" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x8 8. "TRGSENS,Digital filter trigger sensitivity selection" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ACQMOD,Digital filter trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,Digital filter enable" "B_0x0,B_0x1" line.long 0xC "MDF_DFLT0CICR,MDF digital filter configuration register 0" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "MDF_DFLT0RSFR,MDF reshape filter configuration register 0" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" line.long 0x14 "MDF_DFLT0INTR,MDF integrator configuration register 0" hexmask.long.byte 0x14 4.--10. 1. "INTVAL,Integration value selection" bitfld.long 0x14 0.--1. "INTDIV,Integrator output division" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "MDF_OLD0CR,MDF out-of limit detector control register 0" rbitfld.long 0x18 31. "OLDACTIVE,OLDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x18 17.--21. 1. "ACICD,OLDx CIC decimation ratio selection" bitfld.long 0x18 12.--13. "ACICN,OLDx CIC order selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x18 4.--7. 1. "BKOLD,Break signal assignment for out-of limit detector" bitfld.long 0x18 1. "THINB,Threshold In band" "B_0x0,B_0x1" bitfld.long 0x18 0. "OLDEN,OLDx enable" "B_0x0,B_0x1" line.long 0x1C "MDF_OLD0THLR,MDF OLD0 low threshold register 0" hexmask.long 0x1C 0.--25. 1. "OLDTHL,OLD low threshold value" line.long 0x20 "MDF_OLD0THHR,MDF OLD0 high threshold register 0" hexmask.long 0x20 0.--25. 1. "OLDTHH,OLDx high threshold value" line.long 0x24 "MDF_DLY0CR,MDF delay control register 0" rbitfld.long 0x24 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" line.long 0x28 "MDF_SCD0CR,MDF short circuit detector control register 0" rbitfld.long 0x28 31. "SCDACTIVE,SCDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x28 12.--19. 1. "SCDT,SCDx threshold" hexmask.long.byte 0x28 4.--7. 1. "BKSCD,Break signal assignment for short circuit detector" bitfld.long 0x28 0. "SCDEN,SCDx enable" "B_0x0,B_0x1" line.long 0x2C "MDF_DFLT0IER,MDF DFLT0 interrupt enable register 0" bitfld.long 0x2C 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SCDIE,SCD0 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SSOVRIE,Snapshot overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 4. "OLDIE,OLD0 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 2. "SSDRIE,Snapshot data ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x30 "MDF_DFLT0ISR,MDF DFLT0 interrupt status register 0" bitfld.long 0x30 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x30 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x30 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" bitfld.long 0x30 8. "SCDF,Short-circuit detector flag" "B_0x0,B_0x1" bitfld.long 0x30 7. "SSOVRF,Snapshot overrun flag" "B_0x0,B_0x1" rbitfld.long 0x30 6. "THHF,High-threshold status flag" "B_0x0,B_0x1" newline rbitfld.long 0x30 5. "THLF,Low-threshold status flag" "B_0x0,B_0x1" bitfld.long 0x30 4. "OLDF,OLD0 flag" "B_0x0,B_0x1" rbitfld.long 0x30 3. "RXNEF,RXFIFO not-empty flag" "B_0x0,B_0x1" bitfld.long 0x30 2. "SSDRF,Snapshot data ready flag" "B_0x0,B_0x1" bitfld.long 0x30 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x30 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" line.long 0x34 "MDF_OEC0CR,MDF offset error compensation control register 0" hexmask.long 0x34 0.--25. 1. "OFFSET,Offset error compensation" rgroup.long 0xEC++0x7 line.long 0x0 "MDF_SNPS0DR,MDF snapshot data register 0" hexmask.long.word 0x0 16.--31. 1. "SDR,Contains the 16 MSB of the last valid data processed by the digital filter." hexmask.long.byte 0x0 9.--15. 1. "EXTSDR,Extended data size" hexmask.long.word 0x0 0.--8. 1. "MCICDC,Contains the MCIC decimation counter value when the last trigger event occurs (MCIC_CNT)" line.long 0x4 "MDF_DFLT0DR,MDF digital filter data register 0" hexmask.long.tbyte 0x4 8.--31. 1. "DR,Data processed by digital filter" group.long 0x100++0x37 line.long 0x0 "MDF_SITF1CR,MDF serial interface control register 1" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "MDF_BSMX1CR,MDF bitstream matrix control register 1" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream Selection" line.long 0x8 "MDF_DFLT1CR,MDF digital filter control register 1" rbitfld.long 0x8 31. "DFLTACTIVE,Digital filter active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,Digital filter run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" bitfld.long 0x8 16. "SNPSFMT,Snapshot data format" "B_0x0,B_0x1" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x8 8. "TRGSENS,Digital filter trigger sensitivity selection" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ACQMOD,Digital filter trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,Digital filter enable" "B_0x0,B_0x1" line.long 0xC "MDF_DFLT1CICR,MDF digital filter configuration register 1" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "MDF_DFLT1RSFR,MDF reshape filter configuration register 1" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" line.long 0x14 "MDF_DFLT1INTR,MDF integrator configuration register 1" hexmask.long.byte 0x14 4.--10. 1. "INTVAL,Integration value selection" bitfld.long 0x14 0.--1. "INTDIV,Integrator output division" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "MDF_OLD1CR,MDF out-of limit detector control register 1" rbitfld.long 0x18 31. "OLDACTIVE,OLDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x18 17.--21. 1. "ACICD,OLDx CIC decimation ratio selection" bitfld.long 0x18 12.--13. "ACICN,OLDx CIC order selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x18 4.--7. 1. "BKOLD,Break signal assignment for out-of limit detector" bitfld.long 0x18 1. "THINB,Threshold In band" "B_0x0,B_0x1" bitfld.long 0x18 0. "OLDEN,OLDx enable" "B_0x0,B_0x1" line.long 0x1C "MDF_OLD1THLR,MDF OLD1 low threshold register 1" hexmask.long 0x1C 0.--25. 1. "OLDTHL,OLD low threshold value" line.long 0x20 "MDF_OLD1THHR,MDF OLD1 high threshold register 1" hexmask.long 0x20 0.--25. 1. "OLDTHH,OLDx high threshold value" line.long 0x24 "MDF_DLY1CR,MDF delay control register 1" rbitfld.long 0x24 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" line.long 0x28 "MDF_SCD1CR,MDF short circuit detector control register 1" rbitfld.long 0x28 31. "SCDACTIVE,SCDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x28 12.--19. 1. "SCDT,SCDx threshold" hexmask.long.byte 0x28 4.--7. 1. "BKSCD,Break signal assignment for short circuit detector" bitfld.long 0x28 0. "SCDEN,SCDx enable" "B_0x0,B_0x1" line.long 0x2C "MDF_DFLT1IER,MDF DFLT1 interrupt enable register 1" bitfld.long 0x2C 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SCDIE,SCDx interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SSOVRIE,Snapshot overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 4. "OLDIE,OLDx interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 2. "SSDRIE,Snapshot data ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x30 "MDF_DFLT1ISR,MDF DFLT1 interrupt status register 1" bitfld.long 0x30 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x30 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x30 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" bitfld.long 0x30 8. "SCDF,Short-circuit detector flag" "B_0x0,B_0x1" bitfld.long 0x30 7. "SSOVRF,Snapshot overrun flag" "B_0x0,B_0x1" rbitfld.long 0x30 6. "THHF,High-threshold status flag" "B_0x0,B_0x1" newline rbitfld.long 0x30 5. "THLF,Low-threshold status flag" "B_0x0,B_0x1" bitfld.long 0x30 4. "OLDF,OLDx flag" "B_0x0,B_0x1" rbitfld.long 0x30 3. "RXNEF,RXFIFO not-empty flag" "B_0x0,B_0x1" bitfld.long 0x30 2. "SSDRF,Snapshot data ready flag" "B_0x0,B_0x1" bitfld.long 0x30 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x30 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" line.long 0x34 "MDF_OEC1CR,MDF offset error compensation control register 1" hexmask.long 0x34 0.--25. 1. "OFFSET,Offset error compensation" rgroup.long 0x16C++0x7 line.long 0x0 "MDF_SNPS1DR,MDF snapshot data register 1" hexmask.long.word 0x0 16.--31. 1. "SDR,Contains the 16 MSB of the last valid data processed by the digital filter." hexmask.long.byte 0x0 9.--15. 1. "EXTSDR,Extended data size" hexmask.long.word 0x0 0.--8. 1. "MCICDC,Contains the MCIC decimation counter value when the last trigger event occurs (MCIC_CNT)" line.long 0x4 "MDF_DFLT1DR,MDF digital filter data register 1" hexmask.long.tbyte 0x4 8.--31. 1. "DR,Data processed by digital filter" group.long 0x180++0x37 line.long 0x0 "MDF_SITF2CR,MDF serial interface control register 2" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "MDF_BSMX2CR,MDF bitstream matrix control register 2" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream Selection" line.long 0x8 "MDF_DFLT2CR,MDF digital filter control register 2" rbitfld.long 0x8 31. "DFLTACTIVE,Digital filter active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,Digital filter run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" bitfld.long 0x8 16. "SNPSFMT,Snapshot data format" "B_0x0,B_0x1" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x8 8. "TRGSENS,Digital filter trigger sensitivity selection" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ACQMOD,Digital filter trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,Digital filter enable" "B_0x0,B_0x1" line.long 0xC "MDF_DFLT2CICR,MDF digital filter configuration register 2" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "MDF_DFLT2RSFR,MDF reshape filter configuration register 2" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" line.long 0x14 "MDF_DFLT2INTR,MDF integrator configuration register 2" hexmask.long.byte 0x14 4.--10. 1. "INTVAL,Integration value selection" bitfld.long 0x14 0.--1. "INTDIV,Integrator output division" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "MDF_OLD2CR,MDF out-of limit detector control register 2" rbitfld.long 0x18 31. "OLDACTIVE,OLDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x18 17.--21. 1. "ACICD,OLDx CIC decimation ratio selection" bitfld.long 0x18 12.--13. "ACICN,OLDx CIC order selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x18 4.--7. 1. "BKOLD,Break signal assignment for out-of limit detector" bitfld.long 0x18 1. "THINB,Threshold In band" "B_0x0,B_0x1" bitfld.long 0x18 0. "OLDEN,OLDx enable" "B_0x0,B_0x1" line.long 0x1C "MDF_OLD2THLR,MDF OLD2 low threshold register 2" hexmask.long 0x1C 0.--25. 1. "OLDTHL,OLD low threshold value" line.long 0x20 "MDF_OLD2THHR,MDF OLD2 high threshold register 2" hexmask.long 0x20 0.--25. 1. "OLDTHH,OLDx high threshold value" line.long 0x24 "MDF_DLY2CR,MDF delay control register 2" rbitfld.long 0x24 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" line.long 0x28 "MDF_SCD2CR,MDF short circuit detector control register 2" rbitfld.long 0x28 31. "SCDACTIVE,SCDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x28 12.--19. 1. "SCDT,SCDx threshold" hexmask.long.byte 0x28 4.--7. 1. "BKSCD,Break signal assignment for short circuit detector" bitfld.long 0x28 0. "SCDEN,SCDx enable" "B_0x0,B_0x1" line.long 0x2C "MDF_DFLT2IER,MDF DFLT2 interrupt enable register 2" bitfld.long 0x2C 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SCDIE,SCDx interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SSOVRIE,Snapshot overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 4. "OLDIE,OLDx interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 2. "SSDRIE,Snapshot data ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x30 "MDF_DFLT2ISR,MDF DFLT2 interrupt status register 2" bitfld.long 0x30 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x30 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x30 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" bitfld.long 0x30 8. "SCDF,Short-circuit detector flag" "B_0x0,B_0x1" bitfld.long 0x30 7. "SSOVRF,Snapshot overrun flag" "B_0x0,B_0x1" rbitfld.long 0x30 6. "THHF,High-threshold status flag" "B_0x0,B_0x1" newline rbitfld.long 0x30 5. "THLF,Low-threshold status flag" "B_0x0,B_0x1" bitfld.long 0x30 4. "OLDF,OLDx flag" "B_0x0,B_0x1" rbitfld.long 0x30 3. "RXNEF,RXFIFO not-empty flag" "B_0x0,B_0x1" bitfld.long 0x30 2. "SSDRF,Snapshot data ready flag" "B_0x0,B_0x1" bitfld.long 0x30 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x30 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" line.long 0x34 "MDF_OEC2CR,MDF offset error compensation control register 2" hexmask.long 0x34 0.--25. 1. "OFFSET,Offset error compensation" rgroup.long 0x1EC++0x7 line.long 0x0 "MDF_SNPS2DR,MDF snapshot data register 2" hexmask.long.word 0x0 16.--31. 1. "SDR,Contains the 16 MSB of the last valid data processed by the digital filter." hexmask.long.byte 0x0 9.--15. 1. "EXTSDR,Extended data size" hexmask.long.word 0x0 0.--8. 1. "MCICDC,Contains the MCIC decimation counter value when the last trigger event occurs (MCIC_CNT)" line.long 0x4 "MDF_DFLT2DR,MDF digital filter data register 2" hexmask.long.tbyte 0x4 8.--31. 1. "DR,Data processed by digital filter" group.long 0x200++0x37 line.long 0x0 "MDF_SITF3CR,MDF serial interface control register 3" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "MDF_BSMX3CR,MDF bitstream matrix control register 3" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream Selection" line.long 0x8 "MDF_DFLT3CR,MDF digital filter control register 3" rbitfld.long 0x8 31. "DFLTACTIVE,Digital filter active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,Digital filter run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" bitfld.long 0x8 16. "SNPSFMT,Snapshot data format" "B_0x0,B_0x1" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x8 8. "TRGSENS,Digital filter trigger sensitivity selection" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ACQMOD,Digital filter trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,Digital filter enable" "B_0x0,B_0x1" line.long 0xC "MDF_DFLT3CICR,MDF digital filter configuration register 3" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "MDF_DFLT3RSFR,MDF reshape filter configuration register 3" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" line.long 0x14 "MDF_DFLT3INTR,MDF integrator configuration register 3" hexmask.long.byte 0x14 4.--10. 1. "INTVAL,Integration value selection" bitfld.long 0x14 0.--1. "INTDIV,Integrator output division" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "MDF_OLD3CR,MDF out-of limit detector control register 3" rbitfld.long 0x18 31. "OLDACTIVE,OLDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x18 17.--21. 1. "ACICD,OLDx CIC decimation ratio selection" bitfld.long 0x18 12.--13. "ACICN,OLDx CIC order selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x18 4.--7. 1. "BKOLD,Break signal assignment for out-of limit detector" bitfld.long 0x18 1. "THINB,Threshold In band" "B_0x0,B_0x1" bitfld.long 0x18 0. "OLDEN,OLDx enable" "B_0x0,B_0x1" line.long 0x1C "MDF_OLD3THLR,MDF OLD3 low threshold register 3" hexmask.long 0x1C 0.--25. 1. "OLDTHL,OLD low threshold value" line.long 0x20 "MDF_OLD3THHR,MDF OLD3 high threshold register 3" hexmask.long 0x20 0.--25. 1. "OLDTHH,OLDx high threshold value" line.long 0x24 "MDF_DLY3CR,MDF delay control register 3" rbitfld.long 0x24 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" line.long 0x28 "MDF_SCD3CR,MDF short circuit detector control register 3" rbitfld.long 0x28 31. "SCDACTIVE,SCDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x28 12.--19. 1. "SCDT,SCDx threshold" hexmask.long.byte 0x28 4.--7. 1. "BKSCD,Break signal assignment for short circuit detector" bitfld.long 0x28 0. "SCDEN,SCDx enable" "B_0x0,B_0x1" line.long 0x2C "MDF_DFLT3IER,MDF DFLT3 interrupt enable register 3" bitfld.long 0x2C 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SCDIE,SCDx interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SSOVRIE,Snapshot overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 4. "OLDIE,OLDx interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 2. "SSDRIE,Snapshot data ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x30 "MDF_DFLT3ISR,MDF DFLT3 interrupt status register 3" bitfld.long 0x30 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x30 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x30 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" bitfld.long 0x30 8. "SCDF,Short-circuit detector flag" "B_0x0,B_0x1" bitfld.long 0x30 7. "SSOVRF,Snapshot overrun flag" "B_0x0,B_0x1" rbitfld.long 0x30 6. "THHF,High-threshold status flag" "B_0x0,B_0x1" newline rbitfld.long 0x30 5. "THLF,Low-threshold status flag" "B_0x0,B_0x1" bitfld.long 0x30 4. "OLDF,OLDx flag" "B_0x0,B_0x1" rbitfld.long 0x30 3. "RXNEF,RXFIFO not-empty flag" "B_0x0,B_0x1" bitfld.long 0x30 2. "SSDRF,Snapshot data ready flag" "B_0x0,B_0x1" bitfld.long 0x30 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x30 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" line.long 0x34 "MDF_OEC3CR,MDF offset error compensation control register 3" hexmask.long 0x34 0.--25. 1. "OFFSET,Offset error compensation" rgroup.long 0x26C++0x7 line.long 0x0 "MDF_SNPS3DR,MDF snapshot data register 3" hexmask.long.word 0x0 16.--31. 1. "SDR,Contains the 16 MSB of the last valid data processed by the digital filter." hexmask.long.byte 0x0 9.--15. 1. "EXTSDR,Extended data size" hexmask.long.word 0x0 0.--8. 1. "MCICDC,Contains the MCIC decimation counter value when the last trigger event occurs (MCIC_CNT)" line.long 0x4 "MDF_DFLT3DR,MDF digital filter data register 3" hexmask.long.tbyte 0x4 8.--31. 1. "DR,Data processed by digital filter" group.long 0x280++0x37 line.long 0x0 "MDF_SITF4CR,MDF serial interface control register 4" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "MDF_BSMX4CR,MDF bitstream matrix control register 4" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream Selection" line.long 0x8 "MDF_DFLT4CR,MDF digital filter control register 4" rbitfld.long 0x8 31. "DFLTACTIVE,Digital filter active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,Digital filter run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" bitfld.long 0x8 16. "SNPSFMT,Snapshot data format" "B_0x0,B_0x1" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x8 8. "TRGSENS,Digital filter trigger sensitivity selection" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ACQMOD,Digital filter trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,Digital filter enable" "B_0x0,B_0x1" line.long 0xC "MDF_DFLT4CICR,MDF digital filter configuration register 4" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "MDF_DFLT4RSFR,MDF reshape filter configuration register 4" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" line.long 0x14 "MDF_DFLT4INTR,MDF integrator configuration register 4" hexmask.long.byte 0x14 4.--10. 1. "INTVAL,Integration value selection" bitfld.long 0x14 0.--1. "INTDIV,Integrator output division" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "MDF_OLD4CR,MDF out-of limit detector control register 4" rbitfld.long 0x18 31. "OLDACTIVE,OLDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x18 17.--21. 1. "ACICD,OLDx CIC decimation ratio selection" bitfld.long 0x18 12.--13. "ACICN,OLDx CIC order selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x18 4.--7. 1. "BKOLD,Break signal assignment for out-of limit detector" bitfld.long 0x18 1. "THINB,Threshold In band" "B_0x0,B_0x1" bitfld.long 0x18 0. "OLDEN,OLDx enable" "B_0x0,B_0x1" line.long 0x1C "MDF_OLD4THLR,MDF OLD4 low threshold register 4" hexmask.long 0x1C 0.--25. 1. "OLDTHL,OLD low threshold value" line.long 0x20 "MDF_OLD4THHR,MDF OLD4 high threshold register 4" hexmask.long 0x20 0.--25. 1. "OLDTHH,OLDx high threshold value" line.long 0x24 "MDF_DLY4CR,MDF delay control register 4" rbitfld.long 0x24 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" line.long 0x28 "MDF_SCD4CR,MDF short circuit detector control register 4" rbitfld.long 0x28 31. "SCDACTIVE,SCDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x28 12.--19. 1. "SCDT,SCDx threshold" hexmask.long.byte 0x28 4.--7. 1. "BKSCD,Break signal assignment for short circuit detector" bitfld.long 0x28 0. "SCDEN,SCDx enable" "B_0x0,B_0x1" line.long 0x2C "MDF_DFLT4IER,MDF DFLT4 interrupt enable register 4" bitfld.long 0x2C 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SCDIE,SCDx interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SSOVRIE,Snapshot overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 4. "OLDIE,OLDx interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 2. "SSDRIE,Snapshot data ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x30 "MDF_DFLT4ISR,MDF DFLT4 interrupt status register 4" bitfld.long 0x30 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x30 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x30 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" bitfld.long 0x30 8. "SCDF,Short-circuit detector flag" "B_0x0,B_0x1" bitfld.long 0x30 7. "SSOVRF,Snapshot overrun flag" "B_0x0,B_0x1" rbitfld.long 0x30 6. "THHF,High-threshold status flag" "B_0x0,B_0x1" newline rbitfld.long 0x30 5. "THLF,Low-threshold status flag" "B_0x0,B_0x1" bitfld.long 0x30 4. "OLDF,OLDx flag" "B_0x0,B_0x1" rbitfld.long 0x30 3. "RXNEF,RXFIFO not-empty flag" "B_0x0,B_0x1" bitfld.long 0x30 2. "SSDRF,Snapshot data ready flag" "B_0x0,B_0x1" bitfld.long 0x30 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x30 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" line.long 0x34 "MDF_OEC4CR,MDF offset error compensation control register 4" hexmask.long 0x34 0.--25. 1. "OFFSET,Offset error compensation" rgroup.long 0x2EC++0x7 line.long 0x0 "MDF_SNPS4DR,MDF snapshot data register 4" hexmask.long.word 0x0 16.--31. 1. "SDR,Contains the 16 MSB of the last valid data processed by the digital filter." hexmask.long.byte 0x0 9.--15. 1. "EXTSDR,Extended data size" hexmask.long.word 0x0 0.--8. 1. "MCICDC,Contains the MCIC decimation counter value when the last trigger event occurs (MCIC_CNT)" line.long 0x4 "MDF_DFLT4DR,MDF digital filter data register 4" hexmask.long.tbyte 0x4 8.--31. 1. "DR,Data processed by digital filter" group.long 0x300++0x37 line.long 0x0 "MDF_SITF5CR,MDF serial interface control register 5" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "MDF_BSMX5CR,MDF bitstream matrix control register 5" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream Selection" line.long 0x8 "MDF_DFLT5CR,MDF digital filter control register 5" rbitfld.long 0x8 31. "DFLTACTIVE,Digital filter active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,Digital filter run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" bitfld.long 0x8 16. "SNPSFMT,Snapshot data format" "B_0x0,B_0x1" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x8 8. "TRGSENS,Digital filter trigger sensitivity selection" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ACQMOD,Digital filter trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,Digital filter enable" "B_0x0,B_0x1" line.long 0xC "MDF_DFLT5CICR,MDF digital filter configuration register 5" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "MDF_DFLT5RSFR,MDF reshape filter configuration register 5" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" line.long 0x14 "MDF_DFLT5INTR,MDF integrator configuration register 5" hexmask.long.byte 0x14 4.--10. 1. "INTVAL,Integration value selection" bitfld.long 0x14 0.--1. "INTDIV,Integrator output division" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "MDF_OLD5CR,MDF out-of limit detector control register 5" rbitfld.long 0x18 31. "OLDACTIVE,OLDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x18 17.--21. 1. "ACICD,OLDx CIC decimation ratio selection" bitfld.long 0x18 12.--13. "ACICN,OLDx CIC order selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x18 4.--7. 1. "BKOLD,Break signal assignment for out-of limit detector" bitfld.long 0x18 1. "THINB,Threshold In band" "B_0x0,B_0x1" bitfld.long 0x18 0. "OLDEN,OLDx enable" "B_0x0,B_0x1" line.long 0x1C "MDF_OLD5THLR,MDF OLD5 low threshold register 5" hexmask.long 0x1C 0.--25. 1. "OLDTHL,OLD low threshold value" line.long 0x20 "MDF_OLD5THHR,MDF OLD5 high threshold register 5" hexmask.long 0x20 0.--25. 1. "OLDTHH,OLDx high threshold value" line.long 0x24 "MDF_DLY5CR,MDF delay control register 5" rbitfld.long 0x24 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" line.long 0x28 "MDF_SCD5CR,MDF short circuit detector control register 5" rbitfld.long 0x28 31. "SCDACTIVE,SCDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x28 12.--19. 1. "SCDT,SCDx threshold" hexmask.long.byte 0x28 4.--7. 1. "BKSCD,Break signal assignment for short circuit detector" bitfld.long 0x28 0. "SCDEN,SCDx enable" "B_0x0,B_0x1" line.long 0x2C "MDF_DFLT5IER,MDF DFLT5 interrupt enable register 5" bitfld.long 0x2C 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SCDIE,SCDx interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SSOVRIE,Snapshot overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 4. "OLDIE,OLDx interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 2. "SSDRIE,Snapshot data ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x30 "MDF_DFLT5ISR,MDF DFLT5 interrupt status register 5" bitfld.long 0x30 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x30 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x30 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" bitfld.long 0x30 8. "SCDF,Short-circuit detector flag" "B_0x0,B_0x1" bitfld.long 0x30 7. "SSOVRF,Snapshot overrun flag" "B_0x0,B_0x1" rbitfld.long 0x30 6. "THHF,High-threshold status flag" "B_0x0,B_0x1" newline rbitfld.long 0x30 5. "THLF,Low-threshold status flag" "B_0x0,B_0x1" bitfld.long 0x30 4. "OLDF,OLDx flag" "B_0x0,B_0x1" rbitfld.long 0x30 3. "RXNEF,RXFIFO not-empty flag" "B_0x0,B_0x1" bitfld.long 0x30 2. "SSDRF,Snapshot data ready flag" "B_0x0,B_0x1" bitfld.long 0x30 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x30 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" line.long 0x34 "MDF_OEC5CR,MDF offset error compensation control register 5" hexmask.long 0x34 0.--25. 1. "OFFSET,Offset error compensation" rgroup.long 0x36C++0x7 line.long 0x0 "MDF_SNPS5DR,MDF snapshot data register 5" hexmask.long.word 0x0 16.--31. 1. "SDR,Contains the 16 MSB of the last valid data processed by the digital filter." hexmask.long.byte 0x0 9.--15. 1. "EXTSDR,Extended data size" hexmask.long.word 0x0 0.--8. 1. "MCICDC,Contains the MCIC decimation counter value when the last trigger event occurs (MCIC_CNT)" line.long 0x4 "MDF_DFLT5DR,MDF digital filter data register 5" hexmask.long.tbyte 0x4 8.--31. 1. "DR,Data processed by digital filter" group.long 0x380++0x37 line.long 0x0 "MDF_SITF6CR,MDF serial interface control register 6" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "MDF_BSMX6CR,MDF bitstream matrix control register 6" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream Selection" line.long 0x8 "MDF_DFLT6CR,MDF digital filter control register 6" rbitfld.long 0x8 31. "DFLTACTIVE,Digital filter active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,Digital filter run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" bitfld.long 0x8 16. "SNPSFMT,Snapshot data format" "B_0x0,B_0x1" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x8 8. "TRGSENS,Digital filter trigger sensitivity selection" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ACQMOD,Digital filter trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,Digital filter enable" "B_0x0,B_0x1" line.long 0xC "MDF_DFLT6CICR,MDF digital filter configuration register 6" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "MDF_DFLT6RSFR,MDF reshape filter configuration register 6" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" line.long 0x14 "MDF_DFLT6INTR,MDF integrator configuration register 6" hexmask.long.byte 0x14 4.--10. 1. "INTVAL,Integration value selection" bitfld.long 0x14 0.--1. "INTDIV,Integrator output division" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "MDF_OLD6CR,MDF out-of limit detector control register 6" rbitfld.long 0x18 31. "OLDACTIVE,OLDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x18 17.--21. 1. "ACICD,OLDx CIC decimation ratio selection" bitfld.long 0x18 12.--13. "ACICN,OLDx CIC order selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x18 4.--7. 1. "BKOLD,Break signal assignment for out-of limit detector" bitfld.long 0x18 1. "THINB,Threshold In band" "B_0x0,B_0x1" bitfld.long 0x18 0. "OLDEN,OLDx enable" "B_0x0,B_0x1" line.long 0x1C "MDF_OLD6THLR,MDF OLD6 low threshold register 6" hexmask.long 0x1C 0.--25. 1. "OLDTHL,OLD low threshold value" line.long 0x20 "MDF_OLD6THHR,MDF OLD6 high threshold register 6" hexmask.long 0x20 0.--25. 1. "OLDTHH,OLDx high threshold value" line.long 0x24 "MDF_DLY6CR,MDF delay control register 6" rbitfld.long 0x24 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" line.long 0x28 "MDF_SCD6CR,MDF short circuit detector control register 6" rbitfld.long 0x28 31. "SCDACTIVE,SCDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x28 12.--19. 1. "SCDT,SCDx threshold" hexmask.long.byte 0x28 4.--7. 1. "BKSCD,Break signal assignment for short circuit detector" bitfld.long 0x28 0. "SCDEN,SCDx enable" "B_0x0,B_0x1" line.long 0x2C "MDF_DFLT6IER,MDF DFLT6 interrupt enable register 6" bitfld.long 0x2C 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SCDIE,SCDx interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SSOVRIE,Snapshot overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 4. "OLDIE,OLDx interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 2. "SSDRIE,Snapshot data ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x30 "MDF_DFLT6ISR,MDF DFLT6 interrupt status register 6" bitfld.long 0x30 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x30 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x30 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" bitfld.long 0x30 8. "SCDF,Short-circuit detector flag" "B_0x0,B_0x1" bitfld.long 0x30 7. "SSOVRF,Snapshot overrun flag" "B_0x0,B_0x1" rbitfld.long 0x30 6. "THHF,High-threshold status flag" "B_0x0,B_0x1" newline rbitfld.long 0x30 5. "THLF,Low-threshold status flag" "B_0x0,B_0x1" bitfld.long 0x30 4. "OLDF,OLDx flag" "B_0x0,B_0x1" rbitfld.long 0x30 3. "RXNEF,RXFIFO not-empty flag" "B_0x0,B_0x1" bitfld.long 0x30 2. "SSDRF,Snapshot data ready flag" "B_0x0,B_0x1" bitfld.long 0x30 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x30 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" line.long 0x34 "MDF_OEC6CR,MDF offset error compensation control register 6" hexmask.long 0x34 0.--25. 1. "OFFSET,Offset error compensation" rgroup.long 0x3EC++0x7 line.long 0x0 "MDF_SNPS6DR,MDF snapshot data register 6" hexmask.long.word 0x0 16.--31. 1. "SDR,Contains the 16 MSB of the last valid data processed by the digital filter." hexmask.long.byte 0x0 9.--15. 1. "EXTSDR,Extended data size" hexmask.long.word 0x0 0.--8. 1. "MCICDC,Contains the MCIC decimation counter value when the last trigger event occurs (MCIC_CNT)" line.long 0x4 "MDF_DFLT6DR,MDF digital filter data register 6" hexmask.long.tbyte 0x4 8.--31. 1. "DR,Data processed by digital filter" group.long 0x400++0x37 line.long 0x0 "MDF_SITF7CR,MDF serial interface control register 7" rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold" bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "B_0x0,B_0x1,?,?" bitfld.long 0x0 0. "SITFEN,Serial interface enable" "B_0x0,B_0x1" line.long 0x4 "MDF_BSMX7CR,MDF bitstream matrix control register 7" rbitfld.long 0x4 31. "BSMXACTIVE,BSMX active flag" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream Selection" line.long 0x8 "MDF_DFLT7CR,MDF digital filter control register 7" rbitfld.long 0x8 31. "DFLTACTIVE,Digital filter active flag" "B_0x0,B_0x1" rbitfld.long 0x8 30. "DFLTRUN,Digital filter run status flag" "B_0x0,B_0x1" hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded" bitfld.long 0x8 16. "SNPSFMT,Snapshot data format" "B_0x0,B_0x1" hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,Digital filter trigger signal selection" bitfld.long 0x8 8. "TRGSENS,Digital filter trigger sensitivity selection" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ACQMOD,Digital filter trigger mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2. "FTH,RXFIFO threshold selection" "B_0x0,B_0x1" bitfld.long 0x8 1. "DMAEN,DMA requests enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "DFLTEN,Digital filter enable" "B_0x0,B_0x1" line.long 0xC "MDF_DFLT7CICR,MDF digital filter configuration register 7" hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection" bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection" bitfld.long 0xC 4.--6. "CICMOD,Select the CIC mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,B_0x2,B_0x3" line.long 0x10 "MDF_DFLT7RSFR,MDF reshape filter configuration register 7" bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "B_0x0,B_0x1" bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "B_0x0,B_0x1" bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "B_0x0,B_0x1" line.long 0x14 "MDF_DFLT7INTR,MDF integrator configuration register 7" hexmask.long.byte 0x14 4.--10. 1. "INTVAL,Integration value selection" bitfld.long 0x14 0.--1. "INTDIV,Integrator output division" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "MDF_OLD7CR,MDF out-of limit detector control register 7" rbitfld.long 0x18 31. "OLDACTIVE,OLDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x18 17.--21. 1. "ACICD,OLDx CIC decimation ratio selection" bitfld.long 0x18 12.--13. "ACICN,OLDx CIC order selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x18 4.--7. 1. "BKOLD,Break signal assignment for out-of limit detector" bitfld.long 0x18 1. "THINB,Threshold In band" "B_0x0,B_0x1" bitfld.long 0x18 0. "OLDEN,OLDx enable" "B_0x0,B_0x1" line.long 0x1C "MDF_OLD7THLR,MDF OLD7 low threshold register 7" hexmask.long 0x1C 0.--25. 1. "OLDTHL,OLD low threshold value" line.long 0x20 "MDF_OLD7THHR,MDF OLD7 high threshold register 7" hexmask.long 0x20 0.--25. 1. "OLDTHH,OLDx high threshold value" line.long 0x24 "MDF_DLY7CR,MDF delay control register 7" rbitfld.long 0x24 31. "SKPBF,Skip busy flag" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--6. 1. "SKPDLY,Delay to apply to a bitstream" line.long 0x28 "MDF_SCD7CR,MDF short circuit detector control register 7" rbitfld.long 0x28 31. "SCDACTIVE,SCDx active flag" "B_0x0,B_0x1" hexmask.long.byte 0x28 12.--19. 1. "SCDT,SCDx threshold" hexmask.long.byte 0x28 4.--7. 1. "BKSCD,Break signal assignment for short circuit detector" bitfld.long 0x28 0. "SCDEN,SCDx enable" "B_0x0,B_0x1" line.long 0x2C "MDF_DFLT7IER,MDF DFLT7 interrupt enable register 7" bitfld.long 0x2C 11. "RFOVRIE,Reshape filter overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 10. "CKABIE,Clock absence detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 9. "SATIE,Saturation detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 8. "SCDIE,SCDx interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "SSOVRIE,Snapshot overrun interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 4. "OLDIE,OLDx interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 2. "SSDRIE,Snapshot data ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DOVRIE,Data overflow interrupt enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FTHIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" line.long 0x30 "MDF_DFLT7ISR,MDF DFLT7 interrupt status register 7" bitfld.long 0x30 11. "RFOVRF,Reshape filter overrun detection flag" "B_0x0,B_0x1" bitfld.long 0x30 10. "CKABF,Clock absence detection flag" "B_0x0,B_0x1" bitfld.long 0x30 9. "SATF,Saturation detection flag" "B_0x0,B_0x1" bitfld.long 0x30 8. "SCDF,Short-circuit detector flag" "B_0x0,B_0x1" bitfld.long 0x30 7. "SSOVRF,Snapshot overrun flag" "B_0x0,B_0x1" rbitfld.long 0x30 6. "THHF,High-threshold status flag" "B_0x0,B_0x1" newline rbitfld.long 0x30 5. "THLF,Low-threshold status flag" "B_0x0,B_0x1" bitfld.long 0x30 4. "OLDF,OLDx flag" "B_0x0,B_0x1" rbitfld.long 0x30 3. "RXNEF,RXFIFO not-empty flag" "B_0x0,B_0x1" bitfld.long 0x30 2. "SSDRF,Snapshot data ready flag" "B_0x0,B_0x1" bitfld.long 0x30 1. "DOVRF,Data overflow flag" "B_0x0,B_0x1" rbitfld.long 0x30 0. "FTHF,RXFIFO threshold flag" "B_0x0,B_0x1" line.long 0x34 "MDF_OEC7CR,MDF offset error compensation control register 7" hexmask.long 0x34 0.--25. 1. "OFFSET,Offset error compensation" rgroup.long 0x46C++0x7 line.long 0x0 "MDF_SNPS7DR,MDF snapshot data register 7" hexmask.long.word 0x0 16.--31. 1. "SDR,Contains the 16 MSB of the last valid data processed by the digital filter." hexmask.long.byte 0x0 9.--15. 1. "EXTSDR,Extended data size" hexmask.long.word 0x0 0.--8. 1. "MCICDC,Contains the MCIC decimation counter value when the last trigger event occurs (MCIC_CNT)" line.long 0x4 "MDF_DFLT7DR,MDF digital filter data register 7" hexmask.long.tbyte 0x4 8.--31. 1. "DR,Data processed by digital filter" rgroup.long 0xFF0++0xF line.long 0x0 "MDF_HWCFGR,MDF hardware configuration register" hexmask.long.byte 0x0 24.--31. 1. "OPTION_REGOUT,Support of MDF_OR register" hexmask.long.byte 0x0 20.--23. 1. "SAD,Sound activity detection" hexmask.long.byte 0x0 16.--19. 1. "FLT_CFG,Digital filter configuration" hexmask.long.byte 0x0 8.--15. 1. "NBF,Number of digital filter paths and serial interfaces" hexmask.long.byte 0x0 0.--7. 1. "FIFO_SIZE,FIFO size for MDF" line.long 0x4 "MDF_VERR,MDF version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,MDF major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,MDF minor revision" line.long 0x8 "MDF_IPIDR,MDF identification register" hexmask.long 0x8 0.--31. 1. "ID,MDF identifier value" line.long 0xC "MDF_SIDR,MDF size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification" tree.end tree.end tree "OCTOSPI (Octo-SPI Interface)" base ad:0x0 tree "OCTOSPI" base ad:0x40430000 group.long 0x0++0x3 line.long 0x0 "OCTOSPI_CR,OCTOSPI control register" bitfld.long 0x0 30. "MSEL,External memory select" "B_0x0,B_0x1" bitfld.long 0x0 28.--29. "FMODE,Functional mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24. "CSSEL,Chip-select selection" "B_0x0,B_0x1" bitfld.long 0x0 23. "PMM,Polling match mode" "B_0x0,B_0x1" bitfld.long 0x0 22. "APMS,Automatic status-polling mode stop" "B_0x0,B_0x1" bitfld.long 0x0 20. "TOIE,Timeout interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "SMIE,Status-match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "FTIE,FIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "TEIE,Transfer error interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--13. 1. "FTHRES,FIFO threshold level" bitfld.long 0x0 6. "DMM,Dual-memory configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TCEN,Timeout counter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "ABORT,Abort request" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "OCTOSPI_DCR1,OCTOSPI device configuration register 1" bitfld.long 0x0 24.--26. "MTYP,Memory type" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" hexmask.long.byte 0x0 16.--20. 1. "DEVSIZE,Device size" hexmask.long.byte 0x0 8.--13. 1. "CSHT,Chip-select high time" bitfld.long 0x0 3. "DLYBYP,Delay block bypass" "B_0x0,B_0x1" bitfld.long 0x0 1. "FRCK,Free running clock" "B_0x0,B_0x1" bitfld.long 0x0 0. "CKMODE,Clock mode 0/mode 3" "B_0x0,B_0x1" line.long 0x4 "OCTOSPI_DCR2,OCTOSPI device configuration register 2" bitfld.long 0x4 16.--18. "WRAPSIZE,Wrap size" "B_0x0,?,B_0x2,B_0x3,B_0x4,B_0x5,?,?" hexmask.long.byte 0x4 0.--7. 1. "PRESCALER,Clock prescaler" line.long 0x8 "OCTOSPI_DCR3,OCTOSPI device configuration register 3" hexmask.long.byte 0x8 16.--20. 1. "CSBOUND,NCS boundary" hexmask.long.byte 0x8 0.--7. 1. "MAXTRAN,Maximum transfer" line.long 0xC "OCTOSPI_DCR4,OCTOSPI device configuration register 4" hexmask.long 0xC 0.--31. 1. "REFRESH,Refresh rate" rgroup.long 0x20++0x3 line.long 0x0 "OCTOSPI_SR,OCTOSPI status register" hexmask.long.byte 0x0 8.--14. 1. "FLEVEL,FIFO level" bitfld.long 0x0 5. "BUSY,Busy" "0,1" bitfld.long 0x0 4. "TOF,Timeout flag" "0,1" bitfld.long 0x0 3. "SMF,Status match flag" "0,1" bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1" bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1" newline bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1" wgroup.long 0x24++0x3 line.long 0x0 "OCTOSPI_FCR,OCTOSPI flag clear register" bitfld.long 0x0 4. "CTOF,Clear timeout flag" "0,1" bitfld.long 0x0 3. "CSMF,Clear status match flag" "0,1" bitfld.long 0x0 1. "CTCF,Clear transfer complete flag" "0,1" bitfld.long 0x0 0. "CTEF,Clear transfer error flag" "0,1" group.long 0x40++0x3 line.long 0x0 "OCTOSPI_DLR,OCTOSPI data length register" hexmask.long 0x0 0.--31. 1. "DL,Data length" group.long 0x48++0x3 line.long 0x0 "OCTOSPI_AR,OCTOSPI address register" hexmask.long 0x0 0.--31. 1. "ADDRESS,Address" group.long 0x50++0x3 line.long 0x0 "OCTOSPI_DR,OCTOSPI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" group.long 0x80++0x3 line.long 0x0 "OCTOSPI_PSMKR,OCTOSPI polling status mask register" hexmask.long 0x0 0.--31. 1. "MASK,Status mask" group.long 0x88++0x3 line.long 0x0 "OCTOSPI_PSMAR,OCTOSPI polling status match register" hexmask.long 0x0 0.--31. 1. "MATCH,Status match" group.long 0x90++0x3 line.long 0x0 "OCTOSPI_PIR,OCTOSPI polling interval register" hexmask.long.word 0x0 0.--15. 1. "INTERVAL,Polling interval" group.long 0x100++0x3 line.long 0x0 "OCTOSPI_CCR,OCTOSPI communication configuration register" bitfld.long 0x0 29. "DQSE,DQS enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "DDTR,Data double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "DMODE,Data mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 20.--21. "ABSIZE,Alternate-byte size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "ABDTR,Alternate- byte double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 16.--18. "ABMODE,Alternate-byte mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x0 12.--13. "ADSIZE,Address size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 11. "ADDTR,Address double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "ADMODE,Address mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3. "IDTR,Instruction double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" group.long 0x108++0x3 line.long 0x0 "OCTOSPI_TCR,OCTOSPI timing configuration register" bitfld.long 0x0 30. "SSHIFT,Sample shift" "B_0x0,B_0x1" bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles" group.long 0x110++0x3 line.long 0x0 "OCTOSPI_IR,OCTOSPI instruction register" hexmask.long 0x0 0.--31. 1. "INSTRUCTION,Instruction" group.long 0x120++0x3 line.long 0x0 "OCTOSPI_ABR,OCTOSPI alternate bytes register" hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes" group.long 0x130++0x3 line.long 0x0 "OCTOSPI_LPTR,OCTOSPI low-power timeout register" hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Timeout period" group.long 0x140++0x3 line.long 0x0 "OCTOSPI_WPCCR,OCTOSPI wrap communication configuration register" bitfld.long 0x0 29. "DQSE,DQS enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "DDTR,Data double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "DMODE,Data mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 20.--21. "ABSIZE,Alternate-byte size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "ABDTR,Alternate-byte double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 16.--18. "ABMODE,Alternate-byte mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x0 12.--13. "ADSIZE,Address size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 11. "ADDTR,Address double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "ADMODE,Address mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3. "IDTR,Instruction double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" group.long 0x148++0x3 line.long 0x0 "OCTOSPI_WPTCR,OCTOSPI wrap timing configuration register" bitfld.long 0x0 30. "SSHIFT,Sample shift" "B_0x0,B_0x1" bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles" group.long 0x150++0x3 line.long 0x0 "OCTOSPI_WPIR,OCTOSPI wrap instruction register" hexmask.long 0x0 0.--31. 1. "INSTRUCTION,Instruction" group.long 0x160++0x3 line.long 0x0 "OCTOSPI_WPABR,OCTOSPI wrap alternate bytes register" hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes" group.long 0x180++0x3 line.long 0x0 "OCTOSPI_WCCR,OCTOSPI write communication configuration register" bitfld.long 0x0 29. "DQSE,DQS enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "DDTR,data double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "DMODE,Data mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 20.--21. "ABSIZE,Alternate-byte size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 16.--18. "ABMODE,Alternate-byte mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x0 12.--13. "ADSIZE,Address size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 11. "ADDTR,Address double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "ADMODE,Address mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3. "IDTR,Instruction double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" group.long 0x188++0x3 line.long 0x0 "OCTOSPI_WTCR,OCTOSPI write timing configuration register" hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles" group.long 0x190++0x3 line.long 0x0 "OCTOSPI_WIR,OCTOSPI write instruction register" hexmask.long 0x0 0.--31. 1. "INSTRUCTION,Instruction" group.long 0x1A0++0x3 line.long 0x0 "OCTOSPI_WABR,OCTOSPI write alternate bytes register" hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes" group.long 0x200++0x3 line.long 0x0 "OCTOSPI_HLCR,OCTOSPI HyperBus latency configuration register" hexmask.long.byte 0x0 16.--23. 1. "TRWR,Read-write minimum recovery time" hexmask.long.byte 0x0 8.--15. 1. "TACC,Access time" bitfld.long 0x0 1. "WZL,Write zero latency" "B_0x0,B_0x1" bitfld.long 0x0 0. "LM,Latency mode" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "OCTOSPI_HWCFGR2,OCTOSPI hardware configuration register 2" hexmask.long.byte 0x0 16.--19. 1. "HSINT,High-speed interface" hexmask.long.byte 0x0 12.--15. 1. "MEM16,Size of the SPI memory supported" hexmask.long.byte 0x0 8.--11. 1. "ARBM,Arbitration configuration" hexmask.long.byte 0x0 4.--7. 1. "RDFT,Reduced features" hexmask.long.byte 0x0 0.--3. 1. "FRCK,Free running clock" line.long 0x4 "OCTOSPI_HWCFGR,OCTOSPI hardware configuration register" hexmask.long.byte 0x4 28.--31. 1. "CSSRV,CSSEL reset value" hexmask.long.byte 0x4 24.--27. 1. "MMW,Memory-mapped write" hexmask.long.byte 0x4 20.--23. 1. "IDL,ID Length" hexmask.long.byte 0x4 12.--19. 1. "PRES,Prescaler" hexmask.long.byte 0x4 4.--11. 1. "FIFO,FIFO depth" hexmask.long.byte 0x4 0.--3. 1. "AXI,OCTOSPI interface" line.long 0x8 "OCTOSPI_VERR,OCTOSPI version register" hexmask.long.byte 0x8 0.--7. 1. "VER,OCTOSPI version" line.long 0xC "OCTOSPI_IDR,OCTOSPI identification register" hexmask.long 0xC 0.--31. 1. "ID,OCTOSPI identification" line.long 0x10 "OCTOSPI_MIDR,OCTOSPI hardware magic identification register" hexmask.long 0x10 0.--31. 1. "MID,OCTOSPI magic identification" tree.end tree "OCTOSPI1_S" base ad:0x50430000 group.long 0x0++0x3 line.long 0x0 "OCTOSPI_CR,OCTOSPI control register" bitfld.long 0x0 30. "MSEL,External memory select" "B_0x0,B_0x1" bitfld.long 0x0 28.--29. "FMODE,Functional mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24. "CSSEL,Chip-select selection" "B_0x0,B_0x1" bitfld.long 0x0 23. "PMM,Polling match mode" "B_0x0,B_0x1" bitfld.long 0x0 22. "APMS,Automatic status-polling mode stop" "B_0x0,B_0x1" bitfld.long 0x0 20. "TOIE,Timeout interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "SMIE,Status-match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "FTIE,FIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "TEIE,Transfer error interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--13. 1. "FTHRES,FIFO threshold level" bitfld.long 0x0 6. "DMM,Dual-memory configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TCEN,Timeout counter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "ABORT,Abort request" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "OCTOSPI_DCR1,OCTOSPI device configuration register 1" bitfld.long 0x0 24.--26. "MTYP,Memory type" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" hexmask.long.byte 0x0 16.--20. 1. "DEVSIZE,Device size" hexmask.long.byte 0x0 8.--13. 1. "CSHT,Chip-select high time" bitfld.long 0x0 3. "DLYBYP,Delay block bypass" "B_0x0,B_0x1" bitfld.long 0x0 1. "FRCK,Free running clock" "B_0x0,B_0x1" bitfld.long 0x0 0. "CKMODE,Clock mode 0/mode 3" "B_0x0,B_0x1" line.long 0x4 "OCTOSPI_DCR2,OCTOSPI device configuration register 2" bitfld.long 0x4 16.--18. "WRAPSIZE,Wrap size" "B_0x0,?,B_0x2,B_0x3,B_0x4,B_0x5,?,?" hexmask.long.byte 0x4 0.--7. 1. "PRESCALER,Clock prescaler" line.long 0x8 "OCTOSPI_DCR3,OCTOSPI device configuration register 3" hexmask.long.byte 0x8 16.--20. 1. "CSBOUND,NCS boundary" hexmask.long.byte 0x8 0.--7. 1. "MAXTRAN,Maximum transfer" line.long 0xC "OCTOSPI_DCR4,OCTOSPI device configuration register 4" hexmask.long 0xC 0.--31. 1. "REFRESH,Refresh rate" rgroup.long 0x20++0x3 line.long 0x0 "OCTOSPI_SR,OCTOSPI status register" hexmask.long.byte 0x0 8.--14. 1. "FLEVEL,FIFO level" bitfld.long 0x0 5. "BUSY,Busy" "0,1" bitfld.long 0x0 4. "TOF,Timeout flag" "0,1" bitfld.long 0x0 3. "SMF,Status match flag" "0,1" bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1" bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1" newline bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1" wgroup.long 0x24++0x3 line.long 0x0 "OCTOSPI_FCR,OCTOSPI flag clear register" bitfld.long 0x0 4. "CTOF,Clear timeout flag" "0,1" bitfld.long 0x0 3. "CSMF,Clear status match flag" "0,1" bitfld.long 0x0 1. "CTCF,Clear transfer complete flag" "0,1" bitfld.long 0x0 0. "CTEF,Clear transfer error flag" "0,1" group.long 0x40++0x3 line.long 0x0 "OCTOSPI_DLR,OCTOSPI data length register" hexmask.long 0x0 0.--31. 1. "DL,Data length" group.long 0x48++0x3 line.long 0x0 "OCTOSPI_AR,OCTOSPI address register" hexmask.long 0x0 0.--31. 1. "ADDRESS,Address" group.long 0x50++0x3 line.long 0x0 "OCTOSPI_DR,OCTOSPI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" group.long 0x80++0x3 line.long 0x0 "OCTOSPI_PSMKR,OCTOSPI polling status mask register" hexmask.long 0x0 0.--31. 1. "MASK,Status mask" group.long 0x88++0x3 line.long 0x0 "OCTOSPI_PSMAR,OCTOSPI polling status match register" hexmask.long 0x0 0.--31. 1. "MATCH,Status match" group.long 0x90++0x3 line.long 0x0 "OCTOSPI_PIR,OCTOSPI polling interval register" hexmask.long.word 0x0 0.--15. 1. "INTERVAL,Polling interval" group.long 0x100++0x3 line.long 0x0 "OCTOSPI_CCR,OCTOSPI communication configuration register" bitfld.long 0x0 29. "DQSE,DQS enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "DDTR,Data double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "DMODE,Data mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 20.--21. "ABSIZE,Alternate-byte size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "ABDTR,Alternate- byte double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 16.--18. "ABMODE,Alternate-byte mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x0 12.--13. "ADSIZE,Address size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 11. "ADDTR,Address double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "ADMODE,Address mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3. "IDTR,Instruction double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" group.long 0x108++0x3 line.long 0x0 "OCTOSPI_TCR,OCTOSPI timing configuration register" bitfld.long 0x0 30. "SSHIFT,Sample shift" "B_0x0,B_0x1" bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles" group.long 0x110++0x3 line.long 0x0 "OCTOSPI_IR,OCTOSPI instruction register" hexmask.long 0x0 0.--31. 1. "INSTRUCTION,Instruction" group.long 0x120++0x3 line.long 0x0 "OCTOSPI_ABR,OCTOSPI alternate bytes register" hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes" group.long 0x130++0x3 line.long 0x0 "OCTOSPI_LPTR,OCTOSPI low-power timeout register" hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Timeout period" group.long 0x140++0x3 line.long 0x0 "OCTOSPI_WPCCR,OCTOSPI wrap communication configuration register" bitfld.long 0x0 29. "DQSE,DQS enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "DDTR,Data double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "DMODE,Data mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 20.--21. "ABSIZE,Alternate-byte size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "ABDTR,Alternate-byte double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 16.--18. "ABMODE,Alternate-byte mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x0 12.--13. "ADSIZE,Address size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 11. "ADDTR,Address double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "ADMODE,Address mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3. "IDTR,Instruction double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" group.long 0x148++0x3 line.long 0x0 "OCTOSPI_WPTCR,OCTOSPI wrap timing configuration register" bitfld.long 0x0 30. "SSHIFT,Sample shift" "B_0x0,B_0x1" bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles" group.long 0x150++0x3 line.long 0x0 "OCTOSPI_WPIR,OCTOSPI wrap instruction register" hexmask.long 0x0 0.--31. 1. "INSTRUCTION,Instruction" group.long 0x160++0x3 line.long 0x0 "OCTOSPI_WPABR,OCTOSPI wrap alternate bytes register" hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes" group.long 0x180++0x3 line.long 0x0 "OCTOSPI_WCCR,OCTOSPI write communication configuration register" bitfld.long 0x0 29. "DQSE,DQS enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "DDTR,data double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "DMODE,Data mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 20.--21. "ABSIZE,Alternate-byte size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 16.--18. "ABMODE,Alternate-byte mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x0 12.--13. "ADSIZE,Address size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 11. "ADDTR,Address double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "ADMODE,Address mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3. "IDTR,Instruction double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" group.long 0x188++0x3 line.long 0x0 "OCTOSPI_WTCR,OCTOSPI write timing configuration register" hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles" group.long 0x190++0x3 line.long 0x0 "OCTOSPI_WIR,OCTOSPI write instruction register" hexmask.long 0x0 0.--31. 1. "INSTRUCTION,Instruction" group.long 0x1A0++0x3 line.long 0x0 "OCTOSPI_WABR,OCTOSPI write alternate bytes register" hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes" group.long 0x200++0x3 line.long 0x0 "OCTOSPI_HLCR,OCTOSPI HyperBus latency configuration register" hexmask.long.byte 0x0 16.--23. 1. "TRWR,Read-write minimum recovery time" hexmask.long.byte 0x0 8.--15. 1. "TACC,Access time" bitfld.long 0x0 1. "WZL,Write zero latency" "B_0x0,B_0x1" bitfld.long 0x0 0. "LM,Latency mode" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "OCTOSPI_HWCFGR2,OCTOSPI hardware configuration register 2" hexmask.long.byte 0x0 16.--19. 1. "HSINT,High-speed interface" hexmask.long.byte 0x0 12.--15. 1. "MEM16,Size of the SPI memory supported" hexmask.long.byte 0x0 8.--11. 1. "ARBM,Arbitration configuration" hexmask.long.byte 0x0 4.--7. 1. "RDFT,Reduced features" hexmask.long.byte 0x0 0.--3. 1. "FRCK,Free running clock" line.long 0x4 "OCTOSPI_HWCFGR,OCTOSPI hardware configuration register" hexmask.long.byte 0x4 28.--31. 1. "CSSRV,CSSEL reset value" hexmask.long.byte 0x4 24.--27. 1. "MMW,Memory-mapped write" hexmask.long.byte 0x4 20.--23. 1. "IDL,ID Length" hexmask.long.byte 0x4 12.--19. 1. "PRES,Prescaler" hexmask.long.byte 0x4 4.--11. 1. "FIFO,FIFO depth" hexmask.long.byte 0x4 0.--3. 1. "AXI,OCTOSPI interface" line.long 0x8 "OCTOSPI_VERR,OCTOSPI version register" hexmask.long.byte 0x8 0.--7. 1. "VER,OCTOSPI version" line.long 0xC "OCTOSPI_IDR,OCTOSPI identification register" hexmask.long 0xC 0.--31. 1. "ID,OCTOSPI identification" line.long 0x10 "OCTOSPI_MIDR,OCTOSPI hardware magic identification register" hexmask.long 0x10 0.--31. 1. "MID,OCTOSPI magic identification" tree.end tree "OCTOSPI2" base ad:0x40440000 group.long 0x0++0x3 line.long 0x0 "OCTOSPI_CR,OCTOSPI control register" bitfld.long 0x0 30. "MSEL,External memory select" "B_0x0,B_0x1" bitfld.long 0x0 28.--29. "FMODE,Functional mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24. "CSSEL,Chip-select selection" "B_0x0,B_0x1" bitfld.long 0x0 23. "PMM,Polling match mode" "B_0x0,B_0x1" bitfld.long 0x0 22. "APMS,Automatic status-polling mode stop" "B_0x0,B_0x1" bitfld.long 0x0 20. "TOIE,Timeout interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "SMIE,Status-match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "FTIE,FIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "TEIE,Transfer error interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--13. 1. "FTHRES,FIFO threshold level" bitfld.long 0x0 6. "DMM,Dual-memory configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TCEN,Timeout counter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "ABORT,Abort request" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "OCTOSPI_DCR1,OCTOSPI device configuration register 1" bitfld.long 0x0 24.--26. "MTYP,Memory type" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" hexmask.long.byte 0x0 16.--20. 1. "DEVSIZE,Device size" hexmask.long.byte 0x0 8.--13. 1. "CSHT,Chip-select high time" bitfld.long 0x0 3. "DLYBYP,Delay block bypass" "B_0x0,B_0x1" bitfld.long 0x0 1. "FRCK,Free running clock" "B_0x0,B_0x1" bitfld.long 0x0 0. "CKMODE,Clock mode 0/mode 3" "B_0x0,B_0x1" line.long 0x4 "OCTOSPI_DCR2,OCTOSPI device configuration register 2" bitfld.long 0x4 16.--18. "WRAPSIZE,Wrap size" "B_0x0,?,B_0x2,B_0x3,B_0x4,B_0x5,?,?" hexmask.long.byte 0x4 0.--7. 1. "PRESCALER,Clock prescaler" line.long 0x8 "OCTOSPI_DCR3,OCTOSPI device configuration register 3" hexmask.long.byte 0x8 16.--20. 1. "CSBOUND,NCS boundary" hexmask.long.byte 0x8 0.--7. 1. "MAXTRAN,Maximum transfer" line.long 0xC "OCTOSPI_DCR4,OCTOSPI device configuration register 4" hexmask.long 0xC 0.--31. 1. "REFRESH,Refresh rate" rgroup.long 0x20++0x3 line.long 0x0 "OCTOSPI_SR,OCTOSPI status register" hexmask.long.byte 0x0 8.--14. 1. "FLEVEL,FIFO level" bitfld.long 0x0 5. "BUSY,Busy" "0,1" bitfld.long 0x0 4. "TOF,Timeout flag" "0,1" bitfld.long 0x0 3. "SMF,Status match flag" "0,1" bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1" bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1" newline bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1" wgroup.long 0x24++0x3 line.long 0x0 "OCTOSPI_FCR,OCTOSPI flag clear register" bitfld.long 0x0 4. "CTOF,Clear timeout flag" "0,1" bitfld.long 0x0 3. "CSMF,Clear status match flag" "0,1" bitfld.long 0x0 1. "CTCF,Clear transfer complete flag" "0,1" bitfld.long 0x0 0. "CTEF,Clear transfer error flag" "0,1" group.long 0x40++0x3 line.long 0x0 "OCTOSPI_DLR,OCTOSPI data length register" hexmask.long 0x0 0.--31. 1. "DL,Data length" group.long 0x48++0x3 line.long 0x0 "OCTOSPI_AR,OCTOSPI address register" hexmask.long 0x0 0.--31. 1. "ADDRESS,Address" group.long 0x50++0x3 line.long 0x0 "OCTOSPI_DR,OCTOSPI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" group.long 0x80++0x3 line.long 0x0 "OCTOSPI_PSMKR,OCTOSPI polling status mask register" hexmask.long 0x0 0.--31. 1. "MASK,Status mask" group.long 0x88++0x3 line.long 0x0 "OCTOSPI_PSMAR,OCTOSPI polling status match register" hexmask.long 0x0 0.--31. 1. "MATCH,Status match" group.long 0x90++0x3 line.long 0x0 "OCTOSPI_PIR,OCTOSPI polling interval register" hexmask.long.word 0x0 0.--15. 1. "INTERVAL,Polling interval" group.long 0x100++0x3 line.long 0x0 "OCTOSPI_CCR,OCTOSPI communication configuration register" bitfld.long 0x0 29. "DQSE,DQS enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "DDTR,Data double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "DMODE,Data mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 20.--21. "ABSIZE,Alternate-byte size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "ABDTR,Alternate- byte double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 16.--18. "ABMODE,Alternate-byte mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x0 12.--13. "ADSIZE,Address size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 11. "ADDTR,Address double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "ADMODE,Address mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3. "IDTR,Instruction double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" group.long 0x108++0x3 line.long 0x0 "OCTOSPI_TCR,OCTOSPI timing configuration register" bitfld.long 0x0 30. "SSHIFT,Sample shift" "B_0x0,B_0x1" bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles" group.long 0x110++0x3 line.long 0x0 "OCTOSPI_IR,OCTOSPI instruction register" hexmask.long 0x0 0.--31. 1. "INSTRUCTION,Instruction" group.long 0x120++0x3 line.long 0x0 "OCTOSPI_ABR,OCTOSPI alternate bytes register" hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes" group.long 0x130++0x3 line.long 0x0 "OCTOSPI_LPTR,OCTOSPI low-power timeout register" hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Timeout period" group.long 0x140++0x3 line.long 0x0 "OCTOSPI_WPCCR,OCTOSPI wrap communication configuration register" bitfld.long 0x0 29. "DQSE,DQS enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "DDTR,Data double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "DMODE,Data mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 20.--21. "ABSIZE,Alternate-byte size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "ABDTR,Alternate-byte double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 16.--18. "ABMODE,Alternate-byte mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x0 12.--13. "ADSIZE,Address size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 11. "ADDTR,Address double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "ADMODE,Address mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3. "IDTR,Instruction double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" group.long 0x148++0x3 line.long 0x0 "OCTOSPI_WPTCR,OCTOSPI wrap timing configuration register" bitfld.long 0x0 30. "SSHIFT,Sample shift" "B_0x0,B_0x1" bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles" group.long 0x150++0x3 line.long 0x0 "OCTOSPI_WPIR,OCTOSPI wrap instruction register" hexmask.long 0x0 0.--31. 1. "INSTRUCTION,Instruction" group.long 0x160++0x3 line.long 0x0 "OCTOSPI_WPABR,OCTOSPI wrap alternate bytes register" hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes" group.long 0x180++0x3 line.long 0x0 "OCTOSPI_WCCR,OCTOSPI write communication configuration register" bitfld.long 0x0 29. "DQSE,DQS enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "DDTR,data double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "DMODE,Data mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 20.--21. "ABSIZE,Alternate-byte size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 16.--18. "ABMODE,Alternate-byte mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x0 12.--13. "ADSIZE,Address size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 11. "ADDTR,Address double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "ADMODE,Address mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3. "IDTR,Instruction double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" group.long 0x188++0x3 line.long 0x0 "OCTOSPI_WTCR,OCTOSPI write timing configuration register" hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles" group.long 0x190++0x3 line.long 0x0 "OCTOSPI_WIR,OCTOSPI write instruction register" hexmask.long 0x0 0.--31. 1. "INSTRUCTION,Instruction" group.long 0x1A0++0x3 line.long 0x0 "OCTOSPI_WABR,OCTOSPI write alternate bytes register" hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes" group.long 0x200++0x3 line.long 0x0 "OCTOSPI_HLCR,OCTOSPI HyperBus latency configuration register" hexmask.long.byte 0x0 16.--23. 1. "TRWR,Read-write minimum recovery time" hexmask.long.byte 0x0 8.--15. 1. "TACC,Access time" bitfld.long 0x0 1. "WZL,Write zero latency" "B_0x0,B_0x1" bitfld.long 0x0 0. "LM,Latency mode" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "OCTOSPI_HWCFGR2,OCTOSPI hardware configuration register 2" hexmask.long.byte 0x0 16.--19. 1. "HSINT,High-speed interface" hexmask.long.byte 0x0 12.--15. 1. "MEM16,Size of the SPI memory supported" hexmask.long.byte 0x0 8.--11. 1. "ARBM,Arbitration configuration" hexmask.long.byte 0x0 4.--7. 1. "RDFT,Reduced features" hexmask.long.byte 0x0 0.--3. 1. "FRCK,Free running clock" line.long 0x4 "OCTOSPI_HWCFGR,OCTOSPI hardware configuration register" hexmask.long.byte 0x4 28.--31. 1. "CSSRV,CSSEL reset value" hexmask.long.byte 0x4 24.--27. 1. "MMW,Memory-mapped write" hexmask.long.byte 0x4 20.--23. 1. "IDL,ID Length" hexmask.long.byte 0x4 12.--19. 1. "PRES,Prescaler" hexmask.long.byte 0x4 4.--11. 1. "FIFO,FIFO depth" hexmask.long.byte 0x4 0.--3. 1. "AXI,OCTOSPI interface" line.long 0x8 "OCTOSPI_VERR,OCTOSPI version register" hexmask.long.byte 0x8 0.--7. 1. "VER,OCTOSPI version" line.long 0xC "OCTOSPI_IDR,OCTOSPI identification register" hexmask.long 0xC 0.--31. 1. "ID,OCTOSPI identification" line.long 0x10 "OCTOSPI_MIDR,OCTOSPI hardware magic identification register" hexmask.long 0x10 0.--31. 1. "MID,OCTOSPI magic identification" tree.end tree "OCTOSPI2_S" base ad:0x50440000 group.long 0x0++0x3 line.long 0x0 "OCTOSPI_CR,OCTOSPI control register" bitfld.long 0x0 30. "MSEL,External memory select" "B_0x0,B_0x1" bitfld.long 0x0 28.--29. "FMODE,Functional mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 24. "CSSEL,Chip-select selection" "B_0x0,B_0x1" bitfld.long 0x0 23. "PMM,Polling match mode" "B_0x0,B_0x1" bitfld.long 0x0 22. "APMS,Automatic status-polling mode stop" "B_0x0,B_0x1" bitfld.long 0x0 20. "TOIE,Timeout interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "SMIE,Status-match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "FTIE,FIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "TCIE,Transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "TEIE,Transfer error interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--13. 1. "FTHRES,FIFO threshold level" bitfld.long 0x0 6. "DMM,Dual-memory configuration" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TCEN,Timeout counter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "ABORT,Abort request" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "OCTOSPI_DCR1,OCTOSPI device configuration register 1" bitfld.long 0x0 24.--26. "MTYP,Memory type" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" hexmask.long.byte 0x0 16.--20. 1. "DEVSIZE,Device size" hexmask.long.byte 0x0 8.--13. 1. "CSHT,Chip-select high time" bitfld.long 0x0 3. "DLYBYP,Delay block bypass" "B_0x0,B_0x1" bitfld.long 0x0 1. "FRCK,Free running clock" "B_0x0,B_0x1" bitfld.long 0x0 0. "CKMODE,Clock mode 0/mode 3" "B_0x0,B_0x1" line.long 0x4 "OCTOSPI_DCR2,OCTOSPI device configuration register 2" bitfld.long 0x4 16.--18. "WRAPSIZE,Wrap size" "B_0x0,?,B_0x2,B_0x3,B_0x4,B_0x5,?,?" hexmask.long.byte 0x4 0.--7. 1. "PRESCALER,Clock prescaler" line.long 0x8 "OCTOSPI_DCR3,OCTOSPI device configuration register 3" hexmask.long.byte 0x8 16.--20. 1. "CSBOUND,NCS boundary" hexmask.long.byte 0x8 0.--7. 1. "MAXTRAN,Maximum transfer" line.long 0xC "OCTOSPI_DCR4,OCTOSPI device configuration register 4" hexmask.long 0xC 0.--31. 1. "REFRESH,Refresh rate" rgroup.long 0x20++0x3 line.long 0x0 "OCTOSPI_SR,OCTOSPI status register" hexmask.long.byte 0x0 8.--14. 1. "FLEVEL,FIFO level" bitfld.long 0x0 5. "BUSY,Busy" "0,1" bitfld.long 0x0 4. "TOF,Timeout flag" "0,1" bitfld.long 0x0 3. "SMF,Status match flag" "0,1" bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1" bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1" newline bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1" wgroup.long 0x24++0x3 line.long 0x0 "OCTOSPI_FCR,OCTOSPI flag clear register" bitfld.long 0x0 4. "CTOF,Clear timeout flag" "0,1" bitfld.long 0x0 3. "CSMF,Clear status match flag" "0,1" bitfld.long 0x0 1. "CTCF,Clear transfer complete flag" "0,1" bitfld.long 0x0 0. "CTEF,Clear transfer error flag" "0,1" group.long 0x40++0x3 line.long 0x0 "OCTOSPI_DLR,OCTOSPI data length register" hexmask.long 0x0 0.--31. 1. "DL,Data length" group.long 0x48++0x3 line.long 0x0 "OCTOSPI_AR,OCTOSPI address register" hexmask.long 0x0 0.--31. 1. "ADDRESS,Address" group.long 0x50++0x3 line.long 0x0 "OCTOSPI_DR,OCTOSPI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" group.long 0x80++0x3 line.long 0x0 "OCTOSPI_PSMKR,OCTOSPI polling status mask register" hexmask.long 0x0 0.--31. 1. "MASK,Status mask" group.long 0x88++0x3 line.long 0x0 "OCTOSPI_PSMAR,OCTOSPI polling status match register" hexmask.long 0x0 0.--31. 1. "MATCH,Status match" group.long 0x90++0x3 line.long 0x0 "OCTOSPI_PIR,OCTOSPI polling interval register" hexmask.long.word 0x0 0.--15. 1. "INTERVAL,Polling interval" group.long 0x100++0x3 line.long 0x0 "OCTOSPI_CCR,OCTOSPI communication configuration register" bitfld.long 0x0 29. "DQSE,DQS enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "DDTR,Data double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "DMODE,Data mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 20.--21. "ABSIZE,Alternate-byte size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "ABDTR,Alternate- byte double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 16.--18. "ABMODE,Alternate-byte mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x0 12.--13. "ADSIZE,Address size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 11. "ADDTR,Address double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "ADMODE,Address mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3. "IDTR,Instruction double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" group.long 0x108++0x3 line.long 0x0 "OCTOSPI_TCR,OCTOSPI timing configuration register" bitfld.long 0x0 30. "SSHIFT,Sample shift" "B_0x0,B_0x1" bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles" group.long 0x110++0x3 line.long 0x0 "OCTOSPI_IR,OCTOSPI instruction register" hexmask.long 0x0 0.--31. 1. "INSTRUCTION,Instruction" group.long 0x120++0x3 line.long 0x0 "OCTOSPI_ABR,OCTOSPI alternate bytes register" hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes" group.long 0x130++0x3 line.long 0x0 "OCTOSPI_LPTR,OCTOSPI low-power timeout register" hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Timeout period" group.long 0x140++0x3 line.long 0x0 "OCTOSPI_WPCCR,OCTOSPI wrap communication configuration register" bitfld.long 0x0 29. "DQSE,DQS enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "DDTR,Data double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "DMODE,Data mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 20.--21. "ABSIZE,Alternate-byte size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "ABDTR,Alternate-byte double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 16.--18. "ABMODE,Alternate-byte mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x0 12.--13. "ADSIZE,Address size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 11. "ADDTR,Address double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "ADMODE,Address mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3. "IDTR,Instruction double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" group.long 0x148++0x3 line.long 0x0 "OCTOSPI_WPTCR,OCTOSPI wrap timing configuration register" bitfld.long 0x0 30. "SSHIFT,Sample shift" "B_0x0,B_0x1" bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles" group.long 0x150++0x3 line.long 0x0 "OCTOSPI_WPIR,OCTOSPI wrap instruction register" hexmask.long 0x0 0.--31. 1. "INSTRUCTION,Instruction" group.long 0x160++0x3 line.long 0x0 "OCTOSPI_WPABR,OCTOSPI wrap alternate bytes register" hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes" group.long 0x180++0x3 line.long 0x0 "OCTOSPI_WCCR,OCTOSPI write communication configuration register" bitfld.long 0x0 29. "DQSE,DQS enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "DDTR,data double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 24.--26. "DMODE,Data mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 20.--21. "ABSIZE,Alternate-byte size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 16.--18. "ABMODE,Alternate-byte mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline bitfld.long 0x0 12.--13. "ADSIZE,Address size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 11. "ADDTR,Address double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "ADMODE,Address mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3. "IDTR,Instruction double transfer rate" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" group.long 0x188++0x3 line.long 0x0 "OCTOSPI_WTCR,OCTOSPI write timing configuration register" hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles" group.long 0x190++0x3 line.long 0x0 "OCTOSPI_WIR,OCTOSPI write instruction register" hexmask.long 0x0 0.--31. 1. "INSTRUCTION,Instruction" group.long 0x1A0++0x3 line.long 0x0 "OCTOSPI_WABR,OCTOSPI write alternate bytes register" hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes" group.long 0x200++0x3 line.long 0x0 "OCTOSPI_HLCR,OCTOSPI HyperBus latency configuration register" hexmask.long.byte 0x0 16.--23. 1. "TRWR,Read-write minimum recovery time" hexmask.long.byte 0x0 8.--15. 1. "TACC,Access time" bitfld.long 0x0 1. "WZL,Write zero latency" "B_0x0,B_0x1" bitfld.long 0x0 0. "LM,Latency mode" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "OCTOSPI_HWCFGR2,OCTOSPI hardware configuration register 2" hexmask.long.byte 0x0 16.--19. 1. "HSINT,High-speed interface" hexmask.long.byte 0x0 12.--15. 1. "MEM16,Size of the SPI memory supported" hexmask.long.byte 0x0 8.--11. 1. "ARBM,Arbitration configuration" hexmask.long.byte 0x0 4.--7. 1. "RDFT,Reduced features" hexmask.long.byte 0x0 0.--3. 1. "FRCK,Free running clock" line.long 0x4 "OCTOSPI_HWCFGR,OCTOSPI hardware configuration register" hexmask.long.byte 0x4 28.--31. 1. "CSSRV,CSSEL reset value" hexmask.long.byte 0x4 24.--27. 1. "MMW,Memory-mapped write" hexmask.long.byte 0x4 20.--23. 1. "IDL,ID Length" hexmask.long.byte 0x4 12.--19. 1. "PRES,Prescaler" hexmask.long.byte 0x4 4.--11. 1. "FIFO,FIFO depth" hexmask.long.byte 0x4 0.--3. 1. "AXI,OCTOSPI interface" line.long 0x8 "OCTOSPI_VERR,OCTOSPI version register" hexmask.long.byte 0x8 0.--7. 1. "VER,OCTOSPI version" line.long 0xC "OCTOSPI_IDR,OCTOSPI identification register" hexmask.long 0xC 0.--31. 1. "ID,OCTOSPI identification" line.long 0x10 "OCTOSPI_MIDR,OCTOSPI hardware magic identification register" hexmask.long 0x10 0.--31. 1. "MID,OCTOSPI magic identification" tree.end tree.end tree "OCTOSPIM (Octo-SPI I/O Manager)" base ad:0x0 tree "OCTOSPIM" base ad:0x40500000 group.long 0x0++0x3 line.long 0x0 "OCTOSPIM_CR,OCTOSPIM control register" hexmask.long.byte 0x0 16.--23. 1. "REQ2ACK_TIME,REQ to ACK time" bitfld.long 0x0 6. "CSSEL_OVR_O2,Chip select selector override setting for OCTOSPI2" "B_0x0,B_0x1" bitfld.long 0x0 5. "CSSEL_OVR_O1,Chip select selector override setting for OCTOSPI1" "B_0x0,B_0x1" bitfld.long 0x0 4. "CSSEL_OVR_EN,Chip select selector override enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "MODE,OCTOSPIM multiplexing mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "MUXEN,Multiplexed mode enable" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "OCTOSPIM_HWCFGR,OCTOSPIM hardware configuration register" hexmask.long.byte 0x0 0.--3. 1. "NUM_PORT,Number of ports" line.long 0x4 "OCTOSPIM_VERR,OCTOSPIM version register" hexmask.long.byte 0x4 4.--7. 1. "MAJVER,OCTOSPIM major version" hexmask.long.byte 0x4 0.--3. 1. "MINVER,OCTOSPIM minor version" line.long 0x8 "OCTOSPIM_IDR,OCTOSPIM identification" hexmask.long 0x8 0.--31. 1. "ID,OCTOSPIM identification" line.long 0xC "OCTOSPIM_SIDR,OCTOSPIM size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier" tree.end tree "OCTOSPIM_S" base ad:0x50500000 group.long 0x0++0x3 line.long 0x0 "OCTOSPIM_CR,OCTOSPIM control register" hexmask.long.byte 0x0 16.--23. 1. "REQ2ACK_TIME,REQ to ACK time" bitfld.long 0x0 6. "CSSEL_OVR_O2,Chip select selector override setting for OCTOSPI2" "B_0x0,B_0x1" bitfld.long 0x0 5. "CSSEL_OVR_O1,Chip select selector override setting for OCTOSPI1" "B_0x0,B_0x1" bitfld.long 0x0 4. "CSSEL_OVR_EN,Chip select selector override enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "MODE,OCTOSPIM multiplexing mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "MUXEN,Multiplexed mode enable" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "OCTOSPIM_HWCFGR,OCTOSPIM hardware configuration register" hexmask.long.byte 0x0 0.--3. 1. "NUM_PORT,Number of ports" line.long 0x4 "OCTOSPIM_VERR,OCTOSPIM version register" hexmask.long.byte 0x4 4.--7. 1. "MAJVER,OCTOSPIM major version" hexmask.long.byte 0x4 0.--3. 1. "MINVER,OCTOSPIM minor version" line.long 0x8 "OCTOSPIM_IDR,OCTOSPIM identification" hexmask.long 0x8 0.--31. 1. "ID,OCTOSPIM identification" line.long 0xC "OCTOSPIM_SIDR,OCTOSPIM size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identifier" tree.end tree.end tree "OTFDEC (On-the-Fly Decryption Engine)" base ad:0x0 tree "OTFDEC" base ad:0x40450000 group.long 0x0++0x3 line.long 0x0 "OTFDEC_CR,OTFDEC control register" bitfld.long 0x0 0. "ENC,Encryption mode bit" "B_0x0,B_0x1" group.long 0x20++0x13 line.long 0x0 "OTFDEC_R1CFGR,OTFDEC region 1 configuration register" hexmask.long.word 0x0 16.--31. 1. "REG_VERSION,region firmware version" hexmask.long.byte 0x0 8.--15. 1. "KEYCRC,region key 8-bit CRC" bitfld.long 0x0 4.--5. "MODE,operating mode" "?,?,B_0x2,B_0x3" bitfld.long 0x0 2. "KEYLOCK,region key lock" "B_0x0,B_0x1" bitfld.long 0x0 1. "CONFIGLOCK,region config lock" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "REG_EN,region on-the-fly decryption enable" "B_0x0,B_0x1" line.long 0x4 "OTFDEC_R1STARTADDR,OTFDEC region 1 start address register" hexmask.long 0x4 0.--31. 1. "REG_START_ADDR,Region AHB start address" line.long 0x8 "OTFDEC_R1ENDADDR,OTFDEC region 1 end address register" hexmask.long 0x8 0.--31. 1. "REG_END_ADDR,Region AHB end address" line.long 0xC "OTFDEC_R1NONCER0,OTFDEC region 1 nonce register 0" hexmask.long 0xC 0.--31. 1. "REG_NONCE,Region nonce bits [31:0]" line.long 0x10 "OTFDEC_R1NONCER1,OTFDEC region 1 nonce register 1" hexmask.long 0x10 0.--31. 1. "REG_NONCE,Region nonce bits [63:32]" wgroup.long 0x34++0xF line.long 0x0 "OTFDEC_R1KEYR0,OTFDEC region 1 key register 0" hexmask.long 0x0 0.--31. 1. "REG_KEY,Region key bits [31:0]" line.long 0x4 "OTFDEC_R1KEYR1,OTFDEC region 1 key register 1" hexmask.long 0x4 0.--31. 1. "REG_KEY,Region key bits [63:32]" line.long 0x8 "OTFDEC_R1KEYR2,OTFDEC region 1 key register 2" hexmask.long 0x8 0.--31. 1. "REG_KEY,Region key bits [95:64]" line.long 0xC "OTFDEC_R1KEYR3,OTFDEC region 1 key register 3" hexmask.long 0xC 0.--31. 1. "REG_KEY,Region key bits [127:96]" group.long 0x50++0x13 line.long 0x0 "OTFDEC_R2CFGR,OTFDEC region 2 configuration register" hexmask.long.word 0x0 16.--31. 1. "REG_VERSION,region firmware version" hexmask.long.byte 0x0 8.--15. 1. "KEYCRC,region key 8-bit CRC" bitfld.long 0x0 4.--5. "MODE,operating mode" "?,?,B_0x2,B_0x3" bitfld.long 0x0 2. "KEYLOCK,region key lock" "B_0x0,B_0x1" bitfld.long 0x0 1. "CONFIGLOCK,region config lock" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "REG_EN,region on-the-fly decryption enable" "B_0x0,B_0x1" line.long 0x4 "OTFDEC_R2STARTADDR,OTFDEC region 2 start address register" hexmask.long 0x4 0.--31. 1. "REG_START_ADDR,Region AHB start address" line.long 0x8 "OTFDEC_R2ENDADDR,OTFDEC region 2 end address register" hexmask.long 0x8 0.--31. 1. "REG_END_ADDR,Region AHB end address" line.long 0xC "OTFDEC_R2NONCER0,OTFDEC region 2 nonce register 0" hexmask.long 0xC 0.--31. 1. "REG_NONCE,Region nonce bits [31:0]" line.long 0x10 "OTFDEC_R2NONCER1,OTFDEC region 2 nonce register 1" hexmask.long 0x10 0.--31. 1. "REG_NONCE,Region nonce bits [63:32]" wgroup.long 0x64++0xF line.long 0x0 "OTFDEC_R2KEYR0,OTFDEC region 2 key register 0" hexmask.long 0x0 0.--31. 1. "REG_KEY,Region key bits [31:0]" line.long 0x4 "OTFDEC_R2KEYR1,OTFDEC region 2 key register 1" hexmask.long 0x4 0.--31. 1. "REG_KEY,Region key bits [63:32]" line.long 0x8 "OTFDEC_R2KEYR2,OTFDEC region 2 key register 2" hexmask.long 0x8 0.--31. 1. "REG_KEY,Region key bits [95:64]" line.long 0xC "OTFDEC_R2KEYR3,OTFDEC region 2 key register 3" hexmask.long 0xC 0.--31. 1. "REG_KEY,Region key bits [127:96]" group.long 0x80++0x13 line.long 0x0 "OTFDEC_R3CFGR,OTFDEC region 3 configuration register" hexmask.long.word 0x0 16.--31. 1. "REG_VERSION,region firmware version" hexmask.long.byte 0x0 8.--15. 1. "KEYCRC,region key 8-bit CRC" bitfld.long 0x0 4.--5. "MODE,operating mode" "?,?,B_0x2,B_0x3" bitfld.long 0x0 2. "KEYLOCK,region key lock" "B_0x0,B_0x1" bitfld.long 0x0 1. "CONFIGLOCK,region config lock" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "REG_EN,region on-the-fly decryption enable" "B_0x0,B_0x1" line.long 0x4 "OTFDEC_R3STARTADDR,OTFDEC region 3 start address register" hexmask.long 0x4 0.--31. 1. "REG_START_ADDR,Region AHB start address" line.long 0x8 "OTFDEC_R3ENDADDR,OTFDEC region 3 end address register" hexmask.long 0x8 0.--31. 1. "REG_END_ADDR,Region AHB end address" line.long 0xC "OTFDEC_R3NONCER0,OTFDEC region 3 nonce register 0" hexmask.long 0xC 0.--31. 1. "REG_NONCE,Region nonce bits [31:0]" line.long 0x10 "OTFDEC_R3NONCER1,OTFDEC region 3 nonce register 1" hexmask.long 0x10 0.--31. 1. "REG_NONCE,Region nonce bits [63:32]" wgroup.long 0x94++0xF line.long 0x0 "OTFDEC_R3KEYR0,OTFDEC region 3 key register 0" hexmask.long 0x0 0.--31. 1. "REG_KEY,Region key bits [31:0]" line.long 0x4 "OTFDEC_R3KEYR1,OTFDEC region 3 key register 1" hexmask.long 0x4 0.--31. 1. "REG_KEY,Region key bits [63:32]" line.long 0x8 "OTFDEC_R3KEYR2,OTFDEC region 3 key register 2" hexmask.long 0x8 0.--31. 1. "REG_KEY,Region key bits [95:64]" line.long 0xC "OTFDEC_R3KEYR3,OTFDEC region 3 key register 3" hexmask.long 0xC 0.--31. 1. "REG_KEY,Region key bits [127:96]" group.long 0xB0++0x13 line.long 0x0 "OTFDEC_R4CFGR,OTFDEC region 4 configuration register" hexmask.long.word 0x0 16.--31. 1. "REG_VERSION,region firmware version" hexmask.long.byte 0x0 8.--15. 1. "KEYCRC,region key 8-bit CRC" bitfld.long 0x0 4.--5. "MODE,operating mode" "?,?,B_0x2,B_0x3" bitfld.long 0x0 2. "KEYLOCK,region key lock" "B_0x0,B_0x1" bitfld.long 0x0 1. "CONFIGLOCK,region config lock" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "REG_EN,region on-the-fly decryption enable" "B_0x0,B_0x1" line.long 0x4 "OTFDEC_R4STARTADDR,OTFDEC region 4 start address register" hexmask.long 0x4 0.--31. 1. "REG_START_ADDR,Region AHB start address" line.long 0x8 "OTFDEC_R4ENDADDR,OTFDEC region 4 end address register" hexmask.long 0x8 0.--31. 1. "REG_END_ADDR,Region AHB end address" line.long 0xC "OTFDEC_R4NONCER0,OTFDEC region 4 nonce register 0" hexmask.long 0xC 0.--31. 1. "REG_NONCE,Region nonce bits [31:0]" line.long 0x10 "OTFDEC_R4NONCER1,OTFDEC region 4 nonce register 1" hexmask.long 0x10 0.--31. 1. "REG_NONCE,Region nonce bits [63:32]" wgroup.long 0xC4++0xF line.long 0x0 "OTFDEC_R4KEYR0,OTFDEC region 4 key register 0" hexmask.long 0x0 0.--31. 1. "REG_KEY,Region key bits [31:0]" line.long 0x4 "OTFDEC_R4KEYR1,OTFDEC region 4 key register 1" hexmask.long 0x4 0.--31. 1. "REG_KEY,Region key bits [63:32]" line.long 0x8 "OTFDEC_R4KEYR2,OTFDEC region 4 key register 2" hexmask.long 0x8 0.--31. 1. "REG_KEY,Region key bits [95:64]" line.long 0xC "OTFDEC_R4KEYR3,OTFDEC region 4 key register 3" hexmask.long 0xC 0.--31. 1. "REG_KEY,Region key bits [127:96]" rgroup.long 0x300++0x3 line.long 0x0 "OTFDEC_ISR,OTFDEC interrupt status register" bitfld.long 0x0 2. "KEIF,Key error interrupt flag status" "B_0x0,B_0x1" bitfld.long 0x0 1. "XONEIF,Execute-only execute-never error interrupt flag status" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEIF,Security error interrupt flag status" "B_0x0,B_0x1" wgroup.long 0x304++0x3 line.long 0x0 "OTFDEC_ICR,OTFDEC interrupt clear register" bitfld.long 0x0 2. "KEIF,Key error interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 1. "XONEIF,Execute-only execute-never error interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEIF,Security error interrupt flag clear" "B_0x0,B_0x1" group.long 0x308++0x3 line.long 0x0 "OTFDEC_IER,OTFDEC interrupt enable register" bitfld.long 0x0 2. "KEIE,Key error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "XONEIE,Execute-only execute-never error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEIE,Security error interrupt enable" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "OTFDEC_HWCFGR,OTFDEC hardware configuration register" hexmask.long.byte 0x0 24.--27. 1. "CFG4,Hardware Generic 4" hexmask.long.byte 0x0 16.--23. 1. "CFG3,Hardware Generic 3" hexmask.long.byte 0x0 8.--15. 1. "CFG2,Hardware Generic 2" hexmask.long.byte 0x0 0.--7. 1. "CFG1,Hardware Generic 1" line.long 0x4 "OTFDEC_VERR,OTFDEC version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "OTFDEC_IPIDR,OTFDEC identification register" hexmask.long 0x8 0.--31. 1. "ID,Identification code" line.long 0xC "OTFDEC_SIDR,OTFDEC size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code" tree.end tree "OTFDEC1_S" base ad:0x50450000 group.long 0x0++0x3 line.long 0x0 "OTFDEC_CR,OTFDEC control register" bitfld.long 0x0 0. "ENC,Encryption mode bit" "B_0x0,B_0x1" group.long 0x20++0x13 line.long 0x0 "OTFDEC_R1CFGR,OTFDEC region 1 configuration register" hexmask.long.word 0x0 16.--31. 1. "REG_VERSION,region firmware version" hexmask.long.byte 0x0 8.--15. 1. "KEYCRC,region key 8-bit CRC" bitfld.long 0x0 4.--5. "MODE,operating mode" "?,?,B_0x2,B_0x3" bitfld.long 0x0 2. "KEYLOCK,region key lock" "B_0x0,B_0x1" bitfld.long 0x0 1. "CONFIGLOCK,region config lock" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "REG_EN,region on-the-fly decryption enable" "B_0x0,B_0x1" line.long 0x4 "OTFDEC_R1STARTADDR,OTFDEC region 1 start address register" hexmask.long 0x4 0.--31. 1. "REG_START_ADDR,Region AHB start address" line.long 0x8 "OTFDEC_R1ENDADDR,OTFDEC region 1 end address register" hexmask.long 0x8 0.--31. 1. "REG_END_ADDR,Region AHB end address" line.long 0xC "OTFDEC_R1NONCER0,OTFDEC region 1 nonce register 0" hexmask.long 0xC 0.--31. 1. "REG_NONCE,Region nonce bits [31:0]" line.long 0x10 "OTFDEC_R1NONCER1,OTFDEC region 1 nonce register 1" hexmask.long 0x10 0.--31. 1. "REG_NONCE,Region nonce bits [63:32]" wgroup.long 0x34++0xF line.long 0x0 "OTFDEC_R1KEYR0,OTFDEC region 1 key register 0" hexmask.long 0x0 0.--31. 1. "REG_KEY,Region key bits [31:0]" line.long 0x4 "OTFDEC_R1KEYR1,OTFDEC region 1 key register 1" hexmask.long 0x4 0.--31. 1. "REG_KEY,Region key bits [63:32]" line.long 0x8 "OTFDEC_R1KEYR2,OTFDEC region 1 key register 2" hexmask.long 0x8 0.--31. 1. "REG_KEY,Region key bits [95:64]" line.long 0xC "OTFDEC_R1KEYR3,OTFDEC region 1 key register 3" hexmask.long 0xC 0.--31. 1. "REG_KEY,Region key bits [127:96]" group.long 0x50++0x13 line.long 0x0 "OTFDEC_R2CFGR,OTFDEC region 2 configuration register" hexmask.long.word 0x0 16.--31. 1. "REG_VERSION,region firmware version" hexmask.long.byte 0x0 8.--15. 1. "KEYCRC,region key 8-bit CRC" bitfld.long 0x0 4.--5. "MODE,operating mode" "?,?,B_0x2,B_0x3" bitfld.long 0x0 2. "KEYLOCK,region key lock" "B_0x0,B_0x1" bitfld.long 0x0 1. "CONFIGLOCK,region config lock" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "REG_EN,region on-the-fly decryption enable" "B_0x0,B_0x1" line.long 0x4 "OTFDEC_R2STARTADDR,OTFDEC region 2 start address register" hexmask.long 0x4 0.--31. 1. "REG_START_ADDR,Region AHB start address" line.long 0x8 "OTFDEC_R2ENDADDR,OTFDEC region 2 end address register" hexmask.long 0x8 0.--31. 1. "REG_END_ADDR,Region AHB end address" line.long 0xC "OTFDEC_R2NONCER0,OTFDEC region 2 nonce register 0" hexmask.long 0xC 0.--31. 1. "REG_NONCE,Region nonce bits [31:0]" line.long 0x10 "OTFDEC_R2NONCER1,OTFDEC region 2 nonce register 1" hexmask.long 0x10 0.--31. 1. "REG_NONCE,Region nonce bits [63:32]" wgroup.long 0x64++0xF line.long 0x0 "OTFDEC_R2KEYR0,OTFDEC region 2 key register 0" hexmask.long 0x0 0.--31. 1. "REG_KEY,Region key bits [31:0]" line.long 0x4 "OTFDEC_R2KEYR1,OTFDEC region 2 key register 1" hexmask.long 0x4 0.--31. 1. "REG_KEY,Region key bits [63:32]" line.long 0x8 "OTFDEC_R2KEYR2,OTFDEC region 2 key register 2" hexmask.long 0x8 0.--31. 1. "REG_KEY,Region key bits [95:64]" line.long 0xC "OTFDEC_R2KEYR3,OTFDEC region 2 key register 3" hexmask.long 0xC 0.--31. 1. "REG_KEY,Region key bits [127:96]" group.long 0x80++0x13 line.long 0x0 "OTFDEC_R3CFGR,OTFDEC region 3 configuration register" hexmask.long.word 0x0 16.--31. 1. "REG_VERSION,region firmware version" hexmask.long.byte 0x0 8.--15. 1. "KEYCRC,region key 8-bit CRC" bitfld.long 0x0 4.--5. "MODE,operating mode" "?,?,B_0x2,B_0x3" bitfld.long 0x0 2. "KEYLOCK,region key lock" "B_0x0,B_0x1" bitfld.long 0x0 1. "CONFIGLOCK,region config lock" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "REG_EN,region on-the-fly decryption enable" "B_0x0,B_0x1" line.long 0x4 "OTFDEC_R3STARTADDR,OTFDEC region 3 start address register" hexmask.long 0x4 0.--31. 1. "REG_START_ADDR,Region AHB start address" line.long 0x8 "OTFDEC_R3ENDADDR,OTFDEC region 3 end address register" hexmask.long 0x8 0.--31. 1. "REG_END_ADDR,Region AHB end address" line.long 0xC "OTFDEC_R3NONCER0,OTFDEC region 3 nonce register 0" hexmask.long 0xC 0.--31. 1. "REG_NONCE,Region nonce bits [31:0]" line.long 0x10 "OTFDEC_R3NONCER1,OTFDEC region 3 nonce register 1" hexmask.long 0x10 0.--31. 1. "REG_NONCE,Region nonce bits [63:32]" wgroup.long 0x94++0xF line.long 0x0 "OTFDEC_R3KEYR0,OTFDEC region 3 key register 0" hexmask.long 0x0 0.--31. 1. "REG_KEY,Region key bits [31:0]" line.long 0x4 "OTFDEC_R3KEYR1,OTFDEC region 3 key register 1" hexmask.long 0x4 0.--31. 1. "REG_KEY,Region key bits [63:32]" line.long 0x8 "OTFDEC_R3KEYR2,OTFDEC region 3 key register 2" hexmask.long 0x8 0.--31. 1. "REG_KEY,Region key bits [95:64]" line.long 0xC "OTFDEC_R3KEYR3,OTFDEC region 3 key register 3" hexmask.long 0xC 0.--31. 1. "REG_KEY,Region key bits [127:96]" group.long 0xB0++0x13 line.long 0x0 "OTFDEC_R4CFGR,OTFDEC region 4 configuration register" hexmask.long.word 0x0 16.--31. 1. "REG_VERSION,region firmware version" hexmask.long.byte 0x0 8.--15. 1. "KEYCRC,region key 8-bit CRC" bitfld.long 0x0 4.--5. "MODE,operating mode" "?,?,B_0x2,B_0x3" bitfld.long 0x0 2. "KEYLOCK,region key lock" "B_0x0,B_0x1" bitfld.long 0x0 1. "CONFIGLOCK,region config lock" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "REG_EN,region on-the-fly decryption enable" "B_0x0,B_0x1" line.long 0x4 "OTFDEC_R4STARTADDR,OTFDEC region 4 start address register" hexmask.long 0x4 0.--31. 1. "REG_START_ADDR,Region AHB start address" line.long 0x8 "OTFDEC_R4ENDADDR,OTFDEC region 4 end address register" hexmask.long 0x8 0.--31. 1. "REG_END_ADDR,Region AHB end address" line.long 0xC "OTFDEC_R4NONCER0,OTFDEC region 4 nonce register 0" hexmask.long 0xC 0.--31. 1. "REG_NONCE,Region nonce bits [31:0]" line.long 0x10 "OTFDEC_R4NONCER1,OTFDEC region 4 nonce register 1" hexmask.long 0x10 0.--31. 1. "REG_NONCE,Region nonce bits [63:32]" wgroup.long 0xC4++0xF line.long 0x0 "OTFDEC_R4KEYR0,OTFDEC region 4 key register 0" hexmask.long 0x0 0.--31. 1. "REG_KEY,Region key bits [31:0]" line.long 0x4 "OTFDEC_R4KEYR1,OTFDEC region 4 key register 1" hexmask.long 0x4 0.--31. 1. "REG_KEY,Region key bits [63:32]" line.long 0x8 "OTFDEC_R4KEYR2,OTFDEC region 4 key register 2" hexmask.long 0x8 0.--31. 1. "REG_KEY,Region key bits [95:64]" line.long 0xC "OTFDEC_R4KEYR3,OTFDEC region 4 key register 3" hexmask.long 0xC 0.--31. 1. "REG_KEY,Region key bits [127:96]" rgroup.long 0x300++0x3 line.long 0x0 "OTFDEC_ISR,OTFDEC interrupt status register" bitfld.long 0x0 2. "KEIF,Key error interrupt flag status" "B_0x0,B_0x1" bitfld.long 0x0 1. "XONEIF,Execute-only execute-never error interrupt flag status" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEIF,Security error interrupt flag status" "B_0x0,B_0x1" wgroup.long 0x304++0x3 line.long 0x0 "OTFDEC_ICR,OTFDEC interrupt clear register" bitfld.long 0x0 2. "KEIF,Key error interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 1. "XONEIF,Execute-only execute-never error interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEIF,Security error interrupt flag clear" "B_0x0,B_0x1" group.long 0x308++0x3 line.long 0x0 "OTFDEC_IER,OTFDEC interrupt enable register" bitfld.long 0x0 2. "KEIE,Key error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "XONEIE,Execute-only execute-never error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEIE,Security error interrupt enable" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "OTFDEC_HWCFGR,OTFDEC hardware configuration register" hexmask.long.byte 0x0 24.--27. 1. "CFG4,Hardware Generic 4" hexmask.long.byte 0x0 16.--23. 1. "CFG3,Hardware Generic 3" hexmask.long.byte 0x0 8.--15. 1. "CFG2,Hardware Generic 2" hexmask.long.byte 0x0 0.--7. 1. "CFG1,Hardware Generic 1" line.long 0x4 "OTFDEC_VERR,OTFDEC version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "OTFDEC_IPIDR,OTFDEC identification register" hexmask.long 0x8 0.--31. 1. "ID,Identification code" line.long 0xC "OTFDEC_SIDR,OTFDEC size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code" tree.end tree "OTFDEC2" base ad:0x40460000 group.long 0x0++0x3 line.long 0x0 "OTFDEC_CR,OTFDEC control register" bitfld.long 0x0 0. "ENC,Encryption mode bit" "B_0x0,B_0x1" group.long 0x20++0x13 line.long 0x0 "OTFDEC_R1CFGR,OTFDEC region 1 configuration register" hexmask.long.word 0x0 16.--31. 1. "REG_VERSION,region firmware version" hexmask.long.byte 0x0 8.--15. 1. "KEYCRC,region key 8-bit CRC" bitfld.long 0x0 4.--5. "MODE,operating mode" "?,?,B_0x2,B_0x3" bitfld.long 0x0 2. "KEYLOCK,region key lock" "B_0x0,B_0x1" bitfld.long 0x0 1. "CONFIGLOCK,region config lock" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "REG_EN,region on-the-fly decryption enable" "B_0x0,B_0x1" line.long 0x4 "OTFDEC_R1STARTADDR,OTFDEC region 1 start address register" hexmask.long 0x4 0.--31. 1. "REG_START_ADDR,Region AHB start address" line.long 0x8 "OTFDEC_R1ENDADDR,OTFDEC region 1 end address register" hexmask.long 0x8 0.--31. 1. "REG_END_ADDR,Region AHB end address" line.long 0xC "OTFDEC_R1NONCER0,OTFDEC region 1 nonce register 0" hexmask.long 0xC 0.--31. 1. "REG_NONCE,Region nonce bits [31:0]" line.long 0x10 "OTFDEC_R1NONCER1,OTFDEC region 1 nonce register 1" hexmask.long 0x10 0.--31. 1. "REG_NONCE,Region nonce bits [63:32]" wgroup.long 0x34++0xF line.long 0x0 "OTFDEC_R1KEYR0,OTFDEC region 1 key register 0" hexmask.long 0x0 0.--31. 1. "REG_KEY,Region key bits [31:0]" line.long 0x4 "OTFDEC_R1KEYR1,OTFDEC region 1 key register 1" hexmask.long 0x4 0.--31. 1. "REG_KEY,Region key bits [63:32]" line.long 0x8 "OTFDEC_R1KEYR2,OTFDEC region 1 key register 2" hexmask.long 0x8 0.--31. 1. "REG_KEY,Region key bits [95:64]" line.long 0xC "OTFDEC_R1KEYR3,OTFDEC region 1 key register 3" hexmask.long 0xC 0.--31. 1. "REG_KEY,Region key bits [127:96]" group.long 0x50++0x13 line.long 0x0 "OTFDEC_R2CFGR,OTFDEC region 2 configuration register" hexmask.long.word 0x0 16.--31. 1. "REG_VERSION,region firmware version" hexmask.long.byte 0x0 8.--15. 1. "KEYCRC,region key 8-bit CRC" bitfld.long 0x0 4.--5. "MODE,operating mode" "?,?,B_0x2,B_0x3" bitfld.long 0x0 2. "KEYLOCK,region key lock" "B_0x0,B_0x1" bitfld.long 0x0 1. "CONFIGLOCK,region config lock" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "REG_EN,region on-the-fly decryption enable" "B_0x0,B_0x1" line.long 0x4 "OTFDEC_R2STARTADDR,OTFDEC region 2 start address register" hexmask.long 0x4 0.--31. 1. "REG_START_ADDR,Region AHB start address" line.long 0x8 "OTFDEC_R2ENDADDR,OTFDEC region 2 end address register" hexmask.long 0x8 0.--31. 1. "REG_END_ADDR,Region AHB end address" line.long 0xC "OTFDEC_R2NONCER0,OTFDEC region 2 nonce register 0" hexmask.long 0xC 0.--31. 1. "REG_NONCE,Region nonce bits [31:0]" line.long 0x10 "OTFDEC_R2NONCER1,OTFDEC region 2 nonce register 1" hexmask.long 0x10 0.--31. 1. "REG_NONCE,Region nonce bits [63:32]" wgroup.long 0x64++0xF line.long 0x0 "OTFDEC_R2KEYR0,OTFDEC region 2 key register 0" hexmask.long 0x0 0.--31. 1. "REG_KEY,Region key bits [31:0]" line.long 0x4 "OTFDEC_R2KEYR1,OTFDEC region 2 key register 1" hexmask.long 0x4 0.--31. 1. "REG_KEY,Region key bits [63:32]" line.long 0x8 "OTFDEC_R2KEYR2,OTFDEC region 2 key register 2" hexmask.long 0x8 0.--31. 1. "REG_KEY,Region key bits [95:64]" line.long 0xC "OTFDEC_R2KEYR3,OTFDEC region 2 key register 3" hexmask.long 0xC 0.--31. 1. "REG_KEY,Region key bits [127:96]" group.long 0x80++0x13 line.long 0x0 "OTFDEC_R3CFGR,OTFDEC region 3 configuration register" hexmask.long.word 0x0 16.--31. 1. "REG_VERSION,region firmware version" hexmask.long.byte 0x0 8.--15. 1. "KEYCRC,region key 8-bit CRC" bitfld.long 0x0 4.--5. "MODE,operating mode" "?,?,B_0x2,B_0x3" bitfld.long 0x0 2. "KEYLOCK,region key lock" "B_0x0,B_0x1" bitfld.long 0x0 1. "CONFIGLOCK,region config lock" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "REG_EN,region on-the-fly decryption enable" "B_0x0,B_0x1" line.long 0x4 "OTFDEC_R3STARTADDR,OTFDEC region 3 start address register" hexmask.long 0x4 0.--31. 1. "REG_START_ADDR,Region AHB start address" line.long 0x8 "OTFDEC_R3ENDADDR,OTFDEC region 3 end address register" hexmask.long 0x8 0.--31. 1. "REG_END_ADDR,Region AHB end address" line.long 0xC "OTFDEC_R3NONCER0,OTFDEC region 3 nonce register 0" hexmask.long 0xC 0.--31. 1. "REG_NONCE,Region nonce bits [31:0]" line.long 0x10 "OTFDEC_R3NONCER1,OTFDEC region 3 nonce register 1" hexmask.long 0x10 0.--31. 1. "REG_NONCE,Region nonce bits [63:32]" wgroup.long 0x94++0xF line.long 0x0 "OTFDEC_R3KEYR0,OTFDEC region 3 key register 0" hexmask.long 0x0 0.--31. 1. "REG_KEY,Region key bits [31:0]" line.long 0x4 "OTFDEC_R3KEYR1,OTFDEC region 3 key register 1" hexmask.long 0x4 0.--31. 1. "REG_KEY,Region key bits [63:32]" line.long 0x8 "OTFDEC_R3KEYR2,OTFDEC region 3 key register 2" hexmask.long 0x8 0.--31. 1. "REG_KEY,Region key bits [95:64]" line.long 0xC "OTFDEC_R3KEYR3,OTFDEC region 3 key register 3" hexmask.long 0xC 0.--31. 1. "REG_KEY,Region key bits [127:96]" group.long 0xB0++0x13 line.long 0x0 "OTFDEC_R4CFGR,OTFDEC region 4 configuration register" hexmask.long.word 0x0 16.--31. 1. "REG_VERSION,region firmware version" hexmask.long.byte 0x0 8.--15. 1. "KEYCRC,region key 8-bit CRC" bitfld.long 0x0 4.--5. "MODE,operating mode" "?,?,B_0x2,B_0x3" bitfld.long 0x0 2. "KEYLOCK,region key lock" "B_0x0,B_0x1" bitfld.long 0x0 1. "CONFIGLOCK,region config lock" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "REG_EN,region on-the-fly decryption enable" "B_0x0,B_0x1" line.long 0x4 "OTFDEC_R4STARTADDR,OTFDEC region 4 start address register" hexmask.long 0x4 0.--31. 1. "REG_START_ADDR,Region AHB start address" line.long 0x8 "OTFDEC_R4ENDADDR,OTFDEC region 4 end address register" hexmask.long 0x8 0.--31. 1. "REG_END_ADDR,Region AHB end address" line.long 0xC "OTFDEC_R4NONCER0,OTFDEC region 4 nonce register 0" hexmask.long 0xC 0.--31. 1. "REG_NONCE,Region nonce bits [31:0]" line.long 0x10 "OTFDEC_R4NONCER1,OTFDEC region 4 nonce register 1" hexmask.long 0x10 0.--31. 1. "REG_NONCE,Region nonce bits [63:32]" wgroup.long 0xC4++0xF line.long 0x0 "OTFDEC_R4KEYR0,OTFDEC region 4 key register 0" hexmask.long 0x0 0.--31. 1. "REG_KEY,Region key bits [31:0]" line.long 0x4 "OTFDEC_R4KEYR1,OTFDEC region 4 key register 1" hexmask.long 0x4 0.--31. 1. "REG_KEY,Region key bits [63:32]" line.long 0x8 "OTFDEC_R4KEYR2,OTFDEC region 4 key register 2" hexmask.long 0x8 0.--31. 1. "REG_KEY,Region key bits [95:64]" line.long 0xC "OTFDEC_R4KEYR3,OTFDEC region 4 key register 3" hexmask.long 0xC 0.--31. 1. "REG_KEY,Region key bits [127:96]" rgroup.long 0x300++0x3 line.long 0x0 "OTFDEC_ISR,OTFDEC interrupt status register" bitfld.long 0x0 2. "KEIF,Key error interrupt flag status" "B_0x0,B_0x1" bitfld.long 0x0 1. "XONEIF,Execute-only execute-never error interrupt flag status" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEIF,Security error interrupt flag status" "B_0x0,B_0x1" wgroup.long 0x304++0x3 line.long 0x0 "OTFDEC_ICR,OTFDEC interrupt clear register" bitfld.long 0x0 2. "KEIF,Key error interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 1. "XONEIF,Execute-only execute-never error interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEIF,Security error interrupt flag clear" "B_0x0,B_0x1" group.long 0x308++0x3 line.long 0x0 "OTFDEC_IER,OTFDEC interrupt enable register" bitfld.long 0x0 2. "KEIE,Key error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "XONEIE,Execute-only execute-never error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEIE,Security error interrupt enable" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "OTFDEC_HWCFGR,OTFDEC hardware configuration register" hexmask.long.byte 0x0 24.--27. 1. "CFG4,Hardware Generic 4" hexmask.long.byte 0x0 16.--23. 1. "CFG3,Hardware Generic 3" hexmask.long.byte 0x0 8.--15. 1. "CFG2,Hardware Generic 2" hexmask.long.byte 0x0 0.--7. 1. "CFG1,Hardware Generic 1" line.long 0x4 "OTFDEC_VERR,OTFDEC version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "OTFDEC_IPIDR,OTFDEC identification register" hexmask.long 0x8 0.--31. 1. "ID,Identification code" line.long 0xC "OTFDEC_SIDR,OTFDEC size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code" tree.end tree "OTFDEC2_S" base ad:0x50460000 group.long 0x0++0x3 line.long 0x0 "OTFDEC_CR,OTFDEC control register" bitfld.long 0x0 0. "ENC,Encryption mode bit" "B_0x0,B_0x1" group.long 0x20++0x13 line.long 0x0 "OTFDEC_R1CFGR,OTFDEC region 1 configuration register" hexmask.long.word 0x0 16.--31. 1. "REG_VERSION,region firmware version" hexmask.long.byte 0x0 8.--15. 1. "KEYCRC,region key 8-bit CRC" bitfld.long 0x0 4.--5. "MODE,operating mode" "?,?,B_0x2,B_0x3" bitfld.long 0x0 2. "KEYLOCK,region key lock" "B_0x0,B_0x1" bitfld.long 0x0 1. "CONFIGLOCK,region config lock" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "REG_EN,region on-the-fly decryption enable" "B_0x0,B_0x1" line.long 0x4 "OTFDEC_R1STARTADDR,OTFDEC region 1 start address register" hexmask.long 0x4 0.--31. 1. "REG_START_ADDR,Region AHB start address" line.long 0x8 "OTFDEC_R1ENDADDR,OTFDEC region 1 end address register" hexmask.long 0x8 0.--31. 1. "REG_END_ADDR,Region AHB end address" line.long 0xC "OTFDEC_R1NONCER0,OTFDEC region 1 nonce register 0" hexmask.long 0xC 0.--31. 1. "REG_NONCE,Region nonce bits [31:0]" line.long 0x10 "OTFDEC_R1NONCER1,OTFDEC region 1 nonce register 1" hexmask.long 0x10 0.--31. 1. "REG_NONCE,Region nonce bits [63:32]" wgroup.long 0x34++0xF line.long 0x0 "OTFDEC_R1KEYR0,OTFDEC region 1 key register 0" hexmask.long 0x0 0.--31. 1. "REG_KEY,Region key bits [31:0]" line.long 0x4 "OTFDEC_R1KEYR1,OTFDEC region 1 key register 1" hexmask.long 0x4 0.--31. 1. "REG_KEY,Region key bits [63:32]" line.long 0x8 "OTFDEC_R1KEYR2,OTFDEC region 1 key register 2" hexmask.long 0x8 0.--31. 1. "REG_KEY,Region key bits [95:64]" line.long 0xC "OTFDEC_R1KEYR3,OTFDEC region 1 key register 3" hexmask.long 0xC 0.--31. 1. "REG_KEY,Region key bits [127:96]" group.long 0x50++0x13 line.long 0x0 "OTFDEC_R2CFGR,OTFDEC region 2 configuration register" hexmask.long.word 0x0 16.--31. 1. "REG_VERSION,region firmware version" hexmask.long.byte 0x0 8.--15. 1. "KEYCRC,region key 8-bit CRC" bitfld.long 0x0 4.--5. "MODE,operating mode" "?,?,B_0x2,B_0x3" bitfld.long 0x0 2. "KEYLOCK,region key lock" "B_0x0,B_0x1" bitfld.long 0x0 1. "CONFIGLOCK,region config lock" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "REG_EN,region on-the-fly decryption enable" "B_0x0,B_0x1" line.long 0x4 "OTFDEC_R2STARTADDR,OTFDEC region 2 start address register" hexmask.long 0x4 0.--31. 1. "REG_START_ADDR,Region AHB start address" line.long 0x8 "OTFDEC_R2ENDADDR,OTFDEC region 2 end address register" hexmask.long 0x8 0.--31. 1. "REG_END_ADDR,Region AHB end address" line.long 0xC "OTFDEC_R2NONCER0,OTFDEC region 2 nonce register 0" hexmask.long 0xC 0.--31. 1. "REG_NONCE,Region nonce bits [31:0]" line.long 0x10 "OTFDEC_R2NONCER1,OTFDEC region 2 nonce register 1" hexmask.long 0x10 0.--31. 1. "REG_NONCE,Region nonce bits [63:32]" wgroup.long 0x64++0xF line.long 0x0 "OTFDEC_R2KEYR0,OTFDEC region 2 key register 0" hexmask.long 0x0 0.--31. 1. "REG_KEY,Region key bits [31:0]" line.long 0x4 "OTFDEC_R2KEYR1,OTFDEC region 2 key register 1" hexmask.long 0x4 0.--31. 1. "REG_KEY,Region key bits [63:32]" line.long 0x8 "OTFDEC_R2KEYR2,OTFDEC region 2 key register 2" hexmask.long 0x8 0.--31. 1. "REG_KEY,Region key bits [95:64]" line.long 0xC "OTFDEC_R2KEYR3,OTFDEC region 2 key register 3" hexmask.long 0xC 0.--31. 1. "REG_KEY,Region key bits [127:96]" group.long 0x80++0x13 line.long 0x0 "OTFDEC_R3CFGR,OTFDEC region 3 configuration register" hexmask.long.word 0x0 16.--31. 1. "REG_VERSION,region firmware version" hexmask.long.byte 0x0 8.--15. 1. "KEYCRC,region key 8-bit CRC" bitfld.long 0x0 4.--5. "MODE,operating mode" "?,?,B_0x2,B_0x3" bitfld.long 0x0 2. "KEYLOCK,region key lock" "B_0x0,B_0x1" bitfld.long 0x0 1. "CONFIGLOCK,region config lock" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "REG_EN,region on-the-fly decryption enable" "B_0x0,B_0x1" line.long 0x4 "OTFDEC_R3STARTADDR,OTFDEC region 3 start address register" hexmask.long 0x4 0.--31. 1. "REG_START_ADDR,Region AHB start address" line.long 0x8 "OTFDEC_R3ENDADDR,OTFDEC region 3 end address register" hexmask.long 0x8 0.--31. 1. "REG_END_ADDR,Region AHB end address" line.long 0xC "OTFDEC_R3NONCER0,OTFDEC region 3 nonce register 0" hexmask.long 0xC 0.--31. 1. "REG_NONCE,Region nonce bits [31:0]" line.long 0x10 "OTFDEC_R3NONCER1,OTFDEC region 3 nonce register 1" hexmask.long 0x10 0.--31. 1. "REG_NONCE,Region nonce bits [63:32]" wgroup.long 0x94++0xF line.long 0x0 "OTFDEC_R3KEYR0,OTFDEC region 3 key register 0" hexmask.long 0x0 0.--31. 1. "REG_KEY,Region key bits [31:0]" line.long 0x4 "OTFDEC_R3KEYR1,OTFDEC region 3 key register 1" hexmask.long 0x4 0.--31. 1. "REG_KEY,Region key bits [63:32]" line.long 0x8 "OTFDEC_R3KEYR2,OTFDEC region 3 key register 2" hexmask.long 0x8 0.--31. 1. "REG_KEY,Region key bits [95:64]" line.long 0xC "OTFDEC_R3KEYR3,OTFDEC region 3 key register 3" hexmask.long 0xC 0.--31. 1. "REG_KEY,Region key bits [127:96]" group.long 0xB0++0x13 line.long 0x0 "OTFDEC_R4CFGR,OTFDEC region 4 configuration register" hexmask.long.word 0x0 16.--31. 1. "REG_VERSION,region firmware version" hexmask.long.byte 0x0 8.--15. 1. "KEYCRC,region key 8-bit CRC" bitfld.long 0x0 4.--5. "MODE,operating mode" "?,?,B_0x2,B_0x3" bitfld.long 0x0 2. "KEYLOCK,region key lock" "B_0x0,B_0x1" bitfld.long 0x0 1. "CONFIGLOCK,region config lock" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "REG_EN,region on-the-fly decryption enable" "B_0x0,B_0x1" line.long 0x4 "OTFDEC_R4STARTADDR,OTFDEC region 4 start address register" hexmask.long 0x4 0.--31. 1. "REG_START_ADDR,Region AHB start address" line.long 0x8 "OTFDEC_R4ENDADDR,OTFDEC region 4 end address register" hexmask.long 0x8 0.--31. 1. "REG_END_ADDR,Region AHB end address" line.long 0xC "OTFDEC_R4NONCER0,OTFDEC region 4 nonce register 0" hexmask.long 0xC 0.--31. 1. "REG_NONCE,Region nonce bits [31:0]" line.long 0x10 "OTFDEC_R4NONCER1,OTFDEC region 4 nonce register 1" hexmask.long 0x10 0.--31. 1. "REG_NONCE,Region nonce bits [63:32]" wgroup.long 0xC4++0xF line.long 0x0 "OTFDEC_R4KEYR0,OTFDEC region 4 key register 0" hexmask.long 0x0 0.--31. 1. "REG_KEY,Region key bits [31:0]" line.long 0x4 "OTFDEC_R4KEYR1,OTFDEC region 4 key register 1" hexmask.long 0x4 0.--31. 1. "REG_KEY,Region key bits [63:32]" line.long 0x8 "OTFDEC_R4KEYR2,OTFDEC region 4 key register 2" hexmask.long 0x8 0.--31. 1. "REG_KEY,Region key bits [95:64]" line.long 0xC "OTFDEC_R4KEYR3,OTFDEC region 4 key register 3" hexmask.long 0xC 0.--31. 1. "REG_KEY,Region key bits [127:96]" rgroup.long 0x300++0x3 line.long 0x0 "OTFDEC_ISR,OTFDEC interrupt status register" bitfld.long 0x0 2. "KEIF,Key error interrupt flag status" "B_0x0,B_0x1" bitfld.long 0x0 1. "XONEIF,Execute-only execute-never error interrupt flag status" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEIF,Security error interrupt flag status" "B_0x0,B_0x1" wgroup.long 0x304++0x3 line.long 0x0 "OTFDEC_ICR,OTFDEC interrupt clear register" bitfld.long 0x0 2. "KEIF,Key error interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 1. "XONEIF,Execute-only execute-never error interrupt flag clear" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEIF,Security error interrupt flag clear" "B_0x0,B_0x1" group.long 0x308++0x3 line.long 0x0 "OTFDEC_IER,OTFDEC interrupt enable register" bitfld.long 0x0 2. "KEIE,Key error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "XONEIE,Execute-only execute-never error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEIE,Security error interrupt enable" "B_0x0,B_0x1" rgroup.long 0x3F0++0xF line.long 0x0 "OTFDEC_HWCFGR,OTFDEC hardware configuration register" hexmask.long.byte 0x0 24.--27. 1. "CFG4,Hardware Generic 4" hexmask.long.byte 0x0 16.--23. 1. "CFG3,Hardware Generic 3" hexmask.long.byte 0x0 8.--15. 1. "CFG2,Hardware Generic 2" hexmask.long.byte 0x0 0.--7. 1. "CFG1,Hardware Generic 1" line.long 0x4 "OTFDEC_VERR,OTFDEC version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "OTFDEC_IPIDR,OTFDEC identification register" hexmask.long 0x8 0.--31. 1. "ID,Identification code" line.long 0xC "OTFDEC_SIDR,OTFDEC size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code" tree.end tree.end tree "PKA (Public Key Accelerator)" base ad:0x0 tree "PKA" base ad:0x42060000 group.long 0x0++0x3 line.long 0x0 "PKA_CR,PKA control register" bitfld.long 0x0 21. "OPERRIE,Operation error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "ADDRERRIE,Address error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 19. "RAMERRIE,RAM error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "PROCENDIE,End of operation interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--13. 1. "MODE,PKA operation code" bitfld.long 0x0 1. "START,start the operation" "0,1" bitfld.long 0x0 0. "EN,PKA enable" "B_0x0,B_0x1" rgroup.long 0x4++0x3 line.long 0x0 "PKA_SR,PKA status register" bitfld.long 0x0 21. "OPERRF,Operation error flag" "B_0x0,B_0x1" bitfld.long 0x0 20. "ADDRERRF,Address error flag" "B_0x0,B_0x1" bitfld.long 0x0 19. "RAMERRF,PKA RAM error flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "PROCENDF,PKA end of operation flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "LMF,Limited mode flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "INITOK,PKA initialization OK" "B_0x0,B_0x1" wgroup.long 0x8++0x3 line.long 0x0 "PKA_CLRFR,PKA clear flag register" bitfld.long 0x0 21. "OPERRFC,Clear operation error flag" "B_0x0,B_0x1" bitfld.long 0x0 20. "ADDRERRFC,Clear address error flag" "B_0x0,B_0x1" bitfld.long 0x0 19. "RAMERRFC,Clear PKA RAM error flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "PROCENDFC,Clear PKA end of operation flag" "B_0x0,B_0x1" rgroup.long 0x1FF0++0xF line.long 0x0 "PKA_HWCFGR,PKA hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "CFG2,HW Generic 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,HW Generic 2" line.long 0x4 "PKA_VERR,PKA version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "PKA_IPIDR,PKA identification register" hexmask.long 0x8 0.--31. 1. "ID,Identification code" line.long 0xC "PKA_SIDR,PKA size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code" tree.end tree "PKA_S" base ad:0x52060000 group.long 0x0++0x3 line.long 0x0 "PKA_CR,PKA control register" bitfld.long 0x0 21. "OPERRIE,Operation error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "ADDRERRIE,Address error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 19. "RAMERRIE,RAM error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "PROCENDIE,End of operation interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 8.--13. 1. "MODE,PKA operation code" bitfld.long 0x0 1. "START,start the operation" "0,1" bitfld.long 0x0 0. "EN,PKA enable" "B_0x0,B_0x1" rgroup.long 0x4++0x3 line.long 0x0 "PKA_SR,PKA status register" bitfld.long 0x0 21. "OPERRF,Operation error flag" "B_0x0,B_0x1" bitfld.long 0x0 20. "ADDRERRF,Address error flag" "B_0x0,B_0x1" bitfld.long 0x0 19. "RAMERRF,PKA RAM error flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "PROCENDF,PKA end of operation flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "LMF,Limited mode flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "INITOK,PKA initialization OK" "B_0x0,B_0x1" wgroup.long 0x8++0x3 line.long 0x0 "PKA_CLRFR,PKA clear flag register" bitfld.long 0x0 21. "OPERRFC,Clear operation error flag" "B_0x0,B_0x1" bitfld.long 0x0 20. "ADDRERRFC,Clear address error flag" "B_0x0,B_0x1" bitfld.long 0x0 19. "RAMERRFC,Clear PKA RAM error flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "PROCENDFC,Clear PKA end of operation flag" "B_0x0,B_0x1" rgroup.long 0x1FF0++0xF line.long 0x0 "PKA_HWCFGR,PKA hardware configuration register" hexmask.long.byte 0x0 4.--7. 1. "CFG2,HW Generic 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,HW Generic 2" line.long 0x4 "PKA_VERR,PKA version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "PKA_IPIDR,PKA identification register" hexmask.long 0x8 0.--31. 1. "ID,Identification code" line.long 0xC "PKA_SIDR,PKA size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code" tree.end tree.end tree "PSSI (Parallel Synchronous Slave Interface)" base ad:0x0 tree "PSSI" base ad:0x404B0000 group.long 0x0++0x3 line.long 0x0 "PSSI_CR,PSSI control register" bitfld.long 0x0 31. "OUTEN,Data direction selection bit" "B_0x0,B_0x1" bitfld.long 0x0 30. "DMAEN,DMA enable bit" "B_0x0,B_0x1" bitfld.long 0x0 18.--20. "DERDYCFG,Data enable and ready configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 14. "ENABLE,PSSI enable" "B_0x0,B_0x1" bitfld.long 0x0 10.--11. "EDM,Extended data mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8. "RDYPOL,Ready (PSSI_RDY) polarity" "B_0x0,B_0x1" bitfld.long 0x0 6. "DEPOL,Data enable (PSSI_DE) polarity" "B_0x0,B_0x1" bitfld.long 0x0 5. "CKPOL,Parallel data clock polarity" "B_0x0,B_0x1" rgroup.long 0x4++0x7 line.long 0x0 "PSSI_SR,PSSI status register" bitfld.long 0x0 3. "RTT1B,FIFO is ready to transfer one byte" "B_0x0,B_0x1" bitfld.long 0x0 2. "RTT4B,FIFO is ready to transfer four bytes" "B_0x0,B_0x1" line.long 0x4 "PSSI_RIS,PSSI raw interrupt status register" bitfld.long 0x4 1. "OVR_RIS,Data buffer overrun/underrun raw interrupt status" "B_0x0,B_0x1" group.long 0xC++0x3 line.long 0x0 "PSSI_IER,PSSI interrupt enable register" bitfld.long 0x0 1. "OVR_IE,Data buffer overrun/underrun interrupt enable" "B_0x0,B_0x1" rgroup.long 0x10++0x3 line.long 0x0 "PSSI_MIS,PSSI masked interrupt status register" bitfld.long 0x0 1. "OVR_MIS,Data buffer overrun/underrun masked interrupt status" "B_0x0,B_0x1" wgroup.long 0x14++0x3 line.long 0x0 "PSSI_ICR,PSSI interrupt clear register" bitfld.long 0x0 1. "OVR_ISC,Data buffer overrun/underrun interrupt status clear" "0,1" group.long 0x28++0x3 line.long 0x0 "PSSI_DR,PSSI data register" hexmask.long.byte 0x0 24.--31. 1. "BYTE3,Data byte 3" hexmask.long.byte 0x0 16.--23. 1. "BYTE2,Data byte 2" hexmask.long.byte 0x0 8.--15. 1. "BYTE1,Data byte 1" hexmask.long.byte 0x0 0.--7. 1. "BYTE0,Data byte 0" rgroup.long 0x3F0++0xF line.long 0x0 "PSSI_HWCFGR,PSSI hardware configuration register" hexmask.long.byte 0x0 0.--3. 1. "FIFO_8,FIFO size" line.long 0x4 "PSSI_VERR,PSSI version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IP version major revision information" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IP version minor revision information" line.long 0x8 "PSSI_IPIDR,PSSI ID register" hexmask.long 0x8 0.--31. 1. "IP_ID,00161011 for PSSI" line.long 0xC "PSSI_SIDR,PSSI size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code" tree.end tree "PSSI_S" base ad:0x504B0000 group.long 0x0++0x3 line.long 0x0 "PSSI_CR,PSSI control register" bitfld.long 0x0 31. "OUTEN,Data direction selection bit" "B_0x0,B_0x1" bitfld.long 0x0 30. "DMAEN,DMA enable bit" "B_0x0,B_0x1" bitfld.long 0x0 18.--20. "DERDYCFG,Data enable and ready configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 14. "ENABLE,PSSI enable" "B_0x0,B_0x1" bitfld.long 0x0 10.--11. "EDM,Extended data mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 8. "RDYPOL,Ready (PSSI_RDY) polarity" "B_0x0,B_0x1" bitfld.long 0x0 6. "DEPOL,Data enable (PSSI_DE) polarity" "B_0x0,B_0x1" bitfld.long 0x0 5. "CKPOL,Parallel data clock polarity" "B_0x0,B_0x1" rgroup.long 0x4++0x7 line.long 0x0 "PSSI_SR,PSSI status register" bitfld.long 0x0 3. "RTT1B,FIFO is ready to transfer one byte" "B_0x0,B_0x1" bitfld.long 0x0 2. "RTT4B,FIFO is ready to transfer four bytes" "B_0x0,B_0x1" line.long 0x4 "PSSI_RIS,PSSI raw interrupt status register" bitfld.long 0x4 1. "OVR_RIS,Data buffer overrun/underrun raw interrupt status" "B_0x0,B_0x1" group.long 0xC++0x3 line.long 0x0 "PSSI_IER,PSSI interrupt enable register" bitfld.long 0x0 1. "OVR_IE,Data buffer overrun/underrun interrupt enable" "B_0x0,B_0x1" rgroup.long 0x10++0x3 line.long 0x0 "PSSI_MIS,PSSI masked interrupt status register" bitfld.long 0x0 1. "OVR_MIS,Data buffer overrun/underrun masked interrupt status" "B_0x0,B_0x1" wgroup.long 0x14++0x3 line.long 0x0 "PSSI_ICR,PSSI interrupt clear register" bitfld.long 0x0 1. "OVR_ISC,Data buffer overrun/underrun interrupt status clear" "0,1" group.long 0x28++0x3 line.long 0x0 "PSSI_DR,PSSI data register" hexmask.long.byte 0x0 24.--31. 1. "BYTE3,Data byte 3" hexmask.long.byte 0x0 16.--23. 1. "BYTE2,Data byte 2" hexmask.long.byte 0x0 8.--15. 1. "BYTE1,Data byte 1" hexmask.long.byte 0x0 0.--7. 1. "BYTE0,Data byte 0" rgroup.long 0x3F0++0xF line.long 0x0 "PSSI_HWCFGR,PSSI hardware configuration register" hexmask.long.byte 0x0 0.--3. 1. "FIFO_8,FIFO size" line.long 0x4 "PSSI_VERR,PSSI version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,IP version major revision information" hexmask.long.byte 0x4 0.--3. 1. "MINREV,IP version minor revision information" line.long 0x8 "PSSI_IPIDR,PSSI ID register" hexmask.long 0x8 0.--31. 1. "IP_ID,00161011 for PSSI" line.long 0xC "PSSI_SIDR,PSSI size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code" tree.end tree.end endif tree "PWR (Power Control)" base ad:0x0 tree "PWR" base ad:0x44210000 group.long 0x0++0xB line.long 0x0 "PWR_CR1,PWR control register 1" rbitfld.long 0x0 31. "GPVMO,Global peripheral voltage monitor output" "B_0x0,B_0x1" bitfld.long 0x0 26. "VDDIO4VRSEL,VDDIO4 I/O voltage range selection" "B_0x0,B_0x1" bitfld.long 0x0 25. "VDDIO3VRSEL,VDDIO3 I/O voltage range selection" "B_0x0,B_0x1" bitfld.long 0x0 24. "VDDIOVRSEL,VDD I/O voltage range selection" "B_0x0,B_0x1" rbitfld.long 0x0 20. "ARDY,Vless thansub>DDA18ADC less than/sub>ready" "B_0x0,B_0x1" newline rbitfld.long 0x0 19. "UCPDRDY,Vless thansub>DD33UCPD less than/sub>ready" "B_0x0,B_0x1" rbitfld.long 0x0 18. "USB33RDY,Vless thansub>DD33USB less than/sub>ready" "B_0x0,B_0x1" rbitfld.long 0x0 17. "VDDIO4RDY,Vless thansub>DDIO4 less than/sub>ready" "B_0x0,B_0x1" rbitfld.long 0x0 16. "VDDIO3RDY,Vless thansub>DDIO3 less than/sub>ready" "B_0x0,B_0x1" bitfld.long 0x0 12. "ASV,Vless thansub>DDA18ADC less than/sub>independent supply valid" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "UCPDSV,Vless thansub>DD33UCPD less than/sub>independent supply valid" "B_0x0,B_0x1" bitfld.long 0x0 9. "VDDIO4SV,Vless thansub>DDIO4 less than/sub>independent supply valid" "B_0x0,B_0x1" bitfld.long 0x0 8. "VDDIO3SV,Vless thansub>DDIO3 less than/sub>independent supply valid" "B_0x0,B_0x1" bitfld.long 0x0 4. "AVMEN,Vless thansub>DDA18ADC less than/sub>independent ADC voltage monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "UCPDVMEN,Vless thansub>DD33UCPD less than/sub>independent UCPD voltage monitor enable" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "USB33VMEN,Vless thansub>DD33USB less than/sub>independent USB 33 voltage monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "VDDIO4VMEN,Vless thansub>DDIO4 less than/sub>independent voltage monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "VDDIO3VMEN,Vless thansub>DDIO3 less than/sub>independent voltage monitor enable" "B_0x0,B_0x1" line.long 0x4 "PWR_CR2,PWR control register 2" rbitfld.long 0x4 11. "TEMPH,Monitored temperature level above high threshold" "B_0x0,B_0x1" rbitfld.long 0x4 10. "TEMPL,Monitored temperature level above low threshold" "B_0x0,B_0x1" rbitfld.long 0x4 9. "V08CAPH,Monitored Vless thansub>08CAPless than/sub> level above high threshold" "B_0x0,B_0x1" rbitfld.long 0x4 8. "V08CAPL,Monitored Vless thansub>08CAPless than/sub> level above low threshold" "B_0x0,B_0x1" bitfld.long 0x4 0. "MONEN,Vless thansub>08CAPless than/sub> and temperature monitoring enable" "B_0x0,B_0x1" line.long 0x8 "PWR_CR3,PWR control register 3" rbitfld.long 0x8 8. "PVDO,Programmable voltage detector (PVD) output" "B_0x0,B_0x1" bitfld.long 0x8 0. "PVDEN,PVD enable" "B_0x0,B_0x1" group.long 0x10++0x1F line.long 0x0 "PWR_CR5,PWR control register 5" rbitfld.long 0x0 9. "VCOREH,Monitored Vless thansub>DDCOREless than/sub> level above high threshold" "B_0x0,B_0x1" rbitfld.long 0x0 8. "VCOREL,Monitored Vless thansub>DDCOREless than/sub> level above low threshold" "B_0x0,B_0x1" bitfld.long 0x0 0. "VCOREMONEN,Vless thansub>DDCOREless than/sub> monitoring enable" "B_0x0,B_0x1" line.long 0x4 "PWR_CR6,PWR control register 6" rbitfld.long 0x4 9. "VCPUH,Monitored Vless thansub>DDCPUless than/sub> level above high threshold" "B_0x0,B_0x1" rbitfld.long 0x4 8. "VCPUL,Monitored Vless thansub>DDCPUless than/sub> level above low threshold" "B_0x0,B_0x1" bitfld.long 0x4 4. "VCPULLS,Vless thansub>DDCPUless than/sub> voltage detector low level selection" "B_0x0,B_0x1" bitfld.long 0x4 0. "VCPUMONEN,Vless thansub>DDCPUless than/sub> monitoring enable" "B_0x0,B_0x1" line.long 0x8 "PWR_CR7,PWR control register 7" bitfld.long 0x8 25. "VDDIO2VRSTBY,Vless thansub>DDIO2less than/sub> I/O voltage range Standby mode" "B_0x0,B_0x1" bitfld.long 0x8 24. "VDDIO2VRSEL,Vless thansub>DDIO2less than/sub> I/O voltage range selection" "B_0x0,B_0x1" rbitfld.long 0x8 16. "VDDIO2RDY,Vless thansub>DDIO2 less than/sub>ready" "B_0x0,B_0x1" bitfld.long 0x8 8. "VDDIO2SV,Vless thansub>DDIO2 less than/sub>Independent supply valid." "B_0x0,B_0x1" bitfld.long 0x8 0. "VDDIO2VMEN,Vless thansub>DDIO2 less than/sub>independent voltage monitor enable" "B_0x0,B_0x1" line.long 0xC "PWR_CR8,PWR control register 8" bitfld.long 0xC 25. "VDDIO1VRSTBY,Vless thansub>DDIO1less than/sub> I/O voltage range Standby mode" "B_0x0,B_0x1" bitfld.long 0xC 24. "VDDIO1VRSEL,Vless thansub>DDIO1less than/sub> I/O voltage range selection" "B_0x0,B_0x1" rbitfld.long 0xC 16. "VDDIO1RDY,Vless thansub>DDIO1 less than/sub>ready" "B_0x0,B_0x1" bitfld.long 0xC 8. "VDDIO1SV,Vless thansub>DDIO1 less than/sub>independent I/O supply valid" "B_0x0,B_0x1" bitfld.long 0xC 0. "VDDIO1VMEN,Vless thansub>DDOI1 less than/sub>independent I/O voltage monitor enable" "B_0x0,B_0x1" line.long 0x10 "PWR_CR9,PWR control register 9" bitfld.long 0x10 4. "LPR1BSEN,LPSRAM 1 backup supply enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "BKPRBSEN,Backup RAM backup supply enable" "B_0x0,B_0x1" line.long 0x14 "PWR_CR10,PWR control register 10" bitfld.long 0x14 0.--1. "RETRBSEN,Retention RAM backup supply enable" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "PWR_CR11,PWR control register 11" bitfld.long 0x18 0. "DDRRETDIS,DDR retention disable" "B_0x0,B_0x1" line.long 0x1C "PWR_CR12,PWR control register 12" rbitfld.long 0x1C 16. "VDDGPURDY,Vless thansub>DDGPUless than/sub> ready" "B_0x0,B_0x1" bitfld.long 0x1C 8. "GPUSV,Vless thansub>DDGPU less than/sub>independent supply valid" "B_0x0,B_0x1" bitfld.long 0x1C 1. "GPULVTEN,Vless thansub>DDGPU less than/sub>low-voltage threshold enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "GPUVMEN,Vless thansub>DDGPUless than/sub> independent GPU voltage monitor enable" "B_0x0,B_0x1" group.long 0x38++0x1F line.long 0x0 "PWR_BDCR1,PWR backup domain control register 1" bitfld.long 0x0 0. "DBD3P,Disable backup and D3 domains (including LPSRAM1/2/3) write protection" "B_0x0,B_0x1" line.long 0x4 "PWR_BDCR2,PWR backup domain control register 2" bitfld.long 0x4 0. "DBP,Disable backup domain write protection" "B_0x0,B_0x1" line.long 0x8 "PWR_CPU1CR,PWR CPU1 control register" bitfld.long 0x8 17. "LVDS_D1,Low-voltage Deepsleep LPLV-Stop mode selection for the D1 domain (DStop3)" "B_0x0,B_0x1" bitfld.long 0x8 16. "LPDS_D1,low-power Deepsleep Stop mode selection for the D1 domain (DStop2)" "B_0x0,B_0x1" rbitfld.long 0x8 15. "STANDBYWFIL2,CPU1 system idle indication" "B_0x0,B_0x1" bitfld.long 0x8 9. "CSSF,Clear CPU1 STOPF SBF_D1/D3 SBF VBF and CPU2 SBF flags (Always read as 0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "SBF_D3,D3 SStandby flag" "B_0x0,B_0x1" newline rbitfld.long 0x8 7. "SBF_D1,D1 DStandby flag" "B_0x0,B_0x1" rbitfld.long 0x8 6. "SBF,System Standby flag" "B_0x0,B_0x1" rbitfld.long 0x8 5. "STOPF,System Stop flag" "B_0x0,B_0x1" bitfld.long 0x8 4. "VBF,Vless thansub>BATless than/sub> mode exit flag" "B_0x0,B_0x1" bitfld.long 0x8 1. "PDDS_D1,D1 domain power-down Deepsleep selection" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PDDS_D2,D2 domain/system power-down Deepsleep selection" "B_0x0,B_0x1" line.long 0xC "PWR_CPU2CR,PWR CPU2 control register" bitfld.long 0xC 17. "LVDS_D2,Low-voltage Deepsleep LPLV-Stop mode selection for the D2 domain/system" "B_0x0,B_0x1" bitfld.long 0xC 16. "LPDS_D2,low-power Deepsleep Stop mode selection for the D2 domain/syste." "B_0x0,B_0x1" rbitfld.long 0xC 15. "DEEPSLEEP,CPU2 system idle indication" "B_0x0,B_0x1" bitfld.long 0xC 9. "CSSF,Clear CPU2 STOPF SBF_D2/D3 SBF VBF and CPU1 SBF flags (Always read as 0)" "B_0x0,B_0x1" bitfld.long 0xC 8. "SBF_D3,D3 SStandby flag" "B_0x0,B_0x1" newline rbitfld.long 0xC 7. "SBF_D2,D2 Standby flag" "B_0x0,B_0x1" rbitfld.long 0xC 6. "SBF,System Standby flag" "B_0x0,B_0x1" rbitfld.long 0xC 5. "STOPF,System Stop flag" "B_0x0,B_0x1" bitfld.long 0xC 4. "VBF,Vless thansub>BATless than/sub> exit flag" "B_0x0,B_0x1" bitfld.long 0xC 0. "PDDS_D2,D2 domain/system power-down Deepsleep selection" "B_0x0,B_0x1" line.long 0x10 "PWR_CPU3CR,PWR CPU3 control register" rbitfld.long 0x10 15. "DEEPSLEEP,CPU3 system idle indication" "B_0x0,B_0x1" bitfld.long 0x10 9. "CSSF,Clear CPU3 SBF_D3 and VBF flags (Always read as 0)" "B_0x0,B_0x1" rbitfld.long 0x10 8. "SBF_D3,D3 SStandby flag" "B_0x0,B_0x1" rbitfld.long 0x10 4. "VBF,Vless thansub>BATless than/sub> exit flag" "B_0x0,B_0x1" line.long 0x14 "PWR_D1CR,PWR D1 control register" hexmask.long.byte 0x14 8.--12. 1. "POPL_D1,pwr_cpu_on pulse low configuration" bitfld.long 0x14 0. "LPCFG_D1,PWR_CPU_ON pin configuration" "B_0x0,B_0x1" line.long 0x18 "PWR_D2CR,PWR D2 control register" hexmask.long.byte 0x18 24.--27. 1. "PODH_D2,pwr_on delay high configuration" bitfld.long 0x18 16.--18. "LPLVDLY_D2,LPLV delay value" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" hexmask.long.byte 0x18 8.--12. 1. "POPL_D2,pwr_on pulse low configuration" bitfld.long 0x18 0. "LPCFG_D2,PWR_ON pin configuration" "B_0x0,B_0x1" line.long 0x1C "PWR_D3CR,PWR D3 control register" rbitfld.long 0x1C 31. "D3RDY,D3 domain supply ready" "B_0x0,B_0x1" bitfld.long 0x1C 0. "PDDS_D3,D3 domain power-down Deepsleep selection" "B_0x0,B_0x1" group.long 0x60++0x17 line.long 0x0 "PWR_WKUPCR1,PWR wake-up control register 1" rbitfld.long 0x0 31. "WKUPF,Wake-up flag for WKUPx pin before enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "WKUPENCPU2,Enable WKUPx pin and interrupt for CPU2" "B_0x0,B_0x1" bitfld.long 0x0 16. "WKUPENCPU1,Enable WKUPx pin and interrupt for CPU1" "B_0x0,B_0x1" bitfld.long 0x0 12.--13. "WKUPPUPD,Wake-up pull configuration for WKUPx pin" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 8. "WKUPP,Wake-up polarity bit for WKUPx pin" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "WKUPC,Clear wake-up flag for WKUPx pin" "B_0x0,B_0x1" line.long 0x4 "PWR_WKUPCR2,PWR wake-up control register 2" rbitfld.long 0x4 31. "WKUPF,Wake-up flag for WKUPx pin before enable" "B_0x0,B_0x1" bitfld.long 0x4 17. "WKUPENCPU2,Enable WKUPx pin and interrupt for CPU2" "B_0x0,B_0x1" bitfld.long 0x4 16. "WKUPENCPU1,Enable WKUPx pin and interrupt for CPU1" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "WKUPPUPD,Wake-up pull configuration for WKUPx pin" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 8. "WKUPP,Wake-up polarity bit for WKUPx pin" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "WKUPC,Clear wake-up flag for WKUPx pin" "B_0x0,B_0x1" line.long 0x8 "PWR_WKUPCR3,PWR wake-up control register 3" rbitfld.long 0x8 31. "WKUPF,Wake-up flag for WKUPx pin before enable" "B_0x0,B_0x1" bitfld.long 0x8 17. "WKUPENCPU2,Enable WKUPx pin and interrupt for CPU2" "B_0x0,B_0x1" bitfld.long 0x8 16. "WKUPENCPU1,Enable WKUPx pin and interrupt for CPU1" "B_0x0,B_0x1" bitfld.long 0x8 12.--13. "WKUPPUPD,Wake-up pull configuration for WKUPx pin" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 8. "WKUPP,Wake-up polarity bit for WKUPx pin" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "WKUPC,Clear wake-up flag for WKUPx pin" "B_0x0,B_0x1" line.long 0xC "PWR_WKUPCR4,PWR wake-up control register 4" rbitfld.long 0xC 31. "WKUPF,Wake-up flag for WKUPx pin before enable" "B_0x0,B_0x1" bitfld.long 0xC 17. "WKUPENCPU2,Enable WKUPx pin and interrupt for CPU2" "B_0x0,B_0x1" bitfld.long 0xC 16. "WKUPENCPU1,Enable WKUPx pin and interrupt for CPU1" "B_0x0,B_0x1" bitfld.long 0xC 12.--13. "WKUPPUPD,Wake-up pull configuration for WKUPx pin" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8. "WKUPP,Wake-up polarity bit for WKUPx pin" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "WKUPC,Clear wake-up flag for WKUPx pin" "B_0x0,B_0x1" line.long 0x10 "PWR_WKUPCR5,PWR wake-up control register 5" rbitfld.long 0x10 31. "WKUPF,Wake-up flag for WKUPx pin before enable" "B_0x0,B_0x1" bitfld.long 0x10 17. "WKUPENCPU2,Enable WKUPx pin and interrupt for CPU2" "B_0x0,B_0x1" bitfld.long 0x10 16. "WKUPENCPU1,Enable WKUPx pin and interrupt for CPU1" "B_0x0,B_0x1" bitfld.long 0x10 12.--13. "WKUPPUPD,Wake-up pull configuration for WKUPx pin" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x10 8. "WKUPP,Wake-up polarity bit for WKUPx pin" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "WKUPC,Clear wake-up flag for WKUPx pin" "B_0x0,B_0x1" line.long 0x14 "PWR_WKUPCR6,PWR wake-up control register 6" rbitfld.long 0x14 31. "WKUPF,Wake-up flag for WKUPx pin before enable" "B_0x0,B_0x1" bitfld.long 0x14 17. "WKUPENCPU2,Enable WKUPx pin and interrupt for CPU2" "B_0x0,B_0x1" bitfld.long 0x14 16. "WKUPENCPU1,Enable WKUPx pin and interrupt for CPU1" "B_0x0,B_0x1" bitfld.long 0x14 12.--13. "WKUPPUPD,Wake-up pull configuration for WKUPx pin" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x14 8. "WKUPP,Wake-up polarity bit for WKUPx pin" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "WKUPC,Clear wake-up flag for WKUPx pin" "B_0x0,B_0x1" group.long 0x98++0x3 line.long 0x0 "PWR_D3WKUPENR,PWR D3 wake-up enable register" bitfld.long 0x0 0. "TAMP_WKUPEN_D3,Enable D3 domain wake-up on tamper event in Vless thansub>BATless than/sub> mode" "B_0x0,B_0x1" group.long 0x100++0x23 line.long 0x0 "PWR_RSECCFGR,PWR resource secure configuration register" bitfld.long 0x0 6. "RSEC6,Secure attribute reference for the local resource number 6" "0,1" bitfld.long 0x0 5. "RSEC5,Secure attribute reference for the local resource number 5" "0,1" bitfld.long 0x0 4. "RSEC4,Secure attribute reference for the local resource number 4" "0,1" bitfld.long 0x0 3. "RSEC3,Secure attribute reference for the local resource number 3" "0,1" bitfld.long 0x0 2. "RSEC2,Secure attribute reference for the local resource number 2" "0,1" newline bitfld.long 0x0 1. "RSEC1,Secure attribute reference for the local resource number 1" "0,1" bitfld.long 0x0 0. "RSEC0,Secure attribute reference for the local resource number 0" "B_0x0,B_0x1" line.long 0x4 "PWR_RPRIVCFGR,PWR resource privileged configuration register" bitfld.long 0x4 6. "RPRIV6,Privileged attribute reference for the local resource number 6" "0,1" bitfld.long 0x4 5. "RPRIV5,Privileged attribute reference for the local resource number 5" "0,1" bitfld.long 0x4 4. "RPRIV4,Privileged attribute reference for the local resource number 4)" "0,1" bitfld.long 0x4 3. "RPRIV3,Privileged attribute reference for the local resource number 3" "0,1" bitfld.long 0x4 2. "RPRIV2,Privileged attribute reference for the local resource number 2" "0,1" newline bitfld.long 0x4 1. "RPRIV1,Privileged attribute reference for the local resource number 1" "0,1" bitfld.long 0x4 0. "RPRIV0,Privileged attribute reference for the local resource number 0" "B_0x0,B_0x1" line.long 0x8 "PWR_R0CIDCFGR,PWR resource 0 CID configuration register" bitfld.long 0x8 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0xC "PWR_R1CIDCFGR,PWR resource 1 CID configuration register" bitfld.long 0xC 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x10 "PWR_R2CIDCFGR,PWR resource 2 CID configuration register" bitfld.long 0x10 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x14 "PWR_R3CIDCFGR,PWR resource 3 CID configuration register" bitfld.long 0x14 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x18 "PWR_R4CIDCFGR,PWR resource 4 CID configuration register" bitfld.long 0x18 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x1C "PWR_R5CIDCFGR,PWR resource 5 CID configuration register" bitfld.long 0x1C 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x20 "PWR_R6CIDCFGR,PWR resource 6 CID configuration register" bitfld.long 0x20 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" group.long 0x180++0x37 line.long 0x0 "PWR_WIOSECCFGR,PWR WIO secure configuration register" bitfld.long 0x0 5. "WIOSEC6,Secure attribute reference for the wake-up I/O 6" "0,1" bitfld.long 0x0 4. "WIOSEC5,Secure attribute reference for the wake-up I/O 5" "0,1" bitfld.long 0x0 3. "WIOSEC4,Secure attribute reference for the wake-up I/O 4" "0,1" bitfld.long 0x0 2. "WIOSEC3,Secure attribute reference for the wake-up I/O 3" "0,1" bitfld.long 0x0 1. "WIOSEC2,Secure attribute reference for the wake-up I/O 2)" "0,1" newline bitfld.long 0x0 0. "WIOSEC1,Secure attribute reference for the wake-up I/O 1" "B_0x0,B_0x1" line.long 0x4 "PWR_WIOPRIVCFGR,PWR WIO privileged configuration register" bitfld.long 0x4 5. "WIOPRIV6,Privileged attribute reference for the wake-up I/O 6" "0,1" bitfld.long 0x4 4. "WIOPRIV5,Privileged attribute reference for the wake-up I/O 5" "0,1" bitfld.long 0x4 3. "WIOPRIV4,Privileged attribute reference for the wake-up I/O 4" "0,1" bitfld.long 0x4 2. "WIOPRIV3,Privileged attribute reference for the wake-up I/O 3" "0,1" bitfld.long 0x4 1. "WIOPRIV2,Privileged attribute reference for the wake-up I/O 2" "0,1" newline bitfld.long 0x4 0. "WIOPRIV1,Privileged attribute reference for the wake-up I/O 1" "B_0x0,B_0x1" line.long 0x8 "PWR_WIO1CIDCFGR,PWR WIO 1 CID configuration register" bitfld.long 0x8 23. "SEMWLC7,Semaphore CID 7 enable" "B_0x0,B_0x1" bitfld.long 0x8 22. "SEMWLC6,Semaphore CID 6 enable" "B_0x0,B_0x1" bitfld.long 0x8 21. "SEMWLC5,Semaphore CID 5 enable" "B_0x0,B_0x1" bitfld.long 0x8 20. "SEMWLC4,Semaphore CID 4 enable" "B_0x0,B_0x1" bitfld.long 0x8 19. "SEMWLC3,Semaphore CID 3 enable" "B_0x0,B_0x1" newline bitfld.long 0x8 18. "SEMWLC2,Semaphore CID 2 enable" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEMWLC1,Semaphore CID 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEMWLC0,Semaphore CID 0 enable" "B_0x0,B_0x1" bitfld.long 0x8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC "PWR_WIO1SEMCR,PWR WIO 1 semaphore control register" rbitfld.long 0xC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x10 "PWR_WIO2CIDCFGR,PWR WIO 2 CID configuration register" bitfld.long 0x10 23. "SEMWLC7,Semaphore CID 7 enable" "B_0x0,B_0x1" bitfld.long 0x10 22. "SEMWLC6,Semaphore CID 6 enable" "B_0x0,B_0x1" bitfld.long 0x10 21. "SEMWLC5,Semaphore CID 5 enable" "B_0x0,B_0x1" bitfld.long 0x10 20. "SEMWLC4,Semaphore CID 4 enable" "B_0x0,B_0x1" bitfld.long 0x10 19. "SEMWLC3,Semaphore CID 3 enable" "B_0x0,B_0x1" newline bitfld.long 0x10 18. "SEMWLC2,Semaphore CID 2 enable" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore CID 1 enable" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore CID 0 enable" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "PWR_WIO2SEMCR,PWR WIO 2 semaphore control register" rbitfld.long 0x14 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "PWR_WIO3CIDCFGR,PWR WIO 3 CID configuration register" bitfld.long 0x18 23. "SEMWLC7,Semaphore CID 7 enable" "B_0x0,B_0x1" bitfld.long 0x18 22. "SEMWLC6,Semaphore CID 6 enable" "B_0x0,B_0x1" bitfld.long 0x18 21. "SEMWLC5,Semaphore CID 5 enable" "B_0x0,B_0x1" bitfld.long 0x18 20. "SEMWLC4,Semaphore CID 4 enable" "B_0x0,B_0x1" bitfld.long 0x18 19. "SEMWLC3,Semaphore CID 3 enable" "B_0x0,B_0x1" newline bitfld.long 0x18 18. "SEMWLC2,Semaphore CID 2 enable" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore CID 1 enable" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore CID 0 enable" "B_0x0,B_0x1" bitfld.long 0x18 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "PWR_WIO3SEMCR,PWR WIO 3 semaphore control register" rbitfld.long 0x1C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "PWR_WIO4CIDCFGR,PWR WIO 4 CID configuration register" bitfld.long 0x20 23. "SEMWLC7,Semaphore CID 7 enable" "B_0x0,B_0x1" bitfld.long 0x20 22. "SEMWLC6,Semaphore CID 6 enable" "B_0x0,B_0x1" bitfld.long 0x20 21. "SEMWLC5,Semaphore CID 5 enable" "B_0x0,B_0x1" bitfld.long 0x20 20. "SEMWLC4,Semaphore CID 4 enable" "B_0x0,B_0x1" bitfld.long 0x20 19. "SEMWLC3,Semaphore CID 3 enable" "B_0x0,B_0x1" newline bitfld.long 0x20 18. "SEMWLC2,Semaphore CID 2 enable" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore CID 1 enable" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore CID 0 enable" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "PWR_WIO4SEMCR,PWR WIO 4 semaphore control register" rbitfld.long 0x24 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "PWR_WIO5CIDCFGR,PWR WIO 5 CID configuration register" bitfld.long 0x28 23. "SEMWLC7,Semaphore CID 7 enable" "B_0x0,B_0x1" bitfld.long 0x28 22. "SEMWLC6,Semaphore CID 6 enable" "B_0x0,B_0x1" bitfld.long 0x28 21. "SEMWLC5,Semaphore CID 5 enable" "B_0x0,B_0x1" bitfld.long 0x28 20. "SEMWLC4,Semaphore CID 4 enable" "B_0x0,B_0x1" bitfld.long 0x28 19. "SEMWLC3,Semaphore CID 3 enable" "B_0x0,B_0x1" newline bitfld.long 0x28 18. "SEMWLC2,Semaphore CID 2 enable" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore CID 1 enable" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore CID 0 enable" "B_0x0,B_0x1" bitfld.long 0x28 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "PWR_WIO5SEMCR,PWR WIO 5 semaphore control register" rbitfld.long 0x2C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "PWR_WIO6CIDCFGR,PWR WIO 6 CID configuration register" bitfld.long 0x30 23. "SEMWLC7,Semaphore CID 7 enable" "B_0x0,B_0x1" bitfld.long 0x30 22. "SEMWLC6,Semaphore CID 6 enable" "B_0x0,B_0x1" bitfld.long 0x30 21. "SEMWLC5,Semaphore CID 5 enable" "B_0x0,B_0x1" bitfld.long 0x30 20. "SEMWLC4,Semaphore CID 4 enable" "B_0x0,B_0x1" bitfld.long 0x30 19. "SEMWLC3,Semaphore CID 3 enable" "B_0x0,B_0x1" newline bitfld.long 0x30 18. "SEMWLC2,Semaphore CID 2 enable" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore CID 1 enable" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore CID 0 enable" "B_0x0,B_0x1" bitfld.long 0x30 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "PWR_WIO6SEMCR,PWR WIO 6 semaphore control register" rbitfld.long 0x34 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x200++0xB line.long 0x0 "PWR_CPU1D1SR,PWR CPU1 status register" bitfld.long 0x0 8.--10. "DSTATE,D1 domain state status" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 2.--3. "CSTATE,CPU1 cluster state status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0. "HOLD_BOOT,CPU1 HOLD_BOOT status flag." "B_0x0,B_0x1" line.long 0x4 "PWR_CPU2D2SR,PWR CPU2 status register" bitfld.long 0x4 8.--10. "DSTATE,System/D2 state status" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 2.--3. "CSTATE,CPU2 cluster state status flag" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1. "WFBEN,CPU2 wait-for-boot enable status flag" "B_0x0,B_0x1" bitfld.long 0x4 0. "HOLD_BOOT,CPU2 HOLD_BOOT status flag" "B_0x0,B_0x1" line.long 0x8 "PWR_CPU3D3SR,PWR CPU3 status register" bitfld.long 0x8 8.--10. "DSTATE,D3 state status." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2.--3. "CSTATE,CPU3 cluster state status flag" "B_0x0,B_0x1,B_0x2,B_0x3" rgroup.long 0x3F4++0xB line.long 0x0 "PWR_VERR,PWR VER register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,Major revision number" hexmask.long.byte 0x0 0.--3. 1. "MINREV,Minor revision number" line.long 0x4 "PWR_IPIDR,PWR identifier register" hexmask.long 0x4 0.--31. 1. "ID,Identifier of the PWR" line.long 0x8 "PWR_SIDR,PWR size identification register" hexmask.long 0x8 0.--31. 1. "SID,Decoding space is 1 Kbyte." tree.end sif (cpuis("*CA35")) tree "PWR_S" base ad:0x54210000 group.long 0x0++0xB line.long 0x0 "PWR_CR1,PWR control register 1" rbitfld.long 0x0 31. "GPVMO,Global peripheral voltage monitor output" "B_0x0,B_0x1" bitfld.long 0x0 26. "VDDIO4VRSEL,VDDIO4 I/O voltage range selection" "B_0x0,B_0x1" bitfld.long 0x0 25. "VDDIO3VRSEL,VDDIO3 I/O voltage range selection" "B_0x0,B_0x1" bitfld.long 0x0 24. "VDDIOVRSEL,VDD I/O voltage range selection" "B_0x0,B_0x1" rbitfld.long 0x0 20. "ARDY,Vless thansub>DDA18ADC less than/sub>ready" "B_0x0,B_0x1" newline rbitfld.long 0x0 19. "UCPDRDY,Vless thansub>DD33UCPD less than/sub>ready" "B_0x0,B_0x1" rbitfld.long 0x0 18. "USB33RDY,Vless thansub>DD33USB less than/sub>ready" "B_0x0,B_0x1" rbitfld.long 0x0 17. "VDDIO4RDY,Vless thansub>DDIO4 less than/sub>ready" "B_0x0,B_0x1" rbitfld.long 0x0 16. "VDDIO3RDY,Vless thansub>DDIO3 less than/sub>ready" "B_0x0,B_0x1" bitfld.long 0x0 12. "ASV,Vless thansub>DDA18ADC less than/sub>independent supply valid" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "UCPDSV,Vless thansub>DD33UCPD less than/sub>independent supply valid" "B_0x0,B_0x1" bitfld.long 0x0 9. "VDDIO4SV,Vless thansub>DDIO4 less than/sub>independent supply valid" "B_0x0,B_0x1" bitfld.long 0x0 8. "VDDIO3SV,Vless thansub>DDIO3 less than/sub>independent supply valid" "B_0x0,B_0x1" bitfld.long 0x0 4. "AVMEN,Vless thansub>DDA18ADC less than/sub>independent ADC voltage monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "UCPDVMEN,Vless thansub>DD33UCPD less than/sub>independent UCPD voltage monitor enable" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "USB33VMEN,Vless thansub>DD33USB less than/sub>independent USB 33 voltage monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "VDDIO4VMEN,Vless thansub>DDIO4 less than/sub>independent voltage monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "VDDIO3VMEN,Vless thansub>DDIO3 less than/sub>independent voltage monitor enable" "B_0x0,B_0x1" line.long 0x4 "PWR_CR2,PWR control register 2" rbitfld.long 0x4 11. "TEMPH,Monitored temperature level above high threshold" "B_0x0,B_0x1" rbitfld.long 0x4 10. "TEMPL,Monitored temperature level above low threshold" "B_0x0,B_0x1" rbitfld.long 0x4 9. "V08CAPH,Monitored Vless thansub>08CAPless than/sub> level above high threshold" "B_0x0,B_0x1" rbitfld.long 0x4 8. "V08CAPL,Monitored Vless thansub>08CAPless than/sub> level above low threshold" "B_0x0,B_0x1" bitfld.long 0x4 0. "MONEN,Vless thansub>08CAPless than/sub> and temperature monitoring enable" "B_0x0,B_0x1" line.long 0x8 "PWR_CR3,PWR control register 3" rbitfld.long 0x8 8. "PVDO,Programmable voltage detector (PVD) output" "B_0x0,B_0x1" bitfld.long 0x8 0. "PVDEN,PVD enable" "B_0x0,B_0x1" group.long 0x10++0x1F line.long 0x0 "PWR_CR5,PWR control register 5" rbitfld.long 0x0 9. "VCOREH,Monitored Vless thansub>DDCOREless than/sub> level above high threshold" "B_0x0,B_0x1" rbitfld.long 0x0 8. "VCOREL,Monitored Vless thansub>DDCOREless than/sub> level above low threshold" "B_0x0,B_0x1" bitfld.long 0x0 0. "VCOREMONEN,Vless thansub>DDCOREless than/sub> monitoring enable" "B_0x0,B_0x1" line.long 0x4 "PWR_CR6,PWR control register 6" rbitfld.long 0x4 9. "VCPUH,Monitored Vless thansub>DDCPUless than/sub> level above high threshold" "B_0x0,B_0x1" rbitfld.long 0x4 8. "VCPUL,Monitored Vless thansub>DDCPUless than/sub> level above low threshold" "B_0x0,B_0x1" bitfld.long 0x4 4. "VCPULLS,Vless thansub>DDCPUless than/sub> voltage detector low level selection" "B_0x0,B_0x1" bitfld.long 0x4 0. "VCPUMONEN,Vless thansub>DDCPUless than/sub> monitoring enable" "B_0x0,B_0x1" line.long 0x8 "PWR_CR7,PWR control register 7" bitfld.long 0x8 25. "VDDIO2VRSTBY,Vless thansub>DDIO2less than/sub> I/O voltage range Standby mode" "B_0x0,B_0x1" bitfld.long 0x8 24. "VDDIO2VRSEL,Vless thansub>DDIO2less than/sub> I/O voltage range selection" "B_0x0,B_0x1" rbitfld.long 0x8 16. "VDDIO2RDY,Vless thansub>DDIO2 less than/sub>ready" "B_0x0,B_0x1" bitfld.long 0x8 8. "VDDIO2SV,Vless thansub>DDIO2 less than/sub>Independent supply valid." "B_0x0,B_0x1" bitfld.long 0x8 0. "VDDIO2VMEN,Vless thansub>DDIO2 less than/sub>independent voltage monitor enable" "B_0x0,B_0x1" line.long 0xC "PWR_CR8,PWR control register 8" bitfld.long 0xC 25. "VDDIO1VRSTBY,Vless thansub>DDIO1less than/sub> I/O voltage range Standby mode" "B_0x0,B_0x1" bitfld.long 0xC 24. "VDDIO1VRSEL,Vless thansub>DDIO1less than/sub> I/O voltage range selection" "B_0x0,B_0x1" rbitfld.long 0xC 16. "VDDIO1RDY,Vless thansub>DDIO1 less than/sub>ready" "B_0x0,B_0x1" bitfld.long 0xC 8. "VDDIO1SV,Vless thansub>DDIO1 less than/sub>independent I/O supply valid" "B_0x0,B_0x1" bitfld.long 0xC 0. "VDDIO1VMEN,Vless thansub>DDOI1 less than/sub>independent I/O voltage monitor enable" "B_0x0,B_0x1" line.long 0x10 "PWR_CR9,PWR control register 9" bitfld.long 0x10 4. "LPR1BSEN,LPSRAM 1 backup supply enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "BKPRBSEN,Backup RAM backup supply enable" "B_0x0,B_0x1" line.long 0x14 "PWR_CR10,PWR control register 10" bitfld.long 0x14 0.--1. "RETRBSEN,Retention RAM backup supply enable" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "PWR_CR11,PWR control register 11" bitfld.long 0x18 0. "DDRRETDIS,DDR retention disable" "B_0x0,B_0x1" line.long 0x1C "PWR_CR12,PWR control register 12" rbitfld.long 0x1C 16. "VDDGPURDY,Vless thansub>DDGPUless than/sub> ready" "B_0x0,B_0x1" bitfld.long 0x1C 8. "GPUSV,Vless thansub>DDGPU less than/sub>independent supply valid" "B_0x0,B_0x1" bitfld.long 0x1C 1. "GPULVTEN,Vless thansub>DDGPU less than/sub>low-voltage threshold enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "GPUVMEN,Vless thansub>DDGPUless than/sub> independent GPU voltage monitor enable" "B_0x0,B_0x1" group.long 0x38++0x1F line.long 0x0 "PWR_BDCR1,PWR backup domain control register 1" bitfld.long 0x0 0. "DBD3P,Disable backup and D3 domains (including LPSRAM1/2/3) write protection" "B_0x0,B_0x1" line.long 0x4 "PWR_BDCR2,PWR backup domain control register 2" bitfld.long 0x4 0. "DBP,Disable backup domain write protection" "B_0x0,B_0x1" line.long 0x8 "PWR_CPU1CR,PWR CPU1 control register" bitfld.long 0x8 17. "LVDS_D1,Low-voltage Deepsleep LPLV-Stop mode selection for the D1 domain (DStop3)" "B_0x0,B_0x1" bitfld.long 0x8 16. "LPDS_D1,low-power Deepsleep Stop mode selection for the D1 domain (DStop2)" "B_0x0,B_0x1" rbitfld.long 0x8 15. "STANDBYWFIL2,CPU1 system idle indication" "B_0x0,B_0x1" bitfld.long 0x8 9. "CSSF,Clear CPU1 STOPF SBF_D1/D3 SBF VBF and CPU2 SBF flags (Always read as 0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "SBF_D3,D3 SStandby flag" "B_0x0,B_0x1" newline rbitfld.long 0x8 7. "SBF_D1,D1 DStandby flag" "B_0x0,B_0x1" rbitfld.long 0x8 6. "SBF,System Standby flag" "B_0x0,B_0x1" rbitfld.long 0x8 5. "STOPF,System Stop flag" "B_0x0,B_0x1" bitfld.long 0x8 4. "VBF,Vless thansub>BATless than/sub> mode exit flag" "B_0x0,B_0x1" bitfld.long 0x8 1. "PDDS_D1,D1 domain power-down Deepsleep selection" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PDDS_D2,D2 domain/system power-down Deepsleep selection" "B_0x0,B_0x1" line.long 0xC "PWR_CPU2CR,PWR CPU2 control register" bitfld.long 0xC 17. "LVDS_D2,Low-voltage Deepsleep LPLV-Stop mode selection for the D2 domain/system" "B_0x0,B_0x1" bitfld.long 0xC 16. "LPDS_D2,low-power Deepsleep Stop mode selection for the D2 domain/syste." "B_0x0,B_0x1" rbitfld.long 0xC 15. "DEEPSLEEP,CPU2 system idle indication" "B_0x0,B_0x1" bitfld.long 0xC 9. "CSSF,Clear CPU2 STOPF SBF_D2/D3 SBF VBF and CPU1 SBF flags (Always read as 0)" "B_0x0,B_0x1" bitfld.long 0xC 8. "SBF_D3,D3 SStandby flag" "B_0x0,B_0x1" newline rbitfld.long 0xC 7. "SBF_D2,D2 Standby flag" "B_0x0,B_0x1" rbitfld.long 0xC 6. "SBF,System Standby flag" "B_0x0,B_0x1" rbitfld.long 0xC 5. "STOPF,System Stop flag" "B_0x0,B_0x1" bitfld.long 0xC 4. "VBF,Vless thansub>BATless than/sub> exit flag" "B_0x0,B_0x1" bitfld.long 0xC 0. "PDDS_D2,D2 domain/system power-down Deepsleep selection" "B_0x0,B_0x1" line.long 0x10 "PWR_CPU3CR,PWR CPU3 control register" rbitfld.long 0x10 15. "DEEPSLEEP,CPU3 system idle indication" "B_0x0,B_0x1" bitfld.long 0x10 9. "CSSF,Clear CPU3 SBF_D3 and VBF flags (Always read as 0)" "B_0x0,B_0x1" rbitfld.long 0x10 8. "SBF_D3,D3 SStandby flag" "B_0x0,B_0x1" rbitfld.long 0x10 4. "VBF,Vless thansub>BATless than/sub> exit flag" "B_0x0,B_0x1" line.long 0x14 "PWR_D1CR,PWR D1 control register" hexmask.long.byte 0x14 8.--12. 1. "POPL_D1,pwr_cpu_on pulse low configuration" bitfld.long 0x14 0. "LPCFG_D1,PWR_CPU_ON pin configuration" "B_0x0,B_0x1" line.long 0x18 "PWR_D2CR,PWR D2 control register" hexmask.long.byte 0x18 24.--27. 1. "PODH_D2,pwr_on delay high configuration" bitfld.long 0x18 16.--18. "LPLVDLY_D2,LPLV delay value" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" hexmask.long.byte 0x18 8.--12. 1. "POPL_D2,pwr_on pulse low configuration" bitfld.long 0x18 0. "LPCFG_D2,PWR_ON pin configuration" "B_0x0,B_0x1" line.long 0x1C "PWR_D3CR,PWR D3 control register" rbitfld.long 0x1C 31. "D3RDY,D3 domain supply ready" "B_0x0,B_0x1" bitfld.long 0x1C 0. "PDDS_D3,D3 domain power-down Deepsleep selection" "B_0x0,B_0x1" group.long 0x60++0x17 line.long 0x0 "PWR_WKUPCR1,PWR wake-up control register 1" rbitfld.long 0x0 31. "WKUPF,Wake-up flag for WKUPx pin before enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "WKUPENCPU2,Enable WKUPx pin and interrupt for CPU2" "B_0x0,B_0x1" bitfld.long 0x0 16. "WKUPENCPU1,Enable WKUPx pin and interrupt for CPU1" "B_0x0,B_0x1" bitfld.long 0x0 12.--13. "WKUPPUPD,Wake-up pull configuration for WKUPx pin" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 8. "WKUPP,Wake-up polarity bit for WKUPx pin" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "WKUPC,Clear wake-up flag for WKUPx pin" "B_0x0,B_0x1" line.long 0x4 "PWR_WKUPCR2,PWR wake-up control register 2" rbitfld.long 0x4 31. "WKUPF,Wake-up flag for WKUPx pin before enable" "B_0x0,B_0x1" bitfld.long 0x4 17. "WKUPENCPU2,Enable WKUPx pin and interrupt for CPU2" "B_0x0,B_0x1" bitfld.long 0x4 16. "WKUPENCPU1,Enable WKUPx pin and interrupt for CPU1" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "WKUPPUPD,Wake-up pull configuration for WKUPx pin" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 8. "WKUPP,Wake-up polarity bit for WKUPx pin" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "WKUPC,Clear wake-up flag for WKUPx pin" "B_0x0,B_0x1" line.long 0x8 "PWR_WKUPCR3,PWR wake-up control register 3" rbitfld.long 0x8 31. "WKUPF,Wake-up flag for WKUPx pin before enable" "B_0x0,B_0x1" bitfld.long 0x8 17. "WKUPENCPU2,Enable WKUPx pin and interrupt for CPU2" "B_0x0,B_0x1" bitfld.long 0x8 16. "WKUPENCPU1,Enable WKUPx pin and interrupt for CPU1" "B_0x0,B_0x1" bitfld.long 0x8 12.--13. "WKUPPUPD,Wake-up pull configuration for WKUPx pin" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 8. "WKUPP,Wake-up polarity bit for WKUPx pin" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "WKUPC,Clear wake-up flag for WKUPx pin" "B_0x0,B_0x1" line.long 0xC "PWR_WKUPCR4,PWR wake-up control register 4" rbitfld.long 0xC 31. "WKUPF,Wake-up flag for WKUPx pin before enable" "B_0x0,B_0x1" bitfld.long 0xC 17. "WKUPENCPU2,Enable WKUPx pin and interrupt for CPU2" "B_0x0,B_0x1" bitfld.long 0xC 16. "WKUPENCPU1,Enable WKUPx pin and interrupt for CPU1" "B_0x0,B_0x1" bitfld.long 0xC 12.--13. "WKUPPUPD,Wake-up pull configuration for WKUPx pin" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8. "WKUPP,Wake-up polarity bit for WKUPx pin" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "WKUPC,Clear wake-up flag for WKUPx pin" "B_0x0,B_0x1" line.long 0x10 "PWR_WKUPCR5,PWR wake-up control register 5" rbitfld.long 0x10 31. "WKUPF,Wake-up flag for WKUPx pin before enable" "B_0x0,B_0x1" bitfld.long 0x10 17. "WKUPENCPU2,Enable WKUPx pin and interrupt for CPU2" "B_0x0,B_0x1" bitfld.long 0x10 16. "WKUPENCPU1,Enable WKUPx pin and interrupt for CPU1" "B_0x0,B_0x1" bitfld.long 0x10 12.--13. "WKUPPUPD,Wake-up pull configuration for WKUPx pin" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x10 8. "WKUPP,Wake-up polarity bit for WKUPx pin" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "WKUPC,Clear wake-up flag for WKUPx pin" "B_0x0,B_0x1" line.long 0x14 "PWR_WKUPCR6,PWR wake-up control register 6" rbitfld.long 0x14 31. "WKUPF,Wake-up flag for WKUPx pin before enable" "B_0x0,B_0x1" bitfld.long 0x14 17. "WKUPENCPU2,Enable WKUPx pin and interrupt for CPU2" "B_0x0,B_0x1" bitfld.long 0x14 16. "WKUPENCPU1,Enable WKUPx pin and interrupt for CPU1" "B_0x0,B_0x1" bitfld.long 0x14 12.--13. "WKUPPUPD,Wake-up pull configuration for WKUPx pin" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x14 8. "WKUPP,Wake-up polarity bit for WKUPx pin" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "WKUPC,Clear wake-up flag for WKUPx pin" "B_0x0,B_0x1" group.long 0x98++0x3 line.long 0x0 "PWR_D3WKUPENR,PWR D3 wake-up enable register" bitfld.long 0x0 0. "TAMP_WKUPEN_D3,Enable D3 domain wake-up on tamper event in Vless thansub>BATless than/sub> mode" "B_0x0,B_0x1" group.long 0x100++0x23 line.long 0x0 "PWR_RSECCFGR,PWR resource secure configuration register" bitfld.long 0x0 6. "RSEC6,Secure attribute reference for the local resource number 6" "0,1" bitfld.long 0x0 5. "RSEC5,Secure attribute reference for the local resource number 5" "0,1" bitfld.long 0x0 4. "RSEC4,Secure attribute reference for the local resource number 4" "0,1" bitfld.long 0x0 3. "RSEC3,Secure attribute reference for the local resource number 3" "0,1" bitfld.long 0x0 2. "RSEC2,Secure attribute reference for the local resource number 2" "0,1" newline bitfld.long 0x0 1. "RSEC1,Secure attribute reference for the local resource number 1" "0,1" bitfld.long 0x0 0. "RSEC0,Secure attribute reference for the local resource number 0" "B_0x0,B_0x1" line.long 0x4 "PWR_RPRIVCFGR,PWR resource privileged configuration register" bitfld.long 0x4 6. "RPRIV6,Privileged attribute reference for the local resource number 6" "0,1" bitfld.long 0x4 5. "RPRIV5,Privileged attribute reference for the local resource number 5" "0,1" bitfld.long 0x4 4. "RPRIV4,Privileged attribute reference for the local resource number 4)" "0,1" bitfld.long 0x4 3. "RPRIV3,Privileged attribute reference for the local resource number 3" "0,1" bitfld.long 0x4 2. "RPRIV2,Privileged attribute reference for the local resource number 2" "0,1" newline bitfld.long 0x4 1. "RPRIV1,Privileged attribute reference for the local resource number 1" "0,1" bitfld.long 0x4 0. "RPRIV0,Privileged attribute reference for the local resource number 0" "B_0x0,B_0x1" line.long 0x8 "PWR_R0CIDCFGR,PWR resource 0 CID configuration register" bitfld.long 0x8 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0xC "PWR_R1CIDCFGR,PWR resource 1 CID configuration register" bitfld.long 0xC 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x10 "PWR_R2CIDCFGR,PWR resource 2 CID configuration register" bitfld.long 0x10 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x14 "PWR_R3CIDCFGR,PWR resource 3 CID configuration register" bitfld.long 0x14 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x18 "PWR_R4CIDCFGR,PWR resource 4 CID configuration register" bitfld.long 0x18 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x1C "PWR_R5CIDCFGR,PWR resource 5 CID configuration register" bitfld.long 0x1C 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x20 "PWR_R6CIDCFGR,PWR resource 6 CID configuration register" bitfld.long 0x20 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" group.long 0x180++0x37 line.long 0x0 "PWR_WIOSECCFGR,PWR WIO secure configuration register" bitfld.long 0x0 5. "WIOSEC6,Secure attribute reference for the wake-up I/O 6" "0,1" bitfld.long 0x0 4. "WIOSEC5,Secure attribute reference for the wake-up I/O 5" "0,1" bitfld.long 0x0 3. "WIOSEC4,Secure attribute reference for the wake-up I/O 4" "0,1" bitfld.long 0x0 2. "WIOSEC3,Secure attribute reference for the wake-up I/O 3" "0,1" bitfld.long 0x0 1. "WIOSEC2,Secure attribute reference for the wake-up I/O 2)" "0,1" newline bitfld.long 0x0 0. "WIOSEC1,Secure attribute reference for the wake-up I/O 1" "B_0x0,B_0x1" line.long 0x4 "PWR_WIOPRIVCFGR,PWR WIO privileged configuration register" bitfld.long 0x4 5. "WIOPRIV6,Privileged attribute reference for the wake-up I/O 6" "0,1" bitfld.long 0x4 4. "WIOPRIV5,Privileged attribute reference for the wake-up I/O 5" "0,1" bitfld.long 0x4 3. "WIOPRIV4,Privileged attribute reference for the wake-up I/O 4" "0,1" bitfld.long 0x4 2. "WIOPRIV3,Privileged attribute reference for the wake-up I/O 3" "0,1" bitfld.long 0x4 1. "WIOPRIV2,Privileged attribute reference for the wake-up I/O 2" "0,1" newline bitfld.long 0x4 0. "WIOPRIV1,Privileged attribute reference for the wake-up I/O 1" "B_0x0,B_0x1" line.long 0x8 "PWR_WIO1CIDCFGR,PWR WIO 1 CID configuration register" bitfld.long 0x8 23. "SEMWLC7,Semaphore CID 7 enable" "B_0x0,B_0x1" bitfld.long 0x8 22. "SEMWLC6,Semaphore CID 6 enable" "B_0x0,B_0x1" bitfld.long 0x8 21. "SEMWLC5,Semaphore CID 5 enable" "B_0x0,B_0x1" bitfld.long 0x8 20. "SEMWLC4,Semaphore CID 4 enable" "B_0x0,B_0x1" bitfld.long 0x8 19. "SEMWLC3,Semaphore CID 3 enable" "B_0x0,B_0x1" newline bitfld.long 0x8 18. "SEMWLC2,Semaphore CID 2 enable" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEMWLC1,Semaphore CID 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEMWLC0,Semaphore CID 0 enable" "B_0x0,B_0x1" bitfld.long 0x8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC "PWR_WIO1SEMCR,PWR WIO 1 semaphore control register" rbitfld.long 0xC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x10 "PWR_WIO2CIDCFGR,PWR WIO 2 CID configuration register" bitfld.long 0x10 23. "SEMWLC7,Semaphore CID 7 enable" "B_0x0,B_0x1" bitfld.long 0x10 22. "SEMWLC6,Semaphore CID 6 enable" "B_0x0,B_0x1" bitfld.long 0x10 21. "SEMWLC5,Semaphore CID 5 enable" "B_0x0,B_0x1" bitfld.long 0x10 20. "SEMWLC4,Semaphore CID 4 enable" "B_0x0,B_0x1" bitfld.long 0x10 19. "SEMWLC3,Semaphore CID 3 enable" "B_0x0,B_0x1" newline bitfld.long 0x10 18. "SEMWLC2,Semaphore CID 2 enable" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore CID 1 enable" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore CID 0 enable" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "PWR_WIO2SEMCR,PWR WIO 2 semaphore control register" rbitfld.long 0x14 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "PWR_WIO3CIDCFGR,PWR WIO 3 CID configuration register" bitfld.long 0x18 23. "SEMWLC7,Semaphore CID 7 enable" "B_0x0,B_0x1" bitfld.long 0x18 22. "SEMWLC6,Semaphore CID 6 enable" "B_0x0,B_0x1" bitfld.long 0x18 21. "SEMWLC5,Semaphore CID 5 enable" "B_0x0,B_0x1" bitfld.long 0x18 20. "SEMWLC4,Semaphore CID 4 enable" "B_0x0,B_0x1" bitfld.long 0x18 19. "SEMWLC3,Semaphore CID 3 enable" "B_0x0,B_0x1" newline bitfld.long 0x18 18. "SEMWLC2,Semaphore CID 2 enable" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore CID 1 enable" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore CID 0 enable" "B_0x0,B_0x1" bitfld.long 0x18 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "PWR_WIO3SEMCR,PWR WIO 3 semaphore control register" rbitfld.long 0x1C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "PWR_WIO4CIDCFGR,PWR WIO 4 CID configuration register" bitfld.long 0x20 23. "SEMWLC7,Semaphore CID 7 enable" "B_0x0,B_0x1" bitfld.long 0x20 22. "SEMWLC6,Semaphore CID 6 enable" "B_0x0,B_0x1" bitfld.long 0x20 21. "SEMWLC5,Semaphore CID 5 enable" "B_0x0,B_0x1" bitfld.long 0x20 20. "SEMWLC4,Semaphore CID 4 enable" "B_0x0,B_0x1" bitfld.long 0x20 19. "SEMWLC3,Semaphore CID 3 enable" "B_0x0,B_0x1" newline bitfld.long 0x20 18. "SEMWLC2,Semaphore CID 2 enable" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore CID 1 enable" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore CID 0 enable" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "PWR_WIO4SEMCR,PWR WIO 4 semaphore control register" rbitfld.long 0x24 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "PWR_WIO5CIDCFGR,PWR WIO 5 CID configuration register" bitfld.long 0x28 23. "SEMWLC7,Semaphore CID 7 enable" "B_0x0,B_0x1" bitfld.long 0x28 22. "SEMWLC6,Semaphore CID 6 enable" "B_0x0,B_0x1" bitfld.long 0x28 21. "SEMWLC5,Semaphore CID 5 enable" "B_0x0,B_0x1" bitfld.long 0x28 20. "SEMWLC4,Semaphore CID 4 enable" "B_0x0,B_0x1" bitfld.long 0x28 19. "SEMWLC3,Semaphore CID 3 enable" "B_0x0,B_0x1" newline bitfld.long 0x28 18. "SEMWLC2,Semaphore CID 2 enable" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore CID 1 enable" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore CID 0 enable" "B_0x0,B_0x1" bitfld.long 0x28 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "PWR_WIO5SEMCR,PWR WIO 5 semaphore control register" rbitfld.long 0x2C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "PWR_WIO6CIDCFGR,PWR WIO 6 CID configuration register" bitfld.long 0x30 23. "SEMWLC7,Semaphore CID 7 enable" "B_0x0,B_0x1" bitfld.long 0x30 22. "SEMWLC6,Semaphore CID 6 enable" "B_0x0,B_0x1" bitfld.long 0x30 21. "SEMWLC5,Semaphore CID 5 enable" "B_0x0,B_0x1" bitfld.long 0x30 20. "SEMWLC4,Semaphore CID 4 enable" "B_0x0,B_0x1" bitfld.long 0x30 19. "SEMWLC3,Semaphore CID 3 enable" "B_0x0,B_0x1" newline bitfld.long 0x30 18. "SEMWLC2,Semaphore CID 2 enable" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore CID 1 enable" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore CID 0 enable" "B_0x0,B_0x1" bitfld.long 0x30 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "PWR_WIO6SEMCR,PWR WIO 6 semaphore control register" rbitfld.long 0x34 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x200++0xB line.long 0x0 "PWR_CPU1D1SR,PWR CPU1 status register" bitfld.long 0x0 8.--10. "DSTATE,D1 domain state status" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 2.--3. "CSTATE,CPU1 cluster state status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0. "HOLD_BOOT,CPU1 HOLD_BOOT status flag." "B_0x0,B_0x1" line.long 0x4 "PWR_CPU2D2SR,PWR CPU2 status register" bitfld.long 0x4 8.--10. "DSTATE,System/D2 state status" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 2.--3. "CSTATE,CPU2 cluster state status flag" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1. "WFBEN,CPU2 wait-for-boot enable status flag" "B_0x0,B_0x1" bitfld.long 0x4 0. "HOLD_BOOT,CPU2 HOLD_BOOT status flag" "B_0x0,B_0x1" line.long 0x8 "PWR_CPU3D3SR,PWR CPU3 status register" bitfld.long 0x8 8.--10. "DSTATE,D3 state status." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2.--3. "CSTATE,CPU3 cluster state status flag" "B_0x0,B_0x1,B_0x2,B_0x3" rgroup.long 0x3F4++0xB line.long 0x0 "PWR_VERR,PWR VER register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,Major revision number" hexmask.long.byte 0x0 0.--3. 1. "MINREV,Minor revision number" line.long 0x4 "PWR_IPIDR,PWR identifier register" hexmask.long 0x4 0.--31. 1. "ID,Identifier of the PWR" line.long 0x8 "PWR_SIDR,PWR size identification register" hexmask.long 0x8 0.--31. 1. "SID,Decoding space is 1 Kbyte." tree.end endif sif (cpuis("*CM33F")) tree "PWR_S" base ad:0x54210000 group.long 0x0++0xB line.long 0x0 "PWR_CR1,PWR control register 1" rbitfld.long 0x0 31. "GPVMO,Global peripheral voltage monitor output" "B_0x0,B_0x1" bitfld.long 0x0 26. "VDDIO4VRSEL,VDDIO4 I/O voltage range selection" "B_0x0,B_0x1" bitfld.long 0x0 25. "VDDIO3VRSEL,VDDIO3 I/O voltage range selection" "B_0x0,B_0x1" bitfld.long 0x0 24. "VDDIOVRSEL,VDD I/O voltage range selection" "B_0x0,B_0x1" rbitfld.long 0x0 20. "ARDY,Vless thansub>DDA18ADC less than/sub>ready" "B_0x0,B_0x1" newline rbitfld.long 0x0 19. "UCPDRDY,Vless thansub>DD33UCPD less than/sub>ready" "B_0x0,B_0x1" rbitfld.long 0x0 18. "USB33RDY,Vless thansub>DD33USB less than/sub>ready" "B_0x0,B_0x1" rbitfld.long 0x0 17. "VDDIO4RDY,Vless thansub>DDIO4 less than/sub>ready" "B_0x0,B_0x1" rbitfld.long 0x0 16. "VDDIO3RDY,Vless thansub>DDIO3 less than/sub>ready" "B_0x0,B_0x1" bitfld.long 0x0 12. "ASV,Vless thansub>DDA18ADC less than/sub>independent supply valid" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "UCPDSV,Vless thansub>DD33UCPD less than/sub>independent supply valid" "B_0x0,B_0x1" bitfld.long 0x0 9. "VDDIO4SV,Vless thansub>DDIO4 less than/sub>independent supply valid" "B_0x0,B_0x1" bitfld.long 0x0 8. "VDDIO3SV,Vless thansub>DDIO3 less than/sub>independent supply valid" "B_0x0,B_0x1" bitfld.long 0x0 4. "AVMEN,Vless thansub>DDA18ADC less than/sub>independent ADC voltage monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "UCPDVMEN,Vless thansub>DD33UCPD less than/sub>independent UCPD voltage monitor enable" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "USB33VMEN,Vless thansub>DD33USB less than/sub>independent USB 33 voltage monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "VDDIO4VMEN,Vless thansub>DDIO4 less than/sub>independent voltage monitor enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "VDDIO3VMEN,Vless thansub>DDIO3 less than/sub>independent voltage monitor enable" "B_0x0,B_0x1" line.long 0x4 "PWR_CR2,PWR control register 2" rbitfld.long 0x4 11. "TEMPH,Monitored temperature level above high threshold" "B_0x0,B_0x1" rbitfld.long 0x4 10. "TEMPL,Monitored temperature level above low threshold" "B_0x0,B_0x1" rbitfld.long 0x4 9. "V08CAPH,Monitored Vless thansub>08CAPless than/sub> level above high threshold" "B_0x0,B_0x1" rbitfld.long 0x4 8. "V08CAPL,Monitored Vless thansub>08CAPless than/sub> level above low threshold" "B_0x0,B_0x1" bitfld.long 0x4 0. "MONEN,Vless thansub>08CAPless than/sub> and temperature monitoring enable" "B_0x0,B_0x1" line.long 0x8 "PWR_CR3,PWR control register 3" rbitfld.long 0x8 8. "PVDO,Programmable voltage detector (PVD) output" "B_0x0,B_0x1" bitfld.long 0x8 0. "PVDEN,PVD enable" "B_0x0,B_0x1" group.long 0x10++0x1F line.long 0x0 "PWR_CR5,PWR control register 5" rbitfld.long 0x0 9. "VCOREH,Monitored Vless thansub>DDCOREless than/sub> level above high threshold" "B_0x0,B_0x1" rbitfld.long 0x0 8. "VCOREL,Monitored Vless thansub>DDCOREless than/sub> level above low threshold" "B_0x0,B_0x1" bitfld.long 0x0 0. "VCOREMONEN,Vless thansub>DDCOREless than/sub> monitoring enable" "B_0x0,B_0x1" line.long 0x4 "PWR_CR6,PWR control register 6" rbitfld.long 0x4 9. "VCPUH,Monitored Vless thansub>DDCPUless than/sub> level above high threshold" "B_0x0,B_0x1" rbitfld.long 0x4 8. "VCPUL,Monitored Vless thansub>DDCPUless than/sub> level above low threshold" "B_0x0,B_0x1" bitfld.long 0x4 4. "VCPULLS,Vless thansub>DDCPUless than/sub> voltage detector low level selection" "B_0x0,B_0x1" bitfld.long 0x4 0. "VCPUMONEN,Vless thansub>DDCPUless than/sub> monitoring enable" "B_0x0,B_0x1" line.long 0x8 "PWR_CR7,PWR control register 7" bitfld.long 0x8 25. "VDDIO2VRSTBY,Vless thansub>DDIO2less than/sub> I/O voltage range Standby mode" "B_0x0,B_0x1" bitfld.long 0x8 24. "VDDIO2VRSEL,Vless thansub>DDIO2less than/sub> I/O voltage range selection" "B_0x0,B_0x1" rbitfld.long 0x8 16. "VDDIO2RDY,Vless thansub>DDIO2 less than/sub>ready" "B_0x0,B_0x1" bitfld.long 0x8 8. "VDDIO2SV,Vless thansub>DDIO2 less than/sub>Independent supply valid." "B_0x0,B_0x1" bitfld.long 0x8 0. "VDDIO2VMEN,Vless thansub>DDIO2 less than/sub>independent voltage monitor enable" "B_0x0,B_0x1" line.long 0xC "PWR_CR8,PWR control register 8" bitfld.long 0xC 25. "VDDIO1VRSTBY,Vless thansub>DDIO1less than/sub> I/O voltage range Standby mode" "B_0x0,B_0x1" bitfld.long 0xC 24. "VDDIO1VRSEL,Vless thansub>DDIO1less than/sub> I/O voltage range selection" "B_0x0,B_0x1" rbitfld.long 0xC 16. "VDDIO1RDY,Vless thansub>DDIO1 less than/sub>ready" "B_0x0,B_0x1" bitfld.long 0xC 8. "VDDIO1SV,Vless thansub>DDIO1 less than/sub>independent I/O supply valid" "B_0x0,B_0x1" bitfld.long 0xC 0. "VDDIO1VMEN,Vless thansub>DDOI1 less than/sub>independent I/O voltage monitor enable" "B_0x0,B_0x1" line.long 0x10 "PWR_CR9,PWR control register 9" bitfld.long 0x10 4. "LPR1BSEN,LPSRAM 1 backup supply enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "BKPRBSEN,Backup RAM backup supply enable" "B_0x0,B_0x1" line.long 0x14 "PWR_CR10,PWR control register 10" bitfld.long 0x14 0.--1. "RETRBSEN,Retention RAM backup supply enable" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x18 "PWR_CR11,PWR control register 11" bitfld.long 0x18 0. "DDRRETDIS,DDR retention disable" "B_0x0,B_0x1" line.long 0x1C "PWR_CR12,PWR control register 12" rbitfld.long 0x1C 16. "VDDGPURDY,Vless thansub>DDGPUless than/sub> ready" "B_0x0,B_0x1" bitfld.long 0x1C 8. "GPUSV,Vless thansub>DDGPU less than/sub>independent supply valid" "B_0x0,B_0x1" bitfld.long 0x1C 1. "GPULVTEN,Vless thansub>DDGPU less than/sub>low-voltage threshold enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "GPUVMEN,Vless thansub>DDGPUless than/sub> independent GPU voltage monitor enable" "B_0x0,B_0x1" group.long 0x38++0x1F line.long 0x0 "PWR_BDCR1,PWR backup domain control register 1" bitfld.long 0x0 0. "DBD3P,Disable backup and D3 domains (including LPSRAM1/2/3) write protection" "B_0x0,B_0x1" line.long 0x4 "PWR_BDCR2,PWR backup domain control register 2" bitfld.long 0x4 0. "DBP,Disable backup domain write protection" "B_0x0,B_0x1" line.long 0x8 "PWR_CPU1CR,PWR CPU1 control register" bitfld.long 0x8 17. "LVDS_D1,Low-voltage Deepsleep LPLV-Stop mode selection for the D1 domain (DStop3)" "B_0x0,B_0x1" bitfld.long 0x8 16. "LPDS_D1,low-power Deepsleep Stop mode selection for the D1 domain (DStop2)" "B_0x0,B_0x1" rbitfld.long 0x8 15. "STANDBYWFIL2,CPU1 system idle indication" "B_0x0,B_0x1" bitfld.long 0x8 9. "CSSF,Clear CPU1 STOPF SBF_D1/D3 SBF VBF and CPU2 SBF flags (Always read as 0)" "B_0x0,B_0x1" bitfld.long 0x8 8. "SBF_D3,D3 SStandby flag" "B_0x0,B_0x1" newline rbitfld.long 0x8 7. "SBF_D1,D1 DStandby flag" "B_0x0,B_0x1" rbitfld.long 0x8 6. "SBF,System Standby flag" "B_0x0,B_0x1" rbitfld.long 0x8 5. "STOPF,System Stop flag" "B_0x0,B_0x1" bitfld.long 0x8 4. "VBF,Vless thansub>BATless than/sub> mode exit flag" "B_0x0,B_0x1" bitfld.long 0x8 1. "PDDS_D1,D1 domain power-down Deepsleep selection" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PDDS_D2,D2 domain/system power-down Deepsleep selection" "B_0x0,B_0x1" line.long 0xC "PWR_CPU2CR,PWR CPU2 control register" bitfld.long 0xC 17. "LVDS_D2,Low-voltage Deepsleep LPLV-Stop mode selection for the D2 domain/system" "B_0x0,B_0x1" bitfld.long 0xC 16. "LPDS_D2,low-power Deepsleep Stop mode selection for the D2 domain/syste." "B_0x0,B_0x1" rbitfld.long 0xC 15. "DEEPSLEEP,CPU2 system idle indication" "B_0x0,B_0x1" bitfld.long 0xC 9. "CSSF,Clear CPU2 STOPF SBF_D2/D3 SBF VBF and CPU1 SBF flags (Always read as 0)" "B_0x0,B_0x1" bitfld.long 0xC 8. "SBF_D3,D3 SStandby flag" "B_0x0,B_0x1" newline rbitfld.long 0xC 7. "SBF_D2,D2 Standby flag" "B_0x0,B_0x1" rbitfld.long 0xC 6. "SBF,System Standby flag" "B_0x0,B_0x1" rbitfld.long 0xC 5. "STOPF,System Stop flag" "B_0x0,B_0x1" bitfld.long 0xC 4. "VBF,Vless thansub>BATless than/sub> exit flag" "B_0x0,B_0x1" bitfld.long 0xC 0. "PDDS_D2,D2 domain/system power-down Deepsleep selection" "B_0x0,B_0x1" line.long 0x10 "PWR_CPU3CR,PWR CPU3 control register" rbitfld.long 0x10 15. "DEEPSLEEP,CPU3 system idle indication" "B_0x0,B_0x1" bitfld.long 0x10 9. "CSSF,Clear CPU3 SBF_D3 and VBF flags (Always read as 0)" "B_0x0,B_0x1" rbitfld.long 0x10 8. "SBF_D3,D3 SStandby flag" "B_0x0,B_0x1" rbitfld.long 0x10 4. "VBF,Vless thansub>BATless than/sub> exit flag" "B_0x0,B_0x1" line.long 0x14 "PWR_D1CR,PWR D1 control register" hexmask.long.byte 0x14 8.--12. 1. "POPL_D1,pwr_cpu_on pulse low configuration" bitfld.long 0x14 0. "LPCFG_D1,PWR_CPU_ON pin configuration" "B_0x0,B_0x1" line.long 0x18 "PWR_D2CR,PWR D2 control register" hexmask.long.byte 0x18 24.--27. 1. "PODH_D2,pwr_on delay high configuration" bitfld.long 0x18 16.--18. "LPLVDLY_D2,LPLV delay value" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" hexmask.long.byte 0x18 8.--12. 1. "POPL_D2,pwr_on pulse low configuration" bitfld.long 0x18 0. "LPCFG_D2,PWR_ON pin configuration" "B_0x0,B_0x1" line.long 0x1C "PWR_D3CR,PWR D3 control register" rbitfld.long 0x1C 31. "D3RDY,D3 domain supply ready" "B_0x0,B_0x1" bitfld.long 0x1C 0. "PDDS_D3,D3 domain power-down Deepsleep selection" "B_0x0,B_0x1" group.long 0x60++0x17 line.long 0x0 "PWR_WKUPCR1,PWR wake-up control register 1" rbitfld.long 0x0 31. "WKUPF,Wake-up flag for WKUPx pin before enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "WKUPENCPU2,Enable WKUPx pin and interrupt for CPU2" "B_0x0,B_0x1" bitfld.long 0x0 16. "WKUPENCPU1,Enable WKUPx pin and interrupt for CPU1" "B_0x0,B_0x1" bitfld.long 0x0 12.--13. "WKUPPUPD,Wake-up pull configuration for WKUPx pin" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 8. "WKUPP,Wake-up polarity bit for WKUPx pin" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "WKUPC,Clear wake-up flag for WKUPx pin" "B_0x0,B_0x1" line.long 0x4 "PWR_WKUPCR2,PWR wake-up control register 2" rbitfld.long 0x4 31. "WKUPF,Wake-up flag for WKUPx pin before enable" "B_0x0,B_0x1" bitfld.long 0x4 17. "WKUPENCPU2,Enable WKUPx pin and interrupt for CPU2" "B_0x0,B_0x1" bitfld.long 0x4 16. "WKUPENCPU1,Enable WKUPx pin and interrupt for CPU1" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "WKUPPUPD,Wake-up pull configuration for WKUPx pin" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 8. "WKUPP,Wake-up polarity bit for WKUPx pin" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "WKUPC,Clear wake-up flag for WKUPx pin" "B_0x0,B_0x1" line.long 0x8 "PWR_WKUPCR3,PWR wake-up control register 3" rbitfld.long 0x8 31. "WKUPF,Wake-up flag for WKUPx pin before enable" "B_0x0,B_0x1" bitfld.long 0x8 17. "WKUPENCPU2,Enable WKUPx pin and interrupt for CPU2" "B_0x0,B_0x1" bitfld.long 0x8 16. "WKUPENCPU1,Enable WKUPx pin and interrupt for CPU1" "B_0x0,B_0x1" bitfld.long 0x8 12.--13. "WKUPPUPD,Wake-up pull configuration for WKUPx pin" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x8 8. "WKUPP,Wake-up polarity bit for WKUPx pin" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "WKUPC,Clear wake-up flag for WKUPx pin" "B_0x0,B_0x1" line.long 0xC "PWR_WKUPCR4,PWR wake-up control register 4" rbitfld.long 0xC 31. "WKUPF,Wake-up flag for WKUPx pin before enable" "B_0x0,B_0x1" bitfld.long 0xC 17. "WKUPENCPU2,Enable WKUPx pin and interrupt for CPU2" "B_0x0,B_0x1" bitfld.long 0xC 16. "WKUPENCPU1,Enable WKUPx pin and interrupt for CPU1" "B_0x0,B_0x1" bitfld.long 0xC 12.--13. "WKUPPUPD,Wake-up pull configuration for WKUPx pin" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0xC 8. "WKUPP,Wake-up polarity bit for WKUPx pin" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "WKUPC,Clear wake-up flag for WKUPx pin" "B_0x0,B_0x1" line.long 0x10 "PWR_WKUPCR5,PWR wake-up control register 5" rbitfld.long 0x10 31. "WKUPF,Wake-up flag for WKUPx pin before enable" "B_0x0,B_0x1" bitfld.long 0x10 17. "WKUPENCPU2,Enable WKUPx pin and interrupt for CPU2" "B_0x0,B_0x1" bitfld.long 0x10 16. "WKUPENCPU1,Enable WKUPx pin and interrupt for CPU1" "B_0x0,B_0x1" bitfld.long 0x10 12.--13. "WKUPPUPD,Wake-up pull configuration for WKUPx pin" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x10 8. "WKUPP,Wake-up polarity bit for WKUPx pin" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "WKUPC,Clear wake-up flag for WKUPx pin" "B_0x0,B_0x1" line.long 0x14 "PWR_WKUPCR6,PWR wake-up control register 6" rbitfld.long 0x14 31. "WKUPF,Wake-up flag for WKUPx pin before enable" "B_0x0,B_0x1" bitfld.long 0x14 17. "WKUPENCPU2,Enable WKUPx pin and interrupt for CPU2" "B_0x0,B_0x1" bitfld.long 0x14 16. "WKUPENCPU1,Enable WKUPx pin and interrupt for CPU1" "B_0x0,B_0x1" bitfld.long 0x14 12.--13. "WKUPPUPD,Wake-up pull configuration for WKUPx pin" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x14 8. "WKUPP,Wake-up polarity bit for WKUPx pin" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "WKUPC,Clear wake-up flag for WKUPx pin" "B_0x0,B_0x1" group.long 0x98++0x3 line.long 0x0 "PWR_D3WKUPENR,PWR D3 wake-up enable register" bitfld.long 0x0 0. "TAMP_WKUPEN_D3,Enable D3 domain wake-up on tamper event in Vless thansub>BATless than/sub> mode" "B_0x0,B_0x1" group.long 0x100++0x23 line.long 0x0 "PWR_RSECCFGR,PWR resource secure configuration register" bitfld.long 0x0 6. "RSEC6,Secure attribute reference for the local resource number 6" "0,1" bitfld.long 0x0 5. "RSEC5,Secure attribute reference for the local resource number 5" "0,1" bitfld.long 0x0 4. "RSEC4,Secure attribute reference for the local resource number 4" "0,1" bitfld.long 0x0 3. "RSEC3,Secure attribute reference for the local resource number 3" "0,1" bitfld.long 0x0 2. "RSEC2,Secure attribute reference for the local resource number 2" "0,1" newline bitfld.long 0x0 1. "RSEC1,Secure attribute reference for the local resource number 1" "0,1" bitfld.long 0x0 0. "RSEC0,Secure attribute reference for the local resource number 0" "B_0x0,B_0x1" line.long 0x4 "PWR_RPRIVCFGR,PWR resource privileged configuration register" bitfld.long 0x4 6. "RPRIV6,Privileged attribute reference for the local resource number 6" "0,1" bitfld.long 0x4 5. "RPRIV5,Privileged attribute reference for the local resource number 5" "0,1" bitfld.long 0x4 4. "RPRIV4,Privileged attribute reference for the local resource number 4)" "0,1" bitfld.long 0x4 3. "RPRIV3,Privileged attribute reference for the local resource number 3" "0,1" bitfld.long 0x4 2. "RPRIV2,Privileged attribute reference for the local resource number 2" "0,1" newline bitfld.long 0x4 1. "RPRIV1,Privileged attribute reference for the local resource number 1" "0,1" bitfld.long 0x4 0. "RPRIV0,Privileged attribute reference for the local resource number 0" "B_0x0,B_0x1" line.long 0x8 "PWR_R0CIDCFGR,PWR resource 0 CID configuration register" bitfld.long 0x8 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0xC "PWR_R1CIDCFGR,PWR resource 1 CID configuration register" bitfld.long 0xC 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x10 "PWR_R2CIDCFGR,PWR resource 2 CID configuration register" bitfld.long 0x10 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x14 "PWR_R3CIDCFGR,PWR resource 3 CID configuration register" bitfld.long 0x14 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x18 "PWR_R4CIDCFGR,PWR resource 4 CID configuration register" bitfld.long 0x18 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x1C "PWR_R5CIDCFGR,PWR resource 5 CID configuration register" bitfld.long 0x1C 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x20 "PWR_R6CIDCFGR,PWR resource 6 CID configuration register" bitfld.long 0x20 4.--6. "SCID,Static compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" group.long 0x180++0x37 line.long 0x0 "PWR_WIOSECCFGR,PWR WIO secure configuration register" bitfld.long 0x0 5. "WIOSEC6,Secure attribute reference for the wake-up I/O 6" "0,1" bitfld.long 0x0 4. "WIOSEC5,Secure attribute reference for the wake-up I/O 5" "0,1" bitfld.long 0x0 3. "WIOSEC4,Secure attribute reference for the wake-up I/O 4" "0,1" bitfld.long 0x0 2. "WIOSEC3,Secure attribute reference for the wake-up I/O 3" "0,1" bitfld.long 0x0 1. "WIOSEC2,Secure attribute reference for the wake-up I/O 2)" "0,1" newline bitfld.long 0x0 0. "WIOSEC1,Secure attribute reference for the wake-up I/O 1" "B_0x0,B_0x1" line.long 0x4 "PWR_WIOPRIVCFGR,PWR WIO privileged configuration register" bitfld.long 0x4 5. "WIOPRIV6,Privileged attribute reference for the wake-up I/O 6" "0,1" bitfld.long 0x4 4. "WIOPRIV5,Privileged attribute reference for the wake-up I/O 5" "0,1" bitfld.long 0x4 3. "WIOPRIV4,Privileged attribute reference for the wake-up I/O 4" "0,1" bitfld.long 0x4 2. "WIOPRIV3,Privileged attribute reference for the wake-up I/O 3" "0,1" bitfld.long 0x4 1. "WIOPRIV2,Privileged attribute reference for the wake-up I/O 2" "0,1" newline bitfld.long 0x4 0. "WIOPRIV1,Privileged attribute reference for the wake-up I/O 1" "B_0x0,B_0x1" line.long 0x8 "PWR_WIO1CIDCFGR,PWR WIO 1 CID configuration register" bitfld.long 0x8 23. "SEMWLC7,Semaphore CID 7 enable" "B_0x0,B_0x1" bitfld.long 0x8 22. "SEMWLC6,Semaphore CID 6 enable" "B_0x0,B_0x1" bitfld.long 0x8 21. "SEMWLC5,Semaphore CID 5 enable" "B_0x0,B_0x1" bitfld.long 0x8 20. "SEMWLC4,Semaphore CID 4 enable" "B_0x0,B_0x1" bitfld.long 0x8 19. "SEMWLC3,Semaphore CID 3 enable" "B_0x0,B_0x1" newline bitfld.long 0x8 18. "SEMWLC2,Semaphore CID 2 enable" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEMWLC1,Semaphore CID 1 enable" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEMWLC0,Semaphore CID 0 enable" "B_0x0,B_0x1" bitfld.long 0x8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC "PWR_WIO1SEMCR,PWR WIO 1 semaphore control register" rbitfld.long 0xC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x10 "PWR_WIO2CIDCFGR,PWR WIO 2 CID configuration register" bitfld.long 0x10 23. "SEMWLC7,Semaphore CID 7 enable" "B_0x0,B_0x1" bitfld.long 0x10 22. "SEMWLC6,Semaphore CID 6 enable" "B_0x0,B_0x1" bitfld.long 0x10 21. "SEMWLC5,Semaphore CID 5 enable" "B_0x0,B_0x1" bitfld.long 0x10 20. "SEMWLC4,Semaphore CID 4 enable" "B_0x0,B_0x1" bitfld.long 0x10 19. "SEMWLC3,Semaphore CID 3 enable" "B_0x0,B_0x1" newline bitfld.long 0x10 18. "SEMWLC2,Semaphore CID 2 enable" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEMWLC1,Semaphore CID 1 enable" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore CID 0 enable" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "PWR_WIO2SEMCR,PWR WIO 2 semaphore control register" rbitfld.long 0x14 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "PWR_WIO3CIDCFGR,PWR WIO 3 CID configuration register" bitfld.long 0x18 23. "SEMWLC7,Semaphore CID 7 enable" "B_0x0,B_0x1" bitfld.long 0x18 22. "SEMWLC6,Semaphore CID 6 enable" "B_0x0,B_0x1" bitfld.long 0x18 21. "SEMWLC5,Semaphore CID 5 enable" "B_0x0,B_0x1" bitfld.long 0x18 20. "SEMWLC4,Semaphore CID 4 enable" "B_0x0,B_0x1" bitfld.long 0x18 19. "SEMWLC3,Semaphore CID 3 enable" "B_0x0,B_0x1" newline bitfld.long 0x18 18. "SEMWLC2,Semaphore CID 2 enable" "B_0x0,B_0x1" bitfld.long 0x18 17. "SEMWLC1,Semaphore CID 1 enable" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore CID 0 enable" "B_0x0,B_0x1" bitfld.long 0x18 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "PWR_WIO3SEMCR,PWR WIO 3 semaphore control register" rbitfld.long 0x1C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "PWR_WIO4CIDCFGR,PWR WIO 4 CID configuration register" bitfld.long 0x20 23. "SEMWLC7,Semaphore CID 7 enable" "B_0x0,B_0x1" bitfld.long 0x20 22. "SEMWLC6,Semaphore CID 6 enable" "B_0x0,B_0x1" bitfld.long 0x20 21. "SEMWLC5,Semaphore CID 5 enable" "B_0x0,B_0x1" bitfld.long 0x20 20. "SEMWLC4,Semaphore CID 4 enable" "B_0x0,B_0x1" bitfld.long 0x20 19. "SEMWLC3,Semaphore CID 3 enable" "B_0x0,B_0x1" newline bitfld.long 0x20 18. "SEMWLC2,Semaphore CID 2 enable" "B_0x0,B_0x1" bitfld.long 0x20 17. "SEMWLC1,Semaphore CID 1 enable" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore CID 0 enable" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "PWR_WIO4SEMCR,PWR WIO 4 semaphore control register" rbitfld.long 0x24 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "PWR_WIO5CIDCFGR,PWR WIO 5 CID configuration register" bitfld.long 0x28 23. "SEMWLC7,Semaphore CID 7 enable" "B_0x0,B_0x1" bitfld.long 0x28 22. "SEMWLC6,Semaphore CID 6 enable" "B_0x0,B_0x1" bitfld.long 0x28 21. "SEMWLC5,Semaphore CID 5 enable" "B_0x0,B_0x1" bitfld.long 0x28 20. "SEMWLC4,Semaphore CID 4 enable" "B_0x0,B_0x1" bitfld.long 0x28 19. "SEMWLC3,Semaphore CID 3 enable" "B_0x0,B_0x1" newline bitfld.long 0x28 18. "SEMWLC2,Semaphore CID 2 enable" "B_0x0,B_0x1" bitfld.long 0x28 17. "SEMWLC1,Semaphore CID 1 enable" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore CID 0 enable" "B_0x0,B_0x1" bitfld.long 0x28 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "PWR_WIO5SEMCR,PWR WIO 5 semaphore control register" rbitfld.long 0x2C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "PWR_WIO6CIDCFGR,PWR WIO 6 CID configuration register" bitfld.long 0x30 23. "SEMWLC7,Semaphore CID 7 enable" "B_0x0,B_0x1" bitfld.long 0x30 22. "SEMWLC6,Semaphore CID 6 enable" "B_0x0,B_0x1" bitfld.long 0x30 21. "SEMWLC5,Semaphore CID 5 enable" "B_0x0,B_0x1" bitfld.long 0x30 20. "SEMWLC4,Semaphore CID 4 enable" "B_0x0,B_0x1" bitfld.long 0x30 19. "SEMWLC3,Semaphore CID 3 enable" "B_0x0,B_0x1" newline bitfld.long 0x30 18. "SEMWLC2,Semaphore CID 2 enable" "B_0x0,B_0x1" bitfld.long 0x30 17. "SEMWLC1,Semaphore CID 1 enable" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore CID 0 enable" "B_0x0,B_0x1" bitfld.long 0x30 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "PWR_WIO6SEMCR,PWR WIO 6 semaphore control register" rbitfld.long 0x34 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" rgroup.long 0x200++0xB line.long 0x0 "PWR_CPU1D1SR,PWR CPU1 status register" bitfld.long 0x0 8.--10. "DSTATE,D1 domain state status" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 2.--3. "CSTATE,CPU1 cluster state status" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0. "HOLD_BOOT,CPU1 HOLD_BOOT status flag." "B_0x0,B_0x1" line.long 0x4 "PWR_CPU2D2SR,PWR CPU2 status register" bitfld.long 0x4 8.--10. "DSTATE,System/D2 state status" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 2.--3. "CSTATE,CPU2 cluster state status flag" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1. "WFBEN,CPU2 wait-for-boot enable status flag" "B_0x0,B_0x1" bitfld.long 0x4 0. "HOLD_BOOT,CPU2 HOLD_BOOT status flag" "B_0x0,B_0x1" line.long 0x8 "PWR_CPU3D3SR,PWR CPU3 status register" bitfld.long 0x8 8.--10. "DSTATE,D3 state status." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 2.--3. "CSTATE,CPU3 cluster state status flag" "B_0x0,B_0x1,B_0x2,B_0x3" rgroup.long 0x3F4++0xB line.long 0x0 "PWR_VERR,PWR VER register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,Major revision number" hexmask.long.byte 0x0 0.--3. 1. "MINREV,Minor revision number" line.long 0x4 "PWR_IPIDR,PWR identifier register" hexmask.long 0x4 0.--31. 1. "ID,Identifier of the PWR" line.long 0x8 "PWR_SIDR,PWR size identification register" hexmask.long 0x8 0.--31. 1. "SID,Decoding space is 1 Kbyte." tree.end endif tree.end sif (cpuis("*CA35")||cpuis("*CM33F")) tree "RAMCFG (SRAM Configuration Controller)" base ad:0x0 tree "RAMCFG" base ad:0x42070000 group.long 0x0++0x3 line.long 0x0 "RAMCFG_SYSRAMCR,RAMCFG SYSRAM control register" bitfld.long 0x0 8. "SRAMER,SRAM erase" "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "RAMCFG_SYSRAMISR,RAMCFG SYSRAM interrupt status register" bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "B_0x0,B_0x1" wgroup.long 0x28++0x3 line.long 0x0 "RAMCFG_SYSRAMERKEYR,RAMCFG SYSRAM erase key register" hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key" group.long 0x80++0x3 line.long 0x0 "RAMCFG_SRAM1CR,RAMCFG SRAM1 control register" bitfld.long 0x0 8. "SRAMER,SRAM erase." "B_0x0,B_0x1" rgroup.long 0x88++0x3 line.long 0x0 "RAMCFG_SRAM1ISR,RAMCFG SRAM1 interrupt status register" bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "B_0x0,B_0x1" wgroup.long 0xA8++0x3 line.long 0x0 "RAMCFG_SRAM1ERKEYR,RAMCFG SRAM1 erase key register" hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key" group.long 0x100++0x3 line.long 0x0 "RAMCFG_SRAM2CR,RAMCFG SRAM2 control register" bitfld.long 0x0 8. "SRAMER,SRAM erase." "B_0x0,B_0x1" rgroup.long 0x108++0x3 line.long 0x0 "RAMCFG_SRAM2ISR,RAMCFG SRAM2 interrupt status register" bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "B_0x0,B_0x1" wgroup.long 0x128++0x3 line.long 0x0 "RAMCFG_SRAM2ERKEYR,RAMCFG SRAM2 erase key register" hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key" group.long 0x180++0x7 line.long 0x0 "RAMCFG_RETRAMCR,RAMCFG RETRAM control register" bitfld.long 0x0 12. "SRAMHWERDIS,SRAM hardware erase disable" "B_0x0,B_0x1" bitfld.long 0x0 8. "SRAMER,SRAM erase." "B_0x0,B_0x1" bitfld.long 0x0 4. "ALE,Address latch enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "ECCE,ECC enable" "B_0x0,B_0x1" line.long 0x4 "RAMCFG_RETRAMIER,RAMCFG RETRAM interrupt enable register" bitfld.long 0x4 1. "DEIE,ECC double error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "SEIE,ECC single error interrupt enable" "B_0x0,B_0x1" rgroup.long 0x188++0xB line.long 0x0 "RAMCFG_RETRAMISR,RAMCFG RETRAM interrupt status register" bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "B_0x0,B_0x1" bitfld.long 0x0 1. "DED,ECC double error detected" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC,ECC single error corrected" "B_0x0,B_0x1" line.long 0x4 "RAMCFG_RETRAMSEAR,RAMCFG RETRAM ECC single error address register" hexmask.long.word 0x4 0.--14. 1. "ESEA,ECC single error address" line.long 0x8 "RAMCFG_RETRAMDEAR,RAMCFG RETRAM ECC double error address register" hexmask.long.word 0x8 0.--14. 1. "EDEA,ECC double error address" wgroup.long 0x194++0x3 line.long 0x0 "RAMCFG_RETRAMICR,RAMCFG RETRAM interrupt clear flag register" bitfld.long 0x0 1. "CDED,Clear of ECC double error detected" "0,1" bitfld.long 0x0 0. "CSEC,Clear of ECC single corrected" "0,1" wgroup.long 0x1A4++0x7 line.long 0x0 "RAMCFG_RETRAMECCKEYR,RAMCFG RETRAM ECC key register" hexmask.long.byte 0x0 0.--7. 1. "ECCKEY,ECC write protection key" line.long 0x4 "RAMCFG_RETRAMERKEYR,RAMCFG RETRAM erase key register" hexmask.long.byte 0x4 0.--7. 1. "ERASEKEY,Erase write protection key" group.long 0x1B0++0xB line.long 0x0 "RAMCFG_RETRAMCCR1,RAMCFG RETRAM CRC control register 1" bitfld.long 0x0 4.--6. "CRCBS,CRC buffer size" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x0 0.--1. "CRCC,CRC configuration." "B_0x0,B_0x1,B_0x2,?" line.long 0x4 "RAMCFG_RETRAMCCR2,RAMCFG RETRAM CRC control register 2" bitfld.long 0x4 31. "CRCFC,CRC flags clear." "B_0x0,B_0x1" bitfld.long 0x4 0. "CRCCS,CRC computation start" "B_0x0,B_0x1" line.long 0x8 "RAMCFG_RETRAMCRSR,RAMCFG RETRAM CRC reference signature register" hexmask.long 0x8 0.--31. 1. "CRCRS,CRC reference signature." rgroup.long 0x1BC++0x7 line.long 0x0 "RAMCFG_RETRAMCSR,RAMCFG RETRAM CRC status register" bitfld.long 0x0 1. "CRCSCS,CRC signature check status flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "CRCEOC,CRC end-of-computation flag" "B_0x0,B_0x1" line.long 0x4 "RAMCFG_RETRAMCCSR,RAMCFG RETRAM CRC calculated signature register" hexmask.long 0x4 0.--31. 1. "CRCCS,CRC calculated signature" group.long 0x200++0x3 line.long 0x0 "RAMCFG_LPSRAM1CR,RAMCFG LPSRAM1 control register" bitfld.long 0x0 12. "SRAMHWERDIS,SRAM hardware erase disable" "B_0x0,B_0x1" bitfld.long 0x0 8. "SRAMER,SRAM erase." "B_0x0,B_0x1" rgroup.long 0x208++0x3 line.long 0x0 "RAMCFG_LPSRAM1ISR,RAMCFG LPSRAM1 interrupt status register" bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "B_0x0,B_0x1" wgroup.long 0x228++0x3 line.long 0x0 "RAMCFG_LPSRAM1ERKEYR,RAMCFG LPSRAM1 erase key register" hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key" group.long 0x230++0xB line.long 0x0 "RAMCFG_LPSRAM1CCR1,RAMCFG LPSRAM1 CRC control register 1" bitfld.long 0x0 4.--6. "CRCBS,CRC buffer size" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x0 0.--1. "CRCC,CRC configuration." "B_0x0,B_0x1,B_0x2,?" line.long 0x4 "RAMCFG_LPSRAM1CCR2,RAMCFG LPSRAM1 CRC control register 2" bitfld.long 0x4 31. "CRCFC,CRC flags clear." "B_0x0,B_0x1" bitfld.long 0x4 0. "CRCCS,CRC computation start" "B_0x0,B_0x1" line.long 0x8 "RAMCFG_LPSRAM1CRSR,RAMCFG LPSRAM1 CRC reference signature register" hexmask.long 0x8 0.--31. 1. "CRCRS,CRC reference signature." rgroup.long 0x23C++0x7 line.long 0x0 "RAMCFG_LPSRAM1CSR,RAMCFG LPSRAM1 CRC status register" bitfld.long 0x0 1. "CRCSCS,CRC signature check status flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "CRCEOC,CRC end of computation flag" "B_0x0,B_0x1" line.long 0x4 "RAMCFG_LPSRAM1CCSR,RAMCFG LPSRAM1 CRC calculated signature register" hexmask.long 0x4 0.--31. 1. "CRCCS,CRC calculated signature" group.long 0x280++0x3 line.long 0x0 "RAMCFG_LPSRAM2CR,RAMCFG LPSRAM2 control register" bitfld.long 0x0 8. "SRAMER,SRAM erase." "B_0x0,B_0x1" rgroup.long 0x288++0x3 line.long 0x0 "RAMCFG_LPSRAM2ISR,RAMCFG LPSRAM2 interrupt status register" bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "B_0x0,B_0x1" wgroup.long 0x2A8++0x3 line.long 0x0 "RAMCFG_LPSRAM2ERKEYR,RAMCFG LPSRAM2 erase key register" hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key" group.long 0x300++0x3 line.long 0x0 "RAMCFG_LPSRAM3CR,RAMCFG LPSRAM3 control register" bitfld.long 0x0 8. "SRAMER,SRAM erase." "B_0x0,B_0x1" rgroup.long 0x308++0x3 line.long 0x0 "RAMCFG_LPSRAM3ISR,RAMCFG LPSRAM3 interrupt status register" bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "B_0x0,B_0x1" wgroup.long 0x328++0x3 line.long 0x0 "RAMCFG_LPSRAM3ERKEYR,RAMCFG LPSRAM3 erase key register" hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key" group.long 0x380++0x7 line.long 0x0 "RAMCFG_BKPSRAMCR,RAMCFG BKPSRAM control register" bitfld.long 0x0 8. "SRAMER,SRAM erase." "B_0x0,B_0x1" bitfld.long 0x0 4. "ALE,Address latch enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "ECCE,ECC enable" "B_0x0,B_0x1" line.long 0x4 "RAMCFG_BKPSRAMIER,RAMCFG BKPSRAM interrupt enable register" bitfld.long 0x4 1. "DEIE,ECC double-error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "SEIE,ECC single-error interrupt enable" "B_0x0,B_0x1" rgroup.long 0x388++0xB line.long 0x0 "RAMCFG_BKPSRAMISR,RAMCFG BKPSRAM interrupt status register" bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "B_0x0,B_0x1" bitfld.long 0x0 1. "DED,ECC double error detected" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC,ECC single error corrected" "B_0x0,B_0x1" line.long 0x4 "RAMCFG_BKPSRAMEEAR,RAMCFG BKPSRAM ECC single error address register" hexmask.long.word 0x4 0.--10. 1. "ESEA,ECC single error address" line.long 0x8 "RAMCFG_BKPSRAMDEAR,RAMCFG BKPSRAM ECC double error address register" hexmask.long.word 0x8 0.--10. 1. "EDEA,ECC double error address" wgroup.long 0x394++0x3 line.long 0x0 "RAMCFG_BKPSRAMICR,RAMCFG BKPSRAM interrupt clear flag register" bitfld.long 0x0 1. "CDED,Clear of ECC double error detected" "0,1" bitfld.long 0x0 0. "CSEC,Clear of ECC single corrected" "0,1" wgroup.long 0x3A4++0x7 line.long 0x0 "RAMCFG_BKPSRAMECCKEYR,RAMCFG BKPSRAM ECC key register" hexmask.long.byte 0x0 0.--7. 1. "ECCKEY,ECC write protection key" line.long 0x4 "RAMCFG_BKPSRAMERKEYR,RAMCFG BKPSRAM erase key register" hexmask.long.byte 0x4 0.--7. 1. "ERASEKEY,Erase write protection key" group.long 0x400++0x3 line.long 0x0 "RAMCFG_VDERAMCR,RAMCFG VDERAM control register" bitfld.long 0x0 8. "SRAMER,SRAM erase" "B_0x0,B_0x1" rgroup.long 0x408++0x3 line.long 0x0 "RAMCFG_VDERAMISR,RAMCFG VDERAM interrupt status register" bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "B_0x0,B_0x1" wgroup.long 0x428++0x3 line.long 0x0 "RAMCFG_VDERAMERKEYR,RAMCFG VDERAM erase key register" hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key" tree.end tree "RAMCFG_S" base ad:0x52070000 group.long 0x0++0x3 line.long 0x0 "RAMCFG_SYSRAMCR,RAMCFG SYSRAM control register" bitfld.long 0x0 8. "SRAMER,SRAM erase" "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "RAMCFG_SYSRAMISR,RAMCFG SYSRAM interrupt status register" bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "B_0x0,B_0x1" wgroup.long 0x28++0x3 line.long 0x0 "RAMCFG_SYSRAMERKEYR,RAMCFG SYSRAM erase key register" hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key" group.long 0x80++0x3 line.long 0x0 "RAMCFG_SRAM1CR,RAMCFG SRAM1 control register" bitfld.long 0x0 8. "SRAMER,SRAM erase." "B_0x0,B_0x1" rgroup.long 0x88++0x3 line.long 0x0 "RAMCFG_SRAM1ISR,RAMCFG SRAM1 interrupt status register" bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "B_0x0,B_0x1" wgroup.long 0xA8++0x3 line.long 0x0 "RAMCFG_SRAM1ERKEYR,RAMCFG SRAM1 erase key register" hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key" group.long 0x100++0x3 line.long 0x0 "RAMCFG_SRAM2CR,RAMCFG SRAM2 control register" bitfld.long 0x0 8. "SRAMER,SRAM erase." "B_0x0,B_0x1" rgroup.long 0x108++0x3 line.long 0x0 "RAMCFG_SRAM2ISR,RAMCFG SRAM2 interrupt status register" bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "B_0x0,B_0x1" wgroup.long 0x128++0x3 line.long 0x0 "RAMCFG_SRAM2ERKEYR,RAMCFG SRAM2 erase key register" hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key" group.long 0x180++0x7 line.long 0x0 "RAMCFG_RETRAMCR,RAMCFG RETRAM control register" bitfld.long 0x0 12. "SRAMHWERDIS,SRAM hardware erase disable" "B_0x0,B_0x1" bitfld.long 0x0 8. "SRAMER,SRAM erase." "B_0x0,B_0x1" bitfld.long 0x0 4. "ALE,Address latch enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "ECCE,ECC enable" "B_0x0,B_0x1" line.long 0x4 "RAMCFG_RETRAMIER,RAMCFG RETRAM interrupt enable register" bitfld.long 0x4 1. "DEIE,ECC double error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "SEIE,ECC single error interrupt enable" "B_0x0,B_0x1" rgroup.long 0x188++0xB line.long 0x0 "RAMCFG_RETRAMISR,RAMCFG RETRAM interrupt status register" bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "B_0x0,B_0x1" bitfld.long 0x0 1. "DED,ECC double error detected" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC,ECC single error corrected" "B_0x0,B_0x1" line.long 0x4 "RAMCFG_RETRAMSEAR,RAMCFG RETRAM ECC single error address register" hexmask.long.word 0x4 0.--14. 1. "ESEA,ECC single error address" line.long 0x8 "RAMCFG_RETRAMDEAR,RAMCFG RETRAM ECC double error address register" hexmask.long.word 0x8 0.--14. 1. "EDEA,ECC double error address" wgroup.long 0x194++0x3 line.long 0x0 "RAMCFG_RETRAMICR,RAMCFG RETRAM interrupt clear flag register" bitfld.long 0x0 1. "CDED,Clear of ECC double error detected" "0,1" bitfld.long 0x0 0. "CSEC,Clear of ECC single corrected" "0,1" wgroup.long 0x1A4++0x7 line.long 0x0 "RAMCFG_RETRAMECCKEYR,RAMCFG RETRAM ECC key register" hexmask.long.byte 0x0 0.--7. 1. "ECCKEY,ECC write protection key" line.long 0x4 "RAMCFG_RETRAMERKEYR,RAMCFG RETRAM erase key register" hexmask.long.byte 0x4 0.--7. 1. "ERASEKEY,Erase write protection key" group.long 0x1B0++0xB line.long 0x0 "RAMCFG_RETRAMCCR1,RAMCFG RETRAM CRC control register 1" bitfld.long 0x0 4.--6. "CRCBS,CRC buffer size" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x0 0.--1. "CRCC,CRC configuration." "B_0x0,B_0x1,B_0x2,?" line.long 0x4 "RAMCFG_RETRAMCCR2,RAMCFG RETRAM CRC control register 2" bitfld.long 0x4 31. "CRCFC,CRC flags clear." "B_0x0,B_0x1" bitfld.long 0x4 0. "CRCCS,CRC computation start" "B_0x0,B_0x1" line.long 0x8 "RAMCFG_RETRAMCRSR,RAMCFG RETRAM CRC reference signature register" hexmask.long 0x8 0.--31. 1. "CRCRS,CRC reference signature." rgroup.long 0x1BC++0x7 line.long 0x0 "RAMCFG_RETRAMCSR,RAMCFG RETRAM CRC status register" bitfld.long 0x0 1. "CRCSCS,CRC signature check status flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "CRCEOC,CRC end-of-computation flag" "B_0x0,B_0x1" line.long 0x4 "RAMCFG_RETRAMCCSR,RAMCFG RETRAM CRC calculated signature register" hexmask.long 0x4 0.--31. 1. "CRCCS,CRC calculated signature" group.long 0x200++0x3 line.long 0x0 "RAMCFG_LPSRAM1CR,RAMCFG LPSRAM1 control register" bitfld.long 0x0 12. "SRAMHWERDIS,SRAM hardware erase disable" "B_0x0,B_0x1" bitfld.long 0x0 8. "SRAMER,SRAM erase." "B_0x0,B_0x1" rgroup.long 0x208++0x3 line.long 0x0 "RAMCFG_LPSRAM1ISR,RAMCFG LPSRAM1 interrupt status register" bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "B_0x0,B_0x1" wgroup.long 0x228++0x3 line.long 0x0 "RAMCFG_LPSRAM1ERKEYR,RAMCFG LPSRAM1 erase key register" hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key" group.long 0x230++0xB line.long 0x0 "RAMCFG_LPSRAM1CCR1,RAMCFG LPSRAM1 CRC control register 1" bitfld.long 0x0 4.--6. "CRCBS,CRC buffer size" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x0 0.--1. "CRCC,CRC configuration." "B_0x0,B_0x1,B_0x2,?" line.long 0x4 "RAMCFG_LPSRAM1CCR2,RAMCFG LPSRAM1 CRC control register 2" bitfld.long 0x4 31. "CRCFC,CRC flags clear." "B_0x0,B_0x1" bitfld.long 0x4 0. "CRCCS,CRC computation start" "B_0x0,B_0x1" line.long 0x8 "RAMCFG_LPSRAM1CRSR,RAMCFG LPSRAM1 CRC reference signature register" hexmask.long 0x8 0.--31. 1. "CRCRS,CRC reference signature." rgroup.long 0x23C++0x7 line.long 0x0 "RAMCFG_LPSRAM1CSR,RAMCFG LPSRAM1 CRC status register" bitfld.long 0x0 1. "CRCSCS,CRC signature check status flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "CRCEOC,CRC end of computation flag" "B_0x0,B_0x1" line.long 0x4 "RAMCFG_LPSRAM1CCSR,RAMCFG LPSRAM1 CRC calculated signature register" hexmask.long 0x4 0.--31. 1. "CRCCS,CRC calculated signature" group.long 0x280++0x3 line.long 0x0 "RAMCFG_LPSRAM2CR,RAMCFG LPSRAM2 control register" bitfld.long 0x0 8. "SRAMER,SRAM erase." "B_0x0,B_0x1" rgroup.long 0x288++0x3 line.long 0x0 "RAMCFG_LPSRAM2ISR,RAMCFG LPSRAM2 interrupt status register" bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "B_0x0,B_0x1" wgroup.long 0x2A8++0x3 line.long 0x0 "RAMCFG_LPSRAM2ERKEYR,RAMCFG LPSRAM2 erase key register" hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key" group.long 0x300++0x3 line.long 0x0 "RAMCFG_LPSRAM3CR,RAMCFG LPSRAM3 control register" bitfld.long 0x0 8. "SRAMER,SRAM erase." "B_0x0,B_0x1" rgroup.long 0x308++0x3 line.long 0x0 "RAMCFG_LPSRAM3ISR,RAMCFG LPSRAM3 interrupt status register" bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "B_0x0,B_0x1" wgroup.long 0x328++0x3 line.long 0x0 "RAMCFG_LPSRAM3ERKEYR,RAMCFG LPSRAM3 erase key register" hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key" group.long 0x380++0x7 line.long 0x0 "RAMCFG_BKPSRAMCR,RAMCFG BKPSRAM control register" bitfld.long 0x0 8. "SRAMER,SRAM erase." "B_0x0,B_0x1" bitfld.long 0x0 4. "ALE,Address latch enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "ECCE,ECC enable" "B_0x0,B_0x1" line.long 0x4 "RAMCFG_BKPSRAMIER,RAMCFG BKPSRAM interrupt enable register" bitfld.long 0x4 1. "DEIE,ECC double-error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "SEIE,ECC single-error interrupt enable" "B_0x0,B_0x1" rgroup.long 0x388++0xB line.long 0x0 "RAMCFG_BKPSRAMISR,RAMCFG BKPSRAM interrupt status register" bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "B_0x0,B_0x1" bitfld.long 0x0 1. "DED,ECC double error detected" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC,ECC single error corrected" "B_0x0,B_0x1" line.long 0x4 "RAMCFG_BKPSRAMEEAR,RAMCFG BKPSRAM ECC single error address register" hexmask.long.word 0x4 0.--10. 1. "ESEA,ECC single error address" line.long 0x8 "RAMCFG_BKPSRAMDEAR,RAMCFG BKPSRAM ECC double error address register" hexmask.long.word 0x8 0.--10. 1. "EDEA,ECC double error address" wgroup.long 0x394++0x3 line.long 0x0 "RAMCFG_BKPSRAMICR,RAMCFG BKPSRAM interrupt clear flag register" bitfld.long 0x0 1. "CDED,Clear of ECC double error detected" "0,1" bitfld.long 0x0 0. "CSEC,Clear of ECC single corrected" "0,1" wgroup.long 0x3A4++0x7 line.long 0x0 "RAMCFG_BKPSRAMECCKEYR,RAMCFG BKPSRAM ECC key register" hexmask.long.byte 0x0 0.--7. 1. "ECCKEY,ECC write protection key" line.long 0x4 "RAMCFG_BKPSRAMERKEYR,RAMCFG BKPSRAM erase key register" hexmask.long.byte 0x4 0.--7. 1. "ERASEKEY,Erase write protection key" group.long 0x400++0x3 line.long 0x0 "RAMCFG_VDERAMCR,RAMCFG VDERAM control register" bitfld.long 0x0 8. "SRAMER,SRAM erase" "B_0x0,B_0x1" rgroup.long 0x408++0x3 line.long 0x0 "RAMCFG_VDERAMISR,RAMCFG VDERAM interrupt status register" bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "B_0x0,B_0x1" wgroup.long 0x428++0x3 line.long 0x0 "RAMCFG_VDERAMERKEYR,RAMCFG VDERAM erase key register" hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key" tree.end tree.end tree "RCC (Reset and Clock Control)" base ad:0x0 tree "RCC" base ad:0x44200000 group.long 0x0++0x3BF line.long 0x0 "RCC_SECCFGR0,RCC secure configuration register 0" hexmask.long 0x0 0.--31. 1. "SEC,Secure attribute reference for local resource number x" line.long 0x4 "RCC_SECCFGR1,RCC secure configuration register 1" hexmask.long 0x4 0.--31. 1. "SEC,Secure attribute reference for the local resource number x" line.long 0x8 "RCC_SECCFGR2,RCC secure configuration register 2" hexmask.long 0x8 0.--31. 1. "SEC,Secure attribute reference for the local resource number x" line.long 0xC "RCC_SECCFGR3,RCC secure configuration register 3" hexmask.long.tbyte 0xC 0.--17. 1. "SEC,Secure attribute reference for the local resource number x" line.long 0x10 "RCC_PRIVCFGR0,RCC privileged configuration register 0" hexmask.long 0x10 0.--31. 1. "PRIV,Privileged attribute reference for local resource number x" line.long 0x14 "RCC_PRIVCFGR1,RCC privileged configuration register 1" hexmask.long 0x14 0.--31. 1. "PRIV,Privileged attribute reference for the local resource number x" line.long 0x18 "RCC_PRIVCFGR2,RCC privileged configuration register 2" hexmask.long 0x18 0.--31. 1. "PRIV,Privileged attribute reference for the local resource number x" line.long 0x1C "RCC_PRIVCFGR3,RCC privileged configuration register 3" hexmask.long.tbyte 0x1C 0.--17. 1. "PRIV,Privileged attribute reference for the local resource number x" line.long 0x20 "RCC_RCFGLOCKR0,RCC resource configuration lock register 0" hexmask.long 0x20 0.--31. 1. "RLOCK,RCC local resource number x lock" line.long 0x24 "RCC_RCFGLOCKR1,RCC resource configuration lock register 1" hexmask.long 0x24 0.--31. 1. "RLOCK,RCC local resource number x lock" line.long 0x28 "RCC_RCFGLOCKR2,RCC resource configuration lock register 2" hexmask.long 0x28 0.--31. 1. "RLOCK,RCC local resource number x lock" line.long 0x2C "RCC_RCFGLOCKR3,RCC resource configuration lock register 3" hexmask.long.tbyte 0x2C 0.--17. 1. "RLOCK,RCC local resource number x lock" line.long 0x30 "RCC_R0CIDCFGR,RCC resource 0 CID configuration register" hexmask.long.byte 0x30 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x30 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x34 "RCC_R0SEMCR,RCC resource 0 semaphore control register" rbitfld.long 0x34 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x38 "RCC_R1CIDCFGR,RCC resource 1 CID configuration register" hexmask.long.byte 0x38 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x38 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x3C "RCC_R1SEMCR,RCC resource 1 semaphore control register" rbitfld.long 0x3C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x40 "RCC_R2CIDCFGR,RCC resource 2 CID configuration register" hexmask.long.byte 0x40 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x40 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x44 "RCC_R2SEMCR,RCC resource 2 semaphore control register" rbitfld.long 0x44 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x48 "RCC_R3CIDCFGR,RCC resource 3 CID configuration register" hexmask.long.byte 0x48 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x48 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x4C "RCC_R3SEMCR,RCC resource 3 semaphore control register" rbitfld.long 0x4C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x50 "RCC_R4CIDCFGR,RCC resource 4 CID configuration register" hexmask.long.byte 0x50 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x50 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x54 "RCC_R4SEMCR,RCC resource 4 semaphore control register" rbitfld.long 0x54 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x58 "RCC_R5CIDCFGR,RCC resource 5 CID configuration register" hexmask.long.byte 0x58 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x58 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x5C "RCC_R5SEMCR,RCC resource 5 semaphore control register" rbitfld.long 0x5C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x60 "RCC_R6CIDCFGR,RCC resource 6 CID configuration register" hexmask.long.byte 0x60 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x60 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x64 "RCC_R6SEMCR,RCC resource 6 semaphore control register" rbitfld.long 0x64 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x68 "RCC_R7CIDCFGR,RCC resource 7 CID configuration register" hexmask.long.byte 0x68 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x68 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x6C "RCC_R7SEMCR,RCC resource 7 semaphore control register" rbitfld.long 0x6C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x70 "RCC_R8CIDCFGR,RCC resource 8 CID configuration register" hexmask.long.byte 0x70 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x70 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x74 "RCC_R8SEMCR,RCC resource 8 semaphore control register" rbitfld.long 0x74 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x78 "RCC_R9CIDCFGR,RCC resource 9 CID configuration register" hexmask.long.byte 0x78 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x78 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x7C "RCC_R9SEMCR,RCC resource 9 semaphore control register" rbitfld.long 0x7C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x80 "RCC_R10CIDCFGR,RCC resource 10 CID configuration register" hexmask.long.byte 0x80 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x80 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x80 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x84 "RCC_R10SEMCR,RCC resource 10 semaphore control register" rbitfld.long 0x84 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x88 "RCC_R11CIDCFGR,RCC resource 11 CID configuration register" hexmask.long.byte 0x88 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x88 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x88 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x8C "RCC_R11SEMCR,RCC resource 11 semaphore control register" rbitfld.long 0x8C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x90 "RCC_R12CIDCFGR,RCC resource 12 CID configuration register" hexmask.long.byte 0x90 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x90 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x90 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x90 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x94 "RCC_R12SEMCR,RCC resource 12 semaphore control register" rbitfld.long 0x94 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x94 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x98 "RCC_R13CIDCFGR,RCC resource 13 CID configuration register" hexmask.long.byte 0x98 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x98 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x98 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x98 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x9C "RCC_R13SEMCR,RCC resource 13 semaphore control register" rbitfld.long 0x9C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x9C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xA0 "RCC_R14CIDCFGR,RCC resource 14 CID configuration register" hexmask.long.byte 0xA0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xA0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xA0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xA0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xA4 "RCC_R14SEMCR,RCC resource 14 semaphore control register" rbitfld.long 0xA4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xA4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xA8 "RCC_R15CIDCFGR,RCC resource 15 CID configuration register" hexmask.long.byte 0xA8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xA8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xA8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xA8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xAC "RCC_R15SEMCR,RCC resource 15 semaphore control register" rbitfld.long 0xAC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xAC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xB0 "RCC_R16CIDCFGR,RCC resource 16 CID configuration register" hexmask.long.byte 0xB0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xB0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xB0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xB0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xB4 "RCC_R16SEMCR,RCC resource 16 semaphore control register" rbitfld.long 0xB4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xB4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xB8 "RCC_R17CIDCFGR,RCC resource 17 CID configuration register" hexmask.long.byte 0xB8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xB8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xB8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xB8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xBC "RCC_R17SEMCR,RCC resource 17 semaphore control register" rbitfld.long 0xBC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xBC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xC0 "RCC_R18CIDCFGR,RCC resource 18 CID configuration register" hexmask.long.byte 0xC0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xC0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xC0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xC0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xC4 "RCC_R18SEMCR,RCC resource 18 semaphore control register" rbitfld.long 0xC4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xC4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xC8 "RCC_R19CIDCFGR,RCC resource 19 CID configuration register" hexmask.long.byte 0xC8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xC8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xC8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xC8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xCC "RCC_R19SEMCR,RCC resource 19 semaphore control register" rbitfld.long 0xCC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xCC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xD0 "RCC_R20CIDCFGR,RCC resource 20 CID configuration register" hexmask.long.byte 0xD0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xD0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xD0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xD0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xD4 "RCC_R20SEMCR,RCC resource 20 semaphore control register" rbitfld.long 0xD4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xD4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xD8 "RCC_R21CIDCFGR,RCC resource 21 CID configuration register" hexmask.long.byte 0xD8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xD8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xD8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xD8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xDC "RCC_R21SEMCR,RCC resource 21 semaphore control register" rbitfld.long 0xDC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xDC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xE0 "RCC_R22CIDCFGR,RCC resource 22 CID configuration register" hexmask.long.byte 0xE0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xE0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xE0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xE0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xE4 "RCC_R22SEMCR,RCC resource 22 semaphore control register" rbitfld.long 0xE4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xE4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xE8 "RCC_R23CIDCFGR,RCC resource 23 CID configuration register" hexmask.long.byte 0xE8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xE8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xE8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xE8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xEC "RCC_R23SEMCR,RCC resource 23 semaphore control register" rbitfld.long 0xEC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xEC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xF0 "RCC_R24CIDCFGR,RCC resource 24 CID configuration register" hexmask.long.byte 0xF0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xF0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xF0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xF0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xF4 "RCC_R24SEMCR,RCC resource 24 semaphore control register" rbitfld.long 0xF4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xF4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xF8 "RCC_R25CIDCFGR,RCC resource 25 CID configuration register" hexmask.long.byte 0xF8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xF8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xF8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xF8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xFC "RCC_R25SEMCR,RCC resource 25 semaphore control register" rbitfld.long 0xFC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xFC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x100 "RCC_R26CIDCFGR,RCC resource 26 CID configuration register" hexmask.long.byte 0x100 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x100 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x100 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x100 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x104 "RCC_R26SEMCR,RCC resource 26 semaphore control register" rbitfld.long 0x104 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x104 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x108 "RCC_R27CIDCFGR,RCC resource 27 CID configuration register" hexmask.long.byte 0x108 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x108 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x108 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x108 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x10C "RCC_R27SEMCR,RCC resource 27 semaphore control register" rbitfld.long 0x10C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x10C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x110 "RCC_R28CIDCFGR,RCC resource 28 CID configuration register" hexmask.long.byte 0x110 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x110 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x110 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x110 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x114 "RCC_R28SEMCR,RCC resource 28 semaphore control register" rbitfld.long 0x114 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x114 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x118 "RCC_R29CIDCFGR,RCC resource 29 CID configuration register" hexmask.long.byte 0x118 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x118 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x118 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x118 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x11C "RCC_R29SEMCR,RCC resource 29 semaphore control register" rbitfld.long 0x11C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x11C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x120 "RCC_R30CIDCFGR,RCC resource 30 CID configuration register" hexmask.long.byte 0x120 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x120 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x120 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x120 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x124 "RCC_R30SEMCR,RCC resource 30 semaphore control register" rbitfld.long 0x124 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x124 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x128 "RCC_R31CIDCFGR,RCC resource 31 CID configuration register" hexmask.long.byte 0x128 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x128 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x128 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x128 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x12C "RCC_R31SEMCR,RCC resource 31 semaphore control register" rbitfld.long 0x12C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x12C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x130 "RCC_R32CIDCFGR,RCC resource 32 CID configuration register" hexmask.long.byte 0x130 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x130 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x130 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x130 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x134 "RCC_R32SEMCR,RCC resource 32 semaphore control register" rbitfld.long 0x134 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x134 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x138 "RCC_R33CIDCFGR,RCC resource 33 CID configuration register" hexmask.long.byte 0x138 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x138 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x138 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x138 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x13C "RCC_R33SEMCR,RCC resource 33 semaphore control register" rbitfld.long 0x13C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x13C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x140 "RCC_R34CIDCFGR,RCC resource 34 CID configuration register" hexmask.long.byte 0x140 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x140 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x140 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x140 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x144 "RCC_R34SEMCR,RCC resource 34 semaphore control register" rbitfld.long 0x144 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x144 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x148 "RCC_R35CIDCFGR,RCC resource 35 CID configuration register" hexmask.long.byte 0x148 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x148 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x148 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x148 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x14C "RCC_R35SEMCR,RCC resource 35 semaphore control register" rbitfld.long 0x14C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x14C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x150 "RCC_R36CIDCFGR,RCC resource 36 CID configuration register" hexmask.long.byte 0x150 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x150 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x150 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x150 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x154 "RCC_R36SEMCR,RCC resource 36 semaphore control register" rbitfld.long 0x154 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x154 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x158 "RCC_R37CIDCFGR,RCC resource 37 CID configuration register" hexmask.long.byte 0x158 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x158 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x158 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x158 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x15C "RCC_R37SEMCR,RCC resource 37 semaphore control register" rbitfld.long 0x15C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x15C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x160 "RCC_R38CIDCFGR,RCC resource 38 CID configuration register" hexmask.long.byte 0x160 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x160 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x160 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x160 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x164 "RCC_R38SEMCR,RCC resource 38 semaphore control register" rbitfld.long 0x164 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x164 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x168 "RCC_R39CIDCFGR,RCC resource 39 CID configuration register" hexmask.long.byte 0x168 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x168 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x168 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x168 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x16C "RCC_R39SEMCR,RCC resource 39 semaphore control register" rbitfld.long 0x16C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x16C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x170 "RCC_R40CIDCFGR,RCC resource 40 CID configuration register" hexmask.long.byte 0x170 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x170 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x170 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x170 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x174 "RCC_R40SEMCR,RCC resource 40 semaphore control register" rbitfld.long 0x174 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x174 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x178 "RCC_R41CIDCFGR,RCC resource 41 CID configuration register" hexmask.long.byte 0x178 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x178 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x178 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x178 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x17C "RCC_R41SEMCR,RCC resource 41 semaphore control register" rbitfld.long 0x17C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x17C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x180 "RCC_R42CIDCFGR,RCC resource 42 CID configuration register" hexmask.long.byte 0x180 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x180 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x180 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x180 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x184 "RCC_R42SEMCR,RCC resource 42 semaphore control register" rbitfld.long 0x184 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x184 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x188 "RCC_R43CIDCFGR,RCC resource 43 CID configuration register" hexmask.long.byte 0x188 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x188 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x188 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x188 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x18C "RCC_R43SEMCR,RCC resource 43 semaphore control register" rbitfld.long 0x18C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x18C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x190 "RCC_R44CIDCFGR,RCC resource 44 CID configuration register" hexmask.long.byte 0x190 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x190 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x190 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x190 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x194 "RCC_R44SEMCR,RCC resource 44 semaphore control register" rbitfld.long 0x194 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x194 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x198 "RCC_R45CIDCFGR,RCC resource 45 CID configuration register" hexmask.long.byte 0x198 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x198 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x198 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x198 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x19C "RCC_R45SEMCR,RCC resource 45 semaphore control register" rbitfld.long 0x19C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x19C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1A0 "RCC_R46CIDCFGR,RCC resource 46 CID configuration register" hexmask.long.byte 0x1A0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1A0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1A0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1A0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1A4 "RCC_R46SEMCR,RCC resource 46 semaphore control register" rbitfld.long 0x1A4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1A4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1A8 "RCC_R47CIDCFGR,RCC resource 47 CID configuration register" hexmask.long.byte 0x1A8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1A8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1A8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1A8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1AC "RCC_R47SEMCR,RCC resource 47 semaphore control register" rbitfld.long 0x1AC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1AC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1B0 "RCC_R48CIDCFGR,RCC resource 48 CID configuration register" hexmask.long.byte 0x1B0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1B0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1B0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1B0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1B4 "RCC_R48SEMCR,RCC resource 48 semaphore control register" rbitfld.long 0x1B4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1B4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1B8 "RCC_R49CIDCFGR,RCC resource 49 CID configuration register" hexmask.long.byte 0x1B8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1B8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1B8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1B8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1BC "RCC_R49SEMCR,RCC resource 49 semaphore control register" rbitfld.long 0x1BC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1BC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1C0 "RCC_R50CIDCFGR,RCC resource 50 CID configuration register" hexmask.long.byte 0x1C0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1C0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1C0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1C4 "RCC_R50SEMCR,RCC resource 50 semaphore control register" rbitfld.long 0x1C4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1C8 "RCC_R51CIDCFGR,RCC resource 51 CID configuration register" hexmask.long.byte 0x1C8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1C8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1C8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1CC "RCC_R51SEMCR,RCC resource 51 semaphore control register" rbitfld.long 0x1CC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1CC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1D0 "RCC_R52CIDCFGR,RCC resource 52 CID configuration register" hexmask.long.byte 0x1D0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1D0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1D0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1D0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1D4 "RCC_R52SEMCR,RCC resource 52 semaphore control register" rbitfld.long 0x1D4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1D4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1D8 "RCC_R53CIDCFGR,RCC resource 53 CID configuration register" hexmask.long.byte 0x1D8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1D8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1D8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1D8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1DC "RCC_R53SEMCR,RCC resource 53 semaphore control register" rbitfld.long 0x1DC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1DC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1E0 "RCC_R54CIDCFGR,RCC resource 54 CID configuration register" hexmask.long.byte 0x1E0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1E0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1E0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1E0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1E4 "RCC_R54SEMCR,RCC resource 54 semaphore control register" rbitfld.long 0x1E4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1E4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1E8 "RCC_R55CIDCFGR,RCC resource 55 CID configuration register" hexmask.long.byte 0x1E8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1E8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1E8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1E8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1EC "RCC_R55SEMCR,RCC resource 55 semaphore control register" rbitfld.long 0x1EC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1EC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1F0 "RCC_R56CIDCFGR,RCC resource 56 CID configuration register" hexmask.long.byte 0x1F0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1F0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1F0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1F0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1F4 "RCC_R56SEMCR,RCC resource 56 semaphore control register" rbitfld.long 0x1F4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1F4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1F8 "RCC_R57CIDCFGR,RCC resource 57 CID configuration register" hexmask.long.byte 0x1F8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1F8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1F8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1F8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1FC "RCC_R57SEMCR,RCC resource 57 semaphore control register" rbitfld.long 0x1FC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1FC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x200 "RCC_R58CIDCFGR,RCC resource 58 CID configuration register" hexmask.long.byte 0x200 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x200 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x200 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x200 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x204 "RCC_R58SEMCR,RCC resource 58 semaphore control register" rbitfld.long 0x204 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x204 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x208 "RCC_R59CIDCFGR,RCC resource 59 CID configuration register" hexmask.long.byte 0x208 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x208 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x208 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x208 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x20C "RCC_R59SEMCR,RCC resource 59 semaphore control register" rbitfld.long 0x20C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x20C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x210 "RCC_R60CIDCFGR,RCC resource 60 CID configuration register" hexmask.long.byte 0x210 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x210 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x210 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x210 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x214 "RCC_R60SEMCR,RCC resource 60 semaphore control register" rbitfld.long 0x214 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x214 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x218 "RCC_R61CIDCFGR,RCC resource 61 CID configuration register" hexmask.long.byte 0x218 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x218 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x218 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x218 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x21C "RCC_R61SEMCR,RCC resource 61 semaphore control register" rbitfld.long 0x21C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x21C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x220 "RCC_R62CIDCFGR,RCC resource 62 CID configuration register" hexmask.long.byte 0x220 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x220 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x220 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x220 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x224 "RCC_R62SEMCR,RCC resource 62 semaphore control register" rbitfld.long 0x224 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x224 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x228 "RCC_R63CIDCFGR,RCC resource 63 CID configuration register" hexmask.long.byte 0x228 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x228 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x228 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x228 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x22C "RCC_R63SEMCR,RCC resource 63 semaphore control register" rbitfld.long 0x22C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x22C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x230 "RCC_R64CIDCFGR,RCC resource 64 CID configuration register" hexmask.long.byte 0x230 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x230 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x230 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x230 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x234 "RCC_R64SEMCR,RCC resource 64 semaphore control register" rbitfld.long 0x234 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x234 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x238 "RCC_R65CIDCFGR,RCC resource 65 CID configuration register" hexmask.long.byte 0x238 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x238 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x238 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x238 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x23C "RCC_R65SEMCR,RCC resource 65 semaphore control register" rbitfld.long 0x23C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x23C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x240 "RCC_R66CIDCFGR,RCC resource 66 CID configuration register" hexmask.long.byte 0x240 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x240 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x240 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x240 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x244 "RCC_R66SEMCR,RCC resource 66 semaphore control register" rbitfld.long 0x244 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x244 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x248 "RCC_R67CIDCFGR,RCC resource 67 CID configuration register" hexmask.long.byte 0x248 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x248 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x248 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x248 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x24C "RCC_R67SEMCR,RCC resource 67 semaphore control register" rbitfld.long 0x24C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x24C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x250 "RCC_R68CIDCFGR,RCC resource 68 CID configuration register" hexmask.long.byte 0x250 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x250 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x250 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x250 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x254 "RCC_R68SEMCR,RCC resource 68 semaphore control register" rbitfld.long 0x254 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x254 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x258 "RCC_R69CIDCFGR,RCC resource 69 CID configuration register" hexmask.long.byte 0x258 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x258 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x258 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x258 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x25C "RCC_R69SEMCR,RCC resource 69 semaphore control register" rbitfld.long 0x25C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x25C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x260 "RCC_R70CIDCFGR,RCC resource 70 CID configuration register" hexmask.long.byte 0x260 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x260 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x260 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x260 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x264 "RCC_R70SEMCR,RCC resource 70 semaphore control register" rbitfld.long 0x264 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x264 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x268 "RCC_R71CIDCFGR,RCC resource 71 CID configuration register" hexmask.long.byte 0x268 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x268 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x268 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x268 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x26C "RCC_R71SEMCR,RCC resource 71 semaphore control register" rbitfld.long 0x26C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x26C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x270 "RCC_R72CIDCFGR,RCC resource 72 CID configuration register" hexmask.long.byte 0x270 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x270 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x270 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x270 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x274 "RCC_R72SEMCR,RCC resource 72 semaphore control register" rbitfld.long 0x274 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x274 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x278 "RCC_R73CIDCFGR,RCC resource 73 CID configuration register" hexmask.long.byte 0x278 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x278 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x278 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x278 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x27C "RCC_R73SEMCR,RCC resource 73 semaphore control register" rbitfld.long 0x27C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x27C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x280 "RCC_R74CIDCFGR,RCC resource 74 CID configuration register" hexmask.long.byte 0x280 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x280 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x280 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x280 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x284 "RCC_R74SEMCR,RCC resource 74 semaphore control register" rbitfld.long 0x284 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x284 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x288 "RCC_R75CIDCFGR,RCC resource 75 CID configuration register" hexmask.long.byte 0x288 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x288 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x288 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x288 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x28C "RCC_R75SEMCR,RCC resource 75 semaphore control register" rbitfld.long 0x28C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x28C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x290 "RCC_R76CIDCFGR,RCC resource 76 CID configuration register" hexmask.long.byte 0x290 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x290 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x290 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x290 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x294 "RCC_R76SEMCR,RCC resource 76 semaphore control register" rbitfld.long 0x294 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x294 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x298 "RCC_R77CIDCFGR,RCC resource 77 CID configuration register" hexmask.long.byte 0x298 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x298 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x298 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x298 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x29C "RCC_R77SEMCR,RCC resource 77 semaphore control register" rbitfld.long 0x29C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x29C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2A0 "RCC_R78CIDCFGR,RCC resource 78 CID configuration register" hexmask.long.byte 0x2A0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2A0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2A0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2A0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2A4 "RCC_R78SEMCR,RCC resource 78 semaphore control register" rbitfld.long 0x2A4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2A4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2A8 "RCC_R79CIDCFGR,RCC resource 79 CID configuration register" hexmask.long.byte 0x2A8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2A8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2A8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2A8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2AC "RCC_R79SEMCR,RCC resource 79 semaphore control register" rbitfld.long 0x2AC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2AC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2B0 "RCC_R80CIDCFGR,RCC resource 80 CID configuration register" hexmask.long.byte 0x2B0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2B0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2B0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2B0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2B4 "RCC_R80SEMCR,RCC resource 80 semaphore control register" rbitfld.long 0x2B4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2B4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2B8 "RCC_R81CIDCFGR,RCC resource 81 CID configuration register" hexmask.long.byte 0x2B8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2B8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2B8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2B8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2BC "RCC_R81SEMCR,RCC resource 81 semaphore control register" rbitfld.long 0x2BC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2BC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2C0 "RCC_R82CIDCFGR,RCC resource 82 CID configuration register" hexmask.long.byte 0x2C0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2C0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2C0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2C4 "RCC_R82SEMCR,RCC resource 82 semaphore control register" rbitfld.long 0x2C4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2C8 "RCC_R83CIDCFGR,RCC resource 83 CID configuration register" hexmask.long.byte 0x2C8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2C8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2C8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2CC "RCC_R83SEMCR,RCC resource 83 semaphore control register" rbitfld.long 0x2CC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2CC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2D0 "RCC_R84CIDCFGR,RCC resource 84 CID configuration register" hexmask.long.byte 0x2D0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2D0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2D0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2D0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2D4 "RCC_R84SEMCR,RCC resource 84 semaphore control register" rbitfld.long 0x2D4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2D4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2D8 "RCC_R85CIDCFGR,RCC resource 85 CID configuration register" hexmask.long.byte 0x2D8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2D8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2D8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2D8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2DC "RCC_R85SEMCR,RCC resource 85 semaphore control register" rbitfld.long 0x2DC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2DC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2E0 "RCC_R86CIDCFGR,RCC resource 86 CID configuration register" hexmask.long.byte 0x2E0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2E0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2E0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2E0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2E4 "RCC_R86SEMCR,RCC resource 86 semaphore control register" rbitfld.long 0x2E4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2E4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2E8 "RCC_R87CIDCFGR,RCC resource 87 CID configuration register" hexmask.long.byte 0x2E8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2E8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2E8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2E8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2EC "RCC_R87SEMCR,RCC resource 87 semaphore control register" rbitfld.long 0x2EC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2EC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2F0 "RCC_R88CIDCFGR,RCC resource 88 CID configuration register" hexmask.long.byte 0x2F0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2F0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2F0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2F0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2F4 "RCC_R88SEMCR,RCC resource 88 semaphore control register" rbitfld.long 0x2F4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2F4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2F8 "RCC_R89CIDCFGR,RCC resource 89 CID configuration register" hexmask.long.byte 0x2F8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2F8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2F8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2F8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2FC "RCC_R89SEMCR,RCC resource 89 semaphore control register" rbitfld.long 0x2FC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2FC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x300 "RCC_R90CIDCFGR,RCC resource 90 CID configuration register" hexmask.long.byte 0x300 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x300 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x300 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x300 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x304 "RCC_R90SEMCR,RCC resource 90 semaphore control register" rbitfld.long 0x304 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x304 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x308 "RCC_R91CIDCFGR,RCC resource 91 CID configuration register" hexmask.long.byte 0x308 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x308 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x308 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x308 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x30C "RCC_R91SEMCR,RCC resource 91 semaphore control register" rbitfld.long 0x30C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x30C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x310 "RCC_R92CIDCFGR,RCC resource 92 CID configuration register" hexmask.long.byte 0x310 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x310 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x310 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x310 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x314 "RCC_R92SEMCR,RCC resource 92 semaphore control register" rbitfld.long 0x314 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x314 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x318 "RCC_R93CIDCFGR,RCC resource 93 CID configuration register" hexmask.long.byte 0x318 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x318 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x318 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x318 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x31C "RCC_R93SEMCR,RCC resource 93 semaphore control register" rbitfld.long 0x31C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x31C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x320 "RCC_R94CIDCFGR,RCC resource 94 CID configuration register" hexmask.long.byte 0x320 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x320 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x320 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x320 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x324 "RCC_R94SEMCR,RCC resource 94 semaphore control register" rbitfld.long 0x324 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x324 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x328 "RCC_R95CIDCFGR,RCC resource 95 CID configuration register" hexmask.long.byte 0x328 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x328 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x328 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x328 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x32C "RCC_R95SEMCR,RCC resource 95 semaphore control register" rbitfld.long 0x32C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x32C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x330 "RCC_R96CIDCFGR,RCC resource 96 CID configuration register" hexmask.long.byte 0x330 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x330 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x330 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x330 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x334 "RCC_R96SEMCR,RCC resource 96 semaphore control register" rbitfld.long 0x334 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x334 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x338 "RCC_R97CIDCFGR,RCC resource 97 CID configuration register" hexmask.long.byte 0x338 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x338 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x338 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x338 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x33C "RCC_R97SEMCR,RCC resource 97 semaphore control register" rbitfld.long 0x33C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x33C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x340 "RCC_R98CIDCFGR,RCC resource 98 CID configuration register" hexmask.long.byte 0x340 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x340 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x340 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x340 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x344 "RCC_R98SEMCR,RCC resource 98 semaphore control register" rbitfld.long 0x344 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x344 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x348 "RCC_R99CIDCFGR,RCC resource 99 CID configuration register" hexmask.long.byte 0x348 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x348 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x348 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x348 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x34C "RCC_R99SEMCR,RCC resource 99 semaphore control register" rbitfld.long 0x34C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x34C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x350 "RCC_R100CIDCFGR,RCC resource 100 CID configuration register" hexmask.long.byte 0x350 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x350 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x350 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x350 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x354 "RCC_R100SEMCR,RCC resource 100 semaphore control register" rbitfld.long 0x354 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x354 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x358 "RCC_R101CIDCFGR,RCC resource 101 CID configuration register" hexmask.long.byte 0x358 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x358 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x358 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x358 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x35C "RCC_R101SEMCR,RCC resource 101 semaphore control register" rbitfld.long 0x35C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x35C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x360 "RCC_R102CIDCFGR,RCC resource 102 CID configuration register" hexmask.long.byte 0x360 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x360 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x360 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x360 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x364 "RCC_R102SEMCR,RCC resource 102 semaphore control register" rbitfld.long 0x364 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x364 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x368 "RCC_R103CIDCFGR,RCC resource 103 CID configuration register" hexmask.long.byte 0x368 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x368 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x368 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x368 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x36C "RCC_R103SEMCR,RCC resource 103 semaphore control register" rbitfld.long 0x36C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x36C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x370 "RCC_R104CIDCFGR,RCC resource 104 CID configuration register" hexmask.long.byte 0x370 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x370 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x370 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x370 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x374 "RCC_R104SEMCR,RCC resource 104 semaphore control register" rbitfld.long 0x374 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x374 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x378 "RCC_R105CIDCFGR,RCC resource 105 CID configuration register" hexmask.long.byte 0x378 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x378 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x378 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x378 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x37C "RCC_R105SEMCR,RCC resource 105 semaphore control register" rbitfld.long 0x37C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x37C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x380 "RCC_R106CIDCFGR,RCC resource 106 CID configuration register" hexmask.long.byte 0x380 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x380 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x380 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x380 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x384 "RCC_R106SEMCR,RCC resource 106 semaphore control register" rbitfld.long 0x384 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x384 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x388 "RCC_R107CIDCFGR,RCC resource 107 CID configuration register" hexmask.long.byte 0x388 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x388 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x388 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x388 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x38C "RCC_R107SEMCR,RCC resource 107 semaphore control register" rbitfld.long 0x38C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x38C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x390 "RCC_R108CIDCFGR,RCC resource 108 CID configuration register" hexmask.long.byte 0x390 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x390 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x390 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x390 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x394 "RCC_R108SEMCR,RCC resource 108 semaphore control register" rbitfld.long 0x394 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x394 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x398 "RCC_R109CIDCFGR,RCC resource 109 CID configuration register" hexmask.long.byte 0x398 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x398 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x398 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x398 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x39C "RCC_R109SEMCR,RCC resource 109 semaphore control register" rbitfld.long 0x39C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x39C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x3A0 "RCC_R110CIDCFGR,RCC resource 110 CID configuration register" hexmask.long.byte 0x3A0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x3A0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x3A0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3A0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x3A4 "RCC_R110SEMCR,RCC resource 110 semaphore control register" rbitfld.long 0x3A4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x3A4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x3A8 "RCC_R111CIDCFGR,RCC resource 111 CID configuration register" hexmask.long.byte 0x3A8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x3A8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x3A8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3A8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x3AC "RCC_R111SEMCR,RCC resource 111 semaphore control register" rbitfld.long 0x3AC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x3AC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x3B0 "RCC_R112CIDCFGR,RCC resource 112 CID configuration register" hexmask.long.byte 0x3B0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x3B0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x3B0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3B0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x3B4 "RCC_R112SEMCR,RCC resource 112 semaphore control register" rbitfld.long 0x3B4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x3B4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x3B8 "RCC_R113CIDCFGR,RCC resource 113 CID configuration register" hexmask.long.byte 0x3B8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x3B8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x3B8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3B8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x3BC "RCC_R113SEMCR,RCC resource 113 semaphore control register" rbitfld.long 0x3BC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x3BC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" group.long 0x400++0x47 line.long 0x0 "RCC_GRSTCSETR,RCC global reset control set register" bitfld.long 0x0 0. "SYSRST,System reset" "B_0x0,B_0x1" line.long 0x4 "RCC_C1RSTCSETR,RCC CPU1 reset control set register" bitfld.long 0x4 0. "C1RST,CPU1 reset" "B_0x0,B_0x1" line.long 0x8 "RCC_C1P1RSTCSETR,RCC CPU1 processor core 1 reset control set register" bitfld.long 0x8 1. "C1P1RST,CPU1 processor core 1 reset" "B_0x0,B_0x1" bitfld.long 0x8 0. "C1P1PORRST,CPU1 processor core 1 power-on reset" "B_0x0,B_0x1" line.long 0xC "RCC_C2RSTCSETR,RCC CPU2 reset control set register" bitfld.long 0xC 0. "C2RST,CPU2 reset" "B_0x0,B_0x1" line.long 0x10 "RCC_HWRSTSCLRR,RCC hardware reset status clear register" bitfld.long 0x10 14. "RETECCFAILRESTRSTF,RETRAM ECC failure reset flag during system restoration phase" "B_0x0,B_0x1" bitfld.long 0x10 13. "RETECCFAILCRCRSTF,RETRAM ECC failure reset flag during the CRC computation phase" "B_0x0,B_0x1" bitfld.long 0x10 12. "RETCRCERRRSTF,RETRAM CRC error reset flag" "B_0x0,B_0x1" bitfld.long 0x10 11. "IWDG5SYSRSTF,IWDG5 system reset flag" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "IWDG4SYSRSTF,IWDG4 system reset flag" "B_0x0,B_0x1" bitfld.long 0x10 9. "IWDG3SYSRSTF,IWDG3 system reset flag" "B_0x0,B_0x1" bitfld.long 0x10 8. "IWDG2SYSRSTF,IWDG2 system reset flag" "B_0x0,B_0x1" bitfld.long 0x10 7. "IWDG1SYSRSTF,IWDG1 system reset flag" "B_0x0,B_0x1" newline bitfld.long 0x10 6. "SYSC2RSTF,CPU2 system reset flag" "B_0x0,B_0x1" bitfld.long 0x10 5. "SYSC1RSTF,CPU1 system reset flag" "B_0x0,B_0x1" bitfld.long 0x10 4. "VCORERSTF,Vless thansub>DDCOREless than/sub> reset flag" "B_0x0,B_0x1" bitfld.long 0x10 3. "HCSSRSTF,HSE CSS reset flag" "B_0x0,B_0x1" newline bitfld.long 0x10 2. "PADRSTF,NRST reset flag" "B_0x0,B_0x1" bitfld.long 0x10 1. "BORRSTF,BOR reset flag" "B_0x0,B_0x1" bitfld.long 0x10 0. "PORRSTF,POR/PDR reset flag" "B_0x0,B_0x1" line.long 0x14 "RCC_C1HWRSTSCLRR,RCC CPU1 hardware reset status clear register" bitfld.long 0x14 2. "C1P1RSTF,CPU1 processor core 1 reset flag" "B_0x0,B_0x1" bitfld.long 0x14 1. "C1RSTF,CPU1 reset flag" "B_0x0,B_0x1" bitfld.long 0x14 0. "VCPURSTF,Vless thansub>DDCPUless than/sub> reset flag" "B_0x0,B_0x1" line.long 0x18 "RCC_C2HWRSTSCLRR,RCC CPU2 hardware reset status clear register" bitfld.long 0x18 0. "C2RSTF,CPU2 reset flag" "B_0x0,B_0x1" line.long 0x1C "RCC_C1BOOTRSTSSETR,RCC CPU1 boot reset status set register" bitfld.long 0x1C 23. "D2STBYRSTF,D2 DStandby reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 22. "D1STBYRSTF,D1 DStandby reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 20. "STBYC1RSTF,CPU1 system Standby reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 19. "RETECCFAILRESTRSTF,RETRAM ECC failure reset flag during system restoration phase" "B_0x0,B_0x1" newline bitfld.long 0x1C 18. "RETECCFAILCRCRSTF,RETRAM ECC failure reset flag during the CRC computation phase" "B_0x0,B_0x1" bitfld.long 0x1C 17. "RETCRCERRRSTF,RETRAM CRC error reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 16. "C1P1RSTF,CPU1 processor core 1 reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 13. "C1RSTF,CPU1 reset flag" "B_0x0,B_0x1" newline bitfld.long 0x1C 12. "IWDG5SYSRSTF,IWDG5 system reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 11. "IWDG4SYSRSTF,IWDG4 system reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 10. "IWDG3SYSRSTF,IWDG3 system reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 9. "IWDG2SYSRSTF,IWDG2 system reset flag" "B_0x0,B_0x1" newline bitfld.long 0x1C 8. "IWDG1SYSRSTF,IWDG1 system reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 7. "SYSC2RSTF,CPU2 system reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SYSC1RSTF,CPU1 system reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 5. "VCPURSTF,Vless thansub>DDCPUless than/sub> reset flag" "B_0x0,B_0x1" newline bitfld.long 0x1C 4. "VCORERSTF,Vless thansub>DDCOREless than/sub> reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 3. "HCSSRSTF,HSE CSS reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PADRSTF,NRST reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 1. "BORRSTF,BOR reset flag" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PORRSTF,POR/PDR reset flag" "B_0x0,B_0x1" line.long 0x20 "RCC_C1BOOTRSTSCLRR,RCC CPU1 boot reset status clear register" bitfld.long 0x20 23. "D2STBYRSTF,D2 DStandby reset flag" "B_0x0,B_0x1" bitfld.long 0x20 22. "D1STBYRSTF,D1 DStandby reset flag" "B_0x0,B_0x1" bitfld.long 0x20 20. "STBYC1RSTF,CPU1 system Standby reset flag" "B_0x0,B_0x1" bitfld.long 0x20 19. "RETECCFAILRESTRSTF,RETRAM ECC failure reset flag during system restoration phase" "B_0x0,B_0x1" newline bitfld.long 0x20 18. "RETECCFAILCRCRSTF,RETRAM ECC failure reset flag during the CRC computation phase" "B_0x0,B_0x1" bitfld.long 0x20 17. "RETCRCERRRSTF,RETRAM CRC error reset flag" "B_0x0,B_0x1" bitfld.long 0x20 16. "C1P1RSTF,CPU1 processor core 1 reset flag" "B_0x0,B_0x1" bitfld.long 0x20 13. "C1RSTF,CPU1 reset flag" "B_0x0,B_0x1" newline bitfld.long 0x20 12. "IWDG5SYSRSTF,IWDG5 system reset flag" "B_0x0,B_0x1" bitfld.long 0x20 11. "IWDG4SYSRSTF,IWDG4 system reset flag" "B_0x0,B_0x1" bitfld.long 0x20 10. "IWDG3SYSRSTF,IWDG3 system reset flag" "B_0x0,B_0x1" bitfld.long 0x20 9. "IWDG2SYSRSTF,IWDG2 system reset flag" "B_0x0,B_0x1" newline bitfld.long 0x20 8. "IWDG1SYSRSTF,IWDG1 system reset flag" "B_0x0,B_0x1" bitfld.long 0x20 7. "SYSC2RSTF,CPU2 system reset flag" "B_0x0,B_0x1" bitfld.long 0x20 6. "SYSC1RSTF,CPU1 system reset flag" "B_0x0,B_0x1" bitfld.long 0x20 5. "VCPURSTF,Vless thansub>DDCPUless than/sub> reset flag" "B_0x0,B_0x1" newline bitfld.long 0x20 4. "VCORERSTF,Vless thansub>DDCOREless than/sub> reset flag" "B_0x0,B_0x1" bitfld.long 0x20 3. "HCSSRSTF,HSE CSS reset flag" "B_0x0,B_0x1" bitfld.long 0x20 2. "PADRSTF,NRST reset flag" "B_0x0,B_0x1" bitfld.long 0x20 1. "BORRSTF,BOR reset flag" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PORRSTF,POR/PDR reset flag" "B_0x0,B_0x1" line.long 0x24 "RCC_C2BOOTRSTSSETR,RCC CPU2 boot reset status set register" bitfld.long 0x24 23. "D2STBYRSTF,D2 DStandby reset flag" "B_0x0,B_0x1" bitfld.long 0x24 21. "STBYC2RSTF,CPU2 system Standby reset flag" "B_0x0,B_0x1" bitfld.long 0x24 19. "RETECCFAILRESTRSTF,RETRAM ECC failure reset flag during system restoration phase" "B_0x0,B_0x1" bitfld.long 0x24 18. "RETECCFAILCRCRSTF,RETRAM ECC failure reset flag during the CRC computation phase" "B_0x0,B_0x1" newline bitfld.long 0x24 17. "RETCRCERRRSTF,RETRAM CRC error reset flag" "B_0x0,B_0x1" bitfld.long 0x24 14. "C2RSTF,CPU2 reset flag" "B_0x0,B_0x1" bitfld.long 0x24 12. "IWDG5SYSRSTF,IWDG5 system reset flag" "B_0x0,B_0x1" bitfld.long 0x24 11. "IWDG4SYSRSTF,IWDG4 system reset flag" "B_0x0,B_0x1" newline bitfld.long 0x24 10. "IWDG3SYSRSTF,IWDG3 system reset flag" "B_0x0,B_0x1" bitfld.long 0x24 9. "IWDG2SYSRSTF,IWDG2 system reset flag" "B_0x0,B_0x1" bitfld.long 0x24 8. "IWDG1SYSRSTF,IWDG1 system reset flag" "B_0x0,B_0x1" bitfld.long 0x24 7. "SYSC2RSTF,CPU2 system reset flag" "B_0x0,B_0x1" newline bitfld.long 0x24 6. "SYSC1RSTF,CPU1 system reset flag" "B_0x0,B_0x1" bitfld.long 0x24 4. "VCORERSTF,Vless thansub>DDCOREless than/sub> reset flag" "B_0x0,B_0x1" bitfld.long 0x24 3. "HCSSRSTF,HSE CSS reset flag" "B_0x0,B_0x1" bitfld.long 0x24 2. "PADRSTF,NRST reset flag" "B_0x0,B_0x1" newline bitfld.long 0x24 1. "BORRSTF,BOR reset flag" "B_0x0,B_0x1" bitfld.long 0x24 0. "PORRSTF,POR/PDR reset flag" "B_0x0,B_0x1" line.long 0x28 "RCC_C2BOOTRSTSCLRR,RCC CPU2 boot reset status clear register" bitfld.long 0x28 23. "D2STBYRSTF,D2 DStandby reset flag" "B_0x0,B_0x1" bitfld.long 0x28 21. "STBYC2RSTF,CPU2 system Standby reset flag" "B_0x0,B_0x1" bitfld.long 0x28 19. "RETECCFAILRESTRSTF,RETRAM ECC failure reset flag during system restoration phase" "B_0x0,B_0x1" bitfld.long 0x28 18. "RETECCFAILCRCRSTF,RETRAM ECC failure reset flag during the CRC computation phase" "B_0x0,B_0x1" newline bitfld.long 0x28 17. "RETCRCERRRSTF,RETRAM CRC error reset flag" "B_0x0,B_0x1" bitfld.long 0x28 14. "C2RSTF,CPU2 reset flag" "B_0x0,B_0x1" bitfld.long 0x28 12. "IWDG5SYSRSTF,IWDG5 reset flag" "B_0x0,B_0x1" bitfld.long 0x28 11. "IWDG4SYSRSTF,IWDG4 reset flag" "B_0x0,B_0x1" newline bitfld.long 0x28 10. "IWDG3SYSRSTF,IWDG3 reset flag" "B_0x0,B_0x1" bitfld.long 0x28 9. "IWDG2SYSRSTF,IWDG2 reset flag" "B_0x0,B_0x1" bitfld.long 0x28 8. "IWDG1SYSRSTF,IWDG1 system reset flag" "B_0x0,B_0x1" bitfld.long 0x28 7. "SYSC2RSTF,CPU2 system reset flag" "B_0x0,B_0x1" newline bitfld.long 0x28 6. "SYSC1RSTF,CPU1 system reset flag" "B_0x0,B_0x1" bitfld.long 0x28 4. "VCORERSTF,Vless thansub>DDCOREless than/sub> reset flag" "B_0x0,B_0x1" bitfld.long 0x28 3. "HCSSRSTF,HSE CSS reset flag" "B_0x0,B_0x1" bitfld.long 0x28 2. "PADRSTF,NRST reset flag" "B_0x0,B_0x1" newline bitfld.long 0x28 1. "BORRSTF,BOR reset flag" "B_0x0,B_0x1" bitfld.long 0x28 0. "PORRSTF,POR/PDR reset flag" "B_0x0,B_0x1" line.long 0x2C "RCC_C1SREQSETR,RCC CPU1 stop request set register" bitfld.long 0x2C 16. "ESLPREQ,Enhanced CSleep request for CPU1 subsystem" "B_0x0,B_0x1" bitfld.long 0x2C 1. "STPREQ_P1,Stop request for CPU1 processor core 1" "B_0x0,B_0x1" bitfld.long 0x2C 0. "STPREQ_P0,Stop request for CPU1 processor core 0" "B_0x0,B_0x1" line.long 0x30 "RCC_C1SREQCLRR,RCC CPU1 stop request clear register" bitfld.long 0x30 16. "ESLPREQ,Enhanced CSleep request for CPU1 subsystem" "B_0x0,B_0x1" bitfld.long 0x30 1. "STPREQ_P1,Stop request for CPU1 processor core 1" "B_0x0,B_0x1" bitfld.long 0x30 0. "STPREQ_P0,Stop request for CPU1 processor core 0" "B_0x0,B_0x1" line.long 0x34 "RCC_CPUBOOTCR,RCC CPU boot control register" bitfld.long 0x34 1. "BOOT_CPU1,CPU1 boot" "B_0x0,B_0x1" bitfld.long 0x34 0. "BOOT_CPU2,CPU2 to boot" "B_0x0,B_0x1" line.long 0x38 "RCC_STBYBOOTCR,RCC standby boot control register" bitfld.long 0x38 8. "RET_CRCERR_RSTEN,RETRAM CRC error system reset enable" "B_0x0,B_0x1" rbitfld.long 0x38 5. "CPU1_HW_BEN,CPU1 hardware boot enable" "B_0x0,B_0x1" rbitfld.long 0x38 4. "CPU2_HW_BEN,CPU2 hardware boot enable" "B_0x0,B_0x1" bitfld.long 0x38 2. "COLD_CPU2,CPU2 cold boot" "B_0x0,B_0x1" newline bitfld.long 0x38 1. "CPU_BEN_SEL,CPU boot select" "B_0x0,B_0x1" line.long 0x3C "RCC_LEGBOOTCR,RCC legacy boot control register" bitfld.long 0x3C 0. "LEGACY_BEN,Enable of the legacy selection mode to choose the first CPU to boot" "B_0x0,B_0x1" line.long 0x40 "RCC_BDCR,RCC backup domain control register" bitfld.long 0x40 31. "VSWRST,Vless thansub>SWless than/sub> domain software reset" "B_0x0,B_0x1" bitfld.long 0x40 25. "C3SYSTICKSEL,CPU3 SysTick clock select" "B_0x0,B_0x1" bitfld.long 0x40 24. "MSIFREQSEL,MSI frequency selection" "B_0x0,B_0x1" bitfld.long 0x40 20. "RTCCKEN,RTC clock enable" "B_0x0,B_0x1" newline bitfld.long 0x40 16.--17. "RTCSRC,RTC clock source selection" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x40 10. "LSIRDY,LSI oscillator ready" "B_0x0,B_0x1" bitfld.long 0x40 9. "LSION,LSI oscillator enabled" "B_0x0,B_0x1" rbitfld.long 0x40 8. "LSECSSD,LSE CSS failure detection" "B_0x0,B_0x1" newline bitfld.long 0x40 7. "LSEGFON,LSE clock glitch filter enable" "B_0x0,B_0x1" bitfld.long 0x40 6. "LSECSSON,LSE CSS enable" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "LSEDRV,LSE oscillator driving capability" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x40 3. "LSEDIGBYP,LSE digital bypass" "B_0x0,B_0x1" newline rbitfld.long 0x40 2. "LSERDY,LSE oscillator ready" "B_0x0,B_0x1" bitfld.long 0x40 1. "LSEBYP,LSE oscillator bypass" "B_0x0,B_0x1" bitfld.long 0x40 0. "LSEON,LSE oscillator enable" "B_0x0,B_0x1" line.long 0x44 "RCC_D3DCR,RCC D3 domain control register" bitfld.long 0x44 16.--17. "D3PERCKSEL,D3 peripheral local bus clock select" "B_0x0,B_0x1,B_0x2,?" rbitfld.long 0x44 2. "MSIRDY,MSI clock ready flag" "B_0x0,B_0x1" bitfld.long 0x44 1. "MSIKERON,Set by software to force the MSI on even in Stop mode in order to be quickly available as kernel clock for some peripherals." "B_0x0,B_0x1" bitfld.long 0x44 0. "MSION,MSI oscillator enable" "B_0x0,B_0x1" rgroup.long 0x448++0x3 line.long 0x0 "RCC_D3DSR,RCC D3 domain status register" bitfld.long 0x0 0.--1. "D3STATE,D3 domain state" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x44C++0x57 line.long 0x0 "RCC_RDCR,RCC reset duration control register" hexmask.long.byte 0x0 24.--27. 1. "EADLY,External access delays" hexmask.long.byte 0x0 16.--20. 1. "MRD,Minimum reset duration" line.long 0x4 "RCC_C1MSRDCR,RCC C1MS reset delay control register" bitfld.long 0x4 8. "C1MSRST,Trigger low-level pulse on NRSTC1MS pin" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "C1MSRD,Minimum Standby reset duration" line.long 0x8 "RCC_PWRLPDLYCR,RCC PWR_LP delay control register" bitfld.long 0x8 24. "CPU2TMPSKP,Skip of PWR_LP delay for CPU2" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--21. 1. "PWRLP_DLY,PWR_LP delay value" line.long 0xC "RCC_C1CIESETR,RCC CPU1 clock source interrupt enable set register" bitfld.long 0xC 20. "WKUPIE,CPU1 wake-up from CStop interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 16. "LSECSSIE,LSE clock security system interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 12. "PLL8RDYIE,PLL8 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 11. "PLL7RDYIE,PLL7 ready interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "PLL6RDYIE,PLL6 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 9. "PLL5RDYIE,PLL5 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "PLL4RDYIE,PLL4 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 7. "PLL3RDYIE,PLL3 ready interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0xC 6. "PLL2RDYIE,PLL2 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 5. "PLL1RDYIE,PLL1 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 4. "MSIRDYIE,MSI ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 3. "HSERDYIE,HSE ready interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0xC 2. "HSIRDYIE,HSI ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 1. "LSERDYIE,LSE ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "LSIRDYIE,LSI ready interrupt enable" "B_0x0,B_0x1" line.long 0x10 "RCC_C1CIFCLRR,RCC CPU1 clock source interrupt flag clear register" bitfld.long 0x10 20. "WKUPF,CPU1 wake-up from CStop interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 16. "LSECSSF,LSE CSS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 12. "PLL8RDYF,PLL8 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 11. "PLL7RDYF,PLL7 ready interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "PLL6RDYF,PLL6 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 9. "PLL5RDYF,PLL5 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 8. "PLL4RDYF,PLL4 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 7. "PLL3RDYF,PLL3 ready interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x10 6. "PLL2RDYF,PLL2 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 5. "PLL1RDYF,PLL1 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 4. "MSIRDYF,MSI ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 3. "HSERDYF,HSE ready interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x10 2. "HSIRDYF,HSI ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 1. "LSERDYF,LSE ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 0. "LSIRDYF,LSI ready interrupt flag" "B_0x0,B_0x1" line.long 0x14 "RCC_C2CIESETR,RCC CPU2 clock source interrupt enable set register" bitfld.long 0x14 20. "WKUPIE,CPU2 wake-up from CStop Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x14 16. "LSECSSIE,LSE CSS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "PLL8RDYIE,PLL8 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 11. "PLL7RDYIE,PLL7 ready interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "PLL6RDYIE,PLL6 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 9. "PLL5RDYIE,PLL5 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 8. "PLL4RDYIE,PLL4 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 7. "PLL3RDYIE,PLL3 ready interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x14 6. "PLL2RDYIE,PLL2 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 5. "PLL1RDYIE,PLL1 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 4. "MSIRDYIE,MSI ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 3. "HSERDYIE,HSE ready interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x14 2. "HSIRDYIE,HSI ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 1. "LSERDYIE,LSE ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "LSIRDYIE,LSI ready interrupt enable" "B_0x0,B_0x1" line.long 0x18 "RCC_C2CIFCLRR,RCC CPU2 clock source interrupt flag clear register" bitfld.long 0x18 20. "WKUPF,CPU2 wake-up from CStop interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 16. "LSECSSF,LSE clock security system interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 12. "PLL8RDYF,PLL8 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 11. "PLL7RDYF,PLL7 ready interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x18 10. "PLL6RDYF,PLL6 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 9. "PLL5RDYF,PLL5 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 8. "PLL4RDYF,PLL4 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 7. "PLL3RDYF,PLL3 ready interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x18 6. "PLL2RDYF,PLL2 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 5. "PLL1RDYF,PLL1 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 4. "MSIRDYF,MSI ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 3. "HSERDYF,HSE ready interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x18 2. "HSIRDYF,HSI ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 1. "LSERDYF,LSE ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 0. "LSIRDYF,LSI ready interrupt flag" "B_0x0,B_0x1" line.long 0x1C "RCC_IWDGC1FZSETR,RCC IWDG CPU1 clock freeze set register" bitfld.long 0x1C 1. "FZ_IWDG2,Freeze of IWDG2 clock" "B_0x0,B_0x1" bitfld.long 0x1C 0. "FZ_IWDG1,Freeze of IWDG1 clock" "B_0x0,B_0x1" line.long 0x20 "RCC_IWDGC1FZCLRR,RCC IWDG CPU1 clock freeze clear register" bitfld.long 0x20 1. "FZ_IWDG2,Unfreeze IWDG2 clock" "B_0x0,B_0x1" bitfld.long 0x20 0. "FZ_IWDG1,Unfreeze IWDG1 clock" "B_0x0,B_0x1" line.long 0x24 "RCC_IWDGC1CFGSETR,RCC IWDG CPU1 configuration set register" bitfld.long 0x24 18. "IWDG2_KERRST,IWDG2 kernel reset" "B_0x0,B_0x1" bitfld.long 0x24 2. "IWDG2_SYSRSTEN,Enable of IWDG2 timeout event to reset the application" "B_0x0,B_0x1" bitfld.long 0x24 0. "IWDG1_SYSRSTEN,Enable of IWDG1 timeout event to reset the application" "B_0x0,B_0x1" line.long 0x28 "RCC_IWDGC1CFGCLRR,RCC IWDG CPU1 configuration clear register" bitfld.long 0x28 18. "IWDG2_KERRST,IWDG2 kernel reset" "B_0x0,B_0x1" bitfld.long 0x28 2. "IWDG2_SYSRSTEN,Clear of IWDG2 timeout event to reset the application" "B_0x0,B_0x1" bitfld.long 0x28 0. "IWDG1_SYSRSTEN,Clear of IWDG1 timeout event to reset the application" "B_0x0,B_0x1" line.long 0x2C "RCC_IWDGC2FZSETR,RCC IWDG CPU2 clock freeze set register" bitfld.long 0x2C 1. "FZ_IWDG4,Freeze of IWDG4 clock" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FZ_IWDG3,Freeze of IWDG3 clock" "B_0x0,B_0x1" line.long 0x30 "RCC_IWDGC2FZCLRR,RCC IWDG CPU2 clock freeze clear register" bitfld.long 0x30 1. "FZ_IWDG4,Unfreeze of IWDG4 clock" "B_0x0,B_0x1" bitfld.long 0x30 0. "FZ_IWDG3,Unfreeze of IWDG3 clock" "B_0x0,B_0x1" line.long 0x34 "RCC_IWDGC2CFGSETR,RCC IWDG CPU2 configuration set register" bitfld.long 0x34 18. "IWDG4_KERRST,IWDG4 kernel reset" "B_0x0,B_0x1" bitfld.long 0x34 2. "IWDG4_SYSRSTEN,Enable of IWDG4 timeout event to reset the application" "B_0x0,B_0x1" bitfld.long 0x34 0. "IWDG3_SYSRSTEN,Enable of IWDG3 timeout event to reset the application" "B_0x0,B_0x1" line.long 0x38 "RCC_IWDGC2CFGCLRR,RCC IWDG CPU2 configuration clear register" bitfld.long 0x38 18. "IWDG4_KERRST,IWDG4 kernel reset" "B_0x0,B_0x1" bitfld.long 0x38 2. "IWDG4_SYSRSTEN,Clear of IWDG4 timeout event to reset the application" "B_0x0,B_0x1" bitfld.long 0x38 0. "IWDG3_SYSRSTEN,Clear of IWDG3 timeout event to reset the application" "B_0x0,B_0x1" line.long 0x3C "RCC_IWDGC3CFGSETR,RCC IWDG CPU3 configuration set register" bitfld.long 0x3C 0. "IWDG5_SYSRSTEN,Enable of IWDG5 timeout event to reset the application" "B_0x0,B_0x1" line.long 0x40 "RCC_IWDGC3CFGCLRR,RCC IWDG CPU3 configuration clear register" bitfld.long 0x40 0. "IWDG5_SYSRSTEN,Clear of IWDG5 timeout event to reset the application" "B_0x0,B_0x1" line.long 0x44 "RCC_C3CFGR,RCC CPU3 configuration register" bitfld.long 0x44 27. "I3C4C3EN,I3C4 allocation to CPU3 enable" "B_0x0,B_0x1" bitfld.long 0x44 26. "RTCC3EN,RTC allocation to CPU3 enable" "B_0x0,B_0x1" bitfld.long 0x44 25. "LPDMAC3EN,LPDMA1 allocation to CPU3 enable" "B_0x0,B_0x1" bitfld.long 0x44 24. "GPIOZC3EN,GPIOZ allocation to CPU3 enable" "B_0x0,B_0x1" newline bitfld.long 0x44 23. "ADF1C3EN,ADF1 allocation to CPU3 enable" "B_0x0,B_0x1" bitfld.long 0x44 21. "I2C8C3EN,I2C8 allocation to CPU3 enable" "B_0x0,B_0x1" bitfld.long 0x44 20. "LPUART1C3EN,LPUART1 allocation to CPU3 enable" "B_0x0,B_0x1" bitfld.long 0x44 19. "SPI8C3EN,SPI8 allocation to CPU3 enable" "B_0x0,B_0x1" newline bitfld.long 0x44 18. "LPTIM5C3EN,LPTIM5 allocation to CPU3 enable" "B_0x0,B_0x1" bitfld.long 0x44 17. "LPTIM4C3EN,LPTIM4 allocation to CPU3 enable" "B_0x0,B_0x1" bitfld.long 0x44 16. "LPTIM3C3EN,LPTIM3 allocation to CPU3 enable" "B_0x0,B_0x1" bitfld.long 0x44 3. "C3AMEN,CPU3 autonomous clock mode enable" "B_0x0,B_0x1" newline bitfld.long 0x44 2. "C3LPEN,CPU3 peripheral clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x44 1. "C3EN,CPU3 peripheral clocks enable" "B_0x0,B_0x1" bitfld.long 0x44 0. "C3RST,CPU3 reset" "B_0x0,B_0x1" line.long 0x48 "RCC_MCO1CFGR,RCC MCO1 configuration register" bitfld.long 0x48 8. "MCO1ON,Control of MCO1 output" "B_0x0,B_0x1" bitfld.long 0x48 0. "MCO1SEL,MCO1 clock output selection" "B_0x0,B_0x1" line.long 0x4C "RCC_MCO2CFGR,RCC MCO2 configuration register" bitfld.long 0x4C 8. "MCO2ON,Control of the MCO2 output" "B_0x0,B_0x1" bitfld.long 0x4C 0. "MCO2SEL,MCO2 clock output selection" "B_0x0,B_0x1" line.long 0x50 "RCC_OCENSETR,RCC oscillator clock enable set register" bitfld.long 0x50 11. "HSECSSON,HSECSSON bit set" "B_0x0,B_0x1" bitfld.long 0x50 10. "HSEBYP,HSEBYP bit set" "B_0x0,B_0x1" bitfld.long 0x50 9. "HSEKERON,HSEKERON bit set" "B_0x0,B_0x1" bitfld.long 0x50 8. "HSEON,HSEON bit set" "B_0x0,B_0x1" newline bitfld.long 0x50 7. "HSEDIGBYP,HSEDIGBYP bit set" "B_0x0,B_0x1" bitfld.long 0x50 6. "HSEDIV2BYP,HSEDIV2BYP bit set" "B_0x0,B_0x1" bitfld.long 0x50 5. "HSEDIV2ON,HSEDIV2ON bit set" "B_0x0,B_0x1" bitfld.long 0x50 1. "HSIKERON,HSIKERON bit set" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "HSION,HSION bit set" "B_0x0,B_0x1" line.long 0x54 "RCC_OCENCLRR,RCC oscillator clock enable clear register" bitfld.long 0x54 10. "HSEBYP,HSEBYP bit clear" "B_0x0,B_0x1" bitfld.long 0x54 9. "HSEKERON,HSEKERON bit clear" "B_0x0,B_0x1" bitfld.long 0x54 8. "HSEON,HSEON bit clear" "B_0x0,B_0x1" bitfld.long 0x54 7. "HSEDIGBYP,HSEDIGBYP bit clear" "B_0x0,B_0x1" newline bitfld.long 0x54 6. "HSEDIV2BYP,HSEDIV2BYP bit clear" "B_0x0,B_0x1" bitfld.long 0x54 5. "HSEDIV2ON,HSEDIV2ON bit clear" "B_0x0,B_0x1" bitfld.long 0x54 1. "HSIKERON,HSIKERON bit clear" "B_0x0,B_0x1" bitfld.long 0x54 0. "HSION,HSION bit clear" "B_0x0,B_0x1" rgroup.long 0x4A4++0x3 line.long 0x0 "RCC_OCRDYR,RCC oscillator clock ready register" bitfld.long 0x0 25. "CKREST,Clock restore state machine status" "B_0x0,B_0x1" bitfld.long 0x0 8. "HSERDY,HSE clock ready flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "HSIRDY,HSI clock ready flag" "B_0x0,B_0x1" group.long 0x4A8++0x43 line.long 0x0 "RCC_HSICFGR,RCC HSI configuration register" hexmask.long.word 0x0 16.--24. 1. "HSICAL,HSI clock calibration" hexmask.long.byte 0x0 8.--14. 1. "HSITRIM,HSI clock trimming" line.long 0x4 "RCC_MSICFGR,RCC MSI configuration register" hexmask.long.byte 0x4 16.--23. 1. "MSICAL,MSI clock calibration" hexmask.long.byte 0x4 8.--12. 1. "MSITRIM,MSI clock trimming" line.long 0x8 "RCC_RTCDIVR,RCC RTC clock divider register" hexmask.long.byte 0x8 0.--5. 1. "RTCDIV,HSE division factor for RTC clock" line.long 0xC "RCC_APB1DIVR,RCC APB1 clock divider register" rbitfld.long 0xC 31. "APB1DIVRDY,APB1 clock prescaler status" "B_0x0,B_0x1" bitfld.long 0xC 0.--2. "APB1DIV,APB1 clock divider" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x10 "RCC_APB2DIVR,RCC APB2 clock divider register" rbitfld.long 0x10 31. "APB2DIVRDY,APB2 clock prescaler status" "B_0x0,B_0x1" bitfld.long 0x10 0.--2. "APB2DIV,APB2 clock divider" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x14 "RCC_APB3DIVR,RCC APB3 clock divider register" rbitfld.long 0x14 31. "APB3DIVRDY,APB3 clock prescaler status" "B_0x0,B_0x1" bitfld.long 0x14 0.--2. "APB3DIV,APB3 clock divider" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x18 "RCC_APB4DIVR,RCC APB4 clock divider register" rbitfld.long 0x18 31. "APB4DIVRDY,APB4 clock divider status" "B_0x0,B_0x1" bitfld.long 0x18 0.--2. "APB4DIV,APB4 clock divider" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x1C "RCC_APBDBGDIVR,RCC APBDBG clock divider register" rbitfld.long 0x1C 31. "APBDBGDIVRDY,APBDBG clock divider status" "B_0x0,B_0x1" bitfld.long 0x1C 0.--2. "APBDBGDIV,APBDBG clock divider" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x20 "RCC_TIMG1PRER,RCC TIM group 1 prescaler register" rbitfld.long 0x20 31. "TIMG1PRERDY,Clock prescaler status for timers of group 1" "B_0x0,B_0x1" bitfld.long 0x20 0. "TIMG1PRE,Clock prescaler selection for timers of group 1" "B_0x0,B_0x1" line.long 0x24 "RCC_TIMG2PRER,RCC TIM group 2 prescaler register" rbitfld.long 0x24 31. "TIMG2PRERDY,Clock prescaler status for timers of group 2" "B_0x0,B_0x1" bitfld.long 0x24 0. "TIMG2PRE,Clock prescaler selection for timers of group 2" "B_0x0,B_0x1" line.long 0x28 "RCC_LSMCUDIVR,RCC LSMCU clock divider register" rbitfld.long 0x28 31. "LSMCUDIVRDY,LSMCU clock divider status" "B_0x0,B_0x1" bitfld.long 0x28 0. "LSMCUDIV,LSMCU clock divider" "B_0x0,B_0x1" line.long 0x2C "RCC_DDRCPCFGR,RCC DDRC AXI port configuration register" bitfld.long 0x2C 2. "DDRCPLPEN,DDRC AXI port clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DDRCPEN,DDRC AXI port clock enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "DDRCPRST,DDRC AXI port reset" "B_0x0,B_0x1" line.long 0x30 "RCC_DDRCAPBCFGR,RCC DDRC APB configuration register" bitfld.long 0x30 2. "DDRCAPBLPEN,DDRC APB clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x30 1. "DDRCAPBEN,DDRC APB clock enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "DDRCAPBRST,DDRC APB reset" "B_0x0,B_0x1" line.long 0x34 "RCC_DDRPHYCAPBCFGR,RCC DDRPHYC APB configuration register" bitfld.long 0x34 2. "DDRPHYCAPBLPEN,DDRPHYC APB clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x34 1. "DDRPHYCAPBEN,DDRPHYC APB clock enable" "B_0x0,B_0x1" bitfld.long 0x34 0. "DDRPHYCAPBRST,DDRPHYC APB reset" "B_0x0,B_0x1" line.long 0x38 "RCC_DDRPHYCCFGR,RCC DDRPHYC configuration register" bitfld.long 0x38 1. "DDRPHYCEN,DDRPHYC kernel clock enable" "B_0x0,B_0x1" line.long 0x3C "RCC_DDRCFGR,RCC DDR configuration register" bitfld.long 0x3C 2. "DDRCFGLPEN,DDR APB configuration clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x3C 1. "DDRCFGEN,DDR APB configuration clock enable" "B_0x0,B_0x1" bitfld.long 0x3C 0. "DDRCFGRST,DDR APB configuration reset" "B_0x0,B_0x1" line.long 0x40 "RCC_DDRITFCFGR,RCC DDR interface configuration register" bitfld.long 0x40 16. "DDRPHYDLP,DDRPHY deep low-power mode (LP2 or LP3)" "B_0x0,B_0x1" bitfld.long 0x40 8. "DDRSHR,DDR peripheral mode" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "DDRCKMOD,RCC mode for DDR clock control" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x40 0. "DDRRST,DDR core and PHY reset" "B_0x0,B_0x1" group.long 0x4F0++0x3B line.long 0x0 "RCC_SYSRAMCFGR,RCC SYSRAM configuration register" bitfld.long 0x0 2. "SYSRAMLPEN,SYSRAM clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "SYSRAMEN,SYSRAM clock enable" "B_0x0,B_0x1" line.long 0x4 "RCC_VDERAMCFGR,RCC VDERAM configuration register" bitfld.long 0x4 2. "VDERAMLPEN,VDERAM clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "VDERAMEN,VDERAM clock enable" "B_0x0,B_0x1" line.long 0x8 "RCC_SRAM1CFGR,RCC SRAM1 configuration register" bitfld.long 0x8 2. "SRAM1LPEN,SRAM1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "SRAM1EN,SRAM1 clock enable" "B_0x0,B_0x1" line.long 0xC "RCC_SRAM2CFGR,RCC SRAM2 configuration register" bitfld.long 0xC 2. "SRAM2LPEN,SRAM2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC 1. "SRAM2EN,SRAM2 clock enable" "B_0x0,B_0x1" line.long 0x10 "RCC_RETRAMCFGR,RCC RETRAM configuration register" bitfld.long 0x10 2. "RETRAMLPEN,RETRAM clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x10 1. "RETRAMEN,RETRAM clock enable" "B_0x0,B_0x1" line.long 0x14 "RCC_BKPSRAMCFGR,RCC BKPSRAM configuration register" bitfld.long 0x14 2. "BKPSRAMLPEN,BKPSRAM clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x14 1. "BKPSRAMEN,BKPSRAM clock enable" "B_0x0,B_0x1" line.long 0x18 "RCC_LPSRAM1CFGR,RCC LPSRAM1 configuration register" bitfld.long 0x18 3. "LPSRAM1AMEN,LPSRAM1 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x18 2. "LPSRAM1LPEN,LPSRAM1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x18 1. "LPSRAM1EN,LPSRAM1 clock enable" "B_0x0,B_0x1" line.long 0x1C "RCC_LPSRAM2CFGR,RCC LPSRAM2 configuration register" bitfld.long 0x1C 3. "LPSRAM2AMEN,LPSRAM2 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x1C 2. "LPSRAM2LPEN,LPSRAM2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x1C 1. "LPSRAM2EN,LPSRAM2 clock enable" "B_0x0,B_0x1" line.long 0x20 "RCC_LPSRAM3CFGR,RCC LPSRAM3 configuration register" bitfld.long 0x20 3. "LPSRAM3AMEN,LPSRAM3 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x20 2. "LPSRAM3LPEN,LPSRAM3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x20 1. "LPSRAM3EN,LPSRAM3 clock enable" "B_0x0,B_0x1" line.long 0x24 "RCC_OSPI1CFGR,RCC OCTOSPI1 configuration register" bitfld.long 0x24 16. "OSPI1DLLRST,OCTOSPI1 DLL reset" "B_0x0,B_0x1" bitfld.long 0x24 8. "OTFDEC1RST,OTFDEC1 reset" "B_0x0,B_0x1" bitfld.long 0x24 2. "OSPI1LPEN,OCTOSPI1 OTFDEC1 and OCTOSPI1 delay (DLYBOSPI1) clock enable duringCSleep" "B_0x0,B_0x1" bitfld.long 0x24 1. "OSPI1EN,OCTOSPI1 and OTFDEC1 clock enable" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "OSPI1RST,OCTOSPI1 reset" "B_0x0,B_0x1" line.long 0x28 "RCC_OSPI2CFGR,RCC OCTOSPI2 configuration register" bitfld.long 0x28 16. "OSPI2DLLRST,OCTOSPI2 DLL reset" "B_0x0,B_0x1" bitfld.long 0x28 8. "OTFDEC2RST,OTFDEC2 reset" "B_0x0,B_0x1" bitfld.long 0x28 2. "OSPI2LPEN,OCTOSPI2 and OTFDEC2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x28 1. "OSPI2EN,OCTOSPI2 and OTFDEC2 clock enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "OSPI2RST,OCTOSPI2 reset" "B_0x0,B_0x1" line.long 0x2C "RCC_FMCCFGR,RCC FMC configuration register" bitfld.long 0x2C 2. "FMCLPEN,FMC clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x2C 1. "FMCEN,FMC clock enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FMCRST,FMC reset" "B_0x0,B_0x1" line.long 0x30 "RCC_DBGCFGR,RCC debug configuration register" bitfld.long 0x30 12. "DBGRST,Debug function reset" "B_0x0,B_0x1" bitfld.long 0x30 9. "TRACEEN,Clock enable for trace port interface" "B_0x0,B_0x1" bitfld.long 0x30 8. "DBGEN,Debug function clock enable" "B_0x0,B_0x1" line.long 0x34 "RCC_STMCFGR,RCC STM configuration register" bitfld.long 0x34 2. "STMLPEN,STM clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x34 1. "STMEN,STM clock enable" "B_0x0,B_0x1" line.long 0x38 "RCC_ETRCFGR,RCC ETR configuration register" bitfld.long 0x38 2. "ETRLPEN,ETR clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x38 1. "ETREN,ETR clocks enable" "B_0x0,B_0x1" group.long 0x558++0x23 line.long 0x0 "RCC_GPIOZCFGR,RCC GPIOZ configuration register" bitfld.long 0x0 3. "GPIOZAMEN,GPIOZ autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "GPIOZLPEN,GPIOZ clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "GPIOZEN,GPIOZ clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "GPIOZRST,GPIOZ reset" "B_0x0,B_0x1" line.long 0x4 "RCC_HPDMA1CFGR,RCC HPDMA1 configuration register" bitfld.long 0x4 2. "HPDMA1LPEN,HPDMA1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "HPDMA1EN,HPDMA1 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "HPDMA1RST,HPDMA1 reset" "B_0x0,B_0x1" line.long 0x8 "RCC_HPDMA2CFGR,RCC HPDMA2 configuration register" bitfld.long 0x8 2. "HPDMA2LPEN,HPDMA2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "HPDMA2EN,HPDMA2 clock enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "HPDMA2RST,HPDMA2 reset" "B_0x0,B_0x1" line.long 0xC "RCC_HPDMA3CFGR,RCC HPDMA3 configuration register" bitfld.long 0xC 2. "HPDMA3LPEN,HPDMA3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC 1. "HPDMA3EN,HPDMA3 clock enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "HPDMA3RST,HPDMA3 reset" "B_0x0,B_0x1" line.long 0x10 "RCC_LPDMACFGR,RCC LPDMA1 configuration register" bitfld.long 0x10 3. "LPDMAAMEN,LPDMA1 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "LPDMALPEN,LPDMA1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x10 1. "LPDMAEN,LPDMA1 clock enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "LPDMARST,LPDMA1 reset" "B_0x0,B_0x1" line.long 0x14 "RCC_HSEMCFGR,RCC HSEM configuration register" bitfld.long 0x14 3. "HSEMAMEN,HSEM autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x14 2. "HSEMLPEN,HSEM clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x14 1. "HSEMEN,HSEM clock enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "HSEMRST,HSEM reset" "B_0x0,B_0x1" line.long 0x18 "RCC_IPCC1CFGR,RCC IPCC1 configuration register" bitfld.long 0x18 2. "IPCC1LPEN,IPCC1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x18 1. "IPCC1EN,IPCC1 clock enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "IPCC1RST,IPCC1 reset" "B_0x0,B_0x1" line.long 0x1C "RCC_IPCC2CFGR,RCC IPCC2 configuration register" bitfld.long 0x1C 3. "IPCC2AMEN,IPCC2 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x1C 2. "IPCC2LPEN,IPCC2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x1C 1. "IPCC2EN,IPCC2 clock enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "IPCC2RST,IPCC2 reset" "B_0x0,B_0x1" line.long 0x20 "RCC_RTCCFGR,RCC RTC configuration register" bitfld.long 0x20 3. "RTCAMEN,RTC autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x20 2. "RTCLPEN,RTC bus clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x20 1. "RTCEN,RTC bus clock enable" "B_0x0,B_0x1" group.long 0x580++0x7 line.long 0x0 "RCC_SYSCPU1CFGR,RCC SYSCPU1 configuration register" bitfld.long 0x0 2. "SYSCPU1LPEN,CPU1 system configuration clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "SYSCPU1EN,CPU1 system configuration clock enable" "B_0x0,B_0x1" line.long 0x4 "RCC_BSECCFGR,RCC BSEC configuration register" bitfld.long 0x4 2. "BSECLPEN,BSEC clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "BSECEN,BSEC clock enable" "B_0x0,B_0x1" group.long 0x590++0x13 line.long 0x0 "RCC_PLL2CFGR1,RCC PLL2 configuration register 1" bitfld.long 0x0 28. "CKREFST,PLLx reference clock state" "B_0x0,B_0x1" rbitfld.long 0x0 24. "PLLRDY,PLLx clock ready flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "PLLEN,PLLx enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SSMODRST,PLLx spread-spectrum modulator reset" "B_0x0,B_0x1" line.long 0x4 "RCC_PLL2CFGR2,RCC PLL2 configuration register 2" hexmask.long.word 0x4 16.--27. 1. "FBDIV,PLLx VCO multiplication factor" hexmask.long.byte 0x4 0.--5. 1. "FREFDIV,PLLx reference input clock divide frequency ratio" line.long 0x8 "RCC_PLL2CFGR3,RCC PLL2 configuration register 3" bitfld.long 0x8 26. "SSCGDIS,PLLx spread-spectrum modulator enable" "B_0x0,B_0x1" bitfld.long 0x8 25. "DACEN,PLLx noise canceling DAC enable in fractional mode" "B_0x0,B_0x1" bitfld.long 0x8 24. "DOWNSPREAD,PLLx VCO frequency modulation mode" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--23. 1. "FRACIN,Fractional part of PLLx VCO multiplication factor" line.long 0xC "RCC_PLL2CFGR4,RCC PLL2 configuration register 4" bitfld.long 0xC 10. "BYPASS,PLLx FOUTPOSTDIV bypass" "B_0x0,B_0x1" bitfld.long 0xC 9. "FOUTPOSTDIVEN,PLLx output and post divider enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "DSMEN,PLLx delta-sigma modulator enable" "B_0x0,B_0x1" line.long 0x10 "RCC_PLL2CFGR5,RCC PLL2 configuration register 5" hexmask.long.byte 0x10 16.--20. 1. "SPREAD,Modulation depth adjustment for PLLx" hexmask.long.byte 0x10 0.--3. 1. "DIVVAL,Modulation frequency adjustment for PLLx" group.long 0x5A8++0x7 line.long 0x0 "RCC_PLL2CFGR6,RCC PLL2 configuration register 6" bitfld.long 0x0 0.--2. "POSTDIV1,PLLx VCO frequency divide level 1" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" line.long 0x4 "RCC_PLL2CFGR7,RCC PLL2 configuration register 7" bitfld.long 0x4 0.--2. "POSTDIV2,PLLx VCO frequency divide level 2" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" group.long 0x5B8++0x13 line.long 0x0 "RCC_PLL3CFGR1,RCC PLL3 configuration register 1" bitfld.long 0x0 28. "CKREFST,PLLx reference clock state" "B_0x0,B_0x1" rbitfld.long 0x0 24. "PLLRDY,PLLx clock ready flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "PLLEN,PLLx enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SSMODRST,PLLx spread-spectrum modulator reset" "B_0x0,B_0x1" line.long 0x4 "RCC_PLL3CFGR2,RCC PLL3 configuration register 2" hexmask.long.word 0x4 16.--27. 1. "FBDIV,PLLx VCO multiplication factor" hexmask.long.byte 0x4 0.--5. 1. "FREFDIV,PLLx reference input clock divide frequency ratio" line.long 0x8 "RCC_PLL3CFGR3,RCC PLL3 configuration register 3" bitfld.long 0x8 26. "SSCGDIS,PLLx spread-spectrum modulator enable" "B_0x0,B_0x1" bitfld.long 0x8 25. "DACEN,PLLx noise canceling DAC enable in fractional mode" "B_0x0,B_0x1" bitfld.long 0x8 24. "DOWNSPREAD,PLLx VCO frequency modulation mode" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--23. 1. "FRACIN,Fractional part of PLLx VCO multiplication factor" line.long 0xC "RCC_PLL3CFGR4,RCC PLL3 configuration register 4" bitfld.long 0xC 10. "BYPASS,PLLx FOUTPOSTDIV bypass" "B_0x0,B_0x1" bitfld.long 0xC 9. "FOUTPOSTDIVEN,PLLx output and post divider enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "DSMEN,PLLx delta-sigma modulator enable" "B_0x0,B_0x1" line.long 0x10 "RCC_PLL3CFGR5,RCC PLL3 configuration register 5" hexmask.long.byte 0x10 16.--20. 1. "SPREAD,Modulation depth adjustment for PLLx" hexmask.long.byte 0x10 0.--3. 1. "DIVVAL,Modulation frequency adjustment for PLLx" group.long 0x5D0++0x7 line.long 0x0 "RCC_PLL3CFGR6,RCC PLL3 configuration register 6" bitfld.long 0x0 0.--2. "POSTDIV1,PLLx VCO frequency divide level 1" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" line.long 0x4 "RCC_PLL3CFGR7,RCC PLL3 configuration register 7" bitfld.long 0x4 0.--2. "POSTDIV2,PLLx VCO frequency divide level 2" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" group.long 0x5E0++0x3 line.long 0x0 "RCC_HSIFMONCR,RCC HSI frequency monitoring control register" bitfld.long 0x0 31. "HSIMONF,HSI clock period monitor interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 30. "HSIMONIE,HSI clock period monitor interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--21. 1. "HSIDEV,HSI clock count deviation value" bitfld.long 0x0 15. "HSIMONEN,HSI clock period monitor enable" "B_0x0,B_0x1" newline hexmask.long.word 0x0 0.--10. 1. "HSIREF,HSI clock count reference value" rgroup.long 0x5E4++0x3 line.long 0x0 "RCC_HSIFVALR,RCC HSI frequency value register" hexmask.long.word 0x0 0.--10. 1. "HSIVAL,HSI clock-cycle counter value" group.long 0x700++0xD3 line.long 0x0 "RCC_TIM1CFGR,RCC TIM1 configuration register" bitfld.long 0x0 2. "TIM1LPEN,TIM1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "TIM1EN,TIM1 clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "TIM1RST,TIM1 reset" "B_0x0,B_0x1" line.long 0x4 "RCC_TIM2CFGR,RCC TIM2 configuration register" bitfld.long 0x4 2. "TIM2LPEN,TIM2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "TIM2EN,TIM2 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "TIM2RST,TIM2 reset" "B_0x0,B_0x1" line.long 0x8 "RCC_TIM3CFGR,RCC TIM3 configuration register" bitfld.long 0x8 2. "TIM3LPEN,TIM3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "TIM3EN,TIM3 clock enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "TIM3RST,TIM3 reset" "B_0x0,B_0x1" line.long 0xC "RCC_TIM4CFGR,RCC TIM4 configuration register" bitfld.long 0xC 2. "TIM4LPEN,TIM4 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC 1. "TIM4EN,TIM4 clock enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "TIM4RST,TIM4 reset" "B_0x0,B_0x1" line.long 0x10 "RCC_TIM5CFGR,RCC TIM5 configuration register" bitfld.long 0x10 2. "TIM5LPEN,TIM5 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x10 1. "TIM5EN,TIM5 clock enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "TIM5RST,TIM5 reset" "B_0x0,B_0x1" line.long 0x14 "RCC_TIM6CFGR,RCC TIM6 configuration register" bitfld.long 0x14 2. "TIM6LPEN,TIM6 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x14 1. "TIM6EN,TIM6 clock enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "TIM6RST,TIM6 reset" "B_0x0,B_0x1" line.long 0x18 "RCC_TIM7CFGR,RCC TIM7 configuration register" bitfld.long 0x18 2. "TIM7LPEN,TIM7 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x18 1. "TIM7EN,TIM7 clock enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "TIM7RST,TIM7 reset" "B_0x0,B_0x1" line.long 0x1C "RCC_TIM8CFGR,RCC TIM8 configuration register" bitfld.long 0x1C 2. "TIM8LPEN,TIM8 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x1C 1. "TIM8EN,TIM8 clock enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "TIM8RST,TIM8 reset" "B_0x0,B_0x1" line.long 0x20 "RCC_TIM10CFGR,RCC TIM10 configuration register" bitfld.long 0x20 2. "TIM10LPEN,TIM10 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x20 1. "TIM10EN,TIM10 clock enable" "B_0x0,B_0x1" bitfld.long 0x20 0. "TIM10RST,TIM10 reset" "B_0x0,B_0x1" line.long 0x24 "RCC_TIM11CFGR,RCC TIM11 configuration register" bitfld.long 0x24 2. "TIM11LPEN,TIM11 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x24 1. "TIM11EN,TIM11 clock enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "TIM11RST,TIM11 reset" "B_0x0,B_0x1" line.long 0x28 "RCC_TIM12CFGR,RCC TIM12 configuration register" bitfld.long 0x28 2. "TIM12LPEN,TIM12 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x28 1. "TIM12EN,TIM12 clock enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "TIM12RST,TIM12 reset" "B_0x0,B_0x1" line.long 0x2C "RCC_TIM13CFGR,RCC TIM13 configuration register" bitfld.long 0x2C 2. "TIM13LPEN,TIM13 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x2C 1. "TIM13EN,TIM13 clock enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "TIM13RST,TIM13 reset" "B_0x0,B_0x1" line.long 0x30 "RCC_TIM14CFGR,RCC TIM14 configuration register" bitfld.long 0x30 2. "TIM14LPEN,TIM14 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x30 1. "TIM14EN,TIM14 clock enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "TIM14RST,TIM14 reset" "B_0x0,B_0x1" line.long 0x34 "RCC_TIM15CFGR,RCC TIM15 configuration register" bitfld.long 0x34 2. "TIM15LPEN,TIM15 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x34 1. "TIM15EN,TIM15 clock enable" "B_0x0,B_0x1" bitfld.long 0x34 0. "TIM15RST,TIM15 reset" "B_0x0,B_0x1" line.long 0x38 "RCC_TIM16CFGR,RCC TIM16 configuration register" bitfld.long 0x38 2. "TIM16LPEN,TIM16 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x38 1. "TIM16EN,TIM16 clock enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "TIM16RST,TIM16 reset" "B_0x0,B_0x1" line.long 0x3C "RCC_TIM17CFGR,RCC TIM17 configuration register" bitfld.long 0x3C 2. "TIM17LPEN,TIM17 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x3C 1. "TIM17EN,TIM17 clock enable" "B_0x0,B_0x1" bitfld.long 0x3C 0. "TIM17RST,TIM17 reset" "B_0x0,B_0x1" line.long 0x40 "RCC_TIM20CFGR,RCC TIM20 configuration register" bitfld.long 0x40 2. "TIM20LPEN,TIM20 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x40 1. "TIM20EN,TIM20 clock enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "TIM20RST,TIM20 reset" "B_0x0,B_0x1" line.long 0x44 "RCC_LPTIM1CFGR,RCC LPTIM1 configuration register" bitfld.long 0x44 2. "LPTIM1LPEN,LPTIM1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x44 1. "LPTIM1EN,LPTIM1 clock enable" "B_0x0,B_0x1" bitfld.long 0x44 0. "LPTIM1RST,LPTIM1 reset" "B_0x0,B_0x1" line.long 0x48 "RCC_LPTIM2CFGR,RCC LPTIM2 configuration register" bitfld.long 0x48 2. "LPTIM2LPEN,LPTIM2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x48 1. "LPTIM2EN,LPTIM2 clock enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "LPTIM2RST,LPTIM2 reset" "B_0x0,B_0x1" line.long 0x4C "RCC_LPTIM3CFGR,RCC LPTIM3 configuration register" bitfld.long 0x4C 3. "LPTIM3AMEN,LPTIM3 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x4C 2. "LPTIM3LPEN,LPTIM3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4C 1. "LPTIM3EN,LPTIM3 clock enable" "B_0x0,B_0x1" bitfld.long 0x4C 0. "LPTIM3RST,LPTIM3 reset" "B_0x0,B_0x1" line.long 0x50 "RCC_LPTIM4CFGR,RCC LPTIM4 configuration register" bitfld.long 0x50 3. "LPTIM4AMEN,LPTIM4 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x50 2. "LPTIM4LPEN,LPTIM4 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x50 1. "LPTIM4EN,LPTIM4 clock enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "LPTIM4RST,LPTIM4 reset" "B_0x0,B_0x1" line.long 0x54 "RCC_LPTIM5CFGR,RCC LPTIM5 configuration register" bitfld.long 0x54 3. "LPTIM5AMEN,LPTIM5 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x54 2. "LPTIM5LPEN,LPTIM5 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x54 1. "LPTIM5EN,LPTIM5 clock enable" "B_0x0,B_0x1" bitfld.long 0x54 0. "LPTIM5RST,LPTIM5 reset" "B_0x0,B_0x1" line.long 0x58 "RCC_SPI1CFGR,RCC SPI1 configuration register" bitfld.long 0x58 2. "SPI1LPEN,SPI1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x58 1. "SPI1EN,SPI1 clock enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "SPI1RST,SPI1 reset" "B_0x0,B_0x1" line.long 0x5C "RCC_SPI2CFGR,RCC SPI2 configuration register" bitfld.long 0x5C 2. "SPI2LPEN,SPI2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x5C 1. "SPI2EN,SPI2 clock enable" "B_0x0,B_0x1" bitfld.long 0x5C 0. "SPI2RST,SPI2 reset" "B_0x0,B_0x1" line.long 0x60 "RCC_SPI3CFGR,RCC SPI3 configuration register" bitfld.long 0x60 2. "SPI3LPEN,SPI3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x60 1. "SPI3EN,SPI3 clock enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "SPI3RST,SPI3 reset" "B_0x0,B_0x1" line.long 0x64 "RCC_SPI4CFGR,RCC SPI4 configuration register" bitfld.long 0x64 2. "SPI4LPEN,SPI4 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x64 1. "SPI4EN,SPI4 clock enable" "B_0x0,B_0x1" bitfld.long 0x64 0. "SPI4RST,SPI4 reset" "B_0x0,B_0x1" line.long 0x68 "RCC_SPI5CFGR,RCC SPI5 configuration register" bitfld.long 0x68 2. "SPI5LPEN,SPI5 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x68 1. "SPI5EN,SPI5 clock enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "SPI5RST,SPI5 reset" "B_0x0,B_0x1" line.long 0x6C "RCC_SPI6CFGR,RCC SPI6 configuration register" bitfld.long 0x6C 2. "SPI6LPEN,SPI6 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x6C 1. "SPI6EN,SPI6 clock enable" "B_0x0,B_0x1" bitfld.long 0x6C 0. "SPI6RST,SPI6 reset" "B_0x0,B_0x1" line.long 0x70 "RCC_SPI7CFGR,RCC SPI7 configuration register" bitfld.long 0x70 2. "SPI7LPEN,SPI7 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x70 1. "SPI7EN,SPI7 clock enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "SPI7RST,SPI7 reset" "B_0x0,B_0x1" line.long 0x74 "RCC_SPI8CFGR,RCC SPI8 configuration register" bitfld.long 0x74 3. "SPI8AMEN,SPI8 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x74 2. "SPI8LPEN,SPI8 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x74 1. "SPI8EN,SPI8 clock enable" "B_0x0,B_0x1" bitfld.long 0x74 0. "SPI8RST,SPI8 reset" "B_0x0,B_0x1" line.long 0x78 "RCC_SPDIFRXCFGR,RCC SPDIFRX configuration register" bitfld.long 0x78 2. "SPDIFRXLPEN,SPDIFRX clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x78 1. "SPDIFRXEN,SPDIFRX clock enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "SPDIFRXRST,SPDIFRX reset" "B_0x0,B_0x1" line.long 0x7C "RCC_USART1CFGR,RCC USART1 configuration register" bitfld.long 0x7C 2. "USART1LPEN,USART1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x7C 1. "USART1EN,USART1 clock enable" "B_0x0,B_0x1" bitfld.long 0x7C 0. "USART1RST,USART1 reset" "B_0x0,B_0x1" line.long 0x80 "RCC_USART2CFGR,RCC USART2 configuration register" bitfld.long 0x80 2. "USART2LPEN,USART2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x80 1. "USART2EN,USART2 clock enable" "B_0x0,B_0x1" bitfld.long 0x80 0. "USART2RST,USART2 reset" "B_0x0,B_0x1" line.long 0x84 "RCC_USART3CFGR,RCC USART3 configuration register" bitfld.long 0x84 2. "USART3LPEN,USART3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x84 1. "USART3EN,USART3 clock enable" "B_0x0,B_0x1" bitfld.long 0x84 0. "USART3RST,USART3 reset" "B_0x0,B_0x1" line.long 0x88 "RCC_UART4CFGR,RCC UART4 configuration register" bitfld.long 0x88 2. "UART4LPEN,UART4 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x88 1. "UART4EN,UART4 clock enable" "B_0x0,B_0x1" bitfld.long 0x88 0. "UART4RST,UART4 reset" "B_0x0,B_0x1" line.long 0x8C "RCC_UART5CFGR,RCC UART5 configuration register" bitfld.long 0x8C 2. "UART5LPEN,UART5 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8C 1. "UART5EN,UART5 clock enable" "B_0x0,B_0x1" bitfld.long 0x8C 0. "UART5RST,UART5 reset" "B_0x0,B_0x1" line.long 0x90 "RCC_USART6CFGR,RCC USART6 configuration register" bitfld.long 0x90 2. "USART6LPEN,USART6 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x90 1. "USART6EN,USART6 clock enable" "B_0x0,B_0x1" bitfld.long 0x90 0. "USART6RST,USART6 reset" "B_0x0,B_0x1" line.long 0x94 "RCC_UART7CFGR,RCC UART7 configuration register" bitfld.long 0x94 2. "UART7LPEN,UART7 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x94 1. "UART7EN,UART7 clock enable" "B_0x0,B_0x1" bitfld.long 0x94 0. "UART7RST,UART7 reset" "B_0x0,B_0x1" line.long 0x98 "RCC_UART8CFGR,RCC UART8 configuration register" bitfld.long 0x98 2. "UART8LPEN,UART8 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x98 1. "UART8EN,UART8 clock enable" "B_0x0,B_0x1" bitfld.long 0x98 0. "UART8RST,UART8 reset" "B_0x0,B_0x1" line.long 0x9C "RCC_UART9CFGR,RCC UART9 configuration register" bitfld.long 0x9C 2. "UART9LPEN,UART9 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x9C 1. "UART9EN,UART9 clock enable" "B_0x0,B_0x1" bitfld.long 0x9C 0. "UART9RST,UART9 reset" "B_0x0,B_0x1" line.long 0xA0 "RCC_LPUART1CFGR,RCC LPUART1 configuration register" bitfld.long 0xA0 3. "LPUART1AMEN,LPUART1 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0xA0 2. "LPUART1LPEN,LPUART1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xA0 1. "LPUART1EN,LPUART1 clock enable" "B_0x0,B_0x1" bitfld.long 0xA0 0. "LPUART1RST,LPUART1 reset" "B_0x0,B_0x1" line.long 0xA4 "RCC_I2C1CFGR,RCC I2C1 configuration register" bitfld.long 0xA4 2. "I2C1LPEN,I2C1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xA4 1. "I2C1EN,I2C1 clock enable" "B_0x0,B_0x1" bitfld.long 0xA4 0. "I2C1RST,I2C1 reset" "B_0x0,B_0x1" line.long 0xA8 "RCC_I2C2CFGR,RCC I2C2 configuration register" bitfld.long 0xA8 2. "I2C2LPEN,I2C2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xA8 1. "I2C2EN,I2C2 clock enable" "B_0x0,B_0x1" bitfld.long 0xA8 0. "I2C2RST,I2C2 reset" "B_0x0,B_0x1" line.long 0xAC "RCC_I2C3CFGR,RCC I2C3 configuration register" bitfld.long 0xAC 2. "I2C3LPEN,I2C3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xAC 1. "I2C3EN,I2C3 clock enable" "B_0x0,B_0x1" bitfld.long 0xAC 0. "I2C3RST,I2C3 reset" "B_0x0,B_0x1" line.long 0xB0 "RCC_I2C4CFGR,RCC I2C4 configuration register" bitfld.long 0xB0 2. "I2C4LPEN,I2C4 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xB0 1. "I2C4EN,I2C4 clock enable" "B_0x0,B_0x1" bitfld.long 0xB0 0. "I2C4RST,I2C4 reset" "B_0x0,B_0x1" line.long 0xB4 "RCC_I2C5CFGR,RCC I2C5 configuration register" bitfld.long 0xB4 2. "I2C5LPEN,I2C5 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xB4 1. "I2C5EN,I2C5 clock enable" "B_0x0,B_0x1" bitfld.long 0xB4 0. "I2C5RST,I2C5 reset" "B_0x0,B_0x1" line.long 0xB8 "RCC_I2C6CFGR,RCC I2C6 configuration register" bitfld.long 0xB8 2. "I2C6LPEN,I2C6 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xB8 1. "I2C6EN,I2C6 clock enable" "B_0x0,B_0x1" bitfld.long 0xB8 0. "I2C6RST,I2C6 reset" "B_0x0,B_0x1" line.long 0xBC "RCC_I2C7CFGR,RCC I2C7 configuration register" bitfld.long 0xBC 2. "I2C7LPEN,I2C7 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xBC 1. "I2C7EN,I2C7 clock enable" "B_0x0,B_0x1" bitfld.long 0xBC 0. "I2C7RST,I2C7 reset" "B_0x0,B_0x1" line.long 0xC0 "RCC_I2C8CFGR,RCC I2C8 configuration register" bitfld.long 0xC0 3. "I2C8AMEN,I2C8 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0xC0 2. "I2C8LPEN,I2C8 peripheral clocks enable during CSleep mode" "B_0x0,B_0x1" bitfld.long 0xC0 1. "I2C8EN,I2C8 peripheral clocks enable" "B_0x0,B_0x1" bitfld.long 0xC0 0. "I2C8RST,I2C8 reset" "B_0x0,B_0x1" line.long 0xC4 "RCC_SAI1CFGR,RCC SAI1 configuration register" bitfld.long 0xC4 2. "SAI1LPEN,SAI1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC4 1. "SAI1EN,SAI1 clock enable" "B_0x0,B_0x1" bitfld.long 0xC4 0. "SAI1RST,SAI1 reset" "B_0x0,B_0x1" line.long 0xC8 "RCC_SAI2CFGR,RCC SAI2 configuration register" bitfld.long 0xC8 2. "SAI2LPEN,SAI2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC8 1. "SAI2EN,SAI2 clock enable" "B_0x0,B_0x1" bitfld.long 0xC8 0. "SAI2RST,SAI2 reset" "B_0x0,B_0x1" line.long 0xCC "RCC_SAI3CFGR,RCC SAI3 configuration register" bitfld.long 0xCC 2. "SAI3LPEN,SAI3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xCC 1. "SAI3EN,SAI3 clock enable" "B_0x0,B_0x1" bitfld.long 0xCC 0. "SAI3RST,SAI3 reset" "B_0x0,B_0x1" line.long 0xD0 "RCC_SAI4CFGR,RCC SAI4 configuration register" bitfld.long 0xD0 2. "SAI4LPEN,SAI4 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xD0 1. "SAI4EN,SAI4 clock enable" "B_0x0,B_0x1" bitfld.long 0xD0 0. "SAI4RST,SAI4 reset" "B_0x0,B_0x1" group.long 0x7D8++0x1F line.long 0x0 "RCC_MDF1CFGR,RCC MDF1 configuration register" bitfld.long 0x0 2. "MDF1LPEN,MDF1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "MDF1EN,MDF1 clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "MDF1RST,MDF1 reset" "B_0x0,B_0x1" line.long 0x4 "RCC_ADF1CFGR,RCC ADF1 configuration register" bitfld.long 0x4 3. "ADF1AMEN,ADF1 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "ADF1LPEN,ADF1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "ADF1EN,ADF1 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "ADF1RST,ADF1 reset" "B_0x0,B_0x1" line.long 0x8 "RCC_FDCANCFGR,RCC FDCAN configuration register" bitfld.long 0x8 2. "FDCANLPEN,FDCAN clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "FDCANEN,FDCAN clock enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "FDCANRST,FDCAN reset" "B_0x0,B_0x1" line.long 0xC "RCC_HDPCFGR,RCC HDP configuration register" bitfld.long 0xC 1. "HDPEN,HDP clock enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "HDPRST,HDP reset" "B_0x0,B_0x1" line.long 0x10 "RCC_ADC12CFGR,RCC ADC12 configuration register" bitfld.long 0x10 12. "ADC12KERSEL,ADC12 kernel clock source selection" "B_0x0,B_0x1" bitfld.long 0x10 2. "ADC12LPEN,ADC12 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x10 1. "ADC12EN,ADC12 clock enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "ADC12RST,ADC12 reset" "B_0x0,B_0x1" line.long 0x14 "RCC_ADC3CFGR,RCC ADC3 configuration register" bitfld.long 0x14 12.--13. "ADC3KERSEL,ADC3 kernel clock source select" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x14 2. "ADC3LPEN,ADC3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x14 1. "ADC3EN,ADC3 clock enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "ADC3RST,ADC3 reset" "B_0x0,B_0x1" line.long 0x18 "RCC_ETH1CFGR,RCC Ethernet 1 configuration register" bitfld.long 0x18 11. "ETH1RXLPEN,Ethernet 1 reception clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x18 10. "ETH1RXEN,Ethernet 1 reception clock enable" "B_0x0,B_0x1" bitfld.long 0x18 9. "ETH1TXLPEN,Ethernet 1 transmission clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x18 8. "ETH1TXEN,Ethernet 1 transmission clock enable" "B_0x0,B_0x1" newline bitfld.long 0x18 6. "ETH1LPEN,Ethernet 1 kernel clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x18 5. "ETH1EN,Ethernet 1 kernel clock enable" "B_0x0,B_0x1" bitfld.long 0x18 4. "ETH1STPEN,Ethernet 1 kernel clocks enable during CStop" "B_0x0,B_0x1" bitfld.long 0x18 2. "ETH1MACLPEN,Ethernet 1 bus clock enable during CSleep" "B_0x0,B_0x1" newline bitfld.long 0x18 1. "ETH1MACEN,Ethernet 1 bus clock enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "ETH1RST,Ethernet 1 reset" "B_0x0,B_0x1" line.long 0x1C "RCC_ETH2CFGR,RCC Ethernet 2 configuration register" bitfld.long 0x1C 11. "ETH2RXLPEN,Ethernet 2 reception clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x1C 10. "ETH2RXEN,Ethernet 2 reception clock enable" "B_0x0,B_0x1" bitfld.long 0x1C 9. "ETH2TXLPEN,Ethernet 2 transmission clock enable during CSleep mode" "B_0x0,B_0x1" bitfld.long 0x1C 8. "ETH2TXEN,Ethernet 2 transmission clock enable" "B_0x0,B_0x1" newline bitfld.long 0x1C 6. "ETH2LPEN,Ethernet 2 kernel clocks enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x1C 5. "ETH2EN,Ethernet 2 kernel clocks enable" "B_0x0,B_0x1" bitfld.long 0x1C 4. "ETH2STPEN,Ethernet 2 kernel clocks enable during CStop" "B_0x0,B_0x1" bitfld.long 0x1C 2. "ETH2MACLPEN,Ethernet 2 bus clock enable during CSleep" "B_0x0,B_0x1" newline bitfld.long 0x1C 1. "ETH2MACEN,Ethernet 2 bus clock enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "ETH2RST,Ethernet 2 reset" "B_0x0,B_0x1" group.long 0x7FC++0x2B line.long 0x0 "RCC_USBHCFGR,RCC USBH configuration register" bitfld.long 0x0 4. "USBHSTPEN,USBH clock enable during CStop" "B_0x0,B_0x1" bitfld.long 0x0 2. "USBHLPEN,USBH clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "USBHEN,USBH peripheral clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "USBHRST,USBH reset" "B_0x0,B_0x1" line.long 0x4 "RCC_USB2PHY1CFGR,RCC USB2PHY1 configuration register" bitfld.long 0x4 15. "USB2PHY1CKREFSEL,USB2PHY1 reference clock selection" "B_0x0,B_0x1" bitfld.long 0x4 4. "USB2PHY1STPEN,USB2PHY1 reference clock enable during CStop" "B_0x0,B_0x1" bitfld.long 0x4 2. "USB2PHY1LPEN,USB2PHY1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "USB2PHY1EN,USB2PHY1 clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "USB2PHY1RST,USB2PHY1 reset" "B_0x0,B_0x1" line.long 0x8 "RCC_USB2PHY2CFGR,RCC USB2PHY2 configuration register" bitfld.long 0x8 15. "USB2PHY2CKREFSEL,USB2PHY2 reference clock select" "B_0x0,B_0x1" bitfld.long 0x8 4. "USB2PHY2STPEN,USB2PHY2 reference clock enable during CStop" "B_0x0,B_0x1" bitfld.long 0x8 2. "USB2PHY2LPEN,USB2PHY2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "USB2PHY2EN,USB2PHY2 clock enable" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "USB2PHY2RST,USB2PHY2 reset" "B_0x0,B_0x1" line.long 0xC "RCC_USB3DRCFGR,RCC USB3DR configuration register" bitfld.long 0xC 4. "USB3DRSTPEN,USB3DR clock enable during CStop" "B_0x0,B_0x1" bitfld.long 0xC 2. "USB3DRLPEN,USB3DR clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC 1. "USB3DREN,USB3DR peripheral clocks enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "USB3DRRST,USB3DR reset" "B_0x0,B_0x1" line.long 0x10 "RCC_USB3PCIEPHYCFGR,RCC USB3PCIEPHY configuration register" bitfld.long 0x10 15. "USB3PCIEPHYCKREFSEL,USB3PCIEPHY reference clock selection" "B_0x0,B_0x1" bitfld.long 0x10 4. "USB3PCIEPHYSTPEN,USB3PCIEPHY reference clock enable during CStop" "B_0x0,B_0x1" bitfld.long 0x10 2. "USB3PCIEPHYLPEN,USB3PCIEPHY clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x10 1. "USB3PCIEPHYEN,USB3PCIEPHY clock enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "USB3PCIEPHYRST,USB3PCIEPHY reset" "B_0x0,B_0x1" line.long 0x14 "RCC_PCIECFGR,RCC PCIE configuration register" bitfld.long 0x14 4. "PCIESTPEN,PCIE clock enable during CStop" "B_0x0,B_0x1" bitfld.long 0x14 2. "PCIELPEN,PCIE clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x14 1. "PCIEEN,PCIE clock enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "PCIERST,PCIE reset" "B_0x0,B_0x1" line.long 0x18 "RCC_UCPDCFGR,RCC UCPD configuration register" bitfld.long 0x18 2. "UCPDLPEN,UCPD clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x18 1. "UCPDEN,UCPD clock enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "UCPDRST,UCPD reset" "B_0x0,B_0x1" line.long 0x1C "RCC_ETHSWCFGR,RCC Ethernet switch configuration register" bitfld.long 0x1C 22. "ETHSWREFLPEN,ETHSW ck_ker_ethswref kernel clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x1C 21. "ETHSWREFEN,ETHSW ck_ker_ethswref kernel clock enable" "B_0x0,B_0x1" bitfld.long 0x1C 6. "ETHSWLPEN,ETHSW ck_ker_ethsw kernel clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x1C 5. "ETHSWEN,ETHSW ck_ker_ethsw kernel clock enable" "B_0x0,B_0x1" newline bitfld.long 0x1C 2. "ETHSWMACLPEN,ETHSW clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x1C 1. "ETHSWMACEN,ETHSW clock enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "ETHSWRST,ETHSW reset" "B_0x0,B_0x1" line.long 0x20 "RCC_ETHSWACMCFGR,RCC Ethernet switch ACM configuration register" bitfld.long 0x20 2. "ETHSWACMLPEN,ETHSW_ACM clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x20 1. "ETHSWACMEN,ETHSW_ACM clock enable" "B_0x0,B_0x1" line.long 0x24 "RCC_ETHSWACMMSGCFGR,RCC Ethernet switch ACM message configuration register" bitfld.long 0x24 2. "ETHSWACMMSGLPEN,ETHSW_ACM message buffer clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x24 1. "ETHSWACMMSGEN,ETHSW_ACM message buffer clock enable" "B_0x0,B_0x1" line.long 0x28 "RCC_STGENCFGR,RCC STGEN configuration register" bitfld.long 0x28 4. "STGENSTPEN,STGENRW and STGENRO kernel clock enable during CStop" "B_0x0,B_0x1" bitfld.long 0x28 2. "STGENLPEN,STGENRW and STGENRO clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x28 1. "STGENEN,STGENRW and STGENRO clock enable" "B_0x0,B_0x1" group.long 0x830++0x17 line.long 0x0 "RCC_SDMMC1CFGR,RCC SDMMC1 configuration register" bitfld.long 0x0 16. "SDMMC1DLLRST,SDMMC1 DLL reset" "B_0x0,B_0x1" bitfld.long 0x0 2. "SDMMC1LPEN,SDMMC1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "SDMMC1EN,SDMMC1 clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SDMMC1RST,SDMMC1 reset" "B_0x0,B_0x1" line.long 0x4 "RCC_SDMMC2CFGR,RCC SDMMC2 configuration register" bitfld.long 0x4 16. "SDMMC2DLLRST,SDMMC2 DLL reset" "B_0x0,B_0x1" bitfld.long 0x4 2. "SDMMC2LPEN,SDMMC2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "SDMMC2EN,SDMMC2 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "SDMMC2RST,SDMMC2 reset" "B_0x0,B_0x1" line.long 0x8 "RCC_SDMMC3CFGR,RCC SDMMC3 configuration register" bitfld.long 0x8 16. "SDMMC3DLLRST,SDMMC3 DLL reset" "B_0x0,B_0x1" bitfld.long 0x8 2. "SDMMC3LPEN,SDMMC3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "SDMMC3EN,SDMMC3 clock enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "SDMMC3RST,SDMMC3 block reset" "B_0x0,B_0x1" line.long 0xC "RCC_GPUCFGR,RCC GPU configuration register" bitfld.long 0xC 2. "GPULPEN,GPU clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC 1. "GPUEN,GPU clock enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "GPURST,GPU reset" "B_0x0,B_0x1" line.long 0x10 "RCC_LTDCCFGR,RCC LTDC configuration register" bitfld.long 0x10 2. "LTDCLPEN,LTDC clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x10 1. "LTDCEN,LTDC peripheral clock enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "LTDCRST,LTDC reset" "B_0x0,B_0x1" line.long 0x14 "RCC_DSICFGR,RCC DSI configuration register" bitfld.long 0x14 15. "DSIPHYCKREFSEL,DSIPHY reference clock selection" "B_0x0,B_0x1" bitfld.long 0x14 12. "DSIBLSEL,DSI byte lane clock source selection" "B_0x0,B_0x1" bitfld.long 0x14 2. "DSILPEN,DSI clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x14 1. "DSIEN,DSI clock enable" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "DSIRST,DSI reset" "B_0x0,B_0x1" group.long 0x850++0x3 line.long 0x0 "RCC_LVDSCFGR,RCC LVDS configuration register" bitfld.long 0x0 15. "LVDSPHYCKREFSEL,LVDSPHY reference clock select" "B_0x0,B_0x1" bitfld.long 0x0 2. "LVDSLPEN,LVDSPHY clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "LVDSEN,LVDSPHY clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "LVDSRST,LVDS reset" "B_0x0,B_0x1" group.long 0x858++0x13 line.long 0x0 "RCC_CSICFGR,RCC CSI configuration register" bitfld.long 0x0 2. "CSILPEN,CSI clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "CSIEN,CSI clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CSIRST,CSI reset" "B_0x0,B_0x1" line.long 0x4 "RCC_DCMIPPCFGR,RCC DCMIPP configuration register" bitfld.long 0x4 2. "DCMIPPLPEN,DCMIPP clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "DCMIPPEN,DCMIPP clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "DCMIPPRST,DCMIPP reset" "B_0x0,B_0x1" line.long 0x8 "RCC_CCICFGR,RCC CCI configuration register" bitfld.long 0x8 2. "CCILPEN,CCI clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "CCIEN,CCI clock enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "CCIRST,CCI reset" "B_0x0,B_0x1" line.long 0xC "RCC_VDECCFGR,RCC VDEC configuration register" bitfld.long 0xC 2. "VDECLPEN,VDEC clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC 1. "VDECEN,VDEC clock enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "VDECRST,VDEC reset" "B_0x0,B_0x1" line.long 0x10 "RCC_VENCCFGR,RCC VENC configuration register" bitfld.long 0x10 2. "VENCLPEN,VENC clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x10 1. "VENCEN,VENC clock enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "VENCRST,VENC reset" "B_0x0,B_0x1" group.long 0x870++0x33 line.long 0x0 "RCC_RNGCFGR,RCC RNG configuration register" bitfld.long 0x0 2. "RNGLPEN,RNG clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "RNGEN,RNG clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "RNGRST,RNG reset" "B_0x0,B_0x1" line.long 0x4 "RCC_PKACFGR,RCC PKA configuration register" bitfld.long 0x4 2. "PKALPEN,PKA clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "PKAEN,PKA clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "PKARST,PKA reset" "B_0x0,B_0x1" line.long 0x8 "RCC_SAESCFGR,RCC SAES configuration register" bitfld.long 0x8 2. "SAESLPEN,SAES clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "SAESEN,SAES clock enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "SAESRST,SAES reset" "B_0x0,B_0x1" line.long 0xC "RCC_HASHCFGR,RCC HASH configuration register" bitfld.long 0xC 2. "HASHLPEN,HASH clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC 1. "HASHEN,HASH clock enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "HASHRST,HASH reset" "B_0x0,B_0x1" line.long 0x10 "RCC_CRYP1CFGR,RCC CRYP1 configuration register" bitfld.long 0x10 2. "CRYP1LPEN,CRYP1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x10 1. "CRYP1EN,CRYP1 clock enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "CRYP1RST,CRYP1 reset" "B_0x0,B_0x1" line.long 0x14 "RCC_CRYP2CFGR,RCC CRYP2 configuration register" bitfld.long 0x14 2. "CRYP2LPEN,CRYP2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x14 1. "CRYP2EN,CRYP2 clock enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "CRYP2RST,CRYP2 reset" "B_0x0,B_0x1" line.long 0x18 "RCC_IWDG1CFGR,RCC IWDG1 configuration register" bitfld.long 0x18 2. "IWDG1LPEN,IWDG1 bus clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x18 1. "IWDG1EN,IWDG1 bus clock enable" "B_0x0,B_0x1" line.long 0x1C "RCC_IWDG2CFGR,RCC IWDG2 configuration register" bitfld.long 0x1C 2. "IWDG2LPEN,IWDG2 bus clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x1C 1. "IWDG2EN,IWDG2 bus clock enable" "B_0x0,B_0x1" line.long 0x20 "RCC_IWDG3CFGR,RCC IWDG3 configuration register" bitfld.long 0x20 2. "IWDG3LPEN,IWDG3 bus clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x20 1. "IWDG3EN,IWDG3 bus clock enable" "B_0x0,B_0x1" line.long 0x24 "RCC_IWDG4CFGR,RCC IWDG4 configuration register" bitfld.long 0x24 2. "IWDG4LPEN,IWDG4 bus clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x24 1. "IWDG4EN,IWDG4 bus clock enable" "B_0x0,B_0x1" line.long 0x28 "RCC_IWDG5CFGR,RCC IWDG5 configuration register" bitfld.long 0x28 3. "IWDG5AMEN,IWDG5 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x28 2. "IWDG5LPEN,IWDG5 bus clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x28 1. "IWDG5EN,IWDG5 bus clock enable" "B_0x0,B_0x1" line.long 0x2C "RCC_WWDG1CFGR,RCC WWDG1 configuration register" bitfld.long 0x2C 2. "WWDG1LPEN,WWDG1 bus clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x2C 1. "WWDG1EN,WWDG1 bus clock enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "WWDG1RST,WWDG1 reset" "B_0x0,B_0x1" line.long 0x30 "RCC_WWDG2CFGR,RCC WWDG2 configuration register" bitfld.long 0x30 3. "WWDG2AMEN,WWDG2 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x30 2. "WWDG2LPEN,WWDG2 bus clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x30 1. "WWDG2EN,WWDG2 bus clock enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "WWDG2RST,WWDG2 block reset" "B_0x0,B_0x1" group.long 0x8A8++0x7 line.long 0x0 "RCC_VREFCFGR,RCC VREF configuration register" bitfld.long 0x0 2. "VREFLPEN,VREF clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "VREFEN,VREF clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "VREFRST,VREF reset" "B_0x0,B_0x1" line.long 0x4 "RCC_DTSCFGR,RCC DTS configuration register" bitfld.long 0x4 12.--13. "DTSKERSEL,DTS kernel clock selection" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 2. "DTSLPEN,DTS clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "DTSEN,DTS clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "DTSRST,DTS reset" "B_0x0,B_0x1" group.long 0x8B4++0xF line.long 0x0 "RCC_CRCCFGR,RCC CRC configuration register" bitfld.long 0x0 2. "CRCLPEN,CRC clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "CRCEN,CRC clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CRCRST,CRC reset" "B_0x0,B_0x1" line.long 0x4 "RCC_SERCCFGR,RCC SERC configuration register" bitfld.long 0x4 2. "SERCLPEN,SERC clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "SERCEN,SERC clocks enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "SERCRST,SERC reset" "B_0x0,B_0x1" line.long 0x8 "RCC_OSPIIOMCFGR,RCC OCTOSPI I/O manager configuration register" bitfld.long 0x8 2. "OSPIIOMLPEN,OCTOSPIM clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "OSPIIOMEN,OCTOSPIM clock enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "OSPIIOMRST,OCTOSPIM reset" "B_0x0,B_0x1" line.long 0xC "RCC_GICV2MCFGR,RCC GICV2M configuration register" bitfld.long 0xC 2. "GICV2MLPEN,GICV2M clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC 1. "GICV2MEN,GICV2M clock enable" "B_0x0,B_0x1" group.long 0x8C8++0xF line.long 0x0 "RCC_I3C1CFGR,RCC I3C1 configuration register" bitfld.long 0x0 2. "I3C1LPEN,I3C1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "I3C1EN,I3C1 clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "I3C1RST,I3C1 reset" "B_0x0,B_0x1" line.long 0x4 "RCC_I3C2CFGR,RCC I3C2 configuration register" bitfld.long 0x4 2. "I3C2LPEN,I3C2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "I3C2EN,I3C2 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "I3C2RST,I3C2 reset" "B_0x0,B_0x1" line.long 0x8 "RCC_I3C3CFGR,RCC I3C3 configuration register" bitfld.long 0x8 2. "I3C3LPEN,I3C3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "I3C3EN,I3C3 clock enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "I3C3RST,I3C3 reset" "B_0x0,B_0x1" line.long 0xC "RCC_I3C4CFGR,RCC I3C4 configuration register" bitfld.long 0xC 3. "I3C4AMEN,I3C4 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0xC 2. "I3C4LPEN,I3C4 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC 1. "I3C4EN,I3C4 clock enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "I3C4RST,I3C4 reset" "B_0x0,B_0x1" group.long 0x1000++0x3 line.long 0x0 "RCC_MUXSELCFGR,RCC MUXSEL configuration register" bitfld.long 0x0 28.--29. "MUXSEL7,PLL3 reference clock selection (ck_pll3_ref)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 24.--25. "MUXSEL6,PLL2 reference clock selection (ck_pll2_ref)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 20.--21. "MUXSEL5,PLL1 reference clock selection (ck_pll1_ref)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 16.--17. "MUXSEL4,PLL8 reference clock selection" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 12.--13. "MUXSEL3,PLL7 reference clock selection" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 8.--9. "MUXSEL2,PLL6 reference clock selection" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 4.--5. "MUXSEL1,PLL5 reference clock selection" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 0.--1. "MUXSEL0,PLL4 reference clock selection" "B_0x0,B_0x1,B_0x2,?" group.long 0x1018++0x1FF line.long 0x0 "RCC_XBAR0CFGR,RCC cross bar 0 configuration register" rbitfld.long 0x0 7. "XBAR0STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x0 6. "XBAR0EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--3. 1. "XBAR0SEL,Cross bar channel x input clock selection" line.long 0x4 "RCC_XBAR1CFGR,RCC cross bar 1 configuration register" rbitfld.long 0x4 7. "XBAR1STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x4 6. "XBAR1EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--3. 1. "XBAR1SEL,Cross bar channel x input clock selection" line.long 0x8 "RCC_XBAR2CFGR,RCC cross bar 2 configuration register" rbitfld.long 0x8 7. "XBAR2STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x8 6. "XBAR2EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 0.--3. 1. "XBAR2SEL,Cross bar channel x input clock selection" line.long 0xC "RCC_XBAR3CFGR,RCC cross bar 3 configuration register" rbitfld.long 0xC 7. "XBAR3STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xC 6. "XBAR3EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xC 0.--3. 1. "XBAR3SEL,Cross bar channel x input clock selection" line.long 0x10 "RCC_XBAR4CFGR,RCC cross bar 4 configuration register" rbitfld.long 0x10 7. "XBAR4STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x10 6. "XBAR4EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x10 0.--3. 1. "XBAR4SEL,Cross bar channel x input clock selection" line.long 0x14 "RCC_XBAR5CFGR,RCC cross bar 5 configuration register" rbitfld.long 0x14 7. "XBAR5STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x14 6. "XBAR5EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x14 0.--3. 1. "XBAR5SEL,Cross bar channel x input clock selection" line.long 0x18 "RCC_XBAR6CFGR,RCC cross bar 6 configuration register" rbitfld.long 0x18 7. "XBAR6STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x18 6. "XBAR6EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x18 0.--3. 1. "XBAR6SEL,Cross bar channel x input clock selection" line.long 0x1C "RCC_XBAR7CFGR,RCC cross bar 7 configuration register" rbitfld.long 0x1C 7. "XBAR7STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x1C 6. "XBAR7EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x1C 0.--3. 1. "XBAR7SEL,Cross bar channel x input clock selection" line.long 0x20 "RCC_XBAR8CFGR,RCC cross bar 8 configuration register" rbitfld.long 0x20 7. "XBAR8STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x20 6. "XBAR8EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x20 0.--3. 1. "XBAR8SEL,Cross bar channel x input clock selection" line.long 0x24 "RCC_XBAR9CFGR,RCC cross bar 9 configuration register" rbitfld.long 0x24 7. "XBAR9STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x24 6. "XBAR9EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--3. 1. "XBAR9SEL,Cross bar channel x input clock selection" line.long 0x28 "RCC_XBAR10CFGR,RCC cross bar 10 configuration register" rbitfld.long 0x28 7. "XBAR10STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x28 6. "XBAR10EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x28 0.--3. 1. "XBAR10SEL,Cross bar channel x input clock selection" line.long 0x2C "RCC_XBAR11CFGR,RCC cross bar 11 configuration register" rbitfld.long 0x2C 7. "XBAR11STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x2C 6. "XBAR11EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x2C 0.--3. 1. "XBAR11SEL,Cross bar channel x input clock selection" line.long 0x30 "RCC_XBAR12CFGR,RCC cross bar 12 configuration register" rbitfld.long 0x30 7. "XBAR12STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x30 6. "XBAR12EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x30 0.--3. 1. "XBAR12SEL,Cross bar channel x input clock selection" line.long 0x34 "RCC_XBAR13CFGR,RCC cross bar 13 configuration register" rbitfld.long 0x34 7. "XBAR13STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x34 6. "XBAR13EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x34 0.--3. 1. "XBAR13SEL,Cross bar channel x input clock selection" line.long 0x38 "RCC_XBAR14CFGR,RCC cross bar 14 configuration register" rbitfld.long 0x38 7. "XBAR14STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x38 6. "XBAR14EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x38 0.--3. 1. "XBAR14SEL,Cross bar channel x input clock selection" line.long 0x3C "RCC_XBAR15CFGR,RCC cross bar 15 configuration register" rbitfld.long 0x3C 7. "XBAR15STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x3C 6. "XBAR15EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x3C 0.--3. 1. "XBAR15SEL,Cross bar channel x input clock selection" line.long 0x40 "RCC_XBAR16CFGR,RCC cross bar 16 configuration register" rbitfld.long 0x40 7. "XBAR16STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x40 6. "XBAR16EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x40 0.--3. 1. "XBAR16SEL,Cross bar channel x input clock selection" line.long 0x44 "RCC_XBAR17CFGR,RCC cross bar 17 configuration register" rbitfld.long 0x44 7. "XBAR17STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x44 6. "XBAR17EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x44 0.--3. 1. "XBAR17SEL,Cross bar channel x input clock selection" line.long 0x48 "RCC_XBAR18CFGR,RCC cross bar 18 configuration register" rbitfld.long 0x48 7. "XBAR18STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x48 6. "XBAR18EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x48 0.--3. 1. "XBAR18SEL,Cross bar channel x input clock selection" line.long 0x4C "RCC_XBAR19CFGR,RCC cross bar 19 configuration register" rbitfld.long 0x4C 7. "XBAR19STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x4C 6. "XBAR19EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x4C 0.--3. 1. "XBAR19SEL,Cross bar channel x input clock selection" line.long 0x50 "RCC_XBAR20CFGR,RCC cross bar 20 configuration register" rbitfld.long 0x50 7. "XBAR20STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x50 6. "XBAR20EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x50 0.--3. 1. "XBAR20SEL,Cross bar channel x input clock selection" line.long 0x54 "RCC_XBAR21CFGR,RCC cross bar 21 configuration register" rbitfld.long 0x54 7. "XBAR21STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x54 6. "XBAR21EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x54 0.--3. 1. "XBAR21SEL,Cross bar channel x input clock selection" line.long 0x58 "RCC_XBAR22CFGR,RCC cross bar 22 configuration register" rbitfld.long 0x58 7. "XBAR22STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x58 6. "XBAR22EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x58 0.--3. 1. "XBAR22SEL,Cross bar channel x input clock selection" line.long 0x5C "RCC_XBAR23CFGR,RCC cross bar 23 configuration register" rbitfld.long 0x5C 7. "XBAR23STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x5C 6. "XBAR23EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x5C 0.--3. 1. "XBAR23SEL,Cross bar channel x input clock selection" line.long 0x60 "RCC_XBAR24CFGR,RCC cross bar 24 configuration register" rbitfld.long 0x60 7. "XBAR24STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x60 6. "XBAR24EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x60 0.--3. 1. "XBAR24SEL,Cross bar channel x input clock selection" line.long 0x64 "RCC_XBAR25CFGR,RCC cross bar 25 configuration register" rbitfld.long 0x64 7. "XBAR25STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x64 6. "XBAR25EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x64 0.--3. 1. "XBAR25SEL,Cross bar channel x input clock selection" line.long 0x68 "RCC_XBAR26CFGR,RCC cross bar 26 configuration register" rbitfld.long 0x68 7. "XBAR26STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x68 6. "XBAR26EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x68 0.--3. 1. "XBAR26SEL,Cross bar channel x input clock selection" line.long 0x6C "RCC_XBAR27CFGR,RCC cross bar 27 configuration register" rbitfld.long 0x6C 7. "XBAR27STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x6C 6. "XBAR27EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x6C 0.--3. 1. "XBAR27SEL,Cross bar channel x input clock selection" line.long 0x70 "RCC_XBAR28CFGR,RCC cross bar 28 configuration register" rbitfld.long 0x70 7. "XBAR28STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x70 6. "XBAR28EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x70 0.--3. 1. "XBAR28SEL,Cross bar channel x input clock selection" line.long 0x74 "RCC_XBAR29CFGR,RCC cross bar 29 configuration register" rbitfld.long 0x74 7. "XBAR29STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x74 6. "XBAR29EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x74 0.--3. 1. "XBAR29SEL,Cross bar channel x input clock selection" line.long 0x78 "RCC_XBAR30CFGR,RCC cross bar 30 configuration register" rbitfld.long 0x78 7. "XBAR30STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x78 6. "XBAR30EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x78 0.--3. 1. "XBAR30SEL,Cross bar channel x input clock selection" line.long 0x7C "RCC_XBAR31CFGR,RCC cross bar 31 configuration register" rbitfld.long 0x7C 7. "XBAR31STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x7C 6. "XBAR31EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x7C 0.--3. 1. "XBAR31SEL,Cross bar channel x input clock selection" line.long 0x80 "RCC_XBAR32CFGR,RCC cross bar 32 configuration register" rbitfld.long 0x80 7. "XBAR32STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x80 6. "XBAR32EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x80 0.--3. 1. "XBAR32SEL,Cross bar channel x input clock selection" line.long 0x84 "RCC_XBAR33CFGR,RCC cross bar 33 configuration register" rbitfld.long 0x84 7. "XBAR33STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x84 6. "XBAR33EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x84 0.--3. 1. "XBAR33SEL,Cross bar channel x input clock selection" line.long 0x88 "RCC_XBAR34CFGR,RCC cross bar 34 configuration register" rbitfld.long 0x88 7. "XBAR34STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x88 6. "XBAR34EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x88 0.--3. 1. "XBAR34SEL,Cross bar channel x input clock selection" line.long 0x8C "RCC_XBAR35CFGR,RCC cross bar 35 configuration register" rbitfld.long 0x8C 7. "XBAR35STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x8C 6. "XBAR35EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x8C 0.--3. 1. "XBAR35SEL,Cross bar channel x input clock selection" line.long 0x90 "RCC_XBAR36CFGR,RCC cross bar 36 configuration register" rbitfld.long 0x90 7. "XBAR36STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x90 6. "XBAR36EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x90 0.--3. 1. "XBAR36SEL,Cross bar channel x input clock selection" line.long 0x94 "RCC_XBAR37CFGR,RCC cross bar 37 configuration register" rbitfld.long 0x94 7. "XBAR37STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x94 6. "XBAR37EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x94 0.--3. 1. "XBAR37SEL,Cross bar channel x input clock selection" line.long 0x98 "RCC_XBAR38CFGR,RCC cross bar 38 configuration register" rbitfld.long 0x98 7. "XBAR38STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x98 6. "XBAR38EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x98 0.--3. 1. "XBAR38SEL,Cross bar channel x input clock selection" line.long 0x9C "RCC_XBAR39CFGR,RCC cross bar 39 configuration register" rbitfld.long 0x9C 7. "XBAR39STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x9C 6. "XBAR39EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x9C 0.--3. 1. "XBAR39SEL,Cross bar channel x input clock selection" line.long 0xA0 "RCC_XBAR40CFGR,RCC cross bar 40 configuration register" rbitfld.long 0xA0 7. "XBAR40STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xA0 6. "XBAR40EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xA0 0.--3. 1. "XBAR40SEL,Cross bar channel x input clock selection" line.long 0xA4 "RCC_XBAR41CFGR,RCC cross bar 41 configuration register" rbitfld.long 0xA4 7. "XBAR41STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xA4 6. "XBAR41EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xA4 0.--3. 1. "XBAR41SEL,Cross bar channel x input clock selection" line.long 0xA8 "RCC_XBAR42CFGR,RCC cross bar 42 configuration register" rbitfld.long 0xA8 7. "XBAR42STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xA8 6. "XBAR42EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xA8 0.--3. 1. "XBAR42SEL,Cross bar channel x input clock selection" line.long 0xAC "RCC_XBAR43CFGR,RCC cross bar 43 configuration register" rbitfld.long 0xAC 7. "XBAR43STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xAC 6. "XBAR43EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xAC 0.--3. 1. "XBAR43SEL,Cross bar channel x input clock selection" line.long 0xB0 "RCC_XBAR44CFGR,RCC cross bar 44 configuration register" rbitfld.long 0xB0 7. "XBAR44STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xB0 6. "XBAR44EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xB0 0.--3. 1. "XBAR44SEL,Cross bar channel x input clock selection" line.long 0xB4 "RCC_XBAR45CFGR,RCC cross bar 45 configuration register" rbitfld.long 0xB4 7. "XBAR45STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xB4 6. "XBAR45EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xB4 0.--3. 1. "XBAR45SEL,Cross bar channel x input clock selection" line.long 0xB8 "RCC_XBAR46CFGR,RCC cross bar 46 configuration register" rbitfld.long 0xB8 7. "XBAR46STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xB8 6. "XBAR46EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xB8 0.--3. 1. "XBAR46SEL,Cross bar channel x input clock selection" line.long 0xBC "RCC_XBAR47CFGR,RCC cross bar 47 configuration register" rbitfld.long 0xBC 7. "XBAR47STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xBC 6. "XBAR47EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xBC 0.--3. 1. "XBAR47SEL,Cross bar channel x input clock selection" line.long 0xC0 "RCC_XBAR48CFGR,RCC cross bar 48 configuration register" rbitfld.long 0xC0 7. "XBAR48STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xC0 6. "XBAR48EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xC0 0.--3. 1. "XBAR48SEL,Cross bar channel x input clock selection" line.long 0xC4 "RCC_XBAR49CFGR,RCC cross bar 49 configuration register" rbitfld.long 0xC4 7. "XBAR49STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xC4 6. "XBAR49EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xC4 0.--3. 1. "XBAR49SEL,Cross bar channel x input clock selection" line.long 0xC8 "RCC_XBAR50CFGR,RCC cross bar 50 configuration register" rbitfld.long 0xC8 7. "XBAR50STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xC8 6. "XBAR50EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xC8 0.--3. 1. "XBAR50SEL,Cross bar channel x input clock selection" line.long 0xCC "RCC_XBAR51CFGR,RCC cross bar 51 configuration register" rbitfld.long 0xCC 7. "XBAR51STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xCC 6. "XBAR51EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xCC 0.--3. 1. "XBAR51SEL,Cross bar channel x input clock selection" line.long 0xD0 "RCC_XBAR52CFGR,RCC cross bar 52 configuration register" rbitfld.long 0xD0 7. "XBAR52STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xD0 6. "XBAR52EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xD0 0.--3. 1. "XBAR52SEL,Cross bar channel x input clock selection" line.long 0xD4 "RCC_XBAR53CFGR,RCC cross bar 53 configuration register" rbitfld.long 0xD4 7. "XBAR53STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xD4 6. "XBAR53EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xD4 0.--3. 1. "XBAR53SEL,Cross bar channel x input clock selection" line.long 0xD8 "RCC_XBAR54CFGR,RCC cross bar 54 configuration register" rbitfld.long 0xD8 7. "XBAR54STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xD8 6. "XBAR54EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xD8 0.--3. 1. "XBAR54SEL,Cross bar channel x input clock selection" line.long 0xDC "RCC_XBAR55CFGR,RCC cross bar 55 configuration register" rbitfld.long 0xDC 7. "XBAR55STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xDC 6. "XBAR55EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xDC 0.--3. 1. "XBAR55SEL,Cross bar channel x input clock selection" line.long 0xE0 "RCC_XBAR56CFGR,RCC cross bar 56 configuration register" rbitfld.long 0xE0 7. "XBAR56STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xE0 6. "XBAR56EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xE0 0.--3. 1. "XBAR56SEL,Cross bar channel x input clock selection" line.long 0xE4 "RCC_XBAR57CFGR,RCC cross bar 57 configuration register" rbitfld.long 0xE4 7. "XBAR57STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xE4 6. "XBAR57EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xE4 0.--3. 1. "XBAR57SEL,Cross bar channel x input clock selection" line.long 0xE8 "RCC_XBAR58CFGR,RCC cross bar 58 configuration register" rbitfld.long 0xE8 7. "XBAR58STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xE8 6. "XBAR58EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xE8 0.--3. 1. "XBAR58SEL,Cross bar channel x input clock selection" line.long 0xEC "RCC_XBAR59CFGR,RCC cross bar 59 configuration register" rbitfld.long 0xEC 7. "XBAR59STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xEC 6. "XBAR59EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xEC 0.--3. 1. "XBAR59SEL,Cross bar channel x input clock selection" line.long 0xF0 "RCC_XBAR60CFGR,RCC cross bar 60 configuration register" rbitfld.long 0xF0 7. "XBAR60STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xF0 6. "XBAR60EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xF0 0.--3. 1. "XBAR60SEL,Cross bar channel x input clock selection" line.long 0xF4 "RCC_XBAR61CFGR,RCC cross bar 61 configuration register" rbitfld.long 0xF4 7. "XBAR61STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xF4 6. "XBAR61EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xF4 0.--3. 1. "XBAR61SEL,Cross bar channel x input clock selection" line.long 0xF8 "RCC_XBAR62CFGR,RCC cross bar 62 configuration register" rbitfld.long 0xF8 7. "XBAR62STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xF8 6. "XBAR62EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xF8 0.--3. 1. "XBAR62SEL,Cross bar channel x input clock selection" line.long 0xFC "RCC_XBAR63CFGR,RCC cross bar 63 configuration register" rbitfld.long 0xFC 7. "XBAR63STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xFC 6. "XBAR63EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xFC 0.--3. 1. "XBAR63SEL,Cross bar channel x input clock selection" line.long 0x100 "RCC_PREDIV0CFGR,RCC pre divider 0 configuration register" hexmask.long.word 0x100 0.--9. 1. "PREDIV0,Predivider channel x divider ratio" line.long 0x104 "RCC_PREDIV1CFGR,RCC pre divider 1 configuration register" hexmask.long.word 0x104 0.--9. 1. "PREDIV1,Predivider channel x divider ratio" line.long 0x108 "RCC_PREDIV2CFGR,RCC pre divider 2 configuration register" hexmask.long.word 0x108 0.--9. 1. "PREDIV2,Predivider channel x divider ratio" line.long 0x10C "RCC_PREDIV3CFGR,RCC pre divider 3 configuration register" hexmask.long.word 0x10C 0.--9. 1. "PREDIV3,Predivider channel x divider ratio" line.long 0x110 "RCC_PREDIV4CFGR,RCC pre divider 4 configuration register" hexmask.long.word 0x110 0.--9. 1. "PREDIV4,Predivider channel x divider ratio" line.long 0x114 "RCC_PREDIV5CFGR,RCC pre divider 5 configuration register" hexmask.long.word 0x114 0.--9. 1. "PREDIV5,Predivider channel x divider ratio" line.long 0x118 "RCC_PREDIV6CFGR,RCC pre divider 6 configuration register" hexmask.long.word 0x118 0.--9. 1. "PREDIV6,Predivider channel x divider ratio" line.long 0x11C "RCC_PREDIV7CFGR,RCC pre divider 7 configuration register" hexmask.long.word 0x11C 0.--9. 1. "PREDIV7,Predivider channel x divider ratio" line.long 0x120 "RCC_PREDIV8CFGR,RCC pre divider 8 configuration register" hexmask.long.word 0x120 0.--9. 1. "PREDIV8,Predivider channel x divider ratio" line.long 0x124 "RCC_PREDIV9CFGR,RCC pre divider 9 configuration register" hexmask.long.word 0x124 0.--9. 1. "PREDIV9,Predivider channel x divider ratio" line.long 0x128 "RCC_PREDIV10CFGR,RCC pre divider 10 configuration register" hexmask.long.word 0x128 0.--9. 1. "PREDIV10,Predivider channel x divider ratio" line.long 0x12C "RCC_PREDIV11CFGR,RCC pre divider 11 configuration register" hexmask.long.word 0x12C 0.--9. 1. "PREDIV11,Predivider channel x divider ratio" line.long 0x130 "RCC_PREDIV12CFGR,RCC pre divider 12 configuration register" hexmask.long.word 0x130 0.--9. 1. "PREDIV12,Predivider channel x divider ratio" line.long 0x134 "RCC_PREDIV13CFGR,RCC pre divider 13 configuration register" hexmask.long.word 0x134 0.--9. 1. "PREDIV13,Predivider channel x divider ratio" line.long 0x138 "RCC_PREDIV14CFGR,RCC pre divider 14 configuration register" hexmask.long.word 0x138 0.--9. 1. "PREDIV14,Predivider channel x divider ratio" line.long 0x13C "RCC_PREDIV15CFGR,RCC pre divider 15 configuration register" hexmask.long.word 0x13C 0.--9. 1. "PREDIV15,Predivider channel x divider ratio" line.long 0x140 "RCC_PREDIV16CFGR,RCC pre divider 16 configuration register" hexmask.long.word 0x140 0.--9. 1. "PREDIV16,Predivider channel x divider ratio" line.long 0x144 "RCC_PREDIV17CFGR,RCC pre divider 17 configuration register" hexmask.long.word 0x144 0.--9. 1. "PREDIV17,Predivider channel x divider ratio" line.long 0x148 "RCC_PREDIV18CFGR,RCC pre divider 18 configuration register" hexmask.long.word 0x148 0.--9. 1. "PREDIV18,Predivider channel x divider ratio" line.long 0x14C "RCC_PREDIV19CFGR,RCC pre divider 19 configuration register" hexmask.long.word 0x14C 0.--9. 1. "PREDIV19,Predivider channel x divider ratio" line.long 0x150 "RCC_PREDIV20CFGR,RCC pre divider 20 configuration register" hexmask.long.word 0x150 0.--9. 1. "PREDIV20,Predivider channel x divider ratio" line.long 0x154 "RCC_PREDIV21CFGR,RCC pre divider 21 configuration register" hexmask.long.word 0x154 0.--9. 1. "PREDIV21,Predivider channel x divider ratio" line.long 0x158 "RCC_PREDIV22CFGR,RCC pre divider 22 configuration register" hexmask.long.word 0x158 0.--9. 1. "PREDIV22,Predivider channel x divider ratio" line.long 0x15C "RCC_PREDIV23CFGR,RCC pre divider 23 configuration register" hexmask.long.word 0x15C 0.--9. 1. "PREDIV23,Predivider channel x divider ratio" line.long 0x160 "RCC_PREDIV24CFGR,RCC pre divider 24 configuration register" hexmask.long.word 0x160 0.--9. 1. "PREDIV24,Predivider channel x divider ratio" line.long 0x164 "RCC_PREDIV25CFGR,RCC pre divider 25 configuration register" hexmask.long.word 0x164 0.--9. 1. "PREDIV25,Predivider channel x divider ratio" line.long 0x168 "RCC_PREDIV26CFGR,RCC pre divider 26 configuration register" hexmask.long.word 0x168 0.--9. 1. "PREDIV26,Predivider channel x divider ratio" line.long 0x16C "RCC_PREDIV27CFGR,RCC pre divider 27 configuration register" hexmask.long.word 0x16C 0.--9. 1. "PREDIV27,Predivider channel x divider ratio" line.long 0x170 "RCC_PREDIV28CFGR,RCC pre divider 28 configuration register" hexmask.long.word 0x170 0.--9. 1. "PREDIV28,Predivider channel x divider ratio" line.long 0x174 "RCC_PREDIV29CFGR,RCC pre divider 29 configuration register" hexmask.long.word 0x174 0.--9. 1. "PREDIV29,Predivider channel x divider ratio" line.long 0x178 "RCC_PREDIV30CFGR,RCC pre divider 30 configuration register" hexmask.long.word 0x178 0.--9. 1. "PREDIV30,Predivider channel x divider ratio" line.long 0x17C "RCC_PREDIV31CFGR,RCC pre divider 31 configuration register" hexmask.long.word 0x17C 0.--9. 1. "PREDIV31,Predivider channel x divider ratio" line.long 0x180 "RCC_PREDIV32CFGR,RCC pre divider 32 configuration register" hexmask.long.word 0x180 0.--9. 1. "PREDIV32,Predivider channel x divider ratio" line.long 0x184 "RCC_PREDIV33CFGR,RCC pre divider 33 configuration register" hexmask.long.word 0x184 0.--9. 1. "PREDIV33,Predivider channel x divider ratio" line.long 0x188 "RCC_PREDIV34CFGR,RCC pre divider 34 configuration register" hexmask.long.word 0x188 0.--9. 1. "PREDIV34,Predivider channel x divider ratio" line.long 0x18C "RCC_PREDIV35CFGR,RCC pre divider 35 configuration register" hexmask.long.word 0x18C 0.--9. 1. "PREDIV35,Predivider channel x divider ratio" line.long 0x190 "RCC_PREDIV36CFGR,RCC pre divider 36 configuration register" hexmask.long.word 0x190 0.--9. 1. "PREDIV36,Predivider channel x divider ratio" line.long 0x194 "RCC_PREDIV37CFGR,RCC pre divider 37 configuration register" hexmask.long.word 0x194 0.--9. 1. "PREDIV37,Predivider channel x divider ratio" line.long 0x198 "RCC_PREDIV38CFGR,RCC pre divider 38 configuration register" hexmask.long.word 0x198 0.--9. 1. "PREDIV38,Predivider channel x divider ratio" line.long 0x19C "RCC_PREDIV39CFGR,RCC pre divider 39 configuration register" hexmask.long.word 0x19C 0.--9. 1. "PREDIV39,Predivider channel x divider ratio" line.long 0x1A0 "RCC_PREDIV40CFGR,RCC pre divider 40 configuration register" hexmask.long.word 0x1A0 0.--9. 1. "PREDIV40,Predivider channel x divider ratio" line.long 0x1A4 "RCC_PREDIV41CFGR,RCC pre divider 41 configuration register" hexmask.long.word 0x1A4 0.--9. 1. "PREDIV41,Predivider channel x divider ratio" line.long 0x1A8 "RCC_PREDIV42CFGR,RCC pre divider 42 configuration register" hexmask.long.word 0x1A8 0.--9. 1. "PREDIV42,Predivider channel x divider ratio" line.long 0x1AC "RCC_PREDIV43CFGR,RCC pre divider 43 configuration register" hexmask.long.word 0x1AC 0.--9. 1. "PREDIV43,Predivider channel x divider ratio" line.long 0x1B0 "RCC_PREDIV44CFGR,RCC pre divider 44 configuration register" hexmask.long.word 0x1B0 0.--9. 1. "PREDIV44,Predivider channel x divider ratio" line.long 0x1B4 "RCC_PREDIV45CFGR,RCC pre divider 45 configuration register" hexmask.long.word 0x1B4 0.--9. 1. "PREDIV45,Predivider channel x divider ratio" line.long 0x1B8 "RCC_PREDIV46CFGR,RCC pre divider 46 configuration register" hexmask.long.word 0x1B8 0.--9. 1. "PREDIV46,Predivider channel x divider ratio" line.long 0x1BC "RCC_PREDIV47CFGR,RCC pre divider 47 configuration register" hexmask.long.word 0x1BC 0.--9. 1. "PREDIV47,Predivider channel x divider ratio" line.long 0x1C0 "RCC_PREDIV48CFGR,RCC pre divider 48 configuration register" hexmask.long.word 0x1C0 0.--9. 1. "PREDIV48,Predivider channel x divider ratio" line.long 0x1C4 "RCC_PREDIV49CFGR,RCC pre divider 49 configuration register" hexmask.long.word 0x1C4 0.--9. 1. "PREDIV49,Predivider channel x divider ratio" line.long 0x1C8 "RCC_PREDIV50CFGR,RCC pre divider 50 configuration register" hexmask.long.word 0x1C8 0.--9. 1. "PREDIV50,Predivider channel x divider ratio" line.long 0x1CC "RCC_PREDIV51CFGR,RCC pre divider 51 configuration register" hexmask.long.word 0x1CC 0.--9. 1. "PREDIV51,Predivider channel x divider ratio" line.long 0x1D0 "RCC_PREDIV52CFGR,RCC pre divider 52 configuration register" hexmask.long.word 0x1D0 0.--9. 1. "PREDIV52,Predivider channel x divider ratio" line.long 0x1D4 "RCC_PREDIV53CFGR,RCC pre divider 53 configuration register" hexmask.long.word 0x1D4 0.--9. 1. "PREDIV53,Predivider channel x divider ratio" line.long 0x1D8 "RCC_PREDIV54CFGR,RCC pre divider 54 configuration register" hexmask.long.word 0x1D8 0.--9. 1. "PREDIV54,Predivider channel x divider ratio" line.long 0x1DC "RCC_PREDIV55CFGR,RCC pre divider 55 configuration register" hexmask.long.word 0x1DC 0.--9. 1. "PREDIV55,Predivider channel x divider ratio" line.long 0x1E0 "RCC_PREDIV56CFGR,RCC pre divider 56 configuration register" hexmask.long.word 0x1E0 0.--9. 1. "PREDIV56,Predivider channel x divider ratio" line.long 0x1E4 "RCC_PREDIV57CFGR,RCC pre divider 57 configuration register" hexmask.long.word 0x1E4 0.--9. 1. "PREDIV57,Predivider channel x divider ratio" line.long 0x1E8 "RCC_PREDIV58CFGR,RCC pre divider 58 configuration register" hexmask.long.word 0x1E8 0.--9. 1. "PREDIV58,Predivider channel x divider ratio" line.long 0x1EC "RCC_PREDIV59CFGR,RCC pre divider 59 configuration register" hexmask.long.word 0x1EC 0.--9. 1. "PREDIV59,Predivider channel x divider ratio" line.long 0x1F0 "RCC_PREDIV60CFGR,RCC pre divider 60 configuration register" hexmask.long.word 0x1F0 0.--9. 1. "PREDIV60,Predivider channel x divider ratio" line.long 0x1F4 "RCC_PREDIV61CFGR,RCC pre divider 61 configuration register" hexmask.long.word 0x1F4 0.--9. 1. "PREDIV61,Predivider channel x divider ratio" line.long 0x1F8 "RCC_PREDIV62CFGR,RCC pre divider 62 configuration register" hexmask.long.word 0x1F8 0.--9. 1. "PREDIV62,Predivider channel x divider ratio" line.long 0x1FC "RCC_PREDIV63CFGR,RCC pre divider 63 configuration register" hexmask.long.word 0x1FC 0.--9. 1. "PREDIV63,Predivider channel x divider ratio" rgroup.long 0x1218++0x7 line.long 0x0 "RCC_PREDIVSR1,RCC pre divider status register 1" hexmask.long 0x0 0.--31. 1. "PREDIVSTS,Predivider channel[31:0] output status" line.long 0x4 "RCC_PREDIVSR2,RCC pre divider status register 2" hexmask.long 0x4 0.--31. 1. "PREDIVSTS,Predivider channel[63:32] output status" group.long 0x1224++0xFF line.long 0x0 "RCC_FINDIV0CFGR,RCC final divider 0 configuration register" bitfld.long 0x0 6. "FINDIV0EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--5. 1. "FINDIV0,Channel x divider ratio" line.long 0x4 "RCC_FINDIV1CFGR,RCC final divider 1 configuration register" bitfld.long 0x4 6. "FINDIV1EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--5. 1. "FINDIV1,Channel x divider ratio" line.long 0x8 "RCC_FINDIV2CFGR,RCC final divider 2 configuration register" bitfld.long 0x8 6. "FINDIV2EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 0.--5. 1. "FINDIV2,Channel x divider ratio" line.long 0xC "RCC_FINDIV3CFGR,RCC final divider 3 configuration register" bitfld.long 0xC 6. "FINDIV3EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xC 0.--5. 1. "FINDIV3,Channel x divider ratio" line.long 0x10 "RCC_FINDIV4CFGR,RCC final divider 4 configuration register" bitfld.long 0x10 6. "FINDIV4EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x10 0.--5. 1. "FINDIV4,Channel x divider ratio" line.long 0x14 "RCC_FINDIV5CFGR,RCC final divider 5 configuration register" bitfld.long 0x14 6. "FINDIV5EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x14 0.--5. 1. "FINDIV5,Channel x divider ratio" line.long 0x18 "RCC_FINDIV6CFGR,RCC final divider 6 configuration register" bitfld.long 0x18 6. "FINDIV6EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x18 0.--5. 1. "FINDIV6,Channel x divider ratio" line.long 0x1C "RCC_FINDIV7CFGR,RCC final divider 7 configuration register" bitfld.long 0x1C 6. "FINDIV7EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x1C 0.--5. 1. "FINDIV7,Channel x divider ratio" line.long 0x20 "RCC_FINDIV8CFGR,RCC final divider 8 configuration register" bitfld.long 0x20 6. "FINDIV8EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x20 0.--5. 1. "FINDIV8,Channel x divider ratio" line.long 0x24 "RCC_FINDIV9CFGR,RCC final divider 9 configuration register" bitfld.long 0x24 6. "FINDIV9EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--5. 1. "FINDIV9,Channel x divider ratio" line.long 0x28 "RCC_FINDIV10CFGR,RCC final divider 10 configuration register" bitfld.long 0x28 6. "FINDIV10EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x28 0.--5. 1. "FINDIV10,Channel x divider ratio" line.long 0x2C "RCC_FINDIV11CFGR,RCC final divider 11 configuration register" bitfld.long 0x2C 6. "FINDIV11EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x2C 0.--5. 1. "FINDIV11,Channel x divider ratio" line.long 0x30 "RCC_FINDIV12CFGR,RCC final divider 12 configuration register" bitfld.long 0x30 6. "FINDIV12EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x30 0.--5. 1. "FINDIV12,Channel x divider ratio" line.long 0x34 "RCC_FINDIV13CFGR,RCC final divider 13 configuration register" bitfld.long 0x34 6. "FINDIV13EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x34 0.--5. 1. "FINDIV13,Channel x divider ratio" line.long 0x38 "RCC_FINDIV14CFGR,RCC final divider 14 configuration register" bitfld.long 0x38 6. "FINDIV14EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x38 0.--5. 1. "FINDIV14,Channel x divider ratio" line.long 0x3C "RCC_FINDIV15CFGR,RCC final divider 15 configuration register" bitfld.long 0x3C 6. "FINDIV15EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x3C 0.--5. 1. "FINDIV15,Channel x divider ratio" line.long 0x40 "RCC_FINDIV16CFGR,RCC final divider 16 configuration register" bitfld.long 0x40 6. "FINDIV16EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x40 0.--5. 1. "FINDIV16,Channel x divider ratio" line.long 0x44 "RCC_FINDIV17CFGR,RCC final divider 17 configuration register" bitfld.long 0x44 6. "FINDIV17EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x44 0.--5. 1. "FINDIV17,Channel x divider ratio" line.long 0x48 "RCC_FINDIV18CFGR,RCC final divider 18 configuration register" bitfld.long 0x48 6. "FINDIV18EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x48 0.--5. 1. "FINDIV18,Channel x divider ratio" line.long 0x4C "RCC_FINDIV19CFGR,RCC final divider 19 configuration register" bitfld.long 0x4C 6. "FINDIV19EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x4C 0.--5. 1. "FINDIV19,Channel x divider ratio" line.long 0x50 "RCC_FINDIV20CFGR,RCC final divider 20 configuration register" bitfld.long 0x50 6. "FINDIV20EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x50 0.--5. 1. "FINDIV20,Channel x divider ratio" line.long 0x54 "RCC_FINDIV21CFGR,RCC final divider 21 configuration register" bitfld.long 0x54 6. "FINDIV21EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x54 0.--5. 1. "FINDIV21,Channel x divider ratio" line.long 0x58 "RCC_FINDIV22CFGR,RCC final divider 22 configuration register" bitfld.long 0x58 6. "FINDIV22EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x58 0.--5. 1. "FINDIV22,Channel x divider ratio" line.long 0x5C "RCC_FINDIV23CFGR,RCC final divider 23 configuration register" bitfld.long 0x5C 6. "FINDIV23EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x5C 0.--5. 1. "FINDIV23,Channel x divider ratio" line.long 0x60 "RCC_FINDIV24CFGR,RCC final divider 24 configuration register" bitfld.long 0x60 6. "FINDIV24EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x60 0.--5. 1. "FINDIV24,Channel x divider ratio" line.long 0x64 "RCC_FINDIV25CFGR,RCC final divider 25 configuration register" bitfld.long 0x64 6. "FINDIV25EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x64 0.--5. 1. "FINDIV25,Channel x divider ratio" line.long 0x68 "RCC_FINDIV26CFGR,RCC final divider 26 configuration register" bitfld.long 0x68 6. "FINDIV26EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x68 0.--5. 1. "FINDIV26,Channel x divider ratio" line.long 0x6C "RCC_FINDIV27CFGR,RCC final divider 27 configuration register" bitfld.long 0x6C 6. "FINDIV27EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x6C 0.--5. 1. "FINDIV27,Channel x divider ratio" line.long 0x70 "RCC_FINDIV28CFGR,RCC final divider 28 configuration register" bitfld.long 0x70 6. "FINDIV28EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x70 0.--5. 1. "FINDIV28,Channel x divider ratio" line.long 0x74 "RCC_FINDIV29CFGR,RCC final divider 29 configuration register" bitfld.long 0x74 6. "FINDIV29EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x74 0.--5. 1. "FINDIV29,Channel x divider ratio" line.long 0x78 "RCC_FINDIV30CFGR,RCC final divider 30 configuration register" bitfld.long 0x78 6. "FINDIV30EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x78 0.--5. 1. "FINDIV30,Channel x divider ratio" line.long 0x7C "RCC_FINDIV31CFGR,RCC final divider 31 configuration register" bitfld.long 0x7C 6. "FINDIV31EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x7C 0.--5. 1. "FINDIV31,Channel x divider ratio" line.long 0x80 "RCC_FINDIV32CFGR,RCC final divider 32 configuration register" bitfld.long 0x80 6. "FINDIV32EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x80 0.--5. 1. "FINDIV32,Channel x divider ratio" line.long 0x84 "RCC_FINDIV33CFGR,RCC final divider 33 configuration register" bitfld.long 0x84 6. "FINDIV33EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x84 0.--5. 1. "FINDIV33,Channel x divider ratio" line.long 0x88 "RCC_FINDIV34CFGR,RCC final divider 34 configuration register" bitfld.long 0x88 6. "FINDIV34EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x88 0.--5. 1. "FINDIV34,Channel x divider ratio" line.long 0x8C "RCC_FINDIV35CFGR,RCC final divider 35 configuration register" bitfld.long 0x8C 6. "FINDIV35EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x8C 0.--5. 1. "FINDIV35,Channel x divider ratio" line.long 0x90 "RCC_FINDIV36CFGR,RCC final divider 36 configuration register" bitfld.long 0x90 6. "FINDIV36EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x90 0.--5. 1. "FINDIV36,Channel x divider ratio" line.long 0x94 "RCC_FINDIV37CFGR,RCC final divider 37 configuration register" bitfld.long 0x94 6. "FINDIV37EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x94 0.--5. 1. "FINDIV37,Channel x divider ratio" line.long 0x98 "RCC_FINDIV38CFGR,RCC final divider 38 configuration register" bitfld.long 0x98 6. "FINDIV38EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x98 0.--5. 1. "FINDIV38,Channel x divider ratio" line.long 0x9C "RCC_FINDIV39CFGR,RCC final divider 39 configuration register" bitfld.long 0x9C 6. "FINDIV39EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x9C 0.--5. 1. "FINDIV39,Channel x divider ratio" line.long 0xA0 "RCC_FINDIV40CFGR,RCC final divider 40 configuration register" bitfld.long 0xA0 6. "FINDIV40EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xA0 0.--5. 1. "FINDIV40,Channel x divider ratio" line.long 0xA4 "RCC_FINDIV41CFGR,RCC final divider 41 configuration register" bitfld.long 0xA4 6. "FINDIV41EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xA4 0.--5. 1. "FINDIV41,Channel x divider ratio" line.long 0xA8 "RCC_FINDIV42CFGR,RCC final divider 42 configuration register" bitfld.long 0xA8 6. "FINDIV42EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xA8 0.--5. 1. "FINDIV42,Channel x divider ratio" line.long 0xAC "RCC_FINDIV43CFGR,RCC final divider 43 configuration register" bitfld.long 0xAC 6. "FINDIV43EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xAC 0.--5. 1. "FINDIV43,Channel x divider ratio" line.long 0xB0 "RCC_FINDIV44CFGR,RCC final divider 44 configuration register" bitfld.long 0xB0 6. "FINDIV44EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xB0 0.--5. 1. "FINDIV44,Channel x divider ratio" line.long 0xB4 "RCC_FINDIV45CFGR,RCC final divider 45 configuration register" bitfld.long 0xB4 6. "FINDIV45EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xB4 0.--5. 1. "FINDIV45,Channel x divider ratio" line.long 0xB8 "RCC_FINDIV46CFGR,RCC final divider 46 configuration register" bitfld.long 0xB8 6. "FINDIV46EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xB8 0.--5. 1. "FINDIV46,Channel x divider ratio" line.long 0xBC "RCC_FINDIV47CFGR,RCC final divider 47 configuration register" bitfld.long 0xBC 6. "FINDIV47EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xBC 0.--5. 1. "FINDIV47,Channel x divider ratio" line.long 0xC0 "RCC_FINDIV48CFGR,RCC final divider 48 configuration register" bitfld.long 0xC0 6. "FINDIV48EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xC0 0.--5. 1. "FINDIV48,Channel x divider ratio" line.long 0xC4 "RCC_FINDIV49CFGR,RCC final divider 49 configuration register" bitfld.long 0xC4 6. "FINDIV49EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xC4 0.--5. 1. "FINDIV49,Channel x divider ratio" line.long 0xC8 "RCC_FINDIV50CFGR,RCC final divider 50 configuration register" bitfld.long 0xC8 6. "FINDIV50EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xC8 0.--5. 1. "FINDIV50,Channel x divider ratio" line.long 0xCC "RCC_FINDIV51CFGR,RCC final divider 51 configuration register" bitfld.long 0xCC 6. "FINDIV51EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xCC 0.--5. 1. "FINDIV51,Channel x divider ratio" line.long 0xD0 "RCC_FINDIV52CFGR,RCC final divider 52 configuration register" bitfld.long 0xD0 6. "FINDIV52EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xD0 0.--5. 1. "FINDIV52,Channel x divider ratio" line.long 0xD4 "RCC_FINDIV53CFGR,RCC final divider 53 configuration register" bitfld.long 0xD4 6. "FINDIV53EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xD4 0.--5. 1. "FINDIV53,Channel x divider ratio" line.long 0xD8 "RCC_FINDIV54CFGR,RCC final divider 54 configuration register" bitfld.long 0xD8 6. "FINDIV54EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xD8 0.--5. 1. "FINDIV54,Channel x divider ratio" line.long 0xDC "RCC_FINDIV55CFGR,RCC final divider 55 configuration register" bitfld.long 0xDC 6. "FINDIV55EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xDC 0.--5. 1. "FINDIV55,Channel x divider ratio" line.long 0xE0 "RCC_FINDIV56CFGR,RCC final divider 56 configuration register" bitfld.long 0xE0 6. "FINDIV56EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xE0 0.--5. 1. "FINDIV56,Channel x divider ratio" line.long 0xE4 "RCC_FINDIV57CFGR,RCC final divider 57 configuration register" bitfld.long 0xE4 6. "FINDIV57EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xE4 0.--5. 1. "FINDIV57,Channel x divider ratio" line.long 0xE8 "RCC_FINDIV58CFGR,RCC final divider 58 configuration register" bitfld.long 0xE8 6. "FINDIV58EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xE8 0.--5. 1. "FINDIV58,Channel x divider ratio" line.long 0xEC "RCC_FINDIV59CFGR,RCC final divider 59 configuration register" bitfld.long 0xEC 6. "FINDIV59EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xEC 0.--5. 1. "FINDIV59,Channel x divider ratio" line.long 0xF0 "RCC_FINDIV60CFGR,RCC final divider 60 configuration register" bitfld.long 0xF0 6. "FINDIV60EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xF0 0.--5. 1. "FINDIV60,Channel x divider ratio" line.long 0xF4 "RCC_FINDIV61CFGR,RCC final divider 61 configuration register" bitfld.long 0xF4 6. "FINDIV61EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xF4 0.--5. 1. "FINDIV61,Channel x divider ratio" line.long 0xF8 "RCC_FINDIV62CFGR,RCC final divider 62 configuration register" bitfld.long 0xF8 6. "FINDIV62EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xF8 0.--5. 1. "FINDIV62,Channel x divider ratio" line.long 0xFC "RCC_FINDIV63CFGR,RCC final divider 63 configuration register" bitfld.long 0xFC 6. "FINDIV63EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xFC 0.--5. 1. "FINDIV63,Channel x divider ratio" rgroup.long 0x1324++0x7 line.long 0x0 "RCC_FINDIVSR1,RCC final divider status register 1" hexmask.long 0x0 0.--31. 1. "FINDIVSTS,Final divider channel[31:0] output status" line.long 0x4 "RCC_FINDIVSR2,RCC final divider status register 2" hexmask.long 0x4 0.--31. 1. "FINDIVSTS,Final divider channel[63:32] output status" group.long 0x1340++0xF line.long 0x0 "RCC_FCALCOBS0CFGR,RCC clock frequency calculator and observation 0 clock configuration register" bitfld.long 0x0 26. "CKOBSEN,Observation clock 0 output enable" "B_0x0,B_0x1" bitfld.long 0x0 25. "FCALCCKEN,Clock frequency calculator input clock enable" "B_0x0,B_0x1" bitfld.long 0x0 22.--24. "CKOBSDIV,Observation clock 0 divide ratio" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 18. "CKOBSINV,Observation clock 0 inverter" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "FCALCCKINV,Clock frequency calculator input clock inverter" "B_0x0,B_0x1" bitfld.long 0x0 16. "CKOBSEXTSEL,External clock source for observation clock 0" "B_0x0,B_0x1" bitfld.long 0x0 15. "FCALCCKEXTSEL,External clock source for clock frequency calculator input clock" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "CKEXTSEL,External clock selector for clock frequency calculator and" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline hexmask.long.byte 0x0 0.--7. 1. "CKINTSEL,Internal clock selector for clock frequency calculator and observation clock 0" line.long 0x4 "RCC_FCALCOBS1CFGR,RCC clock frequency calculator and observation 1 clock configuration register" bitfld.long 0x4 27. "FCALCRSTN,Clock frequency calculator reset" "B_0x0,B_0x1" bitfld.long 0x4 26. "CKOBSEN,Observation clock 1 output enable" "B_0x0,B_0x1" bitfld.long 0x4 22.--24. "CKOBSDIV,Observation clock 1 divide ratio" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 18. "CKOBSINV,Observation clock 1 inverter" "B_0x0,B_0x1" newline bitfld.long 0x4 16. "CKOBSEXTSEL,External clock source for the observation clock 1" "B_0x0,B_0x1" bitfld.long 0x4 8.--10. "CKEXTSEL,External clock for observation clock 1" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0x4 0.--7. 1. "CKINTSEL,Internal clock selector for observation clock 1" line.long 0x8 "RCC_FCALCREFCFGR,RCC clock frequency calculator reference clock configuration register" bitfld.long 0x8 0.--2. "FCALCREFCKSEL,Reference clock selection used by clock frequency calculator" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0xC "RCC_FCALCCR1,RCC clock frequency calculator control register 1" bitfld.long 0xC 0. "FCALCRUN,Clock frequency calculator run" "B_0x0,B_0x1" group.long 0x1354++0x3 line.long 0x0 "RCC_FCALCCR2,RCC clock frequency calculator control register 2" hexmask.long.byte 0x0 17.--21. 1. "FCALCTYP,Clock frequency calculation type selection" hexmask.long.byte 0x0 11.--14. 1. "FCALCTWC,Time window code for clock frequency calculation" bitfld.long 0x0 3.--4. "FCALCMD,Clock frequency calculation method" "?,?,?,B_0x3" rgroup.long 0x1358++0x3 line.long 0x0 "RCC_FCALCSR,RCC clock frequency calculator status register" bitfld.long 0x0 19. "FCALCSTS,Clock frequency calculation status" "0,1" hexmask.long.tbyte 0x0 0.--16. 1. "FVAL,Clock frequency calculation value" group.long 0x1360++0x13 line.long 0x0 "RCC_PLL4CFGR1,RCC PLL4 configuration register 1" bitfld.long 0x0 28. "CKREFST,PLLy reference clock state" "B_0x0,B_0x1" rbitfld.long 0x0 24. "PLLRDY,PLLy clock ready flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "PLLEN,PLLy enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SSMODRST,PLLy spread-spectrum modulator reset" "B_0x0,B_0x1" line.long 0x4 "RCC_PLL4CFGR2,RCC PLL4 configuration register 2" hexmask.long.word 0x4 16.--27. 1. "FBDIV,PLLy VCO multiplication factor" hexmask.long.byte 0x4 0.--5. 1. "FREFDIV,PLLy reference input clock divide frequency ratio" line.long 0x8 "RCC_PLL4CFGR3,RCC PLL4 configuration register 3" bitfld.long 0x8 26. "SSCGDIS,PLLy spread-spectrum modulator disable" "B_0x0,B_0x1" bitfld.long 0x8 25. "DACEN,PLLy noise canceling DAC enable in fractional mode." "B_0x0,B_0x1" bitfld.long 0x8 24. "DOWNSPREAD,PLLy VCO frequency modulation mode" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--23. 1. "FRACIN,Fractional part of PLLy VCO multiplication factor" line.long 0xC "RCC_PLL4CFGR4,RCC PLL4 configuration register 4" bitfld.long 0xC 10. "BYPASS,PLLy FOUTPOSTDIV bypass" "B_0x0,B_0x1" bitfld.long 0xC 9. "FOUTPOSTDIVEN,PLLy output and post dividers enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "DSMEN,PLLy delta-sigma modulator enable" "B_0x0,B_0x1" line.long 0x10 "RCC_PLL4CFGR5,RCC PLL4 configuration register 5" hexmask.long.byte 0x10 16.--20. 1. "SPREAD,Modulation depth adjustment for PLLy" hexmask.long.byte 0x10 0.--3. 1. "DIVVAL,Modulation frequency adjustment for PLLy" group.long 0x1378++0x7 line.long 0x0 "RCC_PLL4CFGR6,RCC PLL4 configuration register 6" bitfld.long 0x0 0.--2. "POSTDIV1,PLLy VCO frequency divide level 1" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" line.long 0x4 "RCC_PLL4CFGR7,RCC PLL4 configuration register 7" bitfld.long 0x4 0.--2. "POSTDIV2,PLLy VCO frequency divide level 2" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" group.long 0x1388++0x13 line.long 0x0 "RCC_PLL5CFGR1,RCC PLL5 configuration register 1" bitfld.long 0x0 28. "CKREFST,PLLy reference clock state" "B_0x0,B_0x1" rbitfld.long 0x0 24. "PLLRDY,PLLy clock ready flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "PLLEN,PLLy enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SSMODRST,PLLy spread-spectrum modulator reset" "B_0x0,B_0x1" line.long 0x4 "RCC_PLL5CFGR2,RCC PLL5 configuration register 2" hexmask.long.word 0x4 16.--27. 1. "FBDIV,PLLy VCO multiplication factor" hexmask.long.byte 0x4 0.--5. 1. "FREFDIV,PLLy reference input clock divide frequency ratio" line.long 0x8 "RCC_PLL5CFGR3,RCC PLL5 configuration register 3" bitfld.long 0x8 26. "SSCGDIS,PLLy spread-spectrum modulator disable" "B_0x0,B_0x1" bitfld.long 0x8 25. "DACEN,PLLy noise canceling DAC enable in fractional mode." "B_0x0,B_0x1" bitfld.long 0x8 24. "DOWNSPREAD,PLLy VCO frequency modulation mode" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--23. 1. "FRACIN,Fractional part of PLLy VCO multiplication factor" line.long 0xC "RCC_PLL5CFGR4,RCC PLL5 configuration register 4" bitfld.long 0xC 10. "BYPASS,PLLy FOUTPOSTDIV bypass" "B_0x0,B_0x1" bitfld.long 0xC 9. "FOUTPOSTDIVEN,PLLy output and post dividers enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "DSMEN,PLLy delta-sigma modulator enable" "B_0x0,B_0x1" line.long 0x10 "RCC_PLL5CFGR5,RCC PLL5 configuration register 5" hexmask.long.byte 0x10 16.--20. 1. "SPREAD,Modulation depth adjustment for PLLy" hexmask.long.byte 0x10 0.--3. 1. "DIVVAL,Modulation frequency adjustment for PLLy" group.long 0x13A0++0x7 line.long 0x0 "RCC_PLL5CFGR6,RCC PLL5 configuration register 6" bitfld.long 0x0 0.--2. "POSTDIV1,PLLy VCO frequency divide level 1" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" line.long 0x4 "RCC_PLL5CFGR7,RCC PLL5 configuration register 7" bitfld.long 0x4 0.--2. "POSTDIV2,PLLy VCO frequency divide level 2" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" group.long 0x13B0++0x13 line.long 0x0 "RCC_PLL6CFGR1,RCC PLL6 configuration register 1" bitfld.long 0x0 28. "CKREFST,PLLy reference clock state" "B_0x0,B_0x1" rbitfld.long 0x0 24. "PLLRDY,PLLy clock ready flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "PLLEN,PLLy enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SSMODRST,PLLy spread-spectrum modulator reset" "B_0x0,B_0x1" line.long 0x4 "RCC_PLL6CFGR2,RCC PLL6 configuration register 2" hexmask.long.word 0x4 16.--27. 1. "FBDIV,PLLy VCO multiplication factor" hexmask.long.byte 0x4 0.--5. 1. "FREFDIV,PLLy reference input clock divide frequency ratio" line.long 0x8 "RCC_PLL6CFGR3,RCC PLL6 configuration register 3" bitfld.long 0x8 26. "SSCGDIS,PLLy spread-spectrum modulator disable" "B_0x0,B_0x1" bitfld.long 0x8 25. "DACEN,PLLy noise canceling DAC enable in fractional mode." "B_0x0,B_0x1" bitfld.long 0x8 24. "DOWNSPREAD,PLLy VCO frequency modulation mode" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--23. 1. "FRACIN,Fractional part of PLLy VCO multiplication factor" line.long 0xC "RCC_PLL6CFGR4,RCC PLL6 configuration register 4" bitfld.long 0xC 10. "BYPASS,PLLy FOUTPOSTDIV bypass" "B_0x0,B_0x1" bitfld.long 0xC 9. "FOUTPOSTDIVEN,PLLy output and post dividers enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "DSMEN,PLLy delta-sigma modulator enable" "B_0x0,B_0x1" line.long 0x10 "RCC_PLL6CFGR5,RCC PLL6 configuration register 5" hexmask.long.byte 0x10 16.--20. 1. "SPREAD,Modulation depth adjustment for PLLy" hexmask.long.byte 0x10 0.--3. 1. "DIVVAL,Modulation frequency adjustment for PLLy" group.long 0x13C8++0x7 line.long 0x0 "RCC_PLL6CFGR6,RCC PLL6 configuration register 6" bitfld.long 0x0 0.--2. "POSTDIV1,PLLy VCO frequency divide level 1" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" line.long 0x4 "RCC_PLL6CFGR7,RCC PLL6 configuration register 7" bitfld.long 0x4 0.--2. "POSTDIV2,PLLy VCO frequency divide level 2" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" group.long 0x13D8++0x13 line.long 0x0 "RCC_PLL7CFGR1,RCC PLL7 configuration register 1" bitfld.long 0x0 28. "CKREFST,PLLy reference clock state" "B_0x0,B_0x1" rbitfld.long 0x0 24. "PLLRDY,PLLy clock ready flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "PLLEN,PLLy enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SSMODRST,PLLy spread-spectrum modulator reset" "B_0x0,B_0x1" line.long 0x4 "RCC_PLL7CFGR2,RCC PLL7 configuration register 2" hexmask.long.word 0x4 16.--27. 1. "FBDIV,PLLy VCO multiplication factor" hexmask.long.byte 0x4 0.--5. 1. "FREFDIV,PLLy reference input clock divide frequency ratio" line.long 0x8 "RCC_PLL7CFGR3,RCC PLL7 configuration register 3" bitfld.long 0x8 26. "SSCGDIS,PLLy spread-spectrum modulator disable" "B_0x0,B_0x1" bitfld.long 0x8 25. "DACEN,PLLy noise canceling DAC enable in fractional mode." "B_0x0,B_0x1" bitfld.long 0x8 24. "DOWNSPREAD,PLLy VCO frequency modulation mode" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--23. 1. "FRACIN,Fractional part of PLLy VCO multiplication factor" line.long 0xC "RCC_PLL7CFGR4,RCC PLL7 configuration register 4" bitfld.long 0xC 10. "BYPASS,PLLy FOUTPOSTDIV bypass" "B_0x0,B_0x1" bitfld.long 0xC 9. "FOUTPOSTDIVEN,PLLy output and post dividers enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "DSMEN,PLLy delta-sigma modulator enable" "B_0x0,B_0x1" line.long 0x10 "RCC_PLL7CFGR5,RCC PLL7 configuration register 5" hexmask.long.byte 0x10 16.--20. 1. "SPREAD,Modulation depth adjustment for PLLy" hexmask.long.byte 0x10 0.--3. 1. "DIVVAL,Modulation frequency adjustment for PLLy" group.long 0x13F0++0x7 line.long 0x0 "RCC_PLL7CFGR6,RCC PLL7 configuration register 6" bitfld.long 0x0 0.--2. "POSTDIV1,PLLy VCO frequency divide level 1" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" line.long 0x4 "RCC_PLL7CFGR7,RCC PLL7 configuration register 7" bitfld.long 0x4 0.--2. "POSTDIV2,PLLy VCO frequency divide level 2" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" group.long 0x1400++0x13 line.long 0x0 "RCC_PLL8CFGR1,RCC PLL8 configuration register 1" bitfld.long 0x0 28. "CKREFST,PLLy reference clock state" "B_0x0,B_0x1" rbitfld.long 0x0 24. "PLLRDY,PLLy clock ready flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "PLLEN,PLLy enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SSMODRST,PLLy spread-spectrum modulator reset" "B_0x0,B_0x1" line.long 0x4 "RCC_PLL8CFGR2,RCC PLL8 configuration register 2" hexmask.long.word 0x4 16.--27. 1. "FBDIV,PLLy VCO multiplication factor" hexmask.long.byte 0x4 0.--5. 1. "FREFDIV,PLLy reference input clock divide frequency ratio" line.long 0x8 "RCC_PLL8CFGR3,RCC PLL8 configuration register 3" bitfld.long 0x8 26. "SSCGDIS,PLLy spread-spectrum modulator disable" "B_0x0,B_0x1" bitfld.long 0x8 25. "DACEN,PLLy noise canceling DAC enable in fractional mode." "B_0x0,B_0x1" bitfld.long 0x8 24. "DOWNSPREAD,PLLy VCO frequency modulation mode" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--23. 1. "FRACIN,Fractional part of PLLy VCO multiplication factor" line.long 0xC "RCC_PLL8CFGR4,RCC PLL8 configuration register 4" bitfld.long 0xC 10. "BYPASS,PLLy FOUTPOSTDIV bypass" "B_0x0,B_0x1" bitfld.long 0xC 9. "FOUTPOSTDIVEN,PLLy output and post dividers enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "DSMEN,PLLy delta-sigma modulator enable" "B_0x0,B_0x1" line.long 0x10 "RCC_PLL8CFGR5,RCC PLL8 configuration register 5" hexmask.long.byte 0x10 16.--20. 1. "SPREAD,Modulation depth adjustment for PLLy" hexmask.long.byte 0x10 0.--3. 1. "DIVVAL,Modulation frequency adjustment for PLLy" group.long 0x1418++0x7 line.long 0x0 "RCC_PLL8CFGR6,RCC PLL8 configuration register 6" bitfld.long 0x0 0.--2. "POSTDIV1,PLLy VCO frequency divide level 1" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" line.long 0x4 "RCC_PLL8CFGR7,RCC PLL8 configuration register 7" bitfld.long 0x4 0.--2. "POSTDIV2,PLLy VCO frequency divide level 2" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" rgroup.long 0xFFF4++0xB line.long 0x0 "RCC_VERR,RCC version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,Major RCC revision" hexmask.long.byte 0x0 0.--3. 1. "MINREV,Minor RCC revision" line.long 0x4 "RCC_IDR,RCC identifier register" hexmask.long 0x4 0.--31. 1. "ID,RCC identifier" line.long 0x8 "RCC_SIDR,RCC size identification register" hexmask.long 0x8 0.--31. 1. "SID,RCC decoding space (64 Kbytes)" tree.end tree "RCC_S" base ad:0x54200000 group.long 0x0++0x3BF line.long 0x0 "RCC_SECCFGR0,RCC secure configuration register 0" hexmask.long 0x0 0.--31. 1. "SEC,Secure attribute reference for local resource number x" line.long 0x4 "RCC_SECCFGR1,RCC secure configuration register 1" hexmask.long 0x4 0.--31. 1. "SEC,Secure attribute reference for the local resource number x" line.long 0x8 "RCC_SECCFGR2,RCC secure configuration register 2" hexmask.long 0x8 0.--31. 1. "SEC,Secure attribute reference for the local resource number x" line.long 0xC "RCC_SECCFGR3,RCC secure configuration register 3" hexmask.long.tbyte 0xC 0.--17. 1. "SEC,Secure attribute reference for the local resource number x" line.long 0x10 "RCC_PRIVCFGR0,RCC privileged configuration register 0" hexmask.long 0x10 0.--31. 1. "PRIV,Privileged attribute reference for local resource number x" line.long 0x14 "RCC_PRIVCFGR1,RCC privileged configuration register 1" hexmask.long 0x14 0.--31. 1. "PRIV,Privileged attribute reference for the local resource number x" line.long 0x18 "RCC_PRIVCFGR2,RCC privileged configuration register 2" hexmask.long 0x18 0.--31. 1. "PRIV,Privileged attribute reference for the local resource number x" line.long 0x1C "RCC_PRIVCFGR3,RCC privileged configuration register 3" hexmask.long.tbyte 0x1C 0.--17. 1. "PRIV,Privileged attribute reference for the local resource number x" line.long 0x20 "RCC_RCFGLOCKR0,RCC resource configuration lock register 0" hexmask.long 0x20 0.--31. 1. "RLOCK,RCC local resource number x lock" line.long 0x24 "RCC_RCFGLOCKR1,RCC resource configuration lock register 1" hexmask.long 0x24 0.--31. 1. "RLOCK,RCC local resource number x lock" line.long 0x28 "RCC_RCFGLOCKR2,RCC resource configuration lock register 2" hexmask.long 0x28 0.--31. 1. "RLOCK,RCC local resource number x lock" line.long 0x2C "RCC_RCFGLOCKR3,RCC resource configuration lock register 3" hexmask.long.tbyte 0x2C 0.--17. 1. "RLOCK,RCC local resource number x lock" line.long 0x30 "RCC_R0CIDCFGR,RCC resource 0 CID configuration register" hexmask.long.byte 0x30 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x30 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x34 "RCC_R0SEMCR,RCC resource 0 semaphore control register" rbitfld.long 0x34 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x38 "RCC_R1CIDCFGR,RCC resource 1 CID configuration register" hexmask.long.byte 0x38 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x38 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x3C "RCC_R1SEMCR,RCC resource 1 semaphore control register" rbitfld.long 0x3C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x40 "RCC_R2CIDCFGR,RCC resource 2 CID configuration register" hexmask.long.byte 0x40 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x40 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x44 "RCC_R2SEMCR,RCC resource 2 semaphore control register" rbitfld.long 0x44 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x48 "RCC_R3CIDCFGR,RCC resource 3 CID configuration register" hexmask.long.byte 0x48 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x48 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x4C "RCC_R3SEMCR,RCC resource 3 semaphore control register" rbitfld.long 0x4C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x50 "RCC_R4CIDCFGR,RCC resource 4 CID configuration register" hexmask.long.byte 0x50 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x50 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x54 "RCC_R4SEMCR,RCC resource 4 semaphore control register" rbitfld.long 0x54 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x58 "RCC_R5CIDCFGR,RCC resource 5 CID configuration register" hexmask.long.byte 0x58 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x58 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x5C "RCC_R5SEMCR,RCC resource 5 semaphore control register" rbitfld.long 0x5C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x60 "RCC_R6CIDCFGR,RCC resource 6 CID configuration register" hexmask.long.byte 0x60 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x60 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x64 "RCC_R6SEMCR,RCC resource 6 semaphore control register" rbitfld.long 0x64 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x68 "RCC_R7CIDCFGR,RCC resource 7 CID configuration register" hexmask.long.byte 0x68 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x68 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x6C "RCC_R7SEMCR,RCC resource 7 semaphore control register" rbitfld.long 0x6C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x70 "RCC_R8CIDCFGR,RCC resource 8 CID configuration register" hexmask.long.byte 0x70 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x70 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x74 "RCC_R8SEMCR,RCC resource 8 semaphore control register" rbitfld.long 0x74 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x78 "RCC_R9CIDCFGR,RCC resource 9 CID configuration register" hexmask.long.byte 0x78 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x78 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x7C "RCC_R9SEMCR,RCC resource 9 semaphore control register" rbitfld.long 0x7C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x80 "RCC_R10CIDCFGR,RCC resource 10 CID configuration register" hexmask.long.byte 0x80 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x80 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x80 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x84 "RCC_R10SEMCR,RCC resource 10 semaphore control register" rbitfld.long 0x84 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x88 "RCC_R11CIDCFGR,RCC resource 11 CID configuration register" hexmask.long.byte 0x88 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x88 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x88 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x8C "RCC_R11SEMCR,RCC resource 11 semaphore control register" rbitfld.long 0x8C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x90 "RCC_R12CIDCFGR,RCC resource 12 CID configuration register" hexmask.long.byte 0x90 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x90 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x90 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x90 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x94 "RCC_R12SEMCR,RCC resource 12 semaphore control register" rbitfld.long 0x94 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x94 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x98 "RCC_R13CIDCFGR,RCC resource 13 CID configuration register" hexmask.long.byte 0x98 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x98 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x98 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x98 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x9C "RCC_R13SEMCR,RCC resource 13 semaphore control register" rbitfld.long 0x9C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x9C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xA0 "RCC_R14CIDCFGR,RCC resource 14 CID configuration register" hexmask.long.byte 0xA0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xA0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xA0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xA0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xA4 "RCC_R14SEMCR,RCC resource 14 semaphore control register" rbitfld.long 0xA4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xA4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xA8 "RCC_R15CIDCFGR,RCC resource 15 CID configuration register" hexmask.long.byte 0xA8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xA8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xA8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xA8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xAC "RCC_R15SEMCR,RCC resource 15 semaphore control register" rbitfld.long 0xAC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xAC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xB0 "RCC_R16CIDCFGR,RCC resource 16 CID configuration register" hexmask.long.byte 0xB0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xB0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xB0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xB0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xB4 "RCC_R16SEMCR,RCC resource 16 semaphore control register" rbitfld.long 0xB4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xB4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xB8 "RCC_R17CIDCFGR,RCC resource 17 CID configuration register" hexmask.long.byte 0xB8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xB8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xB8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xB8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xBC "RCC_R17SEMCR,RCC resource 17 semaphore control register" rbitfld.long 0xBC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xBC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xC0 "RCC_R18CIDCFGR,RCC resource 18 CID configuration register" hexmask.long.byte 0xC0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xC0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xC0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xC0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xC4 "RCC_R18SEMCR,RCC resource 18 semaphore control register" rbitfld.long 0xC4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xC4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xC8 "RCC_R19CIDCFGR,RCC resource 19 CID configuration register" hexmask.long.byte 0xC8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xC8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xC8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xC8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xCC "RCC_R19SEMCR,RCC resource 19 semaphore control register" rbitfld.long 0xCC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xCC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xD0 "RCC_R20CIDCFGR,RCC resource 20 CID configuration register" hexmask.long.byte 0xD0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xD0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xD0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xD0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xD4 "RCC_R20SEMCR,RCC resource 20 semaphore control register" rbitfld.long 0xD4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xD4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xD8 "RCC_R21CIDCFGR,RCC resource 21 CID configuration register" hexmask.long.byte 0xD8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xD8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xD8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xD8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xDC "RCC_R21SEMCR,RCC resource 21 semaphore control register" rbitfld.long 0xDC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xDC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xE0 "RCC_R22CIDCFGR,RCC resource 22 CID configuration register" hexmask.long.byte 0xE0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xE0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xE0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xE0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xE4 "RCC_R22SEMCR,RCC resource 22 semaphore control register" rbitfld.long 0xE4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xE4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xE8 "RCC_R23CIDCFGR,RCC resource 23 CID configuration register" hexmask.long.byte 0xE8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xE8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xE8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xE8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xEC "RCC_R23SEMCR,RCC resource 23 semaphore control register" rbitfld.long 0xEC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xEC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xF0 "RCC_R24CIDCFGR,RCC resource 24 CID configuration register" hexmask.long.byte 0xF0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xF0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xF0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xF0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xF4 "RCC_R24SEMCR,RCC resource 24 semaphore control register" rbitfld.long 0xF4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xF4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0xF8 "RCC_R25CIDCFGR,RCC resource 25 CID configuration register" hexmask.long.byte 0xF8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0xF8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xF8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xF8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0xFC "RCC_R25SEMCR,RCC resource 25 semaphore control register" rbitfld.long 0xFC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0xFC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x100 "RCC_R26CIDCFGR,RCC resource 26 CID configuration register" hexmask.long.byte 0x100 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x100 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x100 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x100 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x104 "RCC_R26SEMCR,RCC resource 26 semaphore control register" rbitfld.long 0x104 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x104 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x108 "RCC_R27CIDCFGR,RCC resource 27 CID configuration register" hexmask.long.byte 0x108 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x108 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x108 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x108 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x10C "RCC_R27SEMCR,RCC resource 27 semaphore control register" rbitfld.long 0x10C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x10C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x110 "RCC_R28CIDCFGR,RCC resource 28 CID configuration register" hexmask.long.byte 0x110 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x110 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x110 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x110 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x114 "RCC_R28SEMCR,RCC resource 28 semaphore control register" rbitfld.long 0x114 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x114 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x118 "RCC_R29CIDCFGR,RCC resource 29 CID configuration register" hexmask.long.byte 0x118 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x118 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x118 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x118 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x11C "RCC_R29SEMCR,RCC resource 29 semaphore control register" rbitfld.long 0x11C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x11C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x120 "RCC_R30CIDCFGR,RCC resource 30 CID configuration register" hexmask.long.byte 0x120 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x120 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x120 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x120 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x124 "RCC_R30SEMCR,RCC resource 30 semaphore control register" rbitfld.long 0x124 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x124 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x128 "RCC_R31CIDCFGR,RCC resource 31 CID configuration register" hexmask.long.byte 0x128 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x128 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x128 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x128 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x12C "RCC_R31SEMCR,RCC resource 31 semaphore control register" rbitfld.long 0x12C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x12C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x130 "RCC_R32CIDCFGR,RCC resource 32 CID configuration register" hexmask.long.byte 0x130 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x130 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x130 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x130 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x134 "RCC_R32SEMCR,RCC resource 32 semaphore control register" rbitfld.long 0x134 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x134 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x138 "RCC_R33CIDCFGR,RCC resource 33 CID configuration register" hexmask.long.byte 0x138 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x138 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x138 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x138 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x13C "RCC_R33SEMCR,RCC resource 33 semaphore control register" rbitfld.long 0x13C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x13C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x140 "RCC_R34CIDCFGR,RCC resource 34 CID configuration register" hexmask.long.byte 0x140 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x140 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x140 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x140 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x144 "RCC_R34SEMCR,RCC resource 34 semaphore control register" rbitfld.long 0x144 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x144 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x148 "RCC_R35CIDCFGR,RCC resource 35 CID configuration register" hexmask.long.byte 0x148 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x148 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x148 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x148 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x14C "RCC_R35SEMCR,RCC resource 35 semaphore control register" rbitfld.long 0x14C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x14C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x150 "RCC_R36CIDCFGR,RCC resource 36 CID configuration register" hexmask.long.byte 0x150 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x150 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x150 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x150 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x154 "RCC_R36SEMCR,RCC resource 36 semaphore control register" rbitfld.long 0x154 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x154 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x158 "RCC_R37CIDCFGR,RCC resource 37 CID configuration register" hexmask.long.byte 0x158 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x158 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x158 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x158 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x15C "RCC_R37SEMCR,RCC resource 37 semaphore control register" rbitfld.long 0x15C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x15C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x160 "RCC_R38CIDCFGR,RCC resource 38 CID configuration register" hexmask.long.byte 0x160 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x160 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x160 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x160 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x164 "RCC_R38SEMCR,RCC resource 38 semaphore control register" rbitfld.long 0x164 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x164 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x168 "RCC_R39CIDCFGR,RCC resource 39 CID configuration register" hexmask.long.byte 0x168 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x168 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x168 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x168 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x16C "RCC_R39SEMCR,RCC resource 39 semaphore control register" rbitfld.long 0x16C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x16C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x170 "RCC_R40CIDCFGR,RCC resource 40 CID configuration register" hexmask.long.byte 0x170 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x170 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x170 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x170 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x174 "RCC_R40SEMCR,RCC resource 40 semaphore control register" rbitfld.long 0x174 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x174 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x178 "RCC_R41CIDCFGR,RCC resource 41 CID configuration register" hexmask.long.byte 0x178 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x178 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x178 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x178 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x17C "RCC_R41SEMCR,RCC resource 41 semaphore control register" rbitfld.long 0x17C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x17C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x180 "RCC_R42CIDCFGR,RCC resource 42 CID configuration register" hexmask.long.byte 0x180 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x180 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x180 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x180 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x184 "RCC_R42SEMCR,RCC resource 42 semaphore control register" rbitfld.long 0x184 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x184 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x188 "RCC_R43CIDCFGR,RCC resource 43 CID configuration register" hexmask.long.byte 0x188 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x188 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x188 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x188 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x18C "RCC_R43SEMCR,RCC resource 43 semaphore control register" rbitfld.long 0x18C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x18C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x190 "RCC_R44CIDCFGR,RCC resource 44 CID configuration register" hexmask.long.byte 0x190 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x190 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x190 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x190 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x194 "RCC_R44SEMCR,RCC resource 44 semaphore control register" rbitfld.long 0x194 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x194 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x198 "RCC_R45CIDCFGR,RCC resource 45 CID configuration register" hexmask.long.byte 0x198 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x198 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x198 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x198 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x19C "RCC_R45SEMCR,RCC resource 45 semaphore control register" rbitfld.long 0x19C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x19C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1A0 "RCC_R46CIDCFGR,RCC resource 46 CID configuration register" hexmask.long.byte 0x1A0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1A0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1A0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1A0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1A4 "RCC_R46SEMCR,RCC resource 46 semaphore control register" rbitfld.long 0x1A4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1A4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1A8 "RCC_R47CIDCFGR,RCC resource 47 CID configuration register" hexmask.long.byte 0x1A8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1A8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1A8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1A8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1AC "RCC_R47SEMCR,RCC resource 47 semaphore control register" rbitfld.long 0x1AC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1AC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1B0 "RCC_R48CIDCFGR,RCC resource 48 CID configuration register" hexmask.long.byte 0x1B0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1B0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1B0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1B0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1B4 "RCC_R48SEMCR,RCC resource 48 semaphore control register" rbitfld.long 0x1B4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1B4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1B8 "RCC_R49CIDCFGR,RCC resource 49 CID configuration register" hexmask.long.byte 0x1B8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1B8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1B8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1B8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1BC "RCC_R49SEMCR,RCC resource 49 semaphore control register" rbitfld.long 0x1BC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1BC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1C0 "RCC_R50CIDCFGR,RCC resource 50 CID configuration register" hexmask.long.byte 0x1C0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1C0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1C0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1C4 "RCC_R50SEMCR,RCC resource 50 semaphore control register" rbitfld.long 0x1C4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1C8 "RCC_R51CIDCFGR,RCC resource 51 CID configuration register" hexmask.long.byte 0x1C8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1C8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1C8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1CC "RCC_R51SEMCR,RCC resource 51 semaphore control register" rbitfld.long 0x1CC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1CC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1D0 "RCC_R52CIDCFGR,RCC resource 52 CID configuration register" hexmask.long.byte 0x1D0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1D0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1D0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1D0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1D4 "RCC_R52SEMCR,RCC resource 52 semaphore control register" rbitfld.long 0x1D4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1D4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1D8 "RCC_R53CIDCFGR,RCC resource 53 CID configuration register" hexmask.long.byte 0x1D8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1D8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1D8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1D8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1DC "RCC_R53SEMCR,RCC resource 53 semaphore control register" rbitfld.long 0x1DC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1DC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1E0 "RCC_R54CIDCFGR,RCC resource 54 CID configuration register" hexmask.long.byte 0x1E0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1E0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1E0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1E0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1E4 "RCC_R54SEMCR,RCC resource 54 semaphore control register" rbitfld.long 0x1E4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1E4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1E8 "RCC_R55CIDCFGR,RCC resource 55 CID configuration register" hexmask.long.byte 0x1E8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1E8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1E8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1E8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1EC "RCC_R55SEMCR,RCC resource 55 semaphore control register" rbitfld.long 0x1EC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1EC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1F0 "RCC_R56CIDCFGR,RCC resource 56 CID configuration register" hexmask.long.byte 0x1F0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1F0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1F0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1F0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1F4 "RCC_R56SEMCR,RCC resource 56 semaphore control register" rbitfld.long 0x1F4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1F4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x1F8 "RCC_R57CIDCFGR,RCC resource 57 CID configuration register" hexmask.long.byte 0x1F8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x1F8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1F8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1F8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x1FC "RCC_R57SEMCR,RCC resource 57 semaphore control register" rbitfld.long 0x1FC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x1FC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x200 "RCC_R58CIDCFGR,RCC resource 58 CID configuration register" hexmask.long.byte 0x200 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x200 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x200 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x200 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x204 "RCC_R58SEMCR,RCC resource 58 semaphore control register" rbitfld.long 0x204 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x204 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x208 "RCC_R59CIDCFGR,RCC resource 59 CID configuration register" hexmask.long.byte 0x208 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x208 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x208 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x208 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x20C "RCC_R59SEMCR,RCC resource 59 semaphore control register" rbitfld.long 0x20C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x20C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x210 "RCC_R60CIDCFGR,RCC resource 60 CID configuration register" hexmask.long.byte 0x210 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x210 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x210 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x210 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x214 "RCC_R60SEMCR,RCC resource 60 semaphore control register" rbitfld.long 0x214 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x214 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x218 "RCC_R61CIDCFGR,RCC resource 61 CID configuration register" hexmask.long.byte 0x218 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x218 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x218 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x218 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x21C "RCC_R61SEMCR,RCC resource 61 semaphore control register" rbitfld.long 0x21C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x21C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x220 "RCC_R62CIDCFGR,RCC resource 62 CID configuration register" hexmask.long.byte 0x220 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x220 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x220 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x220 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x224 "RCC_R62SEMCR,RCC resource 62 semaphore control register" rbitfld.long 0x224 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x224 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x228 "RCC_R63CIDCFGR,RCC resource 63 CID configuration register" hexmask.long.byte 0x228 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x228 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x228 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x228 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x22C "RCC_R63SEMCR,RCC resource 63 semaphore control register" rbitfld.long 0x22C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x22C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x230 "RCC_R64CIDCFGR,RCC resource 64 CID configuration register" hexmask.long.byte 0x230 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x230 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x230 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x230 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x234 "RCC_R64SEMCR,RCC resource 64 semaphore control register" rbitfld.long 0x234 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x234 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x238 "RCC_R65CIDCFGR,RCC resource 65 CID configuration register" hexmask.long.byte 0x238 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x238 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x238 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x238 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x23C "RCC_R65SEMCR,RCC resource 65 semaphore control register" rbitfld.long 0x23C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x23C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x240 "RCC_R66CIDCFGR,RCC resource 66 CID configuration register" hexmask.long.byte 0x240 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x240 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x240 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x240 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x244 "RCC_R66SEMCR,RCC resource 66 semaphore control register" rbitfld.long 0x244 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x244 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x248 "RCC_R67CIDCFGR,RCC resource 67 CID configuration register" hexmask.long.byte 0x248 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x248 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x248 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x248 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x24C "RCC_R67SEMCR,RCC resource 67 semaphore control register" rbitfld.long 0x24C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x24C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x250 "RCC_R68CIDCFGR,RCC resource 68 CID configuration register" hexmask.long.byte 0x250 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x250 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x250 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x250 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x254 "RCC_R68SEMCR,RCC resource 68 semaphore control register" rbitfld.long 0x254 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x254 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x258 "RCC_R69CIDCFGR,RCC resource 69 CID configuration register" hexmask.long.byte 0x258 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x258 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x258 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x258 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x25C "RCC_R69SEMCR,RCC resource 69 semaphore control register" rbitfld.long 0x25C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x25C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x260 "RCC_R70CIDCFGR,RCC resource 70 CID configuration register" hexmask.long.byte 0x260 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x260 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x260 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x260 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x264 "RCC_R70SEMCR,RCC resource 70 semaphore control register" rbitfld.long 0x264 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x264 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x268 "RCC_R71CIDCFGR,RCC resource 71 CID configuration register" hexmask.long.byte 0x268 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x268 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x268 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x268 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x26C "RCC_R71SEMCR,RCC resource 71 semaphore control register" rbitfld.long 0x26C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x26C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x270 "RCC_R72CIDCFGR,RCC resource 72 CID configuration register" hexmask.long.byte 0x270 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x270 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x270 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x270 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x274 "RCC_R72SEMCR,RCC resource 72 semaphore control register" rbitfld.long 0x274 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x274 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x278 "RCC_R73CIDCFGR,RCC resource 73 CID configuration register" hexmask.long.byte 0x278 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x278 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x278 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x278 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x27C "RCC_R73SEMCR,RCC resource 73 semaphore control register" rbitfld.long 0x27C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x27C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x280 "RCC_R74CIDCFGR,RCC resource 74 CID configuration register" hexmask.long.byte 0x280 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x280 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x280 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x280 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x284 "RCC_R74SEMCR,RCC resource 74 semaphore control register" rbitfld.long 0x284 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x284 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x288 "RCC_R75CIDCFGR,RCC resource 75 CID configuration register" hexmask.long.byte 0x288 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x288 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x288 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x288 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x28C "RCC_R75SEMCR,RCC resource 75 semaphore control register" rbitfld.long 0x28C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x28C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x290 "RCC_R76CIDCFGR,RCC resource 76 CID configuration register" hexmask.long.byte 0x290 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x290 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x290 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x290 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x294 "RCC_R76SEMCR,RCC resource 76 semaphore control register" rbitfld.long 0x294 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x294 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x298 "RCC_R77CIDCFGR,RCC resource 77 CID configuration register" hexmask.long.byte 0x298 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x298 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x298 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x298 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x29C "RCC_R77SEMCR,RCC resource 77 semaphore control register" rbitfld.long 0x29C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x29C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2A0 "RCC_R78CIDCFGR,RCC resource 78 CID configuration register" hexmask.long.byte 0x2A0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2A0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2A0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2A0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2A4 "RCC_R78SEMCR,RCC resource 78 semaphore control register" rbitfld.long 0x2A4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2A4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2A8 "RCC_R79CIDCFGR,RCC resource 79 CID configuration register" hexmask.long.byte 0x2A8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2A8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2A8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2A8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2AC "RCC_R79SEMCR,RCC resource 79 semaphore control register" rbitfld.long 0x2AC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2AC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2B0 "RCC_R80CIDCFGR,RCC resource 80 CID configuration register" hexmask.long.byte 0x2B0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2B0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2B0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2B0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2B4 "RCC_R80SEMCR,RCC resource 80 semaphore control register" rbitfld.long 0x2B4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2B4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2B8 "RCC_R81CIDCFGR,RCC resource 81 CID configuration register" hexmask.long.byte 0x2B8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2B8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2B8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2B8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2BC "RCC_R81SEMCR,RCC resource 81 semaphore control register" rbitfld.long 0x2BC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2BC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2C0 "RCC_R82CIDCFGR,RCC resource 82 CID configuration register" hexmask.long.byte 0x2C0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2C0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2C0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2C4 "RCC_R82SEMCR,RCC resource 82 semaphore control register" rbitfld.long 0x2C4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2C8 "RCC_R83CIDCFGR,RCC resource 83 CID configuration register" hexmask.long.byte 0x2C8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2C8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2C8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2CC "RCC_R83SEMCR,RCC resource 83 semaphore control register" rbitfld.long 0x2CC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2CC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2D0 "RCC_R84CIDCFGR,RCC resource 84 CID configuration register" hexmask.long.byte 0x2D0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2D0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2D0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2D0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2D4 "RCC_R84SEMCR,RCC resource 84 semaphore control register" rbitfld.long 0x2D4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2D4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2D8 "RCC_R85CIDCFGR,RCC resource 85 CID configuration register" hexmask.long.byte 0x2D8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2D8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2D8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2D8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2DC "RCC_R85SEMCR,RCC resource 85 semaphore control register" rbitfld.long 0x2DC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2DC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2E0 "RCC_R86CIDCFGR,RCC resource 86 CID configuration register" hexmask.long.byte 0x2E0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2E0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2E0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2E0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2E4 "RCC_R86SEMCR,RCC resource 86 semaphore control register" rbitfld.long 0x2E4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2E4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2E8 "RCC_R87CIDCFGR,RCC resource 87 CID configuration register" hexmask.long.byte 0x2E8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2E8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2E8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2E8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2EC "RCC_R87SEMCR,RCC resource 87 semaphore control register" rbitfld.long 0x2EC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2EC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2F0 "RCC_R88CIDCFGR,RCC resource 88 CID configuration register" hexmask.long.byte 0x2F0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2F0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2F0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2F0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2F4 "RCC_R88SEMCR,RCC resource 88 semaphore control register" rbitfld.long 0x2F4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2F4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x2F8 "RCC_R89CIDCFGR,RCC resource 89 CID configuration register" hexmask.long.byte 0x2F8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x2F8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2F8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2F8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x2FC "RCC_R89SEMCR,RCC resource 89 semaphore control register" rbitfld.long 0x2FC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x2FC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x300 "RCC_R90CIDCFGR,RCC resource 90 CID configuration register" hexmask.long.byte 0x300 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x300 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x300 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x300 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x304 "RCC_R90SEMCR,RCC resource 90 semaphore control register" rbitfld.long 0x304 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x304 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x308 "RCC_R91CIDCFGR,RCC resource 91 CID configuration register" hexmask.long.byte 0x308 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x308 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x308 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x308 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x30C "RCC_R91SEMCR,RCC resource 91 semaphore control register" rbitfld.long 0x30C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x30C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x310 "RCC_R92CIDCFGR,RCC resource 92 CID configuration register" hexmask.long.byte 0x310 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x310 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x310 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x310 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x314 "RCC_R92SEMCR,RCC resource 92 semaphore control register" rbitfld.long 0x314 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x314 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x318 "RCC_R93CIDCFGR,RCC resource 93 CID configuration register" hexmask.long.byte 0x318 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x318 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x318 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x318 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x31C "RCC_R93SEMCR,RCC resource 93 semaphore control register" rbitfld.long 0x31C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x31C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x320 "RCC_R94CIDCFGR,RCC resource 94 CID configuration register" hexmask.long.byte 0x320 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x320 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x320 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x320 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x324 "RCC_R94SEMCR,RCC resource 94 semaphore control register" rbitfld.long 0x324 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x324 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x328 "RCC_R95CIDCFGR,RCC resource 95 CID configuration register" hexmask.long.byte 0x328 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x328 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x328 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x328 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x32C "RCC_R95SEMCR,RCC resource 95 semaphore control register" rbitfld.long 0x32C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x32C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x330 "RCC_R96CIDCFGR,RCC resource 96 CID configuration register" hexmask.long.byte 0x330 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x330 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x330 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x330 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x334 "RCC_R96SEMCR,RCC resource 96 semaphore control register" rbitfld.long 0x334 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x334 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x338 "RCC_R97CIDCFGR,RCC resource 97 CID configuration register" hexmask.long.byte 0x338 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x338 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x338 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x338 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x33C "RCC_R97SEMCR,RCC resource 97 semaphore control register" rbitfld.long 0x33C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x33C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x340 "RCC_R98CIDCFGR,RCC resource 98 CID configuration register" hexmask.long.byte 0x340 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x340 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x340 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x340 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x344 "RCC_R98SEMCR,RCC resource 98 semaphore control register" rbitfld.long 0x344 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x344 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x348 "RCC_R99CIDCFGR,RCC resource 99 CID configuration register" hexmask.long.byte 0x348 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x348 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x348 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x348 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x34C "RCC_R99SEMCR,RCC resource 99 semaphore control register" rbitfld.long 0x34C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x34C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x350 "RCC_R100CIDCFGR,RCC resource 100 CID configuration register" hexmask.long.byte 0x350 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x350 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x350 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x350 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x354 "RCC_R100SEMCR,RCC resource 100 semaphore control register" rbitfld.long 0x354 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x354 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x358 "RCC_R101CIDCFGR,RCC resource 101 CID configuration register" hexmask.long.byte 0x358 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x358 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x358 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x358 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x35C "RCC_R101SEMCR,RCC resource 101 semaphore control register" rbitfld.long 0x35C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x35C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x360 "RCC_R102CIDCFGR,RCC resource 102 CID configuration register" hexmask.long.byte 0x360 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x360 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x360 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x360 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x364 "RCC_R102SEMCR,RCC resource 102 semaphore control register" rbitfld.long 0x364 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x364 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x368 "RCC_R103CIDCFGR,RCC resource 103 CID configuration register" hexmask.long.byte 0x368 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x368 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x368 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x368 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x36C "RCC_R103SEMCR,RCC resource 103 semaphore control register" rbitfld.long 0x36C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x36C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x370 "RCC_R104CIDCFGR,RCC resource 104 CID configuration register" hexmask.long.byte 0x370 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x370 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x370 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x370 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x374 "RCC_R104SEMCR,RCC resource 104 semaphore control register" rbitfld.long 0x374 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x374 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x378 "RCC_R105CIDCFGR,RCC resource 105 CID configuration register" hexmask.long.byte 0x378 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x378 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x378 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x378 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x37C "RCC_R105SEMCR,RCC resource 105 semaphore control register" rbitfld.long 0x37C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x37C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x380 "RCC_R106CIDCFGR,RCC resource 106 CID configuration register" hexmask.long.byte 0x380 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x380 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x380 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x380 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x384 "RCC_R106SEMCR,RCC resource 106 semaphore control register" rbitfld.long 0x384 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x384 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x388 "RCC_R107CIDCFGR,RCC resource 107 CID configuration register" hexmask.long.byte 0x388 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x388 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x388 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x388 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x38C "RCC_R107SEMCR,RCC resource 107 semaphore control register" rbitfld.long 0x38C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x38C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x390 "RCC_R108CIDCFGR,RCC resource 108 CID configuration register" hexmask.long.byte 0x390 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x390 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x390 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x390 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x394 "RCC_R108SEMCR,RCC resource 108 semaphore control register" rbitfld.long 0x394 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x394 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x398 "RCC_R109CIDCFGR,RCC resource 109 CID configuration register" hexmask.long.byte 0x398 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x398 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x398 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x398 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x39C "RCC_R109SEMCR,RCC resource 109 semaphore control register" rbitfld.long 0x39C 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x39C 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x3A0 "RCC_R110CIDCFGR,RCC resource 110 CID configuration register" hexmask.long.byte 0x3A0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x3A0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x3A0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3A0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x3A4 "RCC_R110SEMCR,RCC resource 110 semaphore control register" rbitfld.long 0x3A4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x3A4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x3A8 "RCC_R111CIDCFGR,RCC resource 111 CID configuration register" hexmask.long.byte 0x3A8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x3A8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x3A8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3A8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x3AC "RCC_R111SEMCR,RCC resource 111 semaphore control register" rbitfld.long 0x3AC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x3AC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x3B0 "RCC_R112CIDCFGR,RCC resource 112 CID configuration register" hexmask.long.byte 0x3B0 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x3B0 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x3B0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3B0 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x3B4 "RCC_R112SEMCR,RCC resource 112 semaphore control register" rbitfld.long 0x3B4 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x3B4 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" line.long 0x3B8 "RCC_R113CIDCFGR,RCC resource 113 CID configuration register" hexmask.long.byte 0x3B8 16.--23. 1. "SEMWLC,Semaphore white-list for compartment y" bitfld.long 0x3B8 4.--6. "SCID,Static compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x3B8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3B8 0. "CFEN,Static CID filter enable" "B_0x0,B_0x1" line.long 0x3BC "RCC_R113SEMCR,RCC resource 113 semaphore control register" rbitfld.long 0x3BC 4.--6. "SEMCID,Semaphore compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x3BC 0. "SEM_MUTEX,Semaphore mutex" "B_0x0,B_0x1" group.long 0x400++0x47 line.long 0x0 "RCC_GRSTCSETR,RCC global reset control set register" bitfld.long 0x0 0. "SYSRST,System reset" "B_0x0,B_0x1" line.long 0x4 "RCC_C1RSTCSETR,RCC CPU1 reset control set register" bitfld.long 0x4 0. "C1RST,CPU1 reset" "B_0x0,B_0x1" line.long 0x8 "RCC_C1P1RSTCSETR,RCC CPU1 processor core 1 reset control set register" bitfld.long 0x8 1. "C1P1RST,CPU1 processor core 1 reset" "B_0x0,B_0x1" bitfld.long 0x8 0. "C1P1PORRST,CPU1 processor core 1 power-on reset" "B_0x0,B_0x1" line.long 0xC "RCC_C2RSTCSETR,RCC CPU2 reset control set register" bitfld.long 0xC 0. "C2RST,CPU2 reset" "B_0x0,B_0x1" line.long 0x10 "RCC_HWRSTSCLRR,RCC hardware reset status clear register" bitfld.long 0x10 14. "RETECCFAILRESTRSTF,RETRAM ECC failure reset flag during system restoration phase" "B_0x0,B_0x1" bitfld.long 0x10 13. "RETECCFAILCRCRSTF,RETRAM ECC failure reset flag during the CRC computation phase" "B_0x0,B_0x1" bitfld.long 0x10 12. "RETCRCERRRSTF,RETRAM CRC error reset flag" "B_0x0,B_0x1" bitfld.long 0x10 11. "IWDG5SYSRSTF,IWDG5 system reset flag" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "IWDG4SYSRSTF,IWDG4 system reset flag" "B_0x0,B_0x1" bitfld.long 0x10 9. "IWDG3SYSRSTF,IWDG3 system reset flag" "B_0x0,B_0x1" bitfld.long 0x10 8. "IWDG2SYSRSTF,IWDG2 system reset flag" "B_0x0,B_0x1" bitfld.long 0x10 7. "IWDG1SYSRSTF,IWDG1 system reset flag" "B_0x0,B_0x1" newline bitfld.long 0x10 6. "SYSC2RSTF,CPU2 system reset flag" "B_0x0,B_0x1" bitfld.long 0x10 5. "SYSC1RSTF,CPU1 system reset flag" "B_0x0,B_0x1" bitfld.long 0x10 4. "VCORERSTF,Vless thansub>DDCOREless than/sub> reset flag" "B_0x0,B_0x1" bitfld.long 0x10 3. "HCSSRSTF,HSE CSS reset flag" "B_0x0,B_0x1" newline bitfld.long 0x10 2. "PADRSTF,NRST reset flag" "B_0x0,B_0x1" bitfld.long 0x10 1. "BORRSTF,BOR reset flag" "B_0x0,B_0x1" bitfld.long 0x10 0. "PORRSTF,POR/PDR reset flag" "B_0x0,B_0x1" line.long 0x14 "RCC_C1HWRSTSCLRR,RCC CPU1 hardware reset status clear register" bitfld.long 0x14 2. "C1P1RSTF,CPU1 processor core 1 reset flag" "B_0x0,B_0x1" bitfld.long 0x14 1. "C1RSTF,CPU1 reset flag" "B_0x0,B_0x1" bitfld.long 0x14 0. "VCPURSTF,Vless thansub>DDCPUless than/sub> reset flag" "B_0x0,B_0x1" line.long 0x18 "RCC_C2HWRSTSCLRR,RCC CPU2 hardware reset status clear register" bitfld.long 0x18 0. "C2RSTF,CPU2 reset flag" "B_0x0,B_0x1" line.long 0x1C "RCC_C1BOOTRSTSSETR,RCC CPU1 boot reset status set register" bitfld.long 0x1C 23. "D2STBYRSTF,D2 DStandby reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 22. "D1STBYRSTF,D1 DStandby reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 20. "STBYC1RSTF,CPU1 system Standby reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 19. "RETECCFAILRESTRSTF,RETRAM ECC failure reset flag during system restoration phase" "B_0x0,B_0x1" newline bitfld.long 0x1C 18. "RETECCFAILCRCRSTF,RETRAM ECC failure reset flag during the CRC computation phase" "B_0x0,B_0x1" bitfld.long 0x1C 17. "RETCRCERRRSTF,RETRAM CRC error reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 16. "C1P1RSTF,CPU1 processor core 1 reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 13. "C1RSTF,CPU1 reset flag" "B_0x0,B_0x1" newline bitfld.long 0x1C 12. "IWDG5SYSRSTF,IWDG5 system reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 11. "IWDG4SYSRSTF,IWDG4 system reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 10. "IWDG3SYSRSTF,IWDG3 system reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 9. "IWDG2SYSRSTF,IWDG2 system reset flag" "B_0x0,B_0x1" newline bitfld.long 0x1C 8. "IWDG1SYSRSTF,IWDG1 system reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 7. "SYSC2RSTF,CPU2 system reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SYSC1RSTF,CPU1 system reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 5. "VCPURSTF,Vless thansub>DDCPUless than/sub> reset flag" "B_0x0,B_0x1" newline bitfld.long 0x1C 4. "VCORERSTF,Vless thansub>DDCOREless than/sub> reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 3. "HCSSRSTF,HSE CSS reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PADRSTF,NRST reset flag" "B_0x0,B_0x1" bitfld.long 0x1C 1. "BORRSTF,BOR reset flag" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PORRSTF,POR/PDR reset flag" "B_0x0,B_0x1" line.long 0x20 "RCC_C1BOOTRSTSCLRR,RCC CPU1 boot reset status clear register" bitfld.long 0x20 23. "D2STBYRSTF,D2 DStandby reset flag" "B_0x0,B_0x1" bitfld.long 0x20 22. "D1STBYRSTF,D1 DStandby reset flag" "B_0x0,B_0x1" bitfld.long 0x20 20. "STBYC1RSTF,CPU1 system Standby reset flag" "B_0x0,B_0x1" bitfld.long 0x20 19. "RETECCFAILRESTRSTF,RETRAM ECC failure reset flag during system restoration phase" "B_0x0,B_0x1" newline bitfld.long 0x20 18. "RETECCFAILCRCRSTF,RETRAM ECC failure reset flag during the CRC computation phase" "B_0x0,B_0x1" bitfld.long 0x20 17. "RETCRCERRRSTF,RETRAM CRC error reset flag" "B_0x0,B_0x1" bitfld.long 0x20 16. "C1P1RSTF,CPU1 processor core 1 reset flag" "B_0x0,B_0x1" bitfld.long 0x20 13. "C1RSTF,CPU1 reset flag" "B_0x0,B_0x1" newline bitfld.long 0x20 12. "IWDG5SYSRSTF,IWDG5 system reset flag" "B_0x0,B_0x1" bitfld.long 0x20 11. "IWDG4SYSRSTF,IWDG4 system reset flag" "B_0x0,B_0x1" bitfld.long 0x20 10. "IWDG3SYSRSTF,IWDG3 system reset flag" "B_0x0,B_0x1" bitfld.long 0x20 9. "IWDG2SYSRSTF,IWDG2 system reset flag" "B_0x0,B_0x1" newline bitfld.long 0x20 8. "IWDG1SYSRSTF,IWDG1 system reset flag" "B_0x0,B_0x1" bitfld.long 0x20 7. "SYSC2RSTF,CPU2 system reset flag" "B_0x0,B_0x1" bitfld.long 0x20 6. "SYSC1RSTF,CPU1 system reset flag" "B_0x0,B_0x1" bitfld.long 0x20 5. "VCPURSTF,Vless thansub>DDCPUless than/sub> reset flag" "B_0x0,B_0x1" newline bitfld.long 0x20 4. "VCORERSTF,Vless thansub>DDCOREless than/sub> reset flag" "B_0x0,B_0x1" bitfld.long 0x20 3. "HCSSRSTF,HSE CSS reset flag" "B_0x0,B_0x1" bitfld.long 0x20 2. "PADRSTF,NRST reset flag" "B_0x0,B_0x1" bitfld.long 0x20 1. "BORRSTF,BOR reset flag" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PORRSTF,POR/PDR reset flag" "B_0x0,B_0x1" line.long 0x24 "RCC_C2BOOTRSTSSETR,RCC CPU2 boot reset status set register" bitfld.long 0x24 23. "D2STBYRSTF,D2 DStandby reset flag" "B_0x0,B_0x1" bitfld.long 0x24 21. "STBYC2RSTF,CPU2 system Standby reset flag" "B_0x0,B_0x1" bitfld.long 0x24 19. "RETECCFAILRESTRSTF,RETRAM ECC failure reset flag during system restoration phase" "B_0x0,B_0x1" bitfld.long 0x24 18. "RETECCFAILCRCRSTF,RETRAM ECC failure reset flag during the CRC computation phase" "B_0x0,B_0x1" newline bitfld.long 0x24 17. "RETCRCERRRSTF,RETRAM CRC error reset flag" "B_0x0,B_0x1" bitfld.long 0x24 14. "C2RSTF,CPU2 reset flag" "B_0x0,B_0x1" bitfld.long 0x24 12. "IWDG5SYSRSTF,IWDG5 system reset flag" "B_0x0,B_0x1" bitfld.long 0x24 11. "IWDG4SYSRSTF,IWDG4 system reset flag" "B_0x0,B_0x1" newline bitfld.long 0x24 10. "IWDG3SYSRSTF,IWDG3 system reset flag" "B_0x0,B_0x1" bitfld.long 0x24 9. "IWDG2SYSRSTF,IWDG2 system reset flag" "B_0x0,B_0x1" bitfld.long 0x24 8. "IWDG1SYSRSTF,IWDG1 system reset flag" "B_0x0,B_0x1" bitfld.long 0x24 7. "SYSC2RSTF,CPU2 system reset flag" "B_0x0,B_0x1" newline bitfld.long 0x24 6. "SYSC1RSTF,CPU1 system reset flag" "B_0x0,B_0x1" bitfld.long 0x24 4. "VCORERSTF,Vless thansub>DDCOREless than/sub> reset flag" "B_0x0,B_0x1" bitfld.long 0x24 3. "HCSSRSTF,HSE CSS reset flag" "B_0x0,B_0x1" bitfld.long 0x24 2. "PADRSTF,NRST reset flag" "B_0x0,B_0x1" newline bitfld.long 0x24 1. "BORRSTF,BOR reset flag" "B_0x0,B_0x1" bitfld.long 0x24 0. "PORRSTF,POR/PDR reset flag" "B_0x0,B_0x1" line.long 0x28 "RCC_C2BOOTRSTSCLRR,RCC CPU2 boot reset status clear register" bitfld.long 0x28 23. "D2STBYRSTF,D2 DStandby reset flag" "B_0x0,B_0x1" bitfld.long 0x28 21. "STBYC2RSTF,CPU2 system Standby reset flag" "B_0x0,B_0x1" bitfld.long 0x28 19. "RETECCFAILRESTRSTF,RETRAM ECC failure reset flag during system restoration phase" "B_0x0,B_0x1" bitfld.long 0x28 18. "RETECCFAILCRCRSTF,RETRAM ECC failure reset flag during the CRC computation phase" "B_0x0,B_0x1" newline bitfld.long 0x28 17. "RETCRCERRRSTF,RETRAM CRC error reset flag" "B_0x0,B_0x1" bitfld.long 0x28 14. "C2RSTF,CPU2 reset flag" "B_0x0,B_0x1" bitfld.long 0x28 12. "IWDG5SYSRSTF,IWDG5 reset flag" "B_0x0,B_0x1" bitfld.long 0x28 11. "IWDG4SYSRSTF,IWDG4 reset flag" "B_0x0,B_0x1" newline bitfld.long 0x28 10. "IWDG3SYSRSTF,IWDG3 reset flag" "B_0x0,B_0x1" bitfld.long 0x28 9. "IWDG2SYSRSTF,IWDG2 reset flag" "B_0x0,B_0x1" bitfld.long 0x28 8. "IWDG1SYSRSTF,IWDG1 system reset flag" "B_0x0,B_0x1" bitfld.long 0x28 7. "SYSC2RSTF,CPU2 system reset flag" "B_0x0,B_0x1" newline bitfld.long 0x28 6. "SYSC1RSTF,CPU1 system reset flag" "B_0x0,B_0x1" bitfld.long 0x28 4. "VCORERSTF,Vless thansub>DDCOREless than/sub> reset flag" "B_0x0,B_0x1" bitfld.long 0x28 3. "HCSSRSTF,HSE CSS reset flag" "B_0x0,B_0x1" bitfld.long 0x28 2. "PADRSTF,NRST reset flag" "B_0x0,B_0x1" newline bitfld.long 0x28 1. "BORRSTF,BOR reset flag" "B_0x0,B_0x1" bitfld.long 0x28 0. "PORRSTF,POR/PDR reset flag" "B_0x0,B_0x1" line.long 0x2C "RCC_C1SREQSETR,RCC CPU1 stop request set register" bitfld.long 0x2C 16. "ESLPREQ,Enhanced CSleep request for CPU1 subsystem" "B_0x0,B_0x1" bitfld.long 0x2C 1. "STPREQ_P1,Stop request for CPU1 processor core 1" "B_0x0,B_0x1" bitfld.long 0x2C 0. "STPREQ_P0,Stop request for CPU1 processor core 0" "B_0x0,B_0x1" line.long 0x30 "RCC_C1SREQCLRR,RCC CPU1 stop request clear register" bitfld.long 0x30 16. "ESLPREQ,Enhanced CSleep request for CPU1 subsystem" "B_0x0,B_0x1" bitfld.long 0x30 1. "STPREQ_P1,Stop request for CPU1 processor core 1" "B_0x0,B_0x1" bitfld.long 0x30 0. "STPREQ_P0,Stop request for CPU1 processor core 0" "B_0x0,B_0x1" line.long 0x34 "RCC_CPUBOOTCR,RCC CPU boot control register" bitfld.long 0x34 1. "BOOT_CPU1,CPU1 boot" "B_0x0,B_0x1" bitfld.long 0x34 0. "BOOT_CPU2,CPU2 to boot" "B_0x0,B_0x1" line.long 0x38 "RCC_STBYBOOTCR,RCC standby boot control register" bitfld.long 0x38 8. "RET_CRCERR_RSTEN,RETRAM CRC error system reset enable" "B_0x0,B_0x1" rbitfld.long 0x38 5. "CPU1_HW_BEN,CPU1 hardware boot enable" "B_0x0,B_0x1" rbitfld.long 0x38 4. "CPU2_HW_BEN,CPU2 hardware boot enable" "B_0x0,B_0x1" bitfld.long 0x38 2. "COLD_CPU2,CPU2 cold boot" "B_0x0,B_0x1" newline bitfld.long 0x38 1. "CPU_BEN_SEL,CPU boot select" "B_0x0,B_0x1" line.long 0x3C "RCC_LEGBOOTCR,RCC legacy boot control register" bitfld.long 0x3C 0. "LEGACY_BEN,Enable of the legacy selection mode to choose the first CPU to boot" "B_0x0,B_0x1" line.long 0x40 "RCC_BDCR,RCC backup domain control register" bitfld.long 0x40 31. "VSWRST,Vless thansub>SWless than/sub> domain software reset" "B_0x0,B_0x1" bitfld.long 0x40 25. "C3SYSTICKSEL,CPU3 SysTick clock select" "B_0x0,B_0x1" bitfld.long 0x40 24. "MSIFREQSEL,MSI frequency selection" "B_0x0,B_0x1" bitfld.long 0x40 20. "RTCCKEN,RTC clock enable" "B_0x0,B_0x1" newline bitfld.long 0x40 16.--17. "RTCSRC,RTC clock source selection" "B_0x0,B_0x1,B_0x2,B_0x3" rbitfld.long 0x40 10. "LSIRDY,LSI oscillator ready" "B_0x0,B_0x1" bitfld.long 0x40 9. "LSION,LSI oscillator enabled" "B_0x0,B_0x1" rbitfld.long 0x40 8. "LSECSSD,LSE CSS failure detection" "B_0x0,B_0x1" newline bitfld.long 0x40 7. "LSEGFON,LSE clock glitch filter enable" "B_0x0,B_0x1" bitfld.long 0x40 6. "LSECSSON,LSE CSS enable" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "LSEDRV,LSE oscillator driving capability" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x40 3. "LSEDIGBYP,LSE digital bypass" "B_0x0,B_0x1" newline rbitfld.long 0x40 2. "LSERDY,LSE oscillator ready" "B_0x0,B_0x1" bitfld.long 0x40 1. "LSEBYP,LSE oscillator bypass" "B_0x0,B_0x1" bitfld.long 0x40 0. "LSEON,LSE oscillator enable" "B_0x0,B_0x1" line.long 0x44 "RCC_D3DCR,RCC D3 domain control register" bitfld.long 0x44 16.--17. "D3PERCKSEL,D3 peripheral local bus clock select" "B_0x0,B_0x1,B_0x2,?" rbitfld.long 0x44 2. "MSIRDY,MSI clock ready flag" "B_0x0,B_0x1" bitfld.long 0x44 1. "MSIKERON,Set by software to force the MSI on even in Stop mode in order to be quickly available as kernel clock for some peripherals." "B_0x0,B_0x1" bitfld.long 0x44 0. "MSION,MSI oscillator enable" "B_0x0,B_0x1" rgroup.long 0x448++0x3 line.long 0x0 "RCC_D3DSR,RCC D3 domain status register" bitfld.long 0x0 0.--1. "D3STATE,D3 domain state" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x44C++0x57 line.long 0x0 "RCC_RDCR,RCC reset duration control register" hexmask.long.byte 0x0 24.--27. 1. "EADLY,External access delays" hexmask.long.byte 0x0 16.--20. 1. "MRD,Minimum reset duration" line.long 0x4 "RCC_C1MSRDCR,RCC C1MS reset delay control register" bitfld.long 0x4 8. "C1MSRST,Trigger low-level pulse on NRSTC1MS pin" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--4. 1. "C1MSRD,Minimum Standby reset duration" line.long 0x8 "RCC_PWRLPDLYCR,RCC PWR_LP delay control register" bitfld.long 0x8 24. "CPU2TMPSKP,Skip of PWR_LP delay for CPU2" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--21. 1. "PWRLP_DLY,PWR_LP delay value" line.long 0xC "RCC_C1CIESETR,RCC CPU1 clock source interrupt enable set register" bitfld.long 0xC 20. "WKUPIE,CPU1 wake-up from CStop interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 16. "LSECSSIE,LSE clock security system interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 12. "PLL8RDYIE,PLL8 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 11. "PLL7RDYIE,PLL7 ready interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0xC 10. "PLL6RDYIE,PLL6 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 9. "PLL5RDYIE,PLL5 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "PLL4RDYIE,PLL4 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 7. "PLL3RDYIE,PLL3 ready interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0xC 6. "PLL2RDYIE,PLL2 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 5. "PLL1RDYIE,PLL1 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 4. "MSIRDYIE,MSI ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 3. "HSERDYIE,HSE ready interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0xC 2. "HSIRDYIE,HSI ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 1. "LSERDYIE,LSE ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "LSIRDYIE,LSI ready interrupt enable" "B_0x0,B_0x1" line.long 0x10 "RCC_C1CIFCLRR,RCC CPU1 clock source interrupt flag clear register" bitfld.long 0x10 20. "WKUPF,CPU1 wake-up from CStop interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 16. "LSECSSF,LSE CSS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 12. "PLL8RDYF,PLL8 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 11. "PLL7RDYF,PLL7 ready interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x10 10. "PLL6RDYF,PLL6 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 9. "PLL5RDYF,PLL5 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 8. "PLL4RDYF,PLL4 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 7. "PLL3RDYF,PLL3 ready interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x10 6. "PLL2RDYF,PLL2 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 5. "PLL1RDYF,PLL1 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 4. "MSIRDYF,MSI ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 3. "HSERDYF,HSE ready interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x10 2. "HSIRDYF,HSI ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 1. "LSERDYF,LSE ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x10 0. "LSIRDYF,LSI ready interrupt flag" "B_0x0,B_0x1" line.long 0x14 "RCC_C2CIESETR,RCC CPU2 clock source interrupt enable set register" bitfld.long 0x14 20. "WKUPIE,CPU2 wake-up from CStop Interrupt Enable" "B_0x0,B_0x1" bitfld.long 0x14 16. "LSECSSIE,LSE CSS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 12. "PLL8RDYIE,PLL8 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 11. "PLL7RDYIE,PLL7 ready interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x14 10. "PLL6RDYIE,PLL6 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 9. "PLL5RDYIE,PLL5 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 8. "PLL4RDYIE,PLL4 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 7. "PLL3RDYIE,PLL3 ready interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x14 6. "PLL2RDYIE,PLL2 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 5. "PLL1RDYIE,PLL1 ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 4. "MSIRDYIE,MSI ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 3. "HSERDYIE,HSE ready interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x14 2. "HSIRDYIE,HSI ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 1. "LSERDYIE,LSE ready interrupt enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "LSIRDYIE,LSI ready interrupt enable" "B_0x0,B_0x1" line.long 0x18 "RCC_C2CIFCLRR,RCC CPU2 clock source interrupt flag clear register" bitfld.long 0x18 20. "WKUPF,CPU2 wake-up from CStop interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 16. "LSECSSF,LSE clock security system interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 12. "PLL8RDYF,PLL8 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 11. "PLL7RDYF,PLL7 ready interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x18 10. "PLL6RDYF,PLL6 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 9. "PLL5RDYF,PLL5 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 8. "PLL4RDYF,PLL4 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 7. "PLL3RDYF,PLL3 ready interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x18 6. "PLL2RDYF,PLL2 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 5. "PLL1RDYF,PLL1 ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 4. "MSIRDYF,MSI ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 3. "HSERDYF,HSE ready interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x18 2. "HSIRDYF,HSI ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 1. "LSERDYF,LSE ready interrupt flag" "B_0x0,B_0x1" bitfld.long 0x18 0. "LSIRDYF,LSI ready interrupt flag" "B_0x0,B_0x1" line.long 0x1C "RCC_IWDGC1FZSETR,RCC IWDG CPU1 clock freeze set register" bitfld.long 0x1C 1. "FZ_IWDG2,Freeze of IWDG2 clock" "B_0x0,B_0x1" bitfld.long 0x1C 0. "FZ_IWDG1,Freeze of IWDG1 clock" "B_0x0,B_0x1" line.long 0x20 "RCC_IWDGC1FZCLRR,RCC IWDG CPU1 clock freeze clear register" bitfld.long 0x20 1. "FZ_IWDG2,Unfreeze IWDG2 clock" "B_0x0,B_0x1" bitfld.long 0x20 0. "FZ_IWDG1,Unfreeze IWDG1 clock" "B_0x0,B_0x1" line.long 0x24 "RCC_IWDGC1CFGSETR,RCC IWDG CPU1 configuration set register" bitfld.long 0x24 18. "IWDG2_KERRST,IWDG2 kernel reset" "B_0x0,B_0x1" bitfld.long 0x24 2. "IWDG2_SYSRSTEN,Enable of IWDG2 timeout event to reset the application" "B_0x0,B_0x1" bitfld.long 0x24 0. "IWDG1_SYSRSTEN,Enable of IWDG1 timeout event to reset the application" "B_0x0,B_0x1" line.long 0x28 "RCC_IWDGC1CFGCLRR,RCC IWDG CPU1 configuration clear register" bitfld.long 0x28 18. "IWDG2_KERRST,IWDG2 kernel reset" "B_0x0,B_0x1" bitfld.long 0x28 2. "IWDG2_SYSRSTEN,Clear of IWDG2 timeout event to reset the application" "B_0x0,B_0x1" bitfld.long 0x28 0. "IWDG1_SYSRSTEN,Clear of IWDG1 timeout event to reset the application" "B_0x0,B_0x1" line.long 0x2C "RCC_IWDGC2FZSETR,RCC IWDG CPU2 clock freeze set register" bitfld.long 0x2C 1. "FZ_IWDG4,Freeze of IWDG4 clock" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FZ_IWDG3,Freeze of IWDG3 clock" "B_0x0,B_0x1" line.long 0x30 "RCC_IWDGC2FZCLRR,RCC IWDG CPU2 clock freeze clear register" bitfld.long 0x30 1. "FZ_IWDG4,Unfreeze of IWDG4 clock" "B_0x0,B_0x1" bitfld.long 0x30 0. "FZ_IWDG3,Unfreeze of IWDG3 clock" "B_0x0,B_0x1" line.long 0x34 "RCC_IWDGC2CFGSETR,RCC IWDG CPU2 configuration set register" bitfld.long 0x34 18. "IWDG4_KERRST,IWDG4 kernel reset" "B_0x0,B_0x1" bitfld.long 0x34 2. "IWDG4_SYSRSTEN,Enable of IWDG4 timeout event to reset the application" "B_0x0,B_0x1" bitfld.long 0x34 0. "IWDG3_SYSRSTEN,Enable of IWDG3 timeout event to reset the application" "B_0x0,B_0x1" line.long 0x38 "RCC_IWDGC2CFGCLRR,RCC IWDG CPU2 configuration clear register" bitfld.long 0x38 18. "IWDG4_KERRST,IWDG4 kernel reset" "B_0x0,B_0x1" bitfld.long 0x38 2. "IWDG4_SYSRSTEN,Clear of IWDG4 timeout event to reset the application" "B_0x0,B_0x1" bitfld.long 0x38 0. "IWDG3_SYSRSTEN,Clear of IWDG3 timeout event to reset the application" "B_0x0,B_0x1" line.long 0x3C "RCC_IWDGC3CFGSETR,RCC IWDG CPU3 configuration set register" bitfld.long 0x3C 0. "IWDG5_SYSRSTEN,Enable of IWDG5 timeout event to reset the application" "B_0x0,B_0x1" line.long 0x40 "RCC_IWDGC3CFGCLRR,RCC IWDG CPU3 configuration clear register" bitfld.long 0x40 0. "IWDG5_SYSRSTEN,Clear of IWDG5 timeout event to reset the application" "B_0x0,B_0x1" line.long 0x44 "RCC_C3CFGR,RCC CPU3 configuration register" bitfld.long 0x44 27. "I3C4C3EN,I3C4 allocation to CPU3 enable" "B_0x0,B_0x1" bitfld.long 0x44 26. "RTCC3EN,RTC allocation to CPU3 enable" "B_0x0,B_0x1" bitfld.long 0x44 25. "LPDMAC3EN,LPDMA1 allocation to CPU3 enable" "B_0x0,B_0x1" bitfld.long 0x44 24. "GPIOZC3EN,GPIOZ allocation to CPU3 enable" "B_0x0,B_0x1" newline bitfld.long 0x44 23. "ADF1C3EN,ADF1 allocation to CPU3 enable" "B_0x0,B_0x1" bitfld.long 0x44 21. "I2C8C3EN,I2C8 allocation to CPU3 enable" "B_0x0,B_0x1" bitfld.long 0x44 20. "LPUART1C3EN,LPUART1 allocation to CPU3 enable" "B_0x0,B_0x1" bitfld.long 0x44 19. "SPI8C3EN,SPI8 allocation to CPU3 enable" "B_0x0,B_0x1" newline bitfld.long 0x44 18. "LPTIM5C3EN,LPTIM5 allocation to CPU3 enable" "B_0x0,B_0x1" bitfld.long 0x44 17. "LPTIM4C3EN,LPTIM4 allocation to CPU3 enable" "B_0x0,B_0x1" bitfld.long 0x44 16. "LPTIM3C3EN,LPTIM3 allocation to CPU3 enable" "B_0x0,B_0x1" bitfld.long 0x44 3. "C3AMEN,CPU3 autonomous clock mode enable" "B_0x0,B_0x1" newline bitfld.long 0x44 2. "C3LPEN,CPU3 peripheral clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x44 1. "C3EN,CPU3 peripheral clocks enable" "B_0x0,B_0x1" bitfld.long 0x44 0. "C3RST,CPU3 reset" "B_0x0,B_0x1" line.long 0x48 "RCC_MCO1CFGR,RCC MCO1 configuration register" bitfld.long 0x48 8. "MCO1ON,Control of MCO1 output" "B_0x0,B_0x1" bitfld.long 0x48 0. "MCO1SEL,MCO1 clock output selection" "B_0x0,B_0x1" line.long 0x4C "RCC_MCO2CFGR,RCC MCO2 configuration register" bitfld.long 0x4C 8. "MCO2ON,Control of the MCO2 output" "B_0x0,B_0x1" bitfld.long 0x4C 0. "MCO2SEL,MCO2 clock output selection" "B_0x0,B_0x1" line.long 0x50 "RCC_OCENSETR,RCC oscillator clock enable set register" bitfld.long 0x50 11. "HSECSSON,HSECSSON bit set" "B_0x0,B_0x1" bitfld.long 0x50 10. "HSEBYP,HSEBYP bit set" "B_0x0,B_0x1" bitfld.long 0x50 9. "HSEKERON,HSEKERON bit set" "B_0x0,B_0x1" bitfld.long 0x50 8. "HSEON,HSEON bit set" "B_0x0,B_0x1" newline bitfld.long 0x50 7. "HSEDIGBYP,HSEDIGBYP bit set" "B_0x0,B_0x1" bitfld.long 0x50 6. "HSEDIV2BYP,HSEDIV2BYP bit set" "B_0x0,B_0x1" bitfld.long 0x50 5. "HSEDIV2ON,HSEDIV2ON bit set" "B_0x0,B_0x1" bitfld.long 0x50 1. "HSIKERON,HSIKERON bit set" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "HSION,HSION bit set" "B_0x0,B_0x1" line.long 0x54 "RCC_OCENCLRR,RCC oscillator clock enable clear register" bitfld.long 0x54 10. "HSEBYP,HSEBYP bit clear" "B_0x0,B_0x1" bitfld.long 0x54 9. "HSEKERON,HSEKERON bit clear" "B_0x0,B_0x1" bitfld.long 0x54 8. "HSEON,HSEON bit clear" "B_0x0,B_0x1" bitfld.long 0x54 7. "HSEDIGBYP,HSEDIGBYP bit clear" "B_0x0,B_0x1" newline bitfld.long 0x54 6. "HSEDIV2BYP,HSEDIV2BYP bit clear" "B_0x0,B_0x1" bitfld.long 0x54 5. "HSEDIV2ON,HSEDIV2ON bit clear" "B_0x0,B_0x1" bitfld.long 0x54 1. "HSIKERON,HSIKERON bit clear" "B_0x0,B_0x1" bitfld.long 0x54 0. "HSION,HSION bit clear" "B_0x0,B_0x1" rgroup.long 0x4A4++0x3 line.long 0x0 "RCC_OCRDYR,RCC oscillator clock ready register" bitfld.long 0x0 25. "CKREST,Clock restore state machine status" "B_0x0,B_0x1" bitfld.long 0x0 8. "HSERDY,HSE clock ready flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "HSIRDY,HSI clock ready flag" "B_0x0,B_0x1" group.long 0x4A8++0x43 line.long 0x0 "RCC_HSICFGR,RCC HSI configuration register" hexmask.long.word 0x0 16.--24. 1. "HSICAL,HSI clock calibration" hexmask.long.byte 0x0 8.--14. 1. "HSITRIM,HSI clock trimming" line.long 0x4 "RCC_MSICFGR,RCC MSI configuration register" hexmask.long.byte 0x4 16.--23. 1. "MSICAL,MSI clock calibration" hexmask.long.byte 0x4 8.--12. 1. "MSITRIM,MSI clock trimming" line.long 0x8 "RCC_RTCDIVR,RCC RTC clock divider register" hexmask.long.byte 0x8 0.--5. 1. "RTCDIV,HSE division factor for RTC clock" line.long 0xC "RCC_APB1DIVR,RCC APB1 clock divider register" rbitfld.long 0xC 31. "APB1DIVRDY,APB1 clock prescaler status" "B_0x0,B_0x1" bitfld.long 0xC 0.--2. "APB1DIV,APB1 clock divider" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x10 "RCC_APB2DIVR,RCC APB2 clock divider register" rbitfld.long 0x10 31. "APB2DIVRDY,APB2 clock prescaler status" "B_0x0,B_0x1" bitfld.long 0x10 0.--2. "APB2DIV,APB2 clock divider" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x14 "RCC_APB3DIVR,RCC APB3 clock divider register" rbitfld.long 0x14 31. "APB3DIVRDY,APB3 clock prescaler status" "B_0x0,B_0x1" bitfld.long 0x14 0.--2. "APB3DIV,APB3 clock divider" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x18 "RCC_APB4DIVR,RCC APB4 clock divider register" rbitfld.long 0x18 31. "APB4DIVRDY,APB4 clock divider status" "B_0x0,B_0x1" bitfld.long 0x18 0.--2. "APB4DIV,APB4 clock divider" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x1C "RCC_APBDBGDIVR,RCC APBDBG clock divider register" rbitfld.long 0x1C 31. "APBDBGDIVRDY,APBDBG clock divider status" "B_0x0,B_0x1" bitfld.long 0x1C 0.--2. "APBDBGDIV,APBDBG clock divider" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0x20 "RCC_TIMG1PRER,RCC TIM group 1 prescaler register" rbitfld.long 0x20 31. "TIMG1PRERDY,Clock prescaler status for timers of group 1" "B_0x0,B_0x1" bitfld.long 0x20 0. "TIMG1PRE,Clock prescaler selection for timers of group 1" "B_0x0,B_0x1" line.long 0x24 "RCC_TIMG2PRER,RCC TIM group 2 prescaler register" rbitfld.long 0x24 31. "TIMG2PRERDY,Clock prescaler status for timers of group 2" "B_0x0,B_0x1" bitfld.long 0x24 0. "TIMG2PRE,Clock prescaler selection for timers of group 2" "B_0x0,B_0x1" line.long 0x28 "RCC_LSMCUDIVR,RCC LSMCU clock divider register" rbitfld.long 0x28 31. "LSMCUDIVRDY,LSMCU clock divider status" "B_0x0,B_0x1" bitfld.long 0x28 0. "LSMCUDIV,LSMCU clock divider" "B_0x0,B_0x1" line.long 0x2C "RCC_DDRCPCFGR,RCC DDRC AXI port configuration register" bitfld.long 0x2C 2. "DDRCPLPEN,DDRC AXI port clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x2C 1. "DDRCPEN,DDRC AXI port clock enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "DDRCPRST,DDRC AXI port reset" "B_0x0,B_0x1" line.long 0x30 "RCC_DDRCAPBCFGR,RCC DDRC APB configuration register" bitfld.long 0x30 2. "DDRCAPBLPEN,DDRC APB clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x30 1. "DDRCAPBEN,DDRC APB clock enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "DDRCAPBRST,DDRC APB reset" "B_0x0,B_0x1" line.long 0x34 "RCC_DDRPHYCAPBCFGR,RCC DDRPHYC APB configuration register" bitfld.long 0x34 2. "DDRPHYCAPBLPEN,DDRPHYC APB clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x34 1. "DDRPHYCAPBEN,DDRPHYC APB clock enable" "B_0x0,B_0x1" bitfld.long 0x34 0. "DDRPHYCAPBRST,DDRPHYC APB reset" "B_0x0,B_0x1" line.long 0x38 "RCC_DDRPHYCCFGR,RCC DDRPHYC configuration register" bitfld.long 0x38 1. "DDRPHYCEN,DDRPHYC kernel clock enable" "B_0x0,B_0x1" line.long 0x3C "RCC_DDRCFGR,RCC DDR configuration register" bitfld.long 0x3C 2. "DDRCFGLPEN,DDR APB configuration clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x3C 1. "DDRCFGEN,DDR APB configuration clock enable" "B_0x0,B_0x1" bitfld.long 0x3C 0. "DDRCFGRST,DDR APB configuration reset" "B_0x0,B_0x1" line.long 0x40 "RCC_DDRITFCFGR,RCC DDR interface configuration register" bitfld.long 0x40 16. "DDRPHYDLP,DDRPHY deep low-power mode (LP2 or LP3)" "B_0x0,B_0x1" bitfld.long 0x40 8. "DDRSHR,DDR peripheral mode" "B_0x0,B_0x1" bitfld.long 0x40 4.--5. "DDRCKMOD,RCC mode for DDR clock control" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x40 0. "DDRRST,DDR core and PHY reset" "B_0x0,B_0x1" group.long 0x4F0++0x3B line.long 0x0 "RCC_SYSRAMCFGR,RCC SYSRAM configuration register" bitfld.long 0x0 2. "SYSRAMLPEN,SYSRAM clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "SYSRAMEN,SYSRAM clock enable" "B_0x0,B_0x1" line.long 0x4 "RCC_VDERAMCFGR,RCC VDERAM configuration register" bitfld.long 0x4 2. "VDERAMLPEN,VDERAM clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "VDERAMEN,VDERAM clock enable" "B_0x0,B_0x1" line.long 0x8 "RCC_SRAM1CFGR,RCC SRAM1 configuration register" bitfld.long 0x8 2. "SRAM1LPEN,SRAM1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "SRAM1EN,SRAM1 clock enable" "B_0x0,B_0x1" line.long 0xC "RCC_SRAM2CFGR,RCC SRAM2 configuration register" bitfld.long 0xC 2. "SRAM2LPEN,SRAM2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC 1. "SRAM2EN,SRAM2 clock enable" "B_0x0,B_0x1" line.long 0x10 "RCC_RETRAMCFGR,RCC RETRAM configuration register" bitfld.long 0x10 2. "RETRAMLPEN,RETRAM clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x10 1. "RETRAMEN,RETRAM clock enable" "B_0x0,B_0x1" line.long 0x14 "RCC_BKPSRAMCFGR,RCC BKPSRAM configuration register" bitfld.long 0x14 2. "BKPSRAMLPEN,BKPSRAM clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x14 1. "BKPSRAMEN,BKPSRAM clock enable" "B_0x0,B_0x1" line.long 0x18 "RCC_LPSRAM1CFGR,RCC LPSRAM1 configuration register" bitfld.long 0x18 3. "LPSRAM1AMEN,LPSRAM1 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x18 2. "LPSRAM1LPEN,LPSRAM1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x18 1. "LPSRAM1EN,LPSRAM1 clock enable" "B_0x0,B_0x1" line.long 0x1C "RCC_LPSRAM2CFGR,RCC LPSRAM2 configuration register" bitfld.long 0x1C 3. "LPSRAM2AMEN,LPSRAM2 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x1C 2. "LPSRAM2LPEN,LPSRAM2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x1C 1. "LPSRAM2EN,LPSRAM2 clock enable" "B_0x0,B_0x1" line.long 0x20 "RCC_LPSRAM3CFGR,RCC LPSRAM3 configuration register" bitfld.long 0x20 3. "LPSRAM3AMEN,LPSRAM3 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x20 2. "LPSRAM3LPEN,LPSRAM3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x20 1. "LPSRAM3EN,LPSRAM3 clock enable" "B_0x0,B_0x1" line.long 0x24 "RCC_OSPI1CFGR,RCC OCTOSPI1 configuration register" bitfld.long 0x24 16. "OSPI1DLLRST,OCTOSPI1 DLL reset" "B_0x0,B_0x1" bitfld.long 0x24 8. "OTFDEC1RST,OTFDEC1 reset" "B_0x0,B_0x1" bitfld.long 0x24 2. "OSPI1LPEN,OCTOSPI1 OTFDEC1 and OCTOSPI1 delay (DLYBOSPI1) clock enable duringCSleep" "B_0x0,B_0x1" bitfld.long 0x24 1. "OSPI1EN,OCTOSPI1 and OTFDEC1 clock enable" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "OSPI1RST,OCTOSPI1 reset" "B_0x0,B_0x1" line.long 0x28 "RCC_OSPI2CFGR,RCC OCTOSPI2 configuration register" bitfld.long 0x28 16. "OSPI2DLLRST,OCTOSPI2 DLL reset" "B_0x0,B_0x1" bitfld.long 0x28 8. "OTFDEC2RST,OTFDEC2 reset" "B_0x0,B_0x1" bitfld.long 0x28 2. "OSPI2LPEN,OCTOSPI2 and OTFDEC2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x28 1. "OSPI2EN,OCTOSPI2 and OTFDEC2 clock enable" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "OSPI2RST,OCTOSPI2 reset" "B_0x0,B_0x1" line.long 0x2C "RCC_FMCCFGR,RCC FMC configuration register" bitfld.long 0x2C 2. "FMCLPEN,FMC clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x2C 1. "FMCEN,FMC clock enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "FMCRST,FMC reset" "B_0x0,B_0x1" line.long 0x30 "RCC_DBGCFGR,RCC debug configuration register" bitfld.long 0x30 12. "DBGRST,Debug function reset" "B_0x0,B_0x1" bitfld.long 0x30 9. "TRACEEN,Clock enable for trace port interface" "B_0x0,B_0x1" bitfld.long 0x30 8. "DBGEN,Debug function clock enable" "B_0x0,B_0x1" line.long 0x34 "RCC_STMCFGR,RCC STM configuration register" bitfld.long 0x34 2. "STMLPEN,STM clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x34 1. "STMEN,STM clock enable" "B_0x0,B_0x1" line.long 0x38 "RCC_ETRCFGR,RCC ETR configuration register" bitfld.long 0x38 2. "ETRLPEN,ETR clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x38 1. "ETREN,ETR clocks enable" "B_0x0,B_0x1" group.long 0x558++0x23 line.long 0x0 "RCC_GPIOZCFGR,RCC GPIOZ configuration register" bitfld.long 0x0 3. "GPIOZAMEN,GPIOZ autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "GPIOZLPEN,GPIOZ clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "GPIOZEN,GPIOZ clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "GPIOZRST,GPIOZ reset" "B_0x0,B_0x1" line.long 0x4 "RCC_HPDMA1CFGR,RCC HPDMA1 configuration register" bitfld.long 0x4 2. "HPDMA1LPEN,HPDMA1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "HPDMA1EN,HPDMA1 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "HPDMA1RST,HPDMA1 reset" "B_0x0,B_0x1" line.long 0x8 "RCC_HPDMA2CFGR,RCC HPDMA2 configuration register" bitfld.long 0x8 2. "HPDMA2LPEN,HPDMA2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "HPDMA2EN,HPDMA2 clock enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "HPDMA2RST,HPDMA2 reset" "B_0x0,B_0x1" line.long 0xC "RCC_HPDMA3CFGR,RCC HPDMA3 configuration register" bitfld.long 0xC 2. "HPDMA3LPEN,HPDMA3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC 1. "HPDMA3EN,HPDMA3 clock enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "HPDMA3RST,HPDMA3 reset" "B_0x0,B_0x1" line.long 0x10 "RCC_LPDMACFGR,RCC LPDMA1 configuration register" bitfld.long 0x10 3. "LPDMAAMEN,LPDMA1 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "LPDMALPEN,LPDMA1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x10 1. "LPDMAEN,LPDMA1 clock enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "LPDMARST,LPDMA1 reset" "B_0x0,B_0x1" line.long 0x14 "RCC_HSEMCFGR,RCC HSEM configuration register" bitfld.long 0x14 3. "HSEMAMEN,HSEM autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x14 2. "HSEMLPEN,HSEM clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x14 1. "HSEMEN,HSEM clock enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "HSEMRST,HSEM reset" "B_0x0,B_0x1" line.long 0x18 "RCC_IPCC1CFGR,RCC IPCC1 configuration register" bitfld.long 0x18 2. "IPCC1LPEN,IPCC1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x18 1. "IPCC1EN,IPCC1 clock enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "IPCC1RST,IPCC1 reset" "B_0x0,B_0x1" line.long 0x1C "RCC_IPCC2CFGR,RCC IPCC2 configuration register" bitfld.long 0x1C 3. "IPCC2AMEN,IPCC2 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x1C 2. "IPCC2LPEN,IPCC2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x1C 1. "IPCC2EN,IPCC2 clock enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "IPCC2RST,IPCC2 reset" "B_0x0,B_0x1" line.long 0x20 "RCC_RTCCFGR,RCC RTC configuration register" bitfld.long 0x20 3. "RTCAMEN,RTC autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x20 2. "RTCLPEN,RTC bus clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x20 1. "RTCEN,RTC bus clock enable" "B_0x0,B_0x1" group.long 0x580++0x7 line.long 0x0 "RCC_SYSCPU1CFGR,RCC SYSCPU1 configuration register" bitfld.long 0x0 2. "SYSCPU1LPEN,CPU1 system configuration clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "SYSCPU1EN,CPU1 system configuration clock enable" "B_0x0,B_0x1" line.long 0x4 "RCC_BSECCFGR,RCC BSEC configuration register" bitfld.long 0x4 2. "BSECLPEN,BSEC clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "BSECEN,BSEC clock enable" "B_0x0,B_0x1" group.long 0x590++0x13 line.long 0x0 "RCC_PLL2CFGR1,RCC PLL2 configuration register 1" bitfld.long 0x0 28. "CKREFST,PLLx reference clock state" "B_0x0,B_0x1" rbitfld.long 0x0 24. "PLLRDY,PLLx clock ready flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "PLLEN,PLLx enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SSMODRST,PLLx spread-spectrum modulator reset" "B_0x0,B_0x1" line.long 0x4 "RCC_PLL2CFGR2,RCC PLL2 configuration register 2" hexmask.long.word 0x4 16.--27. 1. "FBDIV,PLLx VCO multiplication factor" hexmask.long.byte 0x4 0.--5. 1. "FREFDIV,PLLx reference input clock divide frequency ratio" line.long 0x8 "RCC_PLL2CFGR3,RCC PLL2 configuration register 3" bitfld.long 0x8 26. "SSCGDIS,PLLx spread-spectrum modulator enable" "B_0x0,B_0x1" bitfld.long 0x8 25. "DACEN,PLLx noise canceling DAC enable in fractional mode" "B_0x0,B_0x1" bitfld.long 0x8 24. "DOWNSPREAD,PLLx VCO frequency modulation mode" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--23. 1. "FRACIN,Fractional part of PLLx VCO multiplication factor" line.long 0xC "RCC_PLL2CFGR4,RCC PLL2 configuration register 4" bitfld.long 0xC 10. "BYPASS,PLLx FOUTPOSTDIV bypass" "B_0x0,B_0x1" bitfld.long 0xC 9. "FOUTPOSTDIVEN,PLLx output and post divider enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "DSMEN,PLLx delta-sigma modulator enable" "B_0x0,B_0x1" line.long 0x10 "RCC_PLL2CFGR5,RCC PLL2 configuration register 5" hexmask.long.byte 0x10 16.--20. 1. "SPREAD,Modulation depth adjustment for PLLx" hexmask.long.byte 0x10 0.--3. 1. "DIVVAL,Modulation frequency adjustment for PLLx" group.long 0x5A8++0x7 line.long 0x0 "RCC_PLL2CFGR6,RCC PLL2 configuration register 6" bitfld.long 0x0 0.--2. "POSTDIV1,PLLx VCO frequency divide level 1" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" line.long 0x4 "RCC_PLL2CFGR7,RCC PLL2 configuration register 7" bitfld.long 0x4 0.--2. "POSTDIV2,PLLx VCO frequency divide level 2" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" group.long 0x5B8++0x13 line.long 0x0 "RCC_PLL3CFGR1,RCC PLL3 configuration register 1" bitfld.long 0x0 28. "CKREFST,PLLx reference clock state" "B_0x0,B_0x1" rbitfld.long 0x0 24. "PLLRDY,PLLx clock ready flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "PLLEN,PLLx enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SSMODRST,PLLx spread-spectrum modulator reset" "B_0x0,B_0x1" line.long 0x4 "RCC_PLL3CFGR2,RCC PLL3 configuration register 2" hexmask.long.word 0x4 16.--27. 1. "FBDIV,PLLx VCO multiplication factor" hexmask.long.byte 0x4 0.--5. 1. "FREFDIV,PLLx reference input clock divide frequency ratio" line.long 0x8 "RCC_PLL3CFGR3,RCC PLL3 configuration register 3" bitfld.long 0x8 26. "SSCGDIS,PLLx spread-spectrum modulator enable" "B_0x0,B_0x1" bitfld.long 0x8 25. "DACEN,PLLx noise canceling DAC enable in fractional mode" "B_0x0,B_0x1" bitfld.long 0x8 24. "DOWNSPREAD,PLLx VCO frequency modulation mode" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--23. 1. "FRACIN,Fractional part of PLLx VCO multiplication factor" line.long 0xC "RCC_PLL3CFGR4,RCC PLL3 configuration register 4" bitfld.long 0xC 10. "BYPASS,PLLx FOUTPOSTDIV bypass" "B_0x0,B_0x1" bitfld.long 0xC 9. "FOUTPOSTDIVEN,PLLx output and post divider enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "DSMEN,PLLx delta-sigma modulator enable" "B_0x0,B_0x1" line.long 0x10 "RCC_PLL3CFGR5,RCC PLL3 configuration register 5" hexmask.long.byte 0x10 16.--20. 1. "SPREAD,Modulation depth adjustment for PLLx" hexmask.long.byte 0x10 0.--3. 1. "DIVVAL,Modulation frequency adjustment for PLLx" group.long 0x5D0++0x7 line.long 0x0 "RCC_PLL3CFGR6,RCC PLL3 configuration register 6" bitfld.long 0x0 0.--2. "POSTDIV1,PLLx VCO frequency divide level 1" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" line.long 0x4 "RCC_PLL3CFGR7,RCC PLL3 configuration register 7" bitfld.long 0x4 0.--2. "POSTDIV2,PLLx VCO frequency divide level 2" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" group.long 0x5E0++0x3 line.long 0x0 "RCC_HSIFMONCR,RCC HSI frequency monitoring control register" bitfld.long 0x0 31. "HSIMONF,HSI clock period monitor interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 30. "HSIMONIE,HSI clock period monitor interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--21. 1. "HSIDEV,HSI clock count deviation value" bitfld.long 0x0 15. "HSIMONEN,HSI clock period monitor enable" "B_0x0,B_0x1" newline hexmask.long.word 0x0 0.--10. 1. "HSIREF,HSI clock count reference value" rgroup.long 0x5E4++0x3 line.long 0x0 "RCC_HSIFVALR,RCC HSI frequency value register" hexmask.long.word 0x0 0.--10. 1. "HSIVAL,HSI clock-cycle counter value" group.long 0x700++0xD3 line.long 0x0 "RCC_TIM1CFGR,RCC TIM1 configuration register" bitfld.long 0x0 2. "TIM1LPEN,TIM1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "TIM1EN,TIM1 clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "TIM1RST,TIM1 reset" "B_0x0,B_0x1" line.long 0x4 "RCC_TIM2CFGR,RCC TIM2 configuration register" bitfld.long 0x4 2. "TIM2LPEN,TIM2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "TIM2EN,TIM2 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "TIM2RST,TIM2 reset" "B_0x0,B_0x1" line.long 0x8 "RCC_TIM3CFGR,RCC TIM3 configuration register" bitfld.long 0x8 2. "TIM3LPEN,TIM3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "TIM3EN,TIM3 clock enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "TIM3RST,TIM3 reset" "B_0x0,B_0x1" line.long 0xC "RCC_TIM4CFGR,RCC TIM4 configuration register" bitfld.long 0xC 2. "TIM4LPEN,TIM4 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC 1. "TIM4EN,TIM4 clock enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "TIM4RST,TIM4 reset" "B_0x0,B_0x1" line.long 0x10 "RCC_TIM5CFGR,RCC TIM5 configuration register" bitfld.long 0x10 2. "TIM5LPEN,TIM5 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x10 1. "TIM5EN,TIM5 clock enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "TIM5RST,TIM5 reset" "B_0x0,B_0x1" line.long 0x14 "RCC_TIM6CFGR,RCC TIM6 configuration register" bitfld.long 0x14 2. "TIM6LPEN,TIM6 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x14 1. "TIM6EN,TIM6 clock enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "TIM6RST,TIM6 reset" "B_0x0,B_0x1" line.long 0x18 "RCC_TIM7CFGR,RCC TIM7 configuration register" bitfld.long 0x18 2. "TIM7LPEN,TIM7 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x18 1. "TIM7EN,TIM7 clock enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "TIM7RST,TIM7 reset" "B_0x0,B_0x1" line.long 0x1C "RCC_TIM8CFGR,RCC TIM8 configuration register" bitfld.long 0x1C 2. "TIM8LPEN,TIM8 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x1C 1. "TIM8EN,TIM8 clock enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "TIM8RST,TIM8 reset" "B_0x0,B_0x1" line.long 0x20 "RCC_TIM10CFGR,RCC TIM10 configuration register" bitfld.long 0x20 2. "TIM10LPEN,TIM10 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x20 1. "TIM10EN,TIM10 clock enable" "B_0x0,B_0x1" bitfld.long 0x20 0. "TIM10RST,TIM10 reset" "B_0x0,B_0x1" line.long 0x24 "RCC_TIM11CFGR,RCC TIM11 configuration register" bitfld.long 0x24 2. "TIM11LPEN,TIM11 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x24 1. "TIM11EN,TIM11 clock enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "TIM11RST,TIM11 reset" "B_0x0,B_0x1" line.long 0x28 "RCC_TIM12CFGR,RCC TIM12 configuration register" bitfld.long 0x28 2. "TIM12LPEN,TIM12 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x28 1. "TIM12EN,TIM12 clock enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "TIM12RST,TIM12 reset" "B_0x0,B_0x1" line.long 0x2C "RCC_TIM13CFGR,RCC TIM13 configuration register" bitfld.long 0x2C 2. "TIM13LPEN,TIM13 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x2C 1. "TIM13EN,TIM13 clock enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "TIM13RST,TIM13 reset" "B_0x0,B_0x1" line.long 0x30 "RCC_TIM14CFGR,RCC TIM14 configuration register" bitfld.long 0x30 2. "TIM14LPEN,TIM14 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x30 1. "TIM14EN,TIM14 clock enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "TIM14RST,TIM14 reset" "B_0x0,B_0x1" line.long 0x34 "RCC_TIM15CFGR,RCC TIM15 configuration register" bitfld.long 0x34 2. "TIM15LPEN,TIM15 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x34 1. "TIM15EN,TIM15 clock enable" "B_0x0,B_0x1" bitfld.long 0x34 0. "TIM15RST,TIM15 reset" "B_0x0,B_0x1" line.long 0x38 "RCC_TIM16CFGR,RCC TIM16 configuration register" bitfld.long 0x38 2. "TIM16LPEN,TIM16 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x38 1. "TIM16EN,TIM16 clock enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "TIM16RST,TIM16 reset" "B_0x0,B_0x1" line.long 0x3C "RCC_TIM17CFGR,RCC TIM17 configuration register" bitfld.long 0x3C 2. "TIM17LPEN,TIM17 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x3C 1. "TIM17EN,TIM17 clock enable" "B_0x0,B_0x1" bitfld.long 0x3C 0. "TIM17RST,TIM17 reset" "B_0x0,B_0x1" line.long 0x40 "RCC_TIM20CFGR,RCC TIM20 configuration register" bitfld.long 0x40 2. "TIM20LPEN,TIM20 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x40 1. "TIM20EN,TIM20 clock enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "TIM20RST,TIM20 reset" "B_0x0,B_0x1" line.long 0x44 "RCC_LPTIM1CFGR,RCC LPTIM1 configuration register" bitfld.long 0x44 2. "LPTIM1LPEN,LPTIM1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x44 1. "LPTIM1EN,LPTIM1 clock enable" "B_0x0,B_0x1" bitfld.long 0x44 0. "LPTIM1RST,LPTIM1 reset" "B_0x0,B_0x1" line.long 0x48 "RCC_LPTIM2CFGR,RCC LPTIM2 configuration register" bitfld.long 0x48 2. "LPTIM2LPEN,LPTIM2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x48 1. "LPTIM2EN,LPTIM2 clock enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "LPTIM2RST,LPTIM2 reset" "B_0x0,B_0x1" line.long 0x4C "RCC_LPTIM3CFGR,RCC LPTIM3 configuration register" bitfld.long 0x4C 3. "LPTIM3AMEN,LPTIM3 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x4C 2. "LPTIM3LPEN,LPTIM3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4C 1. "LPTIM3EN,LPTIM3 clock enable" "B_0x0,B_0x1" bitfld.long 0x4C 0. "LPTIM3RST,LPTIM3 reset" "B_0x0,B_0x1" line.long 0x50 "RCC_LPTIM4CFGR,RCC LPTIM4 configuration register" bitfld.long 0x50 3. "LPTIM4AMEN,LPTIM4 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x50 2. "LPTIM4LPEN,LPTIM4 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x50 1. "LPTIM4EN,LPTIM4 clock enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "LPTIM4RST,LPTIM4 reset" "B_0x0,B_0x1" line.long 0x54 "RCC_LPTIM5CFGR,RCC LPTIM5 configuration register" bitfld.long 0x54 3. "LPTIM5AMEN,LPTIM5 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x54 2. "LPTIM5LPEN,LPTIM5 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x54 1. "LPTIM5EN,LPTIM5 clock enable" "B_0x0,B_0x1" bitfld.long 0x54 0. "LPTIM5RST,LPTIM5 reset" "B_0x0,B_0x1" line.long 0x58 "RCC_SPI1CFGR,RCC SPI1 configuration register" bitfld.long 0x58 2. "SPI1LPEN,SPI1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x58 1. "SPI1EN,SPI1 clock enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "SPI1RST,SPI1 reset" "B_0x0,B_0x1" line.long 0x5C "RCC_SPI2CFGR,RCC SPI2 configuration register" bitfld.long 0x5C 2. "SPI2LPEN,SPI2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x5C 1. "SPI2EN,SPI2 clock enable" "B_0x0,B_0x1" bitfld.long 0x5C 0. "SPI2RST,SPI2 reset" "B_0x0,B_0x1" line.long 0x60 "RCC_SPI3CFGR,RCC SPI3 configuration register" bitfld.long 0x60 2. "SPI3LPEN,SPI3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x60 1. "SPI3EN,SPI3 clock enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "SPI3RST,SPI3 reset" "B_0x0,B_0x1" line.long 0x64 "RCC_SPI4CFGR,RCC SPI4 configuration register" bitfld.long 0x64 2. "SPI4LPEN,SPI4 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x64 1. "SPI4EN,SPI4 clock enable" "B_0x0,B_0x1" bitfld.long 0x64 0. "SPI4RST,SPI4 reset" "B_0x0,B_0x1" line.long 0x68 "RCC_SPI5CFGR,RCC SPI5 configuration register" bitfld.long 0x68 2. "SPI5LPEN,SPI5 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x68 1. "SPI5EN,SPI5 clock enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "SPI5RST,SPI5 reset" "B_0x0,B_0x1" line.long 0x6C "RCC_SPI6CFGR,RCC SPI6 configuration register" bitfld.long 0x6C 2. "SPI6LPEN,SPI6 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x6C 1. "SPI6EN,SPI6 clock enable" "B_0x0,B_0x1" bitfld.long 0x6C 0. "SPI6RST,SPI6 reset" "B_0x0,B_0x1" line.long 0x70 "RCC_SPI7CFGR,RCC SPI7 configuration register" bitfld.long 0x70 2. "SPI7LPEN,SPI7 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x70 1. "SPI7EN,SPI7 clock enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "SPI7RST,SPI7 reset" "B_0x0,B_0x1" line.long 0x74 "RCC_SPI8CFGR,RCC SPI8 configuration register" bitfld.long 0x74 3. "SPI8AMEN,SPI8 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x74 2. "SPI8LPEN,SPI8 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x74 1. "SPI8EN,SPI8 clock enable" "B_0x0,B_0x1" bitfld.long 0x74 0. "SPI8RST,SPI8 reset" "B_0x0,B_0x1" line.long 0x78 "RCC_SPDIFRXCFGR,RCC SPDIFRX configuration register" bitfld.long 0x78 2. "SPDIFRXLPEN,SPDIFRX clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x78 1. "SPDIFRXEN,SPDIFRX clock enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "SPDIFRXRST,SPDIFRX reset" "B_0x0,B_0x1" line.long 0x7C "RCC_USART1CFGR,RCC USART1 configuration register" bitfld.long 0x7C 2. "USART1LPEN,USART1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x7C 1. "USART1EN,USART1 clock enable" "B_0x0,B_0x1" bitfld.long 0x7C 0. "USART1RST,USART1 reset" "B_0x0,B_0x1" line.long 0x80 "RCC_USART2CFGR,RCC USART2 configuration register" bitfld.long 0x80 2. "USART2LPEN,USART2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x80 1. "USART2EN,USART2 clock enable" "B_0x0,B_0x1" bitfld.long 0x80 0. "USART2RST,USART2 reset" "B_0x0,B_0x1" line.long 0x84 "RCC_USART3CFGR,RCC USART3 configuration register" bitfld.long 0x84 2. "USART3LPEN,USART3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x84 1. "USART3EN,USART3 clock enable" "B_0x0,B_0x1" bitfld.long 0x84 0. "USART3RST,USART3 reset" "B_0x0,B_0x1" line.long 0x88 "RCC_UART4CFGR,RCC UART4 configuration register" bitfld.long 0x88 2. "UART4LPEN,UART4 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x88 1. "UART4EN,UART4 clock enable" "B_0x0,B_0x1" bitfld.long 0x88 0. "UART4RST,UART4 reset" "B_0x0,B_0x1" line.long 0x8C "RCC_UART5CFGR,RCC UART5 configuration register" bitfld.long 0x8C 2. "UART5LPEN,UART5 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8C 1. "UART5EN,UART5 clock enable" "B_0x0,B_0x1" bitfld.long 0x8C 0. "UART5RST,UART5 reset" "B_0x0,B_0x1" line.long 0x90 "RCC_USART6CFGR,RCC USART6 configuration register" bitfld.long 0x90 2. "USART6LPEN,USART6 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x90 1. "USART6EN,USART6 clock enable" "B_0x0,B_0x1" bitfld.long 0x90 0. "USART6RST,USART6 reset" "B_0x0,B_0x1" line.long 0x94 "RCC_UART7CFGR,RCC UART7 configuration register" bitfld.long 0x94 2. "UART7LPEN,UART7 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x94 1. "UART7EN,UART7 clock enable" "B_0x0,B_0x1" bitfld.long 0x94 0. "UART7RST,UART7 reset" "B_0x0,B_0x1" line.long 0x98 "RCC_UART8CFGR,RCC UART8 configuration register" bitfld.long 0x98 2. "UART8LPEN,UART8 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x98 1. "UART8EN,UART8 clock enable" "B_0x0,B_0x1" bitfld.long 0x98 0. "UART8RST,UART8 reset" "B_0x0,B_0x1" line.long 0x9C "RCC_UART9CFGR,RCC UART9 configuration register" bitfld.long 0x9C 2. "UART9LPEN,UART9 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x9C 1. "UART9EN,UART9 clock enable" "B_0x0,B_0x1" bitfld.long 0x9C 0. "UART9RST,UART9 reset" "B_0x0,B_0x1" line.long 0xA0 "RCC_LPUART1CFGR,RCC LPUART1 configuration register" bitfld.long 0xA0 3. "LPUART1AMEN,LPUART1 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0xA0 2. "LPUART1LPEN,LPUART1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xA0 1. "LPUART1EN,LPUART1 clock enable" "B_0x0,B_0x1" bitfld.long 0xA0 0. "LPUART1RST,LPUART1 reset" "B_0x0,B_0x1" line.long 0xA4 "RCC_I2C1CFGR,RCC I2C1 configuration register" bitfld.long 0xA4 2. "I2C1LPEN,I2C1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xA4 1. "I2C1EN,I2C1 clock enable" "B_0x0,B_0x1" bitfld.long 0xA4 0. "I2C1RST,I2C1 reset" "B_0x0,B_0x1" line.long 0xA8 "RCC_I2C2CFGR,RCC I2C2 configuration register" bitfld.long 0xA8 2. "I2C2LPEN,I2C2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xA8 1. "I2C2EN,I2C2 clock enable" "B_0x0,B_0x1" bitfld.long 0xA8 0. "I2C2RST,I2C2 reset" "B_0x0,B_0x1" line.long 0xAC "RCC_I2C3CFGR,RCC I2C3 configuration register" bitfld.long 0xAC 2. "I2C3LPEN,I2C3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xAC 1. "I2C3EN,I2C3 clock enable" "B_0x0,B_0x1" bitfld.long 0xAC 0. "I2C3RST,I2C3 reset" "B_0x0,B_0x1" line.long 0xB0 "RCC_I2C4CFGR,RCC I2C4 configuration register" bitfld.long 0xB0 2. "I2C4LPEN,I2C4 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xB0 1. "I2C4EN,I2C4 clock enable" "B_0x0,B_0x1" bitfld.long 0xB0 0. "I2C4RST,I2C4 reset" "B_0x0,B_0x1" line.long 0xB4 "RCC_I2C5CFGR,RCC I2C5 configuration register" bitfld.long 0xB4 2. "I2C5LPEN,I2C5 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xB4 1. "I2C5EN,I2C5 clock enable" "B_0x0,B_0x1" bitfld.long 0xB4 0. "I2C5RST,I2C5 reset" "B_0x0,B_0x1" line.long 0xB8 "RCC_I2C6CFGR,RCC I2C6 configuration register" bitfld.long 0xB8 2. "I2C6LPEN,I2C6 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xB8 1. "I2C6EN,I2C6 clock enable" "B_0x0,B_0x1" bitfld.long 0xB8 0. "I2C6RST,I2C6 reset" "B_0x0,B_0x1" line.long 0xBC "RCC_I2C7CFGR,RCC I2C7 configuration register" bitfld.long 0xBC 2. "I2C7LPEN,I2C7 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xBC 1. "I2C7EN,I2C7 clock enable" "B_0x0,B_0x1" bitfld.long 0xBC 0. "I2C7RST,I2C7 reset" "B_0x0,B_0x1" line.long 0xC0 "RCC_I2C8CFGR,RCC I2C8 configuration register" bitfld.long 0xC0 3. "I2C8AMEN,I2C8 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0xC0 2. "I2C8LPEN,I2C8 peripheral clocks enable during CSleep mode" "B_0x0,B_0x1" bitfld.long 0xC0 1. "I2C8EN,I2C8 peripheral clocks enable" "B_0x0,B_0x1" bitfld.long 0xC0 0. "I2C8RST,I2C8 reset" "B_0x0,B_0x1" line.long 0xC4 "RCC_SAI1CFGR,RCC SAI1 configuration register" bitfld.long 0xC4 2. "SAI1LPEN,SAI1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC4 1. "SAI1EN,SAI1 clock enable" "B_0x0,B_0x1" bitfld.long 0xC4 0. "SAI1RST,SAI1 reset" "B_0x0,B_0x1" line.long 0xC8 "RCC_SAI2CFGR,RCC SAI2 configuration register" bitfld.long 0xC8 2. "SAI2LPEN,SAI2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC8 1. "SAI2EN,SAI2 clock enable" "B_0x0,B_0x1" bitfld.long 0xC8 0. "SAI2RST,SAI2 reset" "B_0x0,B_0x1" line.long 0xCC "RCC_SAI3CFGR,RCC SAI3 configuration register" bitfld.long 0xCC 2. "SAI3LPEN,SAI3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xCC 1. "SAI3EN,SAI3 clock enable" "B_0x0,B_0x1" bitfld.long 0xCC 0. "SAI3RST,SAI3 reset" "B_0x0,B_0x1" line.long 0xD0 "RCC_SAI4CFGR,RCC SAI4 configuration register" bitfld.long 0xD0 2. "SAI4LPEN,SAI4 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xD0 1. "SAI4EN,SAI4 clock enable" "B_0x0,B_0x1" bitfld.long 0xD0 0. "SAI4RST,SAI4 reset" "B_0x0,B_0x1" group.long 0x7D8++0x1F line.long 0x0 "RCC_MDF1CFGR,RCC MDF1 configuration register" bitfld.long 0x0 2. "MDF1LPEN,MDF1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "MDF1EN,MDF1 clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "MDF1RST,MDF1 reset" "B_0x0,B_0x1" line.long 0x4 "RCC_ADF1CFGR,RCC ADF1 configuration register" bitfld.long 0x4 3. "ADF1AMEN,ADF1 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "ADF1LPEN,ADF1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "ADF1EN,ADF1 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "ADF1RST,ADF1 reset" "B_0x0,B_0x1" line.long 0x8 "RCC_FDCANCFGR,RCC FDCAN configuration register" bitfld.long 0x8 2. "FDCANLPEN,FDCAN clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "FDCANEN,FDCAN clock enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "FDCANRST,FDCAN reset" "B_0x0,B_0x1" line.long 0xC "RCC_HDPCFGR,RCC HDP configuration register" bitfld.long 0xC 1. "HDPEN,HDP clock enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "HDPRST,HDP reset" "B_0x0,B_0x1" line.long 0x10 "RCC_ADC12CFGR,RCC ADC12 configuration register" bitfld.long 0x10 12. "ADC12KERSEL,ADC12 kernel clock source selection" "B_0x0,B_0x1" bitfld.long 0x10 2. "ADC12LPEN,ADC12 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x10 1. "ADC12EN,ADC12 clock enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "ADC12RST,ADC12 reset" "B_0x0,B_0x1" line.long 0x14 "RCC_ADC3CFGR,RCC ADC3 configuration register" bitfld.long 0x14 12.--13. "ADC3KERSEL,ADC3 kernel clock source select" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x14 2. "ADC3LPEN,ADC3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x14 1. "ADC3EN,ADC3 clock enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "ADC3RST,ADC3 reset" "B_0x0,B_0x1" line.long 0x18 "RCC_ETH1CFGR,RCC Ethernet 1 configuration register" bitfld.long 0x18 11. "ETH1RXLPEN,Ethernet 1 reception clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x18 10. "ETH1RXEN,Ethernet 1 reception clock enable" "B_0x0,B_0x1" bitfld.long 0x18 9. "ETH1TXLPEN,Ethernet 1 transmission clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x18 8. "ETH1TXEN,Ethernet 1 transmission clock enable" "B_0x0,B_0x1" newline bitfld.long 0x18 6. "ETH1LPEN,Ethernet 1 kernel clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x18 5. "ETH1EN,Ethernet 1 kernel clock enable" "B_0x0,B_0x1" bitfld.long 0x18 4. "ETH1STPEN,Ethernet 1 kernel clocks enable during CStop" "B_0x0,B_0x1" bitfld.long 0x18 2. "ETH1MACLPEN,Ethernet 1 bus clock enable during CSleep" "B_0x0,B_0x1" newline bitfld.long 0x18 1. "ETH1MACEN,Ethernet 1 bus clock enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "ETH1RST,Ethernet 1 reset" "B_0x0,B_0x1" line.long 0x1C "RCC_ETH2CFGR,RCC Ethernet 2 configuration register" bitfld.long 0x1C 11. "ETH2RXLPEN,Ethernet 2 reception clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x1C 10. "ETH2RXEN,Ethernet 2 reception clock enable" "B_0x0,B_0x1" bitfld.long 0x1C 9. "ETH2TXLPEN,Ethernet 2 transmission clock enable during CSleep mode" "B_0x0,B_0x1" bitfld.long 0x1C 8. "ETH2TXEN,Ethernet 2 transmission clock enable" "B_0x0,B_0x1" newline bitfld.long 0x1C 6. "ETH2LPEN,Ethernet 2 kernel clocks enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x1C 5. "ETH2EN,Ethernet 2 kernel clocks enable" "B_0x0,B_0x1" bitfld.long 0x1C 4. "ETH2STPEN,Ethernet 2 kernel clocks enable during CStop" "B_0x0,B_0x1" bitfld.long 0x1C 2. "ETH2MACLPEN,Ethernet 2 bus clock enable during CSleep" "B_0x0,B_0x1" newline bitfld.long 0x1C 1. "ETH2MACEN,Ethernet 2 bus clock enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "ETH2RST,Ethernet 2 reset" "B_0x0,B_0x1" group.long 0x7FC++0x2B line.long 0x0 "RCC_USBHCFGR,RCC USBH configuration register" bitfld.long 0x0 4. "USBHSTPEN,USBH clock enable during CStop" "B_0x0,B_0x1" bitfld.long 0x0 2. "USBHLPEN,USBH clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "USBHEN,USBH peripheral clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "USBHRST,USBH reset" "B_0x0,B_0x1" line.long 0x4 "RCC_USB2PHY1CFGR,RCC USB2PHY1 configuration register" bitfld.long 0x4 15. "USB2PHY1CKREFSEL,USB2PHY1 reference clock selection" "B_0x0,B_0x1" bitfld.long 0x4 4. "USB2PHY1STPEN,USB2PHY1 reference clock enable during CStop" "B_0x0,B_0x1" bitfld.long 0x4 2. "USB2PHY1LPEN,USB2PHY1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "USB2PHY1EN,USB2PHY1 clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "USB2PHY1RST,USB2PHY1 reset" "B_0x0,B_0x1" line.long 0x8 "RCC_USB2PHY2CFGR,RCC USB2PHY2 configuration register" bitfld.long 0x8 15. "USB2PHY2CKREFSEL,USB2PHY2 reference clock select" "B_0x0,B_0x1" bitfld.long 0x8 4. "USB2PHY2STPEN,USB2PHY2 reference clock enable during CStop" "B_0x0,B_0x1" bitfld.long 0x8 2. "USB2PHY2LPEN,USB2PHY2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "USB2PHY2EN,USB2PHY2 clock enable" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "USB2PHY2RST,USB2PHY2 reset" "B_0x0,B_0x1" line.long 0xC "RCC_USB3DRCFGR,RCC USB3DR configuration register" bitfld.long 0xC 4. "USB3DRSTPEN,USB3DR clock enable during CStop" "B_0x0,B_0x1" bitfld.long 0xC 2. "USB3DRLPEN,USB3DR clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC 1. "USB3DREN,USB3DR peripheral clocks enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "USB3DRRST,USB3DR reset" "B_0x0,B_0x1" line.long 0x10 "RCC_USB3PCIEPHYCFGR,RCC USB3PCIEPHY configuration register" bitfld.long 0x10 15. "USB3PCIEPHYCKREFSEL,USB3PCIEPHY reference clock selection" "B_0x0,B_0x1" bitfld.long 0x10 4. "USB3PCIEPHYSTPEN,USB3PCIEPHY reference clock enable during CStop" "B_0x0,B_0x1" bitfld.long 0x10 2. "USB3PCIEPHYLPEN,USB3PCIEPHY clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x10 1. "USB3PCIEPHYEN,USB3PCIEPHY clock enable" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "USB3PCIEPHYRST,USB3PCIEPHY reset" "B_0x0,B_0x1" line.long 0x14 "RCC_PCIECFGR,RCC PCIE configuration register" bitfld.long 0x14 4. "PCIESTPEN,PCIE clock enable during CStop" "B_0x0,B_0x1" bitfld.long 0x14 2. "PCIELPEN,PCIE clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x14 1. "PCIEEN,PCIE clock enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "PCIERST,PCIE reset" "B_0x0,B_0x1" line.long 0x18 "RCC_UCPDCFGR,RCC UCPD configuration register" bitfld.long 0x18 2. "UCPDLPEN,UCPD clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x18 1. "UCPDEN,UCPD clock enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "UCPDRST,UCPD reset" "B_0x0,B_0x1" line.long 0x1C "RCC_ETHSWCFGR,RCC Ethernet switch configuration register" bitfld.long 0x1C 22. "ETHSWREFLPEN,ETHSW ck_ker_ethswref kernel clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x1C 21. "ETHSWREFEN,ETHSW ck_ker_ethswref kernel clock enable" "B_0x0,B_0x1" bitfld.long 0x1C 6. "ETHSWLPEN,ETHSW ck_ker_ethsw kernel clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x1C 5. "ETHSWEN,ETHSW ck_ker_ethsw kernel clock enable" "B_0x0,B_0x1" newline bitfld.long 0x1C 2. "ETHSWMACLPEN,ETHSW clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x1C 1. "ETHSWMACEN,ETHSW clock enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "ETHSWRST,ETHSW reset" "B_0x0,B_0x1" line.long 0x20 "RCC_ETHSWACMCFGR,RCC Ethernet switch ACM configuration register" bitfld.long 0x20 2. "ETHSWACMLPEN,ETHSW_ACM clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x20 1. "ETHSWACMEN,ETHSW_ACM clock enable" "B_0x0,B_0x1" line.long 0x24 "RCC_ETHSWACMMSGCFGR,RCC Ethernet switch ACM message configuration register" bitfld.long 0x24 2. "ETHSWACMMSGLPEN,ETHSW_ACM message buffer clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x24 1. "ETHSWACMMSGEN,ETHSW_ACM message buffer clock enable" "B_0x0,B_0x1" line.long 0x28 "RCC_STGENCFGR,RCC STGEN configuration register" bitfld.long 0x28 4. "STGENSTPEN,STGENRW and STGENRO kernel clock enable during CStop" "B_0x0,B_0x1" bitfld.long 0x28 2. "STGENLPEN,STGENRW and STGENRO clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x28 1. "STGENEN,STGENRW and STGENRO clock enable" "B_0x0,B_0x1" group.long 0x830++0x17 line.long 0x0 "RCC_SDMMC1CFGR,RCC SDMMC1 configuration register" bitfld.long 0x0 16. "SDMMC1DLLRST,SDMMC1 DLL reset" "B_0x0,B_0x1" bitfld.long 0x0 2. "SDMMC1LPEN,SDMMC1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "SDMMC1EN,SDMMC1 clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SDMMC1RST,SDMMC1 reset" "B_0x0,B_0x1" line.long 0x4 "RCC_SDMMC2CFGR,RCC SDMMC2 configuration register" bitfld.long 0x4 16. "SDMMC2DLLRST,SDMMC2 DLL reset" "B_0x0,B_0x1" bitfld.long 0x4 2. "SDMMC2LPEN,SDMMC2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "SDMMC2EN,SDMMC2 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "SDMMC2RST,SDMMC2 reset" "B_0x0,B_0x1" line.long 0x8 "RCC_SDMMC3CFGR,RCC SDMMC3 configuration register" bitfld.long 0x8 16. "SDMMC3DLLRST,SDMMC3 DLL reset" "B_0x0,B_0x1" bitfld.long 0x8 2. "SDMMC3LPEN,SDMMC3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "SDMMC3EN,SDMMC3 clock enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "SDMMC3RST,SDMMC3 block reset" "B_0x0,B_0x1" line.long 0xC "RCC_GPUCFGR,RCC GPU configuration register" bitfld.long 0xC 2. "GPULPEN,GPU clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC 1. "GPUEN,GPU clock enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "GPURST,GPU reset" "B_0x0,B_0x1" line.long 0x10 "RCC_LTDCCFGR,RCC LTDC configuration register" bitfld.long 0x10 2. "LTDCLPEN,LTDC clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x10 1. "LTDCEN,LTDC peripheral clock enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "LTDCRST,LTDC reset" "B_0x0,B_0x1" line.long 0x14 "RCC_DSICFGR,RCC DSI configuration register" bitfld.long 0x14 15. "DSIPHYCKREFSEL,DSIPHY reference clock selection" "B_0x0,B_0x1" bitfld.long 0x14 12. "DSIBLSEL,DSI byte lane clock source selection" "B_0x0,B_0x1" bitfld.long 0x14 2. "DSILPEN,DSI clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x14 1. "DSIEN,DSI clock enable" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "DSIRST,DSI reset" "B_0x0,B_0x1" group.long 0x850++0x3 line.long 0x0 "RCC_LVDSCFGR,RCC LVDS configuration register" bitfld.long 0x0 15. "LVDSPHYCKREFSEL,LVDSPHY reference clock select" "B_0x0,B_0x1" bitfld.long 0x0 2. "LVDSLPEN,LVDSPHY clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "LVDSEN,LVDSPHY clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "LVDSRST,LVDS reset" "B_0x0,B_0x1" group.long 0x858++0x13 line.long 0x0 "RCC_CSICFGR,RCC CSI configuration register" bitfld.long 0x0 2. "CSILPEN,CSI clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "CSIEN,CSI clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CSIRST,CSI reset" "B_0x0,B_0x1" line.long 0x4 "RCC_DCMIPPCFGR,RCC DCMIPP configuration register" bitfld.long 0x4 2. "DCMIPPLPEN,DCMIPP clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "DCMIPPEN,DCMIPP clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "DCMIPPRST,DCMIPP reset" "B_0x0,B_0x1" line.long 0x8 "RCC_CCICFGR,RCC CCI configuration register" bitfld.long 0x8 2. "CCILPEN,CCI clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "CCIEN,CCI clock enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "CCIRST,CCI reset" "B_0x0,B_0x1" line.long 0xC "RCC_VDECCFGR,RCC VDEC configuration register" bitfld.long 0xC 2. "VDECLPEN,VDEC clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC 1. "VDECEN,VDEC clock enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "VDECRST,VDEC reset" "B_0x0,B_0x1" line.long 0x10 "RCC_VENCCFGR,RCC VENC configuration register" bitfld.long 0x10 2. "VENCLPEN,VENC clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x10 1. "VENCEN,VENC clock enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "VENCRST,VENC reset" "B_0x0,B_0x1" group.long 0x870++0x33 line.long 0x0 "RCC_RNGCFGR,RCC RNG configuration register" bitfld.long 0x0 2. "RNGLPEN,RNG clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "RNGEN,RNG clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "RNGRST,RNG reset" "B_0x0,B_0x1" line.long 0x4 "RCC_PKACFGR,RCC PKA configuration register" bitfld.long 0x4 2. "PKALPEN,PKA clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "PKAEN,PKA clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "PKARST,PKA reset" "B_0x0,B_0x1" line.long 0x8 "RCC_SAESCFGR,RCC SAES configuration register" bitfld.long 0x8 2. "SAESLPEN,SAES clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "SAESEN,SAES clock enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "SAESRST,SAES reset" "B_0x0,B_0x1" line.long 0xC "RCC_HASHCFGR,RCC HASH configuration register" bitfld.long 0xC 2. "HASHLPEN,HASH clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC 1. "HASHEN,HASH clock enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "HASHRST,HASH reset" "B_0x0,B_0x1" line.long 0x10 "RCC_CRYP1CFGR,RCC CRYP1 configuration register" bitfld.long 0x10 2. "CRYP1LPEN,CRYP1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x10 1. "CRYP1EN,CRYP1 clock enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "CRYP1RST,CRYP1 reset" "B_0x0,B_0x1" line.long 0x14 "RCC_CRYP2CFGR,RCC CRYP2 configuration register" bitfld.long 0x14 2. "CRYP2LPEN,CRYP2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x14 1. "CRYP2EN,CRYP2 clock enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "CRYP2RST,CRYP2 reset" "B_0x0,B_0x1" line.long 0x18 "RCC_IWDG1CFGR,RCC IWDG1 configuration register" bitfld.long 0x18 2. "IWDG1LPEN,IWDG1 bus clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x18 1. "IWDG1EN,IWDG1 bus clock enable" "B_0x0,B_0x1" line.long 0x1C "RCC_IWDG2CFGR,RCC IWDG2 configuration register" bitfld.long 0x1C 2. "IWDG2LPEN,IWDG2 bus clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x1C 1. "IWDG2EN,IWDG2 bus clock enable" "B_0x0,B_0x1" line.long 0x20 "RCC_IWDG3CFGR,RCC IWDG3 configuration register" bitfld.long 0x20 2. "IWDG3LPEN,IWDG3 bus clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x20 1. "IWDG3EN,IWDG3 bus clock enable" "B_0x0,B_0x1" line.long 0x24 "RCC_IWDG4CFGR,RCC IWDG4 configuration register" bitfld.long 0x24 2. "IWDG4LPEN,IWDG4 bus clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x24 1. "IWDG4EN,IWDG4 bus clock enable" "B_0x0,B_0x1" line.long 0x28 "RCC_IWDG5CFGR,RCC IWDG5 configuration register" bitfld.long 0x28 3. "IWDG5AMEN,IWDG5 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x28 2. "IWDG5LPEN,IWDG5 bus clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x28 1. "IWDG5EN,IWDG5 bus clock enable" "B_0x0,B_0x1" line.long 0x2C "RCC_WWDG1CFGR,RCC WWDG1 configuration register" bitfld.long 0x2C 2. "WWDG1LPEN,WWDG1 bus clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x2C 1. "WWDG1EN,WWDG1 bus clock enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "WWDG1RST,WWDG1 reset" "B_0x0,B_0x1" line.long 0x30 "RCC_WWDG2CFGR,RCC WWDG2 configuration register" bitfld.long 0x30 3. "WWDG2AMEN,WWDG2 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0x30 2. "WWDG2LPEN,WWDG2 bus clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x30 1. "WWDG2EN,WWDG2 bus clock enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "WWDG2RST,WWDG2 block reset" "B_0x0,B_0x1" group.long 0x8A8++0x7 line.long 0x0 "RCC_VREFCFGR,RCC VREF configuration register" bitfld.long 0x0 2. "VREFLPEN,VREF clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "VREFEN,VREF clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "VREFRST,VREF reset" "B_0x0,B_0x1" line.long 0x4 "RCC_DTSCFGR,RCC DTS configuration register" bitfld.long 0x4 12.--13. "DTSKERSEL,DTS kernel clock selection" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 2. "DTSLPEN,DTS clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "DTSEN,DTS clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "DTSRST,DTS reset" "B_0x0,B_0x1" group.long 0x8B4++0xF line.long 0x0 "RCC_CRCCFGR,RCC CRC configuration register" bitfld.long 0x0 2. "CRCLPEN,CRC clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "CRCEN,CRC clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CRCRST,CRC reset" "B_0x0,B_0x1" line.long 0x4 "RCC_SERCCFGR,RCC SERC configuration register" bitfld.long 0x4 2. "SERCLPEN,SERC clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "SERCEN,SERC clocks enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "SERCRST,SERC reset" "B_0x0,B_0x1" line.long 0x8 "RCC_OSPIIOMCFGR,RCC OCTOSPI I/O manager configuration register" bitfld.long 0x8 2. "OSPIIOMLPEN,OCTOSPIM clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "OSPIIOMEN,OCTOSPIM clock enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "OSPIIOMRST,OCTOSPIM reset" "B_0x0,B_0x1" line.long 0xC "RCC_GICV2MCFGR,RCC GICV2M configuration register" bitfld.long 0xC 2. "GICV2MLPEN,GICV2M clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC 1. "GICV2MEN,GICV2M clock enable" "B_0x0,B_0x1" group.long 0x8C8++0xF line.long 0x0 "RCC_I3C1CFGR,RCC I3C1 configuration register" bitfld.long 0x0 2. "I3C1LPEN,I3C1 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x0 1. "I3C1EN,I3C1 clock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "I3C1RST,I3C1 reset" "B_0x0,B_0x1" line.long 0x4 "RCC_I3C2CFGR,RCC I3C2 configuration register" bitfld.long 0x4 2. "I3C2LPEN,I3C2 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x4 1. "I3C2EN,I3C2 clock enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "I3C2RST,I3C2 reset" "B_0x0,B_0x1" line.long 0x8 "RCC_I3C3CFGR,RCC I3C3 configuration register" bitfld.long 0x8 2. "I3C3LPEN,I3C3 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0x8 1. "I3C3EN,I3C3 clock enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "I3C3RST,I3C3 reset" "B_0x0,B_0x1" line.long 0xC "RCC_I3C4CFGR,RCC I3C4 configuration register" bitfld.long 0xC 3. "I3C4AMEN,I3C4 autonomous clock mode enable" "B_0x0,B_0x1" bitfld.long 0xC 2. "I3C4LPEN,I3C4 clock enable during CSleep" "B_0x0,B_0x1" bitfld.long 0xC 1. "I3C4EN,I3C4 clock enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "I3C4RST,I3C4 reset" "B_0x0,B_0x1" group.long 0x1000++0x3 line.long 0x0 "RCC_MUXSELCFGR,RCC MUXSEL configuration register" bitfld.long 0x0 28.--29. "MUXSEL7,PLL3 reference clock selection (ck_pll3_ref)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 24.--25. "MUXSEL6,PLL2 reference clock selection (ck_pll2_ref)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 20.--21. "MUXSEL5,PLL1 reference clock selection (ck_pll1_ref)" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 16.--17. "MUXSEL4,PLL8 reference clock selection" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 12.--13. "MUXSEL3,PLL7 reference clock selection" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 8.--9. "MUXSEL2,PLL6 reference clock selection" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 4.--5. "MUXSEL1,PLL5 reference clock selection" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 0.--1. "MUXSEL0,PLL4 reference clock selection" "B_0x0,B_0x1,B_0x2,?" group.long 0x1018++0x1FF line.long 0x0 "RCC_XBAR0CFGR,RCC cross bar 0 configuration register" rbitfld.long 0x0 7. "XBAR0STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x0 6. "XBAR0EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--3. 1. "XBAR0SEL,Cross bar channel x input clock selection" line.long 0x4 "RCC_XBAR1CFGR,RCC cross bar 1 configuration register" rbitfld.long 0x4 7. "XBAR1STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x4 6. "XBAR1EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--3. 1. "XBAR1SEL,Cross bar channel x input clock selection" line.long 0x8 "RCC_XBAR2CFGR,RCC cross bar 2 configuration register" rbitfld.long 0x8 7. "XBAR2STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x8 6. "XBAR2EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 0.--3. 1. "XBAR2SEL,Cross bar channel x input clock selection" line.long 0xC "RCC_XBAR3CFGR,RCC cross bar 3 configuration register" rbitfld.long 0xC 7. "XBAR3STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xC 6. "XBAR3EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xC 0.--3. 1. "XBAR3SEL,Cross bar channel x input clock selection" line.long 0x10 "RCC_XBAR4CFGR,RCC cross bar 4 configuration register" rbitfld.long 0x10 7. "XBAR4STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x10 6. "XBAR4EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x10 0.--3. 1. "XBAR4SEL,Cross bar channel x input clock selection" line.long 0x14 "RCC_XBAR5CFGR,RCC cross bar 5 configuration register" rbitfld.long 0x14 7. "XBAR5STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x14 6. "XBAR5EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x14 0.--3. 1. "XBAR5SEL,Cross bar channel x input clock selection" line.long 0x18 "RCC_XBAR6CFGR,RCC cross bar 6 configuration register" rbitfld.long 0x18 7. "XBAR6STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x18 6. "XBAR6EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x18 0.--3. 1. "XBAR6SEL,Cross bar channel x input clock selection" line.long 0x1C "RCC_XBAR7CFGR,RCC cross bar 7 configuration register" rbitfld.long 0x1C 7. "XBAR7STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x1C 6. "XBAR7EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x1C 0.--3. 1. "XBAR7SEL,Cross bar channel x input clock selection" line.long 0x20 "RCC_XBAR8CFGR,RCC cross bar 8 configuration register" rbitfld.long 0x20 7. "XBAR8STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x20 6. "XBAR8EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x20 0.--3. 1. "XBAR8SEL,Cross bar channel x input clock selection" line.long 0x24 "RCC_XBAR9CFGR,RCC cross bar 9 configuration register" rbitfld.long 0x24 7. "XBAR9STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x24 6. "XBAR9EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--3. 1. "XBAR9SEL,Cross bar channel x input clock selection" line.long 0x28 "RCC_XBAR10CFGR,RCC cross bar 10 configuration register" rbitfld.long 0x28 7. "XBAR10STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x28 6. "XBAR10EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x28 0.--3. 1. "XBAR10SEL,Cross bar channel x input clock selection" line.long 0x2C "RCC_XBAR11CFGR,RCC cross bar 11 configuration register" rbitfld.long 0x2C 7. "XBAR11STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x2C 6. "XBAR11EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x2C 0.--3. 1. "XBAR11SEL,Cross bar channel x input clock selection" line.long 0x30 "RCC_XBAR12CFGR,RCC cross bar 12 configuration register" rbitfld.long 0x30 7. "XBAR12STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x30 6. "XBAR12EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x30 0.--3. 1. "XBAR12SEL,Cross bar channel x input clock selection" line.long 0x34 "RCC_XBAR13CFGR,RCC cross bar 13 configuration register" rbitfld.long 0x34 7. "XBAR13STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x34 6. "XBAR13EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x34 0.--3. 1. "XBAR13SEL,Cross bar channel x input clock selection" line.long 0x38 "RCC_XBAR14CFGR,RCC cross bar 14 configuration register" rbitfld.long 0x38 7. "XBAR14STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x38 6. "XBAR14EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x38 0.--3. 1. "XBAR14SEL,Cross bar channel x input clock selection" line.long 0x3C "RCC_XBAR15CFGR,RCC cross bar 15 configuration register" rbitfld.long 0x3C 7. "XBAR15STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x3C 6. "XBAR15EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x3C 0.--3. 1. "XBAR15SEL,Cross bar channel x input clock selection" line.long 0x40 "RCC_XBAR16CFGR,RCC cross bar 16 configuration register" rbitfld.long 0x40 7. "XBAR16STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x40 6. "XBAR16EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x40 0.--3. 1. "XBAR16SEL,Cross bar channel x input clock selection" line.long 0x44 "RCC_XBAR17CFGR,RCC cross bar 17 configuration register" rbitfld.long 0x44 7. "XBAR17STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x44 6. "XBAR17EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x44 0.--3. 1. "XBAR17SEL,Cross bar channel x input clock selection" line.long 0x48 "RCC_XBAR18CFGR,RCC cross bar 18 configuration register" rbitfld.long 0x48 7. "XBAR18STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x48 6. "XBAR18EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x48 0.--3. 1. "XBAR18SEL,Cross bar channel x input clock selection" line.long 0x4C "RCC_XBAR19CFGR,RCC cross bar 19 configuration register" rbitfld.long 0x4C 7. "XBAR19STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x4C 6. "XBAR19EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x4C 0.--3. 1. "XBAR19SEL,Cross bar channel x input clock selection" line.long 0x50 "RCC_XBAR20CFGR,RCC cross bar 20 configuration register" rbitfld.long 0x50 7. "XBAR20STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x50 6. "XBAR20EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x50 0.--3. 1. "XBAR20SEL,Cross bar channel x input clock selection" line.long 0x54 "RCC_XBAR21CFGR,RCC cross bar 21 configuration register" rbitfld.long 0x54 7. "XBAR21STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x54 6. "XBAR21EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x54 0.--3. 1. "XBAR21SEL,Cross bar channel x input clock selection" line.long 0x58 "RCC_XBAR22CFGR,RCC cross bar 22 configuration register" rbitfld.long 0x58 7. "XBAR22STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x58 6. "XBAR22EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x58 0.--3. 1. "XBAR22SEL,Cross bar channel x input clock selection" line.long 0x5C "RCC_XBAR23CFGR,RCC cross bar 23 configuration register" rbitfld.long 0x5C 7. "XBAR23STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x5C 6. "XBAR23EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x5C 0.--3. 1. "XBAR23SEL,Cross bar channel x input clock selection" line.long 0x60 "RCC_XBAR24CFGR,RCC cross bar 24 configuration register" rbitfld.long 0x60 7. "XBAR24STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x60 6. "XBAR24EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x60 0.--3. 1. "XBAR24SEL,Cross bar channel x input clock selection" line.long 0x64 "RCC_XBAR25CFGR,RCC cross bar 25 configuration register" rbitfld.long 0x64 7. "XBAR25STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x64 6. "XBAR25EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x64 0.--3. 1. "XBAR25SEL,Cross bar channel x input clock selection" line.long 0x68 "RCC_XBAR26CFGR,RCC cross bar 26 configuration register" rbitfld.long 0x68 7. "XBAR26STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x68 6. "XBAR26EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x68 0.--3. 1. "XBAR26SEL,Cross bar channel x input clock selection" line.long 0x6C "RCC_XBAR27CFGR,RCC cross bar 27 configuration register" rbitfld.long 0x6C 7. "XBAR27STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x6C 6. "XBAR27EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x6C 0.--3. 1. "XBAR27SEL,Cross bar channel x input clock selection" line.long 0x70 "RCC_XBAR28CFGR,RCC cross bar 28 configuration register" rbitfld.long 0x70 7. "XBAR28STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x70 6. "XBAR28EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x70 0.--3. 1. "XBAR28SEL,Cross bar channel x input clock selection" line.long 0x74 "RCC_XBAR29CFGR,RCC cross bar 29 configuration register" rbitfld.long 0x74 7. "XBAR29STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x74 6. "XBAR29EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x74 0.--3. 1. "XBAR29SEL,Cross bar channel x input clock selection" line.long 0x78 "RCC_XBAR30CFGR,RCC cross bar 30 configuration register" rbitfld.long 0x78 7. "XBAR30STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x78 6. "XBAR30EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x78 0.--3. 1. "XBAR30SEL,Cross bar channel x input clock selection" line.long 0x7C "RCC_XBAR31CFGR,RCC cross bar 31 configuration register" rbitfld.long 0x7C 7. "XBAR31STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x7C 6. "XBAR31EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x7C 0.--3. 1. "XBAR31SEL,Cross bar channel x input clock selection" line.long 0x80 "RCC_XBAR32CFGR,RCC cross bar 32 configuration register" rbitfld.long 0x80 7. "XBAR32STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x80 6. "XBAR32EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x80 0.--3. 1. "XBAR32SEL,Cross bar channel x input clock selection" line.long 0x84 "RCC_XBAR33CFGR,RCC cross bar 33 configuration register" rbitfld.long 0x84 7. "XBAR33STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x84 6. "XBAR33EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x84 0.--3. 1. "XBAR33SEL,Cross bar channel x input clock selection" line.long 0x88 "RCC_XBAR34CFGR,RCC cross bar 34 configuration register" rbitfld.long 0x88 7. "XBAR34STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x88 6. "XBAR34EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x88 0.--3. 1. "XBAR34SEL,Cross bar channel x input clock selection" line.long 0x8C "RCC_XBAR35CFGR,RCC cross bar 35 configuration register" rbitfld.long 0x8C 7. "XBAR35STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x8C 6. "XBAR35EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x8C 0.--3. 1. "XBAR35SEL,Cross bar channel x input clock selection" line.long 0x90 "RCC_XBAR36CFGR,RCC cross bar 36 configuration register" rbitfld.long 0x90 7. "XBAR36STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x90 6. "XBAR36EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x90 0.--3. 1. "XBAR36SEL,Cross bar channel x input clock selection" line.long 0x94 "RCC_XBAR37CFGR,RCC cross bar 37 configuration register" rbitfld.long 0x94 7. "XBAR37STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x94 6. "XBAR37EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x94 0.--3. 1. "XBAR37SEL,Cross bar channel x input clock selection" line.long 0x98 "RCC_XBAR38CFGR,RCC cross bar 38 configuration register" rbitfld.long 0x98 7. "XBAR38STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x98 6. "XBAR38EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x98 0.--3. 1. "XBAR38SEL,Cross bar channel x input clock selection" line.long 0x9C "RCC_XBAR39CFGR,RCC cross bar 39 configuration register" rbitfld.long 0x9C 7. "XBAR39STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0x9C 6. "XBAR39EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0x9C 0.--3. 1. "XBAR39SEL,Cross bar channel x input clock selection" line.long 0xA0 "RCC_XBAR40CFGR,RCC cross bar 40 configuration register" rbitfld.long 0xA0 7. "XBAR40STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xA0 6. "XBAR40EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xA0 0.--3. 1. "XBAR40SEL,Cross bar channel x input clock selection" line.long 0xA4 "RCC_XBAR41CFGR,RCC cross bar 41 configuration register" rbitfld.long 0xA4 7. "XBAR41STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xA4 6. "XBAR41EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xA4 0.--3. 1. "XBAR41SEL,Cross bar channel x input clock selection" line.long 0xA8 "RCC_XBAR42CFGR,RCC cross bar 42 configuration register" rbitfld.long 0xA8 7. "XBAR42STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xA8 6. "XBAR42EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xA8 0.--3. 1. "XBAR42SEL,Cross bar channel x input clock selection" line.long 0xAC "RCC_XBAR43CFGR,RCC cross bar 43 configuration register" rbitfld.long 0xAC 7. "XBAR43STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xAC 6. "XBAR43EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xAC 0.--3. 1. "XBAR43SEL,Cross bar channel x input clock selection" line.long 0xB0 "RCC_XBAR44CFGR,RCC cross bar 44 configuration register" rbitfld.long 0xB0 7. "XBAR44STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xB0 6. "XBAR44EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xB0 0.--3. 1. "XBAR44SEL,Cross bar channel x input clock selection" line.long 0xB4 "RCC_XBAR45CFGR,RCC cross bar 45 configuration register" rbitfld.long 0xB4 7. "XBAR45STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xB4 6. "XBAR45EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xB4 0.--3. 1. "XBAR45SEL,Cross bar channel x input clock selection" line.long 0xB8 "RCC_XBAR46CFGR,RCC cross bar 46 configuration register" rbitfld.long 0xB8 7. "XBAR46STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xB8 6. "XBAR46EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xB8 0.--3. 1. "XBAR46SEL,Cross bar channel x input clock selection" line.long 0xBC "RCC_XBAR47CFGR,RCC cross bar 47 configuration register" rbitfld.long 0xBC 7. "XBAR47STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xBC 6. "XBAR47EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xBC 0.--3. 1. "XBAR47SEL,Cross bar channel x input clock selection" line.long 0xC0 "RCC_XBAR48CFGR,RCC cross bar 48 configuration register" rbitfld.long 0xC0 7. "XBAR48STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xC0 6. "XBAR48EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xC0 0.--3. 1. "XBAR48SEL,Cross bar channel x input clock selection" line.long 0xC4 "RCC_XBAR49CFGR,RCC cross bar 49 configuration register" rbitfld.long 0xC4 7. "XBAR49STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xC4 6. "XBAR49EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xC4 0.--3. 1. "XBAR49SEL,Cross bar channel x input clock selection" line.long 0xC8 "RCC_XBAR50CFGR,RCC cross bar 50 configuration register" rbitfld.long 0xC8 7. "XBAR50STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xC8 6. "XBAR50EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xC8 0.--3. 1. "XBAR50SEL,Cross bar channel x input clock selection" line.long 0xCC "RCC_XBAR51CFGR,RCC cross bar 51 configuration register" rbitfld.long 0xCC 7. "XBAR51STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xCC 6. "XBAR51EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xCC 0.--3. 1. "XBAR51SEL,Cross bar channel x input clock selection" line.long 0xD0 "RCC_XBAR52CFGR,RCC cross bar 52 configuration register" rbitfld.long 0xD0 7. "XBAR52STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xD0 6. "XBAR52EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xD0 0.--3. 1. "XBAR52SEL,Cross bar channel x input clock selection" line.long 0xD4 "RCC_XBAR53CFGR,RCC cross bar 53 configuration register" rbitfld.long 0xD4 7. "XBAR53STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xD4 6. "XBAR53EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xD4 0.--3. 1. "XBAR53SEL,Cross bar channel x input clock selection" line.long 0xD8 "RCC_XBAR54CFGR,RCC cross bar 54 configuration register" rbitfld.long 0xD8 7. "XBAR54STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xD8 6. "XBAR54EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xD8 0.--3. 1. "XBAR54SEL,Cross bar channel x input clock selection" line.long 0xDC "RCC_XBAR55CFGR,RCC cross bar 55 configuration register" rbitfld.long 0xDC 7. "XBAR55STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xDC 6. "XBAR55EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xDC 0.--3. 1. "XBAR55SEL,Cross bar channel x input clock selection" line.long 0xE0 "RCC_XBAR56CFGR,RCC cross bar 56 configuration register" rbitfld.long 0xE0 7. "XBAR56STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xE0 6. "XBAR56EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xE0 0.--3. 1. "XBAR56SEL,Cross bar channel x input clock selection" line.long 0xE4 "RCC_XBAR57CFGR,RCC cross bar 57 configuration register" rbitfld.long 0xE4 7. "XBAR57STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xE4 6. "XBAR57EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xE4 0.--3. 1. "XBAR57SEL,Cross bar channel x input clock selection" line.long 0xE8 "RCC_XBAR58CFGR,RCC cross bar 58 configuration register" rbitfld.long 0xE8 7. "XBAR58STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xE8 6. "XBAR58EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xE8 0.--3. 1. "XBAR58SEL,Cross bar channel x input clock selection" line.long 0xEC "RCC_XBAR59CFGR,RCC cross bar 59 configuration register" rbitfld.long 0xEC 7. "XBAR59STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xEC 6. "XBAR59EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xEC 0.--3. 1. "XBAR59SEL,Cross bar channel x input clock selection" line.long 0xF0 "RCC_XBAR60CFGR,RCC cross bar 60 configuration register" rbitfld.long 0xF0 7. "XBAR60STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xF0 6. "XBAR60EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xF0 0.--3. 1. "XBAR60SEL,Cross bar channel x input clock selection" line.long 0xF4 "RCC_XBAR61CFGR,RCC cross bar 61 configuration register" rbitfld.long 0xF4 7. "XBAR61STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xF4 6. "XBAR61EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xF4 0.--3. 1. "XBAR61SEL,Cross bar channel x input clock selection" line.long 0xF8 "RCC_XBAR62CFGR,RCC cross bar 62 configuration register" rbitfld.long 0xF8 7. "XBAR62STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xF8 6. "XBAR62EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xF8 0.--3. 1. "XBAR62SEL,Cross bar channel x input clock selection" line.long 0xFC "RCC_XBAR63CFGR,RCC cross bar 63 configuration register" rbitfld.long 0xFC 7. "XBAR63STS,Cross bar channel x output status" "B_0x0,B_0x1" bitfld.long 0xFC 6. "XBAR63EN,Cross bar channel x clock output enable" "B_0x0,B_0x1" hexmask.long.byte 0xFC 0.--3. 1. "XBAR63SEL,Cross bar channel x input clock selection" line.long 0x100 "RCC_PREDIV0CFGR,RCC pre divider 0 configuration register" hexmask.long.word 0x100 0.--9. 1. "PREDIV0,Predivider channel x divider ratio" line.long 0x104 "RCC_PREDIV1CFGR,RCC pre divider 1 configuration register" hexmask.long.word 0x104 0.--9. 1. "PREDIV1,Predivider channel x divider ratio" line.long 0x108 "RCC_PREDIV2CFGR,RCC pre divider 2 configuration register" hexmask.long.word 0x108 0.--9. 1. "PREDIV2,Predivider channel x divider ratio" line.long 0x10C "RCC_PREDIV3CFGR,RCC pre divider 3 configuration register" hexmask.long.word 0x10C 0.--9. 1. "PREDIV3,Predivider channel x divider ratio" line.long 0x110 "RCC_PREDIV4CFGR,RCC pre divider 4 configuration register" hexmask.long.word 0x110 0.--9. 1. "PREDIV4,Predivider channel x divider ratio" line.long 0x114 "RCC_PREDIV5CFGR,RCC pre divider 5 configuration register" hexmask.long.word 0x114 0.--9. 1. "PREDIV5,Predivider channel x divider ratio" line.long 0x118 "RCC_PREDIV6CFGR,RCC pre divider 6 configuration register" hexmask.long.word 0x118 0.--9. 1. "PREDIV6,Predivider channel x divider ratio" line.long 0x11C "RCC_PREDIV7CFGR,RCC pre divider 7 configuration register" hexmask.long.word 0x11C 0.--9. 1. "PREDIV7,Predivider channel x divider ratio" line.long 0x120 "RCC_PREDIV8CFGR,RCC pre divider 8 configuration register" hexmask.long.word 0x120 0.--9. 1. "PREDIV8,Predivider channel x divider ratio" line.long 0x124 "RCC_PREDIV9CFGR,RCC pre divider 9 configuration register" hexmask.long.word 0x124 0.--9. 1. "PREDIV9,Predivider channel x divider ratio" line.long 0x128 "RCC_PREDIV10CFGR,RCC pre divider 10 configuration register" hexmask.long.word 0x128 0.--9. 1. "PREDIV10,Predivider channel x divider ratio" line.long 0x12C "RCC_PREDIV11CFGR,RCC pre divider 11 configuration register" hexmask.long.word 0x12C 0.--9. 1. "PREDIV11,Predivider channel x divider ratio" line.long 0x130 "RCC_PREDIV12CFGR,RCC pre divider 12 configuration register" hexmask.long.word 0x130 0.--9. 1. "PREDIV12,Predivider channel x divider ratio" line.long 0x134 "RCC_PREDIV13CFGR,RCC pre divider 13 configuration register" hexmask.long.word 0x134 0.--9. 1. "PREDIV13,Predivider channel x divider ratio" line.long 0x138 "RCC_PREDIV14CFGR,RCC pre divider 14 configuration register" hexmask.long.word 0x138 0.--9. 1. "PREDIV14,Predivider channel x divider ratio" line.long 0x13C "RCC_PREDIV15CFGR,RCC pre divider 15 configuration register" hexmask.long.word 0x13C 0.--9. 1. "PREDIV15,Predivider channel x divider ratio" line.long 0x140 "RCC_PREDIV16CFGR,RCC pre divider 16 configuration register" hexmask.long.word 0x140 0.--9. 1. "PREDIV16,Predivider channel x divider ratio" line.long 0x144 "RCC_PREDIV17CFGR,RCC pre divider 17 configuration register" hexmask.long.word 0x144 0.--9. 1. "PREDIV17,Predivider channel x divider ratio" line.long 0x148 "RCC_PREDIV18CFGR,RCC pre divider 18 configuration register" hexmask.long.word 0x148 0.--9. 1. "PREDIV18,Predivider channel x divider ratio" line.long 0x14C "RCC_PREDIV19CFGR,RCC pre divider 19 configuration register" hexmask.long.word 0x14C 0.--9. 1. "PREDIV19,Predivider channel x divider ratio" line.long 0x150 "RCC_PREDIV20CFGR,RCC pre divider 20 configuration register" hexmask.long.word 0x150 0.--9. 1. "PREDIV20,Predivider channel x divider ratio" line.long 0x154 "RCC_PREDIV21CFGR,RCC pre divider 21 configuration register" hexmask.long.word 0x154 0.--9. 1. "PREDIV21,Predivider channel x divider ratio" line.long 0x158 "RCC_PREDIV22CFGR,RCC pre divider 22 configuration register" hexmask.long.word 0x158 0.--9. 1. "PREDIV22,Predivider channel x divider ratio" line.long 0x15C "RCC_PREDIV23CFGR,RCC pre divider 23 configuration register" hexmask.long.word 0x15C 0.--9. 1. "PREDIV23,Predivider channel x divider ratio" line.long 0x160 "RCC_PREDIV24CFGR,RCC pre divider 24 configuration register" hexmask.long.word 0x160 0.--9. 1. "PREDIV24,Predivider channel x divider ratio" line.long 0x164 "RCC_PREDIV25CFGR,RCC pre divider 25 configuration register" hexmask.long.word 0x164 0.--9. 1. "PREDIV25,Predivider channel x divider ratio" line.long 0x168 "RCC_PREDIV26CFGR,RCC pre divider 26 configuration register" hexmask.long.word 0x168 0.--9. 1. "PREDIV26,Predivider channel x divider ratio" line.long 0x16C "RCC_PREDIV27CFGR,RCC pre divider 27 configuration register" hexmask.long.word 0x16C 0.--9. 1. "PREDIV27,Predivider channel x divider ratio" line.long 0x170 "RCC_PREDIV28CFGR,RCC pre divider 28 configuration register" hexmask.long.word 0x170 0.--9. 1. "PREDIV28,Predivider channel x divider ratio" line.long 0x174 "RCC_PREDIV29CFGR,RCC pre divider 29 configuration register" hexmask.long.word 0x174 0.--9. 1. "PREDIV29,Predivider channel x divider ratio" line.long 0x178 "RCC_PREDIV30CFGR,RCC pre divider 30 configuration register" hexmask.long.word 0x178 0.--9. 1. "PREDIV30,Predivider channel x divider ratio" line.long 0x17C "RCC_PREDIV31CFGR,RCC pre divider 31 configuration register" hexmask.long.word 0x17C 0.--9. 1. "PREDIV31,Predivider channel x divider ratio" line.long 0x180 "RCC_PREDIV32CFGR,RCC pre divider 32 configuration register" hexmask.long.word 0x180 0.--9. 1. "PREDIV32,Predivider channel x divider ratio" line.long 0x184 "RCC_PREDIV33CFGR,RCC pre divider 33 configuration register" hexmask.long.word 0x184 0.--9. 1. "PREDIV33,Predivider channel x divider ratio" line.long 0x188 "RCC_PREDIV34CFGR,RCC pre divider 34 configuration register" hexmask.long.word 0x188 0.--9. 1. "PREDIV34,Predivider channel x divider ratio" line.long 0x18C "RCC_PREDIV35CFGR,RCC pre divider 35 configuration register" hexmask.long.word 0x18C 0.--9. 1. "PREDIV35,Predivider channel x divider ratio" line.long 0x190 "RCC_PREDIV36CFGR,RCC pre divider 36 configuration register" hexmask.long.word 0x190 0.--9. 1. "PREDIV36,Predivider channel x divider ratio" line.long 0x194 "RCC_PREDIV37CFGR,RCC pre divider 37 configuration register" hexmask.long.word 0x194 0.--9. 1. "PREDIV37,Predivider channel x divider ratio" line.long 0x198 "RCC_PREDIV38CFGR,RCC pre divider 38 configuration register" hexmask.long.word 0x198 0.--9. 1. "PREDIV38,Predivider channel x divider ratio" line.long 0x19C "RCC_PREDIV39CFGR,RCC pre divider 39 configuration register" hexmask.long.word 0x19C 0.--9. 1. "PREDIV39,Predivider channel x divider ratio" line.long 0x1A0 "RCC_PREDIV40CFGR,RCC pre divider 40 configuration register" hexmask.long.word 0x1A0 0.--9. 1. "PREDIV40,Predivider channel x divider ratio" line.long 0x1A4 "RCC_PREDIV41CFGR,RCC pre divider 41 configuration register" hexmask.long.word 0x1A4 0.--9. 1. "PREDIV41,Predivider channel x divider ratio" line.long 0x1A8 "RCC_PREDIV42CFGR,RCC pre divider 42 configuration register" hexmask.long.word 0x1A8 0.--9. 1. "PREDIV42,Predivider channel x divider ratio" line.long 0x1AC "RCC_PREDIV43CFGR,RCC pre divider 43 configuration register" hexmask.long.word 0x1AC 0.--9. 1. "PREDIV43,Predivider channel x divider ratio" line.long 0x1B0 "RCC_PREDIV44CFGR,RCC pre divider 44 configuration register" hexmask.long.word 0x1B0 0.--9. 1. "PREDIV44,Predivider channel x divider ratio" line.long 0x1B4 "RCC_PREDIV45CFGR,RCC pre divider 45 configuration register" hexmask.long.word 0x1B4 0.--9. 1. "PREDIV45,Predivider channel x divider ratio" line.long 0x1B8 "RCC_PREDIV46CFGR,RCC pre divider 46 configuration register" hexmask.long.word 0x1B8 0.--9. 1. "PREDIV46,Predivider channel x divider ratio" line.long 0x1BC "RCC_PREDIV47CFGR,RCC pre divider 47 configuration register" hexmask.long.word 0x1BC 0.--9. 1. "PREDIV47,Predivider channel x divider ratio" line.long 0x1C0 "RCC_PREDIV48CFGR,RCC pre divider 48 configuration register" hexmask.long.word 0x1C0 0.--9. 1. "PREDIV48,Predivider channel x divider ratio" line.long 0x1C4 "RCC_PREDIV49CFGR,RCC pre divider 49 configuration register" hexmask.long.word 0x1C4 0.--9. 1. "PREDIV49,Predivider channel x divider ratio" line.long 0x1C8 "RCC_PREDIV50CFGR,RCC pre divider 50 configuration register" hexmask.long.word 0x1C8 0.--9. 1. "PREDIV50,Predivider channel x divider ratio" line.long 0x1CC "RCC_PREDIV51CFGR,RCC pre divider 51 configuration register" hexmask.long.word 0x1CC 0.--9. 1. "PREDIV51,Predivider channel x divider ratio" line.long 0x1D0 "RCC_PREDIV52CFGR,RCC pre divider 52 configuration register" hexmask.long.word 0x1D0 0.--9. 1. "PREDIV52,Predivider channel x divider ratio" line.long 0x1D4 "RCC_PREDIV53CFGR,RCC pre divider 53 configuration register" hexmask.long.word 0x1D4 0.--9. 1. "PREDIV53,Predivider channel x divider ratio" line.long 0x1D8 "RCC_PREDIV54CFGR,RCC pre divider 54 configuration register" hexmask.long.word 0x1D8 0.--9. 1. "PREDIV54,Predivider channel x divider ratio" line.long 0x1DC "RCC_PREDIV55CFGR,RCC pre divider 55 configuration register" hexmask.long.word 0x1DC 0.--9. 1. "PREDIV55,Predivider channel x divider ratio" line.long 0x1E0 "RCC_PREDIV56CFGR,RCC pre divider 56 configuration register" hexmask.long.word 0x1E0 0.--9. 1. "PREDIV56,Predivider channel x divider ratio" line.long 0x1E4 "RCC_PREDIV57CFGR,RCC pre divider 57 configuration register" hexmask.long.word 0x1E4 0.--9. 1. "PREDIV57,Predivider channel x divider ratio" line.long 0x1E8 "RCC_PREDIV58CFGR,RCC pre divider 58 configuration register" hexmask.long.word 0x1E8 0.--9. 1. "PREDIV58,Predivider channel x divider ratio" line.long 0x1EC "RCC_PREDIV59CFGR,RCC pre divider 59 configuration register" hexmask.long.word 0x1EC 0.--9. 1. "PREDIV59,Predivider channel x divider ratio" line.long 0x1F0 "RCC_PREDIV60CFGR,RCC pre divider 60 configuration register" hexmask.long.word 0x1F0 0.--9. 1. "PREDIV60,Predivider channel x divider ratio" line.long 0x1F4 "RCC_PREDIV61CFGR,RCC pre divider 61 configuration register" hexmask.long.word 0x1F4 0.--9. 1. "PREDIV61,Predivider channel x divider ratio" line.long 0x1F8 "RCC_PREDIV62CFGR,RCC pre divider 62 configuration register" hexmask.long.word 0x1F8 0.--9. 1. "PREDIV62,Predivider channel x divider ratio" line.long 0x1FC "RCC_PREDIV63CFGR,RCC pre divider 63 configuration register" hexmask.long.word 0x1FC 0.--9. 1. "PREDIV63,Predivider channel x divider ratio" rgroup.long 0x1218++0x7 line.long 0x0 "RCC_PREDIVSR1,RCC pre divider status register 1" hexmask.long 0x0 0.--31. 1. "PREDIVSTS,Predivider channel[31:0] output status" line.long 0x4 "RCC_PREDIVSR2,RCC pre divider status register 2" hexmask.long 0x4 0.--31. 1. "PREDIVSTS,Predivider channel[63:32] output status" group.long 0x1224++0xFF line.long 0x0 "RCC_FINDIV0CFGR,RCC final divider 0 configuration register" bitfld.long 0x0 6. "FINDIV0EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--5. 1. "FINDIV0,Channel x divider ratio" line.long 0x4 "RCC_FINDIV1CFGR,RCC final divider 1 configuration register" bitfld.long 0x4 6. "FINDIV1EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x4 0.--5. 1. "FINDIV1,Channel x divider ratio" line.long 0x8 "RCC_FINDIV2CFGR,RCC final divider 2 configuration register" bitfld.long 0x8 6. "FINDIV2EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 0.--5. 1. "FINDIV2,Channel x divider ratio" line.long 0xC "RCC_FINDIV3CFGR,RCC final divider 3 configuration register" bitfld.long 0xC 6. "FINDIV3EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xC 0.--5. 1. "FINDIV3,Channel x divider ratio" line.long 0x10 "RCC_FINDIV4CFGR,RCC final divider 4 configuration register" bitfld.long 0x10 6. "FINDIV4EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x10 0.--5. 1. "FINDIV4,Channel x divider ratio" line.long 0x14 "RCC_FINDIV5CFGR,RCC final divider 5 configuration register" bitfld.long 0x14 6. "FINDIV5EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x14 0.--5. 1. "FINDIV5,Channel x divider ratio" line.long 0x18 "RCC_FINDIV6CFGR,RCC final divider 6 configuration register" bitfld.long 0x18 6. "FINDIV6EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x18 0.--5. 1. "FINDIV6,Channel x divider ratio" line.long 0x1C "RCC_FINDIV7CFGR,RCC final divider 7 configuration register" bitfld.long 0x1C 6. "FINDIV7EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x1C 0.--5. 1. "FINDIV7,Channel x divider ratio" line.long 0x20 "RCC_FINDIV8CFGR,RCC final divider 8 configuration register" bitfld.long 0x20 6. "FINDIV8EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x20 0.--5. 1. "FINDIV8,Channel x divider ratio" line.long 0x24 "RCC_FINDIV9CFGR,RCC final divider 9 configuration register" bitfld.long 0x24 6. "FINDIV9EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x24 0.--5. 1. "FINDIV9,Channel x divider ratio" line.long 0x28 "RCC_FINDIV10CFGR,RCC final divider 10 configuration register" bitfld.long 0x28 6. "FINDIV10EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x28 0.--5. 1. "FINDIV10,Channel x divider ratio" line.long 0x2C "RCC_FINDIV11CFGR,RCC final divider 11 configuration register" bitfld.long 0x2C 6. "FINDIV11EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x2C 0.--5. 1. "FINDIV11,Channel x divider ratio" line.long 0x30 "RCC_FINDIV12CFGR,RCC final divider 12 configuration register" bitfld.long 0x30 6. "FINDIV12EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x30 0.--5. 1. "FINDIV12,Channel x divider ratio" line.long 0x34 "RCC_FINDIV13CFGR,RCC final divider 13 configuration register" bitfld.long 0x34 6. "FINDIV13EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x34 0.--5. 1. "FINDIV13,Channel x divider ratio" line.long 0x38 "RCC_FINDIV14CFGR,RCC final divider 14 configuration register" bitfld.long 0x38 6. "FINDIV14EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x38 0.--5. 1. "FINDIV14,Channel x divider ratio" line.long 0x3C "RCC_FINDIV15CFGR,RCC final divider 15 configuration register" bitfld.long 0x3C 6. "FINDIV15EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x3C 0.--5. 1. "FINDIV15,Channel x divider ratio" line.long 0x40 "RCC_FINDIV16CFGR,RCC final divider 16 configuration register" bitfld.long 0x40 6. "FINDIV16EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x40 0.--5. 1. "FINDIV16,Channel x divider ratio" line.long 0x44 "RCC_FINDIV17CFGR,RCC final divider 17 configuration register" bitfld.long 0x44 6. "FINDIV17EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x44 0.--5. 1. "FINDIV17,Channel x divider ratio" line.long 0x48 "RCC_FINDIV18CFGR,RCC final divider 18 configuration register" bitfld.long 0x48 6. "FINDIV18EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x48 0.--5. 1. "FINDIV18,Channel x divider ratio" line.long 0x4C "RCC_FINDIV19CFGR,RCC final divider 19 configuration register" bitfld.long 0x4C 6. "FINDIV19EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x4C 0.--5. 1. "FINDIV19,Channel x divider ratio" line.long 0x50 "RCC_FINDIV20CFGR,RCC final divider 20 configuration register" bitfld.long 0x50 6. "FINDIV20EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x50 0.--5. 1. "FINDIV20,Channel x divider ratio" line.long 0x54 "RCC_FINDIV21CFGR,RCC final divider 21 configuration register" bitfld.long 0x54 6. "FINDIV21EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x54 0.--5. 1. "FINDIV21,Channel x divider ratio" line.long 0x58 "RCC_FINDIV22CFGR,RCC final divider 22 configuration register" bitfld.long 0x58 6. "FINDIV22EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x58 0.--5. 1. "FINDIV22,Channel x divider ratio" line.long 0x5C "RCC_FINDIV23CFGR,RCC final divider 23 configuration register" bitfld.long 0x5C 6. "FINDIV23EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x5C 0.--5. 1. "FINDIV23,Channel x divider ratio" line.long 0x60 "RCC_FINDIV24CFGR,RCC final divider 24 configuration register" bitfld.long 0x60 6. "FINDIV24EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x60 0.--5. 1. "FINDIV24,Channel x divider ratio" line.long 0x64 "RCC_FINDIV25CFGR,RCC final divider 25 configuration register" bitfld.long 0x64 6. "FINDIV25EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x64 0.--5. 1. "FINDIV25,Channel x divider ratio" line.long 0x68 "RCC_FINDIV26CFGR,RCC final divider 26 configuration register" bitfld.long 0x68 6. "FINDIV26EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x68 0.--5. 1. "FINDIV26,Channel x divider ratio" line.long 0x6C "RCC_FINDIV27CFGR,RCC final divider 27 configuration register" bitfld.long 0x6C 6. "FINDIV27EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x6C 0.--5. 1. "FINDIV27,Channel x divider ratio" line.long 0x70 "RCC_FINDIV28CFGR,RCC final divider 28 configuration register" bitfld.long 0x70 6. "FINDIV28EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x70 0.--5. 1. "FINDIV28,Channel x divider ratio" line.long 0x74 "RCC_FINDIV29CFGR,RCC final divider 29 configuration register" bitfld.long 0x74 6. "FINDIV29EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x74 0.--5. 1. "FINDIV29,Channel x divider ratio" line.long 0x78 "RCC_FINDIV30CFGR,RCC final divider 30 configuration register" bitfld.long 0x78 6. "FINDIV30EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x78 0.--5. 1. "FINDIV30,Channel x divider ratio" line.long 0x7C "RCC_FINDIV31CFGR,RCC final divider 31 configuration register" bitfld.long 0x7C 6. "FINDIV31EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x7C 0.--5. 1. "FINDIV31,Channel x divider ratio" line.long 0x80 "RCC_FINDIV32CFGR,RCC final divider 32 configuration register" bitfld.long 0x80 6. "FINDIV32EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x80 0.--5. 1. "FINDIV32,Channel x divider ratio" line.long 0x84 "RCC_FINDIV33CFGR,RCC final divider 33 configuration register" bitfld.long 0x84 6. "FINDIV33EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x84 0.--5. 1. "FINDIV33,Channel x divider ratio" line.long 0x88 "RCC_FINDIV34CFGR,RCC final divider 34 configuration register" bitfld.long 0x88 6. "FINDIV34EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x88 0.--5. 1. "FINDIV34,Channel x divider ratio" line.long 0x8C "RCC_FINDIV35CFGR,RCC final divider 35 configuration register" bitfld.long 0x8C 6. "FINDIV35EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x8C 0.--5. 1. "FINDIV35,Channel x divider ratio" line.long 0x90 "RCC_FINDIV36CFGR,RCC final divider 36 configuration register" bitfld.long 0x90 6. "FINDIV36EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x90 0.--5. 1. "FINDIV36,Channel x divider ratio" line.long 0x94 "RCC_FINDIV37CFGR,RCC final divider 37 configuration register" bitfld.long 0x94 6. "FINDIV37EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x94 0.--5. 1. "FINDIV37,Channel x divider ratio" line.long 0x98 "RCC_FINDIV38CFGR,RCC final divider 38 configuration register" bitfld.long 0x98 6. "FINDIV38EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x98 0.--5. 1. "FINDIV38,Channel x divider ratio" line.long 0x9C "RCC_FINDIV39CFGR,RCC final divider 39 configuration register" bitfld.long 0x9C 6. "FINDIV39EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0x9C 0.--5. 1. "FINDIV39,Channel x divider ratio" line.long 0xA0 "RCC_FINDIV40CFGR,RCC final divider 40 configuration register" bitfld.long 0xA0 6. "FINDIV40EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xA0 0.--5. 1. "FINDIV40,Channel x divider ratio" line.long 0xA4 "RCC_FINDIV41CFGR,RCC final divider 41 configuration register" bitfld.long 0xA4 6. "FINDIV41EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xA4 0.--5. 1. "FINDIV41,Channel x divider ratio" line.long 0xA8 "RCC_FINDIV42CFGR,RCC final divider 42 configuration register" bitfld.long 0xA8 6. "FINDIV42EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xA8 0.--5. 1. "FINDIV42,Channel x divider ratio" line.long 0xAC "RCC_FINDIV43CFGR,RCC final divider 43 configuration register" bitfld.long 0xAC 6. "FINDIV43EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xAC 0.--5. 1. "FINDIV43,Channel x divider ratio" line.long 0xB0 "RCC_FINDIV44CFGR,RCC final divider 44 configuration register" bitfld.long 0xB0 6. "FINDIV44EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xB0 0.--5. 1. "FINDIV44,Channel x divider ratio" line.long 0xB4 "RCC_FINDIV45CFGR,RCC final divider 45 configuration register" bitfld.long 0xB4 6. "FINDIV45EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xB4 0.--5. 1. "FINDIV45,Channel x divider ratio" line.long 0xB8 "RCC_FINDIV46CFGR,RCC final divider 46 configuration register" bitfld.long 0xB8 6. "FINDIV46EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xB8 0.--5. 1. "FINDIV46,Channel x divider ratio" line.long 0xBC "RCC_FINDIV47CFGR,RCC final divider 47 configuration register" bitfld.long 0xBC 6. "FINDIV47EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xBC 0.--5. 1. "FINDIV47,Channel x divider ratio" line.long 0xC0 "RCC_FINDIV48CFGR,RCC final divider 48 configuration register" bitfld.long 0xC0 6. "FINDIV48EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xC0 0.--5. 1. "FINDIV48,Channel x divider ratio" line.long 0xC4 "RCC_FINDIV49CFGR,RCC final divider 49 configuration register" bitfld.long 0xC4 6. "FINDIV49EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xC4 0.--5. 1. "FINDIV49,Channel x divider ratio" line.long 0xC8 "RCC_FINDIV50CFGR,RCC final divider 50 configuration register" bitfld.long 0xC8 6. "FINDIV50EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xC8 0.--5. 1. "FINDIV50,Channel x divider ratio" line.long 0xCC "RCC_FINDIV51CFGR,RCC final divider 51 configuration register" bitfld.long 0xCC 6. "FINDIV51EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xCC 0.--5. 1. "FINDIV51,Channel x divider ratio" line.long 0xD0 "RCC_FINDIV52CFGR,RCC final divider 52 configuration register" bitfld.long 0xD0 6. "FINDIV52EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xD0 0.--5. 1. "FINDIV52,Channel x divider ratio" line.long 0xD4 "RCC_FINDIV53CFGR,RCC final divider 53 configuration register" bitfld.long 0xD4 6. "FINDIV53EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xD4 0.--5. 1. "FINDIV53,Channel x divider ratio" line.long 0xD8 "RCC_FINDIV54CFGR,RCC final divider 54 configuration register" bitfld.long 0xD8 6. "FINDIV54EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xD8 0.--5. 1. "FINDIV54,Channel x divider ratio" line.long 0xDC "RCC_FINDIV55CFGR,RCC final divider 55 configuration register" bitfld.long 0xDC 6. "FINDIV55EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xDC 0.--5. 1. "FINDIV55,Channel x divider ratio" line.long 0xE0 "RCC_FINDIV56CFGR,RCC final divider 56 configuration register" bitfld.long 0xE0 6. "FINDIV56EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xE0 0.--5. 1. "FINDIV56,Channel x divider ratio" line.long 0xE4 "RCC_FINDIV57CFGR,RCC final divider 57 configuration register" bitfld.long 0xE4 6. "FINDIV57EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xE4 0.--5. 1. "FINDIV57,Channel x divider ratio" line.long 0xE8 "RCC_FINDIV58CFGR,RCC final divider 58 configuration register" bitfld.long 0xE8 6. "FINDIV58EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xE8 0.--5. 1. "FINDIV58,Channel x divider ratio" line.long 0xEC "RCC_FINDIV59CFGR,RCC final divider 59 configuration register" bitfld.long 0xEC 6. "FINDIV59EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xEC 0.--5. 1. "FINDIV59,Channel x divider ratio" line.long 0xF0 "RCC_FINDIV60CFGR,RCC final divider 60 configuration register" bitfld.long 0xF0 6. "FINDIV60EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xF0 0.--5. 1. "FINDIV60,Channel x divider ratio" line.long 0xF4 "RCC_FINDIV61CFGR,RCC final divider 61 configuration register" bitfld.long 0xF4 6. "FINDIV61EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xF4 0.--5. 1. "FINDIV61,Channel x divider ratio" line.long 0xF8 "RCC_FINDIV62CFGR,RCC final divider 62 configuration register" bitfld.long 0xF8 6. "FINDIV62EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xF8 0.--5. 1. "FINDIV62,Channel x divider ratio" line.long 0xFC "RCC_FINDIV63CFGR,RCC final divider 63 configuration register" bitfld.long 0xFC 6. "FINDIV63EN,Final divider channel x output enable" "B_0x0,B_0x1" hexmask.long.byte 0xFC 0.--5. 1. "FINDIV63,Channel x divider ratio" rgroup.long 0x1324++0x7 line.long 0x0 "RCC_FINDIVSR1,RCC final divider status register 1" hexmask.long 0x0 0.--31. 1. "FINDIVSTS,Final divider channel[31:0] output status" line.long 0x4 "RCC_FINDIVSR2,RCC final divider status register 2" hexmask.long 0x4 0.--31. 1. "FINDIVSTS,Final divider channel[63:32] output status" group.long 0x1340++0xF line.long 0x0 "RCC_FCALCOBS0CFGR,RCC clock frequency calculator and observation 0 clock configuration register" bitfld.long 0x0 26. "CKOBSEN,Observation clock 0 output enable" "B_0x0,B_0x1" bitfld.long 0x0 25. "FCALCCKEN,Clock frequency calculator input clock enable" "B_0x0,B_0x1" bitfld.long 0x0 22.--24. "CKOBSDIV,Observation clock 0 divide ratio" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 18. "CKOBSINV,Observation clock 0 inverter" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "FCALCCKINV,Clock frequency calculator input clock inverter" "B_0x0,B_0x1" bitfld.long 0x0 16. "CKOBSEXTSEL,External clock source for observation clock 0" "B_0x0,B_0x1" bitfld.long 0x0 15. "FCALCCKEXTSEL,External clock source for clock frequency calculator input clock" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "CKEXTSEL,External clock selector for clock frequency calculator and" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline hexmask.long.byte 0x0 0.--7. 1. "CKINTSEL,Internal clock selector for clock frequency calculator and observation clock 0" line.long 0x4 "RCC_FCALCOBS1CFGR,RCC clock frequency calculator and observation 1 clock configuration register" bitfld.long 0x4 27. "FCALCRSTN,Clock frequency calculator reset" "B_0x0,B_0x1" bitfld.long 0x4 26. "CKOBSEN,Observation clock 1 output enable" "B_0x0,B_0x1" bitfld.long 0x4 22.--24. "CKOBSDIV,Observation clock 1 divide ratio" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 18. "CKOBSINV,Observation clock 1 inverter" "B_0x0,B_0x1" newline bitfld.long 0x4 16. "CKOBSEXTSEL,External clock source for the observation clock 1" "B_0x0,B_0x1" bitfld.long 0x4 8.--10. "CKEXTSEL,External clock for observation clock 1" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0x4 0.--7. 1. "CKINTSEL,Internal clock selector for observation clock 1" line.long 0x8 "RCC_FCALCREFCFGR,RCC clock frequency calculator reference clock configuration register" bitfld.long 0x8 0.--2. "FCALCREFCKSEL,Reference clock selection used by clock frequency calculator" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0xC "RCC_FCALCCR1,RCC clock frequency calculator control register 1" bitfld.long 0xC 0. "FCALCRUN,Clock frequency calculator run" "B_0x0,B_0x1" group.long 0x1354++0x3 line.long 0x0 "RCC_FCALCCR2,RCC clock frequency calculator control register 2" hexmask.long.byte 0x0 17.--21. 1. "FCALCTYP,Clock frequency calculation type selection" hexmask.long.byte 0x0 11.--14. 1. "FCALCTWC,Time window code for clock frequency calculation" bitfld.long 0x0 3.--4. "FCALCMD,Clock frequency calculation method" "?,?,?,B_0x3" rgroup.long 0x1358++0x3 line.long 0x0 "RCC_FCALCSR,RCC clock frequency calculator status register" bitfld.long 0x0 19. "FCALCSTS,Clock frequency calculation status" "0,1" hexmask.long.tbyte 0x0 0.--16. 1. "FVAL,Clock frequency calculation value" group.long 0x1360++0x13 line.long 0x0 "RCC_PLL4CFGR1,RCC PLL4 configuration register 1" bitfld.long 0x0 28. "CKREFST,PLLy reference clock state" "B_0x0,B_0x1" rbitfld.long 0x0 24. "PLLRDY,PLLy clock ready flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "PLLEN,PLLy enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SSMODRST,PLLy spread-spectrum modulator reset" "B_0x0,B_0x1" line.long 0x4 "RCC_PLL4CFGR2,RCC PLL4 configuration register 2" hexmask.long.word 0x4 16.--27. 1. "FBDIV,PLLy VCO multiplication factor" hexmask.long.byte 0x4 0.--5. 1. "FREFDIV,PLLy reference input clock divide frequency ratio" line.long 0x8 "RCC_PLL4CFGR3,RCC PLL4 configuration register 3" bitfld.long 0x8 26. "SSCGDIS,PLLy spread-spectrum modulator disable" "B_0x0,B_0x1" bitfld.long 0x8 25. "DACEN,PLLy noise canceling DAC enable in fractional mode." "B_0x0,B_0x1" bitfld.long 0x8 24. "DOWNSPREAD,PLLy VCO frequency modulation mode" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--23. 1. "FRACIN,Fractional part of PLLy VCO multiplication factor" line.long 0xC "RCC_PLL4CFGR4,RCC PLL4 configuration register 4" bitfld.long 0xC 10. "BYPASS,PLLy FOUTPOSTDIV bypass" "B_0x0,B_0x1" bitfld.long 0xC 9. "FOUTPOSTDIVEN,PLLy output and post dividers enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "DSMEN,PLLy delta-sigma modulator enable" "B_0x0,B_0x1" line.long 0x10 "RCC_PLL4CFGR5,RCC PLL4 configuration register 5" hexmask.long.byte 0x10 16.--20. 1. "SPREAD,Modulation depth adjustment for PLLy" hexmask.long.byte 0x10 0.--3. 1. "DIVVAL,Modulation frequency adjustment for PLLy" group.long 0x1378++0x7 line.long 0x0 "RCC_PLL4CFGR6,RCC PLL4 configuration register 6" bitfld.long 0x0 0.--2. "POSTDIV1,PLLy VCO frequency divide level 1" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" line.long 0x4 "RCC_PLL4CFGR7,RCC PLL4 configuration register 7" bitfld.long 0x4 0.--2. "POSTDIV2,PLLy VCO frequency divide level 2" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" group.long 0x1388++0x13 line.long 0x0 "RCC_PLL5CFGR1,RCC PLL5 configuration register 1" bitfld.long 0x0 28. "CKREFST,PLLy reference clock state" "B_0x0,B_0x1" rbitfld.long 0x0 24. "PLLRDY,PLLy clock ready flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "PLLEN,PLLy enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SSMODRST,PLLy spread-spectrum modulator reset" "B_0x0,B_0x1" line.long 0x4 "RCC_PLL5CFGR2,RCC PLL5 configuration register 2" hexmask.long.word 0x4 16.--27. 1. "FBDIV,PLLy VCO multiplication factor" hexmask.long.byte 0x4 0.--5. 1. "FREFDIV,PLLy reference input clock divide frequency ratio" line.long 0x8 "RCC_PLL5CFGR3,RCC PLL5 configuration register 3" bitfld.long 0x8 26. "SSCGDIS,PLLy spread-spectrum modulator disable" "B_0x0,B_0x1" bitfld.long 0x8 25. "DACEN,PLLy noise canceling DAC enable in fractional mode." "B_0x0,B_0x1" bitfld.long 0x8 24. "DOWNSPREAD,PLLy VCO frequency modulation mode" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--23. 1. "FRACIN,Fractional part of PLLy VCO multiplication factor" line.long 0xC "RCC_PLL5CFGR4,RCC PLL5 configuration register 4" bitfld.long 0xC 10. "BYPASS,PLLy FOUTPOSTDIV bypass" "B_0x0,B_0x1" bitfld.long 0xC 9. "FOUTPOSTDIVEN,PLLy output and post dividers enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "DSMEN,PLLy delta-sigma modulator enable" "B_0x0,B_0x1" line.long 0x10 "RCC_PLL5CFGR5,RCC PLL5 configuration register 5" hexmask.long.byte 0x10 16.--20. 1. "SPREAD,Modulation depth adjustment for PLLy" hexmask.long.byte 0x10 0.--3. 1. "DIVVAL,Modulation frequency adjustment for PLLy" group.long 0x13A0++0x7 line.long 0x0 "RCC_PLL5CFGR6,RCC PLL5 configuration register 6" bitfld.long 0x0 0.--2. "POSTDIV1,PLLy VCO frequency divide level 1" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" line.long 0x4 "RCC_PLL5CFGR7,RCC PLL5 configuration register 7" bitfld.long 0x4 0.--2. "POSTDIV2,PLLy VCO frequency divide level 2" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" group.long 0x13B0++0x13 line.long 0x0 "RCC_PLL6CFGR1,RCC PLL6 configuration register 1" bitfld.long 0x0 28. "CKREFST,PLLy reference clock state" "B_0x0,B_0x1" rbitfld.long 0x0 24. "PLLRDY,PLLy clock ready flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "PLLEN,PLLy enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SSMODRST,PLLy spread-spectrum modulator reset" "B_0x0,B_0x1" line.long 0x4 "RCC_PLL6CFGR2,RCC PLL6 configuration register 2" hexmask.long.word 0x4 16.--27. 1. "FBDIV,PLLy VCO multiplication factor" hexmask.long.byte 0x4 0.--5. 1. "FREFDIV,PLLy reference input clock divide frequency ratio" line.long 0x8 "RCC_PLL6CFGR3,RCC PLL6 configuration register 3" bitfld.long 0x8 26. "SSCGDIS,PLLy spread-spectrum modulator disable" "B_0x0,B_0x1" bitfld.long 0x8 25. "DACEN,PLLy noise canceling DAC enable in fractional mode." "B_0x0,B_0x1" bitfld.long 0x8 24. "DOWNSPREAD,PLLy VCO frequency modulation mode" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--23. 1. "FRACIN,Fractional part of PLLy VCO multiplication factor" line.long 0xC "RCC_PLL6CFGR4,RCC PLL6 configuration register 4" bitfld.long 0xC 10. "BYPASS,PLLy FOUTPOSTDIV bypass" "B_0x0,B_0x1" bitfld.long 0xC 9. "FOUTPOSTDIVEN,PLLy output and post dividers enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "DSMEN,PLLy delta-sigma modulator enable" "B_0x0,B_0x1" line.long 0x10 "RCC_PLL6CFGR5,RCC PLL6 configuration register 5" hexmask.long.byte 0x10 16.--20. 1. "SPREAD,Modulation depth adjustment for PLLy" hexmask.long.byte 0x10 0.--3. 1. "DIVVAL,Modulation frequency adjustment for PLLy" group.long 0x13C8++0x7 line.long 0x0 "RCC_PLL6CFGR6,RCC PLL6 configuration register 6" bitfld.long 0x0 0.--2. "POSTDIV1,PLLy VCO frequency divide level 1" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" line.long 0x4 "RCC_PLL6CFGR7,RCC PLL6 configuration register 7" bitfld.long 0x4 0.--2. "POSTDIV2,PLLy VCO frequency divide level 2" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" group.long 0x13D8++0x13 line.long 0x0 "RCC_PLL7CFGR1,RCC PLL7 configuration register 1" bitfld.long 0x0 28. "CKREFST,PLLy reference clock state" "B_0x0,B_0x1" rbitfld.long 0x0 24. "PLLRDY,PLLy clock ready flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "PLLEN,PLLy enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SSMODRST,PLLy spread-spectrum modulator reset" "B_0x0,B_0x1" line.long 0x4 "RCC_PLL7CFGR2,RCC PLL7 configuration register 2" hexmask.long.word 0x4 16.--27. 1. "FBDIV,PLLy VCO multiplication factor" hexmask.long.byte 0x4 0.--5. 1. "FREFDIV,PLLy reference input clock divide frequency ratio" line.long 0x8 "RCC_PLL7CFGR3,RCC PLL7 configuration register 3" bitfld.long 0x8 26. "SSCGDIS,PLLy spread-spectrum modulator disable" "B_0x0,B_0x1" bitfld.long 0x8 25. "DACEN,PLLy noise canceling DAC enable in fractional mode." "B_0x0,B_0x1" bitfld.long 0x8 24. "DOWNSPREAD,PLLy VCO frequency modulation mode" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--23. 1. "FRACIN,Fractional part of PLLy VCO multiplication factor" line.long 0xC "RCC_PLL7CFGR4,RCC PLL7 configuration register 4" bitfld.long 0xC 10. "BYPASS,PLLy FOUTPOSTDIV bypass" "B_0x0,B_0x1" bitfld.long 0xC 9. "FOUTPOSTDIVEN,PLLy output and post dividers enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "DSMEN,PLLy delta-sigma modulator enable" "B_0x0,B_0x1" line.long 0x10 "RCC_PLL7CFGR5,RCC PLL7 configuration register 5" hexmask.long.byte 0x10 16.--20. 1. "SPREAD,Modulation depth adjustment for PLLy" hexmask.long.byte 0x10 0.--3. 1. "DIVVAL,Modulation frequency adjustment for PLLy" group.long 0x13F0++0x7 line.long 0x0 "RCC_PLL7CFGR6,RCC PLL7 configuration register 6" bitfld.long 0x0 0.--2. "POSTDIV1,PLLy VCO frequency divide level 1" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" line.long 0x4 "RCC_PLL7CFGR7,RCC PLL7 configuration register 7" bitfld.long 0x4 0.--2. "POSTDIV2,PLLy VCO frequency divide level 2" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" group.long 0x1400++0x13 line.long 0x0 "RCC_PLL8CFGR1,RCC PLL8 configuration register 1" bitfld.long 0x0 28. "CKREFST,PLLy reference clock state" "B_0x0,B_0x1" rbitfld.long 0x0 24. "PLLRDY,PLLy clock ready flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "PLLEN,PLLy enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "SSMODRST,PLLy spread-spectrum modulator reset" "B_0x0,B_0x1" line.long 0x4 "RCC_PLL8CFGR2,RCC PLL8 configuration register 2" hexmask.long.word 0x4 16.--27. 1. "FBDIV,PLLy VCO multiplication factor" hexmask.long.byte 0x4 0.--5. 1. "FREFDIV,PLLy reference input clock divide frequency ratio" line.long 0x8 "RCC_PLL8CFGR3,RCC PLL8 configuration register 3" bitfld.long 0x8 26. "SSCGDIS,PLLy spread-spectrum modulator disable" "B_0x0,B_0x1" bitfld.long 0x8 25. "DACEN,PLLy noise canceling DAC enable in fractional mode." "B_0x0,B_0x1" bitfld.long 0x8 24. "DOWNSPREAD,PLLy VCO frequency modulation mode" "B_0x0,B_0x1" hexmask.long.tbyte 0x8 0.--23. 1. "FRACIN,Fractional part of PLLy VCO multiplication factor" line.long 0xC "RCC_PLL8CFGR4,RCC PLL8 configuration register 4" bitfld.long 0xC 10. "BYPASS,PLLy FOUTPOSTDIV bypass" "B_0x0,B_0x1" bitfld.long 0xC 9. "FOUTPOSTDIVEN,PLLy output and post dividers enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "DSMEN,PLLy delta-sigma modulator enable" "B_0x0,B_0x1" line.long 0x10 "RCC_PLL8CFGR5,RCC PLL8 configuration register 5" hexmask.long.byte 0x10 16.--20. 1. "SPREAD,Modulation depth adjustment for PLLy" hexmask.long.byte 0x10 0.--3. 1. "DIVVAL,Modulation frequency adjustment for PLLy" group.long 0x1418++0x7 line.long 0x0 "RCC_PLL8CFGR6,RCC PLL8 configuration register 6" bitfld.long 0x0 0.--2. "POSTDIV1,PLLy VCO frequency divide level 1" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" line.long 0x4 "RCC_PLL8CFGR7,RCC PLL8 configuration register 7" bitfld.long 0x4 0.--2. "POSTDIV2,PLLy VCO frequency divide level 2" "B_0x0,B_0x1,?,?,?,?,B_0x6,B_0x7" rgroup.long 0xFFF4++0xB line.long 0x0 "RCC_VERR,RCC version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,Major RCC revision" hexmask.long.byte 0x0 0.--3. 1. "MINREV,Minor RCC revision" line.long 0x4 "RCC_IDR,RCC identifier register" hexmask.long 0x4 0.--31. 1. "ID,RCC identifier" line.long 0x8 "RCC_SIDR,RCC size identification register" hexmask.long 0x8 0.--31. 1. "SID,RCC decoding space (64 Kbytes)" tree.end tree.end endif tree "RIF (Resource Isolation Framework)" base ad:0x0 sif (cpuis("*CA35")||cpuis("*CM33F")) tree "RISAB (Resource Isolation Slave Unit for Address Space (Block-Based))" base ad:0x0 tree "RISAB" base ad:0x420F0000 group.long 0x0++0x3 line.long 0x0 "RISAB_CR,RISAB configuration register" bitfld.long 0x0 31. "SRWIAD,Secure read/write illegal access disable" "B_0x0,B_0x1" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "RISAB_IASR,RISAB illegal access status register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAB_IACR,RISAB illegal access clear register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" group.long 0x10++0x3 line.long 0x0 "RISAB_RCFGLOCKR,RISAB configuration lock register" bitfld.long 0x0 31. "RLOCK31,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 30. "RLOCK30,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 29. "RLOCK29,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 28. "RLOCK28,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 27. "RLOCK27,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 26. "RLOCK26,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 25. "RLOCK25,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "RLOCK24,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 23. "RLOCK23,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 22. "RLOCK22,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 21. "RLOCK21,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 20. "RLOCK20,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 19. "RLOCK19,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 18. "RLOCK18,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "RLOCK17,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 16. "RLOCK16,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 15. "RLOCK15,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 14. "RLOCK14,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 13. "RLOCK13,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 12. "RLOCK12,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 11. "RLOCK11,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "RLOCK10,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 9. "RLOCK9,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 8. "RLOCK8,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 7. "RLOCK7,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 6. "RLOCK6,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 5. "RLOCK5,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 4. "RLOCK4,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "RLOCK3,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 2. "RLOCK2,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 1. "RLOCK1,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 0. "RLOCK0,Resource lock for page y" "B_0x0,B_0x1" rgroup.long 0x20++0x7 line.long 0x0 "RISAB_IAESR,RISAB illegal access error status register" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAB_IADDR,RISAB illegal address register" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" group.long 0x100++0x7F line.long 0x0 "RISAB_PG0_SECCFGR,RISAB page 0 security configuration register" bitfld.long 0x0 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_SECCFGR,RISAB page 1 security configuration register" bitfld.long 0x4 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_SECCFGR,RISAB page 2 security configuration register" bitfld.long 0x8 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_SECCFGR,RISAB page 3 security configuration register" bitfld.long 0xC 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_SECCFGR,RISAB page 4 security configuration register" bitfld.long 0x10 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_SECCFGR,RISAB page 5 security configuration register" bitfld.long 0x14 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_SECCFGR,RISAB page 6 security configuration register" bitfld.long 0x18 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_SECCFGR,RISAB page 7 security configuration register" bitfld.long 0x1C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_SECCFGR,RISAB page 8 security configuration register" bitfld.long 0x20 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_SECCFGR,RISAB page 9 security configuration register" bitfld.long 0x24 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_SECCFGR,RISAB page 10 security configuration register" bitfld.long 0x28 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_SECCFGR,RISAB page 11 security configuration register" bitfld.long 0x2C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_SECCFGR,RISAB page 12 security configuration register" bitfld.long 0x30 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_SECCFGR,RISAB page 13 security configuration register" bitfld.long 0x34 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_SECCFGR,RISAB page 14 security configuration register" bitfld.long 0x38 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_SECCFGR,RISAB page 15 security configuration register" bitfld.long 0x3C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_SECCFGR,RISAB page 16 security configuration register" bitfld.long 0x40 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_SECCFGR,RISAB page 17 security configuration register" bitfld.long 0x44 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_SECCFGR,RISAB page 18 security configuration register" bitfld.long 0x48 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_SECCFGR,RISAB page 19 security configuration register" bitfld.long 0x4C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_SECCFGR,RISAB page 20 security configuration register" bitfld.long 0x50 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_SECCFGR,RISAB page 21 security configuration register" bitfld.long 0x54 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_SECCFGR,RISAB page 22 security configuration register" bitfld.long 0x58 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_SECCFGR,RISAB page 23 security configuration register" bitfld.long 0x5C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_SECCFGR,RISAB page 24 security configuration register" bitfld.long 0x60 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_SECCFGR,RISAB page 25 security configuration register" bitfld.long 0x64 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_SECCFGR,RISAB page 26 security configuration register" bitfld.long 0x68 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_SECCFGR,RISAB page 27 security configuration register" bitfld.long 0x6C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_SECCFGR,RISAB page 28 security configuration register" bitfld.long 0x70 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_SECCFGR,RISAB page 29 security configuration register" bitfld.long 0x74 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_SECCFGR,RISAB page 30 security configuration register" bitfld.long 0x78 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_SECCFGR,RISAB page 31 security configuration register" bitfld.long 0x7C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" group.long 0x200++0x7F line.long 0x0 "RISAB_PG0_PRIVCFGR,RISAB page 0 default privileged configuration register" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_PRIVCFGR,RISAB page 1 default privileged configuration register" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_PRIVCFGR,RISAB page 2 default privileged configuration register" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_PRIVCFGR,RISAB page 3 default privileged configuration register" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_PRIVCFGR,RISAB page 4 default privileged configuration register" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_PRIVCFGR,RISAB page 5 default privileged configuration register" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_PRIVCFGR,RISAB page 6 default privileged configuration register" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_PRIVCFGR,RISAB page 7 default privileged configuration register" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_PRIVCFGR,RISAB page 8 default privileged configuration register" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_PRIVCFGR,RISAB page 9 default privileged configuration register" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_PRIVCFGR,RISAB page 10 default privileged configuration register" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_PRIVCFGR,RISAB page 11 default privileged configuration register" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_PRIVCFGR,RISAB page 12 default privileged configuration register" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_PRIVCFGR,RISAB page 13 default privileged configuration register" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_PRIVCFGR,RISAB page 14 default privileged configuration register" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_PRIVCFGR,RISAB page 15 default privileged configuration register" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_PRIVCFGR,RISAB page 16 default privileged configuration register" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_PRIVCFGR,RISAB page 17 default privileged configuration register" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_PRIVCFGR,RISAB page 18 default privileged configuration register" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_PRIVCFGR,RISAB page 19 default privileged configuration register" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_PRIVCFGR,RISAB page 20 default privileged configuration register" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_PRIVCFGR,RISAB page 21 default privileged configuration register" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_PRIVCFGR,RISAB page 22 default privileged configuration register" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_PRIVCFGR,RISAB page 23 default privileged configuration register" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_PRIVCFGR,RISAB page 24 default privileged configuration register" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_PRIVCFGR,RISAB page 25 default privileged configuration register" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_PRIVCFGR,RISAB page 26 default privileged configuration register" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_PRIVCFGR,RISAB page 27 default privileged configuration register" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_PRIVCFGR,RISAB page 28 default privileged configuration register" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_PRIVCFGR,RISAB page 29 default privileged configuration register" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_PRIVCFGR,RISAB page 30 default privileged configuration register" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_PRIVCFGR,RISAB page 31 default privileged configuration register" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x600++0x7F line.long 0x0 "RISAB_PG0_C2PRIVCFGR,RISAB page 0 privileged configuration register for compartment 2" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_C2PRIVCFGR,RISAB page 1 privileged configuration register for compartment 2" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_C2PRIVCFGR,RISAB page 2 privileged configuration register for compartment 2" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_C2PRIVCFGR,RISAB page 3 privileged configuration register for compartment 2" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_C2PRIVCFGR,RISAB page 4 privileged configuration register for compartment 2" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_C2PRIVCFGR,RISAB page 5 privileged configuration register for compartment 2" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_C2PRIVCFGR,RISAB page 6 privileged configuration register for compartment 2" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_C2PRIVCFGR,RISAB page 7 privileged configuration register for compartment 2" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_C2PRIVCFGR,RISAB page 8 privileged configuration register for compartment 2" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_C2PRIVCFGR,RISAB page 9 privileged configuration register for compartment 2" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_C2PRIVCFGR,RISAB page 10 privileged configuration register for compartment 2" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_C2PRIVCFGR,RISAB page 11 privileged configuration register for compartment 2" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_C2PRIVCFGR,RISAB page 12 privileged configuration register for compartment 2" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_C2PRIVCFGR,RISAB page 13 privileged configuration register for compartment 2" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_C2PRIVCFGR,RISAB page 14 privileged configuration register for compartment 2" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_C2PRIVCFGR,RISAB page 15 privileged configuration register for compartment 2" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_C2PRIVCFGR,RISAB page 16 privileged configuration register for compartment 2" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_C2PRIVCFGR,RISAB page 17 privileged configuration register for compartment 2" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_C2PRIVCFGR,RISAB page 18 privileged configuration register for compartment 2" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_C2PRIVCFGR,RISAB page 19 privileged configuration register for compartment 2" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_C2PRIVCFGR,RISAB page 20 privileged configuration register for compartment 2" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_C2PRIVCFGR,RISAB page 21 privileged configuration register for compartment 2" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_C2PRIVCFGR,RISAB page 22 privileged configuration register for compartment 2" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_C2PRIVCFGR,RISAB page 23 privileged configuration register for compartment 2" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_C2PRIVCFGR,RISAB page 24 privileged configuration register for compartment 2" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_C2PRIVCFGR,RISAB page 25 privileged configuration register for compartment 2" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_C2PRIVCFGR,RISAB page 26 privileged configuration register for compartment 2" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_C2PRIVCFGR,RISAB page 27 privileged configuration register for compartment 2" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_C2PRIVCFGR,RISAB page 28 privileged configuration register for compartment 2" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_C2PRIVCFGR,RISAB page 29 privileged configuration register for compartment 2" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_C2PRIVCFGR,RISAB page 30 privileged configuration register for compartment 2" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_C2PRIVCFGR,RISAB page 31 privileged configuration register for compartment 2" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x800++0x3 line.long 0x0 "RISAB_CID0PRIVCFGR,RISAB compartment 0 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x808++0x3 line.long 0x0 "RISAB_CID0RDCFGR,RISAB compartment 0 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x810++0x3 line.long 0x0 "RISAB_CID0WRCFGR,RISAB compartment 0 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x820++0x3 line.long 0x0 "RISAB_CID1PRIVCFGR,RISAB compartment 1 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x828++0x3 line.long 0x0 "RISAB_CID1RDCFGR,RISAB compartment 1 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x830++0x3 line.long 0x0 "RISAB_CID1WRCFGR,RISAB compartment 1 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x840++0x3 line.long 0x0 "RISAB_CID2PRIVCFGR,RISAB compartment 2 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x848++0x3 line.long 0x0 "RISAB_CID2RDCFGR,RISAB compartment 2 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x850++0x3 line.long 0x0 "RISAB_CID2WRCFGR,RISAB compartment 2 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x860++0x3 line.long 0x0 "RISAB_CID3PRIVCFGR,RISAB compartment 3 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x868++0x3 line.long 0x0 "RISAB_CID3RDCFGR,RISAB compartment 3 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x870++0x3 line.long 0x0 "RISAB_CID3WRCFGR,RISAB compartment 3 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x880++0x3 line.long 0x0 "RISAB_CID4PRIVCFGR,RISAB compartment 4 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x888++0x3 line.long 0x0 "RISAB_CID4RDCFGR,RISAB compartment 4 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x890++0x3 line.long 0x0 "RISAB_CID4WRCFGR,RISAB compartment 4 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A0++0x3 line.long 0x0 "RISAB_CID5PRIVCFGR,RISAB compartment 5 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A8++0x3 line.long 0x0 "RISAB_CID5RDCFGR,RISAB compartment 5 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8B0++0x3 line.long 0x0 "RISAB_CID5WRCFGR,RISAB compartment 5 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C0++0x3 line.long 0x0 "RISAB_CID6PRIVCFGR,RISAB compartment 6 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C8++0x3 line.long 0x0 "RISAB_CID6RDCFGR,RISAB compartment 6 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8D0++0x3 line.long 0x0 "RISAB_CID6WRCFGR,RISAB compartment 6 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0xA00++0x7F line.long 0x0 "RISAB_PG0_CIDCFGR,RISAB page 0 CID configuration register" bitfld.long 0x0 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_CIDCFGR,RISAB page 1 CID configuration register" bitfld.long 0x4 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_CIDCFGR,RISAB page 2 CID configuration register" bitfld.long 0x8 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_CIDCFGR,RISAB page 3 CID configuration register" bitfld.long 0xC 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_CIDCFGR,RISAB page 4 CID configuration register" bitfld.long 0x10 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_CIDCFGR,RISAB page 5 CID configuration register" bitfld.long 0x14 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_CIDCFGR,RISAB page 6 CID configuration register" bitfld.long 0x18 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_CIDCFGR,RISAB page 7 CID configuration register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_CIDCFGR,RISAB page 8 CID configuration register" bitfld.long 0x20 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_CIDCFGR,RISAB page 9 CID configuration register" bitfld.long 0x24 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_CIDCFGR,RISAB page 10 CID configuration register" bitfld.long 0x28 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_CIDCFGR,RISAB page 11 CID configuration register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_CIDCFGR,RISAB page 12 CID configuration register" bitfld.long 0x30 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_CIDCFGR,RISAB page 13 CID configuration register" bitfld.long 0x34 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x34 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_CIDCFGR,RISAB page 14 CID configuration register" bitfld.long 0x38 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_CIDCFGR,RISAB page 15 CID configuration register" bitfld.long 0x3C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x3C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_CIDCFGR,RISAB page 16 CID configuration register" bitfld.long 0x40 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x40 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_CIDCFGR,RISAB page 17 CID configuration register" bitfld.long 0x44 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x44 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x44 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_CIDCFGR,RISAB page 18 CID configuration register" bitfld.long 0x48 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x48 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_CIDCFGR,RISAB page 19 CID configuration register" bitfld.long 0x4C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_CIDCFGR,RISAB page 20 CID configuration register" bitfld.long 0x50 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x50 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_CIDCFGR,RISAB page 21 CID configuration register" bitfld.long 0x54 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x54 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x54 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_CIDCFGR,RISAB page 22 CID configuration register" bitfld.long 0x58 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x58 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_CIDCFGR,RISAB page 23 CID configuration register" bitfld.long 0x5C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x5C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_CIDCFGR,RISAB page 24 CID configuration register" bitfld.long 0x60 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x60 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_CIDCFGR,RISAB page 25 CID configuration register" bitfld.long 0x64 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x64 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x64 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_CIDCFGR,RISAB page 26 CID configuration register" bitfld.long 0x68 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x68 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_CIDCFGR,RISAB page 27 CID configuration register" bitfld.long 0x6C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x6C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_CIDCFGR,RISAB page 28 CID configuration register" bitfld.long 0x70 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x70 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_CIDCFGR,RISAB page 29 CID configuration register" bitfld.long 0x74 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x74 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x74 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_CIDCFGR,RISAB page 30 CID configuration register" bitfld.long 0x78 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x78 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_CIDCFGR,RISAB page 31 CID configuration register" bitfld.long 0x7C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x7C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" rgroup.long 0xFE8++0x17 line.long 0x0 "RISAB_HWCFGR3,RISAB hardware configuration register 3" hexmask.long 0x0 0.--31. 1. "CFG,Hardware configuration" line.long 0x4 "RISAB_HWCFGR2,RISAB hardware configuration register 2" hexmask.long 0x4 0.--31. 1. "CFG,Hardware configuration" line.long 0x8 "RISAB_HWCFGR1,RISAB hardware configuration register 1" hexmask.long.byte 0x8 24.--27. 1. "CFG7,Hardware configuration 7" hexmask.long.byte 0x8 20.--23. 1. "CFG6,Hardware configuration 6" hexmask.long.byte 0x8 16.--19. 1. "CFG5,Hardware configuration 5" hexmask.long.byte 0x8 12.--15. 1. "CFG4,Hardware configuration 4" hexmask.long.byte 0x8 8.--11. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x8 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x8 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0xC "RISAB_VERR,RISAB version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,RISAB major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,RISAB minor revision" line.long 0x10 "RISAB_IPIDR,RISAB identification register" hexmask.long 0x10 0.--31. 1. "ID,RISAB identification code" line.long 0x14 "RISAB_SIDR,RISAB size identification register" hexmask.long 0x14 0.--31. 1. "SID,RISAB size identification code" tree.end tree "RISAB1_S" base ad:0x520F0000 group.long 0x0++0x3 line.long 0x0 "RISAB_CR,RISAB configuration register" bitfld.long 0x0 31. "SRWIAD,Secure read/write illegal access disable" "B_0x0,B_0x1" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "RISAB_IASR,RISAB illegal access status register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAB_IACR,RISAB illegal access clear register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" group.long 0x10++0x3 line.long 0x0 "RISAB_RCFGLOCKR,RISAB configuration lock register" bitfld.long 0x0 31. "RLOCK31,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 30. "RLOCK30,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 29. "RLOCK29,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 28. "RLOCK28,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 27. "RLOCK27,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 26. "RLOCK26,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 25. "RLOCK25,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "RLOCK24,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 23. "RLOCK23,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 22. "RLOCK22,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 21. "RLOCK21,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 20. "RLOCK20,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 19. "RLOCK19,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 18. "RLOCK18,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "RLOCK17,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 16. "RLOCK16,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 15. "RLOCK15,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 14. "RLOCK14,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 13. "RLOCK13,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 12. "RLOCK12,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 11. "RLOCK11,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "RLOCK10,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 9. "RLOCK9,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 8. "RLOCK8,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 7. "RLOCK7,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 6. "RLOCK6,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 5. "RLOCK5,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 4. "RLOCK4,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "RLOCK3,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 2. "RLOCK2,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 1. "RLOCK1,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 0. "RLOCK0,Resource lock for page y" "B_0x0,B_0x1" rgroup.long 0x20++0x7 line.long 0x0 "RISAB_IAESR,RISAB illegal access error status register" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAB_IADDR,RISAB illegal address register" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" group.long 0x100++0x7F line.long 0x0 "RISAB_PG0_SECCFGR,RISAB page 0 security configuration register" bitfld.long 0x0 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_SECCFGR,RISAB page 1 security configuration register" bitfld.long 0x4 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_SECCFGR,RISAB page 2 security configuration register" bitfld.long 0x8 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_SECCFGR,RISAB page 3 security configuration register" bitfld.long 0xC 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_SECCFGR,RISAB page 4 security configuration register" bitfld.long 0x10 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_SECCFGR,RISAB page 5 security configuration register" bitfld.long 0x14 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_SECCFGR,RISAB page 6 security configuration register" bitfld.long 0x18 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_SECCFGR,RISAB page 7 security configuration register" bitfld.long 0x1C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_SECCFGR,RISAB page 8 security configuration register" bitfld.long 0x20 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_SECCFGR,RISAB page 9 security configuration register" bitfld.long 0x24 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_SECCFGR,RISAB page 10 security configuration register" bitfld.long 0x28 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_SECCFGR,RISAB page 11 security configuration register" bitfld.long 0x2C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_SECCFGR,RISAB page 12 security configuration register" bitfld.long 0x30 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_SECCFGR,RISAB page 13 security configuration register" bitfld.long 0x34 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_SECCFGR,RISAB page 14 security configuration register" bitfld.long 0x38 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_SECCFGR,RISAB page 15 security configuration register" bitfld.long 0x3C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_SECCFGR,RISAB page 16 security configuration register" bitfld.long 0x40 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_SECCFGR,RISAB page 17 security configuration register" bitfld.long 0x44 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_SECCFGR,RISAB page 18 security configuration register" bitfld.long 0x48 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_SECCFGR,RISAB page 19 security configuration register" bitfld.long 0x4C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_SECCFGR,RISAB page 20 security configuration register" bitfld.long 0x50 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_SECCFGR,RISAB page 21 security configuration register" bitfld.long 0x54 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_SECCFGR,RISAB page 22 security configuration register" bitfld.long 0x58 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_SECCFGR,RISAB page 23 security configuration register" bitfld.long 0x5C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_SECCFGR,RISAB page 24 security configuration register" bitfld.long 0x60 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_SECCFGR,RISAB page 25 security configuration register" bitfld.long 0x64 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_SECCFGR,RISAB page 26 security configuration register" bitfld.long 0x68 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_SECCFGR,RISAB page 27 security configuration register" bitfld.long 0x6C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_SECCFGR,RISAB page 28 security configuration register" bitfld.long 0x70 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_SECCFGR,RISAB page 29 security configuration register" bitfld.long 0x74 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_SECCFGR,RISAB page 30 security configuration register" bitfld.long 0x78 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_SECCFGR,RISAB page 31 security configuration register" bitfld.long 0x7C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" group.long 0x200++0x7F line.long 0x0 "RISAB_PG0_PRIVCFGR,RISAB page 0 default privileged configuration register" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_PRIVCFGR,RISAB page 1 default privileged configuration register" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_PRIVCFGR,RISAB page 2 default privileged configuration register" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_PRIVCFGR,RISAB page 3 default privileged configuration register" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_PRIVCFGR,RISAB page 4 default privileged configuration register" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_PRIVCFGR,RISAB page 5 default privileged configuration register" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_PRIVCFGR,RISAB page 6 default privileged configuration register" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_PRIVCFGR,RISAB page 7 default privileged configuration register" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_PRIVCFGR,RISAB page 8 default privileged configuration register" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_PRIVCFGR,RISAB page 9 default privileged configuration register" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_PRIVCFGR,RISAB page 10 default privileged configuration register" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_PRIVCFGR,RISAB page 11 default privileged configuration register" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_PRIVCFGR,RISAB page 12 default privileged configuration register" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_PRIVCFGR,RISAB page 13 default privileged configuration register" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_PRIVCFGR,RISAB page 14 default privileged configuration register" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_PRIVCFGR,RISAB page 15 default privileged configuration register" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_PRIVCFGR,RISAB page 16 default privileged configuration register" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_PRIVCFGR,RISAB page 17 default privileged configuration register" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_PRIVCFGR,RISAB page 18 default privileged configuration register" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_PRIVCFGR,RISAB page 19 default privileged configuration register" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_PRIVCFGR,RISAB page 20 default privileged configuration register" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_PRIVCFGR,RISAB page 21 default privileged configuration register" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_PRIVCFGR,RISAB page 22 default privileged configuration register" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_PRIVCFGR,RISAB page 23 default privileged configuration register" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_PRIVCFGR,RISAB page 24 default privileged configuration register" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_PRIVCFGR,RISAB page 25 default privileged configuration register" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_PRIVCFGR,RISAB page 26 default privileged configuration register" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_PRIVCFGR,RISAB page 27 default privileged configuration register" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_PRIVCFGR,RISAB page 28 default privileged configuration register" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_PRIVCFGR,RISAB page 29 default privileged configuration register" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_PRIVCFGR,RISAB page 30 default privileged configuration register" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_PRIVCFGR,RISAB page 31 default privileged configuration register" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x600++0x7F line.long 0x0 "RISAB_PG0_C2PRIVCFGR,RISAB page 0 privileged configuration register for compartment 2" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_C2PRIVCFGR,RISAB page 1 privileged configuration register for compartment 2" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_C2PRIVCFGR,RISAB page 2 privileged configuration register for compartment 2" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_C2PRIVCFGR,RISAB page 3 privileged configuration register for compartment 2" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_C2PRIVCFGR,RISAB page 4 privileged configuration register for compartment 2" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_C2PRIVCFGR,RISAB page 5 privileged configuration register for compartment 2" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_C2PRIVCFGR,RISAB page 6 privileged configuration register for compartment 2" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_C2PRIVCFGR,RISAB page 7 privileged configuration register for compartment 2" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_C2PRIVCFGR,RISAB page 8 privileged configuration register for compartment 2" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_C2PRIVCFGR,RISAB page 9 privileged configuration register for compartment 2" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_C2PRIVCFGR,RISAB page 10 privileged configuration register for compartment 2" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_C2PRIVCFGR,RISAB page 11 privileged configuration register for compartment 2" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_C2PRIVCFGR,RISAB page 12 privileged configuration register for compartment 2" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_C2PRIVCFGR,RISAB page 13 privileged configuration register for compartment 2" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_C2PRIVCFGR,RISAB page 14 privileged configuration register for compartment 2" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_C2PRIVCFGR,RISAB page 15 privileged configuration register for compartment 2" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_C2PRIVCFGR,RISAB page 16 privileged configuration register for compartment 2" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_C2PRIVCFGR,RISAB page 17 privileged configuration register for compartment 2" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_C2PRIVCFGR,RISAB page 18 privileged configuration register for compartment 2" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_C2PRIVCFGR,RISAB page 19 privileged configuration register for compartment 2" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_C2PRIVCFGR,RISAB page 20 privileged configuration register for compartment 2" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_C2PRIVCFGR,RISAB page 21 privileged configuration register for compartment 2" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_C2PRIVCFGR,RISAB page 22 privileged configuration register for compartment 2" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_C2PRIVCFGR,RISAB page 23 privileged configuration register for compartment 2" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_C2PRIVCFGR,RISAB page 24 privileged configuration register for compartment 2" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_C2PRIVCFGR,RISAB page 25 privileged configuration register for compartment 2" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_C2PRIVCFGR,RISAB page 26 privileged configuration register for compartment 2" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_C2PRIVCFGR,RISAB page 27 privileged configuration register for compartment 2" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_C2PRIVCFGR,RISAB page 28 privileged configuration register for compartment 2" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_C2PRIVCFGR,RISAB page 29 privileged configuration register for compartment 2" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_C2PRIVCFGR,RISAB page 30 privileged configuration register for compartment 2" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_C2PRIVCFGR,RISAB page 31 privileged configuration register for compartment 2" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x800++0x3 line.long 0x0 "RISAB_CID0PRIVCFGR,RISAB compartment 0 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x808++0x3 line.long 0x0 "RISAB_CID0RDCFGR,RISAB compartment 0 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x810++0x3 line.long 0x0 "RISAB_CID0WRCFGR,RISAB compartment 0 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x820++0x3 line.long 0x0 "RISAB_CID1PRIVCFGR,RISAB compartment 1 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x828++0x3 line.long 0x0 "RISAB_CID1RDCFGR,RISAB compartment 1 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x830++0x3 line.long 0x0 "RISAB_CID1WRCFGR,RISAB compartment 1 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x840++0x3 line.long 0x0 "RISAB_CID2PRIVCFGR,RISAB compartment 2 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x848++0x3 line.long 0x0 "RISAB_CID2RDCFGR,RISAB compartment 2 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x850++0x3 line.long 0x0 "RISAB_CID2WRCFGR,RISAB compartment 2 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x860++0x3 line.long 0x0 "RISAB_CID3PRIVCFGR,RISAB compartment 3 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x868++0x3 line.long 0x0 "RISAB_CID3RDCFGR,RISAB compartment 3 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x870++0x3 line.long 0x0 "RISAB_CID3WRCFGR,RISAB compartment 3 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x880++0x3 line.long 0x0 "RISAB_CID4PRIVCFGR,RISAB compartment 4 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x888++0x3 line.long 0x0 "RISAB_CID4RDCFGR,RISAB compartment 4 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x890++0x3 line.long 0x0 "RISAB_CID4WRCFGR,RISAB compartment 4 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A0++0x3 line.long 0x0 "RISAB_CID5PRIVCFGR,RISAB compartment 5 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A8++0x3 line.long 0x0 "RISAB_CID5RDCFGR,RISAB compartment 5 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8B0++0x3 line.long 0x0 "RISAB_CID5WRCFGR,RISAB compartment 5 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C0++0x3 line.long 0x0 "RISAB_CID6PRIVCFGR,RISAB compartment 6 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C8++0x3 line.long 0x0 "RISAB_CID6RDCFGR,RISAB compartment 6 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8D0++0x3 line.long 0x0 "RISAB_CID6WRCFGR,RISAB compartment 6 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0xA00++0x7F line.long 0x0 "RISAB_PG0_CIDCFGR,RISAB page 0 CID configuration register" bitfld.long 0x0 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_CIDCFGR,RISAB page 1 CID configuration register" bitfld.long 0x4 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_CIDCFGR,RISAB page 2 CID configuration register" bitfld.long 0x8 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_CIDCFGR,RISAB page 3 CID configuration register" bitfld.long 0xC 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_CIDCFGR,RISAB page 4 CID configuration register" bitfld.long 0x10 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_CIDCFGR,RISAB page 5 CID configuration register" bitfld.long 0x14 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_CIDCFGR,RISAB page 6 CID configuration register" bitfld.long 0x18 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_CIDCFGR,RISAB page 7 CID configuration register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_CIDCFGR,RISAB page 8 CID configuration register" bitfld.long 0x20 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_CIDCFGR,RISAB page 9 CID configuration register" bitfld.long 0x24 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_CIDCFGR,RISAB page 10 CID configuration register" bitfld.long 0x28 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_CIDCFGR,RISAB page 11 CID configuration register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_CIDCFGR,RISAB page 12 CID configuration register" bitfld.long 0x30 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_CIDCFGR,RISAB page 13 CID configuration register" bitfld.long 0x34 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x34 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_CIDCFGR,RISAB page 14 CID configuration register" bitfld.long 0x38 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_CIDCFGR,RISAB page 15 CID configuration register" bitfld.long 0x3C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x3C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_CIDCFGR,RISAB page 16 CID configuration register" bitfld.long 0x40 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x40 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_CIDCFGR,RISAB page 17 CID configuration register" bitfld.long 0x44 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x44 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x44 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_CIDCFGR,RISAB page 18 CID configuration register" bitfld.long 0x48 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x48 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_CIDCFGR,RISAB page 19 CID configuration register" bitfld.long 0x4C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_CIDCFGR,RISAB page 20 CID configuration register" bitfld.long 0x50 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x50 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_CIDCFGR,RISAB page 21 CID configuration register" bitfld.long 0x54 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x54 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x54 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_CIDCFGR,RISAB page 22 CID configuration register" bitfld.long 0x58 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x58 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_CIDCFGR,RISAB page 23 CID configuration register" bitfld.long 0x5C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x5C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_CIDCFGR,RISAB page 24 CID configuration register" bitfld.long 0x60 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x60 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_CIDCFGR,RISAB page 25 CID configuration register" bitfld.long 0x64 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x64 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x64 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_CIDCFGR,RISAB page 26 CID configuration register" bitfld.long 0x68 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x68 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_CIDCFGR,RISAB page 27 CID configuration register" bitfld.long 0x6C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x6C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_CIDCFGR,RISAB page 28 CID configuration register" bitfld.long 0x70 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x70 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_CIDCFGR,RISAB page 29 CID configuration register" bitfld.long 0x74 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x74 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x74 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_CIDCFGR,RISAB page 30 CID configuration register" bitfld.long 0x78 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x78 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_CIDCFGR,RISAB page 31 CID configuration register" bitfld.long 0x7C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x7C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" rgroup.long 0xFE8++0x17 line.long 0x0 "RISAB_HWCFGR3,RISAB hardware configuration register 3" hexmask.long 0x0 0.--31. 1. "CFG,Hardware configuration" line.long 0x4 "RISAB_HWCFGR2,RISAB hardware configuration register 2" hexmask.long 0x4 0.--31. 1. "CFG,Hardware configuration" line.long 0x8 "RISAB_HWCFGR1,RISAB hardware configuration register 1" hexmask.long.byte 0x8 24.--27. 1. "CFG7,Hardware configuration 7" hexmask.long.byte 0x8 20.--23. 1. "CFG6,Hardware configuration 6" hexmask.long.byte 0x8 16.--19. 1. "CFG5,Hardware configuration 5" hexmask.long.byte 0x8 12.--15. 1. "CFG4,Hardware configuration 4" hexmask.long.byte 0x8 8.--11. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x8 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x8 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0xC "RISAB_VERR,RISAB version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,RISAB major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,RISAB minor revision" line.long 0x10 "RISAB_IPIDR,RISAB identification register" hexmask.long 0x10 0.--31. 1. "ID,RISAB identification code" line.long 0x14 "RISAB_SIDR,RISAB size identification register" hexmask.long 0x14 0.--31. 1. "SID,RISAB size identification code" tree.end tree "RISAB2" base ad:0x42100000 group.long 0x0++0x3 line.long 0x0 "RISAB_CR,RISAB configuration register" bitfld.long 0x0 31. "SRWIAD,Secure read/write illegal access disable" "B_0x0,B_0x1" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "RISAB_IASR,RISAB illegal access status register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAB_IACR,RISAB illegal access clear register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" group.long 0x10++0x3 line.long 0x0 "RISAB_RCFGLOCKR,RISAB configuration lock register" bitfld.long 0x0 31. "RLOCK31,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 30. "RLOCK30,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 29. "RLOCK29,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 28. "RLOCK28,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 27. "RLOCK27,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 26. "RLOCK26,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 25. "RLOCK25,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "RLOCK24,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 23. "RLOCK23,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 22. "RLOCK22,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 21. "RLOCK21,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 20. "RLOCK20,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 19. "RLOCK19,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 18. "RLOCK18,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "RLOCK17,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 16. "RLOCK16,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 15. "RLOCK15,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 14. "RLOCK14,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 13. "RLOCK13,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 12. "RLOCK12,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 11. "RLOCK11,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "RLOCK10,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 9. "RLOCK9,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 8. "RLOCK8,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 7. "RLOCK7,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 6. "RLOCK6,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 5. "RLOCK5,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 4. "RLOCK4,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "RLOCK3,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 2. "RLOCK2,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 1. "RLOCK1,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 0. "RLOCK0,Resource lock for page y" "B_0x0,B_0x1" rgroup.long 0x20++0x7 line.long 0x0 "RISAB_IAESR,RISAB illegal access error status register" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAB_IADDR,RISAB illegal address register" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" group.long 0x100++0x7F line.long 0x0 "RISAB_PG0_SECCFGR,RISAB page 0 security configuration register" bitfld.long 0x0 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_SECCFGR,RISAB page 1 security configuration register" bitfld.long 0x4 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_SECCFGR,RISAB page 2 security configuration register" bitfld.long 0x8 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_SECCFGR,RISAB page 3 security configuration register" bitfld.long 0xC 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_SECCFGR,RISAB page 4 security configuration register" bitfld.long 0x10 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_SECCFGR,RISAB page 5 security configuration register" bitfld.long 0x14 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_SECCFGR,RISAB page 6 security configuration register" bitfld.long 0x18 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_SECCFGR,RISAB page 7 security configuration register" bitfld.long 0x1C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_SECCFGR,RISAB page 8 security configuration register" bitfld.long 0x20 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_SECCFGR,RISAB page 9 security configuration register" bitfld.long 0x24 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_SECCFGR,RISAB page 10 security configuration register" bitfld.long 0x28 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_SECCFGR,RISAB page 11 security configuration register" bitfld.long 0x2C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_SECCFGR,RISAB page 12 security configuration register" bitfld.long 0x30 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_SECCFGR,RISAB page 13 security configuration register" bitfld.long 0x34 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_SECCFGR,RISAB page 14 security configuration register" bitfld.long 0x38 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_SECCFGR,RISAB page 15 security configuration register" bitfld.long 0x3C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_SECCFGR,RISAB page 16 security configuration register" bitfld.long 0x40 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_SECCFGR,RISAB page 17 security configuration register" bitfld.long 0x44 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_SECCFGR,RISAB page 18 security configuration register" bitfld.long 0x48 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_SECCFGR,RISAB page 19 security configuration register" bitfld.long 0x4C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_SECCFGR,RISAB page 20 security configuration register" bitfld.long 0x50 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_SECCFGR,RISAB page 21 security configuration register" bitfld.long 0x54 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_SECCFGR,RISAB page 22 security configuration register" bitfld.long 0x58 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_SECCFGR,RISAB page 23 security configuration register" bitfld.long 0x5C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_SECCFGR,RISAB page 24 security configuration register" bitfld.long 0x60 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_SECCFGR,RISAB page 25 security configuration register" bitfld.long 0x64 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_SECCFGR,RISAB page 26 security configuration register" bitfld.long 0x68 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_SECCFGR,RISAB page 27 security configuration register" bitfld.long 0x6C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_SECCFGR,RISAB page 28 security configuration register" bitfld.long 0x70 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_SECCFGR,RISAB page 29 security configuration register" bitfld.long 0x74 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_SECCFGR,RISAB page 30 security configuration register" bitfld.long 0x78 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_SECCFGR,RISAB page 31 security configuration register" bitfld.long 0x7C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" group.long 0x200++0x7F line.long 0x0 "RISAB_PG0_PRIVCFGR,RISAB page 0 default privileged configuration register" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_PRIVCFGR,RISAB page 1 default privileged configuration register" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_PRIVCFGR,RISAB page 2 default privileged configuration register" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_PRIVCFGR,RISAB page 3 default privileged configuration register" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_PRIVCFGR,RISAB page 4 default privileged configuration register" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_PRIVCFGR,RISAB page 5 default privileged configuration register" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_PRIVCFGR,RISAB page 6 default privileged configuration register" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_PRIVCFGR,RISAB page 7 default privileged configuration register" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_PRIVCFGR,RISAB page 8 default privileged configuration register" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_PRIVCFGR,RISAB page 9 default privileged configuration register" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_PRIVCFGR,RISAB page 10 default privileged configuration register" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_PRIVCFGR,RISAB page 11 default privileged configuration register" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_PRIVCFGR,RISAB page 12 default privileged configuration register" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_PRIVCFGR,RISAB page 13 default privileged configuration register" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_PRIVCFGR,RISAB page 14 default privileged configuration register" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_PRIVCFGR,RISAB page 15 default privileged configuration register" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_PRIVCFGR,RISAB page 16 default privileged configuration register" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_PRIVCFGR,RISAB page 17 default privileged configuration register" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_PRIVCFGR,RISAB page 18 default privileged configuration register" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_PRIVCFGR,RISAB page 19 default privileged configuration register" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_PRIVCFGR,RISAB page 20 default privileged configuration register" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_PRIVCFGR,RISAB page 21 default privileged configuration register" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_PRIVCFGR,RISAB page 22 default privileged configuration register" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_PRIVCFGR,RISAB page 23 default privileged configuration register" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_PRIVCFGR,RISAB page 24 default privileged configuration register" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_PRIVCFGR,RISAB page 25 default privileged configuration register" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_PRIVCFGR,RISAB page 26 default privileged configuration register" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_PRIVCFGR,RISAB page 27 default privileged configuration register" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_PRIVCFGR,RISAB page 28 default privileged configuration register" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_PRIVCFGR,RISAB page 29 default privileged configuration register" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_PRIVCFGR,RISAB page 30 default privileged configuration register" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_PRIVCFGR,RISAB page 31 default privileged configuration register" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x600++0x7F line.long 0x0 "RISAB_PG0_C2PRIVCFGR,RISAB page 0 privileged configuration register for compartment 2" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_C2PRIVCFGR,RISAB page 1 privileged configuration register for compartment 2" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_C2PRIVCFGR,RISAB page 2 privileged configuration register for compartment 2" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_C2PRIVCFGR,RISAB page 3 privileged configuration register for compartment 2" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_C2PRIVCFGR,RISAB page 4 privileged configuration register for compartment 2" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_C2PRIVCFGR,RISAB page 5 privileged configuration register for compartment 2" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_C2PRIVCFGR,RISAB page 6 privileged configuration register for compartment 2" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_C2PRIVCFGR,RISAB page 7 privileged configuration register for compartment 2" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_C2PRIVCFGR,RISAB page 8 privileged configuration register for compartment 2" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_C2PRIVCFGR,RISAB page 9 privileged configuration register for compartment 2" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_C2PRIVCFGR,RISAB page 10 privileged configuration register for compartment 2" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_C2PRIVCFGR,RISAB page 11 privileged configuration register for compartment 2" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_C2PRIVCFGR,RISAB page 12 privileged configuration register for compartment 2" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_C2PRIVCFGR,RISAB page 13 privileged configuration register for compartment 2" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_C2PRIVCFGR,RISAB page 14 privileged configuration register for compartment 2" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_C2PRIVCFGR,RISAB page 15 privileged configuration register for compartment 2" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_C2PRIVCFGR,RISAB page 16 privileged configuration register for compartment 2" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_C2PRIVCFGR,RISAB page 17 privileged configuration register for compartment 2" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_C2PRIVCFGR,RISAB page 18 privileged configuration register for compartment 2" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_C2PRIVCFGR,RISAB page 19 privileged configuration register for compartment 2" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_C2PRIVCFGR,RISAB page 20 privileged configuration register for compartment 2" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_C2PRIVCFGR,RISAB page 21 privileged configuration register for compartment 2" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_C2PRIVCFGR,RISAB page 22 privileged configuration register for compartment 2" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_C2PRIVCFGR,RISAB page 23 privileged configuration register for compartment 2" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_C2PRIVCFGR,RISAB page 24 privileged configuration register for compartment 2" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_C2PRIVCFGR,RISAB page 25 privileged configuration register for compartment 2" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_C2PRIVCFGR,RISAB page 26 privileged configuration register for compartment 2" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_C2PRIVCFGR,RISAB page 27 privileged configuration register for compartment 2" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_C2PRIVCFGR,RISAB page 28 privileged configuration register for compartment 2" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_C2PRIVCFGR,RISAB page 29 privileged configuration register for compartment 2" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_C2PRIVCFGR,RISAB page 30 privileged configuration register for compartment 2" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_C2PRIVCFGR,RISAB page 31 privileged configuration register for compartment 2" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x800++0x3 line.long 0x0 "RISAB_CID0PRIVCFGR,RISAB compartment 0 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x808++0x3 line.long 0x0 "RISAB_CID0RDCFGR,RISAB compartment 0 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x810++0x3 line.long 0x0 "RISAB_CID0WRCFGR,RISAB compartment 0 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x820++0x3 line.long 0x0 "RISAB_CID1PRIVCFGR,RISAB compartment 1 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x828++0x3 line.long 0x0 "RISAB_CID1RDCFGR,RISAB compartment 1 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x830++0x3 line.long 0x0 "RISAB_CID1WRCFGR,RISAB compartment 1 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x840++0x3 line.long 0x0 "RISAB_CID2PRIVCFGR,RISAB compartment 2 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x848++0x3 line.long 0x0 "RISAB_CID2RDCFGR,RISAB compartment 2 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x850++0x3 line.long 0x0 "RISAB_CID2WRCFGR,RISAB compartment 2 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x860++0x3 line.long 0x0 "RISAB_CID3PRIVCFGR,RISAB compartment 3 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x868++0x3 line.long 0x0 "RISAB_CID3RDCFGR,RISAB compartment 3 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x870++0x3 line.long 0x0 "RISAB_CID3WRCFGR,RISAB compartment 3 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x880++0x3 line.long 0x0 "RISAB_CID4PRIVCFGR,RISAB compartment 4 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x888++0x3 line.long 0x0 "RISAB_CID4RDCFGR,RISAB compartment 4 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x890++0x3 line.long 0x0 "RISAB_CID4WRCFGR,RISAB compartment 4 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A0++0x3 line.long 0x0 "RISAB_CID5PRIVCFGR,RISAB compartment 5 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A8++0x3 line.long 0x0 "RISAB_CID5RDCFGR,RISAB compartment 5 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8B0++0x3 line.long 0x0 "RISAB_CID5WRCFGR,RISAB compartment 5 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C0++0x3 line.long 0x0 "RISAB_CID6PRIVCFGR,RISAB compartment 6 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C8++0x3 line.long 0x0 "RISAB_CID6RDCFGR,RISAB compartment 6 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8D0++0x3 line.long 0x0 "RISAB_CID6WRCFGR,RISAB compartment 6 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0xA00++0x7F line.long 0x0 "RISAB_PG0_CIDCFGR,RISAB page 0 CID configuration register" bitfld.long 0x0 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_CIDCFGR,RISAB page 1 CID configuration register" bitfld.long 0x4 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_CIDCFGR,RISAB page 2 CID configuration register" bitfld.long 0x8 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_CIDCFGR,RISAB page 3 CID configuration register" bitfld.long 0xC 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_CIDCFGR,RISAB page 4 CID configuration register" bitfld.long 0x10 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_CIDCFGR,RISAB page 5 CID configuration register" bitfld.long 0x14 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_CIDCFGR,RISAB page 6 CID configuration register" bitfld.long 0x18 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_CIDCFGR,RISAB page 7 CID configuration register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_CIDCFGR,RISAB page 8 CID configuration register" bitfld.long 0x20 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_CIDCFGR,RISAB page 9 CID configuration register" bitfld.long 0x24 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_CIDCFGR,RISAB page 10 CID configuration register" bitfld.long 0x28 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_CIDCFGR,RISAB page 11 CID configuration register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_CIDCFGR,RISAB page 12 CID configuration register" bitfld.long 0x30 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_CIDCFGR,RISAB page 13 CID configuration register" bitfld.long 0x34 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x34 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_CIDCFGR,RISAB page 14 CID configuration register" bitfld.long 0x38 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_CIDCFGR,RISAB page 15 CID configuration register" bitfld.long 0x3C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x3C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_CIDCFGR,RISAB page 16 CID configuration register" bitfld.long 0x40 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x40 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_CIDCFGR,RISAB page 17 CID configuration register" bitfld.long 0x44 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x44 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x44 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_CIDCFGR,RISAB page 18 CID configuration register" bitfld.long 0x48 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x48 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_CIDCFGR,RISAB page 19 CID configuration register" bitfld.long 0x4C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_CIDCFGR,RISAB page 20 CID configuration register" bitfld.long 0x50 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x50 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_CIDCFGR,RISAB page 21 CID configuration register" bitfld.long 0x54 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x54 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x54 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_CIDCFGR,RISAB page 22 CID configuration register" bitfld.long 0x58 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x58 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_CIDCFGR,RISAB page 23 CID configuration register" bitfld.long 0x5C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x5C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_CIDCFGR,RISAB page 24 CID configuration register" bitfld.long 0x60 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x60 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_CIDCFGR,RISAB page 25 CID configuration register" bitfld.long 0x64 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x64 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x64 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_CIDCFGR,RISAB page 26 CID configuration register" bitfld.long 0x68 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x68 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_CIDCFGR,RISAB page 27 CID configuration register" bitfld.long 0x6C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x6C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_CIDCFGR,RISAB page 28 CID configuration register" bitfld.long 0x70 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x70 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_CIDCFGR,RISAB page 29 CID configuration register" bitfld.long 0x74 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x74 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x74 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_CIDCFGR,RISAB page 30 CID configuration register" bitfld.long 0x78 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x78 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_CIDCFGR,RISAB page 31 CID configuration register" bitfld.long 0x7C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x7C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" rgroup.long 0xFE8++0x17 line.long 0x0 "RISAB_HWCFGR3,RISAB hardware configuration register 3" hexmask.long 0x0 0.--31. 1. "CFG,Hardware configuration" line.long 0x4 "RISAB_HWCFGR2,RISAB hardware configuration register 2" hexmask.long 0x4 0.--31. 1. "CFG,Hardware configuration" line.long 0x8 "RISAB_HWCFGR1,RISAB hardware configuration register 1" hexmask.long.byte 0x8 24.--27. 1. "CFG7,Hardware configuration 7" hexmask.long.byte 0x8 20.--23. 1. "CFG6,Hardware configuration 6" hexmask.long.byte 0x8 16.--19. 1. "CFG5,Hardware configuration 5" hexmask.long.byte 0x8 12.--15. 1. "CFG4,Hardware configuration 4" hexmask.long.byte 0x8 8.--11. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x8 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x8 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0xC "RISAB_VERR,RISAB version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,RISAB major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,RISAB minor revision" line.long 0x10 "RISAB_IPIDR,RISAB identification register" hexmask.long 0x10 0.--31. 1. "ID,RISAB identification code" line.long 0x14 "RISAB_SIDR,RISAB size identification register" hexmask.long 0x14 0.--31. 1. "SID,RISAB size identification code" tree.end tree "RISAB2_S" base ad:0x52100000 group.long 0x0++0x3 line.long 0x0 "RISAB_CR,RISAB configuration register" bitfld.long 0x0 31. "SRWIAD,Secure read/write illegal access disable" "B_0x0,B_0x1" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "RISAB_IASR,RISAB illegal access status register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAB_IACR,RISAB illegal access clear register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" group.long 0x10++0x3 line.long 0x0 "RISAB_RCFGLOCKR,RISAB configuration lock register" bitfld.long 0x0 31. "RLOCK31,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 30. "RLOCK30,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 29. "RLOCK29,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 28. "RLOCK28,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 27. "RLOCK27,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 26. "RLOCK26,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 25. "RLOCK25,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "RLOCK24,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 23. "RLOCK23,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 22. "RLOCK22,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 21. "RLOCK21,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 20. "RLOCK20,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 19. "RLOCK19,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 18. "RLOCK18,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "RLOCK17,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 16. "RLOCK16,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 15. "RLOCK15,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 14. "RLOCK14,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 13. "RLOCK13,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 12. "RLOCK12,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 11. "RLOCK11,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "RLOCK10,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 9. "RLOCK9,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 8. "RLOCK8,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 7. "RLOCK7,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 6. "RLOCK6,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 5. "RLOCK5,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 4. "RLOCK4,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "RLOCK3,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 2. "RLOCK2,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 1. "RLOCK1,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 0. "RLOCK0,Resource lock for page y" "B_0x0,B_0x1" rgroup.long 0x20++0x7 line.long 0x0 "RISAB_IAESR,RISAB illegal access error status register" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAB_IADDR,RISAB illegal address register" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" group.long 0x100++0x7F line.long 0x0 "RISAB_PG0_SECCFGR,RISAB page 0 security configuration register" bitfld.long 0x0 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_SECCFGR,RISAB page 1 security configuration register" bitfld.long 0x4 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_SECCFGR,RISAB page 2 security configuration register" bitfld.long 0x8 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_SECCFGR,RISAB page 3 security configuration register" bitfld.long 0xC 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_SECCFGR,RISAB page 4 security configuration register" bitfld.long 0x10 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_SECCFGR,RISAB page 5 security configuration register" bitfld.long 0x14 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_SECCFGR,RISAB page 6 security configuration register" bitfld.long 0x18 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_SECCFGR,RISAB page 7 security configuration register" bitfld.long 0x1C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_SECCFGR,RISAB page 8 security configuration register" bitfld.long 0x20 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_SECCFGR,RISAB page 9 security configuration register" bitfld.long 0x24 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_SECCFGR,RISAB page 10 security configuration register" bitfld.long 0x28 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_SECCFGR,RISAB page 11 security configuration register" bitfld.long 0x2C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_SECCFGR,RISAB page 12 security configuration register" bitfld.long 0x30 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_SECCFGR,RISAB page 13 security configuration register" bitfld.long 0x34 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_SECCFGR,RISAB page 14 security configuration register" bitfld.long 0x38 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_SECCFGR,RISAB page 15 security configuration register" bitfld.long 0x3C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_SECCFGR,RISAB page 16 security configuration register" bitfld.long 0x40 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_SECCFGR,RISAB page 17 security configuration register" bitfld.long 0x44 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_SECCFGR,RISAB page 18 security configuration register" bitfld.long 0x48 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_SECCFGR,RISAB page 19 security configuration register" bitfld.long 0x4C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_SECCFGR,RISAB page 20 security configuration register" bitfld.long 0x50 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_SECCFGR,RISAB page 21 security configuration register" bitfld.long 0x54 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_SECCFGR,RISAB page 22 security configuration register" bitfld.long 0x58 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_SECCFGR,RISAB page 23 security configuration register" bitfld.long 0x5C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_SECCFGR,RISAB page 24 security configuration register" bitfld.long 0x60 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_SECCFGR,RISAB page 25 security configuration register" bitfld.long 0x64 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_SECCFGR,RISAB page 26 security configuration register" bitfld.long 0x68 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_SECCFGR,RISAB page 27 security configuration register" bitfld.long 0x6C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_SECCFGR,RISAB page 28 security configuration register" bitfld.long 0x70 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_SECCFGR,RISAB page 29 security configuration register" bitfld.long 0x74 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_SECCFGR,RISAB page 30 security configuration register" bitfld.long 0x78 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_SECCFGR,RISAB page 31 security configuration register" bitfld.long 0x7C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" group.long 0x200++0x7F line.long 0x0 "RISAB_PG0_PRIVCFGR,RISAB page 0 default privileged configuration register" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_PRIVCFGR,RISAB page 1 default privileged configuration register" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_PRIVCFGR,RISAB page 2 default privileged configuration register" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_PRIVCFGR,RISAB page 3 default privileged configuration register" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_PRIVCFGR,RISAB page 4 default privileged configuration register" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_PRIVCFGR,RISAB page 5 default privileged configuration register" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_PRIVCFGR,RISAB page 6 default privileged configuration register" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_PRIVCFGR,RISAB page 7 default privileged configuration register" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_PRIVCFGR,RISAB page 8 default privileged configuration register" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_PRIVCFGR,RISAB page 9 default privileged configuration register" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_PRIVCFGR,RISAB page 10 default privileged configuration register" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_PRIVCFGR,RISAB page 11 default privileged configuration register" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_PRIVCFGR,RISAB page 12 default privileged configuration register" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_PRIVCFGR,RISAB page 13 default privileged configuration register" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_PRIVCFGR,RISAB page 14 default privileged configuration register" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_PRIVCFGR,RISAB page 15 default privileged configuration register" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_PRIVCFGR,RISAB page 16 default privileged configuration register" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_PRIVCFGR,RISAB page 17 default privileged configuration register" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_PRIVCFGR,RISAB page 18 default privileged configuration register" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_PRIVCFGR,RISAB page 19 default privileged configuration register" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_PRIVCFGR,RISAB page 20 default privileged configuration register" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_PRIVCFGR,RISAB page 21 default privileged configuration register" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_PRIVCFGR,RISAB page 22 default privileged configuration register" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_PRIVCFGR,RISAB page 23 default privileged configuration register" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_PRIVCFGR,RISAB page 24 default privileged configuration register" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_PRIVCFGR,RISAB page 25 default privileged configuration register" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_PRIVCFGR,RISAB page 26 default privileged configuration register" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_PRIVCFGR,RISAB page 27 default privileged configuration register" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_PRIVCFGR,RISAB page 28 default privileged configuration register" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_PRIVCFGR,RISAB page 29 default privileged configuration register" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_PRIVCFGR,RISAB page 30 default privileged configuration register" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_PRIVCFGR,RISAB page 31 default privileged configuration register" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x600++0x7F line.long 0x0 "RISAB_PG0_C2PRIVCFGR,RISAB page 0 privileged configuration register for compartment 2" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_C2PRIVCFGR,RISAB page 1 privileged configuration register for compartment 2" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_C2PRIVCFGR,RISAB page 2 privileged configuration register for compartment 2" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_C2PRIVCFGR,RISAB page 3 privileged configuration register for compartment 2" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_C2PRIVCFGR,RISAB page 4 privileged configuration register for compartment 2" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_C2PRIVCFGR,RISAB page 5 privileged configuration register for compartment 2" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_C2PRIVCFGR,RISAB page 6 privileged configuration register for compartment 2" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_C2PRIVCFGR,RISAB page 7 privileged configuration register for compartment 2" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_C2PRIVCFGR,RISAB page 8 privileged configuration register for compartment 2" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_C2PRIVCFGR,RISAB page 9 privileged configuration register for compartment 2" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_C2PRIVCFGR,RISAB page 10 privileged configuration register for compartment 2" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_C2PRIVCFGR,RISAB page 11 privileged configuration register for compartment 2" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_C2PRIVCFGR,RISAB page 12 privileged configuration register for compartment 2" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_C2PRIVCFGR,RISAB page 13 privileged configuration register for compartment 2" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_C2PRIVCFGR,RISAB page 14 privileged configuration register for compartment 2" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_C2PRIVCFGR,RISAB page 15 privileged configuration register for compartment 2" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_C2PRIVCFGR,RISAB page 16 privileged configuration register for compartment 2" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_C2PRIVCFGR,RISAB page 17 privileged configuration register for compartment 2" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_C2PRIVCFGR,RISAB page 18 privileged configuration register for compartment 2" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_C2PRIVCFGR,RISAB page 19 privileged configuration register for compartment 2" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_C2PRIVCFGR,RISAB page 20 privileged configuration register for compartment 2" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_C2PRIVCFGR,RISAB page 21 privileged configuration register for compartment 2" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_C2PRIVCFGR,RISAB page 22 privileged configuration register for compartment 2" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_C2PRIVCFGR,RISAB page 23 privileged configuration register for compartment 2" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_C2PRIVCFGR,RISAB page 24 privileged configuration register for compartment 2" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_C2PRIVCFGR,RISAB page 25 privileged configuration register for compartment 2" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_C2PRIVCFGR,RISAB page 26 privileged configuration register for compartment 2" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_C2PRIVCFGR,RISAB page 27 privileged configuration register for compartment 2" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_C2PRIVCFGR,RISAB page 28 privileged configuration register for compartment 2" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_C2PRIVCFGR,RISAB page 29 privileged configuration register for compartment 2" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_C2PRIVCFGR,RISAB page 30 privileged configuration register for compartment 2" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_C2PRIVCFGR,RISAB page 31 privileged configuration register for compartment 2" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x800++0x3 line.long 0x0 "RISAB_CID0PRIVCFGR,RISAB compartment 0 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x808++0x3 line.long 0x0 "RISAB_CID0RDCFGR,RISAB compartment 0 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x810++0x3 line.long 0x0 "RISAB_CID0WRCFGR,RISAB compartment 0 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x820++0x3 line.long 0x0 "RISAB_CID1PRIVCFGR,RISAB compartment 1 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x828++0x3 line.long 0x0 "RISAB_CID1RDCFGR,RISAB compartment 1 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x830++0x3 line.long 0x0 "RISAB_CID1WRCFGR,RISAB compartment 1 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x840++0x3 line.long 0x0 "RISAB_CID2PRIVCFGR,RISAB compartment 2 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x848++0x3 line.long 0x0 "RISAB_CID2RDCFGR,RISAB compartment 2 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x850++0x3 line.long 0x0 "RISAB_CID2WRCFGR,RISAB compartment 2 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x860++0x3 line.long 0x0 "RISAB_CID3PRIVCFGR,RISAB compartment 3 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x868++0x3 line.long 0x0 "RISAB_CID3RDCFGR,RISAB compartment 3 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x870++0x3 line.long 0x0 "RISAB_CID3WRCFGR,RISAB compartment 3 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x880++0x3 line.long 0x0 "RISAB_CID4PRIVCFGR,RISAB compartment 4 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x888++0x3 line.long 0x0 "RISAB_CID4RDCFGR,RISAB compartment 4 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x890++0x3 line.long 0x0 "RISAB_CID4WRCFGR,RISAB compartment 4 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A0++0x3 line.long 0x0 "RISAB_CID5PRIVCFGR,RISAB compartment 5 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A8++0x3 line.long 0x0 "RISAB_CID5RDCFGR,RISAB compartment 5 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8B0++0x3 line.long 0x0 "RISAB_CID5WRCFGR,RISAB compartment 5 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C0++0x3 line.long 0x0 "RISAB_CID6PRIVCFGR,RISAB compartment 6 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C8++0x3 line.long 0x0 "RISAB_CID6RDCFGR,RISAB compartment 6 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8D0++0x3 line.long 0x0 "RISAB_CID6WRCFGR,RISAB compartment 6 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0xA00++0x7F line.long 0x0 "RISAB_PG0_CIDCFGR,RISAB page 0 CID configuration register" bitfld.long 0x0 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_CIDCFGR,RISAB page 1 CID configuration register" bitfld.long 0x4 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_CIDCFGR,RISAB page 2 CID configuration register" bitfld.long 0x8 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_CIDCFGR,RISAB page 3 CID configuration register" bitfld.long 0xC 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_CIDCFGR,RISAB page 4 CID configuration register" bitfld.long 0x10 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_CIDCFGR,RISAB page 5 CID configuration register" bitfld.long 0x14 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_CIDCFGR,RISAB page 6 CID configuration register" bitfld.long 0x18 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_CIDCFGR,RISAB page 7 CID configuration register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_CIDCFGR,RISAB page 8 CID configuration register" bitfld.long 0x20 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_CIDCFGR,RISAB page 9 CID configuration register" bitfld.long 0x24 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_CIDCFGR,RISAB page 10 CID configuration register" bitfld.long 0x28 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_CIDCFGR,RISAB page 11 CID configuration register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_CIDCFGR,RISAB page 12 CID configuration register" bitfld.long 0x30 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_CIDCFGR,RISAB page 13 CID configuration register" bitfld.long 0x34 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x34 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_CIDCFGR,RISAB page 14 CID configuration register" bitfld.long 0x38 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_CIDCFGR,RISAB page 15 CID configuration register" bitfld.long 0x3C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x3C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_CIDCFGR,RISAB page 16 CID configuration register" bitfld.long 0x40 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x40 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_CIDCFGR,RISAB page 17 CID configuration register" bitfld.long 0x44 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x44 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x44 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_CIDCFGR,RISAB page 18 CID configuration register" bitfld.long 0x48 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x48 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_CIDCFGR,RISAB page 19 CID configuration register" bitfld.long 0x4C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_CIDCFGR,RISAB page 20 CID configuration register" bitfld.long 0x50 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x50 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_CIDCFGR,RISAB page 21 CID configuration register" bitfld.long 0x54 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x54 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x54 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_CIDCFGR,RISAB page 22 CID configuration register" bitfld.long 0x58 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x58 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_CIDCFGR,RISAB page 23 CID configuration register" bitfld.long 0x5C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x5C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_CIDCFGR,RISAB page 24 CID configuration register" bitfld.long 0x60 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x60 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_CIDCFGR,RISAB page 25 CID configuration register" bitfld.long 0x64 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x64 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x64 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_CIDCFGR,RISAB page 26 CID configuration register" bitfld.long 0x68 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x68 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_CIDCFGR,RISAB page 27 CID configuration register" bitfld.long 0x6C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x6C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_CIDCFGR,RISAB page 28 CID configuration register" bitfld.long 0x70 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x70 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_CIDCFGR,RISAB page 29 CID configuration register" bitfld.long 0x74 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x74 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x74 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_CIDCFGR,RISAB page 30 CID configuration register" bitfld.long 0x78 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x78 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_CIDCFGR,RISAB page 31 CID configuration register" bitfld.long 0x7C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x7C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" rgroup.long 0xFE8++0x17 line.long 0x0 "RISAB_HWCFGR3,RISAB hardware configuration register 3" hexmask.long 0x0 0.--31. 1. "CFG,Hardware configuration" line.long 0x4 "RISAB_HWCFGR2,RISAB hardware configuration register 2" hexmask.long 0x4 0.--31. 1. "CFG,Hardware configuration" line.long 0x8 "RISAB_HWCFGR1,RISAB hardware configuration register 1" hexmask.long.byte 0x8 24.--27. 1. "CFG7,Hardware configuration 7" hexmask.long.byte 0x8 20.--23. 1. "CFG6,Hardware configuration 6" hexmask.long.byte 0x8 16.--19. 1. "CFG5,Hardware configuration 5" hexmask.long.byte 0x8 12.--15. 1. "CFG4,Hardware configuration 4" hexmask.long.byte 0x8 8.--11. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x8 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x8 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0xC "RISAB_VERR,RISAB version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,RISAB major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,RISAB minor revision" line.long 0x10 "RISAB_IPIDR,RISAB identification register" hexmask.long 0x10 0.--31. 1. "ID,RISAB identification code" line.long 0x14 "RISAB_SIDR,RISAB size identification register" hexmask.long 0x14 0.--31. 1. "SID,RISAB size identification code" tree.end tree "RISAB3" base ad:0x42110000 group.long 0x0++0x3 line.long 0x0 "RISAB_CR,RISAB configuration register" bitfld.long 0x0 31. "SRWIAD,Secure read/write illegal access disable" "B_0x0,B_0x1" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "RISAB_IASR,RISAB illegal access status register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAB_IACR,RISAB illegal access clear register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" group.long 0x10++0x3 line.long 0x0 "RISAB_RCFGLOCKR,RISAB configuration lock register" bitfld.long 0x0 31. "RLOCK31,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 30. "RLOCK30,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 29. "RLOCK29,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 28. "RLOCK28,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 27. "RLOCK27,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 26. "RLOCK26,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 25. "RLOCK25,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "RLOCK24,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 23. "RLOCK23,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 22. "RLOCK22,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 21. "RLOCK21,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 20. "RLOCK20,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 19. "RLOCK19,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 18. "RLOCK18,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "RLOCK17,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 16. "RLOCK16,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 15. "RLOCK15,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 14. "RLOCK14,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 13. "RLOCK13,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 12. "RLOCK12,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 11. "RLOCK11,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "RLOCK10,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 9. "RLOCK9,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 8. "RLOCK8,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 7. "RLOCK7,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 6. "RLOCK6,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 5. "RLOCK5,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 4. "RLOCK4,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "RLOCK3,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 2. "RLOCK2,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 1. "RLOCK1,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 0. "RLOCK0,Resource lock for page y" "B_0x0,B_0x1" rgroup.long 0x20++0x7 line.long 0x0 "RISAB_IAESR,RISAB illegal access error status register" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAB_IADDR,RISAB illegal address register" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" group.long 0x100++0x7F line.long 0x0 "RISAB_PG0_SECCFGR,RISAB page 0 security configuration register" bitfld.long 0x0 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_SECCFGR,RISAB page 1 security configuration register" bitfld.long 0x4 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_SECCFGR,RISAB page 2 security configuration register" bitfld.long 0x8 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_SECCFGR,RISAB page 3 security configuration register" bitfld.long 0xC 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_SECCFGR,RISAB page 4 security configuration register" bitfld.long 0x10 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_SECCFGR,RISAB page 5 security configuration register" bitfld.long 0x14 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_SECCFGR,RISAB page 6 security configuration register" bitfld.long 0x18 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_SECCFGR,RISAB page 7 security configuration register" bitfld.long 0x1C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_SECCFGR,RISAB page 8 security configuration register" bitfld.long 0x20 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_SECCFGR,RISAB page 9 security configuration register" bitfld.long 0x24 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_SECCFGR,RISAB page 10 security configuration register" bitfld.long 0x28 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_SECCFGR,RISAB page 11 security configuration register" bitfld.long 0x2C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_SECCFGR,RISAB page 12 security configuration register" bitfld.long 0x30 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_SECCFGR,RISAB page 13 security configuration register" bitfld.long 0x34 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_SECCFGR,RISAB page 14 security configuration register" bitfld.long 0x38 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_SECCFGR,RISAB page 15 security configuration register" bitfld.long 0x3C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_SECCFGR,RISAB page 16 security configuration register" bitfld.long 0x40 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_SECCFGR,RISAB page 17 security configuration register" bitfld.long 0x44 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_SECCFGR,RISAB page 18 security configuration register" bitfld.long 0x48 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_SECCFGR,RISAB page 19 security configuration register" bitfld.long 0x4C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_SECCFGR,RISAB page 20 security configuration register" bitfld.long 0x50 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_SECCFGR,RISAB page 21 security configuration register" bitfld.long 0x54 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_SECCFGR,RISAB page 22 security configuration register" bitfld.long 0x58 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_SECCFGR,RISAB page 23 security configuration register" bitfld.long 0x5C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_SECCFGR,RISAB page 24 security configuration register" bitfld.long 0x60 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_SECCFGR,RISAB page 25 security configuration register" bitfld.long 0x64 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_SECCFGR,RISAB page 26 security configuration register" bitfld.long 0x68 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_SECCFGR,RISAB page 27 security configuration register" bitfld.long 0x6C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_SECCFGR,RISAB page 28 security configuration register" bitfld.long 0x70 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_SECCFGR,RISAB page 29 security configuration register" bitfld.long 0x74 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_SECCFGR,RISAB page 30 security configuration register" bitfld.long 0x78 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_SECCFGR,RISAB page 31 security configuration register" bitfld.long 0x7C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" group.long 0x200++0x7F line.long 0x0 "RISAB_PG0_PRIVCFGR,RISAB page 0 default privileged configuration register" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_PRIVCFGR,RISAB page 1 default privileged configuration register" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_PRIVCFGR,RISAB page 2 default privileged configuration register" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_PRIVCFGR,RISAB page 3 default privileged configuration register" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_PRIVCFGR,RISAB page 4 default privileged configuration register" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_PRIVCFGR,RISAB page 5 default privileged configuration register" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_PRIVCFGR,RISAB page 6 default privileged configuration register" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_PRIVCFGR,RISAB page 7 default privileged configuration register" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_PRIVCFGR,RISAB page 8 default privileged configuration register" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_PRIVCFGR,RISAB page 9 default privileged configuration register" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_PRIVCFGR,RISAB page 10 default privileged configuration register" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_PRIVCFGR,RISAB page 11 default privileged configuration register" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_PRIVCFGR,RISAB page 12 default privileged configuration register" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_PRIVCFGR,RISAB page 13 default privileged configuration register" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_PRIVCFGR,RISAB page 14 default privileged configuration register" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_PRIVCFGR,RISAB page 15 default privileged configuration register" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_PRIVCFGR,RISAB page 16 default privileged configuration register" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_PRIVCFGR,RISAB page 17 default privileged configuration register" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_PRIVCFGR,RISAB page 18 default privileged configuration register" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_PRIVCFGR,RISAB page 19 default privileged configuration register" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_PRIVCFGR,RISAB page 20 default privileged configuration register" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_PRIVCFGR,RISAB page 21 default privileged configuration register" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_PRIVCFGR,RISAB page 22 default privileged configuration register" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_PRIVCFGR,RISAB page 23 default privileged configuration register" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_PRIVCFGR,RISAB page 24 default privileged configuration register" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_PRIVCFGR,RISAB page 25 default privileged configuration register" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_PRIVCFGR,RISAB page 26 default privileged configuration register" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_PRIVCFGR,RISAB page 27 default privileged configuration register" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_PRIVCFGR,RISAB page 28 default privileged configuration register" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_PRIVCFGR,RISAB page 29 default privileged configuration register" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_PRIVCFGR,RISAB page 30 default privileged configuration register" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_PRIVCFGR,RISAB page 31 default privileged configuration register" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x600++0x7F line.long 0x0 "RISAB_PG0_C2PRIVCFGR,RISAB page 0 privileged configuration register for compartment 2" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_C2PRIVCFGR,RISAB page 1 privileged configuration register for compartment 2" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_C2PRIVCFGR,RISAB page 2 privileged configuration register for compartment 2" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_C2PRIVCFGR,RISAB page 3 privileged configuration register for compartment 2" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_C2PRIVCFGR,RISAB page 4 privileged configuration register for compartment 2" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_C2PRIVCFGR,RISAB page 5 privileged configuration register for compartment 2" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_C2PRIVCFGR,RISAB page 6 privileged configuration register for compartment 2" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_C2PRIVCFGR,RISAB page 7 privileged configuration register for compartment 2" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_C2PRIVCFGR,RISAB page 8 privileged configuration register for compartment 2" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_C2PRIVCFGR,RISAB page 9 privileged configuration register for compartment 2" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_C2PRIVCFGR,RISAB page 10 privileged configuration register for compartment 2" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_C2PRIVCFGR,RISAB page 11 privileged configuration register for compartment 2" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_C2PRIVCFGR,RISAB page 12 privileged configuration register for compartment 2" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_C2PRIVCFGR,RISAB page 13 privileged configuration register for compartment 2" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_C2PRIVCFGR,RISAB page 14 privileged configuration register for compartment 2" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_C2PRIVCFGR,RISAB page 15 privileged configuration register for compartment 2" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_C2PRIVCFGR,RISAB page 16 privileged configuration register for compartment 2" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_C2PRIVCFGR,RISAB page 17 privileged configuration register for compartment 2" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_C2PRIVCFGR,RISAB page 18 privileged configuration register for compartment 2" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_C2PRIVCFGR,RISAB page 19 privileged configuration register for compartment 2" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_C2PRIVCFGR,RISAB page 20 privileged configuration register for compartment 2" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_C2PRIVCFGR,RISAB page 21 privileged configuration register for compartment 2" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_C2PRIVCFGR,RISAB page 22 privileged configuration register for compartment 2" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_C2PRIVCFGR,RISAB page 23 privileged configuration register for compartment 2" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_C2PRIVCFGR,RISAB page 24 privileged configuration register for compartment 2" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_C2PRIVCFGR,RISAB page 25 privileged configuration register for compartment 2" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_C2PRIVCFGR,RISAB page 26 privileged configuration register for compartment 2" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_C2PRIVCFGR,RISAB page 27 privileged configuration register for compartment 2" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_C2PRIVCFGR,RISAB page 28 privileged configuration register for compartment 2" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_C2PRIVCFGR,RISAB page 29 privileged configuration register for compartment 2" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_C2PRIVCFGR,RISAB page 30 privileged configuration register for compartment 2" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_C2PRIVCFGR,RISAB page 31 privileged configuration register for compartment 2" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x800++0x3 line.long 0x0 "RISAB_CID0PRIVCFGR,RISAB compartment 0 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x808++0x3 line.long 0x0 "RISAB_CID0RDCFGR,RISAB compartment 0 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x810++0x3 line.long 0x0 "RISAB_CID0WRCFGR,RISAB compartment 0 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x820++0x3 line.long 0x0 "RISAB_CID1PRIVCFGR,RISAB compartment 1 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x828++0x3 line.long 0x0 "RISAB_CID1RDCFGR,RISAB compartment 1 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x830++0x3 line.long 0x0 "RISAB_CID1WRCFGR,RISAB compartment 1 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x840++0x3 line.long 0x0 "RISAB_CID2PRIVCFGR,RISAB compartment 2 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x848++0x3 line.long 0x0 "RISAB_CID2RDCFGR,RISAB compartment 2 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x850++0x3 line.long 0x0 "RISAB_CID2WRCFGR,RISAB compartment 2 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x860++0x3 line.long 0x0 "RISAB_CID3PRIVCFGR,RISAB compartment 3 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x868++0x3 line.long 0x0 "RISAB_CID3RDCFGR,RISAB compartment 3 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x870++0x3 line.long 0x0 "RISAB_CID3WRCFGR,RISAB compartment 3 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x880++0x3 line.long 0x0 "RISAB_CID4PRIVCFGR,RISAB compartment 4 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x888++0x3 line.long 0x0 "RISAB_CID4RDCFGR,RISAB compartment 4 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x890++0x3 line.long 0x0 "RISAB_CID4WRCFGR,RISAB compartment 4 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A0++0x3 line.long 0x0 "RISAB_CID5PRIVCFGR,RISAB compartment 5 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A8++0x3 line.long 0x0 "RISAB_CID5RDCFGR,RISAB compartment 5 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8B0++0x3 line.long 0x0 "RISAB_CID5WRCFGR,RISAB compartment 5 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C0++0x3 line.long 0x0 "RISAB_CID6PRIVCFGR,RISAB compartment 6 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C8++0x3 line.long 0x0 "RISAB_CID6RDCFGR,RISAB compartment 6 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8D0++0x3 line.long 0x0 "RISAB_CID6WRCFGR,RISAB compartment 6 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0xA00++0x7F line.long 0x0 "RISAB_PG0_CIDCFGR,RISAB page 0 CID configuration register" bitfld.long 0x0 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_CIDCFGR,RISAB page 1 CID configuration register" bitfld.long 0x4 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_CIDCFGR,RISAB page 2 CID configuration register" bitfld.long 0x8 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_CIDCFGR,RISAB page 3 CID configuration register" bitfld.long 0xC 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_CIDCFGR,RISAB page 4 CID configuration register" bitfld.long 0x10 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_CIDCFGR,RISAB page 5 CID configuration register" bitfld.long 0x14 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_CIDCFGR,RISAB page 6 CID configuration register" bitfld.long 0x18 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_CIDCFGR,RISAB page 7 CID configuration register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_CIDCFGR,RISAB page 8 CID configuration register" bitfld.long 0x20 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_CIDCFGR,RISAB page 9 CID configuration register" bitfld.long 0x24 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_CIDCFGR,RISAB page 10 CID configuration register" bitfld.long 0x28 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_CIDCFGR,RISAB page 11 CID configuration register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_CIDCFGR,RISAB page 12 CID configuration register" bitfld.long 0x30 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_CIDCFGR,RISAB page 13 CID configuration register" bitfld.long 0x34 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x34 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_CIDCFGR,RISAB page 14 CID configuration register" bitfld.long 0x38 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_CIDCFGR,RISAB page 15 CID configuration register" bitfld.long 0x3C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x3C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_CIDCFGR,RISAB page 16 CID configuration register" bitfld.long 0x40 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x40 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_CIDCFGR,RISAB page 17 CID configuration register" bitfld.long 0x44 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x44 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x44 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_CIDCFGR,RISAB page 18 CID configuration register" bitfld.long 0x48 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x48 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_CIDCFGR,RISAB page 19 CID configuration register" bitfld.long 0x4C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_CIDCFGR,RISAB page 20 CID configuration register" bitfld.long 0x50 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x50 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_CIDCFGR,RISAB page 21 CID configuration register" bitfld.long 0x54 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x54 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x54 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_CIDCFGR,RISAB page 22 CID configuration register" bitfld.long 0x58 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x58 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_CIDCFGR,RISAB page 23 CID configuration register" bitfld.long 0x5C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x5C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_CIDCFGR,RISAB page 24 CID configuration register" bitfld.long 0x60 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x60 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_CIDCFGR,RISAB page 25 CID configuration register" bitfld.long 0x64 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x64 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x64 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_CIDCFGR,RISAB page 26 CID configuration register" bitfld.long 0x68 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x68 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_CIDCFGR,RISAB page 27 CID configuration register" bitfld.long 0x6C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x6C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_CIDCFGR,RISAB page 28 CID configuration register" bitfld.long 0x70 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x70 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_CIDCFGR,RISAB page 29 CID configuration register" bitfld.long 0x74 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x74 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x74 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_CIDCFGR,RISAB page 30 CID configuration register" bitfld.long 0x78 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x78 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_CIDCFGR,RISAB page 31 CID configuration register" bitfld.long 0x7C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x7C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" rgroup.long 0xFE8++0x17 line.long 0x0 "RISAB_HWCFGR3,RISAB hardware configuration register 3" hexmask.long 0x0 0.--31. 1. "CFG,Hardware configuration" line.long 0x4 "RISAB_HWCFGR2,RISAB hardware configuration register 2" hexmask.long 0x4 0.--31. 1. "CFG,Hardware configuration" line.long 0x8 "RISAB_HWCFGR1,RISAB hardware configuration register 1" hexmask.long.byte 0x8 24.--27. 1. "CFG7,Hardware configuration 7" hexmask.long.byte 0x8 20.--23. 1. "CFG6,Hardware configuration 6" hexmask.long.byte 0x8 16.--19. 1. "CFG5,Hardware configuration 5" hexmask.long.byte 0x8 12.--15. 1. "CFG4,Hardware configuration 4" hexmask.long.byte 0x8 8.--11. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x8 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x8 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0xC "RISAB_VERR,RISAB version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,RISAB major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,RISAB minor revision" line.long 0x10 "RISAB_IPIDR,RISAB identification register" hexmask.long 0x10 0.--31. 1. "ID,RISAB identification code" line.long 0x14 "RISAB_SIDR,RISAB size identification register" hexmask.long 0x14 0.--31. 1. "SID,RISAB size identification code" tree.end tree "RISAB3_S" base ad:0x52110000 group.long 0x0++0x3 line.long 0x0 "RISAB_CR,RISAB configuration register" bitfld.long 0x0 31. "SRWIAD,Secure read/write illegal access disable" "B_0x0,B_0x1" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "RISAB_IASR,RISAB illegal access status register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAB_IACR,RISAB illegal access clear register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" group.long 0x10++0x3 line.long 0x0 "RISAB_RCFGLOCKR,RISAB configuration lock register" bitfld.long 0x0 31. "RLOCK31,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 30. "RLOCK30,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 29. "RLOCK29,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 28. "RLOCK28,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 27. "RLOCK27,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 26. "RLOCK26,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 25. "RLOCK25,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "RLOCK24,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 23. "RLOCK23,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 22. "RLOCK22,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 21. "RLOCK21,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 20. "RLOCK20,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 19. "RLOCK19,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 18. "RLOCK18,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "RLOCK17,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 16. "RLOCK16,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 15. "RLOCK15,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 14. "RLOCK14,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 13. "RLOCK13,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 12. "RLOCK12,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 11. "RLOCK11,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "RLOCK10,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 9. "RLOCK9,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 8. "RLOCK8,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 7. "RLOCK7,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 6. "RLOCK6,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 5. "RLOCK5,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 4. "RLOCK4,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "RLOCK3,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 2. "RLOCK2,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 1. "RLOCK1,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 0. "RLOCK0,Resource lock for page y" "B_0x0,B_0x1" rgroup.long 0x20++0x7 line.long 0x0 "RISAB_IAESR,RISAB illegal access error status register" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAB_IADDR,RISAB illegal address register" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" group.long 0x100++0x7F line.long 0x0 "RISAB_PG0_SECCFGR,RISAB page 0 security configuration register" bitfld.long 0x0 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_SECCFGR,RISAB page 1 security configuration register" bitfld.long 0x4 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_SECCFGR,RISAB page 2 security configuration register" bitfld.long 0x8 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_SECCFGR,RISAB page 3 security configuration register" bitfld.long 0xC 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_SECCFGR,RISAB page 4 security configuration register" bitfld.long 0x10 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_SECCFGR,RISAB page 5 security configuration register" bitfld.long 0x14 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_SECCFGR,RISAB page 6 security configuration register" bitfld.long 0x18 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_SECCFGR,RISAB page 7 security configuration register" bitfld.long 0x1C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_SECCFGR,RISAB page 8 security configuration register" bitfld.long 0x20 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_SECCFGR,RISAB page 9 security configuration register" bitfld.long 0x24 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_SECCFGR,RISAB page 10 security configuration register" bitfld.long 0x28 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_SECCFGR,RISAB page 11 security configuration register" bitfld.long 0x2C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_SECCFGR,RISAB page 12 security configuration register" bitfld.long 0x30 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_SECCFGR,RISAB page 13 security configuration register" bitfld.long 0x34 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_SECCFGR,RISAB page 14 security configuration register" bitfld.long 0x38 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_SECCFGR,RISAB page 15 security configuration register" bitfld.long 0x3C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_SECCFGR,RISAB page 16 security configuration register" bitfld.long 0x40 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_SECCFGR,RISAB page 17 security configuration register" bitfld.long 0x44 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_SECCFGR,RISAB page 18 security configuration register" bitfld.long 0x48 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_SECCFGR,RISAB page 19 security configuration register" bitfld.long 0x4C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_SECCFGR,RISAB page 20 security configuration register" bitfld.long 0x50 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_SECCFGR,RISAB page 21 security configuration register" bitfld.long 0x54 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_SECCFGR,RISAB page 22 security configuration register" bitfld.long 0x58 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_SECCFGR,RISAB page 23 security configuration register" bitfld.long 0x5C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_SECCFGR,RISAB page 24 security configuration register" bitfld.long 0x60 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_SECCFGR,RISAB page 25 security configuration register" bitfld.long 0x64 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_SECCFGR,RISAB page 26 security configuration register" bitfld.long 0x68 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_SECCFGR,RISAB page 27 security configuration register" bitfld.long 0x6C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_SECCFGR,RISAB page 28 security configuration register" bitfld.long 0x70 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_SECCFGR,RISAB page 29 security configuration register" bitfld.long 0x74 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_SECCFGR,RISAB page 30 security configuration register" bitfld.long 0x78 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_SECCFGR,RISAB page 31 security configuration register" bitfld.long 0x7C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" group.long 0x200++0x7F line.long 0x0 "RISAB_PG0_PRIVCFGR,RISAB page 0 default privileged configuration register" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_PRIVCFGR,RISAB page 1 default privileged configuration register" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_PRIVCFGR,RISAB page 2 default privileged configuration register" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_PRIVCFGR,RISAB page 3 default privileged configuration register" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_PRIVCFGR,RISAB page 4 default privileged configuration register" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_PRIVCFGR,RISAB page 5 default privileged configuration register" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_PRIVCFGR,RISAB page 6 default privileged configuration register" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_PRIVCFGR,RISAB page 7 default privileged configuration register" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_PRIVCFGR,RISAB page 8 default privileged configuration register" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_PRIVCFGR,RISAB page 9 default privileged configuration register" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_PRIVCFGR,RISAB page 10 default privileged configuration register" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_PRIVCFGR,RISAB page 11 default privileged configuration register" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_PRIVCFGR,RISAB page 12 default privileged configuration register" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_PRIVCFGR,RISAB page 13 default privileged configuration register" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_PRIVCFGR,RISAB page 14 default privileged configuration register" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_PRIVCFGR,RISAB page 15 default privileged configuration register" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_PRIVCFGR,RISAB page 16 default privileged configuration register" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_PRIVCFGR,RISAB page 17 default privileged configuration register" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_PRIVCFGR,RISAB page 18 default privileged configuration register" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_PRIVCFGR,RISAB page 19 default privileged configuration register" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_PRIVCFGR,RISAB page 20 default privileged configuration register" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_PRIVCFGR,RISAB page 21 default privileged configuration register" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_PRIVCFGR,RISAB page 22 default privileged configuration register" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_PRIVCFGR,RISAB page 23 default privileged configuration register" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_PRIVCFGR,RISAB page 24 default privileged configuration register" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_PRIVCFGR,RISAB page 25 default privileged configuration register" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_PRIVCFGR,RISAB page 26 default privileged configuration register" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_PRIVCFGR,RISAB page 27 default privileged configuration register" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_PRIVCFGR,RISAB page 28 default privileged configuration register" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_PRIVCFGR,RISAB page 29 default privileged configuration register" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_PRIVCFGR,RISAB page 30 default privileged configuration register" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_PRIVCFGR,RISAB page 31 default privileged configuration register" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x600++0x7F line.long 0x0 "RISAB_PG0_C2PRIVCFGR,RISAB page 0 privileged configuration register for compartment 2" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_C2PRIVCFGR,RISAB page 1 privileged configuration register for compartment 2" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_C2PRIVCFGR,RISAB page 2 privileged configuration register for compartment 2" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_C2PRIVCFGR,RISAB page 3 privileged configuration register for compartment 2" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_C2PRIVCFGR,RISAB page 4 privileged configuration register for compartment 2" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_C2PRIVCFGR,RISAB page 5 privileged configuration register for compartment 2" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_C2PRIVCFGR,RISAB page 6 privileged configuration register for compartment 2" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_C2PRIVCFGR,RISAB page 7 privileged configuration register for compartment 2" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_C2PRIVCFGR,RISAB page 8 privileged configuration register for compartment 2" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_C2PRIVCFGR,RISAB page 9 privileged configuration register for compartment 2" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_C2PRIVCFGR,RISAB page 10 privileged configuration register for compartment 2" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_C2PRIVCFGR,RISAB page 11 privileged configuration register for compartment 2" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_C2PRIVCFGR,RISAB page 12 privileged configuration register for compartment 2" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_C2PRIVCFGR,RISAB page 13 privileged configuration register for compartment 2" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_C2PRIVCFGR,RISAB page 14 privileged configuration register for compartment 2" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_C2PRIVCFGR,RISAB page 15 privileged configuration register for compartment 2" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_C2PRIVCFGR,RISAB page 16 privileged configuration register for compartment 2" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_C2PRIVCFGR,RISAB page 17 privileged configuration register for compartment 2" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_C2PRIVCFGR,RISAB page 18 privileged configuration register for compartment 2" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_C2PRIVCFGR,RISAB page 19 privileged configuration register for compartment 2" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_C2PRIVCFGR,RISAB page 20 privileged configuration register for compartment 2" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_C2PRIVCFGR,RISAB page 21 privileged configuration register for compartment 2" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_C2PRIVCFGR,RISAB page 22 privileged configuration register for compartment 2" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_C2PRIVCFGR,RISAB page 23 privileged configuration register for compartment 2" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_C2PRIVCFGR,RISAB page 24 privileged configuration register for compartment 2" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_C2PRIVCFGR,RISAB page 25 privileged configuration register for compartment 2" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_C2PRIVCFGR,RISAB page 26 privileged configuration register for compartment 2" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_C2PRIVCFGR,RISAB page 27 privileged configuration register for compartment 2" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_C2PRIVCFGR,RISAB page 28 privileged configuration register for compartment 2" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_C2PRIVCFGR,RISAB page 29 privileged configuration register for compartment 2" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_C2PRIVCFGR,RISAB page 30 privileged configuration register for compartment 2" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_C2PRIVCFGR,RISAB page 31 privileged configuration register for compartment 2" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x800++0x3 line.long 0x0 "RISAB_CID0PRIVCFGR,RISAB compartment 0 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x808++0x3 line.long 0x0 "RISAB_CID0RDCFGR,RISAB compartment 0 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x810++0x3 line.long 0x0 "RISAB_CID0WRCFGR,RISAB compartment 0 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x820++0x3 line.long 0x0 "RISAB_CID1PRIVCFGR,RISAB compartment 1 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x828++0x3 line.long 0x0 "RISAB_CID1RDCFGR,RISAB compartment 1 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x830++0x3 line.long 0x0 "RISAB_CID1WRCFGR,RISAB compartment 1 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x840++0x3 line.long 0x0 "RISAB_CID2PRIVCFGR,RISAB compartment 2 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x848++0x3 line.long 0x0 "RISAB_CID2RDCFGR,RISAB compartment 2 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x850++0x3 line.long 0x0 "RISAB_CID2WRCFGR,RISAB compartment 2 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x860++0x3 line.long 0x0 "RISAB_CID3PRIVCFGR,RISAB compartment 3 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x868++0x3 line.long 0x0 "RISAB_CID3RDCFGR,RISAB compartment 3 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x870++0x3 line.long 0x0 "RISAB_CID3WRCFGR,RISAB compartment 3 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x880++0x3 line.long 0x0 "RISAB_CID4PRIVCFGR,RISAB compartment 4 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x888++0x3 line.long 0x0 "RISAB_CID4RDCFGR,RISAB compartment 4 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x890++0x3 line.long 0x0 "RISAB_CID4WRCFGR,RISAB compartment 4 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A0++0x3 line.long 0x0 "RISAB_CID5PRIVCFGR,RISAB compartment 5 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A8++0x3 line.long 0x0 "RISAB_CID5RDCFGR,RISAB compartment 5 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8B0++0x3 line.long 0x0 "RISAB_CID5WRCFGR,RISAB compartment 5 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C0++0x3 line.long 0x0 "RISAB_CID6PRIVCFGR,RISAB compartment 6 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C8++0x3 line.long 0x0 "RISAB_CID6RDCFGR,RISAB compartment 6 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8D0++0x3 line.long 0x0 "RISAB_CID6WRCFGR,RISAB compartment 6 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0xA00++0x7F line.long 0x0 "RISAB_PG0_CIDCFGR,RISAB page 0 CID configuration register" bitfld.long 0x0 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_CIDCFGR,RISAB page 1 CID configuration register" bitfld.long 0x4 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_CIDCFGR,RISAB page 2 CID configuration register" bitfld.long 0x8 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_CIDCFGR,RISAB page 3 CID configuration register" bitfld.long 0xC 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_CIDCFGR,RISAB page 4 CID configuration register" bitfld.long 0x10 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_CIDCFGR,RISAB page 5 CID configuration register" bitfld.long 0x14 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_CIDCFGR,RISAB page 6 CID configuration register" bitfld.long 0x18 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_CIDCFGR,RISAB page 7 CID configuration register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_CIDCFGR,RISAB page 8 CID configuration register" bitfld.long 0x20 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_CIDCFGR,RISAB page 9 CID configuration register" bitfld.long 0x24 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_CIDCFGR,RISAB page 10 CID configuration register" bitfld.long 0x28 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_CIDCFGR,RISAB page 11 CID configuration register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_CIDCFGR,RISAB page 12 CID configuration register" bitfld.long 0x30 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_CIDCFGR,RISAB page 13 CID configuration register" bitfld.long 0x34 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x34 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_CIDCFGR,RISAB page 14 CID configuration register" bitfld.long 0x38 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_CIDCFGR,RISAB page 15 CID configuration register" bitfld.long 0x3C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x3C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_CIDCFGR,RISAB page 16 CID configuration register" bitfld.long 0x40 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x40 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_CIDCFGR,RISAB page 17 CID configuration register" bitfld.long 0x44 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x44 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x44 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_CIDCFGR,RISAB page 18 CID configuration register" bitfld.long 0x48 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x48 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_CIDCFGR,RISAB page 19 CID configuration register" bitfld.long 0x4C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_CIDCFGR,RISAB page 20 CID configuration register" bitfld.long 0x50 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x50 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_CIDCFGR,RISAB page 21 CID configuration register" bitfld.long 0x54 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x54 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x54 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_CIDCFGR,RISAB page 22 CID configuration register" bitfld.long 0x58 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x58 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_CIDCFGR,RISAB page 23 CID configuration register" bitfld.long 0x5C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x5C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_CIDCFGR,RISAB page 24 CID configuration register" bitfld.long 0x60 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x60 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_CIDCFGR,RISAB page 25 CID configuration register" bitfld.long 0x64 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x64 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x64 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_CIDCFGR,RISAB page 26 CID configuration register" bitfld.long 0x68 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x68 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_CIDCFGR,RISAB page 27 CID configuration register" bitfld.long 0x6C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x6C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_CIDCFGR,RISAB page 28 CID configuration register" bitfld.long 0x70 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x70 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_CIDCFGR,RISAB page 29 CID configuration register" bitfld.long 0x74 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x74 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x74 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_CIDCFGR,RISAB page 30 CID configuration register" bitfld.long 0x78 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x78 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_CIDCFGR,RISAB page 31 CID configuration register" bitfld.long 0x7C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x7C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" rgroup.long 0xFE8++0x17 line.long 0x0 "RISAB_HWCFGR3,RISAB hardware configuration register 3" hexmask.long 0x0 0.--31. 1. "CFG,Hardware configuration" line.long 0x4 "RISAB_HWCFGR2,RISAB hardware configuration register 2" hexmask.long 0x4 0.--31. 1. "CFG,Hardware configuration" line.long 0x8 "RISAB_HWCFGR1,RISAB hardware configuration register 1" hexmask.long.byte 0x8 24.--27. 1. "CFG7,Hardware configuration 7" hexmask.long.byte 0x8 20.--23. 1. "CFG6,Hardware configuration 6" hexmask.long.byte 0x8 16.--19. 1. "CFG5,Hardware configuration 5" hexmask.long.byte 0x8 12.--15. 1. "CFG4,Hardware configuration 4" hexmask.long.byte 0x8 8.--11. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x8 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x8 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0xC "RISAB_VERR,RISAB version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,RISAB major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,RISAB minor revision" line.long 0x10 "RISAB_IPIDR,RISAB identification register" hexmask.long 0x10 0.--31. 1. "ID,RISAB identification code" line.long 0x14 "RISAB_SIDR,RISAB size identification register" hexmask.long 0x14 0.--31. 1. "SID,RISAB size identification code" tree.end tree "RISAB4" base ad:0x42120000 group.long 0x0++0x3 line.long 0x0 "RISAB_CR,RISAB configuration register" bitfld.long 0x0 31. "SRWIAD,Secure read/write illegal access disable" "B_0x0,B_0x1" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "RISAB_IASR,RISAB illegal access status register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAB_IACR,RISAB illegal access clear register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" group.long 0x10++0x3 line.long 0x0 "RISAB_RCFGLOCKR,RISAB configuration lock register" bitfld.long 0x0 31. "RLOCK31,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 30. "RLOCK30,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 29. "RLOCK29,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 28. "RLOCK28,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 27. "RLOCK27,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 26. "RLOCK26,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 25. "RLOCK25,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "RLOCK24,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 23. "RLOCK23,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 22. "RLOCK22,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 21. "RLOCK21,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 20. "RLOCK20,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 19. "RLOCK19,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 18. "RLOCK18,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "RLOCK17,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 16. "RLOCK16,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 15. "RLOCK15,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 14. "RLOCK14,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 13. "RLOCK13,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 12. "RLOCK12,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 11. "RLOCK11,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "RLOCK10,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 9. "RLOCK9,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 8. "RLOCK8,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 7. "RLOCK7,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 6. "RLOCK6,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 5. "RLOCK5,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 4. "RLOCK4,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "RLOCK3,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 2. "RLOCK2,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 1. "RLOCK1,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 0. "RLOCK0,Resource lock for page y" "B_0x0,B_0x1" rgroup.long 0x20++0x7 line.long 0x0 "RISAB_IAESR,RISAB illegal access error status register" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAB_IADDR,RISAB illegal address register" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" group.long 0x100++0x7F line.long 0x0 "RISAB_PG0_SECCFGR,RISAB page 0 security configuration register" bitfld.long 0x0 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_SECCFGR,RISAB page 1 security configuration register" bitfld.long 0x4 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_SECCFGR,RISAB page 2 security configuration register" bitfld.long 0x8 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_SECCFGR,RISAB page 3 security configuration register" bitfld.long 0xC 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_SECCFGR,RISAB page 4 security configuration register" bitfld.long 0x10 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_SECCFGR,RISAB page 5 security configuration register" bitfld.long 0x14 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_SECCFGR,RISAB page 6 security configuration register" bitfld.long 0x18 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_SECCFGR,RISAB page 7 security configuration register" bitfld.long 0x1C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_SECCFGR,RISAB page 8 security configuration register" bitfld.long 0x20 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_SECCFGR,RISAB page 9 security configuration register" bitfld.long 0x24 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_SECCFGR,RISAB page 10 security configuration register" bitfld.long 0x28 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_SECCFGR,RISAB page 11 security configuration register" bitfld.long 0x2C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_SECCFGR,RISAB page 12 security configuration register" bitfld.long 0x30 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_SECCFGR,RISAB page 13 security configuration register" bitfld.long 0x34 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_SECCFGR,RISAB page 14 security configuration register" bitfld.long 0x38 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_SECCFGR,RISAB page 15 security configuration register" bitfld.long 0x3C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_SECCFGR,RISAB page 16 security configuration register" bitfld.long 0x40 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_SECCFGR,RISAB page 17 security configuration register" bitfld.long 0x44 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_SECCFGR,RISAB page 18 security configuration register" bitfld.long 0x48 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_SECCFGR,RISAB page 19 security configuration register" bitfld.long 0x4C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_SECCFGR,RISAB page 20 security configuration register" bitfld.long 0x50 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_SECCFGR,RISAB page 21 security configuration register" bitfld.long 0x54 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_SECCFGR,RISAB page 22 security configuration register" bitfld.long 0x58 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_SECCFGR,RISAB page 23 security configuration register" bitfld.long 0x5C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_SECCFGR,RISAB page 24 security configuration register" bitfld.long 0x60 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_SECCFGR,RISAB page 25 security configuration register" bitfld.long 0x64 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_SECCFGR,RISAB page 26 security configuration register" bitfld.long 0x68 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_SECCFGR,RISAB page 27 security configuration register" bitfld.long 0x6C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_SECCFGR,RISAB page 28 security configuration register" bitfld.long 0x70 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_SECCFGR,RISAB page 29 security configuration register" bitfld.long 0x74 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_SECCFGR,RISAB page 30 security configuration register" bitfld.long 0x78 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_SECCFGR,RISAB page 31 security configuration register" bitfld.long 0x7C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" group.long 0x200++0x7F line.long 0x0 "RISAB_PG0_PRIVCFGR,RISAB page 0 default privileged configuration register" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_PRIVCFGR,RISAB page 1 default privileged configuration register" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_PRIVCFGR,RISAB page 2 default privileged configuration register" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_PRIVCFGR,RISAB page 3 default privileged configuration register" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_PRIVCFGR,RISAB page 4 default privileged configuration register" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_PRIVCFGR,RISAB page 5 default privileged configuration register" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_PRIVCFGR,RISAB page 6 default privileged configuration register" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_PRIVCFGR,RISAB page 7 default privileged configuration register" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_PRIVCFGR,RISAB page 8 default privileged configuration register" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_PRIVCFGR,RISAB page 9 default privileged configuration register" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_PRIVCFGR,RISAB page 10 default privileged configuration register" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_PRIVCFGR,RISAB page 11 default privileged configuration register" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_PRIVCFGR,RISAB page 12 default privileged configuration register" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_PRIVCFGR,RISAB page 13 default privileged configuration register" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_PRIVCFGR,RISAB page 14 default privileged configuration register" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_PRIVCFGR,RISAB page 15 default privileged configuration register" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_PRIVCFGR,RISAB page 16 default privileged configuration register" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_PRIVCFGR,RISAB page 17 default privileged configuration register" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_PRIVCFGR,RISAB page 18 default privileged configuration register" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_PRIVCFGR,RISAB page 19 default privileged configuration register" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_PRIVCFGR,RISAB page 20 default privileged configuration register" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_PRIVCFGR,RISAB page 21 default privileged configuration register" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_PRIVCFGR,RISAB page 22 default privileged configuration register" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_PRIVCFGR,RISAB page 23 default privileged configuration register" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_PRIVCFGR,RISAB page 24 default privileged configuration register" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_PRIVCFGR,RISAB page 25 default privileged configuration register" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_PRIVCFGR,RISAB page 26 default privileged configuration register" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_PRIVCFGR,RISAB page 27 default privileged configuration register" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_PRIVCFGR,RISAB page 28 default privileged configuration register" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_PRIVCFGR,RISAB page 29 default privileged configuration register" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_PRIVCFGR,RISAB page 30 default privileged configuration register" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_PRIVCFGR,RISAB page 31 default privileged configuration register" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x600++0x7F line.long 0x0 "RISAB_PG0_C2PRIVCFGR,RISAB page 0 privileged configuration register for compartment 2" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_C2PRIVCFGR,RISAB page 1 privileged configuration register for compartment 2" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_C2PRIVCFGR,RISAB page 2 privileged configuration register for compartment 2" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_C2PRIVCFGR,RISAB page 3 privileged configuration register for compartment 2" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_C2PRIVCFGR,RISAB page 4 privileged configuration register for compartment 2" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_C2PRIVCFGR,RISAB page 5 privileged configuration register for compartment 2" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_C2PRIVCFGR,RISAB page 6 privileged configuration register for compartment 2" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_C2PRIVCFGR,RISAB page 7 privileged configuration register for compartment 2" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_C2PRIVCFGR,RISAB page 8 privileged configuration register for compartment 2" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_C2PRIVCFGR,RISAB page 9 privileged configuration register for compartment 2" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_C2PRIVCFGR,RISAB page 10 privileged configuration register for compartment 2" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_C2PRIVCFGR,RISAB page 11 privileged configuration register for compartment 2" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_C2PRIVCFGR,RISAB page 12 privileged configuration register for compartment 2" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_C2PRIVCFGR,RISAB page 13 privileged configuration register for compartment 2" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_C2PRIVCFGR,RISAB page 14 privileged configuration register for compartment 2" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_C2PRIVCFGR,RISAB page 15 privileged configuration register for compartment 2" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_C2PRIVCFGR,RISAB page 16 privileged configuration register for compartment 2" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_C2PRIVCFGR,RISAB page 17 privileged configuration register for compartment 2" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_C2PRIVCFGR,RISAB page 18 privileged configuration register for compartment 2" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_C2PRIVCFGR,RISAB page 19 privileged configuration register for compartment 2" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_C2PRIVCFGR,RISAB page 20 privileged configuration register for compartment 2" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_C2PRIVCFGR,RISAB page 21 privileged configuration register for compartment 2" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_C2PRIVCFGR,RISAB page 22 privileged configuration register for compartment 2" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_C2PRIVCFGR,RISAB page 23 privileged configuration register for compartment 2" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_C2PRIVCFGR,RISAB page 24 privileged configuration register for compartment 2" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_C2PRIVCFGR,RISAB page 25 privileged configuration register for compartment 2" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_C2PRIVCFGR,RISAB page 26 privileged configuration register for compartment 2" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_C2PRIVCFGR,RISAB page 27 privileged configuration register for compartment 2" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_C2PRIVCFGR,RISAB page 28 privileged configuration register for compartment 2" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_C2PRIVCFGR,RISAB page 29 privileged configuration register for compartment 2" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_C2PRIVCFGR,RISAB page 30 privileged configuration register for compartment 2" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_C2PRIVCFGR,RISAB page 31 privileged configuration register for compartment 2" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x800++0x3 line.long 0x0 "RISAB_CID0PRIVCFGR,RISAB compartment 0 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x808++0x3 line.long 0x0 "RISAB_CID0RDCFGR,RISAB compartment 0 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x810++0x3 line.long 0x0 "RISAB_CID0WRCFGR,RISAB compartment 0 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x820++0x3 line.long 0x0 "RISAB_CID1PRIVCFGR,RISAB compartment 1 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x828++0x3 line.long 0x0 "RISAB_CID1RDCFGR,RISAB compartment 1 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x830++0x3 line.long 0x0 "RISAB_CID1WRCFGR,RISAB compartment 1 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x840++0x3 line.long 0x0 "RISAB_CID2PRIVCFGR,RISAB compartment 2 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x848++0x3 line.long 0x0 "RISAB_CID2RDCFGR,RISAB compartment 2 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x850++0x3 line.long 0x0 "RISAB_CID2WRCFGR,RISAB compartment 2 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x860++0x3 line.long 0x0 "RISAB_CID3PRIVCFGR,RISAB compartment 3 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x868++0x3 line.long 0x0 "RISAB_CID3RDCFGR,RISAB compartment 3 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x870++0x3 line.long 0x0 "RISAB_CID3WRCFGR,RISAB compartment 3 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x880++0x3 line.long 0x0 "RISAB_CID4PRIVCFGR,RISAB compartment 4 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x888++0x3 line.long 0x0 "RISAB_CID4RDCFGR,RISAB compartment 4 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x890++0x3 line.long 0x0 "RISAB_CID4WRCFGR,RISAB compartment 4 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A0++0x3 line.long 0x0 "RISAB_CID5PRIVCFGR,RISAB compartment 5 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A8++0x3 line.long 0x0 "RISAB_CID5RDCFGR,RISAB compartment 5 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8B0++0x3 line.long 0x0 "RISAB_CID5WRCFGR,RISAB compartment 5 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C0++0x3 line.long 0x0 "RISAB_CID6PRIVCFGR,RISAB compartment 6 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C8++0x3 line.long 0x0 "RISAB_CID6RDCFGR,RISAB compartment 6 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8D0++0x3 line.long 0x0 "RISAB_CID6WRCFGR,RISAB compartment 6 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0xA00++0x7F line.long 0x0 "RISAB_PG0_CIDCFGR,RISAB page 0 CID configuration register" bitfld.long 0x0 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_CIDCFGR,RISAB page 1 CID configuration register" bitfld.long 0x4 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_CIDCFGR,RISAB page 2 CID configuration register" bitfld.long 0x8 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_CIDCFGR,RISAB page 3 CID configuration register" bitfld.long 0xC 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_CIDCFGR,RISAB page 4 CID configuration register" bitfld.long 0x10 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_CIDCFGR,RISAB page 5 CID configuration register" bitfld.long 0x14 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_CIDCFGR,RISAB page 6 CID configuration register" bitfld.long 0x18 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_CIDCFGR,RISAB page 7 CID configuration register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_CIDCFGR,RISAB page 8 CID configuration register" bitfld.long 0x20 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_CIDCFGR,RISAB page 9 CID configuration register" bitfld.long 0x24 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_CIDCFGR,RISAB page 10 CID configuration register" bitfld.long 0x28 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_CIDCFGR,RISAB page 11 CID configuration register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_CIDCFGR,RISAB page 12 CID configuration register" bitfld.long 0x30 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_CIDCFGR,RISAB page 13 CID configuration register" bitfld.long 0x34 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x34 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_CIDCFGR,RISAB page 14 CID configuration register" bitfld.long 0x38 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_CIDCFGR,RISAB page 15 CID configuration register" bitfld.long 0x3C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x3C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_CIDCFGR,RISAB page 16 CID configuration register" bitfld.long 0x40 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x40 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_CIDCFGR,RISAB page 17 CID configuration register" bitfld.long 0x44 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x44 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x44 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_CIDCFGR,RISAB page 18 CID configuration register" bitfld.long 0x48 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x48 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_CIDCFGR,RISAB page 19 CID configuration register" bitfld.long 0x4C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_CIDCFGR,RISAB page 20 CID configuration register" bitfld.long 0x50 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x50 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_CIDCFGR,RISAB page 21 CID configuration register" bitfld.long 0x54 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x54 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x54 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_CIDCFGR,RISAB page 22 CID configuration register" bitfld.long 0x58 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x58 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_CIDCFGR,RISAB page 23 CID configuration register" bitfld.long 0x5C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x5C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_CIDCFGR,RISAB page 24 CID configuration register" bitfld.long 0x60 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x60 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_CIDCFGR,RISAB page 25 CID configuration register" bitfld.long 0x64 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x64 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x64 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_CIDCFGR,RISAB page 26 CID configuration register" bitfld.long 0x68 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x68 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_CIDCFGR,RISAB page 27 CID configuration register" bitfld.long 0x6C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x6C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_CIDCFGR,RISAB page 28 CID configuration register" bitfld.long 0x70 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x70 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_CIDCFGR,RISAB page 29 CID configuration register" bitfld.long 0x74 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x74 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x74 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_CIDCFGR,RISAB page 30 CID configuration register" bitfld.long 0x78 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x78 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_CIDCFGR,RISAB page 31 CID configuration register" bitfld.long 0x7C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x7C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" rgroup.long 0xFE8++0x17 line.long 0x0 "RISAB_HWCFGR3,RISAB hardware configuration register 3" hexmask.long 0x0 0.--31. 1. "CFG,Hardware configuration" line.long 0x4 "RISAB_HWCFGR2,RISAB hardware configuration register 2" hexmask.long 0x4 0.--31. 1. "CFG,Hardware configuration" line.long 0x8 "RISAB_HWCFGR1,RISAB hardware configuration register 1" hexmask.long.byte 0x8 24.--27. 1. "CFG7,Hardware configuration 7" hexmask.long.byte 0x8 20.--23. 1. "CFG6,Hardware configuration 6" hexmask.long.byte 0x8 16.--19. 1. "CFG5,Hardware configuration 5" hexmask.long.byte 0x8 12.--15. 1. "CFG4,Hardware configuration 4" hexmask.long.byte 0x8 8.--11. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x8 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x8 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0xC "RISAB_VERR,RISAB version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,RISAB major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,RISAB minor revision" line.long 0x10 "RISAB_IPIDR,RISAB identification register" hexmask.long 0x10 0.--31. 1. "ID,RISAB identification code" line.long 0x14 "RISAB_SIDR,RISAB size identification register" hexmask.long 0x14 0.--31. 1. "SID,RISAB size identification code" tree.end tree "RISAB4_S" base ad:0x52120000 group.long 0x0++0x3 line.long 0x0 "RISAB_CR,RISAB configuration register" bitfld.long 0x0 31. "SRWIAD,Secure read/write illegal access disable" "B_0x0,B_0x1" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "RISAB_IASR,RISAB illegal access status register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAB_IACR,RISAB illegal access clear register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" group.long 0x10++0x3 line.long 0x0 "RISAB_RCFGLOCKR,RISAB configuration lock register" bitfld.long 0x0 31. "RLOCK31,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 30. "RLOCK30,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 29. "RLOCK29,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 28. "RLOCK28,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 27. "RLOCK27,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 26. "RLOCK26,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 25. "RLOCK25,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "RLOCK24,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 23. "RLOCK23,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 22. "RLOCK22,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 21. "RLOCK21,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 20. "RLOCK20,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 19. "RLOCK19,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 18. "RLOCK18,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "RLOCK17,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 16. "RLOCK16,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 15. "RLOCK15,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 14. "RLOCK14,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 13. "RLOCK13,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 12. "RLOCK12,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 11. "RLOCK11,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "RLOCK10,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 9. "RLOCK9,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 8. "RLOCK8,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 7. "RLOCK7,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 6. "RLOCK6,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 5. "RLOCK5,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 4. "RLOCK4,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "RLOCK3,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 2. "RLOCK2,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 1. "RLOCK1,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 0. "RLOCK0,Resource lock for page y" "B_0x0,B_0x1" rgroup.long 0x20++0x7 line.long 0x0 "RISAB_IAESR,RISAB illegal access error status register" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAB_IADDR,RISAB illegal address register" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" group.long 0x100++0x7F line.long 0x0 "RISAB_PG0_SECCFGR,RISAB page 0 security configuration register" bitfld.long 0x0 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_SECCFGR,RISAB page 1 security configuration register" bitfld.long 0x4 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_SECCFGR,RISAB page 2 security configuration register" bitfld.long 0x8 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_SECCFGR,RISAB page 3 security configuration register" bitfld.long 0xC 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_SECCFGR,RISAB page 4 security configuration register" bitfld.long 0x10 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_SECCFGR,RISAB page 5 security configuration register" bitfld.long 0x14 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_SECCFGR,RISAB page 6 security configuration register" bitfld.long 0x18 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_SECCFGR,RISAB page 7 security configuration register" bitfld.long 0x1C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_SECCFGR,RISAB page 8 security configuration register" bitfld.long 0x20 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_SECCFGR,RISAB page 9 security configuration register" bitfld.long 0x24 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_SECCFGR,RISAB page 10 security configuration register" bitfld.long 0x28 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_SECCFGR,RISAB page 11 security configuration register" bitfld.long 0x2C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_SECCFGR,RISAB page 12 security configuration register" bitfld.long 0x30 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_SECCFGR,RISAB page 13 security configuration register" bitfld.long 0x34 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_SECCFGR,RISAB page 14 security configuration register" bitfld.long 0x38 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_SECCFGR,RISAB page 15 security configuration register" bitfld.long 0x3C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_SECCFGR,RISAB page 16 security configuration register" bitfld.long 0x40 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_SECCFGR,RISAB page 17 security configuration register" bitfld.long 0x44 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_SECCFGR,RISAB page 18 security configuration register" bitfld.long 0x48 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_SECCFGR,RISAB page 19 security configuration register" bitfld.long 0x4C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_SECCFGR,RISAB page 20 security configuration register" bitfld.long 0x50 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_SECCFGR,RISAB page 21 security configuration register" bitfld.long 0x54 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_SECCFGR,RISAB page 22 security configuration register" bitfld.long 0x58 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_SECCFGR,RISAB page 23 security configuration register" bitfld.long 0x5C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_SECCFGR,RISAB page 24 security configuration register" bitfld.long 0x60 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_SECCFGR,RISAB page 25 security configuration register" bitfld.long 0x64 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_SECCFGR,RISAB page 26 security configuration register" bitfld.long 0x68 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_SECCFGR,RISAB page 27 security configuration register" bitfld.long 0x6C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_SECCFGR,RISAB page 28 security configuration register" bitfld.long 0x70 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_SECCFGR,RISAB page 29 security configuration register" bitfld.long 0x74 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_SECCFGR,RISAB page 30 security configuration register" bitfld.long 0x78 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_SECCFGR,RISAB page 31 security configuration register" bitfld.long 0x7C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" group.long 0x200++0x7F line.long 0x0 "RISAB_PG0_PRIVCFGR,RISAB page 0 default privileged configuration register" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_PRIVCFGR,RISAB page 1 default privileged configuration register" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_PRIVCFGR,RISAB page 2 default privileged configuration register" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_PRIVCFGR,RISAB page 3 default privileged configuration register" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_PRIVCFGR,RISAB page 4 default privileged configuration register" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_PRIVCFGR,RISAB page 5 default privileged configuration register" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_PRIVCFGR,RISAB page 6 default privileged configuration register" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_PRIVCFGR,RISAB page 7 default privileged configuration register" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_PRIVCFGR,RISAB page 8 default privileged configuration register" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_PRIVCFGR,RISAB page 9 default privileged configuration register" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_PRIVCFGR,RISAB page 10 default privileged configuration register" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_PRIVCFGR,RISAB page 11 default privileged configuration register" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_PRIVCFGR,RISAB page 12 default privileged configuration register" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_PRIVCFGR,RISAB page 13 default privileged configuration register" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_PRIVCFGR,RISAB page 14 default privileged configuration register" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_PRIVCFGR,RISAB page 15 default privileged configuration register" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_PRIVCFGR,RISAB page 16 default privileged configuration register" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_PRIVCFGR,RISAB page 17 default privileged configuration register" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_PRIVCFGR,RISAB page 18 default privileged configuration register" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_PRIVCFGR,RISAB page 19 default privileged configuration register" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_PRIVCFGR,RISAB page 20 default privileged configuration register" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_PRIVCFGR,RISAB page 21 default privileged configuration register" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_PRIVCFGR,RISAB page 22 default privileged configuration register" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_PRIVCFGR,RISAB page 23 default privileged configuration register" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_PRIVCFGR,RISAB page 24 default privileged configuration register" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_PRIVCFGR,RISAB page 25 default privileged configuration register" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_PRIVCFGR,RISAB page 26 default privileged configuration register" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_PRIVCFGR,RISAB page 27 default privileged configuration register" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_PRIVCFGR,RISAB page 28 default privileged configuration register" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_PRIVCFGR,RISAB page 29 default privileged configuration register" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_PRIVCFGR,RISAB page 30 default privileged configuration register" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_PRIVCFGR,RISAB page 31 default privileged configuration register" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x600++0x7F line.long 0x0 "RISAB_PG0_C2PRIVCFGR,RISAB page 0 privileged configuration register for compartment 2" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_C2PRIVCFGR,RISAB page 1 privileged configuration register for compartment 2" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_C2PRIVCFGR,RISAB page 2 privileged configuration register for compartment 2" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_C2PRIVCFGR,RISAB page 3 privileged configuration register for compartment 2" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_C2PRIVCFGR,RISAB page 4 privileged configuration register for compartment 2" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_C2PRIVCFGR,RISAB page 5 privileged configuration register for compartment 2" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_C2PRIVCFGR,RISAB page 6 privileged configuration register for compartment 2" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_C2PRIVCFGR,RISAB page 7 privileged configuration register for compartment 2" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_C2PRIVCFGR,RISAB page 8 privileged configuration register for compartment 2" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_C2PRIVCFGR,RISAB page 9 privileged configuration register for compartment 2" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_C2PRIVCFGR,RISAB page 10 privileged configuration register for compartment 2" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_C2PRIVCFGR,RISAB page 11 privileged configuration register for compartment 2" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_C2PRIVCFGR,RISAB page 12 privileged configuration register for compartment 2" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_C2PRIVCFGR,RISAB page 13 privileged configuration register for compartment 2" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_C2PRIVCFGR,RISAB page 14 privileged configuration register for compartment 2" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_C2PRIVCFGR,RISAB page 15 privileged configuration register for compartment 2" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_C2PRIVCFGR,RISAB page 16 privileged configuration register for compartment 2" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_C2PRIVCFGR,RISAB page 17 privileged configuration register for compartment 2" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_C2PRIVCFGR,RISAB page 18 privileged configuration register for compartment 2" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_C2PRIVCFGR,RISAB page 19 privileged configuration register for compartment 2" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_C2PRIVCFGR,RISAB page 20 privileged configuration register for compartment 2" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_C2PRIVCFGR,RISAB page 21 privileged configuration register for compartment 2" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_C2PRIVCFGR,RISAB page 22 privileged configuration register for compartment 2" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_C2PRIVCFGR,RISAB page 23 privileged configuration register for compartment 2" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_C2PRIVCFGR,RISAB page 24 privileged configuration register for compartment 2" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_C2PRIVCFGR,RISAB page 25 privileged configuration register for compartment 2" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_C2PRIVCFGR,RISAB page 26 privileged configuration register for compartment 2" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_C2PRIVCFGR,RISAB page 27 privileged configuration register for compartment 2" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_C2PRIVCFGR,RISAB page 28 privileged configuration register for compartment 2" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_C2PRIVCFGR,RISAB page 29 privileged configuration register for compartment 2" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_C2PRIVCFGR,RISAB page 30 privileged configuration register for compartment 2" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_C2PRIVCFGR,RISAB page 31 privileged configuration register for compartment 2" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x800++0x3 line.long 0x0 "RISAB_CID0PRIVCFGR,RISAB compartment 0 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x808++0x3 line.long 0x0 "RISAB_CID0RDCFGR,RISAB compartment 0 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x810++0x3 line.long 0x0 "RISAB_CID0WRCFGR,RISAB compartment 0 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x820++0x3 line.long 0x0 "RISAB_CID1PRIVCFGR,RISAB compartment 1 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x828++0x3 line.long 0x0 "RISAB_CID1RDCFGR,RISAB compartment 1 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x830++0x3 line.long 0x0 "RISAB_CID1WRCFGR,RISAB compartment 1 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x840++0x3 line.long 0x0 "RISAB_CID2PRIVCFGR,RISAB compartment 2 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x848++0x3 line.long 0x0 "RISAB_CID2RDCFGR,RISAB compartment 2 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x850++0x3 line.long 0x0 "RISAB_CID2WRCFGR,RISAB compartment 2 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x860++0x3 line.long 0x0 "RISAB_CID3PRIVCFGR,RISAB compartment 3 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x868++0x3 line.long 0x0 "RISAB_CID3RDCFGR,RISAB compartment 3 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x870++0x3 line.long 0x0 "RISAB_CID3WRCFGR,RISAB compartment 3 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x880++0x3 line.long 0x0 "RISAB_CID4PRIVCFGR,RISAB compartment 4 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x888++0x3 line.long 0x0 "RISAB_CID4RDCFGR,RISAB compartment 4 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x890++0x3 line.long 0x0 "RISAB_CID4WRCFGR,RISAB compartment 4 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A0++0x3 line.long 0x0 "RISAB_CID5PRIVCFGR,RISAB compartment 5 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A8++0x3 line.long 0x0 "RISAB_CID5RDCFGR,RISAB compartment 5 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8B0++0x3 line.long 0x0 "RISAB_CID5WRCFGR,RISAB compartment 5 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C0++0x3 line.long 0x0 "RISAB_CID6PRIVCFGR,RISAB compartment 6 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C8++0x3 line.long 0x0 "RISAB_CID6RDCFGR,RISAB compartment 6 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8D0++0x3 line.long 0x0 "RISAB_CID6WRCFGR,RISAB compartment 6 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0xA00++0x7F line.long 0x0 "RISAB_PG0_CIDCFGR,RISAB page 0 CID configuration register" bitfld.long 0x0 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_CIDCFGR,RISAB page 1 CID configuration register" bitfld.long 0x4 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_CIDCFGR,RISAB page 2 CID configuration register" bitfld.long 0x8 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_CIDCFGR,RISAB page 3 CID configuration register" bitfld.long 0xC 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_CIDCFGR,RISAB page 4 CID configuration register" bitfld.long 0x10 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_CIDCFGR,RISAB page 5 CID configuration register" bitfld.long 0x14 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_CIDCFGR,RISAB page 6 CID configuration register" bitfld.long 0x18 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_CIDCFGR,RISAB page 7 CID configuration register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_CIDCFGR,RISAB page 8 CID configuration register" bitfld.long 0x20 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_CIDCFGR,RISAB page 9 CID configuration register" bitfld.long 0x24 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_CIDCFGR,RISAB page 10 CID configuration register" bitfld.long 0x28 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_CIDCFGR,RISAB page 11 CID configuration register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_CIDCFGR,RISAB page 12 CID configuration register" bitfld.long 0x30 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_CIDCFGR,RISAB page 13 CID configuration register" bitfld.long 0x34 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x34 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_CIDCFGR,RISAB page 14 CID configuration register" bitfld.long 0x38 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_CIDCFGR,RISAB page 15 CID configuration register" bitfld.long 0x3C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x3C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_CIDCFGR,RISAB page 16 CID configuration register" bitfld.long 0x40 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x40 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_CIDCFGR,RISAB page 17 CID configuration register" bitfld.long 0x44 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x44 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x44 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_CIDCFGR,RISAB page 18 CID configuration register" bitfld.long 0x48 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x48 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_CIDCFGR,RISAB page 19 CID configuration register" bitfld.long 0x4C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_CIDCFGR,RISAB page 20 CID configuration register" bitfld.long 0x50 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x50 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_CIDCFGR,RISAB page 21 CID configuration register" bitfld.long 0x54 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x54 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x54 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_CIDCFGR,RISAB page 22 CID configuration register" bitfld.long 0x58 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x58 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_CIDCFGR,RISAB page 23 CID configuration register" bitfld.long 0x5C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x5C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_CIDCFGR,RISAB page 24 CID configuration register" bitfld.long 0x60 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x60 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_CIDCFGR,RISAB page 25 CID configuration register" bitfld.long 0x64 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x64 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x64 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_CIDCFGR,RISAB page 26 CID configuration register" bitfld.long 0x68 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x68 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_CIDCFGR,RISAB page 27 CID configuration register" bitfld.long 0x6C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x6C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_CIDCFGR,RISAB page 28 CID configuration register" bitfld.long 0x70 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x70 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_CIDCFGR,RISAB page 29 CID configuration register" bitfld.long 0x74 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x74 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x74 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_CIDCFGR,RISAB page 30 CID configuration register" bitfld.long 0x78 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x78 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_CIDCFGR,RISAB page 31 CID configuration register" bitfld.long 0x7C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x7C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" rgroup.long 0xFE8++0x17 line.long 0x0 "RISAB_HWCFGR3,RISAB hardware configuration register 3" hexmask.long 0x0 0.--31. 1. "CFG,Hardware configuration" line.long 0x4 "RISAB_HWCFGR2,RISAB hardware configuration register 2" hexmask.long 0x4 0.--31. 1. "CFG,Hardware configuration" line.long 0x8 "RISAB_HWCFGR1,RISAB hardware configuration register 1" hexmask.long.byte 0x8 24.--27. 1. "CFG7,Hardware configuration 7" hexmask.long.byte 0x8 20.--23. 1. "CFG6,Hardware configuration 6" hexmask.long.byte 0x8 16.--19. 1. "CFG5,Hardware configuration 5" hexmask.long.byte 0x8 12.--15. 1. "CFG4,Hardware configuration 4" hexmask.long.byte 0x8 8.--11. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x8 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x8 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0xC "RISAB_VERR,RISAB version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,RISAB major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,RISAB minor revision" line.long 0x10 "RISAB_IPIDR,RISAB identification register" hexmask.long 0x10 0.--31. 1. "ID,RISAB identification code" line.long 0x14 "RISAB_SIDR,RISAB size identification register" hexmask.long 0x14 0.--31. 1. "SID,RISAB size identification code" tree.end tree "RISAB5" base ad:0x42130000 group.long 0x0++0x3 line.long 0x0 "RISAB_CR,RISAB configuration register" bitfld.long 0x0 31. "SRWIAD,Secure read/write illegal access disable" "B_0x0,B_0x1" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "RISAB_IASR,RISAB illegal access status register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAB_IACR,RISAB illegal access clear register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" group.long 0x10++0x3 line.long 0x0 "RISAB_RCFGLOCKR,RISAB configuration lock register" bitfld.long 0x0 31. "RLOCK31,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 30. "RLOCK30,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 29. "RLOCK29,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 28. "RLOCK28,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 27. "RLOCK27,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 26. "RLOCK26,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 25. "RLOCK25,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "RLOCK24,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 23. "RLOCK23,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 22. "RLOCK22,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 21. "RLOCK21,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 20. "RLOCK20,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 19. "RLOCK19,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 18. "RLOCK18,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "RLOCK17,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 16. "RLOCK16,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 15. "RLOCK15,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 14. "RLOCK14,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 13. "RLOCK13,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 12. "RLOCK12,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 11. "RLOCK11,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "RLOCK10,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 9. "RLOCK9,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 8. "RLOCK8,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 7. "RLOCK7,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 6. "RLOCK6,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 5. "RLOCK5,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 4. "RLOCK4,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "RLOCK3,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 2. "RLOCK2,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 1. "RLOCK1,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 0. "RLOCK0,Resource lock for page y" "B_0x0,B_0x1" rgroup.long 0x20++0x7 line.long 0x0 "RISAB_IAESR,RISAB illegal access error status register" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAB_IADDR,RISAB illegal address register" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" group.long 0x100++0x7F line.long 0x0 "RISAB_PG0_SECCFGR,RISAB page 0 security configuration register" bitfld.long 0x0 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_SECCFGR,RISAB page 1 security configuration register" bitfld.long 0x4 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_SECCFGR,RISAB page 2 security configuration register" bitfld.long 0x8 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_SECCFGR,RISAB page 3 security configuration register" bitfld.long 0xC 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_SECCFGR,RISAB page 4 security configuration register" bitfld.long 0x10 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_SECCFGR,RISAB page 5 security configuration register" bitfld.long 0x14 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_SECCFGR,RISAB page 6 security configuration register" bitfld.long 0x18 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_SECCFGR,RISAB page 7 security configuration register" bitfld.long 0x1C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_SECCFGR,RISAB page 8 security configuration register" bitfld.long 0x20 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_SECCFGR,RISAB page 9 security configuration register" bitfld.long 0x24 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_SECCFGR,RISAB page 10 security configuration register" bitfld.long 0x28 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_SECCFGR,RISAB page 11 security configuration register" bitfld.long 0x2C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_SECCFGR,RISAB page 12 security configuration register" bitfld.long 0x30 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_SECCFGR,RISAB page 13 security configuration register" bitfld.long 0x34 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_SECCFGR,RISAB page 14 security configuration register" bitfld.long 0x38 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_SECCFGR,RISAB page 15 security configuration register" bitfld.long 0x3C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_SECCFGR,RISAB page 16 security configuration register" bitfld.long 0x40 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_SECCFGR,RISAB page 17 security configuration register" bitfld.long 0x44 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_SECCFGR,RISAB page 18 security configuration register" bitfld.long 0x48 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_SECCFGR,RISAB page 19 security configuration register" bitfld.long 0x4C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_SECCFGR,RISAB page 20 security configuration register" bitfld.long 0x50 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_SECCFGR,RISAB page 21 security configuration register" bitfld.long 0x54 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_SECCFGR,RISAB page 22 security configuration register" bitfld.long 0x58 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_SECCFGR,RISAB page 23 security configuration register" bitfld.long 0x5C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_SECCFGR,RISAB page 24 security configuration register" bitfld.long 0x60 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_SECCFGR,RISAB page 25 security configuration register" bitfld.long 0x64 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_SECCFGR,RISAB page 26 security configuration register" bitfld.long 0x68 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_SECCFGR,RISAB page 27 security configuration register" bitfld.long 0x6C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_SECCFGR,RISAB page 28 security configuration register" bitfld.long 0x70 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_SECCFGR,RISAB page 29 security configuration register" bitfld.long 0x74 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_SECCFGR,RISAB page 30 security configuration register" bitfld.long 0x78 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_SECCFGR,RISAB page 31 security configuration register" bitfld.long 0x7C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" group.long 0x200++0x7F line.long 0x0 "RISAB_PG0_PRIVCFGR,RISAB page 0 default privileged configuration register" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_PRIVCFGR,RISAB page 1 default privileged configuration register" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_PRIVCFGR,RISAB page 2 default privileged configuration register" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_PRIVCFGR,RISAB page 3 default privileged configuration register" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_PRIVCFGR,RISAB page 4 default privileged configuration register" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_PRIVCFGR,RISAB page 5 default privileged configuration register" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_PRIVCFGR,RISAB page 6 default privileged configuration register" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_PRIVCFGR,RISAB page 7 default privileged configuration register" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_PRIVCFGR,RISAB page 8 default privileged configuration register" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_PRIVCFGR,RISAB page 9 default privileged configuration register" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_PRIVCFGR,RISAB page 10 default privileged configuration register" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_PRIVCFGR,RISAB page 11 default privileged configuration register" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_PRIVCFGR,RISAB page 12 default privileged configuration register" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_PRIVCFGR,RISAB page 13 default privileged configuration register" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_PRIVCFGR,RISAB page 14 default privileged configuration register" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_PRIVCFGR,RISAB page 15 default privileged configuration register" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_PRIVCFGR,RISAB page 16 default privileged configuration register" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_PRIVCFGR,RISAB page 17 default privileged configuration register" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_PRIVCFGR,RISAB page 18 default privileged configuration register" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_PRIVCFGR,RISAB page 19 default privileged configuration register" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_PRIVCFGR,RISAB page 20 default privileged configuration register" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_PRIVCFGR,RISAB page 21 default privileged configuration register" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_PRIVCFGR,RISAB page 22 default privileged configuration register" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_PRIVCFGR,RISAB page 23 default privileged configuration register" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_PRIVCFGR,RISAB page 24 default privileged configuration register" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_PRIVCFGR,RISAB page 25 default privileged configuration register" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_PRIVCFGR,RISAB page 26 default privileged configuration register" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_PRIVCFGR,RISAB page 27 default privileged configuration register" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_PRIVCFGR,RISAB page 28 default privileged configuration register" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_PRIVCFGR,RISAB page 29 default privileged configuration register" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_PRIVCFGR,RISAB page 30 default privileged configuration register" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_PRIVCFGR,RISAB page 31 default privileged configuration register" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x600++0x7F line.long 0x0 "RISAB_PG0_C2PRIVCFGR,RISAB page 0 privileged configuration register for compartment 2" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_C2PRIVCFGR,RISAB page 1 privileged configuration register for compartment 2" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_C2PRIVCFGR,RISAB page 2 privileged configuration register for compartment 2" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_C2PRIVCFGR,RISAB page 3 privileged configuration register for compartment 2" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_C2PRIVCFGR,RISAB page 4 privileged configuration register for compartment 2" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_C2PRIVCFGR,RISAB page 5 privileged configuration register for compartment 2" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_C2PRIVCFGR,RISAB page 6 privileged configuration register for compartment 2" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_C2PRIVCFGR,RISAB page 7 privileged configuration register for compartment 2" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_C2PRIVCFGR,RISAB page 8 privileged configuration register for compartment 2" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_C2PRIVCFGR,RISAB page 9 privileged configuration register for compartment 2" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_C2PRIVCFGR,RISAB page 10 privileged configuration register for compartment 2" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_C2PRIVCFGR,RISAB page 11 privileged configuration register for compartment 2" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_C2PRIVCFGR,RISAB page 12 privileged configuration register for compartment 2" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_C2PRIVCFGR,RISAB page 13 privileged configuration register for compartment 2" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_C2PRIVCFGR,RISAB page 14 privileged configuration register for compartment 2" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_C2PRIVCFGR,RISAB page 15 privileged configuration register for compartment 2" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_C2PRIVCFGR,RISAB page 16 privileged configuration register for compartment 2" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_C2PRIVCFGR,RISAB page 17 privileged configuration register for compartment 2" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_C2PRIVCFGR,RISAB page 18 privileged configuration register for compartment 2" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_C2PRIVCFGR,RISAB page 19 privileged configuration register for compartment 2" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_C2PRIVCFGR,RISAB page 20 privileged configuration register for compartment 2" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_C2PRIVCFGR,RISAB page 21 privileged configuration register for compartment 2" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_C2PRIVCFGR,RISAB page 22 privileged configuration register for compartment 2" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_C2PRIVCFGR,RISAB page 23 privileged configuration register for compartment 2" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_C2PRIVCFGR,RISAB page 24 privileged configuration register for compartment 2" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_C2PRIVCFGR,RISAB page 25 privileged configuration register for compartment 2" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_C2PRIVCFGR,RISAB page 26 privileged configuration register for compartment 2" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_C2PRIVCFGR,RISAB page 27 privileged configuration register for compartment 2" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_C2PRIVCFGR,RISAB page 28 privileged configuration register for compartment 2" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_C2PRIVCFGR,RISAB page 29 privileged configuration register for compartment 2" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_C2PRIVCFGR,RISAB page 30 privileged configuration register for compartment 2" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_C2PRIVCFGR,RISAB page 31 privileged configuration register for compartment 2" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x800++0x3 line.long 0x0 "RISAB_CID0PRIVCFGR,RISAB compartment 0 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x808++0x3 line.long 0x0 "RISAB_CID0RDCFGR,RISAB compartment 0 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x810++0x3 line.long 0x0 "RISAB_CID0WRCFGR,RISAB compartment 0 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x820++0x3 line.long 0x0 "RISAB_CID1PRIVCFGR,RISAB compartment 1 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x828++0x3 line.long 0x0 "RISAB_CID1RDCFGR,RISAB compartment 1 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x830++0x3 line.long 0x0 "RISAB_CID1WRCFGR,RISAB compartment 1 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x840++0x3 line.long 0x0 "RISAB_CID2PRIVCFGR,RISAB compartment 2 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x848++0x3 line.long 0x0 "RISAB_CID2RDCFGR,RISAB compartment 2 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x850++0x3 line.long 0x0 "RISAB_CID2WRCFGR,RISAB compartment 2 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x860++0x3 line.long 0x0 "RISAB_CID3PRIVCFGR,RISAB compartment 3 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x868++0x3 line.long 0x0 "RISAB_CID3RDCFGR,RISAB compartment 3 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x870++0x3 line.long 0x0 "RISAB_CID3WRCFGR,RISAB compartment 3 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x880++0x3 line.long 0x0 "RISAB_CID4PRIVCFGR,RISAB compartment 4 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x888++0x3 line.long 0x0 "RISAB_CID4RDCFGR,RISAB compartment 4 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x890++0x3 line.long 0x0 "RISAB_CID4WRCFGR,RISAB compartment 4 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A0++0x3 line.long 0x0 "RISAB_CID5PRIVCFGR,RISAB compartment 5 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A8++0x3 line.long 0x0 "RISAB_CID5RDCFGR,RISAB compartment 5 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8B0++0x3 line.long 0x0 "RISAB_CID5WRCFGR,RISAB compartment 5 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C0++0x3 line.long 0x0 "RISAB_CID6PRIVCFGR,RISAB compartment 6 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C8++0x3 line.long 0x0 "RISAB_CID6RDCFGR,RISAB compartment 6 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8D0++0x3 line.long 0x0 "RISAB_CID6WRCFGR,RISAB compartment 6 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0xA00++0x7F line.long 0x0 "RISAB_PG0_CIDCFGR,RISAB page 0 CID configuration register" bitfld.long 0x0 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_CIDCFGR,RISAB page 1 CID configuration register" bitfld.long 0x4 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_CIDCFGR,RISAB page 2 CID configuration register" bitfld.long 0x8 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_CIDCFGR,RISAB page 3 CID configuration register" bitfld.long 0xC 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_CIDCFGR,RISAB page 4 CID configuration register" bitfld.long 0x10 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_CIDCFGR,RISAB page 5 CID configuration register" bitfld.long 0x14 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_CIDCFGR,RISAB page 6 CID configuration register" bitfld.long 0x18 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_CIDCFGR,RISAB page 7 CID configuration register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_CIDCFGR,RISAB page 8 CID configuration register" bitfld.long 0x20 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_CIDCFGR,RISAB page 9 CID configuration register" bitfld.long 0x24 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_CIDCFGR,RISAB page 10 CID configuration register" bitfld.long 0x28 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_CIDCFGR,RISAB page 11 CID configuration register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_CIDCFGR,RISAB page 12 CID configuration register" bitfld.long 0x30 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_CIDCFGR,RISAB page 13 CID configuration register" bitfld.long 0x34 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x34 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_CIDCFGR,RISAB page 14 CID configuration register" bitfld.long 0x38 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_CIDCFGR,RISAB page 15 CID configuration register" bitfld.long 0x3C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x3C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_CIDCFGR,RISAB page 16 CID configuration register" bitfld.long 0x40 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x40 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_CIDCFGR,RISAB page 17 CID configuration register" bitfld.long 0x44 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x44 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x44 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_CIDCFGR,RISAB page 18 CID configuration register" bitfld.long 0x48 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x48 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_CIDCFGR,RISAB page 19 CID configuration register" bitfld.long 0x4C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_CIDCFGR,RISAB page 20 CID configuration register" bitfld.long 0x50 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x50 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_CIDCFGR,RISAB page 21 CID configuration register" bitfld.long 0x54 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x54 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x54 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_CIDCFGR,RISAB page 22 CID configuration register" bitfld.long 0x58 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x58 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_CIDCFGR,RISAB page 23 CID configuration register" bitfld.long 0x5C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x5C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_CIDCFGR,RISAB page 24 CID configuration register" bitfld.long 0x60 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x60 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_CIDCFGR,RISAB page 25 CID configuration register" bitfld.long 0x64 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x64 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x64 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_CIDCFGR,RISAB page 26 CID configuration register" bitfld.long 0x68 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x68 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_CIDCFGR,RISAB page 27 CID configuration register" bitfld.long 0x6C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x6C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_CIDCFGR,RISAB page 28 CID configuration register" bitfld.long 0x70 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x70 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_CIDCFGR,RISAB page 29 CID configuration register" bitfld.long 0x74 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x74 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x74 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_CIDCFGR,RISAB page 30 CID configuration register" bitfld.long 0x78 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x78 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_CIDCFGR,RISAB page 31 CID configuration register" bitfld.long 0x7C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x7C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" rgroup.long 0xFE8++0x17 line.long 0x0 "RISAB_HWCFGR3,RISAB hardware configuration register 3" hexmask.long 0x0 0.--31. 1. "CFG,Hardware configuration" line.long 0x4 "RISAB_HWCFGR2,RISAB hardware configuration register 2" hexmask.long 0x4 0.--31. 1. "CFG,Hardware configuration" line.long 0x8 "RISAB_HWCFGR1,RISAB hardware configuration register 1" hexmask.long.byte 0x8 24.--27. 1. "CFG7,Hardware configuration 7" hexmask.long.byte 0x8 20.--23. 1. "CFG6,Hardware configuration 6" hexmask.long.byte 0x8 16.--19. 1. "CFG5,Hardware configuration 5" hexmask.long.byte 0x8 12.--15. 1. "CFG4,Hardware configuration 4" hexmask.long.byte 0x8 8.--11. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x8 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x8 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0xC "RISAB_VERR,RISAB version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,RISAB major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,RISAB minor revision" line.long 0x10 "RISAB_IPIDR,RISAB identification register" hexmask.long 0x10 0.--31. 1. "ID,RISAB identification code" line.long 0x14 "RISAB_SIDR,RISAB size identification register" hexmask.long 0x14 0.--31. 1. "SID,RISAB size identification code" tree.end tree "RISAB5_S" base ad:0x52130000 group.long 0x0++0x3 line.long 0x0 "RISAB_CR,RISAB configuration register" bitfld.long 0x0 31. "SRWIAD,Secure read/write illegal access disable" "B_0x0,B_0x1" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "RISAB_IASR,RISAB illegal access status register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAB_IACR,RISAB illegal access clear register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" group.long 0x10++0x3 line.long 0x0 "RISAB_RCFGLOCKR,RISAB configuration lock register" bitfld.long 0x0 31. "RLOCK31,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 30. "RLOCK30,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 29. "RLOCK29,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 28. "RLOCK28,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 27. "RLOCK27,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 26. "RLOCK26,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 25. "RLOCK25,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "RLOCK24,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 23. "RLOCK23,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 22. "RLOCK22,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 21. "RLOCK21,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 20. "RLOCK20,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 19. "RLOCK19,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 18. "RLOCK18,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "RLOCK17,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 16. "RLOCK16,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 15. "RLOCK15,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 14. "RLOCK14,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 13. "RLOCK13,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 12. "RLOCK12,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 11. "RLOCK11,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "RLOCK10,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 9. "RLOCK9,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 8. "RLOCK8,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 7. "RLOCK7,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 6. "RLOCK6,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 5. "RLOCK5,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 4. "RLOCK4,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "RLOCK3,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 2. "RLOCK2,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 1. "RLOCK1,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 0. "RLOCK0,Resource lock for page y" "B_0x0,B_0x1" rgroup.long 0x20++0x7 line.long 0x0 "RISAB_IAESR,RISAB illegal access error status register" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAB_IADDR,RISAB illegal address register" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" group.long 0x100++0x7F line.long 0x0 "RISAB_PG0_SECCFGR,RISAB page 0 security configuration register" bitfld.long 0x0 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_SECCFGR,RISAB page 1 security configuration register" bitfld.long 0x4 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_SECCFGR,RISAB page 2 security configuration register" bitfld.long 0x8 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_SECCFGR,RISAB page 3 security configuration register" bitfld.long 0xC 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_SECCFGR,RISAB page 4 security configuration register" bitfld.long 0x10 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_SECCFGR,RISAB page 5 security configuration register" bitfld.long 0x14 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_SECCFGR,RISAB page 6 security configuration register" bitfld.long 0x18 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_SECCFGR,RISAB page 7 security configuration register" bitfld.long 0x1C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_SECCFGR,RISAB page 8 security configuration register" bitfld.long 0x20 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_SECCFGR,RISAB page 9 security configuration register" bitfld.long 0x24 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_SECCFGR,RISAB page 10 security configuration register" bitfld.long 0x28 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_SECCFGR,RISAB page 11 security configuration register" bitfld.long 0x2C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_SECCFGR,RISAB page 12 security configuration register" bitfld.long 0x30 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_SECCFGR,RISAB page 13 security configuration register" bitfld.long 0x34 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_SECCFGR,RISAB page 14 security configuration register" bitfld.long 0x38 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_SECCFGR,RISAB page 15 security configuration register" bitfld.long 0x3C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_SECCFGR,RISAB page 16 security configuration register" bitfld.long 0x40 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_SECCFGR,RISAB page 17 security configuration register" bitfld.long 0x44 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_SECCFGR,RISAB page 18 security configuration register" bitfld.long 0x48 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_SECCFGR,RISAB page 19 security configuration register" bitfld.long 0x4C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_SECCFGR,RISAB page 20 security configuration register" bitfld.long 0x50 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_SECCFGR,RISAB page 21 security configuration register" bitfld.long 0x54 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_SECCFGR,RISAB page 22 security configuration register" bitfld.long 0x58 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_SECCFGR,RISAB page 23 security configuration register" bitfld.long 0x5C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_SECCFGR,RISAB page 24 security configuration register" bitfld.long 0x60 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_SECCFGR,RISAB page 25 security configuration register" bitfld.long 0x64 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_SECCFGR,RISAB page 26 security configuration register" bitfld.long 0x68 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_SECCFGR,RISAB page 27 security configuration register" bitfld.long 0x6C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_SECCFGR,RISAB page 28 security configuration register" bitfld.long 0x70 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_SECCFGR,RISAB page 29 security configuration register" bitfld.long 0x74 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_SECCFGR,RISAB page 30 security configuration register" bitfld.long 0x78 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_SECCFGR,RISAB page 31 security configuration register" bitfld.long 0x7C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" group.long 0x200++0x7F line.long 0x0 "RISAB_PG0_PRIVCFGR,RISAB page 0 default privileged configuration register" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_PRIVCFGR,RISAB page 1 default privileged configuration register" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_PRIVCFGR,RISAB page 2 default privileged configuration register" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_PRIVCFGR,RISAB page 3 default privileged configuration register" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_PRIVCFGR,RISAB page 4 default privileged configuration register" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_PRIVCFGR,RISAB page 5 default privileged configuration register" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_PRIVCFGR,RISAB page 6 default privileged configuration register" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_PRIVCFGR,RISAB page 7 default privileged configuration register" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_PRIVCFGR,RISAB page 8 default privileged configuration register" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_PRIVCFGR,RISAB page 9 default privileged configuration register" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_PRIVCFGR,RISAB page 10 default privileged configuration register" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_PRIVCFGR,RISAB page 11 default privileged configuration register" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_PRIVCFGR,RISAB page 12 default privileged configuration register" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_PRIVCFGR,RISAB page 13 default privileged configuration register" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_PRIVCFGR,RISAB page 14 default privileged configuration register" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_PRIVCFGR,RISAB page 15 default privileged configuration register" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_PRIVCFGR,RISAB page 16 default privileged configuration register" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_PRIVCFGR,RISAB page 17 default privileged configuration register" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_PRIVCFGR,RISAB page 18 default privileged configuration register" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_PRIVCFGR,RISAB page 19 default privileged configuration register" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_PRIVCFGR,RISAB page 20 default privileged configuration register" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_PRIVCFGR,RISAB page 21 default privileged configuration register" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_PRIVCFGR,RISAB page 22 default privileged configuration register" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_PRIVCFGR,RISAB page 23 default privileged configuration register" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_PRIVCFGR,RISAB page 24 default privileged configuration register" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_PRIVCFGR,RISAB page 25 default privileged configuration register" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_PRIVCFGR,RISAB page 26 default privileged configuration register" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_PRIVCFGR,RISAB page 27 default privileged configuration register" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_PRIVCFGR,RISAB page 28 default privileged configuration register" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_PRIVCFGR,RISAB page 29 default privileged configuration register" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_PRIVCFGR,RISAB page 30 default privileged configuration register" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_PRIVCFGR,RISAB page 31 default privileged configuration register" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x600++0x7F line.long 0x0 "RISAB_PG0_C2PRIVCFGR,RISAB page 0 privileged configuration register for compartment 2" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_C2PRIVCFGR,RISAB page 1 privileged configuration register for compartment 2" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_C2PRIVCFGR,RISAB page 2 privileged configuration register for compartment 2" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_C2PRIVCFGR,RISAB page 3 privileged configuration register for compartment 2" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_C2PRIVCFGR,RISAB page 4 privileged configuration register for compartment 2" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_C2PRIVCFGR,RISAB page 5 privileged configuration register for compartment 2" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_C2PRIVCFGR,RISAB page 6 privileged configuration register for compartment 2" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_C2PRIVCFGR,RISAB page 7 privileged configuration register for compartment 2" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_C2PRIVCFGR,RISAB page 8 privileged configuration register for compartment 2" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_C2PRIVCFGR,RISAB page 9 privileged configuration register for compartment 2" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_C2PRIVCFGR,RISAB page 10 privileged configuration register for compartment 2" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_C2PRIVCFGR,RISAB page 11 privileged configuration register for compartment 2" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_C2PRIVCFGR,RISAB page 12 privileged configuration register for compartment 2" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_C2PRIVCFGR,RISAB page 13 privileged configuration register for compartment 2" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_C2PRIVCFGR,RISAB page 14 privileged configuration register for compartment 2" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_C2PRIVCFGR,RISAB page 15 privileged configuration register for compartment 2" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_C2PRIVCFGR,RISAB page 16 privileged configuration register for compartment 2" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_C2PRIVCFGR,RISAB page 17 privileged configuration register for compartment 2" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_C2PRIVCFGR,RISAB page 18 privileged configuration register for compartment 2" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_C2PRIVCFGR,RISAB page 19 privileged configuration register for compartment 2" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_C2PRIVCFGR,RISAB page 20 privileged configuration register for compartment 2" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_C2PRIVCFGR,RISAB page 21 privileged configuration register for compartment 2" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_C2PRIVCFGR,RISAB page 22 privileged configuration register for compartment 2" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_C2PRIVCFGR,RISAB page 23 privileged configuration register for compartment 2" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_C2PRIVCFGR,RISAB page 24 privileged configuration register for compartment 2" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_C2PRIVCFGR,RISAB page 25 privileged configuration register for compartment 2" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_C2PRIVCFGR,RISAB page 26 privileged configuration register for compartment 2" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_C2PRIVCFGR,RISAB page 27 privileged configuration register for compartment 2" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_C2PRIVCFGR,RISAB page 28 privileged configuration register for compartment 2" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_C2PRIVCFGR,RISAB page 29 privileged configuration register for compartment 2" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_C2PRIVCFGR,RISAB page 30 privileged configuration register for compartment 2" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_C2PRIVCFGR,RISAB page 31 privileged configuration register for compartment 2" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x800++0x3 line.long 0x0 "RISAB_CID0PRIVCFGR,RISAB compartment 0 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x808++0x3 line.long 0x0 "RISAB_CID0RDCFGR,RISAB compartment 0 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x810++0x3 line.long 0x0 "RISAB_CID0WRCFGR,RISAB compartment 0 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x820++0x3 line.long 0x0 "RISAB_CID1PRIVCFGR,RISAB compartment 1 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x828++0x3 line.long 0x0 "RISAB_CID1RDCFGR,RISAB compartment 1 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x830++0x3 line.long 0x0 "RISAB_CID1WRCFGR,RISAB compartment 1 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x840++0x3 line.long 0x0 "RISAB_CID2PRIVCFGR,RISAB compartment 2 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x848++0x3 line.long 0x0 "RISAB_CID2RDCFGR,RISAB compartment 2 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x850++0x3 line.long 0x0 "RISAB_CID2WRCFGR,RISAB compartment 2 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x860++0x3 line.long 0x0 "RISAB_CID3PRIVCFGR,RISAB compartment 3 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x868++0x3 line.long 0x0 "RISAB_CID3RDCFGR,RISAB compartment 3 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x870++0x3 line.long 0x0 "RISAB_CID3WRCFGR,RISAB compartment 3 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x880++0x3 line.long 0x0 "RISAB_CID4PRIVCFGR,RISAB compartment 4 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x888++0x3 line.long 0x0 "RISAB_CID4RDCFGR,RISAB compartment 4 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x890++0x3 line.long 0x0 "RISAB_CID4WRCFGR,RISAB compartment 4 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A0++0x3 line.long 0x0 "RISAB_CID5PRIVCFGR,RISAB compartment 5 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A8++0x3 line.long 0x0 "RISAB_CID5RDCFGR,RISAB compartment 5 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8B0++0x3 line.long 0x0 "RISAB_CID5WRCFGR,RISAB compartment 5 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C0++0x3 line.long 0x0 "RISAB_CID6PRIVCFGR,RISAB compartment 6 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C8++0x3 line.long 0x0 "RISAB_CID6RDCFGR,RISAB compartment 6 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8D0++0x3 line.long 0x0 "RISAB_CID6WRCFGR,RISAB compartment 6 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0xA00++0x7F line.long 0x0 "RISAB_PG0_CIDCFGR,RISAB page 0 CID configuration register" bitfld.long 0x0 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_CIDCFGR,RISAB page 1 CID configuration register" bitfld.long 0x4 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_CIDCFGR,RISAB page 2 CID configuration register" bitfld.long 0x8 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_CIDCFGR,RISAB page 3 CID configuration register" bitfld.long 0xC 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_CIDCFGR,RISAB page 4 CID configuration register" bitfld.long 0x10 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_CIDCFGR,RISAB page 5 CID configuration register" bitfld.long 0x14 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_CIDCFGR,RISAB page 6 CID configuration register" bitfld.long 0x18 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_CIDCFGR,RISAB page 7 CID configuration register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_CIDCFGR,RISAB page 8 CID configuration register" bitfld.long 0x20 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_CIDCFGR,RISAB page 9 CID configuration register" bitfld.long 0x24 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_CIDCFGR,RISAB page 10 CID configuration register" bitfld.long 0x28 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_CIDCFGR,RISAB page 11 CID configuration register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_CIDCFGR,RISAB page 12 CID configuration register" bitfld.long 0x30 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_CIDCFGR,RISAB page 13 CID configuration register" bitfld.long 0x34 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x34 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_CIDCFGR,RISAB page 14 CID configuration register" bitfld.long 0x38 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_CIDCFGR,RISAB page 15 CID configuration register" bitfld.long 0x3C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x3C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_CIDCFGR,RISAB page 16 CID configuration register" bitfld.long 0x40 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x40 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_CIDCFGR,RISAB page 17 CID configuration register" bitfld.long 0x44 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x44 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x44 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_CIDCFGR,RISAB page 18 CID configuration register" bitfld.long 0x48 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x48 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_CIDCFGR,RISAB page 19 CID configuration register" bitfld.long 0x4C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_CIDCFGR,RISAB page 20 CID configuration register" bitfld.long 0x50 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x50 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_CIDCFGR,RISAB page 21 CID configuration register" bitfld.long 0x54 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x54 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x54 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_CIDCFGR,RISAB page 22 CID configuration register" bitfld.long 0x58 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x58 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_CIDCFGR,RISAB page 23 CID configuration register" bitfld.long 0x5C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x5C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_CIDCFGR,RISAB page 24 CID configuration register" bitfld.long 0x60 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x60 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_CIDCFGR,RISAB page 25 CID configuration register" bitfld.long 0x64 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x64 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x64 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_CIDCFGR,RISAB page 26 CID configuration register" bitfld.long 0x68 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x68 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_CIDCFGR,RISAB page 27 CID configuration register" bitfld.long 0x6C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x6C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_CIDCFGR,RISAB page 28 CID configuration register" bitfld.long 0x70 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x70 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_CIDCFGR,RISAB page 29 CID configuration register" bitfld.long 0x74 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x74 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x74 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_CIDCFGR,RISAB page 30 CID configuration register" bitfld.long 0x78 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x78 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_CIDCFGR,RISAB page 31 CID configuration register" bitfld.long 0x7C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x7C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" rgroup.long 0xFE8++0x17 line.long 0x0 "RISAB_HWCFGR3,RISAB hardware configuration register 3" hexmask.long 0x0 0.--31. 1. "CFG,Hardware configuration" line.long 0x4 "RISAB_HWCFGR2,RISAB hardware configuration register 2" hexmask.long 0x4 0.--31. 1. "CFG,Hardware configuration" line.long 0x8 "RISAB_HWCFGR1,RISAB hardware configuration register 1" hexmask.long.byte 0x8 24.--27. 1. "CFG7,Hardware configuration 7" hexmask.long.byte 0x8 20.--23. 1. "CFG6,Hardware configuration 6" hexmask.long.byte 0x8 16.--19. 1. "CFG5,Hardware configuration 5" hexmask.long.byte 0x8 12.--15. 1. "CFG4,Hardware configuration 4" hexmask.long.byte 0x8 8.--11. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x8 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x8 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0xC "RISAB_VERR,RISAB version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,RISAB major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,RISAB minor revision" line.long 0x10 "RISAB_IPIDR,RISAB identification register" hexmask.long 0x10 0.--31. 1. "ID,RISAB identification code" line.long 0x14 "RISAB_SIDR,RISAB size identification register" hexmask.long 0x14 0.--31. 1. "SID,RISAB size identification code" tree.end tree "RISAB6" base ad:0x42140000 group.long 0x0++0x3 line.long 0x0 "RISAB_CR,RISAB configuration register" bitfld.long 0x0 31. "SRWIAD,Secure read/write illegal access disable" "B_0x0,B_0x1" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "RISAB_IASR,RISAB illegal access status register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAB_IACR,RISAB illegal access clear register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" group.long 0x10++0x3 line.long 0x0 "RISAB_RCFGLOCKR,RISAB configuration lock register" bitfld.long 0x0 31. "RLOCK31,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 30. "RLOCK30,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 29. "RLOCK29,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 28. "RLOCK28,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 27. "RLOCK27,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 26. "RLOCK26,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 25. "RLOCK25,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "RLOCK24,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 23. "RLOCK23,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 22. "RLOCK22,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 21. "RLOCK21,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 20. "RLOCK20,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 19. "RLOCK19,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 18. "RLOCK18,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "RLOCK17,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 16. "RLOCK16,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 15. "RLOCK15,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 14. "RLOCK14,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 13. "RLOCK13,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 12. "RLOCK12,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 11. "RLOCK11,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "RLOCK10,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 9. "RLOCK9,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 8. "RLOCK8,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 7. "RLOCK7,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 6. "RLOCK6,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 5. "RLOCK5,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 4. "RLOCK4,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "RLOCK3,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 2. "RLOCK2,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 1. "RLOCK1,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 0. "RLOCK0,Resource lock for page y" "B_0x0,B_0x1" rgroup.long 0x20++0x7 line.long 0x0 "RISAB_IAESR,RISAB illegal access error status register" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAB_IADDR,RISAB illegal address register" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" group.long 0x100++0x7F line.long 0x0 "RISAB_PG0_SECCFGR,RISAB page 0 security configuration register" bitfld.long 0x0 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_SECCFGR,RISAB page 1 security configuration register" bitfld.long 0x4 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_SECCFGR,RISAB page 2 security configuration register" bitfld.long 0x8 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_SECCFGR,RISAB page 3 security configuration register" bitfld.long 0xC 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_SECCFGR,RISAB page 4 security configuration register" bitfld.long 0x10 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_SECCFGR,RISAB page 5 security configuration register" bitfld.long 0x14 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_SECCFGR,RISAB page 6 security configuration register" bitfld.long 0x18 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_SECCFGR,RISAB page 7 security configuration register" bitfld.long 0x1C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_SECCFGR,RISAB page 8 security configuration register" bitfld.long 0x20 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_SECCFGR,RISAB page 9 security configuration register" bitfld.long 0x24 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_SECCFGR,RISAB page 10 security configuration register" bitfld.long 0x28 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_SECCFGR,RISAB page 11 security configuration register" bitfld.long 0x2C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_SECCFGR,RISAB page 12 security configuration register" bitfld.long 0x30 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_SECCFGR,RISAB page 13 security configuration register" bitfld.long 0x34 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_SECCFGR,RISAB page 14 security configuration register" bitfld.long 0x38 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_SECCFGR,RISAB page 15 security configuration register" bitfld.long 0x3C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_SECCFGR,RISAB page 16 security configuration register" bitfld.long 0x40 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_SECCFGR,RISAB page 17 security configuration register" bitfld.long 0x44 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_SECCFGR,RISAB page 18 security configuration register" bitfld.long 0x48 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_SECCFGR,RISAB page 19 security configuration register" bitfld.long 0x4C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_SECCFGR,RISAB page 20 security configuration register" bitfld.long 0x50 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_SECCFGR,RISAB page 21 security configuration register" bitfld.long 0x54 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_SECCFGR,RISAB page 22 security configuration register" bitfld.long 0x58 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_SECCFGR,RISAB page 23 security configuration register" bitfld.long 0x5C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_SECCFGR,RISAB page 24 security configuration register" bitfld.long 0x60 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_SECCFGR,RISAB page 25 security configuration register" bitfld.long 0x64 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_SECCFGR,RISAB page 26 security configuration register" bitfld.long 0x68 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_SECCFGR,RISAB page 27 security configuration register" bitfld.long 0x6C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_SECCFGR,RISAB page 28 security configuration register" bitfld.long 0x70 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_SECCFGR,RISAB page 29 security configuration register" bitfld.long 0x74 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_SECCFGR,RISAB page 30 security configuration register" bitfld.long 0x78 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_SECCFGR,RISAB page 31 security configuration register" bitfld.long 0x7C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" group.long 0x200++0x7F line.long 0x0 "RISAB_PG0_PRIVCFGR,RISAB page 0 default privileged configuration register" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_PRIVCFGR,RISAB page 1 default privileged configuration register" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_PRIVCFGR,RISAB page 2 default privileged configuration register" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_PRIVCFGR,RISAB page 3 default privileged configuration register" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_PRIVCFGR,RISAB page 4 default privileged configuration register" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_PRIVCFGR,RISAB page 5 default privileged configuration register" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_PRIVCFGR,RISAB page 6 default privileged configuration register" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_PRIVCFGR,RISAB page 7 default privileged configuration register" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_PRIVCFGR,RISAB page 8 default privileged configuration register" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_PRIVCFGR,RISAB page 9 default privileged configuration register" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_PRIVCFGR,RISAB page 10 default privileged configuration register" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_PRIVCFGR,RISAB page 11 default privileged configuration register" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_PRIVCFGR,RISAB page 12 default privileged configuration register" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_PRIVCFGR,RISAB page 13 default privileged configuration register" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_PRIVCFGR,RISAB page 14 default privileged configuration register" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_PRIVCFGR,RISAB page 15 default privileged configuration register" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_PRIVCFGR,RISAB page 16 default privileged configuration register" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_PRIVCFGR,RISAB page 17 default privileged configuration register" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_PRIVCFGR,RISAB page 18 default privileged configuration register" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_PRIVCFGR,RISAB page 19 default privileged configuration register" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_PRIVCFGR,RISAB page 20 default privileged configuration register" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_PRIVCFGR,RISAB page 21 default privileged configuration register" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_PRIVCFGR,RISAB page 22 default privileged configuration register" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_PRIVCFGR,RISAB page 23 default privileged configuration register" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_PRIVCFGR,RISAB page 24 default privileged configuration register" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_PRIVCFGR,RISAB page 25 default privileged configuration register" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_PRIVCFGR,RISAB page 26 default privileged configuration register" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_PRIVCFGR,RISAB page 27 default privileged configuration register" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_PRIVCFGR,RISAB page 28 default privileged configuration register" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_PRIVCFGR,RISAB page 29 default privileged configuration register" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_PRIVCFGR,RISAB page 30 default privileged configuration register" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_PRIVCFGR,RISAB page 31 default privileged configuration register" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x600++0x7F line.long 0x0 "RISAB_PG0_C2PRIVCFGR,RISAB page 0 privileged configuration register for compartment 2" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_C2PRIVCFGR,RISAB page 1 privileged configuration register for compartment 2" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_C2PRIVCFGR,RISAB page 2 privileged configuration register for compartment 2" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_C2PRIVCFGR,RISAB page 3 privileged configuration register for compartment 2" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_C2PRIVCFGR,RISAB page 4 privileged configuration register for compartment 2" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_C2PRIVCFGR,RISAB page 5 privileged configuration register for compartment 2" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_C2PRIVCFGR,RISAB page 6 privileged configuration register for compartment 2" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_C2PRIVCFGR,RISAB page 7 privileged configuration register for compartment 2" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_C2PRIVCFGR,RISAB page 8 privileged configuration register for compartment 2" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_C2PRIVCFGR,RISAB page 9 privileged configuration register for compartment 2" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_C2PRIVCFGR,RISAB page 10 privileged configuration register for compartment 2" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_C2PRIVCFGR,RISAB page 11 privileged configuration register for compartment 2" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_C2PRIVCFGR,RISAB page 12 privileged configuration register for compartment 2" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_C2PRIVCFGR,RISAB page 13 privileged configuration register for compartment 2" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_C2PRIVCFGR,RISAB page 14 privileged configuration register for compartment 2" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_C2PRIVCFGR,RISAB page 15 privileged configuration register for compartment 2" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_C2PRIVCFGR,RISAB page 16 privileged configuration register for compartment 2" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_C2PRIVCFGR,RISAB page 17 privileged configuration register for compartment 2" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_C2PRIVCFGR,RISAB page 18 privileged configuration register for compartment 2" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_C2PRIVCFGR,RISAB page 19 privileged configuration register for compartment 2" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_C2PRIVCFGR,RISAB page 20 privileged configuration register for compartment 2" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_C2PRIVCFGR,RISAB page 21 privileged configuration register for compartment 2" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_C2PRIVCFGR,RISAB page 22 privileged configuration register for compartment 2" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_C2PRIVCFGR,RISAB page 23 privileged configuration register for compartment 2" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_C2PRIVCFGR,RISAB page 24 privileged configuration register for compartment 2" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_C2PRIVCFGR,RISAB page 25 privileged configuration register for compartment 2" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_C2PRIVCFGR,RISAB page 26 privileged configuration register for compartment 2" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_C2PRIVCFGR,RISAB page 27 privileged configuration register for compartment 2" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_C2PRIVCFGR,RISAB page 28 privileged configuration register for compartment 2" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_C2PRIVCFGR,RISAB page 29 privileged configuration register for compartment 2" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_C2PRIVCFGR,RISAB page 30 privileged configuration register for compartment 2" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_C2PRIVCFGR,RISAB page 31 privileged configuration register for compartment 2" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x800++0x3 line.long 0x0 "RISAB_CID0PRIVCFGR,RISAB compartment 0 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x808++0x3 line.long 0x0 "RISAB_CID0RDCFGR,RISAB compartment 0 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x810++0x3 line.long 0x0 "RISAB_CID0WRCFGR,RISAB compartment 0 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x820++0x3 line.long 0x0 "RISAB_CID1PRIVCFGR,RISAB compartment 1 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x828++0x3 line.long 0x0 "RISAB_CID1RDCFGR,RISAB compartment 1 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x830++0x3 line.long 0x0 "RISAB_CID1WRCFGR,RISAB compartment 1 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x840++0x3 line.long 0x0 "RISAB_CID2PRIVCFGR,RISAB compartment 2 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x848++0x3 line.long 0x0 "RISAB_CID2RDCFGR,RISAB compartment 2 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x850++0x3 line.long 0x0 "RISAB_CID2WRCFGR,RISAB compartment 2 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x860++0x3 line.long 0x0 "RISAB_CID3PRIVCFGR,RISAB compartment 3 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x868++0x3 line.long 0x0 "RISAB_CID3RDCFGR,RISAB compartment 3 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x870++0x3 line.long 0x0 "RISAB_CID3WRCFGR,RISAB compartment 3 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x880++0x3 line.long 0x0 "RISAB_CID4PRIVCFGR,RISAB compartment 4 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x888++0x3 line.long 0x0 "RISAB_CID4RDCFGR,RISAB compartment 4 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x890++0x3 line.long 0x0 "RISAB_CID4WRCFGR,RISAB compartment 4 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A0++0x3 line.long 0x0 "RISAB_CID5PRIVCFGR,RISAB compartment 5 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A8++0x3 line.long 0x0 "RISAB_CID5RDCFGR,RISAB compartment 5 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8B0++0x3 line.long 0x0 "RISAB_CID5WRCFGR,RISAB compartment 5 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C0++0x3 line.long 0x0 "RISAB_CID6PRIVCFGR,RISAB compartment 6 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C8++0x3 line.long 0x0 "RISAB_CID6RDCFGR,RISAB compartment 6 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8D0++0x3 line.long 0x0 "RISAB_CID6WRCFGR,RISAB compartment 6 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0xA00++0x7F line.long 0x0 "RISAB_PG0_CIDCFGR,RISAB page 0 CID configuration register" bitfld.long 0x0 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_CIDCFGR,RISAB page 1 CID configuration register" bitfld.long 0x4 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_CIDCFGR,RISAB page 2 CID configuration register" bitfld.long 0x8 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_CIDCFGR,RISAB page 3 CID configuration register" bitfld.long 0xC 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_CIDCFGR,RISAB page 4 CID configuration register" bitfld.long 0x10 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_CIDCFGR,RISAB page 5 CID configuration register" bitfld.long 0x14 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_CIDCFGR,RISAB page 6 CID configuration register" bitfld.long 0x18 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_CIDCFGR,RISAB page 7 CID configuration register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_CIDCFGR,RISAB page 8 CID configuration register" bitfld.long 0x20 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_CIDCFGR,RISAB page 9 CID configuration register" bitfld.long 0x24 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_CIDCFGR,RISAB page 10 CID configuration register" bitfld.long 0x28 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_CIDCFGR,RISAB page 11 CID configuration register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_CIDCFGR,RISAB page 12 CID configuration register" bitfld.long 0x30 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_CIDCFGR,RISAB page 13 CID configuration register" bitfld.long 0x34 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x34 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_CIDCFGR,RISAB page 14 CID configuration register" bitfld.long 0x38 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_CIDCFGR,RISAB page 15 CID configuration register" bitfld.long 0x3C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x3C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_CIDCFGR,RISAB page 16 CID configuration register" bitfld.long 0x40 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x40 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_CIDCFGR,RISAB page 17 CID configuration register" bitfld.long 0x44 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x44 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x44 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_CIDCFGR,RISAB page 18 CID configuration register" bitfld.long 0x48 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x48 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_CIDCFGR,RISAB page 19 CID configuration register" bitfld.long 0x4C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_CIDCFGR,RISAB page 20 CID configuration register" bitfld.long 0x50 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x50 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_CIDCFGR,RISAB page 21 CID configuration register" bitfld.long 0x54 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x54 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x54 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_CIDCFGR,RISAB page 22 CID configuration register" bitfld.long 0x58 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x58 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_CIDCFGR,RISAB page 23 CID configuration register" bitfld.long 0x5C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x5C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_CIDCFGR,RISAB page 24 CID configuration register" bitfld.long 0x60 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x60 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_CIDCFGR,RISAB page 25 CID configuration register" bitfld.long 0x64 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x64 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x64 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_CIDCFGR,RISAB page 26 CID configuration register" bitfld.long 0x68 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x68 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_CIDCFGR,RISAB page 27 CID configuration register" bitfld.long 0x6C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x6C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_CIDCFGR,RISAB page 28 CID configuration register" bitfld.long 0x70 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x70 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_CIDCFGR,RISAB page 29 CID configuration register" bitfld.long 0x74 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x74 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x74 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_CIDCFGR,RISAB page 30 CID configuration register" bitfld.long 0x78 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x78 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_CIDCFGR,RISAB page 31 CID configuration register" bitfld.long 0x7C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x7C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" rgroup.long 0xFE8++0x17 line.long 0x0 "RISAB_HWCFGR3,RISAB hardware configuration register 3" hexmask.long 0x0 0.--31. 1. "CFG,Hardware configuration" line.long 0x4 "RISAB_HWCFGR2,RISAB hardware configuration register 2" hexmask.long 0x4 0.--31. 1. "CFG,Hardware configuration" line.long 0x8 "RISAB_HWCFGR1,RISAB hardware configuration register 1" hexmask.long.byte 0x8 24.--27. 1. "CFG7,Hardware configuration 7" hexmask.long.byte 0x8 20.--23. 1. "CFG6,Hardware configuration 6" hexmask.long.byte 0x8 16.--19. 1. "CFG5,Hardware configuration 5" hexmask.long.byte 0x8 12.--15. 1. "CFG4,Hardware configuration 4" hexmask.long.byte 0x8 8.--11. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x8 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x8 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0xC "RISAB_VERR,RISAB version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,RISAB major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,RISAB minor revision" line.long 0x10 "RISAB_IPIDR,RISAB identification register" hexmask.long 0x10 0.--31. 1. "ID,RISAB identification code" line.long 0x14 "RISAB_SIDR,RISAB size identification register" hexmask.long 0x14 0.--31. 1. "SID,RISAB size identification code" tree.end tree "RISAB6_S" base ad:0x52140000 group.long 0x0++0x3 line.long 0x0 "RISAB_CR,RISAB configuration register" bitfld.long 0x0 31. "SRWIAD,Secure read/write illegal access disable" "B_0x0,B_0x1" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "RISAB_IASR,RISAB illegal access status register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAB_IACR,RISAB illegal access clear register" bitfld.long 0x0 1. "IAEF,Illegal access error flag" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" group.long 0x10++0x3 line.long 0x0 "RISAB_RCFGLOCKR,RISAB configuration lock register" bitfld.long 0x0 31. "RLOCK31,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 30. "RLOCK30,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 29. "RLOCK29,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 28. "RLOCK28,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 27. "RLOCK27,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 26. "RLOCK26,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 25. "RLOCK25,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "RLOCK24,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 23. "RLOCK23,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 22. "RLOCK22,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 21. "RLOCK21,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 20. "RLOCK20,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 19. "RLOCK19,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 18. "RLOCK18,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "RLOCK17,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 16. "RLOCK16,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 15. "RLOCK15,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 14. "RLOCK14,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 13. "RLOCK13,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 12. "RLOCK12,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 11. "RLOCK11,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "RLOCK10,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 9. "RLOCK9,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 8. "RLOCK8,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 7. "RLOCK7,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 6. "RLOCK6,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 5. "RLOCK5,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 4. "RLOCK4,Resource lock for page y" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "RLOCK3,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 2. "RLOCK2,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 1. "RLOCK1,Resource lock for page y" "B_0x0,B_0x1" bitfld.long 0x0 0. "RLOCK0,Resource lock for page y" "B_0x0,B_0x1" rgroup.long 0x20++0x7 line.long 0x0 "RISAB_IAESR,RISAB illegal access error status register" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAB_IADDR,RISAB illegal address register" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" group.long 0x100++0x7F line.long 0x0 "RISAB_PG0_SECCFGR,RISAB page 0 security configuration register" bitfld.long 0x0 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_SECCFGR,RISAB page 1 security configuration register" bitfld.long 0x4 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_SECCFGR,RISAB page 2 security configuration register" bitfld.long 0x8 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_SECCFGR,RISAB page 3 security configuration register" bitfld.long 0xC 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_SECCFGR,RISAB page 4 security configuration register" bitfld.long 0x10 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_SECCFGR,RISAB page 5 security configuration register" bitfld.long 0x14 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_SECCFGR,RISAB page 6 security configuration register" bitfld.long 0x18 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_SECCFGR,RISAB page 7 security configuration register" bitfld.long 0x1C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_SECCFGR,RISAB page 8 security configuration register" bitfld.long 0x20 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_SECCFGR,RISAB page 9 security configuration register" bitfld.long 0x24 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_SECCFGR,RISAB page 10 security configuration register" bitfld.long 0x28 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_SECCFGR,RISAB page 11 security configuration register" bitfld.long 0x2C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_SECCFGR,RISAB page 12 security configuration register" bitfld.long 0x30 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_SECCFGR,RISAB page 13 security configuration register" bitfld.long 0x34 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_SECCFGR,RISAB page 14 security configuration register" bitfld.long 0x38 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_SECCFGR,RISAB page 15 security configuration register" bitfld.long 0x3C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_SECCFGR,RISAB page 16 security configuration register" bitfld.long 0x40 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_SECCFGR,RISAB page 17 security configuration register" bitfld.long 0x44 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_SECCFGR,RISAB page 18 security configuration register" bitfld.long 0x48 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_SECCFGR,RISAB page 19 security configuration register" bitfld.long 0x4C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_SECCFGR,RISAB page 20 security configuration register" bitfld.long 0x50 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_SECCFGR,RISAB page 21 security configuration register" bitfld.long 0x54 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_SECCFGR,RISAB page 22 security configuration register" bitfld.long 0x58 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_SECCFGR,RISAB page 23 security configuration register" bitfld.long 0x5C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_SECCFGR,RISAB page 24 security configuration register" bitfld.long 0x60 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_SECCFGR,RISAB page 25 security configuration register" bitfld.long 0x64 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_SECCFGR,RISAB page 26 security configuration register" bitfld.long 0x68 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_SECCFGR,RISAB page 27 security configuration register" bitfld.long 0x6C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_SECCFGR,RISAB page 28 security configuration register" bitfld.long 0x70 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_SECCFGR,RISAB page 29 security configuration register" bitfld.long 0x74 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_SECCFGR,RISAB page 30 security configuration register" bitfld.long 0x78 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_SECCFGR,RISAB page 31 security configuration register" bitfld.long 0x7C 7. "SEC7,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "SEC6,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "SEC5,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "SEC4,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "SEC3,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "SEC2,Security configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "SEC1,Security configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "SEC0,Security configuration for block z" "B_0x0,B_0x1" group.long 0x200++0x7F line.long 0x0 "RISAB_PG0_PRIVCFGR,RISAB page 0 default privileged configuration register" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_PRIVCFGR,RISAB page 1 default privileged configuration register" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_PRIVCFGR,RISAB page 2 default privileged configuration register" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_PRIVCFGR,RISAB page 3 default privileged configuration register" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_PRIVCFGR,RISAB page 4 default privileged configuration register" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_PRIVCFGR,RISAB page 5 default privileged configuration register" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_PRIVCFGR,RISAB page 6 default privileged configuration register" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_PRIVCFGR,RISAB page 7 default privileged configuration register" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_PRIVCFGR,RISAB page 8 default privileged configuration register" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_PRIVCFGR,RISAB page 9 default privileged configuration register" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_PRIVCFGR,RISAB page 10 default privileged configuration register" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_PRIVCFGR,RISAB page 11 default privileged configuration register" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_PRIVCFGR,RISAB page 12 default privileged configuration register" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_PRIVCFGR,RISAB page 13 default privileged configuration register" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_PRIVCFGR,RISAB page 14 default privileged configuration register" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_PRIVCFGR,RISAB page 15 default privileged configuration register" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_PRIVCFGR,RISAB page 16 default privileged configuration register" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_PRIVCFGR,RISAB page 17 default privileged configuration register" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_PRIVCFGR,RISAB page 18 default privileged configuration register" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_PRIVCFGR,RISAB page 19 default privileged configuration register" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_PRIVCFGR,RISAB page 20 default privileged configuration register" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_PRIVCFGR,RISAB page 21 default privileged configuration register" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_PRIVCFGR,RISAB page 22 default privileged configuration register" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_PRIVCFGR,RISAB page 23 default privileged configuration register" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_PRIVCFGR,RISAB page 24 default privileged configuration register" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_PRIVCFGR,RISAB page 25 default privileged configuration register" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_PRIVCFGR,RISAB page 26 default privileged configuration register" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_PRIVCFGR,RISAB page 27 default privileged configuration register" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_PRIVCFGR,RISAB page 28 default privileged configuration register" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_PRIVCFGR,RISAB page 29 default privileged configuration register" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_PRIVCFGR,RISAB page 30 default privileged configuration register" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_PRIVCFGR,RISAB page 31 default privileged configuration register" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x600++0x7F line.long 0x0 "RISAB_PG0_C2PRIVCFGR,RISAB page 0 privileged configuration register for compartment 2" bitfld.long 0x0 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_C2PRIVCFGR,RISAB page 1 privileged configuration register for compartment 2" bitfld.long 0x4 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_C2PRIVCFGR,RISAB page 2 privileged configuration register for compartment 2" bitfld.long 0x8 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x8 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_C2PRIVCFGR,RISAB page 3 privileged configuration register for compartment 2" bitfld.long 0xC 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0xC 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0xC 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_C2PRIVCFGR,RISAB page 4 privileged configuration register for compartment 2" bitfld.long 0x10 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x10 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_C2PRIVCFGR,RISAB page 5 privileged configuration register for compartment 2" bitfld.long 0x14 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x14 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_C2PRIVCFGR,RISAB page 6 privileged configuration register for compartment 2" bitfld.long 0x18 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x18 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x18 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_C2PRIVCFGR,RISAB page 7 privileged configuration register for compartment 2" bitfld.long 0x1C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x1C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x1C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_C2PRIVCFGR,RISAB page 8 privileged configuration register for compartment 2" bitfld.long 0x20 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x20 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_C2PRIVCFGR,RISAB page 9 privileged configuration register for compartment 2" bitfld.long 0x24 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x24 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x24 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_C2PRIVCFGR,RISAB page 10 privileged configuration register for compartment 2" bitfld.long 0x28 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x28 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x28 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_C2PRIVCFGR,RISAB page 11 privileged configuration register for compartment 2" bitfld.long 0x2C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x2C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x2C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_C2PRIVCFGR,RISAB page 12 privileged configuration register for compartment 2" bitfld.long 0x30 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x30 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x30 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_C2PRIVCFGR,RISAB page 13 privileged configuration register for compartment 2" bitfld.long 0x34 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x34 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x34 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_C2PRIVCFGR,RISAB page 14 privileged configuration register for compartment 2" bitfld.long 0x38 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x38 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x38 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_C2PRIVCFGR,RISAB page 15 privileged configuration register for compartment 2" bitfld.long 0x3C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x3C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x3C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_C2PRIVCFGR,RISAB page 16 privileged configuration register for compartment 2" bitfld.long 0x40 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x40 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x40 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_C2PRIVCFGR,RISAB page 17 privileged configuration register for compartment 2" bitfld.long 0x44 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x44 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x44 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_C2PRIVCFGR,RISAB page 18 privileged configuration register for compartment 2" bitfld.long 0x48 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x48 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x48 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_C2PRIVCFGR,RISAB page 19 privileged configuration register for compartment 2" bitfld.long 0x4C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x4C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x4C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_C2PRIVCFGR,RISAB page 20 privileged configuration register for compartment 2" bitfld.long 0x50 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x50 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x50 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_C2PRIVCFGR,RISAB page 21 privileged configuration register for compartment 2" bitfld.long 0x54 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x54 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x54 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_C2PRIVCFGR,RISAB page 22 privileged configuration register for compartment 2" bitfld.long 0x58 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x58 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x58 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_C2PRIVCFGR,RISAB page 23 privileged configuration register for compartment 2" bitfld.long 0x5C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x5C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x5C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_C2PRIVCFGR,RISAB page 24 privileged configuration register for compartment 2" bitfld.long 0x60 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x60 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x60 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_C2PRIVCFGR,RISAB page 25 privileged configuration register for compartment 2" bitfld.long 0x64 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x64 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x64 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_C2PRIVCFGR,RISAB page 26 privileged configuration register for compartment 2" bitfld.long 0x68 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x68 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x68 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_C2PRIVCFGR,RISAB page 27 privileged configuration register for compartment 2" bitfld.long 0x6C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x6C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x6C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_C2PRIVCFGR,RISAB page 28 privileged configuration register for compartment 2" bitfld.long 0x70 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x70 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x70 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_C2PRIVCFGR,RISAB page 29 privileged configuration register for compartment 2" bitfld.long 0x74 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x74 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x74 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_C2PRIVCFGR,RISAB page 30 privileged configuration register for compartment 2" bitfld.long 0x78 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x78 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x78 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_C2PRIVCFGR,RISAB page 31 privileged configuration register for compartment 2" bitfld.long 0x7C 7. "PRIV7,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 6. "PRIV6,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 5. "PRIV5,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 4. "PRIV4,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 3. "PRIV3,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 2. "PRIV2,Privileged configuration for block z" "B_0x0,B_0x1" bitfld.long 0x7C 1. "PRIV1,Privileged configuration for block z" "B_0x0,B_0x1" newline bitfld.long 0x7C 0. "PRIV0,Privileged configuration for block z" "B_0x0,B_0x1" group.long 0x800++0x3 line.long 0x0 "RISAB_CID0PRIVCFGR,RISAB compartment 0 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x808++0x3 line.long 0x0 "RISAB_CID0RDCFGR,RISAB compartment 0 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x810++0x3 line.long 0x0 "RISAB_CID0WRCFGR,RISAB compartment 0 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x820++0x3 line.long 0x0 "RISAB_CID1PRIVCFGR,RISAB compartment 1 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x828++0x3 line.long 0x0 "RISAB_CID1RDCFGR,RISAB compartment 1 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x830++0x3 line.long 0x0 "RISAB_CID1WRCFGR,RISAB compartment 1 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x840++0x3 line.long 0x0 "RISAB_CID2PRIVCFGR,RISAB compartment 2 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x848++0x3 line.long 0x0 "RISAB_CID2RDCFGR,RISAB compartment 2 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x850++0x3 line.long 0x0 "RISAB_CID2WRCFGR,RISAB compartment 2 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x860++0x3 line.long 0x0 "RISAB_CID3PRIVCFGR,RISAB compartment 3 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x868++0x3 line.long 0x0 "RISAB_CID3RDCFGR,RISAB compartment 3 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x870++0x3 line.long 0x0 "RISAB_CID3WRCFGR,RISAB compartment 3 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x880++0x3 line.long 0x0 "RISAB_CID4PRIVCFGR,RISAB compartment 4 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x888++0x3 line.long 0x0 "RISAB_CID4RDCFGR,RISAB compartment 4 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x890++0x3 line.long 0x0 "RISAB_CID4WRCFGR,RISAB compartment 4 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A0++0x3 line.long 0x0 "RISAB_CID5PRIVCFGR,RISAB compartment 5 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8A8++0x3 line.long 0x0 "RISAB_CID5RDCFGR,RISAB compartment 5 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8B0++0x3 line.long 0x0 "RISAB_CID5WRCFGR,RISAB compartment 5 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C0++0x3 line.long 0x0 "RISAB_CID6PRIVCFGR,RISAB compartment 6 privilege configuration register" bitfld.long 0x0 31. "PPRIV31,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPRIV30,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPRIV29,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPRIV28,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPRIV27,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPRIV26,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PPRIV25,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PPRIV24,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPRIV23,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPRIV22,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPRIV21,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPRIV20,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PPRIV19,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPRIV18,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PPRIV17,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPRIV16,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPRIV15,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPRIV14,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PPRIV13,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPRIV12,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPRIV11,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PPRIV10,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPRIV9,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPRIV8,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PPRIV7,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPRIV6,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPRIV5,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPRIV4,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PPRIV3,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPRIV2,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PPRIV1,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPRIV0,Page y privileged configuration (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8C8++0x3 line.long 0x0 "RISAB_CID6RDCFGR,RISAB compartment 6 read configuration register" bitfld.long 0x0 31. "PRDEN31,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRDEN30,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRDEN29,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRDEN28,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRDEN27,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRDEN26,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PRDEN25,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PRDEN24,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRDEN23,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRDEN22,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRDEN21,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRDEN20,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRDEN19,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRDEN18,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PRDEN17,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRDEN16,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRDEN15,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRDEN14,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PRDEN13,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRDEN12,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRDEN11,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PRDEN10,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRDEN9,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRDEN8,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PRDEN7,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRDEN6,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRDEN5,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRDEN4,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PRDEN3,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRDEN2,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PRDEN1,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRDEN0,Page y read access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0x8D0++0x3 line.long 0x0 "RISAB_CID6WRCFGR,RISAB compartment 6 write configuration register" bitfld.long 0x0 31. "PWREN31,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 30. "PWREN30,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 29. "PWREN29,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 28. "PWREN28,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 27. "PWREN27,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PWREN26,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 25. "PWREN25,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "PWREN24,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 23. "PWREN23,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 22. "PWREN22,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 21. "PWREN21,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 20. "PWREN20,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 19. "PWREN19,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 18. "PWREN18,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "PWREN17,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 16. "PWREN16,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 15. "PWREN15,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 14. "PWREN14,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 13. "PWREN13,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 12. "PWREN12,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 11. "PWREN11,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "PWREN10,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 9. "PWREN9,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 8. "PWREN8,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PWREN7,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 6. "PWREN6,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 5. "PWREN5,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 4. "PWREN4,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "PWREN3,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 2. "PWREN2,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 1. "PWREN1,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" bitfld.long 0x0 0. "PWREN0,Page y write access enable (y=31 to 0)" "B_0x0,B_0x1" group.long 0xA00++0x7F line.long 0x0 "RISAB_PG0_CIDCFGR,RISAB page 0 CID configuration register" bitfld.long 0x0 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "RISAB_PG1_CIDCFGR,RISAB page 1 CID configuration register" bitfld.long 0x4 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8 "RISAB_PG2_CIDCFGR,RISAB page 2 CID configuration register" bitfld.long 0x8 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC "RISAB_PG3_CIDCFGR,RISAB page 3 CID configuration register" bitfld.long 0xC 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0xC 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x10 "RISAB_PG4_CIDCFGR,RISAB page 4 CID configuration register" bitfld.long 0x10 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "RISAB_PG5_CIDCFGR,RISAB page 5 CID configuration register" bitfld.long 0x14 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x14 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x18 "RISAB_PG6_CIDCFGR,RISAB page 6 CID configuration register" bitfld.long 0x18 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "RISAB_PG7_CIDCFGR,RISAB page 7 CID configuration register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x1C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x20 "RISAB_PG8_CIDCFGR,RISAB page 8 CID configuration register" bitfld.long 0x20 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "RISAB_PG9_CIDCFGR,RISAB page 9 CID configuration register" bitfld.long 0x24 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x24 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x28 "RISAB_PG10_CIDCFGR,RISAB page 10 CID configuration register" bitfld.long 0x28 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "RISAB_PG11_CIDCFGR,RISAB page 11 CID configuration register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x30 "RISAB_PG12_CIDCFGR,RISAB page 12 CID configuration register" bitfld.long 0x30 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "RISAB_PG13_CIDCFGR,RISAB page 13 CID configuration register" bitfld.long 0x34 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x34 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x38 "RISAB_PG14_CIDCFGR,RISAB page 14 CID configuration register" bitfld.long 0x38 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "RISAB_PG15_CIDCFGR,RISAB page 15 CID configuration register" bitfld.long 0x3C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x3C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x40 "RISAB_PG16_CIDCFGR,RISAB page 16 CID configuration register" bitfld.long 0x40 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x40 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "RISAB_PG17_CIDCFGR,RISAB page 17 CID configuration register" bitfld.long 0x44 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x44 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x44 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x48 "RISAB_PG18_CIDCFGR,RISAB page 18 CID configuration register" bitfld.long 0x48 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x48 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "RISAB_PG19_CIDCFGR,RISAB page 19 CID configuration register" bitfld.long 0x4C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x4C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x50 "RISAB_PG20_CIDCFGR,RISAB page 20 CID configuration register" bitfld.long 0x50 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x50 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "RISAB_PG21_CIDCFGR,RISAB page 21 CID configuration register" bitfld.long 0x54 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x54 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x54 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x58 "RISAB_PG22_CIDCFGR,RISAB page 22 CID configuration register" bitfld.long 0x58 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x58 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "RISAB_PG23_CIDCFGR,RISAB page 23 CID configuration register" bitfld.long 0x5C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x5C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x60 "RISAB_PG24_CIDCFGR,RISAB page 24 CID configuration register" bitfld.long 0x60 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x60 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "RISAB_PG25_CIDCFGR,RISAB page 25 CID configuration register" bitfld.long 0x64 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x64 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x64 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x68 "RISAB_PG26_CIDCFGR,RISAB page 26 CID configuration register" bitfld.long 0x68 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x68 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "RISAB_PG27_CIDCFGR,RISAB page 27 CID configuration register" bitfld.long 0x6C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x6C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x70 "RISAB_PG28_CIDCFGR,RISAB page 28 CID configuration register" bitfld.long 0x70 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x70 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "RISAB_PG29_CIDCFGR,RISAB page 29 CID configuration register" bitfld.long 0x74 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x74 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x74 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x78 "RISAB_PG30_CIDCFGR,RISAB page 30 CID configuration register" bitfld.long 0x78 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x78 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "RISAB_PG31_CIDCFGR,RISAB page 31 CID configuration register" bitfld.long 0x7C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" bitfld.long 0x7C 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" rgroup.long 0xFE8++0x17 line.long 0x0 "RISAB_HWCFGR3,RISAB hardware configuration register 3" hexmask.long 0x0 0.--31. 1. "CFG,Hardware configuration" line.long 0x4 "RISAB_HWCFGR2,RISAB hardware configuration register 2" hexmask.long 0x4 0.--31. 1. "CFG,Hardware configuration" line.long 0x8 "RISAB_HWCFGR1,RISAB hardware configuration register 1" hexmask.long.byte 0x8 24.--27. 1. "CFG7,Hardware configuration 7" hexmask.long.byte 0x8 20.--23. 1. "CFG6,Hardware configuration 6" hexmask.long.byte 0x8 16.--19. 1. "CFG5,Hardware configuration 5" hexmask.long.byte 0x8 12.--15. 1. "CFG4,Hardware configuration 4" hexmask.long.byte 0x8 8.--11. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x8 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x8 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0xC "RISAB_VERR,RISAB version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,RISAB major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,RISAB minor revision" line.long 0x10 "RISAB_IPIDR,RISAB identification register" hexmask.long 0x10 0.--31. 1. "ID,RISAB identification code" line.long 0x14 "RISAB_SIDR,RISAB size identification register" hexmask.long 0x14 0.--31. 1. "SID,RISAB size identification code" tree.end tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "RISAF (Resource Isolation Slave Unit for Address Space (Full Version))" base ad:0x0 tree "RISAF" base ad:0x420A0000 group.long 0x0++0x3 line.long 0x0 "RISAF_CR,RISAF configuration register" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x4++0x7 line.long 0x0 "RISAF_SR,RISAF status register" bitfld.long 0x0 2. "ENCDIS,Encryption disabled" "B_0x0,B_0x1" bitfld.long 0x0 1. "KEYRDY,Key ready" "B_0x0,B_0x1" bitfld.long 0x0 0. "KEYVALID,Key valid" "B_0x0,B_0x1" line.long 0x4 "RISAF_IASR,RISAF illegal access status register" bitfld.long 0x4 2. "IAEF1,Illegal access error flag 1" "0,1" bitfld.long 0x4 1. "IAEF0,Illegal access error flag 0" "0,1" bitfld.long 0x4 0. "CAEF,Configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAF_IACR,RISAF illegal access clear register" bitfld.long 0x0 2. "IAEF1,Illegal access error flag 1" "0,1" bitfld.long 0x0 1. "IAEF0,Illegal access error flag 0" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" rgroup.long 0x20++0xF line.long 0x0 "RISAF_IAESR0,RISAF illegal access error status register 0" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,Illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAF_IADDR0,RISAF illegal address register 0" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" line.long 0x8 "RISAF_IAESR1,RISAF illegal access error status register 1" bitfld.long 0x8 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x8 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x8 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "IACID,Illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0xC "RISAF_IADDR1,RISAF illegal address register 1" hexmask.long 0xC 0.--31. 1. "IADD,Illegal address" wgroup.long 0x30++0xF line.long 0x0 "RISAF_KEYR0,RISAF encryption key 0" bitfld.long 0x0 31. "KEY31,Cryptographic key" "0,1" bitfld.long 0x0 30. "KEY30,Cryptographic key" "0,1" bitfld.long 0x0 29. "KEY29,Cryptographic key" "0,1" bitfld.long 0x0 28. "KEY28,Cryptographic key" "0,1" bitfld.long 0x0 27. "KEY27,Cryptographic key" "0,1" bitfld.long 0x0 26. "KEY26,Cryptographic key" "0,1" bitfld.long 0x0 25. "KEY25,Cryptographic key" "0,1" newline bitfld.long 0x0 24. "KEY24,Cryptographic key" "0,1" bitfld.long 0x0 23. "KEY23,Cryptographic key" "0,1" bitfld.long 0x0 22. "KEY22,Cryptographic key" "0,1" bitfld.long 0x0 21. "KEY21,Cryptographic key" "0,1" bitfld.long 0x0 20. "KEY20,Cryptographic key" "0,1" bitfld.long 0x0 19. "KEY19,Cryptographic key" "0,1" bitfld.long 0x0 18. "KEY18,Cryptographic key" "0,1" newline bitfld.long 0x0 17. "KEY17,Cryptographic key" "0,1" bitfld.long 0x0 16. "KEY16,Cryptographic key" "0,1" bitfld.long 0x0 15. "KEY15,Cryptographic key" "0,1" bitfld.long 0x0 14. "KEY14,Cryptographic key" "0,1" bitfld.long 0x0 13. "KEY13,Cryptographic key" "0,1" bitfld.long 0x0 12. "KEY12,Cryptographic key" "0,1" bitfld.long 0x0 11. "KEY11,Cryptographic key" "0,1" newline bitfld.long 0x0 10. "KEY10,Cryptographic key" "0,1" bitfld.long 0x0 9. "KEY9,Cryptographic key" "0,1" bitfld.long 0x0 8. "KEY8,Cryptographic key" "0,1" bitfld.long 0x0 7. "KEY7,Cryptographic key" "0,1" bitfld.long 0x0 6. "KEY6,Cryptographic key" "0,1" bitfld.long 0x0 5. "KEY5,Cryptographic key" "0,1" bitfld.long 0x0 4. "KEY4,Cryptographic key" "0,1" newline bitfld.long 0x0 3. "KEY3,Cryptographic key" "0,1" bitfld.long 0x0 2. "KEY2,Cryptographic key" "0,1" bitfld.long 0x0 1. "KEY1,Cryptographic key" "0,1" bitfld.long 0x0 0. "KEY0,Cryptographic key" "0,1" line.long 0x4 "RISAF_KEYR1,RISAF encryption key 1" bitfld.long 0x4 31. "KEY63,Cryptographic key" "0,1" bitfld.long 0x4 30. "KEY62,Cryptographic key" "0,1" bitfld.long 0x4 29. "KEY61,Cryptographic key" "0,1" bitfld.long 0x4 28. "KEY60,Cryptographic key" "0,1" bitfld.long 0x4 27. "KEY59,Cryptographic key" "0,1" bitfld.long 0x4 26. "KEY58,Cryptographic key" "0,1" bitfld.long 0x4 25. "KEY57,Cryptographic key" "0,1" newline bitfld.long 0x4 24. "KEY56,Cryptographic key" "0,1" bitfld.long 0x4 23. "KEY55,Cryptographic key" "0,1" bitfld.long 0x4 22. "KEY54,Cryptographic key" "0,1" bitfld.long 0x4 21. "KEY53,Cryptographic key" "0,1" bitfld.long 0x4 20. "KEY52,Cryptographic key" "0,1" bitfld.long 0x4 19. "KEY51,Cryptographic key" "0,1" bitfld.long 0x4 18. "KEY50,Cryptographic key" "0,1" newline bitfld.long 0x4 17. "KEY49,Cryptographic key" "0,1" bitfld.long 0x4 16. "KEY48,Cryptographic key" "0,1" bitfld.long 0x4 15. "KEY47,Cryptographic key" "0,1" bitfld.long 0x4 14. "KEY46,Cryptographic key" "0,1" bitfld.long 0x4 13. "KEY45,Cryptographic key" "0,1" bitfld.long 0x4 12. "KEY44,Cryptographic key" "0,1" bitfld.long 0x4 11. "KEY43,Cryptographic key" "0,1" newline bitfld.long 0x4 10. "KEY42,Cryptographic key" "0,1" bitfld.long 0x4 9. "KEY41,Cryptographic key" "0,1" bitfld.long 0x4 8. "KEY40,Cryptographic key" "0,1" bitfld.long 0x4 7. "KEY39,Cryptographic key" "0,1" bitfld.long 0x4 6. "KEY38,Cryptographic key" "0,1" bitfld.long 0x4 5. "KEY37,Cryptographic key" "0,1" bitfld.long 0x4 4. "KEY36,Cryptographic key" "0,1" newline bitfld.long 0x4 3. "KEY35,Cryptographic key" "0,1" bitfld.long 0x4 2. "KEY34,Cryptographic key" "0,1" bitfld.long 0x4 1. "KEY33,Cryptographic key" "0,1" bitfld.long 0x4 0. "KEY32,Cryptographic key" "0,1" line.long 0x8 "RISAF_KEYR2,RISAF encryption key 2" bitfld.long 0x8 31. "KEY95,Cryptographic key" "0,1" bitfld.long 0x8 30. "KEY94,Cryptographic key" "0,1" bitfld.long 0x8 29. "KEY93,Cryptographic key" "0,1" bitfld.long 0x8 28. "KEY92,Cryptographic key" "0,1" bitfld.long 0x8 27. "KEY91,Cryptographic key" "0,1" bitfld.long 0x8 26. "KEY90,Cryptographic key" "0,1" bitfld.long 0x8 25. "KEY89,Cryptographic key" "0,1" newline bitfld.long 0x8 24. "KEY88,Cryptographic key" "0,1" bitfld.long 0x8 23. "KEY87,Cryptographic key" "0,1" bitfld.long 0x8 22. "KEY86,Cryptographic key" "0,1" bitfld.long 0x8 21. "KEY85,Cryptographic key" "0,1" bitfld.long 0x8 20. "KEY84,Cryptographic key" "0,1" bitfld.long 0x8 19. "KEY83,Cryptographic key" "0,1" bitfld.long 0x8 18. "KEY82,Cryptographic key" "0,1" newline bitfld.long 0x8 17. "KEY81,Cryptographic key" "0,1" bitfld.long 0x8 16. "KEY80,Cryptographic key" "0,1" bitfld.long 0x8 15. "KEY79,Cryptographic key" "0,1" bitfld.long 0x8 14. "KEY78,Cryptographic key" "0,1" bitfld.long 0x8 13. "KEY77,Cryptographic key" "0,1" bitfld.long 0x8 12. "KEY76,Cryptographic key" "0,1" bitfld.long 0x8 11. "KEY75,Cryptographic key" "0,1" newline bitfld.long 0x8 10. "KEY74,Cryptographic key" "0,1" bitfld.long 0x8 9. "KEY73,Cryptographic key" "0,1" bitfld.long 0x8 8. "KEY72,Cryptographic key" "0,1" bitfld.long 0x8 7. "KEY71,Cryptographic key" "0,1" bitfld.long 0x8 6. "KEY70,Cryptographic key" "0,1" bitfld.long 0x8 5. "KEY69,Cryptographic key" "0,1" bitfld.long 0x8 4. "KEY68,Cryptographic key" "0,1" newline bitfld.long 0x8 3. "KEY67,Cryptographic key" "0,1" bitfld.long 0x8 2. "KEY66,Cryptographic key" "0,1" bitfld.long 0x8 1. "KEY65,Cryptographic key" "0,1" bitfld.long 0x8 0. "KEY64,Cryptographic key" "0,1" line.long 0xC "RISAF_KEYR3,RISAF encryption key 3" bitfld.long 0xC 31. "KEY127,Cryptographic key" "0,1" bitfld.long 0xC 30. "KEY126,Cryptographic key" "0,1" bitfld.long 0xC 29. "KEY125,Cryptographic key" "0,1" bitfld.long 0xC 28. "KEY124,Cryptographic key" "0,1" bitfld.long 0xC 27. "KEY123,Cryptographic key" "0,1" bitfld.long 0xC 26. "KEY122,Cryptographic key" "0,1" bitfld.long 0xC 25. "KEY121,Cryptographic key" "0,1" newline bitfld.long 0xC 24. "KEY120,Cryptographic key" "0,1" bitfld.long 0xC 23. "KEY119,Cryptographic key" "0,1" bitfld.long 0xC 22. "KEY118,Cryptographic key" "0,1" bitfld.long 0xC 21. "KEY117,Cryptographic key" "0,1" bitfld.long 0xC 20. "KEY116,Cryptographic key" "0,1" bitfld.long 0xC 19. "KEY115,Cryptographic key" "0,1" bitfld.long 0xC 18. "KEY114,Cryptographic key" "0,1" newline bitfld.long 0xC 17. "KEY113,Cryptographic key" "0,1" bitfld.long 0xC 16. "KEY112,Cryptographic key" "0,1" bitfld.long 0xC 15. "KEY111,Cryptographic key" "0,1" bitfld.long 0xC 14. "KEY110,Cryptographic key" "0,1" bitfld.long 0xC 13. "KEY109,Cryptographic key" "0,1" bitfld.long 0xC 12. "KEY108,Cryptographic key" "0,1" bitfld.long 0xC 11. "KEY107,Cryptographic key" "0,1" newline bitfld.long 0xC 10. "KEY106,Cryptographic key" "0,1" bitfld.long 0xC 9. "KEY105,Cryptographic key" "0,1" bitfld.long 0xC 8. "KEY104,Cryptographic key" "0,1" bitfld.long 0xC 7. "KEY103,Cryptographic key" "0,1" bitfld.long 0xC 6. "KEY102,Cryptographic key" "0,1" bitfld.long 0xC 5. "KEY101,Cryptographic key" "0,1" bitfld.long 0xC 4. "KEY100,Cryptographic key" "0,1" newline bitfld.long 0xC 3. "KEY99,Cryptographic key" "0,1" bitfld.long 0xC 2. "KEY98,Cryptographic key" "0,1" bitfld.long 0xC 1. "KEY97,Cryptographic key" "0,1" bitfld.long 0xC 0. "KEY96,Cryptographic key" "0,1" group.long 0x40++0x2F line.long 0x0 "RISAF_REG1_CFGR,RISAF region 1 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG1_STARTR,RISAF region 1 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG1_ENDR,RISAF region 1 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG1_CIDCFGR,RISAF region 1 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG1_ACFGR,RISAF region 1 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG1_ASTARTR,RISAF region 1 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG1_AENDR,RISAF region 1 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG1_ANESTR,RISAF region 1 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG1_BCFGR,RISAF region 1 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG1_BSTARTR,RISAF region 1 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG1_BENDR,RISAF region 1 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG1_BNESTR,RISAF region 1 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x80++0x2F line.long 0x0 "RISAF_REG2_CFGR,RISAF region 2 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG2_STARTR,RISAF region 2 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG2_ENDR,RISAF region 2 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG2_CIDCFGR,RISAF region 2 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG2_ACFGR,RISAF region 2 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG2_ASTARTR,RISAF region 2 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG2_AENDR,RISAF region 2 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG2_ANESTR,RISAF region 2 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG2_BCFGR,RISAF region 2 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG2_BSTARTR,RISAF region 2 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG2_BENDR,RISAF region 2 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG2_BNESTR,RISAF region 2 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0xC0++0x2F line.long 0x0 "RISAF_REG3_CFGR,RISAF region 3 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG3_STARTR,RISAF region 3 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG3_ENDR,RISAF region 3 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG3_CIDCFGR,RISAF region 3 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG3_ACFGR,RISAF region 3 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG3_ASTARTR,RISAF region 3 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG3_AENDR,RISAF region 3 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG3_ANESTR,RISAF region 3 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG3_BCFGR,RISAF region 3 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG3_BSTARTR,RISAF region 3 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG3_BENDR,RISAF region 3 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG3_BNESTR,RISAF region 3 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x100++0x2F line.long 0x0 "RISAF_REG4_CFGR,RISAF region 4 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG4_STARTR,RISAF region 4 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG4_ENDR,RISAF region 4 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG4_CIDCFGR,RISAF region 4 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG4_ACFGR,RISAF region 4 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG4_ASTARTR,RISAF region 4 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG4_AENDR,RISAF region 4 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG4_ANESTR,RISAF region 4 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG4_BCFGR,RISAF region 4 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG4_BSTARTR,RISAF region 4 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG4_BENDR,RISAF region 4 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG4_BNESTR,RISAF region 4 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x140++0x2F line.long 0x0 "RISAF_REG5_CFGR,RISAF region 5 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG5_STARTR,RISAF region 5 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG5_ENDR,RISAF region 5 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG5_CIDCFGR,RISAF region 5 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG5_ACFGR,RISAF region 5 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG5_ASTARTR,RISAF region 5 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG5_AENDR,RISAF region 5 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG5_ANESTR,RISAF region 5 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG5_BCFGR,RISAF region 5 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG5_BSTARTR,RISAF region 5 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG5_BENDR,RISAF region 5 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG5_BNESTR,RISAF region 5 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x180++0x2F line.long 0x0 "RISAF_REG6_CFGR,RISAF region 6 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG6_STARTR,RISAF region 6 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG6_ENDR,RISAF region 6 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG6_CIDCFGR,RISAF region 6 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG6_ACFGR,RISAF region 6 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG6_ASTARTR,RISAF region 6 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG6_AENDR,RISAF region 6 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG6_ANESTR,RISAF region 6 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG6_BCFGR,RISAF region 6 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG6_BSTARTR,RISAF region 6 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG6_BENDR,RISAF region 6 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG6_BNESTR,RISAF region 6 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x1C0++0x2F line.long 0x0 "RISAF_REG7_CFGR,RISAF region 7 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG7_STARTR,RISAF region 7 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG7_ENDR,RISAF region 7 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG7_CIDCFGR,RISAF region 7 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG7_ACFGR,RISAF region 7 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG7_ASTARTR,RISAF region 7 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG7_AENDR,RISAF region 7 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG7_ANESTR,RISAF region 7 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG7_BCFGR,RISAF region 7 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG7_BSTARTR,RISAF region 7 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG7_BENDR,RISAF region 7 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG7_BNESTR,RISAF region 7 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x200++0x2F line.long 0x0 "RISAF_REG8_CFGR,RISAF region 8 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG8_STARTR,RISAF region 8 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG8_ENDR,RISAF region 8 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG8_CIDCFGR,RISAF region 8 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG8_ACFGR,RISAF region 8 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG8_ASTARTR,RISAF region 8 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG8_AENDR,RISAF region 8 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG8_ANESTR,RISAF region 8 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG8_BCFGR,RISAF region 8 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG8_BSTARTR,RISAF region 8 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG8_BENDR,RISAF region 8 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG8_BNESTR,RISAF region 8 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x240++0x2F line.long 0x0 "RISAF_REG9_CFGR,RISAF region 9 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG9_STARTR,RISAF region 9 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG9_ENDR,RISAF region 9 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG9_CIDCFGR,RISAF region 9 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG9_ACFGR,RISAF region 9 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG9_ASTARTR,RISAF region 9 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG9_AENDR,RISAF region 9 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG9_ANESTR,RISAF region 9 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG9_BCFGR,RISAF region 9 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG9_BSTARTR,RISAF region 9 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG9_BENDR,RISAF region 9 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG9_BNESTR,RISAF region 9 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x280++0x2F line.long 0x0 "RISAF_REG10_CFGR,RISAF region 10 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG10_STARTR,RISAF region 10 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG10_ENDR,RISAF region 10 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG10_CIDCFGR,RISAF region 10 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG10_ACFGR,RISAF region 10 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG10_ASTARTR,RISAF region 10 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG10_AENDR,RISAF region 10 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG10_ANESTR,RISAF region 10 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG10_BCFGR,RISAF region 10 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG10_BSTARTR,RISAF region 10 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG10_BENDR,RISAF region 10 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG10_BNESTR,RISAF region 10 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x2C0++0x2F line.long 0x0 "RISAF_REG11_CFGR,RISAF region 11 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG11_STARTR,RISAF region 11 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG11_ENDR,RISAF region 11 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG11_CIDCFGR,RISAF region 11 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG11_ACFGR,RISAF region 11 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG11_ASTARTR,RISAF region 11 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG11_AENDR,RISAF region 11 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG11_ANESTR,RISAF region 11 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG11_BCFGR,RISAF region 11 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG11_BSTARTR,RISAF region 11 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG11_BENDR,RISAF region 11 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG11_BNESTR,RISAF region 11 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x300++0x2F line.long 0x0 "RISAF_REG12_CFGR,RISAF region 12 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG12_STARTR,RISAF region 12 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG12_ENDR,RISAF region 12 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG12_CIDCFGR,RISAF region 12 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG12_ACFGR,RISAF region 12 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG12_ASTARTR,RISAF region 12 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG12_AENDR,RISAF region 12 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG12_ANESTR,RISAF region 12 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG12_BCFGR,RISAF region 12 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG12_BSTARTR,RISAF region 12 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG12_BENDR,RISAF region 12 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG12_BNESTR,RISAF region 12 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x340++0x2F line.long 0x0 "RISAF_REG13_CFGR,RISAF region 13 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG13_STARTR,RISAF region 13 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG13_ENDR,RISAF region 13 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG13_CIDCFGR,RISAF region 13 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG13_ACFGR,RISAF region 13 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG13_ASTARTR,RISAF region 13 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG13_AENDR,RISAF region 13 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG13_ANESTR,RISAF region 13 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG13_BCFGR,RISAF region 13 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG13_BSTARTR,RISAF region 13 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG13_BENDR,RISAF region 13 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG13_BNESTR,RISAF region 13 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x380++0x2F line.long 0x0 "RISAF_REG14_CFGR,RISAF region 14 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG14_STARTR,RISAF region 14 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG14_ENDR,RISAF region 14 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG14_CIDCFGR,RISAF region 14 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG14_ACFGR,RISAF region 14 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG14_ASTARTR,RISAF region 14 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG14_AENDR,RISAF region 14 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG14_ANESTR,RISAF region 14 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG14_BCFGR,RISAF region 14 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG14_BSTARTR,RISAF region 14 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG14_BENDR,RISAF region 14 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG14_BNESTR,RISAF region 14 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x3C0++0x2F line.long 0x0 "RISAF_REG15_CFGR,RISAF region 15 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG15_STARTR,RISAF region 15 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG15_ENDR,RISAF region 15 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG15_CIDCFGR,RISAF region 15 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG15_ACFGR,RISAF region 15 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG15_ASTARTR,RISAF region 15 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG15_AENDR,RISAF region 15 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG15_ANESTR,RISAF region 15 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG15_BCFGR,RISAF region 15 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG15_BSTARTR,RISAF region 15 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG15_BENDR,RISAF region 15 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG15_BNESTR,RISAF region 15 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" rgroup.long 0xFF0++0xF line.long 0x0 "RISAF_HWCFGR,RISAF hardware configuration register" hexmask.long.byte 0x0 24.--31. 1. "CFG4,Hardware generic 4" hexmask.long.byte 0x0 16.--23. 1. "CFG3,Hardware generic 3" hexmask.long.byte 0x0 8.--15. 1. "CFG2,Hardware generic 2" hexmask.long.byte 0x0 0.--7. 1. "CFG1,Hardware generic 1" line.long 0x4 "RISAF_VERR,RISAF version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,RISAF major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,RISAF minor revision" line.long 0x8 "RISAF_IPIDR,RISAF identification register" hexmask.long 0x8 0.--31. 1. "ID,RISAF identification code" line.long 0xC "RISAF_SIDR,RISAF size identification register" hexmask.long 0xC 0.--31. 1. "SID,RISAF size identification code" tree.end tree "RISAF1_S" base ad:0x520A0000 group.long 0x0++0x3 line.long 0x0 "RISAF_CR,RISAF configuration register" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x4++0x7 line.long 0x0 "RISAF_SR,RISAF status register" bitfld.long 0x0 2. "ENCDIS,Encryption disabled" "B_0x0,B_0x1" bitfld.long 0x0 1. "KEYRDY,Key ready" "B_0x0,B_0x1" bitfld.long 0x0 0. "KEYVALID,Key valid" "B_0x0,B_0x1" line.long 0x4 "RISAF_IASR,RISAF illegal access status register" bitfld.long 0x4 2. "IAEF1,Illegal access error flag 1" "0,1" bitfld.long 0x4 1. "IAEF0,Illegal access error flag 0" "0,1" bitfld.long 0x4 0. "CAEF,Configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAF_IACR,RISAF illegal access clear register" bitfld.long 0x0 2. "IAEF1,Illegal access error flag 1" "0,1" bitfld.long 0x0 1. "IAEF0,Illegal access error flag 0" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" rgroup.long 0x20++0xF line.long 0x0 "RISAF_IAESR0,RISAF illegal access error status register 0" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,Illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAF_IADDR0,RISAF illegal address register 0" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" line.long 0x8 "RISAF_IAESR1,RISAF illegal access error status register 1" bitfld.long 0x8 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x8 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x8 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "IACID,Illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0xC "RISAF_IADDR1,RISAF illegal address register 1" hexmask.long 0xC 0.--31. 1. "IADD,Illegal address" wgroup.long 0x30++0xF line.long 0x0 "RISAF_KEYR0,RISAF encryption key 0" bitfld.long 0x0 31. "KEY31,Cryptographic key" "0,1" bitfld.long 0x0 30. "KEY30,Cryptographic key" "0,1" bitfld.long 0x0 29. "KEY29,Cryptographic key" "0,1" bitfld.long 0x0 28. "KEY28,Cryptographic key" "0,1" bitfld.long 0x0 27. "KEY27,Cryptographic key" "0,1" bitfld.long 0x0 26. "KEY26,Cryptographic key" "0,1" bitfld.long 0x0 25. "KEY25,Cryptographic key" "0,1" newline bitfld.long 0x0 24. "KEY24,Cryptographic key" "0,1" bitfld.long 0x0 23. "KEY23,Cryptographic key" "0,1" bitfld.long 0x0 22. "KEY22,Cryptographic key" "0,1" bitfld.long 0x0 21. "KEY21,Cryptographic key" "0,1" bitfld.long 0x0 20. "KEY20,Cryptographic key" "0,1" bitfld.long 0x0 19. "KEY19,Cryptographic key" "0,1" bitfld.long 0x0 18. "KEY18,Cryptographic key" "0,1" newline bitfld.long 0x0 17. "KEY17,Cryptographic key" "0,1" bitfld.long 0x0 16. "KEY16,Cryptographic key" "0,1" bitfld.long 0x0 15. "KEY15,Cryptographic key" "0,1" bitfld.long 0x0 14. "KEY14,Cryptographic key" "0,1" bitfld.long 0x0 13. "KEY13,Cryptographic key" "0,1" bitfld.long 0x0 12. "KEY12,Cryptographic key" "0,1" bitfld.long 0x0 11. "KEY11,Cryptographic key" "0,1" newline bitfld.long 0x0 10. "KEY10,Cryptographic key" "0,1" bitfld.long 0x0 9. "KEY9,Cryptographic key" "0,1" bitfld.long 0x0 8. "KEY8,Cryptographic key" "0,1" bitfld.long 0x0 7. "KEY7,Cryptographic key" "0,1" bitfld.long 0x0 6. "KEY6,Cryptographic key" "0,1" bitfld.long 0x0 5. "KEY5,Cryptographic key" "0,1" bitfld.long 0x0 4. "KEY4,Cryptographic key" "0,1" newline bitfld.long 0x0 3. "KEY3,Cryptographic key" "0,1" bitfld.long 0x0 2. "KEY2,Cryptographic key" "0,1" bitfld.long 0x0 1. "KEY1,Cryptographic key" "0,1" bitfld.long 0x0 0. "KEY0,Cryptographic key" "0,1" line.long 0x4 "RISAF_KEYR1,RISAF encryption key 1" bitfld.long 0x4 31. "KEY63,Cryptographic key" "0,1" bitfld.long 0x4 30. "KEY62,Cryptographic key" "0,1" bitfld.long 0x4 29. "KEY61,Cryptographic key" "0,1" bitfld.long 0x4 28. "KEY60,Cryptographic key" "0,1" bitfld.long 0x4 27. "KEY59,Cryptographic key" "0,1" bitfld.long 0x4 26. "KEY58,Cryptographic key" "0,1" bitfld.long 0x4 25. "KEY57,Cryptographic key" "0,1" newline bitfld.long 0x4 24. "KEY56,Cryptographic key" "0,1" bitfld.long 0x4 23. "KEY55,Cryptographic key" "0,1" bitfld.long 0x4 22. "KEY54,Cryptographic key" "0,1" bitfld.long 0x4 21. "KEY53,Cryptographic key" "0,1" bitfld.long 0x4 20. "KEY52,Cryptographic key" "0,1" bitfld.long 0x4 19. "KEY51,Cryptographic key" "0,1" bitfld.long 0x4 18. "KEY50,Cryptographic key" "0,1" newline bitfld.long 0x4 17. "KEY49,Cryptographic key" "0,1" bitfld.long 0x4 16. "KEY48,Cryptographic key" "0,1" bitfld.long 0x4 15. "KEY47,Cryptographic key" "0,1" bitfld.long 0x4 14. "KEY46,Cryptographic key" "0,1" bitfld.long 0x4 13. "KEY45,Cryptographic key" "0,1" bitfld.long 0x4 12. "KEY44,Cryptographic key" "0,1" bitfld.long 0x4 11. "KEY43,Cryptographic key" "0,1" newline bitfld.long 0x4 10. "KEY42,Cryptographic key" "0,1" bitfld.long 0x4 9. "KEY41,Cryptographic key" "0,1" bitfld.long 0x4 8. "KEY40,Cryptographic key" "0,1" bitfld.long 0x4 7. "KEY39,Cryptographic key" "0,1" bitfld.long 0x4 6. "KEY38,Cryptographic key" "0,1" bitfld.long 0x4 5. "KEY37,Cryptographic key" "0,1" bitfld.long 0x4 4. "KEY36,Cryptographic key" "0,1" newline bitfld.long 0x4 3. "KEY35,Cryptographic key" "0,1" bitfld.long 0x4 2. "KEY34,Cryptographic key" "0,1" bitfld.long 0x4 1. "KEY33,Cryptographic key" "0,1" bitfld.long 0x4 0. "KEY32,Cryptographic key" "0,1" line.long 0x8 "RISAF_KEYR2,RISAF encryption key 2" bitfld.long 0x8 31. "KEY95,Cryptographic key" "0,1" bitfld.long 0x8 30. "KEY94,Cryptographic key" "0,1" bitfld.long 0x8 29. "KEY93,Cryptographic key" "0,1" bitfld.long 0x8 28. "KEY92,Cryptographic key" "0,1" bitfld.long 0x8 27. "KEY91,Cryptographic key" "0,1" bitfld.long 0x8 26. "KEY90,Cryptographic key" "0,1" bitfld.long 0x8 25. "KEY89,Cryptographic key" "0,1" newline bitfld.long 0x8 24. "KEY88,Cryptographic key" "0,1" bitfld.long 0x8 23. "KEY87,Cryptographic key" "0,1" bitfld.long 0x8 22. "KEY86,Cryptographic key" "0,1" bitfld.long 0x8 21. "KEY85,Cryptographic key" "0,1" bitfld.long 0x8 20. "KEY84,Cryptographic key" "0,1" bitfld.long 0x8 19. "KEY83,Cryptographic key" "0,1" bitfld.long 0x8 18. "KEY82,Cryptographic key" "0,1" newline bitfld.long 0x8 17. "KEY81,Cryptographic key" "0,1" bitfld.long 0x8 16. "KEY80,Cryptographic key" "0,1" bitfld.long 0x8 15. "KEY79,Cryptographic key" "0,1" bitfld.long 0x8 14. "KEY78,Cryptographic key" "0,1" bitfld.long 0x8 13. "KEY77,Cryptographic key" "0,1" bitfld.long 0x8 12. "KEY76,Cryptographic key" "0,1" bitfld.long 0x8 11. "KEY75,Cryptographic key" "0,1" newline bitfld.long 0x8 10. "KEY74,Cryptographic key" "0,1" bitfld.long 0x8 9. "KEY73,Cryptographic key" "0,1" bitfld.long 0x8 8. "KEY72,Cryptographic key" "0,1" bitfld.long 0x8 7. "KEY71,Cryptographic key" "0,1" bitfld.long 0x8 6. "KEY70,Cryptographic key" "0,1" bitfld.long 0x8 5. "KEY69,Cryptographic key" "0,1" bitfld.long 0x8 4. "KEY68,Cryptographic key" "0,1" newline bitfld.long 0x8 3. "KEY67,Cryptographic key" "0,1" bitfld.long 0x8 2. "KEY66,Cryptographic key" "0,1" bitfld.long 0x8 1. "KEY65,Cryptographic key" "0,1" bitfld.long 0x8 0. "KEY64,Cryptographic key" "0,1" line.long 0xC "RISAF_KEYR3,RISAF encryption key 3" bitfld.long 0xC 31. "KEY127,Cryptographic key" "0,1" bitfld.long 0xC 30. "KEY126,Cryptographic key" "0,1" bitfld.long 0xC 29. "KEY125,Cryptographic key" "0,1" bitfld.long 0xC 28. "KEY124,Cryptographic key" "0,1" bitfld.long 0xC 27. "KEY123,Cryptographic key" "0,1" bitfld.long 0xC 26. "KEY122,Cryptographic key" "0,1" bitfld.long 0xC 25. "KEY121,Cryptographic key" "0,1" newline bitfld.long 0xC 24. "KEY120,Cryptographic key" "0,1" bitfld.long 0xC 23. "KEY119,Cryptographic key" "0,1" bitfld.long 0xC 22. "KEY118,Cryptographic key" "0,1" bitfld.long 0xC 21. "KEY117,Cryptographic key" "0,1" bitfld.long 0xC 20. "KEY116,Cryptographic key" "0,1" bitfld.long 0xC 19. "KEY115,Cryptographic key" "0,1" bitfld.long 0xC 18. "KEY114,Cryptographic key" "0,1" newline bitfld.long 0xC 17. "KEY113,Cryptographic key" "0,1" bitfld.long 0xC 16. "KEY112,Cryptographic key" "0,1" bitfld.long 0xC 15. "KEY111,Cryptographic key" "0,1" bitfld.long 0xC 14. "KEY110,Cryptographic key" "0,1" bitfld.long 0xC 13. "KEY109,Cryptographic key" "0,1" bitfld.long 0xC 12. "KEY108,Cryptographic key" "0,1" bitfld.long 0xC 11. "KEY107,Cryptographic key" "0,1" newline bitfld.long 0xC 10. "KEY106,Cryptographic key" "0,1" bitfld.long 0xC 9. "KEY105,Cryptographic key" "0,1" bitfld.long 0xC 8. "KEY104,Cryptographic key" "0,1" bitfld.long 0xC 7. "KEY103,Cryptographic key" "0,1" bitfld.long 0xC 6. "KEY102,Cryptographic key" "0,1" bitfld.long 0xC 5. "KEY101,Cryptographic key" "0,1" bitfld.long 0xC 4. "KEY100,Cryptographic key" "0,1" newline bitfld.long 0xC 3. "KEY99,Cryptographic key" "0,1" bitfld.long 0xC 2. "KEY98,Cryptographic key" "0,1" bitfld.long 0xC 1. "KEY97,Cryptographic key" "0,1" bitfld.long 0xC 0. "KEY96,Cryptographic key" "0,1" group.long 0x40++0x2F line.long 0x0 "RISAF_REG1_CFGR,RISAF region 1 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG1_STARTR,RISAF region 1 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG1_ENDR,RISAF region 1 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG1_CIDCFGR,RISAF region 1 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG1_ACFGR,RISAF region 1 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG1_ASTARTR,RISAF region 1 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG1_AENDR,RISAF region 1 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG1_ANESTR,RISAF region 1 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG1_BCFGR,RISAF region 1 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG1_BSTARTR,RISAF region 1 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG1_BENDR,RISAF region 1 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG1_BNESTR,RISAF region 1 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x80++0x2F line.long 0x0 "RISAF_REG2_CFGR,RISAF region 2 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG2_STARTR,RISAF region 2 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG2_ENDR,RISAF region 2 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG2_CIDCFGR,RISAF region 2 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG2_ACFGR,RISAF region 2 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG2_ASTARTR,RISAF region 2 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG2_AENDR,RISAF region 2 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG2_ANESTR,RISAF region 2 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG2_BCFGR,RISAF region 2 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG2_BSTARTR,RISAF region 2 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG2_BENDR,RISAF region 2 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG2_BNESTR,RISAF region 2 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0xC0++0x2F line.long 0x0 "RISAF_REG3_CFGR,RISAF region 3 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG3_STARTR,RISAF region 3 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG3_ENDR,RISAF region 3 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG3_CIDCFGR,RISAF region 3 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG3_ACFGR,RISAF region 3 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG3_ASTARTR,RISAF region 3 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG3_AENDR,RISAF region 3 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG3_ANESTR,RISAF region 3 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG3_BCFGR,RISAF region 3 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG3_BSTARTR,RISAF region 3 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG3_BENDR,RISAF region 3 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG3_BNESTR,RISAF region 3 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x100++0x2F line.long 0x0 "RISAF_REG4_CFGR,RISAF region 4 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG4_STARTR,RISAF region 4 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG4_ENDR,RISAF region 4 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG4_CIDCFGR,RISAF region 4 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG4_ACFGR,RISAF region 4 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG4_ASTARTR,RISAF region 4 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG4_AENDR,RISAF region 4 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG4_ANESTR,RISAF region 4 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG4_BCFGR,RISAF region 4 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG4_BSTARTR,RISAF region 4 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG4_BENDR,RISAF region 4 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG4_BNESTR,RISAF region 4 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x140++0x2F line.long 0x0 "RISAF_REG5_CFGR,RISAF region 5 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG5_STARTR,RISAF region 5 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG5_ENDR,RISAF region 5 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG5_CIDCFGR,RISAF region 5 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG5_ACFGR,RISAF region 5 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG5_ASTARTR,RISAF region 5 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG5_AENDR,RISAF region 5 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG5_ANESTR,RISAF region 5 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG5_BCFGR,RISAF region 5 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG5_BSTARTR,RISAF region 5 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG5_BENDR,RISAF region 5 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG5_BNESTR,RISAF region 5 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x180++0x2F line.long 0x0 "RISAF_REG6_CFGR,RISAF region 6 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG6_STARTR,RISAF region 6 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG6_ENDR,RISAF region 6 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG6_CIDCFGR,RISAF region 6 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG6_ACFGR,RISAF region 6 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG6_ASTARTR,RISAF region 6 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG6_AENDR,RISAF region 6 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG6_ANESTR,RISAF region 6 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG6_BCFGR,RISAF region 6 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG6_BSTARTR,RISAF region 6 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG6_BENDR,RISAF region 6 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG6_BNESTR,RISAF region 6 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x1C0++0x2F line.long 0x0 "RISAF_REG7_CFGR,RISAF region 7 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG7_STARTR,RISAF region 7 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG7_ENDR,RISAF region 7 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG7_CIDCFGR,RISAF region 7 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG7_ACFGR,RISAF region 7 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG7_ASTARTR,RISAF region 7 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG7_AENDR,RISAF region 7 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG7_ANESTR,RISAF region 7 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG7_BCFGR,RISAF region 7 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG7_BSTARTR,RISAF region 7 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG7_BENDR,RISAF region 7 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG7_BNESTR,RISAF region 7 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x200++0x2F line.long 0x0 "RISAF_REG8_CFGR,RISAF region 8 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG8_STARTR,RISAF region 8 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG8_ENDR,RISAF region 8 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG8_CIDCFGR,RISAF region 8 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG8_ACFGR,RISAF region 8 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG8_ASTARTR,RISAF region 8 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG8_AENDR,RISAF region 8 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG8_ANESTR,RISAF region 8 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG8_BCFGR,RISAF region 8 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG8_BSTARTR,RISAF region 8 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG8_BENDR,RISAF region 8 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG8_BNESTR,RISAF region 8 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x240++0x2F line.long 0x0 "RISAF_REG9_CFGR,RISAF region 9 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG9_STARTR,RISAF region 9 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG9_ENDR,RISAF region 9 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG9_CIDCFGR,RISAF region 9 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG9_ACFGR,RISAF region 9 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG9_ASTARTR,RISAF region 9 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG9_AENDR,RISAF region 9 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG9_ANESTR,RISAF region 9 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG9_BCFGR,RISAF region 9 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG9_BSTARTR,RISAF region 9 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG9_BENDR,RISAF region 9 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG9_BNESTR,RISAF region 9 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x280++0x2F line.long 0x0 "RISAF_REG10_CFGR,RISAF region 10 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG10_STARTR,RISAF region 10 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG10_ENDR,RISAF region 10 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG10_CIDCFGR,RISAF region 10 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG10_ACFGR,RISAF region 10 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG10_ASTARTR,RISAF region 10 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG10_AENDR,RISAF region 10 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG10_ANESTR,RISAF region 10 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG10_BCFGR,RISAF region 10 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG10_BSTARTR,RISAF region 10 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG10_BENDR,RISAF region 10 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG10_BNESTR,RISAF region 10 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x2C0++0x2F line.long 0x0 "RISAF_REG11_CFGR,RISAF region 11 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG11_STARTR,RISAF region 11 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG11_ENDR,RISAF region 11 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG11_CIDCFGR,RISAF region 11 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG11_ACFGR,RISAF region 11 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG11_ASTARTR,RISAF region 11 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG11_AENDR,RISAF region 11 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG11_ANESTR,RISAF region 11 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG11_BCFGR,RISAF region 11 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG11_BSTARTR,RISAF region 11 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG11_BENDR,RISAF region 11 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG11_BNESTR,RISAF region 11 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x300++0x2F line.long 0x0 "RISAF_REG12_CFGR,RISAF region 12 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG12_STARTR,RISAF region 12 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG12_ENDR,RISAF region 12 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG12_CIDCFGR,RISAF region 12 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG12_ACFGR,RISAF region 12 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG12_ASTARTR,RISAF region 12 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG12_AENDR,RISAF region 12 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG12_ANESTR,RISAF region 12 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG12_BCFGR,RISAF region 12 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG12_BSTARTR,RISAF region 12 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG12_BENDR,RISAF region 12 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG12_BNESTR,RISAF region 12 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x340++0x2F line.long 0x0 "RISAF_REG13_CFGR,RISAF region 13 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG13_STARTR,RISAF region 13 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG13_ENDR,RISAF region 13 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG13_CIDCFGR,RISAF region 13 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG13_ACFGR,RISAF region 13 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG13_ASTARTR,RISAF region 13 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG13_AENDR,RISAF region 13 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG13_ANESTR,RISAF region 13 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG13_BCFGR,RISAF region 13 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG13_BSTARTR,RISAF region 13 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG13_BENDR,RISAF region 13 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG13_BNESTR,RISAF region 13 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x380++0x2F line.long 0x0 "RISAF_REG14_CFGR,RISAF region 14 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG14_STARTR,RISAF region 14 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG14_ENDR,RISAF region 14 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG14_CIDCFGR,RISAF region 14 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG14_ACFGR,RISAF region 14 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG14_ASTARTR,RISAF region 14 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG14_AENDR,RISAF region 14 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG14_ANESTR,RISAF region 14 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG14_BCFGR,RISAF region 14 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG14_BSTARTR,RISAF region 14 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG14_BENDR,RISAF region 14 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG14_BNESTR,RISAF region 14 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x3C0++0x2F line.long 0x0 "RISAF_REG15_CFGR,RISAF region 15 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG15_STARTR,RISAF region 15 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG15_ENDR,RISAF region 15 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG15_CIDCFGR,RISAF region 15 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG15_ACFGR,RISAF region 15 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG15_ASTARTR,RISAF region 15 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG15_AENDR,RISAF region 15 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG15_ANESTR,RISAF region 15 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG15_BCFGR,RISAF region 15 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG15_BSTARTR,RISAF region 15 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG15_BENDR,RISAF region 15 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG15_BNESTR,RISAF region 15 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" rgroup.long 0xFF0++0xF line.long 0x0 "RISAF_HWCFGR,RISAF hardware configuration register" hexmask.long.byte 0x0 24.--31. 1. "CFG4,Hardware generic 4" hexmask.long.byte 0x0 16.--23. 1. "CFG3,Hardware generic 3" hexmask.long.byte 0x0 8.--15. 1. "CFG2,Hardware generic 2" hexmask.long.byte 0x0 0.--7. 1. "CFG1,Hardware generic 1" line.long 0x4 "RISAF_VERR,RISAF version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,RISAF major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,RISAF minor revision" line.long 0x8 "RISAF_IPIDR,RISAF identification register" hexmask.long 0x8 0.--31. 1. "ID,RISAF identification code" line.long 0xC "RISAF_SIDR,RISAF size identification register" hexmask.long 0xC 0.--31. 1. "SID,RISAF size identification code" tree.end tree "RISAF2" base ad:0x420B0000 group.long 0x0++0x3 line.long 0x0 "RISAF_CR,RISAF configuration register" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x4++0x7 line.long 0x0 "RISAF_SR,RISAF status register" bitfld.long 0x0 2. "ENCDIS,Encryption disabled" "B_0x0,B_0x1" bitfld.long 0x0 1. "KEYRDY,Key ready" "B_0x0,B_0x1" bitfld.long 0x0 0. "KEYVALID,Key valid" "B_0x0,B_0x1" line.long 0x4 "RISAF_IASR,RISAF illegal access status register" bitfld.long 0x4 2. "IAEF1,Illegal access error flag 1" "0,1" bitfld.long 0x4 1. "IAEF0,Illegal access error flag 0" "0,1" bitfld.long 0x4 0. "CAEF,Configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAF_IACR,RISAF illegal access clear register" bitfld.long 0x0 2. "IAEF1,Illegal access error flag 1" "0,1" bitfld.long 0x0 1. "IAEF0,Illegal access error flag 0" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" rgroup.long 0x20++0xF line.long 0x0 "RISAF_IAESR0,RISAF illegal access error status register 0" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,Illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAF_IADDR0,RISAF illegal address register 0" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" line.long 0x8 "RISAF_IAESR1,RISAF illegal access error status register 1" bitfld.long 0x8 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x8 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x8 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "IACID,Illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0xC "RISAF_IADDR1,RISAF illegal address register 1" hexmask.long 0xC 0.--31. 1. "IADD,Illegal address" wgroup.long 0x30++0xF line.long 0x0 "RISAF_KEYR0,RISAF encryption key 0" bitfld.long 0x0 31. "KEY31,Cryptographic key" "0,1" bitfld.long 0x0 30. "KEY30,Cryptographic key" "0,1" bitfld.long 0x0 29. "KEY29,Cryptographic key" "0,1" bitfld.long 0x0 28. "KEY28,Cryptographic key" "0,1" bitfld.long 0x0 27. "KEY27,Cryptographic key" "0,1" bitfld.long 0x0 26. "KEY26,Cryptographic key" "0,1" bitfld.long 0x0 25. "KEY25,Cryptographic key" "0,1" newline bitfld.long 0x0 24. "KEY24,Cryptographic key" "0,1" bitfld.long 0x0 23. "KEY23,Cryptographic key" "0,1" bitfld.long 0x0 22. "KEY22,Cryptographic key" "0,1" bitfld.long 0x0 21. "KEY21,Cryptographic key" "0,1" bitfld.long 0x0 20. "KEY20,Cryptographic key" "0,1" bitfld.long 0x0 19. "KEY19,Cryptographic key" "0,1" bitfld.long 0x0 18. "KEY18,Cryptographic key" "0,1" newline bitfld.long 0x0 17. "KEY17,Cryptographic key" "0,1" bitfld.long 0x0 16. "KEY16,Cryptographic key" "0,1" bitfld.long 0x0 15. "KEY15,Cryptographic key" "0,1" bitfld.long 0x0 14. "KEY14,Cryptographic key" "0,1" bitfld.long 0x0 13. "KEY13,Cryptographic key" "0,1" bitfld.long 0x0 12. "KEY12,Cryptographic key" "0,1" bitfld.long 0x0 11. "KEY11,Cryptographic key" "0,1" newline bitfld.long 0x0 10. "KEY10,Cryptographic key" "0,1" bitfld.long 0x0 9. "KEY9,Cryptographic key" "0,1" bitfld.long 0x0 8. "KEY8,Cryptographic key" "0,1" bitfld.long 0x0 7. "KEY7,Cryptographic key" "0,1" bitfld.long 0x0 6. "KEY6,Cryptographic key" "0,1" bitfld.long 0x0 5. "KEY5,Cryptographic key" "0,1" bitfld.long 0x0 4. "KEY4,Cryptographic key" "0,1" newline bitfld.long 0x0 3. "KEY3,Cryptographic key" "0,1" bitfld.long 0x0 2. "KEY2,Cryptographic key" "0,1" bitfld.long 0x0 1. "KEY1,Cryptographic key" "0,1" bitfld.long 0x0 0. "KEY0,Cryptographic key" "0,1" line.long 0x4 "RISAF_KEYR1,RISAF encryption key 1" bitfld.long 0x4 31. "KEY63,Cryptographic key" "0,1" bitfld.long 0x4 30. "KEY62,Cryptographic key" "0,1" bitfld.long 0x4 29. "KEY61,Cryptographic key" "0,1" bitfld.long 0x4 28. "KEY60,Cryptographic key" "0,1" bitfld.long 0x4 27. "KEY59,Cryptographic key" "0,1" bitfld.long 0x4 26. "KEY58,Cryptographic key" "0,1" bitfld.long 0x4 25. "KEY57,Cryptographic key" "0,1" newline bitfld.long 0x4 24. "KEY56,Cryptographic key" "0,1" bitfld.long 0x4 23. "KEY55,Cryptographic key" "0,1" bitfld.long 0x4 22. "KEY54,Cryptographic key" "0,1" bitfld.long 0x4 21. "KEY53,Cryptographic key" "0,1" bitfld.long 0x4 20. "KEY52,Cryptographic key" "0,1" bitfld.long 0x4 19. "KEY51,Cryptographic key" "0,1" bitfld.long 0x4 18. "KEY50,Cryptographic key" "0,1" newline bitfld.long 0x4 17. "KEY49,Cryptographic key" "0,1" bitfld.long 0x4 16. "KEY48,Cryptographic key" "0,1" bitfld.long 0x4 15. "KEY47,Cryptographic key" "0,1" bitfld.long 0x4 14. "KEY46,Cryptographic key" "0,1" bitfld.long 0x4 13. "KEY45,Cryptographic key" "0,1" bitfld.long 0x4 12. "KEY44,Cryptographic key" "0,1" bitfld.long 0x4 11. "KEY43,Cryptographic key" "0,1" newline bitfld.long 0x4 10. "KEY42,Cryptographic key" "0,1" bitfld.long 0x4 9. "KEY41,Cryptographic key" "0,1" bitfld.long 0x4 8. "KEY40,Cryptographic key" "0,1" bitfld.long 0x4 7. "KEY39,Cryptographic key" "0,1" bitfld.long 0x4 6. "KEY38,Cryptographic key" "0,1" bitfld.long 0x4 5. "KEY37,Cryptographic key" "0,1" bitfld.long 0x4 4. "KEY36,Cryptographic key" "0,1" newline bitfld.long 0x4 3. "KEY35,Cryptographic key" "0,1" bitfld.long 0x4 2. "KEY34,Cryptographic key" "0,1" bitfld.long 0x4 1. "KEY33,Cryptographic key" "0,1" bitfld.long 0x4 0. "KEY32,Cryptographic key" "0,1" line.long 0x8 "RISAF_KEYR2,RISAF encryption key 2" bitfld.long 0x8 31. "KEY95,Cryptographic key" "0,1" bitfld.long 0x8 30. "KEY94,Cryptographic key" "0,1" bitfld.long 0x8 29. "KEY93,Cryptographic key" "0,1" bitfld.long 0x8 28. "KEY92,Cryptographic key" "0,1" bitfld.long 0x8 27. "KEY91,Cryptographic key" "0,1" bitfld.long 0x8 26. "KEY90,Cryptographic key" "0,1" bitfld.long 0x8 25. "KEY89,Cryptographic key" "0,1" newline bitfld.long 0x8 24. "KEY88,Cryptographic key" "0,1" bitfld.long 0x8 23. "KEY87,Cryptographic key" "0,1" bitfld.long 0x8 22. "KEY86,Cryptographic key" "0,1" bitfld.long 0x8 21. "KEY85,Cryptographic key" "0,1" bitfld.long 0x8 20. "KEY84,Cryptographic key" "0,1" bitfld.long 0x8 19. "KEY83,Cryptographic key" "0,1" bitfld.long 0x8 18. "KEY82,Cryptographic key" "0,1" newline bitfld.long 0x8 17. "KEY81,Cryptographic key" "0,1" bitfld.long 0x8 16. "KEY80,Cryptographic key" "0,1" bitfld.long 0x8 15. "KEY79,Cryptographic key" "0,1" bitfld.long 0x8 14. "KEY78,Cryptographic key" "0,1" bitfld.long 0x8 13. "KEY77,Cryptographic key" "0,1" bitfld.long 0x8 12. "KEY76,Cryptographic key" "0,1" bitfld.long 0x8 11. "KEY75,Cryptographic key" "0,1" newline bitfld.long 0x8 10. "KEY74,Cryptographic key" "0,1" bitfld.long 0x8 9. "KEY73,Cryptographic key" "0,1" bitfld.long 0x8 8. "KEY72,Cryptographic key" "0,1" bitfld.long 0x8 7. "KEY71,Cryptographic key" "0,1" bitfld.long 0x8 6. "KEY70,Cryptographic key" "0,1" bitfld.long 0x8 5. "KEY69,Cryptographic key" "0,1" bitfld.long 0x8 4. "KEY68,Cryptographic key" "0,1" newline bitfld.long 0x8 3. "KEY67,Cryptographic key" "0,1" bitfld.long 0x8 2. "KEY66,Cryptographic key" "0,1" bitfld.long 0x8 1. "KEY65,Cryptographic key" "0,1" bitfld.long 0x8 0. "KEY64,Cryptographic key" "0,1" line.long 0xC "RISAF_KEYR3,RISAF encryption key 3" bitfld.long 0xC 31. "KEY127,Cryptographic key" "0,1" bitfld.long 0xC 30. "KEY126,Cryptographic key" "0,1" bitfld.long 0xC 29. "KEY125,Cryptographic key" "0,1" bitfld.long 0xC 28. "KEY124,Cryptographic key" "0,1" bitfld.long 0xC 27. "KEY123,Cryptographic key" "0,1" bitfld.long 0xC 26. "KEY122,Cryptographic key" "0,1" bitfld.long 0xC 25. "KEY121,Cryptographic key" "0,1" newline bitfld.long 0xC 24. "KEY120,Cryptographic key" "0,1" bitfld.long 0xC 23. "KEY119,Cryptographic key" "0,1" bitfld.long 0xC 22. "KEY118,Cryptographic key" "0,1" bitfld.long 0xC 21. "KEY117,Cryptographic key" "0,1" bitfld.long 0xC 20. "KEY116,Cryptographic key" "0,1" bitfld.long 0xC 19. "KEY115,Cryptographic key" "0,1" bitfld.long 0xC 18. "KEY114,Cryptographic key" "0,1" newline bitfld.long 0xC 17. "KEY113,Cryptographic key" "0,1" bitfld.long 0xC 16. "KEY112,Cryptographic key" "0,1" bitfld.long 0xC 15. "KEY111,Cryptographic key" "0,1" bitfld.long 0xC 14. "KEY110,Cryptographic key" "0,1" bitfld.long 0xC 13. "KEY109,Cryptographic key" "0,1" bitfld.long 0xC 12. "KEY108,Cryptographic key" "0,1" bitfld.long 0xC 11. "KEY107,Cryptographic key" "0,1" newline bitfld.long 0xC 10. "KEY106,Cryptographic key" "0,1" bitfld.long 0xC 9. "KEY105,Cryptographic key" "0,1" bitfld.long 0xC 8. "KEY104,Cryptographic key" "0,1" bitfld.long 0xC 7. "KEY103,Cryptographic key" "0,1" bitfld.long 0xC 6. "KEY102,Cryptographic key" "0,1" bitfld.long 0xC 5. "KEY101,Cryptographic key" "0,1" bitfld.long 0xC 4. "KEY100,Cryptographic key" "0,1" newline bitfld.long 0xC 3. "KEY99,Cryptographic key" "0,1" bitfld.long 0xC 2. "KEY98,Cryptographic key" "0,1" bitfld.long 0xC 1. "KEY97,Cryptographic key" "0,1" bitfld.long 0xC 0. "KEY96,Cryptographic key" "0,1" group.long 0x40++0x2F line.long 0x0 "RISAF_REG1_CFGR,RISAF region 1 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG1_STARTR,RISAF region 1 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG1_ENDR,RISAF region 1 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG1_CIDCFGR,RISAF region 1 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG1_ACFGR,RISAF region 1 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG1_ASTARTR,RISAF region 1 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG1_AENDR,RISAF region 1 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG1_ANESTR,RISAF region 1 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG1_BCFGR,RISAF region 1 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG1_BSTARTR,RISAF region 1 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG1_BENDR,RISAF region 1 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG1_BNESTR,RISAF region 1 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x80++0x2F line.long 0x0 "RISAF_REG2_CFGR,RISAF region 2 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG2_STARTR,RISAF region 2 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG2_ENDR,RISAF region 2 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG2_CIDCFGR,RISAF region 2 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG2_ACFGR,RISAF region 2 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG2_ASTARTR,RISAF region 2 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG2_AENDR,RISAF region 2 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG2_ANESTR,RISAF region 2 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG2_BCFGR,RISAF region 2 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG2_BSTARTR,RISAF region 2 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG2_BENDR,RISAF region 2 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG2_BNESTR,RISAF region 2 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0xC0++0x2F line.long 0x0 "RISAF_REG3_CFGR,RISAF region 3 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG3_STARTR,RISAF region 3 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG3_ENDR,RISAF region 3 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG3_CIDCFGR,RISAF region 3 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG3_ACFGR,RISAF region 3 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG3_ASTARTR,RISAF region 3 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG3_AENDR,RISAF region 3 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG3_ANESTR,RISAF region 3 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG3_BCFGR,RISAF region 3 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG3_BSTARTR,RISAF region 3 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG3_BENDR,RISAF region 3 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG3_BNESTR,RISAF region 3 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x100++0x2F line.long 0x0 "RISAF_REG4_CFGR,RISAF region 4 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG4_STARTR,RISAF region 4 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG4_ENDR,RISAF region 4 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG4_CIDCFGR,RISAF region 4 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG4_ACFGR,RISAF region 4 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG4_ASTARTR,RISAF region 4 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG4_AENDR,RISAF region 4 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG4_ANESTR,RISAF region 4 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG4_BCFGR,RISAF region 4 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG4_BSTARTR,RISAF region 4 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG4_BENDR,RISAF region 4 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG4_BNESTR,RISAF region 4 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x140++0x2F line.long 0x0 "RISAF_REG5_CFGR,RISAF region 5 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG5_STARTR,RISAF region 5 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG5_ENDR,RISAF region 5 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG5_CIDCFGR,RISAF region 5 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG5_ACFGR,RISAF region 5 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG5_ASTARTR,RISAF region 5 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG5_AENDR,RISAF region 5 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG5_ANESTR,RISAF region 5 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG5_BCFGR,RISAF region 5 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG5_BSTARTR,RISAF region 5 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG5_BENDR,RISAF region 5 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG5_BNESTR,RISAF region 5 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x180++0x2F line.long 0x0 "RISAF_REG6_CFGR,RISAF region 6 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG6_STARTR,RISAF region 6 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG6_ENDR,RISAF region 6 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG6_CIDCFGR,RISAF region 6 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG6_ACFGR,RISAF region 6 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG6_ASTARTR,RISAF region 6 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG6_AENDR,RISAF region 6 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG6_ANESTR,RISAF region 6 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG6_BCFGR,RISAF region 6 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG6_BSTARTR,RISAF region 6 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG6_BENDR,RISAF region 6 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG6_BNESTR,RISAF region 6 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x1C0++0x2F line.long 0x0 "RISAF_REG7_CFGR,RISAF region 7 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG7_STARTR,RISAF region 7 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG7_ENDR,RISAF region 7 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG7_CIDCFGR,RISAF region 7 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG7_ACFGR,RISAF region 7 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG7_ASTARTR,RISAF region 7 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG7_AENDR,RISAF region 7 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG7_ANESTR,RISAF region 7 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG7_BCFGR,RISAF region 7 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG7_BSTARTR,RISAF region 7 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG7_BENDR,RISAF region 7 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG7_BNESTR,RISAF region 7 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x200++0x2F line.long 0x0 "RISAF_REG8_CFGR,RISAF region 8 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG8_STARTR,RISAF region 8 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG8_ENDR,RISAF region 8 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG8_CIDCFGR,RISAF region 8 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG8_ACFGR,RISAF region 8 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG8_ASTARTR,RISAF region 8 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG8_AENDR,RISAF region 8 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG8_ANESTR,RISAF region 8 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG8_BCFGR,RISAF region 8 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG8_BSTARTR,RISAF region 8 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG8_BENDR,RISAF region 8 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG8_BNESTR,RISAF region 8 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x240++0x2F line.long 0x0 "RISAF_REG9_CFGR,RISAF region 9 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG9_STARTR,RISAF region 9 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG9_ENDR,RISAF region 9 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG9_CIDCFGR,RISAF region 9 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG9_ACFGR,RISAF region 9 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG9_ASTARTR,RISAF region 9 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG9_AENDR,RISAF region 9 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG9_ANESTR,RISAF region 9 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG9_BCFGR,RISAF region 9 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG9_BSTARTR,RISAF region 9 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG9_BENDR,RISAF region 9 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG9_BNESTR,RISAF region 9 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x280++0x2F line.long 0x0 "RISAF_REG10_CFGR,RISAF region 10 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG10_STARTR,RISAF region 10 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG10_ENDR,RISAF region 10 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG10_CIDCFGR,RISAF region 10 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG10_ACFGR,RISAF region 10 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG10_ASTARTR,RISAF region 10 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG10_AENDR,RISAF region 10 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG10_ANESTR,RISAF region 10 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG10_BCFGR,RISAF region 10 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG10_BSTARTR,RISAF region 10 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG10_BENDR,RISAF region 10 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG10_BNESTR,RISAF region 10 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x2C0++0x2F line.long 0x0 "RISAF_REG11_CFGR,RISAF region 11 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG11_STARTR,RISAF region 11 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG11_ENDR,RISAF region 11 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG11_CIDCFGR,RISAF region 11 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG11_ACFGR,RISAF region 11 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG11_ASTARTR,RISAF region 11 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG11_AENDR,RISAF region 11 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG11_ANESTR,RISAF region 11 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG11_BCFGR,RISAF region 11 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG11_BSTARTR,RISAF region 11 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG11_BENDR,RISAF region 11 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG11_BNESTR,RISAF region 11 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x300++0x2F line.long 0x0 "RISAF_REG12_CFGR,RISAF region 12 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG12_STARTR,RISAF region 12 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG12_ENDR,RISAF region 12 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG12_CIDCFGR,RISAF region 12 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG12_ACFGR,RISAF region 12 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG12_ASTARTR,RISAF region 12 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG12_AENDR,RISAF region 12 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG12_ANESTR,RISAF region 12 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG12_BCFGR,RISAF region 12 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG12_BSTARTR,RISAF region 12 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG12_BENDR,RISAF region 12 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG12_BNESTR,RISAF region 12 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x340++0x2F line.long 0x0 "RISAF_REG13_CFGR,RISAF region 13 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG13_STARTR,RISAF region 13 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG13_ENDR,RISAF region 13 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG13_CIDCFGR,RISAF region 13 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG13_ACFGR,RISAF region 13 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG13_ASTARTR,RISAF region 13 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG13_AENDR,RISAF region 13 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG13_ANESTR,RISAF region 13 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG13_BCFGR,RISAF region 13 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG13_BSTARTR,RISAF region 13 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG13_BENDR,RISAF region 13 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG13_BNESTR,RISAF region 13 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x380++0x2F line.long 0x0 "RISAF_REG14_CFGR,RISAF region 14 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG14_STARTR,RISAF region 14 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG14_ENDR,RISAF region 14 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG14_CIDCFGR,RISAF region 14 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG14_ACFGR,RISAF region 14 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG14_ASTARTR,RISAF region 14 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG14_AENDR,RISAF region 14 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG14_ANESTR,RISAF region 14 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG14_BCFGR,RISAF region 14 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG14_BSTARTR,RISAF region 14 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG14_BENDR,RISAF region 14 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG14_BNESTR,RISAF region 14 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x3C0++0x2F line.long 0x0 "RISAF_REG15_CFGR,RISAF region 15 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG15_STARTR,RISAF region 15 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG15_ENDR,RISAF region 15 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG15_CIDCFGR,RISAF region 15 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG15_ACFGR,RISAF region 15 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG15_ASTARTR,RISAF region 15 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG15_AENDR,RISAF region 15 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG15_ANESTR,RISAF region 15 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG15_BCFGR,RISAF region 15 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG15_BSTARTR,RISAF region 15 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG15_BENDR,RISAF region 15 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG15_BNESTR,RISAF region 15 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" rgroup.long 0xFF0++0xF line.long 0x0 "RISAF_HWCFGR,RISAF hardware configuration register" hexmask.long.byte 0x0 24.--31. 1. "CFG4,Hardware generic 4" hexmask.long.byte 0x0 16.--23. 1. "CFG3,Hardware generic 3" hexmask.long.byte 0x0 8.--15. 1. "CFG2,Hardware generic 2" hexmask.long.byte 0x0 0.--7. 1. "CFG1,Hardware generic 1" line.long 0x4 "RISAF_VERR,RISAF version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,RISAF major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,RISAF minor revision" line.long 0x8 "RISAF_IPIDR,RISAF identification register" hexmask.long 0x8 0.--31. 1. "ID,RISAF identification code" line.long 0xC "RISAF_SIDR,RISAF size identification register" hexmask.long 0xC 0.--31. 1. "SID,RISAF size identification code" tree.end tree "RISAF2_S" base ad:0x520B0000 group.long 0x0++0x3 line.long 0x0 "RISAF_CR,RISAF configuration register" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x4++0x7 line.long 0x0 "RISAF_SR,RISAF status register" bitfld.long 0x0 2. "ENCDIS,Encryption disabled" "B_0x0,B_0x1" bitfld.long 0x0 1. "KEYRDY,Key ready" "B_0x0,B_0x1" bitfld.long 0x0 0. "KEYVALID,Key valid" "B_0x0,B_0x1" line.long 0x4 "RISAF_IASR,RISAF illegal access status register" bitfld.long 0x4 2. "IAEF1,Illegal access error flag 1" "0,1" bitfld.long 0x4 1. "IAEF0,Illegal access error flag 0" "0,1" bitfld.long 0x4 0. "CAEF,Configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAF_IACR,RISAF illegal access clear register" bitfld.long 0x0 2. "IAEF1,Illegal access error flag 1" "0,1" bitfld.long 0x0 1. "IAEF0,Illegal access error flag 0" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" rgroup.long 0x20++0xF line.long 0x0 "RISAF_IAESR0,RISAF illegal access error status register 0" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,Illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAF_IADDR0,RISAF illegal address register 0" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" line.long 0x8 "RISAF_IAESR1,RISAF illegal access error status register 1" bitfld.long 0x8 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x8 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x8 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "IACID,Illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0xC "RISAF_IADDR1,RISAF illegal address register 1" hexmask.long 0xC 0.--31. 1. "IADD,Illegal address" wgroup.long 0x30++0xF line.long 0x0 "RISAF_KEYR0,RISAF encryption key 0" bitfld.long 0x0 31. "KEY31,Cryptographic key" "0,1" bitfld.long 0x0 30. "KEY30,Cryptographic key" "0,1" bitfld.long 0x0 29. "KEY29,Cryptographic key" "0,1" bitfld.long 0x0 28. "KEY28,Cryptographic key" "0,1" bitfld.long 0x0 27. "KEY27,Cryptographic key" "0,1" bitfld.long 0x0 26. "KEY26,Cryptographic key" "0,1" bitfld.long 0x0 25. "KEY25,Cryptographic key" "0,1" newline bitfld.long 0x0 24. "KEY24,Cryptographic key" "0,1" bitfld.long 0x0 23. "KEY23,Cryptographic key" "0,1" bitfld.long 0x0 22. "KEY22,Cryptographic key" "0,1" bitfld.long 0x0 21. "KEY21,Cryptographic key" "0,1" bitfld.long 0x0 20. "KEY20,Cryptographic key" "0,1" bitfld.long 0x0 19. "KEY19,Cryptographic key" "0,1" bitfld.long 0x0 18. "KEY18,Cryptographic key" "0,1" newline bitfld.long 0x0 17. "KEY17,Cryptographic key" "0,1" bitfld.long 0x0 16. "KEY16,Cryptographic key" "0,1" bitfld.long 0x0 15. "KEY15,Cryptographic key" "0,1" bitfld.long 0x0 14. "KEY14,Cryptographic key" "0,1" bitfld.long 0x0 13. "KEY13,Cryptographic key" "0,1" bitfld.long 0x0 12. "KEY12,Cryptographic key" "0,1" bitfld.long 0x0 11. "KEY11,Cryptographic key" "0,1" newline bitfld.long 0x0 10. "KEY10,Cryptographic key" "0,1" bitfld.long 0x0 9. "KEY9,Cryptographic key" "0,1" bitfld.long 0x0 8. "KEY8,Cryptographic key" "0,1" bitfld.long 0x0 7. "KEY7,Cryptographic key" "0,1" bitfld.long 0x0 6. "KEY6,Cryptographic key" "0,1" bitfld.long 0x0 5. "KEY5,Cryptographic key" "0,1" bitfld.long 0x0 4. "KEY4,Cryptographic key" "0,1" newline bitfld.long 0x0 3. "KEY3,Cryptographic key" "0,1" bitfld.long 0x0 2. "KEY2,Cryptographic key" "0,1" bitfld.long 0x0 1. "KEY1,Cryptographic key" "0,1" bitfld.long 0x0 0. "KEY0,Cryptographic key" "0,1" line.long 0x4 "RISAF_KEYR1,RISAF encryption key 1" bitfld.long 0x4 31. "KEY63,Cryptographic key" "0,1" bitfld.long 0x4 30. "KEY62,Cryptographic key" "0,1" bitfld.long 0x4 29. "KEY61,Cryptographic key" "0,1" bitfld.long 0x4 28. "KEY60,Cryptographic key" "0,1" bitfld.long 0x4 27. "KEY59,Cryptographic key" "0,1" bitfld.long 0x4 26. "KEY58,Cryptographic key" "0,1" bitfld.long 0x4 25. "KEY57,Cryptographic key" "0,1" newline bitfld.long 0x4 24. "KEY56,Cryptographic key" "0,1" bitfld.long 0x4 23. "KEY55,Cryptographic key" "0,1" bitfld.long 0x4 22. "KEY54,Cryptographic key" "0,1" bitfld.long 0x4 21. "KEY53,Cryptographic key" "0,1" bitfld.long 0x4 20. "KEY52,Cryptographic key" "0,1" bitfld.long 0x4 19. "KEY51,Cryptographic key" "0,1" bitfld.long 0x4 18. "KEY50,Cryptographic key" "0,1" newline bitfld.long 0x4 17. "KEY49,Cryptographic key" "0,1" bitfld.long 0x4 16. "KEY48,Cryptographic key" "0,1" bitfld.long 0x4 15. "KEY47,Cryptographic key" "0,1" bitfld.long 0x4 14. "KEY46,Cryptographic key" "0,1" bitfld.long 0x4 13. "KEY45,Cryptographic key" "0,1" bitfld.long 0x4 12. "KEY44,Cryptographic key" "0,1" bitfld.long 0x4 11. "KEY43,Cryptographic key" "0,1" newline bitfld.long 0x4 10. "KEY42,Cryptographic key" "0,1" bitfld.long 0x4 9. "KEY41,Cryptographic key" "0,1" bitfld.long 0x4 8. "KEY40,Cryptographic key" "0,1" bitfld.long 0x4 7. "KEY39,Cryptographic key" "0,1" bitfld.long 0x4 6. "KEY38,Cryptographic key" "0,1" bitfld.long 0x4 5. "KEY37,Cryptographic key" "0,1" bitfld.long 0x4 4. "KEY36,Cryptographic key" "0,1" newline bitfld.long 0x4 3. "KEY35,Cryptographic key" "0,1" bitfld.long 0x4 2. "KEY34,Cryptographic key" "0,1" bitfld.long 0x4 1. "KEY33,Cryptographic key" "0,1" bitfld.long 0x4 0. "KEY32,Cryptographic key" "0,1" line.long 0x8 "RISAF_KEYR2,RISAF encryption key 2" bitfld.long 0x8 31. "KEY95,Cryptographic key" "0,1" bitfld.long 0x8 30. "KEY94,Cryptographic key" "0,1" bitfld.long 0x8 29. "KEY93,Cryptographic key" "0,1" bitfld.long 0x8 28. "KEY92,Cryptographic key" "0,1" bitfld.long 0x8 27. "KEY91,Cryptographic key" "0,1" bitfld.long 0x8 26. "KEY90,Cryptographic key" "0,1" bitfld.long 0x8 25. "KEY89,Cryptographic key" "0,1" newline bitfld.long 0x8 24. "KEY88,Cryptographic key" "0,1" bitfld.long 0x8 23. "KEY87,Cryptographic key" "0,1" bitfld.long 0x8 22. "KEY86,Cryptographic key" "0,1" bitfld.long 0x8 21. "KEY85,Cryptographic key" "0,1" bitfld.long 0x8 20. "KEY84,Cryptographic key" "0,1" bitfld.long 0x8 19. "KEY83,Cryptographic key" "0,1" bitfld.long 0x8 18. "KEY82,Cryptographic key" "0,1" newline bitfld.long 0x8 17. "KEY81,Cryptographic key" "0,1" bitfld.long 0x8 16. "KEY80,Cryptographic key" "0,1" bitfld.long 0x8 15. "KEY79,Cryptographic key" "0,1" bitfld.long 0x8 14. "KEY78,Cryptographic key" "0,1" bitfld.long 0x8 13. "KEY77,Cryptographic key" "0,1" bitfld.long 0x8 12. "KEY76,Cryptographic key" "0,1" bitfld.long 0x8 11. "KEY75,Cryptographic key" "0,1" newline bitfld.long 0x8 10. "KEY74,Cryptographic key" "0,1" bitfld.long 0x8 9. "KEY73,Cryptographic key" "0,1" bitfld.long 0x8 8. "KEY72,Cryptographic key" "0,1" bitfld.long 0x8 7. "KEY71,Cryptographic key" "0,1" bitfld.long 0x8 6. "KEY70,Cryptographic key" "0,1" bitfld.long 0x8 5. "KEY69,Cryptographic key" "0,1" bitfld.long 0x8 4. "KEY68,Cryptographic key" "0,1" newline bitfld.long 0x8 3. "KEY67,Cryptographic key" "0,1" bitfld.long 0x8 2. "KEY66,Cryptographic key" "0,1" bitfld.long 0x8 1. "KEY65,Cryptographic key" "0,1" bitfld.long 0x8 0. "KEY64,Cryptographic key" "0,1" line.long 0xC "RISAF_KEYR3,RISAF encryption key 3" bitfld.long 0xC 31. "KEY127,Cryptographic key" "0,1" bitfld.long 0xC 30. "KEY126,Cryptographic key" "0,1" bitfld.long 0xC 29. "KEY125,Cryptographic key" "0,1" bitfld.long 0xC 28. "KEY124,Cryptographic key" "0,1" bitfld.long 0xC 27. "KEY123,Cryptographic key" "0,1" bitfld.long 0xC 26. "KEY122,Cryptographic key" "0,1" bitfld.long 0xC 25. "KEY121,Cryptographic key" "0,1" newline bitfld.long 0xC 24. "KEY120,Cryptographic key" "0,1" bitfld.long 0xC 23. "KEY119,Cryptographic key" "0,1" bitfld.long 0xC 22. "KEY118,Cryptographic key" "0,1" bitfld.long 0xC 21. "KEY117,Cryptographic key" "0,1" bitfld.long 0xC 20. "KEY116,Cryptographic key" "0,1" bitfld.long 0xC 19. "KEY115,Cryptographic key" "0,1" bitfld.long 0xC 18. "KEY114,Cryptographic key" "0,1" newline bitfld.long 0xC 17. "KEY113,Cryptographic key" "0,1" bitfld.long 0xC 16. "KEY112,Cryptographic key" "0,1" bitfld.long 0xC 15. "KEY111,Cryptographic key" "0,1" bitfld.long 0xC 14. "KEY110,Cryptographic key" "0,1" bitfld.long 0xC 13. "KEY109,Cryptographic key" "0,1" bitfld.long 0xC 12. "KEY108,Cryptographic key" "0,1" bitfld.long 0xC 11. "KEY107,Cryptographic key" "0,1" newline bitfld.long 0xC 10. "KEY106,Cryptographic key" "0,1" bitfld.long 0xC 9. "KEY105,Cryptographic key" "0,1" bitfld.long 0xC 8. "KEY104,Cryptographic key" "0,1" bitfld.long 0xC 7. "KEY103,Cryptographic key" "0,1" bitfld.long 0xC 6. "KEY102,Cryptographic key" "0,1" bitfld.long 0xC 5. "KEY101,Cryptographic key" "0,1" bitfld.long 0xC 4. "KEY100,Cryptographic key" "0,1" newline bitfld.long 0xC 3. "KEY99,Cryptographic key" "0,1" bitfld.long 0xC 2. "KEY98,Cryptographic key" "0,1" bitfld.long 0xC 1. "KEY97,Cryptographic key" "0,1" bitfld.long 0xC 0. "KEY96,Cryptographic key" "0,1" group.long 0x40++0x2F line.long 0x0 "RISAF_REG1_CFGR,RISAF region 1 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG1_STARTR,RISAF region 1 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG1_ENDR,RISAF region 1 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG1_CIDCFGR,RISAF region 1 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG1_ACFGR,RISAF region 1 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG1_ASTARTR,RISAF region 1 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG1_AENDR,RISAF region 1 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG1_ANESTR,RISAF region 1 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG1_BCFGR,RISAF region 1 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG1_BSTARTR,RISAF region 1 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG1_BENDR,RISAF region 1 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG1_BNESTR,RISAF region 1 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x80++0x2F line.long 0x0 "RISAF_REG2_CFGR,RISAF region 2 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG2_STARTR,RISAF region 2 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG2_ENDR,RISAF region 2 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG2_CIDCFGR,RISAF region 2 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG2_ACFGR,RISAF region 2 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG2_ASTARTR,RISAF region 2 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG2_AENDR,RISAF region 2 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG2_ANESTR,RISAF region 2 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG2_BCFGR,RISAF region 2 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG2_BSTARTR,RISAF region 2 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG2_BENDR,RISAF region 2 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG2_BNESTR,RISAF region 2 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0xC0++0x2F line.long 0x0 "RISAF_REG3_CFGR,RISAF region 3 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG3_STARTR,RISAF region 3 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG3_ENDR,RISAF region 3 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG3_CIDCFGR,RISAF region 3 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG3_ACFGR,RISAF region 3 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG3_ASTARTR,RISAF region 3 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG3_AENDR,RISAF region 3 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG3_ANESTR,RISAF region 3 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG3_BCFGR,RISAF region 3 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG3_BSTARTR,RISAF region 3 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG3_BENDR,RISAF region 3 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG3_BNESTR,RISAF region 3 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x100++0x2F line.long 0x0 "RISAF_REG4_CFGR,RISAF region 4 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG4_STARTR,RISAF region 4 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG4_ENDR,RISAF region 4 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG4_CIDCFGR,RISAF region 4 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG4_ACFGR,RISAF region 4 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG4_ASTARTR,RISAF region 4 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG4_AENDR,RISAF region 4 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG4_ANESTR,RISAF region 4 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG4_BCFGR,RISAF region 4 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG4_BSTARTR,RISAF region 4 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG4_BENDR,RISAF region 4 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG4_BNESTR,RISAF region 4 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x140++0x2F line.long 0x0 "RISAF_REG5_CFGR,RISAF region 5 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG5_STARTR,RISAF region 5 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG5_ENDR,RISAF region 5 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG5_CIDCFGR,RISAF region 5 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG5_ACFGR,RISAF region 5 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG5_ASTARTR,RISAF region 5 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG5_AENDR,RISAF region 5 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG5_ANESTR,RISAF region 5 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG5_BCFGR,RISAF region 5 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG5_BSTARTR,RISAF region 5 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG5_BENDR,RISAF region 5 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG5_BNESTR,RISAF region 5 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x180++0x2F line.long 0x0 "RISAF_REG6_CFGR,RISAF region 6 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG6_STARTR,RISAF region 6 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG6_ENDR,RISAF region 6 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG6_CIDCFGR,RISAF region 6 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG6_ACFGR,RISAF region 6 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG6_ASTARTR,RISAF region 6 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG6_AENDR,RISAF region 6 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG6_ANESTR,RISAF region 6 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG6_BCFGR,RISAF region 6 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG6_BSTARTR,RISAF region 6 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG6_BENDR,RISAF region 6 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG6_BNESTR,RISAF region 6 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x1C0++0x2F line.long 0x0 "RISAF_REG7_CFGR,RISAF region 7 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG7_STARTR,RISAF region 7 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG7_ENDR,RISAF region 7 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG7_CIDCFGR,RISAF region 7 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG7_ACFGR,RISAF region 7 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG7_ASTARTR,RISAF region 7 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG7_AENDR,RISAF region 7 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG7_ANESTR,RISAF region 7 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG7_BCFGR,RISAF region 7 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG7_BSTARTR,RISAF region 7 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG7_BENDR,RISAF region 7 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG7_BNESTR,RISAF region 7 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x200++0x2F line.long 0x0 "RISAF_REG8_CFGR,RISAF region 8 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG8_STARTR,RISAF region 8 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG8_ENDR,RISAF region 8 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG8_CIDCFGR,RISAF region 8 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG8_ACFGR,RISAF region 8 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG8_ASTARTR,RISAF region 8 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG8_AENDR,RISAF region 8 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG8_ANESTR,RISAF region 8 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG8_BCFGR,RISAF region 8 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG8_BSTARTR,RISAF region 8 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG8_BENDR,RISAF region 8 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG8_BNESTR,RISAF region 8 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x240++0x2F line.long 0x0 "RISAF_REG9_CFGR,RISAF region 9 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG9_STARTR,RISAF region 9 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG9_ENDR,RISAF region 9 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG9_CIDCFGR,RISAF region 9 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG9_ACFGR,RISAF region 9 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG9_ASTARTR,RISAF region 9 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG9_AENDR,RISAF region 9 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG9_ANESTR,RISAF region 9 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG9_BCFGR,RISAF region 9 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG9_BSTARTR,RISAF region 9 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG9_BENDR,RISAF region 9 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG9_BNESTR,RISAF region 9 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x280++0x2F line.long 0x0 "RISAF_REG10_CFGR,RISAF region 10 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG10_STARTR,RISAF region 10 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG10_ENDR,RISAF region 10 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG10_CIDCFGR,RISAF region 10 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG10_ACFGR,RISAF region 10 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG10_ASTARTR,RISAF region 10 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG10_AENDR,RISAF region 10 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG10_ANESTR,RISAF region 10 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG10_BCFGR,RISAF region 10 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG10_BSTARTR,RISAF region 10 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG10_BENDR,RISAF region 10 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG10_BNESTR,RISAF region 10 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x2C0++0x2F line.long 0x0 "RISAF_REG11_CFGR,RISAF region 11 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG11_STARTR,RISAF region 11 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG11_ENDR,RISAF region 11 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG11_CIDCFGR,RISAF region 11 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG11_ACFGR,RISAF region 11 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG11_ASTARTR,RISAF region 11 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG11_AENDR,RISAF region 11 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG11_ANESTR,RISAF region 11 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG11_BCFGR,RISAF region 11 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG11_BSTARTR,RISAF region 11 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG11_BENDR,RISAF region 11 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG11_BNESTR,RISAF region 11 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x300++0x2F line.long 0x0 "RISAF_REG12_CFGR,RISAF region 12 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG12_STARTR,RISAF region 12 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG12_ENDR,RISAF region 12 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG12_CIDCFGR,RISAF region 12 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG12_ACFGR,RISAF region 12 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG12_ASTARTR,RISAF region 12 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG12_AENDR,RISAF region 12 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG12_ANESTR,RISAF region 12 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG12_BCFGR,RISAF region 12 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG12_BSTARTR,RISAF region 12 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG12_BENDR,RISAF region 12 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG12_BNESTR,RISAF region 12 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x340++0x2F line.long 0x0 "RISAF_REG13_CFGR,RISAF region 13 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG13_STARTR,RISAF region 13 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG13_ENDR,RISAF region 13 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG13_CIDCFGR,RISAF region 13 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG13_ACFGR,RISAF region 13 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG13_ASTARTR,RISAF region 13 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG13_AENDR,RISAF region 13 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG13_ANESTR,RISAF region 13 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG13_BCFGR,RISAF region 13 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG13_BSTARTR,RISAF region 13 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG13_BENDR,RISAF region 13 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG13_BNESTR,RISAF region 13 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x380++0x2F line.long 0x0 "RISAF_REG14_CFGR,RISAF region 14 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG14_STARTR,RISAF region 14 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG14_ENDR,RISAF region 14 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG14_CIDCFGR,RISAF region 14 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG14_ACFGR,RISAF region 14 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG14_ASTARTR,RISAF region 14 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG14_AENDR,RISAF region 14 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG14_ANESTR,RISAF region 14 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG14_BCFGR,RISAF region 14 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG14_BSTARTR,RISAF region 14 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG14_BENDR,RISAF region 14 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG14_BNESTR,RISAF region 14 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x3C0++0x2F line.long 0x0 "RISAF_REG15_CFGR,RISAF region 15 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG15_STARTR,RISAF region 15 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG15_ENDR,RISAF region 15 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG15_CIDCFGR,RISAF region 15 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG15_ACFGR,RISAF region 15 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG15_ASTARTR,RISAF region 15 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG15_AENDR,RISAF region 15 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG15_ANESTR,RISAF region 15 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG15_BCFGR,RISAF region 15 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG15_BSTARTR,RISAF region 15 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG15_BENDR,RISAF region 15 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG15_BNESTR,RISAF region 15 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" rgroup.long 0xFF0++0xF line.long 0x0 "RISAF_HWCFGR,RISAF hardware configuration register" hexmask.long.byte 0x0 24.--31. 1. "CFG4,Hardware generic 4" hexmask.long.byte 0x0 16.--23. 1. "CFG3,Hardware generic 3" hexmask.long.byte 0x0 8.--15. 1. "CFG2,Hardware generic 2" hexmask.long.byte 0x0 0.--7. 1. "CFG1,Hardware generic 1" line.long 0x4 "RISAF_VERR,RISAF version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,RISAF major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,RISAF minor revision" line.long 0x8 "RISAF_IPIDR,RISAF identification register" hexmask.long 0x8 0.--31. 1. "ID,RISAF identification code" line.long 0xC "RISAF_SIDR,RISAF size identification register" hexmask.long 0xC 0.--31. 1. "SID,RISAF size identification code" tree.end tree "RISAF4" base ad:0x420D0000 group.long 0x0++0x3 line.long 0x0 "RISAF_CR,RISAF configuration register" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x4++0x7 line.long 0x0 "RISAF_SR,RISAF status register" bitfld.long 0x0 2. "ENCDIS,Encryption disabled" "B_0x0,B_0x1" bitfld.long 0x0 1. "KEYRDY,Key ready" "B_0x0,B_0x1" bitfld.long 0x0 0. "KEYVALID,Key valid" "B_0x0,B_0x1" line.long 0x4 "RISAF_IASR,RISAF illegal access status register" bitfld.long 0x4 2. "IAEF1,Illegal access error flag 1" "0,1" bitfld.long 0x4 1. "IAEF0,Illegal access error flag 0" "0,1" bitfld.long 0x4 0. "CAEF,Configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAF_IACR,RISAF illegal access clear register" bitfld.long 0x0 2. "IAEF1,Illegal access error flag 1" "0,1" bitfld.long 0x0 1. "IAEF0,Illegal access error flag 0" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" rgroup.long 0x20++0xF line.long 0x0 "RISAF_IAESR0,RISAF illegal access error status register 0" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,Illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAF_IADDR0,RISAF illegal address register 0" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" line.long 0x8 "RISAF_IAESR1,RISAF illegal access error status register 1" bitfld.long 0x8 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x8 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x8 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "IACID,Illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0xC "RISAF_IADDR1,RISAF illegal address register 1" hexmask.long 0xC 0.--31. 1. "IADD,Illegal address" wgroup.long 0x30++0xF line.long 0x0 "RISAF_KEYR0,RISAF encryption key 0" bitfld.long 0x0 31. "KEY31,Cryptographic key" "0,1" bitfld.long 0x0 30. "KEY30,Cryptographic key" "0,1" bitfld.long 0x0 29. "KEY29,Cryptographic key" "0,1" bitfld.long 0x0 28. "KEY28,Cryptographic key" "0,1" bitfld.long 0x0 27. "KEY27,Cryptographic key" "0,1" bitfld.long 0x0 26. "KEY26,Cryptographic key" "0,1" bitfld.long 0x0 25. "KEY25,Cryptographic key" "0,1" newline bitfld.long 0x0 24. "KEY24,Cryptographic key" "0,1" bitfld.long 0x0 23. "KEY23,Cryptographic key" "0,1" bitfld.long 0x0 22. "KEY22,Cryptographic key" "0,1" bitfld.long 0x0 21. "KEY21,Cryptographic key" "0,1" bitfld.long 0x0 20. "KEY20,Cryptographic key" "0,1" bitfld.long 0x0 19. "KEY19,Cryptographic key" "0,1" bitfld.long 0x0 18. "KEY18,Cryptographic key" "0,1" newline bitfld.long 0x0 17. "KEY17,Cryptographic key" "0,1" bitfld.long 0x0 16. "KEY16,Cryptographic key" "0,1" bitfld.long 0x0 15. "KEY15,Cryptographic key" "0,1" bitfld.long 0x0 14. "KEY14,Cryptographic key" "0,1" bitfld.long 0x0 13. "KEY13,Cryptographic key" "0,1" bitfld.long 0x0 12. "KEY12,Cryptographic key" "0,1" bitfld.long 0x0 11. "KEY11,Cryptographic key" "0,1" newline bitfld.long 0x0 10. "KEY10,Cryptographic key" "0,1" bitfld.long 0x0 9. "KEY9,Cryptographic key" "0,1" bitfld.long 0x0 8. "KEY8,Cryptographic key" "0,1" bitfld.long 0x0 7. "KEY7,Cryptographic key" "0,1" bitfld.long 0x0 6. "KEY6,Cryptographic key" "0,1" bitfld.long 0x0 5. "KEY5,Cryptographic key" "0,1" bitfld.long 0x0 4. "KEY4,Cryptographic key" "0,1" newline bitfld.long 0x0 3. "KEY3,Cryptographic key" "0,1" bitfld.long 0x0 2. "KEY2,Cryptographic key" "0,1" bitfld.long 0x0 1. "KEY1,Cryptographic key" "0,1" bitfld.long 0x0 0. "KEY0,Cryptographic key" "0,1" line.long 0x4 "RISAF_KEYR1,RISAF encryption key 1" bitfld.long 0x4 31. "KEY63,Cryptographic key" "0,1" bitfld.long 0x4 30. "KEY62,Cryptographic key" "0,1" bitfld.long 0x4 29. "KEY61,Cryptographic key" "0,1" bitfld.long 0x4 28. "KEY60,Cryptographic key" "0,1" bitfld.long 0x4 27. "KEY59,Cryptographic key" "0,1" bitfld.long 0x4 26. "KEY58,Cryptographic key" "0,1" bitfld.long 0x4 25. "KEY57,Cryptographic key" "0,1" newline bitfld.long 0x4 24. "KEY56,Cryptographic key" "0,1" bitfld.long 0x4 23. "KEY55,Cryptographic key" "0,1" bitfld.long 0x4 22. "KEY54,Cryptographic key" "0,1" bitfld.long 0x4 21. "KEY53,Cryptographic key" "0,1" bitfld.long 0x4 20. "KEY52,Cryptographic key" "0,1" bitfld.long 0x4 19. "KEY51,Cryptographic key" "0,1" bitfld.long 0x4 18. "KEY50,Cryptographic key" "0,1" newline bitfld.long 0x4 17. "KEY49,Cryptographic key" "0,1" bitfld.long 0x4 16. "KEY48,Cryptographic key" "0,1" bitfld.long 0x4 15. "KEY47,Cryptographic key" "0,1" bitfld.long 0x4 14. "KEY46,Cryptographic key" "0,1" bitfld.long 0x4 13. "KEY45,Cryptographic key" "0,1" bitfld.long 0x4 12. "KEY44,Cryptographic key" "0,1" bitfld.long 0x4 11. "KEY43,Cryptographic key" "0,1" newline bitfld.long 0x4 10. "KEY42,Cryptographic key" "0,1" bitfld.long 0x4 9. "KEY41,Cryptographic key" "0,1" bitfld.long 0x4 8. "KEY40,Cryptographic key" "0,1" bitfld.long 0x4 7. "KEY39,Cryptographic key" "0,1" bitfld.long 0x4 6. "KEY38,Cryptographic key" "0,1" bitfld.long 0x4 5. "KEY37,Cryptographic key" "0,1" bitfld.long 0x4 4. "KEY36,Cryptographic key" "0,1" newline bitfld.long 0x4 3. "KEY35,Cryptographic key" "0,1" bitfld.long 0x4 2. "KEY34,Cryptographic key" "0,1" bitfld.long 0x4 1. "KEY33,Cryptographic key" "0,1" bitfld.long 0x4 0. "KEY32,Cryptographic key" "0,1" line.long 0x8 "RISAF_KEYR2,RISAF encryption key 2" bitfld.long 0x8 31. "KEY95,Cryptographic key" "0,1" bitfld.long 0x8 30. "KEY94,Cryptographic key" "0,1" bitfld.long 0x8 29. "KEY93,Cryptographic key" "0,1" bitfld.long 0x8 28. "KEY92,Cryptographic key" "0,1" bitfld.long 0x8 27. "KEY91,Cryptographic key" "0,1" bitfld.long 0x8 26. "KEY90,Cryptographic key" "0,1" bitfld.long 0x8 25. "KEY89,Cryptographic key" "0,1" newline bitfld.long 0x8 24. "KEY88,Cryptographic key" "0,1" bitfld.long 0x8 23. "KEY87,Cryptographic key" "0,1" bitfld.long 0x8 22. "KEY86,Cryptographic key" "0,1" bitfld.long 0x8 21. "KEY85,Cryptographic key" "0,1" bitfld.long 0x8 20. "KEY84,Cryptographic key" "0,1" bitfld.long 0x8 19. "KEY83,Cryptographic key" "0,1" bitfld.long 0x8 18. "KEY82,Cryptographic key" "0,1" newline bitfld.long 0x8 17. "KEY81,Cryptographic key" "0,1" bitfld.long 0x8 16. "KEY80,Cryptographic key" "0,1" bitfld.long 0x8 15. "KEY79,Cryptographic key" "0,1" bitfld.long 0x8 14. "KEY78,Cryptographic key" "0,1" bitfld.long 0x8 13. "KEY77,Cryptographic key" "0,1" bitfld.long 0x8 12. "KEY76,Cryptographic key" "0,1" bitfld.long 0x8 11. "KEY75,Cryptographic key" "0,1" newline bitfld.long 0x8 10. "KEY74,Cryptographic key" "0,1" bitfld.long 0x8 9. "KEY73,Cryptographic key" "0,1" bitfld.long 0x8 8. "KEY72,Cryptographic key" "0,1" bitfld.long 0x8 7. "KEY71,Cryptographic key" "0,1" bitfld.long 0x8 6. "KEY70,Cryptographic key" "0,1" bitfld.long 0x8 5. "KEY69,Cryptographic key" "0,1" bitfld.long 0x8 4. "KEY68,Cryptographic key" "0,1" newline bitfld.long 0x8 3. "KEY67,Cryptographic key" "0,1" bitfld.long 0x8 2. "KEY66,Cryptographic key" "0,1" bitfld.long 0x8 1. "KEY65,Cryptographic key" "0,1" bitfld.long 0x8 0. "KEY64,Cryptographic key" "0,1" line.long 0xC "RISAF_KEYR3,RISAF encryption key 3" bitfld.long 0xC 31. "KEY127,Cryptographic key" "0,1" bitfld.long 0xC 30. "KEY126,Cryptographic key" "0,1" bitfld.long 0xC 29. "KEY125,Cryptographic key" "0,1" bitfld.long 0xC 28. "KEY124,Cryptographic key" "0,1" bitfld.long 0xC 27. "KEY123,Cryptographic key" "0,1" bitfld.long 0xC 26. "KEY122,Cryptographic key" "0,1" bitfld.long 0xC 25. "KEY121,Cryptographic key" "0,1" newline bitfld.long 0xC 24. "KEY120,Cryptographic key" "0,1" bitfld.long 0xC 23. "KEY119,Cryptographic key" "0,1" bitfld.long 0xC 22. "KEY118,Cryptographic key" "0,1" bitfld.long 0xC 21. "KEY117,Cryptographic key" "0,1" bitfld.long 0xC 20. "KEY116,Cryptographic key" "0,1" bitfld.long 0xC 19. "KEY115,Cryptographic key" "0,1" bitfld.long 0xC 18. "KEY114,Cryptographic key" "0,1" newline bitfld.long 0xC 17. "KEY113,Cryptographic key" "0,1" bitfld.long 0xC 16. "KEY112,Cryptographic key" "0,1" bitfld.long 0xC 15. "KEY111,Cryptographic key" "0,1" bitfld.long 0xC 14. "KEY110,Cryptographic key" "0,1" bitfld.long 0xC 13. "KEY109,Cryptographic key" "0,1" bitfld.long 0xC 12. "KEY108,Cryptographic key" "0,1" bitfld.long 0xC 11. "KEY107,Cryptographic key" "0,1" newline bitfld.long 0xC 10. "KEY106,Cryptographic key" "0,1" bitfld.long 0xC 9. "KEY105,Cryptographic key" "0,1" bitfld.long 0xC 8. "KEY104,Cryptographic key" "0,1" bitfld.long 0xC 7. "KEY103,Cryptographic key" "0,1" bitfld.long 0xC 6. "KEY102,Cryptographic key" "0,1" bitfld.long 0xC 5. "KEY101,Cryptographic key" "0,1" bitfld.long 0xC 4. "KEY100,Cryptographic key" "0,1" newline bitfld.long 0xC 3. "KEY99,Cryptographic key" "0,1" bitfld.long 0xC 2. "KEY98,Cryptographic key" "0,1" bitfld.long 0xC 1. "KEY97,Cryptographic key" "0,1" bitfld.long 0xC 0. "KEY96,Cryptographic key" "0,1" group.long 0x40++0x2F line.long 0x0 "RISAF_REG1_CFGR,RISAF region 1 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG1_STARTR,RISAF region 1 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG1_ENDR,RISAF region 1 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG1_CIDCFGR,RISAF region 1 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG1_ACFGR,RISAF region 1 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG1_ASTARTR,RISAF region 1 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG1_AENDR,RISAF region 1 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG1_ANESTR,RISAF region 1 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG1_BCFGR,RISAF region 1 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG1_BSTARTR,RISAF region 1 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG1_BENDR,RISAF region 1 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG1_BNESTR,RISAF region 1 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x80++0x2F line.long 0x0 "RISAF_REG2_CFGR,RISAF region 2 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG2_STARTR,RISAF region 2 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG2_ENDR,RISAF region 2 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG2_CIDCFGR,RISAF region 2 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG2_ACFGR,RISAF region 2 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG2_ASTARTR,RISAF region 2 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG2_AENDR,RISAF region 2 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG2_ANESTR,RISAF region 2 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG2_BCFGR,RISAF region 2 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG2_BSTARTR,RISAF region 2 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG2_BENDR,RISAF region 2 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG2_BNESTR,RISAF region 2 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0xC0++0x2F line.long 0x0 "RISAF_REG3_CFGR,RISAF region 3 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG3_STARTR,RISAF region 3 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG3_ENDR,RISAF region 3 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG3_CIDCFGR,RISAF region 3 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG3_ACFGR,RISAF region 3 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG3_ASTARTR,RISAF region 3 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG3_AENDR,RISAF region 3 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG3_ANESTR,RISAF region 3 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG3_BCFGR,RISAF region 3 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG3_BSTARTR,RISAF region 3 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG3_BENDR,RISAF region 3 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG3_BNESTR,RISAF region 3 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x100++0x2F line.long 0x0 "RISAF_REG4_CFGR,RISAF region 4 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG4_STARTR,RISAF region 4 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG4_ENDR,RISAF region 4 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG4_CIDCFGR,RISAF region 4 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG4_ACFGR,RISAF region 4 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG4_ASTARTR,RISAF region 4 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG4_AENDR,RISAF region 4 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG4_ANESTR,RISAF region 4 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG4_BCFGR,RISAF region 4 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG4_BSTARTR,RISAF region 4 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG4_BENDR,RISAF region 4 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG4_BNESTR,RISAF region 4 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x140++0x2F line.long 0x0 "RISAF_REG5_CFGR,RISAF region 5 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG5_STARTR,RISAF region 5 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG5_ENDR,RISAF region 5 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG5_CIDCFGR,RISAF region 5 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG5_ACFGR,RISAF region 5 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG5_ASTARTR,RISAF region 5 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG5_AENDR,RISAF region 5 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG5_ANESTR,RISAF region 5 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG5_BCFGR,RISAF region 5 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG5_BSTARTR,RISAF region 5 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG5_BENDR,RISAF region 5 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG5_BNESTR,RISAF region 5 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x180++0x2F line.long 0x0 "RISAF_REG6_CFGR,RISAF region 6 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG6_STARTR,RISAF region 6 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG6_ENDR,RISAF region 6 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG6_CIDCFGR,RISAF region 6 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG6_ACFGR,RISAF region 6 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG6_ASTARTR,RISAF region 6 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG6_AENDR,RISAF region 6 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG6_ANESTR,RISAF region 6 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG6_BCFGR,RISAF region 6 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG6_BSTARTR,RISAF region 6 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG6_BENDR,RISAF region 6 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG6_BNESTR,RISAF region 6 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x1C0++0x2F line.long 0x0 "RISAF_REG7_CFGR,RISAF region 7 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG7_STARTR,RISAF region 7 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG7_ENDR,RISAF region 7 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG7_CIDCFGR,RISAF region 7 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG7_ACFGR,RISAF region 7 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG7_ASTARTR,RISAF region 7 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG7_AENDR,RISAF region 7 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG7_ANESTR,RISAF region 7 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG7_BCFGR,RISAF region 7 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG7_BSTARTR,RISAF region 7 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG7_BENDR,RISAF region 7 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG7_BNESTR,RISAF region 7 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x200++0x2F line.long 0x0 "RISAF_REG8_CFGR,RISAF region 8 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG8_STARTR,RISAF region 8 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG8_ENDR,RISAF region 8 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG8_CIDCFGR,RISAF region 8 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG8_ACFGR,RISAF region 8 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG8_ASTARTR,RISAF region 8 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG8_AENDR,RISAF region 8 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG8_ANESTR,RISAF region 8 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG8_BCFGR,RISAF region 8 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG8_BSTARTR,RISAF region 8 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG8_BENDR,RISAF region 8 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG8_BNESTR,RISAF region 8 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x240++0x2F line.long 0x0 "RISAF_REG9_CFGR,RISAF region 9 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG9_STARTR,RISAF region 9 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG9_ENDR,RISAF region 9 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG9_CIDCFGR,RISAF region 9 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG9_ACFGR,RISAF region 9 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG9_ASTARTR,RISAF region 9 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG9_AENDR,RISAF region 9 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG9_ANESTR,RISAF region 9 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG9_BCFGR,RISAF region 9 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG9_BSTARTR,RISAF region 9 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG9_BENDR,RISAF region 9 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG9_BNESTR,RISAF region 9 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x280++0x2F line.long 0x0 "RISAF_REG10_CFGR,RISAF region 10 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG10_STARTR,RISAF region 10 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG10_ENDR,RISAF region 10 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG10_CIDCFGR,RISAF region 10 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG10_ACFGR,RISAF region 10 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG10_ASTARTR,RISAF region 10 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG10_AENDR,RISAF region 10 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG10_ANESTR,RISAF region 10 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG10_BCFGR,RISAF region 10 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG10_BSTARTR,RISAF region 10 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG10_BENDR,RISAF region 10 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG10_BNESTR,RISAF region 10 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x2C0++0x2F line.long 0x0 "RISAF_REG11_CFGR,RISAF region 11 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG11_STARTR,RISAF region 11 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG11_ENDR,RISAF region 11 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG11_CIDCFGR,RISAF region 11 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG11_ACFGR,RISAF region 11 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG11_ASTARTR,RISAF region 11 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG11_AENDR,RISAF region 11 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG11_ANESTR,RISAF region 11 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG11_BCFGR,RISAF region 11 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG11_BSTARTR,RISAF region 11 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG11_BENDR,RISAF region 11 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG11_BNESTR,RISAF region 11 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x300++0x2F line.long 0x0 "RISAF_REG12_CFGR,RISAF region 12 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG12_STARTR,RISAF region 12 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG12_ENDR,RISAF region 12 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG12_CIDCFGR,RISAF region 12 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG12_ACFGR,RISAF region 12 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG12_ASTARTR,RISAF region 12 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG12_AENDR,RISAF region 12 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG12_ANESTR,RISAF region 12 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG12_BCFGR,RISAF region 12 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG12_BSTARTR,RISAF region 12 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG12_BENDR,RISAF region 12 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG12_BNESTR,RISAF region 12 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x340++0x2F line.long 0x0 "RISAF_REG13_CFGR,RISAF region 13 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG13_STARTR,RISAF region 13 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG13_ENDR,RISAF region 13 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG13_CIDCFGR,RISAF region 13 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG13_ACFGR,RISAF region 13 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG13_ASTARTR,RISAF region 13 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG13_AENDR,RISAF region 13 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG13_ANESTR,RISAF region 13 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG13_BCFGR,RISAF region 13 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG13_BSTARTR,RISAF region 13 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG13_BENDR,RISAF region 13 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG13_BNESTR,RISAF region 13 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x380++0x2F line.long 0x0 "RISAF_REG14_CFGR,RISAF region 14 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG14_STARTR,RISAF region 14 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG14_ENDR,RISAF region 14 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG14_CIDCFGR,RISAF region 14 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG14_ACFGR,RISAF region 14 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG14_ASTARTR,RISAF region 14 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG14_AENDR,RISAF region 14 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG14_ANESTR,RISAF region 14 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG14_BCFGR,RISAF region 14 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG14_BSTARTR,RISAF region 14 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG14_BENDR,RISAF region 14 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG14_BNESTR,RISAF region 14 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x3C0++0x2F line.long 0x0 "RISAF_REG15_CFGR,RISAF region 15 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG15_STARTR,RISAF region 15 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG15_ENDR,RISAF region 15 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG15_CIDCFGR,RISAF region 15 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG15_ACFGR,RISAF region 15 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG15_ASTARTR,RISAF region 15 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG15_AENDR,RISAF region 15 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG15_ANESTR,RISAF region 15 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG15_BCFGR,RISAF region 15 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG15_BSTARTR,RISAF region 15 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG15_BENDR,RISAF region 15 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG15_BNESTR,RISAF region 15 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" rgroup.long 0xFF0++0xF line.long 0x0 "RISAF_HWCFGR,RISAF hardware configuration register" hexmask.long.byte 0x0 24.--31. 1. "CFG4,Hardware generic 4" hexmask.long.byte 0x0 16.--23. 1. "CFG3,Hardware generic 3" hexmask.long.byte 0x0 8.--15. 1. "CFG2,Hardware generic 2" hexmask.long.byte 0x0 0.--7. 1. "CFG1,Hardware generic 1" line.long 0x4 "RISAF_VERR,RISAF version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,RISAF major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,RISAF minor revision" line.long 0x8 "RISAF_IPIDR,RISAF identification register" hexmask.long 0x8 0.--31. 1. "ID,RISAF identification code" line.long 0xC "RISAF_SIDR,RISAF size identification register" hexmask.long 0xC 0.--31. 1. "SID,RISAF size identification code" tree.end tree "RISAF4_S" base ad:0x520D0000 group.long 0x0++0x3 line.long 0x0 "RISAF_CR,RISAF configuration register" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x4++0x7 line.long 0x0 "RISAF_SR,RISAF status register" bitfld.long 0x0 2. "ENCDIS,Encryption disabled" "B_0x0,B_0x1" bitfld.long 0x0 1. "KEYRDY,Key ready" "B_0x0,B_0x1" bitfld.long 0x0 0. "KEYVALID,Key valid" "B_0x0,B_0x1" line.long 0x4 "RISAF_IASR,RISAF illegal access status register" bitfld.long 0x4 2. "IAEF1,Illegal access error flag 1" "0,1" bitfld.long 0x4 1. "IAEF0,Illegal access error flag 0" "0,1" bitfld.long 0x4 0. "CAEF,Configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAF_IACR,RISAF illegal access clear register" bitfld.long 0x0 2. "IAEF1,Illegal access error flag 1" "0,1" bitfld.long 0x0 1. "IAEF0,Illegal access error flag 0" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" rgroup.long 0x20++0xF line.long 0x0 "RISAF_IAESR0,RISAF illegal access error status register 0" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,Illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAF_IADDR0,RISAF illegal address register 0" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" line.long 0x8 "RISAF_IAESR1,RISAF illegal access error status register 1" bitfld.long 0x8 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x8 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x8 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "IACID,Illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0xC "RISAF_IADDR1,RISAF illegal address register 1" hexmask.long 0xC 0.--31. 1. "IADD,Illegal address" wgroup.long 0x30++0xF line.long 0x0 "RISAF_KEYR0,RISAF encryption key 0" bitfld.long 0x0 31. "KEY31,Cryptographic key" "0,1" bitfld.long 0x0 30. "KEY30,Cryptographic key" "0,1" bitfld.long 0x0 29. "KEY29,Cryptographic key" "0,1" bitfld.long 0x0 28. "KEY28,Cryptographic key" "0,1" bitfld.long 0x0 27. "KEY27,Cryptographic key" "0,1" bitfld.long 0x0 26. "KEY26,Cryptographic key" "0,1" bitfld.long 0x0 25. "KEY25,Cryptographic key" "0,1" newline bitfld.long 0x0 24. "KEY24,Cryptographic key" "0,1" bitfld.long 0x0 23. "KEY23,Cryptographic key" "0,1" bitfld.long 0x0 22. "KEY22,Cryptographic key" "0,1" bitfld.long 0x0 21. "KEY21,Cryptographic key" "0,1" bitfld.long 0x0 20. "KEY20,Cryptographic key" "0,1" bitfld.long 0x0 19. "KEY19,Cryptographic key" "0,1" bitfld.long 0x0 18. "KEY18,Cryptographic key" "0,1" newline bitfld.long 0x0 17. "KEY17,Cryptographic key" "0,1" bitfld.long 0x0 16. "KEY16,Cryptographic key" "0,1" bitfld.long 0x0 15. "KEY15,Cryptographic key" "0,1" bitfld.long 0x0 14. "KEY14,Cryptographic key" "0,1" bitfld.long 0x0 13. "KEY13,Cryptographic key" "0,1" bitfld.long 0x0 12. "KEY12,Cryptographic key" "0,1" bitfld.long 0x0 11. "KEY11,Cryptographic key" "0,1" newline bitfld.long 0x0 10. "KEY10,Cryptographic key" "0,1" bitfld.long 0x0 9. "KEY9,Cryptographic key" "0,1" bitfld.long 0x0 8. "KEY8,Cryptographic key" "0,1" bitfld.long 0x0 7. "KEY7,Cryptographic key" "0,1" bitfld.long 0x0 6. "KEY6,Cryptographic key" "0,1" bitfld.long 0x0 5. "KEY5,Cryptographic key" "0,1" bitfld.long 0x0 4. "KEY4,Cryptographic key" "0,1" newline bitfld.long 0x0 3. "KEY3,Cryptographic key" "0,1" bitfld.long 0x0 2. "KEY2,Cryptographic key" "0,1" bitfld.long 0x0 1. "KEY1,Cryptographic key" "0,1" bitfld.long 0x0 0. "KEY0,Cryptographic key" "0,1" line.long 0x4 "RISAF_KEYR1,RISAF encryption key 1" bitfld.long 0x4 31. "KEY63,Cryptographic key" "0,1" bitfld.long 0x4 30. "KEY62,Cryptographic key" "0,1" bitfld.long 0x4 29. "KEY61,Cryptographic key" "0,1" bitfld.long 0x4 28. "KEY60,Cryptographic key" "0,1" bitfld.long 0x4 27. "KEY59,Cryptographic key" "0,1" bitfld.long 0x4 26. "KEY58,Cryptographic key" "0,1" bitfld.long 0x4 25. "KEY57,Cryptographic key" "0,1" newline bitfld.long 0x4 24. "KEY56,Cryptographic key" "0,1" bitfld.long 0x4 23. "KEY55,Cryptographic key" "0,1" bitfld.long 0x4 22. "KEY54,Cryptographic key" "0,1" bitfld.long 0x4 21. "KEY53,Cryptographic key" "0,1" bitfld.long 0x4 20. "KEY52,Cryptographic key" "0,1" bitfld.long 0x4 19. "KEY51,Cryptographic key" "0,1" bitfld.long 0x4 18. "KEY50,Cryptographic key" "0,1" newline bitfld.long 0x4 17. "KEY49,Cryptographic key" "0,1" bitfld.long 0x4 16. "KEY48,Cryptographic key" "0,1" bitfld.long 0x4 15. "KEY47,Cryptographic key" "0,1" bitfld.long 0x4 14. "KEY46,Cryptographic key" "0,1" bitfld.long 0x4 13. "KEY45,Cryptographic key" "0,1" bitfld.long 0x4 12. "KEY44,Cryptographic key" "0,1" bitfld.long 0x4 11. "KEY43,Cryptographic key" "0,1" newline bitfld.long 0x4 10. "KEY42,Cryptographic key" "0,1" bitfld.long 0x4 9. "KEY41,Cryptographic key" "0,1" bitfld.long 0x4 8. "KEY40,Cryptographic key" "0,1" bitfld.long 0x4 7. "KEY39,Cryptographic key" "0,1" bitfld.long 0x4 6. "KEY38,Cryptographic key" "0,1" bitfld.long 0x4 5. "KEY37,Cryptographic key" "0,1" bitfld.long 0x4 4. "KEY36,Cryptographic key" "0,1" newline bitfld.long 0x4 3. "KEY35,Cryptographic key" "0,1" bitfld.long 0x4 2. "KEY34,Cryptographic key" "0,1" bitfld.long 0x4 1. "KEY33,Cryptographic key" "0,1" bitfld.long 0x4 0. "KEY32,Cryptographic key" "0,1" line.long 0x8 "RISAF_KEYR2,RISAF encryption key 2" bitfld.long 0x8 31. "KEY95,Cryptographic key" "0,1" bitfld.long 0x8 30. "KEY94,Cryptographic key" "0,1" bitfld.long 0x8 29. "KEY93,Cryptographic key" "0,1" bitfld.long 0x8 28. "KEY92,Cryptographic key" "0,1" bitfld.long 0x8 27. "KEY91,Cryptographic key" "0,1" bitfld.long 0x8 26. "KEY90,Cryptographic key" "0,1" bitfld.long 0x8 25. "KEY89,Cryptographic key" "0,1" newline bitfld.long 0x8 24. "KEY88,Cryptographic key" "0,1" bitfld.long 0x8 23. "KEY87,Cryptographic key" "0,1" bitfld.long 0x8 22. "KEY86,Cryptographic key" "0,1" bitfld.long 0x8 21. "KEY85,Cryptographic key" "0,1" bitfld.long 0x8 20. "KEY84,Cryptographic key" "0,1" bitfld.long 0x8 19. "KEY83,Cryptographic key" "0,1" bitfld.long 0x8 18. "KEY82,Cryptographic key" "0,1" newline bitfld.long 0x8 17. "KEY81,Cryptographic key" "0,1" bitfld.long 0x8 16. "KEY80,Cryptographic key" "0,1" bitfld.long 0x8 15. "KEY79,Cryptographic key" "0,1" bitfld.long 0x8 14. "KEY78,Cryptographic key" "0,1" bitfld.long 0x8 13. "KEY77,Cryptographic key" "0,1" bitfld.long 0x8 12. "KEY76,Cryptographic key" "0,1" bitfld.long 0x8 11. "KEY75,Cryptographic key" "0,1" newline bitfld.long 0x8 10. "KEY74,Cryptographic key" "0,1" bitfld.long 0x8 9. "KEY73,Cryptographic key" "0,1" bitfld.long 0x8 8. "KEY72,Cryptographic key" "0,1" bitfld.long 0x8 7. "KEY71,Cryptographic key" "0,1" bitfld.long 0x8 6. "KEY70,Cryptographic key" "0,1" bitfld.long 0x8 5. "KEY69,Cryptographic key" "0,1" bitfld.long 0x8 4. "KEY68,Cryptographic key" "0,1" newline bitfld.long 0x8 3. "KEY67,Cryptographic key" "0,1" bitfld.long 0x8 2. "KEY66,Cryptographic key" "0,1" bitfld.long 0x8 1. "KEY65,Cryptographic key" "0,1" bitfld.long 0x8 0. "KEY64,Cryptographic key" "0,1" line.long 0xC "RISAF_KEYR3,RISAF encryption key 3" bitfld.long 0xC 31. "KEY127,Cryptographic key" "0,1" bitfld.long 0xC 30. "KEY126,Cryptographic key" "0,1" bitfld.long 0xC 29. "KEY125,Cryptographic key" "0,1" bitfld.long 0xC 28. "KEY124,Cryptographic key" "0,1" bitfld.long 0xC 27. "KEY123,Cryptographic key" "0,1" bitfld.long 0xC 26. "KEY122,Cryptographic key" "0,1" bitfld.long 0xC 25. "KEY121,Cryptographic key" "0,1" newline bitfld.long 0xC 24. "KEY120,Cryptographic key" "0,1" bitfld.long 0xC 23. "KEY119,Cryptographic key" "0,1" bitfld.long 0xC 22. "KEY118,Cryptographic key" "0,1" bitfld.long 0xC 21. "KEY117,Cryptographic key" "0,1" bitfld.long 0xC 20. "KEY116,Cryptographic key" "0,1" bitfld.long 0xC 19. "KEY115,Cryptographic key" "0,1" bitfld.long 0xC 18. "KEY114,Cryptographic key" "0,1" newline bitfld.long 0xC 17. "KEY113,Cryptographic key" "0,1" bitfld.long 0xC 16. "KEY112,Cryptographic key" "0,1" bitfld.long 0xC 15. "KEY111,Cryptographic key" "0,1" bitfld.long 0xC 14. "KEY110,Cryptographic key" "0,1" bitfld.long 0xC 13. "KEY109,Cryptographic key" "0,1" bitfld.long 0xC 12. "KEY108,Cryptographic key" "0,1" bitfld.long 0xC 11. "KEY107,Cryptographic key" "0,1" newline bitfld.long 0xC 10. "KEY106,Cryptographic key" "0,1" bitfld.long 0xC 9. "KEY105,Cryptographic key" "0,1" bitfld.long 0xC 8. "KEY104,Cryptographic key" "0,1" bitfld.long 0xC 7. "KEY103,Cryptographic key" "0,1" bitfld.long 0xC 6. "KEY102,Cryptographic key" "0,1" bitfld.long 0xC 5. "KEY101,Cryptographic key" "0,1" bitfld.long 0xC 4. "KEY100,Cryptographic key" "0,1" newline bitfld.long 0xC 3. "KEY99,Cryptographic key" "0,1" bitfld.long 0xC 2. "KEY98,Cryptographic key" "0,1" bitfld.long 0xC 1. "KEY97,Cryptographic key" "0,1" bitfld.long 0xC 0. "KEY96,Cryptographic key" "0,1" group.long 0x40++0x2F line.long 0x0 "RISAF_REG1_CFGR,RISAF region 1 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG1_STARTR,RISAF region 1 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG1_ENDR,RISAF region 1 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG1_CIDCFGR,RISAF region 1 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG1_ACFGR,RISAF region 1 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG1_ASTARTR,RISAF region 1 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG1_AENDR,RISAF region 1 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG1_ANESTR,RISAF region 1 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG1_BCFGR,RISAF region 1 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG1_BSTARTR,RISAF region 1 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG1_BENDR,RISAF region 1 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG1_BNESTR,RISAF region 1 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x80++0x2F line.long 0x0 "RISAF_REG2_CFGR,RISAF region 2 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG2_STARTR,RISAF region 2 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG2_ENDR,RISAF region 2 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG2_CIDCFGR,RISAF region 2 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG2_ACFGR,RISAF region 2 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG2_ASTARTR,RISAF region 2 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG2_AENDR,RISAF region 2 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG2_ANESTR,RISAF region 2 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG2_BCFGR,RISAF region 2 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG2_BSTARTR,RISAF region 2 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG2_BENDR,RISAF region 2 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG2_BNESTR,RISAF region 2 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0xC0++0x2F line.long 0x0 "RISAF_REG3_CFGR,RISAF region 3 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG3_STARTR,RISAF region 3 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG3_ENDR,RISAF region 3 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG3_CIDCFGR,RISAF region 3 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG3_ACFGR,RISAF region 3 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG3_ASTARTR,RISAF region 3 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG3_AENDR,RISAF region 3 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG3_ANESTR,RISAF region 3 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG3_BCFGR,RISAF region 3 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG3_BSTARTR,RISAF region 3 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG3_BENDR,RISAF region 3 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG3_BNESTR,RISAF region 3 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x100++0x2F line.long 0x0 "RISAF_REG4_CFGR,RISAF region 4 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG4_STARTR,RISAF region 4 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG4_ENDR,RISAF region 4 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG4_CIDCFGR,RISAF region 4 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG4_ACFGR,RISAF region 4 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG4_ASTARTR,RISAF region 4 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG4_AENDR,RISAF region 4 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG4_ANESTR,RISAF region 4 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG4_BCFGR,RISAF region 4 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG4_BSTARTR,RISAF region 4 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG4_BENDR,RISAF region 4 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG4_BNESTR,RISAF region 4 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x140++0x2F line.long 0x0 "RISAF_REG5_CFGR,RISAF region 5 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG5_STARTR,RISAF region 5 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG5_ENDR,RISAF region 5 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG5_CIDCFGR,RISAF region 5 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG5_ACFGR,RISAF region 5 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG5_ASTARTR,RISAF region 5 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG5_AENDR,RISAF region 5 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG5_ANESTR,RISAF region 5 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG5_BCFGR,RISAF region 5 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG5_BSTARTR,RISAF region 5 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG5_BENDR,RISAF region 5 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG5_BNESTR,RISAF region 5 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x180++0x2F line.long 0x0 "RISAF_REG6_CFGR,RISAF region 6 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG6_STARTR,RISAF region 6 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG6_ENDR,RISAF region 6 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG6_CIDCFGR,RISAF region 6 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG6_ACFGR,RISAF region 6 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG6_ASTARTR,RISAF region 6 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG6_AENDR,RISAF region 6 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG6_ANESTR,RISAF region 6 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG6_BCFGR,RISAF region 6 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG6_BSTARTR,RISAF region 6 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG6_BENDR,RISAF region 6 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG6_BNESTR,RISAF region 6 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x1C0++0x2F line.long 0x0 "RISAF_REG7_CFGR,RISAF region 7 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG7_STARTR,RISAF region 7 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG7_ENDR,RISAF region 7 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG7_CIDCFGR,RISAF region 7 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG7_ACFGR,RISAF region 7 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG7_ASTARTR,RISAF region 7 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG7_AENDR,RISAF region 7 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG7_ANESTR,RISAF region 7 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG7_BCFGR,RISAF region 7 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG7_BSTARTR,RISAF region 7 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG7_BENDR,RISAF region 7 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG7_BNESTR,RISAF region 7 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x200++0x2F line.long 0x0 "RISAF_REG8_CFGR,RISAF region 8 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG8_STARTR,RISAF region 8 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG8_ENDR,RISAF region 8 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG8_CIDCFGR,RISAF region 8 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG8_ACFGR,RISAF region 8 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG8_ASTARTR,RISAF region 8 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG8_AENDR,RISAF region 8 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG8_ANESTR,RISAF region 8 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG8_BCFGR,RISAF region 8 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG8_BSTARTR,RISAF region 8 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG8_BENDR,RISAF region 8 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG8_BNESTR,RISAF region 8 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x240++0x2F line.long 0x0 "RISAF_REG9_CFGR,RISAF region 9 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG9_STARTR,RISAF region 9 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG9_ENDR,RISAF region 9 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG9_CIDCFGR,RISAF region 9 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG9_ACFGR,RISAF region 9 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG9_ASTARTR,RISAF region 9 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG9_AENDR,RISAF region 9 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG9_ANESTR,RISAF region 9 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG9_BCFGR,RISAF region 9 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG9_BSTARTR,RISAF region 9 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG9_BENDR,RISAF region 9 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG9_BNESTR,RISAF region 9 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x280++0x2F line.long 0x0 "RISAF_REG10_CFGR,RISAF region 10 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG10_STARTR,RISAF region 10 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG10_ENDR,RISAF region 10 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG10_CIDCFGR,RISAF region 10 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG10_ACFGR,RISAF region 10 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG10_ASTARTR,RISAF region 10 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG10_AENDR,RISAF region 10 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG10_ANESTR,RISAF region 10 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG10_BCFGR,RISAF region 10 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG10_BSTARTR,RISAF region 10 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG10_BENDR,RISAF region 10 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG10_BNESTR,RISAF region 10 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x2C0++0x2F line.long 0x0 "RISAF_REG11_CFGR,RISAF region 11 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG11_STARTR,RISAF region 11 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG11_ENDR,RISAF region 11 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG11_CIDCFGR,RISAF region 11 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG11_ACFGR,RISAF region 11 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG11_ASTARTR,RISAF region 11 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG11_AENDR,RISAF region 11 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG11_ANESTR,RISAF region 11 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG11_BCFGR,RISAF region 11 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG11_BSTARTR,RISAF region 11 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG11_BENDR,RISAF region 11 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG11_BNESTR,RISAF region 11 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x300++0x2F line.long 0x0 "RISAF_REG12_CFGR,RISAF region 12 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG12_STARTR,RISAF region 12 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG12_ENDR,RISAF region 12 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG12_CIDCFGR,RISAF region 12 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG12_ACFGR,RISAF region 12 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG12_ASTARTR,RISAF region 12 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG12_AENDR,RISAF region 12 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG12_ANESTR,RISAF region 12 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG12_BCFGR,RISAF region 12 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG12_BSTARTR,RISAF region 12 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG12_BENDR,RISAF region 12 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG12_BNESTR,RISAF region 12 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x340++0x2F line.long 0x0 "RISAF_REG13_CFGR,RISAF region 13 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG13_STARTR,RISAF region 13 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG13_ENDR,RISAF region 13 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG13_CIDCFGR,RISAF region 13 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG13_ACFGR,RISAF region 13 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG13_ASTARTR,RISAF region 13 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG13_AENDR,RISAF region 13 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG13_ANESTR,RISAF region 13 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG13_BCFGR,RISAF region 13 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG13_BSTARTR,RISAF region 13 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG13_BENDR,RISAF region 13 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG13_BNESTR,RISAF region 13 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x380++0x2F line.long 0x0 "RISAF_REG14_CFGR,RISAF region 14 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG14_STARTR,RISAF region 14 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG14_ENDR,RISAF region 14 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG14_CIDCFGR,RISAF region 14 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG14_ACFGR,RISAF region 14 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG14_ASTARTR,RISAF region 14 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG14_AENDR,RISAF region 14 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG14_ANESTR,RISAF region 14 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG14_BCFGR,RISAF region 14 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG14_BSTARTR,RISAF region 14 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG14_BENDR,RISAF region 14 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG14_BNESTR,RISAF region 14 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x3C0++0x2F line.long 0x0 "RISAF_REG15_CFGR,RISAF region 15 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG15_STARTR,RISAF region 15 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG15_ENDR,RISAF region 15 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG15_CIDCFGR,RISAF region 15 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG15_ACFGR,RISAF region 15 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG15_ASTARTR,RISAF region 15 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG15_AENDR,RISAF region 15 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG15_ANESTR,RISAF region 15 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG15_BCFGR,RISAF region 15 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG15_BSTARTR,RISAF region 15 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG15_BENDR,RISAF region 15 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG15_BNESTR,RISAF region 15 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" rgroup.long 0xFF0++0xF line.long 0x0 "RISAF_HWCFGR,RISAF hardware configuration register" hexmask.long.byte 0x0 24.--31. 1. "CFG4,Hardware generic 4" hexmask.long.byte 0x0 16.--23. 1. "CFG3,Hardware generic 3" hexmask.long.byte 0x0 8.--15. 1. "CFG2,Hardware generic 2" hexmask.long.byte 0x0 0.--7. 1. "CFG1,Hardware generic 1" line.long 0x4 "RISAF_VERR,RISAF version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,RISAF major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,RISAF minor revision" line.long 0x8 "RISAF_IPIDR,RISAF identification register" hexmask.long 0x8 0.--31. 1. "ID,RISAF identification code" line.long 0xC "RISAF_SIDR,RISAF size identification register" hexmask.long 0xC 0.--31. 1. "SID,RISAF size identification code" tree.end tree "RISAF5" base ad:0x420E0000 group.long 0x0++0x3 line.long 0x0 "RISAF_CR,RISAF configuration register" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x4++0x7 line.long 0x0 "RISAF_SR,RISAF status register" bitfld.long 0x0 2. "ENCDIS,Encryption disabled" "B_0x0,B_0x1" bitfld.long 0x0 1. "KEYRDY,Key ready" "B_0x0,B_0x1" bitfld.long 0x0 0. "KEYVALID,Key valid" "B_0x0,B_0x1" line.long 0x4 "RISAF_IASR,RISAF illegal access status register" bitfld.long 0x4 2. "IAEF1,Illegal access error flag 1" "0,1" bitfld.long 0x4 1. "IAEF0,Illegal access error flag 0" "0,1" bitfld.long 0x4 0. "CAEF,Configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAF_IACR,RISAF illegal access clear register" bitfld.long 0x0 2. "IAEF1,Illegal access error flag 1" "0,1" bitfld.long 0x0 1. "IAEF0,Illegal access error flag 0" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" rgroup.long 0x20++0xF line.long 0x0 "RISAF_IAESR0,RISAF illegal access error status register 0" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,Illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAF_IADDR0,RISAF illegal address register 0" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" line.long 0x8 "RISAF_IAESR1,RISAF illegal access error status register 1" bitfld.long 0x8 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x8 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x8 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "IACID,Illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0xC "RISAF_IADDR1,RISAF illegal address register 1" hexmask.long 0xC 0.--31. 1. "IADD,Illegal address" wgroup.long 0x30++0xF line.long 0x0 "RISAF_KEYR0,RISAF encryption key 0" bitfld.long 0x0 31. "KEY31,Cryptographic key" "0,1" bitfld.long 0x0 30. "KEY30,Cryptographic key" "0,1" bitfld.long 0x0 29. "KEY29,Cryptographic key" "0,1" bitfld.long 0x0 28. "KEY28,Cryptographic key" "0,1" bitfld.long 0x0 27. "KEY27,Cryptographic key" "0,1" bitfld.long 0x0 26. "KEY26,Cryptographic key" "0,1" bitfld.long 0x0 25. "KEY25,Cryptographic key" "0,1" newline bitfld.long 0x0 24. "KEY24,Cryptographic key" "0,1" bitfld.long 0x0 23. "KEY23,Cryptographic key" "0,1" bitfld.long 0x0 22. "KEY22,Cryptographic key" "0,1" bitfld.long 0x0 21. "KEY21,Cryptographic key" "0,1" bitfld.long 0x0 20. "KEY20,Cryptographic key" "0,1" bitfld.long 0x0 19. "KEY19,Cryptographic key" "0,1" bitfld.long 0x0 18. "KEY18,Cryptographic key" "0,1" newline bitfld.long 0x0 17. "KEY17,Cryptographic key" "0,1" bitfld.long 0x0 16. "KEY16,Cryptographic key" "0,1" bitfld.long 0x0 15. "KEY15,Cryptographic key" "0,1" bitfld.long 0x0 14. "KEY14,Cryptographic key" "0,1" bitfld.long 0x0 13. "KEY13,Cryptographic key" "0,1" bitfld.long 0x0 12. "KEY12,Cryptographic key" "0,1" bitfld.long 0x0 11. "KEY11,Cryptographic key" "0,1" newline bitfld.long 0x0 10. "KEY10,Cryptographic key" "0,1" bitfld.long 0x0 9. "KEY9,Cryptographic key" "0,1" bitfld.long 0x0 8. "KEY8,Cryptographic key" "0,1" bitfld.long 0x0 7. "KEY7,Cryptographic key" "0,1" bitfld.long 0x0 6. "KEY6,Cryptographic key" "0,1" bitfld.long 0x0 5. "KEY5,Cryptographic key" "0,1" bitfld.long 0x0 4. "KEY4,Cryptographic key" "0,1" newline bitfld.long 0x0 3. "KEY3,Cryptographic key" "0,1" bitfld.long 0x0 2. "KEY2,Cryptographic key" "0,1" bitfld.long 0x0 1. "KEY1,Cryptographic key" "0,1" bitfld.long 0x0 0. "KEY0,Cryptographic key" "0,1" line.long 0x4 "RISAF_KEYR1,RISAF encryption key 1" bitfld.long 0x4 31. "KEY63,Cryptographic key" "0,1" bitfld.long 0x4 30. "KEY62,Cryptographic key" "0,1" bitfld.long 0x4 29. "KEY61,Cryptographic key" "0,1" bitfld.long 0x4 28. "KEY60,Cryptographic key" "0,1" bitfld.long 0x4 27. "KEY59,Cryptographic key" "0,1" bitfld.long 0x4 26. "KEY58,Cryptographic key" "0,1" bitfld.long 0x4 25. "KEY57,Cryptographic key" "0,1" newline bitfld.long 0x4 24. "KEY56,Cryptographic key" "0,1" bitfld.long 0x4 23. "KEY55,Cryptographic key" "0,1" bitfld.long 0x4 22. "KEY54,Cryptographic key" "0,1" bitfld.long 0x4 21. "KEY53,Cryptographic key" "0,1" bitfld.long 0x4 20. "KEY52,Cryptographic key" "0,1" bitfld.long 0x4 19. "KEY51,Cryptographic key" "0,1" bitfld.long 0x4 18. "KEY50,Cryptographic key" "0,1" newline bitfld.long 0x4 17. "KEY49,Cryptographic key" "0,1" bitfld.long 0x4 16. "KEY48,Cryptographic key" "0,1" bitfld.long 0x4 15. "KEY47,Cryptographic key" "0,1" bitfld.long 0x4 14. "KEY46,Cryptographic key" "0,1" bitfld.long 0x4 13. "KEY45,Cryptographic key" "0,1" bitfld.long 0x4 12. "KEY44,Cryptographic key" "0,1" bitfld.long 0x4 11. "KEY43,Cryptographic key" "0,1" newline bitfld.long 0x4 10. "KEY42,Cryptographic key" "0,1" bitfld.long 0x4 9. "KEY41,Cryptographic key" "0,1" bitfld.long 0x4 8. "KEY40,Cryptographic key" "0,1" bitfld.long 0x4 7. "KEY39,Cryptographic key" "0,1" bitfld.long 0x4 6. "KEY38,Cryptographic key" "0,1" bitfld.long 0x4 5. "KEY37,Cryptographic key" "0,1" bitfld.long 0x4 4. "KEY36,Cryptographic key" "0,1" newline bitfld.long 0x4 3. "KEY35,Cryptographic key" "0,1" bitfld.long 0x4 2. "KEY34,Cryptographic key" "0,1" bitfld.long 0x4 1. "KEY33,Cryptographic key" "0,1" bitfld.long 0x4 0. "KEY32,Cryptographic key" "0,1" line.long 0x8 "RISAF_KEYR2,RISAF encryption key 2" bitfld.long 0x8 31. "KEY95,Cryptographic key" "0,1" bitfld.long 0x8 30. "KEY94,Cryptographic key" "0,1" bitfld.long 0x8 29. "KEY93,Cryptographic key" "0,1" bitfld.long 0x8 28. "KEY92,Cryptographic key" "0,1" bitfld.long 0x8 27. "KEY91,Cryptographic key" "0,1" bitfld.long 0x8 26. "KEY90,Cryptographic key" "0,1" bitfld.long 0x8 25. "KEY89,Cryptographic key" "0,1" newline bitfld.long 0x8 24. "KEY88,Cryptographic key" "0,1" bitfld.long 0x8 23. "KEY87,Cryptographic key" "0,1" bitfld.long 0x8 22. "KEY86,Cryptographic key" "0,1" bitfld.long 0x8 21. "KEY85,Cryptographic key" "0,1" bitfld.long 0x8 20. "KEY84,Cryptographic key" "0,1" bitfld.long 0x8 19. "KEY83,Cryptographic key" "0,1" bitfld.long 0x8 18. "KEY82,Cryptographic key" "0,1" newline bitfld.long 0x8 17. "KEY81,Cryptographic key" "0,1" bitfld.long 0x8 16. "KEY80,Cryptographic key" "0,1" bitfld.long 0x8 15. "KEY79,Cryptographic key" "0,1" bitfld.long 0x8 14. "KEY78,Cryptographic key" "0,1" bitfld.long 0x8 13. "KEY77,Cryptographic key" "0,1" bitfld.long 0x8 12. "KEY76,Cryptographic key" "0,1" bitfld.long 0x8 11. "KEY75,Cryptographic key" "0,1" newline bitfld.long 0x8 10. "KEY74,Cryptographic key" "0,1" bitfld.long 0x8 9. "KEY73,Cryptographic key" "0,1" bitfld.long 0x8 8. "KEY72,Cryptographic key" "0,1" bitfld.long 0x8 7. "KEY71,Cryptographic key" "0,1" bitfld.long 0x8 6. "KEY70,Cryptographic key" "0,1" bitfld.long 0x8 5. "KEY69,Cryptographic key" "0,1" bitfld.long 0x8 4. "KEY68,Cryptographic key" "0,1" newline bitfld.long 0x8 3. "KEY67,Cryptographic key" "0,1" bitfld.long 0x8 2. "KEY66,Cryptographic key" "0,1" bitfld.long 0x8 1. "KEY65,Cryptographic key" "0,1" bitfld.long 0x8 0. "KEY64,Cryptographic key" "0,1" line.long 0xC "RISAF_KEYR3,RISAF encryption key 3" bitfld.long 0xC 31. "KEY127,Cryptographic key" "0,1" bitfld.long 0xC 30. "KEY126,Cryptographic key" "0,1" bitfld.long 0xC 29. "KEY125,Cryptographic key" "0,1" bitfld.long 0xC 28. "KEY124,Cryptographic key" "0,1" bitfld.long 0xC 27. "KEY123,Cryptographic key" "0,1" bitfld.long 0xC 26. "KEY122,Cryptographic key" "0,1" bitfld.long 0xC 25. "KEY121,Cryptographic key" "0,1" newline bitfld.long 0xC 24. "KEY120,Cryptographic key" "0,1" bitfld.long 0xC 23. "KEY119,Cryptographic key" "0,1" bitfld.long 0xC 22. "KEY118,Cryptographic key" "0,1" bitfld.long 0xC 21. "KEY117,Cryptographic key" "0,1" bitfld.long 0xC 20. "KEY116,Cryptographic key" "0,1" bitfld.long 0xC 19. "KEY115,Cryptographic key" "0,1" bitfld.long 0xC 18. "KEY114,Cryptographic key" "0,1" newline bitfld.long 0xC 17. "KEY113,Cryptographic key" "0,1" bitfld.long 0xC 16. "KEY112,Cryptographic key" "0,1" bitfld.long 0xC 15. "KEY111,Cryptographic key" "0,1" bitfld.long 0xC 14. "KEY110,Cryptographic key" "0,1" bitfld.long 0xC 13. "KEY109,Cryptographic key" "0,1" bitfld.long 0xC 12. "KEY108,Cryptographic key" "0,1" bitfld.long 0xC 11. "KEY107,Cryptographic key" "0,1" newline bitfld.long 0xC 10. "KEY106,Cryptographic key" "0,1" bitfld.long 0xC 9. "KEY105,Cryptographic key" "0,1" bitfld.long 0xC 8. "KEY104,Cryptographic key" "0,1" bitfld.long 0xC 7. "KEY103,Cryptographic key" "0,1" bitfld.long 0xC 6. "KEY102,Cryptographic key" "0,1" bitfld.long 0xC 5. "KEY101,Cryptographic key" "0,1" bitfld.long 0xC 4. "KEY100,Cryptographic key" "0,1" newline bitfld.long 0xC 3. "KEY99,Cryptographic key" "0,1" bitfld.long 0xC 2. "KEY98,Cryptographic key" "0,1" bitfld.long 0xC 1. "KEY97,Cryptographic key" "0,1" bitfld.long 0xC 0. "KEY96,Cryptographic key" "0,1" group.long 0x40++0x2F line.long 0x0 "RISAF_REG1_CFGR,RISAF region 1 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG1_STARTR,RISAF region 1 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG1_ENDR,RISAF region 1 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG1_CIDCFGR,RISAF region 1 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG1_ACFGR,RISAF region 1 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG1_ASTARTR,RISAF region 1 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG1_AENDR,RISAF region 1 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG1_ANESTR,RISAF region 1 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG1_BCFGR,RISAF region 1 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG1_BSTARTR,RISAF region 1 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG1_BENDR,RISAF region 1 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG1_BNESTR,RISAF region 1 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x80++0x2F line.long 0x0 "RISAF_REG2_CFGR,RISAF region 2 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG2_STARTR,RISAF region 2 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG2_ENDR,RISAF region 2 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG2_CIDCFGR,RISAF region 2 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG2_ACFGR,RISAF region 2 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG2_ASTARTR,RISAF region 2 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG2_AENDR,RISAF region 2 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG2_ANESTR,RISAF region 2 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG2_BCFGR,RISAF region 2 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG2_BSTARTR,RISAF region 2 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG2_BENDR,RISAF region 2 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG2_BNESTR,RISAF region 2 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0xC0++0x2F line.long 0x0 "RISAF_REG3_CFGR,RISAF region 3 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG3_STARTR,RISAF region 3 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG3_ENDR,RISAF region 3 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG3_CIDCFGR,RISAF region 3 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG3_ACFGR,RISAF region 3 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG3_ASTARTR,RISAF region 3 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG3_AENDR,RISAF region 3 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG3_ANESTR,RISAF region 3 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG3_BCFGR,RISAF region 3 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG3_BSTARTR,RISAF region 3 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG3_BENDR,RISAF region 3 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG3_BNESTR,RISAF region 3 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x100++0x2F line.long 0x0 "RISAF_REG4_CFGR,RISAF region 4 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG4_STARTR,RISAF region 4 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG4_ENDR,RISAF region 4 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG4_CIDCFGR,RISAF region 4 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG4_ACFGR,RISAF region 4 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG4_ASTARTR,RISAF region 4 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG4_AENDR,RISAF region 4 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG4_ANESTR,RISAF region 4 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG4_BCFGR,RISAF region 4 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG4_BSTARTR,RISAF region 4 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG4_BENDR,RISAF region 4 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG4_BNESTR,RISAF region 4 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x140++0x2F line.long 0x0 "RISAF_REG5_CFGR,RISAF region 5 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG5_STARTR,RISAF region 5 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG5_ENDR,RISAF region 5 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG5_CIDCFGR,RISAF region 5 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG5_ACFGR,RISAF region 5 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG5_ASTARTR,RISAF region 5 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG5_AENDR,RISAF region 5 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG5_ANESTR,RISAF region 5 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG5_BCFGR,RISAF region 5 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG5_BSTARTR,RISAF region 5 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG5_BENDR,RISAF region 5 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG5_BNESTR,RISAF region 5 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x180++0x2F line.long 0x0 "RISAF_REG6_CFGR,RISAF region 6 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG6_STARTR,RISAF region 6 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG6_ENDR,RISAF region 6 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG6_CIDCFGR,RISAF region 6 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG6_ACFGR,RISAF region 6 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG6_ASTARTR,RISAF region 6 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG6_AENDR,RISAF region 6 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG6_ANESTR,RISAF region 6 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG6_BCFGR,RISAF region 6 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG6_BSTARTR,RISAF region 6 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG6_BENDR,RISAF region 6 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG6_BNESTR,RISAF region 6 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x1C0++0x2F line.long 0x0 "RISAF_REG7_CFGR,RISAF region 7 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG7_STARTR,RISAF region 7 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG7_ENDR,RISAF region 7 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG7_CIDCFGR,RISAF region 7 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG7_ACFGR,RISAF region 7 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG7_ASTARTR,RISAF region 7 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG7_AENDR,RISAF region 7 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG7_ANESTR,RISAF region 7 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG7_BCFGR,RISAF region 7 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG7_BSTARTR,RISAF region 7 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG7_BENDR,RISAF region 7 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG7_BNESTR,RISAF region 7 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x200++0x2F line.long 0x0 "RISAF_REG8_CFGR,RISAF region 8 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG8_STARTR,RISAF region 8 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG8_ENDR,RISAF region 8 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG8_CIDCFGR,RISAF region 8 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG8_ACFGR,RISAF region 8 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG8_ASTARTR,RISAF region 8 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG8_AENDR,RISAF region 8 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG8_ANESTR,RISAF region 8 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG8_BCFGR,RISAF region 8 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG8_BSTARTR,RISAF region 8 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG8_BENDR,RISAF region 8 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG8_BNESTR,RISAF region 8 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x240++0x2F line.long 0x0 "RISAF_REG9_CFGR,RISAF region 9 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG9_STARTR,RISAF region 9 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG9_ENDR,RISAF region 9 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG9_CIDCFGR,RISAF region 9 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG9_ACFGR,RISAF region 9 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG9_ASTARTR,RISAF region 9 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG9_AENDR,RISAF region 9 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG9_ANESTR,RISAF region 9 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG9_BCFGR,RISAF region 9 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG9_BSTARTR,RISAF region 9 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG9_BENDR,RISAF region 9 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG9_BNESTR,RISAF region 9 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x280++0x2F line.long 0x0 "RISAF_REG10_CFGR,RISAF region 10 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG10_STARTR,RISAF region 10 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG10_ENDR,RISAF region 10 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG10_CIDCFGR,RISAF region 10 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG10_ACFGR,RISAF region 10 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG10_ASTARTR,RISAF region 10 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG10_AENDR,RISAF region 10 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG10_ANESTR,RISAF region 10 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG10_BCFGR,RISAF region 10 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG10_BSTARTR,RISAF region 10 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG10_BENDR,RISAF region 10 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG10_BNESTR,RISAF region 10 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x2C0++0x2F line.long 0x0 "RISAF_REG11_CFGR,RISAF region 11 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG11_STARTR,RISAF region 11 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG11_ENDR,RISAF region 11 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG11_CIDCFGR,RISAF region 11 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG11_ACFGR,RISAF region 11 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG11_ASTARTR,RISAF region 11 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG11_AENDR,RISAF region 11 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG11_ANESTR,RISAF region 11 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG11_BCFGR,RISAF region 11 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG11_BSTARTR,RISAF region 11 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG11_BENDR,RISAF region 11 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG11_BNESTR,RISAF region 11 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x300++0x2F line.long 0x0 "RISAF_REG12_CFGR,RISAF region 12 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG12_STARTR,RISAF region 12 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG12_ENDR,RISAF region 12 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG12_CIDCFGR,RISAF region 12 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG12_ACFGR,RISAF region 12 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG12_ASTARTR,RISAF region 12 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG12_AENDR,RISAF region 12 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG12_ANESTR,RISAF region 12 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG12_BCFGR,RISAF region 12 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG12_BSTARTR,RISAF region 12 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG12_BENDR,RISAF region 12 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG12_BNESTR,RISAF region 12 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x340++0x2F line.long 0x0 "RISAF_REG13_CFGR,RISAF region 13 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG13_STARTR,RISAF region 13 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG13_ENDR,RISAF region 13 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG13_CIDCFGR,RISAF region 13 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG13_ACFGR,RISAF region 13 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG13_ASTARTR,RISAF region 13 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG13_AENDR,RISAF region 13 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG13_ANESTR,RISAF region 13 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG13_BCFGR,RISAF region 13 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG13_BSTARTR,RISAF region 13 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG13_BENDR,RISAF region 13 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG13_BNESTR,RISAF region 13 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x380++0x2F line.long 0x0 "RISAF_REG14_CFGR,RISAF region 14 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG14_STARTR,RISAF region 14 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG14_ENDR,RISAF region 14 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG14_CIDCFGR,RISAF region 14 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG14_ACFGR,RISAF region 14 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG14_ASTARTR,RISAF region 14 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG14_AENDR,RISAF region 14 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG14_ANESTR,RISAF region 14 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG14_BCFGR,RISAF region 14 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG14_BSTARTR,RISAF region 14 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG14_BENDR,RISAF region 14 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG14_BNESTR,RISAF region 14 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x3C0++0x2F line.long 0x0 "RISAF_REG15_CFGR,RISAF region 15 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG15_STARTR,RISAF region 15 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG15_ENDR,RISAF region 15 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG15_CIDCFGR,RISAF region 15 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG15_ACFGR,RISAF region 15 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG15_ASTARTR,RISAF region 15 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG15_AENDR,RISAF region 15 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG15_ANESTR,RISAF region 15 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG15_BCFGR,RISAF region 15 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG15_BSTARTR,RISAF region 15 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG15_BENDR,RISAF region 15 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG15_BNESTR,RISAF region 15 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" rgroup.long 0xFF0++0xF line.long 0x0 "RISAF_HWCFGR,RISAF hardware configuration register" hexmask.long.byte 0x0 24.--31. 1. "CFG4,Hardware generic 4" hexmask.long.byte 0x0 16.--23. 1. "CFG3,Hardware generic 3" hexmask.long.byte 0x0 8.--15. 1. "CFG2,Hardware generic 2" hexmask.long.byte 0x0 0.--7. 1. "CFG1,Hardware generic 1" line.long 0x4 "RISAF_VERR,RISAF version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,RISAF major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,RISAF minor revision" line.long 0x8 "RISAF_IPIDR,RISAF identification register" hexmask.long 0x8 0.--31. 1. "ID,RISAF identification code" line.long 0xC "RISAF_SIDR,RISAF size identification register" hexmask.long 0xC 0.--31. 1. "SID,RISAF size identification code" tree.end tree "RISAF5_S" base ad:0x520E0000 group.long 0x0++0x3 line.long 0x0 "RISAF_CR,RISAF configuration register" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0x4++0x7 line.long 0x0 "RISAF_SR,RISAF status register" bitfld.long 0x0 2. "ENCDIS,Encryption disabled" "B_0x0,B_0x1" bitfld.long 0x0 1. "KEYRDY,Key ready" "B_0x0,B_0x1" bitfld.long 0x0 0. "KEYVALID,Key valid" "B_0x0,B_0x1" line.long 0x4 "RISAF_IASR,RISAF illegal access status register" bitfld.long 0x4 2. "IAEF1,Illegal access error flag 1" "0,1" bitfld.long 0x4 1. "IAEF0,Illegal access error flag 0" "0,1" bitfld.long 0x4 0. "CAEF,Configuration access error flag" "0,1" wgroup.long 0xC++0x3 line.long 0x0 "RISAF_IACR,RISAF illegal access clear register" bitfld.long 0x0 2. "IAEF1,Illegal access error flag 1" "0,1" bitfld.long 0x0 1. "IAEF0,Illegal access error flag 0" "0,1" bitfld.long 0x0 0. "CAEF,Configuration access error flag" "0,1" rgroup.long 0x20++0xF line.long 0x0 "RISAF_IAESR0,RISAF illegal access error status register 0" bitfld.long 0x0 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x0 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x0 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "IACID,Illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0x4 "RISAF_IADDR0,RISAF illegal address register 0" hexmask.long 0x4 0.--31. 1. "IADD,Illegal address" line.long 0x8 "RISAF_IAESR1,RISAF illegal access error status register 1" bitfld.long 0x8 7. "IANRW,Illegal access read/write" "B_0x0,B_0x1" bitfld.long 0x8 5. "IASEC,Illegal access security" "B_0x0,B_0x1" bitfld.long 0x8 4. "IAPRIV,Illegal access privileged" "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "IACID,Illegal access compartment ID" "0,1,2,3,4,5,6,7" line.long 0xC "RISAF_IADDR1,RISAF illegal address register 1" hexmask.long 0xC 0.--31. 1. "IADD,Illegal address" wgroup.long 0x30++0xF line.long 0x0 "RISAF_KEYR0,RISAF encryption key 0" bitfld.long 0x0 31. "KEY31,Cryptographic key" "0,1" bitfld.long 0x0 30. "KEY30,Cryptographic key" "0,1" bitfld.long 0x0 29. "KEY29,Cryptographic key" "0,1" bitfld.long 0x0 28. "KEY28,Cryptographic key" "0,1" bitfld.long 0x0 27. "KEY27,Cryptographic key" "0,1" bitfld.long 0x0 26. "KEY26,Cryptographic key" "0,1" bitfld.long 0x0 25. "KEY25,Cryptographic key" "0,1" newline bitfld.long 0x0 24. "KEY24,Cryptographic key" "0,1" bitfld.long 0x0 23. "KEY23,Cryptographic key" "0,1" bitfld.long 0x0 22. "KEY22,Cryptographic key" "0,1" bitfld.long 0x0 21. "KEY21,Cryptographic key" "0,1" bitfld.long 0x0 20. "KEY20,Cryptographic key" "0,1" bitfld.long 0x0 19. "KEY19,Cryptographic key" "0,1" bitfld.long 0x0 18. "KEY18,Cryptographic key" "0,1" newline bitfld.long 0x0 17. "KEY17,Cryptographic key" "0,1" bitfld.long 0x0 16. "KEY16,Cryptographic key" "0,1" bitfld.long 0x0 15. "KEY15,Cryptographic key" "0,1" bitfld.long 0x0 14. "KEY14,Cryptographic key" "0,1" bitfld.long 0x0 13. "KEY13,Cryptographic key" "0,1" bitfld.long 0x0 12. "KEY12,Cryptographic key" "0,1" bitfld.long 0x0 11. "KEY11,Cryptographic key" "0,1" newline bitfld.long 0x0 10. "KEY10,Cryptographic key" "0,1" bitfld.long 0x0 9. "KEY9,Cryptographic key" "0,1" bitfld.long 0x0 8. "KEY8,Cryptographic key" "0,1" bitfld.long 0x0 7. "KEY7,Cryptographic key" "0,1" bitfld.long 0x0 6. "KEY6,Cryptographic key" "0,1" bitfld.long 0x0 5. "KEY5,Cryptographic key" "0,1" bitfld.long 0x0 4. "KEY4,Cryptographic key" "0,1" newline bitfld.long 0x0 3. "KEY3,Cryptographic key" "0,1" bitfld.long 0x0 2. "KEY2,Cryptographic key" "0,1" bitfld.long 0x0 1. "KEY1,Cryptographic key" "0,1" bitfld.long 0x0 0. "KEY0,Cryptographic key" "0,1" line.long 0x4 "RISAF_KEYR1,RISAF encryption key 1" bitfld.long 0x4 31. "KEY63,Cryptographic key" "0,1" bitfld.long 0x4 30. "KEY62,Cryptographic key" "0,1" bitfld.long 0x4 29. "KEY61,Cryptographic key" "0,1" bitfld.long 0x4 28. "KEY60,Cryptographic key" "0,1" bitfld.long 0x4 27. "KEY59,Cryptographic key" "0,1" bitfld.long 0x4 26. "KEY58,Cryptographic key" "0,1" bitfld.long 0x4 25. "KEY57,Cryptographic key" "0,1" newline bitfld.long 0x4 24. "KEY56,Cryptographic key" "0,1" bitfld.long 0x4 23. "KEY55,Cryptographic key" "0,1" bitfld.long 0x4 22. "KEY54,Cryptographic key" "0,1" bitfld.long 0x4 21. "KEY53,Cryptographic key" "0,1" bitfld.long 0x4 20. "KEY52,Cryptographic key" "0,1" bitfld.long 0x4 19. "KEY51,Cryptographic key" "0,1" bitfld.long 0x4 18. "KEY50,Cryptographic key" "0,1" newline bitfld.long 0x4 17. "KEY49,Cryptographic key" "0,1" bitfld.long 0x4 16. "KEY48,Cryptographic key" "0,1" bitfld.long 0x4 15. "KEY47,Cryptographic key" "0,1" bitfld.long 0x4 14. "KEY46,Cryptographic key" "0,1" bitfld.long 0x4 13. "KEY45,Cryptographic key" "0,1" bitfld.long 0x4 12. "KEY44,Cryptographic key" "0,1" bitfld.long 0x4 11. "KEY43,Cryptographic key" "0,1" newline bitfld.long 0x4 10. "KEY42,Cryptographic key" "0,1" bitfld.long 0x4 9. "KEY41,Cryptographic key" "0,1" bitfld.long 0x4 8. "KEY40,Cryptographic key" "0,1" bitfld.long 0x4 7. "KEY39,Cryptographic key" "0,1" bitfld.long 0x4 6. "KEY38,Cryptographic key" "0,1" bitfld.long 0x4 5. "KEY37,Cryptographic key" "0,1" bitfld.long 0x4 4. "KEY36,Cryptographic key" "0,1" newline bitfld.long 0x4 3. "KEY35,Cryptographic key" "0,1" bitfld.long 0x4 2. "KEY34,Cryptographic key" "0,1" bitfld.long 0x4 1. "KEY33,Cryptographic key" "0,1" bitfld.long 0x4 0. "KEY32,Cryptographic key" "0,1" line.long 0x8 "RISAF_KEYR2,RISAF encryption key 2" bitfld.long 0x8 31. "KEY95,Cryptographic key" "0,1" bitfld.long 0x8 30. "KEY94,Cryptographic key" "0,1" bitfld.long 0x8 29. "KEY93,Cryptographic key" "0,1" bitfld.long 0x8 28. "KEY92,Cryptographic key" "0,1" bitfld.long 0x8 27. "KEY91,Cryptographic key" "0,1" bitfld.long 0x8 26. "KEY90,Cryptographic key" "0,1" bitfld.long 0x8 25. "KEY89,Cryptographic key" "0,1" newline bitfld.long 0x8 24. "KEY88,Cryptographic key" "0,1" bitfld.long 0x8 23. "KEY87,Cryptographic key" "0,1" bitfld.long 0x8 22. "KEY86,Cryptographic key" "0,1" bitfld.long 0x8 21. "KEY85,Cryptographic key" "0,1" bitfld.long 0x8 20. "KEY84,Cryptographic key" "0,1" bitfld.long 0x8 19. "KEY83,Cryptographic key" "0,1" bitfld.long 0x8 18. "KEY82,Cryptographic key" "0,1" newline bitfld.long 0x8 17. "KEY81,Cryptographic key" "0,1" bitfld.long 0x8 16. "KEY80,Cryptographic key" "0,1" bitfld.long 0x8 15. "KEY79,Cryptographic key" "0,1" bitfld.long 0x8 14. "KEY78,Cryptographic key" "0,1" bitfld.long 0x8 13. "KEY77,Cryptographic key" "0,1" bitfld.long 0x8 12. "KEY76,Cryptographic key" "0,1" bitfld.long 0x8 11. "KEY75,Cryptographic key" "0,1" newline bitfld.long 0x8 10. "KEY74,Cryptographic key" "0,1" bitfld.long 0x8 9. "KEY73,Cryptographic key" "0,1" bitfld.long 0x8 8. "KEY72,Cryptographic key" "0,1" bitfld.long 0x8 7. "KEY71,Cryptographic key" "0,1" bitfld.long 0x8 6. "KEY70,Cryptographic key" "0,1" bitfld.long 0x8 5. "KEY69,Cryptographic key" "0,1" bitfld.long 0x8 4. "KEY68,Cryptographic key" "0,1" newline bitfld.long 0x8 3. "KEY67,Cryptographic key" "0,1" bitfld.long 0x8 2. "KEY66,Cryptographic key" "0,1" bitfld.long 0x8 1. "KEY65,Cryptographic key" "0,1" bitfld.long 0x8 0. "KEY64,Cryptographic key" "0,1" line.long 0xC "RISAF_KEYR3,RISAF encryption key 3" bitfld.long 0xC 31. "KEY127,Cryptographic key" "0,1" bitfld.long 0xC 30. "KEY126,Cryptographic key" "0,1" bitfld.long 0xC 29. "KEY125,Cryptographic key" "0,1" bitfld.long 0xC 28. "KEY124,Cryptographic key" "0,1" bitfld.long 0xC 27. "KEY123,Cryptographic key" "0,1" bitfld.long 0xC 26. "KEY122,Cryptographic key" "0,1" bitfld.long 0xC 25. "KEY121,Cryptographic key" "0,1" newline bitfld.long 0xC 24. "KEY120,Cryptographic key" "0,1" bitfld.long 0xC 23. "KEY119,Cryptographic key" "0,1" bitfld.long 0xC 22. "KEY118,Cryptographic key" "0,1" bitfld.long 0xC 21. "KEY117,Cryptographic key" "0,1" bitfld.long 0xC 20. "KEY116,Cryptographic key" "0,1" bitfld.long 0xC 19. "KEY115,Cryptographic key" "0,1" bitfld.long 0xC 18. "KEY114,Cryptographic key" "0,1" newline bitfld.long 0xC 17. "KEY113,Cryptographic key" "0,1" bitfld.long 0xC 16. "KEY112,Cryptographic key" "0,1" bitfld.long 0xC 15. "KEY111,Cryptographic key" "0,1" bitfld.long 0xC 14. "KEY110,Cryptographic key" "0,1" bitfld.long 0xC 13. "KEY109,Cryptographic key" "0,1" bitfld.long 0xC 12. "KEY108,Cryptographic key" "0,1" bitfld.long 0xC 11. "KEY107,Cryptographic key" "0,1" newline bitfld.long 0xC 10. "KEY106,Cryptographic key" "0,1" bitfld.long 0xC 9. "KEY105,Cryptographic key" "0,1" bitfld.long 0xC 8. "KEY104,Cryptographic key" "0,1" bitfld.long 0xC 7. "KEY103,Cryptographic key" "0,1" bitfld.long 0xC 6. "KEY102,Cryptographic key" "0,1" bitfld.long 0xC 5. "KEY101,Cryptographic key" "0,1" bitfld.long 0xC 4. "KEY100,Cryptographic key" "0,1" newline bitfld.long 0xC 3. "KEY99,Cryptographic key" "0,1" bitfld.long 0xC 2. "KEY98,Cryptographic key" "0,1" bitfld.long 0xC 1. "KEY97,Cryptographic key" "0,1" bitfld.long 0xC 0. "KEY96,Cryptographic key" "0,1" group.long 0x40++0x2F line.long 0x0 "RISAF_REG1_CFGR,RISAF region 1 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG1_STARTR,RISAF region 1 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG1_ENDR,RISAF region 1 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG1_CIDCFGR,RISAF region 1 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG1_ACFGR,RISAF region 1 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG1_ASTARTR,RISAF region 1 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG1_AENDR,RISAF region 1 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG1_ANESTR,RISAF region 1 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG1_BCFGR,RISAF region 1 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG1_BSTARTR,RISAF region 1 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG1_BENDR,RISAF region 1 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG1_BNESTR,RISAF region 1 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x80++0x2F line.long 0x0 "RISAF_REG2_CFGR,RISAF region 2 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG2_STARTR,RISAF region 2 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG2_ENDR,RISAF region 2 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG2_CIDCFGR,RISAF region 2 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG2_ACFGR,RISAF region 2 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG2_ASTARTR,RISAF region 2 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG2_AENDR,RISAF region 2 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG2_ANESTR,RISAF region 2 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG2_BCFGR,RISAF region 2 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG2_BSTARTR,RISAF region 2 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG2_BENDR,RISAF region 2 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG2_BNESTR,RISAF region 2 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0xC0++0x2F line.long 0x0 "RISAF_REG3_CFGR,RISAF region 3 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG3_STARTR,RISAF region 3 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG3_ENDR,RISAF region 3 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG3_CIDCFGR,RISAF region 3 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG3_ACFGR,RISAF region 3 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG3_ASTARTR,RISAF region 3 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG3_AENDR,RISAF region 3 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG3_ANESTR,RISAF region 3 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG3_BCFGR,RISAF region 3 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG3_BSTARTR,RISAF region 3 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG3_BENDR,RISAF region 3 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG3_BNESTR,RISAF region 3 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x100++0x2F line.long 0x0 "RISAF_REG4_CFGR,RISAF region 4 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG4_STARTR,RISAF region 4 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG4_ENDR,RISAF region 4 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG4_CIDCFGR,RISAF region 4 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG4_ACFGR,RISAF region 4 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG4_ASTARTR,RISAF region 4 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG4_AENDR,RISAF region 4 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG4_ANESTR,RISAF region 4 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG4_BCFGR,RISAF region 4 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG4_BSTARTR,RISAF region 4 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG4_BENDR,RISAF region 4 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG4_BNESTR,RISAF region 4 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x140++0x2F line.long 0x0 "RISAF_REG5_CFGR,RISAF region 5 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG5_STARTR,RISAF region 5 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG5_ENDR,RISAF region 5 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG5_CIDCFGR,RISAF region 5 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG5_ACFGR,RISAF region 5 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG5_ASTARTR,RISAF region 5 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG5_AENDR,RISAF region 5 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG5_ANESTR,RISAF region 5 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG5_BCFGR,RISAF region 5 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG5_BSTARTR,RISAF region 5 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG5_BENDR,RISAF region 5 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG5_BNESTR,RISAF region 5 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x180++0x2F line.long 0x0 "RISAF_REG6_CFGR,RISAF region 6 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG6_STARTR,RISAF region 6 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG6_ENDR,RISAF region 6 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG6_CIDCFGR,RISAF region 6 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG6_ACFGR,RISAF region 6 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG6_ASTARTR,RISAF region 6 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG6_AENDR,RISAF region 6 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG6_ANESTR,RISAF region 6 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG6_BCFGR,RISAF region 6 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG6_BSTARTR,RISAF region 6 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG6_BENDR,RISAF region 6 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG6_BNESTR,RISAF region 6 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x1C0++0x2F line.long 0x0 "RISAF_REG7_CFGR,RISAF region 7 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG7_STARTR,RISAF region 7 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG7_ENDR,RISAF region 7 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG7_CIDCFGR,RISAF region 7 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG7_ACFGR,RISAF region 7 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG7_ASTARTR,RISAF region 7 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG7_AENDR,RISAF region 7 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG7_ANESTR,RISAF region 7 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG7_BCFGR,RISAF region 7 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG7_BSTARTR,RISAF region 7 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG7_BENDR,RISAF region 7 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG7_BNESTR,RISAF region 7 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x200++0x2F line.long 0x0 "RISAF_REG8_CFGR,RISAF region 8 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG8_STARTR,RISAF region 8 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG8_ENDR,RISAF region 8 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG8_CIDCFGR,RISAF region 8 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG8_ACFGR,RISAF region 8 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG8_ASTARTR,RISAF region 8 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG8_AENDR,RISAF region 8 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG8_ANESTR,RISAF region 8 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG8_BCFGR,RISAF region 8 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG8_BSTARTR,RISAF region 8 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG8_BENDR,RISAF region 8 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG8_BNESTR,RISAF region 8 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x240++0x2F line.long 0x0 "RISAF_REG9_CFGR,RISAF region 9 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG9_STARTR,RISAF region 9 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG9_ENDR,RISAF region 9 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG9_CIDCFGR,RISAF region 9 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG9_ACFGR,RISAF region 9 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG9_ASTARTR,RISAF region 9 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG9_AENDR,RISAF region 9 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG9_ANESTR,RISAF region 9 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG9_BCFGR,RISAF region 9 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG9_BSTARTR,RISAF region 9 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG9_BENDR,RISAF region 9 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG9_BNESTR,RISAF region 9 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x280++0x2F line.long 0x0 "RISAF_REG10_CFGR,RISAF region 10 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG10_STARTR,RISAF region 10 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG10_ENDR,RISAF region 10 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG10_CIDCFGR,RISAF region 10 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG10_ACFGR,RISAF region 10 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG10_ASTARTR,RISAF region 10 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG10_AENDR,RISAF region 10 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG10_ANESTR,RISAF region 10 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG10_BCFGR,RISAF region 10 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG10_BSTARTR,RISAF region 10 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG10_BENDR,RISAF region 10 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG10_BNESTR,RISAF region 10 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x2C0++0x2F line.long 0x0 "RISAF_REG11_CFGR,RISAF region 11 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG11_STARTR,RISAF region 11 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG11_ENDR,RISAF region 11 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG11_CIDCFGR,RISAF region 11 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG11_ACFGR,RISAF region 11 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG11_ASTARTR,RISAF region 11 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG11_AENDR,RISAF region 11 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG11_ANESTR,RISAF region 11 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG11_BCFGR,RISAF region 11 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG11_BSTARTR,RISAF region 11 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG11_BENDR,RISAF region 11 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG11_BNESTR,RISAF region 11 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x300++0x2F line.long 0x0 "RISAF_REG12_CFGR,RISAF region 12 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG12_STARTR,RISAF region 12 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG12_ENDR,RISAF region 12 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG12_CIDCFGR,RISAF region 12 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG12_ACFGR,RISAF region 12 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG12_ASTARTR,RISAF region 12 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG12_AENDR,RISAF region 12 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG12_ANESTR,RISAF region 12 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG12_BCFGR,RISAF region 12 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG12_BSTARTR,RISAF region 12 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG12_BENDR,RISAF region 12 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG12_BNESTR,RISAF region 12 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x340++0x2F line.long 0x0 "RISAF_REG13_CFGR,RISAF region 13 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG13_STARTR,RISAF region 13 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG13_ENDR,RISAF region 13 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG13_CIDCFGR,RISAF region 13 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG13_ACFGR,RISAF region 13 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG13_ASTARTR,RISAF region 13 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG13_AENDR,RISAF region 13 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG13_ANESTR,RISAF region 13 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG13_BCFGR,RISAF region 13 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG13_BSTARTR,RISAF region 13 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG13_BENDR,RISAF region 13 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG13_BNESTR,RISAF region 13 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x380++0x2F line.long 0x0 "RISAF_REG14_CFGR,RISAF region 14 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG14_STARTR,RISAF region 14 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG14_ENDR,RISAF region 14 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG14_CIDCFGR,RISAF region 14 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG14_ACFGR,RISAF region 14 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG14_ASTARTR,RISAF region 14 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG14_AENDR,RISAF region 14 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG14_ANESTR,RISAF region 14 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG14_BCFGR,RISAF region 14 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG14_BSTARTR,RISAF region 14 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG14_BENDR,RISAF region 14 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG14_BNESTR,RISAF region 14 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" group.long 0x3C0++0x2F line.long 0x0 "RISAF_REG15_CFGR,RISAF region 15 configuration register" bitfld.long 0x0 23. "PRIVC7,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIVC6,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIVC5,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIVC4,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 19. "PRIVC3,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIVC2,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIVC1,Privileged access for compartment y" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "PRIVC0,Privileged access for compartment y" "B_0x0,B_0x1" bitfld.long 0x0 15. "ENC,Encrypted region" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure region" "B_0x0,B_0x1" bitfld.long 0x0 0. "BREN,Base region enable" "B_0x0,B_0x1" line.long 0x4 "RISAF_REG15_STARTR,RISAF region 15 start-address register" hexmask.long 0x4 0.--31. 1. "BADDSTART,Base region address start" line.long 0x8 "RISAF_REG15_ENDR,RISAF region 15 end-address register" hexmask.long 0x8 0.--31. 1. "BADDEND,Base region address end" line.long 0xC "RISAF_REG15_CIDCFGR,RISAF region 15 CID configuration register" bitfld.long 0xC 23. "WRENC7,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 22. "WRENC6,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 21. "WRENC5,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 20. "WRENC4,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 19. "WRENC3,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 18. "WRENC2,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 17. "WRENC1,Write enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 16. "WRENC0,Write enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 7. "RDENC7,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 6. "RDENC6,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 5. "RDENC5,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 4. "RDENC4,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 3. "RDENC3,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 2. "RDENC2,Read enable for compartment y" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RDENC1,Read enable for compartment y" "B_0x0,B_0x1" bitfld.long 0xC 0. "RDENC0,Read enable for compartment y" "B_0x0,B_0x1" line.long 0x10 "RISAF_REG15_ACFGR,RISAF region 15 subregion z configuration register" rbitfld.long 0x10 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x10 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x10 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x14 "RISAF_REG15_ASTARTR,RISAF region 15 subregion z start-address register" hexmask.long 0x14 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x18 "RISAF_REG15_AENDR,RISAF region 15 subregion z end-address register" hexmask.long 0x18 0.--31. 1. "SADDEND,Subregion address end" line.long 0x1C "RISAF_REG15_ANESTR,RISAF region 15 subregion z nested mode register" bitfld.long 0x1C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" line.long 0x20 "RISAF_REG15_BCFGR,RISAF region 15 subregion z configuration register" rbitfld.long 0x20 15. "ENC,Encrypted subregion" "B_0x0,B_0x1" bitfld.long 0x20 13. "WREN,Write enable" "B_0x0,B_0x1" bitfld.long 0x20 12. "RDEN,Read enable" "B_0x0,B_0x1" bitfld.long 0x20 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x20 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "RLOCK,Resource lock" "B_0x0,B_0x1" newline bitfld.long 0x20 0. "SREN,Subregion enable" "B_0x0,B_0x1" line.long 0x24 "RISAF_REG15_BSTARTR,RISAF region 15 subregion z start-address register" hexmask.long 0x24 0.--31. 1. "SADDSTART,Subregion address start" line.long 0x28 "RISAF_REG15_BENDR,RISAF region 15 subregion z end-address register" hexmask.long 0x28 0.--31. 1. "SADDEND,Subregion address end" line.long 0x2C "RISAF_REG15_BNESTR,RISAF region 15 subregion z nested mode register" bitfld.long 0x2C 4.--6. "DCCID,Delegated configuration CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "DCEN,Delegated configuration enable" "B_0x0,B_0x1" rgroup.long 0xFF0++0xF line.long 0x0 "RISAF_HWCFGR,RISAF hardware configuration register" hexmask.long.byte 0x0 24.--31. 1. "CFG4,Hardware generic 4" hexmask.long.byte 0x0 16.--23. 1. "CFG3,Hardware generic 3" hexmask.long.byte 0x0 8.--15. 1. "CFG2,Hardware generic 2" hexmask.long.byte 0x0 0.--7. 1. "CFG1,Hardware generic 1" line.long 0x4 "RISAF_VERR,RISAF version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,RISAF major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,RISAF minor revision" line.long 0x8 "RISAF_IPIDR,RISAF identification register" hexmask.long 0x8 0.--31. 1. "ID,RISAF identification code" line.long 0xC "RISAF_SIDR,RISAF size identification register" hexmask.long 0xC 0.--31. 1. "SID,RISAF size identification code" tree.end tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "RIFSC (Resource Isolation Framework Security Controller)" base ad:0x0 tree "RIFSC" base ad:0x42080000 group.long 0x0++0x3 line.long 0x0 "RIFSC_RISC_CR,RIFSC RISC slave configuration register x" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" group.long 0x10++0x17 line.long 0x0 "RIFSC_RISC_SECCFGR0,RIFSC RISC slave security configuration register 0" bitfld.long 0x0 31. "SEC31,Security configuration for peripheral 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "SEC30,Security configuration for peripheral 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "SEC29,Security configuration for peripheral 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "SEC28,Security configuration for peripheral 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "SEC27,Security configuration for peripheral 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "SEC26,Security configuration for peripheral 26" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "SEC25,Security configuration for peripheral 25" "B_0x0,B_0x1" bitfld.long 0x0 24. "SEC24,Security configuration for peripheral 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "SEC23,Security configuration for peripheral 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "SEC22,Security configuration for peripheral 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "SEC21,Security configuration for peripheral 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "SEC20,Security configuration for peripheral 20" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "SEC19,Security configuration for peripheral 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "SEC18,Security configuration for peripheral 18" "B_0x0,B_0x1" bitfld.long 0x0 17. "SEC17,Security configuration for peripheral 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "SEC16,Security configuration for peripheral 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "SEC15,Security configuration for peripheral 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,Security configuration for peripheral 14" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SEC13,Security configuration for peripheral 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,Security configuration for peripheral 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,Security configuration for peripheral 11" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,Security configuration for peripheral 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "SEC9,Security configuration for peripheral 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,Security configuration for peripheral 8" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "SEC7,Security configuration for peripheral 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Security configuration for peripheral 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Security configuration for peripheral 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Security configuration for peripheral 4" "B_0x0,B_0x1" bitfld.long 0x0 3. "SEC3,Security configuration for peripheral 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Security configuration for peripheral 2" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "SEC1,Security configuration for peripheral 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,Security configuration for peripheral 0" "B_0x0,B_0x1" line.long 0x4 "RIFSC_RISC_SECCFGR1,RIFSC RISC slave security configuration register 1" bitfld.long 0x4 31. "SEC63,Security configuration for peripheral 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "SEC62,Security configuration for peripheral 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "SEC61,Security configuration for peripheral 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "SEC60,Security configuration for peripheral 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "SEC59,Security configuration for peripheral 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "SEC58,Security configuration for peripheral 58" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "SEC57,Security configuration for peripheral 57" "B_0x0,B_0x1" bitfld.long 0x4 24. "SEC56,Security configuration for peripheral 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "SEC55,Security configuration for peripheral 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "SEC54,Security configuration for peripheral 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "SEC53,Security configuration for peripheral 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "SEC52,Security configuration for peripheral 52" "B_0x0,B_0x1" newline bitfld.long 0x4 19. "SEC51,Security configuration for peripheral 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "SEC50,Security configuration for peripheral 50" "B_0x0,B_0x1" bitfld.long 0x4 17. "SEC49,Security configuration for peripheral 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "SEC48,Security configuration for peripheral 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "SEC47,Security configuration for peripheral 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "SEC46,Security configuration for peripheral 46" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "SEC45,Security configuration for peripheral 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "SEC44,Security configuration for peripheral 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "SEC43,Security configuration for peripheral 43" "B_0x0,B_0x1" bitfld.long 0x4 10. "SEC42,Security configuration for peripheral 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "SEC41,Security configuration for peripheral 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "SEC40,Security configuration for peripheral 40" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "SEC39,Security configuration for peripheral 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "SEC38,Security configuration for peripheral 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "SEC37,Security configuration for peripheral 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "SEC36,Security configuration for peripheral 36" "B_0x0,B_0x1" bitfld.long 0x4 3. "SEC35,Security configuration for peripheral 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "SEC34,Security configuration for peripheral 34" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "SEC33,Security configuration for peripheral 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "SEC32,Security configuration for peripheral 32" "B_0x0,B_0x1" line.long 0x8 "RIFSC_RISC_SECCFGR2,RIFSC RISC slave security configuration register 2" bitfld.long 0x8 31. "SEC95,Security configuration for peripheral 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "SEC94,Security configuration for peripheral 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "SEC93,Security configuration for peripheral 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "SEC92,Security configuration for peripheral 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "SEC91,Security configuration for peripheral 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "SEC90,Security configuration for peripheral 90" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "SEC89,Security configuration for peripheral 89" "B_0x0,B_0x1" bitfld.long 0x8 24. "SEC88,Security configuration for peripheral 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "SEC87,Security configuration for peripheral 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "SEC86,Security configuration for peripheral 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "SEC85,Security configuration for peripheral 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "SEC84,Security configuration for peripheral 84" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "SEC83,Security configuration for peripheral 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "SEC82,Security configuration for peripheral 82" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEC81,Security configuration for peripheral 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEC80,Security configuration for peripheral 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "SEC79,Security configuration for peripheral 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "SEC78,Security configuration for peripheral 78" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "SEC77,Security configuration for peripheral 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "SEC76,Security configuration for peripheral 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "SEC75,Security configuration for peripheral 75" "B_0x0,B_0x1" bitfld.long 0x8 10. "SEC74,Security configuration for peripheral 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "SEC73,Security configuration for peripheral 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "SEC72,Security configuration for peripheral 72" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "SEC71,Security configuration for peripheral 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "SEC70,Security configuration for peripheral 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "SEC69,Security configuration for peripheral 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "SEC68,Security configuration for peripheral 68" "B_0x0,B_0x1" bitfld.long 0x8 3. "SEC67,Security configuration for peripheral 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "SEC66,Security configuration for peripheral 66" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "SEC65,Security configuration for peripheral 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "SEC64,Security configuration for peripheral 64" "B_0x0,B_0x1" line.long 0xC "RIFSC_RISC_SECCFGR3,RIFSC RISC slave security configuration register 3" bitfld.long 0xC 31. "SEC127,Security configuration for peripheral 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "SEC126,Security configuration for peripheral 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "SEC125,Security configuration for peripheral 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "SEC124,Security configuration for peripheral 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "SEC123,Security configuration for peripheral 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "SEC122,Security configuration for peripheral 122" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "SEC121,Security configuration for peripheral 121" "B_0x0,B_0x1" bitfld.long 0xC 24. "SEC120,Security configuration for peripheral 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "SEC119,Security configuration for peripheral 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "SEC118,Security configuration for peripheral 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "SEC117,Security configuration for peripheral 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "SEC116,Security configuration for peripheral 116" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "SEC115,Security configuration for peripheral 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "SEC114,Security configuration for peripheral 114" "B_0x0,B_0x1" bitfld.long 0xC 17. "SEC113,Security configuration for peripheral 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "SEC112,Security configuration for peripheral 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "SEC111,Security configuration for peripheral 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "SEC110,Security configuration for peripheral 110" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "SEC109,Security configuration for peripheral 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "SEC108,Security configuration for peripheral 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "SEC107,Security configuration for peripheral 107" "B_0x0,B_0x1" bitfld.long 0xC 10. "SEC106,Security configuration for peripheral 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "SEC105,Security configuration for peripheral 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "SEC104,Security configuration for peripheral 104" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "SEC103,Security configuration for peripheral 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "SEC102,Security configuration for peripheral 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "SEC101,Security configuration for peripheral 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "SEC100,Security configuration for peripheral 100" "B_0x0,B_0x1" bitfld.long 0xC 3. "SEC99,Security configuration for peripheral 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "SEC98,Security configuration for peripheral 98" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "SEC97,Security configuration for peripheral 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "SEC96,Security configuration for peripheral 96" "B_0x0,B_0x1" line.long 0x10 "RIFSC_RISC_SECCFGR4,RIFSC RISC slave security configuration register 4" bitfld.long 0x10 31. "SEC159,Security configuration for peripheral 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "SEC158,Security configuration for peripheral 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "SEC157,Security configuration for peripheral 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "SEC156,Security configuration for peripheral 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "SEC155,Security configuration for peripheral 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "SEC154,Security configuration for peripheral 154" "B_0x0,B_0x1" newline bitfld.long 0x10 25. "SEC153,Security configuration for peripheral 153" "B_0x0,B_0x1" bitfld.long 0x10 24. "SEC152,Security configuration for peripheral 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "SEC151,Security configuration for peripheral 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "SEC150,Security configuration for peripheral 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "SEC149,Security configuration for peripheral 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "SEC148,Security configuration for peripheral 148" "B_0x0,B_0x1" newline bitfld.long 0x10 19. "SEC147,Security configuration for peripheral 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEC146,Security configuration for peripheral 146" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEC145,Security configuration for peripheral 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEC144,Security configuration for peripheral 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "SEC143,Security configuration for peripheral 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "SEC142,Security configuration for peripheral 142" "B_0x0,B_0x1" newline bitfld.long 0x10 13. "SEC141,Security configuration for peripheral 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "SEC140,Security configuration for peripheral 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "SEC139,Security configuration for peripheral 139" "B_0x0,B_0x1" bitfld.long 0x10 10. "SEC138,Security configuration for peripheral 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "SEC137,Security configuration for peripheral 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC136,Security configuration for peripheral 136" "B_0x0,B_0x1" newline bitfld.long 0x10 7. "SEC135,Security configuration for peripheral 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "SEC134,Security configuration for peripheral 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "SEC133,Security configuration for peripheral 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "SEC132,Security configuration for peripheral 132" "B_0x0,B_0x1" bitfld.long 0x10 3. "SEC131,Security configuration for peripheral 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "SEC130,Security configuration for peripheral 130" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "SEC129,Security configuration for peripheral 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "SEC128,Security configuration for peripheral 128" "B_0x0,B_0x1" line.long 0x14 "RIFSC_RISC_SECCFGR5,RIFSC RISC slave security configuration register 5" bitfld.long 0x14 31. "SEC191,Security configuration for peripheral 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "SEC190,Security configuration for peripheral 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "SEC189,Security configuration for peripheral 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "SEC188,Security configuration for peripheral 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "SEC187,Security configuration for peripheral 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "SEC186,Security configuration for peripheral 186" "B_0x0,B_0x1" newline bitfld.long 0x14 25. "SEC185,Security configuration for peripheral 185" "B_0x0,B_0x1" bitfld.long 0x14 24. "SEC184,Security configuration for peripheral 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "SEC183,Security configuration for peripheral 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "SEC182,Security configuration for peripheral 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "SEC181,Security configuration for peripheral 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "SEC180,Security configuration for peripheral 180" "B_0x0,B_0x1" newline bitfld.long 0x14 19. "SEC179,Security configuration for peripheral 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "SEC178,Security configuration for peripheral 178" "B_0x0,B_0x1" bitfld.long 0x14 17. "SEC177,Security configuration for peripheral 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "SEC176,Security configuration for peripheral 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "SEC175,Security configuration for peripheral 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "SEC174,Security configuration for peripheral 174" "B_0x0,B_0x1" newline bitfld.long 0x14 13. "SEC173,Security configuration for peripheral 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "SEC172,Security configuration for peripheral 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "SEC171,Security configuration for peripheral 171" "B_0x0,B_0x1" bitfld.long 0x14 10. "SEC170,Security configuration for peripheral 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "SEC169,Security configuration for peripheral 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "SEC168,Security configuration for peripheral 168" "B_0x0,B_0x1" newline bitfld.long 0x14 7. "SEC167,Security configuration for peripheral 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC166,Security configuration for peripheral 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "SEC165,Security configuration for peripheral 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "SEC164,Security configuration for peripheral 164" "B_0x0,B_0x1" bitfld.long 0x14 3. "SEC163,Security configuration for peripheral 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "SEC162,Security configuration for peripheral 162" "B_0x0,B_0x1" newline bitfld.long 0x14 1. "SEC161,Security configuration for peripheral 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "SEC160,Security configuration for peripheral 160" "B_0x0,B_0x1" group.long 0x30++0x17 line.long 0x0 "RIFSC_RISC_PRIVCFGR0,RIFSC RISFC slave privileged register 0" bitfld.long 0x0 31. "PRIV31,Privileged-only access permission for peripheral 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRIV30,Privileged-only access permission for peripheral 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRIV29,Privileged-only access permission for peripheral 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRIV28,Privileged-only access permission for peripheral 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRIV27,Privileged-only access permission for peripheral 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRIV26,Privileged-only access permission for peripheral 26" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "PRIV25,Privileged-only access permission for peripheral 25" "B_0x0,B_0x1" bitfld.long 0x0 24. "PRIV24,Privileged-only access permission for peripheral 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRIV23,Privileged-only access permission for peripheral 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIV22,Privileged-only access permission for peripheral 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIV21,Privileged-only access permission for peripheral 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIV20,Privileged-only access permission for peripheral 20" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "PRIV19,Privileged-only access permission for peripheral 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIV18,Privileged-only access permission for peripheral 18" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIV17,Privileged-only access permission for peripheral 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRIV16,Privileged-only access permission for peripheral 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRIV15,Privileged-only access permission for peripheral 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRIV14,Privileged-only access permission for peripheral 14" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "PRIV13,Privileged-only access permission for peripheral 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRIV12,Privileged-only access permission for peripheral 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRIV11,Privileged-only access permission for peripheral 11" "B_0x0,B_0x1" bitfld.long 0x0 10. "PRIV10,Privileged-only access permission for peripheral 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRIV9,Privileged-only access permission for peripheral 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRIV8,Privileged-only access permission for peripheral 8" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "PRIV7,Privileged-only access permission for peripheral 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged-only access permission for peripheral 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged-only access permission for peripheral 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged-only access permission for peripheral 4" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged-only access permission for peripheral 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged-only access permission for peripheral 2" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "PRIV1,Privileged-only access permission for peripheral 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRIV0,Privileged-only access permission for peripheral 0" "B_0x0,B_0x1" line.long 0x4 "RIFSC_RISC_PRIVCFGR1,RIFSC RISFC slave privileged register 1" bitfld.long 0x4 31. "PRIV63,Privileged-only access permission for peripheral 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "PRIV62,Privileged-only access permission for peripheral 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "PRIV61,Privileged-only access permission for peripheral 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "PRIV60,Privileged-only access permission for peripheral 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "PRIV59,Privileged-only access permission for peripheral 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "PRIV58,Privileged-only access permission for peripheral 58" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "PRIV57,Privileged-only access permission for peripheral 57" "B_0x0,B_0x1" bitfld.long 0x4 24. "PRIV56,Privileged-only access permission for peripheral 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "PRIV55,Privileged-only access permission for peripheral 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "PRIV54,Privileged-only access permission for peripheral 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "PRIV53,Privileged-only access permission for peripheral 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "PRIV52,Privileged-only access permission for peripheral 52" "B_0x0,B_0x1" newline bitfld.long 0x4 19. "PRIV51,Privileged-only access permission for peripheral 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "PRIV50,Privileged-only access permission for peripheral 50" "B_0x0,B_0x1" bitfld.long 0x4 17. "PRIV49,Privileged-only access permission for peripheral 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "PRIV48,Privileged-only access permission for peripheral 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "PRIV47,Privileged-only access permission for peripheral 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV46,Privileged-only access permission for peripheral 46" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "PRIV45,Privileged-only access permission for peripheral 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV44,Privileged-only access permission for peripheral 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV43,Privileged-only access permission for peripheral 43" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV42,Privileged-only access permission for peripheral 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "PRIV41,Privileged-only access permission for peripheral 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV40,Privileged-only access permission for peripheral 40" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "PRIV39,Privileged-only access permission for peripheral 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV38,Privileged-only access permission for peripheral 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV37,Privileged-only access permission for peripheral 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV36,Privileged-only access permission for peripheral 36" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV35,Privileged-only access permission for peripheral 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV34,Privileged-only access permission for peripheral 34" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "PRIV33,Privileged-only access permission for peripheral 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV32,Privileged-only access permission for peripheral 32" "B_0x0,B_0x1" line.long 0x8 "RIFSC_RISC_PRIVCFGR2,RIFSC RISFC slave privileged register 2" bitfld.long 0x8 31. "PRIV95,Privileged-only access permission for peripheral 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "PRIV94,Privileged-only access permission for peripheral 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "PRIV93,Privileged-only access permission for peripheral 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "PRIV92,Privileged-only access permission for peripheral 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "PRIV91,Privileged-only access permission for peripheral 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "PRIV90,Privileged-only access permission for peripheral 90" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "PRIV89,Privileged-only access permission for peripheral 89" "B_0x0,B_0x1" bitfld.long 0x8 24. "PRIV88,Privileged-only access permission for peripheral 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "PRIV87,Privileged-only access permission for peripheral 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "PRIV86,Privileged-only access permission for peripheral 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "PRIV85,Privileged-only access permission for peripheral 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "PRIV84,Privileged-only access permission for peripheral 84" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "PRIV83,Privileged-only access permission for peripheral 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "PRIV82,Privileged-only access permission for peripheral 82" "B_0x0,B_0x1" bitfld.long 0x8 17. "PRIV81,Privileged-only access permission for peripheral 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "PRIV80,Privileged-only access permission for peripheral 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "PRIV79,Privileged-only access permission for peripheral 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "PRIV78,Privileged-only access permission for peripheral 78" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "PRIV77,Privileged-only access permission for peripheral 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "PRIV76,Privileged-only access permission for peripheral 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "PRIV75,Privileged-only access permission for peripheral 75" "B_0x0,B_0x1" bitfld.long 0x8 10. "PRIV74,Privileged-only access permission for peripheral 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "PRIV73,Privileged-only access permission for peripheral 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "PRIV72,Privileged-only access permission for peripheral 72" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "PRIV71,Privileged-only access permission for peripheral 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV70,Privileged-only access permission for peripheral 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV69,Privileged-only access permission for peripheral 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV68,Privileged-only access permission for peripheral 68" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV67,Privileged-only access permission for peripheral 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV66,Privileged-only access permission for peripheral 66" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "PRIV65,Privileged-only access permission for peripheral 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "PRIV64,Privileged-only access permission for peripheral 64" "B_0x0,B_0x1" line.long 0xC "RIFSC_RISC_PRIVCFGR3,RIFSC RISFC slave privileged register 3" bitfld.long 0xC 31. "PRIV127,Privileged-only access permission for peripheral 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "PRIV126,Privileged-only access permission for peripheral 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "PRIV125,Privileged-only access permission for peripheral 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "PRIV124,Privileged-only access permission for peripheral 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "PRIV123,Privileged-only access permission for peripheral 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "PRIV122,Privileged-only access permission for peripheral 122" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "PRIV121,Privileged-only access permission for peripheral 121" "B_0x0,B_0x1" bitfld.long 0xC 24. "PRIV120,Privileged-only access permission for peripheral 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "PRIV119,Privileged-only access permission for peripheral 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "PRIV118,Privileged-only access permission for peripheral 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "PRIV117,Privileged-only access permission for peripheral 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "PRIV116,Privileged-only access permission for peripheral 116" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "PRIV115,Privileged-only access permission for peripheral 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "PRIV114,Privileged-only access permission for peripheral 114" "B_0x0,B_0x1" bitfld.long 0xC 17. "PRIV113,Privileged-only access permission for peripheral 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "PRIV112,Privileged-only access permission for peripheral 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "PRIV111,Privileged-only access permission for peripheral 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "PRIV110,Privileged-only access permission for peripheral 110" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "PRIV109,Privileged-only access permission for peripheral 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "PRIV108,Privileged-only access permission for peripheral 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "PRIV107,Privileged-only access permission for peripheral 107" "B_0x0,B_0x1" bitfld.long 0xC 10. "PRIV106,Privileged-only access permission for peripheral 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "PRIV105,Privileged-only access permission for peripheral 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "PRIV104,Privileged-only access permission for peripheral 104" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "PRIV103,Privileged-only access permission for peripheral 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV102,Privileged-only access permission for peripheral 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV101,Privileged-only access permission for peripheral 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV100,Privileged-only access permission for peripheral 100" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV99,Privileged-only access permission for peripheral 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV98,Privileged-only access permission for peripheral 98" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "PRIV97,Privileged-only access permission for peripheral 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "PRIV96,Privileged-only access permission for peripheral 96" "B_0x0,B_0x1" line.long 0x10 "RIFSC_RISC_PRIVCFGR4,RIFSC RISFC slave privileged register 4" bitfld.long 0x10 31. "PRIV159,Privileged-only access permission for peripheral 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "PRIV158,Privileged-only access permission for peripheral 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "PRIV157,Privileged-only access permission for peripheral 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "PRIV156,Privileged-only access permission for peripheral 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "PRIV155,Privileged-only access permission for peripheral 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "PRIV154,Privileged-only access permission for peripheral 154" "B_0x0,B_0x1" newline bitfld.long 0x10 25. "PRIV153,Privileged-only access permission for peripheral 153" "B_0x0,B_0x1" bitfld.long 0x10 24. "PRIV152,Privileged-only access permission for peripheral 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "PRIV151,Privileged-only access permission for peripheral 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "PRIV150,Privileged-only access permission for peripheral 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "PRIV149,Privileged-only access permission for peripheral 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "PRIV148,Privileged-only access permission for peripheral 148" "B_0x0,B_0x1" newline bitfld.long 0x10 19. "PRIV147,Privileged-only access permission for peripheral 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "PRIV146,Privileged-only access permission for peripheral 146" "B_0x0,B_0x1" bitfld.long 0x10 17. "PRIV145,Privileged-only access permission for peripheral 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "PRIV144,Privileged-only access permission for peripheral 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "PRIV143,Privileged-only access permission for peripheral 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "PRIV142,Privileged-only access permission for peripheral 142" "B_0x0,B_0x1" newline bitfld.long 0x10 13. "PRIV141,Privileged-only access permission for peripheral 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "PRIV140,Privileged-only access permission for peripheral 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "PRIV139,Privileged-only access permission for peripheral 139" "B_0x0,B_0x1" bitfld.long 0x10 10. "PRIV138,Privileged-only access permission for peripheral 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV137,Privileged-only access permission for peripheral 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "PRIV136,Privileged-only access permission for peripheral 136" "B_0x0,B_0x1" newline bitfld.long 0x10 7. "PRIV135,Privileged-only access permission for peripheral 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV134,Privileged-only access permission for peripheral 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV133,Privileged-only access permission for peripheral 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV132,Privileged-only access permission for peripheral 132" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV131,Privileged-only access permission for peripheral 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV130,Privileged-only access permission for peripheral 130" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "PRIV129,Privileged-only access permission for peripheral 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "PRIV128,Privileged-only access permission for peripheral 128" "B_0x0,B_0x1" line.long 0x14 "RIFSC_RISC_PRIVCFGR5,RIFSC RISFC slave privileged register 5" bitfld.long 0x14 31. "PRIV191,Privileged-only access permission for peripheral 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "PRIV190,Privileged-only access permission for peripheral 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "PRIV189,Privileged-only access permission for peripheral 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "PRIV188,Privileged-only access permission for peripheral 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "PRIV187,Privileged-only access permission for peripheral 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "PRIV186,Privileged-only access permission for peripheral 186" "B_0x0,B_0x1" newline bitfld.long 0x14 25. "PRIV185,Privileged-only access permission for peripheral 185" "B_0x0,B_0x1" bitfld.long 0x14 24. "PRIV184,Privileged-only access permission for peripheral 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "PRIV183,Privileged-only access permission for peripheral 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "PRIV182,Privileged-only access permission for peripheral 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "PRIV181,Privileged-only access permission for peripheral 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "PRIV180,Privileged-only access permission for peripheral 180" "B_0x0,B_0x1" newline bitfld.long 0x14 19. "PRIV179,Privileged-only access permission for peripheral 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "PRIV178,Privileged-only access permission for peripheral 178" "B_0x0,B_0x1" bitfld.long 0x14 17. "PRIV177,Privileged-only access permission for peripheral 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "PRIV176,Privileged-only access permission for peripheral 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "PRIV175,Privileged-only access permission for peripheral 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "PRIV174,Privileged-only access permission for peripheral 174" "B_0x0,B_0x1" newline bitfld.long 0x14 13. "PRIV173,Privileged-only access permission for peripheral 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "PRIV172,Privileged-only access permission for peripheral 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "PRIV171,Privileged-only access permission for peripheral 171" "B_0x0,B_0x1" bitfld.long 0x14 10. "PRIV170,Privileged-only access permission for peripheral 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "PRIV169,Privileged-only access permission for peripheral 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "PRIV168,Privileged-only access permission for peripheral 168" "B_0x0,B_0x1" newline bitfld.long 0x14 7. "PRIV167,Privileged-only access permission for peripheral 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV166,Privileged-only access permission for peripheral 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV165,Privileged-only access permission for peripheral 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV164,Privileged-only access permission for peripheral 164" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV163,Privileged-only access permission for peripheral 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV162,Privileged-only access permission for peripheral 162" "B_0x0,B_0x1" newline bitfld.long 0x14 1. "PRIV161,Privileged-only access permission for peripheral 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "PRIV160,Privileged-only access permission for peripheral 160" "B_0x0,B_0x1" group.long 0x50++0x17 line.long 0x0 "RIFSC_RISC_RCFGLOCKR0,RIFSC RISC slave resource configuration lock register 0" bitfld.long 0x0 31. "RLOCK31,rRsource lock for peripheral 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "RLOCK30,rRsource lock for peripheral 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "RLOCK29,rRsource lock for peripheral 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "RLOCK28,rRsource lock for peripheral 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "RLOCK27,rRsource lock for peripheral 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "RLOCK26,rRsource lock for peripheral 26" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "RLOCK25,rRsource lock for peripheral 25" "B_0x0,B_0x1" bitfld.long 0x0 24. "RLOCK24,rRsource lock for peripheral 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "RLOCK23,rRsource lock for peripheral 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "RLOCK22,rRsource lock for peripheral 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "RLOCK21,rRsource lock for peripheral 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "RLOCK20,rRsource lock for peripheral 20" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "RLOCK19,rRsource lock for peripheral 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "RLOCK18,rRsource lock for peripheral 18" "B_0x0,B_0x1" bitfld.long 0x0 17. "RLOCK17,rRsource lock for peripheral 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "RLOCK16,rRsource lock for peripheral 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "RLOCK15,rRsource lock for peripheral 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "RLOCK14,rRsource lock for peripheral 14" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "RLOCK13,rRsource lock for peripheral 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "RLOCK12,rRsource lock for peripheral 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "RLOCK11,rRsource lock for peripheral 11" "B_0x0,B_0x1" bitfld.long 0x0 10. "RLOCK10,rRsource lock for peripheral 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "RLOCK9,rRsource lock for peripheral 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "RLOCK8,rRsource lock for peripheral 8" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "RLOCK7,rRsource lock for peripheral 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "RLOCK6,rRsource lock for peripheral 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "RLOCK5,rRsource lock for peripheral 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "RLOCK4,rRsource lock for peripheral 4" "B_0x0,B_0x1" bitfld.long 0x0 3. "RLOCK3,rRsource lock for peripheral 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "RLOCK2,rRsource lock for peripheral 2" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "RLOCK1,rRsource lock for peripheral 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "RLOCK0,rRsource lock for peripheral 0" "B_0x0,B_0x1" line.long 0x4 "RIFSC_RISC_RCFGLOCKR1,RIFSC RISC slave resource configuration lock register 1" bitfld.long 0x4 31. "RLOCK63,rRsource lock for peripheral 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "RLOCK62,rRsource lock for peripheral 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "RLOCK61,rRsource lock for peripheral 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "RLOCK60,rRsource lock for peripheral 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "RLOCK59,rRsource lock for peripheral 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "RLOCK58,rRsource lock for peripheral 58" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "RLOCK57,rRsource lock for peripheral 57" "B_0x0,B_0x1" bitfld.long 0x4 24. "RLOCK56,rRsource lock for peripheral 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "RLOCK55,rRsource lock for peripheral 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "RLOCK54,rRsource lock for peripheral 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "RLOCK53,rRsource lock for peripheral 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "RLOCK52,rRsource lock for peripheral 52" "B_0x0,B_0x1" newline bitfld.long 0x4 19. "RLOCK51,rRsource lock for peripheral 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "RLOCK50,rRsource lock for peripheral 50" "B_0x0,B_0x1" bitfld.long 0x4 17. "RLOCK49,rRsource lock for peripheral 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "RLOCK48,rRsource lock for peripheral 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "RLOCK47,rRsource lock for peripheral 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "RLOCK46,rRsource lock for peripheral 46" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "RLOCK45,rRsource lock for peripheral 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "RLOCK44,rRsource lock for peripheral 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "RLOCK43,rRsource lock for peripheral 43" "B_0x0,B_0x1" bitfld.long 0x4 10. "RLOCK42,rRsource lock for peripheral 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "RLOCK41,rRsource lock for peripheral 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "RLOCK40,rRsource lock for peripheral 40" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "RLOCK39,rRsource lock for peripheral 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "RLOCK38,rRsource lock for peripheral 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "RLOCK37,rRsource lock for peripheral 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "RLOCK36,rRsource lock for peripheral 36" "B_0x0,B_0x1" bitfld.long 0x4 3. "RLOCK35,rRsource lock for peripheral 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "RLOCK34,rRsource lock for peripheral 34" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "RLOCK33,rRsource lock for peripheral 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "RLOCK32,rRsource lock for peripheral 32" "B_0x0,B_0x1" line.long 0x8 "RIFSC_RISC_RCFGLOCKR2,RIFSC RISC slave resource configuration lock register 2" bitfld.long 0x8 31. "RLOCK95,rRsource lock for peripheral 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "RLOCK94,rRsource lock for peripheral 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "RLOCK93,rRsource lock for peripheral 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "RLOCK92,rRsource lock for peripheral 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "RLOCK91,rRsource lock for peripheral 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "RLOCK90,rRsource lock for peripheral 90" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "RLOCK89,rRsource lock for peripheral 89" "B_0x0,B_0x1" bitfld.long 0x8 24. "RLOCK88,rRsource lock for peripheral 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "RLOCK87,rRsource lock for peripheral 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "RLOCK86,rRsource lock for peripheral 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "RLOCK85,rRsource lock for peripheral 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "RLOCK84,rRsource lock for peripheral 84" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RLOCK83,rRsource lock for peripheral 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "RLOCK82,rRsource lock for peripheral 82" "B_0x0,B_0x1" bitfld.long 0x8 17. "RLOCK81,rRsource lock for peripheral 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "RLOCK80,rRsource lock for peripheral 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "RLOCK79,rRsource lock for peripheral 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK78,rRsource lock for peripheral 78" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "RLOCK77,rRsource lock for peripheral 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK76,rRsource lock for peripheral 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK75,rRsource lock for peripheral 75" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK74,rRsource lock for peripheral 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "RLOCK73,rRsource lock for peripheral 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK72,rRsource lock for peripheral 72" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RLOCK71,rRsource lock for peripheral 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK70,rRsource lock for peripheral 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK69,rRsource lock for peripheral 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK68,rRsource lock for peripheral 68" "B_0x0,B_0x1" bitfld.long 0x8 3. "RLOCK67,rRsource lock for peripheral 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK66,rRsource lock for peripheral 66" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "RLOCK65,rRsource lock for peripheral 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK64,rRsource lock for peripheral 64" "B_0x0,B_0x1" line.long 0xC "RIFSC_RISC_RCFGLOCKR3,RIFSC RISC slave resource configuration lock register 3" bitfld.long 0xC 31. "RLOCK127,rRsource lock for peripheral 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "RLOCK126,rRsource lock for peripheral 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "RLOCK125,rRsource lock for peripheral 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "RLOCK124,rRsource lock for peripheral 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "RLOCK123,rRsource lock for peripheral 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "RLOCK122,rRsource lock for peripheral 122" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "RLOCK121,rRsource lock for peripheral 121" "B_0x0,B_0x1" bitfld.long 0xC 24. "RLOCK120,rRsource lock for peripheral 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "RLOCK119,rRsource lock for peripheral 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "RLOCK118,rRsource lock for peripheral 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "RLOCK117,rRsource lock for peripheral 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "RLOCK116,rRsource lock for peripheral 116" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RLOCK115,rRsource lock for peripheral 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "RLOCK114,rRsource lock for peripheral 114" "B_0x0,B_0x1" bitfld.long 0xC 17. "RLOCK113,rRsource lock for peripheral 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "RLOCK112,rRsource lock for peripheral 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "RLOCK111,rRsource lock for peripheral 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "RLOCK110,rRsource lock for peripheral 110" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "RLOCK109,rRsource lock for peripheral 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "RLOCK108,rRsource lock for peripheral 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "RLOCK107,rRsource lock for peripheral 107" "B_0x0,B_0x1" bitfld.long 0xC 10. "RLOCK106,rRsource lock for peripheral 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "RLOCK105,rRsource lock for peripheral 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "RLOCK104,rRsource lock for peripheral 104" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RLOCK103,rRsource lock for peripheral 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "RLOCK102,rRsource lock for peripheral 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "RLOCK101,rRsource lock for peripheral 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "RLOCK100,rRsource lock for peripheral 100" "B_0x0,B_0x1" bitfld.long 0xC 3. "RLOCK99,rRsource lock for peripheral 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "RLOCK98,rRsource lock for peripheral 98" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RLOCK97,rRsource lock for peripheral 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "RLOCK96,rRsource lock for peripheral 96" "B_0x0,B_0x1" line.long 0x10 "RIFSC_RISC_RCFGLOCKR4,RIFSC RISC slave resource configuration lock register 4" bitfld.long 0x10 31. "RLOCK159,rRsource lock for peripheral 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "RLOCK158,rRsource lock for peripheral 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "RLOCK157,rRsource lock for peripheral 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "RLOCK156,rRsource lock for peripheral 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "RLOCK155,rRsource lock for peripheral 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "RLOCK154,rRsource lock for peripheral 154" "B_0x0,B_0x1" newline bitfld.long 0x10 25. "RLOCK153,rRsource lock for peripheral 153" "B_0x0,B_0x1" bitfld.long 0x10 24. "RLOCK152,rRsource lock for peripheral 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "RLOCK151,rRsource lock for peripheral 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "RLOCK150,rRsource lock for peripheral 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "RLOCK149,rRsource lock for peripheral 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "RLOCK148,rRsource lock for peripheral 148" "B_0x0,B_0x1" newline bitfld.long 0x10 19. "RLOCK147,rRsource lock for peripheral 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "RLOCK146,rRsource lock for peripheral 146" "B_0x0,B_0x1" bitfld.long 0x10 17. "RLOCK145,rRsource lock for peripheral 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "RLOCK144,rRsource lock for peripheral 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "RLOCK143,rRsource lock for peripheral 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "RLOCK142,rRsource lock for peripheral 142" "B_0x0,B_0x1" newline bitfld.long 0x10 13. "RLOCK141,rRsource lock for peripheral 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "RLOCK140,rRsource lock for peripheral 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "RLOCK139,rRsource lock for peripheral 139" "B_0x0,B_0x1" bitfld.long 0x10 10. "RLOCK138,rRsource lock for peripheral 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "RLOCK137,rRsource lock for peripheral 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "RLOCK136,rRsource lock for peripheral 136" "B_0x0,B_0x1" newline bitfld.long 0x10 7. "RLOCK135,rRsource lock for peripheral 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "RLOCK134,rRsource lock for peripheral 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "RLOCK133,rRsource lock for peripheral 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "RLOCK132,rRsource lock for peripheral 132" "B_0x0,B_0x1" bitfld.long 0x10 3. "RLOCK131,rRsource lock for peripheral 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "RLOCK130,rRsource lock for peripheral 130" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "RLOCK129,rRsource lock for peripheral 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "RLOCK128,rRsource lock for peripheral 128" "B_0x0,B_0x1" line.long 0x14 "RIFSC_RISC_RCFGLOCKR5,RIFSC RISC slave resource configuration lock register 5" bitfld.long 0x14 31. "RLOCK191,rRsource lock for peripheral 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "RLOCK190,rRsource lock for peripheral 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "RLOCK189,rRsource lock for peripheral 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "RLOCK188,rRsource lock for peripheral 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "RLOCK187,rRsource lock for peripheral 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "RLOCK186,rRsource lock for peripheral 186" "B_0x0,B_0x1" newline bitfld.long 0x14 25. "RLOCK185,rRsource lock for peripheral 185" "B_0x0,B_0x1" bitfld.long 0x14 24. "RLOCK184,rRsource lock for peripheral 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "RLOCK183,rRsource lock for peripheral 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "RLOCK182,rRsource lock for peripheral 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "RLOCK181,rRsource lock for peripheral 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "RLOCK180,rRsource lock for peripheral 180" "B_0x0,B_0x1" newline bitfld.long 0x14 19. "RLOCK179,rRsource lock for peripheral 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "RLOCK178,rRsource lock for peripheral 178" "B_0x0,B_0x1" bitfld.long 0x14 17. "RLOCK177,rRsource lock for peripheral 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "RLOCK176,rRsource lock for peripheral 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "RLOCK175,rRsource lock for peripheral 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "RLOCK174,rRsource lock for peripheral 174" "B_0x0,B_0x1" newline bitfld.long 0x14 13. "RLOCK173,rRsource lock for peripheral 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "RLOCK172,rRsource lock for peripheral 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "RLOCK171,rRsource lock for peripheral 171" "B_0x0,B_0x1" bitfld.long 0x14 10. "RLOCK170,rRsource lock for peripheral 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "RLOCK169,rRsource lock for peripheral 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "RLOCK168,rRsource lock for peripheral 168" "B_0x0,B_0x1" newline bitfld.long 0x14 7. "RLOCK167,rRsource lock for peripheral 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "RLOCK166,rRsource lock for peripheral 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "RLOCK165,rRsource lock for peripheral 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "RLOCK164,rRsource lock for peripheral 164" "B_0x0,B_0x1" bitfld.long 0x14 3. "RLOCK163,rRsource lock for peripheral 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "RLOCK162,rRsource lock for peripheral 162" "B_0x0,B_0x1" newline bitfld.long 0x14 1. "RLOCK161,rRsource lock for peripheral 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "RLOCK160,rRsource lock for peripheral 160" "B_0x0,B_0x1" group.long 0x100++0x3FF line.long 0x0 "RIFSC_RISC_PER0_CIDCFGR,RIFSC RISC slave peripheral 0 CID configuration register" bitfld.long 0x0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "RIFSC_RISC_PER0_SEMCR,RIFSC RISC slave peripheral 0 semaphore control register" rbitfld.long 0x4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x8 "RIFSC_RISC_PER1_CIDCFGR,RIFSC RISC slave peripheral 1 CID configuration register" bitfld.long 0x8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC "RIFSC_RISC_PER1_SEMCR,RIFSC RISC slave peripheral 1 semaphore control register" rbitfld.long 0xC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x10 "RIFSC_RISC_PER2_CIDCFGR,RIFSC RISC slave peripheral 2 CID configuration register" bitfld.long 0x10 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "RIFSC_RISC_PER2_SEMCR,RIFSC RISC slave peripheral 2 semaphore control register" rbitfld.long 0x14 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "RIFSC_RISC_PER3_CIDCFGR,RIFSC RISC slave peripheral 3 CID configuration register" bitfld.long 0x18 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "RIFSC_RISC_PER3_SEMCR,RIFSC RISC slave peripheral 3 semaphore control register" rbitfld.long 0x1C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "RIFSC_RISC_PER4_CIDCFGR,RIFSC RISC slave peripheral 4 CID configuration register" bitfld.long 0x20 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "RIFSC_RISC_PER4_SEMCR,RIFSC RISC slave peripheral 4 semaphore control register" rbitfld.long 0x24 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "RIFSC_RISC_PER5_CIDCFGR,RIFSC RISC slave peripheral 5 CID configuration register" bitfld.long 0x28 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "RIFSC_RISC_PER5_SEMCR,RIFSC RISC slave peripheral 5 semaphore control register" rbitfld.long 0x2C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "RIFSC_RISC_PER6_CIDCFGR,RIFSC RISC slave peripheral 6 CID configuration register" bitfld.long 0x30 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "RIFSC_RISC_PER6_SEMCR,RIFSC RISC slave peripheral 6 semaphore control register" rbitfld.long 0x34 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "RIFSC_RISC_PER7_CIDCFGR,RIFSC RISC slave peripheral 7 CID configuration register" bitfld.long 0x38 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "RIFSC_RISC_PER7_SEMCR,RIFSC RISC slave peripheral 7 semaphore control register" rbitfld.long 0x3C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "RIFSC_RISC_PER8_CIDCFGR,RIFSC RISC slave peripheral 8 CID configuration register" bitfld.long 0x40 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "RIFSC_RISC_PER8_SEMCR,RIFSC RISC slave peripheral 8 semaphore control register" rbitfld.long 0x44 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "RIFSC_RISC_PER9_CIDCFGR,RIFSC RISC slave peripheral 9 CID configuration register" bitfld.long 0x48 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "RIFSC_RISC_PER9_SEMCR,RIFSC RISC slave peripheral 9 semaphore control register" rbitfld.long 0x4C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "RIFSC_RISC_PER10_CIDCFGR,RIFSC RISC slave peripheral 10 CID configuration register" bitfld.long 0x50 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "RIFSC_RISC_PER10_SEMCR,RIFSC RISC slave peripheral 10 semaphore control register" rbitfld.long 0x54 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "RIFSC_RISC_PER11_CIDCFGR,RIFSC RISC slave peripheral 11 CID configuration register" bitfld.long 0x58 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "RIFSC_RISC_PER11_SEMCR,RIFSC RISC slave peripheral 11 semaphore control register" rbitfld.long 0x5C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "RIFSC_RISC_PER12_CIDCFGR,RIFSC RISC slave peripheral 12 CID configuration register" bitfld.long 0x60 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "RIFSC_RISC_PER12_SEMCR,RIFSC RISC slave peripheral 12 semaphore control register" rbitfld.long 0x64 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "RIFSC_RISC_PER13_CIDCFGR,RIFSC RISC slave peripheral 13 CID configuration register" bitfld.long 0x68 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "RIFSC_RISC_PER13_SEMCR,RIFSC RISC slave peripheral 13 semaphore control register" rbitfld.long 0x6C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "RIFSC_RISC_PER14_CIDCFGR,RIFSC RISC slave peripheral 14 CID configuration register" bitfld.long 0x70 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "RIFSC_RISC_PER14_SEMCR,RIFSC RISC slave peripheral 14 semaphore control register" rbitfld.long 0x74 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "RIFSC_RISC_PER15_CIDCFGR,RIFSC RISC slave peripheral 15 CID configuration register" bitfld.long 0x78 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "RIFSC_RISC_PER15_SEMCR,RIFSC RISC slave peripheral 15 semaphore control register" rbitfld.long 0x7C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "RIFSC_RISC_PER16_CIDCFGR,RIFSC RISC slave peripheral 16 CID configuration register" bitfld.long 0x80 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "RIFSC_RISC_PER16_SEMCR,RIFSC RISC slave peripheral 16 semaphore control register" rbitfld.long 0x84 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "RIFSC_RISC_PER17_CIDCFGR,RIFSC RISC slave peripheral 17 CID configuration register" bitfld.long 0x88 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "RIFSC_RISC_PER17_SEMCR,RIFSC RISC slave peripheral 17 semaphore control register" rbitfld.long 0x8C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x90 "RIFSC_RISC_PER18_CIDCFGR,RIFSC RISC slave peripheral 18 CID configuration register" bitfld.long 0x90 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x90 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x90 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x90 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x94 "RIFSC_RISC_PER18_SEMCR,RIFSC RISC slave peripheral 18 semaphore control register" rbitfld.long 0x94 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x94 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x98 "RIFSC_RISC_PER19_CIDCFGR,RIFSC RISC slave peripheral 19 CID configuration register" bitfld.long 0x98 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x98 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x98 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x98 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x9C "RIFSC_RISC_PER19_SEMCR,RIFSC RISC slave peripheral 19 semaphore control register" rbitfld.long 0x9C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x9C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xA0 "RIFSC_RISC_PER20_CIDCFGR,RIFSC RISC slave peripheral 20 CID configuration register" bitfld.long 0xA0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xA0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xA0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xA0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xA4 "RIFSC_RISC_PER20_SEMCR,RIFSC RISC slave peripheral 20 semaphore control register" rbitfld.long 0xA4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xA4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xA8 "RIFSC_RISC_PER21_CIDCFGR,RIFSC RISC slave peripheral 21 CID configuration register" bitfld.long 0xA8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xA8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xA8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xA8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xAC "RIFSC_RISC_PER21_SEMCR,RIFSC RISC slave peripheral 21 semaphore control register" rbitfld.long 0xAC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xAC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xB0 "RIFSC_RISC_PER22_CIDCFGR,RIFSC RISC slave peripheral 22 CID configuration register" bitfld.long 0xB0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xB0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xB0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xB0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xB4 "RIFSC_RISC_PER22_SEMCR,RIFSC RISC slave peripheral 22 semaphore control register" rbitfld.long 0xB4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xB4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xB8 "RIFSC_RISC_PER23_CIDCFGR,RIFSC RISC slave peripheral 23 CID configuration register" bitfld.long 0xB8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xB8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xB8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xB8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xBC "RIFSC_RISC_PER23_SEMCR,RIFSC RISC slave peripheral 23 semaphore control register" rbitfld.long 0xBC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xBC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xC0 "RIFSC_RISC_PER24_CIDCFGR,RIFSC RISC slave peripheral 24 CID configuration register" bitfld.long 0xC0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xC0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xC0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC4 "RIFSC_RISC_PER24_SEMCR,RIFSC RISC slave peripheral 24 semaphore control register" rbitfld.long 0xC4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xC8 "RIFSC_RISC_PER25_CIDCFGR,RIFSC RISC slave peripheral 25 CID configuration register" bitfld.long 0xC8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xC8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xC8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xCC "RIFSC_RISC_PER25_SEMCR,RIFSC RISC slave peripheral 25 semaphore control register" rbitfld.long 0xCC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xCC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xD0 "RIFSC_RISC_PER26_CIDCFGR,RIFSC RISC slave peripheral 26 CID configuration register" bitfld.long 0xD0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xD0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xD0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xD0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xD4 "RIFSC_RISC_PER26_SEMCR,RIFSC RISC slave peripheral 26 semaphore control register" rbitfld.long 0xD4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xD4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xD8 "RIFSC_RISC_PER27_CIDCFGR,RIFSC RISC slave peripheral 27 CID configuration register" bitfld.long 0xD8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xD8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xD8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xD8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xDC "RIFSC_RISC_PER27_SEMCR,RIFSC RISC slave peripheral 27 semaphore control register" rbitfld.long 0xDC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xDC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xE0 "RIFSC_RISC_PER28_CIDCFGR,RIFSC RISC slave peripheral 28 CID configuration register" bitfld.long 0xE0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xE0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xE0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xE0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xE4 "RIFSC_RISC_PER28_SEMCR,RIFSC RISC slave peripheral 28 semaphore control register" rbitfld.long 0xE4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xE4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xE8 "RIFSC_RISC_PER29_CIDCFGR,RIFSC RISC slave peripheral 29 CID configuration register" bitfld.long 0xE8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xE8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xE8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xE8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xEC "RIFSC_RISC_PER29_SEMCR,RIFSC RISC slave peripheral 29 semaphore control register" rbitfld.long 0xEC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xEC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xF0 "RIFSC_RISC_PER30_CIDCFGR,RIFSC RISC slave peripheral 30 CID configuration register" bitfld.long 0xF0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xF0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xF0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xF0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xF4 "RIFSC_RISC_PER30_SEMCR,RIFSC RISC slave peripheral 30 semaphore control register" rbitfld.long 0xF4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xF4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xF8 "RIFSC_RISC_PER31_CIDCFGR,RIFSC RISC slave peripheral 31 CID configuration register" bitfld.long 0xF8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xF8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xF8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xF8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xFC "RIFSC_RISC_PER31_SEMCR,RIFSC RISC slave peripheral 31 semaphore control register" rbitfld.long 0xFC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xFC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x100 "RIFSC_RISC_PER32_CIDCFGR,RIFSC RISC slave peripheral 32 CID configuration register" bitfld.long 0x100 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x100 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x100 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x100 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x104 "RIFSC_RISC_PER32_SEMCR,RIFSC RISC slave peripheral 32 semaphore control register" rbitfld.long 0x104 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x104 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x108 "RIFSC_RISC_PER33_CIDCFGR,RIFSC RISC slave peripheral 33 CID configuration register" bitfld.long 0x108 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x108 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x108 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x108 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x10C "RIFSC_RISC_PER33_SEMCR,RIFSC RISC slave peripheral 33 semaphore control register" rbitfld.long 0x10C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x110 "RIFSC_RISC_PER34_CIDCFGR,RIFSC RISC slave peripheral 34 CID configuration register" bitfld.long 0x110 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x110 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x110 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x110 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x114 "RIFSC_RISC_PER34_SEMCR,RIFSC RISC slave peripheral 34 semaphore control register" rbitfld.long 0x114 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x114 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x118 "RIFSC_RISC_PER35_CIDCFGR,RIFSC RISC slave peripheral 35 CID configuration register" bitfld.long 0x118 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x118 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x118 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x118 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x11C "RIFSC_RISC_PER35_SEMCR,RIFSC RISC slave peripheral 35 semaphore control register" rbitfld.long 0x11C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x11C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x120 "RIFSC_RISC_PER36_CIDCFGR,RIFSC RISC slave peripheral 36 CID configuration register" bitfld.long 0x120 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x120 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x120 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x120 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x124 "RIFSC_RISC_PER36_SEMCR,RIFSC RISC slave peripheral 36 semaphore control register" rbitfld.long 0x124 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x124 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x128 "RIFSC_RISC_PER37_CIDCFGR,RIFSC RISC slave peripheral 37 CID configuration register" bitfld.long 0x128 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x128 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x128 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x128 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x12C "RIFSC_RISC_PER37_SEMCR,RIFSC RISC slave peripheral 37 semaphore control register" rbitfld.long 0x12C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x12C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x130 "RIFSC_RISC_PER38_CIDCFGR,RIFSC RISC slave peripheral 38 CID configuration register" bitfld.long 0x130 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x130 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x130 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x130 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x134 "RIFSC_RISC_PER38_SEMCR,RIFSC RISC slave peripheral 38 semaphore control register" rbitfld.long 0x134 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x134 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x138 "RIFSC_RISC_PER39_CIDCFGR,RIFSC RISC slave peripheral 39 CID configuration register" bitfld.long 0x138 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x138 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x138 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x138 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x13C "RIFSC_RISC_PER39_SEMCR,RIFSC RISC slave peripheral 39 semaphore control register" rbitfld.long 0x13C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x13C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x140 "RIFSC_RISC_PER40_CIDCFGR,RIFSC RISC slave peripheral 40 CID configuration register" bitfld.long 0x140 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x140 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x140 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x140 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x144 "RIFSC_RISC_PER40_SEMCR,RIFSC RISC slave peripheral 40 semaphore control register" rbitfld.long 0x144 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x144 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x148 "RIFSC_RISC_PER41_CIDCFGR,RIFSC RISC slave peripheral 41 CID configuration register" bitfld.long 0x148 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x148 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x148 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x148 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14C "RIFSC_RISC_PER41_SEMCR,RIFSC RISC slave peripheral 41 semaphore control register" rbitfld.long 0x14C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x150 "RIFSC_RISC_PER42_CIDCFGR,RIFSC RISC slave peripheral 42 CID configuration register" bitfld.long 0x150 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x150 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x150 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x150 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x154 "RIFSC_RISC_PER42_SEMCR,RIFSC RISC slave peripheral 42 semaphore control register" rbitfld.long 0x154 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x154 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x158 "RIFSC_RISC_PER43_CIDCFGR,RIFSC RISC slave peripheral 43 CID configuration register" bitfld.long 0x158 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x158 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x158 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x158 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x15C "RIFSC_RISC_PER43_SEMCR,RIFSC RISC slave peripheral 43 semaphore control register" rbitfld.long 0x15C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x15C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x160 "RIFSC_RISC_PER44_CIDCFGR,RIFSC RISC slave peripheral 44 CID configuration register" bitfld.long 0x160 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x160 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x160 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x160 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x164 "RIFSC_RISC_PER44_SEMCR,RIFSC RISC slave peripheral 44 semaphore control register" rbitfld.long 0x164 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x164 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x168 "RIFSC_RISC_PER45_CIDCFGR,RIFSC RISC slave peripheral 45 CID configuration register" bitfld.long 0x168 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x168 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x168 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x168 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x16C "RIFSC_RISC_PER45_SEMCR,RIFSC RISC slave peripheral 45 semaphore control register" rbitfld.long 0x16C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x16C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x170 "RIFSC_RISC_PER46_CIDCFGR,RIFSC RISC slave peripheral 46 CID configuration register" bitfld.long 0x170 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x170 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x170 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x170 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x174 "RIFSC_RISC_PER46_SEMCR,RIFSC RISC slave peripheral 46 semaphore control register" rbitfld.long 0x174 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x174 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x178 "RIFSC_RISC_PER47_CIDCFGR,RIFSC RISC slave peripheral 47 CID configuration register" bitfld.long 0x178 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x178 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x178 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x178 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x17C "RIFSC_RISC_PER47_SEMCR,RIFSC RISC slave peripheral 47 semaphore control register" rbitfld.long 0x17C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x17C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x180 "RIFSC_RISC_PER48_CIDCFGR,RIFSC RISC slave peripheral 48 CID configuration register" bitfld.long 0x180 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x180 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x180 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x180 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x184 "RIFSC_RISC_PER48_SEMCR,RIFSC RISC slave peripheral 48 semaphore control register" rbitfld.long 0x184 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x184 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x188 "RIFSC_RISC_PER49_CIDCFGR,RIFSC RISC slave peripheral 49 CID configuration register" bitfld.long 0x188 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x188 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x188 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x188 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x18C "RIFSC_RISC_PER49_SEMCR,RIFSC RISC slave peripheral 49 semaphore control register" rbitfld.long 0x18C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x190 "RIFSC_RISC_PER50_CIDCFGR,RIFSC RISC slave peripheral 50 CID configuration register" bitfld.long 0x190 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x190 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x190 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x190 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x194 "RIFSC_RISC_PER50_SEMCR,RIFSC RISC slave peripheral 50 semaphore control register" rbitfld.long 0x194 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x194 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x198 "RIFSC_RISC_PER51_CIDCFGR,RIFSC RISC slave peripheral 51 CID configuration register" bitfld.long 0x198 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x198 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x198 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x198 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x19C "RIFSC_RISC_PER51_SEMCR,RIFSC RISC slave peripheral 51 semaphore control register" rbitfld.long 0x19C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x19C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1A0 "RIFSC_RISC_PER52_CIDCFGR,RIFSC RISC slave peripheral 52 CID configuration register" bitfld.long 0x1A0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1A0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1A0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1A0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1A4 "RIFSC_RISC_PER52_SEMCR,RIFSC RISC slave peripheral 52 semaphore control register" rbitfld.long 0x1A4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1A4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1A8 "RIFSC_RISC_PER53_CIDCFGR,RIFSC RISC slave peripheral 53 CID configuration register" bitfld.long 0x1A8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1A8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1A8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1A8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1AC "RIFSC_RISC_PER53_SEMCR,RIFSC RISC slave peripheral 53 semaphore control register" rbitfld.long 0x1AC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1AC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1B0 "RIFSC_RISC_PER54_CIDCFGR,RIFSC RISC slave peripheral 54 CID configuration register" bitfld.long 0x1B0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1B0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1B0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1B0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1B4 "RIFSC_RISC_PER54_SEMCR,RIFSC RISC slave peripheral 54 semaphore control register" rbitfld.long 0x1B4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1B4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1B8 "RIFSC_RISC_PER55_CIDCFGR,RIFSC RISC slave peripheral 55 CID configuration register" bitfld.long 0x1B8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1B8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1B8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1B8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1BC "RIFSC_RISC_PER55_SEMCR,RIFSC RISC slave peripheral 55 semaphore control register" rbitfld.long 0x1BC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1BC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1C0 "RIFSC_RISC_PER56_CIDCFGR,RIFSC RISC slave peripheral 56 CID configuration register" bitfld.long 0x1C0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1C0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1C0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C4 "RIFSC_RISC_PER56_SEMCR,RIFSC RISC slave peripheral 56 semaphore control register" rbitfld.long 0x1C4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1C8 "RIFSC_RISC_PER57_CIDCFGR,RIFSC RISC slave peripheral 57 CID configuration register" bitfld.long 0x1C8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1C8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1C8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1CC "RIFSC_RISC_PER57_SEMCR,RIFSC RISC slave peripheral 57 semaphore control register" rbitfld.long 0x1CC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1CC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1D0 "RIFSC_RISC_PER58_CIDCFGR,RIFSC RISC slave peripheral 58 CID configuration register" bitfld.long 0x1D0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1D0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1D0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1D0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1D4 "RIFSC_RISC_PER58_SEMCR,RIFSC RISC slave peripheral 58 semaphore control register" rbitfld.long 0x1D4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1D4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1D8 "RIFSC_RISC_PER59_CIDCFGR,RIFSC RISC slave peripheral 59 CID configuration register" bitfld.long 0x1D8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1D8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1D8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1D8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1DC "RIFSC_RISC_PER59_SEMCR,RIFSC RISC slave peripheral 59 semaphore control register" rbitfld.long 0x1DC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1DC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1E0 "RIFSC_RISC_PER60_CIDCFGR,RIFSC RISC slave peripheral 60 CID configuration register" bitfld.long 0x1E0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1E0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1E0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1E0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1E4 "RIFSC_RISC_PER60_SEMCR,RIFSC RISC slave peripheral 60 semaphore control register" rbitfld.long 0x1E4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1E4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1E8 "RIFSC_RISC_PER61_CIDCFGR,RIFSC RISC slave peripheral 61 CID configuration register" bitfld.long 0x1E8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1E8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1E8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1E8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1EC "RIFSC_RISC_PER61_SEMCR,RIFSC RISC slave peripheral 61 semaphore control register" rbitfld.long 0x1EC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1EC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1F0 "RIFSC_RISC_PER62_CIDCFGR,RIFSC RISC slave peripheral 62 CID configuration register" bitfld.long 0x1F0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1F0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1F0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1F0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1F4 "RIFSC_RISC_PER62_SEMCR,RIFSC RISC slave peripheral 62 semaphore control register" rbitfld.long 0x1F4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1F4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1F8 "RIFSC_RISC_PER63_CIDCFGR,RIFSC RISC slave peripheral 63 CID configuration register" bitfld.long 0x1F8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1F8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1F8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1F8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1FC "RIFSC_RISC_PER63_SEMCR,RIFSC RISC slave peripheral 63 semaphore control register" rbitfld.long 0x1FC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1FC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x200 "RIFSC_RISC_PER64_CIDCFGR,RIFSC RISC slave peripheral 64 CID configuration register" bitfld.long 0x200 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x200 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x200 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x200 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x204 "RIFSC_RISC_PER64_SEMCR,RIFSC RISC slave peripheral 64 semaphore control register" rbitfld.long 0x204 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x204 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x208 "RIFSC_RISC_PER65_CIDCFGR,RIFSC RISC slave peripheral 65 CID configuration register" bitfld.long 0x208 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x208 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x208 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x208 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x20C "RIFSC_RISC_PER65_SEMCR,RIFSC RISC slave peripheral 65 semaphore control register" rbitfld.long 0x20C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x210 "RIFSC_RISC_PER66_CIDCFGR,RIFSC RISC slave peripheral 66 CID configuration register" bitfld.long 0x210 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x210 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x210 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x210 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x214 "RIFSC_RISC_PER66_SEMCR,RIFSC RISC slave peripheral 66 semaphore control register" rbitfld.long 0x214 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x214 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x218 "RIFSC_RISC_PER67_CIDCFGR,RIFSC RISC slave peripheral 67 CID configuration register" bitfld.long 0x218 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x218 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x218 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x218 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x21C "RIFSC_RISC_PER67_SEMCR,RIFSC RISC slave peripheral 67 semaphore control register" rbitfld.long 0x21C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x21C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x220 "RIFSC_RISC_PER68_CIDCFGR,RIFSC RISC slave peripheral 68 CID configuration register" bitfld.long 0x220 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x220 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x220 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x220 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x224 "RIFSC_RISC_PER68_SEMCR,RIFSC RISC slave peripheral 68 semaphore control register" rbitfld.long 0x224 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x224 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x228 "RIFSC_RISC_PER69_CIDCFGR,RIFSC RISC slave peripheral 69 CID configuration register" bitfld.long 0x228 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x228 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x228 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x228 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x22C "RIFSC_RISC_PER69_SEMCR,RIFSC RISC slave peripheral 69 semaphore control register" rbitfld.long 0x22C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x22C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x230 "RIFSC_RISC_PER70_CIDCFGR,RIFSC RISC slave peripheral 70 CID configuration register" bitfld.long 0x230 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x230 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x230 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x230 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x234 "RIFSC_RISC_PER70_SEMCR,RIFSC RISC slave peripheral 70 semaphore control register" rbitfld.long 0x234 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x234 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x238 "RIFSC_RISC_PER71_CIDCFGR,RIFSC RISC slave peripheral 71 CID configuration register" bitfld.long 0x238 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x238 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x238 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x238 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x23C "RIFSC_RISC_PER71_SEMCR,RIFSC RISC slave peripheral 71 semaphore control register" rbitfld.long 0x23C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x23C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x240 "RIFSC_RISC_PER72_CIDCFGR,RIFSC RISC slave peripheral 72 CID configuration register" bitfld.long 0x240 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x240 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x240 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x240 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x244 "RIFSC_RISC_PER72_SEMCR,RIFSC RISC slave peripheral 72 semaphore control register" rbitfld.long 0x244 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x244 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x248 "RIFSC_RISC_PER73_CIDCFGR,RIFSC RISC slave peripheral 73 CID configuration register" bitfld.long 0x248 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x248 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x248 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x248 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24C "RIFSC_RISC_PER73_SEMCR,RIFSC RISC slave peripheral 73 semaphore control register" rbitfld.long 0x24C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x250 "RIFSC_RISC_PER74_CIDCFGR,RIFSC RISC slave peripheral 74 CID configuration register" bitfld.long 0x250 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x250 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x250 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x250 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x254 "RIFSC_RISC_PER74_SEMCR,RIFSC RISC slave peripheral 74 semaphore control register" rbitfld.long 0x254 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x254 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x258 "RIFSC_RISC_PER75_CIDCFGR,RIFSC RISC slave peripheral 75 CID configuration register" bitfld.long 0x258 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x258 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x258 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x258 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x25C "RIFSC_RISC_PER75_SEMCR,RIFSC RISC slave peripheral 75 semaphore control register" rbitfld.long 0x25C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x25C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x260 "RIFSC_RISC_PER76_CIDCFGR,RIFSC RISC slave peripheral 76 CID configuration register" bitfld.long 0x260 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x260 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x260 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x260 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x264 "RIFSC_RISC_PER76_SEMCR,RIFSC RISC slave peripheral 76 semaphore control register" rbitfld.long 0x264 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x264 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x268 "RIFSC_RISC_PER77_CIDCFGR,RIFSC RISC slave peripheral 77 CID configuration register" bitfld.long 0x268 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x268 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x268 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x268 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x26C "RIFSC_RISC_PER77_SEMCR,RIFSC RISC slave peripheral 77 semaphore control register" rbitfld.long 0x26C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x26C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x270 "RIFSC_RISC_PER78_CIDCFGR,RIFSC RISC slave peripheral 78 CID configuration register" bitfld.long 0x270 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x270 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x270 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x270 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x274 "RIFSC_RISC_PER78_SEMCR,RIFSC RISC slave peripheral 78 semaphore control register" rbitfld.long 0x274 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x274 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x278 "RIFSC_RISC_PER79_CIDCFGR,RIFSC RISC slave peripheral 79 CID configuration register" bitfld.long 0x278 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x278 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x278 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x278 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x27C "RIFSC_RISC_PER79_SEMCR,RIFSC RISC slave peripheral 79 semaphore control register" rbitfld.long 0x27C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x27C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x280 "RIFSC_RISC_PER80_CIDCFGR,RIFSC RISC slave peripheral 80 CID configuration register" bitfld.long 0x280 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x280 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x280 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x280 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x284 "RIFSC_RISC_PER80_SEMCR,RIFSC RISC slave peripheral 80 semaphore control register" rbitfld.long 0x284 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x284 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x288 "RIFSC_RISC_PER81_CIDCFGR,RIFSC RISC slave peripheral 81 CID configuration register" bitfld.long 0x288 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x288 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x288 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x288 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x28C "RIFSC_RISC_PER81_SEMCR,RIFSC RISC slave peripheral 81 semaphore control register" rbitfld.long 0x28C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x290 "RIFSC_RISC_PER82_CIDCFGR,RIFSC RISC slave peripheral 82 CID configuration register" bitfld.long 0x290 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x290 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x290 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x290 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x294 "RIFSC_RISC_PER82_SEMCR,RIFSC RISC slave peripheral 82 semaphore control register" rbitfld.long 0x294 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x294 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x298 "RIFSC_RISC_PER83_CIDCFGR,RIFSC RISC slave peripheral 83 CID configuration register" bitfld.long 0x298 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x298 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x298 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x298 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x29C "RIFSC_RISC_PER83_SEMCR,RIFSC RISC slave peripheral 83 semaphore control register" rbitfld.long 0x29C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x29C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2A0 "RIFSC_RISC_PER84_CIDCFGR,RIFSC RISC slave peripheral 84 CID configuration register" bitfld.long 0x2A0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2A0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2A0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2A0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2A4 "RIFSC_RISC_PER84_SEMCR,RIFSC RISC slave peripheral 84 semaphore control register" rbitfld.long 0x2A4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2A4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2A8 "RIFSC_RISC_PER85_CIDCFGR,RIFSC RISC slave peripheral 85 CID configuration register" bitfld.long 0x2A8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2A8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2A8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2A8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2AC "RIFSC_RISC_PER85_SEMCR,RIFSC RISC slave peripheral 85 semaphore control register" rbitfld.long 0x2AC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2AC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2B0 "RIFSC_RISC_PER86_CIDCFGR,RIFSC RISC slave peripheral 86 CID configuration register" bitfld.long 0x2B0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2B0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2B0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2B0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2B4 "RIFSC_RISC_PER86_SEMCR,RIFSC RISC slave peripheral 86 semaphore control register" rbitfld.long 0x2B4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2B4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2B8 "RIFSC_RISC_PER87_CIDCFGR,RIFSC RISC slave peripheral 87 CID configuration register" bitfld.long 0x2B8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2B8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2B8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2B8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2BC "RIFSC_RISC_PER87_SEMCR,RIFSC RISC slave peripheral 87 semaphore control register" rbitfld.long 0x2BC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2BC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2C0 "RIFSC_RISC_PER88_CIDCFGR,RIFSC RISC slave peripheral 88 CID configuration register" bitfld.long 0x2C0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2C0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2C0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C4 "RIFSC_RISC_PER88_SEMCR,RIFSC RISC slave peripheral 88 semaphore control register" rbitfld.long 0x2C4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2C8 "RIFSC_RISC_PER89_CIDCFGR,RIFSC RISC slave peripheral 89 CID configuration register" bitfld.long 0x2C8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2C8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2C8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2CC "RIFSC_RISC_PER89_SEMCR,RIFSC RISC slave peripheral 89 semaphore control register" rbitfld.long 0x2CC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2CC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2D0 "RIFSC_RISC_PER90_CIDCFGR,RIFSC RISC slave peripheral 90 CID configuration register" bitfld.long 0x2D0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2D0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2D0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2D0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2D4 "RIFSC_RISC_PER90_SEMCR,RIFSC RISC slave peripheral 90 semaphore control register" rbitfld.long 0x2D4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2D4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2D8 "RIFSC_RISC_PER91_CIDCFGR,RIFSC RISC slave peripheral 91 CID configuration register" bitfld.long 0x2D8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2D8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2D8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2D8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2DC "RIFSC_RISC_PER91_SEMCR,RIFSC RISC slave peripheral 91 semaphore control register" rbitfld.long 0x2DC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2DC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2E0 "RIFSC_RISC_PER92_CIDCFGR,RIFSC RISC slave peripheral 92 CID configuration register" bitfld.long 0x2E0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2E0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2E0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2E0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2E4 "RIFSC_RISC_PER92_SEMCR,RIFSC RISC slave peripheral 92 semaphore control register" rbitfld.long 0x2E4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2E4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2E8 "RIFSC_RISC_PER93_CIDCFGR,RIFSC RISC slave peripheral 93 CID configuration register" bitfld.long 0x2E8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2E8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2E8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2E8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2EC "RIFSC_RISC_PER93_SEMCR,RIFSC RISC slave peripheral 93 semaphore control register" rbitfld.long 0x2EC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2EC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2F0 "RIFSC_RISC_PER94_CIDCFGR,RIFSC RISC slave peripheral 94 CID configuration register" bitfld.long 0x2F0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2F0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2F0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2F0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2F4 "RIFSC_RISC_PER94_SEMCR,RIFSC RISC slave peripheral 94 semaphore control register" rbitfld.long 0x2F4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2F4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2F8 "RIFSC_RISC_PER95_CIDCFGR,RIFSC RISC slave peripheral 95 CID configuration register" bitfld.long 0x2F8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2F8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2F8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2F8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2FC "RIFSC_RISC_PER95_SEMCR,RIFSC RISC slave peripheral 95 semaphore control register" rbitfld.long 0x2FC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2FC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x300 "RIFSC_RISC_PER96_CIDCFGR,RIFSC RISC slave peripheral 96 CID configuration register" bitfld.long 0x300 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x300 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x300 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x300 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x304 "RIFSC_RISC_PER96_SEMCR,RIFSC RISC slave peripheral 96 semaphore control register" rbitfld.long 0x304 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x304 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x308 "RIFSC_RISC_PER97_CIDCFGR,RIFSC RISC slave peripheral 97 CID configuration register" bitfld.long 0x308 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x308 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x308 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x308 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x30C "RIFSC_RISC_PER97_SEMCR,RIFSC RISC slave peripheral 97 semaphore control register" rbitfld.long 0x30C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x310 "RIFSC_RISC_PER98_CIDCFGR,RIFSC RISC slave peripheral 98 CID configuration register" bitfld.long 0x310 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x310 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x310 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x310 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x314 "RIFSC_RISC_PER98_SEMCR,RIFSC RISC slave peripheral 98 semaphore control register" rbitfld.long 0x314 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x314 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x318 "RIFSC_RISC_PER99_CIDCFGR,RIFSC RISC slave peripheral 99 CID configuration register" bitfld.long 0x318 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x318 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x318 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x318 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x31C "RIFSC_RISC_PER99_SEMCR,RIFSC RISC slave peripheral 99 semaphore control register" rbitfld.long 0x31C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x31C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x320 "RIFSC_RISC_PER100_CIDCFGR,RIFSC RISC slave peripheral 100 CID configuration register" bitfld.long 0x320 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x320 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x320 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x320 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x324 "RIFSC_RISC_PER100_SEMCR,RIFSC RISC slave peripheral 100 semaphore control register" rbitfld.long 0x324 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x324 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x328 "RIFSC_RISC_PER101_CIDCFGR,RIFSC RISC slave peripheral 101 CID configuration register" bitfld.long 0x328 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x328 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x328 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x328 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x32C "RIFSC_RISC_PER101_SEMCR,RIFSC RISC slave peripheral 101 semaphore control register" rbitfld.long 0x32C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x32C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x330 "RIFSC_RISC_PER102_CIDCFGR,RIFSC RISC slave peripheral 102 CID configuration register" bitfld.long 0x330 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x330 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x330 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x330 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x334 "RIFSC_RISC_PER102_SEMCR,RIFSC RISC slave peripheral 102 semaphore control register" rbitfld.long 0x334 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x334 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x338 "RIFSC_RISC_PER103_CIDCFGR,RIFSC RISC slave peripheral 103 CID configuration register" bitfld.long 0x338 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x338 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x338 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x338 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x33C "RIFSC_RISC_PER103_SEMCR,RIFSC RISC slave peripheral 103 semaphore control register" rbitfld.long 0x33C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x33C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x340 "RIFSC_RISC_PER104_CIDCFGR,RIFSC RISC slave peripheral 104 CID configuration register" bitfld.long 0x340 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x340 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x340 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x340 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x344 "RIFSC_RISC_PER104_SEMCR,RIFSC RISC slave peripheral 104 semaphore control register" rbitfld.long 0x344 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x344 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x348 "RIFSC_RISC_PER105_CIDCFGR,RIFSC RISC slave peripheral 105 CID configuration register" bitfld.long 0x348 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x348 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x348 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x348 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34C "RIFSC_RISC_PER105_SEMCR,RIFSC RISC slave peripheral 105 semaphore control register" rbitfld.long 0x34C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x350 "RIFSC_RISC_PER106_CIDCFGR,RIFSC RISC slave peripheral 106 CID configuration register" bitfld.long 0x350 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x350 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x350 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x350 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x354 "RIFSC_RISC_PER106_SEMCR,RIFSC RISC slave peripheral 106 semaphore control register" rbitfld.long 0x354 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x354 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x358 "RIFSC_RISC_PER107_CIDCFGR,RIFSC RISC slave peripheral 107 CID configuration register" bitfld.long 0x358 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x358 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x358 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x358 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x35C "RIFSC_RISC_PER107_SEMCR,RIFSC RISC slave peripheral 107 semaphore control register" rbitfld.long 0x35C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x35C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x360 "RIFSC_RISC_PER108_CIDCFGR,RIFSC RISC slave peripheral 108 CID configuration register" bitfld.long 0x360 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x360 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x360 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x360 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x364 "RIFSC_RISC_PER108_SEMCR,RIFSC RISC slave peripheral 108 semaphore control register" rbitfld.long 0x364 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x364 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x368 "RIFSC_RISC_PER109_CIDCFGR,RIFSC RISC slave peripheral 109 CID configuration register" bitfld.long 0x368 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x368 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x368 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x368 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x36C "RIFSC_RISC_PER109_SEMCR,RIFSC RISC slave peripheral 109 semaphore control register" rbitfld.long 0x36C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x36C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x370 "RIFSC_RISC_PER110_CIDCFGR,RIFSC RISC slave peripheral 110 CID configuration register" bitfld.long 0x370 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x370 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x370 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x370 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x374 "RIFSC_RISC_PER110_SEMCR,RIFSC RISC slave peripheral 110 semaphore control register" rbitfld.long 0x374 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x374 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x378 "RIFSC_RISC_PER111_CIDCFGR,RIFSC RISC slave peripheral 111 CID configuration register" bitfld.long 0x378 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x378 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x378 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x378 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x37C "RIFSC_RISC_PER111_SEMCR,RIFSC RISC slave peripheral 111 semaphore control register" rbitfld.long 0x37C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x37C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x380 "RIFSC_RISC_PER112_CIDCFGR,RIFSC RISC slave peripheral 112 CID configuration register" bitfld.long 0x380 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x380 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x380 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x380 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x384 "RIFSC_RISC_PER112_SEMCR,RIFSC RISC slave peripheral 112 semaphore control register" rbitfld.long 0x384 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x384 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x388 "RIFSC_RISC_PER113_CIDCFGR,RIFSC RISC slave peripheral 113 CID configuration register" bitfld.long 0x388 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x388 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x388 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x388 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x38C "RIFSC_RISC_PER113_SEMCR,RIFSC RISC slave peripheral 113 semaphore control register" rbitfld.long 0x38C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x390 "RIFSC_RISC_PER114_CIDCFGR,RIFSC RISC slave peripheral 114 CID configuration register" bitfld.long 0x390 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x390 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x390 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x390 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x394 "RIFSC_RISC_PER114_SEMCR,RIFSC RISC slave peripheral 114 semaphore control register" rbitfld.long 0x394 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x394 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x398 "RIFSC_RISC_PER115_CIDCFGR,RIFSC RISC slave peripheral 115 CID configuration register" bitfld.long 0x398 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x398 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x398 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x398 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x39C "RIFSC_RISC_PER115_SEMCR,RIFSC RISC slave peripheral 115 semaphore control register" rbitfld.long 0x39C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x39C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3A0 "RIFSC_RISC_PER116_CIDCFGR,RIFSC RISC slave peripheral 116 CID configuration register" bitfld.long 0x3A0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3A0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3A0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3A0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3A4 "RIFSC_RISC_PER116_SEMCR,RIFSC RISC slave peripheral 116 semaphore control register" rbitfld.long 0x3A4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3A4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3A8 "RIFSC_RISC_PER117_CIDCFGR,RIFSC RISC slave peripheral 117 CID configuration register" bitfld.long 0x3A8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3A8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3A8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3A8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3AC "RIFSC_RISC_PER117_SEMCR,RIFSC RISC slave peripheral 117 semaphore control register" rbitfld.long 0x3AC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3AC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3B0 "RIFSC_RISC_PER118_CIDCFGR,RIFSC RISC slave peripheral 118 CID configuration register" bitfld.long 0x3B0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3B0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3B0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3B0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3B4 "RIFSC_RISC_PER118_SEMCR,RIFSC RISC slave peripheral 118 semaphore control register" rbitfld.long 0x3B4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3B4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3B8 "RIFSC_RISC_PER119_CIDCFGR,RIFSC RISC slave peripheral 119 CID configuration register" bitfld.long 0x3B8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3B8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3B8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3B8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3BC "RIFSC_RISC_PER119_SEMCR,RIFSC RISC slave peripheral 119 semaphore control register" rbitfld.long 0x3BC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3BC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3C0 "RIFSC_RISC_PER120_CIDCFGR,RIFSC RISC slave peripheral 120 CID configuration register" bitfld.long 0x3C0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3C0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3C0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C4 "RIFSC_RISC_PER120_SEMCR,RIFSC RISC slave peripheral 120 semaphore control register" rbitfld.long 0x3C4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3C8 "RIFSC_RISC_PER121_CIDCFGR,RIFSC RISC slave peripheral 121 CID configuration register" bitfld.long 0x3C8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3C8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3C8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3CC "RIFSC_RISC_PER121_SEMCR,RIFSC RISC slave peripheral 121 semaphore control register" rbitfld.long 0x3CC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3CC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3D0 "RIFSC_RISC_PER122_CIDCFGR,RIFSC RISC slave peripheral 122 CID configuration register" bitfld.long 0x3D0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3D0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3D0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3D0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3D4 "RIFSC_RISC_PER122_SEMCR,RIFSC RISC slave peripheral 122 semaphore control register" rbitfld.long 0x3D4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3D4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3D8 "RIFSC_RISC_PER123_CIDCFGR,RIFSC RISC slave peripheral 123 CID configuration register" bitfld.long 0x3D8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3D8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3D8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3D8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3DC "RIFSC_RISC_PER123_SEMCR,RIFSC RISC slave peripheral 123 semaphore control register" rbitfld.long 0x3DC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3DC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3E0 "RIFSC_RISC_PER124_CIDCFGR,RIFSC RISC slave peripheral 124 CID configuration register" bitfld.long 0x3E0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3E0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3E0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3E0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3E4 "RIFSC_RISC_PER124_SEMCR,RIFSC RISC slave peripheral 124 semaphore control register" rbitfld.long 0x3E4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3E4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3E8 "RIFSC_RISC_PER125_CIDCFGR,RIFSC RISC slave peripheral 125 CID configuration register" bitfld.long 0x3E8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3E8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3E8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3E8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3EC "RIFSC_RISC_PER125_SEMCR,RIFSC RISC slave peripheral 125 semaphore control register" rbitfld.long 0x3EC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3EC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3F0 "RIFSC_RISC_PER126_CIDCFGR,RIFSC RISC slave peripheral 126 CID configuration register" bitfld.long 0x3F0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3F0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3F0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3F0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3F4 "RIFSC_RISC_PER126_SEMCR,RIFSC RISC slave peripheral 126 semaphore control register" rbitfld.long 0x3F4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3F4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3F8 "RIFSC_RISC_PER127_CIDCFGR,RIFSC RISC slave peripheral 127 CID configuration register" bitfld.long 0x3F8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3F8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3F8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3F8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3FC "RIFSC_RISC_PER127_SEMCR,RIFSC RISC slave peripheral 127 semaphore control register" rbitfld.long 0x3FC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3FC 0. "SEM_MUTEX,Semaphore mutex" "0,1" group.long 0x900++0x3 line.long 0x0 "RIFSC_RISC_REG1_ACFGR,RIFSC RISAL memory region 1 subregion z configuration register" bitfld.long 0x0 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "RLOCK,Resource lock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SREN,Subregion enable" "B_0x0,B_0x1" group.long 0x908++0x3 line.long 0x0 "RIFSC_RISC_REG1_BCFGR,RIFSC RISAL memory region 1 subregion z configuration register" bitfld.long 0x0 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "RLOCK,Resource lock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SREN,Subregion enable" "B_0x0,B_0x1" group.long 0x910++0x3 line.long 0x0 "RIFSC_RISC_REG2_ACFGR,RIFSC RISAL memory region 2 subregion z configuration register" bitfld.long 0x0 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "RLOCK,Resource lock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SREN,Subregion enable" "B_0x0,B_0x1" group.long 0x918++0x3 line.long 0x0 "RIFSC_RISC_REG2_BCFGR,RIFSC RISAL memory region 2 subregion z configuration register" bitfld.long 0x0 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "RLOCK,Resource lock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SREN,Subregion enable" "B_0x0,B_0x1" group.long 0x920++0x3 line.long 0x0 "RIFSC_RISC_REG3_ACFGR,RIFSC RISAL memory region 3 subregion z configuration register" bitfld.long 0x0 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "RLOCK,Resource lock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SREN,Subregion enable" "B_0x0,B_0x1" group.long 0x928++0x3 line.long 0x0 "RIFSC_RISC_REG3_BCFGR,RIFSC RISAL memory region 3 subregion z configuration register" bitfld.long 0x0 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "RLOCK,Resource lock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SREN,Subregion enable" "B_0x0,B_0x1" group.long 0xC00++0x3 line.long 0x0 "RIFSC_RIMC_CR,RIFSC RIMC master configuration register" rbitfld.long 0x0 15. "DDEN,Debug domain enable" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "DAPCID,Debug access port compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 4.--6. "TDCID,Trusted domain compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "WUCDONE,Wake-up CPU done" "B_0x0,B_0x1" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0xC04++0x3 line.long 0x0 "RIFSC_RIMC_SR,RIFSC RIMC master status register" bitfld.long 0x0 1. "WUCEN,Wake-up CPU enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "GDPEN,Global debug profile enable" "B_0x0,B_0x1" group.long 0xC10++0x3F line.long 0x0 "RIFSC_RIMC_ATTR0,RIFSC RIMC master attribute register 0" bitfld.long 0x0 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x0 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x4 "RIFSC_RIMC_ATTR1,RIFSC RIMC master attribute register 1" bitfld.long 0x4 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x4 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x8 "RIFSC_RIMC_ATTR2,RIFSC RIMC master attribute register 2" bitfld.long 0x8 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x8 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x8 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0xC "RIFSC_RIMC_ATTR3,RIFSC RIMC master attribute register 3" bitfld.long 0xC 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0xC 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0xC 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x10 "RIFSC_RIMC_ATTR4,RIFSC RIMC master attribute register 4" bitfld.long 0x10 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x10 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x14 "RIFSC_RIMC_ATTR5,RIFSC RIMC master attribute register 5" bitfld.long 0x14 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x14 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x14 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x18 "RIFSC_RIMC_ATTR6,RIFSC RIMC master attribute register 6" bitfld.long 0x18 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x18 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x18 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x1C "RIFSC_RIMC_ATTR7,RIFSC RIMC master attribute register 7" bitfld.long 0x1C 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x1C 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x1C 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x20 "RIFSC_RIMC_ATTR8,RIFSC RIMC master attribute register 8" bitfld.long 0x20 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x20 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x24 "RIFSC_RIMC_ATTR9,RIFSC RIMC master attribute register 9" bitfld.long 0x24 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x24 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x24 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x28 "RIFSC_RIMC_ATTR10,RIFSC RIMC master attribute register 10" bitfld.long 0x28 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x28 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x28 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x2C "RIFSC_RIMC_ATTR11,RIFSC RIMC master attribute register 11" bitfld.long 0x2C 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x2C 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x2C 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x30 "RIFSC_RIMC_ATTR12,RIFSC RIMC master attribute register 12" bitfld.long 0x30 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x30 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x30 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x34 "RIFSC_RIMC_ATTR13,RIFSC RIMC master attribute register 13" bitfld.long 0x34 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x34 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x34 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x38 "RIFSC_RIMC_ATTR14,RIFSC RIMC master attribute register 14" bitfld.long 0x38 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x38 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x38 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x3C "RIFSC_RIMC_ATTR15,RIFSC RIMC master attribute register 15" bitfld.long 0x3C 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x3C 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x3C 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 2. "CIDSEL,CID selection" "B_0x0,B_0x1" rgroup.long 0xFB0++0xF line.long 0x0 "RIFSC_PPSR0,RIFSC peripheral protection status register 0" bitfld.long 0x0 31. "PPEN31,Peripheral protection enable 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPEN30,Peripheral protection enable 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPEN29,Peripheral protection enable 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPEN28,Peripheral protection enable 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPEN27,Peripheral protection enable 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPEN26,Peripheral protection enable 26" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "PPEN25,Peripheral protection enable 25" "B_0x0,B_0x1" bitfld.long 0x0 24. "PPEN24,Peripheral protection enable 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPEN23,Peripheral protection enable 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPEN22,Peripheral protection enable 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPEN21,Peripheral protection enable 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPEN20,Peripheral protection enable 20" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "PPEN19,Peripheral protection enable 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPEN18,Peripheral protection enable 18" "B_0x0,B_0x1" bitfld.long 0x0 17. "PPEN17,Peripheral protection enable 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPEN16,Peripheral protection enable 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPEN15,Peripheral protection enable 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPEN14,Peripheral protection enable 14" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "PPEN13,Peripheral protection enable 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPEN12,Peripheral protection enable 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPEN11,Peripheral protection enable 11" "B_0x0,B_0x1" bitfld.long 0x0 10. "PPEN10,Peripheral protection enable 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPEN9,Peripheral protection enable 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPEN8,Peripheral protection enable 8" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "PPEN7,Peripheral protection enable 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPEN6,Peripheral protection enable 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPEN5,Peripheral protection enable 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPEN4,Peripheral protection enable 4" "B_0x0,B_0x1" bitfld.long 0x0 3. "PPEN3,Peripheral protection enable 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPEN2,Peripheral protection enable 2" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "PPEN1,Peripheral protection enable 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPEN0,Peripheral protection enable 0" "B_0x0,B_0x1" line.long 0x4 "RIFSC_PPSR1,RIFSC peripheral protection status register 1" bitfld.long 0x4 31. "PPEN63,Peripheral protection enable 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "PPEN62,Peripheral protection enable 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "PPEN61,Peripheral protection enable 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "PPEN60,Peripheral protection enable 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "PPEN59,Peripheral protection enable 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "PPEN58,Peripheral protection enable 58" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "PPEN57,Peripheral protection enable 57" "B_0x0,B_0x1" bitfld.long 0x4 24. "PPEN56,Peripheral protection enable 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "PPEN55,Peripheral protection enable 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "PPEN54,Peripheral protection enable 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "PPEN53,Peripheral protection enable 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "PPEN52,Peripheral protection enable 52" "B_0x0,B_0x1" newline bitfld.long 0x4 19. "PPEN51,Peripheral protection enable 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "PPEN50,Peripheral protection enable 50" "B_0x0,B_0x1" bitfld.long 0x4 17. "PPEN49,Peripheral protection enable 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "PPEN48,Peripheral protection enable 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "PPEN47,Peripheral protection enable 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "PPEN46,Peripheral protection enable 46" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "PPEN45,Peripheral protection enable 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "PPEN44,Peripheral protection enable 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "PPEN43,Peripheral protection enable 43" "B_0x0,B_0x1" bitfld.long 0x4 10. "PPEN42,Peripheral protection enable 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "PPEN41,Peripheral protection enable 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "PPEN40,Peripheral protection enable 40" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "PPEN39,Peripheral protection enable 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "PPEN38,Peripheral protection enable 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "PPEN37,Peripheral protection enable 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "PPEN36,Peripheral protection enable 36" "B_0x0,B_0x1" bitfld.long 0x4 3. "PPEN35,Peripheral protection enable 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "PPEN34,Peripheral protection enable 34" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "PPEN33,Peripheral protection enable 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "PPEN32,Peripheral protection enable 32" "B_0x0,B_0x1" line.long 0x8 "RIFSC_PPSR2,RIFSC peripheral protection status register 2" bitfld.long 0x8 31. "PPEN95,Peripheral protection enable 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "PPEN94,Peripheral protection enable 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "PPEN93,Peripheral protection enable 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "PPEN92,Peripheral protection enable 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "PPEN91,Peripheral protection enable 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "PPEN90,Peripheral protection enable 90" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "PPEN89,Peripheral protection enable 89" "B_0x0,B_0x1" bitfld.long 0x8 24. "PPEN88,Peripheral protection enable 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "PPEN87,Peripheral protection enable 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "PPEN86,Peripheral protection enable 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "PPEN85,Peripheral protection enable 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "PPEN84,Peripheral protection enable 84" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "PPEN83,Peripheral protection enable 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "PPEN82,Peripheral protection enable 82" "B_0x0,B_0x1" bitfld.long 0x8 17. "PPEN81,Peripheral protection enable 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "PPEN80,Peripheral protection enable 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "PPEN79,Peripheral protection enable 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "PPEN78,Peripheral protection enable 78" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "PPEN77,Peripheral protection enable 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "PPEN76,Peripheral protection enable 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "PPEN75,Peripheral protection enable 75" "B_0x0,B_0x1" bitfld.long 0x8 10. "PPEN74,Peripheral protection enable 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "PPEN73,Peripheral protection enable 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "PPEN72,Peripheral protection enable 72" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "PPEN71,Peripheral protection enable 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "PPEN70,Peripheral protection enable 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "PPEN69,Peripheral protection enable 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "PPEN68,Peripheral protection enable 68" "B_0x0,B_0x1" bitfld.long 0x8 3. "PPEN67,Peripheral protection enable 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "PPEN66,Peripheral protection enable 66" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "PPEN65,Peripheral protection enable 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "PPEN64,Peripheral protection enable 64" "B_0x0,B_0x1" line.long 0xC "RIFSC_PPSR3,RIFSC peripheral protection status register 3" bitfld.long 0xC 31. "PPEN127,Peripheral protection enable 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "PPEN126,Peripheral protection enable 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "PPEN125,Peripheral protection enable 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "PPEN124,Peripheral protection enable 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "PPEN123,Peripheral protection enable 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "PPEN122,Peripheral protection enable 122" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "PPEN121,Peripheral protection enable 121" "B_0x0,B_0x1" bitfld.long 0xC 24. "PPEN120,Peripheral protection enable 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "PPEN119,Peripheral protection enable 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "PPEN118,Peripheral protection enable 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "PPEN117,Peripheral protection enable 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "PPEN116,Peripheral protection enable 116" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "PPEN115,Peripheral protection enable 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "PPEN114,Peripheral protection enable 114" "B_0x0,B_0x1" bitfld.long 0xC 17. "PPEN113,Peripheral protection enable 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "PPEN112,Peripheral protection enable 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "PPEN111,Peripheral protection enable 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "PPEN110,Peripheral protection enable 110" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "PPEN109,Peripheral protection enable 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "PPEN108,Peripheral protection enable 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "PPEN107,Peripheral protection enable 107" "B_0x0,B_0x1" bitfld.long 0xC 10. "PPEN106,Peripheral protection enable 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "PPEN105,Peripheral protection enable 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "PPEN104,Peripheral protection enable 104" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "PPEN103,Peripheral protection enable 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "PPEN102,Peripheral protection enable 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "PPEN101,Peripheral protection enable 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "PPEN100,Peripheral protection enable 100" "B_0x0,B_0x1" bitfld.long 0xC 3. "PPEN99,Peripheral protection enable 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "PPEN98,Peripheral protection enable 98" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "PPEN97,Peripheral protection enable 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "PPEN96,Peripheral protection enable 96" "B_0x0,B_0x1" rgroup.long 0xFE8++0x17 line.long 0x0 "RIFSC_HWCFGR3,RIFSC hardware configuration register 3" hexmask.long 0x0 0.--31. 1. "CFG,Hardware configuration" line.long 0x4 "RIFSC_HWCFGR2,RIFSC hardware configuration register 2" hexmask.long.byte 0x4 24.--31. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x4 16.--23. 1. "CFG2,Hardware configuration 2" hexmask.long.word 0x4 0.--15. 1. "CFG1,Hardware configuration 1" line.long 0x8 "RIFSC_HWCFGR1,RIFSC hardware configuration register 1" hexmask.long.byte 0x8 20.--23. 1. "CFG6,Hardware configuration 6" hexmask.long.byte 0x8 16.--19. 1. "CFG5,Hardware configuration 5" hexmask.long.byte 0x8 12.--15. 1. "CFG4,Hardware configuration 4" hexmask.long.byte 0x8 8.--11. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x8 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x8 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0xC "RIFSC_VERR,RIFSC version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,RIFSC major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,RIFSC minor revision" line.long 0x10 "RIFSC_IPIDR,RIFSC identification register" hexmask.long 0x10 0.--31. 1. "ID,RIFSC identification code" line.long 0x14 "RIFSC_SIDR,RIFSC size identification register" hexmask.long 0x14 0.--31. 1. "SID,RIFSC size identification code" tree.end tree "RIFSC_S" base ad:0x52080000 group.long 0x0++0x3 line.long 0x0 "RIFSC_RISC_CR,RIFSC RISC slave configuration register x" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" group.long 0x10++0x17 line.long 0x0 "RIFSC_RISC_SECCFGR0,RIFSC RISC slave security configuration register 0" bitfld.long 0x0 31. "SEC31,Security configuration for peripheral 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "SEC30,Security configuration for peripheral 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "SEC29,Security configuration for peripheral 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "SEC28,Security configuration for peripheral 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "SEC27,Security configuration for peripheral 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "SEC26,Security configuration for peripheral 26" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "SEC25,Security configuration for peripheral 25" "B_0x0,B_0x1" bitfld.long 0x0 24. "SEC24,Security configuration for peripheral 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "SEC23,Security configuration for peripheral 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "SEC22,Security configuration for peripheral 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "SEC21,Security configuration for peripheral 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "SEC20,Security configuration for peripheral 20" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "SEC19,Security configuration for peripheral 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "SEC18,Security configuration for peripheral 18" "B_0x0,B_0x1" bitfld.long 0x0 17. "SEC17,Security configuration for peripheral 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "SEC16,Security configuration for peripheral 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "SEC15,Security configuration for peripheral 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,Security configuration for peripheral 14" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SEC13,Security configuration for peripheral 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,Security configuration for peripheral 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,Security configuration for peripheral 11" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,Security configuration for peripheral 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "SEC9,Security configuration for peripheral 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,Security configuration for peripheral 8" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "SEC7,Security configuration for peripheral 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Security configuration for peripheral 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Security configuration for peripheral 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Security configuration for peripheral 4" "B_0x0,B_0x1" bitfld.long 0x0 3. "SEC3,Security configuration for peripheral 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Security configuration for peripheral 2" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "SEC1,Security configuration for peripheral 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,Security configuration for peripheral 0" "B_0x0,B_0x1" line.long 0x4 "RIFSC_RISC_SECCFGR1,RIFSC RISC slave security configuration register 1" bitfld.long 0x4 31. "SEC63,Security configuration for peripheral 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "SEC62,Security configuration for peripheral 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "SEC61,Security configuration for peripheral 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "SEC60,Security configuration for peripheral 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "SEC59,Security configuration for peripheral 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "SEC58,Security configuration for peripheral 58" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "SEC57,Security configuration for peripheral 57" "B_0x0,B_0x1" bitfld.long 0x4 24. "SEC56,Security configuration for peripheral 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "SEC55,Security configuration for peripheral 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "SEC54,Security configuration for peripheral 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "SEC53,Security configuration for peripheral 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "SEC52,Security configuration for peripheral 52" "B_0x0,B_0x1" newline bitfld.long 0x4 19. "SEC51,Security configuration for peripheral 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "SEC50,Security configuration for peripheral 50" "B_0x0,B_0x1" bitfld.long 0x4 17. "SEC49,Security configuration for peripheral 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "SEC48,Security configuration for peripheral 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "SEC47,Security configuration for peripheral 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "SEC46,Security configuration for peripheral 46" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "SEC45,Security configuration for peripheral 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "SEC44,Security configuration for peripheral 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "SEC43,Security configuration for peripheral 43" "B_0x0,B_0x1" bitfld.long 0x4 10. "SEC42,Security configuration for peripheral 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "SEC41,Security configuration for peripheral 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "SEC40,Security configuration for peripheral 40" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "SEC39,Security configuration for peripheral 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "SEC38,Security configuration for peripheral 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "SEC37,Security configuration for peripheral 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "SEC36,Security configuration for peripheral 36" "B_0x0,B_0x1" bitfld.long 0x4 3. "SEC35,Security configuration for peripheral 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "SEC34,Security configuration for peripheral 34" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "SEC33,Security configuration for peripheral 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "SEC32,Security configuration for peripheral 32" "B_0x0,B_0x1" line.long 0x8 "RIFSC_RISC_SECCFGR2,RIFSC RISC slave security configuration register 2" bitfld.long 0x8 31. "SEC95,Security configuration for peripheral 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "SEC94,Security configuration for peripheral 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "SEC93,Security configuration for peripheral 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "SEC92,Security configuration for peripheral 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "SEC91,Security configuration for peripheral 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "SEC90,Security configuration for peripheral 90" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "SEC89,Security configuration for peripheral 89" "B_0x0,B_0x1" bitfld.long 0x8 24. "SEC88,Security configuration for peripheral 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "SEC87,Security configuration for peripheral 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "SEC86,Security configuration for peripheral 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "SEC85,Security configuration for peripheral 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "SEC84,Security configuration for peripheral 84" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "SEC83,Security configuration for peripheral 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "SEC82,Security configuration for peripheral 82" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEC81,Security configuration for peripheral 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEC80,Security configuration for peripheral 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "SEC79,Security configuration for peripheral 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "SEC78,Security configuration for peripheral 78" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "SEC77,Security configuration for peripheral 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "SEC76,Security configuration for peripheral 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "SEC75,Security configuration for peripheral 75" "B_0x0,B_0x1" bitfld.long 0x8 10. "SEC74,Security configuration for peripheral 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "SEC73,Security configuration for peripheral 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "SEC72,Security configuration for peripheral 72" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "SEC71,Security configuration for peripheral 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "SEC70,Security configuration for peripheral 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "SEC69,Security configuration for peripheral 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "SEC68,Security configuration for peripheral 68" "B_0x0,B_0x1" bitfld.long 0x8 3. "SEC67,Security configuration for peripheral 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "SEC66,Security configuration for peripheral 66" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "SEC65,Security configuration for peripheral 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "SEC64,Security configuration for peripheral 64" "B_0x0,B_0x1" line.long 0xC "RIFSC_RISC_SECCFGR3,RIFSC RISC slave security configuration register 3" bitfld.long 0xC 31. "SEC127,Security configuration for peripheral 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "SEC126,Security configuration for peripheral 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "SEC125,Security configuration for peripheral 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "SEC124,Security configuration for peripheral 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "SEC123,Security configuration for peripheral 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "SEC122,Security configuration for peripheral 122" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "SEC121,Security configuration for peripheral 121" "B_0x0,B_0x1" bitfld.long 0xC 24. "SEC120,Security configuration for peripheral 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "SEC119,Security configuration for peripheral 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "SEC118,Security configuration for peripheral 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "SEC117,Security configuration for peripheral 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "SEC116,Security configuration for peripheral 116" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "SEC115,Security configuration for peripheral 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "SEC114,Security configuration for peripheral 114" "B_0x0,B_0x1" bitfld.long 0xC 17. "SEC113,Security configuration for peripheral 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "SEC112,Security configuration for peripheral 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "SEC111,Security configuration for peripheral 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "SEC110,Security configuration for peripheral 110" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "SEC109,Security configuration for peripheral 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "SEC108,Security configuration for peripheral 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "SEC107,Security configuration for peripheral 107" "B_0x0,B_0x1" bitfld.long 0xC 10. "SEC106,Security configuration for peripheral 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "SEC105,Security configuration for peripheral 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "SEC104,Security configuration for peripheral 104" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "SEC103,Security configuration for peripheral 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "SEC102,Security configuration for peripheral 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "SEC101,Security configuration for peripheral 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "SEC100,Security configuration for peripheral 100" "B_0x0,B_0x1" bitfld.long 0xC 3. "SEC99,Security configuration for peripheral 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "SEC98,Security configuration for peripheral 98" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "SEC97,Security configuration for peripheral 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "SEC96,Security configuration for peripheral 96" "B_0x0,B_0x1" line.long 0x10 "RIFSC_RISC_SECCFGR4,RIFSC RISC slave security configuration register 4" bitfld.long 0x10 31. "SEC159,Security configuration for peripheral 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "SEC158,Security configuration for peripheral 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "SEC157,Security configuration for peripheral 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "SEC156,Security configuration for peripheral 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "SEC155,Security configuration for peripheral 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "SEC154,Security configuration for peripheral 154" "B_0x0,B_0x1" newline bitfld.long 0x10 25. "SEC153,Security configuration for peripheral 153" "B_0x0,B_0x1" bitfld.long 0x10 24. "SEC152,Security configuration for peripheral 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "SEC151,Security configuration for peripheral 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "SEC150,Security configuration for peripheral 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "SEC149,Security configuration for peripheral 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "SEC148,Security configuration for peripheral 148" "B_0x0,B_0x1" newline bitfld.long 0x10 19. "SEC147,Security configuration for peripheral 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEC146,Security configuration for peripheral 146" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEC145,Security configuration for peripheral 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEC144,Security configuration for peripheral 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "SEC143,Security configuration for peripheral 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "SEC142,Security configuration for peripheral 142" "B_0x0,B_0x1" newline bitfld.long 0x10 13. "SEC141,Security configuration for peripheral 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "SEC140,Security configuration for peripheral 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "SEC139,Security configuration for peripheral 139" "B_0x0,B_0x1" bitfld.long 0x10 10. "SEC138,Security configuration for peripheral 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "SEC137,Security configuration for peripheral 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC136,Security configuration for peripheral 136" "B_0x0,B_0x1" newline bitfld.long 0x10 7. "SEC135,Security configuration for peripheral 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "SEC134,Security configuration for peripheral 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "SEC133,Security configuration for peripheral 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "SEC132,Security configuration for peripheral 132" "B_0x0,B_0x1" bitfld.long 0x10 3. "SEC131,Security configuration for peripheral 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "SEC130,Security configuration for peripheral 130" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "SEC129,Security configuration for peripheral 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "SEC128,Security configuration for peripheral 128" "B_0x0,B_0x1" line.long 0x14 "RIFSC_RISC_SECCFGR5,RIFSC RISC slave security configuration register 5" bitfld.long 0x14 31. "SEC191,Security configuration for peripheral 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "SEC190,Security configuration for peripheral 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "SEC189,Security configuration for peripheral 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "SEC188,Security configuration for peripheral 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "SEC187,Security configuration for peripheral 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "SEC186,Security configuration for peripheral 186" "B_0x0,B_0x1" newline bitfld.long 0x14 25. "SEC185,Security configuration for peripheral 185" "B_0x0,B_0x1" bitfld.long 0x14 24. "SEC184,Security configuration for peripheral 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "SEC183,Security configuration for peripheral 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "SEC182,Security configuration for peripheral 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "SEC181,Security configuration for peripheral 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "SEC180,Security configuration for peripheral 180" "B_0x0,B_0x1" newline bitfld.long 0x14 19. "SEC179,Security configuration for peripheral 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "SEC178,Security configuration for peripheral 178" "B_0x0,B_0x1" bitfld.long 0x14 17. "SEC177,Security configuration for peripheral 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "SEC176,Security configuration for peripheral 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "SEC175,Security configuration for peripheral 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "SEC174,Security configuration for peripheral 174" "B_0x0,B_0x1" newline bitfld.long 0x14 13. "SEC173,Security configuration for peripheral 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "SEC172,Security configuration for peripheral 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "SEC171,Security configuration for peripheral 171" "B_0x0,B_0x1" bitfld.long 0x14 10. "SEC170,Security configuration for peripheral 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "SEC169,Security configuration for peripheral 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "SEC168,Security configuration for peripheral 168" "B_0x0,B_0x1" newline bitfld.long 0x14 7. "SEC167,Security configuration for peripheral 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC166,Security configuration for peripheral 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "SEC165,Security configuration for peripheral 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "SEC164,Security configuration for peripheral 164" "B_0x0,B_0x1" bitfld.long 0x14 3. "SEC163,Security configuration for peripheral 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "SEC162,Security configuration for peripheral 162" "B_0x0,B_0x1" newline bitfld.long 0x14 1. "SEC161,Security configuration for peripheral 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "SEC160,Security configuration for peripheral 160" "B_0x0,B_0x1" group.long 0x30++0x17 line.long 0x0 "RIFSC_RISC_PRIVCFGR0,RIFSC RISFC slave privileged register 0" bitfld.long 0x0 31. "PRIV31,Privileged-only access permission for peripheral 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRIV30,Privileged-only access permission for peripheral 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRIV29,Privileged-only access permission for peripheral 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRIV28,Privileged-only access permission for peripheral 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRIV27,Privileged-only access permission for peripheral 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRIV26,Privileged-only access permission for peripheral 26" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "PRIV25,Privileged-only access permission for peripheral 25" "B_0x0,B_0x1" bitfld.long 0x0 24. "PRIV24,Privileged-only access permission for peripheral 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRIV23,Privileged-only access permission for peripheral 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIV22,Privileged-only access permission for peripheral 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIV21,Privileged-only access permission for peripheral 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIV20,Privileged-only access permission for peripheral 20" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "PRIV19,Privileged-only access permission for peripheral 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIV18,Privileged-only access permission for peripheral 18" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIV17,Privileged-only access permission for peripheral 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRIV16,Privileged-only access permission for peripheral 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRIV15,Privileged-only access permission for peripheral 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRIV14,Privileged-only access permission for peripheral 14" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "PRIV13,Privileged-only access permission for peripheral 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRIV12,Privileged-only access permission for peripheral 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRIV11,Privileged-only access permission for peripheral 11" "B_0x0,B_0x1" bitfld.long 0x0 10. "PRIV10,Privileged-only access permission for peripheral 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRIV9,Privileged-only access permission for peripheral 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRIV8,Privileged-only access permission for peripheral 8" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "PRIV7,Privileged-only access permission for peripheral 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged-only access permission for peripheral 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged-only access permission for peripheral 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged-only access permission for peripheral 4" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged-only access permission for peripheral 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged-only access permission for peripheral 2" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "PRIV1,Privileged-only access permission for peripheral 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRIV0,Privileged-only access permission for peripheral 0" "B_0x0,B_0x1" line.long 0x4 "RIFSC_RISC_PRIVCFGR1,RIFSC RISFC slave privileged register 1" bitfld.long 0x4 31. "PRIV63,Privileged-only access permission for peripheral 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "PRIV62,Privileged-only access permission for peripheral 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "PRIV61,Privileged-only access permission for peripheral 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "PRIV60,Privileged-only access permission for peripheral 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "PRIV59,Privileged-only access permission for peripheral 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "PRIV58,Privileged-only access permission for peripheral 58" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "PRIV57,Privileged-only access permission for peripheral 57" "B_0x0,B_0x1" bitfld.long 0x4 24. "PRIV56,Privileged-only access permission for peripheral 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "PRIV55,Privileged-only access permission for peripheral 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "PRIV54,Privileged-only access permission for peripheral 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "PRIV53,Privileged-only access permission for peripheral 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "PRIV52,Privileged-only access permission for peripheral 52" "B_0x0,B_0x1" newline bitfld.long 0x4 19. "PRIV51,Privileged-only access permission for peripheral 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "PRIV50,Privileged-only access permission for peripheral 50" "B_0x0,B_0x1" bitfld.long 0x4 17. "PRIV49,Privileged-only access permission for peripheral 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "PRIV48,Privileged-only access permission for peripheral 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "PRIV47,Privileged-only access permission for peripheral 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV46,Privileged-only access permission for peripheral 46" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "PRIV45,Privileged-only access permission for peripheral 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV44,Privileged-only access permission for peripheral 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV43,Privileged-only access permission for peripheral 43" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV42,Privileged-only access permission for peripheral 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "PRIV41,Privileged-only access permission for peripheral 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV40,Privileged-only access permission for peripheral 40" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "PRIV39,Privileged-only access permission for peripheral 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV38,Privileged-only access permission for peripheral 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV37,Privileged-only access permission for peripheral 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV36,Privileged-only access permission for peripheral 36" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV35,Privileged-only access permission for peripheral 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV34,Privileged-only access permission for peripheral 34" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "PRIV33,Privileged-only access permission for peripheral 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV32,Privileged-only access permission for peripheral 32" "B_0x0,B_0x1" line.long 0x8 "RIFSC_RISC_PRIVCFGR2,RIFSC RISFC slave privileged register 2" bitfld.long 0x8 31. "PRIV95,Privileged-only access permission for peripheral 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "PRIV94,Privileged-only access permission for peripheral 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "PRIV93,Privileged-only access permission for peripheral 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "PRIV92,Privileged-only access permission for peripheral 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "PRIV91,Privileged-only access permission for peripheral 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "PRIV90,Privileged-only access permission for peripheral 90" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "PRIV89,Privileged-only access permission for peripheral 89" "B_0x0,B_0x1" bitfld.long 0x8 24. "PRIV88,Privileged-only access permission for peripheral 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "PRIV87,Privileged-only access permission for peripheral 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "PRIV86,Privileged-only access permission for peripheral 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "PRIV85,Privileged-only access permission for peripheral 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "PRIV84,Privileged-only access permission for peripheral 84" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "PRIV83,Privileged-only access permission for peripheral 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "PRIV82,Privileged-only access permission for peripheral 82" "B_0x0,B_0x1" bitfld.long 0x8 17. "PRIV81,Privileged-only access permission for peripheral 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "PRIV80,Privileged-only access permission for peripheral 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "PRIV79,Privileged-only access permission for peripheral 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "PRIV78,Privileged-only access permission for peripheral 78" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "PRIV77,Privileged-only access permission for peripheral 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "PRIV76,Privileged-only access permission for peripheral 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "PRIV75,Privileged-only access permission for peripheral 75" "B_0x0,B_0x1" bitfld.long 0x8 10. "PRIV74,Privileged-only access permission for peripheral 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "PRIV73,Privileged-only access permission for peripheral 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "PRIV72,Privileged-only access permission for peripheral 72" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "PRIV71,Privileged-only access permission for peripheral 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV70,Privileged-only access permission for peripheral 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV69,Privileged-only access permission for peripheral 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV68,Privileged-only access permission for peripheral 68" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV67,Privileged-only access permission for peripheral 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV66,Privileged-only access permission for peripheral 66" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "PRIV65,Privileged-only access permission for peripheral 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "PRIV64,Privileged-only access permission for peripheral 64" "B_0x0,B_0x1" line.long 0xC "RIFSC_RISC_PRIVCFGR3,RIFSC RISFC slave privileged register 3" bitfld.long 0xC 31. "PRIV127,Privileged-only access permission for peripheral 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "PRIV126,Privileged-only access permission for peripheral 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "PRIV125,Privileged-only access permission for peripheral 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "PRIV124,Privileged-only access permission for peripheral 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "PRIV123,Privileged-only access permission for peripheral 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "PRIV122,Privileged-only access permission for peripheral 122" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "PRIV121,Privileged-only access permission for peripheral 121" "B_0x0,B_0x1" bitfld.long 0xC 24. "PRIV120,Privileged-only access permission for peripheral 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "PRIV119,Privileged-only access permission for peripheral 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "PRIV118,Privileged-only access permission for peripheral 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "PRIV117,Privileged-only access permission for peripheral 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "PRIV116,Privileged-only access permission for peripheral 116" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "PRIV115,Privileged-only access permission for peripheral 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "PRIV114,Privileged-only access permission for peripheral 114" "B_0x0,B_0x1" bitfld.long 0xC 17. "PRIV113,Privileged-only access permission for peripheral 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "PRIV112,Privileged-only access permission for peripheral 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "PRIV111,Privileged-only access permission for peripheral 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "PRIV110,Privileged-only access permission for peripheral 110" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "PRIV109,Privileged-only access permission for peripheral 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "PRIV108,Privileged-only access permission for peripheral 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "PRIV107,Privileged-only access permission for peripheral 107" "B_0x0,B_0x1" bitfld.long 0xC 10. "PRIV106,Privileged-only access permission for peripheral 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "PRIV105,Privileged-only access permission for peripheral 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "PRIV104,Privileged-only access permission for peripheral 104" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "PRIV103,Privileged-only access permission for peripheral 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV102,Privileged-only access permission for peripheral 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV101,Privileged-only access permission for peripheral 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV100,Privileged-only access permission for peripheral 100" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV99,Privileged-only access permission for peripheral 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV98,Privileged-only access permission for peripheral 98" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "PRIV97,Privileged-only access permission for peripheral 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "PRIV96,Privileged-only access permission for peripheral 96" "B_0x0,B_0x1" line.long 0x10 "RIFSC_RISC_PRIVCFGR4,RIFSC RISFC slave privileged register 4" bitfld.long 0x10 31. "PRIV159,Privileged-only access permission for peripheral 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "PRIV158,Privileged-only access permission for peripheral 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "PRIV157,Privileged-only access permission for peripheral 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "PRIV156,Privileged-only access permission for peripheral 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "PRIV155,Privileged-only access permission for peripheral 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "PRIV154,Privileged-only access permission for peripheral 154" "B_0x0,B_0x1" newline bitfld.long 0x10 25. "PRIV153,Privileged-only access permission for peripheral 153" "B_0x0,B_0x1" bitfld.long 0x10 24. "PRIV152,Privileged-only access permission for peripheral 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "PRIV151,Privileged-only access permission for peripheral 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "PRIV150,Privileged-only access permission for peripheral 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "PRIV149,Privileged-only access permission for peripheral 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "PRIV148,Privileged-only access permission for peripheral 148" "B_0x0,B_0x1" newline bitfld.long 0x10 19. "PRIV147,Privileged-only access permission for peripheral 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "PRIV146,Privileged-only access permission for peripheral 146" "B_0x0,B_0x1" bitfld.long 0x10 17. "PRIV145,Privileged-only access permission for peripheral 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "PRIV144,Privileged-only access permission for peripheral 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "PRIV143,Privileged-only access permission for peripheral 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "PRIV142,Privileged-only access permission for peripheral 142" "B_0x0,B_0x1" newline bitfld.long 0x10 13. "PRIV141,Privileged-only access permission for peripheral 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "PRIV140,Privileged-only access permission for peripheral 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "PRIV139,Privileged-only access permission for peripheral 139" "B_0x0,B_0x1" bitfld.long 0x10 10. "PRIV138,Privileged-only access permission for peripheral 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV137,Privileged-only access permission for peripheral 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "PRIV136,Privileged-only access permission for peripheral 136" "B_0x0,B_0x1" newline bitfld.long 0x10 7. "PRIV135,Privileged-only access permission for peripheral 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV134,Privileged-only access permission for peripheral 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV133,Privileged-only access permission for peripheral 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV132,Privileged-only access permission for peripheral 132" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV131,Privileged-only access permission for peripheral 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV130,Privileged-only access permission for peripheral 130" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "PRIV129,Privileged-only access permission for peripheral 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "PRIV128,Privileged-only access permission for peripheral 128" "B_0x0,B_0x1" line.long 0x14 "RIFSC_RISC_PRIVCFGR5,RIFSC RISFC slave privileged register 5" bitfld.long 0x14 31. "PRIV191,Privileged-only access permission for peripheral 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "PRIV190,Privileged-only access permission for peripheral 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "PRIV189,Privileged-only access permission for peripheral 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "PRIV188,Privileged-only access permission for peripheral 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "PRIV187,Privileged-only access permission for peripheral 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "PRIV186,Privileged-only access permission for peripheral 186" "B_0x0,B_0x1" newline bitfld.long 0x14 25. "PRIV185,Privileged-only access permission for peripheral 185" "B_0x0,B_0x1" bitfld.long 0x14 24. "PRIV184,Privileged-only access permission for peripheral 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "PRIV183,Privileged-only access permission for peripheral 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "PRIV182,Privileged-only access permission for peripheral 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "PRIV181,Privileged-only access permission for peripheral 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "PRIV180,Privileged-only access permission for peripheral 180" "B_0x0,B_0x1" newline bitfld.long 0x14 19. "PRIV179,Privileged-only access permission for peripheral 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "PRIV178,Privileged-only access permission for peripheral 178" "B_0x0,B_0x1" bitfld.long 0x14 17. "PRIV177,Privileged-only access permission for peripheral 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "PRIV176,Privileged-only access permission for peripheral 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "PRIV175,Privileged-only access permission for peripheral 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "PRIV174,Privileged-only access permission for peripheral 174" "B_0x0,B_0x1" newline bitfld.long 0x14 13. "PRIV173,Privileged-only access permission for peripheral 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "PRIV172,Privileged-only access permission for peripheral 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "PRIV171,Privileged-only access permission for peripheral 171" "B_0x0,B_0x1" bitfld.long 0x14 10. "PRIV170,Privileged-only access permission for peripheral 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "PRIV169,Privileged-only access permission for peripheral 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "PRIV168,Privileged-only access permission for peripheral 168" "B_0x0,B_0x1" newline bitfld.long 0x14 7. "PRIV167,Privileged-only access permission for peripheral 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV166,Privileged-only access permission for peripheral 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV165,Privileged-only access permission for peripheral 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV164,Privileged-only access permission for peripheral 164" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV163,Privileged-only access permission for peripheral 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV162,Privileged-only access permission for peripheral 162" "B_0x0,B_0x1" newline bitfld.long 0x14 1. "PRIV161,Privileged-only access permission for peripheral 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "PRIV160,Privileged-only access permission for peripheral 160" "B_0x0,B_0x1" group.long 0x50++0x17 line.long 0x0 "RIFSC_RISC_RCFGLOCKR0,RIFSC RISC slave resource configuration lock register 0" bitfld.long 0x0 31. "RLOCK31,rRsource lock for peripheral 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "RLOCK30,rRsource lock for peripheral 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "RLOCK29,rRsource lock for peripheral 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "RLOCK28,rRsource lock for peripheral 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "RLOCK27,rRsource lock for peripheral 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "RLOCK26,rRsource lock for peripheral 26" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "RLOCK25,rRsource lock for peripheral 25" "B_0x0,B_0x1" bitfld.long 0x0 24. "RLOCK24,rRsource lock for peripheral 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "RLOCK23,rRsource lock for peripheral 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "RLOCK22,rRsource lock for peripheral 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "RLOCK21,rRsource lock for peripheral 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "RLOCK20,rRsource lock for peripheral 20" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "RLOCK19,rRsource lock for peripheral 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "RLOCK18,rRsource lock for peripheral 18" "B_0x0,B_0x1" bitfld.long 0x0 17. "RLOCK17,rRsource lock for peripheral 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "RLOCK16,rRsource lock for peripheral 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "RLOCK15,rRsource lock for peripheral 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "RLOCK14,rRsource lock for peripheral 14" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "RLOCK13,rRsource lock for peripheral 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "RLOCK12,rRsource lock for peripheral 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "RLOCK11,rRsource lock for peripheral 11" "B_0x0,B_0x1" bitfld.long 0x0 10. "RLOCK10,rRsource lock for peripheral 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "RLOCK9,rRsource lock for peripheral 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "RLOCK8,rRsource lock for peripheral 8" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "RLOCK7,rRsource lock for peripheral 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "RLOCK6,rRsource lock for peripheral 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "RLOCK5,rRsource lock for peripheral 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "RLOCK4,rRsource lock for peripheral 4" "B_0x0,B_0x1" bitfld.long 0x0 3. "RLOCK3,rRsource lock for peripheral 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "RLOCK2,rRsource lock for peripheral 2" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "RLOCK1,rRsource lock for peripheral 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "RLOCK0,rRsource lock for peripheral 0" "B_0x0,B_0x1" line.long 0x4 "RIFSC_RISC_RCFGLOCKR1,RIFSC RISC slave resource configuration lock register 1" bitfld.long 0x4 31. "RLOCK63,rRsource lock for peripheral 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "RLOCK62,rRsource lock for peripheral 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "RLOCK61,rRsource lock for peripheral 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "RLOCK60,rRsource lock for peripheral 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "RLOCK59,rRsource lock for peripheral 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "RLOCK58,rRsource lock for peripheral 58" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "RLOCK57,rRsource lock for peripheral 57" "B_0x0,B_0x1" bitfld.long 0x4 24. "RLOCK56,rRsource lock for peripheral 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "RLOCK55,rRsource lock for peripheral 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "RLOCK54,rRsource lock for peripheral 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "RLOCK53,rRsource lock for peripheral 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "RLOCK52,rRsource lock for peripheral 52" "B_0x0,B_0x1" newline bitfld.long 0x4 19. "RLOCK51,rRsource lock for peripheral 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "RLOCK50,rRsource lock for peripheral 50" "B_0x0,B_0x1" bitfld.long 0x4 17. "RLOCK49,rRsource lock for peripheral 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "RLOCK48,rRsource lock for peripheral 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "RLOCK47,rRsource lock for peripheral 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "RLOCK46,rRsource lock for peripheral 46" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "RLOCK45,rRsource lock for peripheral 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "RLOCK44,rRsource lock for peripheral 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "RLOCK43,rRsource lock for peripheral 43" "B_0x0,B_0x1" bitfld.long 0x4 10. "RLOCK42,rRsource lock for peripheral 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "RLOCK41,rRsource lock for peripheral 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "RLOCK40,rRsource lock for peripheral 40" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "RLOCK39,rRsource lock for peripheral 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "RLOCK38,rRsource lock for peripheral 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "RLOCK37,rRsource lock for peripheral 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "RLOCK36,rRsource lock for peripheral 36" "B_0x0,B_0x1" bitfld.long 0x4 3. "RLOCK35,rRsource lock for peripheral 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "RLOCK34,rRsource lock for peripheral 34" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "RLOCK33,rRsource lock for peripheral 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "RLOCK32,rRsource lock for peripheral 32" "B_0x0,B_0x1" line.long 0x8 "RIFSC_RISC_RCFGLOCKR2,RIFSC RISC slave resource configuration lock register 2" bitfld.long 0x8 31. "RLOCK95,rRsource lock for peripheral 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "RLOCK94,rRsource lock for peripheral 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "RLOCK93,rRsource lock for peripheral 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "RLOCK92,rRsource lock for peripheral 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "RLOCK91,rRsource lock for peripheral 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "RLOCK90,rRsource lock for peripheral 90" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "RLOCK89,rRsource lock for peripheral 89" "B_0x0,B_0x1" bitfld.long 0x8 24. "RLOCK88,rRsource lock for peripheral 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "RLOCK87,rRsource lock for peripheral 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "RLOCK86,rRsource lock for peripheral 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "RLOCK85,rRsource lock for peripheral 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "RLOCK84,rRsource lock for peripheral 84" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RLOCK83,rRsource lock for peripheral 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "RLOCK82,rRsource lock for peripheral 82" "B_0x0,B_0x1" bitfld.long 0x8 17. "RLOCK81,rRsource lock for peripheral 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "RLOCK80,rRsource lock for peripheral 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "RLOCK79,rRsource lock for peripheral 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK78,rRsource lock for peripheral 78" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "RLOCK77,rRsource lock for peripheral 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK76,rRsource lock for peripheral 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK75,rRsource lock for peripheral 75" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK74,rRsource lock for peripheral 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "RLOCK73,rRsource lock for peripheral 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK72,rRsource lock for peripheral 72" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RLOCK71,rRsource lock for peripheral 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK70,rRsource lock for peripheral 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK69,rRsource lock for peripheral 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK68,rRsource lock for peripheral 68" "B_0x0,B_0x1" bitfld.long 0x8 3. "RLOCK67,rRsource lock for peripheral 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK66,rRsource lock for peripheral 66" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "RLOCK65,rRsource lock for peripheral 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK64,rRsource lock for peripheral 64" "B_0x0,B_0x1" line.long 0xC "RIFSC_RISC_RCFGLOCKR3,RIFSC RISC slave resource configuration lock register 3" bitfld.long 0xC 31. "RLOCK127,rRsource lock for peripheral 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "RLOCK126,rRsource lock for peripheral 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "RLOCK125,rRsource lock for peripheral 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "RLOCK124,rRsource lock for peripheral 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "RLOCK123,rRsource lock for peripheral 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "RLOCK122,rRsource lock for peripheral 122" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "RLOCK121,rRsource lock for peripheral 121" "B_0x0,B_0x1" bitfld.long 0xC 24. "RLOCK120,rRsource lock for peripheral 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "RLOCK119,rRsource lock for peripheral 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "RLOCK118,rRsource lock for peripheral 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "RLOCK117,rRsource lock for peripheral 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "RLOCK116,rRsource lock for peripheral 116" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RLOCK115,rRsource lock for peripheral 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "RLOCK114,rRsource lock for peripheral 114" "B_0x0,B_0x1" bitfld.long 0xC 17. "RLOCK113,rRsource lock for peripheral 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "RLOCK112,rRsource lock for peripheral 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "RLOCK111,rRsource lock for peripheral 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "RLOCK110,rRsource lock for peripheral 110" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "RLOCK109,rRsource lock for peripheral 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "RLOCK108,rRsource lock for peripheral 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "RLOCK107,rRsource lock for peripheral 107" "B_0x0,B_0x1" bitfld.long 0xC 10. "RLOCK106,rRsource lock for peripheral 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "RLOCK105,rRsource lock for peripheral 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "RLOCK104,rRsource lock for peripheral 104" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RLOCK103,rRsource lock for peripheral 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "RLOCK102,rRsource lock for peripheral 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "RLOCK101,rRsource lock for peripheral 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "RLOCK100,rRsource lock for peripheral 100" "B_0x0,B_0x1" bitfld.long 0xC 3. "RLOCK99,rRsource lock for peripheral 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "RLOCK98,rRsource lock for peripheral 98" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RLOCK97,rRsource lock for peripheral 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "RLOCK96,rRsource lock for peripheral 96" "B_0x0,B_0x1" line.long 0x10 "RIFSC_RISC_RCFGLOCKR4,RIFSC RISC slave resource configuration lock register 4" bitfld.long 0x10 31. "RLOCK159,rRsource lock for peripheral 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "RLOCK158,rRsource lock for peripheral 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "RLOCK157,rRsource lock for peripheral 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "RLOCK156,rRsource lock for peripheral 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "RLOCK155,rRsource lock for peripheral 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "RLOCK154,rRsource lock for peripheral 154" "B_0x0,B_0x1" newline bitfld.long 0x10 25. "RLOCK153,rRsource lock for peripheral 153" "B_0x0,B_0x1" bitfld.long 0x10 24. "RLOCK152,rRsource lock for peripheral 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "RLOCK151,rRsource lock for peripheral 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "RLOCK150,rRsource lock for peripheral 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "RLOCK149,rRsource lock for peripheral 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "RLOCK148,rRsource lock for peripheral 148" "B_0x0,B_0x1" newline bitfld.long 0x10 19. "RLOCK147,rRsource lock for peripheral 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "RLOCK146,rRsource lock for peripheral 146" "B_0x0,B_0x1" bitfld.long 0x10 17. "RLOCK145,rRsource lock for peripheral 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "RLOCK144,rRsource lock for peripheral 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "RLOCK143,rRsource lock for peripheral 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "RLOCK142,rRsource lock for peripheral 142" "B_0x0,B_0x1" newline bitfld.long 0x10 13. "RLOCK141,rRsource lock for peripheral 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "RLOCK140,rRsource lock for peripheral 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "RLOCK139,rRsource lock for peripheral 139" "B_0x0,B_0x1" bitfld.long 0x10 10. "RLOCK138,rRsource lock for peripheral 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "RLOCK137,rRsource lock for peripheral 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "RLOCK136,rRsource lock for peripheral 136" "B_0x0,B_0x1" newline bitfld.long 0x10 7. "RLOCK135,rRsource lock for peripheral 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "RLOCK134,rRsource lock for peripheral 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "RLOCK133,rRsource lock for peripheral 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "RLOCK132,rRsource lock for peripheral 132" "B_0x0,B_0x1" bitfld.long 0x10 3. "RLOCK131,rRsource lock for peripheral 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "RLOCK130,rRsource lock for peripheral 130" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "RLOCK129,rRsource lock for peripheral 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "RLOCK128,rRsource lock for peripheral 128" "B_0x0,B_0x1" line.long 0x14 "RIFSC_RISC_RCFGLOCKR5,RIFSC RISC slave resource configuration lock register 5" bitfld.long 0x14 31. "RLOCK191,rRsource lock for peripheral 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "RLOCK190,rRsource lock for peripheral 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "RLOCK189,rRsource lock for peripheral 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "RLOCK188,rRsource lock for peripheral 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "RLOCK187,rRsource lock for peripheral 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "RLOCK186,rRsource lock for peripheral 186" "B_0x0,B_0x1" newline bitfld.long 0x14 25. "RLOCK185,rRsource lock for peripheral 185" "B_0x0,B_0x1" bitfld.long 0x14 24. "RLOCK184,rRsource lock for peripheral 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "RLOCK183,rRsource lock for peripheral 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "RLOCK182,rRsource lock for peripheral 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "RLOCK181,rRsource lock for peripheral 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "RLOCK180,rRsource lock for peripheral 180" "B_0x0,B_0x1" newline bitfld.long 0x14 19. "RLOCK179,rRsource lock for peripheral 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "RLOCK178,rRsource lock for peripheral 178" "B_0x0,B_0x1" bitfld.long 0x14 17. "RLOCK177,rRsource lock for peripheral 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "RLOCK176,rRsource lock for peripheral 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "RLOCK175,rRsource lock for peripheral 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "RLOCK174,rRsource lock for peripheral 174" "B_0x0,B_0x1" newline bitfld.long 0x14 13. "RLOCK173,rRsource lock for peripheral 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "RLOCK172,rRsource lock for peripheral 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "RLOCK171,rRsource lock for peripheral 171" "B_0x0,B_0x1" bitfld.long 0x14 10. "RLOCK170,rRsource lock for peripheral 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "RLOCK169,rRsource lock for peripheral 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "RLOCK168,rRsource lock for peripheral 168" "B_0x0,B_0x1" newline bitfld.long 0x14 7. "RLOCK167,rRsource lock for peripheral 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "RLOCK166,rRsource lock for peripheral 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "RLOCK165,rRsource lock for peripheral 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "RLOCK164,rRsource lock for peripheral 164" "B_0x0,B_0x1" bitfld.long 0x14 3. "RLOCK163,rRsource lock for peripheral 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "RLOCK162,rRsource lock for peripheral 162" "B_0x0,B_0x1" newline bitfld.long 0x14 1. "RLOCK161,rRsource lock for peripheral 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "RLOCK160,rRsource lock for peripheral 160" "B_0x0,B_0x1" group.long 0x100++0x3FF line.long 0x0 "RIFSC_RISC_PER0_CIDCFGR,RIFSC RISC slave peripheral 0 CID configuration register" bitfld.long 0x0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "RIFSC_RISC_PER0_SEMCR,RIFSC RISC slave peripheral 0 semaphore control register" rbitfld.long 0x4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x8 "RIFSC_RISC_PER1_CIDCFGR,RIFSC RISC slave peripheral 1 CID configuration register" bitfld.long 0x8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC "RIFSC_RISC_PER1_SEMCR,RIFSC RISC slave peripheral 1 semaphore control register" rbitfld.long 0xC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x10 "RIFSC_RISC_PER2_CIDCFGR,RIFSC RISC slave peripheral 2 CID configuration register" bitfld.long 0x10 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "RIFSC_RISC_PER2_SEMCR,RIFSC RISC slave peripheral 2 semaphore control register" rbitfld.long 0x14 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "RIFSC_RISC_PER3_CIDCFGR,RIFSC RISC slave peripheral 3 CID configuration register" bitfld.long 0x18 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "RIFSC_RISC_PER3_SEMCR,RIFSC RISC slave peripheral 3 semaphore control register" rbitfld.long 0x1C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "RIFSC_RISC_PER4_CIDCFGR,RIFSC RISC slave peripheral 4 CID configuration register" bitfld.long 0x20 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "RIFSC_RISC_PER4_SEMCR,RIFSC RISC slave peripheral 4 semaphore control register" rbitfld.long 0x24 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "RIFSC_RISC_PER5_CIDCFGR,RIFSC RISC slave peripheral 5 CID configuration register" bitfld.long 0x28 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "RIFSC_RISC_PER5_SEMCR,RIFSC RISC slave peripheral 5 semaphore control register" rbitfld.long 0x2C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "RIFSC_RISC_PER6_CIDCFGR,RIFSC RISC slave peripheral 6 CID configuration register" bitfld.long 0x30 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "RIFSC_RISC_PER6_SEMCR,RIFSC RISC slave peripheral 6 semaphore control register" rbitfld.long 0x34 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "RIFSC_RISC_PER7_CIDCFGR,RIFSC RISC slave peripheral 7 CID configuration register" bitfld.long 0x38 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "RIFSC_RISC_PER7_SEMCR,RIFSC RISC slave peripheral 7 semaphore control register" rbitfld.long 0x3C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "RIFSC_RISC_PER8_CIDCFGR,RIFSC RISC slave peripheral 8 CID configuration register" bitfld.long 0x40 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "RIFSC_RISC_PER8_SEMCR,RIFSC RISC slave peripheral 8 semaphore control register" rbitfld.long 0x44 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "RIFSC_RISC_PER9_CIDCFGR,RIFSC RISC slave peripheral 9 CID configuration register" bitfld.long 0x48 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "RIFSC_RISC_PER9_SEMCR,RIFSC RISC slave peripheral 9 semaphore control register" rbitfld.long 0x4C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "RIFSC_RISC_PER10_CIDCFGR,RIFSC RISC slave peripheral 10 CID configuration register" bitfld.long 0x50 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "RIFSC_RISC_PER10_SEMCR,RIFSC RISC slave peripheral 10 semaphore control register" rbitfld.long 0x54 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "RIFSC_RISC_PER11_CIDCFGR,RIFSC RISC slave peripheral 11 CID configuration register" bitfld.long 0x58 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "RIFSC_RISC_PER11_SEMCR,RIFSC RISC slave peripheral 11 semaphore control register" rbitfld.long 0x5C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "RIFSC_RISC_PER12_CIDCFGR,RIFSC RISC slave peripheral 12 CID configuration register" bitfld.long 0x60 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "RIFSC_RISC_PER12_SEMCR,RIFSC RISC slave peripheral 12 semaphore control register" rbitfld.long 0x64 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "RIFSC_RISC_PER13_CIDCFGR,RIFSC RISC slave peripheral 13 CID configuration register" bitfld.long 0x68 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "RIFSC_RISC_PER13_SEMCR,RIFSC RISC slave peripheral 13 semaphore control register" rbitfld.long 0x6C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "RIFSC_RISC_PER14_CIDCFGR,RIFSC RISC slave peripheral 14 CID configuration register" bitfld.long 0x70 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "RIFSC_RISC_PER14_SEMCR,RIFSC RISC slave peripheral 14 semaphore control register" rbitfld.long 0x74 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "RIFSC_RISC_PER15_CIDCFGR,RIFSC RISC slave peripheral 15 CID configuration register" bitfld.long 0x78 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "RIFSC_RISC_PER15_SEMCR,RIFSC RISC slave peripheral 15 semaphore control register" rbitfld.long 0x7C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "RIFSC_RISC_PER16_CIDCFGR,RIFSC RISC slave peripheral 16 CID configuration register" bitfld.long 0x80 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "RIFSC_RISC_PER16_SEMCR,RIFSC RISC slave peripheral 16 semaphore control register" rbitfld.long 0x84 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "RIFSC_RISC_PER17_CIDCFGR,RIFSC RISC slave peripheral 17 CID configuration register" bitfld.long 0x88 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "RIFSC_RISC_PER17_SEMCR,RIFSC RISC slave peripheral 17 semaphore control register" rbitfld.long 0x8C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x90 "RIFSC_RISC_PER18_CIDCFGR,RIFSC RISC slave peripheral 18 CID configuration register" bitfld.long 0x90 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x90 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x90 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x90 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x94 "RIFSC_RISC_PER18_SEMCR,RIFSC RISC slave peripheral 18 semaphore control register" rbitfld.long 0x94 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x94 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x98 "RIFSC_RISC_PER19_CIDCFGR,RIFSC RISC slave peripheral 19 CID configuration register" bitfld.long 0x98 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x98 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x98 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x98 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x9C "RIFSC_RISC_PER19_SEMCR,RIFSC RISC slave peripheral 19 semaphore control register" rbitfld.long 0x9C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x9C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xA0 "RIFSC_RISC_PER20_CIDCFGR,RIFSC RISC slave peripheral 20 CID configuration register" bitfld.long 0xA0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xA0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xA0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xA0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xA4 "RIFSC_RISC_PER20_SEMCR,RIFSC RISC slave peripheral 20 semaphore control register" rbitfld.long 0xA4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xA4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xA8 "RIFSC_RISC_PER21_CIDCFGR,RIFSC RISC slave peripheral 21 CID configuration register" bitfld.long 0xA8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xA8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xA8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xA8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xAC "RIFSC_RISC_PER21_SEMCR,RIFSC RISC slave peripheral 21 semaphore control register" rbitfld.long 0xAC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xAC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xB0 "RIFSC_RISC_PER22_CIDCFGR,RIFSC RISC slave peripheral 22 CID configuration register" bitfld.long 0xB0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xB0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xB0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xB0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xB4 "RIFSC_RISC_PER22_SEMCR,RIFSC RISC slave peripheral 22 semaphore control register" rbitfld.long 0xB4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xB4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xB8 "RIFSC_RISC_PER23_CIDCFGR,RIFSC RISC slave peripheral 23 CID configuration register" bitfld.long 0xB8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xB8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xB8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xB8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xBC "RIFSC_RISC_PER23_SEMCR,RIFSC RISC slave peripheral 23 semaphore control register" rbitfld.long 0xBC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xBC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xC0 "RIFSC_RISC_PER24_CIDCFGR,RIFSC RISC slave peripheral 24 CID configuration register" bitfld.long 0xC0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xC0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xC0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC4 "RIFSC_RISC_PER24_SEMCR,RIFSC RISC slave peripheral 24 semaphore control register" rbitfld.long 0xC4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xC8 "RIFSC_RISC_PER25_CIDCFGR,RIFSC RISC slave peripheral 25 CID configuration register" bitfld.long 0xC8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xC8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xC8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xCC "RIFSC_RISC_PER25_SEMCR,RIFSC RISC slave peripheral 25 semaphore control register" rbitfld.long 0xCC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xCC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xD0 "RIFSC_RISC_PER26_CIDCFGR,RIFSC RISC slave peripheral 26 CID configuration register" bitfld.long 0xD0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xD0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xD0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xD0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xD4 "RIFSC_RISC_PER26_SEMCR,RIFSC RISC slave peripheral 26 semaphore control register" rbitfld.long 0xD4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xD4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xD8 "RIFSC_RISC_PER27_CIDCFGR,RIFSC RISC slave peripheral 27 CID configuration register" bitfld.long 0xD8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xD8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xD8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xD8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xDC "RIFSC_RISC_PER27_SEMCR,RIFSC RISC slave peripheral 27 semaphore control register" rbitfld.long 0xDC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xDC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xE0 "RIFSC_RISC_PER28_CIDCFGR,RIFSC RISC slave peripheral 28 CID configuration register" bitfld.long 0xE0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xE0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xE0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xE0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xE4 "RIFSC_RISC_PER28_SEMCR,RIFSC RISC slave peripheral 28 semaphore control register" rbitfld.long 0xE4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xE4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xE8 "RIFSC_RISC_PER29_CIDCFGR,RIFSC RISC slave peripheral 29 CID configuration register" bitfld.long 0xE8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xE8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xE8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xE8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xEC "RIFSC_RISC_PER29_SEMCR,RIFSC RISC slave peripheral 29 semaphore control register" rbitfld.long 0xEC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xEC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xF0 "RIFSC_RISC_PER30_CIDCFGR,RIFSC RISC slave peripheral 30 CID configuration register" bitfld.long 0xF0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xF0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xF0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xF0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xF4 "RIFSC_RISC_PER30_SEMCR,RIFSC RISC slave peripheral 30 semaphore control register" rbitfld.long 0xF4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xF4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xF8 "RIFSC_RISC_PER31_CIDCFGR,RIFSC RISC slave peripheral 31 CID configuration register" bitfld.long 0xF8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xF8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xF8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xF8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xFC "RIFSC_RISC_PER31_SEMCR,RIFSC RISC slave peripheral 31 semaphore control register" rbitfld.long 0xFC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xFC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x100 "RIFSC_RISC_PER32_CIDCFGR,RIFSC RISC slave peripheral 32 CID configuration register" bitfld.long 0x100 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x100 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x100 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x100 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x104 "RIFSC_RISC_PER32_SEMCR,RIFSC RISC slave peripheral 32 semaphore control register" rbitfld.long 0x104 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x104 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x108 "RIFSC_RISC_PER33_CIDCFGR,RIFSC RISC slave peripheral 33 CID configuration register" bitfld.long 0x108 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x108 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x108 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x108 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x10C "RIFSC_RISC_PER33_SEMCR,RIFSC RISC slave peripheral 33 semaphore control register" rbitfld.long 0x10C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x110 "RIFSC_RISC_PER34_CIDCFGR,RIFSC RISC slave peripheral 34 CID configuration register" bitfld.long 0x110 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x110 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x110 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x110 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x114 "RIFSC_RISC_PER34_SEMCR,RIFSC RISC slave peripheral 34 semaphore control register" rbitfld.long 0x114 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x114 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x118 "RIFSC_RISC_PER35_CIDCFGR,RIFSC RISC slave peripheral 35 CID configuration register" bitfld.long 0x118 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x118 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x118 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x118 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x11C "RIFSC_RISC_PER35_SEMCR,RIFSC RISC slave peripheral 35 semaphore control register" rbitfld.long 0x11C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x11C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x120 "RIFSC_RISC_PER36_CIDCFGR,RIFSC RISC slave peripheral 36 CID configuration register" bitfld.long 0x120 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x120 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x120 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x120 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x124 "RIFSC_RISC_PER36_SEMCR,RIFSC RISC slave peripheral 36 semaphore control register" rbitfld.long 0x124 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x124 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x128 "RIFSC_RISC_PER37_CIDCFGR,RIFSC RISC slave peripheral 37 CID configuration register" bitfld.long 0x128 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x128 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x128 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x128 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x12C "RIFSC_RISC_PER37_SEMCR,RIFSC RISC slave peripheral 37 semaphore control register" rbitfld.long 0x12C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x12C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x130 "RIFSC_RISC_PER38_CIDCFGR,RIFSC RISC slave peripheral 38 CID configuration register" bitfld.long 0x130 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x130 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x130 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x130 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x134 "RIFSC_RISC_PER38_SEMCR,RIFSC RISC slave peripheral 38 semaphore control register" rbitfld.long 0x134 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x134 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x138 "RIFSC_RISC_PER39_CIDCFGR,RIFSC RISC slave peripheral 39 CID configuration register" bitfld.long 0x138 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x138 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x138 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x138 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x13C "RIFSC_RISC_PER39_SEMCR,RIFSC RISC slave peripheral 39 semaphore control register" rbitfld.long 0x13C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x13C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x140 "RIFSC_RISC_PER40_CIDCFGR,RIFSC RISC slave peripheral 40 CID configuration register" bitfld.long 0x140 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x140 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x140 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x140 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x144 "RIFSC_RISC_PER40_SEMCR,RIFSC RISC slave peripheral 40 semaphore control register" rbitfld.long 0x144 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x144 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x148 "RIFSC_RISC_PER41_CIDCFGR,RIFSC RISC slave peripheral 41 CID configuration register" bitfld.long 0x148 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x148 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x148 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x148 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14C "RIFSC_RISC_PER41_SEMCR,RIFSC RISC slave peripheral 41 semaphore control register" rbitfld.long 0x14C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x150 "RIFSC_RISC_PER42_CIDCFGR,RIFSC RISC slave peripheral 42 CID configuration register" bitfld.long 0x150 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x150 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x150 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x150 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x154 "RIFSC_RISC_PER42_SEMCR,RIFSC RISC slave peripheral 42 semaphore control register" rbitfld.long 0x154 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x154 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x158 "RIFSC_RISC_PER43_CIDCFGR,RIFSC RISC slave peripheral 43 CID configuration register" bitfld.long 0x158 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x158 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x158 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x158 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x15C "RIFSC_RISC_PER43_SEMCR,RIFSC RISC slave peripheral 43 semaphore control register" rbitfld.long 0x15C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x15C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x160 "RIFSC_RISC_PER44_CIDCFGR,RIFSC RISC slave peripheral 44 CID configuration register" bitfld.long 0x160 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x160 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x160 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x160 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x164 "RIFSC_RISC_PER44_SEMCR,RIFSC RISC slave peripheral 44 semaphore control register" rbitfld.long 0x164 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x164 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x168 "RIFSC_RISC_PER45_CIDCFGR,RIFSC RISC slave peripheral 45 CID configuration register" bitfld.long 0x168 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x168 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x168 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x168 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x16C "RIFSC_RISC_PER45_SEMCR,RIFSC RISC slave peripheral 45 semaphore control register" rbitfld.long 0x16C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x16C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x170 "RIFSC_RISC_PER46_CIDCFGR,RIFSC RISC slave peripheral 46 CID configuration register" bitfld.long 0x170 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x170 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x170 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x170 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x174 "RIFSC_RISC_PER46_SEMCR,RIFSC RISC slave peripheral 46 semaphore control register" rbitfld.long 0x174 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x174 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x178 "RIFSC_RISC_PER47_CIDCFGR,RIFSC RISC slave peripheral 47 CID configuration register" bitfld.long 0x178 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x178 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x178 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x178 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x17C "RIFSC_RISC_PER47_SEMCR,RIFSC RISC slave peripheral 47 semaphore control register" rbitfld.long 0x17C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x17C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x180 "RIFSC_RISC_PER48_CIDCFGR,RIFSC RISC slave peripheral 48 CID configuration register" bitfld.long 0x180 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x180 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x180 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x180 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x184 "RIFSC_RISC_PER48_SEMCR,RIFSC RISC slave peripheral 48 semaphore control register" rbitfld.long 0x184 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x184 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x188 "RIFSC_RISC_PER49_CIDCFGR,RIFSC RISC slave peripheral 49 CID configuration register" bitfld.long 0x188 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x188 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x188 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x188 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x18C "RIFSC_RISC_PER49_SEMCR,RIFSC RISC slave peripheral 49 semaphore control register" rbitfld.long 0x18C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x190 "RIFSC_RISC_PER50_CIDCFGR,RIFSC RISC slave peripheral 50 CID configuration register" bitfld.long 0x190 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x190 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x190 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x190 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x194 "RIFSC_RISC_PER50_SEMCR,RIFSC RISC slave peripheral 50 semaphore control register" rbitfld.long 0x194 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x194 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x198 "RIFSC_RISC_PER51_CIDCFGR,RIFSC RISC slave peripheral 51 CID configuration register" bitfld.long 0x198 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x198 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x198 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x198 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x19C "RIFSC_RISC_PER51_SEMCR,RIFSC RISC slave peripheral 51 semaphore control register" rbitfld.long 0x19C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x19C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1A0 "RIFSC_RISC_PER52_CIDCFGR,RIFSC RISC slave peripheral 52 CID configuration register" bitfld.long 0x1A0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1A0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1A0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1A0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1A4 "RIFSC_RISC_PER52_SEMCR,RIFSC RISC slave peripheral 52 semaphore control register" rbitfld.long 0x1A4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1A4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1A8 "RIFSC_RISC_PER53_CIDCFGR,RIFSC RISC slave peripheral 53 CID configuration register" bitfld.long 0x1A8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1A8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1A8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1A8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1AC "RIFSC_RISC_PER53_SEMCR,RIFSC RISC slave peripheral 53 semaphore control register" rbitfld.long 0x1AC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1AC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1B0 "RIFSC_RISC_PER54_CIDCFGR,RIFSC RISC slave peripheral 54 CID configuration register" bitfld.long 0x1B0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1B0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1B0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1B0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1B4 "RIFSC_RISC_PER54_SEMCR,RIFSC RISC slave peripheral 54 semaphore control register" rbitfld.long 0x1B4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1B4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1B8 "RIFSC_RISC_PER55_CIDCFGR,RIFSC RISC slave peripheral 55 CID configuration register" bitfld.long 0x1B8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1B8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1B8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1B8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1BC "RIFSC_RISC_PER55_SEMCR,RIFSC RISC slave peripheral 55 semaphore control register" rbitfld.long 0x1BC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1BC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1C0 "RIFSC_RISC_PER56_CIDCFGR,RIFSC RISC slave peripheral 56 CID configuration register" bitfld.long 0x1C0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1C0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1C0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C4 "RIFSC_RISC_PER56_SEMCR,RIFSC RISC slave peripheral 56 semaphore control register" rbitfld.long 0x1C4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1C8 "RIFSC_RISC_PER57_CIDCFGR,RIFSC RISC slave peripheral 57 CID configuration register" bitfld.long 0x1C8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1C8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1C8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1CC "RIFSC_RISC_PER57_SEMCR,RIFSC RISC slave peripheral 57 semaphore control register" rbitfld.long 0x1CC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1CC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1D0 "RIFSC_RISC_PER58_CIDCFGR,RIFSC RISC slave peripheral 58 CID configuration register" bitfld.long 0x1D0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1D0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1D0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1D0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1D4 "RIFSC_RISC_PER58_SEMCR,RIFSC RISC slave peripheral 58 semaphore control register" rbitfld.long 0x1D4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1D4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1D8 "RIFSC_RISC_PER59_CIDCFGR,RIFSC RISC slave peripheral 59 CID configuration register" bitfld.long 0x1D8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1D8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1D8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1D8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1DC "RIFSC_RISC_PER59_SEMCR,RIFSC RISC slave peripheral 59 semaphore control register" rbitfld.long 0x1DC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1DC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1E0 "RIFSC_RISC_PER60_CIDCFGR,RIFSC RISC slave peripheral 60 CID configuration register" bitfld.long 0x1E0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1E0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1E0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1E0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1E4 "RIFSC_RISC_PER60_SEMCR,RIFSC RISC slave peripheral 60 semaphore control register" rbitfld.long 0x1E4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1E4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1E8 "RIFSC_RISC_PER61_CIDCFGR,RIFSC RISC slave peripheral 61 CID configuration register" bitfld.long 0x1E8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1E8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1E8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1E8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1EC "RIFSC_RISC_PER61_SEMCR,RIFSC RISC slave peripheral 61 semaphore control register" rbitfld.long 0x1EC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1EC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1F0 "RIFSC_RISC_PER62_CIDCFGR,RIFSC RISC slave peripheral 62 CID configuration register" bitfld.long 0x1F0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1F0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1F0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1F0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1F4 "RIFSC_RISC_PER62_SEMCR,RIFSC RISC slave peripheral 62 semaphore control register" rbitfld.long 0x1F4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1F4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1F8 "RIFSC_RISC_PER63_CIDCFGR,RIFSC RISC slave peripheral 63 CID configuration register" bitfld.long 0x1F8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1F8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1F8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1F8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1FC "RIFSC_RISC_PER63_SEMCR,RIFSC RISC slave peripheral 63 semaphore control register" rbitfld.long 0x1FC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1FC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x200 "RIFSC_RISC_PER64_CIDCFGR,RIFSC RISC slave peripheral 64 CID configuration register" bitfld.long 0x200 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x200 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x200 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x200 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x204 "RIFSC_RISC_PER64_SEMCR,RIFSC RISC slave peripheral 64 semaphore control register" rbitfld.long 0x204 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x204 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x208 "RIFSC_RISC_PER65_CIDCFGR,RIFSC RISC slave peripheral 65 CID configuration register" bitfld.long 0x208 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x208 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x208 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x208 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x20C "RIFSC_RISC_PER65_SEMCR,RIFSC RISC slave peripheral 65 semaphore control register" rbitfld.long 0x20C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x210 "RIFSC_RISC_PER66_CIDCFGR,RIFSC RISC slave peripheral 66 CID configuration register" bitfld.long 0x210 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x210 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x210 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x210 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x214 "RIFSC_RISC_PER66_SEMCR,RIFSC RISC slave peripheral 66 semaphore control register" rbitfld.long 0x214 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x214 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x218 "RIFSC_RISC_PER67_CIDCFGR,RIFSC RISC slave peripheral 67 CID configuration register" bitfld.long 0x218 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x218 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x218 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x218 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x21C "RIFSC_RISC_PER67_SEMCR,RIFSC RISC slave peripheral 67 semaphore control register" rbitfld.long 0x21C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x21C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x220 "RIFSC_RISC_PER68_CIDCFGR,RIFSC RISC slave peripheral 68 CID configuration register" bitfld.long 0x220 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x220 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x220 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x220 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x224 "RIFSC_RISC_PER68_SEMCR,RIFSC RISC slave peripheral 68 semaphore control register" rbitfld.long 0x224 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x224 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x228 "RIFSC_RISC_PER69_CIDCFGR,RIFSC RISC slave peripheral 69 CID configuration register" bitfld.long 0x228 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x228 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x228 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x228 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x22C "RIFSC_RISC_PER69_SEMCR,RIFSC RISC slave peripheral 69 semaphore control register" rbitfld.long 0x22C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x22C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x230 "RIFSC_RISC_PER70_CIDCFGR,RIFSC RISC slave peripheral 70 CID configuration register" bitfld.long 0x230 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x230 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x230 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x230 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x234 "RIFSC_RISC_PER70_SEMCR,RIFSC RISC slave peripheral 70 semaphore control register" rbitfld.long 0x234 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x234 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x238 "RIFSC_RISC_PER71_CIDCFGR,RIFSC RISC slave peripheral 71 CID configuration register" bitfld.long 0x238 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x238 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x238 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x238 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x23C "RIFSC_RISC_PER71_SEMCR,RIFSC RISC slave peripheral 71 semaphore control register" rbitfld.long 0x23C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x23C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x240 "RIFSC_RISC_PER72_CIDCFGR,RIFSC RISC slave peripheral 72 CID configuration register" bitfld.long 0x240 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x240 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x240 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x240 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x244 "RIFSC_RISC_PER72_SEMCR,RIFSC RISC slave peripheral 72 semaphore control register" rbitfld.long 0x244 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x244 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x248 "RIFSC_RISC_PER73_CIDCFGR,RIFSC RISC slave peripheral 73 CID configuration register" bitfld.long 0x248 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x248 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x248 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x248 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24C "RIFSC_RISC_PER73_SEMCR,RIFSC RISC slave peripheral 73 semaphore control register" rbitfld.long 0x24C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x250 "RIFSC_RISC_PER74_CIDCFGR,RIFSC RISC slave peripheral 74 CID configuration register" bitfld.long 0x250 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x250 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x250 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x250 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x254 "RIFSC_RISC_PER74_SEMCR,RIFSC RISC slave peripheral 74 semaphore control register" rbitfld.long 0x254 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x254 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x258 "RIFSC_RISC_PER75_CIDCFGR,RIFSC RISC slave peripheral 75 CID configuration register" bitfld.long 0x258 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x258 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x258 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x258 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x25C "RIFSC_RISC_PER75_SEMCR,RIFSC RISC slave peripheral 75 semaphore control register" rbitfld.long 0x25C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x25C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x260 "RIFSC_RISC_PER76_CIDCFGR,RIFSC RISC slave peripheral 76 CID configuration register" bitfld.long 0x260 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x260 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x260 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x260 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x264 "RIFSC_RISC_PER76_SEMCR,RIFSC RISC slave peripheral 76 semaphore control register" rbitfld.long 0x264 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x264 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x268 "RIFSC_RISC_PER77_CIDCFGR,RIFSC RISC slave peripheral 77 CID configuration register" bitfld.long 0x268 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x268 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x268 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x268 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x26C "RIFSC_RISC_PER77_SEMCR,RIFSC RISC slave peripheral 77 semaphore control register" rbitfld.long 0x26C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x26C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x270 "RIFSC_RISC_PER78_CIDCFGR,RIFSC RISC slave peripheral 78 CID configuration register" bitfld.long 0x270 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x270 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x270 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x270 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x274 "RIFSC_RISC_PER78_SEMCR,RIFSC RISC slave peripheral 78 semaphore control register" rbitfld.long 0x274 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x274 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x278 "RIFSC_RISC_PER79_CIDCFGR,RIFSC RISC slave peripheral 79 CID configuration register" bitfld.long 0x278 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x278 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x278 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x278 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x27C "RIFSC_RISC_PER79_SEMCR,RIFSC RISC slave peripheral 79 semaphore control register" rbitfld.long 0x27C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x27C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x280 "RIFSC_RISC_PER80_CIDCFGR,RIFSC RISC slave peripheral 80 CID configuration register" bitfld.long 0x280 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x280 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x280 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x280 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x284 "RIFSC_RISC_PER80_SEMCR,RIFSC RISC slave peripheral 80 semaphore control register" rbitfld.long 0x284 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x284 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x288 "RIFSC_RISC_PER81_CIDCFGR,RIFSC RISC slave peripheral 81 CID configuration register" bitfld.long 0x288 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x288 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x288 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x288 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x28C "RIFSC_RISC_PER81_SEMCR,RIFSC RISC slave peripheral 81 semaphore control register" rbitfld.long 0x28C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x290 "RIFSC_RISC_PER82_CIDCFGR,RIFSC RISC slave peripheral 82 CID configuration register" bitfld.long 0x290 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x290 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x290 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x290 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x294 "RIFSC_RISC_PER82_SEMCR,RIFSC RISC slave peripheral 82 semaphore control register" rbitfld.long 0x294 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x294 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x298 "RIFSC_RISC_PER83_CIDCFGR,RIFSC RISC slave peripheral 83 CID configuration register" bitfld.long 0x298 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x298 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x298 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x298 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x29C "RIFSC_RISC_PER83_SEMCR,RIFSC RISC slave peripheral 83 semaphore control register" rbitfld.long 0x29C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x29C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2A0 "RIFSC_RISC_PER84_CIDCFGR,RIFSC RISC slave peripheral 84 CID configuration register" bitfld.long 0x2A0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2A0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2A0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2A0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2A4 "RIFSC_RISC_PER84_SEMCR,RIFSC RISC slave peripheral 84 semaphore control register" rbitfld.long 0x2A4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2A4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2A8 "RIFSC_RISC_PER85_CIDCFGR,RIFSC RISC slave peripheral 85 CID configuration register" bitfld.long 0x2A8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2A8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2A8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2A8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2AC "RIFSC_RISC_PER85_SEMCR,RIFSC RISC slave peripheral 85 semaphore control register" rbitfld.long 0x2AC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2AC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2B0 "RIFSC_RISC_PER86_CIDCFGR,RIFSC RISC slave peripheral 86 CID configuration register" bitfld.long 0x2B0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2B0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2B0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2B0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2B4 "RIFSC_RISC_PER86_SEMCR,RIFSC RISC slave peripheral 86 semaphore control register" rbitfld.long 0x2B4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2B4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2B8 "RIFSC_RISC_PER87_CIDCFGR,RIFSC RISC slave peripheral 87 CID configuration register" bitfld.long 0x2B8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2B8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2B8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2B8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2BC "RIFSC_RISC_PER87_SEMCR,RIFSC RISC slave peripheral 87 semaphore control register" rbitfld.long 0x2BC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2BC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2C0 "RIFSC_RISC_PER88_CIDCFGR,RIFSC RISC slave peripheral 88 CID configuration register" bitfld.long 0x2C0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2C0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2C0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C4 "RIFSC_RISC_PER88_SEMCR,RIFSC RISC slave peripheral 88 semaphore control register" rbitfld.long 0x2C4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2C8 "RIFSC_RISC_PER89_CIDCFGR,RIFSC RISC slave peripheral 89 CID configuration register" bitfld.long 0x2C8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2C8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2C8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2CC "RIFSC_RISC_PER89_SEMCR,RIFSC RISC slave peripheral 89 semaphore control register" rbitfld.long 0x2CC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2CC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2D0 "RIFSC_RISC_PER90_CIDCFGR,RIFSC RISC slave peripheral 90 CID configuration register" bitfld.long 0x2D0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2D0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2D0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2D0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2D4 "RIFSC_RISC_PER90_SEMCR,RIFSC RISC slave peripheral 90 semaphore control register" rbitfld.long 0x2D4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2D4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2D8 "RIFSC_RISC_PER91_CIDCFGR,RIFSC RISC slave peripheral 91 CID configuration register" bitfld.long 0x2D8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2D8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2D8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2D8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2DC "RIFSC_RISC_PER91_SEMCR,RIFSC RISC slave peripheral 91 semaphore control register" rbitfld.long 0x2DC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2DC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2E0 "RIFSC_RISC_PER92_CIDCFGR,RIFSC RISC slave peripheral 92 CID configuration register" bitfld.long 0x2E0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2E0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2E0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2E0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2E4 "RIFSC_RISC_PER92_SEMCR,RIFSC RISC slave peripheral 92 semaphore control register" rbitfld.long 0x2E4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2E4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2E8 "RIFSC_RISC_PER93_CIDCFGR,RIFSC RISC slave peripheral 93 CID configuration register" bitfld.long 0x2E8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2E8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2E8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2E8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2EC "RIFSC_RISC_PER93_SEMCR,RIFSC RISC slave peripheral 93 semaphore control register" rbitfld.long 0x2EC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2EC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2F0 "RIFSC_RISC_PER94_CIDCFGR,RIFSC RISC slave peripheral 94 CID configuration register" bitfld.long 0x2F0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2F0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2F0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2F0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2F4 "RIFSC_RISC_PER94_SEMCR,RIFSC RISC slave peripheral 94 semaphore control register" rbitfld.long 0x2F4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2F4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2F8 "RIFSC_RISC_PER95_CIDCFGR,RIFSC RISC slave peripheral 95 CID configuration register" bitfld.long 0x2F8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2F8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2F8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2F8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2FC "RIFSC_RISC_PER95_SEMCR,RIFSC RISC slave peripheral 95 semaphore control register" rbitfld.long 0x2FC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2FC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x300 "RIFSC_RISC_PER96_CIDCFGR,RIFSC RISC slave peripheral 96 CID configuration register" bitfld.long 0x300 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x300 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x300 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x300 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x304 "RIFSC_RISC_PER96_SEMCR,RIFSC RISC slave peripheral 96 semaphore control register" rbitfld.long 0x304 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x304 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x308 "RIFSC_RISC_PER97_CIDCFGR,RIFSC RISC slave peripheral 97 CID configuration register" bitfld.long 0x308 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x308 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x308 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x308 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x30C "RIFSC_RISC_PER97_SEMCR,RIFSC RISC slave peripheral 97 semaphore control register" rbitfld.long 0x30C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x310 "RIFSC_RISC_PER98_CIDCFGR,RIFSC RISC slave peripheral 98 CID configuration register" bitfld.long 0x310 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x310 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x310 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x310 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x314 "RIFSC_RISC_PER98_SEMCR,RIFSC RISC slave peripheral 98 semaphore control register" rbitfld.long 0x314 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x314 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x318 "RIFSC_RISC_PER99_CIDCFGR,RIFSC RISC slave peripheral 99 CID configuration register" bitfld.long 0x318 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x318 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x318 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x318 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x31C "RIFSC_RISC_PER99_SEMCR,RIFSC RISC slave peripheral 99 semaphore control register" rbitfld.long 0x31C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x31C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x320 "RIFSC_RISC_PER100_CIDCFGR,RIFSC RISC slave peripheral 100 CID configuration register" bitfld.long 0x320 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x320 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x320 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x320 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x324 "RIFSC_RISC_PER100_SEMCR,RIFSC RISC slave peripheral 100 semaphore control register" rbitfld.long 0x324 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x324 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x328 "RIFSC_RISC_PER101_CIDCFGR,RIFSC RISC slave peripheral 101 CID configuration register" bitfld.long 0x328 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x328 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x328 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x328 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x32C "RIFSC_RISC_PER101_SEMCR,RIFSC RISC slave peripheral 101 semaphore control register" rbitfld.long 0x32C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x32C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x330 "RIFSC_RISC_PER102_CIDCFGR,RIFSC RISC slave peripheral 102 CID configuration register" bitfld.long 0x330 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x330 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x330 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x330 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x334 "RIFSC_RISC_PER102_SEMCR,RIFSC RISC slave peripheral 102 semaphore control register" rbitfld.long 0x334 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x334 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x338 "RIFSC_RISC_PER103_CIDCFGR,RIFSC RISC slave peripheral 103 CID configuration register" bitfld.long 0x338 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x338 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x338 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x338 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x33C "RIFSC_RISC_PER103_SEMCR,RIFSC RISC slave peripheral 103 semaphore control register" rbitfld.long 0x33C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x33C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x340 "RIFSC_RISC_PER104_CIDCFGR,RIFSC RISC slave peripheral 104 CID configuration register" bitfld.long 0x340 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x340 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x340 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x340 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x344 "RIFSC_RISC_PER104_SEMCR,RIFSC RISC slave peripheral 104 semaphore control register" rbitfld.long 0x344 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x344 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x348 "RIFSC_RISC_PER105_CIDCFGR,RIFSC RISC slave peripheral 105 CID configuration register" bitfld.long 0x348 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x348 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x348 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x348 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34C "RIFSC_RISC_PER105_SEMCR,RIFSC RISC slave peripheral 105 semaphore control register" rbitfld.long 0x34C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x350 "RIFSC_RISC_PER106_CIDCFGR,RIFSC RISC slave peripheral 106 CID configuration register" bitfld.long 0x350 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x350 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x350 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x350 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x354 "RIFSC_RISC_PER106_SEMCR,RIFSC RISC slave peripheral 106 semaphore control register" rbitfld.long 0x354 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x354 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x358 "RIFSC_RISC_PER107_CIDCFGR,RIFSC RISC slave peripheral 107 CID configuration register" bitfld.long 0x358 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x358 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x358 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x358 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x35C "RIFSC_RISC_PER107_SEMCR,RIFSC RISC slave peripheral 107 semaphore control register" rbitfld.long 0x35C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x35C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x360 "RIFSC_RISC_PER108_CIDCFGR,RIFSC RISC slave peripheral 108 CID configuration register" bitfld.long 0x360 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x360 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x360 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x360 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x364 "RIFSC_RISC_PER108_SEMCR,RIFSC RISC slave peripheral 108 semaphore control register" rbitfld.long 0x364 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x364 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x368 "RIFSC_RISC_PER109_CIDCFGR,RIFSC RISC slave peripheral 109 CID configuration register" bitfld.long 0x368 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x368 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x368 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x368 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x36C "RIFSC_RISC_PER109_SEMCR,RIFSC RISC slave peripheral 109 semaphore control register" rbitfld.long 0x36C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x36C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x370 "RIFSC_RISC_PER110_CIDCFGR,RIFSC RISC slave peripheral 110 CID configuration register" bitfld.long 0x370 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x370 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x370 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x370 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x374 "RIFSC_RISC_PER110_SEMCR,RIFSC RISC slave peripheral 110 semaphore control register" rbitfld.long 0x374 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x374 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x378 "RIFSC_RISC_PER111_CIDCFGR,RIFSC RISC slave peripheral 111 CID configuration register" bitfld.long 0x378 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x378 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x378 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x378 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x37C "RIFSC_RISC_PER111_SEMCR,RIFSC RISC slave peripheral 111 semaphore control register" rbitfld.long 0x37C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x37C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x380 "RIFSC_RISC_PER112_CIDCFGR,RIFSC RISC slave peripheral 112 CID configuration register" bitfld.long 0x380 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x380 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x380 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x380 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x384 "RIFSC_RISC_PER112_SEMCR,RIFSC RISC slave peripheral 112 semaphore control register" rbitfld.long 0x384 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x384 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x388 "RIFSC_RISC_PER113_CIDCFGR,RIFSC RISC slave peripheral 113 CID configuration register" bitfld.long 0x388 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x388 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x388 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x388 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x38C "RIFSC_RISC_PER113_SEMCR,RIFSC RISC slave peripheral 113 semaphore control register" rbitfld.long 0x38C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x390 "RIFSC_RISC_PER114_CIDCFGR,RIFSC RISC slave peripheral 114 CID configuration register" bitfld.long 0x390 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x390 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x390 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x390 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x394 "RIFSC_RISC_PER114_SEMCR,RIFSC RISC slave peripheral 114 semaphore control register" rbitfld.long 0x394 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x394 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x398 "RIFSC_RISC_PER115_CIDCFGR,RIFSC RISC slave peripheral 115 CID configuration register" bitfld.long 0x398 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x398 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x398 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x398 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x39C "RIFSC_RISC_PER115_SEMCR,RIFSC RISC slave peripheral 115 semaphore control register" rbitfld.long 0x39C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x39C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3A0 "RIFSC_RISC_PER116_CIDCFGR,RIFSC RISC slave peripheral 116 CID configuration register" bitfld.long 0x3A0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3A0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3A0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3A0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3A4 "RIFSC_RISC_PER116_SEMCR,RIFSC RISC slave peripheral 116 semaphore control register" rbitfld.long 0x3A4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3A4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3A8 "RIFSC_RISC_PER117_CIDCFGR,RIFSC RISC slave peripheral 117 CID configuration register" bitfld.long 0x3A8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3A8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3A8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3A8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3AC "RIFSC_RISC_PER117_SEMCR,RIFSC RISC slave peripheral 117 semaphore control register" rbitfld.long 0x3AC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3AC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3B0 "RIFSC_RISC_PER118_CIDCFGR,RIFSC RISC slave peripheral 118 CID configuration register" bitfld.long 0x3B0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3B0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3B0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3B0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3B4 "RIFSC_RISC_PER118_SEMCR,RIFSC RISC slave peripheral 118 semaphore control register" rbitfld.long 0x3B4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3B4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3B8 "RIFSC_RISC_PER119_CIDCFGR,RIFSC RISC slave peripheral 119 CID configuration register" bitfld.long 0x3B8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3B8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3B8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3B8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3BC "RIFSC_RISC_PER119_SEMCR,RIFSC RISC slave peripheral 119 semaphore control register" rbitfld.long 0x3BC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3BC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3C0 "RIFSC_RISC_PER120_CIDCFGR,RIFSC RISC slave peripheral 120 CID configuration register" bitfld.long 0x3C0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3C0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3C0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C4 "RIFSC_RISC_PER120_SEMCR,RIFSC RISC slave peripheral 120 semaphore control register" rbitfld.long 0x3C4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3C8 "RIFSC_RISC_PER121_CIDCFGR,RIFSC RISC slave peripheral 121 CID configuration register" bitfld.long 0x3C8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3C8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3C8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3CC "RIFSC_RISC_PER121_SEMCR,RIFSC RISC slave peripheral 121 semaphore control register" rbitfld.long 0x3CC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3CC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3D0 "RIFSC_RISC_PER122_CIDCFGR,RIFSC RISC slave peripheral 122 CID configuration register" bitfld.long 0x3D0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3D0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3D0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3D0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3D4 "RIFSC_RISC_PER122_SEMCR,RIFSC RISC slave peripheral 122 semaphore control register" rbitfld.long 0x3D4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3D4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3D8 "RIFSC_RISC_PER123_CIDCFGR,RIFSC RISC slave peripheral 123 CID configuration register" bitfld.long 0x3D8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3D8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3D8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3D8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3DC "RIFSC_RISC_PER123_SEMCR,RIFSC RISC slave peripheral 123 semaphore control register" rbitfld.long 0x3DC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3DC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3E0 "RIFSC_RISC_PER124_CIDCFGR,RIFSC RISC slave peripheral 124 CID configuration register" bitfld.long 0x3E0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3E0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3E0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3E0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3E4 "RIFSC_RISC_PER124_SEMCR,RIFSC RISC slave peripheral 124 semaphore control register" rbitfld.long 0x3E4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3E4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3E8 "RIFSC_RISC_PER125_CIDCFGR,RIFSC RISC slave peripheral 125 CID configuration register" bitfld.long 0x3E8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3E8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3E8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3E8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3EC "RIFSC_RISC_PER125_SEMCR,RIFSC RISC slave peripheral 125 semaphore control register" rbitfld.long 0x3EC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3EC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3F0 "RIFSC_RISC_PER126_CIDCFGR,RIFSC RISC slave peripheral 126 CID configuration register" bitfld.long 0x3F0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3F0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3F0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3F0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3F4 "RIFSC_RISC_PER126_SEMCR,RIFSC RISC slave peripheral 126 semaphore control register" rbitfld.long 0x3F4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3F4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3F8 "RIFSC_RISC_PER127_CIDCFGR,RIFSC RISC slave peripheral 127 CID configuration register" bitfld.long 0x3F8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3F8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3F8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3F8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3FC "RIFSC_RISC_PER127_SEMCR,RIFSC RISC slave peripheral 127 semaphore control register" rbitfld.long 0x3FC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3FC 0. "SEM_MUTEX,Semaphore mutex" "0,1" group.long 0x900++0x3 line.long 0x0 "RIFSC_RISC_REG1_ACFGR,RIFSC RISAL memory region 1 subregion z configuration register" bitfld.long 0x0 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "RLOCK,Resource lock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SREN,Subregion enable" "B_0x0,B_0x1" group.long 0x908++0x3 line.long 0x0 "RIFSC_RISC_REG1_BCFGR,RIFSC RISAL memory region 1 subregion z configuration register" bitfld.long 0x0 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "RLOCK,Resource lock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SREN,Subregion enable" "B_0x0,B_0x1" group.long 0x910++0x3 line.long 0x0 "RIFSC_RISC_REG2_ACFGR,RIFSC RISAL memory region 2 subregion z configuration register" bitfld.long 0x0 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "RLOCK,Resource lock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SREN,Subregion enable" "B_0x0,B_0x1" group.long 0x918++0x3 line.long 0x0 "RIFSC_RISC_REG2_BCFGR,RIFSC RISAL memory region 2 subregion z configuration register" bitfld.long 0x0 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "RLOCK,Resource lock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SREN,Subregion enable" "B_0x0,B_0x1" group.long 0x920++0x3 line.long 0x0 "RIFSC_RISC_REG3_ACFGR,RIFSC RISAL memory region 3 subregion z configuration register" bitfld.long 0x0 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "RLOCK,Resource lock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SREN,Subregion enable" "B_0x0,B_0x1" group.long 0x928++0x3 line.long 0x0 "RIFSC_RISC_REG3_BCFGR,RIFSC RISAL memory region 3 subregion z configuration register" bitfld.long 0x0 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "RLOCK,Resource lock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SREN,Subregion enable" "B_0x0,B_0x1" group.long 0xC00++0x3 line.long 0x0 "RIFSC_RIMC_CR,RIFSC RIMC master configuration register" rbitfld.long 0x0 15. "DDEN,Debug domain enable" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "DAPCID,Debug access port compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 4.--6. "TDCID,Trusted domain compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "WUCDONE,Wake-up CPU done" "B_0x0,B_0x1" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0xC04++0x3 line.long 0x0 "RIFSC_RIMC_SR,RIFSC RIMC master status register" bitfld.long 0x0 1. "WUCEN,Wake-up CPU enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "GDPEN,Global debug profile enable" "B_0x0,B_0x1" group.long 0xC10++0x3F line.long 0x0 "RIFSC_RIMC_ATTR0,RIFSC RIMC master attribute register 0" bitfld.long 0x0 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x0 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x4 "RIFSC_RIMC_ATTR1,RIFSC RIMC master attribute register 1" bitfld.long 0x4 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x4 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x8 "RIFSC_RIMC_ATTR2,RIFSC RIMC master attribute register 2" bitfld.long 0x8 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x8 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x8 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0xC "RIFSC_RIMC_ATTR3,RIFSC RIMC master attribute register 3" bitfld.long 0xC 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0xC 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0xC 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x10 "RIFSC_RIMC_ATTR4,RIFSC RIMC master attribute register 4" bitfld.long 0x10 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x10 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x14 "RIFSC_RIMC_ATTR5,RIFSC RIMC master attribute register 5" bitfld.long 0x14 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x14 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x14 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x18 "RIFSC_RIMC_ATTR6,RIFSC RIMC master attribute register 6" bitfld.long 0x18 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x18 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x18 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x1C "RIFSC_RIMC_ATTR7,RIFSC RIMC master attribute register 7" bitfld.long 0x1C 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x1C 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x1C 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x20 "RIFSC_RIMC_ATTR8,RIFSC RIMC master attribute register 8" bitfld.long 0x20 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x20 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x24 "RIFSC_RIMC_ATTR9,RIFSC RIMC master attribute register 9" bitfld.long 0x24 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x24 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x24 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x28 "RIFSC_RIMC_ATTR10,RIFSC RIMC master attribute register 10" bitfld.long 0x28 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x28 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x28 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x2C "RIFSC_RIMC_ATTR11,RIFSC RIMC master attribute register 11" bitfld.long 0x2C 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x2C 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x2C 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x30 "RIFSC_RIMC_ATTR12,RIFSC RIMC master attribute register 12" bitfld.long 0x30 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x30 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x30 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x34 "RIFSC_RIMC_ATTR13,RIFSC RIMC master attribute register 13" bitfld.long 0x34 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x34 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x34 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x38 "RIFSC_RIMC_ATTR14,RIFSC RIMC master attribute register 14" bitfld.long 0x38 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x38 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x38 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x3C "RIFSC_RIMC_ATTR15,RIFSC RIMC master attribute register 15" bitfld.long 0x3C 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x3C 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x3C 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 2. "CIDSEL,CID selection" "B_0x0,B_0x1" rgroup.long 0xFB0++0xF line.long 0x0 "RIFSC_PPSR0,RIFSC peripheral protection status register 0" bitfld.long 0x0 31. "PPEN31,Peripheral protection enable 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPEN30,Peripheral protection enable 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPEN29,Peripheral protection enable 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPEN28,Peripheral protection enable 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPEN27,Peripheral protection enable 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPEN26,Peripheral protection enable 26" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "PPEN25,Peripheral protection enable 25" "B_0x0,B_0x1" bitfld.long 0x0 24. "PPEN24,Peripheral protection enable 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPEN23,Peripheral protection enable 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPEN22,Peripheral protection enable 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPEN21,Peripheral protection enable 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPEN20,Peripheral protection enable 20" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "PPEN19,Peripheral protection enable 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPEN18,Peripheral protection enable 18" "B_0x0,B_0x1" bitfld.long 0x0 17. "PPEN17,Peripheral protection enable 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPEN16,Peripheral protection enable 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPEN15,Peripheral protection enable 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPEN14,Peripheral protection enable 14" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "PPEN13,Peripheral protection enable 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPEN12,Peripheral protection enable 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPEN11,Peripheral protection enable 11" "B_0x0,B_0x1" bitfld.long 0x0 10. "PPEN10,Peripheral protection enable 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPEN9,Peripheral protection enable 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPEN8,Peripheral protection enable 8" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "PPEN7,Peripheral protection enable 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPEN6,Peripheral protection enable 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPEN5,Peripheral protection enable 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPEN4,Peripheral protection enable 4" "B_0x0,B_0x1" bitfld.long 0x0 3. "PPEN3,Peripheral protection enable 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPEN2,Peripheral protection enable 2" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "PPEN1,Peripheral protection enable 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPEN0,Peripheral protection enable 0" "B_0x0,B_0x1" line.long 0x4 "RIFSC_PPSR1,RIFSC peripheral protection status register 1" bitfld.long 0x4 31. "PPEN63,Peripheral protection enable 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "PPEN62,Peripheral protection enable 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "PPEN61,Peripheral protection enable 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "PPEN60,Peripheral protection enable 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "PPEN59,Peripheral protection enable 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "PPEN58,Peripheral protection enable 58" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "PPEN57,Peripheral protection enable 57" "B_0x0,B_0x1" bitfld.long 0x4 24. "PPEN56,Peripheral protection enable 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "PPEN55,Peripheral protection enable 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "PPEN54,Peripheral protection enable 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "PPEN53,Peripheral protection enable 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "PPEN52,Peripheral protection enable 52" "B_0x0,B_0x1" newline bitfld.long 0x4 19. "PPEN51,Peripheral protection enable 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "PPEN50,Peripheral protection enable 50" "B_0x0,B_0x1" bitfld.long 0x4 17. "PPEN49,Peripheral protection enable 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "PPEN48,Peripheral protection enable 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "PPEN47,Peripheral protection enable 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "PPEN46,Peripheral protection enable 46" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "PPEN45,Peripheral protection enable 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "PPEN44,Peripheral protection enable 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "PPEN43,Peripheral protection enable 43" "B_0x0,B_0x1" bitfld.long 0x4 10. "PPEN42,Peripheral protection enable 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "PPEN41,Peripheral protection enable 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "PPEN40,Peripheral protection enable 40" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "PPEN39,Peripheral protection enable 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "PPEN38,Peripheral protection enable 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "PPEN37,Peripheral protection enable 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "PPEN36,Peripheral protection enable 36" "B_0x0,B_0x1" bitfld.long 0x4 3. "PPEN35,Peripheral protection enable 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "PPEN34,Peripheral protection enable 34" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "PPEN33,Peripheral protection enable 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "PPEN32,Peripheral protection enable 32" "B_0x0,B_0x1" line.long 0x8 "RIFSC_PPSR2,RIFSC peripheral protection status register 2" bitfld.long 0x8 31. "PPEN95,Peripheral protection enable 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "PPEN94,Peripheral protection enable 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "PPEN93,Peripheral protection enable 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "PPEN92,Peripheral protection enable 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "PPEN91,Peripheral protection enable 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "PPEN90,Peripheral protection enable 90" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "PPEN89,Peripheral protection enable 89" "B_0x0,B_0x1" bitfld.long 0x8 24. "PPEN88,Peripheral protection enable 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "PPEN87,Peripheral protection enable 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "PPEN86,Peripheral protection enable 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "PPEN85,Peripheral protection enable 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "PPEN84,Peripheral protection enable 84" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "PPEN83,Peripheral protection enable 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "PPEN82,Peripheral protection enable 82" "B_0x0,B_0x1" bitfld.long 0x8 17. "PPEN81,Peripheral protection enable 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "PPEN80,Peripheral protection enable 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "PPEN79,Peripheral protection enable 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "PPEN78,Peripheral protection enable 78" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "PPEN77,Peripheral protection enable 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "PPEN76,Peripheral protection enable 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "PPEN75,Peripheral protection enable 75" "B_0x0,B_0x1" bitfld.long 0x8 10. "PPEN74,Peripheral protection enable 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "PPEN73,Peripheral protection enable 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "PPEN72,Peripheral protection enable 72" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "PPEN71,Peripheral protection enable 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "PPEN70,Peripheral protection enable 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "PPEN69,Peripheral protection enable 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "PPEN68,Peripheral protection enable 68" "B_0x0,B_0x1" bitfld.long 0x8 3. "PPEN67,Peripheral protection enable 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "PPEN66,Peripheral protection enable 66" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "PPEN65,Peripheral protection enable 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "PPEN64,Peripheral protection enable 64" "B_0x0,B_0x1" line.long 0xC "RIFSC_PPSR3,RIFSC peripheral protection status register 3" bitfld.long 0xC 31. "PPEN127,Peripheral protection enable 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "PPEN126,Peripheral protection enable 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "PPEN125,Peripheral protection enable 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "PPEN124,Peripheral protection enable 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "PPEN123,Peripheral protection enable 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "PPEN122,Peripheral protection enable 122" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "PPEN121,Peripheral protection enable 121" "B_0x0,B_0x1" bitfld.long 0xC 24. "PPEN120,Peripheral protection enable 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "PPEN119,Peripheral protection enable 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "PPEN118,Peripheral protection enable 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "PPEN117,Peripheral protection enable 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "PPEN116,Peripheral protection enable 116" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "PPEN115,Peripheral protection enable 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "PPEN114,Peripheral protection enable 114" "B_0x0,B_0x1" bitfld.long 0xC 17. "PPEN113,Peripheral protection enable 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "PPEN112,Peripheral protection enable 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "PPEN111,Peripheral protection enable 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "PPEN110,Peripheral protection enable 110" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "PPEN109,Peripheral protection enable 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "PPEN108,Peripheral protection enable 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "PPEN107,Peripheral protection enable 107" "B_0x0,B_0x1" bitfld.long 0xC 10. "PPEN106,Peripheral protection enable 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "PPEN105,Peripheral protection enable 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "PPEN104,Peripheral protection enable 104" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "PPEN103,Peripheral protection enable 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "PPEN102,Peripheral protection enable 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "PPEN101,Peripheral protection enable 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "PPEN100,Peripheral protection enable 100" "B_0x0,B_0x1" bitfld.long 0xC 3. "PPEN99,Peripheral protection enable 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "PPEN98,Peripheral protection enable 98" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "PPEN97,Peripheral protection enable 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "PPEN96,Peripheral protection enable 96" "B_0x0,B_0x1" rgroup.long 0xFE8++0x17 line.long 0x0 "RIFSC_HWCFGR3,RIFSC hardware configuration register 3" hexmask.long 0x0 0.--31. 1. "CFG,Hardware configuration" line.long 0x4 "RIFSC_HWCFGR2,RIFSC hardware configuration register 2" hexmask.long.byte 0x4 24.--31. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x4 16.--23. 1. "CFG2,Hardware configuration 2" hexmask.long.word 0x4 0.--15. 1. "CFG1,Hardware configuration 1" line.long 0x8 "RIFSC_HWCFGR1,RIFSC hardware configuration register 1" hexmask.long.byte 0x8 20.--23. 1. "CFG6,Hardware configuration 6" hexmask.long.byte 0x8 16.--19. 1. "CFG5,Hardware configuration 5" hexmask.long.byte 0x8 12.--15. 1. "CFG4,Hardware configuration 4" hexmask.long.byte 0x8 8.--11. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x8 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x8 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0xC "RIFSC_VERR,RIFSC version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,RIFSC major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,RIFSC minor revision" line.long 0x10 "RIFSC_IPIDR,RIFSC identification register" hexmask.long 0x10 0.--31. 1. "ID,RIFSC identification code" line.long 0x14 "RIFSC_SIDR,RIFSC size identification register" hexmask.long 0x14 0.--31. 1. "SID,RIFSC size identification code" tree.end tree.end endif sif (cpuis("*CM0+")) tree "RIFSC (Resource Isolation Framework Security Controller)" base ad:0x0 tree "RIFSC" base ad:0x42080000 group.long 0x0++0x3 line.long 0x0 "RIFSC_RISC_CR,RIFSC RISC slave configuration register x" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" group.long 0x10++0x17 line.long 0x0 "RIFSC_RISC_SECCFGR0,RIFSC RISC slave security configuration register 0" bitfld.long 0x0 31. "SEC31,Security configuration for peripheral 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "SEC30,Security configuration for peripheral 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "SEC29,Security configuration for peripheral 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "SEC28,Security configuration for peripheral 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "SEC27,Security configuration for peripheral 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "SEC26,Security configuration for peripheral 26" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "SEC25,Security configuration for peripheral 25" "B_0x0,B_0x1" bitfld.long 0x0 24. "SEC24,Security configuration for peripheral 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "SEC23,Security configuration for peripheral 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "SEC22,Security configuration for peripheral 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "SEC21,Security configuration for peripheral 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "SEC20,Security configuration for peripheral 20" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "SEC19,Security configuration for peripheral 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "SEC18,Security configuration for peripheral 18" "B_0x0,B_0x1" bitfld.long 0x0 17. "SEC17,Security configuration for peripheral 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "SEC16,Security configuration for peripheral 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "SEC15,Security configuration for peripheral 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "SEC14,Security configuration for peripheral 14" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "SEC13,Security configuration for peripheral 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "SEC12,Security configuration for peripheral 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "SEC11,Security configuration for peripheral 11" "B_0x0,B_0x1" bitfld.long 0x0 10. "SEC10,Security configuration for peripheral 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "SEC9,Security configuration for peripheral 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC8,Security configuration for peripheral 8" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "SEC7,Security configuration for peripheral 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "SEC6,Security configuration for peripheral 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "SEC5,Security configuration for peripheral 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "SEC4,Security configuration for peripheral 4" "B_0x0,B_0x1" bitfld.long 0x0 3. "SEC3,Security configuration for peripheral 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "SEC2,Security configuration for peripheral 2" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "SEC1,Security configuration for peripheral 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "SEC0,Security configuration for peripheral 0" "B_0x0,B_0x1" line.long 0x4 "RIFSC_RISC_SECCFGR1,RIFSC RISC slave security configuration register 1" bitfld.long 0x4 31. "SEC63,Security configuration for peripheral 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "SEC62,Security configuration for peripheral 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "SEC61,Security configuration for peripheral 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "SEC60,Security configuration for peripheral 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "SEC59,Security configuration for peripheral 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "SEC58,Security configuration for peripheral 58" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "SEC57,Security configuration for peripheral 57" "B_0x0,B_0x1" bitfld.long 0x4 24. "SEC56,Security configuration for peripheral 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "SEC55,Security configuration for peripheral 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "SEC54,Security configuration for peripheral 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "SEC53,Security configuration for peripheral 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "SEC52,Security configuration for peripheral 52" "B_0x0,B_0x1" newline bitfld.long 0x4 19. "SEC51,Security configuration for peripheral 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "SEC50,Security configuration for peripheral 50" "B_0x0,B_0x1" bitfld.long 0x4 17. "SEC49,Security configuration for peripheral 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "SEC48,Security configuration for peripheral 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "SEC47,Security configuration for peripheral 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "SEC46,Security configuration for peripheral 46" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "SEC45,Security configuration for peripheral 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "SEC44,Security configuration for peripheral 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "SEC43,Security configuration for peripheral 43" "B_0x0,B_0x1" bitfld.long 0x4 10. "SEC42,Security configuration for peripheral 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "SEC41,Security configuration for peripheral 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "SEC40,Security configuration for peripheral 40" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "SEC39,Security configuration for peripheral 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "SEC38,Security configuration for peripheral 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "SEC37,Security configuration for peripheral 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "SEC36,Security configuration for peripheral 36" "B_0x0,B_0x1" bitfld.long 0x4 3. "SEC35,Security configuration for peripheral 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "SEC34,Security configuration for peripheral 34" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "SEC33,Security configuration for peripheral 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "SEC32,Security configuration for peripheral 32" "B_0x0,B_0x1" line.long 0x8 "RIFSC_RISC_SECCFGR2,RIFSC RISC slave security configuration register 2" bitfld.long 0x8 31. "SEC95,Security configuration for peripheral 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "SEC94,Security configuration for peripheral 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "SEC93,Security configuration for peripheral 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "SEC92,Security configuration for peripheral 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "SEC91,Security configuration for peripheral 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "SEC90,Security configuration for peripheral 90" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "SEC89,Security configuration for peripheral 89" "B_0x0,B_0x1" bitfld.long 0x8 24. "SEC88,Security configuration for peripheral 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "SEC87,Security configuration for peripheral 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "SEC86,Security configuration for peripheral 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "SEC85,Security configuration for peripheral 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "SEC84,Security configuration for peripheral 84" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "SEC83,Security configuration for peripheral 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "SEC82,Security configuration for peripheral 82" "B_0x0,B_0x1" bitfld.long 0x8 17. "SEC81,Security configuration for peripheral 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEC80,Security configuration for peripheral 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "SEC79,Security configuration for peripheral 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "SEC78,Security configuration for peripheral 78" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "SEC77,Security configuration for peripheral 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "SEC76,Security configuration for peripheral 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "SEC75,Security configuration for peripheral 75" "B_0x0,B_0x1" bitfld.long 0x8 10. "SEC74,Security configuration for peripheral 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "SEC73,Security configuration for peripheral 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "SEC72,Security configuration for peripheral 72" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "SEC71,Security configuration for peripheral 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "SEC70,Security configuration for peripheral 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "SEC69,Security configuration for peripheral 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "SEC68,Security configuration for peripheral 68" "B_0x0,B_0x1" bitfld.long 0x8 3. "SEC67,Security configuration for peripheral 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "SEC66,Security configuration for peripheral 66" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "SEC65,Security configuration for peripheral 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "SEC64,Security configuration for peripheral 64" "B_0x0,B_0x1" line.long 0xC "RIFSC_RISC_SECCFGR3,RIFSC RISC slave security configuration register 3" bitfld.long 0xC 31. "SEC127,Security configuration for peripheral 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "SEC126,Security configuration for peripheral 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "SEC125,Security configuration for peripheral 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "SEC124,Security configuration for peripheral 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "SEC123,Security configuration for peripheral 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "SEC122,Security configuration for peripheral 122" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "SEC121,Security configuration for peripheral 121" "B_0x0,B_0x1" bitfld.long 0xC 24. "SEC120,Security configuration for peripheral 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "SEC119,Security configuration for peripheral 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "SEC118,Security configuration for peripheral 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "SEC117,Security configuration for peripheral 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "SEC116,Security configuration for peripheral 116" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "SEC115,Security configuration for peripheral 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "SEC114,Security configuration for peripheral 114" "B_0x0,B_0x1" bitfld.long 0xC 17. "SEC113,Security configuration for peripheral 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "SEC112,Security configuration for peripheral 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "SEC111,Security configuration for peripheral 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "SEC110,Security configuration for peripheral 110" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "SEC109,Security configuration for peripheral 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "SEC108,Security configuration for peripheral 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "SEC107,Security configuration for peripheral 107" "B_0x0,B_0x1" bitfld.long 0xC 10. "SEC106,Security configuration for peripheral 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "SEC105,Security configuration for peripheral 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "SEC104,Security configuration for peripheral 104" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "SEC103,Security configuration for peripheral 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "SEC102,Security configuration for peripheral 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "SEC101,Security configuration for peripheral 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "SEC100,Security configuration for peripheral 100" "B_0x0,B_0x1" bitfld.long 0xC 3. "SEC99,Security configuration for peripheral 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "SEC98,Security configuration for peripheral 98" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "SEC97,Security configuration for peripheral 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "SEC96,Security configuration for peripheral 96" "B_0x0,B_0x1" line.long 0x10 "RIFSC_RISC_SECCFGR4,RIFSC RISC slave security configuration register 4" bitfld.long 0x10 31. "SEC159,Security configuration for peripheral 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "SEC158,Security configuration for peripheral 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "SEC157,Security configuration for peripheral 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "SEC156,Security configuration for peripheral 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "SEC155,Security configuration for peripheral 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "SEC154,Security configuration for peripheral 154" "B_0x0,B_0x1" newline bitfld.long 0x10 25. "SEC153,Security configuration for peripheral 153" "B_0x0,B_0x1" bitfld.long 0x10 24. "SEC152,Security configuration for peripheral 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "SEC151,Security configuration for peripheral 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "SEC150,Security configuration for peripheral 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "SEC149,Security configuration for peripheral 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "SEC148,Security configuration for peripheral 148" "B_0x0,B_0x1" newline bitfld.long 0x10 19. "SEC147,Security configuration for peripheral 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEC146,Security configuration for peripheral 146" "B_0x0,B_0x1" bitfld.long 0x10 17. "SEC145,Security configuration for peripheral 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEC144,Security configuration for peripheral 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "SEC143,Security configuration for peripheral 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "SEC142,Security configuration for peripheral 142" "B_0x0,B_0x1" newline bitfld.long 0x10 13. "SEC141,Security configuration for peripheral 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "SEC140,Security configuration for peripheral 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "SEC139,Security configuration for peripheral 139" "B_0x0,B_0x1" bitfld.long 0x10 10. "SEC138,Security configuration for peripheral 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "SEC137,Security configuration for peripheral 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "SEC136,Security configuration for peripheral 136" "B_0x0,B_0x1" newline bitfld.long 0x10 7. "SEC135,Security configuration for peripheral 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "SEC134,Security configuration for peripheral 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "SEC133,Security configuration for peripheral 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "SEC132,Security configuration for peripheral 132" "B_0x0,B_0x1" bitfld.long 0x10 3. "SEC131,Security configuration for peripheral 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "SEC130,Security configuration for peripheral 130" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "SEC129,Security configuration for peripheral 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "SEC128,Security configuration for peripheral 128" "B_0x0,B_0x1" line.long 0x14 "RIFSC_RISC_SECCFGR5,RIFSC RISC slave security configuration register 5" bitfld.long 0x14 31. "SEC191,Security configuration for peripheral 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "SEC190,Security configuration for peripheral 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "SEC189,Security configuration for peripheral 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "SEC188,Security configuration for peripheral 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "SEC187,Security configuration for peripheral 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "SEC186,Security configuration for peripheral 186" "B_0x0,B_0x1" newline bitfld.long 0x14 25. "SEC185,Security configuration for peripheral 185" "B_0x0,B_0x1" bitfld.long 0x14 24. "SEC184,Security configuration for peripheral 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "SEC183,Security configuration for peripheral 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "SEC182,Security configuration for peripheral 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "SEC181,Security configuration for peripheral 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "SEC180,Security configuration for peripheral 180" "B_0x0,B_0x1" newline bitfld.long 0x14 19. "SEC179,Security configuration for peripheral 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "SEC178,Security configuration for peripheral 178" "B_0x0,B_0x1" bitfld.long 0x14 17. "SEC177,Security configuration for peripheral 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "SEC176,Security configuration for peripheral 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "SEC175,Security configuration for peripheral 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "SEC174,Security configuration for peripheral 174" "B_0x0,B_0x1" newline bitfld.long 0x14 13. "SEC173,Security configuration for peripheral 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "SEC172,Security configuration for peripheral 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "SEC171,Security configuration for peripheral 171" "B_0x0,B_0x1" bitfld.long 0x14 10. "SEC170,Security configuration for peripheral 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "SEC169,Security configuration for peripheral 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "SEC168,Security configuration for peripheral 168" "B_0x0,B_0x1" newline bitfld.long 0x14 7. "SEC167,Security configuration for peripheral 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "SEC166,Security configuration for peripheral 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "SEC165,Security configuration for peripheral 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "SEC164,Security configuration for peripheral 164" "B_0x0,B_0x1" bitfld.long 0x14 3. "SEC163,Security configuration for peripheral 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "SEC162,Security configuration for peripheral 162" "B_0x0,B_0x1" newline bitfld.long 0x14 1. "SEC161,Security configuration for peripheral 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "SEC160,Security configuration for peripheral 160" "B_0x0,B_0x1" group.long 0x30++0x17 line.long 0x0 "RIFSC_RISC_PRIVCFGR0,RIFSC RISFC slave privileged register 0" bitfld.long 0x0 31. "PRIV31,Privileged-only access permission for peripheral 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "PRIV30,Privileged-only access permission for peripheral 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "PRIV29,Privileged-only access permission for peripheral 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "PRIV28,Privileged-only access permission for peripheral 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "PRIV27,Privileged-only access permission for peripheral 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "PRIV26,Privileged-only access permission for peripheral 26" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "PRIV25,Privileged-only access permission for peripheral 25" "B_0x0,B_0x1" bitfld.long 0x0 24. "PRIV24,Privileged-only access permission for peripheral 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "PRIV23,Privileged-only access permission for peripheral 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "PRIV22,Privileged-only access permission for peripheral 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "PRIV21,Privileged-only access permission for peripheral 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "PRIV20,Privileged-only access permission for peripheral 20" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "PRIV19,Privileged-only access permission for peripheral 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "PRIV18,Privileged-only access permission for peripheral 18" "B_0x0,B_0x1" bitfld.long 0x0 17. "PRIV17,Privileged-only access permission for peripheral 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "PRIV16,Privileged-only access permission for peripheral 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "PRIV15,Privileged-only access permission for peripheral 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "PRIV14,Privileged-only access permission for peripheral 14" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "PRIV13,Privileged-only access permission for peripheral 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "PRIV12,Privileged-only access permission for peripheral 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "PRIV11,Privileged-only access permission for peripheral 11" "B_0x0,B_0x1" bitfld.long 0x0 10. "PRIV10,Privileged-only access permission for peripheral 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "PRIV9,Privileged-only access permission for peripheral 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "PRIV8,Privileged-only access permission for peripheral 8" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "PRIV7,Privileged-only access permission for peripheral 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "PRIV6,Privileged-only access permission for peripheral 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "PRIV5,Privileged-only access permission for peripheral 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "PRIV4,Privileged-only access permission for peripheral 4" "B_0x0,B_0x1" bitfld.long 0x0 3. "PRIV3,Privileged-only access permission for peripheral 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "PRIV2,Privileged-only access permission for peripheral 2" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "PRIV1,Privileged-only access permission for peripheral 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "PRIV0,Privileged-only access permission for peripheral 0" "B_0x0,B_0x1" line.long 0x4 "RIFSC_RISC_PRIVCFGR1,RIFSC RISFC slave privileged register 1" bitfld.long 0x4 31. "PRIV63,Privileged-only access permission for peripheral 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "PRIV62,Privileged-only access permission for peripheral 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "PRIV61,Privileged-only access permission for peripheral 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "PRIV60,Privileged-only access permission for peripheral 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "PRIV59,Privileged-only access permission for peripheral 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "PRIV58,Privileged-only access permission for peripheral 58" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "PRIV57,Privileged-only access permission for peripheral 57" "B_0x0,B_0x1" bitfld.long 0x4 24. "PRIV56,Privileged-only access permission for peripheral 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "PRIV55,Privileged-only access permission for peripheral 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "PRIV54,Privileged-only access permission for peripheral 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "PRIV53,Privileged-only access permission for peripheral 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "PRIV52,Privileged-only access permission for peripheral 52" "B_0x0,B_0x1" newline bitfld.long 0x4 19. "PRIV51,Privileged-only access permission for peripheral 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "PRIV50,Privileged-only access permission for peripheral 50" "B_0x0,B_0x1" bitfld.long 0x4 17. "PRIV49,Privileged-only access permission for peripheral 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "PRIV48,Privileged-only access permission for peripheral 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "PRIV47,Privileged-only access permission for peripheral 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "PRIV46,Privileged-only access permission for peripheral 46" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "PRIV45,Privileged-only access permission for peripheral 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "PRIV44,Privileged-only access permission for peripheral 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "PRIV43,Privileged-only access permission for peripheral 43" "B_0x0,B_0x1" bitfld.long 0x4 10. "PRIV42,Privileged-only access permission for peripheral 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "PRIV41,Privileged-only access permission for peripheral 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "PRIV40,Privileged-only access permission for peripheral 40" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "PRIV39,Privileged-only access permission for peripheral 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "PRIV38,Privileged-only access permission for peripheral 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "PRIV37,Privileged-only access permission for peripheral 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "PRIV36,Privileged-only access permission for peripheral 36" "B_0x0,B_0x1" bitfld.long 0x4 3. "PRIV35,Privileged-only access permission for peripheral 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "PRIV34,Privileged-only access permission for peripheral 34" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "PRIV33,Privileged-only access permission for peripheral 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "PRIV32,Privileged-only access permission for peripheral 32" "B_0x0,B_0x1" line.long 0x8 "RIFSC_RISC_PRIVCFGR2,RIFSC RISFC slave privileged register 2" bitfld.long 0x8 31. "PRIV95,Privileged-only access permission for peripheral 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "PRIV94,Privileged-only access permission for peripheral 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "PRIV93,Privileged-only access permission for peripheral 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "PRIV92,Privileged-only access permission for peripheral 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "PRIV91,Privileged-only access permission for peripheral 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "PRIV90,Privileged-only access permission for peripheral 90" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "PRIV89,Privileged-only access permission for peripheral 89" "B_0x0,B_0x1" bitfld.long 0x8 24. "PRIV88,Privileged-only access permission for peripheral 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "PRIV87,Privileged-only access permission for peripheral 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "PRIV86,Privileged-only access permission for peripheral 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "PRIV85,Privileged-only access permission for peripheral 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "PRIV84,Privileged-only access permission for peripheral 84" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "PRIV83,Privileged-only access permission for peripheral 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "PRIV82,Privileged-only access permission for peripheral 82" "B_0x0,B_0x1" bitfld.long 0x8 17. "PRIV81,Privileged-only access permission for peripheral 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "PRIV80,Privileged-only access permission for peripheral 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "PRIV79,Privileged-only access permission for peripheral 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "PRIV78,Privileged-only access permission for peripheral 78" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "PRIV77,Privileged-only access permission for peripheral 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "PRIV76,Privileged-only access permission for peripheral 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "PRIV75,Privileged-only access permission for peripheral 75" "B_0x0,B_0x1" bitfld.long 0x8 10. "PRIV74,Privileged-only access permission for peripheral 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "PRIV73,Privileged-only access permission for peripheral 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "PRIV72,Privileged-only access permission for peripheral 72" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "PRIV71,Privileged-only access permission for peripheral 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "PRIV70,Privileged-only access permission for peripheral 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "PRIV69,Privileged-only access permission for peripheral 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "PRIV68,Privileged-only access permission for peripheral 68" "B_0x0,B_0x1" bitfld.long 0x8 3. "PRIV67,Privileged-only access permission for peripheral 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "PRIV66,Privileged-only access permission for peripheral 66" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "PRIV65,Privileged-only access permission for peripheral 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "PRIV64,Privileged-only access permission for peripheral 64" "B_0x0,B_0x1" line.long 0xC "RIFSC_RISC_PRIVCFGR3,RIFSC RISFC slave privileged register 3" bitfld.long 0xC 31. "PRIV127,Privileged-only access permission for peripheral 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "PRIV126,Privileged-only access permission for peripheral 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "PRIV125,Privileged-only access permission for peripheral 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "PRIV124,Privileged-only access permission for peripheral 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "PRIV123,Privileged-only access permission for peripheral 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "PRIV122,Privileged-only access permission for peripheral 122" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "PRIV121,Privileged-only access permission for peripheral 121" "B_0x0,B_0x1" bitfld.long 0xC 24. "PRIV120,Privileged-only access permission for peripheral 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "PRIV119,Privileged-only access permission for peripheral 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "PRIV118,Privileged-only access permission for peripheral 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "PRIV117,Privileged-only access permission for peripheral 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "PRIV116,Privileged-only access permission for peripheral 116" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "PRIV115,Privileged-only access permission for peripheral 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "PRIV114,Privileged-only access permission for peripheral 114" "B_0x0,B_0x1" bitfld.long 0xC 17. "PRIV113,Privileged-only access permission for peripheral 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "PRIV112,Privileged-only access permission for peripheral 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "PRIV111,Privileged-only access permission for peripheral 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "PRIV110,Privileged-only access permission for peripheral 110" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "PRIV109,Privileged-only access permission for peripheral 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "PRIV108,Privileged-only access permission for peripheral 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "PRIV107,Privileged-only access permission for peripheral 107" "B_0x0,B_0x1" bitfld.long 0xC 10. "PRIV106,Privileged-only access permission for peripheral 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "PRIV105,Privileged-only access permission for peripheral 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "PRIV104,Privileged-only access permission for peripheral 104" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "PRIV103,Privileged-only access permission for peripheral 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "PRIV102,Privileged-only access permission for peripheral 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "PRIV101,Privileged-only access permission for peripheral 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "PRIV100,Privileged-only access permission for peripheral 100" "B_0x0,B_0x1" bitfld.long 0xC 3. "PRIV99,Privileged-only access permission for peripheral 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "PRIV98,Privileged-only access permission for peripheral 98" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "PRIV97,Privileged-only access permission for peripheral 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "PRIV96,Privileged-only access permission for peripheral 96" "B_0x0,B_0x1" line.long 0x10 "RIFSC_RISC_PRIVCFGR4,RIFSC RISFC slave privileged register 4" bitfld.long 0x10 31. "PRIV159,Privileged-only access permission for peripheral 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "PRIV158,Privileged-only access permission for peripheral 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "PRIV157,Privileged-only access permission for peripheral 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "PRIV156,Privileged-only access permission for peripheral 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "PRIV155,Privileged-only access permission for peripheral 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "PRIV154,Privileged-only access permission for peripheral 154" "B_0x0,B_0x1" newline bitfld.long 0x10 25. "PRIV153,Privileged-only access permission for peripheral 153" "B_0x0,B_0x1" bitfld.long 0x10 24. "PRIV152,Privileged-only access permission for peripheral 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "PRIV151,Privileged-only access permission for peripheral 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "PRIV150,Privileged-only access permission for peripheral 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "PRIV149,Privileged-only access permission for peripheral 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "PRIV148,Privileged-only access permission for peripheral 148" "B_0x0,B_0x1" newline bitfld.long 0x10 19. "PRIV147,Privileged-only access permission for peripheral 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "PRIV146,Privileged-only access permission for peripheral 146" "B_0x0,B_0x1" bitfld.long 0x10 17. "PRIV145,Privileged-only access permission for peripheral 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "PRIV144,Privileged-only access permission for peripheral 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "PRIV143,Privileged-only access permission for peripheral 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "PRIV142,Privileged-only access permission for peripheral 142" "B_0x0,B_0x1" newline bitfld.long 0x10 13. "PRIV141,Privileged-only access permission for peripheral 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "PRIV140,Privileged-only access permission for peripheral 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "PRIV139,Privileged-only access permission for peripheral 139" "B_0x0,B_0x1" bitfld.long 0x10 10. "PRIV138,Privileged-only access permission for peripheral 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "PRIV137,Privileged-only access permission for peripheral 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "PRIV136,Privileged-only access permission for peripheral 136" "B_0x0,B_0x1" newline bitfld.long 0x10 7. "PRIV135,Privileged-only access permission for peripheral 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "PRIV134,Privileged-only access permission for peripheral 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "PRIV133,Privileged-only access permission for peripheral 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "PRIV132,Privileged-only access permission for peripheral 132" "B_0x0,B_0x1" bitfld.long 0x10 3. "PRIV131,Privileged-only access permission for peripheral 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "PRIV130,Privileged-only access permission for peripheral 130" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "PRIV129,Privileged-only access permission for peripheral 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "PRIV128,Privileged-only access permission for peripheral 128" "B_0x0,B_0x1" line.long 0x14 "RIFSC_RISC_PRIVCFGR5,RIFSC RISFC slave privileged register 5" bitfld.long 0x14 31. "PRIV191,Privileged-only access permission for peripheral 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "PRIV190,Privileged-only access permission for peripheral 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "PRIV189,Privileged-only access permission for peripheral 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "PRIV188,Privileged-only access permission for peripheral 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "PRIV187,Privileged-only access permission for peripheral 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "PRIV186,Privileged-only access permission for peripheral 186" "B_0x0,B_0x1" newline bitfld.long 0x14 25. "PRIV185,Privileged-only access permission for peripheral 185" "B_0x0,B_0x1" bitfld.long 0x14 24. "PRIV184,Privileged-only access permission for peripheral 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "PRIV183,Privileged-only access permission for peripheral 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "PRIV182,Privileged-only access permission for peripheral 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "PRIV181,Privileged-only access permission for peripheral 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "PRIV180,Privileged-only access permission for peripheral 180" "B_0x0,B_0x1" newline bitfld.long 0x14 19. "PRIV179,Privileged-only access permission for peripheral 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "PRIV178,Privileged-only access permission for peripheral 178" "B_0x0,B_0x1" bitfld.long 0x14 17. "PRIV177,Privileged-only access permission for peripheral 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "PRIV176,Privileged-only access permission for peripheral 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "PRIV175,Privileged-only access permission for peripheral 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "PRIV174,Privileged-only access permission for peripheral 174" "B_0x0,B_0x1" newline bitfld.long 0x14 13. "PRIV173,Privileged-only access permission for peripheral 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "PRIV172,Privileged-only access permission for peripheral 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "PRIV171,Privileged-only access permission for peripheral 171" "B_0x0,B_0x1" bitfld.long 0x14 10. "PRIV170,Privileged-only access permission for peripheral 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "PRIV169,Privileged-only access permission for peripheral 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "PRIV168,Privileged-only access permission for peripheral 168" "B_0x0,B_0x1" newline bitfld.long 0x14 7. "PRIV167,Privileged-only access permission for peripheral 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "PRIV166,Privileged-only access permission for peripheral 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "PRIV165,Privileged-only access permission for peripheral 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "PRIV164,Privileged-only access permission for peripheral 164" "B_0x0,B_0x1" bitfld.long 0x14 3. "PRIV163,Privileged-only access permission for peripheral 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "PRIV162,Privileged-only access permission for peripheral 162" "B_0x0,B_0x1" newline bitfld.long 0x14 1. "PRIV161,Privileged-only access permission for peripheral 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "PRIV160,Privileged-only access permission for peripheral 160" "B_0x0,B_0x1" group.long 0x50++0x17 line.long 0x0 "RIFSC_RISC_RCFGLOCKR0,RIFSC RISC slave resource configuration lock register 0" bitfld.long 0x0 31. "RLOCK31,rRsource lock for peripheral 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "RLOCK30,rRsource lock for peripheral 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "RLOCK29,rRsource lock for peripheral 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "RLOCK28,rRsource lock for peripheral 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "RLOCK27,rRsource lock for peripheral 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "RLOCK26,rRsource lock for peripheral 26" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "RLOCK25,rRsource lock for peripheral 25" "B_0x0,B_0x1" bitfld.long 0x0 24. "RLOCK24,rRsource lock for peripheral 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "RLOCK23,rRsource lock for peripheral 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "RLOCK22,rRsource lock for peripheral 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "RLOCK21,rRsource lock for peripheral 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "RLOCK20,rRsource lock for peripheral 20" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "RLOCK19,rRsource lock for peripheral 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "RLOCK18,rRsource lock for peripheral 18" "B_0x0,B_0x1" bitfld.long 0x0 17. "RLOCK17,rRsource lock for peripheral 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "RLOCK16,rRsource lock for peripheral 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "RLOCK15,rRsource lock for peripheral 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "RLOCK14,rRsource lock for peripheral 14" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "RLOCK13,rRsource lock for peripheral 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "RLOCK12,rRsource lock for peripheral 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "RLOCK11,rRsource lock for peripheral 11" "B_0x0,B_0x1" bitfld.long 0x0 10. "RLOCK10,rRsource lock for peripheral 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "RLOCK9,rRsource lock for peripheral 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "RLOCK8,rRsource lock for peripheral 8" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "RLOCK7,rRsource lock for peripheral 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "RLOCK6,rRsource lock for peripheral 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "RLOCK5,rRsource lock for peripheral 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "RLOCK4,rRsource lock for peripheral 4" "B_0x0,B_0x1" bitfld.long 0x0 3. "RLOCK3,rRsource lock for peripheral 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "RLOCK2,rRsource lock for peripheral 2" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "RLOCK1,rRsource lock for peripheral 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "RLOCK0,rRsource lock for peripheral 0" "B_0x0,B_0x1" line.long 0x4 "RIFSC_RISC_RCFGLOCKR1,RIFSC RISC slave resource configuration lock register 1" bitfld.long 0x4 31. "RLOCK63,rRsource lock for peripheral 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "RLOCK62,rRsource lock for peripheral 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "RLOCK61,rRsource lock for peripheral 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "RLOCK60,rRsource lock for peripheral 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "RLOCK59,rRsource lock for peripheral 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "RLOCK58,rRsource lock for peripheral 58" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "RLOCK57,rRsource lock for peripheral 57" "B_0x0,B_0x1" bitfld.long 0x4 24. "RLOCK56,rRsource lock for peripheral 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "RLOCK55,rRsource lock for peripheral 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "RLOCK54,rRsource lock for peripheral 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "RLOCK53,rRsource lock for peripheral 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "RLOCK52,rRsource lock for peripheral 52" "B_0x0,B_0x1" newline bitfld.long 0x4 19. "RLOCK51,rRsource lock for peripheral 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "RLOCK50,rRsource lock for peripheral 50" "B_0x0,B_0x1" bitfld.long 0x4 17. "RLOCK49,rRsource lock for peripheral 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "RLOCK48,rRsource lock for peripheral 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "RLOCK47,rRsource lock for peripheral 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "RLOCK46,rRsource lock for peripheral 46" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "RLOCK45,rRsource lock for peripheral 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "RLOCK44,rRsource lock for peripheral 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "RLOCK43,rRsource lock for peripheral 43" "B_0x0,B_0x1" bitfld.long 0x4 10. "RLOCK42,rRsource lock for peripheral 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "RLOCK41,rRsource lock for peripheral 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "RLOCK40,rRsource lock for peripheral 40" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "RLOCK39,rRsource lock for peripheral 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "RLOCK38,rRsource lock for peripheral 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "RLOCK37,rRsource lock for peripheral 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "RLOCK36,rRsource lock for peripheral 36" "B_0x0,B_0x1" bitfld.long 0x4 3. "RLOCK35,rRsource lock for peripheral 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "RLOCK34,rRsource lock for peripheral 34" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "RLOCK33,rRsource lock for peripheral 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "RLOCK32,rRsource lock for peripheral 32" "B_0x0,B_0x1" line.long 0x8 "RIFSC_RISC_RCFGLOCKR2,RIFSC RISC slave resource configuration lock register 2" bitfld.long 0x8 31. "RLOCK95,rRsource lock for peripheral 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "RLOCK94,rRsource lock for peripheral 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "RLOCK93,rRsource lock for peripheral 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "RLOCK92,rRsource lock for peripheral 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "RLOCK91,rRsource lock for peripheral 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "RLOCK90,rRsource lock for peripheral 90" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "RLOCK89,rRsource lock for peripheral 89" "B_0x0,B_0x1" bitfld.long 0x8 24. "RLOCK88,rRsource lock for peripheral 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "RLOCK87,rRsource lock for peripheral 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "RLOCK86,rRsource lock for peripheral 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "RLOCK85,rRsource lock for peripheral 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "RLOCK84,rRsource lock for peripheral 84" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "RLOCK83,rRsource lock for peripheral 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "RLOCK82,rRsource lock for peripheral 82" "B_0x0,B_0x1" bitfld.long 0x8 17. "RLOCK81,rRsource lock for peripheral 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "RLOCK80,rRsource lock for peripheral 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "RLOCK79,rRsource lock for peripheral 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "RLOCK78,rRsource lock for peripheral 78" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "RLOCK77,rRsource lock for peripheral 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "RLOCK76,rRsource lock for peripheral 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "RLOCK75,rRsource lock for peripheral 75" "B_0x0,B_0x1" bitfld.long 0x8 10. "RLOCK74,rRsource lock for peripheral 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "RLOCK73,rRsource lock for peripheral 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "RLOCK72,rRsource lock for peripheral 72" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "RLOCK71,rRsource lock for peripheral 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "RLOCK70,rRsource lock for peripheral 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "RLOCK69,rRsource lock for peripheral 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "RLOCK68,rRsource lock for peripheral 68" "B_0x0,B_0x1" bitfld.long 0x8 3. "RLOCK67,rRsource lock for peripheral 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "RLOCK66,rRsource lock for peripheral 66" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "RLOCK65,rRsource lock for peripheral 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "RLOCK64,rRsource lock for peripheral 64" "B_0x0,B_0x1" line.long 0xC "RIFSC_RISC_RCFGLOCKR3,RIFSC RISC slave resource configuration lock register 3" bitfld.long 0xC 31. "RLOCK127,rRsource lock for peripheral 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "RLOCK126,rRsource lock for peripheral 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "RLOCK125,rRsource lock for peripheral 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "RLOCK124,rRsource lock for peripheral 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "RLOCK123,rRsource lock for peripheral 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "RLOCK122,rRsource lock for peripheral 122" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "RLOCK121,rRsource lock for peripheral 121" "B_0x0,B_0x1" bitfld.long 0xC 24. "RLOCK120,rRsource lock for peripheral 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "RLOCK119,rRsource lock for peripheral 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "RLOCK118,rRsource lock for peripheral 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "RLOCK117,rRsource lock for peripheral 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "RLOCK116,rRsource lock for peripheral 116" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "RLOCK115,rRsource lock for peripheral 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "RLOCK114,rRsource lock for peripheral 114" "B_0x0,B_0x1" bitfld.long 0xC 17. "RLOCK113,rRsource lock for peripheral 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "RLOCK112,rRsource lock for peripheral 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "RLOCK111,rRsource lock for peripheral 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "RLOCK110,rRsource lock for peripheral 110" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "RLOCK109,rRsource lock for peripheral 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "RLOCK108,rRsource lock for peripheral 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "RLOCK107,rRsource lock for peripheral 107" "B_0x0,B_0x1" bitfld.long 0xC 10. "RLOCK106,rRsource lock for peripheral 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "RLOCK105,rRsource lock for peripheral 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "RLOCK104,rRsource lock for peripheral 104" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "RLOCK103,rRsource lock for peripheral 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "RLOCK102,rRsource lock for peripheral 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "RLOCK101,rRsource lock for peripheral 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "RLOCK100,rRsource lock for peripheral 100" "B_0x0,B_0x1" bitfld.long 0xC 3. "RLOCK99,rRsource lock for peripheral 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "RLOCK98,rRsource lock for peripheral 98" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RLOCK97,rRsource lock for peripheral 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "RLOCK96,rRsource lock for peripheral 96" "B_0x0,B_0x1" line.long 0x10 "RIFSC_RISC_RCFGLOCKR4,RIFSC RISC slave resource configuration lock register 4" bitfld.long 0x10 31. "RLOCK159,rRsource lock for peripheral 159" "B_0x0,B_0x1" bitfld.long 0x10 30. "RLOCK158,rRsource lock for peripheral 158" "B_0x0,B_0x1" bitfld.long 0x10 29. "RLOCK157,rRsource lock for peripheral 157" "B_0x0,B_0x1" bitfld.long 0x10 28. "RLOCK156,rRsource lock for peripheral 156" "B_0x0,B_0x1" bitfld.long 0x10 27. "RLOCK155,rRsource lock for peripheral 155" "B_0x0,B_0x1" bitfld.long 0x10 26. "RLOCK154,rRsource lock for peripheral 154" "B_0x0,B_0x1" newline bitfld.long 0x10 25. "RLOCK153,rRsource lock for peripheral 153" "B_0x0,B_0x1" bitfld.long 0x10 24. "RLOCK152,rRsource lock for peripheral 152" "B_0x0,B_0x1" bitfld.long 0x10 23. "RLOCK151,rRsource lock for peripheral 151" "B_0x0,B_0x1" bitfld.long 0x10 22. "RLOCK150,rRsource lock for peripheral 150" "B_0x0,B_0x1" bitfld.long 0x10 21. "RLOCK149,rRsource lock for peripheral 149" "B_0x0,B_0x1" bitfld.long 0x10 20. "RLOCK148,rRsource lock for peripheral 148" "B_0x0,B_0x1" newline bitfld.long 0x10 19. "RLOCK147,rRsource lock for peripheral 147" "B_0x0,B_0x1" bitfld.long 0x10 18. "RLOCK146,rRsource lock for peripheral 146" "B_0x0,B_0x1" bitfld.long 0x10 17. "RLOCK145,rRsource lock for peripheral 145" "B_0x0,B_0x1" bitfld.long 0x10 16. "RLOCK144,rRsource lock for peripheral 144" "B_0x0,B_0x1" bitfld.long 0x10 15. "RLOCK143,rRsource lock for peripheral 143" "B_0x0,B_0x1" bitfld.long 0x10 14. "RLOCK142,rRsource lock for peripheral 142" "B_0x0,B_0x1" newline bitfld.long 0x10 13. "RLOCK141,rRsource lock for peripheral 141" "B_0x0,B_0x1" bitfld.long 0x10 12. "RLOCK140,rRsource lock for peripheral 140" "B_0x0,B_0x1" bitfld.long 0x10 11. "RLOCK139,rRsource lock for peripheral 139" "B_0x0,B_0x1" bitfld.long 0x10 10. "RLOCK138,rRsource lock for peripheral 138" "B_0x0,B_0x1" bitfld.long 0x10 9. "RLOCK137,rRsource lock for peripheral 137" "B_0x0,B_0x1" bitfld.long 0x10 8. "RLOCK136,rRsource lock for peripheral 136" "B_0x0,B_0x1" newline bitfld.long 0x10 7. "RLOCK135,rRsource lock for peripheral 135" "B_0x0,B_0x1" bitfld.long 0x10 6. "RLOCK134,rRsource lock for peripheral 134" "B_0x0,B_0x1" bitfld.long 0x10 5. "RLOCK133,rRsource lock for peripheral 133" "B_0x0,B_0x1" bitfld.long 0x10 4. "RLOCK132,rRsource lock for peripheral 132" "B_0x0,B_0x1" bitfld.long 0x10 3. "RLOCK131,rRsource lock for peripheral 131" "B_0x0,B_0x1" bitfld.long 0x10 2. "RLOCK130,rRsource lock for peripheral 130" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "RLOCK129,rRsource lock for peripheral 129" "B_0x0,B_0x1" bitfld.long 0x10 0. "RLOCK128,rRsource lock for peripheral 128" "B_0x0,B_0x1" line.long 0x14 "RIFSC_RISC_RCFGLOCKR5,RIFSC RISC slave resource configuration lock register 5" bitfld.long 0x14 31. "RLOCK191,rRsource lock for peripheral 191" "B_0x0,B_0x1" bitfld.long 0x14 30. "RLOCK190,rRsource lock for peripheral 190" "B_0x0,B_0x1" bitfld.long 0x14 29. "RLOCK189,rRsource lock for peripheral 189" "B_0x0,B_0x1" bitfld.long 0x14 28. "RLOCK188,rRsource lock for peripheral 188" "B_0x0,B_0x1" bitfld.long 0x14 27. "RLOCK187,rRsource lock for peripheral 187" "B_0x0,B_0x1" bitfld.long 0x14 26. "RLOCK186,rRsource lock for peripheral 186" "B_0x0,B_0x1" newline bitfld.long 0x14 25. "RLOCK185,rRsource lock for peripheral 185" "B_0x0,B_0x1" bitfld.long 0x14 24. "RLOCK184,rRsource lock for peripheral 184" "B_0x0,B_0x1" bitfld.long 0x14 23. "RLOCK183,rRsource lock for peripheral 183" "B_0x0,B_0x1" bitfld.long 0x14 22. "RLOCK182,rRsource lock for peripheral 182" "B_0x0,B_0x1" bitfld.long 0x14 21. "RLOCK181,rRsource lock for peripheral 181" "B_0x0,B_0x1" bitfld.long 0x14 20. "RLOCK180,rRsource lock for peripheral 180" "B_0x0,B_0x1" newline bitfld.long 0x14 19. "RLOCK179,rRsource lock for peripheral 179" "B_0x0,B_0x1" bitfld.long 0x14 18. "RLOCK178,rRsource lock for peripheral 178" "B_0x0,B_0x1" bitfld.long 0x14 17. "RLOCK177,rRsource lock for peripheral 177" "B_0x0,B_0x1" bitfld.long 0x14 16. "RLOCK176,rRsource lock for peripheral 176" "B_0x0,B_0x1" bitfld.long 0x14 15. "RLOCK175,rRsource lock for peripheral 175" "B_0x0,B_0x1" bitfld.long 0x14 14. "RLOCK174,rRsource lock for peripheral 174" "B_0x0,B_0x1" newline bitfld.long 0x14 13. "RLOCK173,rRsource lock for peripheral 173" "B_0x0,B_0x1" bitfld.long 0x14 12. "RLOCK172,rRsource lock for peripheral 172" "B_0x0,B_0x1" bitfld.long 0x14 11. "RLOCK171,rRsource lock for peripheral 171" "B_0x0,B_0x1" bitfld.long 0x14 10. "RLOCK170,rRsource lock for peripheral 170" "B_0x0,B_0x1" bitfld.long 0x14 9. "RLOCK169,rRsource lock for peripheral 169" "B_0x0,B_0x1" bitfld.long 0x14 8. "RLOCK168,rRsource lock for peripheral 168" "B_0x0,B_0x1" newline bitfld.long 0x14 7. "RLOCK167,rRsource lock for peripheral 167" "B_0x0,B_0x1" bitfld.long 0x14 6. "RLOCK166,rRsource lock for peripheral 166" "B_0x0,B_0x1" bitfld.long 0x14 5. "RLOCK165,rRsource lock for peripheral 165" "B_0x0,B_0x1" bitfld.long 0x14 4. "RLOCK164,rRsource lock for peripheral 164" "B_0x0,B_0x1" bitfld.long 0x14 3. "RLOCK163,rRsource lock for peripheral 163" "B_0x0,B_0x1" bitfld.long 0x14 2. "RLOCK162,rRsource lock for peripheral 162" "B_0x0,B_0x1" newline bitfld.long 0x14 1. "RLOCK161,rRsource lock for peripheral 161" "B_0x0,B_0x1" bitfld.long 0x14 0. "RLOCK160,rRsource lock for peripheral 160" "B_0x0,B_0x1" group.long 0x100++0x3FF line.long 0x0 "RIFSC_RISC_PER0_CIDCFGR,RIFSC RISC slave peripheral 0 CID configuration register" bitfld.long 0x0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4 "RIFSC_RISC_PER0_SEMCR,RIFSC RISC slave peripheral 0 semaphore control register" rbitfld.long 0x4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x8 "RIFSC_RISC_PER1_CIDCFGR,RIFSC RISC slave peripheral 1 CID configuration register" bitfld.long 0x8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC "RIFSC_RISC_PER1_SEMCR,RIFSC RISC slave peripheral 1 semaphore control register" rbitfld.long 0xC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x10 "RIFSC_RISC_PER2_CIDCFGR,RIFSC RISC slave peripheral 2 CID configuration register" bitfld.long 0x10 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14 "RIFSC_RISC_PER2_SEMCR,RIFSC RISC slave peripheral 2 semaphore control register" rbitfld.long 0x14 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x18 "RIFSC_RISC_PER3_CIDCFGR,RIFSC RISC slave peripheral 3 CID configuration register" bitfld.long 0x18 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x18 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x18 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x18 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C "RIFSC_RISC_PER3_SEMCR,RIFSC RISC slave peripheral 3 semaphore control register" rbitfld.long 0x1C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x20 "RIFSC_RISC_PER4_CIDCFGR,RIFSC RISC slave peripheral 4 CID configuration register" bitfld.long 0x20 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x20 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x20 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24 "RIFSC_RISC_PER4_SEMCR,RIFSC RISC slave peripheral 4 semaphore control register" rbitfld.long 0x24 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x28 "RIFSC_RISC_PER5_CIDCFGR,RIFSC RISC slave peripheral 5 CID configuration register" bitfld.long 0x28 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x28 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x28 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x28 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C "RIFSC_RISC_PER5_SEMCR,RIFSC RISC slave peripheral 5 semaphore control register" rbitfld.long 0x2C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x30 "RIFSC_RISC_PER6_CIDCFGR,RIFSC RISC slave peripheral 6 CID configuration register" bitfld.long 0x30 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x30 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x30 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34 "RIFSC_RISC_PER6_SEMCR,RIFSC RISC slave peripheral 6 semaphore control register" rbitfld.long 0x34 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x38 "RIFSC_RISC_PER7_CIDCFGR,RIFSC RISC slave peripheral 7 CID configuration register" bitfld.long 0x38 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x38 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x38 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x38 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C "RIFSC_RISC_PER7_SEMCR,RIFSC RISC slave peripheral 7 semaphore control register" rbitfld.long 0x3C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x40 "RIFSC_RISC_PER8_CIDCFGR,RIFSC RISC slave peripheral 8 CID configuration register" bitfld.long 0x40 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x40 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x40 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x40 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x40 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x44 "RIFSC_RISC_PER8_SEMCR,RIFSC RISC slave peripheral 8 semaphore control register" rbitfld.long 0x44 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x44 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x48 "RIFSC_RISC_PER9_CIDCFGR,RIFSC RISC slave peripheral 9 CID configuration register" bitfld.long 0x48 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x48 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x48 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x48 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x48 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x4C "RIFSC_RISC_PER9_SEMCR,RIFSC RISC slave peripheral 9 semaphore control register" rbitfld.long 0x4C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x50 "RIFSC_RISC_PER10_CIDCFGR,RIFSC RISC slave peripheral 10 CID configuration register" bitfld.long 0x50 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x50 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x50 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x50 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x50 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x54 "RIFSC_RISC_PER10_SEMCR,RIFSC RISC slave peripheral 10 semaphore control register" rbitfld.long 0x54 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x54 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x58 "RIFSC_RISC_PER11_CIDCFGR,RIFSC RISC slave peripheral 11 CID configuration register" bitfld.long 0x58 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x58 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x58 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x58 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x58 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x5C "RIFSC_RISC_PER11_SEMCR,RIFSC RISC slave peripheral 11 semaphore control register" rbitfld.long 0x5C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x5C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x60 "RIFSC_RISC_PER12_CIDCFGR,RIFSC RISC slave peripheral 12 CID configuration register" bitfld.long 0x60 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x60 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x60 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x60 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x60 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x64 "RIFSC_RISC_PER12_SEMCR,RIFSC RISC slave peripheral 12 semaphore control register" rbitfld.long 0x64 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x64 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x68 "RIFSC_RISC_PER13_CIDCFGR,RIFSC RISC slave peripheral 13 CID configuration register" bitfld.long 0x68 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x68 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x68 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x68 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x68 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x6C "RIFSC_RISC_PER13_SEMCR,RIFSC RISC slave peripheral 13 semaphore control register" rbitfld.long 0x6C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x70 "RIFSC_RISC_PER14_CIDCFGR,RIFSC RISC slave peripheral 14 CID configuration register" bitfld.long 0x70 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x70 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x70 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x70 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x70 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x74 "RIFSC_RISC_PER14_SEMCR,RIFSC RISC slave peripheral 14 semaphore control register" rbitfld.long 0x74 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x74 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x78 "RIFSC_RISC_PER15_CIDCFGR,RIFSC RISC slave peripheral 15 CID configuration register" bitfld.long 0x78 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x78 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x78 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x78 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x78 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x7C "RIFSC_RISC_PER15_SEMCR,RIFSC RISC slave peripheral 15 semaphore control register" rbitfld.long 0x7C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x7C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x80 "RIFSC_RISC_PER16_CIDCFGR,RIFSC RISC slave peripheral 16 CID configuration register" bitfld.long 0x80 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x80 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x80 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x80 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x80 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x84 "RIFSC_RISC_PER16_SEMCR,RIFSC RISC slave peripheral 16 semaphore control register" rbitfld.long 0x84 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x84 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x88 "RIFSC_RISC_PER17_CIDCFGR,RIFSC RISC slave peripheral 17 CID configuration register" bitfld.long 0x88 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x88 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x88 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x88 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x88 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x8C "RIFSC_RISC_PER17_SEMCR,RIFSC RISC slave peripheral 17 semaphore control register" rbitfld.long 0x8C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x90 "RIFSC_RISC_PER18_CIDCFGR,RIFSC RISC slave peripheral 18 CID configuration register" bitfld.long 0x90 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x90 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x90 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x90 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x90 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x94 "RIFSC_RISC_PER18_SEMCR,RIFSC RISC slave peripheral 18 semaphore control register" rbitfld.long 0x94 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x94 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x98 "RIFSC_RISC_PER19_CIDCFGR,RIFSC RISC slave peripheral 19 CID configuration register" bitfld.long 0x98 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x98 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x98 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x98 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x98 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x9C "RIFSC_RISC_PER19_SEMCR,RIFSC RISC slave peripheral 19 semaphore control register" rbitfld.long 0x9C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x9C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xA0 "RIFSC_RISC_PER20_CIDCFGR,RIFSC RISC slave peripheral 20 CID configuration register" bitfld.long 0xA0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xA0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xA0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xA0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xA4 "RIFSC_RISC_PER20_SEMCR,RIFSC RISC slave peripheral 20 semaphore control register" rbitfld.long 0xA4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xA4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xA8 "RIFSC_RISC_PER21_CIDCFGR,RIFSC RISC slave peripheral 21 CID configuration register" bitfld.long 0xA8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xA8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xA8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xA8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xA8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xAC "RIFSC_RISC_PER21_SEMCR,RIFSC RISC slave peripheral 21 semaphore control register" rbitfld.long 0xAC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xAC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xB0 "RIFSC_RISC_PER22_CIDCFGR,RIFSC RISC slave peripheral 22 CID configuration register" bitfld.long 0xB0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xB0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xB0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xB0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xB4 "RIFSC_RISC_PER22_SEMCR,RIFSC RISC slave peripheral 22 semaphore control register" rbitfld.long 0xB4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xB4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xB8 "RIFSC_RISC_PER23_CIDCFGR,RIFSC RISC slave peripheral 23 CID configuration register" bitfld.long 0xB8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xB8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xB8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xB8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xB8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xBC "RIFSC_RISC_PER23_SEMCR,RIFSC RISC slave peripheral 23 semaphore control register" rbitfld.long 0xBC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xBC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xC0 "RIFSC_RISC_PER24_CIDCFGR,RIFSC RISC slave peripheral 24 CID configuration register" bitfld.long 0xC0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xC0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xC0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xC4 "RIFSC_RISC_PER24_SEMCR,RIFSC RISC slave peripheral 24 semaphore control register" rbitfld.long 0xC4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xC8 "RIFSC_RISC_PER25_CIDCFGR,RIFSC RISC slave peripheral 25 CID configuration register" bitfld.long 0xC8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xC8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xC8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xC8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xCC "RIFSC_RISC_PER25_SEMCR,RIFSC RISC slave peripheral 25 semaphore control register" rbitfld.long 0xCC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xCC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xD0 "RIFSC_RISC_PER26_CIDCFGR,RIFSC RISC slave peripheral 26 CID configuration register" bitfld.long 0xD0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xD0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xD0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xD0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xD4 "RIFSC_RISC_PER26_SEMCR,RIFSC RISC slave peripheral 26 semaphore control register" rbitfld.long 0xD4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xD4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xD8 "RIFSC_RISC_PER27_CIDCFGR,RIFSC RISC slave peripheral 27 CID configuration register" bitfld.long 0xD8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xD8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xD8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xD8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xD8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xDC "RIFSC_RISC_PER27_SEMCR,RIFSC RISC slave peripheral 27 semaphore control register" rbitfld.long 0xDC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xDC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xE0 "RIFSC_RISC_PER28_CIDCFGR,RIFSC RISC slave peripheral 28 CID configuration register" bitfld.long 0xE0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xE0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xE0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xE0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xE4 "RIFSC_RISC_PER28_SEMCR,RIFSC RISC slave peripheral 28 semaphore control register" rbitfld.long 0xE4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xE4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xE8 "RIFSC_RISC_PER29_CIDCFGR,RIFSC RISC slave peripheral 29 CID configuration register" bitfld.long 0xE8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xE8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xE8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xE8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xE8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xEC "RIFSC_RISC_PER29_SEMCR,RIFSC RISC slave peripheral 29 semaphore control register" rbitfld.long 0xEC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xEC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xF0 "RIFSC_RISC_PER30_CIDCFGR,RIFSC RISC slave peripheral 30 CID configuration register" bitfld.long 0xF0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xF0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xF0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xF0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xF4 "RIFSC_RISC_PER30_SEMCR,RIFSC RISC slave peripheral 30 semaphore control register" rbitfld.long 0xF4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xF4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0xF8 "RIFSC_RISC_PER31_CIDCFGR,RIFSC RISC slave peripheral 31 CID configuration register" bitfld.long 0xF8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0xF8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0xF8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0xF8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0xF8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0xFC "RIFSC_RISC_PER31_SEMCR,RIFSC RISC slave peripheral 31 semaphore control register" rbitfld.long 0xFC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0xFC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x100 "RIFSC_RISC_PER32_CIDCFGR,RIFSC RISC slave peripheral 32 CID configuration register" bitfld.long 0x100 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x100 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x100 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x100 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x100 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x104 "RIFSC_RISC_PER32_SEMCR,RIFSC RISC slave peripheral 32 semaphore control register" rbitfld.long 0x104 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x104 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x108 "RIFSC_RISC_PER33_CIDCFGR,RIFSC RISC slave peripheral 33 CID configuration register" bitfld.long 0x108 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x108 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x108 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x108 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x108 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x10C "RIFSC_RISC_PER33_SEMCR,RIFSC RISC slave peripheral 33 semaphore control register" rbitfld.long 0x10C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x110 "RIFSC_RISC_PER34_CIDCFGR,RIFSC RISC slave peripheral 34 CID configuration register" bitfld.long 0x110 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x110 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x110 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x110 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x110 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x114 "RIFSC_RISC_PER34_SEMCR,RIFSC RISC slave peripheral 34 semaphore control register" rbitfld.long 0x114 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x114 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x118 "RIFSC_RISC_PER35_CIDCFGR,RIFSC RISC slave peripheral 35 CID configuration register" bitfld.long 0x118 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x118 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x118 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x118 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x118 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x11C "RIFSC_RISC_PER35_SEMCR,RIFSC RISC slave peripheral 35 semaphore control register" rbitfld.long 0x11C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x11C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x120 "RIFSC_RISC_PER36_CIDCFGR,RIFSC RISC slave peripheral 36 CID configuration register" bitfld.long 0x120 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x120 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x120 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x120 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x120 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x124 "RIFSC_RISC_PER36_SEMCR,RIFSC RISC slave peripheral 36 semaphore control register" rbitfld.long 0x124 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x124 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x128 "RIFSC_RISC_PER37_CIDCFGR,RIFSC RISC slave peripheral 37 CID configuration register" bitfld.long 0x128 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x128 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x128 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x128 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x128 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x12C "RIFSC_RISC_PER37_SEMCR,RIFSC RISC slave peripheral 37 semaphore control register" rbitfld.long 0x12C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x12C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x130 "RIFSC_RISC_PER38_CIDCFGR,RIFSC RISC slave peripheral 38 CID configuration register" bitfld.long 0x130 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x130 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x130 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x130 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x130 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x134 "RIFSC_RISC_PER38_SEMCR,RIFSC RISC slave peripheral 38 semaphore control register" rbitfld.long 0x134 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x134 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x138 "RIFSC_RISC_PER39_CIDCFGR,RIFSC RISC slave peripheral 39 CID configuration register" bitfld.long 0x138 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x138 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x138 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x138 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x138 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x13C "RIFSC_RISC_PER39_SEMCR,RIFSC RISC slave peripheral 39 semaphore control register" rbitfld.long 0x13C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x13C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x140 "RIFSC_RISC_PER40_CIDCFGR,RIFSC RISC slave peripheral 40 CID configuration register" bitfld.long 0x140 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x140 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x140 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x140 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x140 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x144 "RIFSC_RISC_PER40_SEMCR,RIFSC RISC slave peripheral 40 semaphore control register" rbitfld.long 0x144 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x144 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x148 "RIFSC_RISC_PER41_CIDCFGR,RIFSC RISC slave peripheral 41 CID configuration register" bitfld.long 0x148 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x148 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x148 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x148 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x148 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x14C "RIFSC_RISC_PER41_SEMCR,RIFSC RISC slave peripheral 41 semaphore control register" rbitfld.long 0x14C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x150 "RIFSC_RISC_PER42_CIDCFGR,RIFSC RISC slave peripheral 42 CID configuration register" bitfld.long 0x150 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x150 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x150 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x150 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x150 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x154 "RIFSC_RISC_PER42_SEMCR,RIFSC RISC slave peripheral 42 semaphore control register" rbitfld.long 0x154 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x154 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x158 "RIFSC_RISC_PER43_CIDCFGR,RIFSC RISC slave peripheral 43 CID configuration register" bitfld.long 0x158 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x158 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x158 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x158 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x158 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x15C "RIFSC_RISC_PER43_SEMCR,RIFSC RISC slave peripheral 43 semaphore control register" rbitfld.long 0x15C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x15C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x160 "RIFSC_RISC_PER44_CIDCFGR,RIFSC RISC slave peripheral 44 CID configuration register" bitfld.long 0x160 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x160 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x160 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x160 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x160 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x164 "RIFSC_RISC_PER44_SEMCR,RIFSC RISC slave peripheral 44 semaphore control register" rbitfld.long 0x164 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x164 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x168 "RIFSC_RISC_PER45_CIDCFGR,RIFSC RISC slave peripheral 45 CID configuration register" bitfld.long 0x168 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x168 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x168 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x168 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x168 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x16C "RIFSC_RISC_PER45_SEMCR,RIFSC RISC slave peripheral 45 semaphore control register" rbitfld.long 0x16C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x16C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x170 "RIFSC_RISC_PER46_CIDCFGR,RIFSC RISC slave peripheral 46 CID configuration register" bitfld.long 0x170 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x170 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x170 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x170 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x170 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x174 "RIFSC_RISC_PER46_SEMCR,RIFSC RISC slave peripheral 46 semaphore control register" rbitfld.long 0x174 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x174 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x178 "RIFSC_RISC_PER47_CIDCFGR,RIFSC RISC slave peripheral 47 CID configuration register" bitfld.long 0x178 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x178 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x178 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x178 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x178 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x17C "RIFSC_RISC_PER47_SEMCR,RIFSC RISC slave peripheral 47 semaphore control register" rbitfld.long 0x17C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x17C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x180 "RIFSC_RISC_PER48_CIDCFGR,RIFSC RISC slave peripheral 48 CID configuration register" bitfld.long 0x180 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x180 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x180 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x180 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x180 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x184 "RIFSC_RISC_PER48_SEMCR,RIFSC RISC slave peripheral 48 semaphore control register" rbitfld.long 0x184 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x184 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x188 "RIFSC_RISC_PER49_CIDCFGR,RIFSC RISC slave peripheral 49 CID configuration register" bitfld.long 0x188 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x188 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x188 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x188 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x188 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x18C "RIFSC_RISC_PER49_SEMCR,RIFSC RISC slave peripheral 49 semaphore control register" rbitfld.long 0x18C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x190 "RIFSC_RISC_PER50_CIDCFGR,RIFSC RISC slave peripheral 50 CID configuration register" bitfld.long 0x190 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x190 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x190 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x190 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x190 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x194 "RIFSC_RISC_PER50_SEMCR,RIFSC RISC slave peripheral 50 semaphore control register" rbitfld.long 0x194 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x194 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x198 "RIFSC_RISC_PER51_CIDCFGR,RIFSC RISC slave peripheral 51 CID configuration register" bitfld.long 0x198 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x198 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x198 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x198 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x198 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x19C "RIFSC_RISC_PER51_SEMCR,RIFSC RISC slave peripheral 51 semaphore control register" rbitfld.long 0x19C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x19C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1A0 "RIFSC_RISC_PER52_CIDCFGR,RIFSC RISC slave peripheral 52 CID configuration register" bitfld.long 0x1A0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1A0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1A0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1A0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1A4 "RIFSC_RISC_PER52_SEMCR,RIFSC RISC slave peripheral 52 semaphore control register" rbitfld.long 0x1A4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1A4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1A8 "RIFSC_RISC_PER53_CIDCFGR,RIFSC RISC slave peripheral 53 CID configuration register" bitfld.long 0x1A8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1A8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1A8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1A8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1A8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1AC "RIFSC_RISC_PER53_SEMCR,RIFSC RISC slave peripheral 53 semaphore control register" rbitfld.long 0x1AC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1AC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1B0 "RIFSC_RISC_PER54_CIDCFGR,RIFSC RISC slave peripheral 54 CID configuration register" bitfld.long 0x1B0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1B0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1B0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1B0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1B4 "RIFSC_RISC_PER54_SEMCR,RIFSC RISC slave peripheral 54 semaphore control register" rbitfld.long 0x1B4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1B4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1B8 "RIFSC_RISC_PER55_CIDCFGR,RIFSC RISC slave peripheral 55 CID configuration register" bitfld.long 0x1B8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1B8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1B8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1B8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1B8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1BC "RIFSC_RISC_PER55_SEMCR,RIFSC RISC slave peripheral 55 semaphore control register" rbitfld.long 0x1BC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1BC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1C0 "RIFSC_RISC_PER56_CIDCFGR,RIFSC RISC slave peripheral 56 CID configuration register" bitfld.long 0x1C0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1C0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1C0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1C4 "RIFSC_RISC_PER56_SEMCR,RIFSC RISC slave peripheral 56 semaphore control register" rbitfld.long 0x1C4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1C8 "RIFSC_RISC_PER57_CIDCFGR,RIFSC RISC slave peripheral 57 CID configuration register" bitfld.long 0x1C8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1C8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1C8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1C8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1CC "RIFSC_RISC_PER57_SEMCR,RIFSC RISC slave peripheral 57 semaphore control register" rbitfld.long 0x1CC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1CC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1D0 "RIFSC_RISC_PER58_CIDCFGR,RIFSC RISC slave peripheral 58 CID configuration register" bitfld.long 0x1D0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1D0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1D0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1D0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1D4 "RIFSC_RISC_PER58_SEMCR,RIFSC RISC slave peripheral 58 semaphore control register" rbitfld.long 0x1D4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1D4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1D8 "RIFSC_RISC_PER59_CIDCFGR,RIFSC RISC slave peripheral 59 CID configuration register" bitfld.long 0x1D8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1D8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1D8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1D8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1D8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1DC "RIFSC_RISC_PER59_SEMCR,RIFSC RISC slave peripheral 59 semaphore control register" rbitfld.long 0x1DC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1DC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1E0 "RIFSC_RISC_PER60_CIDCFGR,RIFSC RISC slave peripheral 60 CID configuration register" bitfld.long 0x1E0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1E0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1E0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1E0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1E4 "RIFSC_RISC_PER60_SEMCR,RIFSC RISC slave peripheral 60 semaphore control register" rbitfld.long 0x1E4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1E4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1E8 "RIFSC_RISC_PER61_CIDCFGR,RIFSC RISC slave peripheral 61 CID configuration register" bitfld.long 0x1E8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1E8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1E8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1E8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1E8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1EC "RIFSC_RISC_PER61_SEMCR,RIFSC RISC slave peripheral 61 semaphore control register" rbitfld.long 0x1EC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1EC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1F0 "RIFSC_RISC_PER62_CIDCFGR,RIFSC RISC slave peripheral 62 CID configuration register" bitfld.long 0x1F0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1F0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1F0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1F0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1F4 "RIFSC_RISC_PER62_SEMCR,RIFSC RISC slave peripheral 62 semaphore control register" rbitfld.long 0x1F4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1F4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x1F8 "RIFSC_RISC_PER63_CIDCFGR,RIFSC RISC slave peripheral 63 CID configuration register" bitfld.long 0x1F8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x1F8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x1F8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1F8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x1F8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x1FC "RIFSC_RISC_PER63_SEMCR,RIFSC RISC slave peripheral 63 semaphore control register" rbitfld.long 0x1FC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1FC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x200 "RIFSC_RISC_PER64_CIDCFGR,RIFSC RISC slave peripheral 64 CID configuration register" bitfld.long 0x200 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x200 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x200 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x200 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x200 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x204 "RIFSC_RISC_PER64_SEMCR,RIFSC RISC slave peripheral 64 semaphore control register" rbitfld.long 0x204 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x204 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x208 "RIFSC_RISC_PER65_CIDCFGR,RIFSC RISC slave peripheral 65 CID configuration register" bitfld.long 0x208 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x208 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x208 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x208 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x208 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x20C "RIFSC_RISC_PER65_SEMCR,RIFSC RISC slave peripheral 65 semaphore control register" rbitfld.long 0x20C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x210 "RIFSC_RISC_PER66_CIDCFGR,RIFSC RISC slave peripheral 66 CID configuration register" bitfld.long 0x210 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x210 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x210 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x210 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x210 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x214 "RIFSC_RISC_PER66_SEMCR,RIFSC RISC slave peripheral 66 semaphore control register" rbitfld.long 0x214 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x214 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x218 "RIFSC_RISC_PER67_CIDCFGR,RIFSC RISC slave peripheral 67 CID configuration register" bitfld.long 0x218 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x218 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x218 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x218 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x218 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x21C "RIFSC_RISC_PER67_SEMCR,RIFSC RISC slave peripheral 67 semaphore control register" rbitfld.long 0x21C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x21C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x220 "RIFSC_RISC_PER68_CIDCFGR,RIFSC RISC slave peripheral 68 CID configuration register" bitfld.long 0x220 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x220 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x220 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x220 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x220 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x224 "RIFSC_RISC_PER68_SEMCR,RIFSC RISC slave peripheral 68 semaphore control register" rbitfld.long 0x224 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x224 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x228 "RIFSC_RISC_PER69_CIDCFGR,RIFSC RISC slave peripheral 69 CID configuration register" bitfld.long 0x228 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x228 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x228 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x228 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x228 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x22C "RIFSC_RISC_PER69_SEMCR,RIFSC RISC slave peripheral 69 semaphore control register" rbitfld.long 0x22C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x22C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x230 "RIFSC_RISC_PER70_CIDCFGR,RIFSC RISC slave peripheral 70 CID configuration register" bitfld.long 0x230 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x230 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x230 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x230 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x230 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x234 "RIFSC_RISC_PER70_SEMCR,RIFSC RISC slave peripheral 70 semaphore control register" rbitfld.long 0x234 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x234 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x238 "RIFSC_RISC_PER71_CIDCFGR,RIFSC RISC slave peripheral 71 CID configuration register" bitfld.long 0x238 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x238 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x238 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x238 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x238 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x23C "RIFSC_RISC_PER71_SEMCR,RIFSC RISC slave peripheral 71 semaphore control register" rbitfld.long 0x23C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x23C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x240 "RIFSC_RISC_PER72_CIDCFGR,RIFSC RISC slave peripheral 72 CID configuration register" bitfld.long 0x240 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x240 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x240 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x240 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x240 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x244 "RIFSC_RISC_PER72_SEMCR,RIFSC RISC slave peripheral 72 semaphore control register" rbitfld.long 0x244 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x244 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x248 "RIFSC_RISC_PER73_CIDCFGR,RIFSC RISC slave peripheral 73 CID configuration register" bitfld.long 0x248 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x248 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x248 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x248 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x248 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x24C "RIFSC_RISC_PER73_SEMCR,RIFSC RISC slave peripheral 73 semaphore control register" rbitfld.long 0x24C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x250 "RIFSC_RISC_PER74_CIDCFGR,RIFSC RISC slave peripheral 74 CID configuration register" bitfld.long 0x250 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x250 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x250 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x250 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x250 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x254 "RIFSC_RISC_PER74_SEMCR,RIFSC RISC slave peripheral 74 semaphore control register" rbitfld.long 0x254 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x254 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x258 "RIFSC_RISC_PER75_CIDCFGR,RIFSC RISC slave peripheral 75 CID configuration register" bitfld.long 0x258 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x258 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x258 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x258 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x258 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x25C "RIFSC_RISC_PER75_SEMCR,RIFSC RISC slave peripheral 75 semaphore control register" rbitfld.long 0x25C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x25C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x260 "RIFSC_RISC_PER76_CIDCFGR,RIFSC RISC slave peripheral 76 CID configuration register" bitfld.long 0x260 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x260 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x260 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x260 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x260 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x264 "RIFSC_RISC_PER76_SEMCR,RIFSC RISC slave peripheral 76 semaphore control register" rbitfld.long 0x264 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x264 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x268 "RIFSC_RISC_PER77_CIDCFGR,RIFSC RISC slave peripheral 77 CID configuration register" bitfld.long 0x268 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x268 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x268 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x268 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x268 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x26C "RIFSC_RISC_PER77_SEMCR,RIFSC RISC slave peripheral 77 semaphore control register" rbitfld.long 0x26C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x26C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x270 "RIFSC_RISC_PER78_CIDCFGR,RIFSC RISC slave peripheral 78 CID configuration register" bitfld.long 0x270 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x270 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x270 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x270 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x270 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x274 "RIFSC_RISC_PER78_SEMCR,RIFSC RISC slave peripheral 78 semaphore control register" rbitfld.long 0x274 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x274 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x278 "RIFSC_RISC_PER79_CIDCFGR,RIFSC RISC slave peripheral 79 CID configuration register" bitfld.long 0x278 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x278 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x278 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x278 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x278 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x27C "RIFSC_RISC_PER79_SEMCR,RIFSC RISC slave peripheral 79 semaphore control register" rbitfld.long 0x27C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x27C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x280 "RIFSC_RISC_PER80_CIDCFGR,RIFSC RISC slave peripheral 80 CID configuration register" bitfld.long 0x280 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x280 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x280 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x280 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x280 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x284 "RIFSC_RISC_PER80_SEMCR,RIFSC RISC slave peripheral 80 semaphore control register" rbitfld.long 0x284 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x284 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x288 "RIFSC_RISC_PER81_CIDCFGR,RIFSC RISC slave peripheral 81 CID configuration register" bitfld.long 0x288 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x288 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x288 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x288 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x288 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x28C "RIFSC_RISC_PER81_SEMCR,RIFSC RISC slave peripheral 81 semaphore control register" rbitfld.long 0x28C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x290 "RIFSC_RISC_PER82_CIDCFGR,RIFSC RISC slave peripheral 82 CID configuration register" bitfld.long 0x290 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x290 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x290 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x290 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x290 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x294 "RIFSC_RISC_PER82_SEMCR,RIFSC RISC slave peripheral 82 semaphore control register" rbitfld.long 0x294 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x294 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x298 "RIFSC_RISC_PER83_CIDCFGR,RIFSC RISC slave peripheral 83 CID configuration register" bitfld.long 0x298 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x298 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x298 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x298 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x298 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x29C "RIFSC_RISC_PER83_SEMCR,RIFSC RISC slave peripheral 83 semaphore control register" rbitfld.long 0x29C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x29C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2A0 "RIFSC_RISC_PER84_CIDCFGR,RIFSC RISC slave peripheral 84 CID configuration register" bitfld.long 0x2A0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2A0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2A0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2A0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2A4 "RIFSC_RISC_PER84_SEMCR,RIFSC RISC slave peripheral 84 semaphore control register" rbitfld.long 0x2A4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2A4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2A8 "RIFSC_RISC_PER85_CIDCFGR,RIFSC RISC slave peripheral 85 CID configuration register" bitfld.long 0x2A8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2A8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2A8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2A8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2A8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2AC "RIFSC_RISC_PER85_SEMCR,RIFSC RISC slave peripheral 85 semaphore control register" rbitfld.long 0x2AC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2AC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2B0 "RIFSC_RISC_PER86_CIDCFGR,RIFSC RISC slave peripheral 86 CID configuration register" bitfld.long 0x2B0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2B0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2B0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2B0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2B4 "RIFSC_RISC_PER86_SEMCR,RIFSC RISC slave peripheral 86 semaphore control register" rbitfld.long 0x2B4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2B4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2B8 "RIFSC_RISC_PER87_CIDCFGR,RIFSC RISC slave peripheral 87 CID configuration register" bitfld.long 0x2B8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2B8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2B8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2B8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2B8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2BC "RIFSC_RISC_PER87_SEMCR,RIFSC RISC slave peripheral 87 semaphore control register" rbitfld.long 0x2BC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2BC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2C0 "RIFSC_RISC_PER88_CIDCFGR,RIFSC RISC slave peripheral 88 CID configuration register" bitfld.long 0x2C0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2C0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2C0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2C4 "RIFSC_RISC_PER88_SEMCR,RIFSC RISC slave peripheral 88 semaphore control register" rbitfld.long 0x2C4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2C8 "RIFSC_RISC_PER89_CIDCFGR,RIFSC RISC slave peripheral 89 CID configuration register" bitfld.long 0x2C8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2C8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2C8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2C8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2CC "RIFSC_RISC_PER89_SEMCR,RIFSC RISC slave peripheral 89 semaphore control register" rbitfld.long 0x2CC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2CC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2D0 "RIFSC_RISC_PER90_CIDCFGR,RIFSC RISC slave peripheral 90 CID configuration register" bitfld.long 0x2D0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2D0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2D0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2D0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2D4 "RIFSC_RISC_PER90_SEMCR,RIFSC RISC slave peripheral 90 semaphore control register" rbitfld.long 0x2D4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2D4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2D8 "RIFSC_RISC_PER91_CIDCFGR,RIFSC RISC slave peripheral 91 CID configuration register" bitfld.long 0x2D8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2D8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2D8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2D8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2D8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2DC "RIFSC_RISC_PER91_SEMCR,RIFSC RISC slave peripheral 91 semaphore control register" rbitfld.long 0x2DC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2DC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2E0 "RIFSC_RISC_PER92_CIDCFGR,RIFSC RISC slave peripheral 92 CID configuration register" bitfld.long 0x2E0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2E0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2E0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2E0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2E4 "RIFSC_RISC_PER92_SEMCR,RIFSC RISC slave peripheral 92 semaphore control register" rbitfld.long 0x2E4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2E4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2E8 "RIFSC_RISC_PER93_CIDCFGR,RIFSC RISC slave peripheral 93 CID configuration register" bitfld.long 0x2E8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2E8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2E8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2E8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2E8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2EC "RIFSC_RISC_PER93_SEMCR,RIFSC RISC slave peripheral 93 semaphore control register" rbitfld.long 0x2EC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2EC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2F0 "RIFSC_RISC_PER94_CIDCFGR,RIFSC RISC slave peripheral 94 CID configuration register" bitfld.long 0x2F0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2F0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2F0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2F0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2F4 "RIFSC_RISC_PER94_SEMCR,RIFSC RISC slave peripheral 94 semaphore control register" rbitfld.long 0x2F4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2F4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x2F8 "RIFSC_RISC_PER95_CIDCFGR,RIFSC RISC slave peripheral 95 CID configuration register" bitfld.long 0x2F8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x2F8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x2F8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2F8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x2F8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x2FC "RIFSC_RISC_PER95_SEMCR,RIFSC RISC slave peripheral 95 semaphore control register" rbitfld.long 0x2FC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2FC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x300 "RIFSC_RISC_PER96_CIDCFGR,RIFSC RISC slave peripheral 96 CID configuration register" bitfld.long 0x300 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x300 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x300 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x300 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x300 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x304 "RIFSC_RISC_PER96_SEMCR,RIFSC RISC slave peripheral 96 semaphore control register" rbitfld.long 0x304 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x304 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x308 "RIFSC_RISC_PER97_CIDCFGR,RIFSC RISC slave peripheral 97 CID configuration register" bitfld.long 0x308 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x308 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x308 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x308 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x308 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x30C "RIFSC_RISC_PER97_SEMCR,RIFSC RISC slave peripheral 97 semaphore control register" rbitfld.long 0x30C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x310 "RIFSC_RISC_PER98_CIDCFGR,RIFSC RISC slave peripheral 98 CID configuration register" bitfld.long 0x310 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x310 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x310 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x310 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x310 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x314 "RIFSC_RISC_PER98_SEMCR,RIFSC RISC slave peripheral 98 semaphore control register" rbitfld.long 0x314 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x314 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x318 "RIFSC_RISC_PER99_CIDCFGR,RIFSC RISC slave peripheral 99 CID configuration register" bitfld.long 0x318 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x318 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x318 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x318 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x318 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x31C "RIFSC_RISC_PER99_SEMCR,RIFSC RISC slave peripheral 99 semaphore control register" rbitfld.long 0x31C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x31C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x320 "RIFSC_RISC_PER100_CIDCFGR,RIFSC RISC slave peripheral 100 CID configuration register" bitfld.long 0x320 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x320 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x320 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x320 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x320 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x324 "RIFSC_RISC_PER100_SEMCR,RIFSC RISC slave peripheral 100 semaphore control register" rbitfld.long 0x324 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x324 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x328 "RIFSC_RISC_PER101_CIDCFGR,RIFSC RISC slave peripheral 101 CID configuration register" bitfld.long 0x328 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x328 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x328 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x328 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x328 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x32C "RIFSC_RISC_PER101_SEMCR,RIFSC RISC slave peripheral 101 semaphore control register" rbitfld.long 0x32C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x32C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x330 "RIFSC_RISC_PER102_CIDCFGR,RIFSC RISC slave peripheral 102 CID configuration register" bitfld.long 0x330 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x330 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x330 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x330 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x330 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x334 "RIFSC_RISC_PER102_SEMCR,RIFSC RISC slave peripheral 102 semaphore control register" rbitfld.long 0x334 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x334 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x338 "RIFSC_RISC_PER103_CIDCFGR,RIFSC RISC slave peripheral 103 CID configuration register" bitfld.long 0x338 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x338 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x338 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x338 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x338 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x33C "RIFSC_RISC_PER103_SEMCR,RIFSC RISC slave peripheral 103 semaphore control register" rbitfld.long 0x33C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x33C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x340 "RIFSC_RISC_PER104_CIDCFGR,RIFSC RISC slave peripheral 104 CID configuration register" bitfld.long 0x340 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x340 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x340 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x340 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x340 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x344 "RIFSC_RISC_PER104_SEMCR,RIFSC RISC slave peripheral 104 semaphore control register" rbitfld.long 0x344 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x344 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x348 "RIFSC_RISC_PER105_CIDCFGR,RIFSC RISC slave peripheral 105 CID configuration register" bitfld.long 0x348 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x348 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x348 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x348 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x348 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x34C "RIFSC_RISC_PER105_SEMCR,RIFSC RISC slave peripheral 105 semaphore control register" rbitfld.long 0x34C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x350 "RIFSC_RISC_PER106_CIDCFGR,RIFSC RISC slave peripheral 106 CID configuration register" bitfld.long 0x350 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x350 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x350 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x350 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x350 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x354 "RIFSC_RISC_PER106_SEMCR,RIFSC RISC slave peripheral 106 semaphore control register" rbitfld.long 0x354 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x354 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x358 "RIFSC_RISC_PER107_CIDCFGR,RIFSC RISC slave peripheral 107 CID configuration register" bitfld.long 0x358 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x358 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x358 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x358 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x358 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x35C "RIFSC_RISC_PER107_SEMCR,RIFSC RISC slave peripheral 107 semaphore control register" rbitfld.long 0x35C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x35C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x360 "RIFSC_RISC_PER108_CIDCFGR,RIFSC RISC slave peripheral 108 CID configuration register" bitfld.long 0x360 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x360 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x360 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x360 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x360 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x364 "RIFSC_RISC_PER108_SEMCR,RIFSC RISC slave peripheral 108 semaphore control register" rbitfld.long 0x364 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x364 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x368 "RIFSC_RISC_PER109_CIDCFGR,RIFSC RISC slave peripheral 109 CID configuration register" bitfld.long 0x368 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x368 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x368 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x368 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x368 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x36C "RIFSC_RISC_PER109_SEMCR,RIFSC RISC slave peripheral 109 semaphore control register" rbitfld.long 0x36C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x36C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x370 "RIFSC_RISC_PER110_CIDCFGR,RIFSC RISC slave peripheral 110 CID configuration register" bitfld.long 0x370 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x370 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x370 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x370 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x370 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x374 "RIFSC_RISC_PER110_SEMCR,RIFSC RISC slave peripheral 110 semaphore control register" rbitfld.long 0x374 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x374 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x378 "RIFSC_RISC_PER111_CIDCFGR,RIFSC RISC slave peripheral 111 CID configuration register" bitfld.long 0x378 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x378 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x378 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x378 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x378 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x37C "RIFSC_RISC_PER111_SEMCR,RIFSC RISC slave peripheral 111 semaphore control register" rbitfld.long 0x37C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x37C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x380 "RIFSC_RISC_PER112_CIDCFGR,RIFSC RISC slave peripheral 112 CID configuration register" bitfld.long 0x380 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x380 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x380 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x380 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x380 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x384 "RIFSC_RISC_PER112_SEMCR,RIFSC RISC slave peripheral 112 semaphore control register" rbitfld.long 0x384 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x384 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x388 "RIFSC_RISC_PER113_CIDCFGR,RIFSC RISC slave peripheral 113 CID configuration register" bitfld.long 0x388 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x388 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x388 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x388 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x388 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x38C "RIFSC_RISC_PER113_SEMCR,RIFSC RISC slave peripheral 113 semaphore control register" rbitfld.long 0x38C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x390 "RIFSC_RISC_PER114_CIDCFGR,RIFSC RISC slave peripheral 114 CID configuration register" bitfld.long 0x390 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x390 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x390 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x390 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x390 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x394 "RIFSC_RISC_PER114_SEMCR,RIFSC RISC slave peripheral 114 semaphore control register" rbitfld.long 0x394 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x394 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x398 "RIFSC_RISC_PER115_CIDCFGR,RIFSC RISC slave peripheral 115 CID configuration register" bitfld.long 0x398 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x398 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x398 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x398 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x398 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x39C "RIFSC_RISC_PER115_SEMCR,RIFSC RISC slave peripheral 115 semaphore control register" rbitfld.long 0x39C 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x39C 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3A0 "RIFSC_RISC_PER116_CIDCFGR,RIFSC RISC slave peripheral 116 CID configuration register" bitfld.long 0x3A0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3A0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3A0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3A0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3A4 "RIFSC_RISC_PER116_SEMCR,RIFSC RISC slave peripheral 116 semaphore control register" rbitfld.long 0x3A4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3A4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3A8 "RIFSC_RISC_PER117_CIDCFGR,RIFSC RISC slave peripheral 117 CID configuration register" bitfld.long 0x3A8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3A8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3A8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3A8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3A8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3AC "RIFSC_RISC_PER117_SEMCR,RIFSC RISC slave peripheral 117 semaphore control register" rbitfld.long 0x3AC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3AC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3B0 "RIFSC_RISC_PER118_CIDCFGR,RIFSC RISC slave peripheral 118 CID configuration register" bitfld.long 0x3B0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3B0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3B0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3B0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3B4 "RIFSC_RISC_PER118_SEMCR,RIFSC RISC slave peripheral 118 semaphore control register" rbitfld.long 0x3B4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3B4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3B8 "RIFSC_RISC_PER119_CIDCFGR,RIFSC RISC slave peripheral 119 CID configuration register" bitfld.long 0x3B8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3B8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3B8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3B8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3B8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3BC "RIFSC_RISC_PER119_SEMCR,RIFSC RISC slave peripheral 119 semaphore control register" rbitfld.long 0x3BC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3BC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3C0 "RIFSC_RISC_PER120_CIDCFGR,RIFSC RISC slave peripheral 120 CID configuration register" bitfld.long 0x3C0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3C0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3C0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3C4 "RIFSC_RISC_PER120_SEMCR,RIFSC RISC slave peripheral 120 semaphore control register" rbitfld.long 0x3C4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3C8 "RIFSC_RISC_PER121_CIDCFGR,RIFSC RISC slave peripheral 121 CID configuration register" bitfld.long 0x3C8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3C8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3C8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3C8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3CC "RIFSC_RISC_PER121_SEMCR,RIFSC RISC slave peripheral 121 semaphore control register" rbitfld.long 0x3CC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3CC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3D0 "RIFSC_RISC_PER122_CIDCFGR,RIFSC RISC slave peripheral 122 CID configuration register" bitfld.long 0x3D0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3D0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3D0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3D0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3D4 "RIFSC_RISC_PER122_SEMCR,RIFSC RISC slave peripheral 122 semaphore control register" rbitfld.long 0x3D4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3D4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3D8 "RIFSC_RISC_PER123_CIDCFGR,RIFSC RISC slave peripheral 123 CID configuration register" bitfld.long 0x3D8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3D8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3D8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3D8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3D8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3DC "RIFSC_RISC_PER123_SEMCR,RIFSC RISC slave peripheral 123 semaphore control register" rbitfld.long 0x3DC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3DC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3E0 "RIFSC_RISC_PER124_CIDCFGR,RIFSC RISC slave peripheral 124 CID configuration register" bitfld.long 0x3E0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3E0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3E0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3E0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3E4 "RIFSC_RISC_PER124_SEMCR,RIFSC RISC slave peripheral 124 semaphore control register" rbitfld.long 0x3E4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3E4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3E8 "RIFSC_RISC_PER125_CIDCFGR,RIFSC RISC slave peripheral 125 CID configuration register" bitfld.long 0x3E8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3E8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3E8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3E8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3E8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3EC "RIFSC_RISC_PER125_SEMCR,RIFSC RISC slave peripheral 125 semaphore control register" rbitfld.long 0x3EC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3EC 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3F0 "RIFSC_RISC_PER126_CIDCFGR,RIFSC RISC slave peripheral 126 CID configuration register" bitfld.long 0x3F0 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3F0 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F0 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3F0 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3F0 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3F4 "RIFSC_RISC_PER126_SEMCR,RIFSC RISC slave peripheral 126 semaphore control register" rbitfld.long 0x3F4 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3F4 0. "SEM_MUTEX,Semaphore mutex" "0,1" line.long 0x3F8 "RIFSC_RISC_PER127_CIDCFGR,RIFSC RISC slave peripheral 127 CID configuration register" bitfld.long 0x3F8 23. "SEMWLC7,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 22. "SEMWLC6,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 21. "SEMWLC5,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 20. "SEMWLC4,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 19. "SEMWLC3,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 18. "SEMWLC2,Semaphore white list for compartment i" "B_0x0,B_0x1" newline bitfld.long 0x3F8 17. "SEMWLC1,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 16. "SEMWLC0,Semaphore white list for compartment i" "B_0x0,B_0x1" bitfld.long 0x3F8 4.--6. "SCID,Static CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3F8 1. "SEM_EN,Semaphore enable" "B_0x0,B_0x1" bitfld.long 0x3F8 0. "CFEN,CID filtering enable" "B_0x0,B_0x1" line.long 0x3FC "RIFSC_RISC_PER127_SEMCR,RIFSC RISC slave peripheral 127 semaphore control register" rbitfld.long 0x3FC 4.--6. "SEMCID,Semaphore current CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3FC 0. "SEM_MUTEX,Semaphore mutex" "0,1" group.long 0x900++0x3 line.long 0x0 "RIFSC_RISC_REG1_ACFGR,RIFSC RISAL memory region 1 subregion z configuration register" bitfld.long 0x0 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "RLOCK,Resource lock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SREN,Subregion enable" "B_0x0,B_0x1" group.long 0x908++0x3 line.long 0x0 "RIFSC_RISC_REG1_BCFGR,RIFSC RISAL memory region 1 subregion z configuration register" bitfld.long 0x0 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "RLOCK,Resource lock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SREN,Subregion enable" "B_0x0,B_0x1" group.long 0x910++0x3 line.long 0x0 "RIFSC_RISC_REG2_ACFGR,RIFSC RISAL memory region 2 subregion z configuration register" bitfld.long 0x0 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "RLOCK,Resource lock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SREN,Subregion enable" "B_0x0,B_0x1" group.long 0x918++0x3 line.long 0x0 "RIFSC_RISC_REG2_BCFGR,RIFSC RISAL memory region 2 subregion z configuration register" bitfld.long 0x0 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "RLOCK,Resource lock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SREN,Subregion enable" "B_0x0,B_0x1" group.long 0x920++0x3 line.long 0x0 "RIFSC_RISC_REG3_ACFGR,RIFSC RISAL memory region 3 subregion z configuration register" bitfld.long 0x0 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "RLOCK,Resource lock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SREN,Subregion enable" "B_0x0,B_0x1" group.long 0x928++0x3 line.long 0x0 "RIFSC_RISC_REG3_BCFGR,RIFSC RISAL memory region 3 subregion z configuration register" bitfld.long 0x0 9. "PRIV,Privileged subregion" "B_0x0,B_0x1" bitfld.long 0x0 8. "SEC,Secure subregion" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "SRCID,Subregion CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "RLOCK,Resource lock" "B_0x0,B_0x1" bitfld.long 0x0 0. "SREN,Subregion enable" "B_0x0,B_0x1" group.long 0xC00++0x3 line.long 0x0 "RIFSC_RIMC_CR,RIFSC RIMC master configuration register" rbitfld.long 0x0 15. "DDEN,Debug domain enable" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "DAPCID,Debug access port compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 4.--6. "TDCID,Trusted domain compartment ID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "WUCDONE,Wake-up CPU done" "B_0x0,B_0x1" bitfld.long 0x0 0. "GLOCK,Global lock" "B_0x0,B_0x1" rgroup.long 0xC04++0x3 line.long 0x0 "RIFSC_RIMC_SR,RIFSC RIMC master status register" bitfld.long 0x0 1. "WUCEN,Wake-up CPU enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "GDPEN,Global debug profile enable" "B_0x0,B_0x1" group.long 0xC10++0x3F line.long 0x0 "RIFSC_RIMC_ATTR0,RIFSC RIMC master attribute register 0" bitfld.long 0x0 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x0 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x4 "RIFSC_RIMC_ATTR1,RIFSC RIMC master attribute register 1" bitfld.long 0x4 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x4 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x8 "RIFSC_RIMC_ATTR2,RIFSC RIMC master attribute register 2" bitfld.long 0x8 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x8 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x8 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0xC "RIFSC_RIMC_ATTR3,RIFSC RIMC master attribute register 3" bitfld.long 0xC 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0xC 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0xC 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0xC 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x10 "RIFSC_RIMC_ATTR4,RIFSC RIMC master attribute register 4" bitfld.long 0x10 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x10 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x10 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x10 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x14 "RIFSC_RIMC_ATTR5,RIFSC RIMC master attribute register 5" bitfld.long 0x14 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x14 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x14 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x14 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x18 "RIFSC_RIMC_ATTR6,RIFSC RIMC master attribute register 6" bitfld.long 0x18 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x18 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x18 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x18 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x1C "RIFSC_RIMC_ATTR7,RIFSC RIMC master attribute register 7" bitfld.long 0x1C 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x1C 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x1C 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x20 "RIFSC_RIMC_ATTR8,RIFSC RIMC master attribute register 8" bitfld.long 0x20 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x20 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x20 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x20 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x24 "RIFSC_RIMC_ATTR9,RIFSC RIMC master attribute register 9" bitfld.long 0x24 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x24 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x24 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x24 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x28 "RIFSC_RIMC_ATTR10,RIFSC RIMC master attribute register 10" bitfld.long 0x28 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x28 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x28 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x28 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x2C "RIFSC_RIMC_ATTR11,RIFSC RIMC master attribute register 11" bitfld.long 0x2C 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x2C 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x2C 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x30 "RIFSC_RIMC_ATTR12,RIFSC RIMC master attribute register 12" bitfld.long 0x30 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x30 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x30 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x30 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x34 "RIFSC_RIMC_ATTR13,RIFSC RIMC master attribute register 13" bitfld.long 0x34 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x34 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x34 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x34 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x38 "RIFSC_RIMC_ATTR14,RIFSC RIMC master attribute register 14" bitfld.long 0x38 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x38 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x38 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x38 2. "CIDSEL,CID selection" "B_0x0,B_0x1" line.long 0x3C "RIFSC_RIMC_ATTR15,RIFSC RIMC master attribute register 15" bitfld.long 0x3C 9. "MPRIV,Master privileged" "B_0x0,B_0x1" bitfld.long 0x3C 8. "MSEC,Master secure" "B_0x0,B_0x1" bitfld.long 0x3C 4.--6. "MCID,Master CID" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 2. "CIDSEL,CID selection" "B_0x0,B_0x1" rgroup.long 0xFB0++0xF line.long 0x0 "RIFSC_PPSR0,RIFSC peripheral protection status register 0" bitfld.long 0x0 31. "PPEN31,Peripheral protection enable 31" "B_0x0,B_0x1" bitfld.long 0x0 30. "PPEN30,Peripheral protection enable 30" "B_0x0,B_0x1" bitfld.long 0x0 29. "PPEN29,Peripheral protection enable 29" "B_0x0,B_0x1" bitfld.long 0x0 28. "PPEN28,Peripheral protection enable 28" "B_0x0,B_0x1" bitfld.long 0x0 27. "PPEN27,Peripheral protection enable 27" "B_0x0,B_0x1" bitfld.long 0x0 26. "PPEN26,Peripheral protection enable 26" "B_0x0,B_0x1" newline bitfld.long 0x0 25. "PPEN25,Peripheral protection enable 25" "B_0x0,B_0x1" bitfld.long 0x0 24. "PPEN24,Peripheral protection enable 24" "B_0x0,B_0x1" bitfld.long 0x0 23. "PPEN23,Peripheral protection enable 23" "B_0x0,B_0x1" bitfld.long 0x0 22. "PPEN22,Peripheral protection enable 22" "B_0x0,B_0x1" bitfld.long 0x0 21. "PPEN21,Peripheral protection enable 21" "B_0x0,B_0x1" bitfld.long 0x0 20. "PPEN20,Peripheral protection enable 20" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "PPEN19,Peripheral protection enable 19" "B_0x0,B_0x1" bitfld.long 0x0 18. "PPEN18,Peripheral protection enable 18" "B_0x0,B_0x1" bitfld.long 0x0 17. "PPEN17,Peripheral protection enable 17" "B_0x0,B_0x1" bitfld.long 0x0 16. "PPEN16,Peripheral protection enable 16" "B_0x0,B_0x1" bitfld.long 0x0 15. "PPEN15,Peripheral protection enable 15" "B_0x0,B_0x1" bitfld.long 0x0 14. "PPEN14,Peripheral protection enable 14" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "PPEN13,Peripheral protection enable 13" "B_0x0,B_0x1" bitfld.long 0x0 12. "PPEN12,Peripheral protection enable 12" "B_0x0,B_0x1" bitfld.long 0x0 11. "PPEN11,Peripheral protection enable 11" "B_0x0,B_0x1" bitfld.long 0x0 10. "PPEN10,Peripheral protection enable 10" "B_0x0,B_0x1" bitfld.long 0x0 9. "PPEN9,Peripheral protection enable 9" "B_0x0,B_0x1" bitfld.long 0x0 8. "PPEN8,Peripheral protection enable 8" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "PPEN7,Peripheral protection enable 7" "B_0x0,B_0x1" bitfld.long 0x0 6. "PPEN6,Peripheral protection enable 6" "B_0x0,B_0x1" bitfld.long 0x0 5. "PPEN5,Peripheral protection enable 5" "B_0x0,B_0x1" bitfld.long 0x0 4. "PPEN4,Peripheral protection enable 4" "B_0x0,B_0x1" bitfld.long 0x0 3. "PPEN3,Peripheral protection enable 3" "B_0x0,B_0x1" bitfld.long 0x0 2. "PPEN2,Peripheral protection enable 2" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "PPEN1,Peripheral protection enable 1" "B_0x0,B_0x1" bitfld.long 0x0 0. "PPEN0,Peripheral protection enable 0" "B_0x0,B_0x1" line.long 0x4 "RIFSC_PPSR1,RIFSC peripheral protection status register 1" bitfld.long 0x4 31. "PPEN63,Peripheral protection enable 63" "B_0x0,B_0x1" bitfld.long 0x4 30. "PPEN62,Peripheral protection enable 62" "B_0x0,B_0x1" bitfld.long 0x4 29. "PPEN61,Peripheral protection enable 61" "B_0x0,B_0x1" bitfld.long 0x4 28. "PPEN60,Peripheral protection enable 60" "B_0x0,B_0x1" bitfld.long 0x4 27. "PPEN59,Peripheral protection enable 59" "B_0x0,B_0x1" bitfld.long 0x4 26. "PPEN58,Peripheral protection enable 58" "B_0x0,B_0x1" newline bitfld.long 0x4 25. "PPEN57,Peripheral protection enable 57" "B_0x0,B_0x1" bitfld.long 0x4 24. "PPEN56,Peripheral protection enable 56" "B_0x0,B_0x1" bitfld.long 0x4 23. "PPEN55,Peripheral protection enable 55" "B_0x0,B_0x1" bitfld.long 0x4 22. "PPEN54,Peripheral protection enable 54" "B_0x0,B_0x1" bitfld.long 0x4 21. "PPEN53,Peripheral protection enable 53" "B_0x0,B_0x1" bitfld.long 0x4 20. "PPEN52,Peripheral protection enable 52" "B_0x0,B_0x1" newline bitfld.long 0x4 19. "PPEN51,Peripheral protection enable 51" "B_0x0,B_0x1" bitfld.long 0x4 18. "PPEN50,Peripheral protection enable 50" "B_0x0,B_0x1" bitfld.long 0x4 17. "PPEN49,Peripheral protection enable 49" "B_0x0,B_0x1" bitfld.long 0x4 16. "PPEN48,Peripheral protection enable 48" "B_0x0,B_0x1" bitfld.long 0x4 15. "PPEN47,Peripheral protection enable 47" "B_0x0,B_0x1" bitfld.long 0x4 14. "PPEN46,Peripheral protection enable 46" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "PPEN45,Peripheral protection enable 45" "B_0x0,B_0x1" bitfld.long 0x4 12. "PPEN44,Peripheral protection enable 44" "B_0x0,B_0x1" bitfld.long 0x4 11. "PPEN43,Peripheral protection enable 43" "B_0x0,B_0x1" bitfld.long 0x4 10. "PPEN42,Peripheral protection enable 42" "B_0x0,B_0x1" bitfld.long 0x4 9. "PPEN41,Peripheral protection enable 41" "B_0x0,B_0x1" bitfld.long 0x4 8. "PPEN40,Peripheral protection enable 40" "B_0x0,B_0x1" newline bitfld.long 0x4 7. "PPEN39,Peripheral protection enable 39" "B_0x0,B_0x1" bitfld.long 0x4 6. "PPEN38,Peripheral protection enable 38" "B_0x0,B_0x1" bitfld.long 0x4 5. "PPEN37,Peripheral protection enable 37" "B_0x0,B_0x1" bitfld.long 0x4 4. "PPEN36,Peripheral protection enable 36" "B_0x0,B_0x1" bitfld.long 0x4 3. "PPEN35,Peripheral protection enable 35" "B_0x0,B_0x1" bitfld.long 0x4 2. "PPEN34,Peripheral protection enable 34" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "PPEN33,Peripheral protection enable 33" "B_0x0,B_0x1" bitfld.long 0x4 0. "PPEN32,Peripheral protection enable 32" "B_0x0,B_0x1" line.long 0x8 "RIFSC_PPSR2,RIFSC peripheral protection status register 2" bitfld.long 0x8 31. "PPEN95,Peripheral protection enable 95" "B_0x0,B_0x1" bitfld.long 0x8 30. "PPEN94,Peripheral protection enable 94" "B_0x0,B_0x1" bitfld.long 0x8 29. "PPEN93,Peripheral protection enable 93" "B_0x0,B_0x1" bitfld.long 0x8 28. "PPEN92,Peripheral protection enable 92" "B_0x0,B_0x1" bitfld.long 0x8 27. "PPEN91,Peripheral protection enable 91" "B_0x0,B_0x1" bitfld.long 0x8 26. "PPEN90,Peripheral protection enable 90" "B_0x0,B_0x1" newline bitfld.long 0x8 25. "PPEN89,Peripheral protection enable 89" "B_0x0,B_0x1" bitfld.long 0x8 24. "PPEN88,Peripheral protection enable 88" "B_0x0,B_0x1" bitfld.long 0x8 23. "PPEN87,Peripheral protection enable 87" "B_0x0,B_0x1" bitfld.long 0x8 22. "PPEN86,Peripheral protection enable 86" "B_0x0,B_0x1" bitfld.long 0x8 21. "PPEN85,Peripheral protection enable 85" "B_0x0,B_0x1" bitfld.long 0x8 20. "PPEN84,Peripheral protection enable 84" "B_0x0,B_0x1" newline bitfld.long 0x8 19. "PPEN83,Peripheral protection enable 83" "B_0x0,B_0x1" bitfld.long 0x8 18. "PPEN82,Peripheral protection enable 82" "B_0x0,B_0x1" bitfld.long 0x8 17. "PPEN81,Peripheral protection enable 81" "B_0x0,B_0x1" bitfld.long 0x8 16. "PPEN80,Peripheral protection enable 80" "B_0x0,B_0x1" bitfld.long 0x8 15. "PPEN79,Peripheral protection enable 79" "B_0x0,B_0x1" bitfld.long 0x8 14. "PPEN78,Peripheral protection enable 78" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "PPEN77,Peripheral protection enable 77" "B_0x0,B_0x1" bitfld.long 0x8 12. "PPEN76,Peripheral protection enable 76" "B_0x0,B_0x1" bitfld.long 0x8 11. "PPEN75,Peripheral protection enable 75" "B_0x0,B_0x1" bitfld.long 0x8 10. "PPEN74,Peripheral protection enable 74" "B_0x0,B_0x1" bitfld.long 0x8 9. "PPEN73,Peripheral protection enable 73" "B_0x0,B_0x1" bitfld.long 0x8 8. "PPEN72,Peripheral protection enable 72" "B_0x0,B_0x1" newline bitfld.long 0x8 7. "PPEN71,Peripheral protection enable 71" "B_0x0,B_0x1" bitfld.long 0x8 6. "PPEN70,Peripheral protection enable 70" "B_0x0,B_0x1" bitfld.long 0x8 5. "PPEN69,Peripheral protection enable 69" "B_0x0,B_0x1" bitfld.long 0x8 4. "PPEN68,Peripheral protection enable 68" "B_0x0,B_0x1" bitfld.long 0x8 3. "PPEN67,Peripheral protection enable 67" "B_0x0,B_0x1" bitfld.long 0x8 2. "PPEN66,Peripheral protection enable 66" "B_0x0,B_0x1" newline bitfld.long 0x8 1. "PPEN65,Peripheral protection enable 65" "B_0x0,B_0x1" bitfld.long 0x8 0. "PPEN64,Peripheral protection enable 64" "B_0x0,B_0x1" line.long 0xC "RIFSC_PPSR3,RIFSC peripheral protection status register 3" bitfld.long 0xC 31. "PPEN127,Peripheral protection enable 127" "B_0x0,B_0x1" bitfld.long 0xC 30. "PPEN126,Peripheral protection enable 126" "B_0x0,B_0x1" bitfld.long 0xC 29. "PPEN125,Peripheral protection enable 125" "B_0x0,B_0x1" bitfld.long 0xC 28. "PPEN124,Peripheral protection enable 124" "B_0x0,B_0x1" bitfld.long 0xC 27. "PPEN123,Peripheral protection enable 123" "B_0x0,B_0x1" bitfld.long 0xC 26. "PPEN122,Peripheral protection enable 122" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "PPEN121,Peripheral protection enable 121" "B_0x0,B_0x1" bitfld.long 0xC 24. "PPEN120,Peripheral protection enable 120" "B_0x0,B_0x1" bitfld.long 0xC 23. "PPEN119,Peripheral protection enable 119" "B_0x0,B_0x1" bitfld.long 0xC 22. "PPEN118,Peripheral protection enable 118" "B_0x0,B_0x1" bitfld.long 0xC 21. "PPEN117,Peripheral protection enable 117" "B_0x0,B_0x1" bitfld.long 0xC 20. "PPEN116,Peripheral protection enable 116" "B_0x0,B_0x1" newline bitfld.long 0xC 19. "PPEN115,Peripheral protection enable 115" "B_0x0,B_0x1" bitfld.long 0xC 18. "PPEN114,Peripheral protection enable 114" "B_0x0,B_0x1" bitfld.long 0xC 17. "PPEN113,Peripheral protection enable 113" "B_0x0,B_0x1" bitfld.long 0xC 16. "PPEN112,Peripheral protection enable 112" "B_0x0,B_0x1" bitfld.long 0xC 15. "PPEN111,Peripheral protection enable 111" "B_0x0,B_0x1" bitfld.long 0xC 14. "PPEN110,Peripheral protection enable 110" "B_0x0,B_0x1" newline bitfld.long 0xC 13. "PPEN109,Peripheral protection enable 109" "B_0x0,B_0x1" bitfld.long 0xC 12. "PPEN108,Peripheral protection enable 108" "B_0x0,B_0x1" bitfld.long 0xC 11. "PPEN107,Peripheral protection enable 107" "B_0x0,B_0x1" bitfld.long 0xC 10. "PPEN106,Peripheral protection enable 106" "B_0x0,B_0x1" bitfld.long 0xC 9. "PPEN105,Peripheral protection enable 105" "B_0x0,B_0x1" bitfld.long 0xC 8. "PPEN104,Peripheral protection enable 104" "B_0x0,B_0x1" newline bitfld.long 0xC 7. "PPEN103,Peripheral protection enable 103" "B_0x0,B_0x1" bitfld.long 0xC 6. "PPEN102,Peripheral protection enable 102" "B_0x0,B_0x1" bitfld.long 0xC 5. "PPEN101,Peripheral protection enable 101" "B_0x0,B_0x1" bitfld.long 0xC 4. "PPEN100,Peripheral protection enable 100" "B_0x0,B_0x1" bitfld.long 0xC 3. "PPEN99,Peripheral protection enable 99" "B_0x0,B_0x1" bitfld.long 0xC 2. "PPEN98,Peripheral protection enable 98" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "PPEN97,Peripheral protection enable 97" "B_0x0,B_0x1" bitfld.long 0xC 0. "PPEN96,Peripheral protection enable 96" "B_0x0,B_0x1" rgroup.long 0xFE8++0x17 line.long 0x0 "RIFSC_HWCFGR3,RIFSC hardware configuration register 3" hexmask.long 0x0 0.--31. 1. "CFG,Hardware configuration" line.long 0x4 "RIFSC_HWCFGR2,RIFSC hardware configuration register 2" hexmask.long.byte 0x4 24.--31. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x4 16.--23. 1. "CFG2,Hardware configuration 2" hexmask.long.word 0x4 0.--15. 1. "CFG1,Hardware configuration 1" line.long 0x8 "RIFSC_HWCFGR1,RIFSC hardware configuration register 1" hexmask.long.byte 0x8 20.--23. 1. "CFG6,Hardware configuration 6" hexmask.long.byte 0x8 16.--19. 1. "CFG5,Hardware configuration 5" hexmask.long.byte 0x8 12.--15. 1. "CFG4,Hardware configuration 4" hexmask.long.byte 0x8 8.--11. 1. "CFG3,Hardware configuration 3" hexmask.long.byte 0x8 4.--7. 1. "CFG2,Hardware configuration 2" hexmask.long.byte 0x8 0.--3. 1. "CFG1,Hardware configuration 1" line.long 0xC "RIFSC_VERR,RIFSC version register" hexmask.long.byte 0xC 4.--7. 1. "MAJREV,RIFSC major revision" hexmask.long.byte 0xC 0.--3. 1. "MINREV,RIFSC minor revision" line.long 0x10 "RIFSC_IPIDR,RIFSC identification register" hexmask.long 0x10 0.--31. 1. "ID,RIFSC identification code" line.long 0x14 "RIFSC_SIDR,RIFSC size identification register" hexmask.long 0x14 0.--31. 1. "SID,RIFSC size identification code" tree.end tree.end endif tree.end sif (cpuis("*CA35")||cpuis("*CM33F")) tree "RNG (True Random Number Generator)" base ad:0x0 tree "RNG" base ad:0x42020000 group.long 0x0++0x7 line.long 0x0 "RNG_CR,RNG control register" bitfld.long 0x0 31. "CONFIGLOCK,RNG Config lock" "B_0x0,B_0x1" bitfld.long 0x0 30. "CONDRST,Conditioning soft reset" "0,1" hexmask.long.byte 0x0 20.--25. 1. "RNG_CONFIG1,RNG configuration 1" hexmask.long.byte 0x0 16.--19. 1. "CLKDIV,Clock divider factor" bitfld.long 0x0 13.--15. "RNG_CONFIG2,RNG configuration 2" "0,1,2,3,4,5,6,7" bitfld.long 0x0 12. "NISTC,NIST custom" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "RNG_CONFIG3,RNG configuration 3" bitfld.long 0x0 7. "ARDIS,Auto reset disable" "B_0x0,B_0x1" bitfld.long 0x0 5. "CED,Clock error detection" "B_0x0,B_0x1" bitfld.long 0x0 3. "IE,Interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RNGEN,True random number generator enable" "B_0x0,B_0x1" line.long 0x4 "RNG_SR,RNG status register" bitfld.long 0x4 6. "SEIS,Seed error interrupt status" "B_0x0,B_0x1" bitfld.long 0x4 5. "CEIS,Clock error interrupt status" "B_0x0,B_0x1" rbitfld.long 0x4 2. "SECS,Seed error current status" "B_0x0,B_0x1" rbitfld.long 0x4 1. "CECS,Clock error current status" "B_0x0,B_0x1" rbitfld.long 0x4 0. "DRDY,Data ready" "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "RNG_DR,RNG data register" hexmask.long 0x0 0.--31. 1. "RNDATA,Random data" group.long 0xC++0x7 line.long 0x0 "RNG_NSCR,RNG noise source control register" bitfld.long 0x0 15.--17. "EN_OSC6,Each bit drives one oscillator enable signal input of instance number 6 gated with the RNGEN bit in RNG_CR (set bit to enable the oscillator). Bit is ignored otherwise." "0,1,2,3,4,5,6,7" bitfld.long 0x0 12.--14. "EN_OSC5,Each bit drives one oscillator enable signal input of instance number 5 gated with the RNGEN bit in RNG_CR (set bit to enable the oscillator). Bit is ignored otherwise." "0,1,2,3,4,5,6,7" bitfld.long 0x0 9.--11. "EN_OSC4,Each bit drives one oscillator enable signal input of instance number 4 gated with the RNGEN bit in RNG_CR (set bit to enable the oscillator). Bit is ignored otherwise." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "EN_OSC3,Each bit drives one oscillator enable signal input of instance number 3 gated with the RNGEN bit in RNG_CR (set bit to enable the oscillator). Bit is ignored otherwise." "0,1,2,3,4,5,6,7" bitfld.long 0x0 3.--5. "EN_OSC2,Each bit drives one oscillator enable signal input of instance number 2 gated with the RNGEN bit in RNG_CR (set bit to enable the oscillator). Bit is ignored otherwise." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "EN_OSC1,Each bit drives one oscillator enable signal input of instance number 1 gated with the RNGEN bit in RNG_CR (set bit to enable the oscillator). Bit is ignored otherwise." "0,1,2,3,4,5,6,7" line.long 0x4 "RNG_HTCR,RNG health test control register" hexmask.long 0x4 0.--31. 1. "HTCFG,health test configuration" rgroup.long 0x3F0++0xF line.long 0x0 "RNG_HWCFGR,RNG hardware configuration register" hexmask.long.byte 0x0 8.--15. 1. "CFG2,Hardware generic 2" hexmask.long.byte 0x0 0.--7. 1. "CFG1,Hardware generic 1" line.long 0x4 "RNG_VERR,RNG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,RNG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,RNG minor revision" line.long 0x8 "RNG_IPIDR,RNG identification register" hexmask.long 0x8 0.--31. 1. "ID,RNG identification code" line.long 0xC "RNG_SIDR,RNG size identification register" hexmask.long 0xC 0.--31. 1. "SID,RNG size identification code" tree.end tree "RNG_S" base ad:0x52020000 group.long 0x0++0x7 line.long 0x0 "RNG_CR,RNG control register" bitfld.long 0x0 31. "CONFIGLOCK,RNG Config lock" "B_0x0,B_0x1" bitfld.long 0x0 30. "CONDRST,Conditioning soft reset" "0,1" hexmask.long.byte 0x0 20.--25. 1. "RNG_CONFIG1,RNG configuration 1" hexmask.long.byte 0x0 16.--19. 1. "CLKDIV,Clock divider factor" bitfld.long 0x0 13.--15. "RNG_CONFIG2,RNG configuration 2" "0,1,2,3,4,5,6,7" bitfld.long 0x0 12. "NISTC,NIST custom" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 8.--11. 1. "RNG_CONFIG3,RNG configuration 3" bitfld.long 0x0 7. "ARDIS,Auto reset disable" "B_0x0,B_0x1" bitfld.long 0x0 5. "CED,Clock error detection" "B_0x0,B_0x1" bitfld.long 0x0 3. "IE,Interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RNGEN,True random number generator enable" "B_0x0,B_0x1" line.long 0x4 "RNG_SR,RNG status register" bitfld.long 0x4 6. "SEIS,Seed error interrupt status" "B_0x0,B_0x1" bitfld.long 0x4 5. "CEIS,Clock error interrupt status" "B_0x0,B_0x1" rbitfld.long 0x4 2. "SECS,Seed error current status" "B_0x0,B_0x1" rbitfld.long 0x4 1. "CECS,Clock error current status" "B_0x0,B_0x1" rbitfld.long 0x4 0. "DRDY,Data ready" "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "RNG_DR,RNG data register" hexmask.long 0x0 0.--31. 1. "RNDATA,Random data" group.long 0xC++0x7 line.long 0x0 "RNG_NSCR,RNG noise source control register" bitfld.long 0x0 15.--17. "EN_OSC6,Each bit drives one oscillator enable signal input of instance number 6 gated with the RNGEN bit in RNG_CR (set bit to enable the oscillator). Bit is ignored otherwise." "0,1,2,3,4,5,6,7" bitfld.long 0x0 12.--14. "EN_OSC5,Each bit drives one oscillator enable signal input of instance number 5 gated with the RNGEN bit in RNG_CR (set bit to enable the oscillator). Bit is ignored otherwise." "0,1,2,3,4,5,6,7" bitfld.long 0x0 9.--11. "EN_OSC4,Each bit drives one oscillator enable signal input of instance number 4 gated with the RNGEN bit in RNG_CR (set bit to enable the oscillator). Bit is ignored otherwise." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. "EN_OSC3,Each bit drives one oscillator enable signal input of instance number 3 gated with the RNGEN bit in RNG_CR (set bit to enable the oscillator). Bit is ignored otherwise." "0,1,2,3,4,5,6,7" bitfld.long 0x0 3.--5. "EN_OSC2,Each bit drives one oscillator enable signal input of instance number 2 gated with the RNGEN bit in RNG_CR (set bit to enable the oscillator). Bit is ignored otherwise." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "EN_OSC1,Each bit drives one oscillator enable signal input of instance number 1 gated with the RNGEN bit in RNG_CR (set bit to enable the oscillator). Bit is ignored otherwise." "0,1,2,3,4,5,6,7" line.long 0x4 "RNG_HTCR,RNG health test control register" hexmask.long 0x4 0.--31. 1. "HTCFG,health test configuration" rgroup.long 0x3F0++0xF line.long 0x0 "RNG_HWCFGR,RNG hardware configuration register" hexmask.long.byte 0x0 8.--15. 1. "CFG2,Hardware generic 2" hexmask.long.byte 0x0 0.--7. 1. "CFG1,Hardware generic 1" line.long 0x4 "RNG_VERR,RNG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,RNG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,RNG minor revision" line.long 0x8 "RNG_IPIDR,RNG identification register" hexmask.long 0x8 0.--31. 1. "ID,RNG identification code" line.long 0xC "RNG_SIDR,RNG size identification register" hexmask.long 0xC 0.--31. 1. "SID,RNG size identification code" tree.end tree.end endif tree "RTC (Real-Time Clock)" base ad:0x0 tree "RTC" base ad:0x46000000 group.long 0x0++0x7 line.long 0x0 "RTC_TR,RTC time register" bitfld.long 0x0 22. "PM,AM/PM notation" "B_0x0,B_0x1" bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3" hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format" bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format" bitfld.long 0x0 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format" line.long 0x4 "RTC_DR,RTC date register" hexmask.long.byte 0x4 20.--23. 1. "YT,Year tens in BCD format" hexmask.long.byte 0x4 16.--19. 1. "YU,Year units in BCD format" bitfld.long 0x4 13.--15. "WDU,Week day units" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" bitfld.long 0x4 12. "MT,Month tens in BCD format" "0,1" hexmask.long.byte 0x4 8.--11. 1. "MU,Month units in BCD format" bitfld.long 0x4 4.--5. "DT,Date tens in BCD format" "0,1,2,3" newline hexmask.long.byte 0x4 0.--3. 1. "DU,Date units in BCD format" rgroup.long 0x8++0x3 line.long 0x0 "RTC_SSR,RTC sub second register" hexmask.long 0x0 0.--31. 1. "SS,Synchronous binary counter" group.long 0xC++0x17 line.long 0x0 "RTC_ICSR,RTC initialization control and status register" rbitfld.long 0x0 16. "RECALPF,Recalibration pending Flag" "0,1" bitfld.long 0x0 10.--12. "BCDU,BCD update (BIN = 10 or 11)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 8.--9. "BIN,Binary mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "INIT,Initialization mode" "B_0x0,B_0x1" rbitfld.long 0x0 6. "INITF,Initialization flag" "B_0x0,B_0x1" bitfld.long 0x0 5. "RSF,Registers synchronization flag" "B_0x0,B_0x1" newline rbitfld.long 0x0 4. "INITS,Initialization status flag" "B_0x0,B_0x1" rbitfld.long 0x0 3. "SHPF,Shift operation pending" "B_0x0,B_0x1" rbitfld.long 0x0 2. "WUTWF,Wakeup timer write flag" "B_0x0,B_0x1" line.long 0x4 "RTC_PRER,RTC prescaler register" hexmask.long.byte 0x4 16.--22. 1. "PREDIV_A,Asynchronous prescaler factor" hexmask.long.word 0x4 0.--14. 1. "PREDIV_S,Synchronous prescaler factor" line.long 0x8 "RTC_WUTR,RTC wakeup timer register" hexmask.long.word 0x8 16.--31. 1. "WUTOCLR,Wakeup auto-reload output clear value" hexmask.long.word 0x8 0.--15. 1. "WUT,Wakeup auto-reload value bits" line.long 0xC "RTC_CR,RTC control register" bitfld.long 0xC 31. "OUT2EN,RTC_OUT2 output enable" "0,1" bitfld.long 0xC 30. "TAMPALRM_TYPE,TAMPALRM output type" "B_0x0,B_0x1" bitfld.long 0xC 29. "TAMPALRM_PU,TAMPALRM pull-up enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "ALRBFCLR,Alarm B flag automatic clear" "B_0x0,B_0x1" bitfld.long 0xC 27. "ALRAFCLR,Alarm A flag automatic clear" "B_0x0,B_0x1" bitfld.long 0xC 26. "TAMPOE,Tamper detection output enable on TAMPALRM" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "TAMPTS,Activate timestamp on tamper detection event" "B_0x0,B_0x1" bitfld.long 0xC 24. "ITSE,timestamp on internal event enable" "B_0x0,B_0x1" bitfld.long 0xC 23. "COE,Calibration output enable" "B_0x0,B_0x1" bitfld.long 0xC 21.--22. "OSEL,Output selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 20. "POL,Output polarity" "B_0x0,B_0x1" bitfld.long 0xC 19. "COSEL,Calibration output selection" "B_0x0,B_0x1" newline bitfld.long 0xC 18. "BKP,Backup" "0,1" bitfld.long 0xC 17. "SUB1H,Subtract 1 hour (winter time change)" "B_0x0,B_0x1" bitfld.long 0xC 16. "ADD1H,Add 1 hour (summer time change)" "B_0x0,B_0x1" bitfld.long 0xC 15. "TSIE,Timestamp interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 14. "WUTIE,Wakeup timer interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 13. "ALRBIE,Alarm B interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0xC 12. "ALRAIE,Alarm A interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 11. "TSE,timestamp enable" "B_0x0,B_0x1" bitfld.long 0xC 10. "WUTE,Wakeup timer enable" "B_0x0,B_0x1" bitfld.long 0xC 9. "ALRBE,Alarm B enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "ALRAE,Alarm A enable" "B_0x0,B_0x1" bitfld.long 0xC 7. "SSRUIE,SSR underflow interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0xC 6. "FMT,Hour format" "B_0x0,B_0x1" bitfld.long 0xC 5. "BYPSHAD,Bypass the shadow registers" "B_0x0,B_0x1" bitfld.long 0xC 4. "REFCKON,RTC_REFIN reference clock detection enable (50 or 60  Hz)" "B_0x0,B_0x1" bitfld.long 0xC 3. "TSEDGE,Timestamp event active edge" "B_0x0,B_0x1" bitfld.long 0xC 0.--2. "WUCKSEL,ck_wut wakeup clock selection" "B_0x0,B_0x1,B_0x2,B_0x3,?,?,?,?" line.long 0x10 "RTC_PRIVCR,RTC privilege mode control register" bitfld.long 0x10 15. "PRIV,RTC privilege protection" "B_0x0,B_0x1" bitfld.long 0x10 14. "INITPRIV,Initialization privilege protection" "B_0x0,B_0x1" bitfld.long 0x10 13. "CALPRIV,Shift register Delight saving calibration and reference clock privilege protection" "B_0x0,B_0x1" bitfld.long 0x10 3. "TSPRIV,Timestamp privilege protection" "B_0x0,B_0x1" bitfld.long 0x10 2. "WUTPRIV,Wakeup timer privilege protection" "B_0x0,B_0x1" bitfld.long 0x10 1. "ALRBPRIV,Alarm B privilege protection" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "ALRAPRIV,Alarm A and SSR underflow privilege protection" "B_0x0,B_0x1" line.long 0x14 "RTC_SECCFGR,RTC secure configuration register" bitfld.long 0x14 15. "SEC,RTC global protection" "B_0x0,B_0x1" bitfld.long 0x14 14. "INITSEC,Initialization protection" "B_0x0,B_0x1" bitfld.long 0x14 13. "CALSEC,Shift register daylight saving calibration and reference clock protection" "B_0x0,B_0x1" bitfld.long 0x14 3. "TSSEC,Timestamp protection" "B_0x0,B_0x1" bitfld.long 0x14 2. "WUTSEC,Wakeup timer protection" "B_0x0,B_0x1" bitfld.long 0x14 1. "ALRBSEC,Alarm B protection" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "ALRASEC,Alarm A and SSR underflow protection" "B_0x0,B_0x1" wgroup.long 0x24++0x3 line.long 0x0 "RTC_WPR,RTC write protection register" hexmask.long.byte 0x0 0.--7. 1. "KEY,Write protection key" group.long 0x28++0x3 line.long 0x0 "RTC_CALR,RTC calibration register" bitfld.long 0x0 15. "CALP,Increase frequency of RTC by 488.5  ppm" "B_0x0,B_0x1" bitfld.long 0x0 14. "CALW8,Use an 8-second calibration cycle period" "0,1" bitfld.long 0x0 13. "CALW16,Use a 16-second calibration cycle period" "0,1" bitfld.long 0x0 12. "LPCAL,RTC low-power mode" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--8. 1. "CALM,Calibration minus" wgroup.long 0x2C++0x3 line.long 0x0 "RTC_SHIFTR,RTC shift control register" bitfld.long 0x0 31. "ADD1S,Add one second" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--14. 1. "SUBFS,Subtract a fraction of a second" rgroup.long 0x30++0xB line.long 0x0 "RTC_TSTR,RTC timestamp time register" bitfld.long 0x0 22. "PM,AM/PM notation" "B_0x0,B_0x1" bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format." "0,1,2,3" hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format." bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format." bitfld.long 0x0 4.--6. "ST,Second tens in BCD format." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format." line.long 0x4 "RTC_TSDR,RTC timestamp date register" bitfld.long 0x4 13.--15. "WDU,Week day units" "0,1,2,3,4,5,6,7" bitfld.long 0x4 12. "MT,Month tens in BCD format" "0,1" hexmask.long.byte 0x4 8.--11. 1. "MU,Month units in BCD format" bitfld.long 0x4 4.--5. "DT,Date tens in BCD format" "0,1,2,3" hexmask.long.byte 0x4 0.--3. 1. "DU,Date units in BCD format" line.long 0x8 "RTC_TSSSR,RTC timestamp sub second register" hexmask.long 0x8 0.--31. 1. "SS,Sub second value/Synchronous binary counter values" group.long 0x40++0xF line.long 0x0 "RTC_ALRMAR,RTC alarm A register" bitfld.long 0x0 31. "MSK4,Alarm A date mask" "B_0x0,B_0x1" bitfld.long 0x0 30. "WDSEL,Week day selection" "B_0x0,B_0x1" bitfld.long 0x0 28.--29. "DT,Date tens in BCD format" "0,1,2,3" hexmask.long.byte 0x0 24.--27. 1. "DU,Date units or day in BCD format" bitfld.long 0x0 23. "MSK3,Alarm A hours mask" "B_0x0,B_0x1" bitfld.long 0x0 22. "PM,AM/PM notation" "B_0x0,B_0x1" newline bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3" hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format" bitfld.long 0x0 15. "MSK2,Alarm A minutes mask" "B_0x0,B_0x1" bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format" bitfld.long 0x0 7. "MSK1,Alarm A seconds mask" "B_0x0,B_0x1" newline bitfld.long 0x0 4.--6. "ST,Second tens in BCD format." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format." line.long 0x4 "RTC_ALRMASSR,RTC alarm A sub second register" bitfld.long 0x4 31. "SSCLR,Clear synchronous counter on alarm (Binary mode only)" "B_0x0,B_0x1" hexmask.long.byte 0x4 24.--29. 1. "MASKSS,Mask the most-significant bits starting at this bit" hexmask.long.word 0x4 0.--14. 1. "SS,Sub seconds value" line.long 0x8 "RTC_ALRMBR,RTC alarm B register" bitfld.long 0x8 31. "MSK4,Alarm B date mask" "B_0x0,B_0x1" bitfld.long 0x8 30. "WDSEL,Week day selection" "B_0x0,B_0x1" bitfld.long 0x8 28.--29. "DT,Date tens in BCD format" "0,1,2,3" hexmask.long.byte 0x8 24.--27. 1. "DU,Date units or day in BCD format" bitfld.long 0x8 23. "MSK3,Alarm B hours mask" "B_0x0,B_0x1" bitfld.long 0x8 22. "PM,AM/PM notation" "B_0x0,B_0x1" newline bitfld.long 0x8 20.--21. "HT,Hour tens in BCD format" "0,1,2,3" hexmask.long.byte 0x8 16.--19. 1. "HU,Hour units in BCD format" bitfld.long 0x8 15. "MSK2,Alarm B minutes mask" "B_0x0,B_0x1" bitfld.long 0x8 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 8.--11. 1. "MNU,Minute units in BCD format" bitfld.long 0x8 7. "MSK1,Alarm B seconds mask" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--3. 1. "SU,Second units in BCD format" line.long 0xC "RTC_ALRMBSSR,RTC alarm B sub second register" bitfld.long 0xC 31. "SSCLR,Clear synchronous counter on alarm (Binary mode only)" "B_0x0,B_0x1" hexmask.long.byte 0xC 24.--29. 1. "MASKSS,Mask the most-significant bits starting at this bit" hexmask.long.word 0xC 0.--14. 1. "SS,Sub seconds value" rgroup.long 0x50++0xB line.long 0x0 "RTC_SR,RTC status register" bitfld.long 0x0 6. "SSRUF,SSR underflow flag" "0,1" bitfld.long 0x0 5. "ITSF,Internal timestamp flag" "0,1" bitfld.long 0x0 4. "TSOVF,Timestamp overflow flag" "0,1" bitfld.long 0x0 3. "TSF,Timestamp flag" "0,1" bitfld.long 0x0 2. "WUTF,Wakeup timer flag" "0,1" bitfld.long 0x0 1. "ALRBF,Alarm B flag" "0,1" newline bitfld.long 0x0 0. "ALRAF,Alarm A flag" "0,1" line.long 0x4 "RTC_MISR,RTC non-secure masked interrupt status register" bitfld.long 0x4 6. "SSRUMF,SSR underflow non-secure masked flag" "0,1" bitfld.long 0x4 5. "ITSMF,Internal timestamp non-secure masked flag" "0,1" bitfld.long 0x4 4. "TSOVMF,Timestamp overflow non-secure masked flag" "0,1" bitfld.long 0x4 3. "TSMF,Timestamp non-secure masked flag" "0,1" bitfld.long 0x4 2. "WUTMF,Wakeup timer non-secure masked flag" "0,1" bitfld.long 0x4 1. "ALRBMF,Alarm B non-secure masked flag" "0,1" newline bitfld.long 0x4 0. "ALRAMF,Alarm A masked flag" "0,1" line.long 0x8 "RTC_SMISR,RTC secure masked interrupt status register" bitfld.long 0x8 6. "SSRUMF,SSR underflow secure masked flag" "0,1" bitfld.long 0x8 5. "ITSMF,Internal timestamp interrupt secure masked flag" "0,1" bitfld.long 0x8 4. "TSOVMF,Timestamp overflow interrupt secure masked flag" "0,1" bitfld.long 0x8 3. "TSMF,Timestamp interrupt secure masked flag" "0,1" bitfld.long 0x8 2. "WUTMF,Wakeup timer interrupt secure masked flag" "0,1" bitfld.long 0x8 1. "ALRBMF,Alarm B interrupt secure masked flag" "0,1" newline bitfld.long 0x8 0. "ALRAMF,Alarm A interrupt secure masked flag" "0,1" wgroup.long 0x5C++0x3 line.long 0x0 "RTC_SCR,RTC status clear register" bitfld.long 0x0 6. "CSSRUF,Clear SSR underflow flag" "0,1" bitfld.long 0x0 5. "CITSF,Clear internal timestamp flag" "0,1" bitfld.long 0x0 4. "CTSOVF,Clear timestamp overflow flag" "0,1" bitfld.long 0x0 3. "CTSF,Clear timestamp flag" "0,1" bitfld.long 0x0 2. "CWUTF,Clear wakeup timer flag" "0,1" bitfld.long 0x0 1. "CALRBF,Clear alarm B flag" "0,1" newline bitfld.long 0x0 0. "CALRAF,Clear alarm A flag" "0,1" group.long 0x60++0x3 line.long 0x0 "RTC_OR,RTC option register" bitfld.long 0x0 1.--2. "LSCOEN,LSCO LSE clock output enable" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0. "OUT2_RMP,RTC_OUT2 mapping" "B_0x0,B_0x1" group.long 0x70++0x7 line.long 0x0 "RTC_ALRABINR,RTC alarm A binary mode register" hexmask.long 0x0 0.--31. 1. "SS,Synchronous counter alarm value in Binary mode" line.long 0x4 "RTC_ALRBBINR,RTC alarm B binary mode register" hexmask.long 0x4 0.--31. 1. "SS,Synchronous counter alarm value in Binary mode" group.long 0x80++0x17 line.long 0x0 "RTC_R0CIDCFGR,RTC Resource 0 CID configuration register" bitfld.long 0x0 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x4 "RTC_R1CIDCFGR,RTC Resource 1 CID configuration register" bitfld.long 0x4 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x8 "RTC_R2CIDCFGR,RTC Resource 2 CID configuration register" bitfld.long 0x8 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0xC "RTC_R3CIDCFGR,RTC Resource 3 CID configuration register" bitfld.long 0xC 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x10 "RTC_R4CIDCFGR,RTC Resource 4 CID configuration register" bitfld.long 0x10 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x14 "RTC_R5CIDCFGR,RTC Resource 5 CID configuration register" bitfld.long 0x14 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "RTC_HWCFGR2,RTC hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CID_WIDTH,CID length" hexmask.long.byte 0x0 4.--7. 1. "RIF,CID compartment filtering" line.long 0x4 "RTC_HWCFGR1,RTC hardware configuration register" hexmask.long.byte 0x4 28.--31. 1. "BINARY,Binary mode" hexmask.long.byte 0x4 24.--27. 1. "TRUST_ZONE,Trust zone" hexmask.long.byte 0x4 16.--23. 1. "OPTIONREG_OUT,2: Configuration register bits 1:0 implemented" hexmask.long.byte 0x4 12.--15. 1. "TIMESTAMP" hexmask.long.byte 0x4 8.--11. 1. "SMOOTH_CALIB" hexmask.long.byte 0x4 4.--7. 1. "WAKEUP" newline hexmask.long.byte 0x4 0.--3. 1. "ALARMB" line.long 0x8 "RTC_VERR,RTC version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "RTC_IPIDR,RTC identification register" hexmask.long 0xC 0.--31. 1. "ID,Identifier" line.long 0x10 "RTC_SIDR,RTC size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identifier" tree.end sif (cpuis("*CA35")) tree "RTC_S" base ad:0x56000000 group.long 0x0++0x7 line.long 0x0 "RTC_TR,RTC time register" bitfld.long 0x0 22. "PM,AM/PM notation" "B_0x0,B_0x1" bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3" hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format" bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format" bitfld.long 0x0 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format" line.long 0x4 "RTC_DR,RTC date register" hexmask.long.byte 0x4 20.--23. 1. "YT,Year tens in BCD format" hexmask.long.byte 0x4 16.--19. 1. "YU,Year units in BCD format" bitfld.long 0x4 13.--15. "WDU,Week day units" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" bitfld.long 0x4 12. "MT,Month tens in BCD format" "0,1" hexmask.long.byte 0x4 8.--11. 1. "MU,Month units in BCD format" bitfld.long 0x4 4.--5. "DT,Date tens in BCD format" "0,1,2,3" newline hexmask.long.byte 0x4 0.--3. 1. "DU,Date units in BCD format" rgroup.long 0x8++0x3 line.long 0x0 "RTC_SSR,RTC sub second register" hexmask.long 0x0 0.--31. 1. "SS,Synchronous binary counter" group.long 0xC++0x17 line.long 0x0 "RTC_ICSR,RTC initialization control and status register" rbitfld.long 0x0 16. "RECALPF,Recalibration pending Flag" "0,1" bitfld.long 0x0 10.--12. "BCDU,BCD update (BIN = 10 or 11)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 8.--9. "BIN,Binary mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "INIT,Initialization mode" "B_0x0,B_0x1" rbitfld.long 0x0 6. "INITF,Initialization flag" "B_0x0,B_0x1" bitfld.long 0x0 5. "RSF,Registers synchronization flag" "B_0x0,B_0x1" newline rbitfld.long 0x0 4. "INITS,Initialization status flag" "B_0x0,B_0x1" rbitfld.long 0x0 3. "SHPF,Shift operation pending" "B_0x0,B_0x1" rbitfld.long 0x0 2. "WUTWF,Wakeup timer write flag" "B_0x0,B_0x1" line.long 0x4 "RTC_PRER,RTC prescaler register" hexmask.long.byte 0x4 16.--22. 1. "PREDIV_A,Asynchronous prescaler factor" hexmask.long.word 0x4 0.--14. 1. "PREDIV_S,Synchronous prescaler factor" line.long 0x8 "RTC_WUTR,RTC wakeup timer register" hexmask.long.word 0x8 16.--31. 1. "WUTOCLR,Wakeup auto-reload output clear value" hexmask.long.word 0x8 0.--15. 1. "WUT,Wakeup auto-reload value bits" line.long 0xC "RTC_CR,RTC control register" bitfld.long 0xC 31. "OUT2EN,RTC_OUT2 output enable" "0,1" bitfld.long 0xC 30. "TAMPALRM_TYPE,TAMPALRM output type" "B_0x0,B_0x1" bitfld.long 0xC 29. "TAMPALRM_PU,TAMPALRM pull-up enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "ALRBFCLR,Alarm B flag automatic clear" "B_0x0,B_0x1" bitfld.long 0xC 27. "ALRAFCLR,Alarm A flag automatic clear" "B_0x0,B_0x1" bitfld.long 0xC 26. "TAMPOE,Tamper detection output enable on TAMPALRM" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "TAMPTS,Activate timestamp on tamper detection event" "B_0x0,B_0x1" bitfld.long 0xC 24. "ITSE,timestamp on internal event enable" "B_0x0,B_0x1" bitfld.long 0xC 23. "COE,Calibration output enable" "B_0x0,B_0x1" bitfld.long 0xC 21.--22. "OSEL,Output selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 20. "POL,Output polarity" "B_0x0,B_0x1" bitfld.long 0xC 19. "COSEL,Calibration output selection" "B_0x0,B_0x1" newline bitfld.long 0xC 18. "BKP,Backup" "0,1" bitfld.long 0xC 17. "SUB1H,Subtract 1 hour (winter time change)" "B_0x0,B_0x1" bitfld.long 0xC 16. "ADD1H,Add 1 hour (summer time change)" "B_0x0,B_0x1" bitfld.long 0xC 15. "TSIE,Timestamp interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 14. "WUTIE,Wakeup timer interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 13. "ALRBIE,Alarm B interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0xC 12. "ALRAIE,Alarm A interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 11. "TSE,timestamp enable" "B_0x0,B_0x1" bitfld.long 0xC 10. "WUTE,Wakeup timer enable" "B_0x0,B_0x1" bitfld.long 0xC 9. "ALRBE,Alarm B enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "ALRAE,Alarm A enable" "B_0x0,B_0x1" bitfld.long 0xC 7. "SSRUIE,SSR underflow interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0xC 6. "FMT,Hour format" "B_0x0,B_0x1" bitfld.long 0xC 5. "BYPSHAD,Bypass the shadow registers" "B_0x0,B_0x1" bitfld.long 0xC 4. "REFCKON,RTC_REFIN reference clock detection enable (50 or 60  Hz)" "B_0x0,B_0x1" bitfld.long 0xC 3. "TSEDGE,Timestamp event active edge" "B_0x0,B_0x1" bitfld.long 0xC 0.--2. "WUCKSEL,ck_wut wakeup clock selection" "B_0x0,B_0x1,B_0x2,B_0x3,?,?,?,?" line.long 0x10 "RTC_PRIVCR,RTC privilege mode control register" bitfld.long 0x10 15. "PRIV,RTC privilege protection" "B_0x0,B_0x1" bitfld.long 0x10 14. "INITPRIV,Initialization privilege protection" "B_0x0,B_0x1" bitfld.long 0x10 13. "CALPRIV,Shift register Delight saving calibration and reference clock privilege protection" "B_0x0,B_0x1" bitfld.long 0x10 3. "TSPRIV,Timestamp privilege protection" "B_0x0,B_0x1" bitfld.long 0x10 2. "WUTPRIV,Wakeup timer privilege protection" "B_0x0,B_0x1" bitfld.long 0x10 1. "ALRBPRIV,Alarm B privilege protection" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "ALRAPRIV,Alarm A and SSR underflow privilege protection" "B_0x0,B_0x1" line.long 0x14 "RTC_SECCFGR,RTC secure configuration register" bitfld.long 0x14 15. "SEC,RTC global protection" "B_0x0,B_0x1" bitfld.long 0x14 14. "INITSEC,Initialization protection" "B_0x0,B_0x1" bitfld.long 0x14 13. "CALSEC,Shift register daylight saving calibration and reference clock protection" "B_0x0,B_0x1" bitfld.long 0x14 3. "TSSEC,Timestamp protection" "B_0x0,B_0x1" bitfld.long 0x14 2. "WUTSEC,Wakeup timer protection" "B_0x0,B_0x1" bitfld.long 0x14 1. "ALRBSEC,Alarm B protection" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "ALRASEC,Alarm A and SSR underflow protection" "B_0x0,B_0x1" wgroup.long 0x24++0x3 line.long 0x0 "RTC_WPR,RTC write protection register" hexmask.long.byte 0x0 0.--7. 1. "KEY,Write protection key" group.long 0x28++0x3 line.long 0x0 "RTC_CALR,RTC calibration register" bitfld.long 0x0 15. "CALP,Increase frequency of RTC by 488.5  ppm" "B_0x0,B_0x1" bitfld.long 0x0 14. "CALW8,Use an 8-second calibration cycle period" "0,1" bitfld.long 0x0 13. "CALW16,Use a 16-second calibration cycle period" "0,1" bitfld.long 0x0 12. "LPCAL,RTC low-power mode" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--8. 1. "CALM,Calibration minus" wgroup.long 0x2C++0x3 line.long 0x0 "RTC_SHIFTR,RTC shift control register" bitfld.long 0x0 31. "ADD1S,Add one second" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--14. 1. "SUBFS,Subtract a fraction of a second" rgroup.long 0x30++0xB line.long 0x0 "RTC_TSTR,RTC timestamp time register" bitfld.long 0x0 22. "PM,AM/PM notation" "B_0x0,B_0x1" bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format." "0,1,2,3" hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format." bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format." bitfld.long 0x0 4.--6. "ST,Second tens in BCD format." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format." line.long 0x4 "RTC_TSDR,RTC timestamp date register" bitfld.long 0x4 13.--15. "WDU,Week day units" "0,1,2,3,4,5,6,7" bitfld.long 0x4 12. "MT,Month tens in BCD format" "0,1" hexmask.long.byte 0x4 8.--11. 1. "MU,Month units in BCD format" bitfld.long 0x4 4.--5. "DT,Date tens in BCD format" "0,1,2,3" hexmask.long.byte 0x4 0.--3. 1. "DU,Date units in BCD format" line.long 0x8 "RTC_TSSSR,RTC timestamp sub second register" hexmask.long 0x8 0.--31. 1. "SS,Sub second value/Synchronous binary counter values" group.long 0x40++0xF line.long 0x0 "RTC_ALRMAR,RTC alarm A register" bitfld.long 0x0 31. "MSK4,Alarm A date mask" "B_0x0,B_0x1" bitfld.long 0x0 30. "WDSEL,Week day selection" "B_0x0,B_0x1" bitfld.long 0x0 28.--29. "DT,Date tens in BCD format" "0,1,2,3" hexmask.long.byte 0x0 24.--27. 1. "DU,Date units or day in BCD format" bitfld.long 0x0 23. "MSK3,Alarm A hours mask" "B_0x0,B_0x1" bitfld.long 0x0 22. "PM,AM/PM notation" "B_0x0,B_0x1" newline bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3" hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format" bitfld.long 0x0 15. "MSK2,Alarm A minutes mask" "B_0x0,B_0x1" bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format" bitfld.long 0x0 7. "MSK1,Alarm A seconds mask" "B_0x0,B_0x1" newline bitfld.long 0x0 4.--6. "ST,Second tens in BCD format." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format." line.long 0x4 "RTC_ALRMASSR,RTC alarm A sub second register" bitfld.long 0x4 31. "SSCLR,Clear synchronous counter on alarm (Binary mode only)" "B_0x0,B_0x1" hexmask.long.byte 0x4 24.--29. 1. "MASKSS,Mask the most-significant bits starting at this bit" hexmask.long.word 0x4 0.--14. 1. "SS,Sub seconds value" line.long 0x8 "RTC_ALRMBR,RTC alarm B register" bitfld.long 0x8 31. "MSK4,Alarm B date mask" "B_0x0,B_0x1" bitfld.long 0x8 30. "WDSEL,Week day selection" "B_0x0,B_0x1" bitfld.long 0x8 28.--29. "DT,Date tens in BCD format" "0,1,2,3" hexmask.long.byte 0x8 24.--27. 1. "DU,Date units or day in BCD format" bitfld.long 0x8 23. "MSK3,Alarm B hours mask" "B_0x0,B_0x1" bitfld.long 0x8 22. "PM,AM/PM notation" "B_0x0,B_0x1" newline bitfld.long 0x8 20.--21. "HT,Hour tens in BCD format" "0,1,2,3" hexmask.long.byte 0x8 16.--19. 1. "HU,Hour units in BCD format" bitfld.long 0x8 15. "MSK2,Alarm B minutes mask" "B_0x0,B_0x1" bitfld.long 0x8 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 8.--11. 1. "MNU,Minute units in BCD format" bitfld.long 0x8 7. "MSK1,Alarm B seconds mask" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--3. 1. "SU,Second units in BCD format" line.long 0xC "RTC_ALRMBSSR,RTC alarm B sub second register" bitfld.long 0xC 31. "SSCLR,Clear synchronous counter on alarm (Binary mode only)" "B_0x0,B_0x1" hexmask.long.byte 0xC 24.--29. 1. "MASKSS,Mask the most-significant bits starting at this bit" hexmask.long.word 0xC 0.--14. 1. "SS,Sub seconds value" rgroup.long 0x50++0xB line.long 0x0 "RTC_SR,RTC status register" bitfld.long 0x0 6. "SSRUF,SSR underflow flag" "0,1" bitfld.long 0x0 5. "ITSF,Internal timestamp flag" "0,1" bitfld.long 0x0 4. "TSOVF,Timestamp overflow flag" "0,1" bitfld.long 0x0 3. "TSF,Timestamp flag" "0,1" bitfld.long 0x0 2. "WUTF,Wakeup timer flag" "0,1" bitfld.long 0x0 1. "ALRBF,Alarm B flag" "0,1" newline bitfld.long 0x0 0. "ALRAF,Alarm A flag" "0,1" line.long 0x4 "RTC_MISR,RTC non-secure masked interrupt status register" bitfld.long 0x4 6. "SSRUMF,SSR underflow non-secure masked flag" "0,1" bitfld.long 0x4 5. "ITSMF,Internal timestamp non-secure masked flag" "0,1" bitfld.long 0x4 4. "TSOVMF,Timestamp overflow non-secure masked flag" "0,1" bitfld.long 0x4 3. "TSMF,Timestamp non-secure masked flag" "0,1" bitfld.long 0x4 2. "WUTMF,Wakeup timer non-secure masked flag" "0,1" bitfld.long 0x4 1. "ALRBMF,Alarm B non-secure masked flag" "0,1" newline bitfld.long 0x4 0. "ALRAMF,Alarm A masked flag" "0,1" line.long 0x8 "RTC_SMISR,RTC secure masked interrupt status register" bitfld.long 0x8 6. "SSRUMF,SSR underflow secure masked flag" "0,1" bitfld.long 0x8 5. "ITSMF,Internal timestamp interrupt secure masked flag" "0,1" bitfld.long 0x8 4. "TSOVMF,Timestamp overflow interrupt secure masked flag" "0,1" bitfld.long 0x8 3. "TSMF,Timestamp interrupt secure masked flag" "0,1" bitfld.long 0x8 2. "WUTMF,Wakeup timer interrupt secure masked flag" "0,1" bitfld.long 0x8 1. "ALRBMF,Alarm B interrupt secure masked flag" "0,1" newline bitfld.long 0x8 0. "ALRAMF,Alarm A interrupt secure masked flag" "0,1" wgroup.long 0x5C++0x3 line.long 0x0 "RTC_SCR,RTC status clear register" bitfld.long 0x0 6. "CSSRUF,Clear SSR underflow flag" "0,1" bitfld.long 0x0 5. "CITSF,Clear internal timestamp flag" "0,1" bitfld.long 0x0 4. "CTSOVF,Clear timestamp overflow flag" "0,1" bitfld.long 0x0 3. "CTSF,Clear timestamp flag" "0,1" bitfld.long 0x0 2. "CWUTF,Clear wakeup timer flag" "0,1" bitfld.long 0x0 1. "CALRBF,Clear alarm B flag" "0,1" newline bitfld.long 0x0 0. "CALRAF,Clear alarm A flag" "0,1" group.long 0x60++0x3 line.long 0x0 "RTC_OR,RTC option register" bitfld.long 0x0 1.--2. "LSCOEN,LSCO LSE clock output enable" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0. "OUT2_RMP,RTC_OUT2 mapping" "B_0x0,B_0x1" group.long 0x70++0x7 line.long 0x0 "RTC_ALRABINR,RTC alarm A binary mode register" hexmask.long 0x0 0.--31. 1. "SS,Synchronous counter alarm value in Binary mode" line.long 0x4 "RTC_ALRBBINR,RTC alarm B binary mode register" hexmask.long 0x4 0.--31. 1. "SS,Synchronous counter alarm value in Binary mode" group.long 0x80++0x17 line.long 0x0 "RTC_R0CIDCFGR,RTC Resource 0 CID configuration register" bitfld.long 0x0 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x4 "RTC_R1CIDCFGR,RTC Resource 1 CID configuration register" bitfld.long 0x4 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x8 "RTC_R2CIDCFGR,RTC Resource 2 CID configuration register" bitfld.long 0x8 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0xC "RTC_R3CIDCFGR,RTC Resource 3 CID configuration register" bitfld.long 0xC 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x10 "RTC_R4CIDCFGR,RTC Resource 4 CID configuration register" bitfld.long 0x10 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x14 "RTC_R5CIDCFGR,RTC Resource 5 CID configuration register" bitfld.long 0x14 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "RTC_HWCFGR2,RTC hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CID_WIDTH,CID length" hexmask.long.byte 0x0 4.--7. 1. "RIF,CID compartment filtering" line.long 0x4 "RTC_HWCFGR1,RTC hardware configuration register" hexmask.long.byte 0x4 28.--31. 1. "BINARY,Binary mode" hexmask.long.byte 0x4 24.--27. 1. "TRUST_ZONE,Trust zone" hexmask.long.byte 0x4 16.--23. 1. "OPTIONREG_OUT,2: Configuration register bits 1:0 implemented" hexmask.long.byte 0x4 12.--15. 1. "TIMESTAMP" hexmask.long.byte 0x4 8.--11. 1. "SMOOTH_CALIB" hexmask.long.byte 0x4 4.--7. 1. "WAKEUP" newline hexmask.long.byte 0x4 0.--3. 1. "ALARMB" line.long 0x8 "RTC_VERR,RTC version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "RTC_IPIDR,RTC identification register" hexmask.long 0xC 0.--31. 1. "ID,Identifier" line.long 0x10 "RTC_SIDR,RTC size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identifier" tree.end endif sif (cpuis("*CM33F")) tree "RTC_S" base ad:0x56000000 group.long 0x0++0x7 line.long 0x0 "RTC_TR,RTC time register" bitfld.long 0x0 22. "PM,AM/PM notation" "B_0x0,B_0x1" bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3" hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format" bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format" bitfld.long 0x0 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format" line.long 0x4 "RTC_DR,RTC date register" hexmask.long.byte 0x4 20.--23. 1. "YT,Year tens in BCD format" hexmask.long.byte 0x4 16.--19. 1. "YU,Year units in BCD format" bitfld.long 0x4 13.--15. "WDU,Week day units" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" bitfld.long 0x4 12. "MT,Month tens in BCD format" "0,1" hexmask.long.byte 0x4 8.--11. 1. "MU,Month units in BCD format" bitfld.long 0x4 4.--5. "DT,Date tens in BCD format" "0,1,2,3" newline hexmask.long.byte 0x4 0.--3. 1. "DU,Date units in BCD format" rgroup.long 0x8++0x3 line.long 0x0 "RTC_SSR,RTC sub second register" hexmask.long 0x0 0.--31. 1. "SS,Synchronous binary counter" group.long 0xC++0x17 line.long 0x0 "RTC_ICSR,RTC initialization control and status register" rbitfld.long 0x0 16. "RECALPF,Recalibration pending Flag" "0,1" bitfld.long 0x0 10.--12. "BCDU,BCD update (BIN = 10 or 11)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 8.--9. "BIN,Binary mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "INIT,Initialization mode" "B_0x0,B_0x1" rbitfld.long 0x0 6. "INITF,Initialization flag" "B_0x0,B_0x1" bitfld.long 0x0 5. "RSF,Registers synchronization flag" "B_0x0,B_0x1" newline rbitfld.long 0x0 4. "INITS,Initialization status flag" "B_0x0,B_0x1" rbitfld.long 0x0 3. "SHPF,Shift operation pending" "B_0x0,B_0x1" rbitfld.long 0x0 2. "WUTWF,Wakeup timer write flag" "B_0x0,B_0x1" line.long 0x4 "RTC_PRER,RTC prescaler register" hexmask.long.byte 0x4 16.--22. 1. "PREDIV_A,Asynchronous prescaler factor" hexmask.long.word 0x4 0.--14. 1. "PREDIV_S,Synchronous prescaler factor" line.long 0x8 "RTC_WUTR,RTC wakeup timer register" hexmask.long.word 0x8 16.--31. 1. "WUTOCLR,Wakeup auto-reload output clear value" hexmask.long.word 0x8 0.--15. 1. "WUT,Wakeup auto-reload value bits" line.long 0xC "RTC_CR,RTC control register" bitfld.long 0xC 31. "OUT2EN,RTC_OUT2 output enable" "0,1" bitfld.long 0xC 30. "TAMPALRM_TYPE,TAMPALRM output type" "B_0x0,B_0x1" bitfld.long 0xC 29. "TAMPALRM_PU,TAMPALRM pull-up enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "ALRBFCLR,Alarm B flag automatic clear" "B_0x0,B_0x1" bitfld.long 0xC 27. "ALRAFCLR,Alarm A flag automatic clear" "B_0x0,B_0x1" bitfld.long 0xC 26. "TAMPOE,Tamper detection output enable on TAMPALRM" "B_0x0,B_0x1" newline bitfld.long 0xC 25. "TAMPTS,Activate timestamp on tamper detection event" "B_0x0,B_0x1" bitfld.long 0xC 24. "ITSE,timestamp on internal event enable" "B_0x0,B_0x1" bitfld.long 0xC 23. "COE,Calibration output enable" "B_0x0,B_0x1" bitfld.long 0xC 21.--22. "OSEL,Output selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 20. "POL,Output polarity" "B_0x0,B_0x1" bitfld.long 0xC 19. "COSEL,Calibration output selection" "B_0x0,B_0x1" newline bitfld.long 0xC 18. "BKP,Backup" "0,1" bitfld.long 0xC 17. "SUB1H,Subtract 1 hour (winter time change)" "B_0x0,B_0x1" bitfld.long 0xC 16. "ADD1H,Add 1 hour (summer time change)" "B_0x0,B_0x1" bitfld.long 0xC 15. "TSIE,Timestamp interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 14. "WUTIE,Wakeup timer interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 13. "ALRBIE,Alarm B interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0xC 12. "ALRAIE,Alarm A interrupt enable" "B_0x0,B_0x1" bitfld.long 0xC 11. "TSE,timestamp enable" "B_0x0,B_0x1" bitfld.long 0xC 10. "WUTE,Wakeup timer enable" "B_0x0,B_0x1" bitfld.long 0xC 9. "ALRBE,Alarm B enable" "B_0x0,B_0x1" bitfld.long 0xC 8. "ALRAE,Alarm A enable" "B_0x0,B_0x1" bitfld.long 0xC 7. "SSRUIE,SSR underflow interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0xC 6. "FMT,Hour format" "B_0x0,B_0x1" bitfld.long 0xC 5. "BYPSHAD,Bypass the shadow registers" "B_0x0,B_0x1" bitfld.long 0xC 4. "REFCKON,RTC_REFIN reference clock detection enable (50 or 60  Hz)" "B_0x0,B_0x1" bitfld.long 0xC 3. "TSEDGE,Timestamp event active edge" "B_0x0,B_0x1" bitfld.long 0xC 0.--2. "WUCKSEL,ck_wut wakeup clock selection" "B_0x0,B_0x1,B_0x2,B_0x3,?,?,?,?" line.long 0x10 "RTC_PRIVCR,RTC privilege mode control register" bitfld.long 0x10 15. "PRIV,RTC privilege protection" "B_0x0,B_0x1" bitfld.long 0x10 14. "INITPRIV,Initialization privilege protection" "B_0x0,B_0x1" bitfld.long 0x10 13. "CALPRIV,Shift register Delight saving calibration and reference clock privilege protection" "B_0x0,B_0x1" bitfld.long 0x10 3. "TSPRIV,Timestamp privilege protection" "B_0x0,B_0x1" bitfld.long 0x10 2. "WUTPRIV,Wakeup timer privilege protection" "B_0x0,B_0x1" bitfld.long 0x10 1. "ALRBPRIV,Alarm B privilege protection" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "ALRAPRIV,Alarm A and SSR underflow privilege protection" "B_0x0,B_0x1" line.long 0x14 "RTC_SECCFGR,RTC secure configuration register" bitfld.long 0x14 15. "SEC,RTC global protection" "B_0x0,B_0x1" bitfld.long 0x14 14. "INITSEC,Initialization protection" "B_0x0,B_0x1" bitfld.long 0x14 13. "CALSEC,Shift register daylight saving calibration and reference clock protection" "B_0x0,B_0x1" bitfld.long 0x14 3. "TSSEC,Timestamp protection" "B_0x0,B_0x1" bitfld.long 0x14 2. "WUTSEC,Wakeup timer protection" "B_0x0,B_0x1" bitfld.long 0x14 1. "ALRBSEC,Alarm B protection" "B_0x0,B_0x1" newline bitfld.long 0x14 0. "ALRASEC,Alarm A and SSR underflow protection" "B_0x0,B_0x1" wgroup.long 0x24++0x3 line.long 0x0 "RTC_WPR,RTC write protection register" hexmask.long.byte 0x0 0.--7. 1. "KEY,Write protection key" group.long 0x28++0x3 line.long 0x0 "RTC_CALR,RTC calibration register" bitfld.long 0x0 15. "CALP,Increase frequency of RTC by 488.5  ppm" "B_0x0,B_0x1" bitfld.long 0x0 14. "CALW8,Use an 8-second calibration cycle period" "0,1" bitfld.long 0x0 13. "CALW16,Use a 16-second calibration cycle period" "0,1" bitfld.long 0x0 12. "LPCAL,RTC low-power mode" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--8. 1. "CALM,Calibration minus" wgroup.long 0x2C++0x3 line.long 0x0 "RTC_SHIFTR,RTC shift control register" bitfld.long 0x0 31. "ADD1S,Add one second" "B_0x0,B_0x1" hexmask.long.word 0x0 0.--14. 1. "SUBFS,Subtract a fraction of a second" rgroup.long 0x30++0xB line.long 0x0 "RTC_TSTR,RTC timestamp time register" bitfld.long 0x0 22. "PM,AM/PM notation" "B_0x0,B_0x1" bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format." "0,1,2,3" hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format." bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format." bitfld.long 0x0 4.--6. "ST,Second tens in BCD format." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format." line.long 0x4 "RTC_TSDR,RTC timestamp date register" bitfld.long 0x4 13.--15. "WDU,Week day units" "0,1,2,3,4,5,6,7" bitfld.long 0x4 12. "MT,Month tens in BCD format" "0,1" hexmask.long.byte 0x4 8.--11. 1. "MU,Month units in BCD format" bitfld.long 0x4 4.--5. "DT,Date tens in BCD format" "0,1,2,3" hexmask.long.byte 0x4 0.--3. 1. "DU,Date units in BCD format" line.long 0x8 "RTC_TSSSR,RTC timestamp sub second register" hexmask.long 0x8 0.--31. 1. "SS,Sub second value/Synchronous binary counter values" group.long 0x40++0xF line.long 0x0 "RTC_ALRMAR,RTC alarm A register" bitfld.long 0x0 31. "MSK4,Alarm A date mask" "B_0x0,B_0x1" bitfld.long 0x0 30. "WDSEL,Week day selection" "B_0x0,B_0x1" bitfld.long 0x0 28.--29. "DT,Date tens in BCD format" "0,1,2,3" hexmask.long.byte 0x0 24.--27. 1. "DU,Date units or day in BCD format" bitfld.long 0x0 23. "MSK3,Alarm A hours mask" "B_0x0,B_0x1" bitfld.long 0x0 22. "PM,AM/PM notation" "B_0x0,B_0x1" newline bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3" hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format" bitfld.long 0x0 15. "MSK2,Alarm A minutes mask" "B_0x0,B_0x1" bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format" bitfld.long 0x0 7. "MSK1,Alarm A seconds mask" "B_0x0,B_0x1" newline bitfld.long 0x0 4.--6. "ST,Second tens in BCD format." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format." line.long 0x4 "RTC_ALRMASSR,RTC alarm A sub second register" bitfld.long 0x4 31. "SSCLR,Clear synchronous counter on alarm (Binary mode only)" "B_0x0,B_0x1" hexmask.long.byte 0x4 24.--29. 1. "MASKSS,Mask the most-significant bits starting at this bit" hexmask.long.word 0x4 0.--14. 1. "SS,Sub seconds value" line.long 0x8 "RTC_ALRMBR,RTC alarm B register" bitfld.long 0x8 31. "MSK4,Alarm B date mask" "B_0x0,B_0x1" bitfld.long 0x8 30. "WDSEL,Week day selection" "B_0x0,B_0x1" bitfld.long 0x8 28.--29. "DT,Date tens in BCD format" "0,1,2,3" hexmask.long.byte 0x8 24.--27. 1. "DU,Date units or day in BCD format" bitfld.long 0x8 23. "MSK3,Alarm B hours mask" "B_0x0,B_0x1" bitfld.long 0x8 22. "PM,AM/PM notation" "B_0x0,B_0x1" newline bitfld.long 0x8 20.--21. "HT,Hour tens in BCD format" "0,1,2,3" hexmask.long.byte 0x8 16.--19. 1. "HU,Hour units in BCD format" bitfld.long 0x8 15. "MSK2,Alarm B minutes mask" "B_0x0,B_0x1" bitfld.long 0x8 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 8.--11. 1. "MNU,Minute units in BCD format" bitfld.long 0x8 7. "MSK1,Alarm B seconds mask" "B_0x0,B_0x1" newline bitfld.long 0x8 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x8 0.--3. 1. "SU,Second units in BCD format" line.long 0xC "RTC_ALRMBSSR,RTC alarm B sub second register" bitfld.long 0xC 31. "SSCLR,Clear synchronous counter on alarm (Binary mode only)" "B_0x0,B_0x1" hexmask.long.byte 0xC 24.--29. 1. "MASKSS,Mask the most-significant bits starting at this bit" hexmask.long.word 0xC 0.--14. 1. "SS,Sub seconds value" rgroup.long 0x50++0xB line.long 0x0 "RTC_SR,RTC status register" bitfld.long 0x0 6. "SSRUF,SSR underflow flag" "0,1" bitfld.long 0x0 5. "ITSF,Internal timestamp flag" "0,1" bitfld.long 0x0 4. "TSOVF,Timestamp overflow flag" "0,1" bitfld.long 0x0 3. "TSF,Timestamp flag" "0,1" bitfld.long 0x0 2. "WUTF,Wakeup timer flag" "0,1" bitfld.long 0x0 1. "ALRBF,Alarm B flag" "0,1" newline bitfld.long 0x0 0. "ALRAF,Alarm A flag" "0,1" line.long 0x4 "RTC_MISR,RTC non-secure masked interrupt status register" bitfld.long 0x4 6. "SSRUMF,SSR underflow non-secure masked flag" "0,1" bitfld.long 0x4 5. "ITSMF,Internal timestamp non-secure masked flag" "0,1" bitfld.long 0x4 4. "TSOVMF,Timestamp overflow non-secure masked flag" "0,1" bitfld.long 0x4 3. "TSMF,Timestamp non-secure masked flag" "0,1" bitfld.long 0x4 2. "WUTMF,Wakeup timer non-secure masked flag" "0,1" bitfld.long 0x4 1. "ALRBMF,Alarm B non-secure masked flag" "0,1" newline bitfld.long 0x4 0. "ALRAMF,Alarm A masked flag" "0,1" line.long 0x8 "RTC_SMISR,RTC secure masked interrupt status register" bitfld.long 0x8 6. "SSRUMF,SSR underflow secure masked flag" "0,1" bitfld.long 0x8 5. "ITSMF,Internal timestamp interrupt secure masked flag" "0,1" bitfld.long 0x8 4. "TSOVMF,Timestamp overflow interrupt secure masked flag" "0,1" bitfld.long 0x8 3. "TSMF,Timestamp interrupt secure masked flag" "0,1" bitfld.long 0x8 2. "WUTMF,Wakeup timer interrupt secure masked flag" "0,1" bitfld.long 0x8 1. "ALRBMF,Alarm B interrupt secure masked flag" "0,1" newline bitfld.long 0x8 0. "ALRAMF,Alarm A interrupt secure masked flag" "0,1" wgroup.long 0x5C++0x3 line.long 0x0 "RTC_SCR,RTC status clear register" bitfld.long 0x0 6. "CSSRUF,Clear SSR underflow flag" "0,1" bitfld.long 0x0 5. "CITSF,Clear internal timestamp flag" "0,1" bitfld.long 0x0 4. "CTSOVF,Clear timestamp overflow flag" "0,1" bitfld.long 0x0 3. "CTSF,Clear timestamp flag" "0,1" bitfld.long 0x0 2. "CWUTF,Clear wakeup timer flag" "0,1" bitfld.long 0x0 1. "CALRBF,Clear alarm B flag" "0,1" newline bitfld.long 0x0 0. "CALRAF,Clear alarm A flag" "0,1" group.long 0x60++0x3 line.long 0x0 "RTC_OR,RTC option register" bitfld.long 0x0 1.--2. "LSCOEN,LSCO LSE clock output enable" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0. "OUT2_RMP,RTC_OUT2 mapping" "B_0x0,B_0x1" group.long 0x70++0x7 line.long 0x0 "RTC_ALRABINR,RTC alarm A binary mode register" hexmask.long 0x0 0.--31. 1. "SS,Synchronous counter alarm value in Binary mode" line.long 0x4 "RTC_ALRBBINR,RTC alarm B binary mode register" hexmask.long 0x4 0.--31. 1. "SS,Synchronous counter alarm value in Binary mode" group.long 0x80++0x17 line.long 0x0 "RTC_R0CIDCFGR,RTC Resource 0 CID configuration register" bitfld.long 0x0 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x4 "RTC_R1CIDCFGR,RTC Resource 1 CID configuration register" bitfld.long 0x4 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x8 "RTC_R2CIDCFGR,RTC Resource 2 CID configuration register" bitfld.long 0x8 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0xC "RTC_R3CIDCFGR,RTC Resource 3 CID configuration register" bitfld.long 0xC 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x10 "RTC_R4CIDCFGR,RTC Resource 4 CID configuration register" bitfld.long 0x10 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x14 "RTC_R5CIDCFGR,RTC Resource 5 CID configuration register" bitfld.long 0x14 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "RTC_HWCFGR2,RTC hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CID_WIDTH,CID length" hexmask.long.byte 0x0 4.--7. 1. "RIF,CID compartment filtering" line.long 0x4 "RTC_HWCFGR1,RTC hardware configuration register" hexmask.long.byte 0x4 28.--31. 1. "BINARY,Binary mode" hexmask.long.byte 0x4 24.--27. 1. "TRUST_ZONE,Trust zone" hexmask.long.byte 0x4 16.--23. 1. "OPTIONREG_OUT,2: Configuration register bits 1:0 implemented" hexmask.long.byte 0x4 12.--15. 1. "TIMESTAMP" hexmask.long.byte 0x4 8.--11. 1. "SMOOTH_CALIB" hexmask.long.byte 0x4 4.--7. 1. "WAKEUP" newline hexmask.long.byte 0x4 0.--3. 1. "ALARMB" line.long 0x8 "RTC_VERR,RTC version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "RTC_IPIDR,RTC identification register" hexmask.long 0xC 0.--31. 1. "ID,Identifier" line.long 0x10 "RTC_SIDR,RTC size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identifier" tree.end endif tree.end sif (cpuis("*CA35")||cpuis("*CM33F")) tree "SAES (Secure AES Coprocessor)" base ad:0x0 tree "SAES" base ad:0x42050000 group.long 0x0++0x3 line.long 0x0 "SAES_CR,SAES control register" bitfld.long 0x0 31. "IPRST,SAES peripheral software reset" "0,1" bitfld.long 0x0 28.--30. "KEYSEL,Key selection" "B_0x0,B_0x1,B_0x2,?,B_0x4,?,?,B_0x7" bitfld.long 0x0 26.--27. "KSHAREID,Key share identification" "B_0x0,B_0x1,?,?" bitfld.long 0x0 24.--25. "KMOD,Key mode selection" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0x0 20.--23. 1. "NPBLB,Number of padding bytes in last block" bitfld.long 0x0 19. "KEYPROT,Key protection" "B_0x0,B_0x1" bitfld.long 0x0 18. "KEYSIZE,Key size selection" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "CHMOD_1,CHMOD[2]" "0,1" bitfld.long 0x0 13.--14. "GCMPH,GCM or CCM phase selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "DMAOUTEN,DMA output enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "DMAINEN,DMA input enable" "B_0x0,B_0x1" bitfld.long 0x0 5.--6. "CHMOD,CHMOD[1:0]: Chaining mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3.--4. "MODE,SAES operating mode" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 1.--2. "DATATYPE,Data type selection" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "EN,SAES enable" "B_0x0,B_0x1" rgroup.long 0x4++0x3 line.long 0x0 "SAES_SR,SAES status register" bitfld.long 0x0 7. "KEYVALID,Key Valid flag" "B_0x0,B_0x1" bitfld.long 0x0 3. "BUSY,Busy" "B_0x0,B_0x1" bitfld.long 0x0 2. "WRERR,Write error" "B_0x0,B_0x1" bitfld.long 0x0 1. "RDERR,Read error flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "CCF,Computation completed flag" "0,1" wgroup.long 0x8++0x3 line.long 0x0 "SAES_DINR,SAES data input register" hexmask.long 0x0 0.--31. 1. "DIN,Input data word" rgroup.long 0xC++0x3 line.long 0x0 "SAES_DOUTR,SAES data output register" hexmask.long 0x0 0.--31. 1. "DOUT,Output data word" wgroup.long 0x10++0xF line.long 0x0 "SAES_KEYR0,SAES key register 0" hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key bits [31:0]" line.long 0x4 "SAES_KEYR1,SAES key register 1" hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key bits [63:32]" line.long 0x8 "SAES_KEYR2,SAES key register 2" hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key bits [95:64]" line.long 0xC "SAES_KEYR3,SAES key register 3" hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key bits [127:96]" group.long 0x20++0xF line.long 0x0 "SAES_IVR0,SAES initialization vector register 0" hexmask.long 0x0 0.--31. 1. "IVI,Initialization vector input bits [31:0]" line.long 0x4 "SAES_IVR1,SAES initialization vector register 1" hexmask.long 0x4 0.--31. 1. "IVI,Initialization vector input bits [63:32]" line.long 0x8 "SAES_IVR2,SAES initialization vector register 2" hexmask.long 0x8 0.--31. 1. "IVI,Initialization vector input bits [95:64]" line.long 0xC "SAES_IVR3,SAES initialization vector register 3" hexmask.long 0xC 0.--31. 1. "IVI,Initialization vector input bits [127:96]" wgroup.long 0x30++0xF line.long 0x0 "SAES_KEYR4,SAES key register 4" hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key bits [159:128]" line.long 0x4 "SAES_KEYR5,SAES key register 5" hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key bits [191:160]" line.long 0x8 "SAES_KEYR6,SAES key register 6" hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key bits [223:192]" line.long 0xC "SAES_KEYR7,SAES key register 7" hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key bits [255:224]" group.long 0x40++0x1F line.long 0x0 "SAES_SUSP0R,SAES suspend registers" hexmask.long 0x0 0.--31. 1. "SUSP,SAES suspend" line.long 0x4 "SAES_SUSP1R,SAES suspend registers" hexmask.long 0x4 0.--31. 1. "SUSP,SAES suspend" line.long 0x8 "SAES_SUSP2R,SAES suspend registers" hexmask.long 0x8 0.--31. 1. "SUSP,SAES suspend" line.long 0xC "SAES_SUSP3R,SAES suspend registers" hexmask.long 0xC 0.--31. 1. "SUSP,SAES suspend" line.long 0x10 "SAES_SUSP4R,SAES suspend registers" hexmask.long 0x10 0.--31. 1. "SUSP,SAES suspend" line.long 0x14 "SAES_SUSP5R,SAES suspend registers" hexmask.long 0x14 0.--31. 1. "SUSP,SAES suspend" line.long 0x18 "SAES_SUSP6R,SAES suspend registers" hexmask.long 0x18 0.--31. 1. "SUSP,SAES suspend" line.long 0x1C "SAES_SUSP7R,SAES suspend registers" hexmask.long 0x1C 0.--31. 1. "SUSP,SAES suspend" group.long 0x300++0x3 line.long 0x0 "SAES_IER,SAES interrupt enable register" bitfld.long 0x0 3. "RNGEIE,RNG error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "KEIE,Key error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "RWEIE,Read or write error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CCFIE,Computation complete flag interrupt enable" "B_0x0,B_0x1" rgroup.long 0x304++0x3 line.long 0x0 "SAES_ISR,SAES interrupt status register" bitfld.long 0x0 3. "RNGEIF,RNG error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "KEIF,Key error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "CCF,Computation complete flag" "B_0x0,B_0x1" wgroup.long 0x308++0x3 line.long 0x0 "SAES_ICR,SAES interrupt clear register" bitfld.long 0x0 3. "RNGEIF,RNG error interrupt flag clear" "0,1" bitfld.long 0x0 2. "KEIF,Key error interrupt flag clear" "0,1" bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag clear" "0,1" bitfld.long 0x0 0. "CCF,Computation complete flag clear" "0,1" rgroup.long 0x3F4++0xB line.long 0x0 "SAES_VERR,SAES version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x0 0.--3. 1. "MINREV,Minor revision" line.long 0x4 "SAES_IPIDR,SAES identification register" hexmask.long 0x4 0.--31. 1. "ID,Identification code of the peripheral" line.long 0x8 "SAES_SIDR,SAES size ID register" hexmask.long 0x8 0.--31. 1. "SID,Size identification code" tree.end tree "SAES_S" base ad:0x52050000 group.long 0x0++0x3 line.long 0x0 "SAES_CR,SAES control register" bitfld.long 0x0 31. "IPRST,SAES peripheral software reset" "0,1" bitfld.long 0x0 28.--30. "KEYSEL,Key selection" "B_0x0,B_0x1,B_0x2,?,B_0x4,?,?,B_0x7" bitfld.long 0x0 26.--27. "KSHAREID,Key share identification" "B_0x0,B_0x1,?,?" bitfld.long 0x0 24.--25. "KMOD,Key mode selection" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0x0 20.--23. 1. "NPBLB,Number of padding bytes in last block" bitfld.long 0x0 19. "KEYPROT,Key protection" "B_0x0,B_0x1" bitfld.long 0x0 18. "KEYSIZE,Key size selection" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "CHMOD_1,CHMOD[2]" "0,1" bitfld.long 0x0 13.--14. "GCMPH,GCM or CCM phase selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "DMAOUTEN,DMA output enable" "B_0x0,B_0x1" bitfld.long 0x0 11. "DMAINEN,DMA input enable" "B_0x0,B_0x1" bitfld.long 0x0 5.--6. "CHMOD,CHMOD[1:0]: Chaining mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3.--4. "MODE,SAES operating mode" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 1.--2. "DATATYPE,Data type selection" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0. "EN,SAES enable" "B_0x0,B_0x1" rgroup.long 0x4++0x3 line.long 0x0 "SAES_SR,SAES status register" bitfld.long 0x0 7. "KEYVALID,Key Valid flag" "B_0x0,B_0x1" bitfld.long 0x0 3. "BUSY,Busy" "B_0x0,B_0x1" bitfld.long 0x0 2. "WRERR,Write error" "B_0x0,B_0x1" bitfld.long 0x0 1. "RDERR,Read error flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "CCF,Computation completed flag" "0,1" wgroup.long 0x8++0x3 line.long 0x0 "SAES_DINR,SAES data input register" hexmask.long 0x0 0.--31. 1. "DIN,Input data word" rgroup.long 0xC++0x3 line.long 0x0 "SAES_DOUTR,SAES data output register" hexmask.long 0x0 0.--31. 1. "DOUT,Output data word" wgroup.long 0x10++0xF line.long 0x0 "SAES_KEYR0,SAES key register 0" hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key bits [31:0]" line.long 0x4 "SAES_KEYR1,SAES key register 1" hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key bits [63:32]" line.long 0x8 "SAES_KEYR2,SAES key register 2" hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key bits [95:64]" line.long 0xC "SAES_KEYR3,SAES key register 3" hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key bits [127:96]" group.long 0x20++0xF line.long 0x0 "SAES_IVR0,SAES initialization vector register 0" hexmask.long 0x0 0.--31. 1. "IVI,Initialization vector input bits [31:0]" line.long 0x4 "SAES_IVR1,SAES initialization vector register 1" hexmask.long 0x4 0.--31. 1. "IVI,Initialization vector input bits [63:32]" line.long 0x8 "SAES_IVR2,SAES initialization vector register 2" hexmask.long 0x8 0.--31. 1. "IVI,Initialization vector input bits [95:64]" line.long 0xC "SAES_IVR3,SAES initialization vector register 3" hexmask.long 0xC 0.--31. 1. "IVI,Initialization vector input bits [127:96]" wgroup.long 0x30++0xF line.long 0x0 "SAES_KEYR4,SAES key register 4" hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key bits [159:128]" line.long 0x4 "SAES_KEYR5,SAES key register 5" hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key bits [191:160]" line.long 0x8 "SAES_KEYR6,SAES key register 6" hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key bits [223:192]" line.long 0xC "SAES_KEYR7,SAES key register 7" hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key bits [255:224]" group.long 0x40++0x1F line.long 0x0 "SAES_SUSP0R,SAES suspend registers" hexmask.long 0x0 0.--31. 1. "SUSP,SAES suspend" line.long 0x4 "SAES_SUSP1R,SAES suspend registers" hexmask.long 0x4 0.--31. 1. "SUSP,SAES suspend" line.long 0x8 "SAES_SUSP2R,SAES suspend registers" hexmask.long 0x8 0.--31. 1. "SUSP,SAES suspend" line.long 0xC "SAES_SUSP3R,SAES suspend registers" hexmask.long 0xC 0.--31. 1. "SUSP,SAES suspend" line.long 0x10 "SAES_SUSP4R,SAES suspend registers" hexmask.long 0x10 0.--31. 1. "SUSP,SAES suspend" line.long 0x14 "SAES_SUSP5R,SAES suspend registers" hexmask.long 0x14 0.--31. 1. "SUSP,SAES suspend" line.long 0x18 "SAES_SUSP6R,SAES suspend registers" hexmask.long 0x18 0.--31. 1. "SUSP,SAES suspend" line.long 0x1C "SAES_SUSP7R,SAES suspend registers" hexmask.long 0x1C 0.--31. 1. "SUSP,SAES suspend" group.long 0x300++0x3 line.long 0x0 "SAES_IER,SAES interrupt enable register" bitfld.long 0x0 3. "RNGEIE,RNG error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "KEIE,Key error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "RWEIE,Read or write error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CCFIE,Computation complete flag interrupt enable" "B_0x0,B_0x1" rgroup.long 0x304++0x3 line.long 0x0 "SAES_ISR,SAES interrupt status register" bitfld.long 0x0 3. "RNGEIF,RNG error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 2. "KEIF,Key error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 0. "CCF,Computation complete flag" "B_0x0,B_0x1" wgroup.long 0x308++0x3 line.long 0x0 "SAES_ICR,SAES interrupt clear register" bitfld.long 0x0 3. "RNGEIF,RNG error interrupt flag clear" "0,1" bitfld.long 0x0 2. "KEIF,Key error interrupt flag clear" "0,1" bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag clear" "0,1" bitfld.long 0x0 0. "CCF,Computation complete flag clear" "0,1" rgroup.long 0x3F4++0xB line.long 0x0 "SAES_VERR,SAES version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x0 0.--3. 1. "MINREV,Minor revision" line.long 0x4 "SAES_IPIDR,SAES identification register" hexmask.long 0x4 0.--31. 1. "ID,Identification code of the peripheral" line.long 0x8 "SAES_SIDR,SAES size ID register" hexmask.long 0x8 0.--31. 1. "SID,Size identification code" tree.end tree.end tree "SAI (Serial Audio Interface)" base ad:0x0 tree "SAI" base ad:0x40290000 group.long 0x0++0x17 line.long 0x0 "SAI_GCR,SAI global configuration register" bitfld.long 0x0 4.--5. "SYNCOUT,Synchronization outputs" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "SYNCIN,Synchronization inputs" "0,1,2,3" line.long 0x4 "SAI_ACR1,SAI configuration register 1" bitfld.long 0x4 27. "MCKEN,Master clock generation enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "OSR,Oversampling ratio for master clock" "B_0x0,B_0x1" hexmask.long.byte 0x4 20.--25. 1. "MCKDIV,Master clock divider" bitfld.long 0x4 19. "NODIV,No divider" "B_0x0,B_0x1" bitfld.long 0x4 17. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "SAIEN,Audio block enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "OUTDRIV,Output drive" "B_0x0,B_0x1" bitfld.long 0x4 12. "MONO,Mono mode" "B_0x0,B_0x1" bitfld.long 0x4 10.--11. "SYNCEN,Synchronization enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 9. "CKSTR,Clock strobing edge" "B_0x0,B_0x1" bitfld.long 0x4 8. "LSBFIRST,Least significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 5.--7. "DS,Data size" "?,?,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 2.--3. "PRTCFG,Protocol configuration" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 0.--1. "MODE,SAIx audio block mode" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "SAI_ACR2,SAI configuration register 2" bitfld.long 0x8 14.--15. "COMP,Companding mode." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 13. "CPL,Complement bit." "B_0x0,B_0x1" hexmask.long.byte 0x8 7.--12. 1. "MUTECNT,Mute counter." bitfld.long 0x8 6. "MUTEVAL,Mute value." "B_0x0,B_0x1" bitfld.long 0x8 5. "MUTE,Mute." "B_0x0,B_0x1" bitfld.long 0x8 4. "TRIS,Tristate management on data line." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "FFLUSH,FIFO flush." "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "FTH,FIFO threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0xC "SAI_AFRCR,SAI frame configuration register" bitfld.long 0xC 18. "FSOFF,Frame synchronization offset." "B_0x0,B_0x1" bitfld.long 0xC 17. "FSPOL,Frame synchronization polarity." "B_0x0,B_0x1" rbitfld.long 0xC 16. "FSDEF,Frame synchronization definition." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--14. 1. "FSALL,Frame synchronization active level length." hexmask.long.byte 0xC 0.--7. 1. "FRL,Frame length." line.long 0x10 "SAI_ASLOTR,SAI slot register" hexmask.long.word 0x10 16.--31. 1. "SLOTEN,Slot enable." hexmask.long.byte 0x10 8.--11. 1. "NBSLOT,Number of slots in an audio frame." bitfld.long 0x10 6.--7. "SLOTSZ,Slot size" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0x10 0.--4. 1. "FBOFF,First bit offset" line.long 0x14 "SAI_AIM,SAI interrupt mask register" bitfld.long 0x14 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 4. "CNRDYIE,Codec not ready interrupt enable (AC’97)." "B_0x0,B_0x1" bitfld.long 0x14 3. "FREQIE,FIFO request interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 1. "MUTEDETIE,Mute detection interrupt enable." "B_0x0,B_0x1" newline bitfld.long 0x14 0. "OVRUDRIE,Overrun/underrun interrupt enable." "B_0x0,B_0x1" rgroup.long 0x18++0x3 line.long 0x0 "SAI_ASR,SAI status register" bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 4. "CNRDY,Codec not ready." "B_0x0,B_0x1" bitfld.long 0x0 3. "FREQ,FIFO request." "B_0x0,B_0x1" bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "MUTEDET,Mute detection." "B_0x0,B_0x1" bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "B_0x0,B_0x1" wgroup.long 0x1C++0x3 line.long 0x0 "SAI_ACLRFR,SAI clear flag register" bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1" bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1" bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1" bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1" bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1" bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1" group.long 0x20++0x17 line.long 0x0 "SAI_ADR,SAI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" line.long 0x4 "SAI_BCR1,SAI configuration register 1" bitfld.long 0x4 27. "MCKEN,Master clock generation enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "OSR,Oversampling ratio for master clock" "B_0x0,B_0x1" hexmask.long.byte 0x4 20.--25. 1. "MCKDIV,Master clock divider" bitfld.long 0x4 19. "NODIV,No divider" "B_0x0,B_0x1" bitfld.long 0x4 17. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "SAIEN,Audio block enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "OUTDRIV,Output drive" "B_0x0,B_0x1" bitfld.long 0x4 12. "MONO,Mono mode" "B_0x0,B_0x1" bitfld.long 0x4 10.--11. "SYNCEN,Synchronization enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 9. "CKSTR,Clock strobing edge" "B_0x0,B_0x1" bitfld.long 0x4 8. "LSBFIRST,Least significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 5.--7. "DS,Data size" "?,?,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 2.--3. "PRTCFG,Protocol configuration" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 0.--1. "MODE,SAIx audio block mode" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "SAI_BCR2,SAI configuration register 2" bitfld.long 0x8 14.--15. "COMP,Companding mode." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 13. "CPL,Complement bit." "B_0x0,B_0x1" hexmask.long.byte 0x8 7.--12. 1. "MUTECNT,Mute counter." bitfld.long 0x8 6. "MUTEVAL,Mute value." "B_0x0,B_0x1" bitfld.long 0x8 5. "MUTE,Mute." "B_0x0,B_0x1" bitfld.long 0x8 4. "TRIS,Tristate management on data line." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "FFLUSH,FIFO flush." "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "FTH,FIFO threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0xC "SAI_BFRCR,SAI frame configuration register" bitfld.long 0xC 18. "FSOFF,Frame synchronization offset." "B_0x0,B_0x1" bitfld.long 0xC 17. "FSPOL,Frame synchronization polarity." "B_0x0,B_0x1" rbitfld.long 0xC 16. "FSDEF,Frame synchronization definition." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--14. 1. "FSALL,Frame synchronization active level length." hexmask.long.byte 0xC 0.--7. 1. "FRL,Frame length." line.long 0x10 "SAI_BSLOTR,SAI slot register" hexmask.long.word 0x10 16.--31. 1. "SLOTEN,Slot enable." hexmask.long.byte 0x10 8.--11. 1. "NBSLOT,Number of slots in an audio frame." bitfld.long 0x10 6.--7. "SLOTSZ,Slot size" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0x10 0.--4. 1. "FBOFF,First bit offset" line.long 0x14 "SAI_BIM,SAI interrupt mask register" bitfld.long 0x14 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 4. "CNRDYIE,Codec not ready interrupt enable (AC’97)." "B_0x0,B_0x1" bitfld.long 0x14 3. "FREQIE,FIFO request interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 1. "MUTEDETIE,Mute detection interrupt enable." "B_0x0,B_0x1" newline bitfld.long 0x14 0. "OVRUDRIE,Overrun/underrun interrupt enable." "B_0x0,B_0x1" rgroup.long 0x38++0x3 line.long 0x0 "SAI_BSR,SAI status register" bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 4. "CNRDY,Codec not ready." "B_0x0,B_0x1" bitfld.long 0x0 3. "FREQ,FIFO request." "B_0x0,B_0x1" bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "MUTEDET,Mute detection." "B_0x0,B_0x1" bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "B_0x0,B_0x1" wgroup.long 0x3C++0x3 line.long 0x0 "SAI_BCLRFR,SAI clear flag register" bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1" bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1" bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1" bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1" bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1" bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1" group.long 0x40++0xB line.long 0x0 "SAI_BDR,SAI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" line.long 0x4 "SAI_PDMCR,SAI PDM control register" bitfld.long 0x4 9. "CKEN2,Clock enable of bitstream clock number 2" "B_0x0,B_0x1" bitfld.long 0x4 8. "CKEN1,Clock enable of bitstream clock number 1" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "MICNBR,Number of microphones" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0. "PDMEN,PDM enable" "B_0x0,B_0x1" line.long 0x8 "SAI_PDMDLY,SAI PDM delay register" bitfld.long 0x8 28.--30. "DLYM4R,Delay line for second microphone of pair 4" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 24.--26. "DLYM4L,Delay line for first microphone of pair 4" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 20.--22. "DLYM3R,Delay line for second microphone of pair 3" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 16.--18. "DLYM3L,Delay line for first microphone of pair 3" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 12.--14. "DLYM2R,Delay line for second microphone of pair 2" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 8.--10. "DLYM2L,Delay line for first microphone of pair 2" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" newline bitfld.long 0x8 4.--6. "DLYM1R,Delay line adjust for second microphone of pair 1" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 0.--2. "DLYM1L,Delay line adjust for first microphone of pair 1" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" rgroup.long 0x3F0++0xF line.long 0x0 "SAI_HWCFGR,SAI hardware configuration register" hexmask.long.byte 0x0 12.--19. 1. "OPTION_REGOUT,Support of SAI_IOR register" hexmask.long.byte 0x0 8.--11. 1. "SPDIF_PDM,Support of SPDIF-OUT and PDM interfaces" hexmask.long.byte 0x0 0.--7. 1. "FIFO_SIZE,FIFO size for SAIA and SAIB" line.long 0x4 "SAI_VERR,SAI version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,SAI major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,SAI minor revision" line.long 0x8 "SAI_IPIDR,SAI identification register" hexmask.long 0x8 0.--31. 1. "ID,SAI identifier" line.long 0xC "SAI_SIDR,SAI size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification" tree.end tree "SAI1_S" base ad:0x50290000 group.long 0x0++0x17 line.long 0x0 "SAI_GCR,SAI global configuration register" bitfld.long 0x0 4.--5. "SYNCOUT,Synchronization outputs" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "SYNCIN,Synchronization inputs" "0,1,2,3" line.long 0x4 "SAI_ACR1,SAI configuration register 1" bitfld.long 0x4 27. "MCKEN,Master clock generation enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "OSR,Oversampling ratio for master clock" "B_0x0,B_0x1" hexmask.long.byte 0x4 20.--25. 1. "MCKDIV,Master clock divider" bitfld.long 0x4 19. "NODIV,No divider" "B_0x0,B_0x1" bitfld.long 0x4 17. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "SAIEN,Audio block enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "OUTDRIV,Output drive" "B_0x0,B_0x1" bitfld.long 0x4 12. "MONO,Mono mode" "B_0x0,B_0x1" bitfld.long 0x4 10.--11. "SYNCEN,Synchronization enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 9. "CKSTR,Clock strobing edge" "B_0x0,B_0x1" bitfld.long 0x4 8. "LSBFIRST,Least significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 5.--7. "DS,Data size" "?,?,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 2.--3. "PRTCFG,Protocol configuration" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 0.--1. "MODE,SAIx audio block mode" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "SAI_ACR2,SAI configuration register 2" bitfld.long 0x8 14.--15. "COMP,Companding mode." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 13. "CPL,Complement bit." "B_0x0,B_0x1" hexmask.long.byte 0x8 7.--12. 1. "MUTECNT,Mute counter." bitfld.long 0x8 6. "MUTEVAL,Mute value." "B_0x0,B_0x1" bitfld.long 0x8 5. "MUTE,Mute." "B_0x0,B_0x1" bitfld.long 0x8 4. "TRIS,Tristate management on data line." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "FFLUSH,FIFO flush." "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "FTH,FIFO threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0xC "SAI_AFRCR,SAI frame configuration register" bitfld.long 0xC 18. "FSOFF,Frame synchronization offset." "B_0x0,B_0x1" bitfld.long 0xC 17. "FSPOL,Frame synchronization polarity." "B_0x0,B_0x1" rbitfld.long 0xC 16. "FSDEF,Frame synchronization definition." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--14. 1. "FSALL,Frame synchronization active level length." hexmask.long.byte 0xC 0.--7. 1. "FRL,Frame length." line.long 0x10 "SAI_ASLOTR,SAI slot register" hexmask.long.word 0x10 16.--31. 1. "SLOTEN,Slot enable." hexmask.long.byte 0x10 8.--11. 1. "NBSLOT,Number of slots in an audio frame." bitfld.long 0x10 6.--7. "SLOTSZ,Slot size" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0x10 0.--4. 1. "FBOFF,First bit offset" line.long 0x14 "SAI_AIM,SAI interrupt mask register" bitfld.long 0x14 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 4. "CNRDYIE,Codec not ready interrupt enable (AC’97)." "B_0x0,B_0x1" bitfld.long 0x14 3. "FREQIE,FIFO request interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 1. "MUTEDETIE,Mute detection interrupt enable." "B_0x0,B_0x1" newline bitfld.long 0x14 0. "OVRUDRIE,Overrun/underrun interrupt enable." "B_0x0,B_0x1" rgroup.long 0x18++0x3 line.long 0x0 "SAI_ASR,SAI status register" bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 4. "CNRDY,Codec not ready." "B_0x0,B_0x1" bitfld.long 0x0 3. "FREQ,FIFO request." "B_0x0,B_0x1" bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "MUTEDET,Mute detection." "B_0x0,B_0x1" bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "B_0x0,B_0x1" wgroup.long 0x1C++0x3 line.long 0x0 "SAI_ACLRFR,SAI clear flag register" bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1" bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1" bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1" bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1" bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1" bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1" group.long 0x20++0x17 line.long 0x0 "SAI_ADR,SAI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" line.long 0x4 "SAI_BCR1,SAI configuration register 1" bitfld.long 0x4 27. "MCKEN,Master clock generation enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "OSR,Oversampling ratio for master clock" "B_0x0,B_0x1" hexmask.long.byte 0x4 20.--25. 1. "MCKDIV,Master clock divider" bitfld.long 0x4 19. "NODIV,No divider" "B_0x0,B_0x1" bitfld.long 0x4 17. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "SAIEN,Audio block enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "OUTDRIV,Output drive" "B_0x0,B_0x1" bitfld.long 0x4 12. "MONO,Mono mode" "B_0x0,B_0x1" bitfld.long 0x4 10.--11. "SYNCEN,Synchronization enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 9. "CKSTR,Clock strobing edge" "B_0x0,B_0x1" bitfld.long 0x4 8. "LSBFIRST,Least significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 5.--7. "DS,Data size" "?,?,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 2.--3. "PRTCFG,Protocol configuration" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 0.--1. "MODE,SAIx audio block mode" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "SAI_BCR2,SAI configuration register 2" bitfld.long 0x8 14.--15. "COMP,Companding mode." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 13. "CPL,Complement bit." "B_0x0,B_0x1" hexmask.long.byte 0x8 7.--12. 1. "MUTECNT,Mute counter." bitfld.long 0x8 6. "MUTEVAL,Mute value." "B_0x0,B_0x1" bitfld.long 0x8 5. "MUTE,Mute." "B_0x0,B_0x1" bitfld.long 0x8 4. "TRIS,Tristate management on data line." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "FFLUSH,FIFO flush." "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "FTH,FIFO threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0xC "SAI_BFRCR,SAI frame configuration register" bitfld.long 0xC 18. "FSOFF,Frame synchronization offset." "B_0x0,B_0x1" bitfld.long 0xC 17. "FSPOL,Frame synchronization polarity." "B_0x0,B_0x1" rbitfld.long 0xC 16. "FSDEF,Frame synchronization definition." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--14. 1. "FSALL,Frame synchronization active level length." hexmask.long.byte 0xC 0.--7. 1. "FRL,Frame length." line.long 0x10 "SAI_BSLOTR,SAI slot register" hexmask.long.word 0x10 16.--31. 1. "SLOTEN,Slot enable." hexmask.long.byte 0x10 8.--11. 1. "NBSLOT,Number of slots in an audio frame." bitfld.long 0x10 6.--7. "SLOTSZ,Slot size" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0x10 0.--4. 1. "FBOFF,First bit offset" line.long 0x14 "SAI_BIM,SAI interrupt mask register" bitfld.long 0x14 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 4. "CNRDYIE,Codec not ready interrupt enable (AC’97)." "B_0x0,B_0x1" bitfld.long 0x14 3. "FREQIE,FIFO request interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 1. "MUTEDETIE,Mute detection interrupt enable." "B_0x0,B_0x1" newline bitfld.long 0x14 0. "OVRUDRIE,Overrun/underrun interrupt enable." "B_0x0,B_0x1" rgroup.long 0x38++0x3 line.long 0x0 "SAI_BSR,SAI status register" bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 4. "CNRDY,Codec not ready." "B_0x0,B_0x1" bitfld.long 0x0 3. "FREQ,FIFO request." "B_0x0,B_0x1" bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "MUTEDET,Mute detection." "B_0x0,B_0x1" bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "B_0x0,B_0x1" wgroup.long 0x3C++0x3 line.long 0x0 "SAI_BCLRFR,SAI clear flag register" bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1" bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1" bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1" bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1" bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1" bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1" group.long 0x40++0xB line.long 0x0 "SAI_BDR,SAI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" line.long 0x4 "SAI_PDMCR,SAI PDM control register" bitfld.long 0x4 9. "CKEN2,Clock enable of bitstream clock number 2" "B_0x0,B_0x1" bitfld.long 0x4 8. "CKEN1,Clock enable of bitstream clock number 1" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "MICNBR,Number of microphones" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0. "PDMEN,PDM enable" "B_0x0,B_0x1" line.long 0x8 "SAI_PDMDLY,SAI PDM delay register" bitfld.long 0x8 28.--30. "DLYM4R,Delay line for second microphone of pair 4" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 24.--26. "DLYM4L,Delay line for first microphone of pair 4" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 20.--22. "DLYM3R,Delay line for second microphone of pair 3" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 16.--18. "DLYM3L,Delay line for first microphone of pair 3" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 12.--14. "DLYM2R,Delay line for second microphone of pair 2" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 8.--10. "DLYM2L,Delay line for first microphone of pair 2" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" newline bitfld.long 0x8 4.--6. "DLYM1R,Delay line adjust for second microphone of pair 1" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 0.--2. "DLYM1L,Delay line adjust for first microphone of pair 1" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" rgroup.long 0x3F0++0xF line.long 0x0 "SAI_HWCFGR,SAI hardware configuration register" hexmask.long.byte 0x0 12.--19. 1. "OPTION_REGOUT,Support of SAI_IOR register" hexmask.long.byte 0x0 8.--11. 1. "SPDIF_PDM,Support of SPDIF-OUT and PDM interfaces" hexmask.long.byte 0x0 0.--7. 1. "FIFO_SIZE,FIFO size for SAIA and SAIB" line.long 0x4 "SAI_VERR,SAI version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,SAI major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,SAI minor revision" line.long 0x8 "SAI_IPIDR,SAI identification register" hexmask.long 0x8 0.--31. 1. "ID,SAI identifier" line.long 0xC "SAI_SIDR,SAI size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification" tree.end tree "SAI2" base ad:0x402A0000 group.long 0x0++0x17 line.long 0x0 "SAI_GCR,SAI global configuration register" bitfld.long 0x0 4.--5. "SYNCOUT,Synchronization outputs" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "SYNCIN,Synchronization inputs" "0,1,2,3" line.long 0x4 "SAI_ACR1,SAI configuration register 1" bitfld.long 0x4 27. "MCKEN,Master clock generation enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "OSR,Oversampling ratio for master clock" "B_0x0,B_0x1" hexmask.long.byte 0x4 20.--25. 1. "MCKDIV,Master clock divider" bitfld.long 0x4 19. "NODIV,No divider" "B_0x0,B_0x1" bitfld.long 0x4 17. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "SAIEN,Audio block enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "OUTDRIV,Output drive" "B_0x0,B_0x1" bitfld.long 0x4 12. "MONO,Mono mode" "B_0x0,B_0x1" bitfld.long 0x4 10.--11. "SYNCEN,Synchronization enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 9. "CKSTR,Clock strobing edge" "B_0x0,B_0x1" bitfld.long 0x4 8. "LSBFIRST,Least significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 5.--7. "DS,Data size" "?,?,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 2.--3. "PRTCFG,Protocol configuration" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 0.--1. "MODE,SAIx audio block mode" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "SAI_ACR2,SAI configuration register 2" bitfld.long 0x8 14.--15. "COMP,Companding mode." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 13. "CPL,Complement bit." "B_0x0,B_0x1" hexmask.long.byte 0x8 7.--12. 1. "MUTECNT,Mute counter." bitfld.long 0x8 6. "MUTEVAL,Mute value." "B_0x0,B_0x1" bitfld.long 0x8 5. "MUTE,Mute." "B_0x0,B_0x1" bitfld.long 0x8 4. "TRIS,Tristate management on data line." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "FFLUSH,FIFO flush." "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "FTH,FIFO threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0xC "SAI_AFRCR,SAI frame configuration register" bitfld.long 0xC 18. "FSOFF,Frame synchronization offset." "B_0x0,B_0x1" bitfld.long 0xC 17. "FSPOL,Frame synchronization polarity." "B_0x0,B_0x1" rbitfld.long 0xC 16. "FSDEF,Frame synchronization definition." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--14. 1. "FSALL,Frame synchronization active level length." hexmask.long.byte 0xC 0.--7. 1. "FRL,Frame length." line.long 0x10 "SAI_ASLOTR,SAI slot register" hexmask.long.word 0x10 16.--31. 1. "SLOTEN,Slot enable." hexmask.long.byte 0x10 8.--11. 1. "NBSLOT,Number of slots in an audio frame." bitfld.long 0x10 6.--7. "SLOTSZ,Slot size" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0x10 0.--4. 1. "FBOFF,First bit offset" line.long 0x14 "SAI_AIM,SAI interrupt mask register" bitfld.long 0x14 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 4. "CNRDYIE,Codec not ready interrupt enable (AC’97)." "B_0x0,B_0x1" bitfld.long 0x14 3. "FREQIE,FIFO request interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 1. "MUTEDETIE,Mute detection interrupt enable." "B_0x0,B_0x1" newline bitfld.long 0x14 0. "OVRUDRIE,Overrun/underrun interrupt enable." "B_0x0,B_0x1" rgroup.long 0x18++0x3 line.long 0x0 "SAI_ASR,SAI status register" bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 4. "CNRDY,Codec not ready." "B_0x0,B_0x1" bitfld.long 0x0 3. "FREQ,FIFO request." "B_0x0,B_0x1" bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "MUTEDET,Mute detection." "B_0x0,B_0x1" bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "B_0x0,B_0x1" wgroup.long 0x1C++0x3 line.long 0x0 "SAI_ACLRFR,SAI clear flag register" bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1" bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1" bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1" bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1" bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1" bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1" group.long 0x20++0x17 line.long 0x0 "SAI_ADR,SAI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" line.long 0x4 "SAI_BCR1,SAI configuration register 1" bitfld.long 0x4 27. "MCKEN,Master clock generation enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "OSR,Oversampling ratio for master clock" "B_0x0,B_0x1" hexmask.long.byte 0x4 20.--25. 1. "MCKDIV,Master clock divider" bitfld.long 0x4 19. "NODIV,No divider" "B_0x0,B_0x1" bitfld.long 0x4 17. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "SAIEN,Audio block enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "OUTDRIV,Output drive" "B_0x0,B_0x1" bitfld.long 0x4 12. "MONO,Mono mode" "B_0x0,B_0x1" bitfld.long 0x4 10.--11. "SYNCEN,Synchronization enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 9. "CKSTR,Clock strobing edge" "B_0x0,B_0x1" bitfld.long 0x4 8. "LSBFIRST,Least significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 5.--7. "DS,Data size" "?,?,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 2.--3. "PRTCFG,Protocol configuration" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 0.--1. "MODE,SAIx audio block mode" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "SAI_BCR2,SAI configuration register 2" bitfld.long 0x8 14.--15. "COMP,Companding mode." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 13. "CPL,Complement bit." "B_0x0,B_0x1" hexmask.long.byte 0x8 7.--12. 1. "MUTECNT,Mute counter." bitfld.long 0x8 6. "MUTEVAL,Mute value." "B_0x0,B_0x1" bitfld.long 0x8 5. "MUTE,Mute." "B_0x0,B_0x1" bitfld.long 0x8 4. "TRIS,Tristate management on data line." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "FFLUSH,FIFO flush." "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "FTH,FIFO threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0xC "SAI_BFRCR,SAI frame configuration register" bitfld.long 0xC 18. "FSOFF,Frame synchronization offset." "B_0x0,B_0x1" bitfld.long 0xC 17. "FSPOL,Frame synchronization polarity." "B_0x0,B_0x1" rbitfld.long 0xC 16. "FSDEF,Frame synchronization definition." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--14. 1. "FSALL,Frame synchronization active level length." hexmask.long.byte 0xC 0.--7. 1. "FRL,Frame length." line.long 0x10 "SAI_BSLOTR,SAI slot register" hexmask.long.word 0x10 16.--31. 1. "SLOTEN,Slot enable." hexmask.long.byte 0x10 8.--11. 1. "NBSLOT,Number of slots in an audio frame." bitfld.long 0x10 6.--7. "SLOTSZ,Slot size" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0x10 0.--4. 1. "FBOFF,First bit offset" line.long 0x14 "SAI_BIM,SAI interrupt mask register" bitfld.long 0x14 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 4. "CNRDYIE,Codec not ready interrupt enable (AC’97)." "B_0x0,B_0x1" bitfld.long 0x14 3. "FREQIE,FIFO request interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 1. "MUTEDETIE,Mute detection interrupt enable." "B_0x0,B_0x1" newline bitfld.long 0x14 0. "OVRUDRIE,Overrun/underrun interrupt enable." "B_0x0,B_0x1" rgroup.long 0x38++0x3 line.long 0x0 "SAI_BSR,SAI status register" bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 4. "CNRDY,Codec not ready." "B_0x0,B_0x1" bitfld.long 0x0 3. "FREQ,FIFO request." "B_0x0,B_0x1" bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "MUTEDET,Mute detection." "B_0x0,B_0x1" bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "B_0x0,B_0x1" wgroup.long 0x3C++0x3 line.long 0x0 "SAI_BCLRFR,SAI clear flag register" bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1" bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1" bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1" bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1" bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1" bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1" group.long 0x40++0xB line.long 0x0 "SAI_BDR,SAI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" line.long 0x4 "SAI_PDMCR,SAI PDM control register" bitfld.long 0x4 9. "CKEN2,Clock enable of bitstream clock number 2" "B_0x0,B_0x1" bitfld.long 0x4 8. "CKEN1,Clock enable of bitstream clock number 1" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "MICNBR,Number of microphones" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0. "PDMEN,PDM enable" "B_0x0,B_0x1" line.long 0x8 "SAI_PDMDLY,SAI PDM delay register" bitfld.long 0x8 28.--30. "DLYM4R,Delay line for second microphone of pair 4" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 24.--26. "DLYM4L,Delay line for first microphone of pair 4" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 20.--22. "DLYM3R,Delay line for second microphone of pair 3" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 16.--18. "DLYM3L,Delay line for first microphone of pair 3" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 12.--14. "DLYM2R,Delay line for second microphone of pair 2" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 8.--10. "DLYM2L,Delay line for first microphone of pair 2" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" newline bitfld.long 0x8 4.--6. "DLYM1R,Delay line adjust for second microphone of pair 1" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 0.--2. "DLYM1L,Delay line adjust for first microphone of pair 1" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" rgroup.long 0x3F0++0xF line.long 0x0 "SAI_HWCFGR,SAI hardware configuration register" hexmask.long.byte 0x0 12.--19. 1. "OPTION_REGOUT,Support of SAI_IOR register" hexmask.long.byte 0x0 8.--11. 1. "SPDIF_PDM,Support of SPDIF-OUT and PDM interfaces" hexmask.long.byte 0x0 0.--7. 1. "FIFO_SIZE,FIFO size for SAIA and SAIB" line.long 0x4 "SAI_VERR,SAI version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,SAI major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,SAI minor revision" line.long 0x8 "SAI_IPIDR,SAI identification register" hexmask.long 0x8 0.--31. 1. "ID,SAI identifier" line.long 0xC "SAI_SIDR,SAI size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification" tree.end tree "SAI2_S" base ad:0x502A0000 group.long 0x0++0x17 line.long 0x0 "SAI_GCR,SAI global configuration register" bitfld.long 0x0 4.--5. "SYNCOUT,Synchronization outputs" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "SYNCIN,Synchronization inputs" "0,1,2,3" line.long 0x4 "SAI_ACR1,SAI configuration register 1" bitfld.long 0x4 27. "MCKEN,Master clock generation enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "OSR,Oversampling ratio for master clock" "B_0x0,B_0x1" hexmask.long.byte 0x4 20.--25. 1. "MCKDIV,Master clock divider" bitfld.long 0x4 19. "NODIV,No divider" "B_0x0,B_0x1" bitfld.long 0x4 17. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "SAIEN,Audio block enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "OUTDRIV,Output drive" "B_0x0,B_0x1" bitfld.long 0x4 12. "MONO,Mono mode" "B_0x0,B_0x1" bitfld.long 0x4 10.--11. "SYNCEN,Synchronization enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 9. "CKSTR,Clock strobing edge" "B_0x0,B_0x1" bitfld.long 0x4 8. "LSBFIRST,Least significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 5.--7. "DS,Data size" "?,?,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 2.--3. "PRTCFG,Protocol configuration" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 0.--1. "MODE,SAIx audio block mode" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "SAI_ACR2,SAI configuration register 2" bitfld.long 0x8 14.--15. "COMP,Companding mode." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 13. "CPL,Complement bit." "B_0x0,B_0x1" hexmask.long.byte 0x8 7.--12. 1. "MUTECNT,Mute counter." bitfld.long 0x8 6. "MUTEVAL,Mute value." "B_0x0,B_0x1" bitfld.long 0x8 5. "MUTE,Mute." "B_0x0,B_0x1" bitfld.long 0x8 4. "TRIS,Tristate management on data line." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "FFLUSH,FIFO flush." "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "FTH,FIFO threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0xC "SAI_AFRCR,SAI frame configuration register" bitfld.long 0xC 18. "FSOFF,Frame synchronization offset." "B_0x0,B_0x1" bitfld.long 0xC 17. "FSPOL,Frame synchronization polarity." "B_0x0,B_0x1" rbitfld.long 0xC 16. "FSDEF,Frame synchronization definition." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--14. 1. "FSALL,Frame synchronization active level length." hexmask.long.byte 0xC 0.--7. 1. "FRL,Frame length." line.long 0x10 "SAI_ASLOTR,SAI slot register" hexmask.long.word 0x10 16.--31. 1. "SLOTEN,Slot enable." hexmask.long.byte 0x10 8.--11. 1. "NBSLOT,Number of slots in an audio frame." bitfld.long 0x10 6.--7. "SLOTSZ,Slot size" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0x10 0.--4. 1. "FBOFF,First bit offset" line.long 0x14 "SAI_AIM,SAI interrupt mask register" bitfld.long 0x14 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 4. "CNRDYIE,Codec not ready interrupt enable (AC’97)." "B_0x0,B_0x1" bitfld.long 0x14 3. "FREQIE,FIFO request interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 1. "MUTEDETIE,Mute detection interrupt enable." "B_0x0,B_0x1" newline bitfld.long 0x14 0. "OVRUDRIE,Overrun/underrun interrupt enable." "B_0x0,B_0x1" rgroup.long 0x18++0x3 line.long 0x0 "SAI_ASR,SAI status register" bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 4. "CNRDY,Codec not ready." "B_0x0,B_0x1" bitfld.long 0x0 3. "FREQ,FIFO request." "B_0x0,B_0x1" bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "MUTEDET,Mute detection." "B_0x0,B_0x1" bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "B_0x0,B_0x1" wgroup.long 0x1C++0x3 line.long 0x0 "SAI_ACLRFR,SAI clear flag register" bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1" bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1" bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1" bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1" bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1" bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1" group.long 0x20++0x17 line.long 0x0 "SAI_ADR,SAI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" line.long 0x4 "SAI_BCR1,SAI configuration register 1" bitfld.long 0x4 27. "MCKEN,Master clock generation enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "OSR,Oversampling ratio for master clock" "B_0x0,B_0x1" hexmask.long.byte 0x4 20.--25. 1. "MCKDIV,Master clock divider" bitfld.long 0x4 19. "NODIV,No divider" "B_0x0,B_0x1" bitfld.long 0x4 17. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "SAIEN,Audio block enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "OUTDRIV,Output drive" "B_0x0,B_0x1" bitfld.long 0x4 12. "MONO,Mono mode" "B_0x0,B_0x1" bitfld.long 0x4 10.--11. "SYNCEN,Synchronization enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 9. "CKSTR,Clock strobing edge" "B_0x0,B_0x1" bitfld.long 0x4 8. "LSBFIRST,Least significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 5.--7. "DS,Data size" "?,?,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 2.--3. "PRTCFG,Protocol configuration" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 0.--1. "MODE,SAIx audio block mode" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "SAI_BCR2,SAI configuration register 2" bitfld.long 0x8 14.--15. "COMP,Companding mode." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 13. "CPL,Complement bit." "B_0x0,B_0x1" hexmask.long.byte 0x8 7.--12. 1. "MUTECNT,Mute counter." bitfld.long 0x8 6. "MUTEVAL,Mute value." "B_0x0,B_0x1" bitfld.long 0x8 5. "MUTE,Mute." "B_0x0,B_0x1" bitfld.long 0x8 4. "TRIS,Tristate management on data line." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "FFLUSH,FIFO flush." "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "FTH,FIFO threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0xC "SAI_BFRCR,SAI frame configuration register" bitfld.long 0xC 18. "FSOFF,Frame synchronization offset." "B_0x0,B_0x1" bitfld.long 0xC 17. "FSPOL,Frame synchronization polarity." "B_0x0,B_0x1" rbitfld.long 0xC 16. "FSDEF,Frame synchronization definition." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--14. 1. "FSALL,Frame synchronization active level length." hexmask.long.byte 0xC 0.--7. 1. "FRL,Frame length." line.long 0x10 "SAI_BSLOTR,SAI slot register" hexmask.long.word 0x10 16.--31. 1. "SLOTEN,Slot enable." hexmask.long.byte 0x10 8.--11. 1. "NBSLOT,Number of slots in an audio frame." bitfld.long 0x10 6.--7. "SLOTSZ,Slot size" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0x10 0.--4. 1. "FBOFF,First bit offset" line.long 0x14 "SAI_BIM,SAI interrupt mask register" bitfld.long 0x14 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 4. "CNRDYIE,Codec not ready interrupt enable (AC’97)." "B_0x0,B_0x1" bitfld.long 0x14 3. "FREQIE,FIFO request interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 1. "MUTEDETIE,Mute detection interrupt enable." "B_0x0,B_0x1" newline bitfld.long 0x14 0. "OVRUDRIE,Overrun/underrun interrupt enable." "B_0x0,B_0x1" rgroup.long 0x38++0x3 line.long 0x0 "SAI_BSR,SAI status register" bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 4. "CNRDY,Codec not ready." "B_0x0,B_0x1" bitfld.long 0x0 3. "FREQ,FIFO request." "B_0x0,B_0x1" bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "MUTEDET,Mute detection." "B_0x0,B_0x1" bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "B_0x0,B_0x1" wgroup.long 0x3C++0x3 line.long 0x0 "SAI_BCLRFR,SAI clear flag register" bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1" bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1" bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1" bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1" bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1" bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1" group.long 0x40++0xB line.long 0x0 "SAI_BDR,SAI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" line.long 0x4 "SAI_PDMCR,SAI PDM control register" bitfld.long 0x4 9. "CKEN2,Clock enable of bitstream clock number 2" "B_0x0,B_0x1" bitfld.long 0x4 8. "CKEN1,Clock enable of bitstream clock number 1" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "MICNBR,Number of microphones" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0. "PDMEN,PDM enable" "B_0x0,B_0x1" line.long 0x8 "SAI_PDMDLY,SAI PDM delay register" bitfld.long 0x8 28.--30. "DLYM4R,Delay line for second microphone of pair 4" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 24.--26. "DLYM4L,Delay line for first microphone of pair 4" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 20.--22. "DLYM3R,Delay line for second microphone of pair 3" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 16.--18. "DLYM3L,Delay line for first microphone of pair 3" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 12.--14. "DLYM2R,Delay line for second microphone of pair 2" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 8.--10. "DLYM2L,Delay line for first microphone of pair 2" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" newline bitfld.long 0x8 4.--6. "DLYM1R,Delay line adjust for second microphone of pair 1" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 0.--2. "DLYM1L,Delay line adjust for first microphone of pair 1" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" rgroup.long 0x3F0++0xF line.long 0x0 "SAI_HWCFGR,SAI hardware configuration register" hexmask.long.byte 0x0 12.--19. 1. "OPTION_REGOUT,Support of SAI_IOR register" hexmask.long.byte 0x0 8.--11. 1. "SPDIF_PDM,Support of SPDIF-OUT and PDM interfaces" hexmask.long.byte 0x0 0.--7. 1. "FIFO_SIZE,FIFO size for SAIA and SAIB" line.long 0x4 "SAI_VERR,SAI version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,SAI major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,SAI minor revision" line.long 0x8 "SAI_IPIDR,SAI identification register" hexmask.long 0x8 0.--31. 1. "ID,SAI identifier" line.long 0xC "SAI_SIDR,SAI size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification" tree.end tree "SAI3" base ad:0x402B0000 group.long 0x0++0x17 line.long 0x0 "SAI_GCR,SAI global configuration register" bitfld.long 0x0 4.--5. "SYNCOUT,Synchronization outputs" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "SYNCIN,Synchronization inputs" "0,1,2,3" line.long 0x4 "SAI_ACR1,SAI configuration register 1" bitfld.long 0x4 27. "MCKEN,Master clock generation enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "OSR,Oversampling ratio for master clock" "B_0x0,B_0x1" hexmask.long.byte 0x4 20.--25. 1. "MCKDIV,Master clock divider" bitfld.long 0x4 19. "NODIV,No divider" "B_0x0,B_0x1" bitfld.long 0x4 17. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "SAIEN,Audio block enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "OUTDRIV,Output drive" "B_0x0,B_0x1" bitfld.long 0x4 12. "MONO,Mono mode" "B_0x0,B_0x1" bitfld.long 0x4 10.--11. "SYNCEN,Synchronization enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 9. "CKSTR,Clock strobing edge" "B_0x0,B_0x1" bitfld.long 0x4 8. "LSBFIRST,Least significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 5.--7. "DS,Data size" "?,?,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 2.--3. "PRTCFG,Protocol configuration" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 0.--1. "MODE,SAIx audio block mode" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "SAI_ACR2,SAI configuration register 2" bitfld.long 0x8 14.--15. "COMP,Companding mode." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 13. "CPL,Complement bit." "B_0x0,B_0x1" hexmask.long.byte 0x8 7.--12. 1. "MUTECNT,Mute counter." bitfld.long 0x8 6. "MUTEVAL,Mute value." "B_0x0,B_0x1" bitfld.long 0x8 5. "MUTE,Mute." "B_0x0,B_0x1" bitfld.long 0x8 4. "TRIS,Tristate management on data line." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "FFLUSH,FIFO flush." "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "FTH,FIFO threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0xC "SAI_AFRCR,SAI frame configuration register" bitfld.long 0xC 18. "FSOFF,Frame synchronization offset." "B_0x0,B_0x1" bitfld.long 0xC 17. "FSPOL,Frame synchronization polarity." "B_0x0,B_0x1" rbitfld.long 0xC 16. "FSDEF,Frame synchronization definition." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--14. 1. "FSALL,Frame synchronization active level length." hexmask.long.byte 0xC 0.--7. 1. "FRL,Frame length." line.long 0x10 "SAI_ASLOTR,SAI slot register" hexmask.long.word 0x10 16.--31. 1. "SLOTEN,Slot enable." hexmask.long.byte 0x10 8.--11. 1. "NBSLOT,Number of slots in an audio frame." bitfld.long 0x10 6.--7. "SLOTSZ,Slot size" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0x10 0.--4. 1. "FBOFF,First bit offset" line.long 0x14 "SAI_AIM,SAI interrupt mask register" bitfld.long 0x14 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 4. "CNRDYIE,Codec not ready interrupt enable (AC’97)." "B_0x0,B_0x1" bitfld.long 0x14 3. "FREQIE,FIFO request interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 1. "MUTEDETIE,Mute detection interrupt enable." "B_0x0,B_0x1" newline bitfld.long 0x14 0. "OVRUDRIE,Overrun/underrun interrupt enable." "B_0x0,B_0x1" rgroup.long 0x18++0x3 line.long 0x0 "SAI_ASR,SAI status register" bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 4. "CNRDY,Codec not ready." "B_0x0,B_0x1" bitfld.long 0x0 3. "FREQ,FIFO request." "B_0x0,B_0x1" bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "MUTEDET,Mute detection." "B_0x0,B_0x1" bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "B_0x0,B_0x1" wgroup.long 0x1C++0x3 line.long 0x0 "SAI_ACLRFR,SAI clear flag register" bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1" bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1" bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1" bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1" bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1" bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1" group.long 0x20++0x17 line.long 0x0 "SAI_ADR,SAI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" line.long 0x4 "SAI_BCR1,SAI configuration register 1" bitfld.long 0x4 27. "MCKEN,Master clock generation enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "OSR,Oversampling ratio for master clock" "B_0x0,B_0x1" hexmask.long.byte 0x4 20.--25. 1. "MCKDIV,Master clock divider" bitfld.long 0x4 19. "NODIV,No divider" "B_0x0,B_0x1" bitfld.long 0x4 17. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "SAIEN,Audio block enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "OUTDRIV,Output drive" "B_0x0,B_0x1" bitfld.long 0x4 12. "MONO,Mono mode" "B_0x0,B_0x1" bitfld.long 0x4 10.--11. "SYNCEN,Synchronization enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 9. "CKSTR,Clock strobing edge" "B_0x0,B_0x1" bitfld.long 0x4 8. "LSBFIRST,Least significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 5.--7. "DS,Data size" "?,?,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 2.--3. "PRTCFG,Protocol configuration" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 0.--1. "MODE,SAIx audio block mode" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "SAI_BCR2,SAI configuration register 2" bitfld.long 0x8 14.--15. "COMP,Companding mode." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 13. "CPL,Complement bit." "B_0x0,B_0x1" hexmask.long.byte 0x8 7.--12. 1. "MUTECNT,Mute counter." bitfld.long 0x8 6. "MUTEVAL,Mute value." "B_0x0,B_0x1" bitfld.long 0x8 5. "MUTE,Mute." "B_0x0,B_0x1" bitfld.long 0x8 4. "TRIS,Tristate management on data line." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "FFLUSH,FIFO flush." "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "FTH,FIFO threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0xC "SAI_BFRCR,SAI frame configuration register" bitfld.long 0xC 18. "FSOFF,Frame synchronization offset." "B_0x0,B_0x1" bitfld.long 0xC 17. "FSPOL,Frame synchronization polarity." "B_0x0,B_0x1" rbitfld.long 0xC 16. "FSDEF,Frame synchronization definition." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--14. 1. "FSALL,Frame synchronization active level length." hexmask.long.byte 0xC 0.--7. 1. "FRL,Frame length." line.long 0x10 "SAI_BSLOTR,SAI slot register" hexmask.long.word 0x10 16.--31. 1. "SLOTEN,Slot enable." hexmask.long.byte 0x10 8.--11. 1. "NBSLOT,Number of slots in an audio frame." bitfld.long 0x10 6.--7. "SLOTSZ,Slot size" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0x10 0.--4. 1. "FBOFF,First bit offset" line.long 0x14 "SAI_BIM,SAI interrupt mask register" bitfld.long 0x14 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 4. "CNRDYIE,Codec not ready interrupt enable (AC’97)." "B_0x0,B_0x1" bitfld.long 0x14 3. "FREQIE,FIFO request interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 1. "MUTEDETIE,Mute detection interrupt enable." "B_0x0,B_0x1" newline bitfld.long 0x14 0. "OVRUDRIE,Overrun/underrun interrupt enable." "B_0x0,B_0x1" rgroup.long 0x38++0x3 line.long 0x0 "SAI_BSR,SAI status register" bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 4. "CNRDY,Codec not ready." "B_0x0,B_0x1" bitfld.long 0x0 3. "FREQ,FIFO request." "B_0x0,B_0x1" bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "MUTEDET,Mute detection." "B_0x0,B_0x1" bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "B_0x0,B_0x1" wgroup.long 0x3C++0x3 line.long 0x0 "SAI_BCLRFR,SAI clear flag register" bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1" bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1" bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1" bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1" bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1" bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1" group.long 0x40++0xB line.long 0x0 "SAI_BDR,SAI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" line.long 0x4 "SAI_PDMCR,SAI PDM control register" bitfld.long 0x4 9. "CKEN2,Clock enable of bitstream clock number 2" "B_0x0,B_0x1" bitfld.long 0x4 8. "CKEN1,Clock enable of bitstream clock number 1" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "MICNBR,Number of microphones" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0. "PDMEN,PDM enable" "B_0x0,B_0x1" line.long 0x8 "SAI_PDMDLY,SAI PDM delay register" bitfld.long 0x8 28.--30. "DLYM4R,Delay line for second microphone of pair 4" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 24.--26. "DLYM4L,Delay line for first microphone of pair 4" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 20.--22. "DLYM3R,Delay line for second microphone of pair 3" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 16.--18. "DLYM3L,Delay line for first microphone of pair 3" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 12.--14. "DLYM2R,Delay line for second microphone of pair 2" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 8.--10. "DLYM2L,Delay line for first microphone of pair 2" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" newline bitfld.long 0x8 4.--6. "DLYM1R,Delay line adjust for second microphone of pair 1" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 0.--2. "DLYM1L,Delay line adjust for first microphone of pair 1" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" rgroup.long 0x3F0++0xF line.long 0x0 "SAI_HWCFGR,SAI hardware configuration register" hexmask.long.byte 0x0 12.--19. 1. "OPTION_REGOUT,Support of SAI_IOR register" hexmask.long.byte 0x0 8.--11. 1. "SPDIF_PDM,Support of SPDIF-OUT and PDM interfaces" hexmask.long.byte 0x0 0.--7. 1. "FIFO_SIZE,FIFO size for SAIA and SAIB" line.long 0x4 "SAI_VERR,SAI version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,SAI major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,SAI minor revision" line.long 0x8 "SAI_IPIDR,SAI identification register" hexmask.long 0x8 0.--31. 1. "ID,SAI identifier" line.long 0xC "SAI_SIDR,SAI size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification" tree.end tree "SAI3_S" base ad:0x502B0000 group.long 0x0++0x17 line.long 0x0 "SAI_GCR,SAI global configuration register" bitfld.long 0x0 4.--5. "SYNCOUT,Synchronization outputs" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "SYNCIN,Synchronization inputs" "0,1,2,3" line.long 0x4 "SAI_ACR1,SAI configuration register 1" bitfld.long 0x4 27. "MCKEN,Master clock generation enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "OSR,Oversampling ratio for master clock" "B_0x0,B_0x1" hexmask.long.byte 0x4 20.--25. 1. "MCKDIV,Master clock divider" bitfld.long 0x4 19. "NODIV,No divider" "B_0x0,B_0x1" bitfld.long 0x4 17. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "SAIEN,Audio block enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "OUTDRIV,Output drive" "B_0x0,B_0x1" bitfld.long 0x4 12. "MONO,Mono mode" "B_0x0,B_0x1" bitfld.long 0x4 10.--11. "SYNCEN,Synchronization enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 9. "CKSTR,Clock strobing edge" "B_0x0,B_0x1" bitfld.long 0x4 8. "LSBFIRST,Least significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 5.--7. "DS,Data size" "?,?,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 2.--3. "PRTCFG,Protocol configuration" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 0.--1. "MODE,SAIx audio block mode" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "SAI_ACR2,SAI configuration register 2" bitfld.long 0x8 14.--15. "COMP,Companding mode." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 13. "CPL,Complement bit." "B_0x0,B_0x1" hexmask.long.byte 0x8 7.--12. 1. "MUTECNT,Mute counter." bitfld.long 0x8 6. "MUTEVAL,Mute value." "B_0x0,B_0x1" bitfld.long 0x8 5. "MUTE,Mute." "B_0x0,B_0x1" bitfld.long 0x8 4. "TRIS,Tristate management on data line." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "FFLUSH,FIFO flush." "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "FTH,FIFO threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0xC "SAI_AFRCR,SAI frame configuration register" bitfld.long 0xC 18. "FSOFF,Frame synchronization offset." "B_0x0,B_0x1" bitfld.long 0xC 17. "FSPOL,Frame synchronization polarity." "B_0x0,B_0x1" rbitfld.long 0xC 16. "FSDEF,Frame synchronization definition." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--14. 1. "FSALL,Frame synchronization active level length." hexmask.long.byte 0xC 0.--7. 1. "FRL,Frame length." line.long 0x10 "SAI_ASLOTR,SAI slot register" hexmask.long.word 0x10 16.--31. 1. "SLOTEN,Slot enable." hexmask.long.byte 0x10 8.--11. 1. "NBSLOT,Number of slots in an audio frame." bitfld.long 0x10 6.--7. "SLOTSZ,Slot size" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0x10 0.--4. 1. "FBOFF,First bit offset" line.long 0x14 "SAI_AIM,SAI interrupt mask register" bitfld.long 0x14 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 4. "CNRDYIE,Codec not ready interrupt enable (AC’97)." "B_0x0,B_0x1" bitfld.long 0x14 3. "FREQIE,FIFO request interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 1. "MUTEDETIE,Mute detection interrupt enable." "B_0x0,B_0x1" newline bitfld.long 0x14 0. "OVRUDRIE,Overrun/underrun interrupt enable." "B_0x0,B_0x1" rgroup.long 0x18++0x3 line.long 0x0 "SAI_ASR,SAI status register" bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 4. "CNRDY,Codec not ready." "B_0x0,B_0x1" bitfld.long 0x0 3. "FREQ,FIFO request." "B_0x0,B_0x1" bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "MUTEDET,Mute detection." "B_0x0,B_0x1" bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "B_0x0,B_0x1" wgroup.long 0x1C++0x3 line.long 0x0 "SAI_ACLRFR,SAI clear flag register" bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1" bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1" bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1" bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1" bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1" bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1" group.long 0x20++0x17 line.long 0x0 "SAI_ADR,SAI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" line.long 0x4 "SAI_BCR1,SAI configuration register 1" bitfld.long 0x4 27. "MCKEN,Master clock generation enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "OSR,Oversampling ratio for master clock" "B_0x0,B_0x1" hexmask.long.byte 0x4 20.--25. 1. "MCKDIV,Master clock divider" bitfld.long 0x4 19. "NODIV,No divider" "B_0x0,B_0x1" bitfld.long 0x4 17. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "SAIEN,Audio block enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "OUTDRIV,Output drive" "B_0x0,B_0x1" bitfld.long 0x4 12. "MONO,Mono mode" "B_0x0,B_0x1" bitfld.long 0x4 10.--11. "SYNCEN,Synchronization enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 9. "CKSTR,Clock strobing edge" "B_0x0,B_0x1" bitfld.long 0x4 8. "LSBFIRST,Least significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 5.--7. "DS,Data size" "?,?,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 2.--3. "PRTCFG,Protocol configuration" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 0.--1. "MODE,SAIx audio block mode" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "SAI_BCR2,SAI configuration register 2" bitfld.long 0x8 14.--15. "COMP,Companding mode." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 13. "CPL,Complement bit." "B_0x0,B_0x1" hexmask.long.byte 0x8 7.--12. 1. "MUTECNT,Mute counter." bitfld.long 0x8 6. "MUTEVAL,Mute value." "B_0x0,B_0x1" bitfld.long 0x8 5. "MUTE,Mute." "B_0x0,B_0x1" bitfld.long 0x8 4. "TRIS,Tristate management on data line." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "FFLUSH,FIFO flush." "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "FTH,FIFO threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0xC "SAI_BFRCR,SAI frame configuration register" bitfld.long 0xC 18. "FSOFF,Frame synchronization offset." "B_0x0,B_0x1" bitfld.long 0xC 17. "FSPOL,Frame synchronization polarity." "B_0x0,B_0x1" rbitfld.long 0xC 16. "FSDEF,Frame synchronization definition." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--14. 1. "FSALL,Frame synchronization active level length." hexmask.long.byte 0xC 0.--7. 1. "FRL,Frame length." line.long 0x10 "SAI_BSLOTR,SAI slot register" hexmask.long.word 0x10 16.--31. 1. "SLOTEN,Slot enable." hexmask.long.byte 0x10 8.--11. 1. "NBSLOT,Number of slots in an audio frame." bitfld.long 0x10 6.--7. "SLOTSZ,Slot size" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0x10 0.--4. 1. "FBOFF,First bit offset" line.long 0x14 "SAI_BIM,SAI interrupt mask register" bitfld.long 0x14 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 4. "CNRDYIE,Codec not ready interrupt enable (AC’97)." "B_0x0,B_0x1" bitfld.long 0x14 3. "FREQIE,FIFO request interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 1. "MUTEDETIE,Mute detection interrupt enable." "B_0x0,B_0x1" newline bitfld.long 0x14 0. "OVRUDRIE,Overrun/underrun interrupt enable." "B_0x0,B_0x1" rgroup.long 0x38++0x3 line.long 0x0 "SAI_BSR,SAI status register" bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 4. "CNRDY,Codec not ready." "B_0x0,B_0x1" bitfld.long 0x0 3. "FREQ,FIFO request." "B_0x0,B_0x1" bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "MUTEDET,Mute detection." "B_0x0,B_0x1" bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "B_0x0,B_0x1" wgroup.long 0x3C++0x3 line.long 0x0 "SAI_BCLRFR,SAI clear flag register" bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1" bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1" bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1" bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1" bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1" bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1" group.long 0x40++0xB line.long 0x0 "SAI_BDR,SAI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" line.long 0x4 "SAI_PDMCR,SAI PDM control register" bitfld.long 0x4 9. "CKEN2,Clock enable of bitstream clock number 2" "B_0x0,B_0x1" bitfld.long 0x4 8. "CKEN1,Clock enable of bitstream clock number 1" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "MICNBR,Number of microphones" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0. "PDMEN,PDM enable" "B_0x0,B_0x1" line.long 0x8 "SAI_PDMDLY,SAI PDM delay register" bitfld.long 0x8 28.--30. "DLYM4R,Delay line for second microphone of pair 4" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 24.--26. "DLYM4L,Delay line for first microphone of pair 4" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 20.--22. "DLYM3R,Delay line for second microphone of pair 3" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 16.--18. "DLYM3L,Delay line for first microphone of pair 3" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 12.--14. "DLYM2R,Delay line for second microphone of pair 2" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 8.--10. "DLYM2L,Delay line for first microphone of pair 2" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" newline bitfld.long 0x8 4.--6. "DLYM1R,Delay line adjust for second microphone of pair 1" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 0.--2. "DLYM1L,Delay line adjust for first microphone of pair 1" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" rgroup.long 0x3F0++0xF line.long 0x0 "SAI_HWCFGR,SAI hardware configuration register" hexmask.long.byte 0x0 12.--19. 1. "OPTION_REGOUT,Support of SAI_IOR register" hexmask.long.byte 0x0 8.--11. 1. "SPDIF_PDM,Support of SPDIF-OUT and PDM interfaces" hexmask.long.byte 0x0 0.--7. 1. "FIFO_SIZE,FIFO size for SAIA and SAIB" line.long 0x4 "SAI_VERR,SAI version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,SAI major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,SAI minor revision" line.long 0x8 "SAI_IPIDR,SAI identification register" hexmask.long 0x8 0.--31. 1. "ID,SAI identifier" line.long 0xC "SAI_SIDR,SAI size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification" tree.end tree "SAI4" base ad:0x40340000 group.long 0x0++0x17 line.long 0x0 "SAI_GCR,SAI global configuration register" bitfld.long 0x0 4.--5. "SYNCOUT,Synchronization outputs" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "SYNCIN,Synchronization inputs" "0,1,2,3" line.long 0x4 "SAI_ACR1,SAI configuration register 1" bitfld.long 0x4 27. "MCKEN,Master clock generation enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "OSR,Oversampling ratio for master clock" "B_0x0,B_0x1" hexmask.long.byte 0x4 20.--25. 1. "MCKDIV,Master clock divider" bitfld.long 0x4 19. "NODIV,No divider" "B_0x0,B_0x1" bitfld.long 0x4 17. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "SAIEN,Audio block enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "OUTDRIV,Output drive" "B_0x0,B_0x1" bitfld.long 0x4 12. "MONO,Mono mode" "B_0x0,B_0x1" bitfld.long 0x4 10.--11. "SYNCEN,Synchronization enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 9. "CKSTR,Clock strobing edge" "B_0x0,B_0x1" bitfld.long 0x4 8. "LSBFIRST,Least significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 5.--7. "DS,Data size" "?,?,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 2.--3. "PRTCFG,Protocol configuration" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 0.--1. "MODE,SAIx audio block mode" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "SAI_ACR2,SAI configuration register 2" bitfld.long 0x8 14.--15. "COMP,Companding mode." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 13. "CPL,Complement bit." "B_0x0,B_0x1" hexmask.long.byte 0x8 7.--12. 1. "MUTECNT,Mute counter." bitfld.long 0x8 6. "MUTEVAL,Mute value." "B_0x0,B_0x1" bitfld.long 0x8 5. "MUTE,Mute." "B_0x0,B_0x1" bitfld.long 0x8 4. "TRIS,Tristate management on data line." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "FFLUSH,FIFO flush." "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "FTH,FIFO threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0xC "SAI_AFRCR,SAI frame configuration register" bitfld.long 0xC 18. "FSOFF,Frame synchronization offset." "B_0x0,B_0x1" bitfld.long 0xC 17. "FSPOL,Frame synchronization polarity." "B_0x0,B_0x1" rbitfld.long 0xC 16. "FSDEF,Frame synchronization definition." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--14. 1. "FSALL,Frame synchronization active level length." hexmask.long.byte 0xC 0.--7. 1. "FRL,Frame length." line.long 0x10 "SAI_ASLOTR,SAI slot register" hexmask.long.word 0x10 16.--31. 1. "SLOTEN,Slot enable." hexmask.long.byte 0x10 8.--11. 1. "NBSLOT,Number of slots in an audio frame." bitfld.long 0x10 6.--7. "SLOTSZ,Slot size" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0x10 0.--4. 1. "FBOFF,First bit offset" line.long 0x14 "SAI_AIM,SAI interrupt mask register" bitfld.long 0x14 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 4. "CNRDYIE,Codec not ready interrupt enable (AC’97)." "B_0x0,B_0x1" bitfld.long 0x14 3. "FREQIE,FIFO request interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 1. "MUTEDETIE,Mute detection interrupt enable." "B_0x0,B_0x1" newline bitfld.long 0x14 0. "OVRUDRIE,Overrun/underrun interrupt enable." "B_0x0,B_0x1" rgroup.long 0x18++0x3 line.long 0x0 "SAI_ASR,SAI status register" bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 4. "CNRDY,Codec not ready." "B_0x0,B_0x1" bitfld.long 0x0 3. "FREQ,FIFO request." "B_0x0,B_0x1" bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "MUTEDET,Mute detection." "B_0x0,B_0x1" bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "B_0x0,B_0x1" wgroup.long 0x1C++0x3 line.long 0x0 "SAI_ACLRFR,SAI clear flag register" bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1" bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1" bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1" bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1" bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1" bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1" group.long 0x20++0x17 line.long 0x0 "SAI_ADR,SAI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" line.long 0x4 "SAI_BCR1,SAI configuration register 1" bitfld.long 0x4 27. "MCKEN,Master clock generation enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "OSR,Oversampling ratio for master clock" "B_0x0,B_0x1" hexmask.long.byte 0x4 20.--25. 1. "MCKDIV,Master clock divider" bitfld.long 0x4 19. "NODIV,No divider" "B_0x0,B_0x1" bitfld.long 0x4 17. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "SAIEN,Audio block enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "OUTDRIV,Output drive" "B_0x0,B_0x1" bitfld.long 0x4 12. "MONO,Mono mode" "B_0x0,B_0x1" bitfld.long 0x4 10.--11. "SYNCEN,Synchronization enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 9. "CKSTR,Clock strobing edge" "B_0x0,B_0x1" bitfld.long 0x4 8. "LSBFIRST,Least significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 5.--7. "DS,Data size" "?,?,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 2.--3. "PRTCFG,Protocol configuration" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 0.--1. "MODE,SAIx audio block mode" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "SAI_BCR2,SAI configuration register 2" bitfld.long 0x8 14.--15. "COMP,Companding mode." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 13. "CPL,Complement bit." "B_0x0,B_0x1" hexmask.long.byte 0x8 7.--12. 1. "MUTECNT,Mute counter." bitfld.long 0x8 6. "MUTEVAL,Mute value." "B_0x0,B_0x1" bitfld.long 0x8 5. "MUTE,Mute." "B_0x0,B_0x1" bitfld.long 0x8 4. "TRIS,Tristate management on data line." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "FFLUSH,FIFO flush." "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "FTH,FIFO threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0xC "SAI_BFRCR,SAI frame configuration register" bitfld.long 0xC 18. "FSOFF,Frame synchronization offset." "B_0x0,B_0x1" bitfld.long 0xC 17. "FSPOL,Frame synchronization polarity." "B_0x0,B_0x1" rbitfld.long 0xC 16. "FSDEF,Frame synchronization definition." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--14. 1. "FSALL,Frame synchronization active level length." hexmask.long.byte 0xC 0.--7. 1. "FRL,Frame length." line.long 0x10 "SAI_BSLOTR,SAI slot register" hexmask.long.word 0x10 16.--31. 1. "SLOTEN,Slot enable." hexmask.long.byte 0x10 8.--11. 1. "NBSLOT,Number of slots in an audio frame." bitfld.long 0x10 6.--7. "SLOTSZ,Slot size" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0x10 0.--4. 1. "FBOFF,First bit offset" line.long 0x14 "SAI_BIM,SAI interrupt mask register" bitfld.long 0x14 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 4. "CNRDYIE,Codec not ready interrupt enable (AC’97)." "B_0x0,B_0x1" bitfld.long 0x14 3. "FREQIE,FIFO request interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 1. "MUTEDETIE,Mute detection interrupt enable." "B_0x0,B_0x1" newline bitfld.long 0x14 0. "OVRUDRIE,Overrun/underrun interrupt enable." "B_0x0,B_0x1" rgroup.long 0x38++0x3 line.long 0x0 "SAI_BSR,SAI status register" bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 4. "CNRDY,Codec not ready." "B_0x0,B_0x1" bitfld.long 0x0 3. "FREQ,FIFO request." "B_0x0,B_0x1" bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "MUTEDET,Mute detection." "B_0x0,B_0x1" bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "B_0x0,B_0x1" wgroup.long 0x3C++0x3 line.long 0x0 "SAI_BCLRFR,SAI clear flag register" bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1" bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1" bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1" bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1" bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1" bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1" group.long 0x40++0xB line.long 0x0 "SAI_BDR,SAI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" line.long 0x4 "SAI_PDMCR,SAI PDM control register" bitfld.long 0x4 9. "CKEN2,Clock enable of bitstream clock number 2" "B_0x0,B_0x1" bitfld.long 0x4 8. "CKEN1,Clock enable of bitstream clock number 1" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "MICNBR,Number of microphones" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0. "PDMEN,PDM enable" "B_0x0,B_0x1" line.long 0x8 "SAI_PDMDLY,SAI PDM delay register" bitfld.long 0x8 28.--30. "DLYM4R,Delay line for second microphone of pair 4" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 24.--26. "DLYM4L,Delay line for first microphone of pair 4" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 20.--22. "DLYM3R,Delay line for second microphone of pair 3" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 16.--18. "DLYM3L,Delay line for first microphone of pair 3" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 12.--14. "DLYM2R,Delay line for second microphone of pair 2" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 8.--10. "DLYM2L,Delay line for first microphone of pair 2" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" newline bitfld.long 0x8 4.--6. "DLYM1R,Delay line adjust for second microphone of pair 1" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 0.--2. "DLYM1L,Delay line adjust for first microphone of pair 1" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" rgroup.long 0x3F0++0xF line.long 0x0 "SAI_HWCFGR,SAI hardware configuration register" hexmask.long.byte 0x0 12.--19. 1. "OPTION_REGOUT,Support of SAI_IOR register" hexmask.long.byte 0x0 8.--11. 1. "SPDIF_PDM,Support of SPDIF-OUT and PDM interfaces" hexmask.long.byte 0x0 0.--7. 1. "FIFO_SIZE,FIFO size for SAIA and SAIB" line.long 0x4 "SAI_VERR,SAI version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,SAI major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,SAI minor revision" line.long 0x8 "SAI_IPIDR,SAI identification register" hexmask.long 0x8 0.--31. 1. "ID,SAI identifier" line.long 0xC "SAI_SIDR,SAI size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification" tree.end tree "SAI4_S" base ad:0x50340000 group.long 0x0++0x17 line.long 0x0 "SAI_GCR,SAI global configuration register" bitfld.long 0x0 4.--5. "SYNCOUT,Synchronization outputs" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "SYNCIN,Synchronization inputs" "0,1,2,3" line.long 0x4 "SAI_ACR1,SAI configuration register 1" bitfld.long 0x4 27. "MCKEN,Master clock generation enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "OSR,Oversampling ratio for master clock" "B_0x0,B_0x1" hexmask.long.byte 0x4 20.--25. 1. "MCKDIV,Master clock divider" bitfld.long 0x4 19. "NODIV,No divider" "B_0x0,B_0x1" bitfld.long 0x4 17. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "SAIEN,Audio block enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "OUTDRIV,Output drive" "B_0x0,B_0x1" bitfld.long 0x4 12. "MONO,Mono mode" "B_0x0,B_0x1" bitfld.long 0x4 10.--11. "SYNCEN,Synchronization enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 9. "CKSTR,Clock strobing edge" "B_0x0,B_0x1" bitfld.long 0x4 8. "LSBFIRST,Least significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 5.--7. "DS,Data size" "?,?,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 2.--3. "PRTCFG,Protocol configuration" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 0.--1. "MODE,SAIx audio block mode" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "SAI_ACR2,SAI configuration register 2" bitfld.long 0x8 14.--15. "COMP,Companding mode." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 13. "CPL,Complement bit." "B_0x0,B_0x1" hexmask.long.byte 0x8 7.--12. 1. "MUTECNT,Mute counter." bitfld.long 0x8 6. "MUTEVAL,Mute value." "B_0x0,B_0x1" bitfld.long 0x8 5. "MUTE,Mute." "B_0x0,B_0x1" bitfld.long 0x8 4. "TRIS,Tristate management on data line." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "FFLUSH,FIFO flush." "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "FTH,FIFO threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0xC "SAI_AFRCR,SAI frame configuration register" bitfld.long 0xC 18. "FSOFF,Frame synchronization offset." "B_0x0,B_0x1" bitfld.long 0xC 17. "FSPOL,Frame synchronization polarity." "B_0x0,B_0x1" rbitfld.long 0xC 16. "FSDEF,Frame synchronization definition." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--14. 1. "FSALL,Frame synchronization active level length." hexmask.long.byte 0xC 0.--7. 1. "FRL,Frame length." line.long 0x10 "SAI_ASLOTR,SAI slot register" hexmask.long.word 0x10 16.--31. 1. "SLOTEN,Slot enable." hexmask.long.byte 0x10 8.--11. 1. "NBSLOT,Number of slots in an audio frame." bitfld.long 0x10 6.--7. "SLOTSZ,Slot size" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0x10 0.--4. 1. "FBOFF,First bit offset" line.long 0x14 "SAI_AIM,SAI interrupt mask register" bitfld.long 0x14 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 4. "CNRDYIE,Codec not ready interrupt enable (AC’97)." "B_0x0,B_0x1" bitfld.long 0x14 3. "FREQIE,FIFO request interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 1. "MUTEDETIE,Mute detection interrupt enable." "B_0x0,B_0x1" newline bitfld.long 0x14 0. "OVRUDRIE,Overrun/underrun interrupt enable." "B_0x0,B_0x1" rgroup.long 0x18++0x3 line.long 0x0 "SAI_ASR,SAI status register" bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 4. "CNRDY,Codec not ready." "B_0x0,B_0x1" bitfld.long 0x0 3. "FREQ,FIFO request." "B_0x0,B_0x1" bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "MUTEDET,Mute detection." "B_0x0,B_0x1" bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "B_0x0,B_0x1" wgroup.long 0x1C++0x3 line.long 0x0 "SAI_ACLRFR,SAI clear flag register" bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1" bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1" bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1" bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1" bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1" bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1" group.long 0x20++0x17 line.long 0x0 "SAI_ADR,SAI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" line.long 0x4 "SAI_BCR1,SAI configuration register 1" bitfld.long 0x4 27. "MCKEN,Master clock generation enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "OSR,Oversampling ratio for master clock" "B_0x0,B_0x1" hexmask.long.byte 0x4 20.--25. 1. "MCKDIV,Master clock divider" bitfld.long 0x4 19. "NODIV,No divider" "B_0x0,B_0x1" bitfld.long 0x4 17. "DMAEN,DMA enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "SAIEN,Audio block enable" "B_0x0,B_0x1" newline bitfld.long 0x4 13. "OUTDRIV,Output drive" "B_0x0,B_0x1" bitfld.long 0x4 12. "MONO,Mono mode" "B_0x0,B_0x1" bitfld.long 0x4 10.--11. "SYNCEN,Synchronization enable" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 9. "CKSTR,Clock strobing edge" "B_0x0,B_0x1" bitfld.long 0x4 8. "LSBFIRST,Least significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 5.--7. "DS,Data size" "?,?,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 2.--3. "PRTCFG,Protocol configuration" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x4 0.--1. "MODE,SAIx audio block mode" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x8 "SAI_BCR2,SAI configuration register 2" bitfld.long 0x8 14.--15. "COMP,Companding mode." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 13. "CPL,Complement bit." "B_0x0,B_0x1" hexmask.long.byte 0x8 7.--12. 1. "MUTECNT,Mute counter." bitfld.long 0x8 6. "MUTEVAL,Mute value." "B_0x0,B_0x1" bitfld.long 0x8 5. "MUTE,Mute." "B_0x0,B_0x1" bitfld.long 0x8 4. "TRIS,Tristate management on data line." "B_0x0,B_0x1" newline bitfld.long 0x8 3. "FFLUSH,FIFO flush." "B_0x0,B_0x1" bitfld.long 0x8 0.--2. "FTH,FIFO threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" line.long 0xC "SAI_BFRCR,SAI frame configuration register" bitfld.long 0xC 18. "FSOFF,Frame synchronization offset." "B_0x0,B_0x1" bitfld.long 0xC 17. "FSPOL,Frame synchronization polarity." "B_0x0,B_0x1" rbitfld.long 0xC 16. "FSDEF,Frame synchronization definition." "B_0x0,B_0x1" hexmask.long.byte 0xC 8.--14. 1. "FSALL,Frame synchronization active level length." hexmask.long.byte 0xC 0.--7. 1. "FRL,Frame length." line.long 0x10 "SAI_BSLOTR,SAI slot register" hexmask.long.word 0x10 16.--31. 1. "SLOTEN,Slot enable." hexmask.long.byte 0x10 8.--11. 1. "NBSLOT,Number of slots in an audio frame." bitfld.long 0x10 6.--7. "SLOTSZ,Slot size" "B_0x0,B_0x1,B_0x2,?" hexmask.long.byte 0x10 0.--4. 1. "FBOFF,First bit offset" line.long 0x14 "SAI_BIM,SAI interrupt mask register" bitfld.long 0x14 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 4. "CNRDYIE,Codec not ready interrupt enable (AC’97)." "B_0x0,B_0x1" bitfld.long 0x14 3. "FREQIE,FIFO request interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "B_0x0,B_0x1" bitfld.long 0x14 1. "MUTEDETIE,Mute detection interrupt enable." "B_0x0,B_0x1" newline bitfld.long 0x14 0. "OVRUDRIE,Overrun/underrun interrupt enable." "B_0x0,B_0x1" rgroup.long 0x38++0x3 line.long 0x0 "SAI_BSR,SAI status register" bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "B_0x0,B_0x1" bitfld.long 0x0 4. "CNRDY,Codec not ready." "B_0x0,B_0x1" bitfld.long 0x0 3. "FREQ,FIFO request." "B_0x0,B_0x1" bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "MUTEDET,Mute detection." "B_0x0,B_0x1" bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "B_0x0,B_0x1" wgroup.long 0x3C++0x3 line.long 0x0 "SAI_BCLRFR,SAI clear flag register" bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1" bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1" bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1" bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1" bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1" bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1" group.long 0x40++0xB line.long 0x0 "SAI_BDR,SAI data register" hexmask.long 0x0 0.--31. 1. "DATA,Data" line.long 0x4 "SAI_PDMCR,SAI PDM control register" bitfld.long 0x4 9. "CKEN2,Clock enable of bitstream clock number 2" "B_0x0,B_0x1" bitfld.long 0x4 8. "CKEN1,Clock enable of bitstream clock number 1" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "MICNBR,Number of microphones" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 0. "PDMEN,PDM enable" "B_0x0,B_0x1" line.long 0x8 "SAI_PDMDLY,SAI PDM delay register" bitfld.long 0x8 28.--30. "DLYM4R,Delay line for second microphone of pair 4" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 24.--26. "DLYM4L,Delay line for first microphone of pair 4" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 20.--22. "DLYM3R,Delay line for second microphone of pair 3" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 16.--18. "DLYM3L,Delay line for first microphone of pair 3" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 12.--14. "DLYM2R,Delay line for second microphone of pair 2" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 8.--10. "DLYM2L,Delay line for first microphone of pair 2" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" newline bitfld.long 0x8 4.--6. "DLYM1R,Delay line adjust for second microphone of pair 1" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" bitfld.long 0x8 0.--2. "DLYM1L,Delay line adjust for first microphone of pair 1" "B_0x0,B_0x1,B_0x2,?,?,?,?,B_0x7" rgroup.long 0x3F0++0xF line.long 0x0 "SAI_HWCFGR,SAI hardware configuration register" hexmask.long.byte 0x0 12.--19. 1. "OPTION_REGOUT,Support of SAI_IOR register" hexmask.long.byte 0x0 8.--11. 1. "SPDIF_PDM,Support of SPDIF-OUT and PDM interfaces" hexmask.long.byte 0x0 0.--7. 1. "FIFO_SIZE,FIFO size for SAIA and SAIB" line.long 0x4 "SAI_VERR,SAI version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,SAI major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,SAI minor revision" line.long 0x8 "SAI_IPIDR,SAI identification register" hexmask.long 0x8 0.--31. 1. "ID,SAI identifier" line.long 0xC "SAI_SIDR,SAI size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification" tree.end tree.end tree "SDMMC (Secure Digital Input/Output MultiMediaCard Interface)" base ad:0x0 tree "SDMMC" base ad:0x48220000 group.long 0x0++0xF line.long 0x0 "SDMMC_POWER,SDMMC power control register" bitfld.long 0x0 4. "DIRPOL,Data and command direction signals polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 3. "VSWITCHEN,Voltage switch procedure enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "VSWITCH,Voltage switch sequence start" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "PWRCTRL,SDMMC state control bits" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "SDMMC_CLKCR,SDMMC clock control register" bitfld.long 0x4 20.--21. "SELCLKRX,Receive clock selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 19. "BUSSPEED,Bus speed for selection of SDMMC operating modes" "B_0x0,B_0x1" bitfld.long 0x4 18. "DDR,Data rate signaling selection" "B_0x0,B_0x1" bitfld.long 0x4 17. "HWFC_EN,Hardware flow control enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "NEGEDGE,SDMMC_CK dephasing selection bit for data and command" "B_0x0,B_0x1" bitfld.long 0x4 14.--15. "WIDBUS,Wide bus mode enable bit" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 12. "PWRSAV,Power saving configuration bit" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "CLKDIV,Clock divide factor" line.long 0x8 "SDMMC_ARGR,SDMMC argument register" hexmask.long 0x8 0.--31. 1. "CMDARG,Command argument" line.long 0xC "SDMMC_CMDR,SDMMC command register" bitfld.long 0xC 16. "CMDSUSPEND,The CPSM treats the command as a Suspend or Resume command and signals interrupt period start/end" "0,1" bitfld.long 0xC 15. "BOOTEN,Enable boot mode procedure" "B_0x0,B_0x1" bitfld.long 0xC 14. "BOOTMODE,Select the boot mode procedure to be used" "B_0x0,B_0x1" bitfld.long 0xC 13. "DTHOLD,Hold new data block transmission and reception in the DPSM" "0,1" bitfld.long 0xC 12. "CPSMEN,Command path state machine (CPSM) enable bit" "0,1" bitfld.long 0xC 11. "WAITPEND,CPSM waits for end of data transfer (CmdPend internal signal) from DPSM" "0,1" newline bitfld.long 0xC 10. "WAITINT,CPSM waits for interrupt request" "0,1" bitfld.long 0xC 8.--9. "WAITRESP,Wait for response bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 7. "CMDSTOP,The CPSM treats the command as a Stop Transmission command and signals abort to the DPSM" "0,1" bitfld.long 0xC 6. "CMDTRANS,The CPSM treats the command as a data transfer command stops the interrupt period and signals DataEnable to the DPSM" "0,1" hexmask.long.byte 0xC 0.--5. 1. "CMDINDEX,Command index" rgroup.long 0x10++0x13 line.long 0x0 "SDMMC_RESPCMDR,SDMMC command response register" hexmask.long.byte 0x0 0.--5. 1. "RESPCMD,Response command index" line.long 0x4 "SDMMC_RESP1R,SDMMC response 1 register" hexmask.long 0x4 0.--31. 1. "CARDSTATUS,Card status according table below" line.long 0x8 "SDMMC_RESP2R,SDMMC response 2 register" hexmask.long 0x8 0.--31. 1. "CARDSTATUS,Card status according table below" line.long 0xC "SDMMC_RESP3R,SDMMC response 3 register" hexmask.long 0xC 0.--31. 1. "CARDSTATUS,Card status according table below" line.long 0x10 "SDMMC_RESP4R,SDMMC response 4 register" hexmask.long 0x10 0.--31. 1. "CARDSTATUS,Card status according table below" group.long 0x24++0xB line.long 0x0 "SDMMC_DTIMER,SDMMC data timer register" hexmask.long 0x0 0.--31. 1. "DATATIME,Data and R1b busy timeout period" line.long 0x4 "SDMMC_DLENR,SDMMC data length register" hexmask.long 0x4 0.--24. 1. "DATALENGTH,Data length value" line.long 0x8 "SDMMC_DCTRL,SDMMC data control register" bitfld.long 0x8 13. "FIFORST,FIFO reset flushes any remaining data" "B_0x0,B_0x1" bitfld.long 0x8 12. "BOOTACKEN,Enable the reception of the boot acknowledgment" "B_0x0,B_0x1" bitfld.long 0x8 11. "SDIOEN,SD I/O interrupt enable functions" "0,1" bitfld.long 0x8 10. "RWMOD,Read Wait mode" "B_0x0,B_0x1" bitfld.long 0x8 9. "RWSTOP,Read Wait stop" "B_0x0,B_0x1" bitfld.long 0x8 8. "RWSTART,Read Wait start" "0,1" newline hexmask.long.byte 0x8 4.--7. 1. "DBLOCKSIZE,Data block size" bitfld.long 0x8 2.--3. "DTMODE,Data transfer mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 1. "DTDIR,Data transfer direction selection" "B_0x0,B_0x1" bitfld.long 0x8 0. "DTEN,Data transfer enable bit" "B_0x0,B_0x1" rgroup.long 0x30++0x7 line.long 0x0 "SDMMC_DCNTR,SDMMC data counter register" hexmask.long 0x0 0.--24. 1. "DATACOUNT,Data count value" line.long 0x4 "SDMMC_STAR,SDMMC status register" bitfld.long 0x4 28. "IDMABTC,IDMA buffer transfer complete" "0,1" bitfld.long 0x4 27. "IDMATE,IDMA transfer error" "0,1" bitfld.long 0x4 26. "CKSTOP,SDMMC_CK stopped in Voltage switch procedure" "0,1" bitfld.long 0x4 25. "VSWEND,Voltage switch critical timing section completion" "0,1" bitfld.long 0x4 24. "ACKTIMEOUT,Boot acknowledgment timeout" "0,1" bitfld.long 0x4 23. "ACKFAIL,Boot acknowledgment received (boot acknowledgment check fail)" "0,1" newline bitfld.long 0x4 22. "SDIOIT,SDIO interrupt received" "0,1" bitfld.long 0x4 21. "BUSYD0END,end of SDMMC_D0 Busy following a CMD response detected" "B_0x0,B_0x1" bitfld.long 0x4 20. "BUSYD0,Inverted value of SDMMC_D0 line (Busy) sampled at the end of a CMD response and a second time 2 SDMMC_CK cycles after the CMD response" "B_0x0,B_0x1" bitfld.long 0x4 19. "RXFIFOE,Receive FIFO empty" "0,1" bitfld.long 0x4 18. "TXFIFOE,Transmit FIFO empty" "0,1" bitfld.long 0x4 17. "RXFIFOF,Receive FIFO full" "0,1" newline bitfld.long 0x4 16. "TXFIFOF,Transmit FIFO full" "0,1" bitfld.long 0x4 15. "RXFIFOHF,Receive FIFO half full" "0,1" bitfld.long 0x4 14. "TXFIFOHE,Transmit FIFO half empty" "0,1" bitfld.long 0x4 13. "CPSMACT,Command path state machine active i.e. not in Idle state" "0,1" bitfld.long 0x4 12. "DPSMACT,Data path state machine active i.e. not in Idle state" "0,1" bitfld.long 0x4 11. "DABORT,Data transfer aborted by CMD12" "0,1" newline bitfld.long 0x4 10. "DBCKEND,Data block sent/received" "0,1" bitfld.long 0x4 9. "DHOLD,Data transfer Hold" "0,1" bitfld.long 0x4 8. "DATAEND,Data transfer ended correctly" "0,1" bitfld.long 0x4 7. "CMDSENT,Command sent (no response required)" "0,1" bitfld.long 0x4 6. "CMDREND,Command response received (CRC check passed or no CRC)" "0,1" bitfld.long 0x4 5. "RXOVERR,Received FIFO overrun error (masked by hardware when IDMA is enabled)" "0,1" newline bitfld.long 0x4 4. "TXUNDERR,Transmit FIFO underrun error (masked by hardware when IDMA is enabled)" "0,1" bitfld.long 0x4 3. "DTIMEOUT,Data timeout" "0,1" bitfld.long 0x4 2. "CTIMEOUT,Command response timeout" "0,1" bitfld.long 0x4 1. "DCRCFAIL,Data block sent/received (CRC check failed)" "0,1" bitfld.long 0x4 0. "CCRCFAIL,Command response received (CRC check failed)" "0,1" group.long 0x38++0xF line.long 0x0 "SDMMC_ICR,SDMMC interrupt clear register" bitfld.long 0x0 28. "IDMABTCC,IDMA buffer transfer complete clear bit" "B_0x0,B_0x1" bitfld.long 0x0 27. "IDMATEC,IDMA transfer error clear bit" "B_0x0,B_0x1" bitfld.long 0x0 26. "CKSTOPC,CKSTOP flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 25. "VSWENDC,VSWEND flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 24. "ACKTIMEOUTC,ACKTIMEOUT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 23. "ACKFAILC,ACKFAIL flag clear bit" "B_0x0,B_0x1" newline bitfld.long 0x0 22. "SDIOITC,SDIOIT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 21. "BUSYD0ENDC,BUSYD0END flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 11. "DABORTC,DABORT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 10. "DBCKENDC,DBCKEND flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 9. "DHOLDC,DHOLD flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 8. "DATAENDC,DATAEND flag clear bit" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "CMDSENTC,CMDSENT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 6. "CMDRENDC,CMDREND flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXOVERRC,RXOVERR flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXUNDERRC,TXUNDERR flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "DTIMEOUTC,DTIMEOUT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 2. "CTIMEOUTC,CTIMEOUT flag clear bit" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "DCRCFAILC,DCRCFAIL flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 0. "CCRCFAILC,CCRCFAIL flag clear bit" "B_0x0,B_0x1" line.long 0x4 "SDMMC_MASKR,SDMMC mask register" bitfld.long 0x4 28. "IDMABTCIE,IDMA buffer transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "CKSTOPIE,Voltage Switch clock stopped interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 25. "VSWENDIE,Voltage switch critical timing section completion interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ACKTIMEOUTIE,Acknowledgment timeout interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "ACKFAILIE,Acknowledgment Fail interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 22. "SDIOITIE,SDIO mode interrupt received interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 21. "BUSYD0ENDIE,BUSYD0END interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 18. "TXFIFOEIE,Tx FIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 17. "RXFIFOFIE,Rx FIFO full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 15. "RXFIFOHFIE,Rx FIFO half full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 14. "TXFIFOHEIE,Tx FIFO half empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "DABORTIE,Data transfer aborted interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "DBCKENDIE,Data block end interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "DHOLDIE,Data hold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "DATAENDIE,Data end interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "CMDSENTIE,Command sent interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "CMDRENDIE,Command response received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXOVERRIE,Rx FIFO overrun error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "TXUNDERRIE,Tx FIFO underrun error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "DTIMEOUTIE,Data timeout interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "CTIMEOUTIE,Command timeout interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "DCRCFAILIE,Data CRC fail interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CCRCFAILIE,Command CRC fail interrupt enable" "B_0x0,B_0x1" line.long 0x8 "SDMMC_ACKTIMER,SDMMC acknowledgment timer register" hexmask.long 0x8 0.--24. 1. "ACKTIME,Boot acknowledgment timeout period" line.long 0xC "SDMMC_FIFOTHRR,SDMMC data FIFO threshold register" hexmask.long.byte 0xC 0.--3. 1. "THR,FIFO threshold" group.long 0x50++0xB line.long 0x0 "SDMMC_IDMACTRLR,SDMMC DMA control register" bitfld.long 0x0 1. "IDMABMODE,Buffer mode selection" "B_0x0,B_0x1" bitfld.long 0x0 0. "IDMAEN,IDMA enable" "B_0x0,B_0x1" line.long 0x4 "SDMMC_IDMABSIZER,SDMMC IDMA buffer size register" hexmask.long.word 0x4 6.--16. 1. "IDMABNDT,Number of bytes per buffer" line.long 0x8 "SDMMC_IDMABASER,SDMMC IDMA buffer base address register" hexmask.long 0x8 0.--31. 1. "IDMABASE,Buffer memory base address bits [31:2] must be word aligned (bit [1:0] are always 0 and read only)" group.long 0x64++0x7 line.long 0x0 "SDMMC_IDMALAR,SDMMC IDMA linked list address register" bitfld.long 0x0 31. "ULA,Update SDMMC_IDMALAR from linked list when in linked list mode (SDMMC_IDMACTRLR.IDMABMODE select linked list mode)" "B_0x0,B_0x1" bitfld.long 0x0 30. "ULS,Update SDMMC_IDMABSIZE from the next linked list when in linked list mode (SDMMC_IDMACTRLR.IDMABMODE select linked list mode and ULA = 1)" "B_0x0,B_0x1" bitfld.long 0x0 29. "ABR,Acknowledge linked list buffer ready" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "IDMALA,Word aligned linked list item address offset" line.long 0x4 "SDMMC_IDMABAR,SDMMC IDMA linked list memory base register" hexmask.long 0x4 2.--31. 1. "IDMABA,Word aligned Linked list memory base address" group.long 0x80++0x3F line.long 0x0 "SDMMC_FIFOR0,SDMMC data FIFO registers 0" hexmask.long 0x0 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x4 "SDMMC_FIFOR1,SDMMC data FIFO registers 1" hexmask.long 0x4 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x8 "SDMMC_FIFOR2,SDMMC data FIFO registers 2" hexmask.long 0x8 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0xC "SDMMC_FIFOR3,SDMMC data FIFO registers 3" hexmask.long 0xC 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x10 "SDMMC_FIFOR4,SDMMC data FIFO registers 4" hexmask.long 0x10 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x14 "SDMMC_FIFOR5,SDMMC data FIFO registers 5" hexmask.long 0x14 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x18 "SDMMC_FIFOR6,SDMMC data FIFO registers 6" hexmask.long 0x18 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x1C "SDMMC_FIFOR7,SDMMC data FIFO registers 7" hexmask.long 0x1C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x20 "SDMMC_FIFOR8,SDMMC data FIFO registers 8" hexmask.long 0x20 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x24 "SDMMC_FIFOR9,SDMMC data FIFO registers 9" hexmask.long 0x24 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x28 "SDMMC_FIFOR10,SDMMC data FIFO registers 10" hexmask.long 0x28 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x2C "SDMMC_FIFOR11,SDMMC data FIFO registers 11" hexmask.long 0x2C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x30 "SDMMC_FIFOR12,SDMMC data FIFO registers 12" hexmask.long 0x30 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x34 "SDMMC_FIFOR13,SDMMC data FIFO registers 13" hexmask.long 0x34 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x38 "SDMMC_FIFOR14,SDMMC data FIFO registers 14" hexmask.long 0x38 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x3C "SDMMC_FIFOR15,SDMMC data FIFO registers 15" hexmask.long 0x3C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" rgroup.long 0x3F0++0xF line.long 0x0 "SDMMC_HWCFGR1,SDMMC hardware configuration register 1" hexmask.long.byte 0x0 0.--3. 1. "FIFOSIZE,SDMMC FIFO size" line.long 0x4 "SDMMC_VERR,SDMMC version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,SDMMC major revision number" hexmask.long.byte 0x4 0.--3. 1. "MINREV,SDMMC minor revision number" line.long 0x8 "SDMMC_IPIDR,SDMMC identification register" hexmask.long 0x8 0.--31. 1. "IP_ID,SDMMC identification" line.long 0xC "SDMMC_SIDR,SDMMC size identification register" hexmask.long 0xC 0.--31. 1. "SID,SDMMC size identification" tree.end tree "SDMMC1_S" base ad:0x58220000 group.long 0x0++0xF line.long 0x0 "SDMMC_POWER,SDMMC power control register" bitfld.long 0x0 4. "DIRPOL,Data and command direction signals polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 3. "VSWITCHEN,Voltage switch procedure enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "VSWITCH,Voltage switch sequence start" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "PWRCTRL,SDMMC state control bits" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "SDMMC_CLKCR,SDMMC clock control register" bitfld.long 0x4 20.--21. "SELCLKRX,Receive clock selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 19. "BUSSPEED,Bus speed for selection of SDMMC operating modes" "B_0x0,B_0x1" bitfld.long 0x4 18. "DDR,Data rate signaling selection" "B_0x0,B_0x1" bitfld.long 0x4 17. "HWFC_EN,Hardware flow control enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "NEGEDGE,SDMMC_CK dephasing selection bit for data and command" "B_0x0,B_0x1" bitfld.long 0x4 14.--15. "WIDBUS,Wide bus mode enable bit" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 12. "PWRSAV,Power saving configuration bit" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "CLKDIV,Clock divide factor" line.long 0x8 "SDMMC_ARGR,SDMMC argument register" hexmask.long 0x8 0.--31. 1. "CMDARG,Command argument" line.long 0xC "SDMMC_CMDR,SDMMC command register" bitfld.long 0xC 16. "CMDSUSPEND,The CPSM treats the command as a Suspend or Resume command and signals interrupt period start/end" "0,1" bitfld.long 0xC 15. "BOOTEN,Enable boot mode procedure" "B_0x0,B_0x1" bitfld.long 0xC 14. "BOOTMODE,Select the boot mode procedure to be used" "B_0x0,B_0x1" bitfld.long 0xC 13. "DTHOLD,Hold new data block transmission and reception in the DPSM" "0,1" bitfld.long 0xC 12. "CPSMEN,Command path state machine (CPSM) enable bit" "0,1" bitfld.long 0xC 11. "WAITPEND,CPSM waits for end of data transfer (CmdPend internal signal) from DPSM" "0,1" newline bitfld.long 0xC 10. "WAITINT,CPSM waits for interrupt request" "0,1" bitfld.long 0xC 8.--9. "WAITRESP,Wait for response bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 7. "CMDSTOP,The CPSM treats the command as a Stop Transmission command and signals abort to the DPSM" "0,1" bitfld.long 0xC 6. "CMDTRANS,The CPSM treats the command as a data transfer command stops the interrupt period and signals DataEnable to the DPSM" "0,1" hexmask.long.byte 0xC 0.--5. 1. "CMDINDEX,Command index" rgroup.long 0x10++0x13 line.long 0x0 "SDMMC_RESPCMDR,SDMMC command response register" hexmask.long.byte 0x0 0.--5. 1. "RESPCMD,Response command index" line.long 0x4 "SDMMC_RESP1R,SDMMC response 1 register" hexmask.long 0x4 0.--31. 1. "CARDSTATUS,Card status according table below" line.long 0x8 "SDMMC_RESP2R,SDMMC response 2 register" hexmask.long 0x8 0.--31. 1. "CARDSTATUS,Card status according table below" line.long 0xC "SDMMC_RESP3R,SDMMC response 3 register" hexmask.long 0xC 0.--31. 1. "CARDSTATUS,Card status according table below" line.long 0x10 "SDMMC_RESP4R,SDMMC response 4 register" hexmask.long 0x10 0.--31. 1. "CARDSTATUS,Card status according table below" group.long 0x24++0xB line.long 0x0 "SDMMC_DTIMER,SDMMC data timer register" hexmask.long 0x0 0.--31. 1. "DATATIME,Data and R1b busy timeout period" line.long 0x4 "SDMMC_DLENR,SDMMC data length register" hexmask.long 0x4 0.--24. 1. "DATALENGTH,Data length value" line.long 0x8 "SDMMC_DCTRL,SDMMC data control register" bitfld.long 0x8 13. "FIFORST,FIFO reset flushes any remaining data" "B_0x0,B_0x1" bitfld.long 0x8 12. "BOOTACKEN,Enable the reception of the boot acknowledgment" "B_0x0,B_0x1" bitfld.long 0x8 11. "SDIOEN,SD I/O interrupt enable functions" "0,1" bitfld.long 0x8 10. "RWMOD,Read Wait mode" "B_0x0,B_0x1" bitfld.long 0x8 9. "RWSTOP,Read Wait stop" "B_0x0,B_0x1" bitfld.long 0x8 8. "RWSTART,Read Wait start" "0,1" newline hexmask.long.byte 0x8 4.--7. 1. "DBLOCKSIZE,Data block size" bitfld.long 0x8 2.--3. "DTMODE,Data transfer mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 1. "DTDIR,Data transfer direction selection" "B_0x0,B_0x1" bitfld.long 0x8 0. "DTEN,Data transfer enable bit" "B_0x0,B_0x1" rgroup.long 0x30++0x7 line.long 0x0 "SDMMC_DCNTR,SDMMC data counter register" hexmask.long 0x0 0.--24. 1. "DATACOUNT,Data count value" line.long 0x4 "SDMMC_STAR,SDMMC status register" bitfld.long 0x4 28. "IDMABTC,IDMA buffer transfer complete" "0,1" bitfld.long 0x4 27. "IDMATE,IDMA transfer error" "0,1" bitfld.long 0x4 26. "CKSTOP,SDMMC_CK stopped in Voltage switch procedure" "0,1" bitfld.long 0x4 25. "VSWEND,Voltage switch critical timing section completion" "0,1" bitfld.long 0x4 24. "ACKTIMEOUT,Boot acknowledgment timeout" "0,1" bitfld.long 0x4 23. "ACKFAIL,Boot acknowledgment received (boot acknowledgment check fail)" "0,1" newline bitfld.long 0x4 22. "SDIOIT,SDIO interrupt received" "0,1" bitfld.long 0x4 21. "BUSYD0END,end of SDMMC_D0 Busy following a CMD response detected" "B_0x0,B_0x1" bitfld.long 0x4 20. "BUSYD0,Inverted value of SDMMC_D0 line (Busy) sampled at the end of a CMD response and a second time 2 SDMMC_CK cycles after the CMD response" "B_0x0,B_0x1" bitfld.long 0x4 19. "RXFIFOE,Receive FIFO empty" "0,1" bitfld.long 0x4 18. "TXFIFOE,Transmit FIFO empty" "0,1" bitfld.long 0x4 17. "RXFIFOF,Receive FIFO full" "0,1" newline bitfld.long 0x4 16. "TXFIFOF,Transmit FIFO full" "0,1" bitfld.long 0x4 15. "RXFIFOHF,Receive FIFO half full" "0,1" bitfld.long 0x4 14. "TXFIFOHE,Transmit FIFO half empty" "0,1" bitfld.long 0x4 13. "CPSMACT,Command path state machine active i.e. not in Idle state" "0,1" bitfld.long 0x4 12. "DPSMACT,Data path state machine active i.e. not in Idle state" "0,1" bitfld.long 0x4 11. "DABORT,Data transfer aborted by CMD12" "0,1" newline bitfld.long 0x4 10. "DBCKEND,Data block sent/received" "0,1" bitfld.long 0x4 9. "DHOLD,Data transfer Hold" "0,1" bitfld.long 0x4 8. "DATAEND,Data transfer ended correctly" "0,1" bitfld.long 0x4 7. "CMDSENT,Command sent (no response required)" "0,1" bitfld.long 0x4 6. "CMDREND,Command response received (CRC check passed or no CRC)" "0,1" bitfld.long 0x4 5. "RXOVERR,Received FIFO overrun error (masked by hardware when IDMA is enabled)" "0,1" newline bitfld.long 0x4 4. "TXUNDERR,Transmit FIFO underrun error (masked by hardware when IDMA is enabled)" "0,1" bitfld.long 0x4 3. "DTIMEOUT,Data timeout" "0,1" bitfld.long 0x4 2. "CTIMEOUT,Command response timeout" "0,1" bitfld.long 0x4 1. "DCRCFAIL,Data block sent/received (CRC check failed)" "0,1" bitfld.long 0x4 0. "CCRCFAIL,Command response received (CRC check failed)" "0,1" group.long 0x38++0xF line.long 0x0 "SDMMC_ICR,SDMMC interrupt clear register" bitfld.long 0x0 28. "IDMABTCC,IDMA buffer transfer complete clear bit" "B_0x0,B_0x1" bitfld.long 0x0 27. "IDMATEC,IDMA transfer error clear bit" "B_0x0,B_0x1" bitfld.long 0x0 26. "CKSTOPC,CKSTOP flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 25. "VSWENDC,VSWEND flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 24. "ACKTIMEOUTC,ACKTIMEOUT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 23. "ACKFAILC,ACKFAIL flag clear bit" "B_0x0,B_0x1" newline bitfld.long 0x0 22. "SDIOITC,SDIOIT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 21. "BUSYD0ENDC,BUSYD0END flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 11. "DABORTC,DABORT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 10. "DBCKENDC,DBCKEND flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 9. "DHOLDC,DHOLD flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 8. "DATAENDC,DATAEND flag clear bit" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "CMDSENTC,CMDSENT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 6. "CMDRENDC,CMDREND flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXOVERRC,RXOVERR flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXUNDERRC,TXUNDERR flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "DTIMEOUTC,DTIMEOUT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 2. "CTIMEOUTC,CTIMEOUT flag clear bit" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "DCRCFAILC,DCRCFAIL flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 0. "CCRCFAILC,CCRCFAIL flag clear bit" "B_0x0,B_0x1" line.long 0x4 "SDMMC_MASKR,SDMMC mask register" bitfld.long 0x4 28. "IDMABTCIE,IDMA buffer transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "CKSTOPIE,Voltage Switch clock stopped interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 25. "VSWENDIE,Voltage switch critical timing section completion interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ACKTIMEOUTIE,Acknowledgment timeout interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "ACKFAILIE,Acknowledgment Fail interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 22. "SDIOITIE,SDIO mode interrupt received interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 21. "BUSYD0ENDIE,BUSYD0END interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 18. "TXFIFOEIE,Tx FIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 17. "RXFIFOFIE,Rx FIFO full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 15. "RXFIFOHFIE,Rx FIFO half full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 14. "TXFIFOHEIE,Tx FIFO half empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "DABORTIE,Data transfer aborted interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "DBCKENDIE,Data block end interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "DHOLDIE,Data hold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "DATAENDIE,Data end interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "CMDSENTIE,Command sent interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "CMDRENDIE,Command response received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXOVERRIE,Rx FIFO overrun error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "TXUNDERRIE,Tx FIFO underrun error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "DTIMEOUTIE,Data timeout interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "CTIMEOUTIE,Command timeout interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "DCRCFAILIE,Data CRC fail interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CCRCFAILIE,Command CRC fail interrupt enable" "B_0x0,B_0x1" line.long 0x8 "SDMMC_ACKTIMER,SDMMC acknowledgment timer register" hexmask.long 0x8 0.--24. 1. "ACKTIME,Boot acknowledgment timeout period" line.long 0xC "SDMMC_FIFOTHRR,SDMMC data FIFO threshold register" hexmask.long.byte 0xC 0.--3. 1. "THR,FIFO threshold" group.long 0x50++0xB line.long 0x0 "SDMMC_IDMACTRLR,SDMMC DMA control register" bitfld.long 0x0 1. "IDMABMODE,Buffer mode selection" "B_0x0,B_0x1" bitfld.long 0x0 0. "IDMAEN,IDMA enable" "B_0x0,B_0x1" line.long 0x4 "SDMMC_IDMABSIZER,SDMMC IDMA buffer size register" hexmask.long.word 0x4 6.--16. 1. "IDMABNDT,Number of bytes per buffer" line.long 0x8 "SDMMC_IDMABASER,SDMMC IDMA buffer base address register" hexmask.long 0x8 0.--31. 1. "IDMABASE,Buffer memory base address bits [31:2] must be word aligned (bit [1:0] are always 0 and read only)" group.long 0x64++0x7 line.long 0x0 "SDMMC_IDMALAR,SDMMC IDMA linked list address register" bitfld.long 0x0 31. "ULA,Update SDMMC_IDMALAR from linked list when in linked list mode (SDMMC_IDMACTRLR.IDMABMODE select linked list mode)" "B_0x0,B_0x1" bitfld.long 0x0 30. "ULS,Update SDMMC_IDMABSIZE from the next linked list when in linked list mode (SDMMC_IDMACTRLR.IDMABMODE select linked list mode and ULA = 1)" "B_0x0,B_0x1" bitfld.long 0x0 29. "ABR,Acknowledge linked list buffer ready" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "IDMALA,Word aligned linked list item address offset" line.long 0x4 "SDMMC_IDMABAR,SDMMC IDMA linked list memory base register" hexmask.long 0x4 2.--31. 1. "IDMABA,Word aligned Linked list memory base address" group.long 0x80++0x3F line.long 0x0 "SDMMC_FIFOR0,SDMMC data FIFO registers 0" hexmask.long 0x0 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x4 "SDMMC_FIFOR1,SDMMC data FIFO registers 1" hexmask.long 0x4 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x8 "SDMMC_FIFOR2,SDMMC data FIFO registers 2" hexmask.long 0x8 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0xC "SDMMC_FIFOR3,SDMMC data FIFO registers 3" hexmask.long 0xC 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x10 "SDMMC_FIFOR4,SDMMC data FIFO registers 4" hexmask.long 0x10 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x14 "SDMMC_FIFOR5,SDMMC data FIFO registers 5" hexmask.long 0x14 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x18 "SDMMC_FIFOR6,SDMMC data FIFO registers 6" hexmask.long 0x18 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x1C "SDMMC_FIFOR7,SDMMC data FIFO registers 7" hexmask.long 0x1C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x20 "SDMMC_FIFOR8,SDMMC data FIFO registers 8" hexmask.long 0x20 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x24 "SDMMC_FIFOR9,SDMMC data FIFO registers 9" hexmask.long 0x24 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x28 "SDMMC_FIFOR10,SDMMC data FIFO registers 10" hexmask.long 0x28 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x2C "SDMMC_FIFOR11,SDMMC data FIFO registers 11" hexmask.long 0x2C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x30 "SDMMC_FIFOR12,SDMMC data FIFO registers 12" hexmask.long 0x30 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x34 "SDMMC_FIFOR13,SDMMC data FIFO registers 13" hexmask.long 0x34 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x38 "SDMMC_FIFOR14,SDMMC data FIFO registers 14" hexmask.long 0x38 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x3C "SDMMC_FIFOR15,SDMMC data FIFO registers 15" hexmask.long 0x3C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" rgroup.long 0x3F0++0xF line.long 0x0 "SDMMC_HWCFGR1,SDMMC hardware configuration register 1" hexmask.long.byte 0x0 0.--3. 1. "FIFOSIZE,SDMMC FIFO size" line.long 0x4 "SDMMC_VERR,SDMMC version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,SDMMC major revision number" hexmask.long.byte 0x4 0.--3. 1. "MINREV,SDMMC minor revision number" line.long 0x8 "SDMMC_IPIDR,SDMMC identification register" hexmask.long 0x8 0.--31. 1. "IP_ID,SDMMC identification" line.long 0xC "SDMMC_SIDR,SDMMC size identification register" hexmask.long 0xC 0.--31. 1. "SID,SDMMC size identification" tree.end tree "SDMMC2" base ad:0x48230000 group.long 0x0++0xF line.long 0x0 "SDMMC_POWER,SDMMC power control register" bitfld.long 0x0 4. "DIRPOL,Data and command direction signals polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 3. "VSWITCHEN,Voltage switch procedure enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "VSWITCH,Voltage switch sequence start" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "PWRCTRL,SDMMC state control bits" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "SDMMC_CLKCR,SDMMC clock control register" bitfld.long 0x4 20.--21. "SELCLKRX,Receive clock selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 19. "BUSSPEED,Bus speed for selection of SDMMC operating modes" "B_0x0,B_0x1" bitfld.long 0x4 18. "DDR,Data rate signaling selection" "B_0x0,B_0x1" bitfld.long 0x4 17. "HWFC_EN,Hardware flow control enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "NEGEDGE,SDMMC_CK dephasing selection bit for data and command" "B_0x0,B_0x1" bitfld.long 0x4 14.--15. "WIDBUS,Wide bus mode enable bit" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 12. "PWRSAV,Power saving configuration bit" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "CLKDIV,Clock divide factor" line.long 0x8 "SDMMC_ARGR,SDMMC argument register" hexmask.long 0x8 0.--31. 1. "CMDARG,Command argument" line.long 0xC "SDMMC_CMDR,SDMMC command register" bitfld.long 0xC 16. "CMDSUSPEND,The CPSM treats the command as a Suspend or Resume command and signals interrupt period start/end" "0,1" bitfld.long 0xC 15. "BOOTEN,Enable boot mode procedure" "B_0x0,B_0x1" bitfld.long 0xC 14. "BOOTMODE,Select the boot mode procedure to be used" "B_0x0,B_0x1" bitfld.long 0xC 13. "DTHOLD,Hold new data block transmission and reception in the DPSM" "0,1" bitfld.long 0xC 12. "CPSMEN,Command path state machine (CPSM) enable bit" "0,1" bitfld.long 0xC 11. "WAITPEND,CPSM waits for end of data transfer (CmdPend internal signal) from DPSM" "0,1" newline bitfld.long 0xC 10. "WAITINT,CPSM waits for interrupt request" "0,1" bitfld.long 0xC 8.--9. "WAITRESP,Wait for response bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 7. "CMDSTOP,The CPSM treats the command as a Stop Transmission command and signals abort to the DPSM" "0,1" bitfld.long 0xC 6. "CMDTRANS,The CPSM treats the command as a data transfer command stops the interrupt period and signals DataEnable to the DPSM" "0,1" hexmask.long.byte 0xC 0.--5. 1. "CMDINDEX,Command index" rgroup.long 0x10++0x13 line.long 0x0 "SDMMC_RESPCMDR,SDMMC command response register" hexmask.long.byte 0x0 0.--5. 1. "RESPCMD,Response command index" line.long 0x4 "SDMMC_RESP1R,SDMMC response 1 register" hexmask.long 0x4 0.--31. 1. "CARDSTATUS,Card status according table below" line.long 0x8 "SDMMC_RESP2R,SDMMC response 2 register" hexmask.long 0x8 0.--31. 1. "CARDSTATUS,Card status according table below" line.long 0xC "SDMMC_RESP3R,SDMMC response 3 register" hexmask.long 0xC 0.--31. 1. "CARDSTATUS,Card status according table below" line.long 0x10 "SDMMC_RESP4R,SDMMC response 4 register" hexmask.long 0x10 0.--31. 1. "CARDSTATUS,Card status according table below" group.long 0x24++0xB line.long 0x0 "SDMMC_DTIMER,SDMMC data timer register" hexmask.long 0x0 0.--31. 1. "DATATIME,Data and R1b busy timeout period" line.long 0x4 "SDMMC_DLENR,SDMMC data length register" hexmask.long 0x4 0.--24. 1. "DATALENGTH,Data length value" line.long 0x8 "SDMMC_DCTRL,SDMMC data control register" bitfld.long 0x8 13. "FIFORST,FIFO reset flushes any remaining data" "B_0x0,B_0x1" bitfld.long 0x8 12. "BOOTACKEN,Enable the reception of the boot acknowledgment" "B_0x0,B_0x1" bitfld.long 0x8 11. "SDIOEN,SD I/O interrupt enable functions" "0,1" bitfld.long 0x8 10. "RWMOD,Read Wait mode" "B_0x0,B_0x1" bitfld.long 0x8 9. "RWSTOP,Read Wait stop" "B_0x0,B_0x1" bitfld.long 0x8 8. "RWSTART,Read Wait start" "0,1" newline hexmask.long.byte 0x8 4.--7. 1. "DBLOCKSIZE,Data block size" bitfld.long 0x8 2.--3. "DTMODE,Data transfer mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 1. "DTDIR,Data transfer direction selection" "B_0x0,B_0x1" bitfld.long 0x8 0. "DTEN,Data transfer enable bit" "B_0x0,B_0x1" rgroup.long 0x30++0x7 line.long 0x0 "SDMMC_DCNTR,SDMMC data counter register" hexmask.long 0x0 0.--24. 1. "DATACOUNT,Data count value" line.long 0x4 "SDMMC_STAR,SDMMC status register" bitfld.long 0x4 28. "IDMABTC,IDMA buffer transfer complete" "0,1" bitfld.long 0x4 27. "IDMATE,IDMA transfer error" "0,1" bitfld.long 0x4 26. "CKSTOP,SDMMC_CK stopped in Voltage switch procedure" "0,1" bitfld.long 0x4 25. "VSWEND,Voltage switch critical timing section completion" "0,1" bitfld.long 0x4 24. "ACKTIMEOUT,Boot acknowledgment timeout" "0,1" bitfld.long 0x4 23. "ACKFAIL,Boot acknowledgment received (boot acknowledgment check fail)" "0,1" newline bitfld.long 0x4 22. "SDIOIT,SDIO interrupt received" "0,1" bitfld.long 0x4 21. "BUSYD0END,end of SDMMC_D0 Busy following a CMD response detected" "B_0x0,B_0x1" bitfld.long 0x4 20. "BUSYD0,Inverted value of SDMMC_D0 line (Busy) sampled at the end of a CMD response and a second time 2 SDMMC_CK cycles after the CMD response" "B_0x0,B_0x1" bitfld.long 0x4 19. "RXFIFOE,Receive FIFO empty" "0,1" bitfld.long 0x4 18. "TXFIFOE,Transmit FIFO empty" "0,1" bitfld.long 0x4 17. "RXFIFOF,Receive FIFO full" "0,1" newline bitfld.long 0x4 16. "TXFIFOF,Transmit FIFO full" "0,1" bitfld.long 0x4 15. "RXFIFOHF,Receive FIFO half full" "0,1" bitfld.long 0x4 14. "TXFIFOHE,Transmit FIFO half empty" "0,1" bitfld.long 0x4 13. "CPSMACT,Command path state machine active i.e. not in Idle state" "0,1" bitfld.long 0x4 12. "DPSMACT,Data path state machine active i.e. not in Idle state" "0,1" bitfld.long 0x4 11. "DABORT,Data transfer aborted by CMD12" "0,1" newline bitfld.long 0x4 10. "DBCKEND,Data block sent/received" "0,1" bitfld.long 0x4 9. "DHOLD,Data transfer Hold" "0,1" bitfld.long 0x4 8. "DATAEND,Data transfer ended correctly" "0,1" bitfld.long 0x4 7. "CMDSENT,Command sent (no response required)" "0,1" bitfld.long 0x4 6. "CMDREND,Command response received (CRC check passed or no CRC)" "0,1" bitfld.long 0x4 5. "RXOVERR,Received FIFO overrun error (masked by hardware when IDMA is enabled)" "0,1" newline bitfld.long 0x4 4. "TXUNDERR,Transmit FIFO underrun error (masked by hardware when IDMA is enabled)" "0,1" bitfld.long 0x4 3. "DTIMEOUT,Data timeout" "0,1" bitfld.long 0x4 2. "CTIMEOUT,Command response timeout" "0,1" bitfld.long 0x4 1. "DCRCFAIL,Data block sent/received (CRC check failed)" "0,1" bitfld.long 0x4 0. "CCRCFAIL,Command response received (CRC check failed)" "0,1" group.long 0x38++0xF line.long 0x0 "SDMMC_ICR,SDMMC interrupt clear register" bitfld.long 0x0 28. "IDMABTCC,IDMA buffer transfer complete clear bit" "B_0x0,B_0x1" bitfld.long 0x0 27. "IDMATEC,IDMA transfer error clear bit" "B_0x0,B_0x1" bitfld.long 0x0 26. "CKSTOPC,CKSTOP flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 25. "VSWENDC,VSWEND flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 24. "ACKTIMEOUTC,ACKTIMEOUT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 23. "ACKFAILC,ACKFAIL flag clear bit" "B_0x0,B_0x1" newline bitfld.long 0x0 22. "SDIOITC,SDIOIT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 21. "BUSYD0ENDC,BUSYD0END flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 11. "DABORTC,DABORT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 10. "DBCKENDC,DBCKEND flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 9. "DHOLDC,DHOLD flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 8. "DATAENDC,DATAEND flag clear bit" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "CMDSENTC,CMDSENT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 6. "CMDRENDC,CMDREND flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXOVERRC,RXOVERR flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXUNDERRC,TXUNDERR flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "DTIMEOUTC,DTIMEOUT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 2. "CTIMEOUTC,CTIMEOUT flag clear bit" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "DCRCFAILC,DCRCFAIL flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 0. "CCRCFAILC,CCRCFAIL flag clear bit" "B_0x0,B_0x1" line.long 0x4 "SDMMC_MASKR,SDMMC mask register" bitfld.long 0x4 28. "IDMABTCIE,IDMA buffer transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "CKSTOPIE,Voltage Switch clock stopped interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 25. "VSWENDIE,Voltage switch critical timing section completion interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ACKTIMEOUTIE,Acknowledgment timeout interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "ACKFAILIE,Acknowledgment Fail interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 22. "SDIOITIE,SDIO mode interrupt received interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 21. "BUSYD0ENDIE,BUSYD0END interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 18. "TXFIFOEIE,Tx FIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 17. "RXFIFOFIE,Rx FIFO full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 15. "RXFIFOHFIE,Rx FIFO half full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 14. "TXFIFOHEIE,Tx FIFO half empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "DABORTIE,Data transfer aborted interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "DBCKENDIE,Data block end interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "DHOLDIE,Data hold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "DATAENDIE,Data end interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "CMDSENTIE,Command sent interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "CMDRENDIE,Command response received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXOVERRIE,Rx FIFO overrun error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "TXUNDERRIE,Tx FIFO underrun error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "DTIMEOUTIE,Data timeout interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "CTIMEOUTIE,Command timeout interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "DCRCFAILIE,Data CRC fail interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CCRCFAILIE,Command CRC fail interrupt enable" "B_0x0,B_0x1" line.long 0x8 "SDMMC_ACKTIMER,SDMMC acknowledgment timer register" hexmask.long 0x8 0.--24. 1. "ACKTIME,Boot acknowledgment timeout period" line.long 0xC "SDMMC_FIFOTHRR,SDMMC data FIFO threshold register" hexmask.long.byte 0xC 0.--3. 1. "THR,FIFO threshold" group.long 0x50++0xB line.long 0x0 "SDMMC_IDMACTRLR,SDMMC DMA control register" bitfld.long 0x0 1. "IDMABMODE,Buffer mode selection" "B_0x0,B_0x1" bitfld.long 0x0 0. "IDMAEN,IDMA enable" "B_0x0,B_0x1" line.long 0x4 "SDMMC_IDMABSIZER,SDMMC IDMA buffer size register" hexmask.long.word 0x4 6.--16. 1. "IDMABNDT,Number of bytes per buffer" line.long 0x8 "SDMMC_IDMABASER,SDMMC IDMA buffer base address register" hexmask.long 0x8 0.--31. 1. "IDMABASE,Buffer memory base address bits [31:2] must be word aligned (bit [1:0] are always 0 and read only)" group.long 0x64++0x7 line.long 0x0 "SDMMC_IDMALAR,SDMMC IDMA linked list address register" bitfld.long 0x0 31. "ULA,Update SDMMC_IDMALAR from linked list when in linked list mode (SDMMC_IDMACTRLR.IDMABMODE select linked list mode)" "B_0x0,B_0x1" bitfld.long 0x0 30. "ULS,Update SDMMC_IDMABSIZE from the next linked list when in linked list mode (SDMMC_IDMACTRLR.IDMABMODE select linked list mode and ULA = 1)" "B_0x0,B_0x1" bitfld.long 0x0 29. "ABR,Acknowledge linked list buffer ready" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "IDMALA,Word aligned linked list item address offset" line.long 0x4 "SDMMC_IDMABAR,SDMMC IDMA linked list memory base register" hexmask.long 0x4 2.--31. 1. "IDMABA,Word aligned Linked list memory base address" group.long 0x80++0x3F line.long 0x0 "SDMMC_FIFOR0,SDMMC data FIFO registers 0" hexmask.long 0x0 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x4 "SDMMC_FIFOR1,SDMMC data FIFO registers 1" hexmask.long 0x4 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x8 "SDMMC_FIFOR2,SDMMC data FIFO registers 2" hexmask.long 0x8 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0xC "SDMMC_FIFOR3,SDMMC data FIFO registers 3" hexmask.long 0xC 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x10 "SDMMC_FIFOR4,SDMMC data FIFO registers 4" hexmask.long 0x10 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x14 "SDMMC_FIFOR5,SDMMC data FIFO registers 5" hexmask.long 0x14 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x18 "SDMMC_FIFOR6,SDMMC data FIFO registers 6" hexmask.long 0x18 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x1C "SDMMC_FIFOR7,SDMMC data FIFO registers 7" hexmask.long 0x1C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x20 "SDMMC_FIFOR8,SDMMC data FIFO registers 8" hexmask.long 0x20 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x24 "SDMMC_FIFOR9,SDMMC data FIFO registers 9" hexmask.long 0x24 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x28 "SDMMC_FIFOR10,SDMMC data FIFO registers 10" hexmask.long 0x28 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x2C "SDMMC_FIFOR11,SDMMC data FIFO registers 11" hexmask.long 0x2C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x30 "SDMMC_FIFOR12,SDMMC data FIFO registers 12" hexmask.long 0x30 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x34 "SDMMC_FIFOR13,SDMMC data FIFO registers 13" hexmask.long 0x34 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x38 "SDMMC_FIFOR14,SDMMC data FIFO registers 14" hexmask.long 0x38 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x3C "SDMMC_FIFOR15,SDMMC data FIFO registers 15" hexmask.long 0x3C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" rgroup.long 0x3F0++0xF line.long 0x0 "SDMMC_HWCFGR1,SDMMC hardware configuration register 1" hexmask.long.byte 0x0 0.--3. 1. "FIFOSIZE,SDMMC FIFO size" line.long 0x4 "SDMMC_VERR,SDMMC version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,SDMMC major revision number" hexmask.long.byte 0x4 0.--3. 1. "MINREV,SDMMC minor revision number" line.long 0x8 "SDMMC_IPIDR,SDMMC identification register" hexmask.long 0x8 0.--31. 1. "IP_ID,SDMMC identification" line.long 0xC "SDMMC_SIDR,SDMMC size identification register" hexmask.long 0xC 0.--31. 1. "SID,SDMMC size identification" tree.end tree "SDMMC2_S" base ad:0x58230000 group.long 0x0++0xF line.long 0x0 "SDMMC_POWER,SDMMC power control register" bitfld.long 0x0 4. "DIRPOL,Data and command direction signals polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 3. "VSWITCHEN,Voltage switch procedure enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "VSWITCH,Voltage switch sequence start" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "PWRCTRL,SDMMC state control bits" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "SDMMC_CLKCR,SDMMC clock control register" bitfld.long 0x4 20.--21. "SELCLKRX,Receive clock selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 19. "BUSSPEED,Bus speed for selection of SDMMC operating modes" "B_0x0,B_0x1" bitfld.long 0x4 18. "DDR,Data rate signaling selection" "B_0x0,B_0x1" bitfld.long 0x4 17. "HWFC_EN,Hardware flow control enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "NEGEDGE,SDMMC_CK dephasing selection bit for data and command" "B_0x0,B_0x1" bitfld.long 0x4 14.--15. "WIDBUS,Wide bus mode enable bit" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 12. "PWRSAV,Power saving configuration bit" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "CLKDIV,Clock divide factor" line.long 0x8 "SDMMC_ARGR,SDMMC argument register" hexmask.long 0x8 0.--31. 1. "CMDARG,Command argument" line.long 0xC "SDMMC_CMDR,SDMMC command register" bitfld.long 0xC 16. "CMDSUSPEND,The CPSM treats the command as a Suspend or Resume command and signals interrupt period start/end" "0,1" bitfld.long 0xC 15. "BOOTEN,Enable boot mode procedure" "B_0x0,B_0x1" bitfld.long 0xC 14. "BOOTMODE,Select the boot mode procedure to be used" "B_0x0,B_0x1" bitfld.long 0xC 13. "DTHOLD,Hold new data block transmission and reception in the DPSM" "0,1" bitfld.long 0xC 12. "CPSMEN,Command path state machine (CPSM) enable bit" "0,1" bitfld.long 0xC 11. "WAITPEND,CPSM waits for end of data transfer (CmdPend internal signal) from DPSM" "0,1" newline bitfld.long 0xC 10. "WAITINT,CPSM waits for interrupt request" "0,1" bitfld.long 0xC 8.--9. "WAITRESP,Wait for response bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 7. "CMDSTOP,The CPSM treats the command as a Stop Transmission command and signals abort to the DPSM" "0,1" bitfld.long 0xC 6. "CMDTRANS,The CPSM treats the command as a data transfer command stops the interrupt period and signals DataEnable to the DPSM" "0,1" hexmask.long.byte 0xC 0.--5. 1. "CMDINDEX,Command index" rgroup.long 0x10++0x13 line.long 0x0 "SDMMC_RESPCMDR,SDMMC command response register" hexmask.long.byte 0x0 0.--5. 1. "RESPCMD,Response command index" line.long 0x4 "SDMMC_RESP1R,SDMMC response 1 register" hexmask.long 0x4 0.--31. 1. "CARDSTATUS,Card status according table below" line.long 0x8 "SDMMC_RESP2R,SDMMC response 2 register" hexmask.long 0x8 0.--31. 1. "CARDSTATUS,Card status according table below" line.long 0xC "SDMMC_RESP3R,SDMMC response 3 register" hexmask.long 0xC 0.--31. 1. "CARDSTATUS,Card status according table below" line.long 0x10 "SDMMC_RESP4R,SDMMC response 4 register" hexmask.long 0x10 0.--31. 1. "CARDSTATUS,Card status according table below" group.long 0x24++0xB line.long 0x0 "SDMMC_DTIMER,SDMMC data timer register" hexmask.long 0x0 0.--31. 1. "DATATIME,Data and R1b busy timeout period" line.long 0x4 "SDMMC_DLENR,SDMMC data length register" hexmask.long 0x4 0.--24. 1. "DATALENGTH,Data length value" line.long 0x8 "SDMMC_DCTRL,SDMMC data control register" bitfld.long 0x8 13. "FIFORST,FIFO reset flushes any remaining data" "B_0x0,B_0x1" bitfld.long 0x8 12. "BOOTACKEN,Enable the reception of the boot acknowledgment" "B_0x0,B_0x1" bitfld.long 0x8 11. "SDIOEN,SD I/O interrupt enable functions" "0,1" bitfld.long 0x8 10. "RWMOD,Read Wait mode" "B_0x0,B_0x1" bitfld.long 0x8 9. "RWSTOP,Read Wait stop" "B_0x0,B_0x1" bitfld.long 0x8 8. "RWSTART,Read Wait start" "0,1" newline hexmask.long.byte 0x8 4.--7. 1. "DBLOCKSIZE,Data block size" bitfld.long 0x8 2.--3. "DTMODE,Data transfer mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 1. "DTDIR,Data transfer direction selection" "B_0x0,B_0x1" bitfld.long 0x8 0. "DTEN,Data transfer enable bit" "B_0x0,B_0x1" rgroup.long 0x30++0x7 line.long 0x0 "SDMMC_DCNTR,SDMMC data counter register" hexmask.long 0x0 0.--24. 1. "DATACOUNT,Data count value" line.long 0x4 "SDMMC_STAR,SDMMC status register" bitfld.long 0x4 28. "IDMABTC,IDMA buffer transfer complete" "0,1" bitfld.long 0x4 27. "IDMATE,IDMA transfer error" "0,1" bitfld.long 0x4 26. "CKSTOP,SDMMC_CK stopped in Voltage switch procedure" "0,1" bitfld.long 0x4 25. "VSWEND,Voltage switch critical timing section completion" "0,1" bitfld.long 0x4 24. "ACKTIMEOUT,Boot acknowledgment timeout" "0,1" bitfld.long 0x4 23. "ACKFAIL,Boot acknowledgment received (boot acknowledgment check fail)" "0,1" newline bitfld.long 0x4 22. "SDIOIT,SDIO interrupt received" "0,1" bitfld.long 0x4 21. "BUSYD0END,end of SDMMC_D0 Busy following a CMD response detected" "B_0x0,B_0x1" bitfld.long 0x4 20. "BUSYD0,Inverted value of SDMMC_D0 line (Busy) sampled at the end of a CMD response and a second time 2 SDMMC_CK cycles after the CMD response" "B_0x0,B_0x1" bitfld.long 0x4 19. "RXFIFOE,Receive FIFO empty" "0,1" bitfld.long 0x4 18. "TXFIFOE,Transmit FIFO empty" "0,1" bitfld.long 0x4 17. "RXFIFOF,Receive FIFO full" "0,1" newline bitfld.long 0x4 16. "TXFIFOF,Transmit FIFO full" "0,1" bitfld.long 0x4 15. "RXFIFOHF,Receive FIFO half full" "0,1" bitfld.long 0x4 14. "TXFIFOHE,Transmit FIFO half empty" "0,1" bitfld.long 0x4 13. "CPSMACT,Command path state machine active i.e. not in Idle state" "0,1" bitfld.long 0x4 12. "DPSMACT,Data path state machine active i.e. not in Idle state" "0,1" bitfld.long 0x4 11. "DABORT,Data transfer aborted by CMD12" "0,1" newline bitfld.long 0x4 10. "DBCKEND,Data block sent/received" "0,1" bitfld.long 0x4 9. "DHOLD,Data transfer Hold" "0,1" bitfld.long 0x4 8. "DATAEND,Data transfer ended correctly" "0,1" bitfld.long 0x4 7. "CMDSENT,Command sent (no response required)" "0,1" bitfld.long 0x4 6. "CMDREND,Command response received (CRC check passed or no CRC)" "0,1" bitfld.long 0x4 5. "RXOVERR,Received FIFO overrun error (masked by hardware when IDMA is enabled)" "0,1" newline bitfld.long 0x4 4. "TXUNDERR,Transmit FIFO underrun error (masked by hardware when IDMA is enabled)" "0,1" bitfld.long 0x4 3. "DTIMEOUT,Data timeout" "0,1" bitfld.long 0x4 2. "CTIMEOUT,Command response timeout" "0,1" bitfld.long 0x4 1. "DCRCFAIL,Data block sent/received (CRC check failed)" "0,1" bitfld.long 0x4 0. "CCRCFAIL,Command response received (CRC check failed)" "0,1" group.long 0x38++0xF line.long 0x0 "SDMMC_ICR,SDMMC interrupt clear register" bitfld.long 0x0 28. "IDMABTCC,IDMA buffer transfer complete clear bit" "B_0x0,B_0x1" bitfld.long 0x0 27. "IDMATEC,IDMA transfer error clear bit" "B_0x0,B_0x1" bitfld.long 0x0 26. "CKSTOPC,CKSTOP flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 25. "VSWENDC,VSWEND flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 24. "ACKTIMEOUTC,ACKTIMEOUT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 23. "ACKFAILC,ACKFAIL flag clear bit" "B_0x0,B_0x1" newline bitfld.long 0x0 22. "SDIOITC,SDIOIT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 21. "BUSYD0ENDC,BUSYD0END flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 11. "DABORTC,DABORT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 10. "DBCKENDC,DBCKEND flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 9. "DHOLDC,DHOLD flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 8. "DATAENDC,DATAEND flag clear bit" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "CMDSENTC,CMDSENT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 6. "CMDRENDC,CMDREND flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXOVERRC,RXOVERR flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXUNDERRC,TXUNDERR flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "DTIMEOUTC,DTIMEOUT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 2. "CTIMEOUTC,CTIMEOUT flag clear bit" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "DCRCFAILC,DCRCFAIL flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 0. "CCRCFAILC,CCRCFAIL flag clear bit" "B_0x0,B_0x1" line.long 0x4 "SDMMC_MASKR,SDMMC mask register" bitfld.long 0x4 28. "IDMABTCIE,IDMA buffer transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "CKSTOPIE,Voltage Switch clock stopped interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 25. "VSWENDIE,Voltage switch critical timing section completion interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ACKTIMEOUTIE,Acknowledgment timeout interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "ACKFAILIE,Acknowledgment Fail interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 22. "SDIOITIE,SDIO mode interrupt received interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 21. "BUSYD0ENDIE,BUSYD0END interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 18. "TXFIFOEIE,Tx FIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 17. "RXFIFOFIE,Rx FIFO full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 15. "RXFIFOHFIE,Rx FIFO half full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 14. "TXFIFOHEIE,Tx FIFO half empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "DABORTIE,Data transfer aborted interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "DBCKENDIE,Data block end interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "DHOLDIE,Data hold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "DATAENDIE,Data end interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "CMDSENTIE,Command sent interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "CMDRENDIE,Command response received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXOVERRIE,Rx FIFO overrun error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "TXUNDERRIE,Tx FIFO underrun error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "DTIMEOUTIE,Data timeout interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "CTIMEOUTIE,Command timeout interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "DCRCFAILIE,Data CRC fail interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CCRCFAILIE,Command CRC fail interrupt enable" "B_0x0,B_0x1" line.long 0x8 "SDMMC_ACKTIMER,SDMMC acknowledgment timer register" hexmask.long 0x8 0.--24. 1. "ACKTIME,Boot acknowledgment timeout period" line.long 0xC "SDMMC_FIFOTHRR,SDMMC data FIFO threshold register" hexmask.long.byte 0xC 0.--3. 1. "THR,FIFO threshold" group.long 0x50++0xB line.long 0x0 "SDMMC_IDMACTRLR,SDMMC DMA control register" bitfld.long 0x0 1. "IDMABMODE,Buffer mode selection" "B_0x0,B_0x1" bitfld.long 0x0 0. "IDMAEN,IDMA enable" "B_0x0,B_0x1" line.long 0x4 "SDMMC_IDMABSIZER,SDMMC IDMA buffer size register" hexmask.long.word 0x4 6.--16. 1. "IDMABNDT,Number of bytes per buffer" line.long 0x8 "SDMMC_IDMABASER,SDMMC IDMA buffer base address register" hexmask.long 0x8 0.--31. 1. "IDMABASE,Buffer memory base address bits [31:2] must be word aligned (bit [1:0] are always 0 and read only)" group.long 0x64++0x7 line.long 0x0 "SDMMC_IDMALAR,SDMMC IDMA linked list address register" bitfld.long 0x0 31. "ULA,Update SDMMC_IDMALAR from linked list when in linked list mode (SDMMC_IDMACTRLR.IDMABMODE select linked list mode)" "B_0x0,B_0x1" bitfld.long 0x0 30. "ULS,Update SDMMC_IDMABSIZE from the next linked list when in linked list mode (SDMMC_IDMACTRLR.IDMABMODE select linked list mode and ULA = 1)" "B_0x0,B_0x1" bitfld.long 0x0 29. "ABR,Acknowledge linked list buffer ready" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "IDMALA,Word aligned linked list item address offset" line.long 0x4 "SDMMC_IDMABAR,SDMMC IDMA linked list memory base register" hexmask.long 0x4 2.--31. 1. "IDMABA,Word aligned Linked list memory base address" group.long 0x80++0x3F line.long 0x0 "SDMMC_FIFOR0,SDMMC data FIFO registers 0" hexmask.long 0x0 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x4 "SDMMC_FIFOR1,SDMMC data FIFO registers 1" hexmask.long 0x4 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x8 "SDMMC_FIFOR2,SDMMC data FIFO registers 2" hexmask.long 0x8 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0xC "SDMMC_FIFOR3,SDMMC data FIFO registers 3" hexmask.long 0xC 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x10 "SDMMC_FIFOR4,SDMMC data FIFO registers 4" hexmask.long 0x10 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x14 "SDMMC_FIFOR5,SDMMC data FIFO registers 5" hexmask.long 0x14 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x18 "SDMMC_FIFOR6,SDMMC data FIFO registers 6" hexmask.long 0x18 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x1C "SDMMC_FIFOR7,SDMMC data FIFO registers 7" hexmask.long 0x1C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x20 "SDMMC_FIFOR8,SDMMC data FIFO registers 8" hexmask.long 0x20 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x24 "SDMMC_FIFOR9,SDMMC data FIFO registers 9" hexmask.long 0x24 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x28 "SDMMC_FIFOR10,SDMMC data FIFO registers 10" hexmask.long 0x28 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x2C "SDMMC_FIFOR11,SDMMC data FIFO registers 11" hexmask.long 0x2C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x30 "SDMMC_FIFOR12,SDMMC data FIFO registers 12" hexmask.long 0x30 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x34 "SDMMC_FIFOR13,SDMMC data FIFO registers 13" hexmask.long 0x34 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x38 "SDMMC_FIFOR14,SDMMC data FIFO registers 14" hexmask.long 0x38 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x3C "SDMMC_FIFOR15,SDMMC data FIFO registers 15" hexmask.long 0x3C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" rgroup.long 0x3F0++0xF line.long 0x0 "SDMMC_HWCFGR1,SDMMC hardware configuration register 1" hexmask.long.byte 0x0 0.--3. 1. "FIFOSIZE,SDMMC FIFO size" line.long 0x4 "SDMMC_VERR,SDMMC version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,SDMMC major revision number" hexmask.long.byte 0x4 0.--3. 1. "MINREV,SDMMC minor revision number" line.long 0x8 "SDMMC_IPIDR,SDMMC identification register" hexmask.long 0x8 0.--31. 1. "IP_ID,SDMMC identification" line.long 0xC "SDMMC_SIDR,SDMMC size identification register" hexmask.long 0xC 0.--31. 1. "SID,SDMMC size identification" tree.end tree "SDMMC3" base ad:0x48240000 group.long 0x0++0xF line.long 0x0 "SDMMC_POWER,SDMMC power control register" bitfld.long 0x0 4. "DIRPOL,Data and command direction signals polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 3. "VSWITCHEN,Voltage switch procedure enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "VSWITCH,Voltage switch sequence start" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "PWRCTRL,SDMMC state control bits" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "SDMMC_CLKCR,SDMMC clock control register" bitfld.long 0x4 20.--21. "SELCLKRX,Receive clock selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 19. "BUSSPEED,Bus speed for selection of SDMMC operating modes" "B_0x0,B_0x1" bitfld.long 0x4 18. "DDR,Data rate signaling selection" "B_0x0,B_0x1" bitfld.long 0x4 17. "HWFC_EN,Hardware flow control enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "NEGEDGE,SDMMC_CK dephasing selection bit for data and command" "B_0x0,B_0x1" bitfld.long 0x4 14.--15. "WIDBUS,Wide bus mode enable bit" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 12. "PWRSAV,Power saving configuration bit" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "CLKDIV,Clock divide factor" line.long 0x8 "SDMMC_ARGR,SDMMC argument register" hexmask.long 0x8 0.--31. 1. "CMDARG,Command argument" line.long 0xC "SDMMC_CMDR,SDMMC command register" bitfld.long 0xC 16. "CMDSUSPEND,The CPSM treats the command as a Suspend or Resume command and signals interrupt period start/end" "0,1" bitfld.long 0xC 15. "BOOTEN,Enable boot mode procedure" "B_0x0,B_0x1" bitfld.long 0xC 14. "BOOTMODE,Select the boot mode procedure to be used" "B_0x0,B_0x1" bitfld.long 0xC 13. "DTHOLD,Hold new data block transmission and reception in the DPSM" "0,1" bitfld.long 0xC 12. "CPSMEN,Command path state machine (CPSM) enable bit" "0,1" bitfld.long 0xC 11. "WAITPEND,CPSM waits for end of data transfer (CmdPend internal signal) from DPSM" "0,1" newline bitfld.long 0xC 10. "WAITINT,CPSM waits for interrupt request" "0,1" bitfld.long 0xC 8.--9. "WAITRESP,Wait for response bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 7. "CMDSTOP,The CPSM treats the command as a Stop Transmission command and signals abort to the DPSM" "0,1" bitfld.long 0xC 6. "CMDTRANS,The CPSM treats the command as a data transfer command stops the interrupt period and signals DataEnable to the DPSM" "0,1" hexmask.long.byte 0xC 0.--5. 1. "CMDINDEX,Command index" rgroup.long 0x10++0x13 line.long 0x0 "SDMMC_RESPCMDR,SDMMC command response register" hexmask.long.byte 0x0 0.--5. 1. "RESPCMD,Response command index" line.long 0x4 "SDMMC_RESP1R,SDMMC response 1 register" hexmask.long 0x4 0.--31. 1. "CARDSTATUS,Card status according table below" line.long 0x8 "SDMMC_RESP2R,SDMMC response 2 register" hexmask.long 0x8 0.--31. 1. "CARDSTATUS,Card status according table below" line.long 0xC "SDMMC_RESP3R,SDMMC response 3 register" hexmask.long 0xC 0.--31. 1. "CARDSTATUS,Card status according table below" line.long 0x10 "SDMMC_RESP4R,SDMMC response 4 register" hexmask.long 0x10 0.--31. 1. "CARDSTATUS,Card status according table below" group.long 0x24++0xB line.long 0x0 "SDMMC_DTIMER,SDMMC data timer register" hexmask.long 0x0 0.--31. 1. "DATATIME,Data and R1b busy timeout period" line.long 0x4 "SDMMC_DLENR,SDMMC data length register" hexmask.long 0x4 0.--24. 1. "DATALENGTH,Data length value" line.long 0x8 "SDMMC_DCTRL,SDMMC data control register" bitfld.long 0x8 13. "FIFORST,FIFO reset flushes any remaining data" "B_0x0,B_0x1" bitfld.long 0x8 12. "BOOTACKEN,Enable the reception of the boot acknowledgment" "B_0x0,B_0x1" bitfld.long 0x8 11. "SDIOEN,SD I/O interrupt enable functions" "0,1" bitfld.long 0x8 10. "RWMOD,Read Wait mode" "B_0x0,B_0x1" bitfld.long 0x8 9. "RWSTOP,Read Wait stop" "B_0x0,B_0x1" bitfld.long 0x8 8. "RWSTART,Read Wait start" "0,1" newline hexmask.long.byte 0x8 4.--7. 1. "DBLOCKSIZE,Data block size" bitfld.long 0x8 2.--3. "DTMODE,Data transfer mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 1. "DTDIR,Data transfer direction selection" "B_0x0,B_0x1" bitfld.long 0x8 0. "DTEN,Data transfer enable bit" "B_0x0,B_0x1" rgroup.long 0x30++0x7 line.long 0x0 "SDMMC_DCNTR,SDMMC data counter register" hexmask.long 0x0 0.--24. 1. "DATACOUNT,Data count value" line.long 0x4 "SDMMC_STAR,SDMMC status register" bitfld.long 0x4 28. "IDMABTC,IDMA buffer transfer complete" "0,1" bitfld.long 0x4 27. "IDMATE,IDMA transfer error" "0,1" bitfld.long 0x4 26. "CKSTOP,SDMMC_CK stopped in Voltage switch procedure" "0,1" bitfld.long 0x4 25. "VSWEND,Voltage switch critical timing section completion" "0,1" bitfld.long 0x4 24. "ACKTIMEOUT,Boot acknowledgment timeout" "0,1" bitfld.long 0x4 23. "ACKFAIL,Boot acknowledgment received (boot acknowledgment check fail)" "0,1" newline bitfld.long 0x4 22. "SDIOIT,SDIO interrupt received" "0,1" bitfld.long 0x4 21. "BUSYD0END,end of SDMMC_D0 Busy following a CMD response detected" "B_0x0,B_0x1" bitfld.long 0x4 20. "BUSYD0,Inverted value of SDMMC_D0 line (Busy) sampled at the end of a CMD response and a second time 2 SDMMC_CK cycles after the CMD response" "B_0x0,B_0x1" bitfld.long 0x4 19. "RXFIFOE,Receive FIFO empty" "0,1" bitfld.long 0x4 18. "TXFIFOE,Transmit FIFO empty" "0,1" bitfld.long 0x4 17. "RXFIFOF,Receive FIFO full" "0,1" newline bitfld.long 0x4 16. "TXFIFOF,Transmit FIFO full" "0,1" bitfld.long 0x4 15. "RXFIFOHF,Receive FIFO half full" "0,1" bitfld.long 0x4 14. "TXFIFOHE,Transmit FIFO half empty" "0,1" bitfld.long 0x4 13. "CPSMACT,Command path state machine active i.e. not in Idle state" "0,1" bitfld.long 0x4 12. "DPSMACT,Data path state machine active i.e. not in Idle state" "0,1" bitfld.long 0x4 11. "DABORT,Data transfer aborted by CMD12" "0,1" newline bitfld.long 0x4 10. "DBCKEND,Data block sent/received" "0,1" bitfld.long 0x4 9. "DHOLD,Data transfer Hold" "0,1" bitfld.long 0x4 8. "DATAEND,Data transfer ended correctly" "0,1" bitfld.long 0x4 7. "CMDSENT,Command sent (no response required)" "0,1" bitfld.long 0x4 6. "CMDREND,Command response received (CRC check passed or no CRC)" "0,1" bitfld.long 0x4 5. "RXOVERR,Received FIFO overrun error (masked by hardware when IDMA is enabled)" "0,1" newline bitfld.long 0x4 4. "TXUNDERR,Transmit FIFO underrun error (masked by hardware when IDMA is enabled)" "0,1" bitfld.long 0x4 3. "DTIMEOUT,Data timeout" "0,1" bitfld.long 0x4 2. "CTIMEOUT,Command response timeout" "0,1" bitfld.long 0x4 1. "DCRCFAIL,Data block sent/received (CRC check failed)" "0,1" bitfld.long 0x4 0. "CCRCFAIL,Command response received (CRC check failed)" "0,1" group.long 0x38++0xF line.long 0x0 "SDMMC_ICR,SDMMC interrupt clear register" bitfld.long 0x0 28. "IDMABTCC,IDMA buffer transfer complete clear bit" "B_0x0,B_0x1" bitfld.long 0x0 27. "IDMATEC,IDMA transfer error clear bit" "B_0x0,B_0x1" bitfld.long 0x0 26. "CKSTOPC,CKSTOP flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 25. "VSWENDC,VSWEND flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 24. "ACKTIMEOUTC,ACKTIMEOUT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 23. "ACKFAILC,ACKFAIL flag clear bit" "B_0x0,B_0x1" newline bitfld.long 0x0 22. "SDIOITC,SDIOIT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 21. "BUSYD0ENDC,BUSYD0END flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 11. "DABORTC,DABORT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 10. "DBCKENDC,DBCKEND flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 9. "DHOLDC,DHOLD flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 8. "DATAENDC,DATAEND flag clear bit" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "CMDSENTC,CMDSENT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 6. "CMDRENDC,CMDREND flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXOVERRC,RXOVERR flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXUNDERRC,TXUNDERR flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "DTIMEOUTC,DTIMEOUT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 2. "CTIMEOUTC,CTIMEOUT flag clear bit" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "DCRCFAILC,DCRCFAIL flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 0. "CCRCFAILC,CCRCFAIL flag clear bit" "B_0x0,B_0x1" line.long 0x4 "SDMMC_MASKR,SDMMC mask register" bitfld.long 0x4 28. "IDMABTCIE,IDMA buffer transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "CKSTOPIE,Voltage Switch clock stopped interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 25. "VSWENDIE,Voltage switch critical timing section completion interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ACKTIMEOUTIE,Acknowledgment timeout interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "ACKFAILIE,Acknowledgment Fail interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 22. "SDIOITIE,SDIO mode interrupt received interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 21. "BUSYD0ENDIE,BUSYD0END interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 18. "TXFIFOEIE,Tx FIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 17. "RXFIFOFIE,Rx FIFO full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 15. "RXFIFOHFIE,Rx FIFO half full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 14. "TXFIFOHEIE,Tx FIFO half empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "DABORTIE,Data transfer aborted interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "DBCKENDIE,Data block end interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "DHOLDIE,Data hold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "DATAENDIE,Data end interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "CMDSENTIE,Command sent interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "CMDRENDIE,Command response received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXOVERRIE,Rx FIFO overrun error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "TXUNDERRIE,Tx FIFO underrun error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "DTIMEOUTIE,Data timeout interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "CTIMEOUTIE,Command timeout interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "DCRCFAILIE,Data CRC fail interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CCRCFAILIE,Command CRC fail interrupt enable" "B_0x0,B_0x1" line.long 0x8 "SDMMC_ACKTIMER,SDMMC acknowledgment timer register" hexmask.long 0x8 0.--24. 1. "ACKTIME,Boot acknowledgment timeout period" line.long 0xC "SDMMC_FIFOTHRR,SDMMC data FIFO threshold register" hexmask.long.byte 0xC 0.--3. 1. "THR,FIFO threshold" group.long 0x50++0xB line.long 0x0 "SDMMC_IDMACTRLR,SDMMC DMA control register" bitfld.long 0x0 1. "IDMABMODE,Buffer mode selection" "B_0x0,B_0x1" bitfld.long 0x0 0. "IDMAEN,IDMA enable" "B_0x0,B_0x1" line.long 0x4 "SDMMC_IDMABSIZER,SDMMC IDMA buffer size register" hexmask.long.word 0x4 6.--16. 1. "IDMABNDT,Number of bytes per buffer" line.long 0x8 "SDMMC_IDMABASER,SDMMC IDMA buffer base address register" hexmask.long 0x8 0.--31. 1. "IDMABASE,Buffer memory base address bits [31:2] must be word aligned (bit [1:0] are always 0 and read only)" group.long 0x64++0x7 line.long 0x0 "SDMMC_IDMALAR,SDMMC IDMA linked list address register" bitfld.long 0x0 31. "ULA,Update SDMMC_IDMALAR from linked list when in linked list mode (SDMMC_IDMACTRLR.IDMABMODE select linked list mode)" "B_0x0,B_0x1" bitfld.long 0x0 30. "ULS,Update SDMMC_IDMABSIZE from the next linked list when in linked list mode (SDMMC_IDMACTRLR.IDMABMODE select linked list mode and ULA = 1)" "B_0x0,B_0x1" bitfld.long 0x0 29. "ABR,Acknowledge linked list buffer ready" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "IDMALA,Word aligned linked list item address offset" line.long 0x4 "SDMMC_IDMABAR,SDMMC IDMA linked list memory base register" hexmask.long 0x4 2.--31. 1. "IDMABA,Word aligned Linked list memory base address" group.long 0x80++0x3F line.long 0x0 "SDMMC_FIFOR0,SDMMC data FIFO registers 0" hexmask.long 0x0 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x4 "SDMMC_FIFOR1,SDMMC data FIFO registers 1" hexmask.long 0x4 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x8 "SDMMC_FIFOR2,SDMMC data FIFO registers 2" hexmask.long 0x8 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0xC "SDMMC_FIFOR3,SDMMC data FIFO registers 3" hexmask.long 0xC 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x10 "SDMMC_FIFOR4,SDMMC data FIFO registers 4" hexmask.long 0x10 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x14 "SDMMC_FIFOR5,SDMMC data FIFO registers 5" hexmask.long 0x14 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x18 "SDMMC_FIFOR6,SDMMC data FIFO registers 6" hexmask.long 0x18 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x1C "SDMMC_FIFOR7,SDMMC data FIFO registers 7" hexmask.long 0x1C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x20 "SDMMC_FIFOR8,SDMMC data FIFO registers 8" hexmask.long 0x20 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x24 "SDMMC_FIFOR9,SDMMC data FIFO registers 9" hexmask.long 0x24 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x28 "SDMMC_FIFOR10,SDMMC data FIFO registers 10" hexmask.long 0x28 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x2C "SDMMC_FIFOR11,SDMMC data FIFO registers 11" hexmask.long 0x2C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x30 "SDMMC_FIFOR12,SDMMC data FIFO registers 12" hexmask.long 0x30 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x34 "SDMMC_FIFOR13,SDMMC data FIFO registers 13" hexmask.long 0x34 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x38 "SDMMC_FIFOR14,SDMMC data FIFO registers 14" hexmask.long 0x38 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x3C "SDMMC_FIFOR15,SDMMC data FIFO registers 15" hexmask.long 0x3C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" rgroup.long 0x3F0++0xF line.long 0x0 "SDMMC_HWCFGR1,SDMMC hardware configuration register 1" hexmask.long.byte 0x0 0.--3. 1. "FIFOSIZE,SDMMC FIFO size" line.long 0x4 "SDMMC_VERR,SDMMC version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,SDMMC major revision number" hexmask.long.byte 0x4 0.--3. 1. "MINREV,SDMMC minor revision number" line.long 0x8 "SDMMC_IPIDR,SDMMC identification register" hexmask.long 0x8 0.--31. 1. "IP_ID,SDMMC identification" line.long 0xC "SDMMC_SIDR,SDMMC size identification register" hexmask.long 0xC 0.--31. 1. "SID,SDMMC size identification" tree.end tree "SDMMC3_S" base ad:0x58240000 group.long 0x0++0xF line.long 0x0 "SDMMC_POWER,SDMMC power control register" bitfld.long 0x0 4. "DIRPOL,Data and command direction signals polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 3. "VSWITCHEN,Voltage switch procedure enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "VSWITCH,Voltage switch sequence start" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "PWRCTRL,SDMMC state control bits" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "SDMMC_CLKCR,SDMMC clock control register" bitfld.long 0x4 20.--21. "SELCLKRX,Receive clock selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 19. "BUSSPEED,Bus speed for selection of SDMMC operating modes" "B_0x0,B_0x1" bitfld.long 0x4 18. "DDR,Data rate signaling selection" "B_0x0,B_0x1" bitfld.long 0x4 17. "HWFC_EN,Hardware flow control enable" "B_0x0,B_0x1" bitfld.long 0x4 16. "NEGEDGE,SDMMC_CK dephasing selection bit for data and command" "B_0x0,B_0x1" bitfld.long 0x4 14.--15. "WIDBUS,Wide bus mode enable bit" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x4 12. "PWRSAV,Power saving configuration bit" "B_0x0,B_0x1" hexmask.long.word 0x4 0.--9. 1. "CLKDIV,Clock divide factor" line.long 0x8 "SDMMC_ARGR,SDMMC argument register" hexmask.long 0x8 0.--31. 1. "CMDARG,Command argument" line.long 0xC "SDMMC_CMDR,SDMMC command register" bitfld.long 0xC 16. "CMDSUSPEND,The CPSM treats the command as a Suspend or Resume command and signals interrupt period start/end" "0,1" bitfld.long 0xC 15. "BOOTEN,Enable boot mode procedure" "B_0x0,B_0x1" bitfld.long 0xC 14. "BOOTMODE,Select the boot mode procedure to be used" "B_0x0,B_0x1" bitfld.long 0xC 13. "DTHOLD,Hold new data block transmission and reception in the DPSM" "0,1" bitfld.long 0xC 12. "CPSMEN,Command path state machine (CPSM) enable bit" "0,1" bitfld.long 0xC 11. "WAITPEND,CPSM waits for end of data transfer (CmdPend internal signal) from DPSM" "0,1" newline bitfld.long 0xC 10. "WAITINT,CPSM waits for interrupt request" "0,1" bitfld.long 0xC 8.--9. "WAITRESP,Wait for response bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 7. "CMDSTOP,The CPSM treats the command as a Stop Transmission command and signals abort to the DPSM" "0,1" bitfld.long 0xC 6. "CMDTRANS,The CPSM treats the command as a data transfer command stops the interrupt period and signals DataEnable to the DPSM" "0,1" hexmask.long.byte 0xC 0.--5. 1. "CMDINDEX,Command index" rgroup.long 0x10++0x13 line.long 0x0 "SDMMC_RESPCMDR,SDMMC command response register" hexmask.long.byte 0x0 0.--5. 1. "RESPCMD,Response command index" line.long 0x4 "SDMMC_RESP1R,SDMMC response 1 register" hexmask.long 0x4 0.--31. 1. "CARDSTATUS,Card status according table below" line.long 0x8 "SDMMC_RESP2R,SDMMC response 2 register" hexmask.long 0x8 0.--31. 1. "CARDSTATUS,Card status according table below" line.long 0xC "SDMMC_RESP3R,SDMMC response 3 register" hexmask.long 0xC 0.--31. 1. "CARDSTATUS,Card status according table below" line.long 0x10 "SDMMC_RESP4R,SDMMC response 4 register" hexmask.long 0x10 0.--31. 1. "CARDSTATUS,Card status according table below" group.long 0x24++0xB line.long 0x0 "SDMMC_DTIMER,SDMMC data timer register" hexmask.long 0x0 0.--31. 1. "DATATIME,Data and R1b busy timeout period" line.long 0x4 "SDMMC_DLENR,SDMMC data length register" hexmask.long 0x4 0.--24. 1. "DATALENGTH,Data length value" line.long 0x8 "SDMMC_DCTRL,SDMMC data control register" bitfld.long 0x8 13. "FIFORST,FIFO reset flushes any remaining data" "B_0x0,B_0x1" bitfld.long 0x8 12. "BOOTACKEN,Enable the reception of the boot acknowledgment" "B_0x0,B_0x1" bitfld.long 0x8 11. "SDIOEN,SD I/O interrupt enable functions" "0,1" bitfld.long 0x8 10. "RWMOD,Read Wait mode" "B_0x0,B_0x1" bitfld.long 0x8 9. "RWSTOP,Read Wait stop" "B_0x0,B_0x1" bitfld.long 0x8 8. "RWSTART,Read Wait start" "0,1" newline hexmask.long.byte 0x8 4.--7. 1. "DBLOCKSIZE,Data block size" bitfld.long 0x8 2.--3. "DTMODE,Data transfer mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x8 1. "DTDIR,Data transfer direction selection" "B_0x0,B_0x1" bitfld.long 0x8 0. "DTEN,Data transfer enable bit" "B_0x0,B_0x1" rgroup.long 0x30++0x7 line.long 0x0 "SDMMC_DCNTR,SDMMC data counter register" hexmask.long 0x0 0.--24. 1. "DATACOUNT,Data count value" line.long 0x4 "SDMMC_STAR,SDMMC status register" bitfld.long 0x4 28. "IDMABTC,IDMA buffer transfer complete" "0,1" bitfld.long 0x4 27. "IDMATE,IDMA transfer error" "0,1" bitfld.long 0x4 26. "CKSTOP,SDMMC_CK stopped in Voltage switch procedure" "0,1" bitfld.long 0x4 25. "VSWEND,Voltage switch critical timing section completion" "0,1" bitfld.long 0x4 24. "ACKTIMEOUT,Boot acknowledgment timeout" "0,1" bitfld.long 0x4 23. "ACKFAIL,Boot acknowledgment received (boot acknowledgment check fail)" "0,1" newline bitfld.long 0x4 22. "SDIOIT,SDIO interrupt received" "0,1" bitfld.long 0x4 21. "BUSYD0END,end of SDMMC_D0 Busy following a CMD response detected" "B_0x0,B_0x1" bitfld.long 0x4 20. "BUSYD0,Inverted value of SDMMC_D0 line (Busy) sampled at the end of a CMD response and a second time 2 SDMMC_CK cycles after the CMD response" "B_0x0,B_0x1" bitfld.long 0x4 19. "RXFIFOE,Receive FIFO empty" "0,1" bitfld.long 0x4 18. "TXFIFOE,Transmit FIFO empty" "0,1" bitfld.long 0x4 17. "RXFIFOF,Receive FIFO full" "0,1" newline bitfld.long 0x4 16. "TXFIFOF,Transmit FIFO full" "0,1" bitfld.long 0x4 15. "RXFIFOHF,Receive FIFO half full" "0,1" bitfld.long 0x4 14. "TXFIFOHE,Transmit FIFO half empty" "0,1" bitfld.long 0x4 13. "CPSMACT,Command path state machine active i.e. not in Idle state" "0,1" bitfld.long 0x4 12. "DPSMACT,Data path state machine active i.e. not in Idle state" "0,1" bitfld.long 0x4 11. "DABORT,Data transfer aborted by CMD12" "0,1" newline bitfld.long 0x4 10. "DBCKEND,Data block sent/received" "0,1" bitfld.long 0x4 9. "DHOLD,Data transfer Hold" "0,1" bitfld.long 0x4 8. "DATAEND,Data transfer ended correctly" "0,1" bitfld.long 0x4 7. "CMDSENT,Command sent (no response required)" "0,1" bitfld.long 0x4 6. "CMDREND,Command response received (CRC check passed or no CRC)" "0,1" bitfld.long 0x4 5. "RXOVERR,Received FIFO overrun error (masked by hardware when IDMA is enabled)" "0,1" newline bitfld.long 0x4 4. "TXUNDERR,Transmit FIFO underrun error (masked by hardware when IDMA is enabled)" "0,1" bitfld.long 0x4 3. "DTIMEOUT,Data timeout" "0,1" bitfld.long 0x4 2. "CTIMEOUT,Command response timeout" "0,1" bitfld.long 0x4 1. "DCRCFAIL,Data block sent/received (CRC check failed)" "0,1" bitfld.long 0x4 0. "CCRCFAIL,Command response received (CRC check failed)" "0,1" group.long 0x38++0xF line.long 0x0 "SDMMC_ICR,SDMMC interrupt clear register" bitfld.long 0x0 28. "IDMABTCC,IDMA buffer transfer complete clear bit" "B_0x0,B_0x1" bitfld.long 0x0 27. "IDMATEC,IDMA transfer error clear bit" "B_0x0,B_0x1" bitfld.long 0x0 26. "CKSTOPC,CKSTOP flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 25. "VSWENDC,VSWEND flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 24. "ACKTIMEOUTC,ACKTIMEOUT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 23. "ACKFAILC,ACKFAIL flag clear bit" "B_0x0,B_0x1" newline bitfld.long 0x0 22. "SDIOITC,SDIOIT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 21. "BUSYD0ENDC,BUSYD0END flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 11. "DABORTC,DABORT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 10. "DBCKENDC,DBCKEND flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 9. "DHOLDC,DHOLD flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 8. "DATAENDC,DATAEND flag clear bit" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "CMDSENTC,CMDSENT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 6. "CMDRENDC,CMDREND flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXOVERRC,RXOVERR flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXUNDERRC,TXUNDERR flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 3. "DTIMEOUTC,DTIMEOUT flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 2. "CTIMEOUTC,CTIMEOUT flag clear bit" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "DCRCFAILC,DCRCFAIL flag clear bit" "B_0x0,B_0x1" bitfld.long 0x0 0. "CCRCFAILC,CCRCFAIL flag clear bit" "B_0x0,B_0x1" line.long 0x4 "SDMMC_MASKR,SDMMC mask register" bitfld.long 0x4 28. "IDMABTCIE,IDMA buffer transfer complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 26. "CKSTOPIE,Voltage Switch clock stopped interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 25. "VSWENDIE,Voltage switch critical timing section completion interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ACKTIMEOUTIE,Acknowledgment timeout interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 23. "ACKFAILIE,Acknowledgment Fail interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 22. "SDIOITIE,SDIO mode interrupt received interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 21. "BUSYD0ENDIE,BUSYD0END interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 18. "TXFIFOEIE,Tx FIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 17. "RXFIFOFIE,Rx FIFO full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 15. "RXFIFOHFIE,Rx FIFO half full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 14. "TXFIFOHEIE,Tx FIFO half empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "DABORTIE,Data transfer aborted interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "DBCKENDIE,Data block end interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "DHOLDIE,Data hold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 8. "DATAENDIE,Data end interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "CMDSENTIE,Command sent interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "CMDRENDIE,Command response received interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "RXOVERRIE,Rx FIFO overrun error interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 4. "TXUNDERRIE,Tx FIFO underrun error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "DTIMEOUTIE,Data timeout interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "CTIMEOUTIE,Command timeout interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "DCRCFAILIE,Data CRC fail interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "CCRCFAILIE,Command CRC fail interrupt enable" "B_0x0,B_0x1" line.long 0x8 "SDMMC_ACKTIMER,SDMMC acknowledgment timer register" hexmask.long 0x8 0.--24. 1. "ACKTIME,Boot acknowledgment timeout period" line.long 0xC "SDMMC_FIFOTHRR,SDMMC data FIFO threshold register" hexmask.long.byte 0xC 0.--3. 1. "THR,FIFO threshold" group.long 0x50++0xB line.long 0x0 "SDMMC_IDMACTRLR,SDMMC DMA control register" bitfld.long 0x0 1. "IDMABMODE,Buffer mode selection" "B_0x0,B_0x1" bitfld.long 0x0 0. "IDMAEN,IDMA enable" "B_0x0,B_0x1" line.long 0x4 "SDMMC_IDMABSIZER,SDMMC IDMA buffer size register" hexmask.long.word 0x4 6.--16. 1. "IDMABNDT,Number of bytes per buffer" line.long 0x8 "SDMMC_IDMABASER,SDMMC IDMA buffer base address register" hexmask.long 0x8 0.--31. 1. "IDMABASE,Buffer memory base address bits [31:2] must be word aligned (bit [1:0] are always 0 and read only)" group.long 0x64++0x7 line.long 0x0 "SDMMC_IDMALAR,SDMMC IDMA linked list address register" bitfld.long 0x0 31. "ULA,Update SDMMC_IDMALAR from linked list when in linked list mode (SDMMC_IDMACTRLR.IDMABMODE select linked list mode)" "B_0x0,B_0x1" bitfld.long 0x0 30. "ULS,Update SDMMC_IDMABSIZE from the next linked list when in linked list mode (SDMMC_IDMACTRLR.IDMABMODE select linked list mode and ULA = 1)" "B_0x0,B_0x1" bitfld.long 0x0 29. "ABR,Acknowledge linked list buffer ready" "B_0x0,B_0x1" hexmask.long.word 0x0 2.--15. 1. "IDMALA,Word aligned linked list item address offset" line.long 0x4 "SDMMC_IDMABAR,SDMMC IDMA linked list memory base register" hexmask.long 0x4 2.--31. 1. "IDMABA,Word aligned Linked list memory base address" group.long 0x80++0x3F line.long 0x0 "SDMMC_FIFOR0,SDMMC data FIFO registers 0" hexmask.long 0x0 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x4 "SDMMC_FIFOR1,SDMMC data FIFO registers 1" hexmask.long 0x4 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x8 "SDMMC_FIFOR2,SDMMC data FIFO registers 2" hexmask.long 0x8 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0xC "SDMMC_FIFOR3,SDMMC data FIFO registers 3" hexmask.long 0xC 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x10 "SDMMC_FIFOR4,SDMMC data FIFO registers 4" hexmask.long 0x10 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x14 "SDMMC_FIFOR5,SDMMC data FIFO registers 5" hexmask.long 0x14 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x18 "SDMMC_FIFOR6,SDMMC data FIFO registers 6" hexmask.long 0x18 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x1C "SDMMC_FIFOR7,SDMMC data FIFO registers 7" hexmask.long 0x1C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x20 "SDMMC_FIFOR8,SDMMC data FIFO registers 8" hexmask.long 0x20 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x24 "SDMMC_FIFOR9,SDMMC data FIFO registers 9" hexmask.long 0x24 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x28 "SDMMC_FIFOR10,SDMMC data FIFO registers 10" hexmask.long 0x28 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x2C "SDMMC_FIFOR11,SDMMC data FIFO registers 11" hexmask.long 0x2C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x30 "SDMMC_FIFOR12,SDMMC data FIFO registers 12" hexmask.long 0x30 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x34 "SDMMC_FIFOR13,SDMMC data FIFO registers 13" hexmask.long 0x34 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x38 "SDMMC_FIFOR14,SDMMC data FIFO registers 14" hexmask.long 0x38 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" line.long 0x3C "SDMMC_FIFOR15,SDMMC data FIFO registers 15" hexmask.long 0x3C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data" rgroup.long 0x3F0++0xF line.long 0x0 "SDMMC_HWCFGR1,SDMMC hardware configuration register 1" hexmask.long.byte 0x0 0.--3. 1. "FIFOSIZE,SDMMC FIFO size" line.long 0x4 "SDMMC_VERR,SDMMC version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,SDMMC major revision number" hexmask.long.byte 0x4 0.--3. 1. "MINREV,SDMMC minor revision number" line.long 0x8 "SDMMC_IPIDR,SDMMC identification register" hexmask.long 0x8 0.--31. 1. "IP_ID,SDMMC identification" line.long 0xC "SDMMC_SIDR,SDMMC size identification register" hexmask.long 0xC 0.--31. 1. "SID,SDMMC size identification" tree.end tree.end tree "SERC (Software Error Robustness Collector)" base ad:0x0 tree "SERC" base ad:0x44080000 group.long 0x0++0x17 line.long 0x0 "SERC_IER0,SERC interrupt enable register 0" hexmask.long 0x0 0.--31. 1. "PDRIE,Power-down or reset interrupt enable for peripheral y" line.long 0x4 "SERC_IER1,SERC interrupt enable register 1" hexmask.long 0x4 0.--31. 1. "PDRIE,Power-down or reset interrupt enable for peripheral y" line.long 0x8 "SERC_IER2,SERC interrupt enable register 2" hexmask.long 0x8 0.--31. 1. "PDRIE,Power-down or reset interrupt enable for peripheral y" line.long 0xC "SERC_IER3,SERC interrupt enable register 3" hexmask.long 0xC 0.--31. 1. "PDRIE,Power-down or reset interrupt enable for peripheral y" line.long 0x10 "SERC_IER4,SERC interrupt enable register 4" hexmask.long 0x10 0.--31. 1. "PDRIE,Power-down or reset interrupt enable for peripheral y" line.long 0x14 "SERC_IER5,SERC interrupt enable register 5" hexmask.long 0x14 0.--31. 1. "PDRIE,Power-down or reset interrupt enable for peripheral y" rgroup.long 0x40++0x17 line.long 0x0 "SERC_ISR0,SERC interrupt status register 0" hexmask.long 0x0 0.--31. 1. "PDRS,Power-down or reset interrupt status for peripheral y" line.long 0x4 "SERC_ISR1,SERC interrupt status register 1" hexmask.long 0x4 0.--31. 1. "PDRS,Power-down or reset interrupt status for peripheral y" line.long 0x8 "SERC_ISR2,SERC interrupt status register 2" hexmask.long 0x8 0.--31. 1. "PDRS,Power-down or reset interrupt status for peripheral y" line.long 0xC "SERC_ISR3,SERC interrupt status register 3" hexmask.long 0xC 0.--31. 1. "PDRS,Power-down or reset interrupt status for peripheral y" line.long 0x10 "SERC_ISR4,SERC interrupt status register 4" hexmask.long 0x10 0.--31. 1. "PDRS,Power-down or reset interrupt status for peripheral y" line.long 0x14 "SERC_ISR5,SERC interrupt status register 5" hexmask.long 0x14 0.--31. 1. "PDRS,Power-down or reset clear flag for peripheral y" wgroup.long 0x80++0x17 line.long 0x0 "SERC_ICR0,SERC interrupt clear register 0" hexmask.long 0x0 0.--31. 1. "PDRC,Power-down or reset clear flag for peripheral y" line.long 0x4 "SERC_ICR1,SERC interrupt clear register 1" hexmask.long 0x4 0.--31. 1. "PDRC,Power-down or reset clear flag for peripheral y" line.long 0x8 "SERC_ICR2,SERC interrupt clear register 2" hexmask.long 0x8 0.--31. 1. "PDRC,Power-down or reset clear flag for peripheral y" line.long 0xC "SERC_ICR3,SERC interrupt clear register 3" hexmask.long 0xC 0.--31. 1. "PDRC,Power-down or reset clear flag for peripheral y" line.long 0x10 "SERC_ICR4,SERC interrupt clear register 4" hexmask.long 0x10 0.--31. 1. "PDRC,Power-down or reset clear flag for peripheral y" line.long 0x14 "SERC_ICR5,SERC interrupt clear register 5" hexmask.long 0x14 0.--31. 1. "PDRC,Power-down or reset clear flag for peripheral y" group.long 0x100++0x3 line.long 0x0 "SERC_ENABLE,SERC enable" bitfld.long 0x0 0. "SERFEN,Enable the SERF framework." "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "SERC_HWCFGR,SERC hardware configuration register" bitfld.long 0x0 16.--18. "CFG2,NUM_RESYNC_FLOPS number of resynchronization flops when receiving a bus_ilac information in the SERC clock domain." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--7. 1. "CFG1,NUM_ILAC number of illegal accesses input pins configured for this instance of the collector." line.long 0x4 "SERC_VERR,SERC version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "SERC_IPIDR,SERC identification register" hexmask.long 0x8 0.--31. 1. "ID,IP identification code" line.long 0xC "SERC_SIDR,SERC size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code (1 Kbyte)" tree.end tree "SERC_S" base ad:0x54080000 group.long 0x0++0x17 line.long 0x0 "SERC_IER0,SERC interrupt enable register 0" hexmask.long 0x0 0.--31. 1. "PDRIE,Power-down or reset interrupt enable for peripheral y" line.long 0x4 "SERC_IER1,SERC interrupt enable register 1" hexmask.long 0x4 0.--31. 1. "PDRIE,Power-down or reset interrupt enable for peripheral y" line.long 0x8 "SERC_IER2,SERC interrupt enable register 2" hexmask.long 0x8 0.--31. 1. "PDRIE,Power-down or reset interrupt enable for peripheral y" line.long 0xC "SERC_IER3,SERC interrupt enable register 3" hexmask.long 0xC 0.--31. 1. "PDRIE,Power-down or reset interrupt enable for peripheral y" line.long 0x10 "SERC_IER4,SERC interrupt enable register 4" hexmask.long 0x10 0.--31. 1. "PDRIE,Power-down or reset interrupt enable for peripheral y" line.long 0x14 "SERC_IER5,SERC interrupt enable register 5" hexmask.long 0x14 0.--31. 1. "PDRIE,Power-down or reset interrupt enable for peripheral y" rgroup.long 0x40++0x17 line.long 0x0 "SERC_ISR0,SERC interrupt status register 0" hexmask.long 0x0 0.--31. 1. "PDRS,Power-down or reset interrupt status for peripheral y" line.long 0x4 "SERC_ISR1,SERC interrupt status register 1" hexmask.long 0x4 0.--31. 1. "PDRS,Power-down or reset interrupt status for peripheral y" line.long 0x8 "SERC_ISR2,SERC interrupt status register 2" hexmask.long 0x8 0.--31. 1. "PDRS,Power-down or reset interrupt status for peripheral y" line.long 0xC "SERC_ISR3,SERC interrupt status register 3" hexmask.long 0xC 0.--31. 1. "PDRS,Power-down or reset interrupt status for peripheral y" line.long 0x10 "SERC_ISR4,SERC interrupt status register 4" hexmask.long 0x10 0.--31. 1. "PDRS,Power-down or reset interrupt status for peripheral y" line.long 0x14 "SERC_ISR5,SERC interrupt status register 5" hexmask.long 0x14 0.--31. 1. "PDRS,Power-down or reset clear flag for peripheral y" wgroup.long 0x80++0x17 line.long 0x0 "SERC_ICR0,SERC interrupt clear register 0" hexmask.long 0x0 0.--31. 1. "PDRC,Power-down or reset clear flag for peripheral y" line.long 0x4 "SERC_ICR1,SERC interrupt clear register 1" hexmask.long 0x4 0.--31. 1. "PDRC,Power-down or reset clear flag for peripheral y" line.long 0x8 "SERC_ICR2,SERC interrupt clear register 2" hexmask.long 0x8 0.--31. 1. "PDRC,Power-down or reset clear flag for peripheral y" line.long 0xC "SERC_ICR3,SERC interrupt clear register 3" hexmask.long 0xC 0.--31. 1. "PDRC,Power-down or reset clear flag for peripheral y" line.long 0x10 "SERC_ICR4,SERC interrupt clear register 4" hexmask.long 0x10 0.--31. 1. "PDRC,Power-down or reset clear flag for peripheral y" line.long 0x14 "SERC_ICR5,SERC interrupt clear register 5" hexmask.long 0x14 0.--31. 1. "PDRC,Power-down or reset clear flag for peripheral y" group.long 0x100++0x3 line.long 0x0 "SERC_ENABLE,SERC enable" bitfld.long 0x0 0. "SERFEN,Enable the SERF framework." "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "SERC_HWCFGR,SERC hardware configuration register" bitfld.long 0x0 16.--18. "CFG2,NUM_RESYNC_FLOPS number of resynchronization flops when receiving a bus_ilac information in the SERC clock domain." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--7. 1. "CFG1,NUM_ILAC number of illegal accesses input pins configured for this instance of the collector." line.long 0x4 "SERC_VERR,SERC version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,Minor revision" line.long 0x8 "SERC_IPIDR,SERC identification register" hexmask.long 0x8 0.--31. 1. "ID,IP identification code" line.long 0xC "SERC_SIDR,SERC size identification register" hexmask.long 0xC 0.--31. 1. "SID,Size identification code (1 Kbyte)" tree.end tree.end tree "SPDIFRX (SPDIF Receiver Interface)" base ad:0x0 tree "SPDIFRX" base ad:0x400D0000 group.long 0x0++0x7 line.long 0x0 "SPDIFRX_CR,SPDIFRX control register" bitfld.long 0x0 21. "CKSBKPEN,Backup symbol clock enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "CKSEN,Symbol clock enable" "B_0x0,B_0x1" bitfld.long 0x0 16.--18. "INSEL,SPDIFRX input selection" "B_0x0,B_0x1,B_0x2,B_0x3,?,?,?,?" bitfld.long 0x0 14. "WFA,Wait for activitysup(1)/sup" "B_0x0,B_0x1" bitfld.long 0x0 12.--13. "NBTR,Maximum allowed re-tries during synchronization phasesup(1)/sup" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 11. "CHSEL,Channel selectionsup(1)/sup" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CBDMAEN,Control buffer DMA enable for control flowsup(1)/sup" "B_0x0,B_0x1" bitfld.long 0x0 9. "PTMSK,Mask of preamble type bitssup(1)/sup" "B_0x0,B_0x1" bitfld.long 0x0 8. "CUMSK,Mask of channel status and user bitssup(1)/sup" "B_0x0,B_0x1" bitfld.long 0x0 7. "VMSK,Mask of validity bitsup(1)/sup" "B_0x0,B_0x1" bitfld.long 0x0 6. "PMSK,Mask parity error bitsup(1)/sup" "B_0x0,B_0x1" bitfld.long 0x0 4.--5. "DRFMT,RX data formatsup(1)/sup" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 3. "RXSTEO,Stereo modesup(1)/sup" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXDMAEN,Receiver DMA enable for data flowsup(1)/sup" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SPDIFRXEN,Peripheral block enablesup(1)/sup" "B_0x0,B_0x1,?,B_0x3" line.long 0x4 "SPDIFRX_IMR,SPDIFRX interrupt mask register" bitfld.long 0x4 6. "IFEIE,Serial interface error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "SYNCDIE,Synchronization done" "B_0x0,B_0x1" bitfld.long 0x4 4. "SBLKIE,Synchronization block detected interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "OVRIE,Overrun error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "PERRIE,Parity error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CSRNEIE,Control buffer ready interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "RXNEIE,RXNE interrupt enable" "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "SPDIFRX_SR,SPDIFRX status register" hexmask.long.word 0x0 16.--30. 1. "WIDTH5,duration of 5 symbols counted with spdifrx_ker_ck" bitfld.long 0x0 8. "TERR,Time-out error" "B_0x0,B_0x1" bitfld.long 0x0 7. "SERR,Synchronization error" "B_0x0,B_0x1" bitfld.long 0x0 6. "FERR,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 5. "SYNCD,Synchronization done" "B_0x0,B_0x1" bitfld.long 0x0 4. "SBD,Synchronization block detected" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "OVR,Overrun error" "B_0x0,B_0x1" bitfld.long 0x0 2. "PERR,Parity error" "B_0x0,B_0x1" bitfld.long 0x0 1. "CSRNE,Control buffer register not empty" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXNE,Read data register not empty" "B_0x0,B_0x1" wgroup.long 0xC++0x3 line.long 0x0 "SPDIFRX_IFCR,SPDIFRX interrupt flag clear register" bitfld.long 0x0 5. "SYNCDCF,clears the synchronization done flag" "0,1" bitfld.long 0x0 4. "SBDCF,clears the synchronization block detected flag" "0,1" bitfld.long 0x0 3. "OVRCF,clears the overrun error flag" "0,1" bitfld.long 0x0 2. "PERRCF,clears the parity error flag" "0,1" rgroup.long 0x10++0x3 line.long 0x0 "SPDIFRX_FMT0_DR,SPDIFRX data input register" bitfld.long 0x0 28.--29. "PT,preamble type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 27. "C,channel status bit" "0,1" bitfld.long 0x0 26. "U,user bit" "0,1" bitfld.long 0x0 25. "V,validity bit" "0,1" bitfld.long 0x0 24. "PE,parity error bit" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "DR,data value" rgroup.long 0x10++0x3 line.long 0x0 "SPDIFRX_FMT1_DR,SPDIFRX data input register" hexmask.long.tbyte 0x0 8.--31. 1. "DR,data value" bitfld.long 0x0 4.--5. "PT,preamble type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3. "C,channel Status bit" "0,1" bitfld.long 0x0 2. "U,user bit" "0,1" bitfld.long 0x0 1. "V,validity bit" "0,1" bitfld.long 0x0 0. "PE,parity error bit" "0,1" rgroup.long 0x10++0xB line.long 0x0 "SPDIFRX_FMT2_DR,SPDIFRX data input register" hexmask.long.word 0x0 16.--31. 1. "DRNL2,data value" hexmask.long.word 0x0 0.--15. 1. "DRNL1,data value" line.long 0x4 "SPDIFRX_CSR,SPDIFRX channel status register" bitfld.long 0x4 24. "SOB,start of block" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "CS,channel A status information" hexmask.long.word 0x4 0.--15. 1. "USR,user data information" line.long 0x8 "SPDIFRX_DIR,SPDIFRX debug information register" hexmask.long.word 0x8 16.--28. 1. "TLO,threshold LOW (TLO = 1.5 x UI / Tsubspdifrx_ker_ck/sub)" hexmask.long.word 0x8 0.--12. 1. "THI,threshold HIGH (THI = 2.5 x UI / Tsubspdifrx_ker_ck/sub)" rgroup.long 0x3F4++0xB line.long 0x0 "SPDIFRX_VERR,SPDIFRX version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,SPDIFRX major revision" hexmask.long.byte 0x0 0.--3. 1. "MINREV,SPDIFRX minor revision" line.long 0x4 "SPDIFRX_IPIDR,SPDIFRX identification register" hexmask.long 0x4 0.--31. 1. "ID,SPDIFRX identifier" line.long 0x8 "SPDIFRX_SIDR,SPDIFRX size identification register" hexmask.long 0x8 0.--31. 1. "SID,Size identification" tree.end tree "SPDIFRX_S" base ad:0x500D0000 group.long 0x0++0x7 line.long 0x0 "SPDIFRX_CR,SPDIFRX control register" bitfld.long 0x0 21. "CKSBKPEN,Backup symbol clock enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "CKSEN,Symbol clock enable" "B_0x0,B_0x1" bitfld.long 0x0 16.--18. "INSEL,SPDIFRX input selection" "B_0x0,B_0x1,B_0x2,B_0x3,?,?,?,?" bitfld.long 0x0 14. "WFA,Wait for activitysup(1)/sup" "B_0x0,B_0x1" bitfld.long 0x0 12.--13. "NBTR,Maximum allowed re-tries during synchronization phasesup(1)/sup" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 11. "CHSEL,Channel selectionsup(1)/sup" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CBDMAEN,Control buffer DMA enable for control flowsup(1)/sup" "B_0x0,B_0x1" bitfld.long 0x0 9. "PTMSK,Mask of preamble type bitssup(1)/sup" "B_0x0,B_0x1" bitfld.long 0x0 8. "CUMSK,Mask of channel status and user bitssup(1)/sup" "B_0x0,B_0x1" bitfld.long 0x0 7. "VMSK,Mask of validity bitsup(1)/sup" "B_0x0,B_0x1" bitfld.long 0x0 6. "PMSK,Mask parity error bitsup(1)/sup" "B_0x0,B_0x1" bitfld.long 0x0 4.--5. "DRFMT,RX data formatsup(1)/sup" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 3. "RXSTEO,Stereo modesup(1)/sup" "B_0x0,B_0x1" bitfld.long 0x0 2. "RXDMAEN,Receiver DMA enable for data flowsup(1)/sup" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "SPDIFRXEN,Peripheral block enablesup(1)/sup" "B_0x0,B_0x1,?,B_0x3" line.long 0x4 "SPDIFRX_IMR,SPDIFRX interrupt mask register" bitfld.long 0x4 6. "IFEIE,Serial interface error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "SYNCDIE,Synchronization done" "B_0x0,B_0x1" bitfld.long 0x4 4. "SBLKIE,Synchronization block detected interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 3. "OVRIE,Overrun error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "PERRIE,Parity error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CSRNEIE,Control buffer ready interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "RXNEIE,RXNE interrupt enable" "B_0x0,B_0x1" rgroup.long 0x8++0x3 line.long 0x0 "SPDIFRX_SR,SPDIFRX status register" hexmask.long.word 0x0 16.--30. 1. "WIDTH5,duration of 5 symbols counted with spdifrx_ker_ck" bitfld.long 0x0 8. "TERR,Time-out error" "B_0x0,B_0x1" bitfld.long 0x0 7. "SERR,Synchronization error" "B_0x0,B_0x1" bitfld.long 0x0 6. "FERR,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 5. "SYNCD,Synchronization done" "B_0x0,B_0x1" bitfld.long 0x0 4. "SBD,Synchronization block detected" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "OVR,Overrun error" "B_0x0,B_0x1" bitfld.long 0x0 2. "PERR,Parity error" "B_0x0,B_0x1" bitfld.long 0x0 1. "CSRNE,Control buffer register not empty" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXNE,Read data register not empty" "B_0x0,B_0x1" wgroup.long 0xC++0x3 line.long 0x0 "SPDIFRX_IFCR,SPDIFRX interrupt flag clear register" bitfld.long 0x0 5. "SYNCDCF,clears the synchronization done flag" "0,1" bitfld.long 0x0 4. "SBDCF,clears the synchronization block detected flag" "0,1" bitfld.long 0x0 3. "OVRCF,clears the overrun error flag" "0,1" bitfld.long 0x0 2. "PERRCF,clears the parity error flag" "0,1" rgroup.long 0x10++0x3 line.long 0x0 "SPDIFRX_FMT0_DR,SPDIFRX data input register" bitfld.long 0x0 28.--29. "PT,preamble type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 27. "C,channel status bit" "0,1" bitfld.long 0x0 26. "U,user bit" "0,1" bitfld.long 0x0 25. "V,validity bit" "0,1" bitfld.long 0x0 24. "PE,parity error bit" "0,1" hexmask.long.tbyte 0x0 0.--23. 1. "DR,data value" rgroup.long 0x10++0x3 line.long 0x0 "SPDIFRX_FMT1_DR,SPDIFRX data input register" hexmask.long.tbyte 0x0 8.--31. 1. "DR,data value" bitfld.long 0x0 4.--5. "PT,preamble type" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 3. "C,channel Status bit" "0,1" bitfld.long 0x0 2. "U,user bit" "0,1" bitfld.long 0x0 1. "V,validity bit" "0,1" bitfld.long 0x0 0. "PE,parity error bit" "0,1" rgroup.long 0x10++0xB line.long 0x0 "SPDIFRX_FMT2_DR,SPDIFRX data input register" hexmask.long.word 0x0 16.--31. 1. "DRNL2,data value" hexmask.long.word 0x0 0.--15. 1. "DRNL1,data value" line.long 0x4 "SPDIFRX_CSR,SPDIFRX channel status register" bitfld.long 0x4 24. "SOB,start of block" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "CS,channel A status information" hexmask.long.word 0x4 0.--15. 1. "USR,user data information" line.long 0x8 "SPDIFRX_DIR,SPDIFRX debug information register" hexmask.long.word 0x8 16.--28. 1. "TLO,threshold LOW (TLO = 1.5 x UI / Tsubspdifrx_ker_ck/sub)" hexmask.long.word 0x8 0.--12. 1. "THI,threshold HIGH (THI = 2.5 x UI / Tsubspdifrx_ker_ck/sub)" rgroup.long 0x3F4++0xB line.long 0x0 "SPDIFRX_VERR,SPDIFRX version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,SPDIFRX major revision" hexmask.long.byte 0x0 0.--3. 1. "MINREV,SPDIFRX minor revision" line.long 0x4 "SPDIFRX_IPIDR,SPDIFRX identification register" hexmask.long 0x4 0.--31. 1. "ID,SPDIFRX identifier" line.long 0x8 "SPDIFRX_SIDR,SPDIFRX size identification register" hexmask.long 0x8 0.--31. 1. "SID,Size identification" tree.end tree.end endif tree "SPI (Serial Peripheral Interface)" base ad:0x0 sif (cpuis("*CA35")||cpuis("*CM33F")) tree "SPI1" base ad:0x40230000 group.long 0x0++0x13 line.long 0x0 "SPI1_CR1,SPI/I2S control register 1" bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "B_0x0,B_0x1" bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "B_0x0,B_0x1" bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "B_0x0,B_0x1" bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1" bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1" bitfld.long 0x0 9. "CSTART,master transfer start" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPE,serial peripheral enable" "B_0x0,B_0x1" line.long 0x4 "SPI1_CR2,SPI/I2S control register 2" hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer" line.long 0x8 "SPI1_CFG1,SPI/I2S configuration register 1" bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "B_0x0,B_0x1" bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared" bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "B_0x0,B_0x1" hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level" newline hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame" line.long 0xC "SPI1_CFG2,SPI/I2S configuration register 2" bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "B_0x0,B_0x1" bitfld.long 0xC 30. "SSOM,SS output management in master mode" "B_0x0,B_0x1" bitfld.long 0xC 29. "SSOE,SS output enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 26. "SSM,software management of SS signal input" "B_0x0,B_0x1" bitfld.long 0xC 25. "CPOL,clock polarity" "B_0x0,B_0x1" bitfld.long 0xC 24. "CPHA,clock phase" "B_0x0,B_0x1" bitfld.long 0xC 23. "LSBFRST,data frame format" "B_0x0,B_0x1" newline bitfld.long 0xC 22. "MASTER,SPI master" "B_0x0,B_0x1" bitfld.long 0xC 19.--21. "SP,serial protocol" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "B_0x0,B_0x1" bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "B_0x0,B_0x1" hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness" hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness" line.long 0x10 "SPI1_IER,SPI/I2S interrupt enable register" bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "EOTIE,EOT SUSP and TXC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "SPI1_SR,SPI/I2S status register" hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session" bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "B_0x0,B_0x1" bitfld.long 0x0 11. "SUSP,suspension status" "B_0x0,B_0x1" bitfld.long 0x0 9. "MODF,mode fault" "B_0x0,B_0x1" bitfld.long 0x0 8. "TIFRE,TI frame format error" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCE,CRC error" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "OVR,overrun" "B_0x0,B_0x1" bitfld.long 0x0 5. "UDR,underrun" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXTF,transmission transfer filled" "B_0x0,B_0x1" bitfld.long 0x0 3. "EOT,end of transfer" "B_0x0,B_0x1" bitfld.long 0x0 2. "DXP,duplex packet" "B_0x0,B_0x1" bitfld.long 0x0 1. "TXP,Tx-packet space available" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXP,Rx-packet available" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "SPI1_IFCR,SPI/I2S interrupt/status flags clear register" bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1" bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1" bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1" bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1" bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1" bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1" bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1" bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1" group.long 0x1C++0x3 line.long 0x0 "SPI1_AUTOCR,SPI/I2S autonomous mode control register" bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)." wgroup.long 0x20++0x3 line.long 0x0 "SPI1_TXDR,SPI/I2S transmit data register" hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register" rgroup.long 0x30++0x3 line.long 0x0 "SPI1_RXDR,SPI/I2S receive data register" hexmask.long 0x0 0.--31. 1. "RXDR,receive data register" group.long 0x40++0x3 line.long 0x0 "SPI1_CRCPOLY,SPI/I2S polynomial register" hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x44++0x7 line.long 0x0 "SPI1_TXCRC,SPI/I2S transmitter CRC register" hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter" line.long 0x4 "SPI1_RXCRC,SPI/I2S receiver CRC register" hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver" group.long 0x4C++0x7 line.long 0x0 "SPI1_UDRDR,SPI/I2S underrun data register" hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition" line.long 0x4 "SPI1_I2SCFGR,SPI/I2S configuration register" bitfld.long 0x4 25. "MCKOE,master clock output enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ODD,odd factor for the prescaler" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "I2SDIV,Iless thansup>2less than/sup>S linear prescaler" bitfld.long 0x4 14. "DATFMT,data format" "B_0x0,B_0x1" bitfld.long 0x4 13. "WSINV,word select inversion" "B_0x0,B_0x1" bitfld.long 0x4 12. "FIXCH,fixed channel length in slave" "B_0x0,B_0x1" bitfld.long 0x4 11. "CKPOL,serial audio clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "CHLEN,channel length (number of bits per audio channel)" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--9. "DATLEN,data length to be transferred." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 7. "PCMSYNC,PCM frame synchronization" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "I2SSTD,Iless thansup>2less than/sup>S standard selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--3. "I2SCFG,I2S configuration mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 0. "I2SMOD,I2S mode selection" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "SPI1_HWCFGR2,SPI/I2S hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "OPBCFG,Number of option bits available" line.long 0x4 "SPI1_HWCFGR1,SPI/I2S hardware configuration register" hexmask.long.byte 0x4 24.--27. 1. "FULLCFG,SPI2S full feature version configuration" hexmask.long.byte 0x4 20.--23. 1. "TRGCFG,Autonomous trigger feature configuration" hexmask.long.byte 0x4 16.--19. 1. "DSCFG,SPI data size configuration" hexmask.long.byte 0x4 12.--15. 1. "I2SCFG,I2S configuration" hexmask.long.byte 0x4 8.--11. 1. "CRCCFG,CRC configuration for SPI" hexmask.long.byte 0x4 4.--7. 1. "RXFCFG,RxFIFO size" hexmask.long.byte 0x4 0.--3. 1. "TXFCFG,TxFIFO size" line.long 0x8 "SPI1_VERR,SPI/I2S version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,major version" hexmask.long.byte 0x8 0.--3. 1. "MINREV,minor version" line.long 0xC "SPI1_IPIDR,SPI/I2S identification register" hexmask.long 0xC 0.--31. 1. "ID,Identification" line.long 0x10 "SPI1_SIDR,SPI/I2S size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "SPI1_S" base ad:0x50230000 group.long 0x0++0x13 line.long 0x0 "SPI1_CR1,SPI/I2S control register 1" bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "B_0x0,B_0x1" bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "B_0x0,B_0x1" bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "B_0x0,B_0x1" bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1" bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1" bitfld.long 0x0 9. "CSTART,master transfer start" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPE,serial peripheral enable" "B_0x0,B_0x1" line.long 0x4 "SPI1_CR2,SPI/I2S control register 2" hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer" line.long 0x8 "SPI1_CFG1,SPI/I2S configuration register 1" bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "B_0x0,B_0x1" bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared" bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "B_0x0,B_0x1" hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level" newline hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame" line.long 0xC "SPI1_CFG2,SPI/I2S configuration register 2" bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "B_0x0,B_0x1" bitfld.long 0xC 30. "SSOM,SS output management in master mode" "B_0x0,B_0x1" bitfld.long 0xC 29. "SSOE,SS output enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 26. "SSM,software management of SS signal input" "B_0x0,B_0x1" bitfld.long 0xC 25. "CPOL,clock polarity" "B_0x0,B_0x1" bitfld.long 0xC 24. "CPHA,clock phase" "B_0x0,B_0x1" bitfld.long 0xC 23. "LSBFRST,data frame format" "B_0x0,B_0x1" newline bitfld.long 0xC 22. "MASTER,SPI master" "B_0x0,B_0x1" bitfld.long 0xC 19.--21. "SP,serial protocol" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "B_0x0,B_0x1" bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "B_0x0,B_0x1" hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness" hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness" line.long 0x10 "SPI1_IER,SPI/I2S interrupt enable register" bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "EOTIE,EOT SUSP and TXC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "SPI1_SR,SPI/I2S status register" hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session" bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "B_0x0,B_0x1" bitfld.long 0x0 11. "SUSP,suspension status" "B_0x0,B_0x1" bitfld.long 0x0 9. "MODF,mode fault" "B_0x0,B_0x1" bitfld.long 0x0 8. "TIFRE,TI frame format error" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCE,CRC error" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "OVR,overrun" "B_0x0,B_0x1" bitfld.long 0x0 5. "UDR,underrun" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXTF,transmission transfer filled" "B_0x0,B_0x1" bitfld.long 0x0 3. "EOT,end of transfer" "B_0x0,B_0x1" bitfld.long 0x0 2. "DXP,duplex packet" "B_0x0,B_0x1" bitfld.long 0x0 1. "TXP,Tx-packet space available" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXP,Rx-packet available" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "SPI1_IFCR,SPI/I2S interrupt/status flags clear register" bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1" bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1" bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1" bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1" bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1" bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1" bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1" bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1" group.long 0x1C++0x3 line.long 0x0 "SPI1_AUTOCR,SPI/I2S autonomous mode control register" bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)." wgroup.long 0x20++0x3 line.long 0x0 "SPI1_TXDR,SPI/I2S transmit data register" hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register" rgroup.long 0x30++0x3 line.long 0x0 "SPI1_RXDR,SPI/I2S receive data register" hexmask.long 0x0 0.--31. 1. "RXDR,receive data register" group.long 0x40++0x3 line.long 0x0 "SPI1_CRCPOLY,SPI/I2S polynomial register" hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x44++0x7 line.long 0x0 "SPI1_TXCRC,SPI/I2S transmitter CRC register" hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter" line.long 0x4 "SPI1_RXCRC,SPI/I2S receiver CRC register" hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver" group.long 0x4C++0x7 line.long 0x0 "SPI1_UDRDR,SPI/I2S underrun data register" hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition" line.long 0x4 "SPI1_I2SCFGR,SPI/I2S configuration register" bitfld.long 0x4 25. "MCKOE,master clock output enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ODD,odd factor for the prescaler" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "I2SDIV,Iless thansup>2less than/sup>S linear prescaler" bitfld.long 0x4 14. "DATFMT,data format" "B_0x0,B_0x1" bitfld.long 0x4 13. "WSINV,word select inversion" "B_0x0,B_0x1" bitfld.long 0x4 12. "FIXCH,fixed channel length in slave" "B_0x0,B_0x1" bitfld.long 0x4 11. "CKPOL,serial audio clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "CHLEN,channel length (number of bits per audio channel)" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--9. "DATLEN,data length to be transferred." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 7. "PCMSYNC,PCM frame synchronization" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "I2SSTD,Iless thansup>2less than/sup>S standard selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--3. "I2SCFG,I2S configuration mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 0. "I2SMOD,I2S mode selection" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "SPI1_HWCFGR2,SPI/I2S hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "OPBCFG,Number of option bits available" line.long 0x4 "SPI1_HWCFGR1,SPI/I2S hardware configuration register" hexmask.long.byte 0x4 24.--27. 1. "FULLCFG,SPI2S full feature version configuration" hexmask.long.byte 0x4 20.--23. 1. "TRGCFG,Autonomous trigger feature configuration" hexmask.long.byte 0x4 16.--19. 1. "DSCFG,SPI data size configuration" hexmask.long.byte 0x4 12.--15. 1. "I2SCFG,I2S configuration" hexmask.long.byte 0x4 8.--11. 1. "CRCCFG,CRC configuration for SPI" hexmask.long.byte 0x4 4.--7. 1. "RXFCFG,RxFIFO size" hexmask.long.byte 0x4 0.--3. 1. "TXFCFG,TxFIFO size" line.long 0x8 "SPI1_VERR,SPI/I2S version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,major version" hexmask.long.byte 0x8 0.--3. 1. "MINREV,minor version" line.long 0xC "SPI1_IPIDR,SPI/I2S identification register" hexmask.long 0xC 0.--31. 1. "ID,Identification" line.long 0x10 "SPI1_SIDR,SPI/I2S size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "SPI2" base ad:0x400B0000 group.long 0x0++0x13 line.long 0x0 "SPI1_CR1,SPI/I2S control register 1" bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "B_0x0,B_0x1" bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "B_0x0,B_0x1" bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "B_0x0,B_0x1" bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1" bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1" bitfld.long 0x0 9. "CSTART,master transfer start" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPE,serial peripheral enable" "B_0x0,B_0x1" line.long 0x4 "SPI1_CR2,SPI/I2S control register 2" hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer" line.long 0x8 "SPI1_CFG1,SPI/I2S configuration register 1" bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "B_0x0,B_0x1" bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared" bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "B_0x0,B_0x1" hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level" newline hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame" line.long 0xC "SPI1_CFG2,SPI/I2S configuration register 2" bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "B_0x0,B_0x1" bitfld.long 0xC 30. "SSOM,SS output management in master mode" "B_0x0,B_0x1" bitfld.long 0xC 29. "SSOE,SS output enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 26. "SSM,software management of SS signal input" "B_0x0,B_0x1" bitfld.long 0xC 25. "CPOL,clock polarity" "B_0x0,B_0x1" bitfld.long 0xC 24. "CPHA,clock phase" "B_0x0,B_0x1" bitfld.long 0xC 23. "LSBFRST,data frame format" "B_0x0,B_0x1" newline bitfld.long 0xC 22. "MASTER,SPI master" "B_0x0,B_0x1" bitfld.long 0xC 19.--21. "SP,serial protocol" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "B_0x0,B_0x1" bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "B_0x0,B_0x1" hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness" hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness" line.long 0x10 "SPI1_IER,SPI/I2S interrupt enable register" bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "EOTIE,EOT SUSP and TXC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "SPI1_SR,SPI/I2S status register" hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session" bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "B_0x0,B_0x1" bitfld.long 0x0 11. "SUSP,suspension status" "B_0x0,B_0x1" bitfld.long 0x0 9. "MODF,mode fault" "B_0x0,B_0x1" bitfld.long 0x0 8. "TIFRE,TI frame format error" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCE,CRC error" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "OVR,overrun" "B_0x0,B_0x1" bitfld.long 0x0 5. "UDR,underrun" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXTF,transmission transfer filled" "B_0x0,B_0x1" bitfld.long 0x0 3. "EOT,end of transfer" "B_0x0,B_0x1" bitfld.long 0x0 2. "DXP,duplex packet" "B_0x0,B_0x1" bitfld.long 0x0 1. "TXP,Tx-packet space available" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXP,Rx-packet available" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "SPI1_IFCR,SPI/I2S interrupt/status flags clear register" bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1" bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1" bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1" bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1" bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1" bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1" bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1" bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1" group.long 0x1C++0x3 line.long 0x0 "SPI1_AUTOCR,SPI/I2S autonomous mode control register" bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)." wgroup.long 0x20++0x3 line.long 0x0 "SPI1_TXDR,SPI/I2S transmit data register" hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register" rgroup.long 0x30++0x3 line.long 0x0 "SPI1_RXDR,SPI/I2S receive data register" hexmask.long 0x0 0.--31. 1. "RXDR,receive data register" group.long 0x40++0x3 line.long 0x0 "SPI1_CRCPOLY,SPI/I2S polynomial register" hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x44++0x7 line.long 0x0 "SPI1_TXCRC,SPI/I2S transmitter CRC register" hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter" line.long 0x4 "SPI1_RXCRC,SPI/I2S receiver CRC register" hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver" group.long 0x4C++0x7 line.long 0x0 "SPI1_UDRDR,SPI/I2S underrun data register" hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition" line.long 0x4 "SPI1_I2SCFGR,SPI/I2S configuration register" bitfld.long 0x4 25. "MCKOE,master clock output enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ODD,odd factor for the prescaler" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "I2SDIV,Iless thansup>2less than/sup>S linear prescaler" bitfld.long 0x4 14. "DATFMT,data format" "B_0x0,B_0x1" bitfld.long 0x4 13. "WSINV,word select inversion" "B_0x0,B_0x1" bitfld.long 0x4 12. "FIXCH,fixed channel length in slave" "B_0x0,B_0x1" bitfld.long 0x4 11. "CKPOL,serial audio clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "CHLEN,channel length (number of bits per audio channel)" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--9. "DATLEN,data length to be transferred." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 7. "PCMSYNC,PCM frame synchronization" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "I2SSTD,Iless thansup>2less than/sup>S standard selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--3. "I2SCFG,I2S configuration mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 0. "I2SMOD,I2S mode selection" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "SPI1_HWCFGR2,SPI/I2S hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "OPBCFG,Number of option bits available" line.long 0x4 "SPI1_HWCFGR1,SPI/I2S hardware configuration register" hexmask.long.byte 0x4 24.--27. 1. "FULLCFG,SPI2S full feature version configuration" hexmask.long.byte 0x4 20.--23. 1. "TRGCFG,Autonomous trigger feature configuration" hexmask.long.byte 0x4 16.--19. 1. "DSCFG,SPI data size configuration" hexmask.long.byte 0x4 12.--15. 1. "I2SCFG,I2S configuration" hexmask.long.byte 0x4 8.--11. 1. "CRCCFG,CRC configuration for SPI" hexmask.long.byte 0x4 4.--7. 1. "RXFCFG,RxFIFO size" hexmask.long.byte 0x4 0.--3. 1. "TXFCFG,TxFIFO size" line.long 0x8 "SPI1_VERR,SPI/I2S version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,major version" hexmask.long.byte 0x8 0.--3. 1. "MINREV,minor version" line.long 0xC "SPI1_IPIDR,SPI/I2S identification register" hexmask.long 0xC 0.--31. 1. "ID,Identification" line.long 0x10 "SPI1_SIDR,SPI/I2S size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "SPI2_S" base ad:0x500B0000 group.long 0x0++0x13 line.long 0x0 "SPI1_CR1,SPI/I2S control register 1" bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "B_0x0,B_0x1" bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "B_0x0,B_0x1" bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "B_0x0,B_0x1" bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1" bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1" bitfld.long 0x0 9. "CSTART,master transfer start" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPE,serial peripheral enable" "B_0x0,B_0x1" line.long 0x4 "SPI1_CR2,SPI/I2S control register 2" hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer" line.long 0x8 "SPI1_CFG1,SPI/I2S configuration register 1" bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "B_0x0,B_0x1" bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared" bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "B_0x0,B_0x1" hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level" newline hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame" line.long 0xC "SPI1_CFG2,SPI/I2S configuration register 2" bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "B_0x0,B_0x1" bitfld.long 0xC 30. "SSOM,SS output management in master mode" "B_0x0,B_0x1" bitfld.long 0xC 29. "SSOE,SS output enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 26. "SSM,software management of SS signal input" "B_0x0,B_0x1" bitfld.long 0xC 25. "CPOL,clock polarity" "B_0x0,B_0x1" bitfld.long 0xC 24. "CPHA,clock phase" "B_0x0,B_0x1" bitfld.long 0xC 23. "LSBFRST,data frame format" "B_0x0,B_0x1" newline bitfld.long 0xC 22. "MASTER,SPI master" "B_0x0,B_0x1" bitfld.long 0xC 19.--21. "SP,serial protocol" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "B_0x0,B_0x1" bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "B_0x0,B_0x1" hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness" hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness" line.long 0x10 "SPI1_IER,SPI/I2S interrupt enable register" bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "EOTIE,EOT SUSP and TXC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "SPI1_SR,SPI/I2S status register" hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session" bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "B_0x0,B_0x1" bitfld.long 0x0 11. "SUSP,suspension status" "B_0x0,B_0x1" bitfld.long 0x0 9. "MODF,mode fault" "B_0x0,B_0x1" bitfld.long 0x0 8. "TIFRE,TI frame format error" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCE,CRC error" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "OVR,overrun" "B_0x0,B_0x1" bitfld.long 0x0 5. "UDR,underrun" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXTF,transmission transfer filled" "B_0x0,B_0x1" bitfld.long 0x0 3. "EOT,end of transfer" "B_0x0,B_0x1" bitfld.long 0x0 2. "DXP,duplex packet" "B_0x0,B_0x1" bitfld.long 0x0 1. "TXP,Tx-packet space available" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXP,Rx-packet available" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "SPI1_IFCR,SPI/I2S interrupt/status flags clear register" bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1" bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1" bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1" bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1" bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1" bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1" bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1" bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1" group.long 0x1C++0x3 line.long 0x0 "SPI1_AUTOCR,SPI/I2S autonomous mode control register" bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)." wgroup.long 0x20++0x3 line.long 0x0 "SPI1_TXDR,SPI/I2S transmit data register" hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register" rgroup.long 0x30++0x3 line.long 0x0 "SPI1_RXDR,SPI/I2S receive data register" hexmask.long 0x0 0.--31. 1. "RXDR,receive data register" group.long 0x40++0x3 line.long 0x0 "SPI1_CRCPOLY,SPI/I2S polynomial register" hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x44++0x7 line.long 0x0 "SPI1_TXCRC,SPI/I2S transmitter CRC register" hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter" line.long 0x4 "SPI1_RXCRC,SPI/I2S receiver CRC register" hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver" group.long 0x4C++0x7 line.long 0x0 "SPI1_UDRDR,SPI/I2S underrun data register" hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition" line.long 0x4 "SPI1_I2SCFGR,SPI/I2S configuration register" bitfld.long 0x4 25. "MCKOE,master clock output enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ODD,odd factor for the prescaler" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "I2SDIV,Iless thansup>2less than/sup>S linear prescaler" bitfld.long 0x4 14. "DATFMT,data format" "B_0x0,B_0x1" bitfld.long 0x4 13. "WSINV,word select inversion" "B_0x0,B_0x1" bitfld.long 0x4 12. "FIXCH,fixed channel length in slave" "B_0x0,B_0x1" bitfld.long 0x4 11. "CKPOL,serial audio clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "CHLEN,channel length (number of bits per audio channel)" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--9. "DATLEN,data length to be transferred." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 7. "PCMSYNC,PCM frame synchronization" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "I2SSTD,Iless thansup>2less than/sup>S standard selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--3. "I2SCFG,I2S configuration mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 0. "I2SMOD,I2S mode selection" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "SPI1_HWCFGR2,SPI/I2S hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "OPBCFG,Number of option bits available" line.long 0x4 "SPI1_HWCFGR1,SPI/I2S hardware configuration register" hexmask.long.byte 0x4 24.--27. 1. "FULLCFG,SPI2S full feature version configuration" hexmask.long.byte 0x4 20.--23. 1. "TRGCFG,Autonomous trigger feature configuration" hexmask.long.byte 0x4 16.--19. 1. "DSCFG,SPI data size configuration" hexmask.long.byte 0x4 12.--15. 1. "I2SCFG,I2S configuration" hexmask.long.byte 0x4 8.--11. 1. "CRCCFG,CRC configuration for SPI" hexmask.long.byte 0x4 4.--7. 1. "RXFCFG,RxFIFO size" hexmask.long.byte 0x4 0.--3. 1. "TXFCFG,TxFIFO size" line.long 0x8 "SPI1_VERR,SPI/I2S version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,major version" hexmask.long.byte 0x8 0.--3. 1. "MINREV,minor version" line.long 0xC "SPI1_IPIDR,SPI/I2S identification register" hexmask.long 0xC 0.--31. 1. "ID,Identification" line.long 0x10 "SPI1_SIDR,SPI/I2S size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "SPI3" base ad:0x400C0000 group.long 0x0++0x13 line.long 0x0 "SPI1_CR1,SPI/I2S control register 1" bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "B_0x0,B_0x1" bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "B_0x0,B_0x1" bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "B_0x0,B_0x1" bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1" bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1" bitfld.long 0x0 9. "CSTART,master transfer start" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPE,serial peripheral enable" "B_0x0,B_0x1" line.long 0x4 "SPI1_CR2,SPI/I2S control register 2" hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer" line.long 0x8 "SPI1_CFG1,SPI/I2S configuration register 1" bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "B_0x0,B_0x1" bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared" bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "B_0x0,B_0x1" hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level" newline hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame" line.long 0xC "SPI1_CFG2,SPI/I2S configuration register 2" bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "B_0x0,B_0x1" bitfld.long 0xC 30. "SSOM,SS output management in master mode" "B_0x0,B_0x1" bitfld.long 0xC 29. "SSOE,SS output enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 26. "SSM,software management of SS signal input" "B_0x0,B_0x1" bitfld.long 0xC 25. "CPOL,clock polarity" "B_0x0,B_0x1" bitfld.long 0xC 24. "CPHA,clock phase" "B_0x0,B_0x1" bitfld.long 0xC 23. "LSBFRST,data frame format" "B_0x0,B_0x1" newline bitfld.long 0xC 22. "MASTER,SPI master" "B_0x0,B_0x1" bitfld.long 0xC 19.--21. "SP,serial protocol" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "B_0x0,B_0x1" bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "B_0x0,B_0x1" hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness" hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness" line.long 0x10 "SPI1_IER,SPI/I2S interrupt enable register" bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "EOTIE,EOT SUSP and TXC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "SPI1_SR,SPI/I2S status register" hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session" bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "B_0x0,B_0x1" bitfld.long 0x0 11. "SUSP,suspension status" "B_0x0,B_0x1" bitfld.long 0x0 9. "MODF,mode fault" "B_0x0,B_0x1" bitfld.long 0x0 8. "TIFRE,TI frame format error" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCE,CRC error" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "OVR,overrun" "B_0x0,B_0x1" bitfld.long 0x0 5. "UDR,underrun" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXTF,transmission transfer filled" "B_0x0,B_0x1" bitfld.long 0x0 3. "EOT,end of transfer" "B_0x0,B_0x1" bitfld.long 0x0 2. "DXP,duplex packet" "B_0x0,B_0x1" bitfld.long 0x0 1. "TXP,Tx-packet space available" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXP,Rx-packet available" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "SPI1_IFCR,SPI/I2S interrupt/status flags clear register" bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1" bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1" bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1" bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1" bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1" bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1" bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1" bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1" group.long 0x1C++0x3 line.long 0x0 "SPI1_AUTOCR,SPI/I2S autonomous mode control register" bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)." wgroup.long 0x20++0x3 line.long 0x0 "SPI1_TXDR,SPI/I2S transmit data register" hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register" rgroup.long 0x30++0x3 line.long 0x0 "SPI1_RXDR,SPI/I2S receive data register" hexmask.long 0x0 0.--31. 1. "RXDR,receive data register" group.long 0x40++0x3 line.long 0x0 "SPI1_CRCPOLY,SPI/I2S polynomial register" hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x44++0x7 line.long 0x0 "SPI1_TXCRC,SPI/I2S transmitter CRC register" hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter" line.long 0x4 "SPI1_RXCRC,SPI/I2S receiver CRC register" hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver" group.long 0x4C++0x7 line.long 0x0 "SPI1_UDRDR,SPI/I2S underrun data register" hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition" line.long 0x4 "SPI1_I2SCFGR,SPI/I2S configuration register" bitfld.long 0x4 25. "MCKOE,master clock output enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ODD,odd factor for the prescaler" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "I2SDIV,Iless thansup>2less than/sup>S linear prescaler" bitfld.long 0x4 14. "DATFMT,data format" "B_0x0,B_0x1" bitfld.long 0x4 13. "WSINV,word select inversion" "B_0x0,B_0x1" bitfld.long 0x4 12. "FIXCH,fixed channel length in slave" "B_0x0,B_0x1" bitfld.long 0x4 11. "CKPOL,serial audio clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "CHLEN,channel length (number of bits per audio channel)" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--9. "DATLEN,data length to be transferred." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 7. "PCMSYNC,PCM frame synchronization" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "I2SSTD,Iless thansup>2less than/sup>S standard selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--3. "I2SCFG,I2S configuration mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 0. "I2SMOD,I2S mode selection" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "SPI1_HWCFGR2,SPI/I2S hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "OPBCFG,Number of option bits available" line.long 0x4 "SPI1_HWCFGR1,SPI/I2S hardware configuration register" hexmask.long.byte 0x4 24.--27. 1. "FULLCFG,SPI2S full feature version configuration" hexmask.long.byte 0x4 20.--23. 1. "TRGCFG,Autonomous trigger feature configuration" hexmask.long.byte 0x4 16.--19. 1. "DSCFG,SPI data size configuration" hexmask.long.byte 0x4 12.--15. 1. "I2SCFG,I2S configuration" hexmask.long.byte 0x4 8.--11. 1. "CRCCFG,CRC configuration for SPI" hexmask.long.byte 0x4 4.--7. 1. "RXFCFG,RxFIFO size" hexmask.long.byte 0x4 0.--3. 1. "TXFCFG,TxFIFO size" line.long 0x8 "SPI1_VERR,SPI/I2S version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,major version" hexmask.long.byte 0x8 0.--3. 1. "MINREV,minor version" line.long 0xC "SPI1_IPIDR,SPI/I2S identification register" hexmask.long 0xC 0.--31. 1. "ID,Identification" line.long 0x10 "SPI1_SIDR,SPI/I2S size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "SPI3_S" base ad:0x500C0000 group.long 0x0++0x13 line.long 0x0 "SPI1_CR1,SPI/I2S control register 1" bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "B_0x0,B_0x1" bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "B_0x0,B_0x1" bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "B_0x0,B_0x1" bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1" bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1" bitfld.long 0x0 9. "CSTART,master transfer start" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPE,serial peripheral enable" "B_0x0,B_0x1" line.long 0x4 "SPI1_CR2,SPI/I2S control register 2" hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer" line.long 0x8 "SPI1_CFG1,SPI/I2S configuration register 1" bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "B_0x0,B_0x1" bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared" bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "B_0x0,B_0x1" hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level" newline hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame" line.long 0xC "SPI1_CFG2,SPI/I2S configuration register 2" bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "B_0x0,B_0x1" bitfld.long 0xC 30. "SSOM,SS output management in master mode" "B_0x0,B_0x1" bitfld.long 0xC 29. "SSOE,SS output enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 26. "SSM,software management of SS signal input" "B_0x0,B_0x1" bitfld.long 0xC 25. "CPOL,clock polarity" "B_0x0,B_0x1" bitfld.long 0xC 24. "CPHA,clock phase" "B_0x0,B_0x1" bitfld.long 0xC 23. "LSBFRST,data frame format" "B_0x0,B_0x1" newline bitfld.long 0xC 22. "MASTER,SPI master" "B_0x0,B_0x1" bitfld.long 0xC 19.--21. "SP,serial protocol" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "B_0x0,B_0x1" bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "B_0x0,B_0x1" hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness" hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness" line.long 0x10 "SPI1_IER,SPI/I2S interrupt enable register" bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "EOTIE,EOT SUSP and TXC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "SPI1_SR,SPI/I2S status register" hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session" bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "B_0x0,B_0x1" bitfld.long 0x0 11. "SUSP,suspension status" "B_0x0,B_0x1" bitfld.long 0x0 9. "MODF,mode fault" "B_0x0,B_0x1" bitfld.long 0x0 8. "TIFRE,TI frame format error" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCE,CRC error" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "OVR,overrun" "B_0x0,B_0x1" bitfld.long 0x0 5. "UDR,underrun" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXTF,transmission transfer filled" "B_0x0,B_0x1" bitfld.long 0x0 3. "EOT,end of transfer" "B_0x0,B_0x1" bitfld.long 0x0 2. "DXP,duplex packet" "B_0x0,B_0x1" bitfld.long 0x0 1. "TXP,Tx-packet space available" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXP,Rx-packet available" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "SPI1_IFCR,SPI/I2S interrupt/status flags clear register" bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1" bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1" bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1" bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1" bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1" bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1" bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1" bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1" group.long 0x1C++0x3 line.long 0x0 "SPI1_AUTOCR,SPI/I2S autonomous mode control register" bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)." wgroup.long 0x20++0x3 line.long 0x0 "SPI1_TXDR,SPI/I2S transmit data register" hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register" rgroup.long 0x30++0x3 line.long 0x0 "SPI1_RXDR,SPI/I2S receive data register" hexmask.long 0x0 0.--31. 1. "RXDR,receive data register" group.long 0x40++0x3 line.long 0x0 "SPI1_CRCPOLY,SPI/I2S polynomial register" hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x44++0x7 line.long 0x0 "SPI1_TXCRC,SPI/I2S transmitter CRC register" hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter" line.long 0x4 "SPI1_RXCRC,SPI/I2S receiver CRC register" hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver" group.long 0x4C++0x7 line.long 0x0 "SPI1_UDRDR,SPI/I2S underrun data register" hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition" line.long 0x4 "SPI1_I2SCFGR,SPI/I2S configuration register" bitfld.long 0x4 25. "MCKOE,master clock output enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ODD,odd factor for the prescaler" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "I2SDIV,Iless thansup>2less than/sup>S linear prescaler" bitfld.long 0x4 14. "DATFMT,data format" "B_0x0,B_0x1" bitfld.long 0x4 13. "WSINV,word select inversion" "B_0x0,B_0x1" bitfld.long 0x4 12. "FIXCH,fixed channel length in slave" "B_0x0,B_0x1" bitfld.long 0x4 11. "CKPOL,serial audio clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "CHLEN,channel length (number of bits per audio channel)" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--9. "DATLEN,data length to be transferred." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 7. "PCMSYNC,PCM frame synchronization" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "I2SSTD,Iless thansup>2less than/sup>S standard selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--3. "I2SCFG,I2S configuration mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 0. "I2SMOD,I2S mode selection" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "SPI1_HWCFGR2,SPI/I2S hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "OPBCFG,Number of option bits available" line.long 0x4 "SPI1_HWCFGR1,SPI/I2S hardware configuration register" hexmask.long.byte 0x4 24.--27. 1. "FULLCFG,SPI2S full feature version configuration" hexmask.long.byte 0x4 20.--23. 1. "TRGCFG,Autonomous trigger feature configuration" hexmask.long.byte 0x4 16.--19. 1. "DSCFG,SPI data size configuration" hexmask.long.byte 0x4 12.--15. 1. "I2SCFG,I2S configuration" hexmask.long.byte 0x4 8.--11. 1. "CRCCFG,CRC configuration for SPI" hexmask.long.byte 0x4 4.--7. 1. "RXFCFG,RxFIFO size" hexmask.long.byte 0x4 0.--3. 1. "TXFCFG,TxFIFO size" line.long 0x8 "SPI1_VERR,SPI/I2S version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,major version" hexmask.long.byte 0x8 0.--3. 1. "MINREV,minor version" line.long 0xC "SPI1_IPIDR,SPI/I2S identification register" hexmask.long 0xC 0.--31. 1. "ID,Identification" line.long 0x10 "SPI1_SIDR,SPI/I2S size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "SPI4" base ad:0x40240000 group.long 0x0++0x13 line.long 0x0 "SPI1_CR1,SPI/I2S control register 1" bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "B_0x0,B_0x1" bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "B_0x0,B_0x1" bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "B_0x0,B_0x1" bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1" bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1" bitfld.long 0x0 9. "CSTART,master transfer start" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPE,serial peripheral enable" "B_0x0,B_0x1" line.long 0x4 "SPI1_CR2,SPI/I2S control register 2" hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer" line.long 0x8 "SPI1_CFG1,SPI/I2S configuration register 1" bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "B_0x0,B_0x1" bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared" bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "B_0x0,B_0x1" hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level" newline hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame" line.long 0xC "SPI1_CFG2,SPI/I2S configuration register 2" bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "B_0x0,B_0x1" bitfld.long 0xC 30. "SSOM,SS output management in master mode" "B_0x0,B_0x1" bitfld.long 0xC 29. "SSOE,SS output enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 26. "SSM,software management of SS signal input" "B_0x0,B_0x1" bitfld.long 0xC 25. "CPOL,clock polarity" "B_0x0,B_0x1" bitfld.long 0xC 24. "CPHA,clock phase" "B_0x0,B_0x1" bitfld.long 0xC 23. "LSBFRST,data frame format" "B_0x0,B_0x1" newline bitfld.long 0xC 22. "MASTER,SPI master" "B_0x0,B_0x1" bitfld.long 0xC 19.--21. "SP,serial protocol" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "B_0x0,B_0x1" bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "B_0x0,B_0x1" hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness" hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness" line.long 0x10 "SPI1_IER,SPI/I2S interrupt enable register" bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "EOTIE,EOT SUSP and TXC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "SPI1_SR,SPI/I2S status register" hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session" bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "B_0x0,B_0x1" bitfld.long 0x0 11. "SUSP,suspension status" "B_0x0,B_0x1" bitfld.long 0x0 9. "MODF,mode fault" "B_0x0,B_0x1" bitfld.long 0x0 8. "TIFRE,TI frame format error" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCE,CRC error" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "OVR,overrun" "B_0x0,B_0x1" bitfld.long 0x0 5. "UDR,underrun" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXTF,transmission transfer filled" "B_0x0,B_0x1" bitfld.long 0x0 3. "EOT,end of transfer" "B_0x0,B_0x1" bitfld.long 0x0 2. "DXP,duplex packet" "B_0x0,B_0x1" bitfld.long 0x0 1. "TXP,Tx-packet space available" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXP,Rx-packet available" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "SPI1_IFCR,SPI/I2S interrupt/status flags clear register" bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1" bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1" bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1" bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1" bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1" bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1" bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1" bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1" group.long 0x1C++0x3 line.long 0x0 "SPI1_AUTOCR,SPI/I2S autonomous mode control register" bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)." wgroup.long 0x20++0x3 line.long 0x0 "SPI1_TXDR,SPI/I2S transmit data register" hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register" rgroup.long 0x30++0x3 line.long 0x0 "SPI1_RXDR,SPI/I2S receive data register" hexmask.long 0x0 0.--31. 1. "RXDR,receive data register" group.long 0x40++0x3 line.long 0x0 "SPI1_CRCPOLY,SPI/I2S polynomial register" hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x44++0x7 line.long 0x0 "SPI1_TXCRC,SPI/I2S transmitter CRC register" hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter" line.long 0x4 "SPI1_RXCRC,SPI/I2S receiver CRC register" hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver" group.long 0x4C++0x7 line.long 0x0 "SPI1_UDRDR,SPI/I2S underrun data register" hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition" line.long 0x4 "SPI1_I2SCFGR,SPI/I2S configuration register" bitfld.long 0x4 25. "MCKOE,master clock output enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ODD,odd factor for the prescaler" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "I2SDIV,Iless thansup>2less than/sup>S linear prescaler" bitfld.long 0x4 14. "DATFMT,data format" "B_0x0,B_0x1" bitfld.long 0x4 13. "WSINV,word select inversion" "B_0x0,B_0x1" bitfld.long 0x4 12. "FIXCH,fixed channel length in slave" "B_0x0,B_0x1" bitfld.long 0x4 11. "CKPOL,serial audio clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "CHLEN,channel length (number of bits per audio channel)" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--9. "DATLEN,data length to be transferred." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 7. "PCMSYNC,PCM frame synchronization" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "I2SSTD,Iless thansup>2less than/sup>S standard selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--3. "I2SCFG,I2S configuration mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 0. "I2SMOD,I2S mode selection" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "SPI1_HWCFGR2,SPI/I2S hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "OPBCFG,Number of option bits available" line.long 0x4 "SPI1_HWCFGR1,SPI/I2S hardware configuration register" hexmask.long.byte 0x4 24.--27. 1. "FULLCFG,SPI2S full feature version configuration" hexmask.long.byte 0x4 20.--23. 1. "TRGCFG,Autonomous trigger feature configuration" hexmask.long.byte 0x4 16.--19. 1. "DSCFG,SPI data size configuration" hexmask.long.byte 0x4 12.--15. 1. "I2SCFG,I2S configuration" hexmask.long.byte 0x4 8.--11. 1. "CRCCFG,CRC configuration for SPI" hexmask.long.byte 0x4 4.--7. 1. "RXFCFG,RxFIFO size" hexmask.long.byte 0x4 0.--3. 1. "TXFCFG,TxFIFO size" line.long 0x8 "SPI1_VERR,SPI/I2S version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,major version" hexmask.long.byte 0x8 0.--3. 1. "MINREV,minor version" line.long 0xC "SPI1_IPIDR,SPI/I2S identification register" hexmask.long 0xC 0.--31. 1. "ID,Identification" line.long 0x10 "SPI1_SIDR,SPI/I2S size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "SPI4_S" base ad:0x50240000 group.long 0x0++0x13 line.long 0x0 "SPI1_CR1,SPI/I2S control register 1" bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "B_0x0,B_0x1" bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "B_0x0,B_0x1" bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "B_0x0,B_0x1" bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1" bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1" bitfld.long 0x0 9. "CSTART,master transfer start" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPE,serial peripheral enable" "B_0x0,B_0x1" line.long 0x4 "SPI1_CR2,SPI/I2S control register 2" hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer" line.long 0x8 "SPI1_CFG1,SPI/I2S configuration register 1" bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "B_0x0,B_0x1" bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared" bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "B_0x0,B_0x1" hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level" newline hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame" line.long 0xC "SPI1_CFG2,SPI/I2S configuration register 2" bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "B_0x0,B_0x1" bitfld.long 0xC 30. "SSOM,SS output management in master mode" "B_0x0,B_0x1" bitfld.long 0xC 29. "SSOE,SS output enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 26. "SSM,software management of SS signal input" "B_0x0,B_0x1" bitfld.long 0xC 25. "CPOL,clock polarity" "B_0x0,B_0x1" bitfld.long 0xC 24. "CPHA,clock phase" "B_0x0,B_0x1" bitfld.long 0xC 23. "LSBFRST,data frame format" "B_0x0,B_0x1" newline bitfld.long 0xC 22. "MASTER,SPI master" "B_0x0,B_0x1" bitfld.long 0xC 19.--21. "SP,serial protocol" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "B_0x0,B_0x1" bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "B_0x0,B_0x1" hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness" hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness" line.long 0x10 "SPI1_IER,SPI/I2S interrupt enable register" bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "EOTIE,EOT SUSP and TXC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "SPI1_SR,SPI/I2S status register" hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session" bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "B_0x0,B_0x1" bitfld.long 0x0 11. "SUSP,suspension status" "B_0x0,B_0x1" bitfld.long 0x0 9. "MODF,mode fault" "B_0x0,B_0x1" bitfld.long 0x0 8. "TIFRE,TI frame format error" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCE,CRC error" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "OVR,overrun" "B_0x0,B_0x1" bitfld.long 0x0 5. "UDR,underrun" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXTF,transmission transfer filled" "B_0x0,B_0x1" bitfld.long 0x0 3. "EOT,end of transfer" "B_0x0,B_0x1" bitfld.long 0x0 2. "DXP,duplex packet" "B_0x0,B_0x1" bitfld.long 0x0 1. "TXP,Tx-packet space available" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXP,Rx-packet available" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "SPI1_IFCR,SPI/I2S interrupt/status flags clear register" bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1" bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1" bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1" bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1" bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1" bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1" bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1" bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1" group.long 0x1C++0x3 line.long 0x0 "SPI1_AUTOCR,SPI/I2S autonomous mode control register" bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)." wgroup.long 0x20++0x3 line.long 0x0 "SPI1_TXDR,SPI/I2S transmit data register" hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register" rgroup.long 0x30++0x3 line.long 0x0 "SPI1_RXDR,SPI/I2S receive data register" hexmask.long 0x0 0.--31. 1. "RXDR,receive data register" group.long 0x40++0x3 line.long 0x0 "SPI1_CRCPOLY,SPI/I2S polynomial register" hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x44++0x7 line.long 0x0 "SPI1_TXCRC,SPI/I2S transmitter CRC register" hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter" line.long 0x4 "SPI1_RXCRC,SPI/I2S receiver CRC register" hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver" group.long 0x4C++0x7 line.long 0x0 "SPI1_UDRDR,SPI/I2S underrun data register" hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition" line.long 0x4 "SPI1_I2SCFGR,SPI/I2S configuration register" bitfld.long 0x4 25. "MCKOE,master clock output enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ODD,odd factor for the prescaler" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "I2SDIV,Iless thansup>2less than/sup>S linear prescaler" bitfld.long 0x4 14. "DATFMT,data format" "B_0x0,B_0x1" bitfld.long 0x4 13. "WSINV,word select inversion" "B_0x0,B_0x1" bitfld.long 0x4 12. "FIXCH,fixed channel length in slave" "B_0x0,B_0x1" bitfld.long 0x4 11. "CKPOL,serial audio clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "CHLEN,channel length (number of bits per audio channel)" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--9. "DATLEN,data length to be transferred." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 7. "PCMSYNC,PCM frame synchronization" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "I2SSTD,Iless thansup>2less than/sup>S standard selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--3. "I2SCFG,I2S configuration mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 0. "I2SMOD,I2S mode selection" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "SPI1_HWCFGR2,SPI/I2S hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "OPBCFG,Number of option bits available" line.long 0x4 "SPI1_HWCFGR1,SPI/I2S hardware configuration register" hexmask.long.byte 0x4 24.--27. 1. "FULLCFG,SPI2S full feature version configuration" hexmask.long.byte 0x4 20.--23. 1. "TRGCFG,Autonomous trigger feature configuration" hexmask.long.byte 0x4 16.--19. 1. "DSCFG,SPI data size configuration" hexmask.long.byte 0x4 12.--15. 1. "I2SCFG,I2S configuration" hexmask.long.byte 0x4 8.--11. 1. "CRCCFG,CRC configuration for SPI" hexmask.long.byte 0x4 4.--7. 1. "RXFCFG,RxFIFO size" hexmask.long.byte 0x4 0.--3. 1. "TXFCFG,TxFIFO size" line.long 0x8 "SPI1_VERR,SPI/I2S version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,major version" hexmask.long.byte 0x8 0.--3. 1. "MINREV,minor version" line.long 0xC "SPI1_IPIDR,SPI/I2S identification register" hexmask.long 0xC 0.--31. 1. "ID,Identification" line.long 0x10 "SPI1_SIDR,SPI/I2S size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "SPI5" base ad:0x40280000 group.long 0x0++0x13 line.long 0x0 "SPI1_CR1,SPI/I2S control register 1" bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "B_0x0,B_0x1" bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "B_0x0,B_0x1" bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "B_0x0,B_0x1" bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1" bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1" bitfld.long 0x0 9. "CSTART,master transfer start" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPE,serial peripheral enable" "B_0x0,B_0x1" line.long 0x4 "SPI1_CR2,SPI/I2S control register 2" hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer" line.long 0x8 "SPI1_CFG1,SPI/I2S configuration register 1" bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "B_0x0,B_0x1" bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared" bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "B_0x0,B_0x1" hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level" newline hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame" line.long 0xC "SPI1_CFG2,SPI/I2S configuration register 2" bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "B_0x0,B_0x1" bitfld.long 0xC 30. "SSOM,SS output management in master mode" "B_0x0,B_0x1" bitfld.long 0xC 29. "SSOE,SS output enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 26. "SSM,software management of SS signal input" "B_0x0,B_0x1" bitfld.long 0xC 25. "CPOL,clock polarity" "B_0x0,B_0x1" bitfld.long 0xC 24. "CPHA,clock phase" "B_0x0,B_0x1" bitfld.long 0xC 23. "LSBFRST,data frame format" "B_0x0,B_0x1" newline bitfld.long 0xC 22. "MASTER,SPI master" "B_0x0,B_0x1" bitfld.long 0xC 19.--21. "SP,serial protocol" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "B_0x0,B_0x1" bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "B_0x0,B_0x1" hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness" hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness" line.long 0x10 "SPI1_IER,SPI/I2S interrupt enable register" bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "EOTIE,EOT SUSP and TXC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "SPI1_SR,SPI/I2S status register" hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session" bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "B_0x0,B_0x1" bitfld.long 0x0 11. "SUSP,suspension status" "B_0x0,B_0x1" bitfld.long 0x0 9. "MODF,mode fault" "B_0x0,B_0x1" bitfld.long 0x0 8. "TIFRE,TI frame format error" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCE,CRC error" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "OVR,overrun" "B_0x0,B_0x1" bitfld.long 0x0 5. "UDR,underrun" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXTF,transmission transfer filled" "B_0x0,B_0x1" bitfld.long 0x0 3. "EOT,end of transfer" "B_0x0,B_0x1" bitfld.long 0x0 2. "DXP,duplex packet" "B_0x0,B_0x1" bitfld.long 0x0 1. "TXP,Tx-packet space available" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXP,Rx-packet available" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "SPI1_IFCR,SPI/I2S interrupt/status flags clear register" bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1" bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1" bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1" bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1" bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1" bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1" bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1" bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1" group.long 0x1C++0x3 line.long 0x0 "SPI1_AUTOCR,SPI/I2S autonomous mode control register" bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)." wgroup.long 0x20++0x3 line.long 0x0 "SPI1_TXDR,SPI/I2S transmit data register" hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register" rgroup.long 0x30++0x3 line.long 0x0 "SPI1_RXDR,SPI/I2S receive data register" hexmask.long 0x0 0.--31. 1. "RXDR,receive data register" group.long 0x40++0x3 line.long 0x0 "SPI1_CRCPOLY,SPI/I2S polynomial register" hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x44++0x7 line.long 0x0 "SPI1_TXCRC,SPI/I2S transmitter CRC register" hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter" line.long 0x4 "SPI1_RXCRC,SPI/I2S receiver CRC register" hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver" group.long 0x4C++0x7 line.long 0x0 "SPI1_UDRDR,SPI/I2S underrun data register" hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition" line.long 0x4 "SPI1_I2SCFGR,SPI/I2S configuration register" bitfld.long 0x4 25. "MCKOE,master clock output enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ODD,odd factor for the prescaler" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "I2SDIV,Iless thansup>2less than/sup>S linear prescaler" bitfld.long 0x4 14. "DATFMT,data format" "B_0x0,B_0x1" bitfld.long 0x4 13. "WSINV,word select inversion" "B_0x0,B_0x1" bitfld.long 0x4 12. "FIXCH,fixed channel length in slave" "B_0x0,B_0x1" bitfld.long 0x4 11. "CKPOL,serial audio clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "CHLEN,channel length (number of bits per audio channel)" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--9. "DATLEN,data length to be transferred." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 7. "PCMSYNC,PCM frame synchronization" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "I2SSTD,Iless thansup>2less than/sup>S standard selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--3. "I2SCFG,I2S configuration mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 0. "I2SMOD,I2S mode selection" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "SPI1_HWCFGR2,SPI/I2S hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "OPBCFG,Number of option bits available" line.long 0x4 "SPI1_HWCFGR1,SPI/I2S hardware configuration register" hexmask.long.byte 0x4 24.--27. 1. "FULLCFG,SPI2S full feature version configuration" hexmask.long.byte 0x4 20.--23. 1. "TRGCFG,Autonomous trigger feature configuration" hexmask.long.byte 0x4 16.--19. 1. "DSCFG,SPI data size configuration" hexmask.long.byte 0x4 12.--15. 1. "I2SCFG,I2S configuration" hexmask.long.byte 0x4 8.--11. 1. "CRCCFG,CRC configuration for SPI" hexmask.long.byte 0x4 4.--7. 1. "RXFCFG,RxFIFO size" hexmask.long.byte 0x4 0.--3. 1. "TXFCFG,TxFIFO size" line.long 0x8 "SPI1_VERR,SPI/I2S version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,major version" hexmask.long.byte 0x8 0.--3. 1. "MINREV,minor version" line.long 0xC "SPI1_IPIDR,SPI/I2S identification register" hexmask.long 0xC 0.--31. 1. "ID,Identification" line.long 0x10 "SPI1_SIDR,SPI/I2S size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "SPI5_S" base ad:0x50280000 group.long 0x0++0x13 line.long 0x0 "SPI1_CR1,SPI/I2S control register 1" bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "B_0x0,B_0x1" bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "B_0x0,B_0x1" bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "B_0x0,B_0x1" bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1" bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1" bitfld.long 0x0 9. "CSTART,master transfer start" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPE,serial peripheral enable" "B_0x0,B_0x1" line.long 0x4 "SPI1_CR2,SPI/I2S control register 2" hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer" line.long 0x8 "SPI1_CFG1,SPI/I2S configuration register 1" bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "B_0x0,B_0x1" bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared" bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "B_0x0,B_0x1" hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level" newline hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame" line.long 0xC "SPI1_CFG2,SPI/I2S configuration register 2" bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "B_0x0,B_0x1" bitfld.long 0xC 30. "SSOM,SS output management in master mode" "B_0x0,B_0x1" bitfld.long 0xC 29. "SSOE,SS output enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 26. "SSM,software management of SS signal input" "B_0x0,B_0x1" bitfld.long 0xC 25. "CPOL,clock polarity" "B_0x0,B_0x1" bitfld.long 0xC 24. "CPHA,clock phase" "B_0x0,B_0x1" bitfld.long 0xC 23. "LSBFRST,data frame format" "B_0x0,B_0x1" newline bitfld.long 0xC 22. "MASTER,SPI master" "B_0x0,B_0x1" bitfld.long 0xC 19.--21. "SP,serial protocol" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "B_0x0,B_0x1" bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "B_0x0,B_0x1" hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness" hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness" line.long 0x10 "SPI1_IER,SPI/I2S interrupt enable register" bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "EOTIE,EOT SUSP and TXC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "SPI1_SR,SPI/I2S status register" hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session" bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "B_0x0,B_0x1" bitfld.long 0x0 11. "SUSP,suspension status" "B_0x0,B_0x1" bitfld.long 0x0 9. "MODF,mode fault" "B_0x0,B_0x1" bitfld.long 0x0 8. "TIFRE,TI frame format error" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCE,CRC error" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "OVR,overrun" "B_0x0,B_0x1" bitfld.long 0x0 5. "UDR,underrun" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXTF,transmission transfer filled" "B_0x0,B_0x1" bitfld.long 0x0 3. "EOT,end of transfer" "B_0x0,B_0x1" bitfld.long 0x0 2. "DXP,duplex packet" "B_0x0,B_0x1" bitfld.long 0x0 1. "TXP,Tx-packet space available" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXP,Rx-packet available" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "SPI1_IFCR,SPI/I2S interrupt/status flags clear register" bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1" bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1" bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1" bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1" bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1" bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1" bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1" bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1" group.long 0x1C++0x3 line.long 0x0 "SPI1_AUTOCR,SPI/I2S autonomous mode control register" bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)." wgroup.long 0x20++0x3 line.long 0x0 "SPI1_TXDR,SPI/I2S transmit data register" hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register" rgroup.long 0x30++0x3 line.long 0x0 "SPI1_RXDR,SPI/I2S receive data register" hexmask.long 0x0 0.--31. 1. "RXDR,receive data register" group.long 0x40++0x3 line.long 0x0 "SPI1_CRCPOLY,SPI/I2S polynomial register" hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x44++0x7 line.long 0x0 "SPI1_TXCRC,SPI/I2S transmitter CRC register" hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter" line.long 0x4 "SPI1_RXCRC,SPI/I2S receiver CRC register" hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver" group.long 0x4C++0x7 line.long 0x0 "SPI1_UDRDR,SPI/I2S underrun data register" hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition" line.long 0x4 "SPI1_I2SCFGR,SPI/I2S configuration register" bitfld.long 0x4 25. "MCKOE,master clock output enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ODD,odd factor for the prescaler" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "I2SDIV,Iless thansup>2less than/sup>S linear prescaler" bitfld.long 0x4 14. "DATFMT,data format" "B_0x0,B_0x1" bitfld.long 0x4 13. "WSINV,word select inversion" "B_0x0,B_0x1" bitfld.long 0x4 12. "FIXCH,fixed channel length in slave" "B_0x0,B_0x1" bitfld.long 0x4 11. "CKPOL,serial audio clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "CHLEN,channel length (number of bits per audio channel)" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--9. "DATLEN,data length to be transferred." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 7. "PCMSYNC,PCM frame synchronization" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "I2SSTD,Iless thansup>2less than/sup>S standard selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--3. "I2SCFG,I2S configuration mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 0. "I2SMOD,I2S mode selection" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "SPI1_HWCFGR2,SPI/I2S hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "OPBCFG,Number of option bits available" line.long 0x4 "SPI1_HWCFGR1,SPI/I2S hardware configuration register" hexmask.long.byte 0x4 24.--27. 1. "FULLCFG,SPI2S full feature version configuration" hexmask.long.byte 0x4 20.--23. 1. "TRGCFG,Autonomous trigger feature configuration" hexmask.long.byte 0x4 16.--19. 1. "DSCFG,SPI data size configuration" hexmask.long.byte 0x4 12.--15. 1. "I2SCFG,I2S configuration" hexmask.long.byte 0x4 8.--11. 1. "CRCCFG,CRC configuration for SPI" hexmask.long.byte 0x4 4.--7. 1. "RXFCFG,RxFIFO size" hexmask.long.byte 0x4 0.--3. 1. "TXFCFG,TxFIFO size" line.long 0x8 "SPI1_VERR,SPI/I2S version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,major version" hexmask.long.byte 0x8 0.--3. 1. "MINREV,minor version" line.long 0xC "SPI1_IPIDR,SPI/I2S identification register" hexmask.long 0xC 0.--31. 1. "ID,Identification" line.long 0x10 "SPI1_SIDR,SPI/I2S size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "SPI6" base ad:0x40350000 group.long 0x0++0x13 line.long 0x0 "SPI1_CR1,SPI/I2S control register 1" bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "B_0x0,B_0x1" bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "B_0x0,B_0x1" bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "B_0x0,B_0x1" bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1" bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1" bitfld.long 0x0 9. "CSTART,master transfer start" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPE,serial peripheral enable" "B_0x0,B_0x1" line.long 0x4 "SPI1_CR2,SPI/I2S control register 2" hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer" line.long 0x8 "SPI1_CFG1,SPI/I2S configuration register 1" bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "B_0x0,B_0x1" bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared" bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "B_0x0,B_0x1" hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level" newline hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame" line.long 0xC "SPI1_CFG2,SPI/I2S configuration register 2" bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "B_0x0,B_0x1" bitfld.long 0xC 30. "SSOM,SS output management in master mode" "B_0x0,B_0x1" bitfld.long 0xC 29. "SSOE,SS output enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 26. "SSM,software management of SS signal input" "B_0x0,B_0x1" bitfld.long 0xC 25. "CPOL,clock polarity" "B_0x0,B_0x1" bitfld.long 0xC 24. "CPHA,clock phase" "B_0x0,B_0x1" bitfld.long 0xC 23. "LSBFRST,data frame format" "B_0x0,B_0x1" newline bitfld.long 0xC 22. "MASTER,SPI master" "B_0x0,B_0x1" bitfld.long 0xC 19.--21. "SP,serial protocol" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "B_0x0,B_0x1" bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "B_0x0,B_0x1" hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness" hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness" line.long 0x10 "SPI1_IER,SPI/I2S interrupt enable register" bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "EOTIE,EOT SUSP and TXC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "SPI1_SR,SPI/I2S status register" hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session" bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "B_0x0,B_0x1" bitfld.long 0x0 11. "SUSP,suspension status" "B_0x0,B_0x1" bitfld.long 0x0 9. "MODF,mode fault" "B_0x0,B_0x1" bitfld.long 0x0 8. "TIFRE,TI frame format error" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCE,CRC error" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "OVR,overrun" "B_0x0,B_0x1" bitfld.long 0x0 5. "UDR,underrun" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXTF,transmission transfer filled" "B_0x0,B_0x1" bitfld.long 0x0 3. "EOT,end of transfer" "B_0x0,B_0x1" bitfld.long 0x0 2. "DXP,duplex packet" "B_0x0,B_0x1" bitfld.long 0x0 1. "TXP,Tx-packet space available" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXP,Rx-packet available" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "SPI1_IFCR,SPI/I2S interrupt/status flags clear register" bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1" bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1" bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1" bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1" bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1" bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1" bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1" bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1" group.long 0x1C++0x3 line.long 0x0 "SPI1_AUTOCR,SPI/I2S autonomous mode control register" bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)." wgroup.long 0x20++0x3 line.long 0x0 "SPI1_TXDR,SPI/I2S transmit data register" hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register" rgroup.long 0x30++0x3 line.long 0x0 "SPI1_RXDR,SPI/I2S receive data register" hexmask.long 0x0 0.--31. 1. "RXDR,receive data register" group.long 0x40++0x3 line.long 0x0 "SPI1_CRCPOLY,SPI/I2S polynomial register" hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x44++0x7 line.long 0x0 "SPI1_TXCRC,SPI/I2S transmitter CRC register" hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter" line.long 0x4 "SPI1_RXCRC,SPI/I2S receiver CRC register" hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver" group.long 0x4C++0x7 line.long 0x0 "SPI1_UDRDR,SPI/I2S underrun data register" hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition" line.long 0x4 "SPI1_I2SCFGR,SPI/I2S configuration register" bitfld.long 0x4 25. "MCKOE,master clock output enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ODD,odd factor for the prescaler" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "I2SDIV,Iless thansup>2less than/sup>S linear prescaler" bitfld.long 0x4 14. "DATFMT,data format" "B_0x0,B_0x1" bitfld.long 0x4 13. "WSINV,word select inversion" "B_0x0,B_0x1" bitfld.long 0x4 12. "FIXCH,fixed channel length in slave" "B_0x0,B_0x1" bitfld.long 0x4 11. "CKPOL,serial audio clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "CHLEN,channel length (number of bits per audio channel)" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--9. "DATLEN,data length to be transferred." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 7. "PCMSYNC,PCM frame synchronization" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "I2SSTD,Iless thansup>2less than/sup>S standard selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--3. "I2SCFG,I2S configuration mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 0. "I2SMOD,I2S mode selection" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "SPI1_HWCFGR2,SPI/I2S hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "OPBCFG,Number of option bits available" line.long 0x4 "SPI1_HWCFGR1,SPI/I2S hardware configuration register" hexmask.long.byte 0x4 24.--27. 1. "FULLCFG,SPI2S full feature version configuration" hexmask.long.byte 0x4 20.--23. 1. "TRGCFG,Autonomous trigger feature configuration" hexmask.long.byte 0x4 16.--19. 1. "DSCFG,SPI data size configuration" hexmask.long.byte 0x4 12.--15. 1. "I2SCFG,I2S configuration" hexmask.long.byte 0x4 8.--11. 1. "CRCCFG,CRC configuration for SPI" hexmask.long.byte 0x4 4.--7. 1. "RXFCFG,RxFIFO size" hexmask.long.byte 0x4 0.--3. 1. "TXFCFG,TxFIFO size" line.long 0x8 "SPI1_VERR,SPI/I2S version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,major version" hexmask.long.byte 0x8 0.--3. 1. "MINREV,minor version" line.long 0xC "SPI1_IPIDR,SPI/I2S identification register" hexmask.long 0xC 0.--31. 1. "ID,Identification" line.long 0x10 "SPI1_SIDR,SPI/I2S size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "SPI6_S" base ad:0x50350000 group.long 0x0++0x13 line.long 0x0 "SPI1_CR1,SPI/I2S control register 1" bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "B_0x0,B_0x1" bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "B_0x0,B_0x1" bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "B_0x0,B_0x1" bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1" bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1" bitfld.long 0x0 9. "CSTART,master transfer start" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPE,serial peripheral enable" "B_0x0,B_0x1" line.long 0x4 "SPI1_CR2,SPI/I2S control register 2" hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer" line.long 0x8 "SPI1_CFG1,SPI/I2S configuration register 1" bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "B_0x0,B_0x1" bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared" bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "B_0x0,B_0x1" hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level" newline hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame" line.long 0xC "SPI1_CFG2,SPI/I2S configuration register 2" bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "B_0x0,B_0x1" bitfld.long 0xC 30. "SSOM,SS output management in master mode" "B_0x0,B_0x1" bitfld.long 0xC 29. "SSOE,SS output enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 26. "SSM,software management of SS signal input" "B_0x0,B_0x1" bitfld.long 0xC 25. "CPOL,clock polarity" "B_0x0,B_0x1" bitfld.long 0xC 24. "CPHA,clock phase" "B_0x0,B_0x1" bitfld.long 0xC 23. "LSBFRST,data frame format" "B_0x0,B_0x1" newline bitfld.long 0xC 22. "MASTER,SPI master" "B_0x0,B_0x1" bitfld.long 0xC 19.--21. "SP,serial protocol" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "B_0x0,B_0x1" bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "B_0x0,B_0x1" hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness" hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness" line.long 0x10 "SPI1_IER,SPI/I2S interrupt enable register" bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "EOTIE,EOT SUSP and TXC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "SPI1_SR,SPI/I2S status register" hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session" bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "B_0x0,B_0x1" bitfld.long 0x0 11. "SUSP,suspension status" "B_0x0,B_0x1" bitfld.long 0x0 9. "MODF,mode fault" "B_0x0,B_0x1" bitfld.long 0x0 8. "TIFRE,TI frame format error" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCE,CRC error" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "OVR,overrun" "B_0x0,B_0x1" bitfld.long 0x0 5. "UDR,underrun" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXTF,transmission transfer filled" "B_0x0,B_0x1" bitfld.long 0x0 3. "EOT,end of transfer" "B_0x0,B_0x1" bitfld.long 0x0 2. "DXP,duplex packet" "B_0x0,B_0x1" bitfld.long 0x0 1. "TXP,Tx-packet space available" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXP,Rx-packet available" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "SPI1_IFCR,SPI/I2S interrupt/status flags clear register" bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1" bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1" bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1" bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1" bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1" bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1" bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1" bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1" group.long 0x1C++0x3 line.long 0x0 "SPI1_AUTOCR,SPI/I2S autonomous mode control register" bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)." wgroup.long 0x20++0x3 line.long 0x0 "SPI1_TXDR,SPI/I2S transmit data register" hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register" rgroup.long 0x30++0x3 line.long 0x0 "SPI1_RXDR,SPI/I2S receive data register" hexmask.long 0x0 0.--31. 1. "RXDR,receive data register" group.long 0x40++0x3 line.long 0x0 "SPI1_CRCPOLY,SPI/I2S polynomial register" hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x44++0x7 line.long 0x0 "SPI1_TXCRC,SPI/I2S transmitter CRC register" hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter" line.long 0x4 "SPI1_RXCRC,SPI/I2S receiver CRC register" hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver" group.long 0x4C++0x7 line.long 0x0 "SPI1_UDRDR,SPI/I2S underrun data register" hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition" line.long 0x4 "SPI1_I2SCFGR,SPI/I2S configuration register" bitfld.long 0x4 25. "MCKOE,master clock output enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ODD,odd factor for the prescaler" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "I2SDIV,Iless thansup>2less than/sup>S linear prescaler" bitfld.long 0x4 14. "DATFMT,data format" "B_0x0,B_0x1" bitfld.long 0x4 13. "WSINV,word select inversion" "B_0x0,B_0x1" bitfld.long 0x4 12. "FIXCH,fixed channel length in slave" "B_0x0,B_0x1" bitfld.long 0x4 11. "CKPOL,serial audio clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "CHLEN,channel length (number of bits per audio channel)" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--9. "DATLEN,data length to be transferred." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 7. "PCMSYNC,PCM frame synchronization" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "I2SSTD,Iless thansup>2less than/sup>S standard selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--3. "I2SCFG,I2S configuration mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 0. "I2SMOD,I2S mode selection" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "SPI1_HWCFGR2,SPI/I2S hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "OPBCFG,Number of option bits available" line.long 0x4 "SPI1_HWCFGR1,SPI/I2S hardware configuration register" hexmask.long.byte 0x4 24.--27. 1. "FULLCFG,SPI2S full feature version configuration" hexmask.long.byte 0x4 20.--23. 1. "TRGCFG,Autonomous trigger feature configuration" hexmask.long.byte 0x4 16.--19. 1. "DSCFG,SPI data size configuration" hexmask.long.byte 0x4 12.--15. 1. "I2SCFG,I2S configuration" hexmask.long.byte 0x4 8.--11. 1. "CRCCFG,CRC configuration for SPI" hexmask.long.byte 0x4 4.--7. 1. "RXFCFG,RxFIFO size" hexmask.long.byte 0x4 0.--3. 1. "TXFCFG,TxFIFO size" line.long 0x8 "SPI1_VERR,SPI/I2S version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,major version" hexmask.long.byte 0x8 0.--3. 1. "MINREV,minor version" line.long 0xC "SPI1_IPIDR,SPI/I2S identification register" hexmask.long 0xC 0.--31. 1. "ID,Identification" line.long 0x10 "SPI1_SIDR,SPI/I2S size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "SPI7" base ad:0x40360000 group.long 0x0++0x13 line.long 0x0 "SPI1_CR1,SPI/I2S control register 1" bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "B_0x0,B_0x1" bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "B_0x0,B_0x1" bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "B_0x0,B_0x1" bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1" bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1" bitfld.long 0x0 9. "CSTART,master transfer start" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPE,serial peripheral enable" "B_0x0,B_0x1" line.long 0x4 "SPI1_CR2,SPI/I2S control register 2" hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer" line.long 0x8 "SPI1_CFG1,SPI/I2S configuration register 1" bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "B_0x0,B_0x1" bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared" bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "B_0x0,B_0x1" hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level" newline hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame" line.long 0xC "SPI1_CFG2,SPI/I2S configuration register 2" bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "B_0x0,B_0x1" bitfld.long 0xC 30. "SSOM,SS output management in master mode" "B_0x0,B_0x1" bitfld.long 0xC 29. "SSOE,SS output enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 26. "SSM,software management of SS signal input" "B_0x0,B_0x1" bitfld.long 0xC 25. "CPOL,clock polarity" "B_0x0,B_0x1" bitfld.long 0xC 24. "CPHA,clock phase" "B_0x0,B_0x1" bitfld.long 0xC 23. "LSBFRST,data frame format" "B_0x0,B_0x1" newline bitfld.long 0xC 22. "MASTER,SPI master" "B_0x0,B_0x1" bitfld.long 0xC 19.--21. "SP,serial protocol" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "B_0x0,B_0x1" bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "B_0x0,B_0x1" hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness" hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness" line.long 0x10 "SPI1_IER,SPI/I2S interrupt enable register" bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "EOTIE,EOT SUSP and TXC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "SPI1_SR,SPI/I2S status register" hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session" bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "B_0x0,B_0x1" bitfld.long 0x0 11. "SUSP,suspension status" "B_0x0,B_0x1" bitfld.long 0x0 9. "MODF,mode fault" "B_0x0,B_0x1" bitfld.long 0x0 8. "TIFRE,TI frame format error" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCE,CRC error" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "OVR,overrun" "B_0x0,B_0x1" bitfld.long 0x0 5. "UDR,underrun" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXTF,transmission transfer filled" "B_0x0,B_0x1" bitfld.long 0x0 3. "EOT,end of transfer" "B_0x0,B_0x1" bitfld.long 0x0 2. "DXP,duplex packet" "B_0x0,B_0x1" bitfld.long 0x0 1. "TXP,Tx-packet space available" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXP,Rx-packet available" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "SPI1_IFCR,SPI/I2S interrupt/status flags clear register" bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1" bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1" bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1" bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1" bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1" bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1" bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1" bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1" group.long 0x1C++0x3 line.long 0x0 "SPI1_AUTOCR,SPI/I2S autonomous mode control register" bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)." wgroup.long 0x20++0x3 line.long 0x0 "SPI1_TXDR,SPI/I2S transmit data register" hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register" rgroup.long 0x30++0x3 line.long 0x0 "SPI1_RXDR,SPI/I2S receive data register" hexmask.long 0x0 0.--31. 1. "RXDR,receive data register" group.long 0x40++0x3 line.long 0x0 "SPI1_CRCPOLY,SPI/I2S polynomial register" hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x44++0x7 line.long 0x0 "SPI1_TXCRC,SPI/I2S transmitter CRC register" hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter" line.long 0x4 "SPI1_RXCRC,SPI/I2S receiver CRC register" hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver" group.long 0x4C++0x7 line.long 0x0 "SPI1_UDRDR,SPI/I2S underrun data register" hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition" line.long 0x4 "SPI1_I2SCFGR,SPI/I2S configuration register" bitfld.long 0x4 25. "MCKOE,master clock output enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ODD,odd factor for the prescaler" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "I2SDIV,Iless thansup>2less than/sup>S linear prescaler" bitfld.long 0x4 14. "DATFMT,data format" "B_0x0,B_0x1" bitfld.long 0x4 13. "WSINV,word select inversion" "B_0x0,B_0x1" bitfld.long 0x4 12. "FIXCH,fixed channel length in slave" "B_0x0,B_0x1" bitfld.long 0x4 11. "CKPOL,serial audio clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "CHLEN,channel length (number of bits per audio channel)" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--9. "DATLEN,data length to be transferred." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 7. "PCMSYNC,PCM frame synchronization" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "I2SSTD,Iless thansup>2less than/sup>S standard selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--3. "I2SCFG,I2S configuration mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 0. "I2SMOD,I2S mode selection" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "SPI1_HWCFGR2,SPI/I2S hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "OPBCFG,Number of option bits available" line.long 0x4 "SPI1_HWCFGR1,SPI/I2S hardware configuration register" hexmask.long.byte 0x4 24.--27. 1. "FULLCFG,SPI2S full feature version configuration" hexmask.long.byte 0x4 20.--23. 1. "TRGCFG,Autonomous trigger feature configuration" hexmask.long.byte 0x4 16.--19. 1. "DSCFG,SPI data size configuration" hexmask.long.byte 0x4 12.--15. 1. "I2SCFG,I2S configuration" hexmask.long.byte 0x4 8.--11. 1. "CRCCFG,CRC configuration for SPI" hexmask.long.byte 0x4 4.--7. 1. "RXFCFG,RxFIFO size" hexmask.long.byte 0x4 0.--3. 1. "TXFCFG,TxFIFO size" line.long 0x8 "SPI1_VERR,SPI/I2S version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,major version" hexmask.long.byte 0x8 0.--3. 1. "MINREV,minor version" line.long 0xC "SPI1_IPIDR,SPI/I2S identification register" hexmask.long 0xC 0.--31. 1. "ID,Identification" line.long 0x10 "SPI1_SIDR,SPI/I2S size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "SPI7_S" base ad:0x50360000 group.long 0x0++0x13 line.long 0x0 "SPI1_CR1,SPI/I2S control register 1" bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "B_0x0,B_0x1" bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "B_0x0,B_0x1" bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "B_0x0,B_0x1" bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1" bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1" bitfld.long 0x0 9. "CSTART,master transfer start" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPE,serial peripheral enable" "B_0x0,B_0x1" line.long 0x4 "SPI1_CR2,SPI/I2S control register 2" hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer" line.long 0x8 "SPI1_CFG1,SPI/I2S configuration register 1" bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "B_0x0,B_0x1" bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared" bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "B_0x0,B_0x1" hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level" newline hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame" line.long 0xC "SPI1_CFG2,SPI/I2S configuration register 2" bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "B_0x0,B_0x1" bitfld.long 0xC 30. "SSOM,SS output management in master mode" "B_0x0,B_0x1" bitfld.long 0xC 29. "SSOE,SS output enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 26. "SSM,software management of SS signal input" "B_0x0,B_0x1" bitfld.long 0xC 25. "CPOL,clock polarity" "B_0x0,B_0x1" bitfld.long 0xC 24. "CPHA,clock phase" "B_0x0,B_0x1" bitfld.long 0xC 23. "LSBFRST,data frame format" "B_0x0,B_0x1" newline bitfld.long 0xC 22. "MASTER,SPI master" "B_0x0,B_0x1" bitfld.long 0xC 19.--21. "SP,serial protocol" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "B_0x0,B_0x1" bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "B_0x0,B_0x1" hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness" hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness" line.long 0x10 "SPI1_IER,SPI/I2S interrupt enable register" bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "EOTIE,EOT SUSP and TXC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "SPI1_SR,SPI/I2S status register" hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session" bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "B_0x0,B_0x1" bitfld.long 0x0 11. "SUSP,suspension status" "B_0x0,B_0x1" bitfld.long 0x0 9. "MODF,mode fault" "B_0x0,B_0x1" bitfld.long 0x0 8. "TIFRE,TI frame format error" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCE,CRC error" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "OVR,overrun" "B_0x0,B_0x1" bitfld.long 0x0 5. "UDR,underrun" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXTF,transmission transfer filled" "B_0x0,B_0x1" bitfld.long 0x0 3. "EOT,end of transfer" "B_0x0,B_0x1" bitfld.long 0x0 2. "DXP,duplex packet" "B_0x0,B_0x1" bitfld.long 0x0 1. "TXP,Tx-packet space available" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXP,Rx-packet available" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "SPI1_IFCR,SPI/I2S interrupt/status flags clear register" bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1" bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1" bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1" bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1" bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1" bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1" bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1" bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1" group.long 0x1C++0x3 line.long 0x0 "SPI1_AUTOCR,SPI/I2S autonomous mode control register" bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)." wgroup.long 0x20++0x3 line.long 0x0 "SPI1_TXDR,SPI/I2S transmit data register" hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register" rgroup.long 0x30++0x3 line.long 0x0 "SPI1_RXDR,SPI/I2S receive data register" hexmask.long 0x0 0.--31. 1. "RXDR,receive data register" group.long 0x40++0x3 line.long 0x0 "SPI1_CRCPOLY,SPI/I2S polynomial register" hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x44++0x7 line.long 0x0 "SPI1_TXCRC,SPI/I2S transmitter CRC register" hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter" line.long 0x4 "SPI1_RXCRC,SPI/I2S receiver CRC register" hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver" group.long 0x4C++0x7 line.long 0x0 "SPI1_UDRDR,SPI/I2S underrun data register" hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition" line.long 0x4 "SPI1_I2SCFGR,SPI/I2S configuration register" bitfld.long 0x4 25. "MCKOE,master clock output enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ODD,odd factor for the prescaler" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "I2SDIV,Iless thansup>2less than/sup>S linear prescaler" bitfld.long 0x4 14. "DATFMT,data format" "B_0x0,B_0x1" bitfld.long 0x4 13. "WSINV,word select inversion" "B_0x0,B_0x1" bitfld.long 0x4 12. "FIXCH,fixed channel length in slave" "B_0x0,B_0x1" bitfld.long 0x4 11. "CKPOL,serial audio clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "CHLEN,channel length (number of bits per audio channel)" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--9. "DATLEN,data length to be transferred." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 7. "PCMSYNC,PCM frame synchronization" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "I2SSTD,Iless thansup>2less than/sup>S standard selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--3. "I2SCFG,I2S configuration mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 0. "I2SMOD,I2S mode selection" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "SPI1_HWCFGR2,SPI/I2S hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "OPBCFG,Number of option bits available" line.long 0x4 "SPI1_HWCFGR1,SPI/I2S hardware configuration register" hexmask.long.byte 0x4 24.--27. 1. "FULLCFG,SPI2S full feature version configuration" hexmask.long.byte 0x4 20.--23. 1. "TRGCFG,Autonomous trigger feature configuration" hexmask.long.byte 0x4 16.--19. 1. "DSCFG,SPI data size configuration" hexmask.long.byte 0x4 12.--15. 1. "I2SCFG,I2S configuration" hexmask.long.byte 0x4 8.--11. 1. "CRCCFG,CRC configuration for SPI" hexmask.long.byte 0x4 4.--7. 1. "RXFCFG,RxFIFO size" hexmask.long.byte 0x4 0.--3. 1. "TXFCFG,TxFIFO size" line.long 0x8 "SPI1_VERR,SPI/I2S version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,major version" hexmask.long.byte 0x8 0.--3. 1. "MINREV,minor version" line.long 0xC "SPI1_IPIDR,SPI/I2S identification register" hexmask.long 0xC 0.--31. 1. "ID,Identification" line.long 0x10 "SPI1_SIDR,SPI/I2S size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "SPI8" base ad:0x46020000 group.long 0x0++0x13 line.long 0x0 "SPI1_CR1,SPI/I2S control register 1" bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "B_0x0,B_0x1" bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "B_0x0,B_0x1" bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "B_0x0,B_0x1" bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1" bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1" bitfld.long 0x0 9. "CSTART,master transfer start" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPE,serial peripheral enable" "B_0x0,B_0x1" line.long 0x4 "SPI1_CR2,SPI/I2S control register 2" hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer" line.long 0x8 "SPI1_CFG1,SPI/I2S configuration register 1" bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "B_0x0,B_0x1" bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared" bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "B_0x0,B_0x1" hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level" newline hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame" line.long 0xC "SPI1_CFG2,SPI/I2S configuration register 2" bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "B_0x0,B_0x1" bitfld.long 0xC 30. "SSOM,SS output management in master mode" "B_0x0,B_0x1" bitfld.long 0xC 29. "SSOE,SS output enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 26. "SSM,software management of SS signal input" "B_0x0,B_0x1" bitfld.long 0xC 25. "CPOL,clock polarity" "B_0x0,B_0x1" bitfld.long 0xC 24. "CPHA,clock phase" "B_0x0,B_0x1" bitfld.long 0xC 23. "LSBFRST,data frame format" "B_0x0,B_0x1" newline bitfld.long 0xC 22. "MASTER,SPI master" "B_0x0,B_0x1" bitfld.long 0xC 19.--21. "SP,serial protocol" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "B_0x0,B_0x1" bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "B_0x0,B_0x1" hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness" hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness" line.long 0x10 "SPI1_IER,SPI/I2S interrupt enable register" bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "EOTIE,EOT SUSP and TXC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "SPI1_SR,SPI/I2S status register" hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session" bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "B_0x0,B_0x1" bitfld.long 0x0 11. "SUSP,suspension status" "B_0x0,B_0x1" bitfld.long 0x0 9. "MODF,mode fault" "B_0x0,B_0x1" bitfld.long 0x0 8. "TIFRE,TI frame format error" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCE,CRC error" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "OVR,overrun" "B_0x0,B_0x1" bitfld.long 0x0 5. "UDR,underrun" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXTF,transmission transfer filled" "B_0x0,B_0x1" bitfld.long 0x0 3. "EOT,end of transfer" "B_0x0,B_0x1" bitfld.long 0x0 2. "DXP,duplex packet" "B_0x0,B_0x1" bitfld.long 0x0 1. "TXP,Tx-packet space available" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXP,Rx-packet available" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "SPI1_IFCR,SPI/I2S interrupt/status flags clear register" bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1" bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1" bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1" bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1" bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1" bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1" bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1" bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1" group.long 0x1C++0x3 line.long 0x0 "SPI1_AUTOCR,SPI/I2S autonomous mode control register" bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)." wgroup.long 0x20++0x3 line.long 0x0 "SPI1_TXDR,SPI/I2S transmit data register" hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register" rgroup.long 0x30++0x3 line.long 0x0 "SPI1_RXDR,SPI/I2S receive data register" hexmask.long 0x0 0.--31. 1. "RXDR,receive data register" group.long 0x40++0x3 line.long 0x0 "SPI1_CRCPOLY,SPI/I2S polynomial register" hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x44++0x7 line.long 0x0 "SPI1_TXCRC,SPI/I2S transmitter CRC register" hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter" line.long 0x4 "SPI1_RXCRC,SPI/I2S receiver CRC register" hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver" group.long 0x4C++0x7 line.long 0x0 "SPI1_UDRDR,SPI/I2S underrun data register" hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition" line.long 0x4 "SPI1_I2SCFGR,SPI/I2S configuration register" bitfld.long 0x4 25. "MCKOE,master clock output enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ODD,odd factor for the prescaler" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "I2SDIV,Iless thansup>2less than/sup>S linear prescaler" bitfld.long 0x4 14. "DATFMT,data format" "B_0x0,B_0x1" bitfld.long 0x4 13. "WSINV,word select inversion" "B_0x0,B_0x1" bitfld.long 0x4 12. "FIXCH,fixed channel length in slave" "B_0x0,B_0x1" bitfld.long 0x4 11. "CKPOL,serial audio clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "CHLEN,channel length (number of bits per audio channel)" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--9. "DATLEN,data length to be transferred." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 7. "PCMSYNC,PCM frame synchronization" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "I2SSTD,Iless thansup>2less than/sup>S standard selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--3. "I2SCFG,I2S configuration mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 0. "I2SMOD,I2S mode selection" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "SPI1_HWCFGR2,SPI/I2S hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "OPBCFG,Number of option bits available" line.long 0x4 "SPI1_HWCFGR1,SPI/I2S hardware configuration register" hexmask.long.byte 0x4 24.--27. 1. "FULLCFG,SPI2S full feature version configuration" hexmask.long.byte 0x4 20.--23. 1. "TRGCFG,Autonomous trigger feature configuration" hexmask.long.byte 0x4 16.--19. 1. "DSCFG,SPI data size configuration" hexmask.long.byte 0x4 12.--15. 1. "I2SCFG,I2S configuration" hexmask.long.byte 0x4 8.--11. 1. "CRCCFG,CRC configuration for SPI" hexmask.long.byte 0x4 4.--7. 1. "RXFCFG,RxFIFO size" hexmask.long.byte 0x4 0.--3. 1. "TXFCFG,TxFIFO size" line.long 0x8 "SPI1_VERR,SPI/I2S version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,major version" hexmask.long.byte 0x8 0.--3. 1. "MINREV,minor version" line.long 0xC "SPI1_IPIDR,SPI/I2S identification register" hexmask.long 0xC 0.--31. 1. "ID,Identification" line.long 0x10 "SPI1_SIDR,SPI/I2S size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "SPI8_S" base ad:0x56020000 group.long 0x0++0x13 line.long 0x0 "SPI1_CR1,SPI/I2S control register 1" bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "B_0x0,B_0x1" bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "B_0x0,B_0x1" bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "B_0x0,B_0x1" bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1" bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1" bitfld.long 0x0 9. "CSTART,master transfer start" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPE,serial peripheral enable" "B_0x0,B_0x1" line.long 0x4 "SPI1_CR2,SPI/I2S control register 2" hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer" line.long 0x8 "SPI1_CFG1,SPI/I2S configuration register 1" bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "B_0x0,B_0x1" bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared" bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "B_0x0,B_0x1" hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level" newline hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame" line.long 0xC "SPI1_CFG2,SPI/I2S configuration register 2" bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "B_0x0,B_0x1" bitfld.long 0xC 30. "SSOM,SS output management in master mode" "B_0x0,B_0x1" bitfld.long 0xC 29. "SSOE,SS output enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 26. "SSM,software management of SS signal input" "B_0x0,B_0x1" bitfld.long 0xC 25. "CPOL,clock polarity" "B_0x0,B_0x1" bitfld.long 0xC 24. "CPHA,clock phase" "B_0x0,B_0x1" bitfld.long 0xC 23. "LSBFRST,data frame format" "B_0x0,B_0x1" newline bitfld.long 0xC 22. "MASTER,SPI master" "B_0x0,B_0x1" bitfld.long 0xC 19.--21. "SP,serial protocol" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "B_0x0,B_0x1" bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "B_0x0,B_0x1" hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness" hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness" line.long 0x10 "SPI1_IER,SPI/I2S interrupt enable register" bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "EOTIE,EOT SUSP and TXC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "SPI1_SR,SPI/I2S status register" hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session" bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "B_0x0,B_0x1" bitfld.long 0x0 11. "SUSP,suspension status" "B_0x0,B_0x1" bitfld.long 0x0 9. "MODF,mode fault" "B_0x0,B_0x1" bitfld.long 0x0 8. "TIFRE,TI frame format error" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCE,CRC error" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "OVR,overrun" "B_0x0,B_0x1" bitfld.long 0x0 5. "UDR,underrun" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXTF,transmission transfer filled" "B_0x0,B_0x1" bitfld.long 0x0 3. "EOT,end of transfer" "B_0x0,B_0x1" bitfld.long 0x0 2. "DXP,duplex packet" "B_0x0,B_0x1" bitfld.long 0x0 1. "TXP,Tx-packet space available" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXP,Rx-packet available" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "SPI1_IFCR,SPI/I2S interrupt/status flags clear register" bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1" bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1" bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1" bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1" bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1" bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1" bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1" bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1" group.long 0x1C++0x3 line.long 0x0 "SPI1_AUTOCR,SPI/I2S autonomous mode control register" bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)." wgroup.long 0x20++0x3 line.long 0x0 "SPI1_TXDR,SPI/I2S transmit data register" hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register" rgroup.long 0x30++0x3 line.long 0x0 "SPI1_RXDR,SPI/I2S receive data register" hexmask.long 0x0 0.--31. 1. "RXDR,receive data register" group.long 0x40++0x3 line.long 0x0 "SPI1_CRCPOLY,SPI/I2S polynomial register" hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x44++0x7 line.long 0x0 "SPI1_TXCRC,SPI/I2S transmitter CRC register" hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter" line.long 0x4 "SPI1_RXCRC,SPI/I2S receiver CRC register" hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver" group.long 0x4C++0x7 line.long 0x0 "SPI1_UDRDR,SPI/I2S underrun data register" hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition" line.long 0x4 "SPI1_I2SCFGR,SPI/I2S configuration register" bitfld.long 0x4 25. "MCKOE,master clock output enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ODD,odd factor for the prescaler" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "I2SDIV,Iless thansup>2less than/sup>S linear prescaler" bitfld.long 0x4 14. "DATFMT,data format" "B_0x0,B_0x1" bitfld.long 0x4 13. "WSINV,word select inversion" "B_0x0,B_0x1" bitfld.long 0x4 12. "FIXCH,fixed channel length in slave" "B_0x0,B_0x1" bitfld.long 0x4 11. "CKPOL,serial audio clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "CHLEN,channel length (number of bits per audio channel)" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--9. "DATLEN,data length to be transferred." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 7. "PCMSYNC,PCM frame synchronization" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "I2SSTD,Iless thansup>2less than/sup>S standard selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--3. "I2SCFG,I2S configuration mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 0. "I2SMOD,I2S mode selection" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "SPI1_HWCFGR2,SPI/I2S hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "OPBCFG,Number of option bits available" line.long 0x4 "SPI1_HWCFGR1,SPI/I2S hardware configuration register" hexmask.long.byte 0x4 24.--27. 1. "FULLCFG,SPI2S full feature version configuration" hexmask.long.byte 0x4 20.--23. 1. "TRGCFG,Autonomous trigger feature configuration" hexmask.long.byte 0x4 16.--19. 1. "DSCFG,SPI data size configuration" hexmask.long.byte 0x4 12.--15. 1. "I2SCFG,I2S configuration" hexmask.long.byte 0x4 8.--11. 1. "CRCCFG,CRC configuration for SPI" hexmask.long.byte 0x4 4.--7. 1. "RXFCFG,RxFIFO size" hexmask.long.byte 0x4 0.--3. 1. "TXFCFG,TxFIFO size" line.long 0x8 "SPI1_VERR,SPI/I2S version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,major version" hexmask.long.byte 0x8 0.--3. 1. "MINREV,minor version" line.long 0xC "SPI1_IPIDR,SPI/I2S identification register" hexmask.long 0xC 0.--31. 1. "ID,Identification" line.long 0x10 "SPI1_SIDR,SPI/I2S size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif sif (cpuis("*CM0+")) tree "SPI8" base ad:0x46020000 group.long 0x0++0x13 line.long 0x0 "SPI8_CR1,SPI/I2S control register 1" bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "B_0x0,B_0x1" bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "B_0x0,B_0x1" bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "B_0x0,B_0x1" bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "B_0x0,B_0x1" bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1" bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1" bitfld.long 0x0 9. "CSTART,master transfer start" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "SPE,serial peripheral enable" "B_0x0,B_0x1" line.long 0x4 "SPI8_CR2,SPI/I2S control register 2" hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer" line.long 0x8 "SPI8_CFG1,SPI/I2S configuration register 1" bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "B_0x0,B_0x1" bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared" bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "B_0x0,B_0x1" hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level" newline hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame" line.long 0xC "SPI8_CFG2,SPI/I2S configuration register 2" bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "B_0x0,B_0x1" bitfld.long 0xC 30. "SSOM,SS output management in master mode" "B_0x0,B_0x1" bitfld.long 0xC 29. "SSOE,SS output enable" "B_0x0,B_0x1" bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 26. "SSM,software management of SS signal input" "B_0x0,B_0x1" bitfld.long 0xC 25. "CPOL,clock polarity" "B_0x0,B_0x1" bitfld.long 0xC 24. "CPHA,clock phase" "B_0x0,B_0x1" bitfld.long 0xC 23. "LSBFRST,data frame format" "B_0x0,B_0x1" newline bitfld.long 0xC 22. "MASTER,SPI master" "B_0x0,B_0x1" bitfld.long 0xC 19.--21. "SP,serial protocol" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "B_0x0,B_0x1" bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "B_0x0,B_0x1" bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "B_0x0,B_0x1" hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness" hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness" line.long 0x10 "SPI8_IER,SPI/I2S interrupt enable register" bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 3. "EOTIE,EOT SUSP and TXC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "SPI8_SR,SPI/I2S status register" hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session" bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "B_0x0,B_0x1" bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "B_0x0,B_0x1" bitfld.long 0x0 11. "SUSP,suspension status" "B_0x0,B_0x1" bitfld.long 0x0 9. "MODF,mode fault" "B_0x0,B_0x1" bitfld.long 0x0 8. "TIFRE,TI frame format error" "B_0x0,B_0x1" bitfld.long 0x0 7. "CRCE,CRC error" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "OVR,overrun" "B_0x0,B_0x1" bitfld.long 0x0 5. "UDR,underrun" "B_0x0,B_0x1" bitfld.long 0x0 4. "TXTF,transmission transfer filled" "B_0x0,B_0x1" bitfld.long 0x0 3. "EOT,end of transfer" "B_0x0,B_0x1" bitfld.long 0x0 2. "DXP,duplex packet" "B_0x0,B_0x1" bitfld.long 0x0 1. "TXP,Tx-packet space available" "B_0x0,B_0x1" bitfld.long 0x0 0. "RXP,Rx-packet available" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "SPI8_IFCR,SPI/I2S interrupt/status flags clear register" bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1" bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1" bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1" bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1" bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1" bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1" bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1" bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1" group.long 0x1C++0x3 line.long 0x0 "SPI8_AUTOCR,SPI/I2S autonomous mode control register" bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)." wgroup.long 0x20++0x3 line.long 0x0 "SPI8_TXDR,SPI/I2S transmit data register" hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register" rgroup.long 0x30++0x3 line.long 0x0 "SPI8_RXDR,SPI/I2S receive data register" hexmask.long 0x0 0.--31. 1. "RXDR,receive data register" group.long 0x40++0x3 line.long 0x0 "SPI8_CRCPOLY,SPI/I2S polynomial register" hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x44++0x7 line.long 0x0 "SPI8_TXCRC,SPI/I2S transmitter CRC register" hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter" line.long 0x4 "SPI8_RXCRC,SPI/I2S receiver CRC register" hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver" group.long 0x4C++0x7 line.long 0x0 "SPI8_UDRDR,SPI/I2S underrun data register" hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition" line.long 0x4 "SPI8_I2SCFGR,SPI/I2S configuration register" bitfld.long 0x4 25. "MCKOE,master clock output enable" "B_0x0,B_0x1" bitfld.long 0x4 24. "ODD,odd factor for the prescaler" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "I2SDIV,Iless thansup>2less than/sup>S linear prescaler" bitfld.long 0x4 14. "DATFMT,data format" "B_0x0,B_0x1" bitfld.long 0x4 13. "WSINV,word select inversion" "B_0x0,B_0x1" bitfld.long 0x4 12. "FIXCH,fixed channel length in slave" "B_0x0,B_0x1" bitfld.long 0x4 11. "CKPOL,serial audio clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "CHLEN,channel length (number of bits per audio channel)" "B_0x0,B_0x1" newline bitfld.long 0x4 8.--9. "DATLEN,data length to be transferred." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 7. "PCMSYNC,PCM frame synchronization" "B_0x0,B_0x1" bitfld.long 0x4 4.--5. "I2SSTD,Iless thansup>2less than/sup>S standard selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 1.--3. "I2SCFG,I2S configuration mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x4 0. "I2SMOD,I2S mode selection" "B_0x0,B_0x1" rgroup.long 0x3EC++0x13 line.long 0x0 "SPI8_HWCFGR2,SPI/I2S hardware configuration register" hexmask.long.byte 0x0 0.--7. 1. "OPBCFG,Number of option bits available" line.long 0x4 "SPI8_HWCFGR1,SPI/I2S hardware configuration register" hexmask.long.byte 0x4 24.--27. 1. "FULLCFG,SPI2S full feature version configuration" hexmask.long.byte 0x4 20.--23. 1. "TRGCFG,Autonomous trigger feature configuration" hexmask.long.byte 0x4 16.--19. 1. "DSCFG,SPI data size configuration" hexmask.long.byte 0x4 12.--15. 1. "I2SCFG,I2S configuration" hexmask.long.byte 0x4 8.--11. 1. "CRCCFG,CRC configuration for SPI" hexmask.long.byte 0x4 4.--7. 1. "RXFCFG,RxFIFO size" hexmask.long.byte 0x4 0.--3. 1. "TXFCFG,TxFIFO size" line.long 0x8 "SPI8_VERR,SPI/I2S version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,major version" hexmask.long.byte 0x8 0.--3. 1. "MINREV,minor version" line.long 0xC "SPI8_IPIDR,SPI/I2S identification register" hexmask.long 0xC 0.--31. 1. "ID,Identification" line.long 0x10 "SPI8_SIDR,SPI/I2S size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end endif tree.end sif (cpuis("*CA35")||cpuis("*CM33F")) tree "STGEN (System Timer Generator)" base ad:0x0 tree "STGENC (STGEN APB Read/Write)" tree "STGENC" base ad:0x48080000 group.long 0x0++0x3 line.long 0x0 "STGENC_CNTCR,STGENC control register" bitfld.long 0x0 1. "HLTDBG,Halt on debug" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" rgroup.long 0x4++0x3 line.long 0x0 "STGENC_CNTSR,STGENC status register" bitfld.long 0x0 1. "DBGH,Debug halted" "B_0x0,B_0x1" group.long 0x8++0x7 line.long 0x0 "STGENC_CNTCVL,STGENC value lower register" hexmask.long 0x0 0.--31. 1. "CNTCVL_L_32,Current value of the timestamp counter lower 32 bits" line.long 0x4 "STGENC_CNTCVU,STGENC value upper register" hexmask.long 0x4 0.--31. 1. "CNTCVU_U_32,Current value of the timestamp counter upper 32 bits" group.long 0x20++0x3 line.long 0x0 "STGENC_CNTFID0,STGENC base frequency register" hexmask.long 0x0 0.--31. 1. "FREQ,Frequency in number of ticks per second" rgroup.long 0xFD0++0x2F line.long 0x0 "STGENC_PIDR4,STGENC peripheral ID4 register" hexmask.long.byte 0x0 4.--7. 1. "SIZE,Always 0b0000" hexmask.long.byte 0x0 0.--3. 1. "DES_2,Part of designer identification" line.long 0x4 "STGENC_PIDR5,STGENC peripheral ID5 register" hexmask.long 0x4 0.--31. 1. "PIDR5,Peripheral ID5" line.long 0x8 "STGENC_PIDR6,STGENC peripheral ID6 register" hexmask.long 0x8 0.--31. 1. "PIDR6,Peripheral ID6" line.long 0xC "STGENC_PIDR7,STGENC peripheral ID7 register" hexmask.long 0xC 0.--31. 1. "PIDR7,Peripheral ID7" line.long 0x10 "STGENC_PIDR0,STGENC peripheral ID0 register" hexmask.long.byte 0x10 0.--7. 1. "PART_0,Bits[7:0] of the 12-bit part number of the component" line.long 0x14 "STGENC_PIDR1,STGENC peripheral ID1 register" hexmask.long.byte 0x14 4.--7. 1. "DES_0,Part of designer identification" hexmask.long.byte 0x14 0.--3. 1. "PART_1,Bits[11:8] of the 12-bit part number of the component" line.long 0x18 "STGENC_PIDR2,STGENC peripheral ID2 register" hexmask.long.byte 0x18 4.--7. 1. "REVISION,device revision number" bitfld.long 0x18 3. "JEDEC,always 1" "0,1" bitfld.long 0x18 0.--2. "DES_1,part of designer identification" "0,1,2,3,4,5,6,7" line.long 0x1C "STGENC_PIDR3,STGENC peripheral ID3 register" hexmask.long.byte 0x1C 4.--7. 1. "REVAND,Customer version" hexmask.long.byte 0x1C 0.--3. 1. "CMOD,Customer modified" line.long 0x20 "STGENC_CIDR0,STGENC component ID0 register" hexmask.long.byte 0x20 0.--7. 1. "PRMBL_0,Preamble 0" line.long 0x24 "STGENC_CIDR1,STGENC component ID1 register" hexmask.long.byte 0x24 4.--7. 1. "CLASS,Class of the component" hexmask.long.byte 0x24 0.--3. 1. "PRMBL_1,preamble 1" line.long 0x28 "STGENC_CIDR2,STGENC component ID2 register" hexmask.long.byte 0x28 0.--7. 1. "PRMBL_2,Preamble 2" line.long 0x2C "STGENC_CIDR3,STGENC component ID3 register" hexmask.long.byte 0x2C 0.--7. 1. "PRMBL_3,Preamble 3" tree.end tree "STGENC_S" base ad:0x58080000 group.long 0x0++0x3 line.long 0x0 "STGENC_CNTCR,STGENC control register" bitfld.long 0x0 1. "HLTDBG,Halt on debug" "B_0x0,B_0x1" bitfld.long 0x0 0. "EN,Enable" "B_0x0,B_0x1" rgroup.long 0x4++0x3 line.long 0x0 "STGENC_CNTSR,STGENC status register" bitfld.long 0x0 1. "DBGH,Debug halted" "B_0x0,B_0x1" group.long 0x8++0x7 line.long 0x0 "STGENC_CNTCVL,STGENC value lower register" hexmask.long 0x0 0.--31. 1. "CNTCVL_L_32,Current value of the timestamp counter lower 32 bits" line.long 0x4 "STGENC_CNTCVU,STGENC value upper register" hexmask.long 0x4 0.--31. 1. "CNTCVU_U_32,Current value of the timestamp counter upper 32 bits" group.long 0x20++0x3 line.long 0x0 "STGENC_CNTFID0,STGENC base frequency register" hexmask.long 0x0 0.--31. 1. "FREQ,Frequency in number of ticks per second" rgroup.long 0xFD0++0x2F line.long 0x0 "STGENC_PIDR4,STGENC peripheral ID4 register" hexmask.long.byte 0x0 4.--7. 1. "SIZE,Always 0b0000" hexmask.long.byte 0x0 0.--3. 1. "DES_2,Part of designer identification" line.long 0x4 "STGENC_PIDR5,STGENC peripheral ID5 register" hexmask.long 0x4 0.--31. 1. "PIDR5,Peripheral ID5" line.long 0x8 "STGENC_PIDR6,STGENC peripheral ID6 register" hexmask.long 0x8 0.--31. 1. "PIDR6,Peripheral ID6" line.long 0xC "STGENC_PIDR7,STGENC peripheral ID7 register" hexmask.long 0xC 0.--31. 1. "PIDR7,Peripheral ID7" line.long 0x10 "STGENC_PIDR0,STGENC peripheral ID0 register" hexmask.long.byte 0x10 0.--7. 1. "PART_0,Bits[7:0] of the 12-bit part number of the component" line.long 0x14 "STGENC_PIDR1,STGENC peripheral ID1 register" hexmask.long.byte 0x14 4.--7. 1. "DES_0,Part of designer identification" hexmask.long.byte 0x14 0.--3. 1. "PART_1,Bits[11:8] of the 12-bit part number of the component" line.long 0x18 "STGENC_PIDR2,STGENC peripheral ID2 register" hexmask.long.byte 0x18 4.--7. 1. "REVISION,device revision number" bitfld.long 0x18 3. "JEDEC,always 1" "0,1" bitfld.long 0x18 0.--2. "DES_1,part of designer identification" "0,1,2,3,4,5,6,7" line.long 0x1C "STGENC_PIDR3,STGENC peripheral ID3 register" hexmask.long.byte 0x1C 4.--7. 1. "REVAND,Customer version" hexmask.long.byte 0x1C 0.--3. 1. "CMOD,Customer modified" line.long 0x20 "STGENC_CIDR0,STGENC component ID0 register" hexmask.long.byte 0x20 0.--7. 1. "PRMBL_0,Preamble 0" line.long 0x24 "STGENC_CIDR1,STGENC component ID1 register" hexmask.long.byte 0x24 4.--7. 1. "CLASS,Class of the component" hexmask.long.byte 0x24 0.--3. 1. "PRMBL_1,preamble 1" line.long 0x28 "STGENC_CIDR2,STGENC component ID2 register" hexmask.long.byte 0x28 0.--7. 1. "PRMBL_2,Preamble 2" line.long 0x2C "STGENC_CIDR3,STGENC component ID3 register" hexmask.long.byte 0x2C 0.--7. 1. "PRMBL_3,Preamble 3" tree.end tree.end tree "STGENR (STGEN APB Read Only)" tree "STGENR" base ad:0x58070000 rgroup.long 0x0++0x7 line.long 0x0 "STGENR_CNTCVL,STGENR value lower register" hexmask.long 0x0 0.--31. 1. "CNTCVL_L_32,current value of the timestamp counter (the lower 32 bits)" line.long 0x4 "STGENR_CNTCVU,STGENR value upper register" hexmask.long 0x4 0.--31. 1. "CNTCVU_U_32,current value of the timestamp counter (the upper 32 bits)" rgroup.long 0xFD0++0xF line.long 0x0 "STGENR_PIDR4,STGENR peripheral ID4 register" hexmask.long.byte 0x0 4.--7. 1. "SIZE,always 0b0000" hexmask.long.byte 0x0 0.--3. 1. "DES_2,part of designer identification" line.long 0x4 "STGENR_PIDR5,STGENR peripheral ID5 register" hexmask.long 0x4 0.--31. 1. "PIDR5,peripheral ID5" line.long 0x8 "STGENR_PIDR6,STGENR peripheral ID6 register" hexmask.long 0x8 0.--31. 1. "PIDR6,peripheral ID6" line.long 0xC "STGENR_PIDR7,STGENR peripheral ID7 register" hexmask.long 0xC 0.--31. 1. "PIDR7,peripheral ID7" rgroup.long 0x7FE0++0x1F line.long 0x0 "STGENR_PIDR0,STGENR peripheral ID0 register" hexmask.long.byte 0x0 0.--7. 1. "PART_0,bits[7:0] of the 12-bit part number of the component." line.long 0x4 "STGENR_PIDR1,STGENR peripheral ID1 register" hexmask.long.byte 0x4 4.--7. 1. "DES_0,part of designer identification" hexmask.long.byte 0x4 0.--3. 1. "PART_1,Bits[11:8] of the 12-bit part number of the component" line.long 0x8 "STGENR_PIDR2,STGENR peripheral ID2 register" hexmask.long.byte 0x8 4.--7. 1. "REVISION,device revision number" bitfld.long 0x8 3. "JEDEC,always 1" "0,1" bitfld.long 0x8 0.--2. "DES_1,part of designer identification" "0,1,2,3,4,5,6,7" line.long 0xC "STGENR_PIDR3,STGENR peripheral ID3 register" hexmask.long.byte 0xC 4.--7. 1. "REVAND,errata fix identification" hexmask.long.byte 0xC 0.--3. 1. "CMOD,customer modified" line.long 0x10 "STGENR_CIDR0,STGENR component ID0 register" hexmask.long.byte 0x10 0.--7. 1. "PRMBL_0,preamble 0" line.long 0x14 "STGENR_CIDR1,STGENR component ID1 register" hexmask.long.byte 0x14 4.--7. 1. "CLASS,class of the component" hexmask.long.byte 0x14 0.--3. 1. "PRMBL_1,preamble 1" line.long 0x18 "STGENR_CIDR2,STGENR component ID2 register" hexmask.long.byte 0x18 0.--7. 1. "PRMBL_2,preamble 2" line.long 0x1C "STGENR_CIDR3,STGENR component ID3 register" hexmask.long.byte 0x1C 0.--7. 1. "PRMBL_3,preamble 3" tree.end tree "STGENR_S" base ad:0x48070000 rgroup.long 0x0++0x7 line.long 0x0 "STGENR_CNTCVL,STGENR value lower register" hexmask.long 0x0 0.--31. 1. "CNTCVL_L_32,current value of the timestamp counter (the lower 32 bits)" line.long 0x4 "STGENR_CNTCVU,STGENR value upper register" hexmask.long 0x4 0.--31. 1. "CNTCVU_U_32,current value of the timestamp counter (the upper 32 bits)" rgroup.long 0xFD0++0xF line.long 0x0 "STGENR_PIDR4,STGENR peripheral ID4 register" hexmask.long.byte 0x0 4.--7. 1. "SIZE,always 0b0000" hexmask.long.byte 0x0 0.--3. 1. "DES_2,part of designer identification" line.long 0x4 "STGENR_PIDR5,STGENR peripheral ID5 register" hexmask.long 0x4 0.--31. 1. "PIDR5,peripheral ID5" line.long 0x8 "STGENR_PIDR6,STGENR peripheral ID6 register" hexmask.long 0x8 0.--31. 1. "PIDR6,peripheral ID6" line.long 0xC "STGENR_PIDR7,STGENR peripheral ID7 register" hexmask.long 0xC 0.--31. 1. "PIDR7,peripheral ID7" rgroup.long 0x7FE0++0x1F line.long 0x0 "STGENR_PIDR0,STGENR peripheral ID0 register" hexmask.long.byte 0x0 0.--7. 1. "PART_0,bits[7:0] of the 12-bit part number of the component." line.long 0x4 "STGENR_PIDR1,STGENR peripheral ID1 register" hexmask.long.byte 0x4 4.--7. 1. "DES_0,part of designer identification" hexmask.long.byte 0x4 0.--3. 1. "PART_1,Bits[11:8] of the 12-bit part number of the component" line.long 0x8 "STGENR_PIDR2,STGENR peripheral ID2 register" hexmask.long.byte 0x8 4.--7. 1. "REVISION,device revision number" bitfld.long 0x8 3. "JEDEC,always 1" "0,1" bitfld.long 0x8 0.--2. "DES_1,part of designer identification" "0,1,2,3,4,5,6,7" line.long 0xC "STGENR_PIDR3,STGENR peripheral ID3 register" hexmask.long.byte 0xC 4.--7. 1. "REVAND,errata fix identification" hexmask.long.byte 0xC 0.--3. 1. "CMOD,customer modified" line.long 0x10 "STGENR_CIDR0,STGENR component ID0 register" hexmask.long.byte 0x10 0.--7. 1. "PRMBL_0,preamble 0" line.long 0x14 "STGENR_CIDR1,STGENR component ID1 register" hexmask.long.byte 0x14 4.--7. 1. "CLASS,class of the component" hexmask.long.byte 0x14 0.--3. 1. "PRMBL_1,preamble 1" line.long 0x18 "STGENR_CIDR2,STGENR component ID2 register" hexmask.long.byte 0x18 0.--7. 1. "PRMBL_2,preamble 2" line.long 0x1C "STGENR_CIDR3,STGENR component ID3 register" hexmask.long.byte 0x1C 0.--7. 1. "PRMBL_3,preamble 3" tree.end tree.end tree.end tree "SYSCFG (System Configuration Controller)" base ad:0x0 tree "SYSCFG" base ad:0x44230000 rgroup.long 0x0++0x3 line.long 0x0 "SYSCFG_BOOTSR,SYSCFG boot pin status register" bitfld.long 0x0 3. "BOOT3,BOOT3 pin value" "low,high" bitfld.long 0x0 2. "BOOT2,BOOT2 pin value" "low,high" newline bitfld.long 0x0 1. "BOOT1,BOOT1 pin value" "low,high" bitfld.long 0x0 0. "BOOT0,BOOT0 pin value" "low,high" group.long 0x4++0x3 line.long 0x0 "SYSCFG_BOOTCR,SYSCFG boot pin control register" bitfld.long 0x0 3. "BOOT3_PD,BOOT3 pin pull-down disable" "enabled,disabled" bitfld.long 0x0 2. "BOOT2_PD,BOOT2 pin pull-down disable" "enabled,disabled" newline bitfld.long 0x0 1. "BOOT1_PD,BOOT1 pin pull-down disable" "enabled,disabled" bitfld.long 0x0 0. "BOOT0_PD,BOOT0 pin pull-down disable" "enabled,disabled" group.long 0x400++0x3 line.long 0x0 "SYSCFG_DLYBSD1CR,SYSCFG DLYBSD1 control register" bitfld.long 0x0 22. "ANTIGLITCH_EN,None" "?,B_0x1" hexmask.long.byte 0x0 17.--21. 1. "BYP_CMD,Delay unit when in DLL bypass mode" newline bitfld.long 0x0 16. "BYP_EN,DLL bypass mode enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 1.--6. 1. "RX_TAP_SEL,TAP number for RX clock selection" newline bitfld.long 0x0 0. "EN,When 1 the DLL is enabled when configured in lock mode (BYP_EN = 0)." "0,1" rgroup.long 0x404++0x3 line.long 0x0 "SYSCFG_DLYBSD1SR,SYSCFG DLYBSD1 status register" bitfld.long 0x0 1. "RX_TAP_SEL_ACK,None" "?,B_0x1" bitfld.long 0x0 0. "LOCK,None" "?,B_0x1" group.long 0x408++0x3 line.long 0x0 "SYSCFG_SDMMC1CR,SYSCFG SDMMC1 control register" bitfld.long 0x0 0. "SDMMC1_VSEL,Voltage selection" "B_0x0,B_0x1" group.long 0x800++0x3 line.long 0x0 "SYSCFG_DLYBSD2CR,SYSCFG DLYBSD2 control register" bitfld.long 0x0 22. "ANTIGLITCH_EN,Anti-glitch logic enable" "?,B_0x1" hexmask.long.byte 0x0 17.--21. 1. "BYP_CMD,Delay unit when in DLL bypass mode" newline bitfld.long 0x0 16. "BYP_EN,DLL bypass mode enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 1.--6. 1. "RX_TAP_SEL,TAP delay for RX clock selection" newline bitfld.long 0x0 0. "EN,None" "?,B_0x1" rgroup.long 0x804++0x3 line.long 0x0 "SYSCFG_DLYBSD2SR,SYSCFG DLYBSD2 status register" bitfld.long 0x0 1. "RX_TAP_SEL_ACK,None" "?,B_0x1" bitfld.long 0x0 0. "LOCK,None" "?,B_0x1" group.long 0x808++0x3 line.long 0x0 "SYSCFG_SDMMC2CR,SYSCFG SDMMC2 control register" bitfld.long 0x0 0. "SDMMC2_VSEL,Voltage selection" "B_0x0,B_0x1" group.long 0xC00++0x3 line.long 0x0 "SYSCFG_DLYBSD3CR,SYSCFG DLYBSD3 control register" bitfld.long 0x0 22. "ANTIGLITCH_EN,Anti-glitch logic enable" "?,B_0x1" hexmask.long.byte 0x0 17.--21. 1. "BYP_CMD,Delay unit when in DLL bypass mode" newline bitfld.long 0x0 16. "BYP_EN,DLL bypass mode enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 1.--6. 1. "RX_TAP_SEL,TAP delay for RX clock selection" newline bitfld.long 0x0 0. "EN,None" "?,B_0x1" rgroup.long 0xC04++0x3 line.long 0x0 "SYSCFG_DLYBSD3SR,SYSCFG DLYBSD3 status register" bitfld.long 0x0 1. "RX_TAP_SEL_ACK,None" "?,B_0x1" bitfld.long 0x0 0. "LOCK,None" "?,B_0x1" group.long 0x1000++0x3 line.long 0x0 "SYSCFG_DLYBOS1CR,SYSCFG DLYBOS1 control register" hexmask.long.byte 0x0 17.--21. 1. "BYP_CMD,Delay unit when in DLL bypass mode" bitfld.long 0x0 16. "BYP_EN,DLL bypass mode enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 7.--12. 1. "TX_TAP_SEL,TAP delay for TX clock selection" hexmask.long.byte 0x0 1.--6. 1. "RX_TAP_SEL,TAP delay for RX clock selection" newline bitfld.long 0x0 0. "EN,None" "?,B_0x1" rgroup.long 0x1004++0x3 line.long 0x0 "SYSCFG_DLYBOS1SR,SYSCFG DLYBOS1 status register" bitfld.long 0x0 2. "TX_TAP_SEL_ACK,None" "?,B_0x1" bitfld.long 0x0 1. "RX_TAP_SEL_ACK,None" "?,B_0x1" newline bitfld.long 0x0 0. "LOCK,None" "?,B_0x1" group.long 0x1400++0x3 line.long 0x0 "SYSCFG_DLYBOS2CR,SYSCFG DLYBOS2 control register" hexmask.long.byte 0x0 17.--21. 1. "BYP_CMD,Delay unit when in DLL bypass mode" bitfld.long 0x0 16. "BYP_EN,DLL bypass mode enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 7.--12. 1. "TX_TAP_SEL,TAP delay for TX clock selection" hexmask.long.byte 0x0 1.--6. 1. "RX_TAP_SEL,TAP delay for RX clock selection" newline bitfld.long 0x0 0. "EN,e" "?,B_0x1" rgroup.long 0x1404++0x3 line.long 0x0 "SYSCFG_DLYBOS2SR,SYSCFG DLYBOS2 status register" bitfld.long 0x0 2. "TX_TAP_SEL_ACK,None" "?,B_0x1" bitfld.long 0x0 1. "RX_TAP_SEL_ACK,None" "?,B_0x1" newline bitfld.long 0x0 0. "LOCK,None" "?,B_0x1" group.long 0x1800++0x7 line.long 0x0 "SYSCFG_VDERAMCR,SYSCFG video decoder encoder RAM control register" bitfld.long 0x0 0. "VDERAM_EN,VDEC/VENC RAM enable" "B_0x0,B_0x1" line.long 0x4 "SYSCFG_POTTAMPRSTCR,SYSCFG potential tamper reset control register" bitfld.long 0x4 0. "POTTAMPRESETMASK,This bit can be set by software to mask PKA SAES CRYP1/2 and HASH reset in case of potential tamper." "B_0x0,B_0x1" group.long 0x1C00++0x3 line.long 0x0 "SYSCFG_M33SSCR,SYSCFG M33SS control register" bitfld.long 0x0 20. "LOCKSAU,Prevent changes to secure SAU memory regions already programmed." "0,1" bitfld.long 0x0 19. "LOCKNSMPU,Prevent changes to non-secure MPU memory regions already programmed." "0,1" newline bitfld.long 0x0 18. "LOCKSMPU,Prevent changes to programmed secure MPU memory regions." "0,1" bitfld.long 0x0 17. "LOCKNSVTOR,Prevent changes to non-secure vector table base address." "0,1" newline bitfld.long 0x0 16. "LOCKSVTAIRCR,Prevent changes to:" "0,1" hexmask.long.byte 0x0 0.--5. 1. "FPU_IT_EN,Floating point unit interrupt enable" group.long 0x2000++0x37 line.long 0x0 "SYSCFG_ICNQPCR1,SYSCFG ICN QOS priority control register 1" hexmask.long.byte 0x0 28.--31. 1. "SDMMC3_QOS,SDMMC3 read/write channel QoS setting" hexmask.long.byte 0x0 24.--27. 1. "SDMMC2_QOS,SDMMC2 read/write channes QoS setting" newline hexmask.long.byte 0x0 20.--23. 1. "SDMMC1_QOS,SDMMC1 read/write channel QoS setting" hexmask.long.byte 0x0 16.--19. 1. "HPDMA3_QOS,HPDMA3 read/write channel QoS setting" newline hexmask.long.byte 0x0 12.--15. 1. "HPDMA2_QOS,HPDMA2 read/write channel QoS setting" hexmask.long.byte 0x0 8.--11. 1. "HPDMA1_QOS,HPDMA1 read/write channel QoS setting" newline hexmask.long.byte 0x0 4.--7. 1. "TRACE_QOS,TRACE read/write channel QoS setting" hexmask.long.byte 0x0 0.--3. 1. "A35_QOS,Cortex-A35 read/write channel QoS setting" line.long 0x4 "SYSCFG_ICNQPCR2,SYSCFG ICN QOS priority control register 2" hexmask.long.byte 0x4 28.--31. 1. "GPU_QOS,GPU read/write channel QoS setting" hexmask.long.byte 0x4 24.--27. 1. "VDEC_QOS,VDEC read/write channels QoS setting" newline hexmask.long.byte 0x4 20.--23. 1. "VENC_QOS,VENC read/write channels QoS setting" hexmask.long.byte 0x4 16.--19. 1. "LTDC_QOS,LTDC read/write channels QoS setting" newline hexmask.long.byte 0x4 12.--15. 1. "DCMIPP_QOS,DCMIPP write channel QoS setting" hexmask.long.byte 0x4 8.--11. 1. "PCIE_QOS,PCIE read/write channel QoS setting" newline hexmask.long.byte 0x4 4.--7. 1. "USB3DR_QOS,USB3DR read/write channel QoS setting" hexmask.long.byte 0x4 0.--3. 1. "USBH_QOS,USBH read/write channel QoS setting" line.long 0x8 "SYSCFG_ICNEWRCR,SYSCFG ICN early write response control register" bitfld.long 0x8 4. "LTDCR_DCMIPP_EARLY_WR_RSP_ENABLE,LTDC Rotation and DCMIPP early write response enable" "B_0x0,B_0x1" bitfld.long 0x8 3. "SDMMC3_EARLY_WR_RSP_ENABLE,SDMMC3 early write response enable" "B_0x0,B_0x1" newline bitfld.long 0x8 2. "SDMMC2_EARLY_WR_RSP_ENABLE,SDMMC2 early write response enable" "B_0x0,B_0x1" bitfld.long 0x8 1. "SDMMC1_EARLY_WR_RSP_ENABLE,SDMMC1 early write response enable" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "USBH_EARLY_WR_RSP_ENABLE,USBH (OHCI and EHCI) early write response enable" "B_0x0,B_0x1" line.long 0xC "SYSCFG_ICNCGCR,SYSCFG ICN clock gating control register" bitfld.long 0xC 7. "ALWAYS_ON_CLK_ICN_VID,When set to 1 ICN automatic clock gating on clk_icn_vid domain is off." "0,1" bitfld.long 0xC 5. "ALWAYS_ON_CLK_ICN_SDMMC,When set to 1 ICN automatic clock gating on clk_icn_sdmmc domain is off." "0,1" newline bitfld.long 0xC 4. "ALWAYS_ON_CLK_ICN_SYSATB,When set to 1 ICN automatic clock gating on clk_icn_sysatb domain is off." "0,1" bitfld.long 0xC 3. "ALWAYS_ON_CLK_ICN_MCU,When set to 1 ICN automatic clock gating on clk_icn_mcu domain is off." "0,1" newline bitfld.long 0xC 2. "ALWAYS_ON_CLK_ICN_HSL,When set to 1 ICN automatic clock gating on clk_icn_hsl domain is off." "0,1" bitfld.long 0xC 1. "ALWAYS_ON_CLK_ICN_DISPLAY,When set to 1 ICN automatic clock gating on clk_icn_display domain is off." "0,1" newline bitfld.long 0xC 0. "ALWAYS_ON_CLK_ICN_DDR,When set to 1 ICN automatic clock gating on clk_icn_ddr domain is off." "0,1" line.long 0x10 "SYSCFG_ICNGPUBWLCR,SYSCFG ICN GPU bandwidth limiter control register" hexmask.long.byte 0x10 8.--15. 1. "MAXABW,Maximum allowed Bandwidth" bitfld.long 0x10 2.--3. "PMRSTDLY,Panic Mode Restart Delay" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x10 1. "BWLEN,Bandwidth limiter enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "PMEN,Panic Mode Enable" "B_0x0,B_0x1" line.long 0x14 "SYSCFG_ICNE2EBWRCR,SYSCFG ICN end-to-end bandwidth regulation control register" bitfld.long 0x14 9. "CFG_HPDMA_BW,Triple the bandwidth (BW) allowed to HPDMA1/2/3 by the regulation." "B_0x0,B_0x1" bitfld.long 0x14 8. "CFG_CPU1_BW,Triple the bandwidth allowed to the CPU1 by the regulation." "B_0x0,B_0x1" newline bitfld.long 0x14 4.--6. "CFG_ALL_TGT,Amount of empty CAM slots in DDR-CTRL that the regulation targets" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 1.--2. "CFG_MODEL,Defines the reactivity of the regulation feedback." "B_0x0,?,?,B_0x3" newline bitfld.long 0x14 0. "CFG_ENABLE,Activates the end-to-end bandwidth regulation." "B_0x0,B_0x1" line.long 0x18 "SYSCFG_SAFERSTCR,SYSCFG safe reset control register" bitfld.long 0x18 0. "CFG_ENABLE,Activates the safe reset connector." "B_0x0,B_0x1" line.long 0x1C "SYSCFG_ICNPCIBWLCR,SYSCFG ICN PCI bandwidth limiter control register" hexmask.long.byte 0x1C 8.--15. 1. "MAXABW,Maximum allowed Bandwidth" bitfld.long 0x1C 1. "BWLEN,Bandwidth limiter enable" "B_0x0,B_0x1" line.long 0x20 "SYSCFG_ICNETHBWLCR,SYSCFG ICN ETH bandwidth limiter control register" hexmask.long.byte 0x20 8.--15. 1. "MAXABW,Maximum allowed Bandwidth" bitfld.long 0x20 1. "BWLEN,Bandwidth limiter enable" "B_0x0,B_0x1" line.long 0x24 "SYSCFG_ICNUSB3BWLCR,SYSCFG ICN USB3 bandwidth limiter control register" hexmask.long.byte 0x24 8.--15. 1. "MAXABW,Maximum allowed Bandwidth" bitfld.long 0x24 1. "BWLEN,Bandwidth limiter enable" "B_0x0,B_0x1" line.long 0x28 "SYSCFG_ICNCPU1BWLCR,SYSCFG ICN CPU1 bandwidth limiter control register" hexmask.long.byte 0x28 8.--15. 1. "MAXABW,Maximum allowed Bandwidth" bitfld.long 0x28 1. "BWLEN,Bandwidth limiter enable" "B_0x0,B_0x1" line.long 0x2C "SYSCFG_ICNLTDCBWLCR,SYSCFG ICN LTDC bandwidth limiter control register" hexmask.long.byte 0x2C 8.--15. 1. "MAXABW,Maximum allowed Bandwidth" bitfld.long 0x2C 1. "BWLEN,Bandwidth limiter enable" "B_0x0,B_0x1" line.long 0x30 "SYSCFG_ICNDCMIPPBWLCR,SYSCFG ICN DCMIPP bandwidth limiter control register" hexmask.long.byte 0x30 8.--15. 1. "MAXABW,Maximum allowed Bandwidth" bitfld.long 0x30 1. "BWLEN,Bandwidth limiter enable" "B_0x0,B_0x1" line.long 0x34 "SYSCFG_ICNVDEBWLCR,SYSCFG ICN Video Decoder Encoder bandwidth limiter control register" hexmask.long.byte 0x34 8.--15. 1. "MAXABW,Maximum allowed Bandwidth" bitfld.long 0x34 1. "BWLEN,Bandwidth limiter enable" "B_0x0,B_0x1" group.long 0x2400++0x7 line.long 0x0 "SYSCFG_USB2PHY1CR,SYSCFG USB2PHY1 control register" bitfld.long 0x0 4.--6. "USB2PHY1SEL,PHY reference clock speed setting" "B_0x0,B_0x1,B_0x2,?,?,?,?,?" bitfld.long 0x0 2. "USB2PHY1CMN,Controls power down of analog blocks during Suspend and Sleep." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "AUTORSMENB1,Auto-resume mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "RETENABLEN1,Retention mode enable (active low)" "B_0x0,B_0x1" line.long 0x4 "SYSCFG_USB2PHY1BCCR,SYSCFG USB2PHY1 battery charging control register" bitfld.long 0x4 3. "H_FORCEBCMODE,Forces USB2PHY1 in non-driving suspend mode." "B_0x0,B_0x1" bitfld.long 0x4 2. "H_VDMSRCEN,Voltage source on DM for CDP port enable" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "H_CDPDETEN,Voltage detector on DP for CDP port enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "H_CDPEN,CDP behavior for Host port enable" "B_0x0,B_0x1" rgroup.long 0x2408++0x3 line.long 0x0 "SYSCFG_USB2PHY1BCSR,SYSCFG USB2PHY1 battery charging status register" bitfld.long 0x0 2. "FSVMINUS,Voltage level on DM (also output of the comparison with VLGC threshold as defined in BC v1." "B_0x0,B_0x1" bitfld.long 0x0 1. "FSVPLUS,Voltage level on DP (also output of the comparison with VLGC threshold as defined in BC v1." "B_0x0,B_0x1" newline bitfld.long 0x0 0. "CHGDET,Comparison of voltage on DP with VDAT_REF threshold as defined in BC v1." "B_0x0,B_0x1" group.long 0x240C++0x7 line.long 0x0 "SYSCFG_USB2PHY1TRIM1CR,SYSCFG USB2PHY1 trimming 1 control register" bitfld.long 0x0 29.--30. "USB2PHY1TXRESTUNE,USB source impedance adjustment" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 27.--28. "USB2PHY1TXRISETUNE,High-speed transmitter rise/fall time adjustment" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x0 23.--26. 1. "USB2PHY1TXVREFTUNE,HS DC voltage level adjustment" hexmask.long.byte 0x0 19.--22. 1. "USB2PHY1TXFSLSTUNE,Full-speed (FS)/low-speed (LS) source impedance adjustment" newline bitfld.long 0x0 17.--18. "USB2PHY1TXHSXVTUNE,Transmitter high-speed crossover adjustment" "?,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--16. "USB2PHY1OTGTUNE,Vless thansub>BUSless than/sub> valid threshold adjustment" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x0 12.--13. "USB2PHY1VDATREFTUNE,Data detect voltage adjustment" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 9.--11. "USB2PHY1SQRXTUNE,Squelch threshold adjustment" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x0 6.--8. "USB2PHY1COMPDISTUNE,Disconnect threshold adjustment" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0x0 2.--5. 1. "USB2PHY1PLLPTUNE,PLL proportional path tune" newline bitfld.long 0x0 0.--1. "USB2PHY1PLLITUNE,PLL integral path tune" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "SYSCFG_USB2PHY1TRIM2CR,SYSCFG USB2PHY1 trimming 2 control register" bitfld.long 0x4 2. "USB2PHY1TXPREEMPPULSETUNE,HS transmitter preemphasis duration control" "B_0x0,B_0x1" bitfld.long 0x4 0.--1. "USB2PHY1TXPREEMPAMPTUNE,HS transmitter preemphasis current control" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x2420++0x3 line.long 0x0 "SYSCFG_USBHCR,SYSCFG USBH control register" bitfld.long 0x0 1. "USBH_VBUSEN_POLARITY,Polarity of USBH_VBUSEN alternate function" "B_0x0,B_0x1" bitfld.long 0x0 0. "USBH_OVRCUR_POLARITY,Polarity of USBH_OVRCUR alternate function" "B_0x0,B_0x1" group.long 0x2800++0x3 line.long 0x0 "SYSCFG_USB2PHY2CR,SYSCFG USB2PHY2 control register" bitfld.long 0x0 17. "DRVVBUS0,Control bit for VBUS valid comparator in USB2PHY2" "B_0x0,B_0x1" bitfld.long 0x0 16. "OTGDISABLE0,Disable control bit for VBUS valid comparator in USB2PHY2" "B_0x0,B_0x1" newline bitfld.long 0x0 12.--14. "USB2PHY2SEL,PHY reference clock speed setting" "B_0x0,B_0x1,B_0x2,?,?,?,?,?" hexmask.long.byte 0x0 7.--10. 1. "FILTER_BYPASS,Internal debounce logic enable (default)" newline bitfld.long 0x0 6. "VBUSVLDEXT,Voltage comparison result when an external voltage comparator is used" "B_0x0,B_0x1" bitfld.long 0x0 5. "VBUSVLDEXTSEL,VBUS valid comparator used when USB3DR controller is in device mode" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "VBUSVALID,Control of VBUS valid input of USB3DR controller when in Host mode" "B_0x0,B_0x1" bitfld.long 0x0 2. "USB2PHY2CMN,Control of power down of analog blocks during Suspend and Sleep" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "AUTORSMENB2,Auto-resume mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "RETENABLEN2,Retention mode enable (active low)" "B_0x0,B_0x1" group.long 0x2808++0x7 line.long 0x0 "SYSCFG_USB2PHY2TRIM1CR,SYSCFG USB2PHY2 trimming 1 control register" bitfld.long 0x0 29.--30. "USB2PHY2TXRESTUNE,USB source impedance adjustment" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 27.--28. "USB2PHY2TXRISETUNE,HS transmitter rise/fall time adjustment" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x0 23.--26. 1. "USB2PHY2TXVREFTUNE,HS DC voltage level adjustment" hexmask.long.byte 0x0 19.--22. 1. "USB2PHY2TXFSLSTUNE,Full-speed (FS)/low-speed (LS) source impedance adjustment" newline bitfld.long 0x0 17.--18. "USB2PHY2TXHSXVTUNE,Transmitter HS crossover adjustment" "?,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--16. "USB2PHY2OTGTUNE,VBUS valid threshold adjustment" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x0 12.--13. "USB2PHY2VDATREFTUNE,Data detect voltage adjustment" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 9.--11. "USB2PHY2SQRXTUNE,Squelch threshold adjustment" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x0 6.--8. "USB2PHY2COMPDISTUNE,Disconnect threshold adjustment" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0x0 2.--5. 1. "USB2PHY2PLLPTUNE,PLL proportional path tune" newline bitfld.long 0x0 0.--1. "USB2PHY2PLLITUNE,PLL integral path tune" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "SYSCFG_USB2PHY2TRIM2CR,SYSCFG USB2PHY2 trimming 2 control register" bitfld.long 0x4 2. "USB2PHY2TXPREEMPPULSETUNE,HS transmitter preemphasis duration control" "B_0x0,B_0x1" bitfld.long 0x4 0.--1. "USB2PHY2TXPREEMPAMPTUNE,HS transmitter preemphasis current control" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x2C00++0x3 line.long 0x0 "SYSCFG_OCTOSPIAMCR,SYSCFG OCTOSPI address mapping control register" bitfld.long 0x0 0.--2. "OCTOSPI_ADDRESS_MAPPING,OCTOSPI1 and OCTOSPI2 address mapping" "B_0x0,B_0x1,B_0x2,B_0x3,?,?,?,?" group.long 0x3000++0x3 line.long 0x0 "SYSCFG_ETH1CR,SYSCFG Ethernet1 control register" bitfld.long 0x0 4.--6. "ETH1_SEL,Ethernet 1 PHY interface selection" "B_0x0,B_0x1,?,?,B_0x4,?,?,?" bitfld.long 0x0 2. "ETH1_PTP_CLK_SEL,PTP (IEEE1588) clock selection" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "ETH1_CLK_SEL,RGMII 125 MHz clock selection" "B_0x0,B_0x1" bitfld.long 0x0 0. "ETH1_REF_CLK_SEL,Ethernet reference/RX clock selection" "B_0x0,B_0x1" rgroup.long 0x3010++0x3 line.long 0x0 "SYSCFG_ETH1SR,SYSCFG Ethernet1 status register" bitfld.long 0x0 1. "ETH1_PWR_DOWN_ACK,Asserted when the power-down sequence start has been acknowledged" "0,1" bitfld.long 0x0 0. "ETH1_TX_CLK_GATING_CTRL,Asserted when the MAC has entered Tx LPI mode" "0,1" group.long 0x3400++0x3 line.long 0x0 "SYSCFG_ETH2CR,SYSCFG Ethernet2 configuration register" bitfld.long 0x0 4.--6. "ETH2_SEL,Ethernet 2 PHY interface selection" "B_0x0,B_0x1,?,?,B_0x4,?,?,?" bitfld.long 0x0 2. "ETH2_PTP_CLK_SEL,PTP (IEEE1588) clock selection" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "ETH2_CLK_SEL,RGMII 125MHz clock selection" "B_0x0,B_0x1" bitfld.long 0x0 0. "ETH2_REF_CLK_SEL,Reference/RX clock selection" "B_0x0,B_0x1" rgroup.long 0x3410++0x3 line.long 0x0 "SYSCFG_ETH2SR,SYSCFG Ethernet2 status register" bitfld.long 0x0 1. "ETH2_PWR_DOWN_ACK,Asserted when the power-down sequence start has been acknowledged" "0,1" bitfld.long 0x0 0. "ETH2_TX_CLK_GATING_CTRL,Asserted when the MAC has entered Tx LPI mode" "0,1" group.long 0x3800++0x3 line.long 0x0 "SYSCFG_ETHSWCR,SYSCFG Ethernet switch configuration register" bitfld.long 0x0 3. "ETHSW_REF_SEL,Clock source selection for RMII 50 MHz" "B_0x0,B_0x1" bitfld.long 0x0 2. "ETHSW_CLK_SEL,Clock source selection for 125 MHz" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "ETHSW_CFG_IF_SEL,PHY interface type selection for external ports" "B_0x0,B_0x1" bitfld.long 0x0 0. "ETH1_DIRECT,Ethernet switch bypass" "B_0x0,B_0x1" group.long 0x4000++0x3 line.long 0x0 "SYSCFG_VDDIO3CCCR,SYSCFG VDDIO3 compensation cell control register" bitfld.long 0x0 10. "LPMDIS,I/Os supplied by Vless thansub>DDIO3less than/sub> compensation cell low power mode disable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CS,I/Os supplied by Vless thansub>DDIO3less than/sub> code selection" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "EN,I/Os supplied by Vless thansub>DDIO3less than/sub> compensation cell enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "RAPSRC,PMOS compensation code of the I/Os supplied by Vless thansub>DDIO3less than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "RANSRC,NMOS compensation code of the I/Os supplied by Vless thansub>DDIO3less than/sub>" rgroup.long 0x4004++0x3 line.long 0x0 "SYSCFG_VDDIO3CCSR,SYSCFG VDDIO3 compensation cell status register" bitfld.long 0x0 8. "READY,Vless thansub>DDIO3 less than/sub>I/O compensation cell ready flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "APSRC,PMOS compensation value of the I/Os supplied by Vless thansub>DDIO3less than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "ANSRC,NMOS compensation value of the I/Os supplied by Vless thansub>DDIO3less than/sub>" group.long 0x4008++0x3 line.long 0x0 "SYSCFG_VDDIO4CCCR,SYSCFG VDDIO4 compensation cell control register" bitfld.long 0x0 10. "LPMDIS,I/Os supplied by Vless thansub>DDIO4less than/sub> compensation cell low power mode disable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CS,Vless thansub>DDIO4less than/sub> I/O code selection" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "EN,Vless thansub>DDIO4less than/sub> I/O compensation cell enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "RAPSRC,PMOS compensation code of the I/Os supplied by Vless thansub>DDIO4less than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "RANSRC,NMOS compensation code of the I/Os supplied by Vless thansub>DDIO4less than/sub>" rgroup.long 0x400C++0x3 line.long 0x0 "SYSCFG_VDDIO4CCSR,SYSCFG VDDIO4 compensation cell status register" bitfld.long 0x0 8. "READY,Vless thansub>DDIO4 less than/sub>I/O compensation cell ready flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "APSRC,PMOS compensation value of the I/Os supplied by Vless thansub>DDIO4less than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "ANSRC,NMOS compensation value of the I/Os supplied by Vless thansub>DDIO4less than/sub>" group.long 0x4010++0x3 line.long 0x0 "SYSCFG_VDDCCCR,SYSCFG VDD compensation cell control register" bitfld.long 0x0 10. "LPMDIS,I/Os supplied by Vless thansub>DDless than/sub> compensation cell low power mode disable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CS,Vless thansub>DDless than/sub> I/O code selection" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "EN,Vless thansub>DDless than/sub> I/O compensation cell enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "RAPSRC,PMOS compensation code of the I/Os supplied by Vless thansub>DDless than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "RANSRC,NMOS compensation code of the I/Os supplied by Vless thansub>DDless than/sub>" rgroup.long 0x4014++0x3 line.long 0x0 "SYSCFG_VDDCCSR,SYSCFG VDD compensation cell status register" bitfld.long 0x0 8. "READY,Vless thansub>DD less than/sub>I/O compensation cell ready flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "APSRC,PMOS compensation value of the I/Os supplied by Vless thansub>DDless than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "ANSRC,NMOS compensation value of the I/Os supplied by Vless thansub>DDless than/sub>" group.long 0x4018++0x3 line.long 0x0 "SYSCFG_VDDIO2CCCR,SYSCFG VDDIO2 compensation cell control register" bitfld.long 0x0 10. "LPMDIS,I/Os supplied by Vless thansub>DDIO2less than/sub> compensation cell low power mode disable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CS,Vless thansub>DDIO2less than/sub> I/O code selection" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "EN,Vless thansub>DDIO2less than/sub> I/O compensation cell enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "RAPSRC,PMOS compensation code of the I/Os supplied by Vless thansub>DDIO2less than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "RANSRC,NMOS compensation code of the I/Os supplied by Vless thansub>DDIO2less than/sub>" rgroup.long 0x401C++0x3 line.long 0x0 "SYSCFG_VDDIO2CCSR,SYSCFG VDDIO2 compensation cell status register" bitfld.long 0x0 8. "READY,Vless thansub>DDIO2 less than/sub>I/O compensation cell ready flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "APSRC,PMOS compensation value of the I/Os supplied by Vless thansub>DDIO2less than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "ANSRC,NMOS compensation value of the I/Os supplied by Vless thansub>DDIO2less than/sub>" group.long 0x4020++0x3 line.long 0x0 "SYSCFG_VDDIO1CCCR,SYSCFG VDDIO1 compensation cell control register" bitfld.long 0x0 10. "LPMDIS,I/Os supplied by Vless thansub>DDIO1less than/sub> compensation cell low power mode disable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CS,Vless thansub>DDIO1less than/sub> I/O code selection" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "EN,Vless thansub>DDIO1less than/sub> I/O compensation cell enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "RAPSRC,PMOS compensation code of the I/Os supplied by Vless thansub>DDIO1less than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "RANSRC,NMOS compensation code of the I/Os supplied by Vless thansub>DDIO1less than/sub>" rgroup.long 0x4024++0x3 line.long 0x0 "SYSCFG_VDDIO1CCSR,SYSCFG VDDIO1 compensation cell status register" bitfld.long 0x0 8. "READY,Vless thansub>DDIO1 less than/sub>I/O compensation cell ready flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "APSRC,PMOS compensation value of the I/Os supplied by Vless thansub>DDIO1less than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "ANSRC,NMOS compensation value of the I/Os supplied by Vless thansub>DDIO1less than/sub>" group.long 0x4400++0x3 line.long 0x0 "SYSCFG_CBR,SYSCFG control timer break register" bitfld.long 0x0 4. "RETRAML,RETRAM double ECC error lock" "B_0x0,B_0x1" bitfld.long 0x0 3. "BKRAML,BKPSRAM double ECC error lock" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "PVDL,PVD lock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CLL,Cortex-M33 LOCKUP (HardFault) output enable" "B_0x0,B_0x1" group.long 0x4800++0x3 line.long 0x0 "SYSCFG_USB3DRCR,SYSCFG USB3DR control register" bitfld.long 0x0 11. "USB3DR_NOTPCIE_DEBUG_BUS,Selection of USB3DR or PCIE debug signals" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "USB3DR_DEBUG_BUS_SEL,Selection of USB3DR/USBH debug signals" "B_0x0,B_0x1,B_0x2,B_0x3,?,?,?,?" newline bitfld.long 0x0 4. "USB3DR_USB2ONLYD,None" "B_0x0,B_0x1" bitfld.long 0x0 3. "USB3DR_USB2ONLYH,None" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "USB3DR_VBUSEN_POLARITY,Polarity of USB3DR_VBUSEN alternate function" "B_0x0,B_0x1" bitfld.long 0x0 1. "USB3DR_OVRCUR_POLARITY,Polarity of USB3DR_OVRCUR alternate function" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "USB3DR_HOST_PORT_POWER_CONTROL_PRESENT,This port defines the bit[3] of capability parameters (HCCPARAMS)." "B_0x0,B_0x1" rgroup.long 0x4804++0x3 line.long 0x0 "SYSCFG_USB3DRSR,SYSCFG USB3DR status register" bitfld.long 0x0 0.--2. "USB3DR_CLK_GATE_CTRL,USB3DR debug register - Clock gating control" "0,1,2,3,4,5,6,7" group.long 0x4C00++0x13 line.long 0x0 "SYSCFG_COMBOPHYCR1,SYSCFG COMBOPHY control register 1" bitfld.long 0x0 20.--22. "COMBOPHY_SSCRANGE,Selection of the range of spread-spectrum modulation" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 19. "COMBOPHY_SSCEN,Spread-spectrum enable" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "COMBOPHY_REFSSPEN,Reference clock enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "COMBOPHY_REFCLKDIV2,Parameter for the frequency selection of the reference clock" "B_0x0,B_0x1" newline hexmask.long.word 0x0 8.--16. 1. "COMBOPHY_SSCREFCLKSEL,Parameter for reference clock frequency selection" hexmask.long.byte 0x0 1.--7. 1. "COMBOPHY_MPLLMULTIPLIER,Parameter for reference clock frequency selection" newline bitfld.long 0x0 0. "COMBOPHY_REFUSEPAD,Selection of COMBOPHY reference clock source" "B_0x0,B_0x1" line.long 0x4 "SYSCFG_COMBOPHYCR2,SYSCFG COMBOPHY control register 2" bitfld.long 0x4 31. "COMBOPHY_TEST_POWERDOWN,Forces the entire PHY into its lowest power state by turning everything off." "0,1" bitfld.long 0x4 15. "COMBOPHY_ISO_DIS,COMBOPHY isolation cells disable" "B_0x0,B_0x1" newline bitfld.long 0x4 0.--1. "COMBOPHY_MODESEL,COMBOPHY mode selection" "B_0x0,?,?,B_0x3" line.long 0x8 "SYSCFG_COMBOPHYCR3,SYSCFG COMBOPHY control register 3" bitfld.long 0x8 30. "COMBOPHY_RTUNE_REQ,Instructs COMBOPHY to perform a termination calibration." "B_0x0,B_0x1" bitfld.long 0x8 29. "COMBOPHY_RXLOSLFPSEN,Enables the RX LOS LFPS mode." "0,1" newline hexmask.long.byte 0x8 22.--28. 1. "COMBOPHY_PCSTXSWINGFULL,TX amplitude (full swing mode)" hexmask.long.byte 0x8 16.--21. 1. "COMBOPHY_PCSTXDEEMPH6DB,TX deemphasis at 6 dB (USB3 use case)" newline hexmask.long.byte 0x8 10.--15. 1. "COMBOPHY_PCSTXDEEMPH3P5DB,TX deemphasis at 3." hexmask.long.word 0x8 0.--9. 1. "COMBOPHY_PCSRXLOSMASKVAL,Masks the incoming LFPS for the number of reference clock cycles equal to the value of this bit field." line.long 0xC "SYSCFG_COMBOPHYCR4,SYSCFG COMBOPHY control register 4" bitfld.long 0xC 29.--31. "COMBOPHY_TX_VBOOST_LEVEL,TX voltage boost level" "?,?,?,B_0x3,B_0x4,B_0x5,?,?" hexmask.long.byte 0xC 24.--28. 1. "COMBOPHY_TX_TERM_OFFSET,Transmitter termination offset" newline hexmask.long.byte 0xC 17.--23. 1. "COMBOPHY_PCS_TX_SWING_LOW,TX amplitude (low swing mode) (PCIE use case)" hexmask.long.byte 0xC 11.--16. 1. "COMBOPHY_PCS_TX_DEEMPH_GEN1,TX deemphasis at 3." newline bitfld.long 0xC 8.--10. "COMBOPHY_LOS_BIAS,Loss-of-signal detector threshold level control" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 3.--7. 1. "COMBOPHY_LOS_LEVEL,Loss-of-signal detector sensitivity level control" newline bitfld.long 0xC 0.--2. "COMBOPHY_RX0_EQ,RX equalizer setting" "0,1,2,3,4,5,6,7" line.long 0x10 "SYSCFG_COMBOPHYCR5,SYSCFG COMBOPHY control register 5" bitfld.long 0x10 15. "COMBOPHY_PIPE0_TX2RX_LOOPBK,PCIE use case" "0,1" bitfld.long 0x10 14. "COMBOPHY_LANE0_TX2RX_LOOPBK,USB3 use case" "0,1" newline bitfld.long 0x10 13. "COMBOPHY_LANE0_EXT_PCLK_REQ,USB3 use case" "0,1" bitfld.long 0x10 12. "COMBOPHY_PCS_COMMON_CLOCKS,Common clock mode selection for PCIE receive data path" "B_0x0,B_0x1" newline hexmask.long.byte 0x10 6.--11. 1. "COMBOPHY_PCS_TX_DEEMPH_GEN2_6DB,TX deemphasis at 6 dB (PCIE gen2 use case)" hexmask.long.byte 0x10 0.--5. 1. "COMBOPHY_PCS_TX_DEEMPH_GEN2_3P5DB,TX deemphasis at 3." rgroup.long 0x4C14++0x3 line.long 0x0 "SYSCFG_COMBOPHYSR,SYSCFG COMBOPHY status register" bitfld.long 0x0 1. "COMBOPHY_PIPE0_PHYSTATUS,Communicates completion of several PHY functions." "B_0x0,B_0x1" bitfld.long 0x0 0. "COMBOPHY_RTUNE_ACK,End of the termination calibration step" "B_0x0,B_0x1" group.long 0x5000++0x3 line.long 0x0 "SYSCFG_DISPLAYCLKCR,SYSCFG display clock control register" bitfld.long 0x0 0.--1. "PIXEL_CLK_SEL,Control of pixel clock output selection" "B_0x0,B_0x1,B_0x2,?" group.long 0x6000++0x13 line.long 0x0 "SYSCFG_PCIECR,SYSCFG PCIE control register" bitfld.long 0x0 25. "APP_DBI_RO_WR_DISABLE,DBI read-only write disable" "B_0x0,B_0x1" hexmask.long.byte 0x0 17.--24. 1. "APP_BUS_NUM,Bus number in the requester ID for RC port" newline hexmask.long.byte 0x0 12.--16. 1. "APP_DEV_NUM,Device number in the requester ID for an RC port" hexmask.long.byte 0x0 8.--11. 1. "DEVICE_TYPE,Device/port type" newline bitfld.long 0x0 7. "APP_CLK_REQ_N,Clear this bit to 0 if the application does not want to remove the reference clock." "0,1" bitfld.long 0x0 5.--6. "DEBUG_BUS_SEL,Selection of PCIE observation points" "0,1,2,3" newline bitfld.long 0x0 4. "SYS_INT,When pcie_sys_int goes from low to high the PCIE controller generates an Assert_INTx message." "0,1" bitfld.long 0x0 3. "APP_REQ_RETRY_EN,Provides a capability to defer incoming configuration requests until initialization is complete (only for endpoint)." "0,1" newline bitfld.long 0x0 2. "APP_LTSSM_ENABLE,After application has finished initializing the core configuration registers it must assert this bit to allow the LTSSM to continue link establishment." "0,1" bitfld.long 0x0 1. "APP_INIT_RST,Requests from the application to send a hot reset to the downstream device (only for RootComplex)." "0,1" line.long 0x4 "SYSCFG_PCIEPMEMSICR,SYSCFG PCIE CFG_PME_MSI control register" bitfld.long 0x4 0. "RST_CFG_PME_MSI_INT,Reset pcie_cfg_pme_msi interrupt logic" "B_0x0,B_0x1" line.long 0x8 "SYSCFG_PCIEAERRCMSICR,SYSCFG PCIE CFG_AER_RC_ERR_MSI control register" bitfld.long 0x8 0. "RST_CFG_AER_RC_ERR_MSI_INT,Reset pcie_cfg_aer_rc_err_msi interrupt logic" "B_0x0,B_0x1" line.long 0xC "SYSCFG_PCIESYSRCCR,SYSCFG PCIE CFG_SYS_ERR_RC control register" bitfld.long 0xC 31. "RST_RADM_QOVERFLOW,Reset radm_qoverflow interrupt logic" "B_0x0,B_0x1" bitfld.long 0xC 2. "RST_CFG_BW_MGT_MSI_INT,Reset cfg_bw_mgt_msi interrupt logic" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RST_CFG_LINK_AUTO_BW_MSI_INT,Reset cfg_link_auto_bw_msi interrupt logic" "B_0x0,B_0x1" bitfld.long 0xC 0. "RST_CFG_SYS_ERR_RC_INT,Reset pcie_cfg_sys_err_rc interrupt logic" "B_0x0,B_0x1" line.long 0x10 "SYSCFG_PCIEPTMIRQCR,SYSCFG PCIE PTM interrupt control register" bitfld.long 0x10 3. "RST_PTM_REQ_REPLAY_TX,Reset ptm_req_replay_rx interrupt logic" "B_0x0,B_0x1" bitfld.long 0x10 2. "RST_PTM_REQ_DUP_RX,Reset ptm_req_dup_rx interrupt logic" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "RST_PTM_REQ_RESPONSE_TIMEOUT,Reset ptm_req_response_timeout interrupt logic" "B_0x0,B_0x1" bitfld.long 0x10 0. "RST_PTM_CLOCK_UPDATED,Reset ptm_clock_updated interrupt logic" "B_0x0,B_0x1" group.long 0x6080++0x3 line.long 0x0 "SYSCFG_PCIEPRGCR,SYSCFG PCIE PRG control register" hexmask.long.byte 0x0 1.--5. 1. "PRG_IMP_CTRL,Control of the impedance of the 100 MHz differential output buffer" bitfld.long 0x0 0. "PRG_EN,None" "B_0x0,B_0x1" rgroup.long 0x6100++0x7 line.long 0x0 "SYSCFG_PCIESR1,SYSCFG PCIE status register 1" bitfld.long 0x0 21. "PTM_RESPONDER_RDY_TO_VALIDATE,Application software can re-validate the context because it was invalidated." "0,1" bitfld.long 0x0 20. "PTM_UPDATING,PTM update in progress" "0,1" newline bitfld.long 0x0 19. "PTM_CLOCK_UPDATED,Controller updated the local clock." "0,1" bitfld.long 0x0 18. "PTM_REQ_RESPONSE_TIMEOUT,PTM requester response timeout" "0,1" newline bitfld.long 0x0 17. "PTM_REQ_DUP_RX,PTM requester duplicate TLP received" "0,1" bitfld.long 0x0 16. "PTM_REQ_REPLAY_TX,PTM requester detected a TLP replay being sent when responseD message in use and one of the following:" "0,1" newline bitfld.long 0x0 15. "RADM_QOVERFLOW,Level high indicates that one or more of the P/NP/CPL receive queues has overflowed." "0,1" bitfld.long 0x0 14. "RADM_Q_NOT_EMPTY,Level high indicates that the receive queues contain TLP header/data." "0,1" newline bitfld.long 0x0 13. "CFG_AER_RC_ERR_INT,pcie_1_cfg_aer_rc_err interrupt" "0,1" bitfld.long 0x0 12. "CFG_PME_INT,pcie_1_cfg_pme interrupt" "0,1" newline bitfld.long 0x0 11. "INTA_INTERRUPT,pcie_1_inta interrupt" "0,1" bitfld.long 0x0 10. "INTB_INTERRUPT,pcie_1_intb interrupt" "0,1" newline bitfld.long 0x0 9. "INTC_INTERRUPT,pcie_1_intc interrupt" "0,1" bitfld.long 0x0 8. "INTD_INTERRUPT,pcie_1_intd interrupt" "0,1" newline bitfld.long 0x0 6. "MSI_CTRL_INT,pcie_1_msi_ctrl_int interrupt" "0,1" bitfld.long 0x0 5. "RDLH_LINK_UP,Data link layer up status for RC application" "0,1" newline bitfld.long 0x0 4. "CFG_HW_AUTO_SP_DIS,Hardware autonomous speed disable" "0,1" bitfld.long 0x0 3. "SMLH_LINK_UP,PHY link up status for RC application" "0,1" newline bitfld.long 0x0 0.--2. "PM_DSTATE,Power management D-state" "0,1,2,3,4,5,6,7" line.long 0x4 "SYSCFG_PCIESR2,SYSCFG PCIE interrupt status register 2" bitfld.long 0x4 2. "CFG_SYS_ERR_RC_INT_STS,Status of PCIE cfg_sys_err_rc interrupt" "0,1" bitfld.long 0x4 1. "CFG_AER_RC_ERR_MSI_INT_STS,Status of PCIE cfg_aer_rc_err_msi interrupt" "0,1" newline bitfld.long 0x4 0. "CFG_PME_MSI_INT_STS,Status of PCIE cfg_pme_msi interrupt" "0,1" rgroup.long 0x6400++0x3 line.long 0x0 "SYSCFG_IDC,SYSCFG device ID register" hexmask.long.word 0x0 16.--31. 1. "MAJOR_REV_ID,Device revision" hexmask.long.word 0x0 0.--11. 1. "DEV_ID,Device ID" rgroup.long 0x7FF4++0xB line.long 0x0 "SYSCFG_VERR,SYSCFG version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,SYSCFG major revision" hexmask.long.byte 0x0 0.--3. 1. "MINREV,SYSCFG minor revision" line.long 0x4 "SYSCFG_IPIDR,SYSCFG identification register" hexmask.long 0x4 0.--31. 1. "ID,SYSCFG identifier" line.long 0x8 "SYSCFG_SIDR,SYSCFG size identification register" hexmask.long 0x8 0.--31. 1. "SID,Size identification" tree.end tree "SYSCFG_S" base ad:0x54230000 rgroup.long 0x0++0x3 line.long 0x0 "SYSCFG_BOOTSR,SYSCFG boot pin status register" bitfld.long 0x0 3. "BOOT3,BOOT3 pin value" "low,high" bitfld.long 0x0 2. "BOOT2,BOOT2 pin value" "low,high" newline bitfld.long 0x0 1. "BOOT1,BOOT1 pin value" "low,high" bitfld.long 0x0 0. "BOOT0,BOOT0 pin value" "low,high" group.long 0x4++0x3 line.long 0x0 "SYSCFG_BOOTCR,SYSCFG boot pin control register" bitfld.long 0x0 3. "BOOT3_PD,BOOT3 pin pull-down disable" "enabled,disabled" bitfld.long 0x0 2. "BOOT2_PD,BOOT2 pin pull-down disable" "enabled,disabled" newline bitfld.long 0x0 1. "BOOT1_PD,BOOT1 pin pull-down disable" "enabled,disabled" bitfld.long 0x0 0. "BOOT0_PD,BOOT0 pin pull-down disable" "enabled,disabled" group.long 0x400++0x3 line.long 0x0 "SYSCFG_DLYBSD1CR,SYSCFG DLYBSD1 control register" bitfld.long 0x0 22. "ANTIGLITCH_EN,None" "?,B_0x1" hexmask.long.byte 0x0 17.--21. 1. "BYP_CMD,Delay unit when in DLL bypass mode" newline bitfld.long 0x0 16. "BYP_EN,DLL bypass mode enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 1.--6. 1. "RX_TAP_SEL,TAP number for RX clock selection" newline bitfld.long 0x0 0. "EN,When 1 the DLL is enabled when configured in lock mode (BYP_EN = 0)." "0,1" rgroup.long 0x404++0x3 line.long 0x0 "SYSCFG_DLYBSD1SR,SYSCFG DLYBSD1 status register" bitfld.long 0x0 1. "RX_TAP_SEL_ACK,None" "?,B_0x1" bitfld.long 0x0 0. "LOCK,None" "?,B_0x1" group.long 0x408++0x3 line.long 0x0 "SYSCFG_SDMMC1CR,SYSCFG SDMMC1 control register" bitfld.long 0x0 0. "SDMMC1_VSEL,Voltage selection" "B_0x0,B_0x1" group.long 0x800++0x3 line.long 0x0 "SYSCFG_DLYBSD2CR,SYSCFG DLYBSD2 control register" bitfld.long 0x0 22. "ANTIGLITCH_EN,Anti-glitch logic enable" "?,B_0x1" hexmask.long.byte 0x0 17.--21. 1. "BYP_CMD,Delay unit when in DLL bypass mode" newline bitfld.long 0x0 16. "BYP_EN,DLL bypass mode enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 1.--6. 1. "RX_TAP_SEL,TAP delay for RX clock selection" newline bitfld.long 0x0 0. "EN,None" "?,B_0x1" rgroup.long 0x804++0x3 line.long 0x0 "SYSCFG_DLYBSD2SR,SYSCFG DLYBSD2 status register" bitfld.long 0x0 1. "RX_TAP_SEL_ACK,None" "?,B_0x1" bitfld.long 0x0 0. "LOCK,None" "?,B_0x1" group.long 0x808++0x3 line.long 0x0 "SYSCFG_SDMMC2CR,SYSCFG SDMMC2 control register" bitfld.long 0x0 0. "SDMMC2_VSEL,Voltage selection" "B_0x0,B_0x1" group.long 0xC00++0x3 line.long 0x0 "SYSCFG_DLYBSD3CR,SYSCFG DLYBSD3 control register" bitfld.long 0x0 22. "ANTIGLITCH_EN,Anti-glitch logic enable" "?,B_0x1" hexmask.long.byte 0x0 17.--21. 1. "BYP_CMD,Delay unit when in DLL bypass mode" newline bitfld.long 0x0 16. "BYP_EN,DLL bypass mode enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 1.--6. 1. "RX_TAP_SEL,TAP delay for RX clock selection" newline bitfld.long 0x0 0. "EN,None" "?,B_0x1" rgroup.long 0xC04++0x3 line.long 0x0 "SYSCFG_DLYBSD3SR,SYSCFG DLYBSD3 status register" bitfld.long 0x0 1. "RX_TAP_SEL_ACK,None" "?,B_0x1" bitfld.long 0x0 0. "LOCK,None" "?,B_0x1" group.long 0x1000++0x3 line.long 0x0 "SYSCFG_DLYBOS1CR,SYSCFG DLYBOS1 control register" hexmask.long.byte 0x0 17.--21. 1. "BYP_CMD,Delay unit when in DLL bypass mode" bitfld.long 0x0 16. "BYP_EN,DLL bypass mode enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 7.--12. 1. "TX_TAP_SEL,TAP delay for TX clock selection" hexmask.long.byte 0x0 1.--6. 1. "RX_TAP_SEL,TAP delay for RX clock selection" newline bitfld.long 0x0 0. "EN,None" "?,B_0x1" rgroup.long 0x1004++0x3 line.long 0x0 "SYSCFG_DLYBOS1SR,SYSCFG DLYBOS1 status register" bitfld.long 0x0 2. "TX_TAP_SEL_ACK,None" "?,B_0x1" bitfld.long 0x0 1. "RX_TAP_SEL_ACK,None" "?,B_0x1" newline bitfld.long 0x0 0. "LOCK,None" "?,B_0x1" group.long 0x1400++0x3 line.long 0x0 "SYSCFG_DLYBOS2CR,SYSCFG DLYBOS2 control register" hexmask.long.byte 0x0 17.--21. 1. "BYP_CMD,Delay unit when in DLL bypass mode" bitfld.long 0x0 16. "BYP_EN,DLL bypass mode enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 7.--12. 1. "TX_TAP_SEL,TAP delay for TX clock selection" hexmask.long.byte 0x0 1.--6. 1. "RX_TAP_SEL,TAP delay for RX clock selection" newline bitfld.long 0x0 0. "EN,e" "?,B_0x1" rgroup.long 0x1404++0x3 line.long 0x0 "SYSCFG_DLYBOS2SR,SYSCFG DLYBOS2 status register" bitfld.long 0x0 2. "TX_TAP_SEL_ACK,None" "?,B_0x1" bitfld.long 0x0 1. "RX_TAP_SEL_ACK,None" "?,B_0x1" newline bitfld.long 0x0 0. "LOCK,None" "?,B_0x1" group.long 0x1800++0x7 line.long 0x0 "SYSCFG_VDERAMCR,SYSCFG video decoder encoder RAM control register" bitfld.long 0x0 0. "VDERAM_EN,VDEC/VENC RAM enable" "B_0x0,B_0x1" line.long 0x4 "SYSCFG_POTTAMPRSTCR,SYSCFG potential tamper reset control register" bitfld.long 0x4 0. "POTTAMPRESETMASK,This bit can be set by software to mask PKA SAES CRYP1/2 and HASH reset in case of potential tamper." "B_0x0,B_0x1" group.long 0x1C00++0x3 line.long 0x0 "SYSCFG_M33SSCR,SYSCFG M33SS control register" bitfld.long 0x0 20. "LOCKSAU,Prevent changes to secure SAU memory regions already programmed." "0,1" bitfld.long 0x0 19. "LOCKNSMPU,Prevent changes to non-secure MPU memory regions already programmed." "0,1" newline bitfld.long 0x0 18. "LOCKSMPU,Prevent changes to programmed secure MPU memory regions." "0,1" bitfld.long 0x0 17. "LOCKNSVTOR,Prevent changes to non-secure vector table base address." "0,1" newline bitfld.long 0x0 16. "LOCKSVTAIRCR,Prevent changes to:" "0,1" hexmask.long.byte 0x0 0.--5. 1. "FPU_IT_EN,Floating point unit interrupt enable" group.long 0x2000++0x37 line.long 0x0 "SYSCFG_ICNQPCR1,SYSCFG ICN QOS priority control register 1" hexmask.long.byte 0x0 28.--31. 1. "SDMMC3_QOS,SDMMC3 read/write channel QoS setting" hexmask.long.byte 0x0 24.--27. 1. "SDMMC2_QOS,SDMMC2 read/write channes QoS setting" newline hexmask.long.byte 0x0 20.--23. 1. "SDMMC1_QOS,SDMMC1 read/write channel QoS setting" hexmask.long.byte 0x0 16.--19. 1. "HPDMA3_QOS,HPDMA3 read/write channel QoS setting" newline hexmask.long.byte 0x0 12.--15. 1. "HPDMA2_QOS,HPDMA2 read/write channel QoS setting" hexmask.long.byte 0x0 8.--11. 1. "HPDMA1_QOS,HPDMA1 read/write channel QoS setting" newline hexmask.long.byte 0x0 4.--7. 1. "TRACE_QOS,TRACE read/write channel QoS setting" hexmask.long.byte 0x0 0.--3. 1. "A35_QOS,Cortex-A35 read/write channel QoS setting" line.long 0x4 "SYSCFG_ICNQPCR2,SYSCFG ICN QOS priority control register 2" hexmask.long.byte 0x4 28.--31. 1. "GPU_QOS,GPU read/write channel QoS setting" hexmask.long.byte 0x4 24.--27. 1. "VDEC_QOS,VDEC read/write channels QoS setting" newline hexmask.long.byte 0x4 20.--23. 1. "VENC_QOS,VENC read/write channels QoS setting" hexmask.long.byte 0x4 16.--19. 1. "LTDC_QOS,LTDC read/write channels QoS setting" newline hexmask.long.byte 0x4 12.--15. 1. "DCMIPP_QOS,DCMIPP write channel QoS setting" hexmask.long.byte 0x4 8.--11. 1. "PCIE_QOS,PCIE read/write channel QoS setting" newline hexmask.long.byte 0x4 4.--7. 1. "USB3DR_QOS,USB3DR read/write channel QoS setting" hexmask.long.byte 0x4 0.--3. 1. "USBH_QOS,USBH read/write channel QoS setting" line.long 0x8 "SYSCFG_ICNEWRCR,SYSCFG ICN early write response control register" bitfld.long 0x8 4. "LTDCR_DCMIPP_EARLY_WR_RSP_ENABLE,LTDC Rotation and DCMIPP early write response enable" "B_0x0,B_0x1" bitfld.long 0x8 3. "SDMMC3_EARLY_WR_RSP_ENABLE,SDMMC3 early write response enable" "B_0x0,B_0x1" newline bitfld.long 0x8 2. "SDMMC2_EARLY_WR_RSP_ENABLE,SDMMC2 early write response enable" "B_0x0,B_0x1" bitfld.long 0x8 1. "SDMMC1_EARLY_WR_RSP_ENABLE,SDMMC1 early write response enable" "B_0x0,B_0x1" newline bitfld.long 0x8 0. "USBH_EARLY_WR_RSP_ENABLE,USBH (OHCI and EHCI) early write response enable" "B_0x0,B_0x1" line.long 0xC "SYSCFG_ICNCGCR,SYSCFG ICN clock gating control register" bitfld.long 0xC 7. "ALWAYS_ON_CLK_ICN_VID,When set to 1 ICN automatic clock gating on clk_icn_vid domain is off." "0,1" bitfld.long 0xC 5. "ALWAYS_ON_CLK_ICN_SDMMC,When set to 1 ICN automatic clock gating on clk_icn_sdmmc domain is off." "0,1" newline bitfld.long 0xC 4. "ALWAYS_ON_CLK_ICN_SYSATB,When set to 1 ICN automatic clock gating on clk_icn_sysatb domain is off." "0,1" bitfld.long 0xC 3. "ALWAYS_ON_CLK_ICN_MCU,When set to 1 ICN automatic clock gating on clk_icn_mcu domain is off." "0,1" newline bitfld.long 0xC 2. "ALWAYS_ON_CLK_ICN_HSL,When set to 1 ICN automatic clock gating on clk_icn_hsl domain is off." "0,1" bitfld.long 0xC 1. "ALWAYS_ON_CLK_ICN_DISPLAY,When set to 1 ICN automatic clock gating on clk_icn_display domain is off." "0,1" newline bitfld.long 0xC 0. "ALWAYS_ON_CLK_ICN_DDR,When set to 1 ICN automatic clock gating on clk_icn_ddr domain is off." "0,1" line.long 0x10 "SYSCFG_ICNGPUBWLCR,SYSCFG ICN GPU bandwidth limiter control register" hexmask.long.byte 0x10 8.--15. 1. "MAXABW,Maximum allowed Bandwidth" bitfld.long 0x10 2.--3. "PMRSTDLY,Panic Mode Restart Delay" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x10 1. "BWLEN,Bandwidth limiter enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "PMEN,Panic Mode Enable" "B_0x0,B_0x1" line.long 0x14 "SYSCFG_ICNE2EBWRCR,SYSCFG ICN end-to-end bandwidth regulation control register" bitfld.long 0x14 9. "CFG_HPDMA_BW,Triple the bandwidth (BW) allowed to HPDMA1/2/3 by the regulation." "B_0x0,B_0x1" bitfld.long 0x14 8. "CFG_CPU1_BW,Triple the bandwidth allowed to the CPU1 by the regulation." "B_0x0,B_0x1" newline bitfld.long 0x14 4.--6. "CFG_ALL_TGT,Amount of empty CAM slots in DDR-CTRL that the regulation targets" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x14 1.--2. "CFG_MODEL,Defines the reactivity of the regulation feedback." "B_0x0,?,?,B_0x3" newline bitfld.long 0x14 0. "CFG_ENABLE,Activates the end-to-end bandwidth regulation." "B_0x0,B_0x1" line.long 0x18 "SYSCFG_SAFERSTCR,SYSCFG safe reset control register" bitfld.long 0x18 0. "CFG_ENABLE,Activates the safe reset connector." "B_0x0,B_0x1" line.long 0x1C "SYSCFG_ICNPCIBWLCR,SYSCFG ICN PCI bandwidth limiter control register" hexmask.long.byte 0x1C 8.--15. 1. "MAXABW,Maximum allowed Bandwidth" bitfld.long 0x1C 1. "BWLEN,Bandwidth limiter enable" "B_0x0,B_0x1" line.long 0x20 "SYSCFG_ICNETHBWLCR,SYSCFG ICN ETH bandwidth limiter control register" hexmask.long.byte 0x20 8.--15. 1. "MAXABW,Maximum allowed Bandwidth" bitfld.long 0x20 1. "BWLEN,Bandwidth limiter enable" "B_0x0,B_0x1" line.long 0x24 "SYSCFG_ICNUSB3BWLCR,SYSCFG ICN USB3 bandwidth limiter control register" hexmask.long.byte 0x24 8.--15. 1. "MAXABW,Maximum allowed Bandwidth" bitfld.long 0x24 1. "BWLEN,Bandwidth limiter enable" "B_0x0,B_0x1" line.long 0x28 "SYSCFG_ICNCPU1BWLCR,SYSCFG ICN CPU1 bandwidth limiter control register" hexmask.long.byte 0x28 8.--15. 1. "MAXABW,Maximum allowed Bandwidth" bitfld.long 0x28 1. "BWLEN,Bandwidth limiter enable" "B_0x0,B_0x1" line.long 0x2C "SYSCFG_ICNLTDCBWLCR,SYSCFG ICN LTDC bandwidth limiter control register" hexmask.long.byte 0x2C 8.--15. 1. "MAXABW,Maximum allowed Bandwidth" bitfld.long 0x2C 1. "BWLEN,Bandwidth limiter enable" "B_0x0,B_0x1" line.long 0x30 "SYSCFG_ICNDCMIPPBWLCR,SYSCFG ICN DCMIPP bandwidth limiter control register" hexmask.long.byte 0x30 8.--15. 1. "MAXABW,Maximum allowed Bandwidth" bitfld.long 0x30 1. "BWLEN,Bandwidth limiter enable" "B_0x0,B_0x1" line.long 0x34 "SYSCFG_ICNVDEBWLCR,SYSCFG ICN Video Decoder Encoder bandwidth limiter control register" hexmask.long.byte 0x34 8.--15. 1. "MAXABW,Maximum allowed Bandwidth" bitfld.long 0x34 1. "BWLEN,Bandwidth limiter enable" "B_0x0,B_0x1" group.long 0x2400++0x7 line.long 0x0 "SYSCFG_USB2PHY1CR,SYSCFG USB2PHY1 control register" bitfld.long 0x0 4.--6. "USB2PHY1SEL,PHY reference clock speed setting" "B_0x0,B_0x1,B_0x2,?,?,?,?,?" bitfld.long 0x0 2. "USB2PHY1CMN,Controls power down of analog blocks during Suspend and Sleep." "B_0x0,B_0x1" newline bitfld.long 0x0 1. "AUTORSMENB1,Auto-resume mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "RETENABLEN1,Retention mode enable (active low)" "B_0x0,B_0x1" line.long 0x4 "SYSCFG_USB2PHY1BCCR,SYSCFG USB2PHY1 battery charging control register" bitfld.long 0x4 3. "H_FORCEBCMODE,Forces USB2PHY1 in non-driving suspend mode." "B_0x0,B_0x1" bitfld.long 0x4 2. "H_VDMSRCEN,Voltage source on DM for CDP port enable" "B_0x0,B_0x1" newline bitfld.long 0x4 1. "H_CDPDETEN,Voltage detector on DP for CDP port enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "H_CDPEN,CDP behavior for Host port enable" "B_0x0,B_0x1" rgroup.long 0x2408++0x3 line.long 0x0 "SYSCFG_USB2PHY1BCSR,SYSCFG USB2PHY1 battery charging status register" bitfld.long 0x0 2. "FSVMINUS,Voltage level on DM (also output of the comparison with VLGC threshold as defined in BC v1." "B_0x0,B_0x1" bitfld.long 0x0 1. "FSVPLUS,Voltage level on DP (also output of the comparison with VLGC threshold as defined in BC v1." "B_0x0,B_0x1" newline bitfld.long 0x0 0. "CHGDET,Comparison of voltage on DP with VDAT_REF threshold as defined in BC v1." "B_0x0,B_0x1" group.long 0x240C++0x7 line.long 0x0 "SYSCFG_USB2PHY1TRIM1CR,SYSCFG USB2PHY1 trimming 1 control register" bitfld.long 0x0 29.--30. "USB2PHY1TXRESTUNE,USB source impedance adjustment" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 27.--28. "USB2PHY1TXRISETUNE,High-speed transmitter rise/fall time adjustment" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x0 23.--26. 1. "USB2PHY1TXVREFTUNE,HS DC voltage level adjustment" hexmask.long.byte 0x0 19.--22. 1. "USB2PHY1TXFSLSTUNE,Full-speed (FS)/low-speed (LS) source impedance adjustment" newline bitfld.long 0x0 17.--18. "USB2PHY1TXHSXVTUNE,Transmitter high-speed crossover adjustment" "?,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--16. "USB2PHY1OTGTUNE,Vless thansub>BUSless than/sub> valid threshold adjustment" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x0 12.--13. "USB2PHY1VDATREFTUNE,Data detect voltage adjustment" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 9.--11. "USB2PHY1SQRXTUNE,Squelch threshold adjustment" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x0 6.--8. "USB2PHY1COMPDISTUNE,Disconnect threshold adjustment" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0x0 2.--5. 1. "USB2PHY1PLLPTUNE,PLL proportional path tune" newline bitfld.long 0x0 0.--1. "USB2PHY1PLLITUNE,PLL integral path tune" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "SYSCFG_USB2PHY1TRIM2CR,SYSCFG USB2PHY1 trimming 2 control register" bitfld.long 0x4 2. "USB2PHY1TXPREEMPPULSETUNE,HS transmitter preemphasis duration control" "B_0x0,B_0x1" bitfld.long 0x4 0.--1. "USB2PHY1TXPREEMPAMPTUNE,HS transmitter preemphasis current control" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x2420++0x3 line.long 0x0 "SYSCFG_USBHCR,SYSCFG USBH control register" bitfld.long 0x0 1. "USBH_VBUSEN_POLARITY,Polarity of USBH_VBUSEN alternate function" "B_0x0,B_0x1" bitfld.long 0x0 0. "USBH_OVRCUR_POLARITY,Polarity of USBH_OVRCUR alternate function" "B_0x0,B_0x1" group.long 0x2800++0x3 line.long 0x0 "SYSCFG_USB2PHY2CR,SYSCFG USB2PHY2 control register" bitfld.long 0x0 17. "DRVVBUS0,Control bit for VBUS valid comparator in USB2PHY2" "B_0x0,B_0x1" bitfld.long 0x0 16. "OTGDISABLE0,Disable control bit for VBUS valid comparator in USB2PHY2" "B_0x0,B_0x1" newline bitfld.long 0x0 12.--14. "USB2PHY2SEL,PHY reference clock speed setting" "B_0x0,B_0x1,B_0x2,?,?,?,?,?" hexmask.long.byte 0x0 7.--10. 1. "FILTER_BYPASS,Internal debounce logic enable (default)" newline bitfld.long 0x0 6. "VBUSVLDEXT,Voltage comparison result when an external voltage comparator is used" "B_0x0,B_0x1" bitfld.long 0x0 5. "VBUSVLDEXTSEL,VBUS valid comparator used when USB3DR controller is in device mode" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "VBUSVALID,Control of VBUS valid input of USB3DR controller when in Host mode" "B_0x0,B_0x1" bitfld.long 0x0 2. "USB2PHY2CMN,Control of power down of analog blocks during Suspend and Sleep" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "AUTORSMENB2,Auto-resume mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "RETENABLEN2,Retention mode enable (active low)" "B_0x0,B_0x1" group.long 0x2808++0x7 line.long 0x0 "SYSCFG_USB2PHY2TRIM1CR,SYSCFG USB2PHY2 trimming 1 control register" bitfld.long 0x0 29.--30. "USB2PHY2TXRESTUNE,USB source impedance adjustment" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 27.--28. "USB2PHY2TXRISETUNE,HS transmitter rise/fall time adjustment" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x0 23.--26. 1. "USB2PHY2TXVREFTUNE,HS DC voltage level adjustment" hexmask.long.byte 0x0 19.--22. 1. "USB2PHY2TXFSLSTUNE,Full-speed (FS)/low-speed (LS) source impedance adjustment" newline bitfld.long 0x0 17.--18. "USB2PHY2TXHSXVTUNE,Transmitter HS crossover adjustment" "?,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 14.--16. "USB2PHY2OTGTUNE,VBUS valid threshold adjustment" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x0 12.--13. "USB2PHY2VDATREFTUNE,Data detect voltage adjustment" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 9.--11. "USB2PHY2SQRXTUNE,Squelch threshold adjustment" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x0 6.--8. "USB2PHY2COMPDISTUNE,Disconnect threshold adjustment" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" hexmask.long.byte 0x0 2.--5. 1. "USB2PHY2PLLPTUNE,PLL proportional path tune" newline bitfld.long 0x0 0.--1. "USB2PHY2PLLITUNE,PLL integral path tune" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "SYSCFG_USB2PHY2TRIM2CR,SYSCFG USB2PHY2 trimming 2 control register" bitfld.long 0x4 2. "USB2PHY2TXPREEMPPULSETUNE,HS transmitter preemphasis duration control" "B_0x0,B_0x1" bitfld.long 0x4 0.--1. "USB2PHY2TXPREEMPAMPTUNE,HS transmitter preemphasis current control" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x2C00++0x3 line.long 0x0 "SYSCFG_OCTOSPIAMCR,SYSCFG OCTOSPI address mapping control register" bitfld.long 0x0 0.--2. "OCTOSPI_ADDRESS_MAPPING,OCTOSPI1 and OCTOSPI2 address mapping" "B_0x0,B_0x1,B_0x2,B_0x3,?,?,?,?" group.long 0x3000++0x3 line.long 0x0 "SYSCFG_ETH1CR,SYSCFG Ethernet1 control register" bitfld.long 0x0 4.--6. "ETH1_SEL,Ethernet 1 PHY interface selection" "B_0x0,B_0x1,?,?,B_0x4,?,?,?" bitfld.long 0x0 2. "ETH1_PTP_CLK_SEL,PTP (IEEE1588) clock selection" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "ETH1_CLK_SEL,RGMII 125 MHz clock selection" "B_0x0,B_0x1" bitfld.long 0x0 0. "ETH1_REF_CLK_SEL,Ethernet reference/RX clock selection" "B_0x0,B_0x1" rgroup.long 0x3010++0x3 line.long 0x0 "SYSCFG_ETH1SR,SYSCFG Ethernet1 status register" bitfld.long 0x0 1. "ETH1_PWR_DOWN_ACK,Asserted when the power-down sequence start has been acknowledged" "0,1" bitfld.long 0x0 0. "ETH1_TX_CLK_GATING_CTRL,Asserted when the MAC has entered Tx LPI mode" "0,1" group.long 0x3400++0x3 line.long 0x0 "SYSCFG_ETH2CR,SYSCFG Ethernet2 configuration register" bitfld.long 0x0 4.--6. "ETH2_SEL,Ethernet 2 PHY interface selection" "B_0x0,B_0x1,?,?,B_0x4,?,?,?" bitfld.long 0x0 2. "ETH2_PTP_CLK_SEL,PTP (IEEE1588) clock selection" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "ETH2_CLK_SEL,RGMII 125MHz clock selection" "B_0x0,B_0x1" bitfld.long 0x0 0. "ETH2_REF_CLK_SEL,Reference/RX clock selection" "B_0x0,B_0x1" rgroup.long 0x3410++0x3 line.long 0x0 "SYSCFG_ETH2SR,SYSCFG Ethernet2 status register" bitfld.long 0x0 1. "ETH2_PWR_DOWN_ACK,Asserted when the power-down sequence start has been acknowledged" "0,1" bitfld.long 0x0 0. "ETH2_TX_CLK_GATING_CTRL,Asserted when the MAC has entered Tx LPI mode" "0,1" group.long 0x3800++0x3 line.long 0x0 "SYSCFG_ETHSWCR,SYSCFG Ethernet switch configuration register" bitfld.long 0x0 3. "ETHSW_REF_SEL,Clock source selection for RMII 50 MHz" "B_0x0,B_0x1" bitfld.long 0x0 2. "ETHSW_CLK_SEL,Clock source selection for 125 MHz" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "ETHSW_CFG_IF_SEL,PHY interface type selection for external ports" "B_0x0,B_0x1" bitfld.long 0x0 0. "ETH1_DIRECT,Ethernet switch bypass" "B_0x0,B_0x1" group.long 0x4000++0x3 line.long 0x0 "SYSCFG_VDDIO3CCCR,SYSCFG VDDIO3 compensation cell control register" bitfld.long 0x0 10. "LPMDIS,I/Os supplied by Vless thansub>DDIO3less than/sub> compensation cell low power mode disable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CS,I/Os supplied by Vless thansub>DDIO3less than/sub> code selection" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "EN,I/Os supplied by Vless thansub>DDIO3less than/sub> compensation cell enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "RAPSRC,PMOS compensation code of the I/Os supplied by Vless thansub>DDIO3less than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "RANSRC,NMOS compensation code of the I/Os supplied by Vless thansub>DDIO3less than/sub>" rgroup.long 0x4004++0x3 line.long 0x0 "SYSCFG_VDDIO3CCSR,SYSCFG VDDIO3 compensation cell status register" bitfld.long 0x0 8. "READY,Vless thansub>DDIO3 less than/sub>I/O compensation cell ready flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "APSRC,PMOS compensation value of the I/Os supplied by Vless thansub>DDIO3less than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "ANSRC,NMOS compensation value of the I/Os supplied by Vless thansub>DDIO3less than/sub>" group.long 0x4008++0x3 line.long 0x0 "SYSCFG_VDDIO4CCCR,SYSCFG VDDIO4 compensation cell control register" bitfld.long 0x0 10. "LPMDIS,I/Os supplied by Vless thansub>DDIO4less than/sub> compensation cell low power mode disable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CS,Vless thansub>DDIO4less than/sub> I/O code selection" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "EN,Vless thansub>DDIO4less than/sub> I/O compensation cell enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "RAPSRC,PMOS compensation code of the I/Os supplied by Vless thansub>DDIO4less than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "RANSRC,NMOS compensation code of the I/Os supplied by Vless thansub>DDIO4less than/sub>" rgroup.long 0x400C++0x3 line.long 0x0 "SYSCFG_VDDIO4CCSR,SYSCFG VDDIO4 compensation cell status register" bitfld.long 0x0 8. "READY,Vless thansub>DDIO4 less than/sub>I/O compensation cell ready flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "APSRC,PMOS compensation value of the I/Os supplied by Vless thansub>DDIO4less than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "ANSRC,NMOS compensation value of the I/Os supplied by Vless thansub>DDIO4less than/sub>" group.long 0x4010++0x3 line.long 0x0 "SYSCFG_VDDCCCR,SYSCFG VDD compensation cell control register" bitfld.long 0x0 10. "LPMDIS,I/Os supplied by Vless thansub>DDless than/sub> compensation cell low power mode disable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CS,Vless thansub>DDless than/sub> I/O code selection" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "EN,Vless thansub>DDless than/sub> I/O compensation cell enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "RAPSRC,PMOS compensation code of the I/Os supplied by Vless thansub>DDless than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "RANSRC,NMOS compensation code of the I/Os supplied by Vless thansub>DDless than/sub>" rgroup.long 0x4014++0x3 line.long 0x0 "SYSCFG_VDDCCSR,SYSCFG VDD compensation cell status register" bitfld.long 0x0 8. "READY,Vless thansub>DD less than/sub>I/O compensation cell ready flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "APSRC,PMOS compensation value of the I/Os supplied by Vless thansub>DDless than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "ANSRC,NMOS compensation value of the I/Os supplied by Vless thansub>DDless than/sub>" group.long 0x4018++0x3 line.long 0x0 "SYSCFG_VDDIO2CCCR,SYSCFG VDDIO2 compensation cell control register" bitfld.long 0x0 10. "LPMDIS,I/Os supplied by Vless thansub>DDIO2less than/sub> compensation cell low power mode disable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CS,Vless thansub>DDIO2less than/sub> I/O code selection" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "EN,Vless thansub>DDIO2less than/sub> I/O compensation cell enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "RAPSRC,PMOS compensation code of the I/Os supplied by Vless thansub>DDIO2less than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "RANSRC,NMOS compensation code of the I/Os supplied by Vless thansub>DDIO2less than/sub>" rgroup.long 0x401C++0x3 line.long 0x0 "SYSCFG_VDDIO2CCSR,SYSCFG VDDIO2 compensation cell status register" bitfld.long 0x0 8. "READY,Vless thansub>DDIO2 less than/sub>I/O compensation cell ready flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "APSRC,PMOS compensation value of the I/Os supplied by Vless thansub>DDIO2less than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "ANSRC,NMOS compensation value of the I/Os supplied by Vless thansub>DDIO2less than/sub>" group.long 0x4020++0x3 line.long 0x0 "SYSCFG_VDDIO1CCCR,SYSCFG VDDIO1 compensation cell control register" bitfld.long 0x0 10. "LPMDIS,I/Os supplied by Vless thansub>DDIO1less than/sub> compensation cell low power mode disable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CS,Vless thansub>DDIO1less than/sub> I/O code selection" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "EN,Vless thansub>DDIO1less than/sub> I/O compensation cell enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "RAPSRC,PMOS compensation code of the I/Os supplied by Vless thansub>DDIO1less than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "RANSRC,NMOS compensation code of the I/Os supplied by Vless thansub>DDIO1less than/sub>" rgroup.long 0x4024++0x3 line.long 0x0 "SYSCFG_VDDIO1CCSR,SYSCFG VDDIO1 compensation cell status register" bitfld.long 0x0 8. "READY,Vless thansub>DDIO1 less than/sub>I/O compensation cell ready flag" "B_0x0,B_0x1" hexmask.long.byte 0x0 4.--7. 1. "APSRC,PMOS compensation value of the I/Os supplied by Vless thansub>DDIO1less than/sub>" newline hexmask.long.byte 0x0 0.--3. 1. "ANSRC,NMOS compensation value of the I/Os supplied by Vless thansub>DDIO1less than/sub>" group.long 0x4400++0x3 line.long 0x0 "SYSCFG_CBR,SYSCFG control timer break register" bitfld.long 0x0 4. "RETRAML,RETRAM double ECC error lock" "B_0x0,B_0x1" bitfld.long 0x0 3. "BKRAML,BKPSRAM double ECC error lock" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "PVDL,PVD lock enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "CLL,Cortex-M33 LOCKUP (HardFault) output enable" "B_0x0,B_0x1" group.long 0x4800++0x3 line.long 0x0 "SYSCFG_USB3DRCR,SYSCFG USB3DR control register" bitfld.long 0x0 11. "USB3DR_NOTPCIE_DEBUG_BUS,Selection of USB3DR or PCIE debug signals" "B_0x0,B_0x1" bitfld.long 0x0 8.--10. "USB3DR_DEBUG_BUS_SEL,Selection of USB3DR/USBH debug signals" "B_0x0,B_0x1,B_0x2,B_0x3,?,?,?,?" newline bitfld.long 0x0 4. "USB3DR_USB2ONLYD,None" "B_0x0,B_0x1" bitfld.long 0x0 3. "USB3DR_USB2ONLYH,None" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "USB3DR_VBUSEN_POLARITY,Polarity of USB3DR_VBUSEN alternate function" "B_0x0,B_0x1" bitfld.long 0x0 1. "USB3DR_OVRCUR_POLARITY,Polarity of USB3DR_OVRCUR alternate function" "B_0x0,B_0x1" newline bitfld.long 0x0 0. "USB3DR_HOST_PORT_POWER_CONTROL_PRESENT,This port defines the bit[3] of capability parameters (HCCPARAMS)." "B_0x0,B_0x1" rgroup.long 0x4804++0x3 line.long 0x0 "SYSCFG_USB3DRSR,SYSCFG USB3DR status register" bitfld.long 0x0 0.--2. "USB3DR_CLK_GATE_CTRL,USB3DR debug register - Clock gating control" "0,1,2,3,4,5,6,7" group.long 0x4C00++0x13 line.long 0x0 "SYSCFG_COMBOPHYCR1,SYSCFG COMBOPHY control register 1" bitfld.long 0x0 20.--22. "COMBOPHY_SSCRANGE,Selection of the range of spread-spectrum modulation" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 19. "COMBOPHY_SSCEN,Spread-spectrum enable" "B_0x0,B_0x1" newline bitfld.long 0x0 18. "COMBOPHY_REFSSPEN,Reference clock enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "COMBOPHY_REFCLKDIV2,Parameter for the frequency selection of the reference clock" "B_0x0,B_0x1" newline hexmask.long.word 0x0 8.--16. 1. "COMBOPHY_SSCREFCLKSEL,Parameter for reference clock frequency selection" hexmask.long.byte 0x0 1.--7. 1. "COMBOPHY_MPLLMULTIPLIER,Parameter for reference clock frequency selection" newline bitfld.long 0x0 0. "COMBOPHY_REFUSEPAD,Selection of COMBOPHY reference clock source" "B_0x0,B_0x1" line.long 0x4 "SYSCFG_COMBOPHYCR2,SYSCFG COMBOPHY control register 2" bitfld.long 0x4 31. "COMBOPHY_TEST_POWERDOWN,Forces the entire PHY into its lowest power state by turning everything off." "0,1" bitfld.long 0x4 15. "COMBOPHY_ISO_DIS,COMBOPHY isolation cells disable" "B_0x0,B_0x1" newline bitfld.long 0x4 0.--1. "COMBOPHY_MODESEL,COMBOPHY mode selection" "B_0x0,?,?,B_0x3" line.long 0x8 "SYSCFG_COMBOPHYCR3,SYSCFG COMBOPHY control register 3" bitfld.long 0x8 30. "COMBOPHY_RTUNE_REQ,Instructs COMBOPHY to perform a termination calibration." "B_0x0,B_0x1" bitfld.long 0x8 29. "COMBOPHY_RXLOSLFPSEN,Enables the RX LOS LFPS mode." "0,1" newline hexmask.long.byte 0x8 22.--28. 1. "COMBOPHY_PCSTXSWINGFULL,TX amplitude (full swing mode)" hexmask.long.byte 0x8 16.--21. 1. "COMBOPHY_PCSTXDEEMPH6DB,TX deemphasis at 6 dB (USB3 use case)" newline hexmask.long.byte 0x8 10.--15. 1. "COMBOPHY_PCSTXDEEMPH3P5DB,TX deemphasis at 3." hexmask.long.word 0x8 0.--9. 1. "COMBOPHY_PCSRXLOSMASKVAL,Masks the incoming LFPS for the number of reference clock cycles equal to the value of this bit field." line.long 0xC "SYSCFG_COMBOPHYCR4,SYSCFG COMBOPHY control register 4" bitfld.long 0xC 29.--31. "COMBOPHY_TX_VBOOST_LEVEL,TX voltage boost level" "?,?,?,B_0x3,B_0x4,B_0x5,?,?" hexmask.long.byte 0xC 24.--28. 1. "COMBOPHY_TX_TERM_OFFSET,Transmitter termination offset" newline hexmask.long.byte 0xC 17.--23. 1. "COMBOPHY_PCS_TX_SWING_LOW,TX amplitude (low swing mode) (PCIE use case)" hexmask.long.byte 0xC 11.--16. 1. "COMBOPHY_PCS_TX_DEEMPH_GEN1,TX deemphasis at 3." newline bitfld.long 0xC 8.--10. "COMBOPHY_LOS_BIAS,Loss-of-signal detector threshold level control" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 3.--7. 1. "COMBOPHY_LOS_LEVEL,Loss-of-signal detector sensitivity level control" newline bitfld.long 0xC 0.--2. "COMBOPHY_RX0_EQ,RX equalizer setting" "0,1,2,3,4,5,6,7" line.long 0x10 "SYSCFG_COMBOPHYCR5,SYSCFG COMBOPHY control register 5" bitfld.long 0x10 15. "COMBOPHY_PIPE0_TX2RX_LOOPBK,PCIE use case" "0,1" bitfld.long 0x10 14. "COMBOPHY_LANE0_TX2RX_LOOPBK,USB3 use case" "0,1" newline bitfld.long 0x10 13. "COMBOPHY_LANE0_EXT_PCLK_REQ,USB3 use case" "0,1" bitfld.long 0x10 12. "COMBOPHY_PCS_COMMON_CLOCKS,Common clock mode selection for PCIE receive data path" "B_0x0,B_0x1" newline hexmask.long.byte 0x10 6.--11. 1. "COMBOPHY_PCS_TX_DEEMPH_GEN2_6DB,TX deemphasis at 6 dB (PCIE gen2 use case)" hexmask.long.byte 0x10 0.--5. 1. "COMBOPHY_PCS_TX_DEEMPH_GEN2_3P5DB,TX deemphasis at 3." rgroup.long 0x4C14++0x3 line.long 0x0 "SYSCFG_COMBOPHYSR,SYSCFG COMBOPHY status register" bitfld.long 0x0 1. "COMBOPHY_PIPE0_PHYSTATUS,Communicates completion of several PHY functions." "B_0x0,B_0x1" bitfld.long 0x0 0. "COMBOPHY_RTUNE_ACK,End of the termination calibration step" "B_0x0,B_0x1" group.long 0x5000++0x3 line.long 0x0 "SYSCFG_DISPLAYCLKCR,SYSCFG display clock control register" bitfld.long 0x0 0.--1. "PIXEL_CLK_SEL,Control of pixel clock output selection" "B_0x0,B_0x1,B_0x2,?" group.long 0x6000++0x13 line.long 0x0 "SYSCFG_PCIECR,SYSCFG PCIE control register" bitfld.long 0x0 25. "APP_DBI_RO_WR_DISABLE,DBI read-only write disable" "B_0x0,B_0x1" hexmask.long.byte 0x0 17.--24. 1. "APP_BUS_NUM,Bus number in the requester ID for RC port" newline hexmask.long.byte 0x0 12.--16. 1. "APP_DEV_NUM,Device number in the requester ID for an RC port" hexmask.long.byte 0x0 8.--11. 1. "DEVICE_TYPE,Device/port type" newline bitfld.long 0x0 7. "APP_CLK_REQ_N,Clear this bit to 0 if the application does not want to remove the reference clock." "0,1" bitfld.long 0x0 5.--6. "DEBUG_BUS_SEL,Selection of PCIE observation points" "0,1,2,3" newline bitfld.long 0x0 4. "SYS_INT,When pcie_sys_int goes from low to high the PCIE controller generates an Assert_INTx message." "0,1" bitfld.long 0x0 3. "APP_REQ_RETRY_EN,Provides a capability to defer incoming configuration requests until initialization is complete (only for endpoint)." "0,1" newline bitfld.long 0x0 2. "APP_LTSSM_ENABLE,After application has finished initializing the core configuration registers it must assert this bit to allow the LTSSM to continue link establishment." "0,1" bitfld.long 0x0 1. "APP_INIT_RST,Requests from the application to send a hot reset to the downstream device (only for RootComplex)." "0,1" line.long 0x4 "SYSCFG_PCIEPMEMSICR,SYSCFG PCIE CFG_PME_MSI control register" bitfld.long 0x4 0. "RST_CFG_PME_MSI_INT,Reset pcie_cfg_pme_msi interrupt logic" "B_0x0,B_0x1" line.long 0x8 "SYSCFG_PCIEAERRCMSICR,SYSCFG PCIE CFG_AER_RC_ERR_MSI control register" bitfld.long 0x8 0. "RST_CFG_AER_RC_ERR_MSI_INT,Reset pcie_cfg_aer_rc_err_msi interrupt logic" "B_0x0,B_0x1" line.long 0xC "SYSCFG_PCIESYSRCCR,SYSCFG PCIE CFG_SYS_ERR_RC control register" bitfld.long 0xC 31. "RST_RADM_QOVERFLOW,Reset radm_qoverflow interrupt logic" "B_0x0,B_0x1" bitfld.long 0xC 2. "RST_CFG_BW_MGT_MSI_INT,Reset cfg_bw_mgt_msi interrupt logic" "B_0x0,B_0x1" newline bitfld.long 0xC 1. "RST_CFG_LINK_AUTO_BW_MSI_INT,Reset cfg_link_auto_bw_msi interrupt logic" "B_0x0,B_0x1" bitfld.long 0xC 0. "RST_CFG_SYS_ERR_RC_INT,Reset pcie_cfg_sys_err_rc interrupt logic" "B_0x0,B_0x1" line.long 0x10 "SYSCFG_PCIEPTMIRQCR,SYSCFG PCIE PTM interrupt control register" bitfld.long 0x10 3. "RST_PTM_REQ_REPLAY_TX,Reset ptm_req_replay_rx interrupt logic" "B_0x0,B_0x1" bitfld.long 0x10 2. "RST_PTM_REQ_DUP_RX,Reset ptm_req_dup_rx interrupt logic" "B_0x0,B_0x1" newline bitfld.long 0x10 1. "RST_PTM_REQ_RESPONSE_TIMEOUT,Reset ptm_req_response_timeout interrupt logic" "B_0x0,B_0x1" bitfld.long 0x10 0. "RST_PTM_CLOCK_UPDATED,Reset ptm_clock_updated interrupt logic" "B_0x0,B_0x1" group.long 0x6080++0x3 line.long 0x0 "SYSCFG_PCIEPRGCR,SYSCFG PCIE PRG control register" hexmask.long.byte 0x0 1.--5. 1. "PRG_IMP_CTRL,Control of the impedance of the 100 MHz differential output buffer" bitfld.long 0x0 0. "PRG_EN,None" "B_0x0,B_0x1" rgroup.long 0x6100++0x7 line.long 0x0 "SYSCFG_PCIESR1,SYSCFG PCIE status register 1" bitfld.long 0x0 21. "PTM_RESPONDER_RDY_TO_VALIDATE,Application software can re-validate the context because it was invalidated." "0,1" bitfld.long 0x0 20. "PTM_UPDATING,PTM update in progress" "0,1" newline bitfld.long 0x0 19. "PTM_CLOCK_UPDATED,Controller updated the local clock." "0,1" bitfld.long 0x0 18. "PTM_REQ_RESPONSE_TIMEOUT,PTM requester response timeout" "0,1" newline bitfld.long 0x0 17. "PTM_REQ_DUP_RX,PTM requester duplicate TLP received" "0,1" bitfld.long 0x0 16. "PTM_REQ_REPLAY_TX,PTM requester detected a TLP replay being sent when responseD message in use and one of the following:" "0,1" newline bitfld.long 0x0 15. "RADM_QOVERFLOW,Level high indicates that one or more of the P/NP/CPL receive queues has overflowed." "0,1" bitfld.long 0x0 14. "RADM_Q_NOT_EMPTY,Level high indicates that the receive queues contain TLP header/data." "0,1" newline bitfld.long 0x0 13. "CFG_AER_RC_ERR_INT,pcie_1_cfg_aer_rc_err interrupt" "0,1" bitfld.long 0x0 12. "CFG_PME_INT,pcie_1_cfg_pme interrupt" "0,1" newline bitfld.long 0x0 11. "INTA_INTERRUPT,pcie_1_inta interrupt" "0,1" bitfld.long 0x0 10. "INTB_INTERRUPT,pcie_1_intb interrupt" "0,1" newline bitfld.long 0x0 9. "INTC_INTERRUPT,pcie_1_intc interrupt" "0,1" bitfld.long 0x0 8. "INTD_INTERRUPT,pcie_1_intd interrupt" "0,1" newline bitfld.long 0x0 6. "MSI_CTRL_INT,pcie_1_msi_ctrl_int interrupt" "0,1" bitfld.long 0x0 5. "RDLH_LINK_UP,Data link layer up status for RC application" "0,1" newline bitfld.long 0x0 4. "CFG_HW_AUTO_SP_DIS,Hardware autonomous speed disable" "0,1" bitfld.long 0x0 3. "SMLH_LINK_UP,PHY link up status for RC application" "0,1" newline bitfld.long 0x0 0.--2. "PM_DSTATE,Power management D-state" "0,1,2,3,4,5,6,7" line.long 0x4 "SYSCFG_PCIESR2,SYSCFG PCIE interrupt status register 2" bitfld.long 0x4 2. "CFG_SYS_ERR_RC_INT_STS,Status of PCIE cfg_sys_err_rc interrupt" "0,1" bitfld.long 0x4 1. "CFG_AER_RC_ERR_MSI_INT_STS,Status of PCIE cfg_aer_rc_err_msi interrupt" "0,1" newline bitfld.long 0x4 0. "CFG_PME_MSI_INT_STS,Status of PCIE cfg_pme_msi interrupt" "0,1" rgroup.long 0x6400++0x3 line.long 0x0 "SYSCFG_IDC,SYSCFG device ID register" hexmask.long.word 0x0 16.--31. 1. "MAJOR_REV_ID,Device revision" hexmask.long.word 0x0 0.--11. 1. "DEV_ID,Device ID" rgroup.long 0x7FF4++0xB line.long 0x0 "SYSCFG_VERR,SYSCFG version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,SYSCFG major revision" hexmask.long.byte 0x0 0.--3. 1. "MINREV,SYSCFG minor revision" line.long 0x4 "SYSCFG_IPIDR,SYSCFG identification register" hexmask.long 0x4 0.--31. 1. "ID,SYSCFG identifier" line.long 0x8 "SYSCFG_SIDR,SYSCFG size identification register" hexmask.long 0x8 0.--31. 1. "SID,Size identification" tree.end tree.end endif tree "TAMP (Tamper and Backup)" base ad:0x0 tree "TAMP" base ad:0x46010000 group.long 0x0++0x13 line.long 0x0 "TAMP_CR1,TAMP control register 1" bitfld.long 0x0 30. "ITAMP15E,Internal tamper 15 enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "ITAMP14E,Internal tamper 14 enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "ITAMP12E,Internal tamper 12 enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "ITAMP11E,Internal tamper 11 enable" "B_0x0,B_0x1" bitfld.long 0x0 25. "ITAMP10E,Internal tamper 10 enable" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "ITAMP9E,Internal tamper 9 enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "ITAMP8E,Internal tamper 8 enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ITAMP7E,Internal tamper 7 enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "ITAMP6E,Internal tamper 6 enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "ITAMP5E,Internal tamper 5 enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "ITAMP4E,Internal tamper 4 enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "ITAMP3E,Internal tamper 3 enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "ITAMP2E,Internal tamper 2 enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "ITAMP1E,Internal tamper 1 enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TAMP8E,Tamper detection on TAMP_IN8 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "TAMP7E,Tamper detection on TAMP_IN7 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" bitfld.long 0x0 5. "TAMP6E,Tamper detection on TAMP_IN6 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" bitfld.long 0x0 4. "TAMP5E,Tamper detection on TAMP_IN5 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" bitfld.long 0x0 3. "TAMP4E,Tamper detection on TAMP_IN4 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" bitfld.long 0x0 2. "TAMP3E,Tamper detection on TAMP_IN3 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TAMP2E,Tamper detection on TAMP_IN2 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" bitfld.long 0x0 0. "TAMP1E,Tamper detection on TAMP_IN1 enable" "B_0x0,B_0x1" line.long 0x4 "TAMP_CR2,TAMP control register 2" bitfld.long 0x4 31. "TAMP8TRG,Active level for tamper 8 input (active mode disabled)" "B_0x0,B_0x1" bitfld.long 0x4 30. "TAMP7TRG,Active level for tamper 7 input (active mode disabled)" "B_0x0,B_0x1" bitfld.long 0x4 29. "TAMP6TRG,Active level for tamper 6 input (active mode disabled)" "B_0x0,B_0x1" bitfld.long 0x4 28. "TAMP5TRG,Active level for tamper 5 input (active mode disabled)" "B_0x0,B_0x1" bitfld.long 0x4 27. "TAMP4TRG,Active level for tamper 4 input (active mode disabled)" "B_0x0,B_0x1" newline bitfld.long 0x4 26. "TAMP3TRG,Active level for tamper 3 input" "B_0x0,B_0x1" bitfld.long 0x4 25. "TAMP2TRG,Active level for tamper 2 input" "B_0x0,B_0x1" bitfld.long 0x4 24. "TAMP1TRG,Active level for tamper 1 input" "B_0x0,B_0x1" bitfld.long 0x4 23. "BKERASE,Backup registers and device secretsless thansup>(1)less than/sup> erase" "0,1" bitfld.long 0x4 22. "BKBLOCK,Backup registers and device secretsless thansup>(1)less than/sup> access blocked" "B_0x0,B_0x1" newline bitfld.long 0x4 18. "TAMP3MSK,Tamper 3 mask" "B_0x0,B_0x1" bitfld.long 0x4 17. "TAMP2MSK,Tamper 2 mask" "B_0x0,B_0x1" bitfld.long 0x4 16. "TAMP1MSK,Tamper 1 mask" "B_0x0,B_0x1" bitfld.long 0x4 7. "TAMP8POM,Tamper 8 potential mode" "B_0x0,B_0x1" bitfld.long 0x4 6. "TAMP7POM,Tamper 7 potential mode" "B_0x0,B_0x1" newline bitfld.long 0x4 5. "TAMP6POM,Tamper 6 potential mode" "B_0x0,B_0x1" bitfld.long 0x4 4. "TAMP5POM,Tamper 5 potential mode" "B_0x0,B_0x1" bitfld.long 0x4 3. "TAMP4POM,Tamper 4 potential mode" "B_0x0,B_0x1" bitfld.long 0x4 2. "TAMP3POM,Tamper 3 potential mode" "B_0x0,B_0x1" bitfld.long 0x4 1. "TAMP2POM,Tamper 2 potential mode" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "TAMP1POM,Tamper 1 potential mode" "B_0x0,B_0x1" line.long 0x8 "TAMP_CR3,TAMP control register 3" bitfld.long 0x8 14. "ITAMP15POM,Internal tamper 15 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "ITAMP14POM,Internal tamper 14 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 11. "ITAMP12POM,Internal tamper 12 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 10. "ITAMP11POM,Internal tamper 11 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 9. "ITAMP10POM,Internal tamper 10 potential mode" "B_0x0,B_0x1" newline bitfld.long 0x8 8. "ITAMP9POM,Internal tamper 9 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 7. "ITAMP8POM,Internal tamper 8 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 6. "ITAMP7POM,Internal tamper 7 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 5. "ITAMP6POM,Internal tamper 6 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 4. "ITAMP5POM,Internal tamper 5 potential mode" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "ITAMP4POM,Internal tamper 4 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 2. "ITAMP3POM,Internal tamper 3 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 1. "ITAMP2POM,Internal tamper 2 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 0. "ITAMP1POM,Internal tamper 1 potential mode" "B_0x0,B_0x1" line.long 0xC "TAMP_FLTCR,TAMP filter control register" bitfld.long 0xC 7. "TAMPPUDIS,TAMP_INx pull-up disable" "B_0x0,B_0x1" bitfld.long 0xC 5.--6. "TAMPPRCH,TAMP_INx precharge duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 3.--4. "TAMPFLT,TAMP_INx filter count" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0.--2. "TAMPFREQ,Tamper sampling frequency" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x10 "TAMP_ATCR1,TAMP active tamper control register 1" bitfld.long 0x10 31. "FLTEN,Active tamper filter enable" "B_0x0,B_0x1" bitfld.long 0x10 30. "ATOSHARE,Active tamper output sharing" "B_0x0,B_0x1" bitfld.long 0x10 24.--26. "ATPER,Active tamper output change period" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x10 16.--19. 1. "ATCKSEL,Active tamper RTC asynchronous prescaler clock selection" bitfld.long 0x10 14.--15. "ATOSEL4,Active tamper shared output 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x10 12.--13. "ATOSEL3,Active tamper shared output 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 10.--11. "ATOSEL2,Active tamper shared output 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 8.--9. "ATOSEL1,Active tamper shared output 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "TAMP8AM,Tamper 8 active mode" "B_0x0,B_0x1" bitfld.long 0x10 6. "TAMP7AM,Tamper 7 active mode" "B_0x0,B_0x1" newline bitfld.long 0x10 5. "TAMP6AM,Tamper 6 active mode" "B_0x0,B_0x1" bitfld.long 0x10 4. "TAMP5AM,Tamper 5 active mode" "B_0x0,B_0x1" bitfld.long 0x10 3. "TAMP4AM,Tamper 4 active mode" "B_0x0,B_0x1" bitfld.long 0x10 2. "TAMP3AM,Tamper 3 active mode" "B_0x0,B_0x1" bitfld.long 0x10 1. "TAMP2AM,Tamper 2 active mode" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "TAMP1AM,Tamper 1 active mode" "B_0x0,B_0x1" wgroup.long 0x14++0x3 line.long 0x0 "TAMP_ATSEEDR,TAMP active tamper seed register" hexmask.long 0x0 0.--31. 1. "SEED,Pseudo-random generator seed value" rgroup.long 0x18++0x3 line.long 0x0 "TAMP_ATOR,TAMP active tamper output register" bitfld.long 0x0 15. "INITS,Active tamper initialization status" "0,1" bitfld.long 0x0 14. "SEEDF,Seed running flag" "0,1" hexmask.long.byte 0x0 0.--7. 1. "PRNG,Pseudo-random generator value" group.long 0x1C++0xB line.long 0x0 "TAMP_ATCR2,TAMP active tamper control register 2" bitfld.long 0x0 29.--31. "ATOSEL8,Active tamper shared output 8 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 26.--28. "ATOSEL7,Active tamper shared output 7 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 23.--25. "ATOSEL6,Active tamper shared output 6 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 20.--22. "ATOSEL5,Active tamper shared output 5 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 17.--19. "ATOSEL4,Active tamper shared output 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x0 14.--16. "ATOSEL3,Active tamper shared output 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 11.--13. "ATOSEL2,Active tamper shared output 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 8.--10. "ATOSEL1,Active tamper shared output 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x4 "TAMP_SECCFGR,TAMP secure configuration register" bitfld.long 0x4 31. "TAMPSEC,Tamper protection (excluding monotonic counters and backup registers)" "B_0x0,B_0x1" bitfld.long 0x4 30. "BHKLOCK,Boot hardware key lock" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "BKPWSEC,Backup registers write protection offset" bitfld.long 0x4 15. "CNT1SEC,Monotonic counter 1 secure protection" "B_0x0,B_0x1" bitfld.long 0x4 14. "CNT2SEC,Monotonic counter 2 secure protection" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "BKPRWSEC,Backup registers read/write protection offset" line.long 0x8 "TAMP_PRIVCFGR,TAMP privilege configuration register" bitfld.long 0x8 31. "TAMPPRIV,Tamper privilege protection (excluding backup registers)" "B_0x0,B_0x1" bitfld.long 0x8 30. "BKPWPRIV,Backup registers zone 2 privilege protection" "B_0x0,B_0x1" bitfld.long 0x8 29. "BKPRWPRIV,Backup registers zone 1 privilege protection" "B_0x0,B_0x1" bitfld.long 0x8 15. "CNT1PRIV,Monotonic counter 1 privilege protection" "B_0x0,B_0x1" bitfld.long 0x8 14. "CNT2PRIV,Monotonic counter 2 privilege protection" "B_0x0,B_0x1" group.long 0x2C++0x7 line.long 0x0 "TAMP_IER,TAMP interrupt enable register" bitfld.long 0x0 30. "ITAMP15IE,Internal tamper 15 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "ITAMP14IE,Internal tamper 14 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "ITAMP12IE,Internal tamper 12 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "ITAMP11IE,Internal tamper 11 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 25. "ITAMP10IE,Internal tamper 10 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "ITAMP9IE,Internal tamper 9 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "ITAMP8IE,Internal tamper 8 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ITAMP7IE,Internal tamper 7 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "ITAMP6IE,Internal tamper 6 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "ITAMP5IE,Internal tamper 5 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "ITAMP4IE,Internal tamper 4 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "ITAMP3IE,Internal tamper 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "ITAMP2IE,Internal tamper 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "ITAMP1IE,Internal tamper 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TAMP8IE,Tamper 8 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "TAMP7IE,Tamper 7interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "TAMP6IE,Tamper 6 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "TAMP5IE,Tamper 5 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TAMP4IE,Tamper 4 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "TAMP3IE,Tamper 3 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TAMP2IE,Tamper 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "TAMP1IE,Tamper 1 interrupt enable" "B_0x0,B_0x1" line.long 0x4 "TAMP_SR,TAMP status register" bitfld.long 0x4 30. "ITAMP15F,Internal tamper 15 flag" "0,1" rbitfld.long 0x4 29. "ITAMP14F,Internal tamper 14 flag" "0,1" rbitfld.long 0x4 27. "ITAMP12F,Internal tamper 12 flag" "0,1" rbitfld.long 0x4 26. "ITAMP11F,Internal tamper 11 flag" "0,1" rbitfld.long 0x4 25. "ITAMP10F,Internal tamper 10 flag" "0,1" newline rbitfld.long 0x4 24. "ITAMP9F,Internal tamper 9 flag" "0,1" rbitfld.long 0x4 23. "ITAMP8F,Internal tamper 8 flag" "0,1" rbitfld.long 0x4 22. "ITAMP7F,Internal tamper 7 flag" "0,1" rbitfld.long 0x4 21. "ITAMP6F,Internal tamper 6 flag" "0,1" rbitfld.long 0x4 20. "ITAMP5F,Internal tamper 5 flag" "0,1" newline rbitfld.long 0x4 19. "ITAMP4F,Internal tamper 4 flag" "0,1" rbitfld.long 0x4 18. "ITAMP3F,Internal tamper 3 flag" "0,1" rbitfld.long 0x4 17. "ITAMP2F,Internal tamper 2 flag" "0,1" rbitfld.long 0x4 16. "ITAMP1F,Internal tamper 1 flag" "0,1" rbitfld.long 0x4 7. "TAMP8F,TAMP8 detection flag" "0,1" newline rbitfld.long 0x4 6. "TAMP7F,TAMP7 detection flag" "0,1" rbitfld.long 0x4 5. "TAMP6F,TAMP6 detection flag" "0,1" rbitfld.long 0x4 4. "TAMP5F,TAMP5 detection flag" "0,1" rbitfld.long 0x4 3. "TAMP4F,TAMP4 detection flag" "0,1" rbitfld.long 0x4 2. "TAMP3F,TAMP3 detection flag" "0,1" newline rbitfld.long 0x4 1. "TAMP2F,TAMP2 detection flag" "0,1" rbitfld.long 0x4 0. "TAMP1F,TAMP1 detection flag" "0,1" rgroup.long 0x34++0x7 line.long 0x0 "TAMP_MISR,TAMP nonsecure masked interrupt status register" bitfld.long 0x0 30. "ITAMP15MF,internal tamper 15 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 29. "ITAMP14MF,internal tamper 14 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 27. "ITAMP12MF,internal tamper 12 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 26. "ITAMP11MF,internal tamper 11 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 25. "ITAMP10MF,internal tamper 10 nonsecure interrupt masked flag" "0,1" newline bitfld.long 0x0 24. "ITAMP9MF,internal tamper 9 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 23. "ITAMP8MF,Internal tamper 8 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 22. "ITAMP7MF,Internal tamper 7 tamper nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 21. "ITAMP6MF,Internal tamper 6 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 20. "ITAMP5MF,Internal tamper 5 nonsecure interrupt masked flag" "0,1" newline bitfld.long 0x0 19. "ITAMP4MF,Internal tamper 4 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 18. "ITAMP3MF,Internal tamper 3 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 17. "ITAMP2MF,Internal tamper 2 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 16. "ITAMP1MF,Internal tamper 1 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 7. "TAMP8MF,TAMP8 nonsecure interrupt masked flag" "0,1" newline bitfld.long 0x0 6. "TAMP7MF,TAMP7 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 5. "TAMP6MF,TAMP6 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 4. "TAMP5MF,TAMP5 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 3. "TAMP4MF,TAMP4 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 2. "TAMP3MF,TAMP3 nonsecure interrupt masked flag" "0,1" newline bitfld.long 0x0 1. "TAMP2MF,TAMP2 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 0. "TAMP1MF,TAMP1 nonsecure interrupt masked flag" "0,1" line.long 0x4 "TAMP_SMISR,TAMP secure masked interrupt status register" bitfld.long 0x4 30. "ITAMP15MF,internal tamper 15 secure interrupt masked flag" "0,1" bitfld.long 0x4 29. "ITAMP14MF,internal tamper 14 secure interrupt masked flag" "0,1" bitfld.long 0x4 27. "ITAMP12MF,internal tamper 12 secure interrupt masked flag" "0,1" bitfld.long 0x4 26. "ITAMP11MF,internal tamper 11 secure interrupt masked flag" "0,1" bitfld.long 0x4 25. "ITAMP10MF,internal tamper 10 secure interrupt masked flag" "0,1" newline bitfld.long 0x4 24. "ITAMP9MF,internal tamper 9 secure interrupt masked flag" "0,1" bitfld.long 0x4 23. "ITAMP8MF,Internal tamper 8 secure interrupt masked flag" "0,1" bitfld.long 0x4 22. "ITAMP7MF,Internal tamper 7 secure interrupt masked flag" "0,1" bitfld.long 0x4 21. "ITAMP6MF,Internal tamper 6 secure interrupt masked flag" "0,1" bitfld.long 0x4 20. "ITAMP5MF,Internal tamper 5 secure interrupt masked flag" "0,1" newline bitfld.long 0x4 19. "ITAMP4MF,Internal tamper 4 secure interrupt masked flag" "0,1" bitfld.long 0x4 18. "ITAMP3MF,Internal tamper 3 secure interrupt masked flag" "0,1" bitfld.long 0x4 17. "ITAMP2MF,Internal tamper 2 secure interrupt masked flag" "0,1" bitfld.long 0x4 16. "ITAMP1MF,Internal tamper 1 secure interrupt masked flag" "0,1" bitfld.long 0x4 7. "TAMP8MF,TAMP8 secure interrupt masked flag" "0,1" newline bitfld.long 0x4 6. "TAMP7MF,TAMP7 secure interrupt masked flag" "0,1" bitfld.long 0x4 5. "TAMP6MF,TAMP6 secure interrupt masked flag" "0,1" bitfld.long 0x4 4. "TAMP5MF,TAMP5 secure interrupt masked flag" "0,1" bitfld.long 0x4 3. "TAMP4MF,TAMP4 secure interrupt masked flag" "0,1" bitfld.long 0x4 2. "TAMP3MF,TAMP3 secure interrupt masked flag" "0,1" newline bitfld.long 0x4 1. "TAMP2MF,TAMP2 secure interrupt masked flag" "0,1" bitfld.long 0x4 0. "TAMP1MF,TAMP1 secure interrupt masked flag" "0,1" wgroup.long 0x3C++0x3 line.long 0x0 "TAMP_SCR,TAMP status clear register" bitfld.long 0x0 30. "CITAMP15F,Clear ITAMP15 detection flag" "0,1" bitfld.long 0x0 29. "CITAMP14F,Clear ITAMP14 detection flag" "0,1" bitfld.long 0x0 27. "CITAMP12F,Clear ITAMP12 detection flag" "0,1" bitfld.long 0x0 26. "CITAMP11F,Clear ITAMP11 detection flag" "0,1" bitfld.long 0x0 25. "CITAMP10F,Clear ITAMP10 detection flag" "0,1" newline bitfld.long 0x0 24. "CITAMP9F,Clear ITAMP9 detection flag" "0,1" bitfld.long 0x0 23. "CITAMP8F,Clear ITAMP8 detection flag" "0,1" bitfld.long 0x0 22. "CITAMP7F,Clear ITAMP7 detection flag" "0,1" bitfld.long 0x0 21. "CITAMP6F,Clear ITAMP6 detection flag" "0,1" bitfld.long 0x0 20. "CITAMP5F,Clear ITAMP5 detection flag" "0,1" newline bitfld.long 0x0 19. "CITAMP4F,Clear ITAMP4 detection flag" "0,1" bitfld.long 0x0 18. "CITAMP3F,Clear ITAMP3 detection flag" "0,1" bitfld.long 0x0 17. "CITAMP2F,Clear ITAMP2 detection flag" "0,1" bitfld.long 0x0 16. "CITAMP1F,Clear ITAMP1 detection flag" "0,1" bitfld.long 0x0 7. "CTAMP8F,Clear TAMP8 detection flag" "0,1" newline bitfld.long 0x0 6. "CTAMP7F,Clear TAMP7 detection flag" "0,1" bitfld.long 0x0 5. "CTAMP6F,Clear TAMP6 detection flag" "0,1" bitfld.long 0x0 4. "CTAMP5F,Clear TAMP5 detection flag" "0,1" bitfld.long 0x0 3. "CTAMP4F,Clear TAMP4 detection flag" "0,1" bitfld.long 0x0 2. "CTAMP3F,Clear TAMP3 detection flag" "0,1" newline bitfld.long 0x0 1. "CTAMP2F,Clear TAMP2 detection flag" "0,1" bitfld.long 0x0 0. "CTAMP1F,Clear TAMP1 detection flag" "0,1" rgroup.long 0x40++0x7 line.long 0x0 "TAMP_COUNT1R,TAMP monotonic counter 1 register" hexmask.long 0x0 0.--31. 1. "COUNT,This register is read-only only and is incremented by one when a write access is done to this register." line.long 0x4 "TAMP_COUNT2R,TAMP monotonic counter 2 register" hexmask.long 0x4 0.--31. 1. "COUNT,Monotonic counter" group.long 0x50++0x7 line.long 0x0 "TAMP_OR,TAMP option register" bitfld.long 0x0 3. "BSDIS,Boundary scan disable" "B_0x0,B_0x1" bitfld.long 0x0 2. "IN5_RMP,TAMP_IN5 mapping" "B_0x0,B_0x1" bitfld.long 0x0 1. "IN3_RMP,TAMP_IN3 mapping" "B_0x0,B_0x1" bitfld.long 0x0 0. "IN1_RMP,TAMP_IN1 mapping" "B_0x0,B_0x1" line.long 0x4 "TAMP_RPCFGR,TAMP resources protection configuration register" bitfld.long 0x4 0. "RPCFG0,Configurable resource 0 protection" "B_0x0,B_0x1" group.long 0x70++0xB line.long 0x0 "TAMP_BKPRIFR1,TAMP Backup registers RIF register 1" hexmask.long.byte 0x0 0.--7. 1. "BKPRWRIF,Protection zone 1-RIF area offset" line.long 0x4 "TAMP_BKPRIFR2,TAMP Backup registers RIF register 2" hexmask.long.byte 0x4 0.--7. 1. "BKPWRIF,Protection zone 2-RIF area offset" line.long 0x8 "TAMP_BKPRIFR3,TAMP Backup registers RIF register 3" hexmask.long.byte 0x8 16.--23. 1. "BKPWRIF2,Protection zone 3-RIF area offset 2" hexmask.long.byte 0x8 0.--7. 1. "BKPWRIF1,Protection zone 3-RIF area offset 1" group.long 0x80++0xB line.long 0x0 "TAMP_R0CIDCFGR,TAMP Resource 0 CID configuration register" bitfld.long 0x0 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x4 "TAMP_R1CIDCFGR,TAMP Resource 1 CID configuration register" bitfld.long 0x4 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x8 "TAMP_R2CIDCFGR,TAMP Resource 2 CID configuration register" bitfld.long 0x8 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" group.long 0x100++0x1FF line.long 0x0 "TAMP_BKP0R,TAMP backup 0 register" hexmask.long 0x0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x4 "TAMP_BKP1R,TAMP backup 1 register" hexmask.long 0x4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x8 "TAMP_BKP2R,TAMP backup 2 register" hexmask.long 0x8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xC "TAMP_BKP3R,TAMP backup 3 register" hexmask.long 0xC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x10 "TAMP_BKP4R,TAMP backup 4 register" hexmask.long 0x10 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x14 "TAMP_BKP5R,TAMP backup 5 register" hexmask.long 0x14 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x18 "TAMP_BKP6R,TAMP backup 6 register" hexmask.long 0x18 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1C "TAMP_BKP7R,TAMP backup 7 register" hexmask.long 0x1C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x20 "TAMP_BKP8R,TAMP backup 8 register" hexmask.long 0x20 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x24 "TAMP_BKP9R,TAMP backup 9 register" hexmask.long 0x24 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x28 "TAMP_BKP10R,TAMP backup 10 register" hexmask.long 0x28 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x2C "TAMP_BKP11R,TAMP backup 11 register" hexmask.long 0x2C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x30 "TAMP_BKP12R,TAMP backup 12 register" hexmask.long 0x30 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x34 "TAMP_BKP13R,TAMP backup 13 register" hexmask.long 0x34 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x38 "TAMP_BKP14R,TAMP backup 14 register" hexmask.long 0x38 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x3C "TAMP_BKP15R,TAMP backup 15 register" hexmask.long 0x3C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x40 "TAMP_BKP16R,TAMP backup 16 register" hexmask.long 0x40 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x44 "TAMP_BKP17R,TAMP backup 17 register" hexmask.long 0x44 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x48 "TAMP_BKP18R,TAMP backup 18 register" hexmask.long 0x48 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x4C "TAMP_BKP19R,TAMP backup 19 register" hexmask.long 0x4C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x50 "TAMP_BKP20R,TAMP backup 20 register" hexmask.long 0x50 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x54 "TAMP_BKP21R,TAMP backup 21 register" hexmask.long 0x54 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x58 "TAMP_BKP22R,TAMP backup 22 register" hexmask.long 0x58 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x5C "TAMP_BKP23R,TAMP backup 23 register" hexmask.long 0x5C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x60 "TAMP_BKP24R,TAMP backup 24 register" hexmask.long 0x60 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x64 "TAMP_BKP25R,TAMP backup 25 register" hexmask.long 0x64 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x68 "TAMP_BKP26R,TAMP backup 26 register" hexmask.long 0x68 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x6C "TAMP_BKP27R,TAMP backup 27 register" hexmask.long 0x6C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x70 "TAMP_BKP28R,TAMP backup 28 register" hexmask.long 0x70 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x74 "TAMP_BKP29R,TAMP backup 29 register" hexmask.long 0x74 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x78 "TAMP_BKP30R,TAMP backup 30 register" hexmask.long 0x78 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x7C "TAMP_BKP31R,TAMP backup 31 register" hexmask.long 0x7C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x80 "TAMP_BKP32R,TAMP backup 32 register" hexmask.long 0x80 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x84 "TAMP_BKP33R,TAMP backup 33 register" hexmask.long 0x84 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x88 "TAMP_BKP34R,TAMP backup 34 register" hexmask.long 0x88 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x8C "TAMP_BKP35R,TAMP backup 35 register" hexmask.long 0x8C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x90 "TAMP_BKP36R,TAMP backup 36 register" hexmask.long 0x90 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x94 "TAMP_BKP37R,TAMP backup 37 register" hexmask.long 0x94 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x98 "TAMP_BKP38R,TAMP backup 38 register" hexmask.long 0x98 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x9C "TAMP_BKP39R,TAMP backup 39 register" hexmask.long 0x9C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xA0 "TAMP_BKP40R,TAMP backup 40 register" hexmask.long 0xA0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xA4 "TAMP_BKP41R,TAMP backup 41 register" hexmask.long 0xA4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xA8 "TAMP_BKP42R,TAMP backup 42 register" hexmask.long 0xA8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xAC "TAMP_BKP43R,TAMP backup 43 register" hexmask.long 0xAC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xB0 "TAMP_BKP44R,TAMP backup 44 register" hexmask.long 0xB0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xB4 "TAMP_BKP45R,TAMP backup 45 register" hexmask.long 0xB4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xB8 "TAMP_BKP46R,TAMP backup 46 register" hexmask.long 0xB8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xBC "TAMP_BKP47R,TAMP backup 47 register" hexmask.long 0xBC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xC0 "TAMP_BKP48R,TAMP backup 48 register" hexmask.long 0xC0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xC4 "TAMP_BKP49R,TAMP backup 49 register" hexmask.long 0xC4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xC8 "TAMP_BKP50R,TAMP backup 50 register" hexmask.long 0xC8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xCC "TAMP_BKP51R,TAMP backup 51 register" hexmask.long 0xCC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xD0 "TAMP_BKP52R,TAMP backup 52 register" hexmask.long 0xD0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xD4 "TAMP_BKP53R,TAMP backup 53 register" hexmask.long 0xD4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xD8 "TAMP_BKP54R,TAMP backup 54 register" hexmask.long 0xD8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xDC "TAMP_BKP55R,TAMP backup 55 register" hexmask.long 0xDC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xE0 "TAMP_BKP56R,TAMP backup 56 register" hexmask.long 0xE0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xE4 "TAMP_BKP57R,TAMP backup 57 register" hexmask.long 0xE4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xE8 "TAMP_BKP58R,TAMP backup 58 register" hexmask.long 0xE8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xEC "TAMP_BKP59R,TAMP backup 59 register" hexmask.long 0xEC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xF0 "TAMP_BKP60R,TAMP backup 60 register" hexmask.long 0xF0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xF4 "TAMP_BKP61R,TAMP backup 61 register" hexmask.long 0xF4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xF8 "TAMP_BKP62R,TAMP backup 62 register" hexmask.long 0xF8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xFC "TAMP_BKP63R,TAMP backup 63 register" hexmask.long 0xFC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x100 "TAMP_BKP64R,TAMP backup 64 register" hexmask.long 0x100 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x104 "TAMP_BKP65R,TAMP backup 65 register" hexmask.long 0x104 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x108 "TAMP_BKP66R,TAMP backup 66 register" hexmask.long 0x108 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x10C "TAMP_BKP67R,TAMP backup 67 register" hexmask.long 0x10C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x110 "TAMP_BKP68R,TAMP backup 68 register" hexmask.long 0x110 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x114 "TAMP_BKP69R,TAMP backup 69 register" hexmask.long 0x114 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x118 "TAMP_BKP70R,TAMP backup 70 register" hexmask.long 0x118 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x11C "TAMP_BKP71R,TAMP backup 71 register" hexmask.long 0x11C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x120 "TAMP_BKP72R,TAMP backup 72 register" hexmask.long 0x120 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x124 "TAMP_BKP73R,TAMP backup 73 register" hexmask.long 0x124 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x128 "TAMP_BKP74R,TAMP backup 74 register" hexmask.long 0x128 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x12C "TAMP_BKP75R,TAMP backup 75 register" hexmask.long 0x12C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x130 "TAMP_BKP76R,TAMP backup 76 register" hexmask.long 0x130 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x134 "TAMP_BKP77R,TAMP backup 77 register" hexmask.long 0x134 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x138 "TAMP_BKP78R,TAMP backup 78 register" hexmask.long 0x138 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x13C "TAMP_BKP79R,TAMP backup 79 register" hexmask.long 0x13C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x140 "TAMP_BKP80R,TAMP backup 80 register" hexmask.long 0x140 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x144 "TAMP_BKP81R,TAMP backup 81 register" hexmask.long 0x144 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x148 "TAMP_BKP82R,TAMP backup 82 register" hexmask.long 0x148 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x14C "TAMP_BKP83R,TAMP backup 83 register" hexmask.long 0x14C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x150 "TAMP_BKP84R,TAMP backup 84 register" hexmask.long 0x150 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x154 "TAMP_BKP85R,TAMP backup 85 register" hexmask.long 0x154 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x158 "TAMP_BKP86R,TAMP backup 86 register" hexmask.long 0x158 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x15C "TAMP_BKP87R,TAMP backup 87 register" hexmask.long 0x15C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x160 "TAMP_BKP88R,TAMP backup 88 register" hexmask.long 0x160 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x164 "TAMP_BKP89R,TAMP backup 89 register" hexmask.long 0x164 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x168 "TAMP_BKP90R,TAMP backup 90 register" hexmask.long 0x168 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x16C "TAMP_BKP91R,TAMP backup 91 register" hexmask.long 0x16C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x170 "TAMP_BKP92R,TAMP backup 92 register" hexmask.long 0x170 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x174 "TAMP_BKP93R,TAMP backup 93 register" hexmask.long 0x174 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x178 "TAMP_BKP94R,TAMP backup 94 register" hexmask.long 0x178 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x17C "TAMP_BKP95R,TAMP backup 95 register" hexmask.long 0x17C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x180 "TAMP_BKP96R,TAMP backup 96 register" hexmask.long 0x180 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x184 "TAMP_BKP97R,TAMP backup 97 register" hexmask.long 0x184 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x188 "TAMP_BKP98R,TAMP backup 98 register" hexmask.long 0x188 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x18C "TAMP_BKP99R,TAMP backup 99 register" hexmask.long 0x18C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x190 "TAMP_BKP100R,TAMP backup 100 register" hexmask.long 0x190 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x194 "TAMP_BKP101R,TAMP backup 101 register" hexmask.long 0x194 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x198 "TAMP_BKP102R,TAMP backup 102 register" hexmask.long 0x198 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x19C "TAMP_BKP103R,TAMP backup 103 register" hexmask.long 0x19C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1A0 "TAMP_BKP104R,TAMP backup 104 register" hexmask.long 0x1A0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1A4 "TAMP_BKP105R,TAMP backup 105 register" hexmask.long 0x1A4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1A8 "TAMP_BKP106R,TAMP backup 106 register" hexmask.long 0x1A8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1AC "TAMP_BKP107R,TAMP backup 107 register" hexmask.long 0x1AC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1B0 "TAMP_BKP108R,TAMP backup 108 register" hexmask.long 0x1B0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1B4 "TAMP_BKP109R,TAMP backup 109 register" hexmask.long 0x1B4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1B8 "TAMP_BKP110R,TAMP backup 110 register" hexmask.long 0x1B8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1BC "TAMP_BKP111R,TAMP backup 111 register" hexmask.long 0x1BC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1C0 "TAMP_BKP112R,TAMP backup 112 register" hexmask.long 0x1C0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1C4 "TAMP_BKP113R,TAMP backup 113 register" hexmask.long 0x1C4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1C8 "TAMP_BKP114R,TAMP backup 114 register" hexmask.long 0x1C8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1CC "TAMP_BKP115R,TAMP backup 115 register" hexmask.long 0x1CC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1D0 "TAMP_BKP116R,TAMP backup 116 register" hexmask.long 0x1D0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1D4 "TAMP_BKP117R,TAMP backup 117 register" hexmask.long 0x1D4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1D8 "TAMP_BKP118R,TAMP backup 118 register" hexmask.long 0x1D8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1DC "TAMP_BKP119R,TAMP backup 119 register" hexmask.long 0x1DC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1E0 "TAMP_BKP120R,TAMP backup 120 register" hexmask.long 0x1E0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1E4 "TAMP_BKP121R,TAMP backup 121 register" hexmask.long 0x1E4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1E8 "TAMP_BKP122R,TAMP backup 122 register" hexmask.long 0x1E8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1EC "TAMP_BKP123R,TAMP backup 123 register" hexmask.long 0x1EC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1F0 "TAMP_BKP124R,TAMP backup 124 register" hexmask.long 0x1F0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1F4 "TAMP_BKP125R,TAMP backup 125 register" hexmask.long 0x1F4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1F8 "TAMP_BKP126R,TAMP backup 126 register" hexmask.long 0x1F8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1FC "TAMP_BKP127R,TAMP backup 127 register" hexmask.long 0x1FC 0.--31. 1. "BKP,The application can write or read data to and from these registers." rgroup.long 0x3EC++0x13 line.long 0x0 "TAMP_HWCFGR2,TAMP hardware configuration register 2" hexmask.long.byte 0x0 24.--31. 1. "NUM_DEV_SECRETS,None" hexmask.long.byte 0x0 20.--23. 1. "CID_WIDTH,CID length" hexmask.long.byte 0x0 16.--19. 1. "RIF,CID compartment filtering" hexmask.long.byte 0x0 8.--11. 1. "TRUST_ZONE,Trust zone" hexmask.long.byte 0x0 0.--7. 1. "OPTIONREG_OUT,." line.long 0x4 "TAMP_HWCFGR1,TAMP hardware configuration register 1" hexmask.long.word 0x4 16.--31. 1. "INT_TAMPER,INT_TAMPER[i] = 0: internal tamper i+1 is not implemented (i from 0 to 15)" hexmask.long.byte 0x4 12.--15. 1. "ACTIVE_TAMPER,None" hexmask.long.byte 0x4 8.--11. 1. "TAMPER,." hexmask.long.byte 0x4 0.--7. 1. "BACKUP_REGS,." line.long 0x8 "TAMP_VERR,TAMP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "TAMP_IPIDR,TAMP identification register" hexmask.long 0xC 0.--31. 1. "ID,Identifier." line.long 0x10 "TAMP_SIDR,TAMP size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identifier." tree.end sif (cpuis("*CA35")) tree "TAMP_S" base ad:0x56010000 group.long 0x0++0x13 line.long 0x0 "TAMP_CR1,TAMP control register 1" bitfld.long 0x0 30. "ITAMP15E,Internal tamper 15 enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "ITAMP14E,Internal tamper 14 enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "ITAMP12E,Internal tamper 12 enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "ITAMP11E,Internal tamper 11 enable" "B_0x0,B_0x1" bitfld.long 0x0 25. "ITAMP10E,Internal tamper 10 enable" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "ITAMP9E,Internal tamper 9 enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "ITAMP8E,Internal tamper 8 enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ITAMP7E,Internal tamper 7 enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "ITAMP6E,Internal tamper 6 enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "ITAMP5E,Internal tamper 5 enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "ITAMP4E,Internal tamper 4 enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "ITAMP3E,Internal tamper 3 enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "ITAMP2E,Internal tamper 2 enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "ITAMP1E,Internal tamper 1 enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TAMP8E,Tamper detection on TAMP_IN8 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "TAMP7E,Tamper detection on TAMP_IN7 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" bitfld.long 0x0 5. "TAMP6E,Tamper detection on TAMP_IN6 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" bitfld.long 0x0 4. "TAMP5E,Tamper detection on TAMP_IN5 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" bitfld.long 0x0 3. "TAMP4E,Tamper detection on TAMP_IN4 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" bitfld.long 0x0 2. "TAMP3E,Tamper detection on TAMP_IN3 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TAMP2E,Tamper detection on TAMP_IN2 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" bitfld.long 0x0 0. "TAMP1E,Tamper detection on TAMP_IN1 enable" "B_0x0,B_0x1" line.long 0x4 "TAMP_CR2,TAMP control register 2" bitfld.long 0x4 31. "TAMP8TRG,Active level for tamper 8 input (active mode disabled)" "B_0x0,B_0x1" bitfld.long 0x4 30. "TAMP7TRG,Active level for tamper 7 input (active mode disabled)" "B_0x0,B_0x1" bitfld.long 0x4 29. "TAMP6TRG,Active level for tamper 6 input (active mode disabled)" "B_0x0,B_0x1" bitfld.long 0x4 28. "TAMP5TRG,Active level for tamper 5 input (active mode disabled)" "B_0x0,B_0x1" bitfld.long 0x4 27. "TAMP4TRG,Active level for tamper 4 input (active mode disabled)" "B_0x0,B_0x1" newline bitfld.long 0x4 26. "TAMP3TRG,Active level for tamper 3 input" "B_0x0,B_0x1" bitfld.long 0x4 25. "TAMP2TRG,Active level for tamper 2 input" "B_0x0,B_0x1" bitfld.long 0x4 24. "TAMP1TRG,Active level for tamper 1 input" "B_0x0,B_0x1" bitfld.long 0x4 23. "BKERASE,Backup registers and device secretsless thansup>(1)less than/sup> erase" "0,1" bitfld.long 0x4 22. "BKBLOCK,Backup registers and device secretsless thansup>(1)less than/sup> access blocked" "B_0x0,B_0x1" newline bitfld.long 0x4 18. "TAMP3MSK,Tamper 3 mask" "B_0x0,B_0x1" bitfld.long 0x4 17. "TAMP2MSK,Tamper 2 mask" "B_0x0,B_0x1" bitfld.long 0x4 16. "TAMP1MSK,Tamper 1 mask" "B_0x0,B_0x1" bitfld.long 0x4 7. "TAMP8POM,Tamper 8 potential mode" "B_0x0,B_0x1" bitfld.long 0x4 6. "TAMP7POM,Tamper 7 potential mode" "B_0x0,B_0x1" newline bitfld.long 0x4 5. "TAMP6POM,Tamper 6 potential mode" "B_0x0,B_0x1" bitfld.long 0x4 4. "TAMP5POM,Tamper 5 potential mode" "B_0x0,B_0x1" bitfld.long 0x4 3. "TAMP4POM,Tamper 4 potential mode" "B_0x0,B_0x1" bitfld.long 0x4 2. "TAMP3POM,Tamper 3 potential mode" "B_0x0,B_0x1" bitfld.long 0x4 1. "TAMP2POM,Tamper 2 potential mode" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "TAMP1POM,Tamper 1 potential mode" "B_0x0,B_0x1" line.long 0x8 "TAMP_CR3,TAMP control register 3" bitfld.long 0x8 14. "ITAMP15POM,Internal tamper 15 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "ITAMP14POM,Internal tamper 14 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 11. "ITAMP12POM,Internal tamper 12 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 10. "ITAMP11POM,Internal tamper 11 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 9. "ITAMP10POM,Internal tamper 10 potential mode" "B_0x0,B_0x1" newline bitfld.long 0x8 8. "ITAMP9POM,Internal tamper 9 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 7. "ITAMP8POM,Internal tamper 8 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 6. "ITAMP7POM,Internal tamper 7 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 5. "ITAMP6POM,Internal tamper 6 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 4. "ITAMP5POM,Internal tamper 5 potential mode" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "ITAMP4POM,Internal tamper 4 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 2. "ITAMP3POM,Internal tamper 3 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 1. "ITAMP2POM,Internal tamper 2 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 0. "ITAMP1POM,Internal tamper 1 potential mode" "B_0x0,B_0x1" line.long 0xC "TAMP_FLTCR,TAMP filter control register" bitfld.long 0xC 7. "TAMPPUDIS,TAMP_INx pull-up disable" "B_0x0,B_0x1" bitfld.long 0xC 5.--6. "TAMPPRCH,TAMP_INx precharge duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 3.--4. "TAMPFLT,TAMP_INx filter count" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0.--2. "TAMPFREQ,Tamper sampling frequency" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x10 "TAMP_ATCR1,TAMP active tamper control register 1" bitfld.long 0x10 31. "FLTEN,Active tamper filter enable" "B_0x0,B_0x1" bitfld.long 0x10 30. "ATOSHARE,Active tamper output sharing" "B_0x0,B_0x1" bitfld.long 0x10 24.--26. "ATPER,Active tamper output change period" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x10 16.--19. 1. "ATCKSEL,Active tamper RTC asynchronous prescaler clock selection" bitfld.long 0x10 14.--15. "ATOSEL4,Active tamper shared output 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x10 12.--13. "ATOSEL3,Active tamper shared output 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 10.--11. "ATOSEL2,Active tamper shared output 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 8.--9. "ATOSEL1,Active tamper shared output 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "TAMP8AM,Tamper 8 active mode" "B_0x0,B_0x1" bitfld.long 0x10 6. "TAMP7AM,Tamper 7 active mode" "B_0x0,B_0x1" newline bitfld.long 0x10 5. "TAMP6AM,Tamper 6 active mode" "B_0x0,B_0x1" bitfld.long 0x10 4. "TAMP5AM,Tamper 5 active mode" "B_0x0,B_0x1" bitfld.long 0x10 3. "TAMP4AM,Tamper 4 active mode" "B_0x0,B_0x1" bitfld.long 0x10 2. "TAMP3AM,Tamper 3 active mode" "B_0x0,B_0x1" bitfld.long 0x10 1. "TAMP2AM,Tamper 2 active mode" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "TAMP1AM,Tamper 1 active mode" "B_0x0,B_0x1" wgroup.long 0x14++0x3 line.long 0x0 "TAMP_ATSEEDR,TAMP active tamper seed register" hexmask.long 0x0 0.--31. 1. "SEED,Pseudo-random generator seed value" rgroup.long 0x18++0x3 line.long 0x0 "TAMP_ATOR,TAMP active tamper output register" bitfld.long 0x0 15. "INITS,Active tamper initialization status" "0,1" bitfld.long 0x0 14. "SEEDF,Seed running flag" "0,1" hexmask.long.byte 0x0 0.--7. 1. "PRNG,Pseudo-random generator value" group.long 0x1C++0xB line.long 0x0 "TAMP_ATCR2,TAMP active tamper control register 2" bitfld.long 0x0 29.--31. "ATOSEL8,Active tamper shared output 8 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 26.--28. "ATOSEL7,Active tamper shared output 7 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 23.--25. "ATOSEL6,Active tamper shared output 6 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 20.--22. "ATOSEL5,Active tamper shared output 5 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 17.--19. "ATOSEL4,Active tamper shared output 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x0 14.--16. "ATOSEL3,Active tamper shared output 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 11.--13. "ATOSEL2,Active tamper shared output 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 8.--10. "ATOSEL1,Active tamper shared output 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x4 "TAMP_SECCFGR,TAMP secure configuration register" bitfld.long 0x4 31. "TAMPSEC,Tamper protection (excluding monotonic counters and backup registers)" "B_0x0,B_0x1" bitfld.long 0x4 30. "BHKLOCK,Boot hardware key lock" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "BKPWSEC,Backup registers write protection offset" bitfld.long 0x4 15. "CNT1SEC,Monotonic counter 1 secure protection" "B_0x0,B_0x1" bitfld.long 0x4 14. "CNT2SEC,Monotonic counter 2 secure protection" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "BKPRWSEC,Backup registers read/write protection offset" line.long 0x8 "TAMP_PRIVCFGR,TAMP privilege configuration register" bitfld.long 0x8 31. "TAMPPRIV,Tamper privilege protection (excluding backup registers)" "B_0x0,B_0x1" bitfld.long 0x8 30. "BKPWPRIV,Backup registers zone 2 privilege protection" "B_0x0,B_0x1" bitfld.long 0x8 29. "BKPRWPRIV,Backup registers zone 1 privilege protection" "B_0x0,B_0x1" bitfld.long 0x8 15. "CNT1PRIV,Monotonic counter 1 privilege protection" "B_0x0,B_0x1" bitfld.long 0x8 14. "CNT2PRIV,Monotonic counter 2 privilege protection" "B_0x0,B_0x1" group.long 0x2C++0x7 line.long 0x0 "TAMP_IER,TAMP interrupt enable register" bitfld.long 0x0 30. "ITAMP15IE,Internal tamper 15 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "ITAMP14IE,Internal tamper 14 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "ITAMP12IE,Internal tamper 12 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "ITAMP11IE,Internal tamper 11 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 25. "ITAMP10IE,Internal tamper 10 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "ITAMP9IE,Internal tamper 9 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "ITAMP8IE,Internal tamper 8 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ITAMP7IE,Internal tamper 7 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "ITAMP6IE,Internal tamper 6 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "ITAMP5IE,Internal tamper 5 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "ITAMP4IE,Internal tamper 4 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "ITAMP3IE,Internal tamper 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "ITAMP2IE,Internal tamper 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "ITAMP1IE,Internal tamper 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TAMP8IE,Tamper 8 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "TAMP7IE,Tamper 7interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "TAMP6IE,Tamper 6 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "TAMP5IE,Tamper 5 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TAMP4IE,Tamper 4 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "TAMP3IE,Tamper 3 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TAMP2IE,Tamper 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "TAMP1IE,Tamper 1 interrupt enable" "B_0x0,B_0x1" line.long 0x4 "TAMP_SR,TAMP status register" bitfld.long 0x4 30. "ITAMP15F,Internal tamper 15 flag" "0,1" rbitfld.long 0x4 29. "ITAMP14F,Internal tamper 14 flag" "0,1" rbitfld.long 0x4 27. "ITAMP12F,Internal tamper 12 flag" "0,1" rbitfld.long 0x4 26. "ITAMP11F,Internal tamper 11 flag" "0,1" rbitfld.long 0x4 25. "ITAMP10F,Internal tamper 10 flag" "0,1" newline rbitfld.long 0x4 24. "ITAMP9F,Internal tamper 9 flag" "0,1" rbitfld.long 0x4 23. "ITAMP8F,Internal tamper 8 flag" "0,1" rbitfld.long 0x4 22. "ITAMP7F,Internal tamper 7 flag" "0,1" rbitfld.long 0x4 21. "ITAMP6F,Internal tamper 6 flag" "0,1" rbitfld.long 0x4 20. "ITAMP5F,Internal tamper 5 flag" "0,1" newline rbitfld.long 0x4 19. "ITAMP4F,Internal tamper 4 flag" "0,1" rbitfld.long 0x4 18. "ITAMP3F,Internal tamper 3 flag" "0,1" rbitfld.long 0x4 17. "ITAMP2F,Internal tamper 2 flag" "0,1" rbitfld.long 0x4 16. "ITAMP1F,Internal tamper 1 flag" "0,1" rbitfld.long 0x4 7. "TAMP8F,TAMP8 detection flag" "0,1" newline rbitfld.long 0x4 6. "TAMP7F,TAMP7 detection flag" "0,1" rbitfld.long 0x4 5. "TAMP6F,TAMP6 detection flag" "0,1" rbitfld.long 0x4 4. "TAMP5F,TAMP5 detection flag" "0,1" rbitfld.long 0x4 3. "TAMP4F,TAMP4 detection flag" "0,1" rbitfld.long 0x4 2. "TAMP3F,TAMP3 detection flag" "0,1" newline rbitfld.long 0x4 1. "TAMP2F,TAMP2 detection flag" "0,1" rbitfld.long 0x4 0. "TAMP1F,TAMP1 detection flag" "0,1" rgroup.long 0x34++0x7 line.long 0x0 "TAMP_MISR,TAMP nonsecure masked interrupt status register" bitfld.long 0x0 30. "ITAMP15MF,internal tamper 15 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 29. "ITAMP14MF,internal tamper 14 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 27. "ITAMP12MF,internal tamper 12 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 26. "ITAMP11MF,internal tamper 11 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 25. "ITAMP10MF,internal tamper 10 nonsecure interrupt masked flag" "0,1" newline bitfld.long 0x0 24. "ITAMP9MF,internal tamper 9 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 23. "ITAMP8MF,Internal tamper 8 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 22. "ITAMP7MF,Internal tamper 7 tamper nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 21. "ITAMP6MF,Internal tamper 6 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 20. "ITAMP5MF,Internal tamper 5 nonsecure interrupt masked flag" "0,1" newline bitfld.long 0x0 19. "ITAMP4MF,Internal tamper 4 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 18. "ITAMP3MF,Internal tamper 3 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 17. "ITAMP2MF,Internal tamper 2 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 16. "ITAMP1MF,Internal tamper 1 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 7. "TAMP8MF,TAMP8 nonsecure interrupt masked flag" "0,1" newline bitfld.long 0x0 6. "TAMP7MF,TAMP7 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 5. "TAMP6MF,TAMP6 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 4. "TAMP5MF,TAMP5 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 3. "TAMP4MF,TAMP4 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 2. "TAMP3MF,TAMP3 nonsecure interrupt masked flag" "0,1" newline bitfld.long 0x0 1. "TAMP2MF,TAMP2 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 0. "TAMP1MF,TAMP1 nonsecure interrupt masked flag" "0,1" line.long 0x4 "TAMP_SMISR,TAMP secure masked interrupt status register" bitfld.long 0x4 30. "ITAMP15MF,internal tamper 15 secure interrupt masked flag" "0,1" bitfld.long 0x4 29. "ITAMP14MF,internal tamper 14 secure interrupt masked flag" "0,1" bitfld.long 0x4 27. "ITAMP12MF,internal tamper 12 secure interrupt masked flag" "0,1" bitfld.long 0x4 26. "ITAMP11MF,internal tamper 11 secure interrupt masked flag" "0,1" bitfld.long 0x4 25. "ITAMP10MF,internal tamper 10 secure interrupt masked flag" "0,1" newline bitfld.long 0x4 24. "ITAMP9MF,internal tamper 9 secure interrupt masked flag" "0,1" bitfld.long 0x4 23. "ITAMP8MF,Internal tamper 8 secure interrupt masked flag" "0,1" bitfld.long 0x4 22. "ITAMP7MF,Internal tamper 7 secure interrupt masked flag" "0,1" bitfld.long 0x4 21. "ITAMP6MF,Internal tamper 6 secure interrupt masked flag" "0,1" bitfld.long 0x4 20. "ITAMP5MF,Internal tamper 5 secure interrupt masked flag" "0,1" newline bitfld.long 0x4 19. "ITAMP4MF,Internal tamper 4 secure interrupt masked flag" "0,1" bitfld.long 0x4 18. "ITAMP3MF,Internal tamper 3 secure interrupt masked flag" "0,1" bitfld.long 0x4 17. "ITAMP2MF,Internal tamper 2 secure interrupt masked flag" "0,1" bitfld.long 0x4 16. "ITAMP1MF,Internal tamper 1 secure interrupt masked flag" "0,1" bitfld.long 0x4 7. "TAMP8MF,TAMP8 secure interrupt masked flag" "0,1" newline bitfld.long 0x4 6. "TAMP7MF,TAMP7 secure interrupt masked flag" "0,1" bitfld.long 0x4 5. "TAMP6MF,TAMP6 secure interrupt masked flag" "0,1" bitfld.long 0x4 4. "TAMP5MF,TAMP5 secure interrupt masked flag" "0,1" bitfld.long 0x4 3. "TAMP4MF,TAMP4 secure interrupt masked flag" "0,1" bitfld.long 0x4 2. "TAMP3MF,TAMP3 secure interrupt masked flag" "0,1" newline bitfld.long 0x4 1. "TAMP2MF,TAMP2 secure interrupt masked flag" "0,1" bitfld.long 0x4 0. "TAMP1MF,TAMP1 secure interrupt masked flag" "0,1" wgroup.long 0x3C++0x3 line.long 0x0 "TAMP_SCR,TAMP status clear register" bitfld.long 0x0 30. "CITAMP15F,Clear ITAMP15 detection flag" "0,1" bitfld.long 0x0 29. "CITAMP14F,Clear ITAMP14 detection flag" "0,1" bitfld.long 0x0 27. "CITAMP12F,Clear ITAMP12 detection flag" "0,1" bitfld.long 0x0 26. "CITAMP11F,Clear ITAMP11 detection flag" "0,1" bitfld.long 0x0 25. "CITAMP10F,Clear ITAMP10 detection flag" "0,1" newline bitfld.long 0x0 24. "CITAMP9F,Clear ITAMP9 detection flag" "0,1" bitfld.long 0x0 23. "CITAMP8F,Clear ITAMP8 detection flag" "0,1" bitfld.long 0x0 22. "CITAMP7F,Clear ITAMP7 detection flag" "0,1" bitfld.long 0x0 21. "CITAMP6F,Clear ITAMP6 detection flag" "0,1" bitfld.long 0x0 20. "CITAMP5F,Clear ITAMP5 detection flag" "0,1" newline bitfld.long 0x0 19. "CITAMP4F,Clear ITAMP4 detection flag" "0,1" bitfld.long 0x0 18. "CITAMP3F,Clear ITAMP3 detection flag" "0,1" bitfld.long 0x0 17. "CITAMP2F,Clear ITAMP2 detection flag" "0,1" bitfld.long 0x0 16. "CITAMP1F,Clear ITAMP1 detection flag" "0,1" bitfld.long 0x0 7. "CTAMP8F,Clear TAMP8 detection flag" "0,1" newline bitfld.long 0x0 6. "CTAMP7F,Clear TAMP7 detection flag" "0,1" bitfld.long 0x0 5. "CTAMP6F,Clear TAMP6 detection flag" "0,1" bitfld.long 0x0 4. "CTAMP5F,Clear TAMP5 detection flag" "0,1" bitfld.long 0x0 3. "CTAMP4F,Clear TAMP4 detection flag" "0,1" bitfld.long 0x0 2. "CTAMP3F,Clear TAMP3 detection flag" "0,1" newline bitfld.long 0x0 1. "CTAMP2F,Clear TAMP2 detection flag" "0,1" bitfld.long 0x0 0. "CTAMP1F,Clear TAMP1 detection flag" "0,1" rgroup.long 0x40++0x7 line.long 0x0 "TAMP_COUNT1R,TAMP monotonic counter 1 register" hexmask.long 0x0 0.--31. 1. "COUNT,This register is read-only only and is incremented by one when a write access is done to this register." line.long 0x4 "TAMP_COUNT2R,TAMP monotonic counter 2 register" hexmask.long 0x4 0.--31. 1. "COUNT,Monotonic counter" group.long 0x50++0x7 line.long 0x0 "TAMP_OR,TAMP option register" bitfld.long 0x0 3. "BSDIS,Boundary scan disable" "B_0x0,B_0x1" bitfld.long 0x0 2. "IN5_RMP,TAMP_IN5 mapping" "B_0x0,B_0x1" bitfld.long 0x0 1. "IN3_RMP,TAMP_IN3 mapping" "B_0x0,B_0x1" bitfld.long 0x0 0. "IN1_RMP,TAMP_IN1 mapping" "B_0x0,B_0x1" line.long 0x4 "TAMP_RPCFGR,TAMP resources protection configuration register" bitfld.long 0x4 0. "RPCFG0,Configurable resource 0 protection" "B_0x0,B_0x1" group.long 0x70++0xB line.long 0x0 "TAMP_BKPRIFR1,TAMP Backup registers RIF register 1" hexmask.long.byte 0x0 0.--7. 1. "BKPRWRIF,Protection zone 1-RIF area offset" line.long 0x4 "TAMP_BKPRIFR2,TAMP Backup registers RIF register 2" hexmask.long.byte 0x4 0.--7. 1. "BKPWRIF,Protection zone 2-RIF area offset" line.long 0x8 "TAMP_BKPRIFR3,TAMP Backup registers RIF register 3" hexmask.long.byte 0x8 16.--23. 1. "BKPWRIF2,Protection zone 3-RIF area offset 2" hexmask.long.byte 0x8 0.--7. 1. "BKPWRIF1,Protection zone 3-RIF area offset 1" group.long 0x80++0xB line.long 0x0 "TAMP_R0CIDCFGR,TAMP Resource 0 CID configuration register" bitfld.long 0x0 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x4 "TAMP_R1CIDCFGR,TAMP Resource 1 CID configuration register" bitfld.long 0x4 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x8 "TAMP_R2CIDCFGR,TAMP Resource 2 CID configuration register" bitfld.long 0x8 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" group.long 0x100++0x1FF line.long 0x0 "TAMP_BKP0R,TAMP backup 0 register" hexmask.long 0x0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x4 "TAMP_BKP1R,TAMP backup 1 register" hexmask.long 0x4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x8 "TAMP_BKP2R,TAMP backup 2 register" hexmask.long 0x8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xC "TAMP_BKP3R,TAMP backup 3 register" hexmask.long 0xC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x10 "TAMP_BKP4R,TAMP backup 4 register" hexmask.long 0x10 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x14 "TAMP_BKP5R,TAMP backup 5 register" hexmask.long 0x14 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x18 "TAMP_BKP6R,TAMP backup 6 register" hexmask.long 0x18 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1C "TAMP_BKP7R,TAMP backup 7 register" hexmask.long 0x1C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x20 "TAMP_BKP8R,TAMP backup 8 register" hexmask.long 0x20 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x24 "TAMP_BKP9R,TAMP backup 9 register" hexmask.long 0x24 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x28 "TAMP_BKP10R,TAMP backup 10 register" hexmask.long 0x28 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x2C "TAMP_BKP11R,TAMP backup 11 register" hexmask.long 0x2C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x30 "TAMP_BKP12R,TAMP backup 12 register" hexmask.long 0x30 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x34 "TAMP_BKP13R,TAMP backup 13 register" hexmask.long 0x34 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x38 "TAMP_BKP14R,TAMP backup 14 register" hexmask.long 0x38 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x3C "TAMP_BKP15R,TAMP backup 15 register" hexmask.long 0x3C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x40 "TAMP_BKP16R,TAMP backup 16 register" hexmask.long 0x40 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x44 "TAMP_BKP17R,TAMP backup 17 register" hexmask.long 0x44 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x48 "TAMP_BKP18R,TAMP backup 18 register" hexmask.long 0x48 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x4C "TAMP_BKP19R,TAMP backup 19 register" hexmask.long 0x4C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x50 "TAMP_BKP20R,TAMP backup 20 register" hexmask.long 0x50 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x54 "TAMP_BKP21R,TAMP backup 21 register" hexmask.long 0x54 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x58 "TAMP_BKP22R,TAMP backup 22 register" hexmask.long 0x58 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x5C "TAMP_BKP23R,TAMP backup 23 register" hexmask.long 0x5C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x60 "TAMP_BKP24R,TAMP backup 24 register" hexmask.long 0x60 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x64 "TAMP_BKP25R,TAMP backup 25 register" hexmask.long 0x64 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x68 "TAMP_BKP26R,TAMP backup 26 register" hexmask.long 0x68 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x6C "TAMP_BKP27R,TAMP backup 27 register" hexmask.long 0x6C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x70 "TAMP_BKP28R,TAMP backup 28 register" hexmask.long 0x70 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x74 "TAMP_BKP29R,TAMP backup 29 register" hexmask.long 0x74 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x78 "TAMP_BKP30R,TAMP backup 30 register" hexmask.long 0x78 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x7C "TAMP_BKP31R,TAMP backup 31 register" hexmask.long 0x7C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x80 "TAMP_BKP32R,TAMP backup 32 register" hexmask.long 0x80 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x84 "TAMP_BKP33R,TAMP backup 33 register" hexmask.long 0x84 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x88 "TAMP_BKP34R,TAMP backup 34 register" hexmask.long 0x88 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x8C "TAMP_BKP35R,TAMP backup 35 register" hexmask.long 0x8C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x90 "TAMP_BKP36R,TAMP backup 36 register" hexmask.long 0x90 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x94 "TAMP_BKP37R,TAMP backup 37 register" hexmask.long 0x94 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x98 "TAMP_BKP38R,TAMP backup 38 register" hexmask.long 0x98 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x9C "TAMP_BKP39R,TAMP backup 39 register" hexmask.long 0x9C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xA0 "TAMP_BKP40R,TAMP backup 40 register" hexmask.long 0xA0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xA4 "TAMP_BKP41R,TAMP backup 41 register" hexmask.long 0xA4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xA8 "TAMP_BKP42R,TAMP backup 42 register" hexmask.long 0xA8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xAC "TAMP_BKP43R,TAMP backup 43 register" hexmask.long 0xAC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xB0 "TAMP_BKP44R,TAMP backup 44 register" hexmask.long 0xB0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xB4 "TAMP_BKP45R,TAMP backup 45 register" hexmask.long 0xB4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xB8 "TAMP_BKP46R,TAMP backup 46 register" hexmask.long 0xB8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xBC "TAMP_BKP47R,TAMP backup 47 register" hexmask.long 0xBC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xC0 "TAMP_BKP48R,TAMP backup 48 register" hexmask.long 0xC0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xC4 "TAMP_BKP49R,TAMP backup 49 register" hexmask.long 0xC4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xC8 "TAMP_BKP50R,TAMP backup 50 register" hexmask.long 0xC8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xCC "TAMP_BKP51R,TAMP backup 51 register" hexmask.long 0xCC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xD0 "TAMP_BKP52R,TAMP backup 52 register" hexmask.long 0xD0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xD4 "TAMP_BKP53R,TAMP backup 53 register" hexmask.long 0xD4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xD8 "TAMP_BKP54R,TAMP backup 54 register" hexmask.long 0xD8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xDC "TAMP_BKP55R,TAMP backup 55 register" hexmask.long 0xDC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xE0 "TAMP_BKP56R,TAMP backup 56 register" hexmask.long 0xE0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xE4 "TAMP_BKP57R,TAMP backup 57 register" hexmask.long 0xE4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xE8 "TAMP_BKP58R,TAMP backup 58 register" hexmask.long 0xE8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xEC "TAMP_BKP59R,TAMP backup 59 register" hexmask.long 0xEC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xF0 "TAMP_BKP60R,TAMP backup 60 register" hexmask.long 0xF0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xF4 "TAMP_BKP61R,TAMP backup 61 register" hexmask.long 0xF4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xF8 "TAMP_BKP62R,TAMP backup 62 register" hexmask.long 0xF8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xFC "TAMP_BKP63R,TAMP backup 63 register" hexmask.long 0xFC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x100 "TAMP_BKP64R,TAMP backup 64 register" hexmask.long 0x100 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x104 "TAMP_BKP65R,TAMP backup 65 register" hexmask.long 0x104 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x108 "TAMP_BKP66R,TAMP backup 66 register" hexmask.long 0x108 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x10C "TAMP_BKP67R,TAMP backup 67 register" hexmask.long 0x10C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x110 "TAMP_BKP68R,TAMP backup 68 register" hexmask.long 0x110 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x114 "TAMP_BKP69R,TAMP backup 69 register" hexmask.long 0x114 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x118 "TAMP_BKP70R,TAMP backup 70 register" hexmask.long 0x118 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x11C "TAMP_BKP71R,TAMP backup 71 register" hexmask.long 0x11C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x120 "TAMP_BKP72R,TAMP backup 72 register" hexmask.long 0x120 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x124 "TAMP_BKP73R,TAMP backup 73 register" hexmask.long 0x124 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x128 "TAMP_BKP74R,TAMP backup 74 register" hexmask.long 0x128 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x12C "TAMP_BKP75R,TAMP backup 75 register" hexmask.long 0x12C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x130 "TAMP_BKP76R,TAMP backup 76 register" hexmask.long 0x130 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x134 "TAMP_BKP77R,TAMP backup 77 register" hexmask.long 0x134 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x138 "TAMP_BKP78R,TAMP backup 78 register" hexmask.long 0x138 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x13C "TAMP_BKP79R,TAMP backup 79 register" hexmask.long 0x13C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x140 "TAMP_BKP80R,TAMP backup 80 register" hexmask.long 0x140 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x144 "TAMP_BKP81R,TAMP backup 81 register" hexmask.long 0x144 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x148 "TAMP_BKP82R,TAMP backup 82 register" hexmask.long 0x148 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x14C "TAMP_BKP83R,TAMP backup 83 register" hexmask.long 0x14C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x150 "TAMP_BKP84R,TAMP backup 84 register" hexmask.long 0x150 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x154 "TAMP_BKP85R,TAMP backup 85 register" hexmask.long 0x154 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x158 "TAMP_BKP86R,TAMP backup 86 register" hexmask.long 0x158 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x15C "TAMP_BKP87R,TAMP backup 87 register" hexmask.long 0x15C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x160 "TAMP_BKP88R,TAMP backup 88 register" hexmask.long 0x160 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x164 "TAMP_BKP89R,TAMP backup 89 register" hexmask.long 0x164 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x168 "TAMP_BKP90R,TAMP backup 90 register" hexmask.long 0x168 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x16C "TAMP_BKP91R,TAMP backup 91 register" hexmask.long 0x16C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x170 "TAMP_BKP92R,TAMP backup 92 register" hexmask.long 0x170 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x174 "TAMP_BKP93R,TAMP backup 93 register" hexmask.long 0x174 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x178 "TAMP_BKP94R,TAMP backup 94 register" hexmask.long 0x178 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x17C "TAMP_BKP95R,TAMP backup 95 register" hexmask.long 0x17C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x180 "TAMP_BKP96R,TAMP backup 96 register" hexmask.long 0x180 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x184 "TAMP_BKP97R,TAMP backup 97 register" hexmask.long 0x184 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x188 "TAMP_BKP98R,TAMP backup 98 register" hexmask.long 0x188 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x18C "TAMP_BKP99R,TAMP backup 99 register" hexmask.long 0x18C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x190 "TAMP_BKP100R,TAMP backup 100 register" hexmask.long 0x190 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x194 "TAMP_BKP101R,TAMP backup 101 register" hexmask.long 0x194 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x198 "TAMP_BKP102R,TAMP backup 102 register" hexmask.long 0x198 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x19C "TAMP_BKP103R,TAMP backup 103 register" hexmask.long 0x19C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1A0 "TAMP_BKP104R,TAMP backup 104 register" hexmask.long 0x1A0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1A4 "TAMP_BKP105R,TAMP backup 105 register" hexmask.long 0x1A4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1A8 "TAMP_BKP106R,TAMP backup 106 register" hexmask.long 0x1A8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1AC "TAMP_BKP107R,TAMP backup 107 register" hexmask.long 0x1AC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1B0 "TAMP_BKP108R,TAMP backup 108 register" hexmask.long 0x1B0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1B4 "TAMP_BKP109R,TAMP backup 109 register" hexmask.long 0x1B4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1B8 "TAMP_BKP110R,TAMP backup 110 register" hexmask.long 0x1B8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1BC "TAMP_BKP111R,TAMP backup 111 register" hexmask.long 0x1BC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1C0 "TAMP_BKP112R,TAMP backup 112 register" hexmask.long 0x1C0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1C4 "TAMP_BKP113R,TAMP backup 113 register" hexmask.long 0x1C4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1C8 "TAMP_BKP114R,TAMP backup 114 register" hexmask.long 0x1C8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1CC "TAMP_BKP115R,TAMP backup 115 register" hexmask.long 0x1CC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1D0 "TAMP_BKP116R,TAMP backup 116 register" hexmask.long 0x1D0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1D4 "TAMP_BKP117R,TAMP backup 117 register" hexmask.long 0x1D4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1D8 "TAMP_BKP118R,TAMP backup 118 register" hexmask.long 0x1D8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1DC "TAMP_BKP119R,TAMP backup 119 register" hexmask.long 0x1DC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1E0 "TAMP_BKP120R,TAMP backup 120 register" hexmask.long 0x1E0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1E4 "TAMP_BKP121R,TAMP backup 121 register" hexmask.long 0x1E4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1E8 "TAMP_BKP122R,TAMP backup 122 register" hexmask.long 0x1E8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1EC "TAMP_BKP123R,TAMP backup 123 register" hexmask.long 0x1EC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1F0 "TAMP_BKP124R,TAMP backup 124 register" hexmask.long 0x1F0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1F4 "TAMP_BKP125R,TAMP backup 125 register" hexmask.long 0x1F4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1F8 "TAMP_BKP126R,TAMP backup 126 register" hexmask.long 0x1F8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1FC "TAMP_BKP127R,TAMP backup 127 register" hexmask.long 0x1FC 0.--31. 1. "BKP,The application can write or read data to and from these registers." rgroup.long 0x3EC++0x13 line.long 0x0 "TAMP_HWCFGR2,TAMP hardware configuration register 2" hexmask.long.byte 0x0 24.--31. 1. "NUM_DEV_SECRETS,None" hexmask.long.byte 0x0 20.--23. 1. "CID_WIDTH,CID length" hexmask.long.byte 0x0 16.--19. 1. "RIF,CID compartment filtering" hexmask.long.byte 0x0 8.--11. 1. "TRUST_ZONE,Trust zone" hexmask.long.byte 0x0 0.--7. 1. "OPTIONREG_OUT,." line.long 0x4 "TAMP_HWCFGR1,TAMP hardware configuration register 1" hexmask.long.word 0x4 16.--31. 1. "INT_TAMPER,INT_TAMPER[i] = 0: internal tamper i+1 is not implemented (i from 0 to 15)" hexmask.long.byte 0x4 12.--15. 1. "ACTIVE_TAMPER,None" hexmask.long.byte 0x4 8.--11. 1. "TAMPER,." hexmask.long.byte 0x4 0.--7. 1. "BACKUP_REGS,." line.long 0x8 "TAMP_VERR,TAMP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "TAMP_IPIDR,TAMP identification register" hexmask.long 0xC 0.--31. 1. "ID,Identifier." line.long 0x10 "TAMP_SIDR,TAMP size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identifier." tree.end endif sif (cpuis("*CM33F")) tree "TAMP_S" base ad:0x56010000 group.long 0x0++0x13 line.long 0x0 "TAMP_CR1,TAMP control register 1" bitfld.long 0x0 30. "ITAMP15E,Internal tamper 15 enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "ITAMP14E,Internal tamper 14 enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "ITAMP12E,Internal tamper 12 enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "ITAMP11E,Internal tamper 11 enable" "B_0x0,B_0x1" bitfld.long 0x0 25. "ITAMP10E,Internal tamper 10 enable" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "ITAMP9E,Internal tamper 9 enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "ITAMP8E,Internal tamper 8 enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ITAMP7E,Internal tamper 7 enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "ITAMP6E,Internal tamper 6 enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "ITAMP5E,Internal tamper 5 enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "ITAMP4E,Internal tamper 4 enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "ITAMP3E,Internal tamper 3 enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "ITAMP2E,Internal tamper 2 enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "ITAMP1E,Internal tamper 1 enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TAMP8E,Tamper detection on TAMP_IN8 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "TAMP7E,Tamper detection on TAMP_IN7 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" bitfld.long 0x0 5. "TAMP6E,Tamper detection on TAMP_IN6 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" bitfld.long 0x0 4. "TAMP5E,Tamper detection on TAMP_IN5 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" bitfld.long 0x0 3. "TAMP4E,Tamper detection on TAMP_IN4 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" bitfld.long 0x0 2. "TAMP3E,Tamper detection on TAMP_IN3 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TAMP2E,Tamper detection on TAMP_IN2 enableless thansup>(1)less than/sup>" "B_0x0,B_0x1" bitfld.long 0x0 0. "TAMP1E,Tamper detection on TAMP_IN1 enable" "B_0x0,B_0x1" line.long 0x4 "TAMP_CR2,TAMP control register 2" bitfld.long 0x4 31. "TAMP8TRG,Active level for tamper 8 input (active mode disabled)" "B_0x0,B_0x1" bitfld.long 0x4 30. "TAMP7TRG,Active level for tamper 7 input (active mode disabled)" "B_0x0,B_0x1" bitfld.long 0x4 29. "TAMP6TRG,Active level for tamper 6 input (active mode disabled)" "B_0x0,B_0x1" bitfld.long 0x4 28. "TAMP5TRG,Active level for tamper 5 input (active mode disabled)" "B_0x0,B_0x1" bitfld.long 0x4 27. "TAMP4TRG,Active level for tamper 4 input (active mode disabled)" "B_0x0,B_0x1" newline bitfld.long 0x4 26. "TAMP3TRG,Active level for tamper 3 input" "B_0x0,B_0x1" bitfld.long 0x4 25. "TAMP2TRG,Active level for tamper 2 input" "B_0x0,B_0x1" bitfld.long 0x4 24. "TAMP1TRG,Active level for tamper 1 input" "B_0x0,B_0x1" bitfld.long 0x4 23. "BKERASE,Backup registers and device secretsless thansup>(1)less than/sup> erase" "0,1" bitfld.long 0x4 22. "BKBLOCK,Backup registers and device secretsless thansup>(1)less than/sup> access blocked" "B_0x0,B_0x1" newline bitfld.long 0x4 18. "TAMP3MSK,Tamper 3 mask" "B_0x0,B_0x1" bitfld.long 0x4 17. "TAMP2MSK,Tamper 2 mask" "B_0x0,B_0x1" bitfld.long 0x4 16. "TAMP1MSK,Tamper 1 mask" "B_0x0,B_0x1" bitfld.long 0x4 7. "TAMP8POM,Tamper 8 potential mode" "B_0x0,B_0x1" bitfld.long 0x4 6. "TAMP7POM,Tamper 7 potential mode" "B_0x0,B_0x1" newline bitfld.long 0x4 5. "TAMP6POM,Tamper 6 potential mode" "B_0x0,B_0x1" bitfld.long 0x4 4. "TAMP5POM,Tamper 5 potential mode" "B_0x0,B_0x1" bitfld.long 0x4 3. "TAMP4POM,Tamper 4 potential mode" "B_0x0,B_0x1" bitfld.long 0x4 2. "TAMP3POM,Tamper 3 potential mode" "B_0x0,B_0x1" bitfld.long 0x4 1. "TAMP2POM,Tamper 2 potential mode" "B_0x0,B_0x1" newline bitfld.long 0x4 0. "TAMP1POM,Tamper 1 potential mode" "B_0x0,B_0x1" line.long 0x8 "TAMP_CR3,TAMP control register 3" bitfld.long 0x8 14. "ITAMP15POM,Internal tamper 15 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "ITAMP14POM,Internal tamper 14 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 11. "ITAMP12POM,Internal tamper 12 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 10. "ITAMP11POM,Internal tamper 11 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 9. "ITAMP10POM,Internal tamper 10 potential mode" "B_0x0,B_0x1" newline bitfld.long 0x8 8. "ITAMP9POM,Internal tamper 9 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 7. "ITAMP8POM,Internal tamper 8 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 6. "ITAMP7POM,Internal tamper 7 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 5. "ITAMP6POM,Internal tamper 6 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 4. "ITAMP5POM,Internal tamper 5 potential mode" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "ITAMP4POM,Internal tamper 4 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 2. "ITAMP3POM,Internal tamper 3 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 1. "ITAMP2POM,Internal tamper 2 potential mode" "B_0x0,B_0x1" bitfld.long 0x8 0. "ITAMP1POM,Internal tamper 1 potential mode" "B_0x0,B_0x1" line.long 0xC "TAMP_FLTCR,TAMP filter control register" bitfld.long 0xC 7. "TAMPPUDIS,TAMP_INx pull-up disable" "B_0x0,B_0x1" bitfld.long 0xC 5.--6. "TAMPPRCH,TAMP_INx precharge duration" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 3.--4. "TAMPFLT,TAMP_INx filter count" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 0.--2. "TAMPFREQ,Tamper sampling frequency" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x10 "TAMP_ATCR1,TAMP active tamper control register 1" bitfld.long 0x10 31. "FLTEN,Active tamper filter enable" "B_0x0,B_0x1" bitfld.long 0x10 30. "ATOSHARE,Active tamper output sharing" "B_0x0,B_0x1" bitfld.long 0x10 24.--26. "ATPER,Active tamper output change period" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x10 16.--19. 1. "ATCKSEL,Active tamper RTC asynchronous prescaler clock selection" bitfld.long 0x10 14.--15. "ATOSEL4,Active tamper shared output 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x10 12.--13. "ATOSEL3,Active tamper shared output 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 10.--11. "ATOSEL2,Active tamper shared output 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 8.--9. "ATOSEL1,Active tamper shared output 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7. "TAMP8AM,Tamper 8 active mode" "B_0x0,B_0x1" bitfld.long 0x10 6. "TAMP7AM,Tamper 7 active mode" "B_0x0,B_0x1" newline bitfld.long 0x10 5. "TAMP6AM,Tamper 6 active mode" "B_0x0,B_0x1" bitfld.long 0x10 4. "TAMP5AM,Tamper 5 active mode" "B_0x0,B_0x1" bitfld.long 0x10 3. "TAMP4AM,Tamper 4 active mode" "B_0x0,B_0x1" bitfld.long 0x10 2. "TAMP3AM,Tamper 3 active mode" "B_0x0,B_0x1" bitfld.long 0x10 1. "TAMP2AM,Tamper 2 active mode" "B_0x0,B_0x1" newline bitfld.long 0x10 0. "TAMP1AM,Tamper 1 active mode" "B_0x0,B_0x1" wgroup.long 0x14++0x3 line.long 0x0 "TAMP_ATSEEDR,TAMP active tamper seed register" hexmask.long 0x0 0.--31. 1. "SEED,Pseudo-random generator seed value" rgroup.long 0x18++0x3 line.long 0x0 "TAMP_ATOR,TAMP active tamper output register" bitfld.long 0x0 15. "INITS,Active tamper initialization status" "0,1" bitfld.long 0x0 14. "SEEDF,Seed running flag" "0,1" hexmask.long.byte 0x0 0.--7. 1. "PRNG,Pseudo-random generator value" group.long 0x1C++0xB line.long 0x0 "TAMP_ATCR2,TAMP active tamper control register 2" bitfld.long 0x0 29.--31. "ATOSEL8,Active tamper shared output 8 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 26.--28. "ATOSEL7,Active tamper shared output 7 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 23.--25. "ATOSEL6,Active tamper shared output 6 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 20.--22. "ATOSEL5,Active tamper shared output 5 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 17.--19. "ATOSEL4,Active tamper shared output 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x0 14.--16. "ATOSEL3,Active tamper shared output 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 11.--13. "ATOSEL2,Active tamper shared output 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 8.--10. "ATOSEL1,Active tamper shared output 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x4 "TAMP_SECCFGR,TAMP secure configuration register" bitfld.long 0x4 31. "TAMPSEC,Tamper protection (excluding monotonic counters and backup registers)" "B_0x0,B_0x1" bitfld.long 0x4 30. "BHKLOCK,Boot hardware key lock" "B_0x0,B_0x1" hexmask.long.byte 0x4 16.--23. 1. "BKPWSEC,Backup registers write protection offset" bitfld.long 0x4 15. "CNT1SEC,Monotonic counter 1 secure protection" "B_0x0,B_0x1" bitfld.long 0x4 14. "CNT2SEC,Monotonic counter 2 secure protection" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 0.--7. 1. "BKPRWSEC,Backup registers read/write protection offset" line.long 0x8 "TAMP_PRIVCFGR,TAMP privilege configuration register" bitfld.long 0x8 31. "TAMPPRIV,Tamper privilege protection (excluding backup registers)" "B_0x0,B_0x1" bitfld.long 0x8 30. "BKPWPRIV,Backup registers zone 2 privilege protection" "B_0x0,B_0x1" bitfld.long 0x8 29. "BKPRWPRIV,Backup registers zone 1 privilege protection" "B_0x0,B_0x1" bitfld.long 0x8 15. "CNT1PRIV,Monotonic counter 1 privilege protection" "B_0x0,B_0x1" bitfld.long 0x8 14. "CNT2PRIV,Monotonic counter 2 privilege protection" "B_0x0,B_0x1" group.long 0x2C++0x7 line.long 0x0 "TAMP_IER,TAMP interrupt enable register" bitfld.long 0x0 30. "ITAMP15IE,Internal tamper 15 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "ITAMP14IE,Internal tamper 14 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 27. "ITAMP12IE,Internal tamper 12 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "ITAMP11IE,Internal tamper 11 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 25. "ITAMP10IE,Internal tamper 10 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 24. "ITAMP9IE,Internal tamper 9 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 23. "ITAMP8IE,Internal tamper 8 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 22. "ITAMP7IE,Internal tamper 7 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 21. "ITAMP6IE,Internal tamper 6 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 20. "ITAMP5IE,Internal tamper 5 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 19. "ITAMP4IE,Internal tamper 4 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 18. "ITAMP3IE,Internal tamper 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17. "ITAMP2IE,Internal tamper 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "ITAMP1IE,Internal tamper 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TAMP8IE,Tamper 8 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "TAMP7IE,Tamper 7interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "TAMP6IE,Tamper 6 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "TAMP5IE,Tamper 5 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TAMP4IE,Tamper 4 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "TAMP3IE,Tamper 3 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TAMP2IE,Tamper 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "TAMP1IE,Tamper 1 interrupt enable" "B_0x0,B_0x1" line.long 0x4 "TAMP_SR,TAMP status register" bitfld.long 0x4 30. "ITAMP15F,Internal tamper 15 flag" "0,1" rbitfld.long 0x4 29. "ITAMP14F,Internal tamper 14 flag" "0,1" rbitfld.long 0x4 27. "ITAMP12F,Internal tamper 12 flag" "0,1" rbitfld.long 0x4 26. "ITAMP11F,Internal tamper 11 flag" "0,1" rbitfld.long 0x4 25. "ITAMP10F,Internal tamper 10 flag" "0,1" newline rbitfld.long 0x4 24. "ITAMP9F,Internal tamper 9 flag" "0,1" rbitfld.long 0x4 23. "ITAMP8F,Internal tamper 8 flag" "0,1" rbitfld.long 0x4 22. "ITAMP7F,Internal tamper 7 flag" "0,1" rbitfld.long 0x4 21. "ITAMP6F,Internal tamper 6 flag" "0,1" rbitfld.long 0x4 20. "ITAMP5F,Internal tamper 5 flag" "0,1" newline rbitfld.long 0x4 19. "ITAMP4F,Internal tamper 4 flag" "0,1" rbitfld.long 0x4 18. "ITAMP3F,Internal tamper 3 flag" "0,1" rbitfld.long 0x4 17. "ITAMP2F,Internal tamper 2 flag" "0,1" rbitfld.long 0x4 16. "ITAMP1F,Internal tamper 1 flag" "0,1" rbitfld.long 0x4 7. "TAMP8F,TAMP8 detection flag" "0,1" newline rbitfld.long 0x4 6. "TAMP7F,TAMP7 detection flag" "0,1" rbitfld.long 0x4 5. "TAMP6F,TAMP6 detection flag" "0,1" rbitfld.long 0x4 4. "TAMP5F,TAMP5 detection flag" "0,1" rbitfld.long 0x4 3. "TAMP4F,TAMP4 detection flag" "0,1" rbitfld.long 0x4 2. "TAMP3F,TAMP3 detection flag" "0,1" newline rbitfld.long 0x4 1. "TAMP2F,TAMP2 detection flag" "0,1" rbitfld.long 0x4 0. "TAMP1F,TAMP1 detection flag" "0,1" rgroup.long 0x34++0x7 line.long 0x0 "TAMP_MISR,TAMP nonsecure masked interrupt status register" bitfld.long 0x0 30. "ITAMP15MF,internal tamper 15 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 29. "ITAMP14MF,internal tamper 14 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 27. "ITAMP12MF,internal tamper 12 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 26. "ITAMP11MF,internal tamper 11 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 25. "ITAMP10MF,internal tamper 10 nonsecure interrupt masked flag" "0,1" newline bitfld.long 0x0 24. "ITAMP9MF,internal tamper 9 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 23. "ITAMP8MF,Internal tamper 8 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 22. "ITAMP7MF,Internal tamper 7 tamper nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 21. "ITAMP6MF,Internal tamper 6 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 20. "ITAMP5MF,Internal tamper 5 nonsecure interrupt masked flag" "0,1" newline bitfld.long 0x0 19. "ITAMP4MF,Internal tamper 4 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 18. "ITAMP3MF,Internal tamper 3 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 17. "ITAMP2MF,Internal tamper 2 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 16. "ITAMP1MF,Internal tamper 1 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 7. "TAMP8MF,TAMP8 nonsecure interrupt masked flag" "0,1" newline bitfld.long 0x0 6. "TAMP7MF,TAMP7 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 5. "TAMP6MF,TAMP6 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 4. "TAMP5MF,TAMP5 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 3. "TAMP4MF,TAMP4 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 2. "TAMP3MF,TAMP3 nonsecure interrupt masked flag" "0,1" newline bitfld.long 0x0 1. "TAMP2MF,TAMP2 nonsecure interrupt masked flag" "0,1" bitfld.long 0x0 0. "TAMP1MF,TAMP1 nonsecure interrupt masked flag" "0,1" line.long 0x4 "TAMP_SMISR,TAMP secure masked interrupt status register" bitfld.long 0x4 30. "ITAMP15MF,internal tamper 15 secure interrupt masked flag" "0,1" bitfld.long 0x4 29. "ITAMP14MF,internal tamper 14 secure interrupt masked flag" "0,1" bitfld.long 0x4 27. "ITAMP12MF,internal tamper 12 secure interrupt masked flag" "0,1" bitfld.long 0x4 26. "ITAMP11MF,internal tamper 11 secure interrupt masked flag" "0,1" bitfld.long 0x4 25. "ITAMP10MF,internal tamper 10 secure interrupt masked flag" "0,1" newline bitfld.long 0x4 24. "ITAMP9MF,internal tamper 9 secure interrupt masked flag" "0,1" bitfld.long 0x4 23. "ITAMP8MF,Internal tamper 8 secure interrupt masked flag" "0,1" bitfld.long 0x4 22. "ITAMP7MF,Internal tamper 7 secure interrupt masked flag" "0,1" bitfld.long 0x4 21. "ITAMP6MF,Internal tamper 6 secure interrupt masked flag" "0,1" bitfld.long 0x4 20. "ITAMP5MF,Internal tamper 5 secure interrupt masked flag" "0,1" newline bitfld.long 0x4 19. "ITAMP4MF,Internal tamper 4 secure interrupt masked flag" "0,1" bitfld.long 0x4 18. "ITAMP3MF,Internal tamper 3 secure interrupt masked flag" "0,1" bitfld.long 0x4 17. "ITAMP2MF,Internal tamper 2 secure interrupt masked flag" "0,1" bitfld.long 0x4 16. "ITAMP1MF,Internal tamper 1 secure interrupt masked flag" "0,1" bitfld.long 0x4 7. "TAMP8MF,TAMP8 secure interrupt masked flag" "0,1" newline bitfld.long 0x4 6. "TAMP7MF,TAMP7 secure interrupt masked flag" "0,1" bitfld.long 0x4 5. "TAMP6MF,TAMP6 secure interrupt masked flag" "0,1" bitfld.long 0x4 4. "TAMP5MF,TAMP5 secure interrupt masked flag" "0,1" bitfld.long 0x4 3. "TAMP4MF,TAMP4 secure interrupt masked flag" "0,1" bitfld.long 0x4 2. "TAMP3MF,TAMP3 secure interrupt masked flag" "0,1" newline bitfld.long 0x4 1. "TAMP2MF,TAMP2 secure interrupt masked flag" "0,1" bitfld.long 0x4 0. "TAMP1MF,TAMP1 secure interrupt masked flag" "0,1" wgroup.long 0x3C++0x3 line.long 0x0 "TAMP_SCR,TAMP status clear register" bitfld.long 0x0 30. "CITAMP15F,Clear ITAMP15 detection flag" "0,1" bitfld.long 0x0 29. "CITAMP14F,Clear ITAMP14 detection flag" "0,1" bitfld.long 0x0 27. "CITAMP12F,Clear ITAMP12 detection flag" "0,1" bitfld.long 0x0 26. "CITAMP11F,Clear ITAMP11 detection flag" "0,1" bitfld.long 0x0 25. "CITAMP10F,Clear ITAMP10 detection flag" "0,1" newline bitfld.long 0x0 24. "CITAMP9F,Clear ITAMP9 detection flag" "0,1" bitfld.long 0x0 23. "CITAMP8F,Clear ITAMP8 detection flag" "0,1" bitfld.long 0x0 22. "CITAMP7F,Clear ITAMP7 detection flag" "0,1" bitfld.long 0x0 21. "CITAMP6F,Clear ITAMP6 detection flag" "0,1" bitfld.long 0x0 20. "CITAMP5F,Clear ITAMP5 detection flag" "0,1" newline bitfld.long 0x0 19. "CITAMP4F,Clear ITAMP4 detection flag" "0,1" bitfld.long 0x0 18. "CITAMP3F,Clear ITAMP3 detection flag" "0,1" bitfld.long 0x0 17. "CITAMP2F,Clear ITAMP2 detection flag" "0,1" bitfld.long 0x0 16. "CITAMP1F,Clear ITAMP1 detection flag" "0,1" bitfld.long 0x0 7. "CTAMP8F,Clear TAMP8 detection flag" "0,1" newline bitfld.long 0x0 6. "CTAMP7F,Clear TAMP7 detection flag" "0,1" bitfld.long 0x0 5. "CTAMP6F,Clear TAMP6 detection flag" "0,1" bitfld.long 0x0 4. "CTAMP5F,Clear TAMP5 detection flag" "0,1" bitfld.long 0x0 3. "CTAMP4F,Clear TAMP4 detection flag" "0,1" bitfld.long 0x0 2. "CTAMP3F,Clear TAMP3 detection flag" "0,1" newline bitfld.long 0x0 1. "CTAMP2F,Clear TAMP2 detection flag" "0,1" bitfld.long 0x0 0. "CTAMP1F,Clear TAMP1 detection flag" "0,1" rgroup.long 0x40++0x7 line.long 0x0 "TAMP_COUNT1R,TAMP monotonic counter 1 register" hexmask.long 0x0 0.--31. 1. "COUNT,This register is read-only only and is incremented by one when a write access is done to this register." line.long 0x4 "TAMP_COUNT2R,TAMP monotonic counter 2 register" hexmask.long 0x4 0.--31. 1. "COUNT,Monotonic counter" group.long 0x50++0x7 line.long 0x0 "TAMP_OR,TAMP option register" bitfld.long 0x0 3. "BSDIS,Boundary scan disable" "B_0x0,B_0x1" bitfld.long 0x0 2. "IN5_RMP,TAMP_IN5 mapping" "B_0x0,B_0x1" bitfld.long 0x0 1. "IN3_RMP,TAMP_IN3 mapping" "B_0x0,B_0x1" bitfld.long 0x0 0. "IN1_RMP,TAMP_IN1 mapping" "B_0x0,B_0x1" line.long 0x4 "TAMP_RPCFGR,TAMP resources protection configuration register" bitfld.long 0x4 0. "RPCFG0,Configurable resource 0 protection" "B_0x0,B_0x1" group.long 0x70++0xB line.long 0x0 "TAMP_BKPRIFR1,TAMP Backup registers RIF register 1" hexmask.long.byte 0x0 0.--7. 1. "BKPRWRIF,Protection zone 1-RIF area offset" line.long 0x4 "TAMP_BKPRIFR2,TAMP Backup registers RIF register 2" hexmask.long.byte 0x4 0.--7. 1. "BKPWRIF,Protection zone 2-RIF area offset" line.long 0x8 "TAMP_BKPRIFR3,TAMP Backup registers RIF register 3" hexmask.long.byte 0x8 16.--23. 1. "BKPWRIF2,Protection zone 3-RIF area offset 2" hexmask.long.byte 0x8 0.--7. 1. "BKPWRIF1,Protection zone 3-RIF area offset 1" group.long 0x80++0xB line.long 0x0 "TAMP_R0CIDCFGR,TAMP Resource 0 CID configuration register" bitfld.long 0x0 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x4 "TAMP_R1CIDCFGR,TAMP Resource 1 CID configuration register" bitfld.long 0x4 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" line.long 0x8 "TAMP_R2CIDCFGR,TAMP Resource 2 CID configuration register" bitfld.long 0x8 4.--6. "CID,Compartment identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "CFEN,Compartment ID filter enable" "B_0x0,B_0x1" group.long 0x100++0x1FF line.long 0x0 "TAMP_BKP0R,TAMP backup 0 register" hexmask.long 0x0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x4 "TAMP_BKP1R,TAMP backup 1 register" hexmask.long 0x4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x8 "TAMP_BKP2R,TAMP backup 2 register" hexmask.long 0x8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xC "TAMP_BKP3R,TAMP backup 3 register" hexmask.long 0xC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x10 "TAMP_BKP4R,TAMP backup 4 register" hexmask.long 0x10 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x14 "TAMP_BKP5R,TAMP backup 5 register" hexmask.long 0x14 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x18 "TAMP_BKP6R,TAMP backup 6 register" hexmask.long 0x18 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1C "TAMP_BKP7R,TAMP backup 7 register" hexmask.long 0x1C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x20 "TAMP_BKP8R,TAMP backup 8 register" hexmask.long 0x20 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x24 "TAMP_BKP9R,TAMP backup 9 register" hexmask.long 0x24 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x28 "TAMP_BKP10R,TAMP backup 10 register" hexmask.long 0x28 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x2C "TAMP_BKP11R,TAMP backup 11 register" hexmask.long 0x2C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x30 "TAMP_BKP12R,TAMP backup 12 register" hexmask.long 0x30 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x34 "TAMP_BKP13R,TAMP backup 13 register" hexmask.long 0x34 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x38 "TAMP_BKP14R,TAMP backup 14 register" hexmask.long 0x38 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x3C "TAMP_BKP15R,TAMP backup 15 register" hexmask.long 0x3C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x40 "TAMP_BKP16R,TAMP backup 16 register" hexmask.long 0x40 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x44 "TAMP_BKP17R,TAMP backup 17 register" hexmask.long 0x44 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x48 "TAMP_BKP18R,TAMP backup 18 register" hexmask.long 0x48 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x4C "TAMP_BKP19R,TAMP backup 19 register" hexmask.long 0x4C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x50 "TAMP_BKP20R,TAMP backup 20 register" hexmask.long 0x50 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x54 "TAMP_BKP21R,TAMP backup 21 register" hexmask.long 0x54 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x58 "TAMP_BKP22R,TAMP backup 22 register" hexmask.long 0x58 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x5C "TAMP_BKP23R,TAMP backup 23 register" hexmask.long 0x5C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x60 "TAMP_BKP24R,TAMP backup 24 register" hexmask.long 0x60 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x64 "TAMP_BKP25R,TAMP backup 25 register" hexmask.long 0x64 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x68 "TAMP_BKP26R,TAMP backup 26 register" hexmask.long 0x68 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x6C "TAMP_BKP27R,TAMP backup 27 register" hexmask.long 0x6C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x70 "TAMP_BKP28R,TAMP backup 28 register" hexmask.long 0x70 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x74 "TAMP_BKP29R,TAMP backup 29 register" hexmask.long 0x74 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x78 "TAMP_BKP30R,TAMP backup 30 register" hexmask.long 0x78 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x7C "TAMP_BKP31R,TAMP backup 31 register" hexmask.long 0x7C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x80 "TAMP_BKP32R,TAMP backup 32 register" hexmask.long 0x80 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x84 "TAMP_BKP33R,TAMP backup 33 register" hexmask.long 0x84 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x88 "TAMP_BKP34R,TAMP backup 34 register" hexmask.long 0x88 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x8C "TAMP_BKP35R,TAMP backup 35 register" hexmask.long 0x8C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x90 "TAMP_BKP36R,TAMP backup 36 register" hexmask.long 0x90 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x94 "TAMP_BKP37R,TAMP backup 37 register" hexmask.long 0x94 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x98 "TAMP_BKP38R,TAMP backup 38 register" hexmask.long 0x98 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x9C "TAMP_BKP39R,TAMP backup 39 register" hexmask.long 0x9C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xA0 "TAMP_BKP40R,TAMP backup 40 register" hexmask.long 0xA0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xA4 "TAMP_BKP41R,TAMP backup 41 register" hexmask.long 0xA4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xA8 "TAMP_BKP42R,TAMP backup 42 register" hexmask.long 0xA8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xAC "TAMP_BKP43R,TAMP backup 43 register" hexmask.long 0xAC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xB0 "TAMP_BKP44R,TAMP backup 44 register" hexmask.long 0xB0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xB4 "TAMP_BKP45R,TAMP backup 45 register" hexmask.long 0xB4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xB8 "TAMP_BKP46R,TAMP backup 46 register" hexmask.long 0xB8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xBC "TAMP_BKP47R,TAMP backup 47 register" hexmask.long 0xBC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xC0 "TAMP_BKP48R,TAMP backup 48 register" hexmask.long 0xC0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xC4 "TAMP_BKP49R,TAMP backup 49 register" hexmask.long 0xC4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xC8 "TAMP_BKP50R,TAMP backup 50 register" hexmask.long 0xC8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xCC "TAMP_BKP51R,TAMP backup 51 register" hexmask.long 0xCC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xD0 "TAMP_BKP52R,TAMP backup 52 register" hexmask.long 0xD0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xD4 "TAMP_BKP53R,TAMP backup 53 register" hexmask.long 0xD4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xD8 "TAMP_BKP54R,TAMP backup 54 register" hexmask.long 0xD8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xDC "TAMP_BKP55R,TAMP backup 55 register" hexmask.long 0xDC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xE0 "TAMP_BKP56R,TAMP backup 56 register" hexmask.long 0xE0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xE4 "TAMP_BKP57R,TAMP backup 57 register" hexmask.long 0xE4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xE8 "TAMP_BKP58R,TAMP backup 58 register" hexmask.long 0xE8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xEC "TAMP_BKP59R,TAMP backup 59 register" hexmask.long 0xEC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xF0 "TAMP_BKP60R,TAMP backup 60 register" hexmask.long 0xF0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xF4 "TAMP_BKP61R,TAMP backup 61 register" hexmask.long 0xF4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xF8 "TAMP_BKP62R,TAMP backup 62 register" hexmask.long 0xF8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0xFC "TAMP_BKP63R,TAMP backup 63 register" hexmask.long 0xFC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x100 "TAMP_BKP64R,TAMP backup 64 register" hexmask.long 0x100 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x104 "TAMP_BKP65R,TAMP backup 65 register" hexmask.long 0x104 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x108 "TAMP_BKP66R,TAMP backup 66 register" hexmask.long 0x108 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x10C "TAMP_BKP67R,TAMP backup 67 register" hexmask.long 0x10C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x110 "TAMP_BKP68R,TAMP backup 68 register" hexmask.long 0x110 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x114 "TAMP_BKP69R,TAMP backup 69 register" hexmask.long 0x114 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x118 "TAMP_BKP70R,TAMP backup 70 register" hexmask.long 0x118 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x11C "TAMP_BKP71R,TAMP backup 71 register" hexmask.long 0x11C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x120 "TAMP_BKP72R,TAMP backup 72 register" hexmask.long 0x120 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x124 "TAMP_BKP73R,TAMP backup 73 register" hexmask.long 0x124 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x128 "TAMP_BKP74R,TAMP backup 74 register" hexmask.long 0x128 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x12C "TAMP_BKP75R,TAMP backup 75 register" hexmask.long 0x12C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x130 "TAMP_BKP76R,TAMP backup 76 register" hexmask.long 0x130 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x134 "TAMP_BKP77R,TAMP backup 77 register" hexmask.long 0x134 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x138 "TAMP_BKP78R,TAMP backup 78 register" hexmask.long 0x138 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x13C "TAMP_BKP79R,TAMP backup 79 register" hexmask.long 0x13C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x140 "TAMP_BKP80R,TAMP backup 80 register" hexmask.long 0x140 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x144 "TAMP_BKP81R,TAMP backup 81 register" hexmask.long 0x144 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x148 "TAMP_BKP82R,TAMP backup 82 register" hexmask.long 0x148 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x14C "TAMP_BKP83R,TAMP backup 83 register" hexmask.long 0x14C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x150 "TAMP_BKP84R,TAMP backup 84 register" hexmask.long 0x150 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x154 "TAMP_BKP85R,TAMP backup 85 register" hexmask.long 0x154 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x158 "TAMP_BKP86R,TAMP backup 86 register" hexmask.long 0x158 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x15C "TAMP_BKP87R,TAMP backup 87 register" hexmask.long 0x15C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x160 "TAMP_BKP88R,TAMP backup 88 register" hexmask.long 0x160 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x164 "TAMP_BKP89R,TAMP backup 89 register" hexmask.long 0x164 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x168 "TAMP_BKP90R,TAMP backup 90 register" hexmask.long 0x168 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x16C "TAMP_BKP91R,TAMP backup 91 register" hexmask.long 0x16C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x170 "TAMP_BKP92R,TAMP backup 92 register" hexmask.long 0x170 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x174 "TAMP_BKP93R,TAMP backup 93 register" hexmask.long 0x174 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x178 "TAMP_BKP94R,TAMP backup 94 register" hexmask.long 0x178 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x17C "TAMP_BKP95R,TAMP backup 95 register" hexmask.long 0x17C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x180 "TAMP_BKP96R,TAMP backup 96 register" hexmask.long 0x180 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x184 "TAMP_BKP97R,TAMP backup 97 register" hexmask.long 0x184 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x188 "TAMP_BKP98R,TAMP backup 98 register" hexmask.long 0x188 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x18C "TAMP_BKP99R,TAMP backup 99 register" hexmask.long 0x18C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x190 "TAMP_BKP100R,TAMP backup 100 register" hexmask.long 0x190 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x194 "TAMP_BKP101R,TAMP backup 101 register" hexmask.long 0x194 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x198 "TAMP_BKP102R,TAMP backup 102 register" hexmask.long 0x198 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x19C "TAMP_BKP103R,TAMP backup 103 register" hexmask.long 0x19C 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1A0 "TAMP_BKP104R,TAMP backup 104 register" hexmask.long 0x1A0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1A4 "TAMP_BKP105R,TAMP backup 105 register" hexmask.long 0x1A4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1A8 "TAMP_BKP106R,TAMP backup 106 register" hexmask.long 0x1A8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1AC "TAMP_BKP107R,TAMP backup 107 register" hexmask.long 0x1AC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1B0 "TAMP_BKP108R,TAMP backup 108 register" hexmask.long 0x1B0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1B4 "TAMP_BKP109R,TAMP backup 109 register" hexmask.long 0x1B4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1B8 "TAMP_BKP110R,TAMP backup 110 register" hexmask.long 0x1B8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1BC "TAMP_BKP111R,TAMP backup 111 register" hexmask.long 0x1BC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1C0 "TAMP_BKP112R,TAMP backup 112 register" hexmask.long 0x1C0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1C4 "TAMP_BKP113R,TAMP backup 113 register" hexmask.long 0x1C4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1C8 "TAMP_BKP114R,TAMP backup 114 register" hexmask.long 0x1C8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1CC "TAMP_BKP115R,TAMP backup 115 register" hexmask.long 0x1CC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1D0 "TAMP_BKP116R,TAMP backup 116 register" hexmask.long 0x1D0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1D4 "TAMP_BKP117R,TAMP backup 117 register" hexmask.long 0x1D4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1D8 "TAMP_BKP118R,TAMP backup 118 register" hexmask.long 0x1D8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1DC "TAMP_BKP119R,TAMP backup 119 register" hexmask.long 0x1DC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1E0 "TAMP_BKP120R,TAMP backup 120 register" hexmask.long 0x1E0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1E4 "TAMP_BKP121R,TAMP backup 121 register" hexmask.long 0x1E4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1E8 "TAMP_BKP122R,TAMP backup 122 register" hexmask.long 0x1E8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1EC "TAMP_BKP123R,TAMP backup 123 register" hexmask.long 0x1EC 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1F0 "TAMP_BKP124R,TAMP backup 124 register" hexmask.long 0x1F0 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1F4 "TAMP_BKP125R,TAMP backup 125 register" hexmask.long 0x1F4 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1F8 "TAMP_BKP126R,TAMP backup 126 register" hexmask.long 0x1F8 0.--31. 1. "BKP,The application can write or read data to and from these registers." line.long 0x1FC "TAMP_BKP127R,TAMP backup 127 register" hexmask.long 0x1FC 0.--31. 1. "BKP,The application can write or read data to and from these registers." rgroup.long 0x3EC++0x13 line.long 0x0 "TAMP_HWCFGR2,TAMP hardware configuration register 2" hexmask.long.byte 0x0 24.--31. 1. "NUM_DEV_SECRETS,None" hexmask.long.byte 0x0 20.--23. 1. "CID_WIDTH,CID length" hexmask.long.byte 0x0 16.--19. 1. "RIF,CID compartment filtering" hexmask.long.byte 0x0 8.--11. 1. "TRUST_ZONE,Trust zone" hexmask.long.byte 0x0 0.--7. 1. "OPTIONREG_OUT,." line.long 0x4 "TAMP_HWCFGR1,TAMP hardware configuration register 1" hexmask.long.word 0x4 16.--31. 1. "INT_TAMPER,INT_TAMPER[i] = 0: internal tamper i+1 is not implemented (i from 0 to 15)" hexmask.long.byte 0x4 12.--15. 1. "ACTIVE_TAMPER,None" hexmask.long.byte 0x4 8.--11. 1. "TAMPER,." hexmask.long.byte 0x4 0.--7. 1. "BACKUP_REGS,." line.long 0x8 "TAMP_VERR,TAMP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision" line.long 0xC "TAMP_IPIDR,TAMP identification register" hexmask.long 0xC 0.--31. 1. "ID,Identifier." line.long 0x10 "TAMP_SIDR,TAMP size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identifier." tree.end endif tree.end sif (cpuis("*CA35")||cpuis("*CM33F")) tree "TIM (Timer)" base ad:0x0 tree "TIM1" base ad:0x40200000 group.word 0x0++0x1 line.word 0x0 "TIM1_CR1,TIM1 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.word 0x0 4. "DIR,Direction" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One pulse mode" "B_0x0,B_0x1" bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.long 0x4++0xF line.long 0x0 "TIM1_CR2,TIM1 control register 2" bitfld.long 0x0 25. "MMS_2,MMS_2" "0,1" hexmask.long.byte 0x0 20.--23. 1. "MMS2,MMS2" bitfld.long 0x0 18. "OIS6,OIS6" "0,1" bitfld.long 0x0 16. "OIS5,OIS5" "0,1" bitfld.long 0x0 15. "OIS4N,OIS4N" "0,1" newline bitfld.long 0x0 14. "OIS4,OIS4" "0,1" bitfld.long 0x0 13. "OIS3N,OIS3N" "0,1" bitfld.long 0x0 12. "OIS3,OIS3" "0,1" bitfld.long 0x0 11. "OIS2N,OIS2N" "0,1" bitfld.long 0x0 10. "OIS2,OIS2" "0,1" newline bitfld.long 0x0 9. "OIS1N,OIS1N" "0,1" bitfld.long 0x0 8. "OIS1,OIS1" "0,1" bitfld.long 0x0 7. "TI1S,TI1S" "0,1" bitfld.long 0x0 4.--6. "MMS_1,MMS_1" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "CCDS,CCDS" "0,1" newline bitfld.long 0x0 2. "CCUS,CCUS" "0,1" bitfld.long 0x0 0. "CCPC,CCPC" "0,1" line.long 0x4 "TIM1_SMCR,TIM1 slave mode control register" bitfld.long 0x4 25. "SMSPS,SMS preload source" "B_0x0,B_0x1" bitfld.long 0x4 24. "SMSPE,SMS preload enable" "B_0x0,B_0x1" bitfld.long 0x4 20.--21. "TS2,Trigger selection - bit 4:3" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16. "SMS2,Slave mode selection" "B_0x0,B_0x1" bitfld.long 0x4 15. "ETP,External trigger polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 14. "ECE,External clock enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter" bitfld.long 0x4 7. "MSM,Master/slave mode" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "TS1,Trigger selection - bit 4:3" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 0.--2. "SMS1,Slave mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "TIM1_DIER,TIM1 DMA/interrupt enable register" bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "COMDE,COM DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 12. "CC4DE,Capture/compare 4 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 11. "CC3DE,Capture/compare 3 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CC2DE,Capture/compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "CC1DE,Capture/compare 1 DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "BIE,Break interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 5. "COMIE,COM interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "CC4IE,Capture/compare 4 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CC3IE,Capture/compare 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 2. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 1. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" line.long 0xC "TIM1_SR,TIM1 status register" bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 20. "IDXF,Index interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 17. "CC6IF,Compare 6 interrupt flag" "0,1" newline bitfld.long 0xC 16. "CC5IF,Compare 5 interrupt flag" "0,1" bitfld.long 0xC 13. "SBIF,System break interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 12. "CC4OF,Capture/compare 4 overcapture flag" "0,1" bitfld.long 0xC 11. "CC3OF,Capture/compare 3 overcapture flag" "0,1" bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1" newline bitfld.long 0xC 9. "CC1OF,Capture/compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.long 0xC 8. "B2IF,Break 2 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 7. "BIF,Break interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 5. "COMIF,COM interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0xC 4. "CC4IF,Capture/compare 4 interrupt flag" "0,1" bitfld.long 0xC 3. "CC3IF,Capture/compare 3 interrupt flag" "0,1" bitfld.long 0xC 2. "CC2IF,Capture/compare 2 interrupt flag" "0,1" bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM1_EGR,TIM1 event generation register" bitfld.word 0x0 8. "B2G,Break 2 generation" "B_0x0,B_0x1" bitfld.word 0x0 7. "BG,Break generation" "B_0x0,B_0x1" bitfld.word 0x0 6. "TG,Trigger generation" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMG,Capture/compare control update generation" "B_0x0,B_0x1" bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1" newline bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1" bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM1_CCMR1_Input,TIM1 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 Selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x18++0x7 line.long 0x0 "TIM1_CCMR1_Output,TIM1 capture/compare mode register 1 [alternate]" bitfld.long 0x0 24. "OC2M2,Output compare 2 mode" "0,1" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2M1,Output compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1" newline bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM1_CCMR2_Input,TIM1 capture/compare mode register 2 [alternate]" hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x4 8.--9. "CC4S,Capture/compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" newline bitfld.long 0x4 0.--1. "CC3S,Capture/compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x1C++0xB line.long 0x0 "TIM1_CCMR2_Output,TIM1 capture/compare mode register 2 [alternate]" bitfld.long 0x0 24. "OC4M2,Output compare 4 mode" "0,1" bitfld.long 0x0 16. "OC3M2,Output compare 3 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC4M1,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1" newline bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC4S,Capture/compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC3M1,Output compare 3 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1" newline bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1" bitfld.long 0x0 0.--1. "CC3S,Capture/compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM1_CCER,TIM1 capture/compare enable register" bitfld.long 0x4 21. "CC6P,Capture/compare 6 output polarity" "0,1" bitfld.long 0x4 20. "CC6E,Capture/compare 6 output enable" "0,1" bitfld.long 0x4 17. "CC5P,Capture/compare 5 output polarity" "0,1" bitfld.long 0x4 16. "CC5E,Capture/compare 5 output enable" "0,1" bitfld.long 0x4 15. "CC4NP,Capture/compare 4 complementary output polarity" "0,1" newline bitfld.long 0x4 14. "CC4NE,Capture/compare 4 complementary output enable" "0,1" bitfld.long 0x4 13. "CC4P,Capture/compare 4 output polarity" "0,1" bitfld.long 0x4 12. "CC4E,Capture/compare 4 output enable" "0,1" bitfld.long 0x4 11. "CC3NP,Capture/compare 3 complementary output polarity" "0,1" bitfld.long 0x4 10. "CC3NE,Capture/compare 3 complementary output enable" "0,1" newline bitfld.long 0x4 9. "CC3P,Capture/compare 3 output polarity" "0,1" bitfld.long 0x4 8. "CC3E,Capture/compare 3 output enable" "0,1" bitfld.long 0x4 7. "CC2NP,Capture/compare 2 complementary output polarity" "0,1" bitfld.long 0x4 6. "CC2NE,Capture/compare 2 complementary output enable" "0,1" bitfld.long 0x4 5. "CC2P,Capture/compare 2 output polarity" "0,1" newline bitfld.long 0x4 4. "CC2E,Capture/compare 2 output enable" "0,1" bitfld.long 0x4 3. "CC1NP,Capture/compare 1 complementary output polarity" "B_0x0,B_0x1" bitfld.long 0x4 2. "CC1NE,Capture/compare 1 complementary output enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CC1P,Capture/compare 1 output polarity" "B_0x0,B_0x1" bitfld.long 0x4 0. "CC1E,Capture/compare 1 output enable" "B_0x0,B_0x1" line.long 0x8 "TIM1_CNT,TIM1 counter" rbitfld.long 0x8 31. "UIFCPY,UIF copy" "0,1" hexmask.long.word 0x8 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM1_PSC,TIM1 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM1_ARR,TIM1 auto-reload register" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.word 0x30++0x1 line.word 0x0 "TIM1_RCR,TIM1 repetition counter register" hexmask.word 0x0 0.--15. 1. "REP,Repetition counter reload value" group.long 0x34++0x33 line.long 0x0 "TIM1_CCR1,TIM1 capture/compare register 1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value" line.long 0x4 "TIM1_CCR2,TIM1 capture/compare register 2" hexmask.long.tbyte 0x4 0.--19. 1. "CCR2,Capture/compare 2 value" line.long 0x8 "TIM1_CCR3,TIM1 capture/compare register 3" hexmask.long.tbyte 0x8 0.--19. 1. "CCR3,Capture/compare value" line.long 0xC "TIM1_CCR4,TIM1 capture/compare register 4" hexmask.long.tbyte 0xC 0.--19. 1. "CCR4,Capture/compare value" line.long 0x10 "TIM1_BDTR,TIM1 break and dead-time register" bitfld.long 0x10 29. "BK2BID,Break2 bidirectional" "0,1" bitfld.long 0x10 28. "BKBID,Break bidirectional" "B_0x0,B_0x1" bitfld.long 0x10 27. "BK2DSRM,Break2 disarm" "0,1" bitfld.long 0x10 26. "BKDSRM,Break disarm" "B_0x0,B_0x1" bitfld.long 0x10 25. "BK2P,Break 2 polarity" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "BK2E,Break 2 enable" "B_0x0,B_0x1" hexmask.long.byte 0x10 20.--23. 1. "BK2F,Break 2 filter" hexmask.long.byte 0x10 16.--19. 1. "BKF,Break filter" bitfld.long 0x10 15. "MOE,Main output enable" "B_0x0,B_0x1" bitfld.long 0x10 14. "AOE,Automatic output enable" "B_0x0,B_0x1" newline bitfld.long 0x10 13. "BKP,Break polarity" "B_0x0,B_0x1" bitfld.long 0x10 12. "BKE,Break enable" "B_0x0,B_0x1" bitfld.long 0x10 11. "OSSR,Off-state selection for Run mode" "B_0x0,B_0x1" bitfld.long 0x10 10. "OSSI,Off-state selection for idle mode" "B_0x0,B_0x1" bitfld.long 0x10 8.--9. "LOCK,Lock configuration" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x10 0.--7. 1. "DTG,Dead-time generator setup" line.long 0x14 "TIM1_CCR5,TIM1 capture/compare register 5" bitfld.long 0x14 31. "GC5C3,Group channel 5 and channel 3" "B_0x0,B_0x1" bitfld.long 0x14 30. "GC5C2,Group channel 5 and channel 2" "B_0x0,B_0x1" bitfld.long 0x14 29. "GC5C1,Group channel 5 and channel 1" "B_0x0,B_0x1" hexmask.long.tbyte 0x14 0.--19. 1. "CCR5,Capture/compare 5 value" line.long 0x18 "TIM1_CCR6,TIM1 capture/compare register 6" hexmask.long.tbyte 0x18 0.--19. 1. "CCR6,Capture/compare 6 value" line.long 0x1C "TIM1_CCMR3,TIM1 capture/compare mode register 3" bitfld.long 0x1C 24. "OC6M2,Output compare 6 mode" "0,1" bitfld.long 0x1C 16. "OC5M2,Output compare 5 mode" "0,1" bitfld.long 0x1C 15. "OC6CE,Output compare 6 clear enable" "0,1" bitfld.long 0x1C 12.--14. "OC6M1,Output compare 6 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 11. "OC6PE,Output compare 6 preload enable" "0,1" newline bitfld.long 0x1C 10. "OC6FE,Output compare 6 fast enable" "0,1" bitfld.long 0x1C 7. "OC5CE,Output compare 5 clear enable" "0,1" bitfld.long 0x1C 4.--6. "OC5M1,Output compare 5 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 3. "OC5PE,Output compare 5 preload enable" "0,1" bitfld.long 0x1C 2. "OC5FE,Output compare 5 fast enable" "0,1" line.long 0x20 "TIM1_DTR2,TIM1 timer deadtime register 2" bitfld.long 0x20 17. "DTPE,Deadtime preload enable" "B_0x0,B_0x1" bitfld.long 0x20 16. "DTAE,Deadtime asymmetric enable" "B_0x0,B_0x1" hexmask.long.byte 0x20 0.--7. 1. "DTGF,Dead-time falling edge generator setup" line.long 0x24 "TIM1_ECR,TIM1 timer encoder control register" bitfld.long 0x24 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x24 16.--23. 1. "PW,Pulse width" bitfld.long 0x24 6.--7. "IPOS,Index positioning" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x24 5. "FIDX,First index" "B_0x0,B_0x1" bitfld.long 0x24 3.--4. "IBLK,Index blanking" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x24 1.--2. "IDIR,Index direction" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x24 0. "IE,Index enable" "B_0x0,B_0x1" line.long 0x28 "TIM1_TISEL,TIM1 timer input selection register" hexmask.long.byte 0x28 24.--27. 1. "TI4SEL,Selects tim_ti4[0..15] input" hexmask.long.byte 0x28 16.--19. 1. "TI3SEL,Selects tim_ti3[0..15] input" hexmask.long.byte 0x28 8.--11. 1. "TI2SEL,Selects tim_ti2[0..15] input" hexmask.long.byte 0x28 0.--3. 1. "TI1SEL,Selects tim_ti1[0..15] input" line.long 0x2C "TIM1_AF1,TIM1 alternate function option register 1" hexmask.long.byte 0x2C 14.--17. 1. "ETRSEL,etr_in source selection" bitfld.long 0x2C 13. "BKCMP4P,tim_brk_cmp4 input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 12. "BKCMP3P,tim_brk_cmp3 input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 11. "BKCMP2P,tim_brk_cmp2 input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 10. "BKCMP1P,tim_brk_cmp1 input polarity" "B_0x0,B_0x1" newline bitfld.long 0x2C 9. "BKINP,TIMx_BKIN input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 8. "BKCMP8E,tim_brk_cmp8 enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "BKCMP7E,tim_brk_cmp7 enable" "B_0x0,B_0x1" bitfld.long 0x2C 6. "BKCMP6E,tim_brk_cmp6 enable" "B_0x0,B_0x1" bitfld.long 0x2C 5. "BKCMP5E,tim_brk_cmp5 enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 4. "BKCMP4E,tim_brk_cmp4 enable" "B_0x0,B_0x1" bitfld.long 0x2C 3. "BKCMP3E,tim_brk_cmp3 enable" "B_0x0,B_0x1" bitfld.long 0x2C 2. "BKCMP2E,tim_brk_cmp2 enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "BKCMP1E,tim_brk_cmp1 enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "BKINE,TIMx_BKIN input enable" "B_0x0,B_0x1" line.long 0x30 "TIM1_AF2,TIM1 alternate function register 2" bitfld.long 0x30 16.--18. "OCRSEL,ocref_clr source selection" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" bitfld.long 0x30 13. "BK2CMP4P,tim_brk2_cmp4 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 12. "BK2CMP3P,tim_brk2_cmp3 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 11. "BK2CMP2P,tim_brk2_cmp2 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 10. "BK2CMP1P,tim_brk2_cmp1 input polarity" "B_0x0,B_0x1" newline bitfld.long 0x30 9. "BK2INP,TIMx_BKIN2 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 8. "BK2CMP8E,tim_brk2_cmp8 enable" "B_0x0,B_0x1" bitfld.long 0x30 7. "BK2CMP7E,tim_brk2_cmp7 enable" "B_0x0,B_0x1" bitfld.long 0x30 6. "BK2CMP6E,tim_brk2_cmp6 enable" "B_0x0,B_0x1" bitfld.long 0x30 5. "BK2CMP5E,tim_brk2_cmp5 enable" "B_0x0,B_0x1" newline bitfld.long 0x30 4. "BK2CMP4E,tim_brk2_cmp4 enable" "B_0x0,B_0x1" bitfld.long 0x30 3. "BK2CMP3E,tim_brk2_cmp3 enable" "B_0x0,B_0x1" bitfld.long 0x30 2. "BK2CMP2E,tim_brk2_cmp2 enable" "B_0x0,B_0x1" bitfld.long 0x30 1. "BK2CMP1E,tim_brk2_cmp1 enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "BK2INE,TIMx_BKIN2 input enable" "B_0x0,B_0x1" group.long 0x3DC++0x7 line.long 0x0 "TIM1_DCR,TIM1 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM1_DMAR,TIM1 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM1_HWCFGR2,TIM1 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM1_HWCFGR1,TIM1 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM1_VERR,TIM1 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM1_IPIDR,TIM1 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM1_SIDR,TIM1 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM1_S" base ad:0x50200000 group.word 0x0++0x1 line.word 0x0 "TIM1_CR1,TIM1 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.word 0x0 4. "DIR,Direction" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One pulse mode" "B_0x0,B_0x1" bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.long 0x4++0xF line.long 0x0 "TIM1_CR2,TIM1 control register 2" bitfld.long 0x0 25. "MMS_2,MMS_2" "0,1" hexmask.long.byte 0x0 20.--23. 1. "MMS2,MMS2" bitfld.long 0x0 18. "OIS6,OIS6" "0,1" bitfld.long 0x0 16. "OIS5,OIS5" "0,1" bitfld.long 0x0 15. "OIS4N,OIS4N" "0,1" newline bitfld.long 0x0 14. "OIS4,OIS4" "0,1" bitfld.long 0x0 13. "OIS3N,OIS3N" "0,1" bitfld.long 0x0 12. "OIS3,OIS3" "0,1" bitfld.long 0x0 11. "OIS2N,OIS2N" "0,1" bitfld.long 0x0 10. "OIS2,OIS2" "0,1" newline bitfld.long 0x0 9. "OIS1N,OIS1N" "0,1" bitfld.long 0x0 8. "OIS1,OIS1" "0,1" bitfld.long 0x0 7. "TI1S,TI1S" "0,1" bitfld.long 0x0 4.--6. "MMS_1,MMS_1" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "CCDS,CCDS" "0,1" newline bitfld.long 0x0 2. "CCUS,CCUS" "0,1" bitfld.long 0x0 0. "CCPC,CCPC" "0,1" line.long 0x4 "TIM1_SMCR,TIM1 slave mode control register" bitfld.long 0x4 25. "SMSPS,SMS preload source" "B_0x0,B_0x1" bitfld.long 0x4 24. "SMSPE,SMS preload enable" "B_0x0,B_0x1" bitfld.long 0x4 20.--21. "TS2,Trigger selection - bit 4:3" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16. "SMS2,Slave mode selection" "B_0x0,B_0x1" bitfld.long 0x4 15. "ETP,External trigger polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 14. "ECE,External clock enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter" bitfld.long 0x4 7. "MSM,Master/slave mode" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "TS1,Trigger selection - bit 4:3" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 0.--2. "SMS1,Slave mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "TIM1_DIER,TIM1 DMA/interrupt enable register" bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "COMDE,COM DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 12. "CC4DE,Capture/compare 4 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 11. "CC3DE,Capture/compare 3 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CC2DE,Capture/compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "CC1DE,Capture/compare 1 DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "BIE,Break interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 5. "COMIE,COM interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "CC4IE,Capture/compare 4 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CC3IE,Capture/compare 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 2. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 1. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" line.long 0xC "TIM1_SR,TIM1 status register" bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 20. "IDXF,Index interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 17. "CC6IF,Compare 6 interrupt flag" "0,1" newline bitfld.long 0xC 16. "CC5IF,Compare 5 interrupt flag" "0,1" bitfld.long 0xC 13. "SBIF,System break interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 12. "CC4OF,Capture/compare 4 overcapture flag" "0,1" bitfld.long 0xC 11. "CC3OF,Capture/compare 3 overcapture flag" "0,1" bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1" newline bitfld.long 0xC 9. "CC1OF,Capture/compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.long 0xC 8. "B2IF,Break 2 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 7. "BIF,Break interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 5. "COMIF,COM interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0xC 4. "CC4IF,Capture/compare 4 interrupt flag" "0,1" bitfld.long 0xC 3. "CC3IF,Capture/compare 3 interrupt flag" "0,1" bitfld.long 0xC 2. "CC2IF,Capture/compare 2 interrupt flag" "0,1" bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM1_EGR,TIM1 event generation register" bitfld.word 0x0 8. "B2G,Break 2 generation" "B_0x0,B_0x1" bitfld.word 0x0 7. "BG,Break generation" "B_0x0,B_0x1" bitfld.word 0x0 6. "TG,Trigger generation" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMG,Capture/compare control update generation" "B_0x0,B_0x1" bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1" newline bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1" bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM1_CCMR1_Input,TIM1 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 Selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x18++0x7 line.long 0x0 "TIM1_CCMR1_Output,TIM1 capture/compare mode register 1 [alternate]" bitfld.long 0x0 24. "OC2M2,Output compare 2 mode" "0,1" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2M1,Output compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1" newline bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM1_CCMR2_Input,TIM1 capture/compare mode register 2 [alternate]" hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x4 8.--9. "CC4S,Capture/compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" newline bitfld.long 0x4 0.--1. "CC3S,Capture/compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x1C++0xB line.long 0x0 "TIM1_CCMR2_Output,TIM1 capture/compare mode register 2 [alternate]" bitfld.long 0x0 24. "OC4M2,Output compare 4 mode" "0,1" bitfld.long 0x0 16. "OC3M2,Output compare 3 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC4M1,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1" newline bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC4S,Capture/compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC3M1,Output compare 3 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1" newline bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1" bitfld.long 0x0 0.--1. "CC3S,Capture/compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM1_CCER,TIM1 capture/compare enable register" bitfld.long 0x4 21. "CC6P,Capture/compare 6 output polarity" "0,1" bitfld.long 0x4 20. "CC6E,Capture/compare 6 output enable" "0,1" bitfld.long 0x4 17. "CC5P,Capture/compare 5 output polarity" "0,1" bitfld.long 0x4 16. "CC5E,Capture/compare 5 output enable" "0,1" bitfld.long 0x4 15. "CC4NP,Capture/compare 4 complementary output polarity" "0,1" newline bitfld.long 0x4 14. "CC4NE,Capture/compare 4 complementary output enable" "0,1" bitfld.long 0x4 13. "CC4P,Capture/compare 4 output polarity" "0,1" bitfld.long 0x4 12. "CC4E,Capture/compare 4 output enable" "0,1" bitfld.long 0x4 11. "CC3NP,Capture/compare 3 complementary output polarity" "0,1" bitfld.long 0x4 10. "CC3NE,Capture/compare 3 complementary output enable" "0,1" newline bitfld.long 0x4 9. "CC3P,Capture/compare 3 output polarity" "0,1" bitfld.long 0x4 8. "CC3E,Capture/compare 3 output enable" "0,1" bitfld.long 0x4 7. "CC2NP,Capture/compare 2 complementary output polarity" "0,1" bitfld.long 0x4 6. "CC2NE,Capture/compare 2 complementary output enable" "0,1" bitfld.long 0x4 5. "CC2P,Capture/compare 2 output polarity" "0,1" newline bitfld.long 0x4 4. "CC2E,Capture/compare 2 output enable" "0,1" bitfld.long 0x4 3. "CC1NP,Capture/compare 1 complementary output polarity" "B_0x0,B_0x1" bitfld.long 0x4 2. "CC1NE,Capture/compare 1 complementary output enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CC1P,Capture/compare 1 output polarity" "B_0x0,B_0x1" bitfld.long 0x4 0. "CC1E,Capture/compare 1 output enable" "B_0x0,B_0x1" line.long 0x8 "TIM1_CNT,TIM1 counter" rbitfld.long 0x8 31. "UIFCPY,UIF copy" "0,1" hexmask.long.word 0x8 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM1_PSC,TIM1 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM1_ARR,TIM1 auto-reload register" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.word 0x30++0x1 line.word 0x0 "TIM1_RCR,TIM1 repetition counter register" hexmask.word 0x0 0.--15. 1. "REP,Repetition counter reload value" group.long 0x34++0x33 line.long 0x0 "TIM1_CCR1,TIM1 capture/compare register 1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value" line.long 0x4 "TIM1_CCR2,TIM1 capture/compare register 2" hexmask.long.tbyte 0x4 0.--19. 1. "CCR2,Capture/compare 2 value" line.long 0x8 "TIM1_CCR3,TIM1 capture/compare register 3" hexmask.long.tbyte 0x8 0.--19. 1. "CCR3,Capture/compare value" line.long 0xC "TIM1_CCR4,TIM1 capture/compare register 4" hexmask.long.tbyte 0xC 0.--19. 1. "CCR4,Capture/compare value" line.long 0x10 "TIM1_BDTR,TIM1 break and dead-time register" bitfld.long 0x10 29. "BK2BID,Break2 bidirectional" "0,1" bitfld.long 0x10 28. "BKBID,Break bidirectional" "B_0x0,B_0x1" bitfld.long 0x10 27. "BK2DSRM,Break2 disarm" "0,1" bitfld.long 0x10 26. "BKDSRM,Break disarm" "B_0x0,B_0x1" bitfld.long 0x10 25. "BK2P,Break 2 polarity" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "BK2E,Break 2 enable" "B_0x0,B_0x1" hexmask.long.byte 0x10 20.--23. 1. "BK2F,Break 2 filter" hexmask.long.byte 0x10 16.--19. 1. "BKF,Break filter" bitfld.long 0x10 15. "MOE,Main output enable" "B_0x0,B_0x1" bitfld.long 0x10 14. "AOE,Automatic output enable" "B_0x0,B_0x1" newline bitfld.long 0x10 13. "BKP,Break polarity" "B_0x0,B_0x1" bitfld.long 0x10 12. "BKE,Break enable" "B_0x0,B_0x1" bitfld.long 0x10 11. "OSSR,Off-state selection for Run mode" "B_0x0,B_0x1" bitfld.long 0x10 10. "OSSI,Off-state selection for idle mode" "B_0x0,B_0x1" bitfld.long 0x10 8.--9. "LOCK,Lock configuration" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x10 0.--7. 1. "DTG,Dead-time generator setup" line.long 0x14 "TIM1_CCR5,TIM1 capture/compare register 5" bitfld.long 0x14 31. "GC5C3,Group channel 5 and channel 3" "B_0x0,B_0x1" bitfld.long 0x14 30. "GC5C2,Group channel 5 and channel 2" "B_0x0,B_0x1" bitfld.long 0x14 29. "GC5C1,Group channel 5 and channel 1" "B_0x0,B_0x1" hexmask.long.tbyte 0x14 0.--19. 1. "CCR5,Capture/compare 5 value" line.long 0x18 "TIM1_CCR6,TIM1 capture/compare register 6" hexmask.long.tbyte 0x18 0.--19. 1. "CCR6,Capture/compare 6 value" line.long 0x1C "TIM1_CCMR3,TIM1 capture/compare mode register 3" bitfld.long 0x1C 24. "OC6M2,Output compare 6 mode" "0,1" bitfld.long 0x1C 16. "OC5M2,Output compare 5 mode" "0,1" bitfld.long 0x1C 15. "OC6CE,Output compare 6 clear enable" "0,1" bitfld.long 0x1C 12.--14. "OC6M1,Output compare 6 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 11. "OC6PE,Output compare 6 preload enable" "0,1" newline bitfld.long 0x1C 10. "OC6FE,Output compare 6 fast enable" "0,1" bitfld.long 0x1C 7. "OC5CE,Output compare 5 clear enable" "0,1" bitfld.long 0x1C 4.--6. "OC5M1,Output compare 5 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 3. "OC5PE,Output compare 5 preload enable" "0,1" bitfld.long 0x1C 2. "OC5FE,Output compare 5 fast enable" "0,1" line.long 0x20 "TIM1_DTR2,TIM1 timer deadtime register 2" bitfld.long 0x20 17. "DTPE,Deadtime preload enable" "B_0x0,B_0x1" bitfld.long 0x20 16. "DTAE,Deadtime asymmetric enable" "B_0x0,B_0x1" hexmask.long.byte 0x20 0.--7. 1. "DTGF,Dead-time falling edge generator setup" line.long 0x24 "TIM1_ECR,TIM1 timer encoder control register" bitfld.long 0x24 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x24 16.--23. 1. "PW,Pulse width" bitfld.long 0x24 6.--7. "IPOS,Index positioning" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x24 5. "FIDX,First index" "B_0x0,B_0x1" bitfld.long 0x24 3.--4. "IBLK,Index blanking" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x24 1.--2. "IDIR,Index direction" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x24 0. "IE,Index enable" "B_0x0,B_0x1" line.long 0x28 "TIM1_TISEL,TIM1 timer input selection register" hexmask.long.byte 0x28 24.--27. 1. "TI4SEL,Selects tim_ti4[0..15] input" hexmask.long.byte 0x28 16.--19. 1. "TI3SEL,Selects tim_ti3[0..15] input" hexmask.long.byte 0x28 8.--11. 1. "TI2SEL,Selects tim_ti2[0..15] input" hexmask.long.byte 0x28 0.--3. 1. "TI1SEL,Selects tim_ti1[0..15] input" line.long 0x2C "TIM1_AF1,TIM1 alternate function option register 1" hexmask.long.byte 0x2C 14.--17. 1. "ETRSEL,etr_in source selection" bitfld.long 0x2C 13. "BKCMP4P,tim_brk_cmp4 input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 12. "BKCMP3P,tim_brk_cmp3 input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 11. "BKCMP2P,tim_brk_cmp2 input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 10. "BKCMP1P,tim_brk_cmp1 input polarity" "B_0x0,B_0x1" newline bitfld.long 0x2C 9. "BKINP,TIMx_BKIN input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 8. "BKCMP8E,tim_brk_cmp8 enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "BKCMP7E,tim_brk_cmp7 enable" "B_0x0,B_0x1" bitfld.long 0x2C 6. "BKCMP6E,tim_brk_cmp6 enable" "B_0x0,B_0x1" bitfld.long 0x2C 5. "BKCMP5E,tim_brk_cmp5 enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 4. "BKCMP4E,tim_brk_cmp4 enable" "B_0x0,B_0x1" bitfld.long 0x2C 3. "BKCMP3E,tim_brk_cmp3 enable" "B_0x0,B_0x1" bitfld.long 0x2C 2. "BKCMP2E,tim_brk_cmp2 enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "BKCMP1E,tim_brk_cmp1 enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "BKINE,TIMx_BKIN input enable" "B_0x0,B_0x1" line.long 0x30 "TIM1_AF2,TIM1 alternate function register 2" bitfld.long 0x30 16.--18. "OCRSEL,ocref_clr source selection" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" bitfld.long 0x30 13. "BK2CMP4P,tim_brk2_cmp4 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 12. "BK2CMP3P,tim_brk2_cmp3 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 11. "BK2CMP2P,tim_brk2_cmp2 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 10. "BK2CMP1P,tim_brk2_cmp1 input polarity" "B_0x0,B_0x1" newline bitfld.long 0x30 9. "BK2INP,TIMx_BKIN2 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 8. "BK2CMP8E,tim_brk2_cmp8 enable" "B_0x0,B_0x1" bitfld.long 0x30 7. "BK2CMP7E,tim_brk2_cmp7 enable" "B_0x0,B_0x1" bitfld.long 0x30 6. "BK2CMP6E,tim_brk2_cmp6 enable" "B_0x0,B_0x1" bitfld.long 0x30 5. "BK2CMP5E,tim_brk2_cmp5 enable" "B_0x0,B_0x1" newline bitfld.long 0x30 4. "BK2CMP4E,tim_brk2_cmp4 enable" "B_0x0,B_0x1" bitfld.long 0x30 3. "BK2CMP3E,tim_brk2_cmp3 enable" "B_0x0,B_0x1" bitfld.long 0x30 2. "BK2CMP2E,tim_brk2_cmp2 enable" "B_0x0,B_0x1" bitfld.long 0x30 1. "BK2CMP1E,tim_brk2_cmp1 enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "BK2INE,TIMx_BKIN2 input enable" "B_0x0,B_0x1" group.long 0x3DC++0x7 line.long 0x0 "TIM1_DCR,TIM1 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM1_DMAR,TIM1 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM1_HWCFGR2,TIM1 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM1_HWCFGR1,TIM1 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM1_VERR,TIM1 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM1_IPIDR,TIM1 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM1_SIDR,TIM1 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM2" base ad:0x40000000 group.word 0x0++0x1 line.word 0x0 "TIM2_CR1,TIM2 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering Enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x0 4. "DIR,Direction" "B_0x0,B_0x1" newline bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.long 0x4++0xF line.long 0x0 "TIM2_CR2,TIM2 control register 2" bitfld.long 0x0 25. "MMS2,Master mode selection" "B_0x0,B_0x1" bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "MMS1,Master mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "B_0x0,B_0x1" line.long 0x4 "TIM2_SMCR,TIM2 slave mode control register" bitfld.long 0x4 25. "SMSPS,SMS preload source" "B_0x0,B_0x1" bitfld.long 0x4 24. "SMSPE,SMS preload enable" "B_0x0,B_0x1" bitfld.long 0x4 20.--21. "TS2,Trigger selection (see bits 21:20 for TS[4:3])" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16. "SMS2,Slave mode selection" "B_0x0,B_0x1" bitfld.long 0x4 15. "ETP,External trigger polarity" "B_0x0,B_0x1" bitfld.long 0x4 14. "ECE,External clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter" bitfld.long 0x4 7. "MSM,Master/Slave mode" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "TS1,Trigger selection (see bits 21:20 for TS[4:3])" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 3. "OCCS,OCREF clear selection" "B_0x0,B_0x1" bitfld.long 0x4 0.--2. "SMS1,Slave mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "TIM2_DIER,TIM2 DMA/Interrupt enable register" bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 12. "CC4DE,Capture/Compare 4 DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 11. "CC3DE,Capture/Compare 3 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CC2DE,Capture/Compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "CC1DE,Capture/Compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "CC4IE,Capture/Compare 4 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CC3IE,Capture/Compare 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 2. "CC2IE,Capture/Compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" line.long 0xC "TIM2_SR,TIM2 status register" bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 20. "IDXF,Index interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1" bitfld.long 0xC 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1" newline bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1" bitfld.long 0xC 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1" bitfld.long 0xC 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1" bitfld.long 0xC 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1" newline bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM2_EGR,TIM2 event generation register" bitfld.word 0x0 6. "TG,Trigger generation" "B_0x0,B_0x1" bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1" bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1" bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM2_CCMR1_Input,TIM2 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x18++0x7 line.long 0x0 "TIM2_CCMR1_Output,TIM2 capture/compare mode register 1 [alternate]" bitfld.long 0x0 24. "OC2M2,Output compare 2 mode" "0,1" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2M1,Output compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1" newline bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM2_CCMR2_Input,TIM2 capture/compare mode register 2 [alternate]" hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x1C++0x3 line.long 0x0 "TIM2_CCMR2_Output,TIM2 capture/compare mode register 2 [alternate]" bitfld.long 0x0 24. "OC4M2,Output compare 4 mode" "0,1" bitfld.long 0x0 16. "OC3M2,Output compare 3 mode" "0,1" bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC4M1,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1" bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1" newline bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC3M1,Output compare 3 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1" bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1" bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.word 0x20++0x1 line.word 0x0 "TIM2_CCER,TIM2 capture/compare enable register" bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1" bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1" bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1" bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1" bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1" bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1" newline bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1" bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1" bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM2_CNT,TIM2 counter" hexmask.long 0x0 0.--31. 1. "CNT,or UIFCPY: Value depends on IUFREMAP in TIMx_CR1." group.word 0x28++0x1 line.word 0x0 "TIM2_PSC,TIM2 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM2_ARR,TIM2 auto-reload register" hexmask.long 0x0 0.--31. 1. "ARR,Auto-reload value" group.long 0x34++0xF line.long 0x0 "TIM2_CCR1,TIM2 capture/compare register 1" hexmask.long 0x0 0.--31. 1. "CCR1,Capture/compare 1 value" line.long 0x4 "TIM2_CCR2,TIM2 capture/compare register 2" hexmask.long 0x4 0.--31. 1. "CCR2,Capture/compare 2 value" line.long 0x8 "TIM2_CCR3,TIM2 capture/compare register 3" hexmask.long 0x8 0.--31. 1. "CCR3,Capture/compare 3 value" line.long 0xC "TIM2_CCR4,TIM2 capture/compare register 4" hexmask.long 0xC 0.--31. 1. "CCR4,Capture/compare 4 value" group.long 0x58++0xF line.long 0x0 "TIM2_ECR,TIM2 timer encoder control register" bitfld.long 0x0 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 16.--23. 1. "PW,Pulse width" bitfld.long 0x0 6.--7. "IPOS,Index positioning" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 5. "FIDX,First index" "B_0x0,B_0x1" bitfld.long 0x0 3.--4. "IBLK,Index blanking" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 1.--2. "IDIR,Index direction" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 0. "IE,Index enable" "B_0x0,B_0x1" line.long 0x4 "TIM2_TISEL,TIM2 timer input selection register" hexmask.long.byte 0x4 24.--27. 1. "TI4SEL,Selects tim_ti4[0..15] input" hexmask.long.byte 0x4 16.--19. 1. "TI3SEL,Selects tim_ti3[0..15] input" hexmask.long.byte 0x4 8.--11. 1. "TI2SEL,Selects tim_ti2[0..15] input" hexmask.long.byte 0x4 0.--3. 1. "TI1SEL,Selects tim_ti1[0..15] input" line.long 0x8 "TIM2_AF1,TIM2 alternate function register 1" hexmask.long.byte 0x8 14.--17. 1. "ETRSEL,etr_in source selection" line.long 0xC "TIM2_AF2,TIM2 alternate function register 2" bitfld.long 0xC 16.--18. "OCRSEL,ocref_clr source selection" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" group.long 0x3DC++0x7 line.long 0x0 "TIM2_DCR,TIM2 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM2_DMAR,TIM2 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM2_HWCFGR2,TIM2 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM2_HWCFGR1,TIM2 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" newline hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM2_VERR,TIM2 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM2_IPIDR,TIM2 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM2_SIDR,TIM2 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM2_S" base ad:0x50000000 group.word 0x0++0x1 line.word 0x0 "TIM2_CR1,TIM2 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering Enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x0 4. "DIR,Direction" "B_0x0,B_0x1" newline bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.long 0x4++0xF line.long 0x0 "TIM2_CR2,TIM2 control register 2" bitfld.long 0x0 25. "MMS2,Master mode selection" "B_0x0,B_0x1" bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "MMS1,Master mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "B_0x0,B_0x1" line.long 0x4 "TIM2_SMCR,TIM2 slave mode control register" bitfld.long 0x4 25. "SMSPS,SMS preload source" "B_0x0,B_0x1" bitfld.long 0x4 24. "SMSPE,SMS preload enable" "B_0x0,B_0x1" bitfld.long 0x4 20.--21. "TS2,Trigger selection (see bits 21:20 for TS[4:3])" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16. "SMS2,Slave mode selection" "B_0x0,B_0x1" bitfld.long 0x4 15. "ETP,External trigger polarity" "B_0x0,B_0x1" bitfld.long 0x4 14. "ECE,External clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter" bitfld.long 0x4 7. "MSM,Master/Slave mode" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "TS1,Trigger selection (see bits 21:20 for TS[4:3])" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 3. "OCCS,OCREF clear selection" "B_0x0,B_0x1" bitfld.long 0x4 0.--2. "SMS1,Slave mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "TIM2_DIER,TIM2 DMA/Interrupt enable register" bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 12. "CC4DE,Capture/Compare 4 DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 11. "CC3DE,Capture/Compare 3 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CC2DE,Capture/Compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "CC1DE,Capture/Compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "CC4IE,Capture/Compare 4 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CC3IE,Capture/Compare 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 2. "CC2IE,Capture/Compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" line.long 0xC "TIM2_SR,TIM2 status register" bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 20. "IDXF,Index interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1" bitfld.long 0xC 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1" newline bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1" bitfld.long 0xC 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1" bitfld.long 0xC 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1" bitfld.long 0xC 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1" newline bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM2_EGR,TIM2 event generation register" bitfld.word 0x0 6. "TG,Trigger generation" "B_0x0,B_0x1" bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1" bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1" bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM2_CCMR1_Input,TIM2 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x18++0x7 line.long 0x0 "TIM2_CCMR1_Output,TIM2 capture/compare mode register 1 [alternate]" bitfld.long 0x0 24. "OC2M2,Output compare 2 mode" "0,1" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2M1,Output compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1" newline bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM2_CCMR2_Input,TIM2 capture/compare mode register 2 [alternate]" hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x1C++0x3 line.long 0x0 "TIM2_CCMR2_Output,TIM2 capture/compare mode register 2 [alternate]" bitfld.long 0x0 24. "OC4M2,Output compare 4 mode" "0,1" bitfld.long 0x0 16. "OC3M2,Output compare 3 mode" "0,1" bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC4M1,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1" bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1" newline bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC3M1,Output compare 3 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1" bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1" bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.word 0x20++0x1 line.word 0x0 "TIM2_CCER,TIM2 capture/compare enable register" bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1" bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1" bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1" bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1" bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1" bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1" newline bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1" bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1" bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM2_CNT,TIM2 counter" hexmask.long 0x0 0.--31. 1. "CNT,or UIFCPY: Value depends on IUFREMAP in TIMx_CR1." group.word 0x28++0x1 line.word 0x0 "TIM2_PSC,TIM2 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM2_ARR,TIM2 auto-reload register" hexmask.long 0x0 0.--31. 1. "ARR,Auto-reload value" group.long 0x34++0xF line.long 0x0 "TIM2_CCR1,TIM2 capture/compare register 1" hexmask.long 0x0 0.--31. 1. "CCR1,Capture/compare 1 value" line.long 0x4 "TIM2_CCR2,TIM2 capture/compare register 2" hexmask.long 0x4 0.--31. 1. "CCR2,Capture/compare 2 value" line.long 0x8 "TIM2_CCR3,TIM2 capture/compare register 3" hexmask.long 0x8 0.--31. 1. "CCR3,Capture/compare 3 value" line.long 0xC "TIM2_CCR4,TIM2 capture/compare register 4" hexmask.long 0xC 0.--31. 1. "CCR4,Capture/compare 4 value" group.long 0x58++0xF line.long 0x0 "TIM2_ECR,TIM2 timer encoder control register" bitfld.long 0x0 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 16.--23. 1. "PW,Pulse width" bitfld.long 0x0 6.--7. "IPOS,Index positioning" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 5. "FIDX,First index" "B_0x0,B_0x1" bitfld.long 0x0 3.--4. "IBLK,Index blanking" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 1.--2. "IDIR,Index direction" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 0. "IE,Index enable" "B_0x0,B_0x1" line.long 0x4 "TIM2_TISEL,TIM2 timer input selection register" hexmask.long.byte 0x4 24.--27. 1. "TI4SEL,Selects tim_ti4[0..15] input" hexmask.long.byte 0x4 16.--19. 1. "TI3SEL,Selects tim_ti3[0..15] input" hexmask.long.byte 0x4 8.--11. 1. "TI2SEL,Selects tim_ti2[0..15] input" hexmask.long.byte 0x4 0.--3. 1. "TI1SEL,Selects tim_ti1[0..15] input" line.long 0x8 "TIM2_AF1,TIM2 alternate function register 1" hexmask.long.byte 0x8 14.--17. 1. "ETRSEL,etr_in source selection" line.long 0xC "TIM2_AF2,TIM2 alternate function register 2" bitfld.long 0xC 16.--18. "OCRSEL,ocref_clr source selection" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" group.long 0x3DC++0x7 line.long 0x0 "TIM2_DCR,TIM2 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM2_DMAR,TIM2 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM2_HWCFGR2,TIM2 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM2_HWCFGR1,TIM2 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" newline hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM2_VERR,TIM2 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM2_IPIDR,TIM2 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM2_SIDR,TIM2 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM3" base ad:0x40010000 group.word 0x0++0x1 line.word 0x0 "TIM2_CR1,TIM2 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering Enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x0 4. "DIR,Direction" "B_0x0,B_0x1" newline bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.long 0x4++0xF line.long 0x0 "TIM2_CR2,TIM2 control register 2" bitfld.long 0x0 25. "MMS2,Master mode selection" "B_0x0,B_0x1" bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "MMS1,Master mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "B_0x0,B_0x1" line.long 0x4 "TIM2_SMCR,TIM2 slave mode control register" bitfld.long 0x4 25. "SMSPS,SMS preload source" "B_0x0,B_0x1" bitfld.long 0x4 24. "SMSPE,SMS preload enable" "B_0x0,B_0x1" bitfld.long 0x4 20.--21. "TS2,Trigger selection (see bits 21:20 for TS[4:3])" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16. "SMS2,Slave mode selection" "B_0x0,B_0x1" bitfld.long 0x4 15. "ETP,External trigger polarity" "B_0x0,B_0x1" bitfld.long 0x4 14. "ECE,External clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter" bitfld.long 0x4 7. "MSM,Master/Slave mode" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "TS1,Trigger selection (see bits 21:20 for TS[4:3])" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 3. "OCCS,OCREF clear selection" "B_0x0,B_0x1" bitfld.long 0x4 0.--2. "SMS1,Slave mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "TIM2_DIER,TIM2 DMA/Interrupt enable register" bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 12. "CC4DE,Capture/Compare 4 DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 11. "CC3DE,Capture/Compare 3 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CC2DE,Capture/Compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "CC1DE,Capture/Compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "CC4IE,Capture/Compare 4 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CC3IE,Capture/Compare 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 2. "CC2IE,Capture/Compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" line.long 0xC "TIM2_SR,TIM2 status register" bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 20. "IDXF,Index interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1" bitfld.long 0xC 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1" newline bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1" bitfld.long 0xC 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1" bitfld.long 0xC 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1" bitfld.long 0xC 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1" newline bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM2_EGR,TIM2 event generation register" bitfld.word 0x0 6. "TG,Trigger generation" "B_0x0,B_0x1" bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1" bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1" bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM2_CCMR1_Input,TIM2 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x18++0x7 line.long 0x0 "TIM2_CCMR1_Output,TIM2 capture/compare mode register 1 [alternate]" bitfld.long 0x0 24. "OC2M2,Output compare 2 mode" "0,1" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2M1,Output compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1" newline bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM2_CCMR2_Input,TIM2 capture/compare mode register 2 [alternate]" hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x1C++0x3 line.long 0x0 "TIM2_CCMR2_Output,TIM2 capture/compare mode register 2 [alternate]" bitfld.long 0x0 24. "OC4M2,Output compare 4 mode" "0,1" bitfld.long 0x0 16. "OC3M2,Output compare 3 mode" "0,1" bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC4M1,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1" bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1" newline bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC3M1,Output compare 3 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1" bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1" bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.word 0x20++0x1 line.word 0x0 "TIM2_CCER,TIM2 capture/compare enable register" bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1" bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1" bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1" bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1" bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1" bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1" newline bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1" bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1" bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM2_CNT,TIM2 counter" hexmask.long 0x0 0.--31. 1. "CNT,or UIFCPY: Value depends on IUFREMAP in TIMx_CR1." group.word 0x28++0x1 line.word 0x0 "TIM2_PSC,TIM2 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM2_ARR,TIM2 auto-reload register" hexmask.long 0x0 0.--31. 1. "ARR,Auto-reload value" group.long 0x34++0xF line.long 0x0 "TIM2_CCR1,TIM2 capture/compare register 1" hexmask.long 0x0 0.--31. 1. "CCR1,Capture/compare 1 value" line.long 0x4 "TIM2_CCR2,TIM2 capture/compare register 2" hexmask.long 0x4 0.--31. 1. "CCR2,Capture/compare 2 value" line.long 0x8 "TIM2_CCR3,TIM2 capture/compare register 3" hexmask.long 0x8 0.--31. 1. "CCR3,Capture/compare 3 value" line.long 0xC "TIM2_CCR4,TIM2 capture/compare register 4" hexmask.long 0xC 0.--31. 1. "CCR4,Capture/compare 4 value" group.long 0x58++0xF line.long 0x0 "TIM2_ECR,TIM2 timer encoder control register" bitfld.long 0x0 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 16.--23. 1. "PW,Pulse width" bitfld.long 0x0 6.--7. "IPOS,Index positioning" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 5. "FIDX,First index" "B_0x0,B_0x1" bitfld.long 0x0 3.--4. "IBLK,Index blanking" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 1.--2. "IDIR,Index direction" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 0. "IE,Index enable" "B_0x0,B_0x1" line.long 0x4 "TIM2_TISEL,TIM2 timer input selection register" hexmask.long.byte 0x4 24.--27. 1. "TI4SEL,Selects tim_ti4[0..15] input" hexmask.long.byte 0x4 16.--19. 1. "TI3SEL,Selects tim_ti3[0..15] input" hexmask.long.byte 0x4 8.--11. 1. "TI2SEL,Selects tim_ti2[0..15] input" hexmask.long.byte 0x4 0.--3. 1. "TI1SEL,Selects tim_ti1[0..15] input" line.long 0x8 "TIM2_AF1,TIM2 alternate function register 1" hexmask.long.byte 0x8 14.--17. 1. "ETRSEL,etr_in source selection" line.long 0xC "TIM2_AF2,TIM2 alternate function register 2" bitfld.long 0xC 16.--18. "OCRSEL,ocref_clr source selection" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" group.long 0x3DC++0x7 line.long 0x0 "TIM2_DCR,TIM2 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM2_DMAR,TIM2 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM2_HWCFGR2,TIM2 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM2_HWCFGR1,TIM2 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" newline hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM2_VERR,TIM2 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM2_IPIDR,TIM2 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM2_SIDR,TIM2 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM3_S" base ad:0x50010000 group.word 0x0++0x1 line.word 0x0 "TIM2_CR1,TIM2 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering Enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x0 4. "DIR,Direction" "B_0x0,B_0x1" newline bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.long 0x4++0xF line.long 0x0 "TIM2_CR2,TIM2 control register 2" bitfld.long 0x0 25. "MMS2,Master mode selection" "B_0x0,B_0x1" bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "MMS1,Master mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "B_0x0,B_0x1" line.long 0x4 "TIM2_SMCR,TIM2 slave mode control register" bitfld.long 0x4 25. "SMSPS,SMS preload source" "B_0x0,B_0x1" bitfld.long 0x4 24. "SMSPE,SMS preload enable" "B_0x0,B_0x1" bitfld.long 0x4 20.--21. "TS2,Trigger selection (see bits 21:20 for TS[4:3])" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16. "SMS2,Slave mode selection" "B_0x0,B_0x1" bitfld.long 0x4 15. "ETP,External trigger polarity" "B_0x0,B_0x1" bitfld.long 0x4 14. "ECE,External clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter" bitfld.long 0x4 7. "MSM,Master/Slave mode" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "TS1,Trigger selection (see bits 21:20 for TS[4:3])" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 3. "OCCS,OCREF clear selection" "B_0x0,B_0x1" bitfld.long 0x4 0.--2. "SMS1,Slave mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "TIM2_DIER,TIM2 DMA/Interrupt enable register" bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 12. "CC4DE,Capture/Compare 4 DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 11. "CC3DE,Capture/Compare 3 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CC2DE,Capture/Compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "CC1DE,Capture/Compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "CC4IE,Capture/Compare 4 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CC3IE,Capture/Compare 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 2. "CC2IE,Capture/Compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" line.long 0xC "TIM2_SR,TIM2 status register" bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 20. "IDXF,Index interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1" bitfld.long 0xC 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1" newline bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1" bitfld.long 0xC 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1" bitfld.long 0xC 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1" bitfld.long 0xC 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1" newline bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM2_EGR,TIM2 event generation register" bitfld.word 0x0 6. "TG,Trigger generation" "B_0x0,B_0x1" bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1" bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1" bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM2_CCMR1_Input,TIM2 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x18++0x7 line.long 0x0 "TIM2_CCMR1_Output,TIM2 capture/compare mode register 1 [alternate]" bitfld.long 0x0 24. "OC2M2,Output compare 2 mode" "0,1" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2M1,Output compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1" newline bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM2_CCMR2_Input,TIM2 capture/compare mode register 2 [alternate]" hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x1C++0x3 line.long 0x0 "TIM2_CCMR2_Output,TIM2 capture/compare mode register 2 [alternate]" bitfld.long 0x0 24. "OC4M2,Output compare 4 mode" "0,1" bitfld.long 0x0 16. "OC3M2,Output compare 3 mode" "0,1" bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC4M1,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1" bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1" newline bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC3M1,Output compare 3 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1" bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1" bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.word 0x20++0x1 line.word 0x0 "TIM2_CCER,TIM2 capture/compare enable register" bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1" bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1" bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1" bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1" bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1" bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1" newline bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1" bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1" bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM2_CNT,TIM2 counter" hexmask.long 0x0 0.--31. 1. "CNT,or UIFCPY: Value depends on IUFREMAP in TIMx_CR1." group.word 0x28++0x1 line.word 0x0 "TIM2_PSC,TIM2 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM2_ARR,TIM2 auto-reload register" hexmask.long 0x0 0.--31. 1. "ARR,Auto-reload value" group.long 0x34++0xF line.long 0x0 "TIM2_CCR1,TIM2 capture/compare register 1" hexmask.long 0x0 0.--31. 1. "CCR1,Capture/compare 1 value" line.long 0x4 "TIM2_CCR2,TIM2 capture/compare register 2" hexmask.long 0x4 0.--31. 1. "CCR2,Capture/compare 2 value" line.long 0x8 "TIM2_CCR3,TIM2 capture/compare register 3" hexmask.long 0x8 0.--31. 1. "CCR3,Capture/compare 3 value" line.long 0xC "TIM2_CCR4,TIM2 capture/compare register 4" hexmask.long 0xC 0.--31. 1. "CCR4,Capture/compare 4 value" group.long 0x58++0xF line.long 0x0 "TIM2_ECR,TIM2 timer encoder control register" bitfld.long 0x0 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 16.--23. 1. "PW,Pulse width" bitfld.long 0x0 6.--7. "IPOS,Index positioning" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 5. "FIDX,First index" "B_0x0,B_0x1" bitfld.long 0x0 3.--4. "IBLK,Index blanking" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 1.--2. "IDIR,Index direction" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 0. "IE,Index enable" "B_0x0,B_0x1" line.long 0x4 "TIM2_TISEL,TIM2 timer input selection register" hexmask.long.byte 0x4 24.--27. 1. "TI4SEL,Selects tim_ti4[0..15] input" hexmask.long.byte 0x4 16.--19. 1. "TI3SEL,Selects tim_ti3[0..15] input" hexmask.long.byte 0x4 8.--11. 1. "TI2SEL,Selects tim_ti2[0..15] input" hexmask.long.byte 0x4 0.--3. 1. "TI1SEL,Selects tim_ti1[0..15] input" line.long 0x8 "TIM2_AF1,TIM2 alternate function register 1" hexmask.long.byte 0x8 14.--17. 1. "ETRSEL,etr_in source selection" line.long 0xC "TIM2_AF2,TIM2 alternate function register 2" bitfld.long 0xC 16.--18. "OCRSEL,ocref_clr source selection" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" group.long 0x3DC++0x7 line.long 0x0 "TIM2_DCR,TIM2 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM2_DMAR,TIM2 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM2_HWCFGR2,TIM2 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM2_HWCFGR1,TIM2 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" newline hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM2_VERR,TIM2 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM2_IPIDR,TIM2 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM2_SIDR,TIM2 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM4" base ad:0x40020000 group.word 0x0++0x1 line.word 0x0 "TIM2_CR1,TIM2 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering Enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x0 4. "DIR,Direction" "B_0x0,B_0x1" newline bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.long 0x4++0xF line.long 0x0 "TIM2_CR2,TIM2 control register 2" bitfld.long 0x0 25. "MMS2,Master mode selection" "B_0x0,B_0x1" bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "MMS1,Master mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "B_0x0,B_0x1" line.long 0x4 "TIM2_SMCR,TIM2 slave mode control register" bitfld.long 0x4 25. "SMSPS,SMS preload source" "B_0x0,B_0x1" bitfld.long 0x4 24. "SMSPE,SMS preload enable" "B_0x0,B_0x1" bitfld.long 0x4 20.--21. "TS2,Trigger selection (see bits 21:20 for TS[4:3])" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16. "SMS2,Slave mode selection" "B_0x0,B_0x1" bitfld.long 0x4 15. "ETP,External trigger polarity" "B_0x0,B_0x1" bitfld.long 0x4 14. "ECE,External clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter" bitfld.long 0x4 7. "MSM,Master/Slave mode" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "TS1,Trigger selection (see bits 21:20 for TS[4:3])" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 3. "OCCS,OCREF clear selection" "B_0x0,B_0x1" bitfld.long 0x4 0.--2. "SMS1,Slave mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "TIM2_DIER,TIM2 DMA/Interrupt enable register" bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 12. "CC4DE,Capture/Compare 4 DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 11. "CC3DE,Capture/Compare 3 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CC2DE,Capture/Compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "CC1DE,Capture/Compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "CC4IE,Capture/Compare 4 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CC3IE,Capture/Compare 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 2. "CC2IE,Capture/Compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" line.long 0xC "TIM2_SR,TIM2 status register" bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 20. "IDXF,Index interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1" bitfld.long 0xC 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1" newline bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1" bitfld.long 0xC 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1" bitfld.long 0xC 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1" bitfld.long 0xC 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1" newline bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM2_EGR,TIM2 event generation register" bitfld.word 0x0 6. "TG,Trigger generation" "B_0x0,B_0x1" bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1" bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1" bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM2_CCMR1_Input,TIM2 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x18++0x7 line.long 0x0 "TIM2_CCMR1_Output,TIM2 capture/compare mode register 1 [alternate]" bitfld.long 0x0 24. "OC2M2,Output compare 2 mode" "0,1" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2M1,Output compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1" newline bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM2_CCMR2_Input,TIM2 capture/compare mode register 2 [alternate]" hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x1C++0x3 line.long 0x0 "TIM2_CCMR2_Output,TIM2 capture/compare mode register 2 [alternate]" bitfld.long 0x0 24. "OC4M2,Output compare 4 mode" "0,1" bitfld.long 0x0 16. "OC3M2,Output compare 3 mode" "0,1" bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC4M1,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1" bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1" newline bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC3M1,Output compare 3 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1" bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1" bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.word 0x20++0x1 line.word 0x0 "TIM2_CCER,TIM2 capture/compare enable register" bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1" bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1" bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1" bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1" bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1" bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1" newline bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1" bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1" bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM2_CNT,TIM2 counter" hexmask.long 0x0 0.--31. 1. "CNT,or UIFCPY: Value depends on IUFREMAP in TIMx_CR1." group.word 0x28++0x1 line.word 0x0 "TIM2_PSC,TIM2 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM2_ARR,TIM2 auto-reload register" hexmask.long 0x0 0.--31. 1. "ARR,Auto-reload value" group.long 0x34++0xF line.long 0x0 "TIM2_CCR1,TIM2 capture/compare register 1" hexmask.long 0x0 0.--31. 1. "CCR1,Capture/compare 1 value" line.long 0x4 "TIM2_CCR2,TIM2 capture/compare register 2" hexmask.long 0x4 0.--31. 1. "CCR2,Capture/compare 2 value" line.long 0x8 "TIM2_CCR3,TIM2 capture/compare register 3" hexmask.long 0x8 0.--31. 1. "CCR3,Capture/compare 3 value" line.long 0xC "TIM2_CCR4,TIM2 capture/compare register 4" hexmask.long 0xC 0.--31. 1. "CCR4,Capture/compare 4 value" group.long 0x58++0xF line.long 0x0 "TIM2_ECR,TIM2 timer encoder control register" bitfld.long 0x0 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 16.--23. 1. "PW,Pulse width" bitfld.long 0x0 6.--7. "IPOS,Index positioning" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 5. "FIDX,First index" "B_0x0,B_0x1" bitfld.long 0x0 3.--4. "IBLK,Index blanking" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 1.--2. "IDIR,Index direction" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 0. "IE,Index enable" "B_0x0,B_0x1" line.long 0x4 "TIM2_TISEL,TIM2 timer input selection register" hexmask.long.byte 0x4 24.--27. 1. "TI4SEL,Selects tim_ti4[0..15] input" hexmask.long.byte 0x4 16.--19. 1. "TI3SEL,Selects tim_ti3[0..15] input" hexmask.long.byte 0x4 8.--11. 1. "TI2SEL,Selects tim_ti2[0..15] input" hexmask.long.byte 0x4 0.--3. 1. "TI1SEL,Selects tim_ti1[0..15] input" line.long 0x8 "TIM2_AF1,TIM2 alternate function register 1" hexmask.long.byte 0x8 14.--17. 1. "ETRSEL,etr_in source selection" line.long 0xC "TIM2_AF2,TIM2 alternate function register 2" bitfld.long 0xC 16.--18. "OCRSEL,ocref_clr source selection" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" group.long 0x3DC++0x7 line.long 0x0 "TIM2_DCR,TIM2 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM2_DMAR,TIM2 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM2_HWCFGR2,TIM2 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM2_HWCFGR1,TIM2 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" newline hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM2_VERR,TIM2 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM2_IPIDR,TIM2 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM2_SIDR,TIM2 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM4_S" base ad:0x50020000 group.word 0x0++0x1 line.word 0x0 "TIM2_CR1,TIM2 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering Enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x0 4. "DIR,Direction" "B_0x0,B_0x1" newline bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.long 0x4++0xF line.long 0x0 "TIM2_CR2,TIM2 control register 2" bitfld.long 0x0 25. "MMS2,Master mode selection" "B_0x0,B_0x1" bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "MMS1,Master mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "B_0x0,B_0x1" line.long 0x4 "TIM2_SMCR,TIM2 slave mode control register" bitfld.long 0x4 25. "SMSPS,SMS preload source" "B_0x0,B_0x1" bitfld.long 0x4 24. "SMSPE,SMS preload enable" "B_0x0,B_0x1" bitfld.long 0x4 20.--21. "TS2,Trigger selection (see bits 21:20 for TS[4:3])" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16. "SMS2,Slave mode selection" "B_0x0,B_0x1" bitfld.long 0x4 15. "ETP,External trigger polarity" "B_0x0,B_0x1" bitfld.long 0x4 14. "ECE,External clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter" bitfld.long 0x4 7. "MSM,Master/Slave mode" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "TS1,Trigger selection (see bits 21:20 for TS[4:3])" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 3. "OCCS,OCREF clear selection" "B_0x0,B_0x1" bitfld.long 0x4 0.--2. "SMS1,Slave mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "TIM2_DIER,TIM2 DMA/Interrupt enable register" bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 12. "CC4DE,Capture/Compare 4 DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 11. "CC3DE,Capture/Compare 3 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CC2DE,Capture/Compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "CC1DE,Capture/Compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "CC4IE,Capture/Compare 4 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CC3IE,Capture/Compare 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 2. "CC2IE,Capture/Compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" line.long 0xC "TIM2_SR,TIM2 status register" bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 20. "IDXF,Index interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1" bitfld.long 0xC 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1" newline bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1" bitfld.long 0xC 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1" bitfld.long 0xC 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1" bitfld.long 0xC 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1" newline bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM2_EGR,TIM2 event generation register" bitfld.word 0x0 6. "TG,Trigger generation" "B_0x0,B_0x1" bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1" bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1" bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM2_CCMR1_Input,TIM2 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x18++0x7 line.long 0x0 "TIM2_CCMR1_Output,TIM2 capture/compare mode register 1 [alternate]" bitfld.long 0x0 24. "OC2M2,Output compare 2 mode" "0,1" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2M1,Output compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1" newline bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM2_CCMR2_Input,TIM2 capture/compare mode register 2 [alternate]" hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x1C++0x3 line.long 0x0 "TIM2_CCMR2_Output,TIM2 capture/compare mode register 2 [alternate]" bitfld.long 0x0 24. "OC4M2,Output compare 4 mode" "0,1" bitfld.long 0x0 16. "OC3M2,Output compare 3 mode" "0,1" bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC4M1,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1" bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1" newline bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC3M1,Output compare 3 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1" bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1" bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.word 0x20++0x1 line.word 0x0 "TIM2_CCER,TIM2 capture/compare enable register" bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1" bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1" bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1" bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1" bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1" bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1" newline bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1" bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1" bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM2_CNT,TIM2 counter" hexmask.long 0x0 0.--31. 1. "CNT,or UIFCPY: Value depends on IUFREMAP in TIMx_CR1." group.word 0x28++0x1 line.word 0x0 "TIM2_PSC,TIM2 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM2_ARR,TIM2 auto-reload register" hexmask.long 0x0 0.--31. 1. "ARR,Auto-reload value" group.long 0x34++0xF line.long 0x0 "TIM2_CCR1,TIM2 capture/compare register 1" hexmask.long 0x0 0.--31. 1. "CCR1,Capture/compare 1 value" line.long 0x4 "TIM2_CCR2,TIM2 capture/compare register 2" hexmask.long 0x4 0.--31. 1. "CCR2,Capture/compare 2 value" line.long 0x8 "TIM2_CCR3,TIM2 capture/compare register 3" hexmask.long 0x8 0.--31. 1. "CCR3,Capture/compare 3 value" line.long 0xC "TIM2_CCR4,TIM2 capture/compare register 4" hexmask.long 0xC 0.--31. 1. "CCR4,Capture/compare 4 value" group.long 0x58++0xF line.long 0x0 "TIM2_ECR,TIM2 timer encoder control register" bitfld.long 0x0 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 16.--23. 1. "PW,Pulse width" bitfld.long 0x0 6.--7. "IPOS,Index positioning" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 5. "FIDX,First index" "B_0x0,B_0x1" bitfld.long 0x0 3.--4. "IBLK,Index blanking" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 1.--2. "IDIR,Index direction" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 0. "IE,Index enable" "B_0x0,B_0x1" line.long 0x4 "TIM2_TISEL,TIM2 timer input selection register" hexmask.long.byte 0x4 24.--27. 1. "TI4SEL,Selects tim_ti4[0..15] input" hexmask.long.byte 0x4 16.--19. 1. "TI3SEL,Selects tim_ti3[0..15] input" hexmask.long.byte 0x4 8.--11. 1. "TI2SEL,Selects tim_ti2[0..15] input" hexmask.long.byte 0x4 0.--3. 1. "TI1SEL,Selects tim_ti1[0..15] input" line.long 0x8 "TIM2_AF1,TIM2 alternate function register 1" hexmask.long.byte 0x8 14.--17. 1. "ETRSEL,etr_in source selection" line.long 0xC "TIM2_AF2,TIM2 alternate function register 2" bitfld.long 0xC 16.--18. "OCRSEL,ocref_clr source selection" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" group.long 0x3DC++0x7 line.long 0x0 "TIM2_DCR,TIM2 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM2_DMAR,TIM2 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM2_HWCFGR2,TIM2 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM2_HWCFGR1,TIM2 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" newline hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM2_VERR,TIM2 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM2_IPIDR,TIM2 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM2_SIDR,TIM2 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM5" base ad:0x40030000 group.word 0x0++0x1 line.word 0x0 "TIM2_CR1,TIM2 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering Enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x0 4. "DIR,Direction" "B_0x0,B_0x1" newline bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.long 0x4++0xF line.long 0x0 "TIM2_CR2,TIM2 control register 2" bitfld.long 0x0 25. "MMS2,Master mode selection" "B_0x0,B_0x1" bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "MMS1,Master mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "B_0x0,B_0x1" line.long 0x4 "TIM2_SMCR,TIM2 slave mode control register" bitfld.long 0x4 25. "SMSPS,SMS preload source" "B_0x0,B_0x1" bitfld.long 0x4 24. "SMSPE,SMS preload enable" "B_0x0,B_0x1" bitfld.long 0x4 20.--21. "TS2,Trigger selection (see bits 21:20 for TS[4:3])" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16. "SMS2,Slave mode selection" "B_0x0,B_0x1" bitfld.long 0x4 15. "ETP,External trigger polarity" "B_0x0,B_0x1" bitfld.long 0x4 14. "ECE,External clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter" bitfld.long 0x4 7. "MSM,Master/Slave mode" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "TS1,Trigger selection (see bits 21:20 for TS[4:3])" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 3. "OCCS,OCREF clear selection" "B_0x0,B_0x1" bitfld.long 0x4 0.--2. "SMS1,Slave mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "TIM2_DIER,TIM2 DMA/Interrupt enable register" bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 12. "CC4DE,Capture/Compare 4 DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 11. "CC3DE,Capture/Compare 3 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CC2DE,Capture/Compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "CC1DE,Capture/Compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "CC4IE,Capture/Compare 4 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CC3IE,Capture/Compare 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 2. "CC2IE,Capture/Compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" line.long 0xC "TIM2_SR,TIM2 status register" bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 20. "IDXF,Index interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1" bitfld.long 0xC 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1" newline bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1" bitfld.long 0xC 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1" bitfld.long 0xC 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1" bitfld.long 0xC 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1" newline bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM2_EGR,TIM2 event generation register" bitfld.word 0x0 6. "TG,Trigger generation" "B_0x0,B_0x1" bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1" bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1" bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM2_CCMR1_Input,TIM2 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x18++0x7 line.long 0x0 "TIM2_CCMR1_Output,TIM2 capture/compare mode register 1 [alternate]" bitfld.long 0x0 24. "OC2M2,Output compare 2 mode" "0,1" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2M1,Output compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1" newline bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM2_CCMR2_Input,TIM2 capture/compare mode register 2 [alternate]" hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x1C++0x3 line.long 0x0 "TIM2_CCMR2_Output,TIM2 capture/compare mode register 2 [alternate]" bitfld.long 0x0 24. "OC4M2,Output compare 4 mode" "0,1" bitfld.long 0x0 16. "OC3M2,Output compare 3 mode" "0,1" bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC4M1,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1" bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1" newline bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC3M1,Output compare 3 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1" bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1" bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.word 0x20++0x1 line.word 0x0 "TIM2_CCER,TIM2 capture/compare enable register" bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1" bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1" bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1" bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1" bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1" bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1" newline bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1" bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1" bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM2_CNT,TIM2 counter" hexmask.long 0x0 0.--31. 1. "CNT,or UIFCPY: Value depends on IUFREMAP in TIMx_CR1." group.word 0x28++0x1 line.word 0x0 "TIM2_PSC,TIM2 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM2_ARR,TIM2 auto-reload register" hexmask.long 0x0 0.--31. 1. "ARR,Auto-reload value" group.long 0x34++0xF line.long 0x0 "TIM2_CCR1,TIM2 capture/compare register 1" hexmask.long 0x0 0.--31. 1. "CCR1,Capture/compare 1 value" line.long 0x4 "TIM2_CCR2,TIM2 capture/compare register 2" hexmask.long 0x4 0.--31. 1. "CCR2,Capture/compare 2 value" line.long 0x8 "TIM2_CCR3,TIM2 capture/compare register 3" hexmask.long 0x8 0.--31. 1. "CCR3,Capture/compare 3 value" line.long 0xC "TIM2_CCR4,TIM2 capture/compare register 4" hexmask.long 0xC 0.--31. 1. "CCR4,Capture/compare 4 value" group.long 0x58++0xF line.long 0x0 "TIM2_ECR,TIM2 timer encoder control register" bitfld.long 0x0 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 16.--23. 1. "PW,Pulse width" bitfld.long 0x0 6.--7. "IPOS,Index positioning" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 5. "FIDX,First index" "B_0x0,B_0x1" bitfld.long 0x0 3.--4. "IBLK,Index blanking" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 1.--2. "IDIR,Index direction" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 0. "IE,Index enable" "B_0x0,B_0x1" line.long 0x4 "TIM2_TISEL,TIM2 timer input selection register" hexmask.long.byte 0x4 24.--27. 1. "TI4SEL,Selects tim_ti4[0..15] input" hexmask.long.byte 0x4 16.--19. 1. "TI3SEL,Selects tim_ti3[0..15] input" hexmask.long.byte 0x4 8.--11. 1. "TI2SEL,Selects tim_ti2[0..15] input" hexmask.long.byte 0x4 0.--3. 1. "TI1SEL,Selects tim_ti1[0..15] input" line.long 0x8 "TIM2_AF1,TIM2 alternate function register 1" hexmask.long.byte 0x8 14.--17. 1. "ETRSEL,etr_in source selection" line.long 0xC "TIM2_AF2,TIM2 alternate function register 2" bitfld.long 0xC 16.--18. "OCRSEL,ocref_clr source selection" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" group.long 0x3DC++0x7 line.long 0x0 "TIM2_DCR,TIM2 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM2_DMAR,TIM2 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM2_HWCFGR2,TIM2 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM2_HWCFGR1,TIM2 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" newline hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM2_VERR,TIM2 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM2_IPIDR,TIM2 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM2_SIDR,TIM2 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM5_S" base ad:0x50030000 group.word 0x0++0x1 line.word 0x0 "TIM2_CR1,TIM2 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering Enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x0 4. "DIR,Direction" "B_0x0,B_0x1" newline bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.long 0x4++0xF line.long 0x0 "TIM2_CR2,TIM2 control register 2" bitfld.long 0x0 25. "MMS2,Master mode selection" "B_0x0,B_0x1" bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "MMS1,Master mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "B_0x0,B_0x1" line.long 0x4 "TIM2_SMCR,TIM2 slave mode control register" bitfld.long 0x4 25. "SMSPS,SMS preload source" "B_0x0,B_0x1" bitfld.long 0x4 24. "SMSPE,SMS preload enable" "B_0x0,B_0x1" bitfld.long 0x4 20.--21. "TS2,Trigger selection (see bits 21:20 for TS[4:3])" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16. "SMS2,Slave mode selection" "B_0x0,B_0x1" bitfld.long 0x4 15. "ETP,External trigger polarity" "B_0x0,B_0x1" bitfld.long 0x4 14. "ECE,External clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter" bitfld.long 0x4 7. "MSM,Master/Slave mode" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "TS1,Trigger selection (see bits 21:20 for TS[4:3])" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 3. "OCCS,OCREF clear selection" "B_0x0,B_0x1" bitfld.long 0x4 0.--2. "SMS1,Slave mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "TIM2_DIER,TIM2 DMA/Interrupt enable register" bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 12. "CC4DE,Capture/Compare 4 DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 11. "CC3DE,Capture/Compare 3 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CC2DE,Capture/Compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "CC1DE,Capture/Compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "CC4IE,Capture/Compare 4 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CC3IE,Capture/Compare 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 2. "CC2IE,Capture/Compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" line.long 0xC "TIM2_SR,TIM2 status register" bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 20. "IDXF,Index interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1" bitfld.long 0xC 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1" newline bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1" bitfld.long 0xC 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1" bitfld.long 0xC 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1" bitfld.long 0xC 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1" newline bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM2_EGR,TIM2 event generation register" bitfld.word 0x0 6. "TG,Trigger generation" "B_0x0,B_0x1" bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1" bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1" bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM2_CCMR1_Input,TIM2 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x18++0x7 line.long 0x0 "TIM2_CCMR1_Output,TIM2 capture/compare mode register 1 [alternate]" bitfld.long 0x0 24. "OC2M2,Output compare 2 mode" "0,1" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2M1,Output compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1" newline bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM2_CCMR2_Input,TIM2 capture/compare mode register 2 [alternate]" hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x1C++0x3 line.long 0x0 "TIM2_CCMR2_Output,TIM2 capture/compare mode register 2 [alternate]" bitfld.long 0x0 24. "OC4M2,Output compare 4 mode" "0,1" bitfld.long 0x0 16. "OC3M2,Output compare 3 mode" "0,1" bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC4M1,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1" bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1" newline bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC3M1,Output compare 3 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1" bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1" bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.word 0x20++0x1 line.word 0x0 "TIM2_CCER,TIM2 capture/compare enable register" bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1" bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1" bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1" bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1" bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1" bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1" newline bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1" bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1" bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM2_CNT,TIM2 counter" hexmask.long 0x0 0.--31. 1. "CNT,or UIFCPY: Value depends on IUFREMAP in TIMx_CR1." group.word 0x28++0x1 line.word 0x0 "TIM2_PSC,TIM2 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM2_ARR,TIM2 auto-reload register" hexmask.long 0x0 0.--31. 1. "ARR,Auto-reload value" group.long 0x34++0xF line.long 0x0 "TIM2_CCR1,TIM2 capture/compare register 1" hexmask.long 0x0 0.--31. 1. "CCR1,Capture/compare 1 value" line.long 0x4 "TIM2_CCR2,TIM2 capture/compare register 2" hexmask.long 0x4 0.--31. 1. "CCR2,Capture/compare 2 value" line.long 0x8 "TIM2_CCR3,TIM2 capture/compare register 3" hexmask.long 0x8 0.--31. 1. "CCR3,Capture/compare 3 value" line.long 0xC "TIM2_CCR4,TIM2 capture/compare register 4" hexmask.long 0xC 0.--31. 1. "CCR4,Capture/compare 4 value" group.long 0x58++0xF line.long 0x0 "TIM2_ECR,TIM2 timer encoder control register" bitfld.long 0x0 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 16.--23. 1. "PW,Pulse width" bitfld.long 0x0 6.--7. "IPOS,Index positioning" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 5. "FIDX,First index" "B_0x0,B_0x1" bitfld.long 0x0 3.--4. "IBLK,Index blanking" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x0 1.--2. "IDIR,Index direction" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 0. "IE,Index enable" "B_0x0,B_0x1" line.long 0x4 "TIM2_TISEL,TIM2 timer input selection register" hexmask.long.byte 0x4 24.--27. 1. "TI4SEL,Selects tim_ti4[0..15] input" hexmask.long.byte 0x4 16.--19. 1. "TI3SEL,Selects tim_ti3[0..15] input" hexmask.long.byte 0x4 8.--11. 1. "TI2SEL,Selects tim_ti2[0..15] input" hexmask.long.byte 0x4 0.--3. 1. "TI1SEL,Selects tim_ti1[0..15] input" line.long 0x8 "TIM2_AF1,TIM2 alternate function register 1" hexmask.long.byte 0x8 14.--17. 1. "ETRSEL,etr_in source selection" line.long 0xC "TIM2_AF2,TIM2 alternate function register 2" bitfld.long 0xC 16.--18. "OCRSEL,ocref_clr source selection" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" group.long 0x3DC++0x7 line.long 0x0 "TIM2_DCR,TIM2 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM2_DMAR,TIM2 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM2_HWCFGR2,TIM2 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM2_HWCFGR1,TIM2 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" newline hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM2_VERR,TIM2 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM2_IPIDR,TIM2 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM2_SIDR,TIM2 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM6" base ad:0x40040000 group.word 0x0++0x1 line.word 0x0 "TIM6_CR1,TIM6 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0x4++0x1 line.word 0x0 "TIM6_CR2,TIM6 control register 2" bitfld.word 0x0 4.--6. "MMS,Master mode selection" "B_0x0,B_0x1,B_0x2,?,?,?,?,?" group.word 0xC++0x1 line.word 0x0 "TIM6_DIER,TIM6 DMA/Interrupt enable register" bitfld.word 0x0 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM6_SR,TIM6 status register" bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM6_EGR,TIM6 event generation register" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM6_CNT,TIM6 counter" rbitfld.long 0x0 31. "UIFCPY,UIF copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM6_PSC,TIM6 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM6_ARR,TIM6 auto-reload register" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM6_HWCFGR2,TIM6 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM6_HWCFGR1,TIM6 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" newline hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM6_VERR,TIM6 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM6_IPIDR,TIM6 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM6_SIDR,TIM6 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Offset in KB of the ID register base address from the IP base address." tree.end tree "TIM6_S" base ad:0x50040000 group.word 0x0++0x1 line.word 0x0 "TIM6_CR1,TIM6 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0x4++0x1 line.word 0x0 "TIM6_CR2,TIM6 control register 2" bitfld.word 0x0 4.--6. "MMS,Master mode selection" "B_0x0,B_0x1,B_0x2,?,?,?,?,?" group.word 0xC++0x1 line.word 0x0 "TIM6_DIER,TIM6 DMA/Interrupt enable register" bitfld.word 0x0 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM6_SR,TIM6 status register" bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM6_EGR,TIM6 event generation register" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM6_CNT,TIM6 counter" rbitfld.long 0x0 31. "UIFCPY,UIF copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM6_PSC,TIM6 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM6_ARR,TIM6 auto-reload register" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM6_HWCFGR2,TIM6 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM6_HWCFGR1,TIM6 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" newline hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM6_VERR,TIM6 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM6_IPIDR,TIM6 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM6_SIDR,TIM6 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Offset in KB of the ID register base address from the IP base address." tree.end tree "TIM7" base ad:0x40050000 group.word 0x0++0x1 line.word 0x0 "TIM6_CR1,TIM6 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0x4++0x1 line.word 0x0 "TIM6_CR2,TIM6 control register 2" bitfld.word 0x0 4.--6. "MMS,Master mode selection" "B_0x0,B_0x1,B_0x2,?,?,?,?,?" group.word 0xC++0x1 line.word 0x0 "TIM6_DIER,TIM6 DMA/Interrupt enable register" bitfld.word 0x0 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM6_SR,TIM6 status register" bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM6_EGR,TIM6 event generation register" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM6_CNT,TIM6 counter" rbitfld.long 0x0 31. "UIFCPY,UIF copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM6_PSC,TIM6 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM6_ARR,TIM6 auto-reload register" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM6_HWCFGR2,TIM6 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM6_HWCFGR1,TIM6 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" newline hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM6_VERR,TIM6 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM6_IPIDR,TIM6 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM6_SIDR,TIM6 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Offset in KB of the ID register base address from the IP base address." tree.end tree "TIM7_S" base ad:0x50050000 group.word 0x0++0x1 line.word 0x0 "TIM6_CR1,TIM6 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0x4++0x1 line.word 0x0 "TIM6_CR2,TIM6 control register 2" bitfld.word 0x0 4.--6. "MMS,Master mode selection" "B_0x0,B_0x1,B_0x2,?,?,?,?,?" group.word 0xC++0x1 line.word 0x0 "TIM6_DIER,TIM6 DMA/Interrupt enable register" bitfld.word 0x0 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM6_SR,TIM6 status register" bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM6_EGR,TIM6 event generation register" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM6_CNT,TIM6 counter" rbitfld.long 0x0 31. "UIFCPY,UIF copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM6_PSC,TIM6 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM6_ARR,TIM6 auto-reload register" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM6_HWCFGR2,TIM6 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM6_HWCFGR1,TIM6 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" newline hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM6_VERR,TIM6 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM6_IPIDR,TIM6 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM6_SIDR,TIM6 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Offset in KB of the ID register base address from the IP base address." tree.end tree "TIM8" base ad:0x40210000 group.word 0x0++0x1 line.word 0x0 "TIM1_CR1,TIM1 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.word 0x0 4. "DIR,Direction" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One pulse mode" "B_0x0,B_0x1" bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.long 0x4++0xF line.long 0x0 "TIM1_CR2,TIM1 control register 2" bitfld.long 0x0 25. "MMS_2,MMS_2" "0,1" hexmask.long.byte 0x0 20.--23. 1. "MMS2,MMS2" bitfld.long 0x0 18. "OIS6,OIS6" "0,1" bitfld.long 0x0 16. "OIS5,OIS5" "0,1" bitfld.long 0x0 15. "OIS4N,OIS4N" "0,1" newline bitfld.long 0x0 14. "OIS4,OIS4" "0,1" bitfld.long 0x0 13. "OIS3N,OIS3N" "0,1" bitfld.long 0x0 12. "OIS3,OIS3" "0,1" bitfld.long 0x0 11. "OIS2N,OIS2N" "0,1" bitfld.long 0x0 10. "OIS2,OIS2" "0,1" newline bitfld.long 0x0 9. "OIS1N,OIS1N" "0,1" bitfld.long 0x0 8. "OIS1,OIS1" "0,1" bitfld.long 0x0 7. "TI1S,TI1S" "0,1" bitfld.long 0x0 4.--6. "MMS_1,MMS_1" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "CCDS,CCDS" "0,1" newline bitfld.long 0x0 2. "CCUS,CCUS" "0,1" bitfld.long 0x0 0. "CCPC,CCPC" "0,1" line.long 0x4 "TIM1_SMCR,TIM1 slave mode control register" bitfld.long 0x4 25. "SMSPS,SMS preload source" "B_0x0,B_0x1" bitfld.long 0x4 24. "SMSPE,SMS preload enable" "B_0x0,B_0x1" bitfld.long 0x4 20.--21. "TS2,Trigger selection - bit 4:3" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16. "SMS2,Slave mode selection" "B_0x0,B_0x1" bitfld.long 0x4 15. "ETP,External trigger polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 14. "ECE,External clock enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter" bitfld.long 0x4 7. "MSM,Master/slave mode" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "TS1,Trigger selection - bit 4:3" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 0.--2. "SMS1,Slave mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "TIM1_DIER,TIM1 DMA/interrupt enable register" bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "COMDE,COM DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 12. "CC4DE,Capture/compare 4 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 11. "CC3DE,Capture/compare 3 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CC2DE,Capture/compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "CC1DE,Capture/compare 1 DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "BIE,Break interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 5. "COMIE,COM interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "CC4IE,Capture/compare 4 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CC3IE,Capture/compare 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 2. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 1. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" line.long 0xC "TIM1_SR,TIM1 status register" bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 20. "IDXF,Index interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 17. "CC6IF,Compare 6 interrupt flag" "0,1" newline bitfld.long 0xC 16. "CC5IF,Compare 5 interrupt flag" "0,1" bitfld.long 0xC 13. "SBIF,System break interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 12. "CC4OF,Capture/compare 4 overcapture flag" "0,1" bitfld.long 0xC 11. "CC3OF,Capture/compare 3 overcapture flag" "0,1" bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1" newline bitfld.long 0xC 9. "CC1OF,Capture/compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.long 0xC 8. "B2IF,Break 2 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 7. "BIF,Break interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 5. "COMIF,COM interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0xC 4. "CC4IF,Capture/compare 4 interrupt flag" "0,1" bitfld.long 0xC 3. "CC3IF,Capture/compare 3 interrupt flag" "0,1" bitfld.long 0xC 2. "CC2IF,Capture/compare 2 interrupt flag" "0,1" bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM1_EGR,TIM1 event generation register" bitfld.word 0x0 8. "B2G,Break 2 generation" "B_0x0,B_0x1" bitfld.word 0x0 7. "BG,Break generation" "B_0x0,B_0x1" bitfld.word 0x0 6. "TG,Trigger generation" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMG,Capture/compare control update generation" "B_0x0,B_0x1" bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1" newline bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1" bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM1_CCMR1_Input,TIM1 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 Selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x18++0x7 line.long 0x0 "TIM1_CCMR1_Output,TIM1 capture/compare mode register 1 [alternate]" bitfld.long 0x0 24. "OC2M2,Output compare 2 mode" "0,1" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2M1,Output compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1" newline bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM1_CCMR2_Input,TIM1 capture/compare mode register 2 [alternate]" hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x4 8.--9. "CC4S,Capture/compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" newline bitfld.long 0x4 0.--1. "CC3S,Capture/compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x1C++0xB line.long 0x0 "TIM1_CCMR2_Output,TIM1 capture/compare mode register 2 [alternate]" bitfld.long 0x0 24. "OC4M2,Output compare 4 mode" "0,1" bitfld.long 0x0 16. "OC3M2,Output compare 3 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC4M1,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1" newline bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC4S,Capture/compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC3M1,Output compare 3 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1" newline bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1" bitfld.long 0x0 0.--1. "CC3S,Capture/compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM1_CCER,TIM1 capture/compare enable register" bitfld.long 0x4 21. "CC6P,Capture/compare 6 output polarity" "0,1" bitfld.long 0x4 20. "CC6E,Capture/compare 6 output enable" "0,1" bitfld.long 0x4 17. "CC5P,Capture/compare 5 output polarity" "0,1" bitfld.long 0x4 16. "CC5E,Capture/compare 5 output enable" "0,1" bitfld.long 0x4 15. "CC4NP,Capture/compare 4 complementary output polarity" "0,1" newline bitfld.long 0x4 14. "CC4NE,Capture/compare 4 complementary output enable" "0,1" bitfld.long 0x4 13. "CC4P,Capture/compare 4 output polarity" "0,1" bitfld.long 0x4 12. "CC4E,Capture/compare 4 output enable" "0,1" bitfld.long 0x4 11. "CC3NP,Capture/compare 3 complementary output polarity" "0,1" bitfld.long 0x4 10. "CC3NE,Capture/compare 3 complementary output enable" "0,1" newline bitfld.long 0x4 9. "CC3P,Capture/compare 3 output polarity" "0,1" bitfld.long 0x4 8. "CC3E,Capture/compare 3 output enable" "0,1" bitfld.long 0x4 7. "CC2NP,Capture/compare 2 complementary output polarity" "0,1" bitfld.long 0x4 6. "CC2NE,Capture/compare 2 complementary output enable" "0,1" bitfld.long 0x4 5. "CC2P,Capture/compare 2 output polarity" "0,1" newline bitfld.long 0x4 4. "CC2E,Capture/compare 2 output enable" "0,1" bitfld.long 0x4 3. "CC1NP,Capture/compare 1 complementary output polarity" "B_0x0,B_0x1" bitfld.long 0x4 2. "CC1NE,Capture/compare 1 complementary output enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CC1P,Capture/compare 1 output polarity" "B_0x0,B_0x1" bitfld.long 0x4 0. "CC1E,Capture/compare 1 output enable" "B_0x0,B_0x1" line.long 0x8 "TIM1_CNT,TIM1 counter" rbitfld.long 0x8 31. "UIFCPY,UIF copy" "0,1" hexmask.long.word 0x8 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM1_PSC,TIM1 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM1_ARR,TIM1 auto-reload register" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.word 0x30++0x1 line.word 0x0 "TIM1_RCR,TIM1 repetition counter register" hexmask.word 0x0 0.--15. 1. "REP,Repetition counter reload value" group.long 0x34++0x33 line.long 0x0 "TIM1_CCR1,TIM1 capture/compare register 1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value" line.long 0x4 "TIM1_CCR2,TIM1 capture/compare register 2" hexmask.long.tbyte 0x4 0.--19. 1. "CCR2,Capture/compare 2 value" line.long 0x8 "TIM1_CCR3,TIM1 capture/compare register 3" hexmask.long.tbyte 0x8 0.--19. 1. "CCR3,Capture/compare value" line.long 0xC "TIM1_CCR4,TIM1 capture/compare register 4" hexmask.long.tbyte 0xC 0.--19. 1. "CCR4,Capture/compare value" line.long 0x10 "TIM1_BDTR,TIM1 break and dead-time register" bitfld.long 0x10 29. "BK2BID,Break2 bidirectional" "0,1" bitfld.long 0x10 28. "BKBID,Break bidirectional" "B_0x0,B_0x1" bitfld.long 0x10 27. "BK2DSRM,Break2 disarm" "0,1" bitfld.long 0x10 26. "BKDSRM,Break disarm" "B_0x0,B_0x1" bitfld.long 0x10 25. "BK2P,Break 2 polarity" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "BK2E,Break 2 enable" "B_0x0,B_0x1" hexmask.long.byte 0x10 20.--23. 1. "BK2F,Break 2 filter" hexmask.long.byte 0x10 16.--19. 1. "BKF,Break filter" bitfld.long 0x10 15. "MOE,Main output enable" "B_0x0,B_0x1" bitfld.long 0x10 14. "AOE,Automatic output enable" "B_0x0,B_0x1" newline bitfld.long 0x10 13. "BKP,Break polarity" "B_0x0,B_0x1" bitfld.long 0x10 12. "BKE,Break enable" "B_0x0,B_0x1" bitfld.long 0x10 11. "OSSR,Off-state selection for Run mode" "B_0x0,B_0x1" bitfld.long 0x10 10. "OSSI,Off-state selection for idle mode" "B_0x0,B_0x1" bitfld.long 0x10 8.--9. "LOCK,Lock configuration" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x10 0.--7. 1. "DTG,Dead-time generator setup" line.long 0x14 "TIM1_CCR5,TIM1 capture/compare register 5" bitfld.long 0x14 31. "GC5C3,Group channel 5 and channel 3" "B_0x0,B_0x1" bitfld.long 0x14 30. "GC5C2,Group channel 5 and channel 2" "B_0x0,B_0x1" bitfld.long 0x14 29. "GC5C1,Group channel 5 and channel 1" "B_0x0,B_0x1" hexmask.long.tbyte 0x14 0.--19. 1. "CCR5,Capture/compare 5 value" line.long 0x18 "TIM1_CCR6,TIM1 capture/compare register 6" hexmask.long.tbyte 0x18 0.--19. 1. "CCR6,Capture/compare 6 value" line.long 0x1C "TIM1_CCMR3,TIM1 capture/compare mode register 3" bitfld.long 0x1C 24. "OC6M2,Output compare 6 mode" "0,1" bitfld.long 0x1C 16. "OC5M2,Output compare 5 mode" "0,1" bitfld.long 0x1C 15. "OC6CE,Output compare 6 clear enable" "0,1" bitfld.long 0x1C 12.--14. "OC6M1,Output compare 6 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 11. "OC6PE,Output compare 6 preload enable" "0,1" newline bitfld.long 0x1C 10. "OC6FE,Output compare 6 fast enable" "0,1" bitfld.long 0x1C 7. "OC5CE,Output compare 5 clear enable" "0,1" bitfld.long 0x1C 4.--6. "OC5M1,Output compare 5 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 3. "OC5PE,Output compare 5 preload enable" "0,1" bitfld.long 0x1C 2. "OC5FE,Output compare 5 fast enable" "0,1" line.long 0x20 "TIM1_DTR2,TIM1 timer deadtime register 2" bitfld.long 0x20 17. "DTPE,Deadtime preload enable" "B_0x0,B_0x1" bitfld.long 0x20 16. "DTAE,Deadtime asymmetric enable" "B_0x0,B_0x1" hexmask.long.byte 0x20 0.--7. 1. "DTGF,Dead-time falling edge generator setup" line.long 0x24 "TIM1_ECR,TIM1 timer encoder control register" bitfld.long 0x24 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x24 16.--23. 1. "PW,Pulse width" bitfld.long 0x24 6.--7. "IPOS,Index positioning" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x24 5. "FIDX,First index" "B_0x0,B_0x1" bitfld.long 0x24 3.--4. "IBLK,Index blanking" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x24 1.--2. "IDIR,Index direction" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x24 0. "IE,Index enable" "B_0x0,B_0x1" line.long 0x28 "TIM1_TISEL,TIM1 timer input selection register" hexmask.long.byte 0x28 24.--27. 1. "TI4SEL,Selects tim_ti4[0..15] input" hexmask.long.byte 0x28 16.--19. 1. "TI3SEL,Selects tim_ti3[0..15] input" hexmask.long.byte 0x28 8.--11. 1. "TI2SEL,Selects tim_ti2[0..15] input" hexmask.long.byte 0x28 0.--3. 1. "TI1SEL,Selects tim_ti1[0..15] input" line.long 0x2C "TIM1_AF1,TIM1 alternate function option register 1" hexmask.long.byte 0x2C 14.--17. 1. "ETRSEL,etr_in source selection" bitfld.long 0x2C 13. "BKCMP4P,tim_brk_cmp4 input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 12. "BKCMP3P,tim_brk_cmp3 input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 11. "BKCMP2P,tim_brk_cmp2 input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 10. "BKCMP1P,tim_brk_cmp1 input polarity" "B_0x0,B_0x1" newline bitfld.long 0x2C 9. "BKINP,TIMx_BKIN input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 8. "BKCMP8E,tim_brk_cmp8 enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "BKCMP7E,tim_brk_cmp7 enable" "B_0x0,B_0x1" bitfld.long 0x2C 6. "BKCMP6E,tim_brk_cmp6 enable" "B_0x0,B_0x1" bitfld.long 0x2C 5. "BKCMP5E,tim_brk_cmp5 enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 4. "BKCMP4E,tim_brk_cmp4 enable" "B_0x0,B_0x1" bitfld.long 0x2C 3. "BKCMP3E,tim_brk_cmp3 enable" "B_0x0,B_0x1" bitfld.long 0x2C 2. "BKCMP2E,tim_brk_cmp2 enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "BKCMP1E,tim_brk_cmp1 enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "BKINE,TIMx_BKIN input enable" "B_0x0,B_0x1" line.long 0x30 "TIM1_AF2,TIM1 alternate function register 2" bitfld.long 0x30 16.--18. "OCRSEL,ocref_clr source selection" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" bitfld.long 0x30 13. "BK2CMP4P,tim_brk2_cmp4 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 12. "BK2CMP3P,tim_brk2_cmp3 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 11. "BK2CMP2P,tim_brk2_cmp2 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 10. "BK2CMP1P,tim_brk2_cmp1 input polarity" "B_0x0,B_0x1" newline bitfld.long 0x30 9. "BK2INP,TIMx_BKIN2 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 8. "BK2CMP8E,tim_brk2_cmp8 enable" "B_0x0,B_0x1" bitfld.long 0x30 7. "BK2CMP7E,tim_brk2_cmp7 enable" "B_0x0,B_0x1" bitfld.long 0x30 6. "BK2CMP6E,tim_brk2_cmp6 enable" "B_0x0,B_0x1" bitfld.long 0x30 5. "BK2CMP5E,tim_brk2_cmp5 enable" "B_0x0,B_0x1" newline bitfld.long 0x30 4. "BK2CMP4E,tim_brk2_cmp4 enable" "B_0x0,B_0x1" bitfld.long 0x30 3. "BK2CMP3E,tim_brk2_cmp3 enable" "B_0x0,B_0x1" bitfld.long 0x30 2. "BK2CMP2E,tim_brk2_cmp2 enable" "B_0x0,B_0x1" bitfld.long 0x30 1. "BK2CMP1E,tim_brk2_cmp1 enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "BK2INE,TIMx_BKIN2 input enable" "B_0x0,B_0x1" group.long 0x3DC++0x7 line.long 0x0 "TIM1_DCR,TIM1 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM1_DMAR,TIM1 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM1_HWCFGR2,TIM1 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM1_HWCFGR1,TIM1 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM1_VERR,TIM1 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM1_IPIDR,TIM1 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM1_SIDR,TIM1 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM8_S" base ad:0x50210000 group.word 0x0++0x1 line.word 0x0 "TIM1_CR1,TIM1 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.word 0x0 4. "DIR,Direction" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One pulse mode" "B_0x0,B_0x1" bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.long 0x4++0xF line.long 0x0 "TIM1_CR2,TIM1 control register 2" bitfld.long 0x0 25. "MMS_2,MMS_2" "0,1" hexmask.long.byte 0x0 20.--23. 1. "MMS2,MMS2" bitfld.long 0x0 18. "OIS6,OIS6" "0,1" bitfld.long 0x0 16. "OIS5,OIS5" "0,1" bitfld.long 0x0 15. "OIS4N,OIS4N" "0,1" newline bitfld.long 0x0 14. "OIS4,OIS4" "0,1" bitfld.long 0x0 13. "OIS3N,OIS3N" "0,1" bitfld.long 0x0 12. "OIS3,OIS3" "0,1" bitfld.long 0x0 11. "OIS2N,OIS2N" "0,1" bitfld.long 0x0 10. "OIS2,OIS2" "0,1" newline bitfld.long 0x0 9. "OIS1N,OIS1N" "0,1" bitfld.long 0x0 8. "OIS1,OIS1" "0,1" bitfld.long 0x0 7. "TI1S,TI1S" "0,1" bitfld.long 0x0 4.--6. "MMS_1,MMS_1" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "CCDS,CCDS" "0,1" newline bitfld.long 0x0 2. "CCUS,CCUS" "0,1" bitfld.long 0x0 0. "CCPC,CCPC" "0,1" line.long 0x4 "TIM1_SMCR,TIM1 slave mode control register" bitfld.long 0x4 25. "SMSPS,SMS preload source" "B_0x0,B_0x1" bitfld.long 0x4 24. "SMSPE,SMS preload enable" "B_0x0,B_0x1" bitfld.long 0x4 20.--21. "TS2,Trigger selection - bit 4:3" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16. "SMS2,Slave mode selection" "B_0x0,B_0x1" bitfld.long 0x4 15. "ETP,External trigger polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 14. "ECE,External clock enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter" bitfld.long 0x4 7. "MSM,Master/slave mode" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "TS1,Trigger selection - bit 4:3" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 0.--2. "SMS1,Slave mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "TIM1_DIER,TIM1 DMA/interrupt enable register" bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "COMDE,COM DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 12. "CC4DE,Capture/compare 4 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 11. "CC3DE,Capture/compare 3 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CC2DE,Capture/compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "CC1DE,Capture/compare 1 DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "BIE,Break interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 5. "COMIE,COM interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "CC4IE,Capture/compare 4 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CC3IE,Capture/compare 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 2. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 1. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" line.long 0xC "TIM1_SR,TIM1 status register" bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 20. "IDXF,Index interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 17. "CC6IF,Compare 6 interrupt flag" "0,1" newline bitfld.long 0xC 16. "CC5IF,Compare 5 interrupt flag" "0,1" bitfld.long 0xC 13. "SBIF,System break interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 12. "CC4OF,Capture/compare 4 overcapture flag" "0,1" bitfld.long 0xC 11. "CC3OF,Capture/compare 3 overcapture flag" "0,1" bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1" newline bitfld.long 0xC 9. "CC1OF,Capture/compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.long 0xC 8. "B2IF,Break 2 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 7. "BIF,Break interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 5. "COMIF,COM interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0xC 4. "CC4IF,Capture/compare 4 interrupt flag" "0,1" bitfld.long 0xC 3. "CC3IF,Capture/compare 3 interrupt flag" "0,1" bitfld.long 0xC 2. "CC2IF,Capture/compare 2 interrupt flag" "0,1" bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM1_EGR,TIM1 event generation register" bitfld.word 0x0 8. "B2G,Break 2 generation" "B_0x0,B_0x1" bitfld.word 0x0 7. "BG,Break generation" "B_0x0,B_0x1" bitfld.word 0x0 6. "TG,Trigger generation" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMG,Capture/compare control update generation" "B_0x0,B_0x1" bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1" newline bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1" bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM1_CCMR1_Input,TIM1 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 Selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x18++0x7 line.long 0x0 "TIM1_CCMR1_Output,TIM1 capture/compare mode register 1 [alternate]" bitfld.long 0x0 24. "OC2M2,Output compare 2 mode" "0,1" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2M1,Output compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1" newline bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM1_CCMR2_Input,TIM1 capture/compare mode register 2 [alternate]" hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x4 8.--9. "CC4S,Capture/compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" newline bitfld.long 0x4 0.--1. "CC3S,Capture/compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x1C++0xB line.long 0x0 "TIM1_CCMR2_Output,TIM1 capture/compare mode register 2 [alternate]" bitfld.long 0x0 24. "OC4M2,Output compare 4 mode" "0,1" bitfld.long 0x0 16. "OC3M2,Output compare 3 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC4M1,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1" newline bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC4S,Capture/compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC3M1,Output compare 3 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1" newline bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1" bitfld.long 0x0 0.--1. "CC3S,Capture/compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM1_CCER,TIM1 capture/compare enable register" bitfld.long 0x4 21. "CC6P,Capture/compare 6 output polarity" "0,1" bitfld.long 0x4 20. "CC6E,Capture/compare 6 output enable" "0,1" bitfld.long 0x4 17. "CC5P,Capture/compare 5 output polarity" "0,1" bitfld.long 0x4 16. "CC5E,Capture/compare 5 output enable" "0,1" bitfld.long 0x4 15. "CC4NP,Capture/compare 4 complementary output polarity" "0,1" newline bitfld.long 0x4 14. "CC4NE,Capture/compare 4 complementary output enable" "0,1" bitfld.long 0x4 13. "CC4P,Capture/compare 4 output polarity" "0,1" bitfld.long 0x4 12. "CC4E,Capture/compare 4 output enable" "0,1" bitfld.long 0x4 11. "CC3NP,Capture/compare 3 complementary output polarity" "0,1" bitfld.long 0x4 10. "CC3NE,Capture/compare 3 complementary output enable" "0,1" newline bitfld.long 0x4 9. "CC3P,Capture/compare 3 output polarity" "0,1" bitfld.long 0x4 8. "CC3E,Capture/compare 3 output enable" "0,1" bitfld.long 0x4 7. "CC2NP,Capture/compare 2 complementary output polarity" "0,1" bitfld.long 0x4 6. "CC2NE,Capture/compare 2 complementary output enable" "0,1" bitfld.long 0x4 5. "CC2P,Capture/compare 2 output polarity" "0,1" newline bitfld.long 0x4 4. "CC2E,Capture/compare 2 output enable" "0,1" bitfld.long 0x4 3. "CC1NP,Capture/compare 1 complementary output polarity" "B_0x0,B_0x1" bitfld.long 0x4 2. "CC1NE,Capture/compare 1 complementary output enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CC1P,Capture/compare 1 output polarity" "B_0x0,B_0x1" bitfld.long 0x4 0. "CC1E,Capture/compare 1 output enable" "B_0x0,B_0x1" line.long 0x8 "TIM1_CNT,TIM1 counter" rbitfld.long 0x8 31. "UIFCPY,UIF copy" "0,1" hexmask.long.word 0x8 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM1_PSC,TIM1 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM1_ARR,TIM1 auto-reload register" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.word 0x30++0x1 line.word 0x0 "TIM1_RCR,TIM1 repetition counter register" hexmask.word 0x0 0.--15. 1. "REP,Repetition counter reload value" group.long 0x34++0x33 line.long 0x0 "TIM1_CCR1,TIM1 capture/compare register 1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value" line.long 0x4 "TIM1_CCR2,TIM1 capture/compare register 2" hexmask.long.tbyte 0x4 0.--19. 1. "CCR2,Capture/compare 2 value" line.long 0x8 "TIM1_CCR3,TIM1 capture/compare register 3" hexmask.long.tbyte 0x8 0.--19. 1. "CCR3,Capture/compare value" line.long 0xC "TIM1_CCR4,TIM1 capture/compare register 4" hexmask.long.tbyte 0xC 0.--19. 1. "CCR4,Capture/compare value" line.long 0x10 "TIM1_BDTR,TIM1 break and dead-time register" bitfld.long 0x10 29. "BK2BID,Break2 bidirectional" "0,1" bitfld.long 0x10 28. "BKBID,Break bidirectional" "B_0x0,B_0x1" bitfld.long 0x10 27. "BK2DSRM,Break2 disarm" "0,1" bitfld.long 0x10 26. "BKDSRM,Break disarm" "B_0x0,B_0x1" bitfld.long 0x10 25. "BK2P,Break 2 polarity" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "BK2E,Break 2 enable" "B_0x0,B_0x1" hexmask.long.byte 0x10 20.--23. 1. "BK2F,Break 2 filter" hexmask.long.byte 0x10 16.--19. 1. "BKF,Break filter" bitfld.long 0x10 15. "MOE,Main output enable" "B_0x0,B_0x1" bitfld.long 0x10 14. "AOE,Automatic output enable" "B_0x0,B_0x1" newline bitfld.long 0x10 13. "BKP,Break polarity" "B_0x0,B_0x1" bitfld.long 0x10 12. "BKE,Break enable" "B_0x0,B_0x1" bitfld.long 0x10 11. "OSSR,Off-state selection for Run mode" "B_0x0,B_0x1" bitfld.long 0x10 10. "OSSI,Off-state selection for idle mode" "B_0x0,B_0x1" bitfld.long 0x10 8.--9. "LOCK,Lock configuration" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x10 0.--7. 1. "DTG,Dead-time generator setup" line.long 0x14 "TIM1_CCR5,TIM1 capture/compare register 5" bitfld.long 0x14 31. "GC5C3,Group channel 5 and channel 3" "B_0x0,B_0x1" bitfld.long 0x14 30. "GC5C2,Group channel 5 and channel 2" "B_0x0,B_0x1" bitfld.long 0x14 29. "GC5C1,Group channel 5 and channel 1" "B_0x0,B_0x1" hexmask.long.tbyte 0x14 0.--19. 1. "CCR5,Capture/compare 5 value" line.long 0x18 "TIM1_CCR6,TIM1 capture/compare register 6" hexmask.long.tbyte 0x18 0.--19. 1. "CCR6,Capture/compare 6 value" line.long 0x1C "TIM1_CCMR3,TIM1 capture/compare mode register 3" bitfld.long 0x1C 24. "OC6M2,Output compare 6 mode" "0,1" bitfld.long 0x1C 16. "OC5M2,Output compare 5 mode" "0,1" bitfld.long 0x1C 15. "OC6CE,Output compare 6 clear enable" "0,1" bitfld.long 0x1C 12.--14. "OC6M1,Output compare 6 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 11. "OC6PE,Output compare 6 preload enable" "0,1" newline bitfld.long 0x1C 10. "OC6FE,Output compare 6 fast enable" "0,1" bitfld.long 0x1C 7. "OC5CE,Output compare 5 clear enable" "0,1" bitfld.long 0x1C 4.--6. "OC5M1,Output compare 5 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 3. "OC5PE,Output compare 5 preload enable" "0,1" bitfld.long 0x1C 2. "OC5FE,Output compare 5 fast enable" "0,1" line.long 0x20 "TIM1_DTR2,TIM1 timer deadtime register 2" bitfld.long 0x20 17. "DTPE,Deadtime preload enable" "B_0x0,B_0x1" bitfld.long 0x20 16. "DTAE,Deadtime asymmetric enable" "B_0x0,B_0x1" hexmask.long.byte 0x20 0.--7. 1. "DTGF,Dead-time falling edge generator setup" line.long 0x24 "TIM1_ECR,TIM1 timer encoder control register" bitfld.long 0x24 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x24 16.--23. 1. "PW,Pulse width" bitfld.long 0x24 6.--7. "IPOS,Index positioning" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x24 5. "FIDX,First index" "B_0x0,B_0x1" bitfld.long 0x24 3.--4. "IBLK,Index blanking" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x24 1.--2. "IDIR,Index direction" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x24 0. "IE,Index enable" "B_0x0,B_0x1" line.long 0x28 "TIM1_TISEL,TIM1 timer input selection register" hexmask.long.byte 0x28 24.--27. 1. "TI4SEL,Selects tim_ti4[0..15] input" hexmask.long.byte 0x28 16.--19. 1. "TI3SEL,Selects tim_ti3[0..15] input" hexmask.long.byte 0x28 8.--11. 1. "TI2SEL,Selects tim_ti2[0..15] input" hexmask.long.byte 0x28 0.--3. 1. "TI1SEL,Selects tim_ti1[0..15] input" line.long 0x2C "TIM1_AF1,TIM1 alternate function option register 1" hexmask.long.byte 0x2C 14.--17. 1. "ETRSEL,etr_in source selection" bitfld.long 0x2C 13. "BKCMP4P,tim_brk_cmp4 input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 12. "BKCMP3P,tim_brk_cmp3 input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 11. "BKCMP2P,tim_brk_cmp2 input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 10. "BKCMP1P,tim_brk_cmp1 input polarity" "B_0x0,B_0x1" newline bitfld.long 0x2C 9. "BKINP,TIMx_BKIN input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 8. "BKCMP8E,tim_brk_cmp8 enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "BKCMP7E,tim_brk_cmp7 enable" "B_0x0,B_0x1" bitfld.long 0x2C 6. "BKCMP6E,tim_brk_cmp6 enable" "B_0x0,B_0x1" bitfld.long 0x2C 5. "BKCMP5E,tim_brk_cmp5 enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 4. "BKCMP4E,tim_brk_cmp4 enable" "B_0x0,B_0x1" bitfld.long 0x2C 3. "BKCMP3E,tim_brk_cmp3 enable" "B_0x0,B_0x1" bitfld.long 0x2C 2. "BKCMP2E,tim_brk_cmp2 enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "BKCMP1E,tim_brk_cmp1 enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "BKINE,TIMx_BKIN input enable" "B_0x0,B_0x1" line.long 0x30 "TIM1_AF2,TIM1 alternate function register 2" bitfld.long 0x30 16.--18. "OCRSEL,ocref_clr source selection" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" bitfld.long 0x30 13. "BK2CMP4P,tim_brk2_cmp4 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 12. "BK2CMP3P,tim_brk2_cmp3 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 11. "BK2CMP2P,tim_brk2_cmp2 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 10. "BK2CMP1P,tim_brk2_cmp1 input polarity" "B_0x0,B_0x1" newline bitfld.long 0x30 9. "BK2INP,TIMx_BKIN2 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 8. "BK2CMP8E,tim_brk2_cmp8 enable" "B_0x0,B_0x1" bitfld.long 0x30 7. "BK2CMP7E,tim_brk2_cmp7 enable" "B_0x0,B_0x1" bitfld.long 0x30 6. "BK2CMP6E,tim_brk2_cmp6 enable" "B_0x0,B_0x1" bitfld.long 0x30 5. "BK2CMP5E,tim_brk2_cmp5 enable" "B_0x0,B_0x1" newline bitfld.long 0x30 4. "BK2CMP4E,tim_brk2_cmp4 enable" "B_0x0,B_0x1" bitfld.long 0x30 3. "BK2CMP3E,tim_brk2_cmp3 enable" "B_0x0,B_0x1" bitfld.long 0x30 2. "BK2CMP2E,tim_brk2_cmp2 enable" "B_0x0,B_0x1" bitfld.long 0x30 1. "BK2CMP1E,tim_brk2_cmp1 enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "BK2INE,TIMx_BKIN2 input enable" "B_0x0,B_0x1" group.long 0x3DC++0x7 line.long 0x0 "TIM1_DCR,TIM1 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM1_DMAR,TIM1 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM1_HWCFGR2,TIM1 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM1_HWCFGR1,TIM1 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM1_VERR,TIM1 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM1_IPIDR,TIM1 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM1_SIDR,TIM1 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM10" base ad:0x401C0000 group.word 0x0++0x1 line.word 0x0 "TIM10_CR1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" newline bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0xC++0x1 line.word 0x0 "TIM10_DIER" bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM10_SR" bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM10_EGR" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM10_CCMR1_INPUT,TIM10 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.long 0x18++0x3 line.long 0x0 "TIM10_CCMR1_OUTPUT,TIM10 capture/compare mode register 1 [alternate]" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.word 0x20++0x1 line.word 0x0 "TIM10_CCER" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output Polarity." "0,1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM10_CNT" bitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM10_PSC" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM10_ARR" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.long 0x34++0x3 line.long 0x0 "TIM10_CCR1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value" group.word 0x5C++0x1 line.word 0x0 "TIM10_TISEL" hexmask.word.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[0..15] input" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM10_HWCFGR2,TIM10 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM10_HWCFGR1,TIM10 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM10_VERR" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM10_IPIDR" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM10_SIDR" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM10_S" base ad:0x501C0000 group.word 0x0++0x1 line.word 0x0 "TIM10_CR1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" newline bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0xC++0x1 line.word 0x0 "TIM10_DIER" bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM10_SR" bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM10_EGR" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM10_CCMR1_INPUT,TIM10 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.long 0x18++0x3 line.long 0x0 "TIM10_CCMR1_OUTPUT,TIM10 capture/compare mode register 1 [alternate]" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.word 0x20++0x1 line.word 0x0 "TIM10_CCER" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output Polarity." "0,1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM10_CNT" bitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM10_PSC" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM10_ARR" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.long 0x34++0x3 line.long 0x0 "TIM10_CCR1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value" group.word 0x5C++0x1 line.word 0x0 "TIM10_TISEL" hexmask.word.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[0..15] input" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM10_HWCFGR2,TIM10 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM10_HWCFGR1,TIM10 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM10_VERR" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM10_IPIDR" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM10_SIDR" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM11" base ad:0x401D0000 group.word 0x0++0x1 line.word 0x0 "TIM10_CR1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" newline bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0xC++0x1 line.word 0x0 "TIM10_DIER" bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM10_SR" bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM10_EGR" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM10_CCMR1_INPUT,TIM10 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.long 0x18++0x3 line.long 0x0 "TIM10_CCMR1_OUTPUT,TIM10 capture/compare mode register 1 [alternate]" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.word 0x20++0x1 line.word 0x0 "TIM10_CCER" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output Polarity." "0,1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM10_CNT" bitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM10_PSC" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM10_ARR" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.long 0x34++0x3 line.long 0x0 "TIM10_CCR1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value" group.word 0x5C++0x1 line.word 0x0 "TIM10_TISEL" hexmask.word.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[0..15] input" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM10_HWCFGR2,TIM10 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM10_HWCFGR1,TIM10 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM10_VERR" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM10_IPIDR" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM10_SIDR" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM11_S" base ad:0x501D0000 group.word 0x0++0x1 line.word 0x0 "TIM10_CR1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" newline bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0xC++0x1 line.word 0x0 "TIM10_DIER" bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM10_SR" bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM10_EGR" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM10_CCMR1_INPUT,TIM10 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.long 0x18++0x3 line.long 0x0 "TIM10_CCMR1_OUTPUT,TIM10 capture/compare mode register 1 [alternate]" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.word 0x20++0x1 line.word 0x0 "TIM10_CCER" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output Polarity." "0,1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM10_CNT" bitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM10_PSC" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM10_ARR" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.long 0x34++0x3 line.long 0x0 "TIM10_CCR1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value" group.word 0x5C++0x1 line.word 0x0 "TIM10_TISEL" hexmask.word.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[0..15] input" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM10_HWCFGR2,TIM10 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM10_HWCFGR1,TIM10 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM10_VERR" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM10_IPIDR" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM10_SIDR" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM12" base ad:0x40060000 group.word 0x0++0x1 line.word 0x0 "TIM12_CR1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" newline bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0x4++0x1 line.word 0x0 "TIM12_CR2" bitfld.word 0x0 7. "TI1S,tim_ti1 selection" "B_0x0,B_0x1" bitfld.word 0x0 4.--6. "MMS,Master mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" group.long 0x8++0x3 line.long 0x0 "TIM12_SMCR" bitfld.long 0x0 20.--21. "TS2,Trigger selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16. "SMS2,Slave mode selection" "B_0x0,?" bitfld.long 0x0 7. "MSM,Master/Slave mode" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "TS1,Trigger selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,?" bitfld.long 0x0 0.--2. "SMS1,Slave mode selection" "B_0x0,?,?,?,B_0x4,B_0x5,B_0x6,B_0x7" group.word 0xC++0x1 line.word 0x0 "TIM12_DIER" bitfld.word 0x0 6. "TIE,Trigger interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 2. "CC2IE,Capture/Compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM12_SR" bitfld.word 0x0 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1" bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.word 0x0 6. "TIF,Trigger interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1" bitfld.word 0x0 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM12_EGR" bitfld.word 0x0 6. "TG,Trigger generation" "B_0x0,B_0x1" bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM12_CCMR1_INPUT,TIM12 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x18++0x3 line.long 0x0 "TIM12_CCMR1_OUTPUT,TIM12 capture/compare mode register 1 [alternate]" bitfld.long 0x0 24. "OC2M2,Output compare 2 mode" "0,1" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1" bitfld.long 0x0 12.--14. "OC2M1,Output compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1" newline bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.word 0x20++0x1 line.word 0x0 "TIM12_CCER" bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity" "0,1" bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity" "0,1" bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable" "0,1" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output Polarity" "0,1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "B_0x0,B_0x1" newline bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM12_CNT" bitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM12_PSC" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM12_ARR" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.long 0x34++0x7 line.long 0x0 "TIM12_CCR1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value" line.long 0x4 "TIM12_CCR2" hexmask.long.tbyte 0x4 0.--19. 1. "CCR2,Capture/compare 2 value" group.word 0x5C++0x1 line.word 0x0 "TIM12_TISEL" hexmask.word.byte 0x0 8.--11. 1. "TI2SEL,selects tim_ti2_in[0..15] input" hexmask.word.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[0..15] input" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM12_HWCFGR2,TIM12 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM12_HWCFGR1,TIM12 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM12_VERR" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM12_IPIDR" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM12_SIDR" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM12_S" base ad:0x50060000 group.word 0x0++0x1 line.word 0x0 "TIM12_CR1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" newline bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0x4++0x1 line.word 0x0 "TIM12_CR2" bitfld.word 0x0 7. "TI1S,tim_ti1 selection" "B_0x0,B_0x1" bitfld.word 0x0 4.--6. "MMS,Master mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" group.long 0x8++0x3 line.long 0x0 "TIM12_SMCR" bitfld.long 0x0 20.--21. "TS2,Trigger selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16. "SMS2,Slave mode selection" "B_0x0,?" bitfld.long 0x0 7. "MSM,Master/Slave mode" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "TS1,Trigger selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,?" bitfld.long 0x0 0.--2. "SMS1,Slave mode selection" "B_0x0,?,?,?,B_0x4,B_0x5,B_0x6,B_0x7" group.word 0xC++0x1 line.word 0x0 "TIM12_DIER" bitfld.word 0x0 6. "TIE,Trigger interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 2. "CC2IE,Capture/Compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM12_SR" bitfld.word 0x0 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1" bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.word 0x0 6. "TIF,Trigger interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1" bitfld.word 0x0 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM12_EGR" bitfld.word 0x0 6. "TG,Trigger generation" "B_0x0,B_0x1" bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM12_CCMR1_INPUT,TIM12 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x18++0x3 line.long 0x0 "TIM12_CCMR1_OUTPUT,TIM12 capture/compare mode register 1 [alternate]" bitfld.long 0x0 24. "OC2M2,Output compare 2 mode" "0,1" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1" bitfld.long 0x0 12.--14. "OC2M1,Output compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1" newline bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.word 0x20++0x1 line.word 0x0 "TIM12_CCER" bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity" "0,1" bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity" "0,1" bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable" "0,1" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output Polarity" "0,1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "B_0x0,B_0x1" newline bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM12_CNT" bitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM12_PSC" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM12_ARR" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.long 0x34++0x7 line.long 0x0 "TIM12_CCR1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value" line.long 0x4 "TIM12_CCR2" hexmask.long.tbyte 0x4 0.--19. 1. "CCR2,Capture/compare 2 value" group.word 0x5C++0x1 line.word 0x0 "TIM12_TISEL" hexmask.word.byte 0x0 8.--11. 1. "TI2SEL,selects tim_ti2_in[0..15] input" hexmask.word.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[0..15] input" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM12_HWCFGR2,TIM12 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM12_HWCFGR1,TIM12 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM12_VERR" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM12_IPIDR" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM12_SIDR" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM13" base ad:0x40070000 group.word 0x0++0x1 line.word 0x0 "TIM10_CR1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" newline bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0xC++0x1 line.word 0x0 "TIM10_DIER" bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM10_SR" bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM10_EGR" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM10_CCMR1_INPUT,TIM10 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.long 0x18++0x3 line.long 0x0 "TIM10_CCMR1_OUTPUT,TIM10 capture/compare mode register 1 [alternate]" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.word 0x20++0x1 line.word 0x0 "TIM10_CCER" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output Polarity." "0,1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM10_CNT" bitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM10_PSC" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM10_ARR" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.long 0x34++0x3 line.long 0x0 "TIM10_CCR1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value" group.word 0x5C++0x1 line.word 0x0 "TIM10_TISEL" hexmask.word.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[0..15] input" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM10_HWCFGR2,TIM10 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM10_HWCFGR1,TIM10 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM10_VERR" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM10_IPIDR" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM10_SIDR" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM13_S" base ad:0x50070000 group.word 0x0++0x1 line.word 0x0 "TIM10_CR1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" newline bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0xC++0x1 line.word 0x0 "TIM10_DIER" bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM10_SR" bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM10_EGR" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM10_CCMR1_INPUT,TIM10 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.long 0x18++0x3 line.long 0x0 "TIM10_CCMR1_OUTPUT,TIM10 capture/compare mode register 1 [alternate]" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.word 0x20++0x1 line.word 0x0 "TIM10_CCER" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output Polarity." "0,1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM10_CNT" bitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM10_PSC" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM10_ARR" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.long 0x34++0x3 line.long 0x0 "TIM10_CCR1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value" group.word 0x5C++0x1 line.word 0x0 "TIM10_TISEL" hexmask.word.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[0..15] input" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM10_HWCFGR2,TIM10 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM10_HWCFGR1,TIM10 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM10_VERR" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM10_IPIDR" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM10_SIDR" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM14" base ad:0x40080000 group.word 0x0++0x1 line.word 0x0 "TIM10_CR1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" newline bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0xC++0x1 line.word 0x0 "TIM10_DIER" bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM10_SR" bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM10_EGR" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM10_CCMR1_INPUT,TIM10 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.long 0x18++0x3 line.long 0x0 "TIM10_CCMR1_OUTPUT,TIM10 capture/compare mode register 1 [alternate]" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.word 0x20++0x1 line.word 0x0 "TIM10_CCER" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output Polarity." "0,1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM10_CNT" bitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM10_PSC" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM10_ARR" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.long 0x34++0x3 line.long 0x0 "TIM10_CCR1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value" group.word 0x5C++0x1 line.word 0x0 "TIM10_TISEL" hexmask.word.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[0..15] input" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM10_HWCFGR2,TIM10 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM10_HWCFGR1,TIM10 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM10_VERR" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM10_IPIDR" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM10_SIDR" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM14_S" base ad:0x50080000 group.word 0x0++0x1 line.word 0x0 "TIM10_CR1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" newline bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0xC++0x1 line.word 0x0 "TIM10_DIER" bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM10_SR" bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM10_EGR" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM10_CCMR1_INPUT,TIM10 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.long 0x18++0x3 line.long 0x0 "TIM10_CCMR1_OUTPUT,TIM10 capture/compare mode register 1 [alternate]" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode (refer to bit 16 for OC1M[3])" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.word 0x20++0x1 line.word 0x0 "TIM10_CCER" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output Polarity." "0,1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM10_CNT" bitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM10_PSC" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM10_ARR" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.long 0x34++0x3 line.long 0x0 "TIM10_CCR1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value" group.word 0x5C++0x1 line.word 0x0 "TIM10_TISEL" hexmask.word.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[0..15] input" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM10_HWCFGR2,TIM10 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM10_HWCFGR1,TIM10 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM10_VERR" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM10_IPIDR" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM10_SIDR" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM15" base ad:0x40250000 group.word 0x0++0x1 line.word 0x0 "TIM15_CR1,TIM15 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" newline bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0x4++0x1 line.word 0x0 "TIM15_CR2,TIM15 control register 2" bitfld.word 0x0 10. "OIS2,Output idle state 2 (tim_oc2 output)" "B_0x0,B_0x1" bitfld.word 0x0 9. "OIS1N,Output Idle state 1 (tim_oc1n output)" "B_0x0,B_0x1" bitfld.word 0x0 8. "OIS1,Output Idle state 1 (tim_oc1 output)" "B_0x0,B_0x1" bitfld.word 0x0 7. "TI1S,tim_ti1 selection" "B_0x0,B_0x1" bitfld.word 0x0 4.--6. "MMS,Master mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" newline bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "B_0x0,B_0x1" bitfld.word 0x0 2. "CCUS,Capture/compare control update selection" "B_0x0,B_0x1" bitfld.word 0x0 0. "CCPC,Capture/compare preloaded control" "B_0x0,B_0x1" group.long 0x8++0x3 line.long 0x0 "TIM15_SMCR,TIM15 slave mode control register" bitfld.long 0x0 20.--21. "TS2,Trigger selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16. "SMS2,Slave mode selection" "B_0x0,?" bitfld.long 0x0 7. "MSM,Master/slave mode" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "TS1,Trigger selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,?" bitfld.long 0x0 0.--2. "SMS1,Slave mode selection" "B_0x0,?,?,?,B_0x4,B_0x5,B_0x6,B_0x7" group.word 0xC++0x1 line.word 0x0 "TIM15_DIER,TIM15 DMA/interrupt enable register" bitfld.word 0x0 14. "TDE,Trigger DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 13. "COMDE,COM DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 10. "CC2DE,Capture/Compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" newline bitfld.word 0x0 7. "BIE,Break interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 6. "TIE,Trigger interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMIE,COM interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 2. "CC2IE,Capture/Compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM15_SR,TIM15 status register" bitfld.word 0x0 10. "CC2OF,Capture/Compare 2 overcapture flag" "0,1" bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.word 0x0 7. "BIF,Break interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 6. "TIF,Trigger interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMIF,COM interrupt flag" "B_0x0,B_0x1" newline bitfld.word 0x0 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1" bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" group.word 0x14++0x1 line.word 0x0 "TIM15_EGR,TIM15 event generation register" bitfld.word 0x0 7. "BG,Break generation" "B_0x0,B_0x1" bitfld.word 0x0 6. "TG,Trigger generation" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "B_0x0,B_0x1" bitfld.word 0x0 2. "CC2G,Capture/Compare 2 generation" "0,1" bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "B_0x0,?" newline bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM15_CCMR1_Intput,TIM15 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x18++0x3 line.long 0x0 "TIM15_CCMR1_Output,TIM15 capture/compare mode register 1 [alternate]" bitfld.long 0x0 24. "OC2M2,Output compare 2 mode" "0,1" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2M1,Output compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1" newline bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.word 0x20++0x1 line.word 0x0 "TIM15_CCER,TIM15 capture/compare enable register" bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 complementary output polarity" "0,1" bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output polarity" "0,1" bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable" "0,1" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "B_0x0,B_0x1" bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "B_0x0,B_0x1" newline bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM15_CNT,TIM15 counter" rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM15_PSC,TIM15 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM15_ARR,TIM15 auto-reload register" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.word 0x30++0x1 line.word 0x0 "TIM15_RCR,TIM15 repetition counter register" hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter reload value" group.long 0x34++0x7 line.long 0x0 "TIM15_CCR1,TIM15 capture/compare register 1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value" line.long 0x4 "TIM15_CCR2,TIM15 capture/compare register 2" hexmask.long.tbyte 0x4 0.--19. 1. "CCR2,Capture/compare 2 value" group.long 0x44++0x3 line.long 0x0 "TIM15_BDTR,TIM15 break and dead-time register" bitfld.long 0x0 28. "BKBID,Break bidirectional" "B_0x0,B_0x1" bitfld.long 0x0 26. "BKDSRM,Break disarm" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter" bitfld.long 0x0 15. "MOE,Main output enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "AOE,Automatic output enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BKP,Break polarity" "B_0x0,B_0x1" bitfld.long 0x0 12. "BKE,Break enable" "B_0x0,?" bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "B_0x0,B_0x1" bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup" group.long 0x54++0x3 line.long 0x0 "TIM15_DTR2,TIM15 timer deadtime register 2" bitfld.long 0x0 17. "DTPE,Deadtime preload enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "DTAE,Deadtime asymmetric enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--7. 1. "DTGF,Dead-time falling edge generator setup" group.long 0x5C++0xB line.long 0x0 "TIM15_TISEL,TIM15 input selection register" hexmask.long.byte 0x0 8.--11. 1. "TI2SEL,selects tim_ti2_in[0..15] input" hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[0..15] input" line.long 0x4 "TIM15_AF1,TIM15 alternate function register 1" bitfld.long 0x4 13. "BKCMP4P,tim_brk_cmp4 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 12. "BKCMP3P,tim_brk_cmp3 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 11. "BKCMP2P,tim_brk_cmp2 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "BKCMP1P,tim_brk_cmp1 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "BKINP,TIMx_BKIN input polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 8. "BKCMP8E,tim_brk_cmp8 enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "BKCMP7E,tim_brk_cmp7 enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "BKCMP6E,tim_brk_cmp6 enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "BKCMP5E,tim_brk_cmp5 enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "BKCMP4E,tim_brk_cmp4 enable" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "BKCMP3E,tim_brk_cmp3 enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "BKCMP2E,tim_brk_cmp2 enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "BKCMP1E,tim_brk_cmp1 enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "BKINE,TIMx_BKIN input enable" "B_0x0,B_0x1" line.long 0x8 "TIM15_AF2,TIM15 alternate function register 2" bitfld.long 0x8 16.--18. "OCRSEL,ocref_clr source selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" group.long 0x3DC++0x7 line.long 0x0 "TIM15_DCR,TIM15 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM15_DMAR,TIM15 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM15_HWCFGR2,TIM15 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM15_HWCFGR1,TIM15 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM15_VERR,TIM15 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM15_IPIDR,TIM15 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM15_SIDR,TIM15 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM15_S" base ad:0x50250000 group.word 0x0++0x1 line.word 0x0 "TIM15_CR1,TIM15 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One-pulse mode" "B_0x0,B_0x1" newline bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0x4++0x1 line.word 0x0 "TIM15_CR2,TIM15 control register 2" bitfld.word 0x0 10. "OIS2,Output idle state 2 (tim_oc2 output)" "B_0x0,B_0x1" bitfld.word 0x0 9. "OIS1N,Output Idle state 1 (tim_oc1n output)" "B_0x0,B_0x1" bitfld.word 0x0 8. "OIS1,Output Idle state 1 (tim_oc1 output)" "B_0x0,B_0x1" bitfld.word 0x0 7. "TI1S,tim_ti1 selection" "B_0x0,B_0x1" bitfld.word 0x0 4.--6. "MMS,Master mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" newline bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "B_0x0,B_0x1" bitfld.word 0x0 2. "CCUS,Capture/compare control update selection" "B_0x0,B_0x1" bitfld.word 0x0 0. "CCPC,Capture/compare preloaded control" "B_0x0,B_0x1" group.long 0x8++0x3 line.long 0x0 "TIM15_SMCR,TIM15 slave mode control register" bitfld.long 0x0 20.--21. "TS2,Trigger selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16. "SMS2,Slave mode selection" "B_0x0,?" bitfld.long 0x0 7. "MSM,Master/slave mode" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "TS1,Trigger selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,?" bitfld.long 0x0 0.--2. "SMS1,Slave mode selection" "B_0x0,?,?,?,B_0x4,B_0x5,B_0x6,B_0x7" group.word 0xC++0x1 line.word 0x0 "TIM15_DIER,TIM15 DMA/interrupt enable register" bitfld.word 0x0 14. "TDE,Trigger DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 13. "COMDE,COM DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 10. "CC2DE,Capture/Compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" newline bitfld.word 0x0 7. "BIE,Break interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 6. "TIE,Trigger interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMIE,COM interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 2. "CC2IE,Capture/Compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" newline bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM15_SR,TIM15 status register" bitfld.word 0x0 10. "CC2OF,Capture/Compare 2 overcapture flag" "0,1" bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.word 0x0 7. "BIF,Break interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 6. "TIF,Trigger interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMIF,COM interrupt flag" "B_0x0,B_0x1" newline bitfld.word 0x0 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1" bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" group.word 0x14++0x1 line.word 0x0 "TIM15_EGR,TIM15 event generation register" bitfld.word 0x0 7. "BG,Break generation" "B_0x0,B_0x1" bitfld.word 0x0 6. "TG,Trigger generation" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "B_0x0,B_0x1" bitfld.word 0x0 2. "CC2G,Capture/Compare 2 generation" "0,1" bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "B_0x0,?" newline bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM15_CCMR1_Intput,TIM15 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x18++0x3 line.long 0x0 "TIM15_CCMR1_Output,TIM15 capture/compare mode register 1 [alternate]" bitfld.long 0x0 24. "OC2M2,Output compare 2 mode" "0,1" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2M1,Output compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1" newline bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.word 0x20++0x1 line.word 0x0 "TIM15_CCER,TIM15 capture/compare enable register" bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 complementary output polarity" "0,1" bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output polarity" "0,1" bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable" "0,1" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "B_0x0,B_0x1" bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "B_0x0,B_0x1" newline bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM15_CNT,TIM15 counter" rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM15_PSC,TIM15 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM15_ARR,TIM15 auto-reload register" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.word 0x30++0x1 line.word 0x0 "TIM15_RCR,TIM15 repetition counter register" hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter reload value" group.long 0x34++0x7 line.long 0x0 "TIM15_CCR1,TIM15 capture/compare register 1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value" line.long 0x4 "TIM15_CCR2,TIM15 capture/compare register 2" hexmask.long.tbyte 0x4 0.--19. 1. "CCR2,Capture/compare 2 value" group.long 0x44++0x3 line.long 0x0 "TIM15_BDTR,TIM15 break and dead-time register" bitfld.long 0x0 28. "BKBID,Break bidirectional" "B_0x0,B_0x1" bitfld.long 0x0 26. "BKDSRM,Break disarm" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter" bitfld.long 0x0 15. "MOE,Main output enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "AOE,Automatic output enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BKP,Break polarity" "B_0x0,B_0x1" bitfld.long 0x0 12. "BKE,Break enable" "B_0x0,?" bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "B_0x0,B_0x1" bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup" group.long 0x54++0x3 line.long 0x0 "TIM15_DTR2,TIM15 timer deadtime register 2" bitfld.long 0x0 17. "DTPE,Deadtime preload enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "DTAE,Deadtime asymmetric enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--7. 1. "DTGF,Dead-time falling edge generator setup" group.long 0x5C++0xB line.long 0x0 "TIM15_TISEL,TIM15 input selection register" hexmask.long.byte 0x0 8.--11. 1. "TI2SEL,selects tim_ti2_in[0..15] input" hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[0..15] input" line.long 0x4 "TIM15_AF1,TIM15 alternate function register 1" bitfld.long 0x4 13. "BKCMP4P,tim_brk_cmp4 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 12. "BKCMP3P,tim_brk_cmp3 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 11. "BKCMP2P,tim_brk_cmp2 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "BKCMP1P,tim_brk_cmp1 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "BKINP,TIMx_BKIN input polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 8. "BKCMP8E,tim_brk_cmp8 enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "BKCMP7E,tim_brk_cmp7 enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "BKCMP6E,tim_brk_cmp6 enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "BKCMP5E,tim_brk_cmp5 enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "BKCMP4E,tim_brk_cmp4 enable" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "BKCMP3E,tim_brk_cmp3 enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "BKCMP2E,tim_brk_cmp2 enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "BKCMP1E,tim_brk_cmp1 enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "BKINE,TIMx_BKIN input enable" "B_0x0,B_0x1" line.long 0x8 "TIM15_AF2,TIM15 alternate function register 2" bitfld.long 0x8 16.--18. "OCRSEL,ocref_clr source selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" group.long 0x3DC++0x7 line.long 0x0 "TIM15_DCR,TIM15 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM15_DMAR,TIM15 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM15_HWCFGR2,TIM15 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM15_HWCFGR1,TIM15 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM15_VERR,TIM15 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM15_IPIDR,TIM15 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM15_SIDR,TIM15 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM16" base ad:0x40260000 group.word 0x0++0x1 line.word 0x0 "TIM16_CR1,TIM16 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One pulse mode" "B_0x0,B_0x1" newline bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0x4++0x1 line.word 0x0 "TIM16_CR2,TIM16 control register 2" bitfld.word 0x0 9. "OIS1N,Output Idle state 1 (tim_oc1n output)" "B_0x0,B_0x1" bitfld.word 0x0 8. "OIS1,Output Idle state 1 (tim_oc1 output)" "B_0x0,B_0x1" bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "B_0x0,B_0x1" bitfld.word 0x0 2. "CCUS,Capture/compare control update selection" "B_0x0,B_0x1" bitfld.word 0x0 0. "CCPC,Capture/compare preloaded control" "B_0x0,B_0x1" group.word 0xC++0x1 line.word 0x0 "TIM16_DIER,TIM16 DMA/interrupt enable register" bitfld.word 0x0 13. "COMDE,COM DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 7. "BIE,Break interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMIE,COM interrupt enable" "B_0x0,B_0x1" newline bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM16_SR,TIM16 status register" bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.word 0x0 7. "BIF,Break interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMIF,COM interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM16_EGR,TIM16 event generation register" bitfld.word 0x0 7. "BG,Break generation" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM16_CCMR1_Intput,TIM16 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.long 0x18++0x3 line.long 0x0 "TIM16_CCMR1_Output,TIM16 capture/compare mode register 1 [alternate]" bitfld.long 0x0 16. "OC1M2,Output Compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 7. "OC1CE,Output Compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output Compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "B_0x0,B_0x1" newline bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.word 0x20++0x1 line.word 0x0 "TIM16_CCER,TIM16 capture/compare enable register" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "B_0x0,B_0x1" bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM16_CNT,TIM16 counter" rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM16_PSC,TIM16 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM16_ARR,TIM16 auto-reload register" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.word 0x30++0x1 line.word 0x0 "TIM16_RCR,TIM16 repetition counter register" hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter reload value" group.long 0x34++0x3 line.long 0x0 "TIM16_CCR1,TIM16 capture/compare register 1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/Compare 1 value" group.long 0x44++0x3 line.long 0x0 "TIM16_BDTR,TIM16 break and dead-time register" bitfld.long 0x0 28. "BKBID,Break Bidirectional" "B_0x0,B_0x1" bitfld.long 0x0 26. "BKDSRM,Break Disarm" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter" bitfld.long 0x0 15. "MOE,Main output enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "AOE,Automatic output enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BKP,Break polarity" "B_0x0,B_0x1" bitfld.long 0x0 12. "BKE,Break enable" "B_0x0,?" bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "B_0x0,B_0x1" bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup" group.long 0x54++0x3 line.long 0x0 "TIM16_DTR2,TIM16 timer deadtime register 2" bitfld.long 0x0 17. "DTPE,Deadtime preload enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "DTAE,Deadtime asymmetric enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--7. 1. "DTGF,Dead-time falling edge generator setup" group.long 0x5C++0xB line.long 0x0 "TIM16_TISEL,TIM16 input selection register" hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[0..15] input" line.long 0x4 "TIM16_AF1,TIM16 alternate function register 1" bitfld.long 0x4 13. "BKCMP4P,tim_brk_cmp4 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 12. "BKCMP3P,tim_brk_cmp3 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 11. "BKCMP2P,tim_brk_cmp2 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "BKCMP1P,tim_brk_cmp1 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "BKINP,TIMx_BKIN input polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 8. "BKCMP8E,tim_brk_cmp8 enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "BKCMP7E,tim_brk_cmp7 enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "BKCMP6E,tim_brk_cmp6 enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "BKCMP5E,tim_brk_cmp5 enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "BKCMP4E,tim_brk_cmp4 enable" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "BKCMP3E,tim_brk_cmp3 enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "BKCMP2E,tim_brk_cmp2 enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "BKCMP1E,tim_brk_cmp1 enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "BKINE,TIMx_BKIN input enable" "B_0x0,B_0x1" line.long 0x8 "TIM16_AF2,TIM16 alternate function register 2" bitfld.long 0x8 16.--18. "OCRSEL,tim_ocref_clr source selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" group.long 0x3DC++0x7 line.long 0x0 "TIM16_DCR,TIM16 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM16_DMAR,TIM16/TIM17 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM16_HWCFGR2,TIM16 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM16_HWCFGR1,TIM16 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM16_VERR,TIM16 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM16_IPIDR,TIM16 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM16_SIDR,TIM16 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM16_S" base ad:0x50260000 group.word 0x0++0x1 line.word 0x0 "TIM16_CR1,TIM16 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One pulse mode" "B_0x0,B_0x1" newline bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0x4++0x1 line.word 0x0 "TIM16_CR2,TIM16 control register 2" bitfld.word 0x0 9. "OIS1N,Output Idle state 1 (tim_oc1n output)" "B_0x0,B_0x1" bitfld.word 0x0 8. "OIS1,Output Idle state 1 (tim_oc1 output)" "B_0x0,B_0x1" bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "B_0x0,B_0x1" bitfld.word 0x0 2. "CCUS,Capture/compare control update selection" "B_0x0,B_0x1" bitfld.word 0x0 0. "CCPC,Capture/compare preloaded control" "B_0x0,B_0x1" group.word 0xC++0x1 line.word 0x0 "TIM16_DIER,TIM16 DMA/interrupt enable register" bitfld.word 0x0 13. "COMDE,COM DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 7. "BIE,Break interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMIE,COM interrupt enable" "B_0x0,B_0x1" newline bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM16_SR,TIM16 status register" bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.word 0x0 7. "BIF,Break interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMIF,COM interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM16_EGR,TIM16 event generation register" bitfld.word 0x0 7. "BG,Break generation" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM16_CCMR1_Intput,TIM16 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.long 0x18++0x3 line.long 0x0 "TIM16_CCMR1_Output,TIM16 capture/compare mode register 1 [alternate]" bitfld.long 0x0 16. "OC1M2,Output Compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 7. "OC1CE,Output Compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output Compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "B_0x0,B_0x1" newline bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.word 0x20++0x1 line.word 0x0 "TIM16_CCER,TIM16 capture/compare enable register" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "B_0x0,B_0x1" bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM16_CNT,TIM16 counter" rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM16_PSC,TIM16 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM16_ARR,TIM16 auto-reload register" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.word 0x30++0x1 line.word 0x0 "TIM16_RCR,TIM16 repetition counter register" hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter reload value" group.long 0x34++0x3 line.long 0x0 "TIM16_CCR1,TIM16 capture/compare register 1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/Compare 1 value" group.long 0x44++0x3 line.long 0x0 "TIM16_BDTR,TIM16 break and dead-time register" bitfld.long 0x0 28. "BKBID,Break Bidirectional" "B_0x0,B_0x1" bitfld.long 0x0 26. "BKDSRM,Break Disarm" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter" bitfld.long 0x0 15. "MOE,Main output enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "AOE,Automatic output enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BKP,Break polarity" "B_0x0,B_0x1" bitfld.long 0x0 12. "BKE,Break enable" "B_0x0,?" bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "B_0x0,B_0x1" bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup" group.long 0x54++0x3 line.long 0x0 "TIM16_DTR2,TIM16 timer deadtime register 2" bitfld.long 0x0 17. "DTPE,Deadtime preload enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "DTAE,Deadtime asymmetric enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--7. 1. "DTGF,Dead-time falling edge generator setup" group.long 0x5C++0xB line.long 0x0 "TIM16_TISEL,TIM16 input selection register" hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[0..15] input" line.long 0x4 "TIM16_AF1,TIM16 alternate function register 1" bitfld.long 0x4 13. "BKCMP4P,tim_brk_cmp4 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 12. "BKCMP3P,tim_brk_cmp3 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 11. "BKCMP2P,tim_brk_cmp2 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "BKCMP1P,tim_brk_cmp1 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "BKINP,TIMx_BKIN input polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 8. "BKCMP8E,tim_brk_cmp8 enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "BKCMP7E,tim_brk_cmp7 enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "BKCMP6E,tim_brk_cmp6 enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "BKCMP5E,tim_brk_cmp5 enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "BKCMP4E,tim_brk_cmp4 enable" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "BKCMP3E,tim_brk_cmp3 enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "BKCMP2E,tim_brk_cmp2 enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "BKCMP1E,tim_brk_cmp1 enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "BKINE,TIMx_BKIN input enable" "B_0x0,B_0x1" line.long 0x8 "TIM16_AF2,TIM16 alternate function register 2" bitfld.long 0x8 16.--18. "OCRSEL,tim_ocref_clr source selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" group.long 0x3DC++0x7 line.long 0x0 "TIM16_DCR,TIM16 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM16_DMAR,TIM16/TIM17 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM16_HWCFGR2,TIM16 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM16_HWCFGR1,TIM16 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM16_VERR,TIM16 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM16_IPIDR,TIM16 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM16_SIDR,TIM16 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM17" base ad:0x40270000 group.word 0x0++0x1 line.word 0x0 "TIM16_CR1,TIM16 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One pulse mode" "B_0x0,B_0x1" newline bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0x4++0x1 line.word 0x0 "TIM16_CR2,TIM16 control register 2" bitfld.word 0x0 9. "OIS1N,Output Idle state 1 (tim_oc1n output)" "B_0x0,B_0x1" bitfld.word 0x0 8. "OIS1,Output Idle state 1 (tim_oc1 output)" "B_0x0,B_0x1" bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "B_0x0,B_0x1" bitfld.word 0x0 2. "CCUS,Capture/compare control update selection" "B_0x0,B_0x1" bitfld.word 0x0 0. "CCPC,Capture/compare preloaded control" "B_0x0,B_0x1" group.word 0xC++0x1 line.word 0x0 "TIM16_DIER,TIM16 DMA/interrupt enable register" bitfld.word 0x0 13. "COMDE,COM DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 7. "BIE,Break interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMIE,COM interrupt enable" "B_0x0,B_0x1" newline bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM16_SR,TIM16 status register" bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.word 0x0 7. "BIF,Break interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMIF,COM interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM16_EGR,TIM16 event generation register" bitfld.word 0x0 7. "BG,Break generation" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM16_CCMR1_Intput,TIM16 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.long 0x18++0x3 line.long 0x0 "TIM16_CCMR1_Output,TIM16 capture/compare mode register 1 [alternate]" bitfld.long 0x0 16. "OC1M2,Output Compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 7. "OC1CE,Output Compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output Compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "B_0x0,B_0x1" newline bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.word 0x20++0x1 line.word 0x0 "TIM16_CCER,TIM16 capture/compare enable register" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "B_0x0,B_0x1" bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM16_CNT,TIM16 counter" rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM16_PSC,TIM16 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM16_ARR,TIM16 auto-reload register" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.word 0x30++0x1 line.word 0x0 "TIM16_RCR,TIM16 repetition counter register" hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter reload value" group.long 0x34++0x3 line.long 0x0 "TIM16_CCR1,TIM16 capture/compare register 1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/Compare 1 value" group.long 0x44++0x3 line.long 0x0 "TIM16_BDTR,TIM16 break and dead-time register" bitfld.long 0x0 28. "BKBID,Break Bidirectional" "B_0x0,B_0x1" bitfld.long 0x0 26. "BKDSRM,Break Disarm" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter" bitfld.long 0x0 15. "MOE,Main output enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "AOE,Automatic output enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BKP,Break polarity" "B_0x0,B_0x1" bitfld.long 0x0 12. "BKE,Break enable" "B_0x0,?" bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "B_0x0,B_0x1" bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup" group.long 0x54++0x3 line.long 0x0 "TIM16_DTR2,TIM16 timer deadtime register 2" bitfld.long 0x0 17. "DTPE,Deadtime preload enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "DTAE,Deadtime asymmetric enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--7. 1. "DTGF,Dead-time falling edge generator setup" group.long 0x5C++0xB line.long 0x0 "TIM16_TISEL,TIM16 input selection register" hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[0..15] input" line.long 0x4 "TIM16_AF1,TIM16 alternate function register 1" bitfld.long 0x4 13. "BKCMP4P,tim_brk_cmp4 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 12. "BKCMP3P,tim_brk_cmp3 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 11. "BKCMP2P,tim_brk_cmp2 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "BKCMP1P,tim_brk_cmp1 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "BKINP,TIMx_BKIN input polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 8. "BKCMP8E,tim_brk_cmp8 enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "BKCMP7E,tim_brk_cmp7 enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "BKCMP6E,tim_brk_cmp6 enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "BKCMP5E,tim_brk_cmp5 enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "BKCMP4E,tim_brk_cmp4 enable" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "BKCMP3E,tim_brk_cmp3 enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "BKCMP2E,tim_brk_cmp2 enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "BKCMP1E,tim_brk_cmp1 enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "BKINE,TIMx_BKIN input enable" "B_0x0,B_0x1" line.long 0x8 "TIM16_AF2,TIM16 alternate function register 2" bitfld.long 0x8 16.--18. "OCRSEL,tim_ocref_clr source selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" group.long 0x3DC++0x7 line.long 0x0 "TIM16_DCR,TIM16 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM16_DMAR,TIM16/TIM17 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM16_HWCFGR2,TIM16 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM16_HWCFGR1,TIM16 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM16_VERR,TIM16 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM16_IPIDR,TIM16 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM16_SIDR,TIM16 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM17_S" base ad:0x50270000 group.word 0x0++0x1 line.word 0x0 "TIM16_CR1,TIM16 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,?" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One pulse mode" "B_0x0,B_0x1" newline bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.word 0x4++0x1 line.word 0x0 "TIM16_CR2,TIM16 control register 2" bitfld.word 0x0 9. "OIS1N,Output Idle state 1 (tim_oc1n output)" "B_0x0,B_0x1" bitfld.word 0x0 8. "OIS1,Output Idle state 1 (tim_oc1 output)" "B_0x0,B_0x1" bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "B_0x0,B_0x1" bitfld.word 0x0 2. "CCUS,Capture/compare control update selection" "B_0x0,B_0x1" bitfld.word 0x0 0. "CCPC,Capture/compare preloaded control" "B_0x0,B_0x1" group.word 0xC++0x1 line.word 0x0 "TIM16_DIER,TIM16 DMA/interrupt enable register" bitfld.word 0x0 13. "COMDE,COM DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.word 0x0 7. "BIE,Break interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMIE,COM interrupt enable" "B_0x0,B_0x1" newline bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" group.word 0x10++0x1 line.word 0x0 "TIM16_SR,TIM16 status register" bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.word 0x0 7. "BIF,Break interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMIF,COM interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.word 0x0 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM16_EGR,TIM16 event generation register" bitfld.word 0x0 7. "BG,Break generation" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM16_CCMR1_Intput,TIM16 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.long 0x18++0x3 line.long 0x0 "TIM16_CCMR1_Output,TIM16 capture/compare mode register 1 [alternate]" bitfld.long 0x0 16. "OC1M2,Output Compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 7. "OC1CE,Output Compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output Compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "B_0x0,B_0x1" newline bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "B_0x0,B_0x1,?,?" group.word 0x20++0x1 line.word 0x0 "TIM16_CCER,TIM16 capture/compare enable register" bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "B_0x0,B_0x1" bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "B_0x0,B_0x1" bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "B_0x0,B_0x1" bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "B_0x0,B_0x1" group.long 0x24++0x3 line.long 0x0 "TIM16_CNT,TIM16 counter" rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1" hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM16_PSC,TIM16 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM16_ARR,TIM16 auto-reload register" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.word 0x30++0x1 line.word 0x0 "TIM16_RCR,TIM16 repetition counter register" hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter reload value" group.long 0x34++0x3 line.long 0x0 "TIM16_CCR1,TIM16 capture/compare register 1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/Compare 1 value" group.long 0x44++0x3 line.long 0x0 "TIM16_BDTR,TIM16 break and dead-time register" bitfld.long 0x0 28. "BKBID,Break Bidirectional" "B_0x0,B_0x1" bitfld.long 0x0 26. "BKDSRM,Break Disarm" "B_0x0,B_0x1" hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter" bitfld.long 0x0 15. "MOE,Main output enable" "B_0x0,B_0x1" bitfld.long 0x0 14. "AOE,Automatic output enable" "B_0x0,B_0x1" newline bitfld.long 0x0 13. "BKP,Break polarity" "B_0x0,B_0x1" bitfld.long 0x0 12. "BKE,Break enable" "B_0x0,?" bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "B_0x0,B_0x1" bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "B_0x0,B_0x1" bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup" group.long 0x54++0x3 line.long 0x0 "TIM16_DTR2,TIM16 timer deadtime register 2" bitfld.long 0x0 17. "DTPE,Deadtime preload enable" "B_0x0,B_0x1" bitfld.long 0x0 16. "DTAE,Deadtime asymmetric enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--7. 1. "DTGF,Dead-time falling edge generator setup" group.long 0x5C++0xB line.long 0x0 "TIM16_TISEL,TIM16 input selection register" hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[0..15] input" line.long 0x4 "TIM16_AF1,TIM16 alternate function register 1" bitfld.long 0x4 13. "BKCMP4P,tim_brk_cmp4 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 12. "BKCMP3P,tim_brk_cmp3 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 11. "BKCMP2P,tim_brk_cmp2 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 10. "BKCMP1P,tim_brk_cmp1 input polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "BKINP,TIMx_BKIN input polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 8. "BKCMP8E,tim_brk_cmp8 enable" "B_0x0,B_0x1" bitfld.long 0x4 7. "BKCMP7E,tim_brk_cmp7 enable" "B_0x0,B_0x1" bitfld.long 0x4 6. "BKCMP6E,tim_brk_cmp6 enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "BKCMP5E,tim_brk_cmp5 enable" "B_0x0,B_0x1" bitfld.long 0x4 4. "BKCMP4E,tim_brk_cmp4 enable" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "BKCMP3E,tim_brk_cmp3 enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "BKCMP2E,tim_brk_cmp2 enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "BKCMP1E,tim_brk_cmp1 enable" "B_0x0,B_0x1" bitfld.long 0x4 0. "BKINE,TIMx_BKIN input enable" "B_0x0,B_0x1" line.long 0x8 "TIM16_AF2,TIM16 alternate function register 2" bitfld.long 0x8 16.--18. "OCRSEL,tim_ocref_clr source selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" group.long 0x3DC++0x7 line.long 0x0 "TIM16_DCR,TIM16 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM16_DMAR,TIM16/TIM17 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM16_HWCFGR2,TIM16 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM16_HWCFGR1,TIM16 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM16_VERR,TIM16 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM16_IPIDR,TIM16 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM16_SIDR,TIM16 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM20" base ad:0x40320000 group.word 0x0++0x1 line.word 0x0 "TIM1_CR1,TIM1 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.word 0x0 4. "DIR,Direction" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One pulse mode" "B_0x0,B_0x1" bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.long 0x4++0xF line.long 0x0 "TIM1_CR2,TIM1 control register 2" bitfld.long 0x0 25. "MMS_2,MMS_2" "0,1" hexmask.long.byte 0x0 20.--23. 1. "MMS2,MMS2" bitfld.long 0x0 18. "OIS6,OIS6" "0,1" bitfld.long 0x0 16. "OIS5,OIS5" "0,1" bitfld.long 0x0 15. "OIS4N,OIS4N" "0,1" newline bitfld.long 0x0 14. "OIS4,OIS4" "0,1" bitfld.long 0x0 13. "OIS3N,OIS3N" "0,1" bitfld.long 0x0 12. "OIS3,OIS3" "0,1" bitfld.long 0x0 11. "OIS2N,OIS2N" "0,1" bitfld.long 0x0 10. "OIS2,OIS2" "0,1" newline bitfld.long 0x0 9. "OIS1N,OIS1N" "0,1" bitfld.long 0x0 8. "OIS1,OIS1" "0,1" bitfld.long 0x0 7. "TI1S,TI1S" "0,1" bitfld.long 0x0 4.--6. "MMS_1,MMS_1" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "CCDS,CCDS" "0,1" newline bitfld.long 0x0 2. "CCUS,CCUS" "0,1" bitfld.long 0x0 0. "CCPC,CCPC" "0,1" line.long 0x4 "TIM1_SMCR,TIM1 slave mode control register" bitfld.long 0x4 25. "SMSPS,SMS preload source" "B_0x0,B_0x1" bitfld.long 0x4 24. "SMSPE,SMS preload enable" "B_0x0,B_0x1" bitfld.long 0x4 20.--21. "TS2,Trigger selection - bit 4:3" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16. "SMS2,Slave mode selection" "B_0x0,B_0x1" bitfld.long 0x4 15. "ETP,External trigger polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 14. "ECE,External clock enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter" bitfld.long 0x4 7. "MSM,Master/slave mode" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "TS1,Trigger selection - bit 4:3" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 0.--2. "SMS1,Slave mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "TIM1_DIER,TIM1 DMA/interrupt enable register" bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "COMDE,COM DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 12. "CC4DE,Capture/compare 4 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 11. "CC3DE,Capture/compare 3 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CC2DE,Capture/compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "CC1DE,Capture/compare 1 DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "BIE,Break interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 5. "COMIE,COM interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "CC4IE,Capture/compare 4 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CC3IE,Capture/compare 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 2. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 1. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" line.long 0xC "TIM1_SR,TIM1 status register" bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 20. "IDXF,Index interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 17. "CC6IF,Compare 6 interrupt flag" "0,1" newline bitfld.long 0xC 16. "CC5IF,Compare 5 interrupt flag" "0,1" bitfld.long 0xC 13. "SBIF,System break interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 12. "CC4OF,Capture/compare 4 overcapture flag" "0,1" bitfld.long 0xC 11. "CC3OF,Capture/compare 3 overcapture flag" "0,1" bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1" newline bitfld.long 0xC 9. "CC1OF,Capture/compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.long 0xC 8. "B2IF,Break 2 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 7. "BIF,Break interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 5. "COMIF,COM interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0xC 4. "CC4IF,Capture/compare 4 interrupt flag" "0,1" bitfld.long 0xC 3. "CC3IF,Capture/compare 3 interrupt flag" "0,1" bitfld.long 0xC 2. "CC2IF,Capture/compare 2 interrupt flag" "0,1" bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM1_EGR,TIM1 event generation register" bitfld.word 0x0 8. "B2G,Break 2 generation" "B_0x0,B_0x1" bitfld.word 0x0 7. "BG,Break generation" "B_0x0,B_0x1" bitfld.word 0x0 6. "TG,Trigger generation" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMG,Capture/compare control update generation" "B_0x0,B_0x1" bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1" newline bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1" bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM1_CCMR1_Input,TIM1 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 Selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x18++0x7 line.long 0x0 "TIM1_CCMR1_Output,TIM1 capture/compare mode register 1 [alternate]" bitfld.long 0x0 24. "OC2M2,Output compare 2 mode" "0,1" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2M1,Output compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1" newline bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM1_CCMR2_Input,TIM1 capture/compare mode register 2 [alternate]" hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x4 8.--9. "CC4S,Capture/compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" newline bitfld.long 0x4 0.--1. "CC3S,Capture/compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x1C++0xB line.long 0x0 "TIM1_CCMR2_Output,TIM1 capture/compare mode register 2 [alternate]" bitfld.long 0x0 24. "OC4M2,Output compare 4 mode" "0,1" bitfld.long 0x0 16. "OC3M2,Output compare 3 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC4M1,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1" newline bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC4S,Capture/compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC3M1,Output compare 3 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1" newline bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1" bitfld.long 0x0 0.--1. "CC3S,Capture/compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM1_CCER,TIM1 capture/compare enable register" bitfld.long 0x4 21. "CC6P,Capture/compare 6 output polarity" "0,1" bitfld.long 0x4 20. "CC6E,Capture/compare 6 output enable" "0,1" bitfld.long 0x4 17. "CC5P,Capture/compare 5 output polarity" "0,1" bitfld.long 0x4 16. "CC5E,Capture/compare 5 output enable" "0,1" bitfld.long 0x4 15. "CC4NP,Capture/compare 4 complementary output polarity" "0,1" newline bitfld.long 0x4 14. "CC4NE,Capture/compare 4 complementary output enable" "0,1" bitfld.long 0x4 13. "CC4P,Capture/compare 4 output polarity" "0,1" bitfld.long 0x4 12. "CC4E,Capture/compare 4 output enable" "0,1" bitfld.long 0x4 11. "CC3NP,Capture/compare 3 complementary output polarity" "0,1" bitfld.long 0x4 10. "CC3NE,Capture/compare 3 complementary output enable" "0,1" newline bitfld.long 0x4 9. "CC3P,Capture/compare 3 output polarity" "0,1" bitfld.long 0x4 8. "CC3E,Capture/compare 3 output enable" "0,1" bitfld.long 0x4 7. "CC2NP,Capture/compare 2 complementary output polarity" "0,1" bitfld.long 0x4 6. "CC2NE,Capture/compare 2 complementary output enable" "0,1" bitfld.long 0x4 5. "CC2P,Capture/compare 2 output polarity" "0,1" newline bitfld.long 0x4 4. "CC2E,Capture/compare 2 output enable" "0,1" bitfld.long 0x4 3. "CC1NP,Capture/compare 1 complementary output polarity" "B_0x0,B_0x1" bitfld.long 0x4 2. "CC1NE,Capture/compare 1 complementary output enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CC1P,Capture/compare 1 output polarity" "B_0x0,B_0x1" bitfld.long 0x4 0. "CC1E,Capture/compare 1 output enable" "B_0x0,B_0x1" line.long 0x8 "TIM1_CNT,TIM1 counter" rbitfld.long 0x8 31. "UIFCPY,UIF copy" "0,1" hexmask.long.word 0x8 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM1_PSC,TIM1 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM1_ARR,TIM1 auto-reload register" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.word 0x30++0x1 line.word 0x0 "TIM1_RCR,TIM1 repetition counter register" hexmask.word 0x0 0.--15. 1. "REP,Repetition counter reload value" group.long 0x34++0x33 line.long 0x0 "TIM1_CCR1,TIM1 capture/compare register 1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value" line.long 0x4 "TIM1_CCR2,TIM1 capture/compare register 2" hexmask.long.tbyte 0x4 0.--19. 1. "CCR2,Capture/compare 2 value" line.long 0x8 "TIM1_CCR3,TIM1 capture/compare register 3" hexmask.long.tbyte 0x8 0.--19. 1. "CCR3,Capture/compare value" line.long 0xC "TIM1_CCR4,TIM1 capture/compare register 4" hexmask.long.tbyte 0xC 0.--19. 1. "CCR4,Capture/compare value" line.long 0x10 "TIM1_BDTR,TIM1 break and dead-time register" bitfld.long 0x10 29. "BK2BID,Break2 bidirectional" "0,1" bitfld.long 0x10 28. "BKBID,Break bidirectional" "B_0x0,B_0x1" bitfld.long 0x10 27. "BK2DSRM,Break2 disarm" "0,1" bitfld.long 0x10 26. "BKDSRM,Break disarm" "B_0x0,B_0x1" bitfld.long 0x10 25. "BK2P,Break 2 polarity" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "BK2E,Break 2 enable" "B_0x0,B_0x1" hexmask.long.byte 0x10 20.--23. 1. "BK2F,Break 2 filter" hexmask.long.byte 0x10 16.--19. 1. "BKF,Break filter" bitfld.long 0x10 15. "MOE,Main output enable" "B_0x0,B_0x1" bitfld.long 0x10 14. "AOE,Automatic output enable" "B_0x0,B_0x1" newline bitfld.long 0x10 13. "BKP,Break polarity" "B_0x0,B_0x1" bitfld.long 0x10 12. "BKE,Break enable" "B_0x0,B_0x1" bitfld.long 0x10 11. "OSSR,Off-state selection for Run mode" "B_0x0,B_0x1" bitfld.long 0x10 10. "OSSI,Off-state selection for idle mode" "B_0x0,B_0x1" bitfld.long 0x10 8.--9. "LOCK,Lock configuration" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x10 0.--7. 1. "DTG,Dead-time generator setup" line.long 0x14 "TIM1_CCR5,TIM1 capture/compare register 5" bitfld.long 0x14 31. "GC5C3,Group channel 5 and channel 3" "B_0x0,B_0x1" bitfld.long 0x14 30. "GC5C2,Group channel 5 and channel 2" "B_0x0,B_0x1" bitfld.long 0x14 29. "GC5C1,Group channel 5 and channel 1" "B_0x0,B_0x1" hexmask.long.tbyte 0x14 0.--19. 1. "CCR5,Capture/compare 5 value" line.long 0x18 "TIM1_CCR6,TIM1 capture/compare register 6" hexmask.long.tbyte 0x18 0.--19. 1. "CCR6,Capture/compare 6 value" line.long 0x1C "TIM1_CCMR3,TIM1 capture/compare mode register 3" bitfld.long 0x1C 24. "OC6M2,Output compare 6 mode" "0,1" bitfld.long 0x1C 16. "OC5M2,Output compare 5 mode" "0,1" bitfld.long 0x1C 15. "OC6CE,Output compare 6 clear enable" "0,1" bitfld.long 0x1C 12.--14. "OC6M1,Output compare 6 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 11. "OC6PE,Output compare 6 preload enable" "0,1" newline bitfld.long 0x1C 10. "OC6FE,Output compare 6 fast enable" "0,1" bitfld.long 0x1C 7. "OC5CE,Output compare 5 clear enable" "0,1" bitfld.long 0x1C 4.--6. "OC5M1,Output compare 5 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 3. "OC5PE,Output compare 5 preload enable" "0,1" bitfld.long 0x1C 2. "OC5FE,Output compare 5 fast enable" "0,1" line.long 0x20 "TIM1_DTR2,TIM1 timer deadtime register 2" bitfld.long 0x20 17. "DTPE,Deadtime preload enable" "B_0x0,B_0x1" bitfld.long 0x20 16. "DTAE,Deadtime asymmetric enable" "B_0x0,B_0x1" hexmask.long.byte 0x20 0.--7. 1. "DTGF,Dead-time falling edge generator setup" line.long 0x24 "TIM1_ECR,TIM1 timer encoder control register" bitfld.long 0x24 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x24 16.--23. 1. "PW,Pulse width" bitfld.long 0x24 6.--7. "IPOS,Index positioning" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x24 5. "FIDX,First index" "B_0x0,B_0x1" bitfld.long 0x24 3.--4. "IBLK,Index blanking" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x24 1.--2. "IDIR,Index direction" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x24 0. "IE,Index enable" "B_0x0,B_0x1" line.long 0x28 "TIM1_TISEL,TIM1 timer input selection register" hexmask.long.byte 0x28 24.--27. 1. "TI4SEL,Selects tim_ti4[0..15] input" hexmask.long.byte 0x28 16.--19. 1. "TI3SEL,Selects tim_ti3[0..15] input" hexmask.long.byte 0x28 8.--11. 1. "TI2SEL,Selects tim_ti2[0..15] input" hexmask.long.byte 0x28 0.--3. 1. "TI1SEL,Selects tim_ti1[0..15] input" line.long 0x2C "TIM1_AF1,TIM1 alternate function option register 1" hexmask.long.byte 0x2C 14.--17. 1. "ETRSEL,etr_in source selection" bitfld.long 0x2C 13. "BKCMP4P,tim_brk_cmp4 input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 12. "BKCMP3P,tim_brk_cmp3 input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 11. "BKCMP2P,tim_brk_cmp2 input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 10. "BKCMP1P,tim_brk_cmp1 input polarity" "B_0x0,B_0x1" newline bitfld.long 0x2C 9. "BKINP,TIMx_BKIN input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 8. "BKCMP8E,tim_brk_cmp8 enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "BKCMP7E,tim_brk_cmp7 enable" "B_0x0,B_0x1" bitfld.long 0x2C 6. "BKCMP6E,tim_brk_cmp6 enable" "B_0x0,B_0x1" bitfld.long 0x2C 5. "BKCMP5E,tim_brk_cmp5 enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 4. "BKCMP4E,tim_brk_cmp4 enable" "B_0x0,B_0x1" bitfld.long 0x2C 3. "BKCMP3E,tim_brk_cmp3 enable" "B_0x0,B_0x1" bitfld.long 0x2C 2. "BKCMP2E,tim_brk_cmp2 enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "BKCMP1E,tim_brk_cmp1 enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "BKINE,TIMx_BKIN input enable" "B_0x0,B_0x1" line.long 0x30 "TIM1_AF2,TIM1 alternate function register 2" bitfld.long 0x30 16.--18. "OCRSEL,ocref_clr source selection" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" bitfld.long 0x30 13. "BK2CMP4P,tim_brk2_cmp4 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 12. "BK2CMP3P,tim_brk2_cmp3 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 11. "BK2CMP2P,tim_brk2_cmp2 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 10. "BK2CMP1P,tim_brk2_cmp1 input polarity" "B_0x0,B_0x1" newline bitfld.long 0x30 9. "BK2INP,TIMx_BKIN2 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 8. "BK2CMP8E,tim_brk2_cmp8 enable" "B_0x0,B_0x1" bitfld.long 0x30 7. "BK2CMP7E,tim_brk2_cmp7 enable" "B_0x0,B_0x1" bitfld.long 0x30 6. "BK2CMP6E,tim_brk2_cmp6 enable" "B_0x0,B_0x1" bitfld.long 0x30 5. "BK2CMP5E,tim_brk2_cmp5 enable" "B_0x0,B_0x1" newline bitfld.long 0x30 4. "BK2CMP4E,tim_brk2_cmp4 enable" "B_0x0,B_0x1" bitfld.long 0x30 3. "BK2CMP3E,tim_brk2_cmp3 enable" "B_0x0,B_0x1" bitfld.long 0x30 2. "BK2CMP2E,tim_brk2_cmp2 enable" "B_0x0,B_0x1" bitfld.long 0x30 1. "BK2CMP1E,tim_brk2_cmp1 enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "BK2INE,TIMx_BKIN2 input enable" "B_0x0,B_0x1" group.long 0x3DC++0x7 line.long 0x0 "TIM1_DCR,TIM1 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM1_DMAR,TIM1 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM1_HWCFGR2,TIM1 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM1_HWCFGR1,TIM1 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM1_VERR,TIM1 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM1_IPIDR,TIM1 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM1_SIDR,TIM1 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree "TIM20_S" base ad:0x50320000 group.word 0x0++0x1 line.word 0x0 "TIM1_CR1,TIM1 control register 1" bitfld.word 0x0 12. "DITHEN,Dithering enable" "B_0x0,B_0x1" bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "B_0x0,B_0x1" bitfld.word 0x0 8.--9. "CKD,Clock division" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "B_0x0,B_0x1" bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.word 0x0 4. "DIR,Direction" "B_0x0,B_0x1" bitfld.word 0x0 3. "OPM,One pulse mode" "B_0x0,B_0x1" bitfld.word 0x0 2. "URS,Update request source" "B_0x0,B_0x1" bitfld.word 0x0 1. "UDIS,Update disable" "B_0x0,B_0x1" bitfld.word 0x0 0. "CEN,Counter enable" "B_0x0,B_0x1" group.long 0x4++0xF line.long 0x0 "TIM1_CR2,TIM1 control register 2" bitfld.long 0x0 25. "MMS_2,MMS_2" "0,1" hexmask.long.byte 0x0 20.--23. 1. "MMS2,MMS2" bitfld.long 0x0 18. "OIS6,OIS6" "0,1" bitfld.long 0x0 16. "OIS5,OIS5" "0,1" bitfld.long 0x0 15. "OIS4N,OIS4N" "0,1" newline bitfld.long 0x0 14. "OIS4,OIS4" "0,1" bitfld.long 0x0 13. "OIS3N,OIS3N" "0,1" bitfld.long 0x0 12. "OIS3,OIS3" "0,1" bitfld.long 0x0 11. "OIS2N,OIS2N" "0,1" bitfld.long 0x0 10. "OIS2,OIS2" "0,1" newline bitfld.long 0x0 9. "OIS1N,OIS1N" "0,1" bitfld.long 0x0 8. "OIS1,OIS1" "0,1" bitfld.long 0x0 7. "TI1S,TI1S" "0,1" bitfld.long 0x0 4.--6. "MMS_1,MMS_1" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "CCDS,CCDS" "0,1" newline bitfld.long 0x0 2. "CCUS,CCUS" "0,1" bitfld.long 0x0 0. "CCPC,CCPC" "0,1" line.long 0x4 "TIM1_SMCR,TIM1 slave mode control register" bitfld.long 0x4 25. "SMSPS,SMS preload source" "B_0x0,B_0x1" bitfld.long 0x4 24. "SMSPE,SMS preload enable" "B_0x0,B_0x1" bitfld.long 0x4 20.--21. "TS2,Trigger selection - bit 4:3" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 16. "SMS2,Slave mode selection" "B_0x0,B_0x1" bitfld.long 0x4 15. "ETP,External trigger polarity" "B_0x0,B_0x1" newline bitfld.long 0x4 14. "ECE,External clock enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter" bitfld.long 0x4 7. "MSM,Master/slave mode" "B_0x0,B_0x1" bitfld.long 0x4 4.--6. "TS1,Trigger selection - bit 4:3" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" newline bitfld.long 0x4 0.--2. "SMS1,Slave mode selection" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x8 "TIM1_DIER,TIM1 DMA/interrupt enable register" bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 13. "COMDE,COM DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 12. "CC4DE,Capture/compare 4 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 11. "CC3DE,Capture/compare 3 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CC2DE,Capture/compare 2 DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 9. "CC1DE,Capture/compare 1 DMA request enable" "B_0x0,B_0x1" newline bitfld.long 0x8 8. "UDE,Update DMA request enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "BIE,Break interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 5. "COMIE,COM interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "CC4IE,Capture/compare 4 interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "CC3IE,Capture/compare 3 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 2. "CC2IE,Capture/compare 2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 1. "CC1IE,Capture/compare 1 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "UIE,Update interrupt enable" "B_0x0,B_0x1" line.long 0xC "TIM1_SR,TIM1 status register" bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 20. "IDXF,Index interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 17. "CC6IF,Compare 6 interrupt flag" "0,1" newline bitfld.long 0xC 16. "CC5IF,Compare 5 interrupt flag" "0,1" bitfld.long 0xC 13. "SBIF,System break interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 12. "CC4OF,Capture/compare 4 overcapture flag" "0,1" bitfld.long 0xC 11. "CC3OF,Capture/compare 3 overcapture flag" "0,1" bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1" newline bitfld.long 0xC 9. "CC1OF,Capture/compare 1 overcapture flag" "B_0x0,B_0x1" bitfld.long 0xC 8. "B2IF,Break 2 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 7. "BIF,Break interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 5. "COMIF,COM interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0xC 4. "CC4IF,Capture/compare 4 interrupt flag" "0,1" bitfld.long 0xC 3. "CC3IF,Capture/compare 3 interrupt flag" "0,1" bitfld.long 0xC 2. "CC2IF,Capture/compare 2 interrupt flag" "0,1" bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "B_0x0,B_0x1" bitfld.long 0xC 0. "UIF,Update interrupt flag" "B_0x0,B_0x1" wgroup.word 0x14++0x1 line.word 0x0 "TIM1_EGR,TIM1 event generation register" bitfld.word 0x0 8. "B2G,Break 2 generation" "B_0x0,B_0x1" bitfld.word 0x0 7. "BG,Break generation" "B_0x0,B_0x1" bitfld.word 0x0 6. "TG,Trigger generation" "B_0x0,B_0x1" bitfld.word 0x0 5. "COMG,Capture/compare control update generation" "B_0x0,B_0x1" bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1" newline bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1" bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1" bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "B_0x0,B_0x1" bitfld.word 0x0 0. "UG,Update generation" "B_0x0,B_0x1" group.long 0x18++0x3 line.long 0x0 "TIM1_CCMR1_Input,TIM1 capture/compare mode register 1 [alternate]" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "B_0x0,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 Selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x18++0x7 line.long 0x0 "TIM1_CCMR1_Output,TIM1 capture/compare mode register 1 [alternate]" bitfld.long 0x0 24. "OC2M2,Output compare 2 mode" "0,1" bitfld.long 0x0 16. "OC1M2,Output compare 1 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2M1,Output compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1" newline bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "B_0x0,B_0x1" bitfld.long 0x0 4.--6. "OC1M1,Output compare 1 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "B_0x0,B_0x1" bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM1_CCMR2_Input,TIM1 capture/compare mode register 2 [alternate]" hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x4 8.--9. "CC4S,Capture/compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" newline bitfld.long 0x4 0.--1. "CC3S,Capture/compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" group.long 0x1C++0xB line.long 0x0 "TIM1_CCMR2_Output,TIM1 capture/compare mode register 2 [alternate]" bitfld.long 0x0 24. "OC4M2,Output compare 4 mode" "0,1" bitfld.long 0x0 16. "OC3M2,Output compare 3 mode" "B_0x0,B_0x1" bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC4M1,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1" newline bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC4S,Capture/compare 4 selection" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC3M1,Output compare 3 mode" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1" newline bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1" bitfld.long 0x0 0.--1. "CC3S,Capture/compare 3 selection" "B_0x0,B_0x1,B_0x2,B_0x3" line.long 0x4 "TIM1_CCER,TIM1 capture/compare enable register" bitfld.long 0x4 21. "CC6P,Capture/compare 6 output polarity" "0,1" bitfld.long 0x4 20. "CC6E,Capture/compare 6 output enable" "0,1" bitfld.long 0x4 17. "CC5P,Capture/compare 5 output polarity" "0,1" bitfld.long 0x4 16. "CC5E,Capture/compare 5 output enable" "0,1" bitfld.long 0x4 15. "CC4NP,Capture/compare 4 complementary output polarity" "0,1" newline bitfld.long 0x4 14. "CC4NE,Capture/compare 4 complementary output enable" "0,1" bitfld.long 0x4 13. "CC4P,Capture/compare 4 output polarity" "0,1" bitfld.long 0x4 12. "CC4E,Capture/compare 4 output enable" "0,1" bitfld.long 0x4 11. "CC3NP,Capture/compare 3 complementary output polarity" "0,1" bitfld.long 0x4 10. "CC3NE,Capture/compare 3 complementary output enable" "0,1" newline bitfld.long 0x4 9. "CC3P,Capture/compare 3 output polarity" "0,1" bitfld.long 0x4 8. "CC3E,Capture/compare 3 output enable" "0,1" bitfld.long 0x4 7. "CC2NP,Capture/compare 2 complementary output polarity" "0,1" bitfld.long 0x4 6. "CC2NE,Capture/compare 2 complementary output enable" "0,1" bitfld.long 0x4 5. "CC2P,Capture/compare 2 output polarity" "0,1" newline bitfld.long 0x4 4. "CC2E,Capture/compare 2 output enable" "0,1" bitfld.long 0x4 3. "CC1NP,Capture/compare 1 complementary output polarity" "B_0x0,B_0x1" bitfld.long 0x4 2. "CC1NE,Capture/compare 1 complementary output enable" "B_0x0,B_0x1" bitfld.long 0x4 1. "CC1P,Capture/compare 1 output polarity" "B_0x0,B_0x1" bitfld.long 0x4 0. "CC1E,Capture/compare 1 output enable" "B_0x0,B_0x1" line.long 0x8 "TIM1_CNT,TIM1 counter" rbitfld.long 0x8 31. "UIFCPY,UIF copy" "0,1" hexmask.long.word 0x8 0.--15. 1. "CNT,Counter value" group.word 0x28++0x1 line.word 0x0 "TIM1_PSC,TIM1 prescaler" hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value" group.long 0x2C++0x3 line.long 0x0 "TIM1_ARR,TIM1 auto-reload register" hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value" group.word 0x30++0x1 line.word 0x0 "TIM1_RCR,TIM1 repetition counter register" hexmask.word 0x0 0.--15. 1. "REP,Repetition counter reload value" group.long 0x34++0x33 line.long 0x0 "TIM1_CCR1,TIM1 capture/compare register 1" hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value" line.long 0x4 "TIM1_CCR2,TIM1 capture/compare register 2" hexmask.long.tbyte 0x4 0.--19. 1. "CCR2,Capture/compare 2 value" line.long 0x8 "TIM1_CCR3,TIM1 capture/compare register 3" hexmask.long.tbyte 0x8 0.--19. 1. "CCR3,Capture/compare value" line.long 0xC "TIM1_CCR4,TIM1 capture/compare register 4" hexmask.long.tbyte 0xC 0.--19. 1. "CCR4,Capture/compare value" line.long 0x10 "TIM1_BDTR,TIM1 break and dead-time register" bitfld.long 0x10 29. "BK2BID,Break2 bidirectional" "0,1" bitfld.long 0x10 28. "BKBID,Break bidirectional" "B_0x0,B_0x1" bitfld.long 0x10 27. "BK2DSRM,Break2 disarm" "0,1" bitfld.long 0x10 26. "BKDSRM,Break disarm" "B_0x0,B_0x1" bitfld.long 0x10 25. "BK2P,Break 2 polarity" "B_0x0,B_0x1" newline bitfld.long 0x10 24. "BK2E,Break 2 enable" "B_0x0,B_0x1" hexmask.long.byte 0x10 20.--23. 1. "BK2F,Break 2 filter" hexmask.long.byte 0x10 16.--19. 1. "BKF,Break filter" bitfld.long 0x10 15. "MOE,Main output enable" "B_0x0,B_0x1" bitfld.long 0x10 14. "AOE,Automatic output enable" "B_0x0,B_0x1" newline bitfld.long 0x10 13. "BKP,Break polarity" "B_0x0,B_0x1" bitfld.long 0x10 12. "BKE,Break enable" "B_0x0,B_0x1" bitfld.long 0x10 11. "OSSR,Off-state selection for Run mode" "B_0x0,B_0x1" bitfld.long 0x10 10. "OSSI,Off-state selection for idle mode" "B_0x0,B_0x1" bitfld.long 0x10 8.--9. "LOCK,Lock configuration" "B_0x0,B_0x1,B_0x2,B_0x3" newline hexmask.long.byte 0x10 0.--7. 1. "DTG,Dead-time generator setup" line.long 0x14 "TIM1_CCR5,TIM1 capture/compare register 5" bitfld.long 0x14 31. "GC5C3,Group channel 5 and channel 3" "B_0x0,B_0x1" bitfld.long 0x14 30. "GC5C2,Group channel 5 and channel 2" "B_0x0,B_0x1" bitfld.long 0x14 29. "GC5C1,Group channel 5 and channel 1" "B_0x0,B_0x1" hexmask.long.tbyte 0x14 0.--19. 1. "CCR5,Capture/compare 5 value" line.long 0x18 "TIM1_CCR6,TIM1 capture/compare register 6" hexmask.long.tbyte 0x18 0.--19. 1. "CCR6,Capture/compare 6 value" line.long 0x1C "TIM1_CCMR3,TIM1 capture/compare mode register 3" bitfld.long 0x1C 24. "OC6M2,Output compare 6 mode" "0,1" bitfld.long 0x1C 16. "OC5M2,Output compare 5 mode" "0,1" bitfld.long 0x1C 15. "OC6CE,Output compare 6 clear enable" "0,1" bitfld.long 0x1C 12.--14. "OC6M1,Output compare 6 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 11. "OC6PE,Output compare 6 preload enable" "0,1" newline bitfld.long 0x1C 10. "OC6FE,Output compare 6 fast enable" "0,1" bitfld.long 0x1C 7. "OC5CE,Output compare 5 clear enable" "0,1" bitfld.long 0x1C 4.--6. "OC5M1,Output compare 5 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 3. "OC5PE,Output compare 5 preload enable" "0,1" bitfld.long 0x1C 2. "OC5FE,Output compare 5 fast enable" "0,1" line.long 0x20 "TIM1_DTR2,TIM1 timer deadtime register 2" bitfld.long 0x20 17. "DTPE,Deadtime preload enable" "B_0x0,B_0x1" bitfld.long 0x20 16. "DTAE,Deadtime asymmetric enable" "B_0x0,B_0x1" hexmask.long.byte 0x20 0.--7. 1. "DTGF,Dead-time falling edge generator setup" line.long 0x24 "TIM1_ECR,TIM1 timer encoder control register" bitfld.long 0x24 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x24 16.--23. 1. "PW,Pulse width" bitfld.long 0x24 6.--7. "IPOS,Index positioning" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x24 5. "FIDX,First index" "B_0x0,B_0x1" bitfld.long 0x24 3.--4. "IBLK,Index blanking" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x24 1.--2. "IDIR,Index direction" "B_0x0,B_0x1,B_0x2,?" bitfld.long 0x24 0. "IE,Index enable" "B_0x0,B_0x1" line.long 0x28 "TIM1_TISEL,TIM1 timer input selection register" hexmask.long.byte 0x28 24.--27. 1. "TI4SEL,Selects tim_ti4[0..15] input" hexmask.long.byte 0x28 16.--19. 1. "TI3SEL,Selects tim_ti3[0..15] input" hexmask.long.byte 0x28 8.--11. 1. "TI2SEL,Selects tim_ti2[0..15] input" hexmask.long.byte 0x28 0.--3. 1. "TI1SEL,Selects tim_ti1[0..15] input" line.long 0x2C "TIM1_AF1,TIM1 alternate function option register 1" hexmask.long.byte 0x2C 14.--17. 1. "ETRSEL,etr_in source selection" bitfld.long 0x2C 13. "BKCMP4P,tim_brk_cmp4 input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 12. "BKCMP3P,tim_brk_cmp3 input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 11. "BKCMP2P,tim_brk_cmp2 input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 10. "BKCMP1P,tim_brk_cmp1 input polarity" "B_0x0,B_0x1" newline bitfld.long 0x2C 9. "BKINP,TIMx_BKIN input polarity" "B_0x0,B_0x1" bitfld.long 0x2C 8. "BKCMP8E,tim_brk_cmp8 enable" "B_0x0,B_0x1" bitfld.long 0x2C 7. "BKCMP7E,tim_brk_cmp7 enable" "B_0x0,B_0x1" bitfld.long 0x2C 6. "BKCMP6E,tim_brk_cmp6 enable" "B_0x0,B_0x1" bitfld.long 0x2C 5. "BKCMP5E,tim_brk_cmp5 enable" "B_0x0,B_0x1" newline bitfld.long 0x2C 4. "BKCMP4E,tim_brk_cmp4 enable" "B_0x0,B_0x1" bitfld.long 0x2C 3. "BKCMP3E,tim_brk_cmp3 enable" "B_0x0,B_0x1" bitfld.long 0x2C 2. "BKCMP2E,tim_brk_cmp2 enable" "B_0x0,B_0x1" bitfld.long 0x2C 1. "BKCMP1E,tim_brk_cmp1 enable" "B_0x0,B_0x1" bitfld.long 0x2C 0. "BKINE,TIMx_BKIN input enable" "B_0x0,B_0x1" line.long 0x30 "TIM1_AF2,TIM1 alternate function register 2" bitfld.long 0x30 16.--18. "OCRSEL,ocref_clr source selection" "B_0x0,B_0x1,?,?,?,?,?,B_0x7" bitfld.long 0x30 13. "BK2CMP4P,tim_brk2_cmp4 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 12. "BK2CMP3P,tim_brk2_cmp3 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 11. "BK2CMP2P,tim_brk2_cmp2 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 10. "BK2CMP1P,tim_brk2_cmp1 input polarity" "B_0x0,B_0x1" newline bitfld.long 0x30 9. "BK2INP,TIMx_BKIN2 input polarity" "B_0x0,B_0x1" bitfld.long 0x30 8. "BK2CMP8E,tim_brk2_cmp8 enable" "B_0x0,B_0x1" bitfld.long 0x30 7. "BK2CMP7E,tim_brk2_cmp7 enable" "B_0x0,B_0x1" bitfld.long 0x30 6. "BK2CMP6E,tim_brk2_cmp6 enable" "B_0x0,B_0x1" bitfld.long 0x30 5. "BK2CMP5E,tim_brk2_cmp5 enable" "B_0x0,B_0x1" newline bitfld.long 0x30 4. "BK2CMP4E,tim_brk2_cmp4 enable" "B_0x0,B_0x1" bitfld.long 0x30 3. "BK2CMP3E,tim_brk2_cmp3 enable" "B_0x0,B_0x1" bitfld.long 0x30 2. "BK2CMP2E,tim_brk2_cmp2 enable" "B_0x0,B_0x1" bitfld.long 0x30 1. "BK2CMP1E,tim_brk2_cmp1 enable" "B_0x0,B_0x1" bitfld.long 0x30 0. "BK2INE,TIMx_BKIN2 input enable" "B_0x0,B_0x1" group.long 0x3DC++0x7 line.long 0x0 "TIM1_DCR,TIM1 DMA control register" hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection" hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address" line.long 0x4 "TIM1_DMAR,TIM1 DMA address for full transfer" hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses" rgroup.long 0x3EC++0x13 line.long 0x0 "TIM1_HWCFGR2,TIM1 hardware configuration 2 register" hexmask.long.byte 0x0 16.--23. 1. "OPTIONREG_OUT,Option register number (0 to 16)." hexmask.long.byte 0x0 8.--15. 1. "CNT_WIDTH,Counter width" hexmask.long.byte 0x0 4.--7. 1. "PSC_WIDTH16,Prescaler width" hexmask.long.byte 0x0 0.--3. 1. "PSC_LINEAR,Prescaler linear" line.long 0x4 "TIM1_HWCFGR1,TIM1 hardware configuration 1 register" hexmask.long.byte 0x4 28.--31. 1. "CNT_DIR,Counter direction" hexmask.long.byte 0x4 24.--27. 1. "DMA_IMPL,DMA features implementation" hexmask.long.byte 0x4 20.--23. 1. "BK_IMPL,Break circuit implementation" hexmask.long.byte 0x4 16.--19. 1. "ETR_IMPL,External trigger implementation" hexmask.long.byte 0x4 12.--15. 1. "RCR_IMPL,Repetition counter implementation" newline hexmask.long.byte 0x4 8.--11. 1. "NB_OF_SM,Number of synchronization module" hexmask.long.byte 0x4 4.--7. 1. "NB_OF_DT,Number of complementary outputs and dead-time generators" hexmask.long.byte 0x4 0.--3. 1. "NB_OF_CC,Number of capture / compare channel" line.long 0x8 "TIM1_VERR,TIM1 IP version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,Major revision number." hexmask.long.byte 0x8 0.--3. 1. "MINREV,Minor revision number." line.long 0xC "TIM1_IPIDR,TIM1 IP identification register" hexmask.long 0xC 0.--31. 1. "ID,IP identification code." line.long 0x10 "TIM1_SIDR,TIM1 size ID register" hexmask.long 0x10 0.--31. 1. "SID,Fixed code." tree.end tree.end tree "USART (Universal Synchronous Asynchronous Receiver Transmitter)" base ad:0x0 tree "UART4" base ad:0x40100000 group.long 0x0++0x3 line.long 0x0 "USART1_CR1,USART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" newline bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "USART1_CR1_ALTERNATE1,USART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" line.long 0x4 "USART1_CR2,USART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" bitfld.long 0x4 14. "LINEN,LIN mode enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "STOP,stop bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 11. "CLKEN,Clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "CPHA,Clock phase" "B_0x0,B_0x1" bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "B_0x0,B_0x1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "LBDL,LIN break detection length" "B_0x0,B_0x1" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "B_0x0,B_0x1" bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "B_0x0,B_0x1" line.long 0x8 "USART1_CR3,USART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "USART1_CR3_ALTERNATE1,USART control register 3" bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x0 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "USART1_BRR,USART baud rate register" hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate" line.long 0x8 "USART1_GTPR,USART guard time and prescaler register" hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value" hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value" line.long 0xC "USART1_RTOR,USART receiver timeout register" hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "USART1_RQR,USART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR,USART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" newline bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR_ALTERNATE1,USART interrupt and status register" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "USART1_ICR,USART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1" bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1" bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "USART1_RDR,USART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "USART1_TDR,USART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "USART1_PRESC,USART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "USART1_AUTOCR,USART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "USART1_HWCFGR2,USART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,USART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x4 "USART1_HWCFGR1,USART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,USART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,USART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,USART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,USART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,USART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,USART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x8 "USART1_VERR,USART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,USART major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,USART minor revision" line.long 0xC "USART1_IPIDR,USART identification register" hexmask.long 0xC 0.--31. 1. "ID,USART identifier" line.long 0x10 "USART1_SIDR,USART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end tree "UART4_S" base ad:0x50100000 group.long 0x0++0x3 line.long 0x0 "USART1_CR1,USART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" newline bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "USART1_CR1_ALTERNATE1,USART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" line.long 0x4 "USART1_CR2,USART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" bitfld.long 0x4 14. "LINEN,LIN mode enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "STOP,stop bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 11. "CLKEN,Clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "CPHA,Clock phase" "B_0x0,B_0x1" bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "B_0x0,B_0x1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "LBDL,LIN break detection length" "B_0x0,B_0x1" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "B_0x0,B_0x1" bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "B_0x0,B_0x1" line.long 0x8 "USART1_CR3,USART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "USART1_CR3_ALTERNATE1,USART control register 3" bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x0 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "USART1_BRR,USART baud rate register" hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate" line.long 0x8 "USART1_GTPR,USART guard time and prescaler register" hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value" hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value" line.long 0xC "USART1_RTOR,USART receiver timeout register" hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "USART1_RQR,USART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR,USART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" newline bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR_ALTERNATE1,USART interrupt and status register" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "USART1_ICR,USART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1" bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1" bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "USART1_RDR,USART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "USART1_TDR,USART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "USART1_PRESC,USART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "USART1_AUTOCR,USART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "USART1_HWCFGR2,USART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,USART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x4 "USART1_HWCFGR1,USART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,USART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,USART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,USART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,USART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,USART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,USART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x8 "USART1_VERR,USART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,USART major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,USART minor revision" line.long 0xC "USART1_IPIDR,USART identification register" hexmask.long 0xC 0.--31. 1. "ID,USART identifier" line.long 0x10 "USART1_SIDR,USART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end tree "UART5" base ad:0x40110000 group.long 0x0++0x3 line.long 0x0 "USART1_CR1,USART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" newline bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "USART1_CR1_ALTERNATE1,USART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" line.long 0x4 "USART1_CR2,USART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" bitfld.long 0x4 14. "LINEN,LIN mode enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "STOP,stop bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 11. "CLKEN,Clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "CPHA,Clock phase" "B_0x0,B_0x1" bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "B_0x0,B_0x1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "LBDL,LIN break detection length" "B_0x0,B_0x1" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "B_0x0,B_0x1" bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "B_0x0,B_0x1" line.long 0x8 "USART1_CR3,USART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "USART1_CR3_ALTERNATE1,USART control register 3" bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x0 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "USART1_BRR,USART baud rate register" hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate" line.long 0x8 "USART1_GTPR,USART guard time and prescaler register" hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value" hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value" line.long 0xC "USART1_RTOR,USART receiver timeout register" hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "USART1_RQR,USART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR,USART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" newline bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR_ALTERNATE1,USART interrupt and status register" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "USART1_ICR,USART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1" bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1" bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "USART1_RDR,USART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "USART1_TDR,USART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "USART1_PRESC,USART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "USART1_AUTOCR,USART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "USART1_HWCFGR2,USART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,USART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x4 "USART1_HWCFGR1,USART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,USART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,USART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,USART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,USART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,USART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,USART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x8 "USART1_VERR,USART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,USART major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,USART minor revision" line.long 0xC "USART1_IPIDR,USART identification register" hexmask.long 0xC 0.--31. 1. "ID,USART identifier" line.long 0x10 "USART1_SIDR,USART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end tree "UART5_S" base ad:0x50110000 group.long 0x0++0x3 line.long 0x0 "USART1_CR1,USART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" newline bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "USART1_CR1_ALTERNATE1,USART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" line.long 0x4 "USART1_CR2,USART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" bitfld.long 0x4 14. "LINEN,LIN mode enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "STOP,stop bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 11. "CLKEN,Clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "CPHA,Clock phase" "B_0x0,B_0x1" bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "B_0x0,B_0x1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "LBDL,LIN break detection length" "B_0x0,B_0x1" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "B_0x0,B_0x1" bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "B_0x0,B_0x1" line.long 0x8 "USART1_CR3,USART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "USART1_CR3_ALTERNATE1,USART control register 3" bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x0 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "USART1_BRR,USART baud rate register" hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate" line.long 0x8 "USART1_GTPR,USART guard time and prescaler register" hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value" hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value" line.long 0xC "USART1_RTOR,USART receiver timeout register" hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "USART1_RQR,USART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR,USART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" newline bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR_ALTERNATE1,USART interrupt and status register" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "USART1_ICR,USART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1" bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1" bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "USART1_RDR,USART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "USART1_TDR,USART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "USART1_PRESC,USART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "USART1_AUTOCR,USART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "USART1_HWCFGR2,USART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,USART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x4 "USART1_HWCFGR1,USART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,USART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,USART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,USART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,USART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,USART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,USART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x8 "USART1_VERR,USART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,USART major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,USART minor revision" line.long 0xC "USART1_IPIDR,USART identification register" hexmask.long 0xC 0.--31. 1. "ID,USART identifier" line.long 0x10 "USART1_SIDR,USART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end tree "UART7" base ad:0x40370000 group.long 0x0++0x3 line.long 0x0 "USART1_CR1,USART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" newline bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "USART1_CR1_ALTERNATE1,USART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" line.long 0x4 "USART1_CR2,USART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" bitfld.long 0x4 14. "LINEN,LIN mode enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "STOP,stop bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 11. "CLKEN,Clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "CPHA,Clock phase" "B_0x0,B_0x1" bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "B_0x0,B_0x1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "LBDL,LIN break detection length" "B_0x0,B_0x1" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "B_0x0,B_0x1" bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "B_0x0,B_0x1" line.long 0x8 "USART1_CR3,USART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "USART1_CR3_ALTERNATE1,USART control register 3" bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x0 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "USART1_BRR,USART baud rate register" hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate" line.long 0x8 "USART1_GTPR,USART guard time and prescaler register" hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value" hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value" line.long 0xC "USART1_RTOR,USART receiver timeout register" hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "USART1_RQR,USART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR,USART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" newline bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR_ALTERNATE1,USART interrupt and status register" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "USART1_ICR,USART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1" bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1" bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "USART1_RDR,USART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "USART1_TDR,USART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "USART1_PRESC,USART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "USART1_AUTOCR,USART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "USART1_HWCFGR2,USART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,USART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x4 "USART1_HWCFGR1,USART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,USART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,USART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,USART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,USART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,USART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,USART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x8 "USART1_VERR,USART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,USART major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,USART minor revision" line.long 0xC "USART1_IPIDR,USART identification register" hexmask.long 0xC 0.--31. 1. "ID,USART identifier" line.long 0x10 "USART1_SIDR,USART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end tree "UART7_S" base ad:0x50370000 group.long 0x0++0x3 line.long 0x0 "USART1_CR1,USART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" newline bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "USART1_CR1_ALTERNATE1,USART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" line.long 0x4 "USART1_CR2,USART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" bitfld.long 0x4 14. "LINEN,LIN mode enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "STOP,stop bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 11. "CLKEN,Clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "CPHA,Clock phase" "B_0x0,B_0x1" bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "B_0x0,B_0x1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "LBDL,LIN break detection length" "B_0x0,B_0x1" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "B_0x0,B_0x1" bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "B_0x0,B_0x1" line.long 0x8 "USART1_CR3,USART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "USART1_CR3_ALTERNATE1,USART control register 3" bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x0 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "USART1_BRR,USART baud rate register" hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate" line.long 0x8 "USART1_GTPR,USART guard time and prescaler register" hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value" hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value" line.long 0xC "USART1_RTOR,USART receiver timeout register" hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "USART1_RQR,USART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR,USART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" newline bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR_ALTERNATE1,USART interrupt and status register" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "USART1_ICR,USART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1" bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1" bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "USART1_RDR,USART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "USART1_TDR,USART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "USART1_PRESC,USART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "USART1_AUTOCR,USART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "USART1_HWCFGR2,USART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,USART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x4 "USART1_HWCFGR1,USART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,USART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,USART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,USART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,USART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,USART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,USART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x8 "USART1_VERR,USART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,USART major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,USART minor revision" line.long 0xC "USART1_IPIDR,USART identification register" hexmask.long 0xC 0.--31. 1. "ID,USART identifier" line.long 0x10 "USART1_SIDR,USART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end tree "UART8" base ad:0x40380000 group.long 0x0++0x3 line.long 0x0 "USART1_CR1,USART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" newline bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "USART1_CR1_ALTERNATE1,USART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" line.long 0x4 "USART1_CR2,USART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" bitfld.long 0x4 14. "LINEN,LIN mode enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "STOP,stop bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 11. "CLKEN,Clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "CPHA,Clock phase" "B_0x0,B_0x1" bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "B_0x0,B_0x1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "LBDL,LIN break detection length" "B_0x0,B_0x1" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "B_0x0,B_0x1" bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "B_0x0,B_0x1" line.long 0x8 "USART1_CR3,USART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "USART1_CR3_ALTERNATE1,USART control register 3" bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x0 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "USART1_BRR,USART baud rate register" hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate" line.long 0x8 "USART1_GTPR,USART guard time and prescaler register" hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value" hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value" line.long 0xC "USART1_RTOR,USART receiver timeout register" hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "USART1_RQR,USART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR,USART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" newline bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR_ALTERNATE1,USART interrupt and status register" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "USART1_ICR,USART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1" bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1" bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "USART1_RDR,USART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "USART1_TDR,USART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "USART1_PRESC,USART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "USART1_AUTOCR,USART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "USART1_HWCFGR2,USART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,USART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x4 "USART1_HWCFGR1,USART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,USART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,USART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,USART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,USART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,USART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,USART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x8 "USART1_VERR,USART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,USART major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,USART minor revision" line.long 0xC "USART1_IPIDR,USART identification register" hexmask.long 0xC 0.--31. 1. "ID,USART identifier" line.long 0x10 "USART1_SIDR,USART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end tree "UART8_S" base ad:0x50380000 group.long 0x0++0x3 line.long 0x0 "USART1_CR1,USART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" newline bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "USART1_CR1_ALTERNATE1,USART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" line.long 0x4 "USART1_CR2,USART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" bitfld.long 0x4 14. "LINEN,LIN mode enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "STOP,stop bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 11. "CLKEN,Clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "CPHA,Clock phase" "B_0x0,B_0x1" bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "B_0x0,B_0x1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "LBDL,LIN break detection length" "B_0x0,B_0x1" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "B_0x0,B_0x1" bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "B_0x0,B_0x1" line.long 0x8 "USART1_CR3,USART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "USART1_CR3_ALTERNATE1,USART control register 3" bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x0 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "USART1_BRR,USART baud rate register" hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate" line.long 0x8 "USART1_GTPR,USART guard time and prescaler register" hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value" hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value" line.long 0xC "USART1_RTOR,USART receiver timeout register" hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "USART1_RQR,USART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR,USART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" newline bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR_ALTERNATE1,USART interrupt and status register" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "USART1_ICR,USART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1" bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1" bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "USART1_RDR,USART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "USART1_TDR,USART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "USART1_PRESC,USART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "USART1_AUTOCR,USART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "USART1_HWCFGR2,USART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,USART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x4 "USART1_HWCFGR1,USART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,USART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,USART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,USART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,USART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,USART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,USART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x8 "USART1_VERR,USART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,USART major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,USART minor revision" line.long 0xC "USART1_IPIDR,USART identification register" hexmask.long 0xC 0.--31. 1. "ID,USART identifier" line.long 0x10 "USART1_SIDR,USART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end tree "UART9" base ad:0x402C0000 group.long 0x0++0x3 line.long 0x0 "USART1_CR1,USART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" newline bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "USART1_CR1_ALTERNATE1,USART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" line.long 0x4 "USART1_CR2,USART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" bitfld.long 0x4 14. "LINEN,LIN mode enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "STOP,stop bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 11. "CLKEN,Clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "CPHA,Clock phase" "B_0x0,B_0x1" bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "B_0x0,B_0x1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "LBDL,LIN break detection length" "B_0x0,B_0x1" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "B_0x0,B_0x1" bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "B_0x0,B_0x1" line.long 0x8 "USART1_CR3,USART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "USART1_CR3_ALTERNATE1,USART control register 3" bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x0 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "USART1_BRR,USART baud rate register" hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate" line.long 0x8 "USART1_GTPR,USART guard time and prescaler register" hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value" hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value" line.long 0xC "USART1_RTOR,USART receiver timeout register" hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "USART1_RQR,USART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR,USART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" newline bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR_ALTERNATE1,USART interrupt and status register" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "USART1_ICR,USART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1" bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1" bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "USART1_RDR,USART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "USART1_TDR,USART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "USART1_PRESC,USART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "USART1_AUTOCR,USART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "USART1_HWCFGR2,USART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,USART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x4 "USART1_HWCFGR1,USART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,USART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,USART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,USART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,USART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,USART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,USART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x8 "USART1_VERR,USART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,USART major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,USART minor revision" line.long 0xC "USART1_IPIDR,USART identification register" hexmask.long 0xC 0.--31. 1. "ID,USART identifier" line.long 0x10 "USART1_SIDR,USART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end tree "UART9_S" base ad:0x502C0000 group.long 0x0++0x3 line.long 0x0 "USART1_CR1,USART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" newline bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "USART1_CR1_ALTERNATE1,USART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" line.long 0x4 "USART1_CR2,USART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" bitfld.long 0x4 14. "LINEN,LIN mode enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "STOP,stop bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 11. "CLKEN,Clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "CPHA,Clock phase" "B_0x0,B_0x1" bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "B_0x0,B_0x1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "LBDL,LIN break detection length" "B_0x0,B_0x1" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "B_0x0,B_0x1" bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "B_0x0,B_0x1" line.long 0x8 "USART1_CR3,USART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "USART1_CR3_ALTERNATE1,USART control register 3" bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x0 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "USART1_BRR,USART baud rate register" hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate" line.long 0x8 "USART1_GTPR,USART guard time and prescaler register" hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value" hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value" line.long 0xC "USART1_RTOR,USART receiver timeout register" hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "USART1_RQR,USART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR,USART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" newline bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR_ALTERNATE1,USART interrupt and status register" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "USART1_ICR,USART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1" bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1" bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "USART1_RDR,USART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "USART1_TDR,USART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "USART1_PRESC,USART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "USART1_AUTOCR,USART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "USART1_HWCFGR2,USART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,USART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x4 "USART1_HWCFGR1,USART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,USART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,USART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,USART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,USART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,USART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,USART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x8 "USART1_VERR,USART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,USART major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,USART minor revision" line.long 0xC "USART1_IPIDR,USART identification register" hexmask.long 0xC 0.--31. 1. "ID,USART identifier" line.long 0x10 "USART1_SIDR,USART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end tree "USART1" base ad:0x40330000 group.long 0x0++0x3 line.long 0x0 "USART1_CR1,USART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" newline bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "USART1_CR1_ALTERNATE1,USART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" line.long 0x4 "USART1_CR2,USART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" bitfld.long 0x4 14. "LINEN,LIN mode enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "STOP,stop bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 11. "CLKEN,Clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "CPHA,Clock phase" "B_0x0,B_0x1" bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "B_0x0,B_0x1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "LBDL,LIN break detection length" "B_0x0,B_0x1" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "B_0x0,B_0x1" bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "B_0x0,B_0x1" line.long 0x8 "USART1_CR3,USART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "USART1_CR3_ALTERNATE1,USART control register 3" bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x0 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "USART1_BRR,USART baud rate register" hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate" line.long 0x8 "USART1_GTPR,USART guard time and prescaler register" hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value" hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value" line.long 0xC "USART1_RTOR,USART receiver timeout register" hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "USART1_RQR,USART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR,USART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" newline bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR_ALTERNATE1,USART interrupt and status register" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "USART1_ICR,USART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1" bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1" bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "USART1_RDR,USART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "USART1_TDR,USART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "USART1_PRESC,USART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "USART1_AUTOCR,USART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "USART1_HWCFGR2,USART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,USART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x4 "USART1_HWCFGR1,USART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,USART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,USART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,USART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,USART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,USART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,USART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x8 "USART1_VERR,USART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,USART major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,USART minor revision" line.long 0xC "USART1_IPIDR,USART identification register" hexmask.long 0xC 0.--31. 1. "ID,USART identifier" line.long 0x10 "USART1_SIDR,USART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end tree "USART1_S" base ad:0x50330000 group.long 0x0++0x3 line.long 0x0 "USART1_CR1,USART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" newline bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "USART1_CR1_ALTERNATE1,USART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" line.long 0x4 "USART1_CR2,USART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" bitfld.long 0x4 14. "LINEN,LIN mode enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "STOP,stop bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 11. "CLKEN,Clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "CPHA,Clock phase" "B_0x0,B_0x1" bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "B_0x0,B_0x1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "LBDL,LIN break detection length" "B_0x0,B_0x1" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "B_0x0,B_0x1" bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "B_0x0,B_0x1" line.long 0x8 "USART1_CR3,USART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "USART1_CR3_ALTERNATE1,USART control register 3" bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x0 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "USART1_BRR,USART baud rate register" hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate" line.long 0x8 "USART1_GTPR,USART guard time and prescaler register" hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value" hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value" line.long 0xC "USART1_RTOR,USART receiver timeout register" hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "USART1_RQR,USART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR,USART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" newline bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR_ALTERNATE1,USART interrupt and status register" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "USART1_ICR,USART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1" bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1" bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "USART1_RDR,USART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "USART1_TDR,USART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "USART1_PRESC,USART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "USART1_AUTOCR,USART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "USART1_HWCFGR2,USART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,USART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x4 "USART1_HWCFGR1,USART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,USART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,USART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,USART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,USART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,USART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,USART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x8 "USART1_VERR,USART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,USART major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,USART minor revision" line.long 0xC "USART1_IPIDR,USART identification register" hexmask.long 0xC 0.--31. 1. "ID,USART identifier" line.long 0x10 "USART1_SIDR,USART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end tree "USART2" base ad:0x400E0000 group.long 0x0++0x3 line.long 0x0 "USART1_CR1,USART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" newline bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "USART1_CR1_ALTERNATE1,USART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" line.long 0x4 "USART1_CR2,USART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" bitfld.long 0x4 14. "LINEN,LIN mode enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "STOP,stop bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 11. "CLKEN,Clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "CPHA,Clock phase" "B_0x0,B_0x1" bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "B_0x0,B_0x1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "LBDL,LIN break detection length" "B_0x0,B_0x1" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "B_0x0,B_0x1" bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "B_0x0,B_0x1" line.long 0x8 "USART1_CR3,USART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "USART1_CR3_ALTERNATE1,USART control register 3" bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x0 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "USART1_BRR,USART baud rate register" hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate" line.long 0x8 "USART1_GTPR,USART guard time and prescaler register" hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value" hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value" line.long 0xC "USART1_RTOR,USART receiver timeout register" hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "USART1_RQR,USART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR,USART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" newline bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR_ALTERNATE1,USART interrupt and status register" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "USART1_ICR,USART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1" bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1" bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "USART1_RDR,USART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "USART1_TDR,USART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "USART1_PRESC,USART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "USART1_AUTOCR,USART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "USART1_HWCFGR2,USART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,USART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x4 "USART1_HWCFGR1,USART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,USART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,USART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,USART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,USART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,USART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,USART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x8 "USART1_VERR,USART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,USART major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,USART minor revision" line.long 0xC "USART1_IPIDR,USART identification register" hexmask.long 0xC 0.--31. 1. "ID,USART identifier" line.long 0x10 "USART1_SIDR,USART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end tree "USART2_S" base ad:0x500E0000 group.long 0x0++0x3 line.long 0x0 "USART1_CR1,USART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" newline bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "USART1_CR1_ALTERNATE1,USART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" line.long 0x4 "USART1_CR2,USART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" bitfld.long 0x4 14. "LINEN,LIN mode enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "STOP,stop bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 11. "CLKEN,Clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "CPHA,Clock phase" "B_0x0,B_0x1" bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "B_0x0,B_0x1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "LBDL,LIN break detection length" "B_0x0,B_0x1" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "B_0x0,B_0x1" bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "B_0x0,B_0x1" line.long 0x8 "USART1_CR3,USART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "USART1_CR3_ALTERNATE1,USART control register 3" bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x0 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "USART1_BRR,USART baud rate register" hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate" line.long 0x8 "USART1_GTPR,USART guard time and prescaler register" hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value" hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value" line.long 0xC "USART1_RTOR,USART receiver timeout register" hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "USART1_RQR,USART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR,USART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" newline bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR_ALTERNATE1,USART interrupt and status register" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "USART1_ICR,USART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1" bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1" bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "USART1_RDR,USART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "USART1_TDR,USART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "USART1_PRESC,USART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "USART1_AUTOCR,USART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "USART1_HWCFGR2,USART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,USART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x4 "USART1_HWCFGR1,USART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,USART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,USART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,USART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,USART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,USART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,USART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x8 "USART1_VERR,USART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,USART major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,USART minor revision" line.long 0xC "USART1_IPIDR,USART identification register" hexmask.long 0xC 0.--31. 1. "ID,USART identifier" line.long 0x10 "USART1_SIDR,USART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end tree "USART3" base ad:0x400F0000 group.long 0x0++0x3 line.long 0x0 "USART1_CR1,USART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" newline bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "USART1_CR1_ALTERNATE1,USART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" line.long 0x4 "USART1_CR2,USART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" bitfld.long 0x4 14. "LINEN,LIN mode enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "STOP,stop bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 11. "CLKEN,Clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "CPHA,Clock phase" "B_0x0,B_0x1" bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "B_0x0,B_0x1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "LBDL,LIN break detection length" "B_0x0,B_0x1" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "B_0x0,B_0x1" bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "B_0x0,B_0x1" line.long 0x8 "USART1_CR3,USART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "USART1_CR3_ALTERNATE1,USART control register 3" bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x0 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "USART1_BRR,USART baud rate register" hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate" line.long 0x8 "USART1_GTPR,USART guard time and prescaler register" hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value" hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value" line.long 0xC "USART1_RTOR,USART receiver timeout register" hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "USART1_RQR,USART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR,USART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" newline bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR_ALTERNATE1,USART interrupt and status register" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "USART1_ICR,USART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1" bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1" bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "USART1_RDR,USART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "USART1_TDR,USART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "USART1_PRESC,USART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "USART1_AUTOCR,USART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "USART1_HWCFGR2,USART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,USART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x4 "USART1_HWCFGR1,USART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,USART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,USART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,USART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,USART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,USART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,USART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x8 "USART1_VERR,USART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,USART major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,USART minor revision" line.long 0xC "USART1_IPIDR,USART identification register" hexmask.long 0xC 0.--31. 1. "ID,USART identifier" line.long 0x10 "USART1_SIDR,USART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end tree "USART3_S" base ad:0x500F0000 group.long 0x0++0x3 line.long 0x0 "USART1_CR1,USART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" newline bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "USART1_CR1_ALTERNATE1,USART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" line.long 0x4 "USART1_CR2,USART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" bitfld.long 0x4 14. "LINEN,LIN mode enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "STOP,stop bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 11. "CLKEN,Clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "CPHA,Clock phase" "B_0x0,B_0x1" bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "B_0x0,B_0x1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "LBDL,LIN break detection length" "B_0x0,B_0x1" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "B_0x0,B_0x1" bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "B_0x0,B_0x1" line.long 0x8 "USART1_CR3,USART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "USART1_CR3_ALTERNATE1,USART control register 3" bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x0 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "USART1_BRR,USART baud rate register" hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate" line.long 0x8 "USART1_GTPR,USART guard time and prescaler register" hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value" hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value" line.long 0xC "USART1_RTOR,USART receiver timeout register" hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "USART1_RQR,USART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR,USART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" newline bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR_ALTERNATE1,USART interrupt and status register" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "USART1_ICR,USART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1" bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1" bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "USART1_RDR,USART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "USART1_TDR,USART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "USART1_PRESC,USART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "USART1_AUTOCR,USART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "USART1_HWCFGR2,USART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,USART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x4 "USART1_HWCFGR1,USART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,USART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,USART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,USART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,USART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,USART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,USART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x8 "USART1_VERR,USART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,USART major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,USART minor revision" line.long 0xC "USART1_IPIDR,USART identification register" hexmask.long 0xC 0.--31. 1. "ID,USART identifier" line.long 0x10 "USART1_SIDR,USART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end tree "USART6" base ad:0x40220000 group.long 0x0++0x3 line.long 0x0 "USART1_CR1,USART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" newline bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "USART1_CR1_ALTERNATE1,USART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" line.long 0x4 "USART1_CR2,USART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" bitfld.long 0x4 14. "LINEN,LIN mode enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "STOP,stop bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 11. "CLKEN,Clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "CPHA,Clock phase" "B_0x0,B_0x1" bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "B_0x0,B_0x1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "LBDL,LIN break detection length" "B_0x0,B_0x1" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "B_0x0,B_0x1" bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "B_0x0,B_0x1" line.long 0x8 "USART1_CR3,USART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "USART1_CR3_ALTERNATE1,USART control register 3" bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x0 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "USART1_BRR,USART baud rate register" hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate" line.long 0x8 "USART1_GTPR,USART guard time and prescaler register" hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value" hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value" line.long 0xC "USART1_RTOR,USART receiver timeout register" hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "USART1_RQR,USART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR,USART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" newline bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR_ALTERNATE1,USART interrupt and status register" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "USART1_ICR,USART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1" bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1" bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "USART1_RDR,USART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "USART1_TDR,USART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "USART1_PRESC,USART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "USART1_AUTOCR,USART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "USART1_HWCFGR2,USART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,USART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x4 "USART1_HWCFGR1,USART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,USART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,USART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,USART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,USART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,USART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,USART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x8 "USART1_VERR,USART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,USART major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,USART minor revision" line.long 0xC "USART1_IPIDR,USART identification register" hexmask.long 0xC 0.--31. 1. "ID,USART identifier" line.long 0x10 "USART1_SIDR,USART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end tree "USART6_S" base ad:0x50220000 group.long 0x0++0x3 line.long 0x0 "USART1_CR1,USART control register 1" bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" newline bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" group.long 0x0++0xB line.long 0x0 "USART1_CR1_ALTERNATE1,USART control register 1" bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "B_0x0,B_0x1" bitfld.long 0x0 28. "M1,Word length" "0,1" bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "B_0x0,B_0x1" hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time" hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time" newline bitfld.long 0x0 15. "OVER8,Oversampling mode" "B_0x0,B_0x1" bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 13. "MME,Mute mode enable" "B_0x0,B_0x1" bitfld.long 0x0 12. "M0,Word length" "0,1" bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "B_0x0,B_0x1" bitfld.long 0x0 10. "PCE,Parity control enable" "B_0x0,B_0x1" newline bitfld.long 0x0 9. "PS,Parity selection" "B_0x0,B_0x1" bitfld.long 0x0 8. "PEIE,PE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x0 3. "TE,Transmitter enable" "B_0x0,B_0x1" bitfld.long 0x0 2. "RE,Receiver enable" "B_0x0,B_0x1" bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "UE,USART enable" "B_0x0,B_0x1" line.long 0x4 "USART1_CR2,USART control register 2" hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node" bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "B_0x0,B_0x1" bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "B_0x0,B_0x1" bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "B_0x0,B_0x1" bitfld.long 0x4 18. "DATAINV,Binary data inversion" "B_0x0,B_0x1" newline bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "B_0x0,B_0x1" bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "B_0x0,B_0x1" bitfld.long 0x4 14. "LINEN,LIN mode enable" "B_0x0,B_0x1" bitfld.long 0x4 12.--13. "STOP,stop bits" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x4 11. "CLKEN,Clock enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "CPOL,Clock polarity" "B_0x0,B_0x1" bitfld.long 0x4 9. "CPHA,Clock phase" "B_0x0,B_0x1" bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "B_0x0,B_0x1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "B_0x0,B_0x1" bitfld.long 0x4 5. "LBDL,LIN break detection length" "B_0x0,B_0x1" bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "B_0x0,B_0x1" newline bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "B_0x0,B_0x1" bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "B_0x0,B_0x1" line.long 0x8 "USART1_CR3,USART control register 3" bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "B_0x0,B_0x1" bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" newline bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x8 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x8 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x8 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x8 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" newline bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x8 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" group.long 0x8++0xF line.long 0x0 "USART1_CR3_ALTERNATE1,USART control register 3" bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "B_0x0,?,?,?,?,?,?,?" bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "B_0x0,B_0x1" bitfld.long 0x0 14. "DEM,Driver enable mode" "B_0x0,B_0x1" bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "B_0x0,B_0x1" bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "B_0x0,B_0x1" newline bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSE,CTS enable" "B_0x0,B_0x1" bitfld.long 0x0 8. "RTSE,RTS enable" "B_0x0,B_0x1" bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "B_0x0,B_0x1" bitfld.long 0x0 6. "DMAR,DMA enable receiver" "B_0x0,B_0x1" newline bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "B_0x0,B_0x1" bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "B_0x0,B_0x1" bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "B_0x0,B_0x1" bitfld.long 0x0 2. "IRLP,IrDA low-power" "B_0x0,B_0x1" bitfld.long 0x0 1. "IREN,IrDA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 0. "EIE,Error interrupt enable" "B_0x0,B_0x1" line.long 0x4 "USART1_BRR,USART baud rate register" hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate" line.long 0x8 "USART1_GTPR,USART guard time and prescaler register" hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value" hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value" line.long 0xC "USART1_RTOR,USART receiver timeout register" hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "USART1_RQR,USART request register" bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1" bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR,USART interrupt and status register" bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "B_0x0,B_0x1" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 24. "RXFF,RXFIFO Full" "B_0x0,B_0x1" bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" newline bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" newline bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "B_0x0,B_0x1" bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "B_0x0,B_0x1" newline bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" rgroup.long 0x1C++0x3 line.long 0x0 "USART1_ISR_ALTERNATE1,USART interrupt and status register" bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "B_0x0,B_0x1" bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1" bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "B_0x0,B_0x1" bitfld.long 0x0 18. "SBKF,Send break flag" "B_0x0,B_0x1" bitfld.long 0x0 17. "CMF,Character match flag" "B_0x0,B_0x1" newline bitfld.long 0x0 16. "BUSY,Busy flag" "B_0x0,B_0x1" bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1" bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "B_0x0,B_0x1" bitfld.long 0x0 12. "EOBF,End of block flag" "B_0x0,B_0x1" bitfld.long 0x0 11. "RTOF,Receiver timeout" "B_0x0,B_0x1" newline bitfld.long 0x0 10. "CTS,CTS flag" "B_0x0,B_0x1" bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "B_0x0,B_0x1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "B_0x0,B_0x1" bitfld.long 0x0 7. "TXE,Transmit data register empty" "B_0x0,B_0x1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RXNE,Read data register not empty" "B_0x0,B_0x1" newline bitfld.long 0x0 4. "IDLE,Idle line detected" "B_0x0,B_0x1" bitfld.long 0x0 3. "ORE,Overrun error" "?,B_0x1" bitfld.long 0x0 2. "NE,Noise detection flag" "B_0x0,B_0x1" bitfld.long 0x0 1. "FE,Framing error" "B_0x0,B_0x1" bitfld.long 0x0 0. "PE,Parity error" "B_0x0,B_0x1" wgroup.long 0x20++0x3 line.long 0x0 "USART1_ICR,USART interrupt flag clear register" bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1" bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1" bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1" bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1" bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1" newline bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1" bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1" bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1" bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1" bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1" newline bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "USART1_RDR,USART receive data register" hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value" group.long 0x28++0xB line.long 0x0 "USART1_TDR,USART transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value" line.long 0x4 "USART1_PRESC,USART prescaler register" hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler" line.long 0x8 "USART1_AUTOCR,USART autonomous mode control register" hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits" bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "B_0x0,B_0x1" bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "B_0x0,B_0x1" bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "B_0x0,B_0x1" hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number" rgroup.long 0x3EC++0x13 line.long 0x0 "USART1_HWCFGR2,USART hardware configuration register 2" hexmask.long.byte 0x0 8.--11. 1. "CFG3,USART hardware configuration 3" hexmask.long.byte 0x0 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x0 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x4 "USART1_HWCFGR1,USART hardware configuration register 1" hexmask.long.byte 0x4 28.--31. 1. "CFG8,USART hardware configuration 8" hexmask.long.byte 0x4 24.--27. 1. "CFG7,USART hardware configuration 7" hexmask.long.byte 0x4 20.--23. 1. "CFG6,USART hardware configuration 6" hexmask.long.byte 0x4 16.--19. 1. "CFG5,USART hardware configuration 5" hexmask.long.byte 0x4 12.--15. 1. "CFG4,USART hardware configuration 4" hexmask.long.byte 0x4 8.--11. 1. "CFG3,USART hardware configuration 3" newline hexmask.long.byte 0x4 4.--7. 1. "CFG2,USART hardware configuration 2" hexmask.long.byte 0x4 0.--3. 1. "CFG1,USART hardware configuration 1" line.long 0x8 "USART1_VERR,USART version register" hexmask.long.byte 0x8 4.--7. 1. "MAJREV,USART major revision" hexmask.long.byte 0x8 0.--3. 1. "MINREV,USART minor revision" line.long 0xC "USART1_IPIDR,USART identification register" hexmask.long 0xC 0.--31. 1. "ID,USART identifier" line.long 0x10 "USART1_SIDR,USART size identification register" hexmask.long 0x10 0.--31. 1. "SID,Size identification" tree.end tree.end tree "USBSS (Universal Serial Bus Subsystem)" base ad:0x0 tree "COMBOPHY (Combo PHY)" tree "COMBOPHY" base ad:0x480C0000 group.long 0xC0++0x3 line.long 0x0 "COMBOPHY_MPLL_LOOP_CTL_CR,COMBOPHY MPLL loop control register" hexmask.long.byte 0x0 4.--7. 1. "PROP_CNTRL,Charge pump proportional current setting" bitfld.long 0x0 2.--3. "INT_CNTRL,Charge pump integrating current setting" "0,1,2,3" bitfld.long 0x0 1. "GD,Measure MPLL local GD" "0,1" bitfld.long 0x0 0. "VMB,Measure MPLL master bias voltage" "0,1" tree.end tree "COMBOPHY_S" base ad:0x580C0000 group.long 0xC0++0x3 line.long 0x0 "COMBOPHY_MPLL_LOOP_CTL_CR,COMBOPHY MPLL loop control register" hexmask.long.byte 0x0 4.--7. 1. "PROP_CNTRL,Charge pump proportional current setting" bitfld.long 0x0 2.--3. "INT_CNTRL,Charge pump integrating current setting" "0,1,2,3" bitfld.long 0x0 1. "GD,Measure MPLL local GD" "0,1" bitfld.long 0x0 0. "VMB,Measure MPLL master bias voltage" "0,1" tree.end tree.end tree "UCPD (USB Type-C/USB Power Delivery Interface)" tree "UCPD" base ad:0x480A0000 group.long 0x0++0x13 line.long 0x0 "UCPD_CFGR1,UCPD configuration register 1" bitfld.long 0x0 31. "UCPDEN,UCPD peripheral enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "RXDMAEN,Reception DMA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "TXDMAEN,Transmission DMA mode enable" "B_0x0,B_0x1" hexmask.long.word 0x0 20.--28. 1. "RXORDSETEN,Receiver ordered set enable" bitfld.long 0x0 17.--19. "PSC_USBPDCLK,Pre-scaler division ratio for generating ucpd_clk" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline hexmask.long.byte 0x0 11.--15. 1. "TRANSWIN,Transition window duration" hexmask.long.byte 0x0 6.--10. 1. "IFRGAP,Division ratio for producing inter-frame gap timer clock" hexmask.long.byte 0x0 0.--5. 1. "HBITCLKDIV,Division ratio for producing half-bit clock" line.long 0x4 "UCPD_CFGR2,UCPD configuration register 2" bitfld.long 0x4 3. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "FORCECLK,Force ClkReq clock request" "B_0x0,B_0x1" bitfld.long 0x4 1. "RXFILT2N3,BMC decoder Rx pre-filter sampling method" "B_0x0,B_0x1" bitfld.long 0x4 0. "RXFILTDIS,BMC decoder Rx pre-filter enable" "B_0x0,B_0x1" line.long 0x8 "UCPD_CFGR3,UCPD configuration register 3" hexmask.long.byte 0x8 25.--28. 1. "TRIM_CC2_RP,SW trim value for Rp current sources on the CC2 line" hexmask.long.byte 0x8 16.--19. 1. "TRIM_CC2_RD,SW trim value for Rd resistor on the CC2 line" hexmask.long.byte 0x8 9.--12. 1. "TRIM_CC1_RP,SW trim value for Rp current sources on the CC1 line" hexmask.long.byte 0x8 0.--3. 1. "TRIM_CC1_RD,SW trim value for Rd resistor on the CC1 line" line.long 0xC "UCPD_CR,UCPD control register" bitfld.long 0xC 21. "CC2TCDIS,CC2 Type-C detector disable" "B_0x0,B_0x1" bitfld.long 0xC 20. "CC1TCDIS,CC1 Type-C detector disable" "B_0x0,B_0x1" bitfld.long 0xC 18. "RDCH,Rdch condition drive" "B_0x0,B_0x1" bitfld.long 0xC 10.--11. "CCENABLE,CC line enable" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 9. "ANAMODE,Analog PHY operating mode" "B_0x0,B_0x1" newline bitfld.long 0xC 7.--8. "ANASUBMODE,Analog PHY sub-mode" "0,1,2,3" bitfld.long 0xC 6. "PHYCCSEL,CC1/CC2 line selector for USB Power Delivery signaling" "B_0x0,B_0x1" bitfld.long 0xC 5. "PHYRXEN,USB Power Delivery receiver enable" "B_0x0,B_0x1" bitfld.long 0xC 4. "RXMODE,Receiver mode" "B_0x0,B_0x1" bitfld.long 0xC 3. "TXHRST,Command to send a Tx Hard Reset" "B_0x0,B_0x1" newline bitfld.long 0xC 2. "TXSEND,Command to send a Tx packet" "B_0x0,B_0x1" bitfld.long 0xC 0.--1. "TXMODE,Type of Tx packet" "B_0x0,B_0x1,B_0x2,?" line.long 0x10 "UCPD_IMR,UCPD interrupt mask register" bitfld.long 0x10 15. "TYPECEVT2IE,TYPECEVT2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 14. "TYPECEVT1IE,TYPECEVT1 interrupt enable" "0,1" bitfld.long 0x10 12. "RXMSGENDIE,RXMSGEND interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 11. "RXOVRIE,RXOVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 10. "RXHRSTDETIE,RXHRSTDET interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x10 9. "RXORDDETIE,RXORDDET interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "RXNEIE,RXNE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "TXUNDIE,TXUND interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "HRSTSENTIE,HRSTSENT interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "HRSTDISCIE,HRSTDISC interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "TXMSGABTIE,TXMSGABT interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "TXMSGSENTIE,TXMSGSENT interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 1. "TXMSGDISCIE,TXMSGDISC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "TXISIE,TXIS interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "UCPD_SR,UCPD status register" bitfld.long 0x0 18.--19. "TYPEC_VSTATE_CC2,CC2 line voltage level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "TYPEC_VSTATE_CC1,The status bit field indicates the voltage level on the CC1 line in its steady state." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 15. "TYPECEVT2,Type-C voltage level event on CC2 line" "B_0x0,B_0x1" bitfld.long 0x0 14. "TYPECEVT1,Type-C voltage level event on CC1 line" "B_0x0,B_0x1" bitfld.long 0x0 13. "RXERR,Receive message error" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "RXMSGEND,Rx message received" "B_0x0,B_0x1" bitfld.long 0x0 11. "RXOVR,Rx data overflow detection" "B_0x0,B_0x1" bitfld.long 0x0 10. "RXHRSTDET,Rx Hard Reset receipt detection" "B_0x0,B_0x1" bitfld.long 0x0 9. "RXORDDET,Rx ordered set (4 K-codes) detection" "B_0x0,B_0x1" bitfld.long 0x0 8. "RXNE,Receive data register not empty detection" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "TXUND,Tx data underrun detection" "B_0x0,B_0x1" bitfld.long 0x0 5. "HRSTSENT,Hard Reset message sent" "B_0x0,B_0x1" bitfld.long 0x0 4. "HRSTDISC,Hard Reset discarded" "B_0x0,B_0x1" bitfld.long 0x0 3. "TXMSGABT,Transmit message abort" "B_0x0,B_0x1" bitfld.long 0x0 2. "TXMSGSENT,Message transmission completed" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXMSGDISC,Message transmission discarded" "B_0x0,B_0x1" bitfld.long 0x0 0. "TXIS,Transmit interrupt status" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "UCPD_ICR,UCPD interrupt clear register" bitfld.long 0x0 15. "TYPECEVT2CF,Type-C CC2 line event flag (TYPECEVT2) clear" "0,1" bitfld.long 0x0 14. "TYPECEVT1CF,Type-C CC1 event flag (TYPECEVT1) clear" "0,1" bitfld.long 0x0 12. "RXMSGENDCF,Rx message received flag (RXMSGEND) clear" "0,1" bitfld.long 0x0 11. "RXOVRCF,Rx overflow flag (RXOVR) clear" "0,1" bitfld.long 0x0 10. "RXHRSTDETCF,Rx Hard Reset detect flag (RXHRSTDET) clear" "0,1" newline bitfld.long 0x0 9. "RXORDDETCF,Rx ordered set detect flag (RXORDDET) clear" "0,1" bitfld.long 0x0 6. "TXUNDCF,Tx underflow flag (TXUND) clear" "0,1" bitfld.long 0x0 5. "HRSTSENTCF,Hard reset send flag (HRSTSENT) clear" "0,1" bitfld.long 0x0 4. "HRSTDISCCF,Hard reset discard flag (HRSTDISC) clear" "0,1" bitfld.long 0x0 3. "TXMSGABTCF,Tx message abort flag (TXMSGABT) clear" "0,1" newline bitfld.long 0x0 2. "TXMSGSENTCF,Tx message send flag (TXMSGSENT) clear" "0,1" bitfld.long 0x0 1. "TXMSGDISCCF,Tx message discard flag (TXMSGDISC) clear" "0,1" group.long 0x1C++0xB line.long 0x0 "UCPD_TX_ORDSETR,UCPD Tx ordered set type register" hexmask.long.tbyte 0x0 0.--19. 1. "TXORDSET,Ordered set to transmit" line.long 0x4 "UCPD_TX_PAYSZR,UCPD Tx payload size register" hexmask.long.word 0x4 0.--9. 1. "TXPAYSZ,Payload size yet to transmit" line.long 0x8 "UCPD_TXDR,UCPD Tx data register" hexmask.long.byte 0x8 0.--7. 1. "TXDATA,Data byte to transmit" rgroup.long 0x28++0xB line.long 0x0 "UCPD_RX_ORDSETR,UCPD Rx ordered set register" bitfld.long 0x0 4.--6. "RXSOPKINVALID,The bit field is for debug purposes only." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 3. "RXSOP3OF4,The bit indicates the number of correct K-codes. For debug purposes only." "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "RXORDSET,Rx ordered set code detected" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x4 "UCPD_RX_PAYSZR,UCPD Rx payload size register" hexmask.long.word 0x4 0.--9. 1. "RXPAYSZ,Rx payload size received" line.long 0x8 "UCPD_RXDR,UCPD receive data register" hexmask.long.byte 0x8 0.--7. 1. "RXDATA,Data byte received" group.long 0x34++0x7 line.long 0x0 "UCPD_RX_ORDEXTR1,UCPD Rx ordered set extension register 1" hexmask.long.tbyte 0x0 0.--19. 1. "RXSOPX1,Ordered set 1 received" line.long 0x4 "UCPD_RX_ORDEXTR2,UCPD Rx ordered set extension register 2" hexmask.long.tbyte 0x4 0.--19. 1. "RXSOPX2,Ordered set 2 received" rgroup.long 0x3F4++0xB line.long 0x0 "UCPD_VERR,UCPD version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x0 0.--3. 1. "MINREV,Minor revision" line.long 0x4 "UCPD_IPIDR,UCPD identification register" hexmask.long 0x4 0.--31. 1. "IPID,Identification code of the peripheral" line.long 0x8 "UCPD_SIDR,UCPD size identification register" hexmask.long 0x8 0.--31. 1. "SID,Size identification code" tree.end tree "UCPD_S" base ad:0x580A0000 group.long 0x0++0x13 line.long 0x0 "UCPD_CFGR1,UCPD configuration register 1" bitfld.long 0x0 31. "UCPDEN,UCPD peripheral enable" "B_0x0,B_0x1" bitfld.long 0x0 30. "RXDMAEN,Reception DMA mode enable" "B_0x0,B_0x1" bitfld.long 0x0 29. "TXDMAEN,Transmission DMA mode enable" "B_0x0,B_0x1" hexmask.long.word 0x0 20.--28. 1. "RXORDSETEN,Receiver ordered set enable" bitfld.long 0x0 17.--19. "PSC_USBPDCLK,Pre-scaler division ratio for generating ucpd_clk" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" newline hexmask.long.byte 0x0 11.--15. 1. "TRANSWIN,Transition window duration" hexmask.long.byte 0x0 6.--10. 1. "IFRGAP,Division ratio for producing inter-frame gap timer clock" hexmask.long.byte 0x0 0.--5. 1. "HBITCLKDIV,Division ratio for producing half-bit clock" line.long 0x4 "UCPD_CFGR2,UCPD configuration register 2" bitfld.long 0x4 3. "WUPEN,Wake-up from Stop mode enable" "B_0x0,B_0x1" bitfld.long 0x4 2. "FORCECLK,Force ClkReq clock request" "B_0x0,B_0x1" bitfld.long 0x4 1. "RXFILT2N3,BMC decoder Rx pre-filter sampling method" "B_0x0,B_0x1" bitfld.long 0x4 0. "RXFILTDIS,BMC decoder Rx pre-filter enable" "B_0x0,B_0x1" line.long 0x8 "UCPD_CFGR3,UCPD configuration register 3" hexmask.long.byte 0x8 25.--28. 1. "TRIM_CC2_RP,SW trim value for Rp current sources on the CC2 line" hexmask.long.byte 0x8 16.--19. 1. "TRIM_CC2_RD,SW trim value for Rd resistor on the CC2 line" hexmask.long.byte 0x8 9.--12. 1. "TRIM_CC1_RP,SW trim value for Rp current sources on the CC1 line" hexmask.long.byte 0x8 0.--3. 1. "TRIM_CC1_RD,SW trim value for Rd resistor on the CC1 line" line.long 0xC "UCPD_CR,UCPD control register" bitfld.long 0xC 21. "CC2TCDIS,CC2 Type-C detector disable" "B_0x0,B_0x1" bitfld.long 0xC 20. "CC1TCDIS,CC1 Type-C detector disable" "B_0x0,B_0x1" bitfld.long 0xC 18. "RDCH,Rdch condition drive" "B_0x0,B_0x1" bitfld.long 0xC 10.--11. "CCENABLE,CC line enable" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0xC 9. "ANAMODE,Analog PHY operating mode" "B_0x0,B_0x1" newline bitfld.long 0xC 7.--8. "ANASUBMODE,Analog PHY sub-mode" "0,1,2,3" bitfld.long 0xC 6. "PHYCCSEL,CC1/CC2 line selector for USB Power Delivery signaling" "B_0x0,B_0x1" bitfld.long 0xC 5. "PHYRXEN,USB Power Delivery receiver enable" "B_0x0,B_0x1" bitfld.long 0xC 4. "RXMODE,Receiver mode" "B_0x0,B_0x1" bitfld.long 0xC 3. "TXHRST,Command to send a Tx Hard Reset" "B_0x0,B_0x1" newline bitfld.long 0xC 2. "TXSEND,Command to send a Tx packet" "B_0x0,B_0x1" bitfld.long 0xC 0.--1. "TXMODE,Type of Tx packet" "B_0x0,B_0x1,B_0x2,?" line.long 0x10 "UCPD_IMR,UCPD interrupt mask register" bitfld.long 0x10 15. "TYPECEVT2IE,TYPECEVT2 interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 14. "TYPECEVT1IE,TYPECEVT1 interrupt enable" "0,1" bitfld.long 0x10 12. "RXMSGENDIE,RXMSGEND interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 11. "RXOVRIE,RXOVR interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 10. "RXHRSTDETIE,RXHRSTDET interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x10 9. "RXORDDETIE,RXORDDET interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 8. "RXNEIE,RXNE interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 6. "TXUNDIE,TXUND interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 5. "HRSTSENTIE,HRSTSENT interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 4. "HRSTDISCIE,HRSTDISC interrupt enable" "B_0x0,B_0x1" newline bitfld.long 0x10 3. "TXMSGABTIE,TXMSGABT interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 2. "TXMSGSENTIE,TXMSGSENT interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 1. "TXMSGDISCIE,TXMSGDISC interrupt enable" "B_0x0,B_0x1" bitfld.long 0x10 0. "TXISIE,TXIS interrupt enable" "B_0x0,B_0x1" rgroup.long 0x14++0x3 line.long 0x0 "UCPD_SR,UCPD status register" bitfld.long 0x0 18.--19. "TYPEC_VSTATE_CC2,CC2 line voltage level" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 16.--17. "TYPEC_VSTATE_CC1,The status bit field indicates the voltage level on the CC1 line in its steady state." "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x0 15. "TYPECEVT2,Type-C voltage level event on CC2 line" "B_0x0,B_0x1" bitfld.long 0x0 14. "TYPECEVT1,Type-C voltage level event on CC1 line" "B_0x0,B_0x1" bitfld.long 0x0 13. "RXERR,Receive message error" "B_0x0,B_0x1" newline bitfld.long 0x0 12. "RXMSGEND,Rx message received" "B_0x0,B_0x1" bitfld.long 0x0 11. "RXOVR,Rx data overflow detection" "B_0x0,B_0x1" bitfld.long 0x0 10. "RXHRSTDET,Rx Hard Reset receipt detection" "B_0x0,B_0x1" bitfld.long 0x0 9. "RXORDDET,Rx ordered set (4 K-codes) detection" "B_0x0,B_0x1" bitfld.long 0x0 8. "RXNE,Receive data register not empty detection" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "TXUND,Tx data underrun detection" "B_0x0,B_0x1" bitfld.long 0x0 5. "HRSTSENT,Hard Reset message sent" "B_0x0,B_0x1" bitfld.long 0x0 4. "HRSTDISC,Hard Reset discarded" "B_0x0,B_0x1" bitfld.long 0x0 3. "TXMSGABT,Transmit message abort" "B_0x0,B_0x1" bitfld.long 0x0 2. "TXMSGSENT,Message transmission completed" "B_0x0,B_0x1" newline bitfld.long 0x0 1. "TXMSGDISC,Message transmission discarded" "B_0x0,B_0x1" bitfld.long 0x0 0. "TXIS,Transmit interrupt status" "B_0x0,B_0x1" wgroup.long 0x18++0x3 line.long 0x0 "UCPD_ICR,UCPD interrupt clear register" bitfld.long 0x0 15. "TYPECEVT2CF,Type-C CC2 line event flag (TYPECEVT2) clear" "0,1" bitfld.long 0x0 14. "TYPECEVT1CF,Type-C CC1 event flag (TYPECEVT1) clear" "0,1" bitfld.long 0x0 12. "RXMSGENDCF,Rx message received flag (RXMSGEND) clear" "0,1" bitfld.long 0x0 11. "RXOVRCF,Rx overflow flag (RXOVR) clear" "0,1" bitfld.long 0x0 10. "RXHRSTDETCF,Rx Hard Reset detect flag (RXHRSTDET) clear" "0,1" newline bitfld.long 0x0 9. "RXORDDETCF,Rx ordered set detect flag (RXORDDET) clear" "0,1" bitfld.long 0x0 6. "TXUNDCF,Tx underflow flag (TXUND) clear" "0,1" bitfld.long 0x0 5. "HRSTSENTCF,Hard reset send flag (HRSTSENT) clear" "0,1" bitfld.long 0x0 4. "HRSTDISCCF,Hard reset discard flag (HRSTDISC) clear" "0,1" bitfld.long 0x0 3. "TXMSGABTCF,Tx message abort flag (TXMSGABT) clear" "0,1" newline bitfld.long 0x0 2. "TXMSGSENTCF,Tx message send flag (TXMSGSENT) clear" "0,1" bitfld.long 0x0 1. "TXMSGDISCCF,Tx message discard flag (TXMSGDISC) clear" "0,1" group.long 0x1C++0xB line.long 0x0 "UCPD_TX_ORDSETR,UCPD Tx ordered set type register" hexmask.long.tbyte 0x0 0.--19. 1. "TXORDSET,Ordered set to transmit" line.long 0x4 "UCPD_TX_PAYSZR,UCPD Tx payload size register" hexmask.long.word 0x4 0.--9. 1. "TXPAYSZ,Payload size yet to transmit" line.long 0x8 "UCPD_TXDR,UCPD Tx data register" hexmask.long.byte 0x8 0.--7. 1. "TXDATA,Data byte to transmit" rgroup.long 0x28++0xB line.long 0x0 "UCPD_RX_ORDSETR,UCPD Rx ordered set register" bitfld.long 0x0 4.--6. "RXSOPKINVALID,The bit field is for debug purposes only." "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,?,?,?" bitfld.long 0x0 3. "RXSOP3OF4,The bit indicates the number of correct K-codes. For debug purposes only." "B_0x0,B_0x1" bitfld.long 0x0 0.--2. "RXORDSET,Rx ordered set code detected" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" line.long 0x4 "UCPD_RX_PAYSZR,UCPD Rx payload size register" hexmask.long.word 0x4 0.--9. 1. "RXPAYSZ,Rx payload size received" line.long 0x8 "UCPD_RXDR,UCPD receive data register" hexmask.long.byte 0x8 0.--7. 1. "RXDATA,Data byte received" group.long 0x34++0x7 line.long 0x0 "UCPD_RX_ORDEXTR1,UCPD Rx ordered set extension register 1" hexmask.long.tbyte 0x0 0.--19. 1. "RXSOPX1,Ordered set 1 received" line.long 0x4 "UCPD_RX_ORDEXTR2,UCPD Rx ordered set extension register 2" hexmask.long.tbyte 0x4 0.--19. 1. "RXSOPX2,Ordered set 2 received" rgroup.long 0x3F4++0xB line.long 0x0 "UCPD_VERR,UCPD version register" hexmask.long.byte 0x0 4.--7. 1. "MAJREV,Major revision" hexmask.long.byte 0x0 0.--3. 1. "MINREV,Minor revision" line.long 0x4 "UCPD_IPIDR,UCPD identification register" hexmask.long 0x4 0.--31. 1. "IPID,Identification code of the peripheral" line.long 0x8 "UCPD_SIDR,UCPD size identification register" hexmask.long 0x8 0.--31. 1. "SID,Size identification code" tree.end tree.end tree "USB3DR (USB3 xHCI SuperSpeed Dual Role Controller)" tree "USB3DR" base ad:0x48300000 group.long 0xC100++0x1F line.long 0x0 "USB3DR_GBL_GSBUSCFG0,USB3DR global device bus configuration register 0" hexmask.long.byte 0x0 28.--31. 1. "DATRDREQINFO,AHB-prot/AXI-cache/OCP-ReqInfo for data read (DatRdReqInfo)" hexmask.long.byte 0x0 24.--27. 1. "DESRDREQINFO,AHB-prot/AXI-cache/OCP-ReqInfo for descriptor read (DesRdReqInfo)" newline hexmask.long.byte 0x0 20.--23. 1. "DATWRREQINFO,AHB-prot/AXI-cache/OCP-ReqInfo for data write (DatWrReqInfo)" hexmask.long.byte 0x0 16.--19. 1. "DESWRREQINFO,AHB-prot/AXI-cache/OCP-ReqInfo for descriptor write (DesWrReqInfo)." newline bitfld.long 0x0 11. "DATBIGEND,Data access is big endian" "B_0x0,B_0x1" bitfld.long 0x0 10. "DESBIGEND,Descriptor access is big endian" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "INCR256BRSTENA,INCR256 burst type enable" "0,1" bitfld.long 0x0 6. "INCR128BRSTENA,INCR128 burst type enable" "0,1" newline bitfld.long 0x0 5. "INCR64BRSTENA,INCR64 burst type enable" "0,1" bitfld.long 0x0 4. "INCR32BRSTENA,INCR32 burst type enable" "0,1" newline bitfld.long 0x0 3. "INCR16BRSTENA,INCR16 burst type enable" "0,1" bitfld.long 0x0 2. "INCR8BRSTENA,INCR8 burst type enable" "0,1" newline bitfld.long 0x0 1. "INCR4BRSTENA,INCR4 burst type enable" "0,1" bitfld.long 0x0 0. "INCRBRSTENA,Undefined length INCR burst type enable (INCRBrstEna)" "B_0x0,B_0x1" line.long 0x4 "USB3DR_GBL_GSBUSCFG1,USB3DR global bus configuration register 1" bitfld.long 0x4 12. "EN1KPAGE,1K page boundary enable" "0,1" hexmask.long.byte 0x4 8.--11. 1. "PIPETRANSLIMIT,AXI pipelined transfers burst request limit" line.long 0x8 "USB3DR_GBL_GTXTHRCFG,USB3DR global TX threshold control register" bitfld.long 0x8 29. "USBTXPKTCNTSEL,USB transmit packet count enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 24.--27. 1. "USBTXPKTCNT,USB transmit packet count" newline hexmask.long.byte 0x8 16.--23. 1. "USBMAXTXBURSTSIZE,USB maximum TX burst size" line.long 0xC "USB3DR_GBL_GRXTHRCFG,USB3DR global RX threshold control register" bitfld.long 0xC 29. "USBRXPKTCNTSEL,USB receive packet count enable" "B_0x0,B_0x1" hexmask.long.byte 0xC 24.--27. 1. "USBRXPKTCNT,USB receive packet count" newline hexmask.long.byte 0xC 19.--23. 1. "USBMAXRXBURSTSIZE,USB maximum receive burst size" hexmask.long.word 0xC 0.--12. 1. "RESVISOCOUTSPC,Space reserved in RX FIFO for ISOC OUT" line.long 0x10 "USB3DR_GBL_GCTL,USB3DR global control register" hexmask.long.word 0x10 19.--31. 1. "PWRDNSCALE,Power down scale (PwrDnScale)" bitfld.long 0x10 18. "MASTERFILTBYPASS,Master filter bypass" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "BYPSSETADDR,Bypass SetAddress in Device mode" "0,1" bitfld.long 0x10 16. "U2RSTECN,U2RSTECN" "0,1" newline bitfld.long 0x10 14.--15. "FRMSCLDWN,FRMSCLDWN" "B_0x0_SS_HS_MODE_,B_0x1_SS_HS_MODE_,?,?" bitfld.long 0x10 12.--13. "PRTCAPDIR,Port capability direction (PrtCapDir)" "?,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x10 11. "CORESOFTRESET,Core soft reset (CoreSoftReset)" "B_0x0,B_0x1" bitfld.long 0x10 10. "SOFITPSYNC,SOFITPSYNC" "0,1" newline bitfld.long 0x10 9. "U1U2TIMERSCALE,Disable U1/U2 timer scaledown (U1U2TimerScale)" "0,1" bitfld.long 0x10 8. "DEBUGATTACH,Debug attach" "0,1" newline bitfld.long 0x10 6.--7. "RAMCLKSEL,RAM clock select (RAMClkSel)" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 4.--5. "SCALEDOWN,Scale-down mode (ScaleDown)" "B_0x0_HS_FS_LS_MODES,B_0x1_HS_FS_LS_MODES,B_0x2_HS_FS_LS_MODES,B_0x3_HS_FS_LS_MODES" newline bitfld.long 0x10 3. "DISSCRAMBLE,Disable scrambling (DisScramble)" "0,1" bitfld.long 0x10 2. "U2EXIT_LFPS,U2EXIT_LFPS" "B_0x0,B_0x1" newline rbitfld.long 0x10 1. "GBLHIBERNATIONEN,GblHibernationEn" "0,1" bitfld.long 0x10 0. "DSBLCLKGTNG,Disable clock gating (DsblClkGtng)" "0,1" line.long 0x14 "USB3DR_GBL_GPMSTS,USB3DR global power management status register" hexmask.long.byte 0x14 28.--31. 1. "PORTSEL,Global power management status register PortSel" hexmask.long.byte 0x14 12.--16. 1. "U3WAKEUP,U3Wakeup" newline hexmask.long.word 0x14 0.--9. 1. "U2WAKEUP,U2Wakeup" line.long 0x18 "USB3DR_GBL_GSTS,USB3DR global status register" hexmask.long.word 0x18 20.--31. 1. "CBELT,Current BELT value" rbitfld.long 0x18 11. "SSIC_IP,SSIC interrupt pending (SSIC_IP)" "0,1" newline rbitfld.long 0x18 10. "OTG_IP,OTG interrupt pending" "0,1" rbitfld.long 0x18 9. "BC_IP,Battery charger interrupt pending" "0,1" newline rbitfld.long 0x18 8. "ADP_IP,ADP interrupt pending" "0,1" rbitfld.long 0x18 7. "HOST_IP,Host interrupt pending:" "0,1" newline rbitfld.long 0x18 6. "DEVICE_IP,Device interrupt pending" "0,1" bitfld.long 0x18 5. "CSRTIMEOUT,CSR timeout" "0,1" newline bitfld.long 0x18 4. "BUSERRADDRVLD,Bus error address valid (BusErrAddrVld)" "0,1" rbitfld.long 0x18 0.--1. "CURMOD,Current mode of operation (CurMod)" "B_0x0,B_0x1,?,?" line.long 0x1C "USB3DR_GBL_GUCTL1,USB3DR global user control register 1" bitfld.long 0x1C 31. "DEV_DECOUPLE_L1L2_EVT,DEV_DECOUPLE_L1L2_EVT" "B_0x0,B_0x1" bitfld.long 0x1C 30. "DS_RXDET_MAX_TOUT_CTRL,DS_RXDET_MAX_TOUT_CTRL" "B_0x0,B_0x1" newline bitfld.long 0x1C 29. "FILTER_SE0_FSLS_EOP,FILTER_SE0_FSLS_EOP" "B_0x0,B_0x1" bitfld.long 0x1C 28. "TX_IPGAP_LINECHECK_DIS,TX_IPGAP_LINECHECK_DIS" "B_0x0,B_0x1" newline bitfld.long 0x1C 27. "DEV_TRB_OUT_SPR_IND,DEV_TRB_OUT_SPR_IND" "B_0x0,B_0x1" bitfld.long 0x1C 26. "DEV_FORCE_20_CLK_FOR_30_CLK,DEV_FORCE_20_CLK_FOR_30_CLK" "B_0x0,B_0x1" newline bitfld.long 0x1C 25. "P3_IN_U2,P3_IN_U2" "B_0x0,B_0x1" bitfld.long 0x1C 24. "DEV_L1_EXIT_BY_HW,DEV_L1_EXIT_BY_HW" "B_0x0,B_0x1" newline bitfld.long 0x1C 21.--23. "IP_GAP_ADD_ON,This register field is used to add up to the default inter packet gap setting in the USB 2.0 MAC." "0,1,2,3,4,5,6,7" bitfld.long 0x1C 20. "DEV_LSP_TAIL_LOCK_DIS,DEV_LSP_TAIL_LOCK_DIS" "B_0x0,B_0x1" newline bitfld.long 0x1C 19. "NAK_PER_ENH_FS,NAK_PER_ENH_FS" "B_0x0,B_0x1" bitfld.long 0x1C 18. "NAK_PER_ENH_HS,NAK_PER_ENH_HS" "B_0x0,B_0x1" newline bitfld.long 0x1C 17. "PARKMODE_DISABLE_SS,PARKMODE_DISABLE_SS" "0,1" bitfld.long 0x1C 16. "PARKMODE_DISABLE_HS,PARKMODE_DISABLE_HS" "0,1" newline bitfld.long 0x1C 15. "PARKMODE_DISABLE_FSLS,PARKMODE_DISABLE_FSLS" "0,1" bitfld.long 0x1C 10. "RESUME_OPMODE_HS_HOST,RESUME_OPMODE_HS_HOST" "0,1" newline bitfld.long 0x1C 9. "DEV_HS_NYET_BULK_SPR,DEV_HS_NYET_BULK_SPR" "B_0x0,B_0x1" bitfld.long 0x1C 8. "L1_SUSP_THRLD_EN_FOR_HOST,L1_SUSP_THRLD_EN_FOR_HOST" "0,1" newline hexmask.long.byte 0x1C 4.--7. 1. "L1_SUSP_THRLD_FOR_HOST,L1_SUSP_THRLD_FOR_HOST" bitfld.long 0x1C 3. "HC_ERRATA_ENABLE,Host ELD Enable (HELDEn)" "0,1" newline bitfld.long 0x1C 2. "HC_PARCHK_DISABLE,Host parameter check disable (HParChkDisable)" "0,1" bitfld.long 0x1C 1. "OVRLD_L1_SUSP_COM,OVRLD_L1_SUSP_COM" "0,1" newline bitfld.long 0x1C 0. "LOA_FILTER_EN,LOA_FILTER_EN" "0,1" rgroup.long 0xC120++0x3 line.long 0x0 "USB3DR_GBL_GSNPSID,USB3DR global Synopsys ID register" hexmask.long 0x0 0.--31. 1. "SYNOPSYSID,Synopsys ID" group.long 0xC124++0xB line.long 0x0 "USB3DR_GBL_GGPIO,USB3DR global general purpose input/output register" hexmask.long.word 0x0 16.--31. 1. "GPO,General purpose output" hexmask.long.word 0x0 0.--15. 1. "GPI,General purpose input" line.long 0x4 "USB3DR_GBL_GUID,USB3DR global user ID register" hexmask.long 0x4 0.--31. 1. "USERID,USERID" line.long 0x8 "USB3DR_GBL_GUCTL,USB3DR global user control register" hexmask.long.word 0x8 22.--31. 1. "REFCLKPER,REFCLKPER" bitfld.long 0x8 21. "NOEXTRDL,No extra delay between SOF and the first Packet(NoExtrDl)" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "SPRSCTRLTRANSEN,Sparse control transaction enable" "0,1" bitfld.long 0x8 16. "RESBWHSEPS,Reserving 85% bandwidth for HS periodic EPs (ResBwHSEPS)" "0,1" newline bitfld.long 0x8 14. "USBHSTINAUTORETRYEN,Host IN auto retry (USBHstInAutoRetryEn)" "B_0x0,B_0x1" bitfld.long 0x8 13. "ENOVERLAPCHK,Enable check for LFPS overlap during remote Ux exit:" "B_0x0,B_0x1" newline bitfld.long 0x8 12. "EXTCAPSUPPTEN,External extended capability support enable (ExtCapSuptEN)" "0,1" bitfld.long 0x8 11. "INSRTEXTRFSBODI,Insert extra delay between FS bulk OUT transactions (InsrtExtrFSBODl)" "B_0x0,B_0x1" newline bitfld.long 0x8 9.--10. "DTCT,Device timeout coarse tuning (DTCT)" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x8 0.--8. 1. "DTFT,Device timeout fine tuning (DTFT)" rgroup.long 0xC130++0x7 line.long 0x0 "USB3DR_GBL_GBUSERRADDRLO,USB3DR global bus error address register - low" hexmask.long 0x0 0.--31. 1. "BUSERRADDR,Bus address low (BusAddrLo)" line.long 0x4 "USB3DR_GBL_GBUSERRADDRHI,USB3DR gobal bus error address register - high" hexmask.long 0x4 0.--31. 1. "BUSERRADDR,Bus address high (BusAddrHi)" group.long 0xC138++0x7 line.long 0x0 "USB3DR_GBL_GPRTBIMAPLO,USB3DR global SS port to bus instance mapping register - low" hexmask.long.byte 0x0 28.--31. 1. "BINUM8,SS USB instance number for port 8." hexmask.long.byte 0x0 24.--27. 1. "BINUM7,SS USB instance number for port 7." newline hexmask.long.byte 0x0 20.--23. 1. "BINUM6,SS USB instance number for port 6." hexmask.long.byte 0x0 16.--19. 1. "BINUM5,SS USB instance number for port 5." newline hexmask.long.byte 0x0 12.--15. 1. "BINUM4,SS USB instance number for port 4." hexmask.long.byte 0x0 8.--11. 1. "BINUM3,SS USB instance number for port 3." newline hexmask.long.byte 0x0 4.--7. 1. "BINUM2,SS USB instance number for port 2." hexmask.long.byte 0x0 0.--3. 1. "BINUM1,SS USB instance number for port 1." line.long 0x4 "USB3DR_GBL_GPRTBIMAPHI,USB3DR global SS port to bus instance mapping register - high" hexmask.long.byte 0x4 24.--27. 1. "BINUM15,SS USB instance number for port 15." hexmask.long.byte 0x4 20.--23. 1. "BINUM14,SS USB instance number for port 14." newline hexmask.long.byte 0x4 16.--19. 1. "BINUM13,SS USB instance number for port 13." hexmask.long.byte 0x4 12.--15. 1. "BINUM12,SS USB instance number for port 12." newline hexmask.long.byte 0x4 8.--11. 1. "BINUM11,SS USB instance number for port 11." hexmask.long.byte 0x4 4.--7. 1. "BINUM10,SS USB instance number for port 10." newline hexmask.long.byte 0x4 0.--3. 1. "BINUM9,SS USB instance number for port 9." rgroup.long 0xC140++0x1F line.long 0x0 "USB3DR_GBL_GHWPARAMS0,USB3DR global hardware parameters register 0" hexmask.long.byte 0x0 24.--31. 1. "GHWPARAMS0_31_24,USB3DR_AWIDTH" hexmask.long.byte 0x0 16.--23. 1. "GHWPARAMS0_23_16,USB3DR_SDWIDTH" newline hexmask.long.byte 0x0 8.--15. 1. "GHWPARAMS0_15_8,USB3DR_MDWIDTH" bitfld.long 0x0 6.--7. "GHWPARAMS0_7_6,USB3DR_SBUS_TYPE" "0,1,2,3" newline bitfld.long 0x0 3.--5. "GHWPARAMS0_5_3,USB3DR_MBUS_TYPE" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "GHWPARAMS0_2_0,USB3DR_MODE" "0,1,2,3,4,5,6,7" line.long 0x4 "USB3DR_GBL_GHWPARAMS1,USB3DR global hardware parameters register 1" bitfld.long 0x4 31. "GHWPARAMS1_31,USB3DR_EN_DBC" "0,1" bitfld.long 0x4 30. "GHWPARAMS1_30,USB3DR_RM_OPT_FEATURES" "0,1" newline bitfld.long 0x4 28. "GHWPARAMS1_28,USB3DR_RAM_BUS_CLKS_SYNC" "0,1" bitfld.long 0x4 27. "GHWPARAMS1_27,USB3DR_MAC_RAM_CLKS_SYNC" "0,1" newline bitfld.long 0x4 26. "GHWPARAMS1_26,USB3DR_MAC_PHY_CLKS_SYNC" "0,1" bitfld.long 0x4 24.--25. "GHWPARAMS1_25_24,USB3DR_EN_PWROPT" "0,1,2,3" newline bitfld.long 0x4 23. "GHWPARAMS1_23,USB3DR_SPRAM_TYP" "0,1" bitfld.long 0x4 21.--22. "GHWPARAMS1_22_21,USB3DR_NUM_RAMS" "0,1,2,3" newline hexmask.long.byte 0x4 15.--20. 1. "GHWPARAMS1_20_15,USB3DR_DEVICE_NUM_INT" bitfld.long 0x4 12.--14. "GHWPARAMS1_14_12,USB3DR_ASPACEWIDTH" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 9.--11. "GHWPARAMS1_11_9,USB3DR_REQINFOWIDTH" "0,1,2,3,4,5,6,7" bitfld.long 0x4 6.--8. "GHWPARAMS1_8_6,USB3DR_DATAINFOWIDTH" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 3.--5. "GHWPARAMS1_5_3,USB3DR_BURSTWIDTH-1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0.--2. "GHWPARAMS1_2_0,USB3DR_IDWIDTH-1" "0,1,2,3,4,5,6,7" line.long 0x8 "USB3DR_GBL_GHWPARAMS2,USB3DR global hardware parameters register 2" hexmask.long 0x8 0.--31. 1. "GHWPARAMS2_31_0,USB3DR_USERID" line.long 0xC "USB3DR_GBL_GHWPARAMS3,USB3DR global hardware parameters register 3" hexmask.long.byte 0xC 23.--30. 1. "GHWPARAMS3_30_23,USB3DR_CACHE_TOTAL_XFER_RESOURCES" hexmask.long.byte 0xC 18.--22. 1. "GHWPARAMS3_22_18,USB3DR_NUM_IN_EPS" newline hexmask.long.byte 0xC 12.--17. 1. "GHWPARAMS3_17_12,USB3DR_NUM_EPS" bitfld.long 0xC 11. "GHWPARAMS3_11,USB3DR_ULPI_CARKIT" "0,1" newline bitfld.long 0xC 10. "GHWPARAMS3_10,USB3DR_VENDOR_CTL_INTERFACE" "0,1" bitfld.long 0xC 6.--7. "GHWPARAMS3_7_6,USB3DR_HSPHY_DWIDTH" "0,1,2,3" newline bitfld.long 0xC 4.--5. "GHWPARAMS3_5_4,USB3DR_FSPHY_INTERFACE" "0,1,2,3" bitfld.long 0xC 2.--3. "GHWPARAMS3_3_2,USB3DR_HSPHY_INTERFACE" "0,1,2,3" newline bitfld.long 0xC 0.--1. "GHWPARAMS3_1_0,USB3DR_SSPHY_INTERFACE" "0,1,2,3" line.long 0x10 "USB3DR_GBL_GHWPARAMS4,USB3DR global hardware parameters register 4" hexmask.long.byte 0x10 28.--31. 1. "GHWPARAMS4_31_28,USB3DR_BMU_LSP_DEPTH" hexmask.long.byte 0x10 24.--27. 1. "GHWPARAMS4_27_24,USB3DR_BMU_PTL_DEPTH-1" newline bitfld.long 0x10 23. "GHWPARAMS4_23,USB3DR_EN_ISOC_SUPT" "0,1" bitfld.long 0x10 21. "GHWPARAMS4_21,USB3DR_EXT_BUFF_CONTROL" "0,1" newline hexmask.long.byte 0x10 17.--20. 1. "GHWPARAMS4_20_17,USB3DR_NUM_SS_USB_INSTANCES" hexmask.long.byte 0x10 13.--16. 1. "GHWPARAMS4_16_13,USB3DR_HIBER_SCRATCHBUFS" newline bitfld.long 0x10 12. "GHWPARAMS4_12,USB3DR_EN_SSIC" "B_0x0,B_0x1" bitfld.long 0x10 11. "GHWPARAMS4_11,USB3DR_SSIC_NON_SNPS_MPHY" "B_0x0,B_0x1" newline bitfld.long 0x10 9.--10. "GHWPARAMS4_10_9,USB3DR_SSIC_GEAR" "?,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7.--8. "GHWPARAMS4_8_7,USB3DR_NUM_SSIC_NUM_LANE" "B_0x0,B_0x1,B_0x2,?" newline hexmask.long.byte 0x10 0.--5. 1. "GHWPARAMS4_5_0,USB3DR_CACHE_TRBS_PER_TRANSFER" line.long 0x14 "USB3DR_GBL_GHWPARAMS5,USB3DR global hardware parameters register 5" hexmask.long.byte 0x14 22.--27. 1. "GHWPARAMS5_27_22,USB3DR_DFQ_FIFO_DEPTH" hexmask.long.byte 0x14 16.--21. 1. "GHWPARAMS5_21_16,USB3DR_DWQ_FIFO_DEPTH" newline hexmask.long.byte 0x14 10.--15. 1. "GHWPARAMS5_15_10,USB3DR_TXQ_FIFO_DEPTH" hexmask.long.byte 0x14 4.--9. 1. "GHWPARAMS5_9_4,USB3DR_RXQ_FIFO_DEPTH" newline hexmask.long.byte 0x14 0.--3. 1. "GHWPARAMS5_3_0,USB3DR_BMU_BUSGM_DEPTH" line.long 0x18 "USB3DR_GBL_GHWPARAMS6,USB3DR global hardware parameters register 6" hexmask.long.word 0x18 16.--31. 1. "GHWPARAMS6_31_16,USB3DR_RAM0_DEPTH" bitfld.long 0x18 15. "BUSFLTRSSUPPORT,USB3DR_EN_BUS_FILTERS" "0,1" newline bitfld.long 0x18 14. "BCSUPPORT,USB3DR_EN_BC" "0,1" bitfld.long 0x18 13. "OTG_SS_SUPPORT,OTG 3.0 support enabled" "B_0x0,B_0x1" newline bitfld.long 0x18 12. "ADPSUPPORT,USB3DR_EN_ADP" "0,1" bitfld.long 0x18 11. "HNPSUPPORT,RSP/HNP support enabled" "B_0x0_USB3DR_EN_OTG_EQUAL2,B_0x1_USB3DR_EN_OTG_EQUAL2" newline bitfld.long 0x18 10. "SRPSUPPORT,SRP support enabled" "B_0x0,B_0x1" bitfld.long 0x18 7. "GHWPARAMS6_7,USB3DR_EN_FPGA" "0,1" newline bitfld.long 0x18 6. "GHWPARAMS6_6,USB3DR_EN_DBG_PORTS" "0,1" hexmask.long.byte 0x18 0.--5. 1. "GHWPARAMS6_5_0,USB3DR_PSQ_FIFO_DEPTH" line.long 0x1C "USB3DR_GBL_GHWPARAMS7,USB3DR global hardware parameters register 7" hexmask.long.word 0x1C 16.--31. 1. "GHWPARAMS7_31_16,USB3DR_RAM2_DEPTH" hexmask.long.word 0x1C 0.--15. 1. "GHWPARAMS7_15_0,USB3DR_RAM1_DEPTH" group.long 0xC160++0x3 line.long 0x0 "USB3DR_GBL_GDBGFIFOSPACE,USB3DR global debug queue/FIFO space available register" hexmask.long.word 0x0 16.--31. 1. "SPACE_AVAILABLE,SPACE_AVAILABLE" hexmask.long.word 0x0 0.--8. 1. "FIFO_QUEUE_SELECT,FIFO/queue select and port select" rgroup.long 0xC164++0xB line.long 0x0 "USB3DR_GBL_GDBGLTSSM,USB3DR global debug LTSSM register" bitfld.long 0x0 30. "RXELECIDLE,RxElecidle" "0,1" bitfld.long 0x0 29. "X3_XS_SWAPPING,a3_ds_swapping/a3_us_swapping/b3_ds_swapping/b3_us_swapping" "0,1" newline bitfld.long 0x0 28. "X3_DS_HOST_SHUTDOWN,a3_ds_host_shutdown/b3_ds_host_shutdown" "0,1" bitfld.long 0x0 27. "PRTDIRECTION,Port direction" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "LTDBTIMEOUT,LTDB Timeout (LTDBTimeout)" "0,1" hexmask.long.byte 0x0 22.--25. 1. "LTDBLINKSTATE,LTDB link state (LTDBLinkState)" newline hexmask.long.byte 0x0 18.--21. 1. "LTDBSUBSTATE,LTDB sub-state (LTDBSubState)" bitfld.long 0x0 17. "ELASTICBUFFERMODE,Elastic buffer mode (ElasticBufferMode)" "0,1" newline bitfld.long 0x0 16. "TXELECLDLE,TX elec idle (TxElecIdle)" "0,1" bitfld.long 0x0 15. "RXPOLARITY,RX polarity (RxPolarity)" "0,1" newline bitfld.long 0x0 14. "TXDETRXLOOPBACK,TX detect RX/loopback (TxDetRxLoopback)" "0,1" bitfld.long 0x0 11.--13. "LTDBPHYCMDSTATE,LTSSM PHY command state (LTDBPhyCmdState)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" newline bitfld.long 0x0 9.--10. "POWERDOWN,POWERDOWN (PowerDown)" "0,1,2,3" bitfld.long 0x0 8. "RXEQTRAIN,RxEq train" "0,1" newline bitfld.long 0x0 6.--7. "TXDEEMPHASIS,TXDEEMPHASIS (TxDeemphasis)" "0,1,2,3" bitfld.long 0x0 3.--5. "LTDBCLKSTATE,LTSSM clock state (LTDBClkState)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" newline bitfld.long 0x0 2. "TXSWING,TX swing (TxSwing)" "0,1" bitfld.long 0x0 1. "RXTERMINATION,RX termination (RxTermination)" "0,1" newline bitfld.long 0x0 0. "TXONESZEROS,TX Ones/Zeros (TxOnesZeros)" "0,1" line.long 0x4 "USB3DR_GBL_GDBGLNMCC,USB3DR global debug LNMCC register" hexmask.long.word 0x4 0.--8. 1. "LNMCC_BERC,This field indicates the bit error rate information for the port selected in the GDBGFIFOSPACE.PortSelect field." line.long 0x8 "USB3DR_GBL_GDBGBMU,USB3DR global debug BMU register" hexmask.long.tbyte 0x8 8.--31. 1. "BMU_BCU,BMU_BCU debug information" hexmask.long.byte 0x8 4.--7. 1. "BMU_DCU,BMU_DCU debug information" newline hexmask.long.byte 0x8 0.--3. 1. "BMU_CCU,BMU_CCU debug information" group.long 0xC170++0x3 line.long 0x0 "USB3DR_GBL_GDBGLSPMUX_HST,USB3DR global debug LSP MUX register - host" hexmask.long.byte 0x0 16.--23. 1. "LOGIC_ANALYZER_TRACE,logic_analyzer_trace port MUX select" hexmask.long.word 0x0 0.--13. 1. "HOSTSELECT,Device LSP select" rgroup.long 0xC174++0xB line.long 0x0 "USB3DR_GBL_GDBGLSP,USB3DR global debug LSP register" hexmask.long 0x0 0.--31. 1. "LSPDEBUG,LSP Debug Information" line.long 0x4 "USB3DR_GBL_GDBGEPINFO0,USB3DR global debug endpoint information register 0" hexmask.long 0x4 0.--31. 1. "EPDEBUG,Endpoint debug information bits[31:0]" line.long 0x8 "USB3DR_GBL_GDBGEPINFO1,USB3DR global debug endpoint information register 1" hexmask.long 0x8 0.--31. 1. "EPDEBUG,Endpoint debug information bits[63:32]" group.long 0xC180++0xF line.long 0x0 "USB3DR_GBL_GPRTBIMAP_HSLO,USB3DR global high-speed port to bus instance mapping register - low" hexmask.long.byte 0x0 28.--31. 1. "BINUM8,BINUM8: HS USB instance number for port 8." hexmask.long.byte 0x0 24.--27. 1. "BINUM7,BINUM7: HS USB instance number for port 7." newline hexmask.long.byte 0x0 20.--23. 1. "BINUM6,BINUM6 USB instance number for port 6." hexmask.long.byte 0x0 16.--19. 1. "BINUM5,BINUM5: HS USB instance number for port 5." newline hexmask.long.byte 0x0 12.--15. 1. "BINUM4,BINUM4: HS USB instance number for port 4." hexmask.long.byte 0x0 8.--11. 1. "BINUM3,BINUM3: HS USB instance number for port 3." newline hexmask.long.byte 0x0 4.--7. 1. "BINUM2,BINUM2: HS USB instance number for port 2." hexmask.long.byte 0x0 0.--3. 1. "BINUM1,BINUM1: HS USB instance number for port 1." line.long 0x4 "USB3DR_GBL_GPRTBIMAP_HSHI,USB3DR global high-speed port to bus instance mapping register - high" hexmask.long.byte 0x4 24.--27. 1. "BINUM15,BINUM15: HS USB instance number for port 15." hexmask.long.byte 0x4 20.--23. 1. "BINUM14,BINUM14: HS USB instance number for port 14." newline hexmask.long.byte 0x4 16.--19. 1. "BINUM13,BINUM13: HS USB instance number for port 13." hexmask.long.byte 0x4 12.--15. 1. "BINUM12,BINUM12: HS USB instance number for port 12." newline hexmask.long.byte 0x4 8.--11. 1. "BINUM11,BINUM11: HS USB Instance Number for 11." hexmask.long.byte 0x4 4.--7. 1. "BINUM10,BINUM10: HS USB instance number for port 10." newline hexmask.long.byte 0x4 0.--3. 1. "BINUM9,BINUM9: HS USB instance number for port 9." line.long 0x8 "USB3DR_GBL_GPRTBIMAP_FSLO,USB3DR global full-speed port to bus instance mapping register - low" hexmask.long.byte 0x8 28.--31. 1. "BINUM8,BINUM8: FS USB instance number for port 8." hexmask.long.byte 0x8 24.--27. 1. "BINUM7,BINUM7: FS USB instance number for port 7." newline hexmask.long.byte 0x8 20.--23. 1. "BINUM6,BINUM6: FS USB instance number for port 6." hexmask.long.byte 0x8 16.--19. 1. "BINUM5,BINUM5: FS USB instance number for port 5." newline hexmask.long.byte 0x8 12.--15. 1. "BINUM4,BINUM4: FS USB instance number for port 4." hexmask.long.byte 0x8 8.--11. 1. "BINUM3,BINUM3: FS USB instance number for port 3." newline hexmask.long.byte 0x8 4.--7. 1. "BINUM2,BINUM2: FS USB instance number for port 2." hexmask.long.byte 0x8 0.--3. 1. "BINUM1,BINUM1: FS USB instance number for port 1." line.long 0xC "USB3DR_GBL_GPRTBIMAP_FSHI,USB3DR global full-speed port to bus instance mapping register - high" hexmask.long.byte 0xC 24.--27. 1. "BINUM15,BINUM15: FS USB instance number for port 15." hexmask.long.byte 0xC 20.--23. 1. "BINUM14,BINUM14: FS USB instance number for port 14." newline hexmask.long.byte 0xC 16.--19. 1. "BINUM13,BINUM13: FS USB instance number for port 13." hexmask.long.byte 0xC 12.--15. 1. "BINUM12,BINUM12: FS USB instance number for port 12." newline hexmask.long.byte 0xC 8.--11. 1. "BINUM11,BINUM11: FS USB instance number for port 11." hexmask.long.byte 0xC 4.--7. 1. "BINUM10,BINUM10: FS USB instance number for port 10." newline hexmask.long.byte 0xC 0.--3. 1. "BINUM9,BINUM9: FS USB instance number for port 9." group.long 0xC19C++0x3 line.long 0x0 "USB3DR_GBL_GUCTL2,USB3DR global user control register 2" hexmask.long.byte 0x0 19.--25. 1. "EN_HP_PM_TIMER,This register field is used to set new HP and PM timers." hexmask.long.byte 0x0 15.--18. 1. "NOLOWPWRDUR,No low power duration (NOLOWPWRDUR)" newline bitfld.long 0x0 14. "RST_ACTBITLATER,Enable clearing of the command active bit for the ENDXFER command after the command execution is completed." "0,1" bitfld.long 0x0 12. "ENABLEEPCACHEEVICT,Enable evicting endpoint cache after flow control for bulk endpoints." "0,1" newline bitfld.long 0x0 11. "DISABLECFC,Disable xHCI errata feature contiguous frame ID capability" "0,1" hexmask.long.byte 0x0 5.--10. 1. "RXPINGDURATION,Receive ping maximum duration" newline hexmask.long.byte 0x0 0.--4. 1. "TXPINGDURATION,Transmit ping maximum duration" group.long 0xC200++0x3 line.long 0x0 "USB3DR_GBL_GUSB2PHYCFG,USB3DR global USB2 PHY configuration register" bitfld.long 0x0 31. "PHYSOFTRST,UTMI PHY soft reset (PHYSoftRst)" "0,1" bitfld.long 0x0 30. "U2_FREECLK_EXISTS,U2_FREECLK_EXISTS" "B_0x0,B_0x1" newline bitfld.long 0x0 29. "ULPI_LPM_WITH_OPMODE_CHK,ULPI_LPM_WITH_OPMODE_CHK" "B_0x0,B_0x1" rbitfld.long 0x0 27.--28. "HSIC_CON_WIDTH_ADJ,HSIC_CON_WIDTH_ADJ" "0,1,2,3" newline rbitfld.long 0x0 26. "INV_SEL_HSIC,INV_SEL_HSIC" "B_0x0,B_0x1" bitfld.long 0x0 22.--24. "LSTRD,LS Turnaround Time (LSTRDTIM)" "B_0x0,B_0x1,?,?,?,?,?,?" newline bitfld.long 0x0 19.--21. "LSIPD,LS Inter-Packet Time (LSIPD)" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x0 18. "ULPIEXTVBUSINDIACTOR,ULPI external VBUS indicator (ULPIExtVbusIndicator)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "ULPIEXTVBUSDRV,ULPI external VBUS drive (ULPIExtVbusDrv)" "B_0x0,B_0x1" bitfld.long 0x0 15. "ULPIAUTORES,ULPI auto resume (ULPIAutoRes)" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 10.--13. 1. "USBTRDTIM,USB 2.0 turnaround time (USBTrdTim)" bitfld.long 0x0 9. "XCVRDLY,Transceiver Delay:" "0,1" newline bitfld.long 0x0 8. "ENBLSLPM,Enable utmi_sleep_n and utmi_l1_suspend_n (EnblSlpM)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PHYSEL,USB 2.0 high-speed PHY or USB 1.1 full-speed serial transceiver select" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "SUSPENDUSB20,Suspend USB2.0 HS/FS/LS PHY (SusPHY)" "0,1" rbitfld.long 0x0 5. "FSINTF,Full-Speed serial interface select (FSIntf)" "B_0x0,B_0x1" newline rbitfld.long 0x0 4. "ULPI_UTMI_SEL,ULPI or UTMI+ select (ULPI_UTMI_Sel)" "B_0x0,B_0x1" bitfld.long 0x0 3. "PHYIF,PHY interface (PHYIf)" "B_0x0,B_0x1" newline bitfld.long 0x0 0.--2. "TOUTCAL,HS/FS timeout calibration (TOutCal)" "0,1,2,3,4,5,6,7" rgroup.long 0xC280++0x3 line.long 0x0 "USB3DR_GBL_GUSB2PHYACC_UTMI,USB3DR global USB 2.0 UTMI PHY vendor control register" bitfld.long 0x0 26. "DISUIPIDRVR,DISUIPIDRVR" "0,1" bitfld.long 0x0 25. "NEWREGREQ,New register request" "0,1" newline bitfld.long 0x0 24. "VSTSDONE,VSTSDONE" "0,1" bitfld.long 0x0 23. "VSTSBSY,VSTSBSY" "0,1" newline bitfld.long 0x0 22. "REGWR,Register write" "0,1" hexmask.long.byte 0x0 16.--21. 1. "REGADDR,Register address" newline hexmask.long.byte 0x0 8.--15. 1. "EXTREGADDR,EXTREGADDR" hexmask.long.byte 0x0 0.--7. 1. "REGDATA,REGDATA" group.long 0xC2C0++0x3 line.long 0x0 "USB3DR_GBL_GUSB3PIPECTL,USB3DR global USB 3.0 PIPE control register" bitfld.long 0x0 31. "PHYSOFTRST,USB3 PHY soft reset" "0,1" bitfld.long 0x0 30. "HSTPRTCMPL,HstPrtCmpl" "0,1" newline bitfld.long 0x0 29. "U2P3OK,P3 OK for U2 (u2P3ok)" "B_0x0,B_0x1" bitfld.long 0x0 28. "DISRXDETP3,Disabled receiver detection in P3 (DisRxDetP3)" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UX_EXIT_IN_PX,Ux exit in Px (Ux_exit_in_Px)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PING_ENHANCEMENT_EN,Ping enhancement enable (ping_enhancement_en)" "0,1" newline bitfld.long 0x0 25. "U1U2EXITFAIL_TO_RECOV,U1U2exitfail to recovery (u1u2exitfail_to_recov)" "0,1" bitfld.long 0x0 24. "REQUEST_P1P2P3,Always request P1/P2/P3 for U1/U2/U3 (request_p1p2p3)" "0,1" newline bitfld.long 0x0 23. "STARTRXDETU3RXDET,Start receiver detection in U3/RX.Detect (StartRxdetU3RxDet)" "0,1" bitfld.long 0x0 22. "DISRXDETU3RXDET,Disable receiver detection in U3/RX.Det" "0,1" newline bitfld.long 0x0 19.--21. "DELAYP1P2P3,Delay P1P2P3" "0,1,2,3,4,5,6,7" bitfld.long 0x0 18. "DELAYP1TRANS,Delay PHY power change from P0 to P1/P2/P3 when link state changing from U0 to U1/U2/U3 respectively." "B_0x0,B_0x1" newline bitfld.long 0x0 17. "SUSPENDENABLE,Suspend USB3.0 SS PHY (Suspend_en)" "0,1" rbitfld.long 0x0 15.--16. "DATWIDTH,PIPE data width (DatWidth)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 14. "ABORTRXDETINU2,Abort RX detect in U2 (AbortRxDetInU2)" "0,1" bitfld.long 0x0 13. "SKIPRXDET,Skip RX detect:" "0,1" newline bitfld.long 0x0 12. "LFPSP0ALGN,LFPS P0 Align:" "0,1" bitfld.long 0x0 11. "P3P2TRANOK,P3 P2 transitions OK (P3P2TranOK)" "0,1" newline bitfld.long 0x0 10. "P3EXSIGP2,P3 exit signal in P2 (P3ExSigP2)" "0,1" bitfld.long 0x0 9. "LFPSFILTER,LFPS filter (LFPSFilt)" "0,1" newline bitfld.long 0x0 8. "RX_DETECT_TO_POLLING_LFPS_CONTROL,RX_DETECT to Polling.LFPS control" "Default,B_0x1" bitfld.long 0x0 7. "SSICEN,USB3 SSIC enable (SSICEn)" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "TX_SWING,TX swing (TxSwing)" "0,1" bitfld.long 0x0 3.--5. "TX_MARGIN,TX Margin[2:0] (TxMargin)" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 1.--2. "SS_TX_DE_EMPHASIS,TX deemphasis (TxDeemphasis)" "0,1,2,3" bitfld.long 0x0 0. "ELASTIC_BUFFER_MODE,Elastic buffer mode (ElasticBufferMode)" "0,1" group.long 0xC300++0x2F line.long 0x0 "USB3DR_GBL_GTXFIFOSIZ0,USB3DR global transmit FIFO size register 0" hexmask.long.word 0x0 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM start address" hexmask.long.word 0x0 0.--15. 1. "TXFDEP_N,TxFIFO depth" line.long 0x4 "USB3DR_GBL_GTXFIFOSIZ1,USB3DR global transmit FIFO size register 1 GTXFIFOSIZ 1" hexmask.long.word 0x4 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM start address" hexmask.long.word 0x4 0.--15. 1. "TXFDEP_N,TXFDEP_N" line.long 0x8 "USB3DR_GBL_GTXFIFOSIZ2,USB3DR global transmit FIFO size register 2" hexmask.long.word 0x8 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM start address" hexmask.long.word 0x8 0.--15. 1. "TXFDEP_N,TxFIFO depth" line.long 0xC "USB3DR_GBL_GTXFIFOSIZ3,USB3DR global transmit FIFO size register 3" hexmask.long.word 0xC 16.--31. 1. "TXFSTADDR_N,transmit FIFOn RAM start address" hexmask.long.word 0xC 0.--15. 1. "TXFDEP_N,TxFIFO depth (TxFDep_n)" line.long 0x10 "USB3DR_GBL_GTXFIFOSIZ4,USB3DR global transmit FIFO size register 4" hexmask.long.word 0x10 16.--31. 1. "TXFSTADDR_N,TXFSTADDR_N" hexmask.long.word 0x10 0.--15. 1. "TXFDEP_N,TXFDEP_N: TxFIFO depth (TxFDep_n)" line.long 0x14 "USB3DR_GBL_GTXFIFOSIZ5,USB3DR global transmit FIFO size register 5" hexmask.long.word 0x14 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM start address" hexmask.long.word 0x14 0.--15. 1. "TXFDEP_N,TxFIFO depth" line.long 0x18 "USB3DR_GBL_GTXFIFOSIZ6,USB3DR global transmit FIFO size register 6" hexmask.long.word 0x18 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM start address" hexmask.long.word 0x18 0.--15. 1. "TXFDEP_N,TxFIFO depth" line.long 0x1C "USB3DR_GBL_GTXFIFOSIZ7,USB3DR global transmit FIFO size register 7" hexmask.long.word 0x1C 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM start address" hexmask.long.word 0x1C 0.--15. 1. "TXFDEP_N,TxFIFO depth" line.long 0x20 "USB3DR_GBL_GTXFIFOSIZ8,USB3DR global transmit FIFO size register 8" hexmask.long.word 0x20 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM start address" hexmask.long.word 0x20 0.--15. 1. "TXFDEP_N,TxFIFO depth" line.long 0x24 "USB3DR_GBL_GTXFIFOSIZ9,USB3DR global transmit FIFO size register 9" hexmask.long.word 0x24 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM start address" hexmask.long.word 0x24 0.--15. 1. "TXFDEP_N,TxFIFO depth" line.long 0x28 "USB3DR_GBL_GTXFIFOSIZ10,USB3DR global transmit FIFO size register 10" hexmask.long.word 0x28 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM Start address" hexmask.long.word 0x28 0.--15. 1. "TXFDEP_N,TxFIFO depth (TxFDep_n)" line.long 0x2C "USB3DR_GBL_GTXFIFOSIZ11,USB3DR global transmit FIFO size register 11" hexmask.long.word 0x2C 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM start address" hexmask.long.word 0x2C 0.--15. 1. "TXFDEP_N,TxFIFO depth" group.long 0xC380++0xB line.long 0x0 "USB3DR_GBL_GRXFIFOSIZ0,USB3DR global receive FIFO size register 0" hexmask.long.word 0x0 16.--31. 1. "RXFSTADDR_N,RxFIFOn RAM start address (RxFStAddr_n)" hexmask.long.word 0x0 0.--15. 1. "RXFDEP_N,RxFIFO depth (RxFDep_n)" line.long 0x4 "USB3DR_GBL_GRXFIFOSIZ1,USB3DR global receive FIFO size register 1" hexmask.long.word 0x4 16.--31. 1. "RXFSTADDR_N,RXFSTADDR_N" hexmask.long.word 0x4 0.--15. 1. "RXFDEP_N,RxFIFO depth" line.long 0x8 "USB3DR_GBL_GRXFIFOSIZ2,USB3DR global receive FIFO size register 2" hexmask.long.word 0x8 16.--31. 1. "RXFSTADDR_N,RXFSTADDR_N" hexmask.long.word 0x8 0.--15. 1. "RXFDEP_N,RxFIFO depth" group.long 0xC400++0xF line.long 0x0 "USB3DR_GBL_GEVNTADRLO,USB3DR global event buffer address low register" hexmask.long 0x0 0.--31. 1. "EVNTADRLO,Event buffer address (EvntAdrLo)" line.long 0x4 "USB3DR_GBL_GEVNTADRHI,USB3DR global event buffer address high register" hexmask.long 0x4 0.--31. 1. "EVNTADRHI,Event buffer address (EvntAdrHi)" line.long 0x8 "USB3DR_GBL_GEVNTSIZ,USB3DR global event buffer size register" bitfld.long 0x8 31. "EVNTINTRPTMASK,Event interrupt mask (EvntIntMask)." "0,1" hexmask.long.word 0x8 0.--15. 1. "EVENTSIZ,Event buffer size in bytes (EVNTSiz)" line.long 0xC "USB3DR_GBL_GEVNTCOUNT,USB3DR global event buffer count register" bitfld.long 0xC 31. "EVNT_HANDLER_BUSY,Event handler busy" "0,1" hexmask.long.word 0xC 0.--15. 1. "EVNTCOUNT,Event count (EVNTCount)" rgroup.long 0xC600++0x3 line.long 0x0 "USB3DR_GBL_GHWPARAMS8,USB3DR global hardware parameters register 8" hexmask.long 0x0 0.--31. 1. "GHWPARAMS8_32_0,USB3DR_DCACHE_DEPTH_INFO" group.long 0xC610++0x3 line.long 0x0 "USB3DR_GBL_GTXFIFOPRIDEV,USB3DR global device TX FIFO DMA priority register" hexmask.long.word 0x0 0.--11. 1. "GTXFIFOPRIDEV,Device TxFIFO priority" group.long 0xC618++0x7 line.long 0x0 "USB3DR_GBL_GTXFIFOPRIHST,USB3DR global host TX FIFO DMA priority register" bitfld.long 0x0 0.--2. "GTXFIFOPRIHST,Host TxFIFO priority" "0,1,2,3,4,5,6,7" line.long 0x4 "USB3DR_GBL_GRXFIFOPRIHST,USB3DR global host RX FIFO DMA priority register" bitfld.long 0x4 0.--2. "GRXFIFOPRIHST,Host RxFIFO priority" "0,1,2,3,4,5,6,7" group.long 0xC624++0x3 line.long 0x0 "USB3DR_GBL_GDMAHLRATIO,USB3DR global host FIFO DMA high-low priority ratio register" hexmask.long.byte 0x0 8.--12. 1. "HSTRXFIFO,Host RXFIFO DMA high-low priority" hexmask.long.byte 0x0 0.--4. 1. "HSTTXFIFO,Host TXFIFO DMA high-low priority" group.long 0xC630++0x3 line.long 0x0 "USB3DR_GBL_GFLADJ,USB3DR global frame length adjustment register" bitfld.long 0x0 31. "GFLADJ_REFCLK_240MHZDECR_PLS1,GFLADJ_REFCLK_240MHZDECR_PLS1" "0,1" hexmask.long.byte 0x0 24.--30. 1. "GFLADJ_REFCLK_240MHZ_DECR,This field indicates the decrement value that the controller applies for each ref_clk in order to derive a frame timer in terms of a 240MHz clock." newline bitfld.long 0x0 23. "GFLADJ_REFCLK_LPM_SEL,This bit enables the functionality of running SOF/ITP counters on the ref_clk." "0,1" hexmask.long.word 0x0 8.--21. 1. "GFLADJ_REFCLK_FLADJ,This field indicates the frame length adjustment to be applied when SOF/ITP counter is running on the ref_clk." newline bitfld.long 0x0 7. "GFLADJ_30MHZ_SDBND_SEL,GFLADJ_30MHZ_SDBND_SEL" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--5. 1. "GFLADJ_30MHZ,GFLADJ_30MHZ" group.long 0xC700++0x17 line.long 0x0 "USB3DR_DEV_DCFG,USB3DR device configuration register" bitfld.long 0x0 23. "IGNSTRMPP,IgnoreStreamPP" "0,1" bitfld.long 0x0 22. "LPMCAP,LPM capable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 17.--21. 1. "NUMP,Number of receive buffers." hexmask.long.byte 0x0 12.--16. 1. "INTRNUM,Interrupt number" newline hexmask.long.byte 0x0 3.--9. 1. "DEVADDR,Device address." bitfld.long 0x0 0.--2. "DEVSPD,Device speed." "B_0x0,B_0x1,?,?,B_0x4,?,?,?" line.long 0x4 "USB3DR_DEV_DCTL,USB3DR device control register" bitfld.long 0x4 31. "RUN_STOP,Run/stop" "0,1" bitfld.long 0x4 30. "CSFTRST,Core soft reset" "0,1" newline hexmask.long.byte 0x4 24.--28. 1. "HIRDTHRES,HIRD threshold (HIRD_Thres)" hexmask.long.byte 0x4 20.--23. 1. "LPM_NYET_THRES,LPM NYET threshold" newline bitfld.long 0x4 19. "KEEPCONNECT,Keep connect" "0,1" bitfld.long 0x4 18. "L1HIBERNATIONEN,L1HibernationEn" "0,1" newline bitfld.long 0x4 17. "CRS,Controller restore state (CRS)" "0,1" bitfld.long 0x4 16. "CSS,Controller save state (CSS)" "0,1" newline bitfld.long 0x4 12. "INITU2ENA,Initiate U2 enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "ACCEPTU2ENA,Accept U2 enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "INITU1ENA,Initiate U1 enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "ACCEPTU1ENA,Accept U1 enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 5.--8. 1. "ULSTCHNGREQ,ULSTCHNGREQ" hexmask.long.byte 0x4 1.--4. 1. "TSTCTL,Test control" line.long 0x8 "USB3DR_DEV_DEVTEN,USB3DR device event enable register" rbitfld.long 0x8 16. "ECCERREN,ECC error enable." "0,1" bitfld.long 0x8 14. "L1WKUPEVTEN,L1 resume detected event enable." "0,1" newline bitfld.long 0x8 12. "VENDEVTSTRCVDEN,Vendor device Test LMP received event (VndrDevTstRcvedEn)" "0,1" bitfld.long 0x8 9. "ERRTICERREVTEN,Erratic error event enable" "0,1" newline bitfld.long 0x8 8. "L1SUSPEN,L1 suspend event enable" "0,1" bitfld.long 0x8 7. "SOFTEVTEN,Start of (u)frame" "0,1" newline bitfld.long 0x8 6. "U3L2L1SUSPEN,U3/L2 or U3/L2L1 suspend event enable." "0,1" bitfld.long 0x8 5. "HIBERNATIONREQEVTEN,This bit enables/disables the generation of the hibernation request event." "0,1" newline bitfld.long 0x8 4. "WKUPEVTEN,U3/L2 or U3/L2L1 resume detected event enable." "0,1" bitfld.long 0x8 3. "ULSTCNGEN,USB/Link state change event enable" "0,1" newline bitfld.long 0x8 2. "CONNECTDONEEVTEN,Connection done enable" "0,1" bitfld.long 0x8 1. "USBRSTEVTEN,USB reset enable" "0,1" newline bitfld.long 0x8 0. "DISSCONNEVTEN,Disconnect detected event enable" "0,1" line.long 0xC "USB3DR_DEV_DSTS,USB3DR device status register" rbitfld.long 0xC 29. "DCNRD,Device controller not ready" "0,1" bitfld.long 0xC 28. "SRE,Save restore error" "0,1" newline rbitfld.long 0xC 25. "RSS,RSS restore state status" "0,1" rbitfld.long 0xC 24. "SSS,SSS save state status" "0,1" newline rbitfld.long 0xC 23. "COREIDLE,Core idle" "0,1" rbitfld.long 0xC 22. "DEVCTRLHLT,Device controller halted" "0,1" newline hexmask.long.byte 0xC 18.--21. 1. "USBLNKST,USBLNKST" rbitfld.long 0xC 17. "RXFIFOEMPTY,RxFIFO empty." "0,1" newline hexmask.long.word 0xC 3.--16. 1. "SOFFN,Frame/Microframe number of the received SOF." rbitfld.long 0xC 0.--2. "CONNECTSPD,Connected speed (ConnectSpd)" "B_0x0,B_0x1,?,?,B_0x4,?,?,?" line.long 0x10 "USB3DR_DEV_DGCMDPAR,USB3DR device generic command parameter register" hexmask.long 0x10 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x14 "USB3DR_DEV_DGCMD,USB3DR device generic command register" hexmask.long.byte 0x14 12.--15. 1. "CMDSTATUS,Command status" bitfld.long 0x14 10. "CMDACT,Command active" "0,1" newline bitfld.long 0x14 8. "CMDIOC,Command interrupt on complete" "0,1" hexmask.long.byte 0x14 0.--7. 1. "CMDTYP,Generic command type" group.long 0xC720++0x3 line.long 0x0 "USB3DR_DEV_DALEPENA,USB3DR device active USB endpoint enable register" hexmask.long 0x0 0.--31. 1. "USBACTEP,USBACTEP" group.long 0xC800++0x17F line.long 0x0 "USB3DR_DEV_DEPCMDPAR20,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x0 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x4 "USB3DR_DEV_DEPCMDPAR10,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x4 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x8 "USB3DR_DEV_DEPCMDPAR00,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x8 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xC "USB3DR_DEV_DEPCMD0,USB3DR device physical endpoint-n command register" hexmask.long.word 0xC 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0xC 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0xC 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0xC 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0xC 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0xC 0.--3. 1. "CMDTYP,Command type" line.long 0x10 "USB3DR_DEV_DEPCMDPAR21,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x10 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x14 "USB3DR_DEV_DEPCMDPAR11,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x14 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x18 "USB3DR_DEV_DEPCMDPAR01,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x18 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x1C "USB3DR_DEV_DEPCMD1,USB3DR device physical endpoint-n command register" hexmask.long.word 0x1C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x1C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x1C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x1C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x1C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x1C 0.--3. 1. "CMDTYP,Command type" line.long 0x20 "USB3DR_DEV_DEPCMDPAR22,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x20 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x24 "USB3DR_DEV_DEPCMDPAR12,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x24 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x28 "USB3DR_DEV_DEPCMDPAR02,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x28 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x2C "USB3DR_DEV_DEPCMD2,USB3DR device physical endpoint-n command register" hexmask.long.word 0x2C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x2C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x2C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x2C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x2C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x2C 0.--3. 1. "CMDTYP,Command type" line.long 0x30 "USB3DR_DEV_DEPCMDPAR23,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x30 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x34 "USB3DR_DEV_DEPCMDPAR13,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x34 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x38 "USB3DR_DEV_DEPCMDPAR03,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x38 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x3C "USB3DR_DEV_DEPCMD3,USB3DR device physical endpoint-n command register" hexmask.long.word 0x3C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x3C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x3C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x3C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x3C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x3C 0.--3. 1. "CMDTYP,Command type" line.long 0x40 "USB3DR_DEV_DEPCMDPAR24,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x40 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x44 "USB3DR_DEV_DEPCMDPAR14,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x44 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x48 "USB3DR_DEV_DEPCMDPAR04,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x48 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x4C "USB3DR_DEV_DEPCMD4,USB3DR device physical endpoint-n command register" hexmask.long.word 0x4C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x4C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x4C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x4C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x4C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x4C 0.--3. 1. "CMDTYP,Command type" line.long 0x50 "USB3DR_DEV_DEPCMDPAR25,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x50 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x54 "USB3DR_DEV_DEPCMDPAR15,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x54 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x58 "USB3DR_DEV_DEPCMDPAR05,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x58 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x5C "USB3DR_DEV_DEPCMD5,USB3DR device physical endpoint-n command register" hexmask.long.word 0x5C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x5C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x5C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x5C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x5C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x5C 0.--3. 1. "CMDTYP,Command type" line.long 0x60 "USB3DR_DEV_DEPCMDPAR26,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x60 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x64 "USB3DR_DEV_DEPCMDPAR16,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x64 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x68 "USB3DR_DEV_DEPCMDPAR06,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x68 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x6C "USB3DR_DEV_DEPCMD6,USB3DR device physical endpoint-n command register" hexmask.long.word 0x6C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x6C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x6C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x6C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x6C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x6C 0.--3. 1. "CMDTYP,Command type" line.long 0x70 "USB3DR_DEV_DEPCMDPAR27,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x70 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x74 "USB3DR_DEV_DEPCMDPAR17,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x74 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x78 "USB3DR_DEV_DEPCMDPAR07,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x78 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x7C "USB3DR_DEV_DEPCMD7,USB3DR device physical endpoint-n command register" hexmask.long.word 0x7C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x7C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x7C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x7C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x7C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x7C 0.--3. 1. "CMDTYP,Command type" line.long 0x80 "USB3DR_DEV_DEPCMDPAR28,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x80 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x84 "USB3DR_DEV_DEPCMDPAR18,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x84 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x88 "USB3DR_DEV_DEPCMDPAR08,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x88 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x8C "USB3DR_DEV_DEPCMD8,USB3DR device physical endpoint-n command register" hexmask.long.word 0x8C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x8C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x8C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x8C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x8C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x8C 0.--3. 1. "CMDTYP,Command type" line.long 0x90 "USB3DR_DEV_DEPCMDPAR29,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x90 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x94 "USB3DR_DEV_DEPCMDPAR19,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x94 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x98 "USB3DR_DEV_DEPCMDPAR09,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x98 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x9C "USB3DR_DEV_DEPCMD9,USB3DR device physical endpoint-n command register" hexmask.long.word 0x9C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x9C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x9C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x9C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x9C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x9C 0.--3. 1. "CMDTYP,Command type" line.long 0xA0 "USB3DR_DEV_DEPCMDPAR210,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0xA0 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xA4 "USB3DR_DEV_DEPCMDPAR110,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0xA4 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xA8 "USB3DR_DEV_DEPCMDPAR010,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0xA8 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xAC "USB3DR_DEV_DEPCMD10,USB3DR device physical endpoint-n command register" hexmask.long.word 0xAC 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0xAC 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0xAC 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0xAC 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0xAC 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0xAC 0.--3. 1. "CMDTYP,Command type" line.long 0xB0 "USB3DR_DEV_DEPCMDPAR211,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0xB0 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xB4 "USB3DR_DEV_DEPCMDPAR111,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0xB4 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xB8 "USB3DR_DEV_DEPCMDPAR011,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0xB8 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xBC "USB3DR_DEV_DEPCMD11,USB3DR device physical endpoint-n command register" hexmask.long.word 0xBC 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0xBC 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0xBC 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0xBC 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0xBC 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0xBC 0.--3. 1. "CMDTYP,Command type" line.long 0xC0 "USB3DR_DEV_DEPCMDPAR212,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0xC0 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xC4 "USB3DR_DEV_DEPCMDPAR112,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0xC4 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xC8 "USB3DR_DEV_DEPCMDPAR012,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0xC8 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xCC "USB3DR_DEV_DEPCMD12,USB3DR device physical endpoint-n command register" hexmask.long.word 0xCC 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0xCC 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0xCC 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0xCC 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0xCC 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0xCC 0.--3. 1. "CMDTYP,Command type" line.long 0xD0 "USB3DR_DEV_DEPCMDPAR213,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0xD0 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xD4 "USB3DR_DEV_DEPCMDPAR113,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0xD4 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xD8 "USB3DR_DEV_DEPCMDPAR013,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0xD8 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xDC "USB3DR_DEV_DEPCMD13,USB3DR device physical endpoint-n command register" hexmask.long.word 0xDC 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0xDC 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0xDC 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0xDC 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0xDC 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0xDC 0.--3. 1. "CMDTYP,Command type" line.long 0xE0 "USB3DR_DEV_DEPCMDPAR214,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0xE0 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xE4 "USB3DR_DEV_DEPCMDPAR114,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0xE4 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xE8 "USB3DR_DEV_DEPCMDPAR014,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0xE8 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xEC "USB3DR_DEV_DEPCMD14,USB3DR device physical endpoint-n command register" hexmask.long.word 0xEC 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0xEC 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0xEC 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0xEC 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0xEC 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0xEC 0.--3. 1. "CMDTYP,Command type" line.long 0xF0 "USB3DR_DEV_DEPCMDPAR215,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0xF0 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xF4 "USB3DR_DEV_DEPCMDPAR115,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0xF4 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xF8 "USB3DR_DEV_DEPCMDPAR015,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0xF8 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xFC "USB3DR_DEV_DEPCMD15,USB3DR device physical endpoint-n command register" hexmask.long.word 0xFC 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0xFC 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0xFC 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0xFC 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0xFC 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0xFC 0.--3. 1. "CMDTYP,Command type" line.long 0x100 "USB3DR_DEV_DEPCMDPAR216,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x100 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x104 "USB3DR_DEV_DEPCMDPAR116,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x104 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x108 "USB3DR_DEV_DEPCMDPAR016,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x108 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x10C "USB3DR_DEV_DEPCMD16,USB3DR device physical endpoint-n command register" hexmask.long.word 0x10C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x10C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x10C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x10C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x10C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x10C 0.--3. 1. "CMDTYP,Command type" line.long 0x110 "USB3DR_DEV_DEPCMDPAR217,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x110 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x114 "USB3DR_DEV_DEPCMDPAR117,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x114 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x118 "USB3DR_DEV_DEPCMDPAR017,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x118 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x11C "USB3DR_DEV_DEPCMD17,USB3DR device physical endpoint-n command register" hexmask.long.word 0x11C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x11C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x11C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x11C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x11C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x11C 0.--3. 1. "CMDTYP,Command type" line.long 0x120 "USB3DR_DEV_DEPCMDPAR218,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x120 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x124 "USB3DR_DEV_DEPCMDPAR118,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x124 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x128 "USB3DR_DEV_DEPCMDPAR018,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x128 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x12C "USB3DR_DEV_DEPCMD18,USB3DR device physical endpoint-n command register" hexmask.long.word 0x12C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x12C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x12C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x12C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x12C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x12C 0.--3. 1. "CMDTYP,Command type" line.long 0x130 "USB3DR_DEV_DEPCMDPAR219,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x130 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x134 "USB3DR_DEV_DEPCMDPAR119,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x134 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x138 "USB3DR_DEV_DEPCMDPAR019,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x138 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x13C "USB3DR_DEV_DEPCMD19,USB3DR device physical endpoint-n command register" hexmask.long.word 0x13C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x13C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x13C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x13C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x13C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x13C 0.--3. 1. "CMDTYP,Command type" line.long 0x140 "USB3DR_DEV_DEPCMDPAR220,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x140 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x144 "USB3DR_DEV_DEPCMDPAR120,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x144 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x148 "USB3DR_DEV_DEPCMDPAR020,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x148 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x14C "USB3DR_DEV_DEPCMD20,USB3DR device physical endpoint-n command register" hexmask.long.word 0x14C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x14C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x14C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x14C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x14C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x14C 0.--3. 1. "CMDTYP,Command type" line.long 0x150 "USB3DR_DEV_DEPCMDPAR221,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x150 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x154 "USB3DR_DEV_DEPCMDPAR121,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x154 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x158 "USB3DR_DEV_DEPCMDPAR021,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x158 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x15C "USB3DR_DEV_DEPCMD21,USB3DR device physical endpoint-n command register" hexmask.long.word 0x15C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x15C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x15C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x15C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x15C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x15C 0.--3. 1. "CMDTYP,Command type" line.long 0x160 "USB3DR_DEV_DEPCMDPAR222,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x160 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x164 "USB3DR_DEV_DEPCMDPAR122,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x164 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x168 "USB3DR_DEV_DEPCMDPAR022,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x168 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x16C "USB3DR_DEV_DEPCMD22,USB3DR device physical endpoint-n command register" hexmask.long.word 0x16C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x16C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x16C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x16C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x16C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x16C 0.--3. 1. "CMDTYP,Command type" line.long 0x170 "USB3DR_DEV_DEPCMDPAR223,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x170 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x174 "USB3DR_DEV_DEPCMDPAR123,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x174 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x178 "USB3DR_DEV_DEPCMDPAR023,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x178 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x17C "USB3DR_DEV_DEPCMD23,USB3DR device physical endpoint-n command register" hexmask.long.word 0x17C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x17C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x17C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x17C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x17C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x17C 0.--3. 1. "CMDTYP,Command type" group.long 0xCA00++0x3 line.long 0x0 "USB3DR_DEV_IMOD,USB3DR device interrupt moderation register" hexmask.long.word 0x0 16.--31. 1. "DEVICE_IMODC,Interrupt moderation down counter" hexmask.long.word 0x0 0.--15. 1. "DEVICE_IMODI,Moderation interval (DEVICE_IMODI)" group.long 0xCC30++0x3 line.long 0x0 "USB3DR_BC_BCFG,USB3DR battery charger configuration register" bitfld.long 0x0 1. "IDDIG_SEL,IDDIG select" "B_0x0,B_0x1" bitfld.long 0x0 0. "CHIRP_EN,Chirp enable" "0,1" group.long 0xCC38++0x7 line.long 0x0 "USB3DR_BC_BCEVT,USB3DR battery charger event register" bitfld.long 0x0 24. "MV_CHNGEVNT,Multi-valued input changed event:" "0,1" hexmask.long.byte 0x0 0.--4. 1. "MULTVALIDBC,Multi valued ID pin" line.long 0x4 "USB3DR_BC_BCEVTEN,USB3DR battery charger event enable register" bitfld.long 0x4 24. "MV_CHNGEVNTENA,BCEvtInfoEna[0]" "0,1" group.long 0xD000++0x3 line.long 0x0 "USB3DR_LINK_LU1LFPSRXTIM,USB3DR U1/U2 LFPS RX timer register" hexmask.long.byte 0x0 8.--15. 1. "U1U2_LFPS_EXIT_RX_CLK,Programmable U1U2 LFPS EXIT RX CLKS" hexmask.long.byte 0x0 0.--7. 1. "U1U2_EXIT_RSP_RX_CLK,Programmable U1U2 EXIT RESP RX CLKS" group.long 0xD020++0xB line.long 0x0 "USB3DR_LINK_SETTINGS,USB3DR link setting register" bitfld.long 0x0 28.--30. "U1_RESID_TIMER_US,Programmable U1 MIN RESIDENCY TIMER" "0,1,2,3,4,5,6,7" bitfld.long 0x0 24.--26. "PM_LC_TIMER_US,Programmable PM_LC_TIMER" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 20.--23. 1. "PM_ENTRY_TIMER_US,Programmable PM_ENTRY_TIMER" line.long 0x4 "USB3DR_LINK_LLUCTL,USB3DR link user control register" bitfld.long 0x4 29. "SUPPORT_P4_PG,PHY P4 power gate mode (PG) is enabled." "0,1" bitfld.long 0x4 28. "SUPPORT_P4,Support PHY P3.CPM and P4 power states." "0,1" newline bitfld.long 0x4 23. "DISRXDET_LTSSM_TIMER_OVRRD,DisRxDet_LTSSM_Timer_Ovrrd." "0,1" bitfld.long 0x4 12. "U2P3CPMOK,P3CPM OK for U2/SSInactive (U2P3CPMok)" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "EN_RESET_PIPE_AFTER_PHY_MUX,en_reset_pipe_after_phy_mux." "0,1" bitfld.long 0x4 7. "MASK_PIPE_RESET,Mask pipe reset." "0,1" newline bitfld.long 0x4 5. "NO_UX_EXIT_P0_TRANS,no_ux_exit_p0_trans." "0,1" line.long 0x8 "USB3DR_LINK_LPTMDPDELAY,USB3DR link datapath delay register" hexmask.long.word 0x8 10.--21. 1. "P3CPMP4_RESIDENCY,p3cpmp4 residency timer value." tree.end tree "USB3DR_S" base ad:0x58300000 group.long 0xC100++0x1F line.long 0x0 "USB3DR_GBL_GSBUSCFG0,USB3DR global device bus configuration register 0" hexmask.long.byte 0x0 28.--31. 1. "DATRDREQINFO,AHB-prot/AXI-cache/OCP-ReqInfo for data read (DatRdReqInfo)" hexmask.long.byte 0x0 24.--27. 1. "DESRDREQINFO,AHB-prot/AXI-cache/OCP-ReqInfo for descriptor read (DesRdReqInfo)" newline hexmask.long.byte 0x0 20.--23. 1. "DATWRREQINFO,AHB-prot/AXI-cache/OCP-ReqInfo for data write (DatWrReqInfo)" hexmask.long.byte 0x0 16.--19. 1. "DESWRREQINFO,AHB-prot/AXI-cache/OCP-ReqInfo for descriptor write (DesWrReqInfo)." newline bitfld.long 0x0 11. "DATBIGEND,Data access is big endian" "B_0x0,B_0x1" bitfld.long 0x0 10. "DESBIGEND,Descriptor access is big endian" "B_0x0,B_0x1" newline bitfld.long 0x0 7. "INCR256BRSTENA,INCR256 burst type enable" "0,1" bitfld.long 0x0 6. "INCR128BRSTENA,INCR128 burst type enable" "0,1" newline bitfld.long 0x0 5. "INCR64BRSTENA,INCR64 burst type enable" "0,1" bitfld.long 0x0 4. "INCR32BRSTENA,INCR32 burst type enable" "0,1" newline bitfld.long 0x0 3. "INCR16BRSTENA,INCR16 burst type enable" "0,1" bitfld.long 0x0 2. "INCR8BRSTENA,INCR8 burst type enable" "0,1" newline bitfld.long 0x0 1. "INCR4BRSTENA,INCR4 burst type enable" "0,1" bitfld.long 0x0 0. "INCRBRSTENA,Undefined length INCR burst type enable (INCRBrstEna)" "B_0x0,B_0x1" line.long 0x4 "USB3DR_GBL_GSBUSCFG1,USB3DR global bus configuration register 1" bitfld.long 0x4 12. "EN1KPAGE,1K page boundary enable" "0,1" hexmask.long.byte 0x4 8.--11. 1. "PIPETRANSLIMIT,AXI pipelined transfers burst request limit" line.long 0x8 "USB3DR_GBL_GTXTHRCFG,USB3DR global TX threshold control register" bitfld.long 0x8 29. "USBTXPKTCNTSEL,USB transmit packet count enable" "B_0x0,B_0x1" hexmask.long.byte 0x8 24.--27. 1. "USBTXPKTCNT,USB transmit packet count" newline hexmask.long.byte 0x8 16.--23. 1. "USBMAXTXBURSTSIZE,USB maximum TX burst size" line.long 0xC "USB3DR_GBL_GRXTHRCFG,USB3DR global RX threshold control register" bitfld.long 0xC 29. "USBRXPKTCNTSEL,USB receive packet count enable" "B_0x0,B_0x1" hexmask.long.byte 0xC 24.--27. 1. "USBRXPKTCNT,USB receive packet count" newline hexmask.long.byte 0xC 19.--23. 1. "USBMAXRXBURSTSIZE,USB maximum receive burst size" hexmask.long.word 0xC 0.--12. 1. "RESVISOCOUTSPC,Space reserved in RX FIFO for ISOC OUT" line.long 0x10 "USB3DR_GBL_GCTL,USB3DR global control register" hexmask.long.word 0x10 19.--31. 1. "PWRDNSCALE,Power down scale (PwrDnScale)" bitfld.long 0x10 18. "MASTERFILTBYPASS,Master filter bypass" "B_0x0,B_0x1" newline bitfld.long 0x10 17. "BYPSSETADDR,Bypass SetAddress in Device mode" "0,1" bitfld.long 0x10 16. "U2RSTECN,U2RSTECN" "0,1" newline bitfld.long 0x10 14.--15. "FRMSCLDWN,FRMSCLDWN" "B_0x0_SS_HS_MODE_,B_0x1_SS_HS_MODE_,?,?" bitfld.long 0x10 12.--13. "PRTCAPDIR,Port capability direction (PrtCapDir)" "?,B_0x1,B_0x2,B_0x3" newline bitfld.long 0x10 11. "CORESOFTRESET,Core soft reset (CoreSoftReset)" "B_0x0,B_0x1" bitfld.long 0x10 10. "SOFITPSYNC,SOFITPSYNC" "0,1" newline bitfld.long 0x10 9. "U1U2TIMERSCALE,Disable U1/U2 timer scaledown (U1U2TimerScale)" "0,1" bitfld.long 0x10 8. "DEBUGATTACH,Debug attach" "0,1" newline bitfld.long 0x10 6.--7. "RAMCLKSEL,RAM clock select (RAMClkSel)" "B_0x0,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 4.--5. "SCALEDOWN,Scale-down mode (ScaleDown)" "B_0x0_HS_FS_LS_MODES,B_0x1_HS_FS_LS_MODES,B_0x2_HS_FS_LS_MODES,B_0x3_HS_FS_LS_MODES" newline bitfld.long 0x10 3. "DISSCRAMBLE,Disable scrambling (DisScramble)" "0,1" bitfld.long 0x10 2. "U2EXIT_LFPS,U2EXIT_LFPS" "B_0x0,B_0x1" newline rbitfld.long 0x10 1. "GBLHIBERNATIONEN,GblHibernationEn" "0,1" bitfld.long 0x10 0. "DSBLCLKGTNG,Disable clock gating (DsblClkGtng)" "0,1" line.long 0x14 "USB3DR_GBL_GPMSTS,USB3DR global power management status register" hexmask.long.byte 0x14 28.--31. 1. "PORTSEL,Global power management status register PortSel" hexmask.long.byte 0x14 12.--16. 1. "U3WAKEUP,U3Wakeup" newline hexmask.long.word 0x14 0.--9. 1. "U2WAKEUP,U2Wakeup" line.long 0x18 "USB3DR_GBL_GSTS,USB3DR global status register" hexmask.long.word 0x18 20.--31. 1. "CBELT,Current BELT value" rbitfld.long 0x18 11. "SSIC_IP,SSIC interrupt pending (SSIC_IP)" "0,1" newline rbitfld.long 0x18 10. "OTG_IP,OTG interrupt pending" "0,1" rbitfld.long 0x18 9. "BC_IP,Battery charger interrupt pending" "0,1" newline rbitfld.long 0x18 8. "ADP_IP,ADP interrupt pending" "0,1" rbitfld.long 0x18 7. "HOST_IP,Host interrupt pending:" "0,1" newline rbitfld.long 0x18 6. "DEVICE_IP,Device interrupt pending" "0,1" bitfld.long 0x18 5. "CSRTIMEOUT,CSR timeout" "0,1" newline bitfld.long 0x18 4. "BUSERRADDRVLD,Bus error address valid (BusErrAddrVld)" "0,1" rbitfld.long 0x18 0.--1. "CURMOD,Current mode of operation (CurMod)" "B_0x0,B_0x1,?,?" line.long 0x1C "USB3DR_GBL_GUCTL1,USB3DR global user control register 1" bitfld.long 0x1C 31. "DEV_DECOUPLE_L1L2_EVT,DEV_DECOUPLE_L1L2_EVT" "B_0x0,B_0x1" bitfld.long 0x1C 30. "DS_RXDET_MAX_TOUT_CTRL,DS_RXDET_MAX_TOUT_CTRL" "B_0x0,B_0x1" newline bitfld.long 0x1C 29. "FILTER_SE0_FSLS_EOP,FILTER_SE0_FSLS_EOP" "B_0x0,B_0x1" bitfld.long 0x1C 28. "TX_IPGAP_LINECHECK_DIS,TX_IPGAP_LINECHECK_DIS" "B_0x0,B_0x1" newline bitfld.long 0x1C 27. "DEV_TRB_OUT_SPR_IND,DEV_TRB_OUT_SPR_IND" "B_0x0,B_0x1" bitfld.long 0x1C 26. "DEV_FORCE_20_CLK_FOR_30_CLK,DEV_FORCE_20_CLK_FOR_30_CLK" "B_0x0,B_0x1" newline bitfld.long 0x1C 25. "P3_IN_U2,P3_IN_U2" "B_0x0,B_0x1" bitfld.long 0x1C 24. "DEV_L1_EXIT_BY_HW,DEV_L1_EXIT_BY_HW" "B_0x0,B_0x1" newline bitfld.long 0x1C 21.--23. "IP_GAP_ADD_ON,This register field is used to add up to the default inter packet gap setting in the USB 2.0 MAC." "0,1,2,3,4,5,6,7" bitfld.long 0x1C 20. "DEV_LSP_TAIL_LOCK_DIS,DEV_LSP_TAIL_LOCK_DIS" "B_0x0,B_0x1" newline bitfld.long 0x1C 19. "NAK_PER_ENH_FS,NAK_PER_ENH_FS" "B_0x0,B_0x1" bitfld.long 0x1C 18. "NAK_PER_ENH_HS,NAK_PER_ENH_HS" "B_0x0,B_0x1" newline bitfld.long 0x1C 17. "PARKMODE_DISABLE_SS,PARKMODE_DISABLE_SS" "0,1" bitfld.long 0x1C 16. "PARKMODE_DISABLE_HS,PARKMODE_DISABLE_HS" "0,1" newline bitfld.long 0x1C 15. "PARKMODE_DISABLE_FSLS,PARKMODE_DISABLE_FSLS" "0,1" bitfld.long 0x1C 10. "RESUME_OPMODE_HS_HOST,RESUME_OPMODE_HS_HOST" "0,1" newline bitfld.long 0x1C 9. "DEV_HS_NYET_BULK_SPR,DEV_HS_NYET_BULK_SPR" "B_0x0,B_0x1" bitfld.long 0x1C 8. "L1_SUSP_THRLD_EN_FOR_HOST,L1_SUSP_THRLD_EN_FOR_HOST" "0,1" newline hexmask.long.byte 0x1C 4.--7. 1. "L1_SUSP_THRLD_FOR_HOST,L1_SUSP_THRLD_FOR_HOST" bitfld.long 0x1C 3. "HC_ERRATA_ENABLE,Host ELD Enable (HELDEn)" "0,1" newline bitfld.long 0x1C 2. "HC_PARCHK_DISABLE,Host parameter check disable (HParChkDisable)" "0,1" bitfld.long 0x1C 1. "OVRLD_L1_SUSP_COM,OVRLD_L1_SUSP_COM" "0,1" newline bitfld.long 0x1C 0. "LOA_FILTER_EN,LOA_FILTER_EN" "0,1" rgroup.long 0xC120++0x3 line.long 0x0 "USB3DR_GBL_GSNPSID,USB3DR global Synopsys ID register" hexmask.long 0x0 0.--31. 1. "SYNOPSYSID,Synopsys ID" group.long 0xC124++0xB line.long 0x0 "USB3DR_GBL_GGPIO,USB3DR global general purpose input/output register" hexmask.long.word 0x0 16.--31. 1. "GPO,General purpose output" hexmask.long.word 0x0 0.--15. 1. "GPI,General purpose input" line.long 0x4 "USB3DR_GBL_GUID,USB3DR global user ID register" hexmask.long 0x4 0.--31. 1. "USERID,USERID" line.long 0x8 "USB3DR_GBL_GUCTL,USB3DR global user control register" hexmask.long.word 0x8 22.--31. 1. "REFCLKPER,REFCLKPER" bitfld.long 0x8 21. "NOEXTRDL,No extra delay between SOF and the first Packet(NoExtrDl)" "B_0x0,B_0x1" newline bitfld.long 0x8 17. "SPRSCTRLTRANSEN,Sparse control transaction enable" "0,1" bitfld.long 0x8 16. "RESBWHSEPS,Reserving 85% bandwidth for HS periodic EPs (ResBwHSEPS)" "0,1" newline bitfld.long 0x8 14. "USBHSTINAUTORETRYEN,Host IN auto retry (USBHstInAutoRetryEn)" "B_0x0,B_0x1" bitfld.long 0x8 13. "ENOVERLAPCHK,Enable check for LFPS overlap during remote Ux exit:" "B_0x0,B_0x1" newline bitfld.long 0x8 12. "EXTCAPSUPPTEN,External extended capability support enable (ExtCapSuptEN)" "0,1" bitfld.long 0x8 11. "INSRTEXTRFSBODI,Insert extra delay between FS bulk OUT transactions (InsrtExtrFSBODl)" "B_0x0,B_0x1" newline bitfld.long 0x8 9.--10. "DTCT,Device timeout coarse tuning (DTCT)" "B_0x0,B_0x1,B_0x2,B_0x3" hexmask.long.word 0x8 0.--8. 1. "DTFT,Device timeout fine tuning (DTFT)" rgroup.long 0xC130++0x7 line.long 0x0 "USB3DR_GBL_GBUSERRADDRLO,USB3DR global bus error address register - low" hexmask.long 0x0 0.--31. 1. "BUSERRADDR,Bus address low (BusAddrLo)" line.long 0x4 "USB3DR_GBL_GBUSERRADDRHI,USB3DR gobal bus error address register - high" hexmask.long 0x4 0.--31. 1. "BUSERRADDR,Bus address high (BusAddrHi)" group.long 0xC138++0x7 line.long 0x0 "USB3DR_GBL_GPRTBIMAPLO,USB3DR global SS port to bus instance mapping register - low" hexmask.long.byte 0x0 28.--31. 1. "BINUM8,SS USB instance number for port 8." hexmask.long.byte 0x0 24.--27. 1. "BINUM7,SS USB instance number for port 7." newline hexmask.long.byte 0x0 20.--23. 1. "BINUM6,SS USB instance number for port 6." hexmask.long.byte 0x0 16.--19. 1. "BINUM5,SS USB instance number for port 5." newline hexmask.long.byte 0x0 12.--15. 1. "BINUM4,SS USB instance number for port 4." hexmask.long.byte 0x0 8.--11. 1. "BINUM3,SS USB instance number for port 3." newline hexmask.long.byte 0x0 4.--7. 1. "BINUM2,SS USB instance number for port 2." hexmask.long.byte 0x0 0.--3. 1. "BINUM1,SS USB instance number for port 1." line.long 0x4 "USB3DR_GBL_GPRTBIMAPHI,USB3DR global SS port to bus instance mapping register - high" hexmask.long.byte 0x4 24.--27. 1. "BINUM15,SS USB instance number for port 15." hexmask.long.byte 0x4 20.--23. 1. "BINUM14,SS USB instance number for port 14." newline hexmask.long.byte 0x4 16.--19. 1. "BINUM13,SS USB instance number for port 13." hexmask.long.byte 0x4 12.--15. 1. "BINUM12,SS USB instance number for port 12." newline hexmask.long.byte 0x4 8.--11. 1. "BINUM11,SS USB instance number for port 11." hexmask.long.byte 0x4 4.--7. 1. "BINUM10,SS USB instance number for port 10." newline hexmask.long.byte 0x4 0.--3. 1. "BINUM9,SS USB instance number for port 9." rgroup.long 0xC140++0x1F line.long 0x0 "USB3DR_GBL_GHWPARAMS0,USB3DR global hardware parameters register 0" hexmask.long.byte 0x0 24.--31. 1. "GHWPARAMS0_31_24,USB3DR_AWIDTH" hexmask.long.byte 0x0 16.--23. 1. "GHWPARAMS0_23_16,USB3DR_SDWIDTH" newline hexmask.long.byte 0x0 8.--15. 1. "GHWPARAMS0_15_8,USB3DR_MDWIDTH" bitfld.long 0x0 6.--7. "GHWPARAMS0_7_6,USB3DR_SBUS_TYPE" "0,1,2,3" newline bitfld.long 0x0 3.--5. "GHWPARAMS0_5_3,USB3DR_MBUS_TYPE" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "GHWPARAMS0_2_0,USB3DR_MODE" "0,1,2,3,4,5,6,7" line.long 0x4 "USB3DR_GBL_GHWPARAMS1,USB3DR global hardware parameters register 1" bitfld.long 0x4 31. "GHWPARAMS1_31,USB3DR_EN_DBC" "0,1" bitfld.long 0x4 30. "GHWPARAMS1_30,USB3DR_RM_OPT_FEATURES" "0,1" newline bitfld.long 0x4 28. "GHWPARAMS1_28,USB3DR_RAM_BUS_CLKS_SYNC" "0,1" bitfld.long 0x4 27. "GHWPARAMS1_27,USB3DR_MAC_RAM_CLKS_SYNC" "0,1" newline bitfld.long 0x4 26. "GHWPARAMS1_26,USB3DR_MAC_PHY_CLKS_SYNC" "0,1" bitfld.long 0x4 24.--25. "GHWPARAMS1_25_24,USB3DR_EN_PWROPT" "0,1,2,3" newline bitfld.long 0x4 23. "GHWPARAMS1_23,USB3DR_SPRAM_TYP" "0,1" bitfld.long 0x4 21.--22. "GHWPARAMS1_22_21,USB3DR_NUM_RAMS" "0,1,2,3" newline hexmask.long.byte 0x4 15.--20. 1. "GHWPARAMS1_20_15,USB3DR_DEVICE_NUM_INT" bitfld.long 0x4 12.--14. "GHWPARAMS1_14_12,USB3DR_ASPACEWIDTH" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 9.--11. "GHWPARAMS1_11_9,USB3DR_REQINFOWIDTH" "0,1,2,3,4,5,6,7" bitfld.long 0x4 6.--8. "GHWPARAMS1_8_6,USB3DR_DATAINFOWIDTH" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 3.--5. "GHWPARAMS1_5_3,USB3DR_BURSTWIDTH-1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0.--2. "GHWPARAMS1_2_0,USB3DR_IDWIDTH-1" "0,1,2,3,4,5,6,7" line.long 0x8 "USB3DR_GBL_GHWPARAMS2,USB3DR global hardware parameters register 2" hexmask.long 0x8 0.--31. 1. "GHWPARAMS2_31_0,USB3DR_USERID" line.long 0xC "USB3DR_GBL_GHWPARAMS3,USB3DR global hardware parameters register 3" hexmask.long.byte 0xC 23.--30. 1. "GHWPARAMS3_30_23,USB3DR_CACHE_TOTAL_XFER_RESOURCES" hexmask.long.byte 0xC 18.--22. 1. "GHWPARAMS3_22_18,USB3DR_NUM_IN_EPS" newline hexmask.long.byte 0xC 12.--17. 1. "GHWPARAMS3_17_12,USB3DR_NUM_EPS" bitfld.long 0xC 11. "GHWPARAMS3_11,USB3DR_ULPI_CARKIT" "0,1" newline bitfld.long 0xC 10. "GHWPARAMS3_10,USB3DR_VENDOR_CTL_INTERFACE" "0,1" bitfld.long 0xC 6.--7. "GHWPARAMS3_7_6,USB3DR_HSPHY_DWIDTH" "0,1,2,3" newline bitfld.long 0xC 4.--5. "GHWPARAMS3_5_4,USB3DR_FSPHY_INTERFACE" "0,1,2,3" bitfld.long 0xC 2.--3. "GHWPARAMS3_3_2,USB3DR_HSPHY_INTERFACE" "0,1,2,3" newline bitfld.long 0xC 0.--1. "GHWPARAMS3_1_0,USB3DR_SSPHY_INTERFACE" "0,1,2,3" line.long 0x10 "USB3DR_GBL_GHWPARAMS4,USB3DR global hardware parameters register 4" hexmask.long.byte 0x10 28.--31. 1. "GHWPARAMS4_31_28,USB3DR_BMU_LSP_DEPTH" hexmask.long.byte 0x10 24.--27. 1. "GHWPARAMS4_27_24,USB3DR_BMU_PTL_DEPTH-1" newline bitfld.long 0x10 23. "GHWPARAMS4_23,USB3DR_EN_ISOC_SUPT" "0,1" bitfld.long 0x10 21. "GHWPARAMS4_21,USB3DR_EXT_BUFF_CONTROL" "0,1" newline hexmask.long.byte 0x10 17.--20. 1. "GHWPARAMS4_20_17,USB3DR_NUM_SS_USB_INSTANCES" hexmask.long.byte 0x10 13.--16. 1. "GHWPARAMS4_16_13,USB3DR_HIBER_SCRATCHBUFS" newline bitfld.long 0x10 12. "GHWPARAMS4_12,USB3DR_EN_SSIC" "B_0x0,B_0x1" bitfld.long 0x10 11. "GHWPARAMS4_11,USB3DR_SSIC_NON_SNPS_MPHY" "B_0x0,B_0x1" newline bitfld.long 0x10 9.--10. "GHWPARAMS4_10_9,USB3DR_SSIC_GEAR" "?,B_0x1,B_0x2,B_0x3" bitfld.long 0x10 7.--8. "GHWPARAMS4_8_7,USB3DR_NUM_SSIC_NUM_LANE" "B_0x0,B_0x1,B_0x2,?" newline hexmask.long.byte 0x10 0.--5. 1. "GHWPARAMS4_5_0,USB3DR_CACHE_TRBS_PER_TRANSFER" line.long 0x14 "USB3DR_GBL_GHWPARAMS5,USB3DR global hardware parameters register 5" hexmask.long.byte 0x14 22.--27. 1. "GHWPARAMS5_27_22,USB3DR_DFQ_FIFO_DEPTH" hexmask.long.byte 0x14 16.--21. 1. "GHWPARAMS5_21_16,USB3DR_DWQ_FIFO_DEPTH" newline hexmask.long.byte 0x14 10.--15. 1. "GHWPARAMS5_15_10,USB3DR_TXQ_FIFO_DEPTH" hexmask.long.byte 0x14 4.--9. 1. "GHWPARAMS5_9_4,USB3DR_RXQ_FIFO_DEPTH" newline hexmask.long.byte 0x14 0.--3. 1. "GHWPARAMS5_3_0,USB3DR_BMU_BUSGM_DEPTH" line.long 0x18 "USB3DR_GBL_GHWPARAMS6,USB3DR global hardware parameters register 6" hexmask.long.word 0x18 16.--31. 1. "GHWPARAMS6_31_16,USB3DR_RAM0_DEPTH" bitfld.long 0x18 15. "BUSFLTRSSUPPORT,USB3DR_EN_BUS_FILTERS" "0,1" newline bitfld.long 0x18 14. "BCSUPPORT,USB3DR_EN_BC" "0,1" bitfld.long 0x18 13. "OTG_SS_SUPPORT,OTG 3.0 support enabled" "B_0x0,B_0x1" newline bitfld.long 0x18 12. "ADPSUPPORT,USB3DR_EN_ADP" "0,1" bitfld.long 0x18 11. "HNPSUPPORT,RSP/HNP support enabled" "B_0x0_USB3DR_EN_OTG_EQUAL2,B_0x1_USB3DR_EN_OTG_EQUAL2" newline bitfld.long 0x18 10. "SRPSUPPORT,SRP support enabled" "B_0x0,B_0x1" bitfld.long 0x18 7. "GHWPARAMS6_7,USB3DR_EN_FPGA" "0,1" newline bitfld.long 0x18 6. "GHWPARAMS6_6,USB3DR_EN_DBG_PORTS" "0,1" hexmask.long.byte 0x18 0.--5. 1. "GHWPARAMS6_5_0,USB3DR_PSQ_FIFO_DEPTH" line.long 0x1C "USB3DR_GBL_GHWPARAMS7,USB3DR global hardware parameters register 7" hexmask.long.word 0x1C 16.--31. 1. "GHWPARAMS7_31_16,USB3DR_RAM2_DEPTH" hexmask.long.word 0x1C 0.--15. 1. "GHWPARAMS7_15_0,USB3DR_RAM1_DEPTH" group.long 0xC160++0x3 line.long 0x0 "USB3DR_GBL_GDBGFIFOSPACE,USB3DR global debug queue/FIFO space available register" hexmask.long.word 0x0 16.--31. 1. "SPACE_AVAILABLE,SPACE_AVAILABLE" hexmask.long.word 0x0 0.--8. 1. "FIFO_QUEUE_SELECT,FIFO/queue select and port select" rgroup.long 0xC164++0xB line.long 0x0 "USB3DR_GBL_GDBGLTSSM,USB3DR global debug LTSSM register" bitfld.long 0x0 30. "RXELECIDLE,RxElecidle" "0,1" bitfld.long 0x0 29. "X3_XS_SWAPPING,a3_ds_swapping/a3_us_swapping/b3_ds_swapping/b3_us_swapping" "0,1" newline bitfld.long 0x0 28. "X3_DS_HOST_SHUTDOWN,a3_ds_host_shutdown/b3_ds_host_shutdown" "0,1" bitfld.long 0x0 27. "PRTDIRECTION,Port direction" "B_0x0,B_0x1" newline bitfld.long 0x0 26. "LTDBTIMEOUT,LTDB Timeout (LTDBTimeout)" "0,1" hexmask.long.byte 0x0 22.--25. 1. "LTDBLINKSTATE,LTDB link state (LTDBLinkState)" newline hexmask.long.byte 0x0 18.--21. 1. "LTDBSUBSTATE,LTDB sub-state (LTDBSubState)" bitfld.long 0x0 17. "ELASTICBUFFERMODE,Elastic buffer mode (ElasticBufferMode)" "0,1" newline bitfld.long 0x0 16. "TXELECLDLE,TX elec idle (TxElecIdle)" "0,1" bitfld.long 0x0 15. "RXPOLARITY,RX polarity (RxPolarity)" "0,1" newline bitfld.long 0x0 14. "TXDETRXLOOPBACK,TX detect RX/loopback (TxDetRxLoopback)" "0,1" bitfld.long 0x0 11.--13. "LTDBPHYCMDSTATE,LTSSM PHY command state (LTDBPhyCmdState)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" newline bitfld.long 0x0 9.--10. "POWERDOWN,POWERDOWN (PowerDown)" "0,1,2,3" bitfld.long 0x0 8. "RXEQTRAIN,RxEq train" "0,1" newline bitfld.long 0x0 6.--7. "TXDEEMPHASIS,TXDEEMPHASIS (TxDeemphasis)" "0,1,2,3" bitfld.long 0x0 3.--5. "LTDBCLKSTATE,LTSSM clock state (LTDBClkState)" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,?,?" newline bitfld.long 0x0 2. "TXSWING,TX swing (TxSwing)" "0,1" bitfld.long 0x0 1. "RXTERMINATION,RX termination (RxTermination)" "0,1" newline bitfld.long 0x0 0. "TXONESZEROS,TX Ones/Zeros (TxOnesZeros)" "0,1" line.long 0x4 "USB3DR_GBL_GDBGLNMCC,USB3DR global debug LNMCC register" hexmask.long.word 0x4 0.--8. 1. "LNMCC_BERC,This field indicates the bit error rate information for the port selected in the GDBGFIFOSPACE.PortSelect field." line.long 0x8 "USB3DR_GBL_GDBGBMU,USB3DR global debug BMU register" hexmask.long.tbyte 0x8 8.--31. 1. "BMU_BCU,BMU_BCU debug information" hexmask.long.byte 0x8 4.--7. 1. "BMU_DCU,BMU_DCU debug information" newline hexmask.long.byte 0x8 0.--3. 1. "BMU_CCU,BMU_CCU debug information" group.long 0xC170++0x3 line.long 0x0 "USB3DR_GBL_GDBGLSPMUX_HST,USB3DR global debug LSP MUX register - host" hexmask.long.byte 0x0 16.--23. 1. "LOGIC_ANALYZER_TRACE,logic_analyzer_trace port MUX select" hexmask.long.word 0x0 0.--13. 1. "HOSTSELECT,Device LSP select" rgroup.long 0xC174++0xB line.long 0x0 "USB3DR_GBL_GDBGLSP,USB3DR global debug LSP register" hexmask.long 0x0 0.--31. 1. "LSPDEBUG,LSP Debug Information" line.long 0x4 "USB3DR_GBL_GDBGEPINFO0,USB3DR global debug endpoint information register 0" hexmask.long 0x4 0.--31. 1. "EPDEBUG,Endpoint debug information bits[31:0]" line.long 0x8 "USB3DR_GBL_GDBGEPINFO1,USB3DR global debug endpoint information register 1" hexmask.long 0x8 0.--31. 1. "EPDEBUG,Endpoint debug information bits[63:32]" group.long 0xC180++0xF line.long 0x0 "USB3DR_GBL_GPRTBIMAP_HSLO,USB3DR global high-speed port to bus instance mapping register - low" hexmask.long.byte 0x0 28.--31. 1. "BINUM8,BINUM8: HS USB instance number for port 8." hexmask.long.byte 0x0 24.--27. 1. "BINUM7,BINUM7: HS USB instance number for port 7." newline hexmask.long.byte 0x0 20.--23. 1. "BINUM6,BINUM6 USB instance number for port 6." hexmask.long.byte 0x0 16.--19. 1. "BINUM5,BINUM5: HS USB instance number for port 5." newline hexmask.long.byte 0x0 12.--15. 1. "BINUM4,BINUM4: HS USB instance number for port 4." hexmask.long.byte 0x0 8.--11. 1. "BINUM3,BINUM3: HS USB instance number for port 3." newline hexmask.long.byte 0x0 4.--7. 1. "BINUM2,BINUM2: HS USB instance number for port 2." hexmask.long.byte 0x0 0.--3. 1. "BINUM1,BINUM1: HS USB instance number for port 1." line.long 0x4 "USB3DR_GBL_GPRTBIMAP_HSHI,USB3DR global high-speed port to bus instance mapping register - high" hexmask.long.byte 0x4 24.--27. 1. "BINUM15,BINUM15: HS USB instance number for port 15." hexmask.long.byte 0x4 20.--23. 1. "BINUM14,BINUM14: HS USB instance number for port 14." newline hexmask.long.byte 0x4 16.--19. 1. "BINUM13,BINUM13: HS USB instance number for port 13." hexmask.long.byte 0x4 12.--15. 1. "BINUM12,BINUM12: HS USB instance number for port 12." newline hexmask.long.byte 0x4 8.--11. 1. "BINUM11,BINUM11: HS USB Instance Number for 11." hexmask.long.byte 0x4 4.--7. 1. "BINUM10,BINUM10: HS USB instance number for port 10." newline hexmask.long.byte 0x4 0.--3. 1. "BINUM9,BINUM9: HS USB instance number for port 9." line.long 0x8 "USB3DR_GBL_GPRTBIMAP_FSLO,USB3DR global full-speed port to bus instance mapping register - low" hexmask.long.byte 0x8 28.--31. 1. "BINUM8,BINUM8: FS USB instance number for port 8." hexmask.long.byte 0x8 24.--27. 1. "BINUM7,BINUM7: FS USB instance number for port 7." newline hexmask.long.byte 0x8 20.--23. 1. "BINUM6,BINUM6: FS USB instance number for port 6." hexmask.long.byte 0x8 16.--19. 1. "BINUM5,BINUM5: FS USB instance number for port 5." newline hexmask.long.byte 0x8 12.--15. 1. "BINUM4,BINUM4: FS USB instance number for port 4." hexmask.long.byte 0x8 8.--11. 1. "BINUM3,BINUM3: FS USB instance number for port 3." newline hexmask.long.byte 0x8 4.--7. 1. "BINUM2,BINUM2: FS USB instance number for port 2." hexmask.long.byte 0x8 0.--3. 1. "BINUM1,BINUM1: FS USB instance number for port 1." line.long 0xC "USB3DR_GBL_GPRTBIMAP_FSHI,USB3DR global full-speed port to bus instance mapping register - high" hexmask.long.byte 0xC 24.--27. 1. "BINUM15,BINUM15: FS USB instance number for port 15." hexmask.long.byte 0xC 20.--23. 1. "BINUM14,BINUM14: FS USB instance number for port 14." newline hexmask.long.byte 0xC 16.--19. 1. "BINUM13,BINUM13: FS USB instance number for port 13." hexmask.long.byte 0xC 12.--15. 1. "BINUM12,BINUM12: FS USB instance number for port 12." newline hexmask.long.byte 0xC 8.--11. 1. "BINUM11,BINUM11: FS USB instance number for port 11." hexmask.long.byte 0xC 4.--7. 1. "BINUM10,BINUM10: FS USB instance number for port 10." newline hexmask.long.byte 0xC 0.--3. 1. "BINUM9,BINUM9: FS USB instance number for port 9." group.long 0xC19C++0x3 line.long 0x0 "USB3DR_GBL_GUCTL2,USB3DR global user control register 2" hexmask.long.byte 0x0 19.--25. 1. "EN_HP_PM_TIMER,This register field is used to set new HP and PM timers." hexmask.long.byte 0x0 15.--18. 1. "NOLOWPWRDUR,No low power duration (NOLOWPWRDUR)" newline bitfld.long 0x0 14. "RST_ACTBITLATER,Enable clearing of the command active bit for the ENDXFER command after the command execution is completed." "0,1" bitfld.long 0x0 12. "ENABLEEPCACHEEVICT,Enable evicting endpoint cache after flow control for bulk endpoints." "0,1" newline bitfld.long 0x0 11. "DISABLECFC,Disable xHCI errata feature contiguous frame ID capability" "0,1" hexmask.long.byte 0x0 5.--10. 1. "RXPINGDURATION,Receive ping maximum duration" newline hexmask.long.byte 0x0 0.--4. 1. "TXPINGDURATION,Transmit ping maximum duration" group.long 0xC200++0x3 line.long 0x0 "USB3DR_GBL_GUSB2PHYCFG,USB3DR global USB2 PHY configuration register" bitfld.long 0x0 31. "PHYSOFTRST,UTMI PHY soft reset (PHYSoftRst)" "0,1" bitfld.long 0x0 30. "U2_FREECLK_EXISTS,U2_FREECLK_EXISTS" "B_0x0,B_0x1" newline bitfld.long 0x0 29. "ULPI_LPM_WITH_OPMODE_CHK,ULPI_LPM_WITH_OPMODE_CHK" "B_0x0,B_0x1" rbitfld.long 0x0 27.--28. "HSIC_CON_WIDTH_ADJ,HSIC_CON_WIDTH_ADJ" "0,1,2,3" newline rbitfld.long 0x0 26. "INV_SEL_HSIC,INV_SEL_HSIC" "B_0x0,B_0x1" bitfld.long 0x0 22.--24. "LSTRD,LS Turnaround Time (LSTRDTIM)" "B_0x0,B_0x1,?,?,?,?,?,?" newline bitfld.long 0x0 19.--21. "LSIPD,LS Inter-Packet Time (LSIPD)" "B_0x0,B_0x1,?,?,?,?,?,?" bitfld.long 0x0 18. "ULPIEXTVBUSINDIACTOR,ULPI external VBUS indicator (ULPIExtVbusIndicator)" "B_0x0,B_0x1" newline bitfld.long 0x0 17. "ULPIEXTVBUSDRV,ULPI external VBUS drive (ULPIExtVbusDrv)" "B_0x0,B_0x1" bitfld.long 0x0 15. "ULPIAUTORES,ULPI auto resume (ULPIAutoRes)" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 10.--13. 1. "USBTRDTIM,USB 2.0 turnaround time (USBTrdTim)" bitfld.long 0x0 9. "XCVRDLY,Transceiver Delay:" "0,1" newline bitfld.long 0x0 8. "ENBLSLPM,Enable utmi_sleep_n and utmi_l1_suspend_n (EnblSlpM)" "B_0x0,B_0x1" bitfld.long 0x0 7. "PHYSEL,USB 2.0 high-speed PHY or USB 1.1 full-speed serial transceiver select" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "SUSPENDUSB20,Suspend USB2.0 HS/FS/LS PHY (SusPHY)" "0,1" rbitfld.long 0x0 5. "FSINTF,Full-Speed serial interface select (FSIntf)" "B_0x0,B_0x1" newline rbitfld.long 0x0 4. "ULPI_UTMI_SEL,ULPI or UTMI+ select (ULPI_UTMI_Sel)" "B_0x0,B_0x1" bitfld.long 0x0 3. "PHYIF,PHY interface (PHYIf)" "B_0x0,B_0x1" newline bitfld.long 0x0 0.--2. "TOUTCAL,HS/FS timeout calibration (TOutCal)" "0,1,2,3,4,5,6,7" rgroup.long 0xC280++0x3 line.long 0x0 "USB3DR_GBL_GUSB2PHYACC_UTMI,USB3DR global USB 2.0 UTMI PHY vendor control register" bitfld.long 0x0 26. "DISUIPIDRVR,DISUIPIDRVR" "0,1" bitfld.long 0x0 25. "NEWREGREQ,New register request" "0,1" newline bitfld.long 0x0 24. "VSTSDONE,VSTSDONE" "0,1" bitfld.long 0x0 23. "VSTSBSY,VSTSBSY" "0,1" newline bitfld.long 0x0 22. "REGWR,Register write" "0,1" hexmask.long.byte 0x0 16.--21. 1. "REGADDR,Register address" newline hexmask.long.byte 0x0 8.--15. 1. "EXTREGADDR,EXTREGADDR" hexmask.long.byte 0x0 0.--7. 1. "REGDATA,REGDATA" group.long 0xC2C0++0x3 line.long 0x0 "USB3DR_GBL_GUSB3PIPECTL,USB3DR global USB 3.0 PIPE control register" bitfld.long 0x0 31. "PHYSOFTRST,USB3 PHY soft reset" "0,1" bitfld.long 0x0 30. "HSTPRTCMPL,HstPrtCmpl" "0,1" newline bitfld.long 0x0 29. "U2P3OK,P3 OK for U2 (u2P3ok)" "B_0x0,B_0x1" bitfld.long 0x0 28. "DISRXDETP3,Disabled receiver detection in P3 (DisRxDetP3)" "B_0x0,B_0x1" newline bitfld.long 0x0 27. "UX_EXIT_IN_PX,Ux exit in Px (Ux_exit_in_Px)" "B_0x0,B_0x1" bitfld.long 0x0 26. "PING_ENHANCEMENT_EN,Ping enhancement enable (ping_enhancement_en)" "0,1" newline bitfld.long 0x0 25. "U1U2EXITFAIL_TO_RECOV,U1U2exitfail to recovery (u1u2exitfail_to_recov)" "0,1" bitfld.long 0x0 24. "REQUEST_P1P2P3,Always request P1/P2/P3 for U1/U2/U3 (request_p1p2p3)" "0,1" newline bitfld.long 0x0 23. "STARTRXDETU3RXDET,Start receiver detection in U3/RX.Detect (StartRxdetU3RxDet)" "0,1" bitfld.long 0x0 22. "DISRXDETU3RXDET,Disable receiver detection in U3/RX.Det" "0,1" newline bitfld.long 0x0 19.--21. "DELAYP1P2P3,Delay P1P2P3" "0,1,2,3,4,5,6,7" bitfld.long 0x0 18. "DELAYP1TRANS,Delay PHY power change from P0 to P1/P2/P3 when link state changing from U0 to U1/U2/U3 respectively." "B_0x0,B_0x1" newline bitfld.long 0x0 17. "SUSPENDENABLE,Suspend USB3.0 SS PHY (Suspend_en)" "0,1" rbitfld.long 0x0 15.--16. "DATWIDTH,PIPE data width (DatWidth)" "B_0x0,B_0x1,B_0x2,?" newline bitfld.long 0x0 14. "ABORTRXDETINU2,Abort RX detect in U2 (AbortRxDetInU2)" "0,1" bitfld.long 0x0 13. "SKIPRXDET,Skip RX detect:" "0,1" newline bitfld.long 0x0 12. "LFPSP0ALGN,LFPS P0 Align:" "0,1" bitfld.long 0x0 11. "P3P2TRANOK,P3 P2 transitions OK (P3P2TranOK)" "0,1" newline bitfld.long 0x0 10. "P3EXSIGP2,P3 exit signal in P2 (P3ExSigP2)" "0,1" bitfld.long 0x0 9. "LFPSFILTER,LFPS filter (LFPSFilt)" "0,1" newline bitfld.long 0x0 8. "RX_DETECT_TO_POLLING_LFPS_CONTROL,RX_DETECT to Polling.LFPS control" "Default,B_0x1" bitfld.long 0x0 7. "SSICEN,USB3 SSIC enable (SSICEn)" "B_0x0,B_0x1" newline bitfld.long 0x0 6. "TX_SWING,TX swing (TxSwing)" "0,1" bitfld.long 0x0 3.--5. "TX_MARGIN,TX Margin[2:0] (TxMargin)" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 1.--2. "SS_TX_DE_EMPHASIS,TX deemphasis (TxDeemphasis)" "0,1,2,3" bitfld.long 0x0 0. "ELASTIC_BUFFER_MODE,Elastic buffer mode (ElasticBufferMode)" "0,1" group.long 0xC300++0x2F line.long 0x0 "USB3DR_GBL_GTXFIFOSIZ0,USB3DR global transmit FIFO size register 0" hexmask.long.word 0x0 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM start address" hexmask.long.word 0x0 0.--15. 1. "TXFDEP_N,TxFIFO depth" line.long 0x4 "USB3DR_GBL_GTXFIFOSIZ1,USB3DR global transmit FIFO size register 1 GTXFIFOSIZ 1" hexmask.long.word 0x4 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM start address" hexmask.long.word 0x4 0.--15. 1. "TXFDEP_N,TXFDEP_N" line.long 0x8 "USB3DR_GBL_GTXFIFOSIZ2,USB3DR global transmit FIFO size register 2" hexmask.long.word 0x8 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM start address" hexmask.long.word 0x8 0.--15. 1. "TXFDEP_N,TxFIFO depth" line.long 0xC "USB3DR_GBL_GTXFIFOSIZ3,USB3DR global transmit FIFO size register 3" hexmask.long.word 0xC 16.--31. 1. "TXFSTADDR_N,transmit FIFOn RAM start address" hexmask.long.word 0xC 0.--15. 1. "TXFDEP_N,TxFIFO depth (TxFDep_n)" line.long 0x10 "USB3DR_GBL_GTXFIFOSIZ4,USB3DR global transmit FIFO size register 4" hexmask.long.word 0x10 16.--31. 1. "TXFSTADDR_N,TXFSTADDR_N" hexmask.long.word 0x10 0.--15. 1. "TXFDEP_N,TXFDEP_N: TxFIFO depth (TxFDep_n)" line.long 0x14 "USB3DR_GBL_GTXFIFOSIZ5,USB3DR global transmit FIFO size register 5" hexmask.long.word 0x14 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM start address" hexmask.long.word 0x14 0.--15. 1. "TXFDEP_N,TxFIFO depth" line.long 0x18 "USB3DR_GBL_GTXFIFOSIZ6,USB3DR global transmit FIFO size register 6" hexmask.long.word 0x18 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM start address" hexmask.long.word 0x18 0.--15. 1. "TXFDEP_N,TxFIFO depth" line.long 0x1C "USB3DR_GBL_GTXFIFOSIZ7,USB3DR global transmit FIFO size register 7" hexmask.long.word 0x1C 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM start address" hexmask.long.word 0x1C 0.--15. 1. "TXFDEP_N,TxFIFO depth" line.long 0x20 "USB3DR_GBL_GTXFIFOSIZ8,USB3DR global transmit FIFO size register 8" hexmask.long.word 0x20 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM start address" hexmask.long.word 0x20 0.--15. 1. "TXFDEP_N,TxFIFO depth" line.long 0x24 "USB3DR_GBL_GTXFIFOSIZ9,USB3DR global transmit FIFO size register 9" hexmask.long.word 0x24 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM start address" hexmask.long.word 0x24 0.--15. 1. "TXFDEP_N,TxFIFO depth" line.long 0x28 "USB3DR_GBL_GTXFIFOSIZ10,USB3DR global transmit FIFO size register 10" hexmask.long.word 0x28 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM Start address" hexmask.long.word 0x28 0.--15. 1. "TXFDEP_N,TxFIFO depth (TxFDep_n)" line.long 0x2C "USB3DR_GBL_GTXFIFOSIZ11,USB3DR global transmit FIFO size register 11" hexmask.long.word 0x2C 16.--31. 1. "TXFSTADDR_N,Transmit FIFOn RAM start address" hexmask.long.word 0x2C 0.--15. 1. "TXFDEP_N,TxFIFO depth" group.long 0xC380++0xB line.long 0x0 "USB3DR_GBL_GRXFIFOSIZ0,USB3DR global receive FIFO size register 0" hexmask.long.word 0x0 16.--31. 1. "RXFSTADDR_N,RxFIFOn RAM start address (RxFStAddr_n)" hexmask.long.word 0x0 0.--15. 1. "RXFDEP_N,RxFIFO depth (RxFDep_n)" line.long 0x4 "USB3DR_GBL_GRXFIFOSIZ1,USB3DR global receive FIFO size register 1" hexmask.long.word 0x4 16.--31. 1. "RXFSTADDR_N,RXFSTADDR_N" hexmask.long.word 0x4 0.--15. 1. "RXFDEP_N,RxFIFO depth" line.long 0x8 "USB3DR_GBL_GRXFIFOSIZ2,USB3DR global receive FIFO size register 2" hexmask.long.word 0x8 16.--31. 1. "RXFSTADDR_N,RXFSTADDR_N" hexmask.long.word 0x8 0.--15. 1. "RXFDEP_N,RxFIFO depth" group.long 0xC400++0xF line.long 0x0 "USB3DR_GBL_GEVNTADRLO,USB3DR global event buffer address low register" hexmask.long 0x0 0.--31. 1. "EVNTADRLO,Event buffer address (EvntAdrLo)" line.long 0x4 "USB3DR_GBL_GEVNTADRHI,USB3DR global event buffer address high register" hexmask.long 0x4 0.--31. 1. "EVNTADRHI,Event buffer address (EvntAdrHi)" line.long 0x8 "USB3DR_GBL_GEVNTSIZ,USB3DR global event buffer size register" bitfld.long 0x8 31. "EVNTINTRPTMASK,Event interrupt mask (EvntIntMask)." "0,1" hexmask.long.word 0x8 0.--15. 1. "EVENTSIZ,Event buffer size in bytes (EVNTSiz)" line.long 0xC "USB3DR_GBL_GEVNTCOUNT,USB3DR global event buffer count register" bitfld.long 0xC 31. "EVNT_HANDLER_BUSY,Event handler busy" "0,1" hexmask.long.word 0xC 0.--15. 1. "EVNTCOUNT,Event count (EVNTCount)" rgroup.long 0xC600++0x3 line.long 0x0 "USB3DR_GBL_GHWPARAMS8,USB3DR global hardware parameters register 8" hexmask.long 0x0 0.--31. 1. "GHWPARAMS8_32_0,USB3DR_DCACHE_DEPTH_INFO" group.long 0xC610++0x3 line.long 0x0 "USB3DR_GBL_GTXFIFOPRIDEV,USB3DR global device TX FIFO DMA priority register" hexmask.long.word 0x0 0.--11. 1. "GTXFIFOPRIDEV,Device TxFIFO priority" group.long 0xC618++0x7 line.long 0x0 "USB3DR_GBL_GTXFIFOPRIHST,USB3DR global host TX FIFO DMA priority register" bitfld.long 0x0 0.--2. "GTXFIFOPRIHST,Host TxFIFO priority" "0,1,2,3,4,5,6,7" line.long 0x4 "USB3DR_GBL_GRXFIFOPRIHST,USB3DR global host RX FIFO DMA priority register" bitfld.long 0x4 0.--2. "GRXFIFOPRIHST,Host RxFIFO priority" "0,1,2,3,4,5,6,7" group.long 0xC624++0x3 line.long 0x0 "USB3DR_GBL_GDMAHLRATIO,USB3DR global host FIFO DMA high-low priority ratio register" hexmask.long.byte 0x0 8.--12. 1. "HSTRXFIFO,Host RXFIFO DMA high-low priority" hexmask.long.byte 0x0 0.--4. 1. "HSTTXFIFO,Host TXFIFO DMA high-low priority" group.long 0xC630++0x3 line.long 0x0 "USB3DR_GBL_GFLADJ,USB3DR global frame length adjustment register" bitfld.long 0x0 31. "GFLADJ_REFCLK_240MHZDECR_PLS1,GFLADJ_REFCLK_240MHZDECR_PLS1" "0,1" hexmask.long.byte 0x0 24.--30. 1. "GFLADJ_REFCLK_240MHZ_DECR,This field indicates the decrement value that the controller applies for each ref_clk in order to derive a frame timer in terms of a 240MHz clock." newline bitfld.long 0x0 23. "GFLADJ_REFCLK_LPM_SEL,This bit enables the functionality of running SOF/ITP counters on the ref_clk." "0,1" hexmask.long.word 0x0 8.--21. 1. "GFLADJ_REFCLK_FLADJ,This field indicates the frame length adjustment to be applied when SOF/ITP counter is running on the ref_clk." newline bitfld.long 0x0 7. "GFLADJ_30MHZ_SDBND_SEL,GFLADJ_30MHZ_SDBND_SEL" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--5. 1. "GFLADJ_30MHZ,GFLADJ_30MHZ" group.long 0xC700++0x17 line.long 0x0 "USB3DR_DEV_DCFG,USB3DR device configuration register" bitfld.long 0x0 23. "IGNSTRMPP,IgnoreStreamPP" "0,1" bitfld.long 0x0 22. "LPMCAP,LPM capable" "B_0x0,B_0x1" newline hexmask.long.byte 0x0 17.--21. 1. "NUMP,Number of receive buffers." hexmask.long.byte 0x0 12.--16. 1. "INTRNUM,Interrupt number" newline hexmask.long.byte 0x0 3.--9. 1. "DEVADDR,Device address." bitfld.long 0x0 0.--2. "DEVSPD,Device speed." "B_0x0,B_0x1,?,?,B_0x4,?,?,?" line.long 0x4 "USB3DR_DEV_DCTL,USB3DR device control register" bitfld.long 0x4 31. "RUN_STOP,Run/stop" "0,1" bitfld.long 0x4 30. "CSFTRST,Core soft reset" "0,1" newline hexmask.long.byte 0x4 24.--28. 1. "HIRDTHRES,HIRD threshold (HIRD_Thres)" hexmask.long.byte 0x4 20.--23. 1. "LPM_NYET_THRES,LPM NYET threshold" newline bitfld.long 0x4 19. "KEEPCONNECT,Keep connect" "0,1" bitfld.long 0x4 18. "L1HIBERNATIONEN,L1HibernationEn" "0,1" newline bitfld.long 0x4 17. "CRS,Controller restore state (CRS)" "0,1" bitfld.long 0x4 16. "CSS,Controller save state (CSS)" "0,1" newline bitfld.long 0x4 12. "INITU2ENA,Initiate U2 enable" "B_0x0,B_0x1" bitfld.long 0x4 11. "ACCEPTU2ENA,Accept U2 enable" "B_0x0,B_0x1" newline bitfld.long 0x4 10. "INITU1ENA,Initiate U1 enable" "B_0x0,B_0x1" bitfld.long 0x4 9. "ACCEPTU1ENA,Accept U1 enable" "B_0x0,B_0x1" newline hexmask.long.byte 0x4 5.--8. 1. "ULSTCHNGREQ,ULSTCHNGREQ" hexmask.long.byte 0x4 1.--4. 1. "TSTCTL,Test control" line.long 0x8 "USB3DR_DEV_DEVTEN,USB3DR device event enable register" rbitfld.long 0x8 16. "ECCERREN,ECC error enable." "0,1" bitfld.long 0x8 14. "L1WKUPEVTEN,L1 resume detected event enable." "0,1" newline bitfld.long 0x8 12. "VENDEVTSTRCVDEN,Vendor device Test LMP received event (VndrDevTstRcvedEn)" "0,1" bitfld.long 0x8 9. "ERRTICERREVTEN,Erratic error event enable" "0,1" newline bitfld.long 0x8 8. "L1SUSPEN,L1 suspend event enable" "0,1" bitfld.long 0x8 7. "SOFTEVTEN,Start of (u)frame" "0,1" newline bitfld.long 0x8 6. "U3L2L1SUSPEN,U3/L2 or U3/L2L1 suspend event enable." "0,1" bitfld.long 0x8 5. "HIBERNATIONREQEVTEN,This bit enables/disables the generation of the hibernation request event." "0,1" newline bitfld.long 0x8 4. "WKUPEVTEN,U3/L2 or U3/L2L1 resume detected event enable." "0,1" bitfld.long 0x8 3. "ULSTCNGEN,USB/Link state change event enable" "0,1" newline bitfld.long 0x8 2. "CONNECTDONEEVTEN,Connection done enable" "0,1" bitfld.long 0x8 1. "USBRSTEVTEN,USB reset enable" "0,1" newline bitfld.long 0x8 0. "DISSCONNEVTEN,Disconnect detected event enable" "0,1" line.long 0xC "USB3DR_DEV_DSTS,USB3DR device status register" rbitfld.long 0xC 29. "DCNRD,Device controller not ready" "0,1" bitfld.long 0xC 28. "SRE,Save restore error" "0,1" newline rbitfld.long 0xC 25. "RSS,RSS restore state status" "0,1" rbitfld.long 0xC 24. "SSS,SSS save state status" "0,1" newline rbitfld.long 0xC 23. "COREIDLE,Core idle" "0,1" rbitfld.long 0xC 22. "DEVCTRLHLT,Device controller halted" "0,1" newline hexmask.long.byte 0xC 18.--21. 1. "USBLNKST,USBLNKST" rbitfld.long 0xC 17. "RXFIFOEMPTY,RxFIFO empty." "0,1" newline hexmask.long.word 0xC 3.--16. 1. "SOFFN,Frame/Microframe number of the received SOF." rbitfld.long 0xC 0.--2. "CONNECTSPD,Connected speed (ConnectSpd)" "B_0x0,B_0x1,?,?,B_0x4,?,?,?" line.long 0x10 "USB3DR_DEV_DGCMDPAR,USB3DR device generic command parameter register" hexmask.long 0x10 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x14 "USB3DR_DEV_DGCMD,USB3DR device generic command register" hexmask.long.byte 0x14 12.--15. 1. "CMDSTATUS,Command status" bitfld.long 0x14 10. "CMDACT,Command active" "0,1" newline bitfld.long 0x14 8. "CMDIOC,Command interrupt on complete" "0,1" hexmask.long.byte 0x14 0.--7. 1. "CMDTYP,Generic command type" group.long 0xC720++0x3 line.long 0x0 "USB3DR_DEV_DALEPENA,USB3DR device active USB endpoint enable register" hexmask.long 0x0 0.--31. 1. "USBACTEP,USBACTEP" group.long 0xC800++0x17F line.long 0x0 "USB3DR_DEV_DEPCMDPAR20,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x0 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x4 "USB3DR_DEV_DEPCMDPAR10,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x4 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x8 "USB3DR_DEV_DEPCMDPAR00,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x8 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xC "USB3DR_DEV_DEPCMD0,USB3DR device physical endpoint-n command register" hexmask.long.word 0xC 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0xC 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0xC 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0xC 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0xC 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0xC 0.--3. 1. "CMDTYP,Command type" line.long 0x10 "USB3DR_DEV_DEPCMDPAR21,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x10 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x14 "USB3DR_DEV_DEPCMDPAR11,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x14 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x18 "USB3DR_DEV_DEPCMDPAR01,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x18 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x1C "USB3DR_DEV_DEPCMD1,USB3DR device physical endpoint-n command register" hexmask.long.word 0x1C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x1C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x1C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x1C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x1C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x1C 0.--3. 1. "CMDTYP,Command type" line.long 0x20 "USB3DR_DEV_DEPCMDPAR22,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x20 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x24 "USB3DR_DEV_DEPCMDPAR12,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x24 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x28 "USB3DR_DEV_DEPCMDPAR02,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x28 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x2C "USB3DR_DEV_DEPCMD2,USB3DR device physical endpoint-n command register" hexmask.long.word 0x2C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x2C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x2C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x2C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x2C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x2C 0.--3. 1. "CMDTYP,Command type" line.long 0x30 "USB3DR_DEV_DEPCMDPAR23,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x30 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x34 "USB3DR_DEV_DEPCMDPAR13,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x34 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x38 "USB3DR_DEV_DEPCMDPAR03,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x38 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x3C "USB3DR_DEV_DEPCMD3,USB3DR device physical endpoint-n command register" hexmask.long.word 0x3C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x3C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x3C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x3C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x3C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x3C 0.--3. 1. "CMDTYP,Command type" line.long 0x40 "USB3DR_DEV_DEPCMDPAR24,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x40 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x44 "USB3DR_DEV_DEPCMDPAR14,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x44 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x48 "USB3DR_DEV_DEPCMDPAR04,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x48 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x4C "USB3DR_DEV_DEPCMD4,USB3DR device physical endpoint-n command register" hexmask.long.word 0x4C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x4C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x4C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x4C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x4C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x4C 0.--3. 1. "CMDTYP,Command type" line.long 0x50 "USB3DR_DEV_DEPCMDPAR25,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x50 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x54 "USB3DR_DEV_DEPCMDPAR15,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x54 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x58 "USB3DR_DEV_DEPCMDPAR05,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x58 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x5C "USB3DR_DEV_DEPCMD5,USB3DR device physical endpoint-n command register" hexmask.long.word 0x5C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x5C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x5C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x5C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x5C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x5C 0.--3. 1. "CMDTYP,Command type" line.long 0x60 "USB3DR_DEV_DEPCMDPAR26,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x60 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x64 "USB3DR_DEV_DEPCMDPAR16,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x64 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x68 "USB3DR_DEV_DEPCMDPAR06,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x68 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x6C "USB3DR_DEV_DEPCMD6,USB3DR device physical endpoint-n command register" hexmask.long.word 0x6C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x6C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x6C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x6C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x6C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x6C 0.--3. 1. "CMDTYP,Command type" line.long 0x70 "USB3DR_DEV_DEPCMDPAR27,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x70 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x74 "USB3DR_DEV_DEPCMDPAR17,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x74 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x78 "USB3DR_DEV_DEPCMDPAR07,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x78 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x7C "USB3DR_DEV_DEPCMD7,USB3DR device physical endpoint-n command register" hexmask.long.word 0x7C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x7C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x7C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x7C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x7C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x7C 0.--3. 1. "CMDTYP,Command type" line.long 0x80 "USB3DR_DEV_DEPCMDPAR28,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x80 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x84 "USB3DR_DEV_DEPCMDPAR18,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x84 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x88 "USB3DR_DEV_DEPCMDPAR08,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x88 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x8C "USB3DR_DEV_DEPCMD8,USB3DR device physical endpoint-n command register" hexmask.long.word 0x8C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x8C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x8C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x8C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x8C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x8C 0.--3. 1. "CMDTYP,Command type" line.long 0x90 "USB3DR_DEV_DEPCMDPAR29,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x90 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x94 "USB3DR_DEV_DEPCMDPAR19,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x94 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x98 "USB3DR_DEV_DEPCMDPAR09,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x98 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x9C "USB3DR_DEV_DEPCMD9,USB3DR device physical endpoint-n command register" hexmask.long.word 0x9C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x9C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x9C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x9C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x9C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x9C 0.--3. 1. "CMDTYP,Command type" line.long 0xA0 "USB3DR_DEV_DEPCMDPAR210,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0xA0 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xA4 "USB3DR_DEV_DEPCMDPAR110,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0xA4 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xA8 "USB3DR_DEV_DEPCMDPAR010,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0xA8 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xAC "USB3DR_DEV_DEPCMD10,USB3DR device physical endpoint-n command register" hexmask.long.word 0xAC 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0xAC 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0xAC 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0xAC 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0xAC 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0xAC 0.--3. 1. "CMDTYP,Command type" line.long 0xB0 "USB3DR_DEV_DEPCMDPAR211,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0xB0 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xB4 "USB3DR_DEV_DEPCMDPAR111,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0xB4 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xB8 "USB3DR_DEV_DEPCMDPAR011,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0xB8 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xBC "USB3DR_DEV_DEPCMD11,USB3DR device physical endpoint-n command register" hexmask.long.word 0xBC 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0xBC 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0xBC 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0xBC 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0xBC 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0xBC 0.--3. 1. "CMDTYP,Command type" line.long 0xC0 "USB3DR_DEV_DEPCMDPAR212,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0xC0 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xC4 "USB3DR_DEV_DEPCMDPAR112,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0xC4 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xC8 "USB3DR_DEV_DEPCMDPAR012,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0xC8 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xCC "USB3DR_DEV_DEPCMD12,USB3DR device physical endpoint-n command register" hexmask.long.word 0xCC 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0xCC 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0xCC 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0xCC 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0xCC 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0xCC 0.--3. 1. "CMDTYP,Command type" line.long 0xD0 "USB3DR_DEV_DEPCMDPAR213,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0xD0 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xD4 "USB3DR_DEV_DEPCMDPAR113,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0xD4 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xD8 "USB3DR_DEV_DEPCMDPAR013,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0xD8 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xDC "USB3DR_DEV_DEPCMD13,USB3DR device physical endpoint-n command register" hexmask.long.word 0xDC 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0xDC 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0xDC 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0xDC 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0xDC 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0xDC 0.--3. 1. "CMDTYP,Command type" line.long 0xE0 "USB3DR_DEV_DEPCMDPAR214,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0xE0 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xE4 "USB3DR_DEV_DEPCMDPAR114,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0xE4 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xE8 "USB3DR_DEV_DEPCMDPAR014,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0xE8 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xEC "USB3DR_DEV_DEPCMD14,USB3DR device physical endpoint-n command register" hexmask.long.word 0xEC 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0xEC 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0xEC 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0xEC 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0xEC 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0xEC 0.--3. 1. "CMDTYP,Command type" line.long 0xF0 "USB3DR_DEV_DEPCMDPAR215,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0xF0 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xF4 "USB3DR_DEV_DEPCMDPAR115,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0xF4 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xF8 "USB3DR_DEV_DEPCMDPAR015,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0xF8 0.--31. 1. "PARAMETER,PARAMETER" line.long 0xFC "USB3DR_DEV_DEPCMD15,USB3DR device physical endpoint-n command register" hexmask.long.word 0xFC 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0xFC 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0xFC 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0xFC 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0xFC 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0xFC 0.--3. 1. "CMDTYP,Command type" line.long 0x100 "USB3DR_DEV_DEPCMDPAR216,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x100 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x104 "USB3DR_DEV_DEPCMDPAR116,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x104 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x108 "USB3DR_DEV_DEPCMDPAR016,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x108 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x10C "USB3DR_DEV_DEPCMD16,USB3DR device physical endpoint-n command register" hexmask.long.word 0x10C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x10C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x10C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x10C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x10C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x10C 0.--3. 1. "CMDTYP,Command type" line.long 0x110 "USB3DR_DEV_DEPCMDPAR217,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x110 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x114 "USB3DR_DEV_DEPCMDPAR117,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x114 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x118 "USB3DR_DEV_DEPCMDPAR017,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x118 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x11C "USB3DR_DEV_DEPCMD17,USB3DR device physical endpoint-n command register" hexmask.long.word 0x11C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x11C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x11C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x11C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x11C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x11C 0.--3. 1. "CMDTYP,Command type" line.long 0x120 "USB3DR_DEV_DEPCMDPAR218,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x120 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x124 "USB3DR_DEV_DEPCMDPAR118,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x124 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x128 "USB3DR_DEV_DEPCMDPAR018,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x128 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x12C "USB3DR_DEV_DEPCMD18,USB3DR device physical endpoint-n command register" hexmask.long.word 0x12C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x12C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x12C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x12C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x12C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x12C 0.--3. 1. "CMDTYP,Command type" line.long 0x130 "USB3DR_DEV_DEPCMDPAR219,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x130 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x134 "USB3DR_DEV_DEPCMDPAR119,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x134 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x138 "USB3DR_DEV_DEPCMDPAR019,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x138 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x13C "USB3DR_DEV_DEPCMD19,USB3DR device physical endpoint-n command register" hexmask.long.word 0x13C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x13C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x13C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x13C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x13C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x13C 0.--3. 1. "CMDTYP,Command type" line.long 0x140 "USB3DR_DEV_DEPCMDPAR220,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x140 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x144 "USB3DR_DEV_DEPCMDPAR120,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x144 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x148 "USB3DR_DEV_DEPCMDPAR020,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x148 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x14C "USB3DR_DEV_DEPCMD20,USB3DR device physical endpoint-n command register" hexmask.long.word 0x14C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x14C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x14C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x14C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x14C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x14C 0.--3. 1. "CMDTYP,Command type" line.long 0x150 "USB3DR_DEV_DEPCMDPAR221,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x150 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x154 "USB3DR_DEV_DEPCMDPAR121,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x154 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x158 "USB3DR_DEV_DEPCMDPAR021,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x158 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x15C "USB3DR_DEV_DEPCMD21,USB3DR device physical endpoint-n command register" hexmask.long.word 0x15C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x15C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x15C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x15C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x15C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x15C 0.--3. 1. "CMDTYP,Command type" line.long 0x160 "USB3DR_DEV_DEPCMDPAR222,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x160 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x164 "USB3DR_DEV_DEPCMDPAR122,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x164 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x168 "USB3DR_DEV_DEPCMDPAR022,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x168 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x16C "USB3DR_DEV_DEPCMD22,USB3DR device physical endpoint-n command register" hexmask.long.word 0x16C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x16C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x16C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x16C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x16C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x16C 0.--3. 1. "CMDTYP,Command type" line.long 0x170 "USB3DR_DEV_DEPCMDPAR223,USB3DR device physical endpoint-n command parameter 2 register" hexmask.long 0x170 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x174 "USB3DR_DEV_DEPCMDPAR123,USB3DR device physical endpoint-n command parameter 1 register" hexmask.long 0x174 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x178 "USB3DR_DEV_DEPCMDPAR023,USB3DR device physical endpoint-n command parameter 0 register" hexmask.long 0x178 0.--31. 1. "PARAMETER,PARAMETER" line.long 0x17C "USB3DR_DEV_DEPCMD23,USB3DR device physical endpoint-n command register" hexmask.long.word 0x17C 16.--31. 1. "COMMANDPARAM,Command parameters or event parameters" hexmask.long.byte 0x17C 12.--15. 1. "CMDSTATUS,Command completion status (CmdStatus)" newline bitfld.long 0x17C 11. "HIPRI_FORCERM,HighPriority/ForceRM (HiPri_ForceRM)" "0,1" bitfld.long 0x17C 10. "CMDACT,Command active (CmdAct)" "0,1" newline bitfld.long 0x17C 8. "CMDIOC,CMDIOC" "0,1" hexmask.long.byte 0x17C 0.--3. 1. "CMDTYP,Command type" group.long 0xCA00++0x3 line.long 0x0 "USB3DR_DEV_IMOD,USB3DR device interrupt moderation register" hexmask.long.word 0x0 16.--31. 1. "DEVICE_IMODC,Interrupt moderation down counter" hexmask.long.word 0x0 0.--15. 1. "DEVICE_IMODI,Moderation interval (DEVICE_IMODI)" group.long 0xCC30++0x3 line.long 0x0 "USB3DR_BC_BCFG,USB3DR battery charger configuration register" bitfld.long 0x0 1. "IDDIG_SEL,IDDIG select" "B_0x0,B_0x1" bitfld.long 0x0 0. "CHIRP_EN,Chirp enable" "0,1" group.long 0xCC38++0x7 line.long 0x0 "USB3DR_BC_BCEVT,USB3DR battery charger event register" bitfld.long 0x0 24. "MV_CHNGEVNT,Multi-valued input changed event:" "0,1" hexmask.long.byte 0x0 0.--4. 1. "MULTVALIDBC,Multi valued ID pin" line.long 0x4 "USB3DR_BC_BCEVTEN,USB3DR battery charger event enable register" bitfld.long 0x4 24. "MV_CHNGEVNTENA,BCEvtInfoEna[0]" "0,1" group.long 0xD000++0x3 line.long 0x0 "USB3DR_LINK_LU1LFPSRXTIM,USB3DR U1/U2 LFPS RX timer register" hexmask.long.byte 0x0 8.--15. 1. "U1U2_LFPS_EXIT_RX_CLK,Programmable U1U2 LFPS EXIT RX CLKS" hexmask.long.byte 0x0 0.--7. 1. "U1U2_EXIT_RSP_RX_CLK,Programmable U1U2 EXIT RESP RX CLKS" group.long 0xD020++0xB line.long 0x0 "USB3DR_LINK_SETTINGS,USB3DR link setting register" bitfld.long 0x0 28.--30. "U1_RESID_TIMER_US,Programmable U1 MIN RESIDENCY TIMER" "0,1,2,3,4,5,6,7" bitfld.long 0x0 24.--26. "PM_LC_TIMER_US,Programmable PM_LC_TIMER" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 20.--23. 1. "PM_ENTRY_TIMER_US,Programmable PM_ENTRY_TIMER" line.long 0x4 "USB3DR_LINK_LLUCTL,USB3DR link user control register" bitfld.long 0x4 29. "SUPPORT_P4_PG,PHY P4 power gate mode (PG) is enabled." "0,1" bitfld.long 0x4 28. "SUPPORT_P4,Support PHY P3.CPM and P4 power states." "0,1" newline bitfld.long 0x4 23. "DISRXDET_LTSSM_TIMER_OVRRD,DisRxDet_LTSSM_Timer_Ovrrd." "0,1" bitfld.long 0x4 12. "U2P3CPMOK,P3CPM OK for U2/SSInactive (U2P3CPMok)" "B_0x0,B_0x1" newline bitfld.long 0x4 11. "EN_RESET_PIPE_AFTER_PHY_MUX,en_reset_pipe_after_phy_mux." "0,1" bitfld.long 0x4 7. "MASK_PIPE_RESET,Mask pipe reset." "0,1" newline bitfld.long 0x4 5. "NO_UX_EXIT_P0_TRANS,no_ux_exit_p0_trans." "0,1" line.long 0x8 "USB3DR_LINK_LPTMDPDELAY,USB3DR link datapath delay register" hexmask.long.word 0x8 10.--21. 1. "P3CPMP4_RESIDENCY,p3cpmp4 residency timer value." tree.end tree.end tree "USBH (USB2 EHCI/OHCI High/Full/Low-speed Host Controller)" tree "USBH" base ad:0x482F0000 group.long 0x94++0x7 line.long 0x0 "USBH_EHCI_INSNREG01,USBH EHCI implementation register #1" hexmask.long.byte 0x0 16.--23. 1. "OUT_THRESHOLD,The value specified here is the number of 32-bit words" hexmask.long.byte 0x0 0.--7. 1. "IN_THRESHOLD,The value specified here is the number of 32-bit words" line.long 0x4 "USBH_OHCI_INSNREG06,USBH OHCI implementation register #6" bitfld.long 0x4 31. "AHB_ECAP,AHB error captured" "0,1" rbitfld.long 0x4 9.--11. "HBURST,HBURST value of the control phase at which the AHB error occurred" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 4.--8. 1. "EXP_BEATS,Number of expected beats" hexmask.long.byte 0x4 0.--3. 1. "SUC_BEATS,Number of successful beats" group.long 0x98++0x3 line.long 0x0 "USBH_EHCI_INSNREG02,USBH EHCI implementation register #2" hexmask.long.byte 0x0 0.--7. 1. "PKT_BUF,Programmable packet buffer depth" rgroup.long 0x9C++0x3 line.long 0x0 "USBH_OHCI_INSNREG07,USBH OHCI implementation register #7" hexmask.long 0x0 0.--31. 1. "AHB_MST_ERR,AHB master error address" group.long 0x9C++0xF line.long 0x0 "USBH_EHCI_INSNREG03,USBH EHCI implementation register #3" bitfld.long 0x0 16. "ENABLE_LS_GLITCH,Enable/disable enhancement for line state glitch" "B_0x0,B_0x1" bitfld.long 0x0 14. "EN_CLK256_CHECK,Enable 256 clock checking" "0,1" bitfld.long 0x0 13. "TESTSE_NAK,TestSE NAK" "0,1" bitfld.long 0x0 10.--12. "TX_TRA_DELAY,Tx-Tx turnaround delay add on" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 9. "FRM_LST_FETCH,Setting this bit forces the host controller to fetch the periodic frame list in every microframe of a frame. If not set then the periodic frame list is fetched only in microframe 0 of every frame." "0,1" hexmask.long.byte 0x0 1.--8. 1. "TIME_AVAIL_OFF,Time available offset" rbitfld.long 0x0 0. "BRK_MEM_TRANS,Break memory transfer" "0,1" line.long 0x4 "USBH_EHCI_INSNREG04,USBH EHCI implementation register #4" bitfld.long 0x4 5. "SUSPEND_SIGNAL,Suspend signal" "B_0x0,B_0x1" bitfld.long 0x4 3. "ASYNC_PIPELINE_DIS,Asynchronous pipeline disable" "0,1" bitfld.long 0x4 1. "HCCPARAMS_WRT,When this bit is 1 the USBH_EHCI_HCCPARAMS register bits 17 15:4 and 2:0 become writable." "0,1" bitfld.long 0x4 0. "HCSPARAMS_WRT,When this bit is 1 the USBH_EHCI_HCSPARAMS register becomes writable." "0,1" line.long 0x8 "USBH_EHCI_INSNREG05,USBH EHCI implementation register #5" rbitfld.long 0x8 17. "VBUSY,UTMI VBUSY" "0,1" hexmask.long.byte 0x8 13.--16. 1. "VPORT,UTMI VPORT" bitfld.long 0x8 12. "VCONTROL_LDM,UTMI VCONTROLLoad (vendor control load)" "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--11. 1. "VCONTROL,UTMI VCONTROL (vendor control)" newline hexmask.long.byte 0x8 0.--7. 1. "VSTATUS,UTMI VStatus (vendor status)" line.long 0xC "USBH_EHCI_INSNREG06,USBH EHCI implementation register #6" bitfld.long 0xC 31. "AHB_ECAP,AHB error captured" "0,1" rbitfld.long 0xC 9.--11. "HBURST,HBURST value of the control phase at which the AHB error occurred" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 4.--8. 1. "EXP_BEATS,Number of expected beats" hexmask.long.byte 0xC 0.--3. 1. "SUC_BEATS,Number of successful beats" rgroup.long 0xAC++0x3 line.long 0x0 "USBH_EHCI_INSNREG07,USBH EHCI implementation register #7" hexmask.long 0x0 0.--31. 1. "AHB_MST_ERR,AHB master error address" tree.end tree "USBH_EHCI_S" base ad:0x582F0000 group.long 0x94++0x7 line.long 0x0 "USBH_EHCI_INSNREG01,USBH EHCI implementation register #1" hexmask.long.byte 0x0 16.--23. 1. "OUT_THRESHOLD,The value specified here is the number of 32-bit words" hexmask.long.byte 0x0 0.--7. 1. "IN_THRESHOLD,The value specified here is the number of 32-bit words" line.long 0x4 "USBH_OHCI_INSNREG06,USBH OHCI implementation register #6" bitfld.long 0x4 31. "AHB_ECAP,AHB error captured" "0,1" rbitfld.long 0x4 9.--11. "HBURST,HBURST value of the control phase at which the AHB error occurred" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 4.--8. 1. "EXP_BEATS,Number of expected beats" hexmask.long.byte 0x4 0.--3. 1. "SUC_BEATS,Number of successful beats" group.long 0x98++0x3 line.long 0x0 "USBH_EHCI_INSNREG02,USBH EHCI implementation register #2" hexmask.long.byte 0x0 0.--7. 1. "PKT_BUF,Programmable packet buffer depth" rgroup.long 0x9C++0x3 line.long 0x0 "USBH_OHCI_INSNREG07,USBH OHCI implementation register #7" hexmask.long 0x0 0.--31. 1. "AHB_MST_ERR,AHB master error address" group.long 0x9C++0xF line.long 0x0 "USBH_EHCI_INSNREG03,USBH EHCI implementation register #3" bitfld.long 0x0 16. "ENABLE_LS_GLITCH,Enable/disable enhancement for line state glitch" "B_0x0,B_0x1" bitfld.long 0x0 14. "EN_CLK256_CHECK,Enable 256 clock checking" "0,1" bitfld.long 0x0 13. "TESTSE_NAK,TestSE NAK" "0,1" bitfld.long 0x0 10.--12. "TX_TRA_DELAY,Tx-Tx turnaround delay add on" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 9. "FRM_LST_FETCH,Setting this bit forces the host controller to fetch the periodic frame list in every microframe of a frame. If not set then the periodic frame list is fetched only in microframe 0 of every frame." "0,1" hexmask.long.byte 0x0 1.--8. 1. "TIME_AVAIL_OFF,Time available offset" rbitfld.long 0x0 0. "BRK_MEM_TRANS,Break memory transfer" "0,1" line.long 0x4 "USBH_EHCI_INSNREG04,USBH EHCI implementation register #4" bitfld.long 0x4 5. "SUSPEND_SIGNAL,Suspend signal" "B_0x0,B_0x1" bitfld.long 0x4 3. "ASYNC_PIPELINE_DIS,Asynchronous pipeline disable" "0,1" bitfld.long 0x4 1. "HCCPARAMS_WRT,When this bit is 1 the USBH_EHCI_HCCPARAMS register bits 17 15:4 and 2:0 become writable." "0,1" bitfld.long 0x4 0. "HCSPARAMS_WRT,When this bit is 1 the USBH_EHCI_HCSPARAMS register becomes writable." "0,1" line.long 0x8 "USBH_EHCI_INSNREG05,USBH EHCI implementation register #5" rbitfld.long 0x8 17. "VBUSY,UTMI VBUSY" "0,1" hexmask.long.byte 0x8 13.--16. 1. "VPORT,UTMI VPORT" bitfld.long 0x8 12. "VCONTROL_LDM,UTMI VCONTROLLoad (vendor control load)" "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--11. 1. "VCONTROL,UTMI VCONTROL (vendor control)" newline hexmask.long.byte 0x8 0.--7. 1. "VSTATUS,UTMI VStatus (vendor status)" line.long 0xC "USBH_EHCI_INSNREG06,USBH EHCI implementation register #6" bitfld.long 0xC 31. "AHB_ECAP,AHB error captured" "0,1" rbitfld.long 0xC 9.--11. "HBURST,HBURST value of the control phase at which the AHB error occurred" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 4.--8. 1. "EXP_BEATS,Number of expected beats" hexmask.long.byte 0xC 0.--3. 1. "SUC_BEATS,Number of successful beats" rgroup.long 0xAC++0x3 line.long 0x0 "USBH_EHCI_INSNREG07,USBH EHCI implementation register #7" hexmask.long 0x0 0.--31. 1. "AHB_MST_ERR,AHB master error address" tree.end tree "USBH_OHCI" base ad:0x482E0000 group.long 0x94++0x7 line.long 0x0 "USBH_EHCI_INSNREG01,USBH EHCI implementation register #1" hexmask.long.byte 0x0 16.--23. 1. "OUT_THRESHOLD,The value specified here is the number of 32-bit words" hexmask.long.byte 0x0 0.--7. 1. "IN_THRESHOLD,The value specified here is the number of 32-bit words" line.long 0x4 "USBH_OHCI_INSNREG06,USBH OHCI implementation register #6" bitfld.long 0x4 31. "AHB_ECAP,AHB error captured" "0,1" rbitfld.long 0x4 9.--11. "HBURST,HBURST value of the control phase at which the AHB error occurred" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 4.--8. 1. "EXP_BEATS,Number of expected beats" hexmask.long.byte 0x4 0.--3. 1. "SUC_BEATS,Number of successful beats" group.long 0x98++0x3 line.long 0x0 "USBH_EHCI_INSNREG02,USBH EHCI implementation register #2" hexmask.long.byte 0x0 0.--7. 1. "PKT_BUF,Programmable packet buffer depth" rgroup.long 0x9C++0x3 line.long 0x0 "USBH_OHCI_INSNREG07,USBH OHCI implementation register #7" hexmask.long 0x0 0.--31. 1. "AHB_MST_ERR,AHB master error address" group.long 0x9C++0xF line.long 0x0 "USBH_EHCI_INSNREG03,USBH EHCI implementation register #3" bitfld.long 0x0 16. "ENABLE_LS_GLITCH,Enable/disable enhancement for line state glitch" "B_0x0,B_0x1" bitfld.long 0x0 14. "EN_CLK256_CHECK,Enable 256 clock checking" "0,1" bitfld.long 0x0 13. "TESTSE_NAK,TestSE NAK" "0,1" bitfld.long 0x0 10.--12. "TX_TRA_DELAY,Tx-Tx turnaround delay add on" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 9. "FRM_LST_FETCH,Setting this bit forces the host controller to fetch the periodic frame list in every microframe of a frame. If not set then the periodic frame list is fetched only in microframe 0 of every frame." "0,1" hexmask.long.byte 0x0 1.--8. 1. "TIME_AVAIL_OFF,Time available offset" rbitfld.long 0x0 0. "BRK_MEM_TRANS,Break memory transfer" "0,1" line.long 0x4 "USBH_EHCI_INSNREG04,USBH EHCI implementation register #4" bitfld.long 0x4 5. "SUSPEND_SIGNAL,Suspend signal" "B_0x0,B_0x1" bitfld.long 0x4 3. "ASYNC_PIPELINE_DIS,Asynchronous pipeline disable" "0,1" bitfld.long 0x4 1. "HCCPARAMS_WRT,When this bit is 1 the USBH_EHCI_HCCPARAMS register bits 17 15:4 and 2:0 become writable." "0,1" bitfld.long 0x4 0. "HCSPARAMS_WRT,When this bit is 1 the USBH_EHCI_HCSPARAMS register becomes writable." "0,1" line.long 0x8 "USBH_EHCI_INSNREG05,USBH EHCI implementation register #5" rbitfld.long 0x8 17. "VBUSY,UTMI VBUSY" "0,1" hexmask.long.byte 0x8 13.--16. 1. "VPORT,UTMI VPORT" bitfld.long 0x8 12. "VCONTROL_LDM,UTMI VCONTROLLoad (vendor control load)" "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--11. 1. "VCONTROL,UTMI VCONTROL (vendor control)" newline hexmask.long.byte 0x8 0.--7. 1. "VSTATUS,UTMI VStatus (vendor status)" line.long 0xC "USBH_EHCI_INSNREG06,USBH EHCI implementation register #6" bitfld.long 0xC 31. "AHB_ECAP,AHB error captured" "0,1" rbitfld.long 0xC 9.--11. "HBURST,HBURST value of the control phase at which the AHB error occurred" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 4.--8. 1. "EXP_BEATS,Number of expected beats" hexmask.long.byte 0xC 0.--3. 1. "SUC_BEATS,Number of successful beats" rgroup.long 0xAC++0x3 line.long 0x0 "USBH_EHCI_INSNREG07,USBH EHCI implementation register #7" hexmask.long 0x0 0.--31. 1. "AHB_MST_ERR,AHB master error address" tree.end tree "USBH_OHCI_S" base ad:0x582E0000 group.long 0x94++0x7 line.long 0x0 "USBH_EHCI_INSNREG01,USBH EHCI implementation register #1" hexmask.long.byte 0x0 16.--23. 1. "OUT_THRESHOLD,The value specified here is the number of 32-bit words" hexmask.long.byte 0x0 0.--7. 1. "IN_THRESHOLD,The value specified here is the number of 32-bit words" line.long 0x4 "USBH_OHCI_INSNREG06,USBH OHCI implementation register #6" bitfld.long 0x4 31. "AHB_ECAP,AHB error captured" "0,1" rbitfld.long 0x4 9.--11. "HBURST,HBURST value of the control phase at which the AHB error occurred" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 4.--8. 1. "EXP_BEATS,Number of expected beats" hexmask.long.byte 0x4 0.--3. 1. "SUC_BEATS,Number of successful beats" group.long 0x98++0x3 line.long 0x0 "USBH_EHCI_INSNREG02,USBH EHCI implementation register #2" hexmask.long.byte 0x0 0.--7. 1. "PKT_BUF,Programmable packet buffer depth" rgroup.long 0x9C++0x3 line.long 0x0 "USBH_OHCI_INSNREG07,USBH OHCI implementation register #7" hexmask.long 0x0 0.--31. 1. "AHB_MST_ERR,AHB master error address" group.long 0x9C++0xF line.long 0x0 "USBH_EHCI_INSNREG03,USBH EHCI implementation register #3" bitfld.long 0x0 16. "ENABLE_LS_GLITCH,Enable/disable enhancement for line state glitch" "B_0x0,B_0x1" bitfld.long 0x0 14. "EN_CLK256_CHECK,Enable 256 clock checking" "0,1" bitfld.long 0x0 13. "TESTSE_NAK,TestSE NAK" "0,1" bitfld.long 0x0 10.--12. "TX_TRA_DELAY,Tx-Tx turnaround delay add on" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 9. "FRM_LST_FETCH,Setting this bit forces the host controller to fetch the periodic frame list in every microframe of a frame. If not set then the periodic frame list is fetched only in microframe 0 of every frame." "0,1" hexmask.long.byte 0x0 1.--8. 1. "TIME_AVAIL_OFF,Time available offset" rbitfld.long 0x0 0. "BRK_MEM_TRANS,Break memory transfer" "0,1" line.long 0x4 "USBH_EHCI_INSNREG04,USBH EHCI implementation register #4" bitfld.long 0x4 5. "SUSPEND_SIGNAL,Suspend signal" "B_0x0,B_0x1" bitfld.long 0x4 3. "ASYNC_PIPELINE_DIS,Asynchronous pipeline disable" "0,1" bitfld.long 0x4 1. "HCCPARAMS_WRT,When this bit is 1 the USBH_EHCI_HCCPARAMS register bits 17 15:4 and 2:0 become writable." "0,1" bitfld.long 0x4 0. "HCSPARAMS_WRT,When this bit is 1 the USBH_EHCI_HCSPARAMS register becomes writable." "0,1" line.long 0x8 "USBH_EHCI_INSNREG05,USBH EHCI implementation register #5" rbitfld.long 0x8 17. "VBUSY,UTMI VBUSY" "0,1" hexmask.long.byte 0x8 13.--16. 1. "VPORT,UTMI VPORT" bitfld.long 0x8 12. "VCONTROL_LDM,UTMI VCONTROLLoad (vendor control load)" "B_0x0,B_0x1" hexmask.long.byte 0x8 8.--11. 1. "VCONTROL,UTMI VCONTROL (vendor control)" newline hexmask.long.byte 0x8 0.--7. 1. "VSTATUS,UTMI VStatus (vendor status)" line.long 0xC "USBH_EHCI_INSNREG06,USBH EHCI implementation register #6" bitfld.long 0xC 31. "AHB_ECAP,AHB error captured" "0,1" rbitfld.long 0xC 9.--11. "HBURST,HBURST value of the control phase at which the AHB error occurred" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 4.--8. 1. "EXP_BEATS,Number of expected beats" hexmask.long.byte 0xC 0.--3. 1. "SUC_BEATS,Number of successful beats" rgroup.long 0xAC++0x3 line.long 0x0 "USBH_EHCI_INSNREG07,USBH EHCI implementation register #7" hexmask.long 0x0 0.--31. 1. "AHB_MST_ERR,AHB master error address" tree.end tree.end tree.end tree "VDEC (Video Decoder)" base ad:0x0 tree "VDEC" base ad:0x480D0000 rgroup.long 0x0++0x3 line.long 0x0 "VDEC_SWREG0,VDEC ID register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,ID register (read only) (all format mode)" group.long 0x4++0xC3 line.long 0x0 "VDEC_SWREG1,VDEC interrupt register decoder register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Interrupt register decoder (all format mode)" line.long 0x4 "VDEC_SWREG2,VDEC device configuration decoder register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,Device configuration register decoder (all format mode)" line.long 0x8 "VDEC_SWREG3,VDEC decoder control register 0. decmode. picture type" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,Decoder control register 0 (decmode picture type) (all format mode)" line.long 0xC "VDEC_SWREG4,VDEC decoder control register 1. picture parameters" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,Decoder control register 1 (picture parameters) (all format mode)" line.long 0x10 "VDEC_SWREG5,VDEC decoder control register 2. stream decoding table selects" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,Decoder control register 2 (stream decoding table selects)" line.long 0x14 "VDEC_SWREG6,VDEC decoder control register 3. stream buffer information" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,Decoder control register 3 (stream buffer information) (all format mode)" line.long 0x18 "VDEC_SWREG7,VDEC decoder control register 4. H264. VC-1. VP6 and progressive JPEG control" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,Decoder control register 4 (H264 VC-1 VP6 and progressive JPEG control) (all format mode)" line.long 0x1C "VDEC_SWREG8,VDEC decoder control register 5. H264. VC-1. VP6. progressive JPEG and RV control" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,Decoder control register 5 (H264 VC-1 VP6 Progressive JPEG and RV control) (all format mode)" line.long 0x20 "VDEC_SWREG9,VDEC decoder control register 6/base address for MB-control. RLC /VC-1 intensity control 0/VP6.VP7.VP8 ctrl-stream length/ RV pic slice amount" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,Decoder control register 6 / base address for MB-control (RLC) / VC-1 intensity control 0/ VP6 VP7 VP8 ctrl-stream length/ RV pic slice amount (all format mode)" line.long 0x24 "VDEC_SWREG10,VDEC base address for differential motion vector base address RLC-mode/H264 P initial fwd ref pic list register. 4-9/ VC-1 intensity control 1/VP7 and VP8 segmentation base register" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,Base address for differential motion vector base address (RLC-mode) /H264 P initial fwd ref pic list register (4-9)/ VC-1 intensity control 1/ VP7 and VP8 segmentation base register (all format mode)" line.long 0x28 "VDEC_SWREG11,VDEC decoder control register 7. VLC/base address for H.264 intra prediction 4x4/base address for MPEG-4 DC component. RLC / H264 P initial fwd ref pic list register. 10- 15/VC-1 intensity control 2 register" hexmask.long 0x28 0.--31. 1. "SWREG_FIELD,Decoder control register 7 (VLC) / base address for H.264 intra prediction 4x4 / base address for MPEG-4 DC component (RLC) / H264 P initial fwd ref pic list register (10-15) / VC-1 intensity control 2 (all format mode)" line.long 0x2C "VDEC_SWREG12,VDEC base address for RLC data. RLC/stream start address /decoded end addr register. VLC" hexmask.long 0x2C 0.--31. 1. "SWREG_FIELD,Base address for RLC data (RLC) / stream start address/decoded end addr register (VLC) (all format mode)" line.long 0x30 "VDEC_SWREG13,VDEC base address for decoded picture/base address for JPEG decoder output luminance picture register" hexmask.long 0x30 0.--31. 1. "SWREG_FIELD,Base address for decoded picture / base address for JPEG decoder output luminance picture (all format mode)" line.long 0x34 "VDEC_SWREG14,VDEC base address for reference picture index 0/base address for JPEG decoder output chrominance picture register" hexmask.long 0x34 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 0 / base address for JPEG decoder output chrominance picture (all format mode)" line.long 0x38 "VDEC_SWREG15,VDEC base address for reference picture index 1/JPEG control register" hexmask.long 0x38 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 1 / JPEG control (all format mode)" line.long 0x3C "VDEC_SWREG16,VDEC base address for reference picture index 2/list of VLC code lengths in first JPEG AC table register" hexmask.long 0x3C 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 2 / List of VLC code lengths in first JPEG AC table (all format mode)" line.long 0x40 "VDEC_SWREG17,VDEC base address for reference picture index 3/list of VLC code lengths in first JPEG AC table register" hexmask.long 0x40 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 3 / List of VLC code lengths in first JPEG AC table (all format mode)" line.long 0x44 "VDEC_SWREG18,VDEC base address for reference picture list of VLC code lengths in first JPEG AC table/VP8 golden refer picture base register" hexmask.long 0x44 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 4 / List of VLC code lengths in first JPEG AC table / VP8 Golden refer picture base (all format mode)" line.long 0x48 "VDEC_SWREG19,VDEC base address for reference picture index 5/list of VLC code lengths in first/second JPEG AC table register" hexmask.long 0x48 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 5 / List of VLC code lengths in first/second JPEG AC table" line.long 0x4C "VDEC_SWREG20,VDEC base address for reference picture index 6/list of VLC code lengths in second JPEG AC table register" hexmask.long 0x4C 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 6 / List of VLC code lengths in second JPEG AC table" line.long 0x50 "VDEC_SWREG21,VDEC base address for reference picture index 7/list of VLC code lengths in second JPEG AC table register" hexmask.long 0x50 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 7 / List of VLC code lengths in second JPEG AC table" line.long 0x54 "VDEC_SWREG22,VDEC base address for reference picture index 8/list of VLC code lengths in second JPEG AC table/VP7.VP8 DCT stream 1 base register" hexmask.long 0x54 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 8 / List of VLC code lengths in second JPEG AC table / VP8 DCT stream 1 base (all format mode)" line.long 0x58 "VDEC_SWREG23,VDEC base address for reference picture index 9/list of VLC code lengths in first JPEG DC table/VP6 scan maps/VP7.VP8 DCT stream 2 base register" hexmask.long 0x58 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 9 / List of VLC code lengths in first JPEG DC table / VP6 scan maps / VP7 VP8 DCT stream 2 base (all format mode)" line.long 0x5C "VDEC_SWREG24,VDEC base address for reference picture index 10/list of VLC code lengths in first JPEG DC table/VP6 scan maps/VP7. VP8 DCT stream 3 base register" hexmask.long 0x5C 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 10 / List of VLC code lengths in first JPEG DC table / VP6 scan maps / VP7 VP8 DCT stream 3 base (all format mode)" line.long 0x60 "VDEC_SWREG25,VDEC base address for reference picture index 11/list of VLC code lengths in second JPEG DC table/VP6 scan maps/VP7.VP8 DCT stream 4 base register" hexmask.long 0x60 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 11 / List of VLC code lengths in second JPEG DC table / VP6 scan maps / VP7 VP8 DCT stream 4 base (all format mode)" line.long 0x64 "VDEC_SWREG26,VDEC base address for reference picture index 12/list of VLC code lengths in second JPEG DC table/VP6 scan maps/VP7. VP8 DCT stream 5 base register" hexmask.long 0x64 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 12 / List of VLC code lengths in second JPEG DC table / VP6 scan maps / VP7 VP8 DCT stream 5 base (all format mode)" line.long 0x68 "VDEC_SWREG27,VDEC base address for reference picture index 13/VC-1 bitpl mbctrl or VP6. VP7. VP8 ctrl stream base/progressive JPEG DC table register" hexmask.long 0x68 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 13 / VC-1 bitpl mbctrl or VP6 VP7 VP8 ctrl stream base /Progressive JPEG DC table(all format mode)" line.long 0x6C "VDEC_SWREG28,VDEC base address for reference picture index 14/VP6 scan maps /progressive JPEG DC table/VP7. VP8 DCT stream 6 base register" hexmask.long 0x6C 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 14 / VP6 scan maps /Progressive JPEG DC table / VP7 VP8 DCT stream 6 base (all format mode)" line.long 0x70 "VDEC_SWREG29,VDEC base address for reference picture index 15/VP6 scan maps/ VP7. VP8 DCT stream 7 base register" hexmask.long 0x70 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 15 / VP6 scan maps / VP7 VP8 DCT stream 7 base (all format mode)" line.long 0x74 "VDEC_SWREG30,VDEC reference picture numbers for index 0 and 1. H264 VLC /VP6 scan maps/VP7. VP8 loop filter mb level adjusts register" hexmask.long 0x74 0.--31. 1. "SWREG_FIELD,Reference picture numbers for index 0 and 1 (H264 VLC) / VP6 scan maps / VP7 VP8 loop filter mb level adjusts (all format mode)" line.long 0x78 "VDEC_SWREG31,VDEC reference picture numbers for index 2 and 3. H264 VLC/ VP6 scan maps/VP7. VP8 loop filter ref pic level adjusts register" hexmask.long 0x78 0.--31. 1. "SWREG_FIELD,Reference picture numbers for index 2 and 3 (H264 VLC) / VP6 scan maps / VP7 VP8 loop filter ref pic level adjusts (all format mode)" line.long 0x7C "VDEC_SWREG32,VDEC reference picture numbers for index 4 and 5. H264 VLC/ VP6 scan maps/VP7. VP8 loop filter levels register" hexmask.long 0x7C 0.--31. 1. "SWREG_FIELD,Reference picture numbers for index 4 and 5 (H264 VLC) / VP6 scan maps / VP7 VP8 loop filter levels (all format mode)" line.long 0x80 "VDEC_SWREG33,VDEC reference picture numbers for index 6 and 7. H264 VLC /VP6 scan maps/VP7. VP8 quantization values register" hexmask.long 0x80 0.--31. 1. "SWREG_FIELD,Reference picture numbers for index 6 and 7 (H264 VLC) / VP6 scan maps / VP7 VP8 quantization values (all format mode)" line.long 0x84 "VDEC_SWREG34,VDEC reference picture numbers for index 8 and 9. H264 VLC /VP8 prediction filter taps register" hexmask.long 0x84 0.--31. 1. "SWREG_FIELD,Reference picture numbers for index 8 and 9 (H264 VLC) / VP8 prediction filter taps (all format mode)" line.long 0x88 "VDEC_SWREG35,VDEC reference picture numbers for index 10 and 11. H264 VLC /VP8 prediction filter taps register" hexmask.long 0x88 0.--31. 1. "SWREG_FIELD,Reference picture numbers for index 10 and 11 (H264 VLC) / VP8 prediction filter taps (all format mode)" line.long 0x8C "VDEC_SWREG36,VDEC reference picture numbers for index 12 and 13. H264 VLC/ VP8 prediction filter taps Register" hexmask.long 0x8C 0.--31. 1. "SWREG_FIELD,Reference picture numbers for index 12 and 13 (H264 VLC) / VP8 prediction filter taps (all format mode)" line.long 0x90 "VDEC_SWREG37,VDEC reference picture numbers for index 14 and 15. H264 VLC /VP8 prediction filter taps register" hexmask.long 0x90 0.--31. 1. "SWREG_FIELD,Reference picture numbers for index 14 and 15 (H264 VLC) / VP8 prediction filter taps (all format mode)" line.long 0x94 "VDEC_SWREG38,VDEC reference picture long term flags. H264 VLC/ VP8 prediction filter taps register" hexmask.long 0x94 0.--31. 1. "SWREG_FIELD,Reference picture long term flags (H264 VLC) / VP8 prediction filter taps (all format mode)" line.long 0x98 "VDEC_SWREG39,VDEC reference picture valid flags. H264 VLC/ VP8 prediction filter taps register" hexmask.long 0x98 0.--31. 1. "SWREG_FIELD,Reference picture valid flags (H264 VLC) / VP8 prediction filter taps (all format mode)" line.long 0x9C "VDEC_SWREG40,VDEC base address for standard dependent table register" hexmask.long 0x9C 0.--31. 1. "SWREG_FIELD,Base address for standard dependent tables (all format mode)" line.long 0xA0 "VDEC_SWREG41,VDEC base address for direct mode motion vectors/ progressive JPEG AC/DC coefficient read/write base register" hexmask.long 0xA0 0.--31. 1. "SWREG_FIELD,Base address for direct mode motion vectors/Progressive JPEG AC/DC coefficient read/write base (all format mode)" line.long 0xA4 "VDEC_SWREG42,VDEC bi_dir initial ref pic list register. 0-2/VP6 prediction filter taps/progressive JPEG Cb ACDC coefficient base register" hexmask.long 0xA4 0.--31. 1. "SWREG_FIELD,bi_dir initial ref pic list register (0-2) / VP6 prediction filter taps / Progressive JPEG Cb ACDC coefficient base (all format mode)" line.long 0xA8 "VDEC_SWREG43,VDEC bi-dir initial ref pic list register. 3-5/VP6 prediction filter taps/progressive JPEG Cr ACDC coefficient base register" hexmask.long 0xA8 0.--31. 1. "SWREG_FIELD,Bi-dir initial ref pic list register (3-5)/VP6 prediction filter taps / Progressive JPEG Cr ACDC coefficient base (all format mode)" line.long 0xAC "VDEC_SWREG44,VDEC bi-dir initial ref pic list register. 6-8/VP6 prediction filter taps register" hexmask.long 0xAC 0.--31. 1. "SWREG_FIELD,Bi-dir initial ref pic list register (6-8) / VP6 prediction filter taps (all format mode)" line.long 0xB0 "VDEC_SWREG45,VDEC bi-dir initial ref pic list register. 9-11/VP6 prediction filter taps register" hexmask.long 0xB0 0.--31. 1. "SWREG_FIELD,Bi-dir initial ref pic list register (9-11) / VP6 prediction filter taps (all format mode)" line.long 0xB4 "VDEC_SWREG46,VDEC bi-dir initial ref pic list register. 12-14/VP7.VP8 quantization values register" hexmask.long 0xB4 0.--31. 1. "SWREG_FIELD,Bi-dir initial ref pic list register (12-14) / VP7 VP8 quantization values (all format mode)" line.long 0xB8 "VDEC_SWREG47,VDEC bi-dir and P fwd initial ref pic list register. 15 and P 0-3/ VP7.VP8 quantization values register" hexmask.long 0xB8 0.--31. 1. "SWREG_FIELD,Bi-dir and P fwd initial ref pic list register (15 and P 0-3) / VP7 VP8 quantization values (all format mode)" line.long 0xBC "VDEC_SWREG48,VDEC error concealment register" hexmask.long 0xBC 0.--31. 1. "SWREG_FIELD,Error concealment register (all format mode)" line.long 0xC0 "VDEC_SWREG49,VDEC prediction filter tap register for H264" hexmask.long 0xC0 0.--31. 1. "SWREG_FIELD,Prediction filter tap register for H264" rgroup.long 0xC8++0x3 line.long 0x0 "VDEC_SWREG50,VDEC synthesis configuration register decoder 0" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Synthesis configuration register decoder 0 (read only) (all format mode)" group.long 0xCC++0x3 line.long 0x0 "VDEC_SWREG51,VDEC reference picture buffer control register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Reference picture buffer control register (all format mode)" rgroup.long 0xD8++0x3 line.long 0x0 "VDEC_SWREG54,VDEC synthesis configuration register decoder 1" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Synthesis configuration register decoder 1 (read only) (all format mode)" group.long 0xDC++0x3 line.long 0x0 "VDEC_SWREG55,VDEC reference picture buffer 2/advanced prefetch control register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Reference picture buffer 2 / Advanced prefetch control register (all format mode)" group.long 0xE8++0x7 line.long 0x0 "VDEC_SWREG58,VDEC device configuration register decoder 2/multicore control register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Device configuration register decoder 2 + Multi core control register (all format mode)" line.long 0x4 "VDEC_SWREG59,VDEC H264 chrominance 8 pixel interleaved data base register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,H264 Chrominance 8 pixel interleaved data base (all format mode)" group.long 0x198++0x43 line.long 0x0 "VDEC_SWREG102,VDEC base address for H264 and AVS decoded chroma picture register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Base address for H264 and AVS decoded chroma picture(all format mode)" line.long 0x4 "VDEC_SWREG103,VDEC base address for reference chroma picture index 0 register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 0 (all format mode)" line.long 0x8 "VDEC_SWREG104,VDEC base address for reference chroma picture index 1 register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 1 (all format mode)" line.long 0xC "VDEC_SWREG105,VDEC base address for reference chroma picture index 2 register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 2 (all format mode)" line.long 0x10 "VDEC_SWREG106,VDEC base address for reference chroma picture index 3 register" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 3 (all format mode)" line.long 0x14 "VDEC_SWREG107,VDEC base address for reference chroma picture index 4 register" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 4 (all format mode)" line.long 0x18 "VDEC_SWREG108,VDEC base address for reference chroma picture index 5 register" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 5 (all format mode)" line.long 0x1C "VDEC_SWREG109,VDEC base address for reference chroma picture index 6 register" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 6 (all format mode)" line.long 0x20 "VDEC_SWREG110,VDEC base address for reference chroma picture index 7 register" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 7 (all format mode)" line.long 0x24 "VDEC_SWREG111,VDEC base address for reference chroma picture index 8 register" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 8 (all format mode)" line.long 0x28 "VDEC_SWREG112,VDEC base address for reference chroma picture index 9 register" hexmask.long 0x28 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 9 (all format mode)" line.long 0x2C "VDEC_SWREG113,VDEC base address for reference chroma picture index 10 register" hexmask.long 0x2C 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 10 (all format mode)" line.long 0x30 "VDEC_SWREG114,VDEC base address for reference chroma picture index 11 register" hexmask.long 0x30 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 11 (all format mode)" line.long 0x34 "VDEC_SWREG115,VDEC base address for reference chroma picture index 12 register" hexmask.long 0x34 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 12 (all format mode)" line.long 0x38 "VDEC_SWREG116,VDEC base address for reference chroma picture index 13 register" hexmask.long 0x38 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 13 (all format mode)" line.long 0x3C "VDEC_SWREG117,VDEC base address for reference chroma picture index 14 register" hexmask.long 0x3C 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 14 (all format mode)" line.long 0x40 "VDEC_SWREG118,VDEC base address for reference chroma picture index 15 register" hexmask.long 0x40 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 15 (all format mode)" tree.end tree "VDEC_S" base ad:0x580D0000 rgroup.long 0x0++0x3 line.long 0x0 "VDEC_SWREG0,VDEC ID register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,ID register (read only) (all format mode)" group.long 0x4++0xC3 line.long 0x0 "VDEC_SWREG1,VDEC interrupt register decoder register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Interrupt register decoder (all format mode)" line.long 0x4 "VDEC_SWREG2,VDEC device configuration decoder register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,Device configuration register decoder (all format mode)" line.long 0x8 "VDEC_SWREG3,VDEC decoder control register 0. decmode. picture type" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,Decoder control register 0 (decmode picture type) (all format mode)" line.long 0xC "VDEC_SWREG4,VDEC decoder control register 1. picture parameters" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,Decoder control register 1 (picture parameters) (all format mode)" line.long 0x10 "VDEC_SWREG5,VDEC decoder control register 2. stream decoding table selects" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,Decoder control register 2 (stream decoding table selects)" line.long 0x14 "VDEC_SWREG6,VDEC decoder control register 3. stream buffer information" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,Decoder control register 3 (stream buffer information) (all format mode)" line.long 0x18 "VDEC_SWREG7,VDEC decoder control register 4. H264. VC-1. VP6 and progressive JPEG control" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,Decoder control register 4 (H264 VC-1 VP6 and progressive JPEG control) (all format mode)" line.long 0x1C "VDEC_SWREG8,VDEC decoder control register 5. H264. VC-1. VP6. progressive JPEG and RV control" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,Decoder control register 5 (H264 VC-1 VP6 Progressive JPEG and RV control) (all format mode)" line.long 0x20 "VDEC_SWREG9,VDEC decoder control register 6/base address for MB-control. RLC /VC-1 intensity control 0/VP6.VP7.VP8 ctrl-stream length/ RV pic slice amount" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,Decoder control register 6 / base address for MB-control (RLC) / VC-1 intensity control 0/ VP6 VP7 VP8 ctrl-stream length/ RV pic slice amount (all format mode)" line.long 0x24 "VDEC_SWREG10,VDEC base address for differential motion vector base address RLC-mode/H264 P initial fwd ref pic list register. 4-9/ VC-1 intensity control 1/VP7 and VP8 segmentation base register" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,Base address for differential motion vector base address (RLC-mode) /H264 P initial fwd ref pic list register (4-9)/ VC-1 intensity control 1/ VP7 and VP8 segmentation base register (all format mode)" line.long 0x28 "VDEC_SWREG11,VDEC decoder control register 7. VLC/base address for H.264 intra prediction 4x4/base address for MPEG-4 DC component. RLC / H264 P initial fwd ref pic list register. 10- 15/VC-1 intensity control 2 register" hexmask.long 0x28 0.--31. 1. "SWREG_FIELD,Decoder control register 7 (VLC) / base address for H.264 intra prediction 4x4 / base address for MPEG-4 DC component (RLC) / H264 P initial fwd ref pic list register (10-15) / VC-1 intensity control 2 (all format mode)" line.long 0x2C "VDEC_SWREG12,VDEC base address for RLC data. RLC/stream start address /decoded end addr register. VLC" hexmask.long 0x2C 0.--31. 1. "SWREG_FIELD,Base address for RLC data (RLC) / stream start address/decoded end addr register (VLC) (all format mode)" line.long 0x30 "VDEC_SWREG13,VDEC base address for decoded picture/base address for JPEG decoder output luminance picture register" hexmask.long 0x30 0.--31. 1. "SWREG_FIELD,Base address for decoded picture / base address for JPEG decoder output luminance picture (all format mode)" line.long 0x34 "VDEC_SWREG14,VDEC base address for reference picture index 0/base address for JPEG decoder output chrominance picture register" hexmask.long 0x34 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 0 / base address for JPEG decoder output chrominance picture (all format mode)" line.long 0x38 "VDEC_SWREG15,VDEC base address for reference picture index 1/JPEG control register" hexmask.long 0x38 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 1 / JPEG control (all format mode)" line.long 0x3C "VDEC_SWREG16,VDEC base address for reference picture index 2/list of VLC code lengths in first JPEG AC table register" hexmask.long 0x3C 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 2 / List of VLC code lengths in first JPEG AC table (all format mode)" line.long 0x40 "VDEC_SWREG17,VDEC base address for reference picture index 3/list of VLC code lengths in first JPEG AC table register" hexmask.long 0x40 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 3 / List of VLC code lengths in first JPEG AC table (all format mode)" line.long 0x44 "VDEC_SWREG18,VDEC base address for reference picture list of VLC code lengths in first JPEG AC table/VP8 golden refer picture base register" hexmask.long 0x44 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 4 / List of VLC code lengths in first JPEG AC table / VP8 Golden refer picture base (all format mode)" line.long 0x48 "VDEC_SWREG19,VDEC base address for reference picture index 5/list of VLC code lengths in first/second JPEG AC table register" hexmask.long 0x48 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 5 / List of VLC code lengths in first/second JPEG AC table" line.long 0x4C "VDEC_SWREG20,VDEC base address for reference picture index 6/list of VLC code lengths in second JPEG AC table register" hexmask.long 0x4C 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 6 / List of VLC code lengths in second JPEG AC table" line.long 0x50 "VDEC_SWREG21,VDEC base address for reference picture index 7/list of VLC code lengths in second JPEG AC table register" hexmask.long 0x50 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 7 / List of VLC code lengths in second JPEG AC table" line.long 0x54 "VDEC_SWREG22,VDEC base address for reference picture index 8/list of VLC code lengths in second JPEG AC table/VP7.VP8 DCT stream 1 base register" hexmask.long 0x54 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 8 / List of VLC code lengths in second JPEG AC table / VP8 DCT stream 1 base (all format mode)" line.long 0x58 "VDEC_SWREG23,VDEC base address for reference picture index 9/list of VLC code lengths in first JPEG DC table/VP6 scan maps/VP7.VP8 DCT stream 2 base register" hexmask.long 0x58 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 9 / List of VLC code lengths in first JPEG DC table / VP6 scan maps / VP7 VP8 DCT stream 2 base (all format mode)" line.long 0x5C "VDEC_SWREG24,VDEC base address for reference picture index 10/list of VLC code lengths in first JPEG DC table/VP6 scan maps/VP7. VP8 DCT stream 3 base register" hexmask.long 0x5C 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 10 / List of VLC code lengths in first JPEG DC table / VP6 scan maps / VP7 VP8 DCT stream 3 base (all format mode)" line.long 0x60 "VDEC_SWREG25,VDEC base address for reference picture index 11/list of VLC code lengths in second JPEG DC table/VP6 scan maps/VP7.VP8 DCT stream 4 base register" hexmask.long 0x60 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 11 / List of VLC code lengths in second JPEG DC table / VP6 scan maps / VP7 VP8 DCT stream 4 base (all format mode)" line.long 0x64 "VDEC_SWREG26,VDEC base address for reference picture index 12/list of VLC code lengths in second JPEG DC table/VP6 scan maps/VP7. VP8 DCT stream 5 base register" hexmask.long 0x64 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 12 / List of VLC code lengths in second JPEG DC table / VP6 scan maps / VP7 VP8 DCT stream 5 base (all format mode)" line.long 0x68 "VDEC_SWREG27,VDEC base address for reference picture index 13/VC-1 bitpl mbctrl or VP6. VP7. VP8 ctrl stream base/progressive JPEG DC table register" hexmask.long 0x68 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 13 / VC-1 bitpl mbctrl or VP6 VP7 VP8 ctrl stream base /Progressive JPEG DC table(all format mode)" line.long 0x6C "VDEC_SWREG28,VDEC base address for reference picture index 14/VP6 scan maps /progressive JPEG DC table/VP7. VP8 DCT stream 6 base register" hexmask.long 0x6C 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 14 / VP6 scan maps /Progressive JPEG DC table / VP7 VP8 DCT stream 6 base (all format mode)" line.long 0x70 "VDEC_SWREG29,VDEC base address for reference picture index 15/VP6 scan maps/ VP7. VP8 DCT stream 7 base register" hexmask.long 0x70 0.--31. 1. "SWREG_FIELD,Base address for reference picture index 15 / VP6 scan maps / VP7 VP8 DCT stream 7 base (all format mode)" line.long 0x74 "VDEC_SWREG30,VDEC reference picture numbers for index 0 and 1. H264 VLC /VP6 scan maps/VP7. VP8 loop filter mb level adjusts register" hexmask.long 0x74 0.--31. 1. "SWREG_FIELD,Reference picture numbers for index 0 and 1 (H264 VLC) / VP6 scan maps / VP7 VP8 loop filter mb level adjusts (all format mode)" line.long 0x78 "VDEC_SWREG31,VDEC reference picture numbers for index 2 and 3. H264 VLC/ VP6 scan maps/VP7. VP8 loop filter ref pic level adjusts register" hexmask.long 0x78 0.--31. 1. "SWREG_FIELD,Reference picture numbers for index 2 and 3 (H264 VLC) / VP6 scan maps / VP7 VP8 loop filter ref pic level adjusts (all format mode)" line.long 0x7C "VDEC_SWREG32,VDEC reference picture numbers for index 4 and 5. H264 VLC/ VP6 scan maps/VP7. VP8 loop filter levels register" hexmask.long 0x7C 0.--31. 1. "SWREG_FIELD,Reference picture numbers for index 4 and 5 (H264 VLC) / VP6 scan maps / VP7 VP8 loop filter levels (all format mode)" line.long 0x80 "VDEC_SWREG33,VDEC reference picture numbers for index 6 and 7. H264 VLC /VP6 scan maps/VP7. VP8 quantization values register" hexmask.long 0x80 0.--31. 1. "SWREG_FIELD,Reference picture numbers for index 6 and 7 (H264 VLC) / VP6 scan maps / VP7 VP8 quantization values (all format mode)" line.long 0x84 "VDEC_SWREG34,VDEC reference picture numbers for index 8 and 9. H264 VLC /VP8 prediction filter taps register" hexmask.long 0x84 0.--31. 1. "SWREG_FIELD,Reference picture numbers for index 8 and 9 (H264 VLC) / VP8 prediction filter taps (all format mode)" line.long 0x88 "VDEC_SWREG35,VDEC reference picture numbers for index 10 and 11. H264 VLC /VP8 prediction filter taps register" hexmask.long 0x88 0.--31. 1. "SWREG_FIELD,Reference picture numbers for index 10 and 11 (H264 VLC) / VP8 prediction filter taps (all format mode)" line.long 0x8C "VDEC_SWREG36,VDEC reference picture numbers for index 12 and 13. H264 VLC/ VP8 prediction filter taps Register" hexmask.long 0x8C 0.--31. 1. "SWREG_FIELD,Reference picture numbers for index 12 and 13 (H264 VLC) / VP8 prediction filter taps (all format mode)" line.long 0x90 "VDEC_SWREG37,VDEC reference picture numbers for index 14 and 15. H264 VLC /VP8 prediction filter taps register" hexmask.long 0x90 0.--31. 1. "SWREG_FIELD,Reference picture numbers for index 14 and 15 (H264 VLC) / VP8 prediction filter taps (all format mode)" line.long 0x94 "VDEC_SWREG38,VDEC reference picture long term flags. H264 VLC/ VP8 prediction filter taps register" hexmask.long 0x94 0.--31. 1. "SWREG_FIELD,Reference picture long term flags (H264 VLC) / VP8 prediction filter taps (all format mode)" line.long 0x98 "VDEC_SWREG39,VDEC reference picture valid flags. H264 VLC/ VP8 prediction filter taps register" hexmask.long 0x98 0.--31. 1. "SWREG_FIELD,Reference picture valid flags (H264 VLC) / VP8 prediction filter taps (all format mode)" line.long 0x9C "VDEC_SWREG40,VDEC base address for standard dependent table register" hexmask.long 0x9C 0.--31. 1. "SWREG_FIELD,Base address for standard dependent tables (all format mode)" line.long 0xA0 "VDEC_SWREG41,VDEC base address for direct mode motion vectors/ progressive JPEG AC/DC coefficient read/write base register" hexmask.long 0xA0 0.--31. 1. "SWREG_FIELD,Base address for direct mode motion vectors/Progressive JPEG AC/DC coefficient read/write base (all format mode)" line.long 0xA4 "VDEC_SWREG42,VDEC bi_dir initial ref pic list register. 0-2/VP6 prediction filter taps/progressive JPEG Cb ACDC coefficient base register" hexmask.long 0xA4 0.--31. 1. "SWREG_FIELD,bi_dir initial ref pic list register (0-2) / VP6 prediction filter taps / Progressive JPEG Cb ACDC coefficient base (all format mode)" line.long 0xA8 "VDEC_SWREG43,VDEC bi-dir initial ref pic list register. 3-5/VP6 prediction filter taps/progressive JPEG Cr ACDC coefficient base register" hexmask.long 0xA8 0.--31. 1. "SWREG_FIELD,Bi-dir initial ref pic list register (3-5)/VP6 prediction filter taps / Progressive JPEG Cr ACDC coefficient base (all format mode)" line.long 0xAC "VDEC_SWREG44,VDEC bi-dir initial ref pic list register. 6-8/VP6 prediction filter taps register" hexmask.long 0xAC 0.--31. 1. "SWREG_FIELD,Bi-dir initial ref pic list register (6-8) / VP6 prediction filter taps (all format mode)" line.long 0xB0 "VDEC_SWREG45,VDEC bi-dir initial ref pic list register. 9-11/VP6 prediction filter taps register" hexmask.long 0xB0 0.--31. 1. "SWREG_FIELD,Bi-dir initial ref pic list register (9-11) / VP6 prediction filter taps (all format mode)" line.long 0xB4 "VDEC_SWREG46,VDEC bi-dir initial ref pic list register. 12-14/VP7.VP8 quantization values register" hexmask.long 0xB4 0.--31. 1. "SWREG_FIELD,Bi-dir initial ref pic list register (12-14) / VP7 VP8 quantization values (all format mode)" line.long 0xB8 "VDEC_SWREG47,VDEC bi-dir and P fwd initial ref pic list register. 15 and P 0-3/ VP7.VP8 quantization values register" hexmask.long 0xB8 0.--31. 1. "SWREG_FIELD,Bi-dir and P fwd initial ref pic list register (15 and P 0-3) / VP7 VP8 quantization values (all format mode)" line.long 0xBC "VDEC_SWREG48,VDEC error concealment register" hexmask.long 0xBC 0.--31. 1. "SWREG_FIELD,Error concealment register (all format mode)" line.long 0xC0 "VDEC_SWREG49,VDEC prediction filter tap register for H264" hexmask.long 0xC0 0.--31. 1. "SWREG_FIELD,Prediction filter tap register for H264" rgroup.long 0xC8++0x3 line.long 0x0 "VDEC_SWREG50,VDEC synthesis configuration register decoder 0" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Synthesis configuration register decoder 0 (read only) (all format mode)" group.long 0xCC++0x3 line.long 0x0 "VDEC_SWREG51,VDEC reference picture buffer control register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Reference picture buffer control register (all format mode)" rgroup.long 0xD8++0x3 line.long 0x0 "VDEC_SWREG54,VDEC synthesis configuration register decoder 1" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Synthesis configuration register decoder 1 (read only) (all format mode)" group.long 0xDC++0x3 line.long 0x0 "VDEC_SWREG55,VDEC reference picture buffer 2/advanced prefetch control register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Reference picture buffer 2 / Advanced prefetch control register (all format mode)" group.long 0xE8++0x7 line.long 0x0 "VDEC_SWREG58,VDEC device configuration register decoder 2/multicore control register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Device configuration register decoder 2 + Multi core control register (all format mode)" line.long 0x4 "VDEC_SWREG59,VDEC H264 chrominance 8 pixel interleaved data base register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,H264 Chrominance 8 pixel interleaved data base (all format mode)" group.long 0x198++0x43 line.long 0x0 "VDEC_SWREG102,VDEC base address for H264 and AVS decoded chroma picture register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Base address for H264 and AVS decoded chroma picture(all format mode)" line.long 0x4 "VDEC_SWREG103,VDEC base address for reference chroma picture index 0 register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 0 (all format mode)" line.long 0x8 "VDEC_SWREG104,VDEC base address for reference chroma picture index 1 register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 1 (all format mode)" line.long 0xC "VDEC_SWREG105,VDEC base address for reference chroma picture index 2 register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 2 (all format mode)" line.long 0x10 "VDEC_SWREG106,VDEC base address for reference chroma picture index 3 register" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 3 (all format mode)" line.long 0x14 "VDEC_SWREG107,VDEC base address for reference chroma picture index 4 register" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 4 (all format mode)" line.long 0x18 "VDEC_SWREG108,VDEC base address for reference chroma picture index 5 register" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 5 (all format mode)" line.long 0x1C "VDEC_SWREG109,VDEC base address for reference chroma picture index 6 register" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 6 (all format mode)" line.long 0x20 "VDEC_SWREG110,VDEC base address for reference chroma picture index 7 register" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 7 (all format mode)" line.long 0x24 "VDEC_SWREG111,VDEC base address for reference chroma picture index 8 register" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 8 (all format mode)" line.long 0x28 "VDEC_SWREG112,VDEC base address for reference chroma picture index 9 register" hexmask.long 0x28 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 9 (all format mode)" line.long 0x2C "VDEC_SWREG113,VDEC base address for reference chroma picture index 10 register" hexmask.long 0x2C 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 10 (all format mode)" line.long 0x30 "VDEC_SWREG114,VDEC base address for reference chroma picture index 11 register" hexmask.long 0x30 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 11 (all format mode)" line.long 0x34 "VDEC_SWREG115,VDEC base address for reference chroma picture index 12 register" hexmask.long 0x34 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 12 (all format mode)" line.long 0x38 "VDEC_SWREG116,VDEC base address for reference chroma picture index 13 register" hexmask.long 0x38 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 13 (all format mode)" line.long 0x3C "VDEC_SWREG117,VDEC base address for reference chroma picture index 14 register" hexmask.long 0x3C 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 14 (all format mode)" line.long 0x40 "VDEC_SWREG118,VDEC base address for reference chroma picture index 15 register" hexmask.long 0x40 0.--31. 1. "SWREG_FIELD,Base address for reference chroma picture index 15 (all format mode)" tree.end tree.end tree "VENC (Video Encoder)" base ad:0x0 tree "VENC" base ad:0x480E0000 group.long 0x0++0xF line.long 0x0 "VENC_SWREG0,VENC ID register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Identification register (all format mode)" line.long 0x4 "VENC_SWREG1,VENC interrupt register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,Interrupt register (all format mode)" line.long 0x8 "VENC_SWREG2,VENC bus interface configuration register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,Bus interface configuration register (all format mode)" line.long 0xC "VENC_SWREG3,VENC device configuration register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,Device configuration register (all format mode)" group.long 0x14++0xE7 line.long 0x0 "VENC_SWREG5,VENC base address for output stream data register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Base address for output stream data (all format mode)" line.long 0x4 "VENC_SWREG6,VENC base address for output control data register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,Base address for output control data (all format mode)" line.long 0x8 "VENC_SWREG7,VENC base address for reference luma register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,Base address for reference luma (all format mode)" line.long 0xC "VENC_SWREG8,VENC base address for reference chroma register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,Base address for reference chroma (all format mode)" line.long 0x10 "VENC_SWREG9,VENC base address for reconstructed luma register" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,Base address for reconstructed luma (all format mode)" line.long 0x14 "VENC_SWREG10,VENC base address for reconstructed chroma register" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,Base address for reconstructed chroma (all format mode)" line.long 0x18 "VENC_SWREG11,VENC base address for input picture luma register" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,Base address for input picture luma (all format mode)" line.long 0x1C "VENC_SWREG12,VENC base address for input picture cb register" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,Base address for input picture cb (all format mode)" line.long 0x20 "VENC_SWREG13,VENC base address for input picture cr register" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,Base address for input picture cr (all format mode)" line.long 0x24 "VENC_SWREG14,VENC encoder control register 0" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,Encoder control register 0 (such as picture information or encoding mode) (all format mode)" line.long 0x28 "VENC_SWREG15,VENC encoder control register 1" hexmask.long 0x28 0.--31. 1. "SWREG_FIELD,Encoder control register 1 (such as preprocessing control crop rotate input format) (all format mode)" line.long 0x2C "VENC_SWREG16,VENC encoder control register 2" hexmask.long 0x2C 0.--31. 1. "SWREG_FIELD,Base address for second reference luma (H264 control) (all format mode)" line.long 0x30 "VENC_SWREG17,VENC encoder control register 3" hexmask.long 0x30 0.--31. 1. "SWREG_FIELD,Base address for second reference chroma (H264 control) (all format mode)" line.long 0x34 "VENC_SWREG18,VENC encoder control register 4" hexmask.long 0x34 0.--31. 1. "SWREG_FIELD,Encoder control register 4 (deblock filter mode H264 control) (all format mode)" line.long 0x38 "VENC_SWREG19,VENC encoder control register 5" hexmask.long 0x38 0.--31. 1. "SWREG_FIELD,Encoder control register 5 (input format motion vector etc) (all format mode)" line.long 0x3C "VENC_SWREG20,VENC encoder control register 6" hexmask.long 0x3C 0.--31. 1. "SWREG_FIELD,Control of data JPEG or VP8 (all format mode)" line.long 0x40 "VENC_SWREG21,VENC encoder control register 7" hexmask.long 0x40 0.--31. 1. "SWREG_FIELD,Control of H264 or VP8 (all format mode)" line.long 0x44 "VENC_SWREG22,VENC stream header remainder MSB bits register" hexmask.long 0x44 0.--31. 1. "SWREG_FIELD,Stream header remainder bits MSB (MSB aligned) (all format mode)" line.long 0x48 "VENC_SWREG23,VENC stream header remainder LSB bits register" hexmask.long 0x48 0.--31. 1. "SWREG_FIELD,Stream header remainder bits LSB (MSB aligned) (all format mode)" line.long 0x4C "VENC_SWREG24,VENC stream buffer limit/output stream size register" hexmask.long 0x4C 0.--31. 1. "SWREG_FIELD,Stream buffer limit (64-bit addresses)/output stream size (bits) (allformat mode)" line.long 0x50 "VENC_SWREG25,VENC encoder control register 8" hexmask.long 0x50 0.--31. 1. "SWREG_FIELD,Control of MAD control and QP sum output (all format mode)" line.long 0x54 "VENC_SWREG26,VENC intra-slice bitmap/base address for VP8 counters register" hexmask.long 0x54 0.--31. 1. "SWREG_FIELD,intra-slice bitmap/base address for VP8 counters for probability updates (all format mode)" line.long 0x58 "VENC_SWREG27,VENC encoder control register 9" hexmask.long 0x58 0.--31. 1. "SWREG_FIELD,Control of H264 QP and VP8 QPY1 (all format mode)" line.long 0x5C "VENC_SWREG28,VENC encoder control register 10" hexmask.long 0x5C 0.--31. 1. "SWREG_FIELD,H264 checkpoint 1-2 and VP8 QPY1 (all format mode)" line.long 0x60 "VENC_SWREG29,VENC encoder control register 11" hexmask.long 0x60 0.--31. 1. "SWREG_FIELD,H.264 Checkpoint 3 -4 and VP8 QPY2 (all format mode)" line.long 0x64 "VENC_SWREG30,VENC encoder control register 12" hexmask.long 0x64 0.--31. 1. "SWREG_FIELD,H.264 checkpoint 5 -6 and VP8 QPY2 (all format mode)" line.long 0x68 "VENC_SWREG31,VENC encoder control register 13" hexmask.long 0x68 0.--31. 1. "SWREG_FIELD,H.264 checkpoint 7 -8 and VP8 QPCh (all format mode)" line.long 0x6C "VENC_SWREG32,VENC encoder control register 14" hexmask.long 0x6C 0.--31. 1. "SWREG_FIELD,H.264 Checkpoint 8 -10 / Encoder control register 14 (VP8 QPCh) (all format mode)" line.long 0x70 "VENC_SWREG33,VENC encoder control register 15" hexmask.long 0x70 0.--31. 1. "SWREG_FIELD,H.264 Checkpoint word error 1-2 and mvRefIdx/VP8 QPY1 (allformatmode)" line.long 0x74 "VENC_SWREG34,VENC encoder control register 16" hexmask.long 0x74 0.--31. 1. "SWREG_FIELD,H.264 checkpoint word error 3-4 and the second reference frame control (all format mode)" line.long 0x78 "VENC_SWREG35,VENC H.264 checkpoint word error 5-6/encoder control register 17" hexmask.long 0x78 0.--31. 1. "SWREG_FIELD,H.264 Checkpoint word error 5-6 / Encoder control register 17 (all format mode)" line.long 0x7C "VENC_SWREG36,VENC H.264 checkpoint delta QP 1-8/encoder control register 18" hexmask.long 0x7C 0.--31. 1. "SWREG_FIELD,H.264 Checkpoint delta QP 1-8 / Encoder control register 18 (LongTermPenalty VP8 Filter) (all format mode)" line.long 0x80 "VENC_SWREG37,VENC encoder control register 19. VP8 filter. stream start offset" hexmask.long 0x80 0.--31. 1. "SWREG_FIELD,Encoder control register 19 (VP8 filter stream start offset) (all format mode)" line.long 0x84 "VENC_SWREG38,VENC macroblock count output register" hexmask.long 0x84 0.--31. 1. "SWREG_FIELD,Macroblock count output (all format mode)" line.long 0x88 "VENC_SWREG39,VENC base address for next pic luminance register" hexmask.long 0x88 0.--31. 1. "SWREG_FIELD,Base address for next pic luminance (all format mode)" line.long 0x8C "VENC_SWREG40,VENC stabilization mode control register" hexmask.long 0x8C 0.--31. 1. "SWREG_FIELD,Stabilization mode control (all format mode)" line.long 0x90 "VENC_SWREG41,VENC stabilization motion sum div8 output register" hexmask.long 0x90 0.--31. 1. "SWREG_FIELD,Stabilization motion sum div8 output (all format mode)" line.long 0x94 "VENC_SWREG42,VENC stabilization GMV output. matrix 1. up-left position output register" hexmask.long 0x94 0.--31. 1. "SWREG_FIELD,Stabilization GMV output matrix 1 (up-left position) output (all format mode)" line.long 0x98 "VENC_SWREG43,VENC stabilization GMV output. matrix 2. up position output register" hexmask.long 0x98 0.--31. 1. "SWREG_FIELD,Stabilization GMV output matrix 2 (up position) output (all format mode)" line.long 0x9C "VENC_SWREG44,VENC stabilization matrix 3. up-right position output register" hexmask.long 0x9C 0.--31. 1. "SWREG_FIELD,Stabilization matrix 3 (up-right position) output (all format mode)" line.long 0xA0 "VENC_SWREG45,VENC stabilization matrix 4. left position output register" hexmask.long 0xA0 0.--31. 1. "SWREG_FIELD,Stabilization matrix 4 (left position) output (all format mode)" line.long 0xA4 "VENC_SWREG46,VENC stabilization matrix 5. GMV position output register" hexmask.long 0xA4 0.--31. 1. "SWREG_FIELD,Stabilization matrix 5 (GMV position) output (all format mode)" line.long 0xA8 "VENC_SWREG47,VENC stabilization matrix 6. right position output register" hexmask.long 0xA8 0.--31. 1. "SWREG_FIELD,Stabilization matrix 6 (right position) output (all format mode)" line.long 0xAC "VENC_SWREG48,VENC stabilization matrix 7. down-left position output register" hexmask.long 0xAC 0.--31. 1. "SWREG_FIELD,Stabilization matrix 7 (down-left position) output (all format mode)" line.long 0xB0 "VENC_SWREG49,VENC stabilization matrix 8. down position output register" hexmask.long 0xB0 0.--31. 1. "SWREG_FIELD,Stabilization matrix 8 (down position) output (all format mode)" line.long 0xB4 "VENC_SWREG50,VENC stabilization matrix 9. down-right position output register" hexmask.long 0xB4 0.--31. 1. "SWREG_FIELD,Stabilization matrix 9 (down-right position) output (all format mode)" line.long 0xB8 "VENC_SWREG51,VENC base address for cabac context tables H264 or probability tables VP8 register" hexmask.long 0xB8 0.--31. 1. "SWREG_FIELD,Base address for cabac context tables (H264) or probability tables (VP8) (all format mode)" line.long 0xBC "VENC_SWREG52,VENC base address for MV output writing register" hexmask.long 0xBC 0.--31. 1. "SWREG_FIELD,Base address for MV output writing (all format mode)" line.long 0xC0 "VENC_SWREG53,VENC RGB to YUV conversion coefficient A - B register" hexmask.long 0xC0 0.--31. 1. "SWREG_FIELD,RGB to YUV conversion coefficient A - B (all format mode)" line.long 0xC4 "VENC_SWREG54,VENC RGB to YUV conversion coefficient C - E register" hexmask.long 0xC4 0.--31. 1. "SWREG_FIELD,RGB to YUV conversion coefficient C - E (all format mode)" line.long 0xC8 "VENC_SWREG55,VENC RGB to YUV conversion coefficient F. RGB mask MSB bit position register" hexmask.long 0xC8 0.--31. 1. "SWREG_FIELD,RGB to YUV conversion coefficient F RGB mask MSB bit position (all format mode)" line.long 0xCC "VENC_SWREG56,VENC intra area register" hexmask.long 0xCC 0.--31. 1. "SWREG_FIELD,intra area (all format mode)" line.long 0xD0 "VENC_SWREG57,VENC CIR intra mb position register" hexmask.long 0xD0 0.--31. 1. "SWREG_FIELD,CIR intra mb position (all format mode)" line.long 0xD4 "VENC_SWREG58,VENC intra slice bitmap for slices 0..31/base address for VP8 1st DCT partition register" hexmask.long 0xD4 0.--31. 1. "SWREG_FIELD,intra slice bitmap for slices 0..31 / Base address for VP8 1st DCT partition (all format mode)" line.long 0xD8 "VENC_SWREG59,VENC intra slice bitmap for slices 32..63/base address for VP8 2nd DCT partition register" hexmask.long 0xD8 0.--31. 1. "SWREG_FIELD,intra slice bitmap for slices 32..63 / Base address for VP8 2nd DCT partition (all format mode)" line.long 0xDC "VENC_SWREG60,VENC 1st ROI area register" hexmask.long 0xDC 0.--31. 1. "SWREG_FIELD,1st ROI area (all format mode)" line.long 0xE0 "VENC_SWREG61,VENC 2nd ROI area register" hexmask.long 0xE0 0.--31. 1. "SWREG_FIELD,2nd ROI area (all format mode)" line.long 0xE4 "VENC_SWREG62,VENC ROI area delta QP. MV register" hexmask.long 0xE4 0.--31. 1. "SWREG_FIELD,ROI area delta QP MV (all format mode)" rgroup.long 0xFC++0x3 line.long 0x0 "VENC_SWREG63,VENC synthesis configuration register encoder 0 register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Synthesis configuration register encoder 0 (read only) (all format mode)" group.long 0x100++0x7F line.long 0x0 "VENC_SWREG64,VENC JPEG luma quantization 1/VP8 intra 16x16 mode 0-1 penalty register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 1 / VP8 intra 16x16 mode 0-1 penalty (all format mode)" line.long 0x4 "VENC_SWREG65,VENC JPEG luma quantization 2/VP8 intra 16x16 mode 2-3 penalty register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 2 / VP8 intra 16x16 mode 2-3 penalty (all format mode)" line.long 0x8 "VENC_SWREG66,VENC JPEG luma quantization 3/VP8 intra 4x4 mode 0-1 penalty register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 3 / VP8 intra 4x4 mode 0-1 penalty (all format mode)" line.long 0xC "VENC_SWREG67,VENC JPEG luma quantization 4/VP8 intra 4x4 mode 2-3 penalty register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 4 / VP8 intra 4x4 mode 2-3 penalty (all format mode)" line.long 0x10 "VENC_SWREG68,VENC JPEG luma quantization 5/VP8 intra 4x4 mode 4-5 penalty register" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 5 / VP8 intra 4x4 mode 4-5 penalty (all format mode)" line.long 0x14 "VENC_SWREG69,VENC JPEG luma quantization 6/VP8 intra 4x4 mode 6-7 penalty register" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 6 / VP8 intra 4x4 mode 6-7 penalty (all format mode)" line.long 0x18 "VENC_SWREG70,VENC JPEG luma quantization 7/VP8 intra 4x4 mode 8-9 penalty register" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 7 / VP8 intra 4x4 mode 8-9 penalty (all format mode)" line.long 0x1C "VENC_SWREG71,VENC JPEG luma quantization 8/base address for VP8 segmentation map register" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 8 / Base address for VP8 segmentation map (all format mode)" line.long 0x20 "VENC_SWREG72,VENC JPEG luma quantization 9/VP8 segment1 parameter register" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 9 / VP8 segment1 parameter (all format mode)" line.long 0x24 "VENC_SWREG73,VENC JPEG luma quantization 10/VP8 segment1 parameter register" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 10 / VP8 segment1 parameter (all format mode)" line.long 0x28 "VENC_SWREG74,VENC JPEG luma quantization 11/VP8 segment1 parameter register" hexmask.long 0x28 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 11 / VP8 segment1 parameter (all format mode)" line.long 0x2C "VENC_SWREG75,VENC JPEG luma quantization 12/VP8 segment1 parameter register" hexmask.long 0x2C 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 12 / VP8 segment1 parameter (all format mode)" line.long 0x30 "VENC_SWREG76,VENC JPEG luma quantization 13/VP8 segment1 parameter register" hexmask.long 0x30 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 13 / VP8 segment1 parameter (all format mode)" line.long 0x34 "VENC_SWREG77,VENC JPEG luma quantization 14/VP8 segment1 parameter register" hexmask.long 0x34 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 14 / VP8 segment1 parameter (all format mode)" line.long 0x38 "VENC_SWREG78,VENC JPEG luma quantization 15/VP8 segment1 parameter register" hexmask.long 0x38 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 15 / VP8 segment1 parameter (all format mode)" line.long 0x3C "VENC_SWREG79,VENC JPEG luma quantization 16/VP8 segment2 parameter register" hexmask.long 0x3C 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 16 / VP8 segment2 parameter (all format mode)" line.long 0x40 "VENC_SWREG80,VENC JPEG chroma quantization 1/VP8 segment2 parameter register" hexmask.long 0x40 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 1 / VP8 segment2 parameter (all format mode)" line.long 0x44 "VENC_SWREG81,VENC JPEG chroma quantization 2/VP8 segment2 parameter register" hexmask.long 0x44 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 2 / VP8 segment2 parameter (all format mode)" line.long 0x48 "VENC_SWREG82,VENC JPEG chroma quantization 3/VP8 segment2 parameter register" hexmask.long 0x48 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 3 / VP8 segment2 parameter (all format mode)" line.long 0x4C "VENC_SWREG83,VENC JPEG chroma quantization 4/VP8 segment2 parameter register" hexmask.long 0x4C 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 4 / VP8 segment2 parameter (all format mode)" line.long 0x50 "VENC_SWREG84,VENC JPEG chroma quantization 5/VP8 segment2 parameter register" hexmask.long 0x50 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 5 / VP8 segment2 parameter (all format mode)" line.long 0x54 "VENC_SWREG85,VENC JPEG chroma quantization 6/VP8 segment2 parameter register" hexmask.long 0x54 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 6 / VP8 segment2 parameter (all format mode)" line.long 0x58 "VENC_SWREG86,VENC JPEG chroma quantization 7/VP8 segment2 parameter register" hexmask.long 0x58 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 7 / VP8 segment2 parameter (all format mode)" line.long 0x5C "VENC_SWREG87,VENC JPEG chroma quantization 8/VP8 segment2 parameter register" hexmask.long 0x5C 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 8 / VP8 segment2 parameter (all format mode)" line.long 0x60 "VENC_SWREG88,VENC JPEG chroma quantization 9/VP8 segment3 parameter register" hexmask.long 0x60 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 9 / VP8 segment3 parameter (all format mode)" line.long 0x64 "VENC_SWREG89,VENC JPEG chroma quantization 10/VP8 segment3 parameter register" hexmask.long 0x64 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 10 / VP8 segment3 parameter (all format mode)" line.long 0x68 "VENC_SWREG90,VENC JPEG chroma quantization 11/VP8 segment3 parameter register" hexmask.long 0x68 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 11 / VP8 segment3 parameter (all format mode)" line.long 0x6C "VENC_SWREG91,VENC JPEG chroma quantization 12/VP8 segment3 parameter register" hexmask.long 0x6C 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 12 / VP8 segment3 parameter (all format mode)" line.long 0x70 "VENC_SWREG92,VENC JPEG chroma quantization 13/VP8 segment3 parameter register" hexmask.long 0x70 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 13 / VP8 segment3 parameter (all format mode)" line.long 0x74 "VENC_SWREG93,VENC JPEG chroma quantization 14/VP8 segment3 parameter register" hexmask.long 0x74 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 14 / VP8 segment3 parameter (all format mode)" line.long 0x78 "VENC_SWREG94,VENC JPEG chroma quantization 15/VP8 segment3 parameter register" hexmask.long 0x78 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 15 / VP8 segment3 parameter (all format mode)" line.long 0x7C "VENC_SWREG95,VENC JPEG chroma quantization 16/VP8 segment3 parameter register" hexmask.long 0x7C 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 16 / VP8 segment3 parameter (all format mode)" wgroup.long 0x180++0xFF line.long 0x0 "VENC_SWREG96,VENC DMV 4p/1p penalty values 0-3 register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values 0-3 (all format mode)" line.long 0x4 "VENC_SWREG97,VENC DMV 4p/1p penalty values 4-7 register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values 4-7 (all format mode)" line.long 0x8 "VENC_SWREG98,VENC DMV 4p/1p penalty values register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0xC "VENC_SWREG99,VENC DMV 4p/1p penalty values register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x10 "VENC_SWREG100,VENC DMV 4p/1p penalty values register" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x14 "VENC_SWREG101,VENC DMV 4p/1p penalty values register" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x18 "VENC_SWREG102,VENC DMV 4p/1p penalty values register" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x1C "VENC_SWREG103,VENC DMV 4p/1p penalty values register" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x20 "VENC_SWREG104,VENC DMV 4p/1p penalty values register" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x24 "VENC_SWREG105,VENC DMV 4p/1p penalty values register" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x28 "VENC_SWREG106,VENC DMV 4p/1p penalty values register" hexmask.long 0x28 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x2C "VENC_SWREG107,VENC DMV 4p/1p penalty values register" hexmask.long 0x2C 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x30 "VENC_SWREG108,VENC DMV 4p/1p penalty values register" hexmask.long 0x30 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x34 "VENC_SWREG109,VENC DMV 4p/1p penalty values register" hexmask.long 0x34 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x38 "VENC_SWREG110,VENC DMV 4p/1p penalty values register" hexmask.long 0x38 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x3C "VENC_SWREG111,VENC DMV 4p/1p penalty values register" hexmask.long 0x3C 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x40 "VENC_SWREG112,VENC DMV 4p/1p penalty values register" hexmask.long 0x40 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x44 "VENC_SWREG113,VENC DMV 4p/1p penalty values register" hexmask.long 0x44 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x48 "VENC_SWREG114,VENC DMV 4p/1p penalty values register" hexmask.long 0x48 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x4C "VENC_SWREG115,VENC DMV 4p/1p penalty values register" hexmask.long 0x4C 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x50 "VENC_SWREG116,VENC DMV 4p/1p penalty values register" hexmask.long 0x50 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x54 "VENC_SWREG117,VENC DMV 4p/1p penalty values register" hexmask.long 0x54 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x58 "VENC_SWREG118,VENC DMV 4p/1p penalty values register" hexmask.long 0x58 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x5C "VENC_SWREG119,VENC DMV 4p/1p penalty values register" hexmask.long 0x5C 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x60 "VENC_SWREG120,VENC DMV 4p/1p penalty values register" hexmask.long 0x60 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x64 "VENC_SWREG121,VENC DMV 4p/1p penalty values register" hexmask.long 0x64 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x68 "VENC_SWREG122,VENC DMV 4p/1p penalty values register" hexmask.long 0x68 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x6C "VENC_SWREG123,VENC DMV 4p/1p penalty values register" hexmask.long 0x6C 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x70 "VENC_SWREG124,VENC DMV 4p/1p penalty values register" hexmask.long 0x70 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x74 "VENC_SWREG125,VENC DMV 4p/1p penalty values register" hexmask.long 0x74 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x78 "VENC_SWREG126,VENC DMV 4p/1p penalty values register" hexmask.long 0x78 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x7C "VENC_SWREG127,VENC DMV 4p/1p penalty values 124-127 register" hexmask.long 0x7C 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values 124-127 (all format mode)" line.long 0x80 "VENC_SWREG128,VENC DMV qpel penalty values 0-3 register" hexmask.long 0x80 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values 0-3 (all format mode)" line.long 0x84 "VENC_SWREG129,VENC DMV qpel penalty values 4-7 register" hexmask.long 0x84 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values 4-7 (all format mode)" line.long 0x88 "VENC_SWREG130,VENC DMV qpel penalty values register" hexmask.long 0x88 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0x8C "VENC_SWREG131,VENC DMV qpel penalty values register" hexmask.long 0x8C 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0x90 "VENC_SWREG132,VENC DMV qpel penalty values register" hexmask.long 0x90 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0x94 "VENC_SWREG133,VENC DMV qpel penalty values register" hexmask.long 0x94 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0x98 "VENC_SWREG134,VENC DMV qpel penalty values register" hexmask.long 0x98 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0x9C "VENC_SWREG135,VENC DMV qpel penalty values register" hexmask.long 0x9C 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xA0 "VENC_SWREG136,VENC DMV qpel penalty values register" hexmask.long 0xA0 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xA4 "VENC_SWREG137,VENC DMV qpel penalty values register" hexmask.long 0xA4 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xA8 "VENC_SWREG138,VENC DMV qpel penalty values register" hexmask.long 0xA8 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xAC "VENC_SWREG139,VENC DMV qpel penalty values register" hexmask.long 0xAC 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xB0 "VENC_SWREG140,VENC DMV qpel penalty values register" hexmask.long 0xB0 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xB4 "VENC_SWREG141,VENC DMV qpel penalty values register" hexmask.long 0xB4 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xB8 "VENC_SWREG142,VENC DMV qpel penalty values register" hexmask.long 0xB8 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xBC "VENC_SWREG143,VENC DMV qpel penalty values register" hexmask.long 0xBC 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xC0 "VENC_SWREG144,VENC DMV qpel penalty values register" hexmask.long 0xC0 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xC4 "VENC_SWREG145,VENC DMV qpel penalty values register" hexmask.long 0xC4 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xC8 "VENC_SWREG146,VENC DMV qpel penalty values register" hexmask.long 0xC8 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xCC "VENC_SWREG147,VENC DMV qpel penalty values register" hexmask.long 0xCC 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xD0 "VENC_SWREG148,VENC DMV qpel penalty values register" hexmask.long 0xD0 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xD4 "VENC_SWREG149,VENC DMV qpel penalty values register" hexmask.long 0xD4 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xD8 "VENC_SWREG150,VENC DMV qpel penalty values register" hexmask.long 0xD8 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xDC "VENC_SWREG151,VENC DMV qpel penalty values register" hexmask.long 0xDC 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xE0 "VENC_SWREG152,VENC DMV qpel penalty values register" hexmask.long 0xE0 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xE4 "VENC_SWREG153,VENC DMV qpel penalty values register" hexmask.long 0xE4 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xE8 "VENC_SWREG154,VENC DMV qpel penalty values register" hexmask.long 0xE8 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xEC "VENC_SWREG155,VENC DMV qpel penalty values register" hexmask.long 0xEC 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xF0 "VENC_SWREG156,VENC DMV qpel penalty values register" hexmask.long 0xF0 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xF4 "VENC_SWREG157,VENC DMV qpel penalty values register" hexmask.long 0xF4 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xF8 "VENC_SWREG158,VENC DMV qpel penalty values register" hexmask.long 0xF8 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xFC "VENC_SWREG159,VENC DMV qpel penalty values 124-127 register" hexmask.long 0xFC 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values 124-127 (all format mode)" group.long 0x280++0x127 line.long 0x0 "VENC_SWREG160,VENC VP8 bit cost of inter type. coeff for dmv penalty register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,VP8 bit cost of inter type coeff for dmv penalty etc (all format mode)" line.long 0x4 "VENC_SWREG161,VENC VP8 bit cost of golden ref frame register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,VP8 bit cost of golden ref frame (not used) (all format mode)" line.long 0x8 "VENC_SWREG162,VENC VP8 loop filter delta register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,VP8 loop filter delta (all format mode)" line.long 0xC "VENC_SWREG163,VENC VP8 loop filter delta register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,VP8 loop filter delta (all format mode)" line.long 0x10 "VENC_SWREG164,VENC VP8 deadzone lookup table register" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x14 "VENC_SWREG165,VENC VP8 deadzone lookup table register" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x18 "VENC_SWREG166,VENC VP8 deadzone lookup table register" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x1C "VENC_SWREG167,VENC VP8 deadzone lookup table register" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x20 "VENC_SWREG168,VENC VP8 deadzone lookup table register" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x24 "VENC_SWREG169,VENC VP8 deadzone lookup table register" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x28 "VENC_SWREG170,VENC VP8 deadzone lookup table register" hexmask.long 0x28 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x2C "VENC_SWREG171,VENC VP8 deadzone lookup table register" hexmask.long 0x2C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x30 "VENC_SWREG172,VENC VP8 deadzone lookup table register" hexmask.long 0x30 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x34 "VENC_SWREG173,VENC VP8 deadzone lookup table register" hexmask.long 0x34 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x38 "VENC_SWREG174,VENC VP8 deadzone lookup table register" hexmask.long 0x38 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x3C "VENC_SWREG175,VENC VP8 deadzone lookup table register" hexmask.long 0x3C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x40 "VENC_SWREG176,VENC VP8 deadzone lookup table register" hexmask.long 0x40 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x44 "VENC_SWREG177,VENC VP8 deadzone lookup table register" hexmask.long 0x44 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x48 "VENC_SWREG178,VENC VP8 deadzone lookup table register" hexmask.long 0x48 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x4C "VENC_SWREG179,VENC VP8 deadzone lookup table register" hexmask.long 0x4C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x50 "VENC_SWREG180,VENC VP8 deadzone lookup table register" hexmask.long 0x50 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x54 "VENC_SWREG181,VENC VP8 deadzone lookup table register" hexmask.long 0x54 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x58 "VENC_SWREG182,VENC VP8 deadzone lookup table register" hexmask.long 0x58 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x5C "VENC_SWREG183,VENC VP8 deadzone lookup table register" hexmask.long 0x5C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x60 "VENC_SWREG184,VENC VP8 deadzone lookup table register" hexmask.long 0x60 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x64 "VENC_SWREG185,VENC VP8 deadzone lookup table register" hexmask.long 0x64 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x68 "VENC_SWREG186,VENC VP8 deadzone lookup table register" hexmask.long 0x68 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x6C "VENC_SWREG187,VENC VP8 deadzone lookup table register" hexmask.long 0x6C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x70 "VENC_SWREG188,VENC VP8 deadzone lookup table register" hexmask.long 0x70 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x74 "VENC_SWREG189,VENC VP8 deadzone lookup table register" hexmask.long 0x74 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x78 "VENC_SWREG190,VENC VP8 deadzone lookup table register" hexmask.long 0x78 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x7C "VENC_SWREG191,VENC VP8 deadzone lookup table register" hexmask.long 0x7C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x80 "VENC_SWREG192,VENC VP8 deadzone lookup table register" hexmask.long 0x80 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x84 "VENC_SWREG193,VENC VP8 deadzone lookup table register" hexmask.long 0x84 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x88 "VENC_SWREG194,VENC VP8 deadzone lookup table register" hexmask.long 0x88 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x8C "VENC_SWREG195,VENC VP8 deadzone lookup table register" hexmask.long 0x8C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x90 "VENC_SWREG196,VENC VP8 deadzone lookup table register" hexmask.long 0x90 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x94 "VENC_SWREG197,VENC VP8 deadzone lookup table register" hexmask.long 0x94 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x98 "VENC_SWREG198,VENC VP8 deadzone lookup table register" hexmask.long 0x98 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x9C "VENC_SWREG199,VENC VP8 deadzone lookup table register" hexmask.long 0x9C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xA0 "VENC_SWREG200,VENC VP8 deadzone lookup table register" hexmask.long 0xA0 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xA4 "VENC_SWREG201,VENC VP8 deadzone lookup table register" hexmask.long 0xA4 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xA8 "VENC_SWREG202,VENC VP8 deadzone lookup table register" hexmask.long 0xA8 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xAC "VENC_SWREG203,VENC VP8 deadzone lookup table register" hexmask.long 0xAC 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xB0 "VENC_SWREG204,VENC VP8 deadzone lookup table register" hexmask.long 0xB0 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xB4 "VENC_SWREG205,VENC VP8 deadzone lookup table register" hexmask.long 0xB4 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xB8 "VENC_SWREG206,VENC VP8 deadzone lookup table register" hexmask.long 0xB8 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xBC "VENC_SWREG207,VENC VP8 deadzone lookup table register" hexmask.long 0xBC 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xC0 "VENC_SWREG208,VENC VP8 deadzone lookup table register" hexmask.long 0xC0 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xC4 "VENC_SWREG209,VENC VP8 deadzone lookup table register" hexmask.long 0xC4 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xC8 "VENC_SWREG210,VENC VP8 deadzone lookup table register" hexmask.long 0xC8 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xCC "VENC_SWREG211,VENC VP8 deadzone lookup table register" hexmask.long 0xCC 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xD0 "VENC_SWREG212,VENC VP8 deadzone lookup table register" hexmask.long 0xD0 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xD4 "VENC_SWREG213,VENC VP8 deadzone lookup table register" hexmask.long 0xD4 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xD8 "VENC_SWREG214,VENC VP8 deadzone lookup table register" hexmask.long 0xD8 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xDC "VENC_SWREG215,VENC VP8 deadzone lookup table register" hexmask.long 0xDC 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xE0 "VENC_SWREG216,VENC VP8 deadzone lookup table register" hexmask.long 0xE0 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xE4 "VENC_SWREG217,VENC VP8 deadzone lookup table register" hexmask.long 0xE4 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xE8 "VENC_SWREG218,VENC VP8 deadzone lookup table register" hexmask.long 0xE8 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xEC "VENC_SWREG219,VENC VP8 deadzone lookup table register" hexmask.long 0xEC 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xF0 "VENC_SWREG220,VENC VP8 deadzone lookup table register" hexmask.long 0xF0 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xF4 "VENC_SWREG221,VENC VP8 deadzone lookup table register" hexmask.long 0xF4 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xF8 "VENC_SWREG222,VENC VP8 deadzone lookup table register" hexmask.long 0xF8 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xFC "VENC_SWREG223,VENC VP8 deadzone lookup table register" hexmask.long 0xFC 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x100 "VENC_SWREG224,VENC VP8 deadzone lookup table register" hexmask.long 0x100 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x104 "VENC_SWREG225,VENC VP8 deadzone lookup table register" hexmask.long 0x104 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x108 "VENC_SWREG226,VENC VP8 deadzone lookup table register" hexmask.long 0x108 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x10C "VENC_SWREG227,VENC VP8 deadzone lookup table register" hexmask.long 0x10C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x110 "VENC_SWREG228,VENC VP8 deadzone rate multiplier for plane 0-1 register" hexmask.long 0x110 0.--31. 1. "SWREG_FIELD,VP8 deadzone rate multiplier for plane 0-1 (all format mode)" line.long 0x114 "VENC_SWREG229,VENC VP8 deadzone rate multiplier for plane 2-3 register" hexmask.long 0x114 0.--31. 1. "SWREG_FIELD,VP8 deadzone rate multiplier for plane 2-3 (all format mode)" line.long 0x118 "VENC_SWREG230,VENC VP8 deadzone rate for macroblock skip token 0-1 register" hexmask.long 0x118 0.--31. 1. "SWREG_FIELD,VP8 deadzone rate for macroblock skip token 0-1 (all format mode)" line.long 0x11C "VENC_SWREG231,VENC base address for output of down-scaled encoder image in YUYV 4:2:2 format register" hexmask.long 0x11C 0.--31. 1. "SWREG_FIELD,Base address for output of down-scaled encoder image in YUYV 4:2:2 format (all format mode)" line.long 0x120 "VENC_SWREG232,VENC scaling control register" hexmask.long 0x120 0.--31. 1. "SWREG_FIELD,Scaling control (all format mode)" line.long 0x124 "VENC_SWREG233,VENC scaling control register" hexmask.long 0x124 0.--31. 1. "SWREG_FIELD,Scaling control (all format mode)" group.long 0x3B0++0x27 line.long 0x0 "VENC_SWREG236,VENC squared error output calculated for 13x13 pixels per macroblock register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Squared error output calculated for 13x13 pixels per macroblock (all format mode)" line.long 0x4 "VENC_SWREG237,VENC MAD 2 control and output register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,MAD 2 control and output (all format mode)" line.long 0x8 "VENC_SWREG238,VENC MAD 3 control and output register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,MAD 3 control and output (all format mode)" line.long 0xC "VENC_SWREG239,VENC VP8 predictor interpolation coefficient for full pixel position register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,VP8 predictor interpolation coefficient for full pixel position (all format mode)" line.long 0x10 "VENC_SWREG240,VENC VP8 predictor interpolation coefficient for 1/8 pixel position register" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,VP8 predictor interpolation coefficient for 1/8 pixel position (all format mode)" line.long 0x14 "VENC_SWREG241,VENC VP8 predictor interpolation coefficient for 2/8 pixel position register" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,VP8 predictor interpolation coefficient for 2/8 pixel position (all format mode)" line.long 0x18 "VENC_SWREG242,VENC VP8 predictor interpolation coefficient for 3/8 pixel position register" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,VP8 predictor interpolation coefficient for 3/8 pixel position (all format mode)" line.long 0x1C "VENC_SWREG243,VENC VP8 predictor interpolation coefficient for 4/8 pixel position register" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,VP8 predictor interpolation coefficient for 4/8 pixel position (all format mode)" line.long 0x20 "VENC_SWREG244,VENC base address for VP8 3rd DCT partition register" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,Base address for VP8 3rd DCT partition (all format mode)" line.long 0x24 "VENC_SWREG245,VENC base address for VP8 4th DCT partition register" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,Base address for VP8 4th DCT partition (all format mode)" group.long 0x400++0x9F line.long 0x0 "VENC_SWREG256,VENC segment 1: intra 16x16 mode 0-2 penalty register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,segment 1: intra 16x16 mode 0-2 penalty (all format mode)" line.long 0x4 "VENC_SWREG257,VENC segment 1: intra 16x16 mode 3. intra 4x4 0-1 penalty register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,segment 1: intra 16x16 mode 3 and intra 4x4 0-1 penalty (all format mode)" line.long 0x8 "VENC_SWREG258,VENC segment 1: intra 4x4 mode 2-4 penalty register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,segment 1: intra 4x4 mode 2-4 penalty (all format mode)" line.long 0xC "VENC_SWREG259,VENC segment 1: intra 4x4 mode 5-7 penalty register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,segment 1: intra 4x4 mode 5-7 penalty (all format mode)" line.long 0x10 "VENC_SWREG260,VENC segment 1: intra 4x4 mode 8-9 penalty. previous mode favor for H.264 register" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,segment 1: intra 4x4 mode 8-9 penalty previous mode favor for H.264 (all format mode)" line.long 0x14 "VENC_SWREG261,VENC segment 1: bit cost of inter type. intra 16x16 mode favor register" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,segment 1: Bit cost of inter type intra 16x16 mode favor (all format mode)" line.long 0x18 "VENC_SWREG262,VENC segment 1: inter MB mode favor. skip mode penalty. penalty value for 2nd reference frame register" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,segment 1: inter MB mode favor skip mode penalty penalty value for second reference frame (all format mode)" line.long 0x1C "VENC_SWREG263,VENC segment 1: penalty value register" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,segment 1: penalty value (all format mode)" line.long 0x20 "VENC_SWREG264,VENC segment 1: penalty value register" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,segment 1: penalty value (all format mode)" line.long 0x24 "VENC_SWREG265,VENC segment 1: deadzone rate multiplier for plane 0-1 register" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,segment 1: Deadzone rate multiplier for plane 0-1 (all format mode)" line.long 0x28 "VENC_SWREG266,VENC segment 1: deadzone rate multiplier for plane 2-3 register" hexmask.long 0x28 0.--31. 1. "SWREG_FIELD,segment 1: Deadzone rate multiplier for plane 2-3 (all format mode)" line.long 0x2C "VENC_SWREG267,VENC segment 1: deadzone rate for macroblock skip token 0-1. dmv penalty coefficient register" hexmask.long 0x2C 0.--31. 1. "SWREG_FIELD,segment 1: Deadzone rate for macroblock skip token 0-1 dmv penalty coefficient (all format mode)" line.long 0x30 "VENC_SWREG268,VENC segment 2: intra 16x16 mode 0-2 penalty register" hexmask.long 0x30 0.--31. 1. "SWREG_FIELD,segment 2: intra 16x16 mode 0-2 penalty (all format mode)" line.long 0x34 "VENC_SWREG269,VENC segment 2: intra 16x16 mode 3 penalty. intra 4x4 mode 0-1 penalty register" hexmask.long 0x34 0.--31. 1. "SWREG_FIELD,segment 2: intra 16x16 mode 3 penalty intra 4x4 mode 0-1 penalty (all format mode)" line.long 0x38 "VENC_SWREG270,VENC segment 2: intra 4x4 mode 2-4 penalty register" hexmask.long 0x38 0.--31. 1. "SWREG_FIELD,segment 2: intra 4x4 mode 2-4 penalty (all format mode)" line.long 0x3C "VENC_SWREG271,VENC segment 2: intra 4x4 mode 5-7 penalty register" hexmask.long 0x3C 0.--31. 1. "SWREG_FIELD,segment 2: intra 4x4 mode 5-7 penalty (all format mode)" line.long 0x40 "VENC_SWREG272,VENC segment 2: intra 4x4 mode 8-9 penalty. intra 4x4 previous mode favor for H.264 register" hexmask.long 0x40 0.--31. 1. "SWREG_FIELD,segment 2: intra 4x4 mode 8-9 penalty intra 4x4 previous mode favor for H.264 (all format mode)" line.long 0x44 "VENC_SWREG273,VENC segment 2: bit cost of inter type. intra 16x16 mode favor register" hexmask.long 0x44 0.--31. 1. "SWREG_FIELD,segment 2: Bit cost of inter type intra 16x16 mode favor (all format mode)" line.long 0x48 "VENC_SWREG274,VENC segment 2: inter MB mode favor. skip mode penalty. penalty value register" hexmask.long 0x48 0.--31. 1. "SWREG_FIELD,segment 2: inter MB mode favor skip mode penalty panelty value (all format mode)" line.long 0x4C "VENC_SWREG275,VENC segment 2: penalty value register" hexmask.long 0x4C 0.--31. 1. "SWREG_FIELD,segment 2: penalty value (all format mode)" line.long 0x50 "VENC_SWREG276,VENC segment 2: penalty value register" hexmask.long 0x50 0.--31. 1. "SWREG_FIELD,segment 2: penalty value (all format mode)" line.long 0x54 "VENC_SWREG277,VENC segment 2: deadzone rate multiplier for plane 0-1 register" hexmask.long 0x54 0.--31. 1. "SWREG_FIELD,segment 2: Deadzone rate multiplier for plane 0-1 (all format mode)" line.long 0x58 "VENC_SWREG278,VENC segment 2: deadzone rate multiplier for plane 2-3 register" hexmask.long 0x58 0.--31. 1. "SWREG_FIELD,segment 2: Deadzone rate multiplier for plane 2-3 (all format mode)" line.long 0x5C "VENC_SWREG279,VENC segment 2: deadzone rate for macroblock skip token 0-1. dmv penalty coefficient register" hexmask.long 0x5C 0.--31. 1. "SWREG_FIELD,segment 2: Deadzone rate for macroblock skip token 0-1 dmv penalty coefficient (all format mode)" line.long 0x60 "VENC_SWREG280,VENC segment 3: intra 16x16 mode 0-2 penalty register" hexmask.long 0x60 0.--31. 1. "SWREG_FIELD,segment 3: intra 16x16 mode 0-2 penalty (all format mode)" line.long 0x64 "VENC_SWREG281,VENC segment 3: intra 16x16 mode 3 penalty. intra 4x4 mode 0-1 penalty register" hexmask.long 0x64 0.--31. 1. "SWREG_FIELD,segment 3: intra 16x16 mode 3 penalty intra 4x4 mode 0-1 penalty (all format mode)" line.long 0x68 "VENC_SWREG282,VENC segment 3: intra 4x4 mode 2-4 penalty register" hexmask.long 0x68 0.--31. 1. "SWREG_FIELD,segment 3: intra 4x4 mode 2-4 penalty (all format mode)" line.long 0x6C "VENC_SWREG283,VENC segment 3: intra 4x4 mode 5-7 penalty register" hexmask.long 0x6C 0.--31. 1. "SWREG_FIELD,segment 3: intra 4x4 mode 5-7 penalty (all format mode)" line.long 0x70 "VENC_SWREG284,VENC segment 3: intra 4x4 mode 8-9 penalty. intra 4x4 previous mode favor for H.264 register" hexmask.long 0x70 0.--31. 1. "SWREG_FIELD,segment 3: intra 4x4 mode 8-9 penalty intra 4x4 previous mode favor for H.264 (all format mode)" line.long 0x74 "VENC_SWREG285,VENC segment 3: bit cost of inter type. intra 16x16 mode favor register" hexmask.long 0x74 0.--31. 1. "SWREG_FIELD,segment 3: Bit cost of inter type intra 16x16 mode favor (all format mode)" line.long 0x78 "VENC_SWREG286,VENC segment 3: inter MB mode favor in intra/inter selection. inter MB mode favor. penalty value for second reference frame register" hexmask.long 0x78 0.--31. 1. "SWREG_FIELD,segment 3: inter MB mode favor in intra/inter selection inter MB mode favor penalty value for second reference frame (all format mode)" line.long 0x7C "VENC_SWREG287,VENC segment 3: penalty value register" hexmask.long 0x7C 0.--31. 1. "SWREG_FIELD,segment 3: penalty value (all format mode)" line.long 0x80 "VENC_SWREG288,VENC segment 3: penalty value register" hexmask.long 0x80 0.--31. 1. "SWREG_FIELD,segment 3: penalty value (all format mode)" line.long 0x84 "VENC_SWREG289,VENC segment 3: deadzone rate multiplier for plane 0-1 register" hexmask.long 0x84 0.--31. 1. "SWREG_FIELD,segment 3: Deadzone rate multiplier for plane 0-1 (all format mode)" line.long 0x88 "VENC_SWREG290,VENC segment 3: deadzone rate multiplier for plane 2-3 register" hexmask.long 0x88 0.--31. 1. "SWREG_FIELD,segment 3: Deadzone rate multiplier for plane 2-3 (all format mode)" line.long 0x8C "VENC_SWREG291,VENC segment 3: deadzone rate for macroblock skip token 0-1. dmv penalty coefficient register" hexmask.long 0x8C 0.--31. 1. "SWREG_FIELD,segment 3: Deadzone rate for macroblock skip token 0-1 dmv penalty coefficient (all format mode)" line.long 0x90 "VENC_SWREG292,VENC VP8 average variance in prev frame register" hexmask.long 0x90 0.--31. 1. "SWREG_FIELD,VP8 average variance in prev frame (all format mode)" line.long 0x94 "VENC_SWREG293,VENC VP8 16384/average variance in prev frame. H264 field control register" hexmask.long 0x94 0.--31. 1. "SWREG_FIELD,VP8 16384/avgVar in prev frame H264 Field control (all format mode)" line.long 0x98 "VENC_SWREG294,VENC Mb boost register" hexmask.long 0x98 0.--31. 1. "SWREG_FIELD,Mb boost (all format mode)" line.long 0x9C "VENC_SWREG295,VENC variance control. Pskop conding mode register" hexmask.long 0x9C 0.--31. 1. "SWREG_FIELD,Variance control Pskop conding mode (all format mode)" rgroup.long 0x4A0++0x3 line.long 0x0 "VENC_SWREG296,VENC synthesis configuration register encoder 1 read only register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Synthesis configuration register encoder 1 (read only) (all format mode)" group.long 0x4A4++0x1CF line.long 0x0 "VENC_SWREG297,VENC MBRC control register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,MBRC control (all format mode)" line.long 0x4 "VENC_SWREG298,VENC segment 4: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,segment 4: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x8 "VENC_SWREG299,VENC segment 4: skip mode penalty. inter MB mode favor register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,segment 4: skip mode penalty inter MB mode favor (all format mode)" line.long 0xC "VENC_SWREG300,VENC segment 4: penalty value register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,segment 4: penalty value (all format mode)" line.long 0x10 "VENC_SWREG301,VENC segment 4: penalty value register" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,segment 4: penalty value (all format mode)" line.long 0x14 "VENC_SWREG302,VENC segment 5: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,segment 5: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x18 "VENC_SWREG303,VENC segment 5: skip mode penalty. inter MB mode favor register" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,segment 5: skip mode penalty inter MB mode favor (all format mode)" line.long 0x1C "VENC_SWREG304,VENC segment 5: penalty value register" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,segment 5: penalty value (all format mode)" line.long 0x20 "VENC_SWREG305,VENC segment 5: penalty value register" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,segment 5: penalty value (all format mode)" line.long 0x24 "VENC_SWREG306,VENC segment 6: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,segment 6: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x28 "VENC_SWREG307,VENC segment 6: skip mode penalty. inter MB mode favor register" hexmask.long 0x28 0.--31. 1. "SWREG_FIELD,segment 6: skip mode penalty inter MB mode favor (all format mode)" line.long 0x2C "VENC_SWREG308,VENC segment 6: penalty value register" hexmask.long 0x2C 0.--31. 1. "SWREG_FIELD,segment 6: penalty value (all format mode)" line.long 0x30 "VENC_SWREG309,VENC segment 6: penalty value register" hexmask.long 0x30 0.--31. 1. "SWREG_FIELD,segment 6: penalty value (all format mode)" line.long 0x34 "VENC_SWREG310,VENC segment 7: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x34 0.--31. 1. "SWREG_FIELD,segment 7: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x38 "VENC_SWREG311,VENC segment 7: skip mode penalty. inter MB mode favor register" hexmask.long 0x38 0.--31. 1. "SWREG_FIELD,segment 7: skip mode penalty inter MB mode favor (all format mode)" line.long 0x3C "VENC_SWREG312,VENC segment 7: penalty value register" hexmask.long 0x3C 0.--31. 1. "SWREG_FIELD,segment 7: penalty value (all format mode)" line.long 0x40 "VENC_SWREG313,VENC segment 7: penalty value register" hexmask.long 0x40 0.--31. 1. "SWREG_FIELD,segment 7: penalty value (all format mode)" line.long 0x44 "VENC_SWREG314,VENC segment 8: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x44 0.--31. 1. "SWREG_FIELD,segment 8: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x48 "VENC_SWREG315,VENC segment 8: skip mode penalty. inter MB mode favor register" hexmask.long 0x48 0.--31. 1. "SWREG_FIELD,segment 8: skip mode penalty inter MB mode favor (all format mode)" line.long 0x4C "VENC_SWREG316,VENC segment 8: penalty value register" hexmask.long 0x4C 0.--31. 1. "SWREG_FIELD,segment 8: penalty value (all format mode)" line.long 0x50 "VENC_SWREG317,VENC segment 8: penalty value register" hexmask.long 0x50 0.--31. 1. "SWREG_FIELD,segment 8: penalty value (all format mode)" line.long 0x54 "VENC_SWREG318,VENC segment 9: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x54 0.--31. 1. "SWREG_FIELD,segment 9: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x58 "VENC_SWREG319,VENC segment 9: skip mode penalty. inter MB mode favor register" hexmask.long 0x58 0.--31. 1. "SWREG_FIELD,segment 9: skip mode penalty inter MB mode favor (all format mode)" line.long 0x5C "VENC_SWREG320,VENC segment 9: penalty value register" hexmask.long 0x5C 0.--31. 1. "SWREG_FIELD,segment 9: penalty value (all format mode)" line.long 0x60 "VENC_SWREG321,VENC segment 9: penalty value register" hexmask.long 0x60 0.--31. 1. "SWREG_FIELD,segment 9: penalty value (all format mode)" line.long 0x64 "VENC_SWREG322,VENC segment 10: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x64 0.--31. 1. "SWREG_FIELD,segment 10: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x68 "VENC_SWREG323,VENC segment 10: skip mode penalty. inter MB mode favor register" hexmask.long 0x68 0.--31. 1. "SWREG_FIELD,segment 10: skip mode penalty inter MB mode favor (all format mode)" line.long 0x6C "VENC_SWREG324,VENC segment 10: penalty value register" hexmask.long 0x6C 0.--31. 1. "SWREG_FIELD,segment 10: penalty value (all format mode)" line.long 0x70 "VENC_SWREG325,VENC segment 10: penalty value register" hexmask.long 0x70 0.--31. 1. "SWREG_FIELD,segment 10: penalty value (all format mode)" line.long 0x74 "VENC_SWREG326,VENC segment 11: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x74 0.--31. 1. "SWREG_FIELD,segment 11: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x78 "VENC_SWREG327,VENC segment 11: skip mode penalty. inter MB mode favor register" hexmask.long 0x78 0.--31. 1. "SWREG_FIELD,segment 11: skip mode penalty inter MB mode favor (all format mode)" line.long 0x7C "VENC_SWREG328,VENC segment 11: penalty value register" hexmask.long 0x7C 0.--31. 1. "SWREG_FIELD,segment 11: penalty value (all format mode)" line.long 0x80 "VENC_SWREG329,VENC segment 11: penalty value register" hexmask.long 0x80 0.--31. 1. "SWREG_FIELD,segment 11: penalty value (all format mode)" line.long 0x84 "VENC_SWREG330,VENC segment 12: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x84 0.--31. 1. "SWREG_FIELD,segment 12: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x88 "VENC_SWREG331,VENC segment 12: skip mode penalty. inter MB mode favor register" hexmask.long 0x88 0.--31. 1. "SWREG_FIELD,segment 12: skip mode penalty inter MB mode favor (all format mode)" line.long 0x8C "VENC_SWREG332,VENC segment 12: penalty value register" hexmask.long 0x8C 0.--31. 1. "SWREG_FIELD,segment 12: penalty value (all format mode)" line.long 0x90 "VENC_SWREG333,VENC segment 12: penalty value register" hexmask.long 0x90 0.--31. 1. "SWREG_FIELD,segment 12: penalty value (all format mode)" line.long 0x94 "VENC_SWREG334,VENC segment 13: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x94 0.--31. 1. "SWREG_FIELD,segment 13: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x98 "VENC_SWREG335,VENC segment 13: skip mode penalty. inter MB mode favor register" hexmask.long 0x98 0.--31. 1. "SWREG_FIELD,segment 13: skip mode penalty inter MB mode favor (all format mode)" line.long 0x9C "VENC_SWREG336,VENC segment 13: penalty value register" hexmask.long 0x9C 0.--31. 1. "SWREG_FIELD,segment 13: penalty value (all format mode)" line.long 0xA0 "VENC_SWREG337,VENC segment 13: penalty value register" hexmask.long 0xA0 0.--31. 1. "SWREG_FIELD,segment 13: penalty value (all format mode)" line.long 0xA4 "VENC_SWREG338,VENC segment 14: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0xA4 0.--31. 1. "SWREG_FIELD,segment 14: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0xA8 "VENC_SWREG339,VENC segment 14: skip mode penalty. inter MB mode favor register" hexmask.long 0xA8 0.--31. 1. "SWREG_FIELD,segment 14: skip mode penalty inter MB mode favor (all format mode)" line.long 0xAC "VENC_SWREG340,VENC segment 14: penalty value register" hexmask.long 0xAC 0.--31. 1. "SWREG_FIELD,segment 14: penalty value (all format mode)" line.long 0xB0 "VENC_SWREG341,VENC segment 14: penalty value register" hexmask.long 0xB0 0.--31. 1. "SWREG_FIELD,segment 14: penalty value (all format mode)" line.long 0xB4 "VENC_SWREG342,VENC segment 15: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0xB4 0.--31. 1. "SWREG_FIELD,segment 15: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0xB8 "VENC_SWREG343,VENC segment 15: skip mode penalty. inter MB mode favor register" hexmask.long 0xB8 0.--31. 1. "SWREG_FIELD,segment 15: skip mode penalty inter MB mode favor (all format mode)" line.long 0xBC "VENC_SWREG344,VENC segment 15: penalty value register" hexmask.long 0xBC 0.--31. 1. "SWREG_FIELD,segment 15: penalty value (all format mode)" line.long 0xC0 "VENC_SWREG345,VENC segment 15: penalty value register" hexmask.long 0xC0 0.--31. 1. "SWREG_FIELD,segment 15: penalty value (all format mode)" line.long 0xC4 "VENC_SWREG346,VENC segment 16: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0xC4 0.--31. 1. "SWREG_FIELD,segment 16: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0xC8 "VENC_SWREG347,VENC segment 16: skip mode penalty. inter MB mode favor register" hexmask.long 0xC8 0.--31. 1. "SWREG_FIELD,segment 16: skip mode penalty inter MB mode favor (all format mode)" line.long 0xCC "VENC_SWREG348,VENC segment 16: penalty value register" hexmask.long 0xCC 0.--31. 1. "SWREG_FIELD,segment 16: penalty value (all format mode)" line.long 0xD0 "VENC_SWREG349,VENC segment 16: penalty value register" hexmask.long 0xD0 0.--31. 1. "SWREG_FIELD,segment 16: penalty value (all format mode)" line.long 0xD4 "VENC_SWREG350,VENC segment 17: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0xD4 0.--31. 1. "SWREG_FIELD,segment 17: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0xD8 "VENC_SWREG351,VENC segment 17: skip mode penalty. inter MB mode favor register" hexmask.long 0xD8 0.--31. 1. "SWREG_FIELD,segment 17: skip mode penalty inter MB mode favor (all format mode)" line.long 0xDC "VENC_SWREG352,VENC segment 17: penalty value register" hexmask.long 0xDC 0.--31. 1. "SWREG_FIELD,segment 17: penalty value (all format mode)" line.long 0xE0 "VENC_SWREG353,VENC segment 17: penalty value register" hexmask.long 0xE0 0.--31. 1. "SWREG_FIELD,segment 17: penalty value (all format mode)" line.long 0xE4 "VENC_SWREG354,VENC segment 18: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0xE4 0.--31. 1. "SWREG_FIELD,segment 18: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0xE8 "VENC_SWREG355,VENC segment 18: skip mode penalty. inter MB mode favor register" hexmask.long 0xE8 0.--31. 1. "SWREG_FIELD,segment 18: skip mode penalty inter MB mode favor (all format mode)" line.long 0xEC "VENC_SWREG356,VENC segment 18: penalty value register" hexmask.long 0xEC 0.--31. 1. "SWREG_FIELD,segment 18: penalty value (all format mode)" line.long 0xF0 "VENC_SWREG357,VENC segment 18: penalty value register" hexmask.long 0xF0 0.--31. 1. "SWREG_FIELD,segment 18: penalty value (all format mode)" line.long 0xF4 "VENC_SWREG358,VENC segment 19: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0xF4 0.--31. 1. "SWREG_FIELD,segment 19: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0xF8 "VENC_SWREG359,VENC segment 19: skip mode penalty. inter MB mode favor register" hexmask.long 0xF8 0.--31. 1. "SWREG_FIELD,segment 19: skip mode penalty inter MB mode favor (all format mode)" line.long 0xFC "VENC_SWREG360,VENC segment 19: penalty value register" hexmask.long 0xFC 0.--31. 1. "SWREG_FIELD,segment 19: penalty value (all format mode)" line.long 0x100 "VENC_SWREG361,VENC segment 19: penalty value register" hexmask.long 0x100 0.--31. 1. "SWREG_FIELD,segment 19: penalty value (all format mode)" line.long 0x104 "VENC_SWREG362,VENC segment 20: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x104 0.--31. 1. "SWREG_FIELD,segment 20: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x108 "VENC_SWREG363,VENC segment 20: skip mode penalty. inter MB mode favor register" hexmask.long 0x108 0.--31. 1. "SWREG_FIELD,segment 20: skip mode penalty inter MB mode favor (all format mode)" line.long 0x10C "VENC_SWREG364,VENC segment 20: penalty value register" hexmask.long 0x10C 0.--31. 1. "SWREG_FIELD,segment 20: penalty value (all format mode)" line.long 0x110 "VENC_SWREG365,VENC segment 20: penalty value register" hexmask.long 0x110 0.--31. 1. "SWREG_FIELD,segment 20: penalty value (all format mode)" line.long 0x114 "VENC_SWREG366,VENC segment 21: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x114 0.--31. 1. "SWREG_FIELD,segment 21: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x118 "VENC_SWREG367,VENC segment 21: skip mode penalty. inter MB mode favor register" hexmask.long 0x118 0.--31. 1. "SWREG_FIELD,segment 21: skip mode penalty inter MB mode favor (all format mode)" line.long 0x11C "VENC_SWREG368,VENC segment 21: penalty value register" hexmask.long 0x11C 0.--31. 1. "SWREG_FIELD,segment 21: penalty value (all format mode)" line.long 0x120 "VENC_SWREG369,VENC segment 21: penalty value register" hexmask.long 0x120 0.--31. 1. "SWREG_FIELD,segment 21: penalty value (all format mode)" line.long 0x124 "VENC_SWREG370,VENC segment 22: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x124 0.--31. 1. "SWREG_FIELD,segment 22: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x128 "VENC_SWREG371,VENC segment 22: skip mode penalty. inter MB mode favor register" hexmask.long 0x128 0.--31. 1. "SWREG_FIELD,segment 22: skip mode penalty inter MB mode favor (all format mode)" line.long 0x12C "VENC_SWREG372,VENC segment 22: penalty value register" hexmask.long 0x12C 0.--31. 1. "SWREG_FIELD,segment 22: penalty value (all format mode)" line.long 0x130 "VENC_SWREG373,VENC segment 22: penalty value register" hexmask.long 0x130 0.--31. 1. "SWREG_FIELD,segment 22: penalty value (all format mode)" line.long 0x134 "VENC_SWREG374,VENC segment 23: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x134 0.--31. 1. "SWREG_FIELD,segment 23: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x138 "VENC_SWREG375,VENC segment 23: skip mode penalty. inter MB mode favor register" hexmask.long 0x138 0.--31. 1. "SWREG_FIELD,segment 23: skip mode penalty inter MB mode favor (all format mode)" line.long 0x13C "VENC_SWREG376,VENC segment 23: penalty value register" hexmask.long 0x13C 0.--31. 1. "SWREG_FIELD,segment 23: penalty value (all format mode)" line.long 0x140 "VENC_SWREG377,VENC segment 23: penalty value register" hexmask.long 0x140 0.--31. 1. "SWREG_FIELD,segment 23: penalty value (all format mode)" line.long 0x144 "VENC_SWREG378,VENC segment 24: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x144 0.--31. 1. "SWREG_FIELD,segment 24: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x148 "VENC_SWREG379,VENC segment 24: skip mode penalty. inter MB mode favor register" hexmask.long 0x148 0.--31. 1. "SWREG_FIELD,segment 24: skip mode penalty inter MB mode favor (all format mode)" line.long 0x14C "VENC_SWREG380,VENC segment 24: penalty value register" hexmask.long 0x14C 0.--31. 1. "SWREG_FIELD,segment 24: penalty value (all format mode)" line.long 0x150 "VENC_SWREG381,VENC segment 24: penalty value register" hexmask.long 0x150 0.--31. 1. "SWREG_FIELD,segment 24: penalty value (all format mode)" line.long 0x154 "VENC_SWREG382,VENC segment 25: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x154 0.--31. 1. "SWREG_FIELD,segment 25: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x158 "VENC_SWREG383,VENC segment 25: skip mode penalty. inter MB mode favor register" hexmask.long 0x158 0.--31. 1. "SWREG_FIELD,segment 25: skip mode penalty inter MB mode favor (all format mode)" line.long 0x15C "VENC_SWREG384,VENC segment 25: penalty value register" hexmask.long 0x15C 0.--31. 1. "SWREG_FIELD,segment 25: penalty value (all format mode)" line.long 0x160 "VENC_SWREG385,VENC segment 25: penalty value register" hexmask.long 0x160 0.--31. 1. "SWREG_FIELD,segment 25: penalty value (all format mode)" line.long 0x164 "VENC_SWREG386,VENC segment 26: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x164 0.--31. 1. "SWREG_FIELD,segment 26: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x168 "VENC_SWREG387,VENC segment 26: skip mode penalty. inter MB mode favor register" hexmask.long 0x168 0.--31. 1. "SWREG_FIELD,segment 26: skip mode penalty inter MB mode favor (all format mode)" line.long 0x16C "VENC_SWREG388,VENC segment 26: penalty value register" hexmask.long 0x16C 0.--31. 1. "SWREG_FIELD,segment 26: penalty value (all format mode)" line.long 0x170 "VENC_SWREG389,VENC segment 26: penalty value register" hexmask.long 0x170 0.--31. 1. "SWREG_FIELD,segment 26: penalty value (all format mode)" line.long 0x174 "VENC_SWREG390,VENC segment 27: intra 4x4 previous mode favor. intra 16x16mode favor. penalty value for second reference frame register" hexmask.long 0x174 0.--31. 1. "SWREG_FIELD,segment 27: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x178 "VENC_SWREG391,VENC segment 27: skip mode penalty. inter MB mode favor register" hexmask.long 0x178 0.--31. 1. "SWREG_FIELD,segment 27: skip mode penalty inter MB mode favor (all format mode)" line.long 0x17C "VENC_SWREG392,VENC segment 27: penalty value register" hexmask.long 0x17C 0.--31. 1. "SWREG_FIELD,segment 27: penalty value (all format mode)" line.long 0x180 "VENC_SWREG393,VENC segment 27: penalty value register" hexmask.long 0x180 0.--31. 1. "SWREG_FIELD,segment 27: penalty value (all format mode)" line.long 0x184 "VENC_SWREG394,VENC segment 28: intra 4x4 previous mode favor. intra 16x16mode favor. penalty value for second reference frame register" hexmask.long 0x184 0.--31. 1. "SWREG_FIELD,segment 28: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x188 "VENC_SWREG395,VENC segment 28: skip mode penalty. inter MB mode favor register" hexmask.long 0x188 0.--31. 1. "SWREG_FIELD,segment 28: skip mode penalty inter MB mode favor (all format mode)" line.long 0x18C "VENC_SWREG396,VENC segment 28: penalty value register" hexmask.long 0x18C 0.--31. 1. "SWREG_FIELD,segment 28: penalty value (all format mode)" line.long 0x190 "VENC_SWREG397,VENC segment 28: penalty value register" hexmask.long 0x190 0.--31. 1. "SWREG_FIELD,segment 28: penalty value (all format mode)" line.long 0x194 "VENC_SWREG398,VENC segment 29: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x194 0.--31. 1. "SWREG_FIELD,segment 29: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x198 "VENC_SWREG399,VENC segment 29: skip mode penalty. inter MB mode favor register" hexmask.long 0x198 0.--31. 1. "SWREG_FIELD,segment 29: skip mode penalty inter MB mode favor (all format mode)" line.long 0x19C "VENC_SWREG400,VENC segment 29: penalty value register" hexmask.long 0x19C 0.--31. 1. "SWREG_FIELD,segment 29: penalty value (all format mode)" line.long 0x1A0 "VENC_SWREG401,VENC segment 29: penalty value register" hexmask.long 0x1A0 0.--31. 1. "SWREG_FIELD,segment 29: penalty value (all format mode)" line.long 0x1A4 "VENC_SWREG402,VENC segment 30: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x1A4 0.--31. 1. "SWREG_FIELD,segment 30: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x1A8 "VENC_SWREG403,VENC segment 30: skip mode penalty. inter MB mode favor register" hexmask.long 0x1A8 0.--31. 1. "SWREG_FIELD,segment 30: skip mode penalty inter MB mode favor (all format mode)" line.long 0x1AC "VENC_SWREG404,VENC segment 30: penalty value register" hexmask.long 0x1AC 0.--31. 1. "SWREG_FIELD,segment 30: penalty value (all format mode)" line.long 0x1B0 "VENC_SWREG405,VENC segment 30: penalty value register" hexmask.long 0x1B0 0.--31. 1. "SWREG_FIELD,segment 30: penalty value (all format mode)" line.long 0x1B4 "VENC_SWREG406,VENC segment 31: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x1B4 0.--31. 1. "SWREG_FIELD,segment 31: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x1B8 "VENC_SWREG407,VENC segment 31: skip mode penalty. inter MB mode favor register" hexmask.long 0x1B8 0.--31. 1. "SWREG_FIELD,segment 31: skip mode penalty inter MB mode favor (all format mode)" line.long 0x1BC "VENC_SWREG408,VENC segment 31: penalty value register" hexmask.long 0x1BC 0.--31. 1. "SWREG_FIELD,segment 31: penalty value (all format mode)" line.long 0x1C0 "VENC_SWREG409,VENC segment 31: penalty value register" hexmask.long 0x1C0 0.--31. 1. "SWREG_FIELD,segment 31: penalty value (all format mode)" line.long 0x1C4 "VENC_SWREG410,VENC MBRC control. QP. offset. enable register" hexmask.long 0x1C4 0.--31. 1. "SWREG_FIELD,MBRC control (QP offset enable) (all format mode)" line.long 0x1C8 "VENC_SWREG411,VENC gain of MB QP delta. 8.8 format register" hexmask.long 0x1C8 0.--31. 1. "SWREG_FIELD,gain of MB QPdelta. 8.8 format (all format mode)" line.long 0x1CC "VENC_SWREG412,VENC average of MB complexity register" hexmask.long 0x1CC 0.--31. 1. "SWREG_FIELD,average of MB complexity (all format mode)" group.long 0x694++0x7B line.long 0x0 "VENC_SWREG421,VENC reorder control register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Reorder control (all format mode)" line.long 0x4 "VENC_SWREG422,VENC AXI read ID register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,AXI Read ID (all format mode)" line.long 0x8 "VENC_SWREG423,VENC base address MSB for reference luma compression table register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,AXI Read ID (all format mode)" line.long 0xC "VENC_SWREG424,VENC base address MSB for reference chroma compression table register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,AXI Read ID (all format mode)" line.long 0x10 "VENC_SWREG425,VENC base address MSB for reconstructed luma compression table register" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,AXI Read ID (all format mode)" line.long 0x14 "VENC_SWREG426,VENC base address for reconstructed chroma compression table register" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,Base address for reconstructed chroma compression table (all format mode)" line.long 0x18 "VENC_SWREG427,VENC base address MSB for second reference luma compression table register" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,Base address MSB for second reference luma compression table (all format mode)" line.long 0x1C "VENC_SWREG428,VENC base address MSB for second reference chroma compression table register" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,Base address MSB for second reference chroma compression table (all format mode)" line.long 0x20 "VENC_SWREG429,VENC high 32 bits of base address for output stream data register" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for output stream data (all format mode)" line.long 0x24 "VENC_SWREG430,VENC high 32 bits of base address for output control data register" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for output control data (all format mode)" line.long 0x28 "VENC_SWREG431,VENC high 32 bits of base address for reference luma register" hexmask.long 0x28 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for reference luma (all format mode)" line.long 0x2C "VENC_SWREG432,VENC high 32 bits of base address for reference chroma register" hexmask.long 0x2C 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for reference chroma (all format mode)" line.long 0x30 "VENC_SWREG433,VENC high 32 bits of base address for reconstructed luma register" hexmask.long 0x30 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for reconstructed luma (all format mode)" line.long 0x34 "VENC_SWREG434,VENC high 32 bits of base address for reconstructed chroma register" hexmask.long 0x34 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for reconstructed chroma (all format mode)" line.long 0x38 "VENC_SWREG435,VENC high 32 bits of base address for input picture luma register" hexmask.long 0x38 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for input picture luma (all format mode)" line.long 0x3C "VENC_SWREG436,VENC high 32 bits of base address for input picture cb register" hexmask.long 0x3C 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for input picture cb (all format mode)" line.long 0x40 "VENC_SWREG437,VENC high 32 bits of base address for input picture cr register" hexmask.long 0x40 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for input picture cr (all format mode)" line.long 0x44 "VENC_SWREG438,VENC high 32 bits of base address for second reference luma register" hexmask.long 0x44 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for second reference luma (all format mode)" line.long 0x48 "VENC_SWREG439,VENC high 32 bits of base address for second reference chroma register" hexmask.long 0x48 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for second reference chroma (all format mode)" line.long 0x4C "VENC_SWREG440,VENC high 32 bits of H264 secondary ref pic base register" hexmask.long 0x4C 0.--31. 1. "SWREG_FIELD,high 32 bits of H264 secondary ref pic base (all format mode)" line.long 0x50 "VENC_SWREG441,VENC high 32 bits of H264 secondary ref pic base register" hexmask.long 0x50 0.--31. 1. "SWREG_FIELD,high 32 bits of H264 secondary ref pic base (all format mode)" line.long 0x54 "VENC_SWREG442,VENC high 32 bits of base address for next pic luminance register" hexmask.long 0x54 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for next pic luminance (all format mode)" line.long 0x58 "VENC_SWREG443,VENC high 32 bits of base address for cabac context tables H264 or probability tables VP8 register" hexmask.long 0x58 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for cabac context tables (H264) or probability tables (VP8) (all format mode)" line.long 0x5C "VENC_SWREG444,VENC high 32 bits of base address for MV output writing register" hexmask.long 0x5C 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for MV output writing (all format mode)" line.long 0x60 "VENC_SWREG445,VENC high 32 bits of base address for VP8 1st DCT partition register" hexmask.long 0x60 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for VP8 1st DCT partition (all format mode)" line.long 0x64 "VENC_SWREG446,VENC high 32 bits of base address for VP8 2nd DCT partition register" hexmask.long 0x64 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for VP8 2nd DCT partition (all format mode)" line.long 0x68 "VENC_SWREG447,VENC high 32 bits of base address for VP8 counters for probability updates register" hexmask.long 0x68 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for VP8 counters for probability updates (all format mode)" line.long 0x6C "VENC_SWREG448,VENC high 32 bits of base address for VP8 segmentation map segment Id 2- bits/macroblock register" hexmask.long 0x6C 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for VP8 segmentation map. segmentId 2-bits/macroblock (all format mode)" line.long 0x70 "VENC_SWREG449,VENC high 32 bits of base address for output of down-scaled encoder image in YUYV 4:2:2 format register" hexmask.long 0x70 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for output of down-scaled encoder image in YUYV 4:2:2 format (all format mode)" line.long 0x74 "VENC_SWREG450,VENC high 32 bits of base address for VP8 3rd DCT partition register" hexmask.long 0x74 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for VP8 3rd DCT partition (all format mode)" line.long 0x78 "VENC_SWREG451,VENC high 32 bits of base address for VP8 4th DCT partition register" hexmask.long 0x78 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for VP8 4th DCT partition (all format mode)" group.long 0x7C4++0x3 line.long 0x0 "VENC_SWREG497,VENC low-latency control register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Low latency control (all format mode)" tree.end tree "VENC_S" base ad:0x580E0000 group.long 0x0++0xF line.long 0x0 "VENC_SWREG0,VENC ID register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Identification register (all format mode)" line.long 0x4 "VENC_SWREG1,VENC interrupt register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,Interrupt register (all format mode)" line.long 0x8 "VENC_SWREG2,VENC bus interface configuration register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,Bus interface configuration register (all format mode)" line.long 0xC "VENC_SWREG3,VENC device configuration register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,Device configuration register (all format mode)" group.long 0x14++0xE7 line.long 0x0 "VENC_SWREG5,VENC base address for output stream data register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Base address for output stream data (all format mode)" line.long 0x4 "VENC_SWREG6,VENC base address for output control data register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,Base address for output control data (all format mode)" line.long 0x8 "VENC_SWREG7,VENC base address for reference luma register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,Base address for reference luma (all format mode)" line.long 0xC "VENC_SWREG8,VENC base address for reference chroma register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,Base address for reference chroma (all format mode)" line.long 0x10 "VENC_SWREG9,VENC base address for reconstructed luma register" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,Base address for reconstructed luma (all format mode)" line.long 0x14 "VENC_SWREG10,VENC base address for reconstructed chroma register" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,Base address for reconstructed chroma (all format mode)" line.long 0x18 "VENC_SWREG11,VENC base address for input picture luma register" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,Base address for input picture luma (all format mode)" line.long 0x1C "VENC_SWREG12,VENC base address for input picture cb register" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,Base address for input picture cb (all format mode)" line.long 0x20 "VENC_SWREG13,VENC base address for input picture cr register" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,Base address for input picture cr (all format mode)" line.long 0x24 "VENC_SWREG14,VENC encoder control register 0" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,Encoder control register 0 (such as picture information or encoding mode) (all format mode)" line.long 0x28 "VENC_SWREG15,VENC encoder control register 1" hexmask.long 0x28 0.--31. 1. "SWREG_FIELD,Encoder control register 1 (such as preprocessing control crop rotate input format) (all format mode)" line.long 0x2C "VENC_SWREG16,VENC encoder control register 2" hexmask.long 0x2C 0.--31. 1. "SWREG_FIELD,Base address for second reference luma (H264 control) (all format mode)" line.long 0x30 "VENC_SWREG17,VENC encoder control register 3" hexmask.long 0x30 0.--31. 1. "SWREG_FIELD,Base address for second reference chroma (H264 control) (all format mode)" line.long 0x34 "VENC_SWREG18,VENC encoder control register 4" hexmask.long 0x34 0.--31. 1. "SWREG_FIELD,Encoder control register 4 (deblock filter mode H264 control) (all format mode)" line.long 0x38 "VENC_SWREG19,VENC encoder control register 5" hexmask.long 0x38 0.--31. 1. "SWREG_FIELD,Encoder control register 5 (input format motion vector etc) (all format mode)" line.long 0x3C "VENC_SWREG20,VENC encoder control register 6" hexmask.long 0x3C 0.--31. 1. "SWREG_FIELD,Control of data JPEG or VP8 (all format mode)" line.long 0x40 "VENC_SWREG21,VENC encoder control register 7" hexmask.long 0x40 0.--31. 1. "SWREG_FIELD,Control of H264 or VP8 (all format mode)" line.long 0x44 "VENC_SWREG22,VENC stream header remainder MSB bits register" hexmask.long 0x44 0.--31. 1. "SWREG_FIELD,Stream header remainder bits MSB (MSB aligned) (all format mode)" line.long 0x48 "VENC_SWREG23,VENC stream header remainder LSB bits register" hexmask.long 0x48 0.--31. 1. "SWREG_FIELD,Stream header remainder bits LSB (MSB aligned) (all format mode)" line.long 0x4C "VENC_SWREG24,VENC stream buffer limit/output stream size register" hexmask.long 0x4C 0.--31. 1. "SWREG_FIELD,Stream buffer limit (64-bit addresses)/output stream size (bits) (allformat mode)" line.long 0x50 "VENC_SWREG25,VENC encoder control register 8" hexmask.long 0x50 0.--31. 1. "SWREG_FIELD,Control of MAD control and QP sum output (all format mode)" line.long 0x54 "VENC_SWREG26,VENC intra-slice bitmap/base address for VP8 counters register" hexmask.long 0x54 0.--31. 1. "SWREG_FIELD,intra-slice bitmap/base address for VP8 counters for probability updates (all format mode)" line.long 0x58 "VENC_SWREG27,VENC encoder control register 9" hexmask.long 0x58 0.--31. 1. "SWREG_FIELD,Control of H264 QP and VP8 QPY1 (all format mode)" line.long 0x5C "VENC_SWREG28,VENC encoder control register 10" hexmask.long 0x5C 0.--31. 1. "SWREG_FIELD,H264 checkpoint 1-2 and VP8 QPY1 (all format mode)" line.long 0x60 "VENC_SWREG29,VENC encoder control register 11" hexmask.long 0x60 0.--31. 1. "SWREG_FIELD,H.264 Checkpoint 3 -4 and VP8 QPY2 (all format mode)" line.long 0x64 "VENC_SWREG30,VENC encoder control register 12" hexmask.long 0x64 0.--31. 1. "SWREG_FIELD,H.264 checkpoint 5 -6 and VP8 QPY2 (all format mode)" line.long 0x68 "VENC_SWREG31,VENC encoder control register 13" hexmask.long 0x68 0.--31. 1. "SWREG_FIELD,H.264 checkpoint 7 -8 and VP8 QPCh (all format mode)" line.long 0x6C "VENC_SWREG32,VENC encoder control register 14" hexmask.long 0x6C 0.--31. 1. "SWREG_FIELD,H.264 Checkpoint 8 -10 / Encoder control register 14 (VP8 QPCh) (all format mode)" line.long 0x70 "VENC_SWREG33,VENC encoder control register 15" hexmask.long 0x70 0.--31. 1. "SWREG_FIELD,H.264 Checkpoint word error 1-2 and mvRefIdx/VP8 QPY1 (allformatmode)" line.long 0x74 "VENC_SWREG34,VENC encoder control register 16" hexmask.long 0x74 0.--31. 1. "SWREG_FIELD,H.264 checkpoint word error 3-4 and the second reference frame control (all format mode)" line.long 0x78 "VENC_SWREG35,VENC H.264 checkpoint word error 5-6/encoder control register 17" hexmask.long 0x78 0.--31. 1. "SWREG_FIELD,H.264 Checkpoint word error 5-6 / Encoder control register 17 (all format mode)" line.long 0x7C "VENC_SWREG36,VENC H.264 checkpoint delta QP 1-8/encoder control register 18" hexmask.long 0x7C 0.--31. 1. "SWREG_FIELD,H.264 Checkpoint delta QP 1-8 / Encoder control register 18 (LongTermPenalty VP8 Filter) (all format mode)" line.long 0x80 "VENC_SWREG37,VENC encoder control register 19. VP8 filter. stream start offset" hexmask.long 0x80 0.--31. 1. "SWREG_FIELD,Encoder control register 19 (VP8 filter stream start offset) (all format mode)" line.long 0x84 "VENC_SWREG38,VENC macroblock count output register" hexmask.long 0x84 0.--31. 1. "SWREG_FIELD,Macroblock count output (all format mode)" line.long 0x88 "VENC_SWREG39,VENC base address for next pic luminance register" hexmask.long 0x88 0.--31. 1. "SWREG_FIELD,Base address for next pic luminance (all format mode)" line.long 0x8C "VENC_SWREG40,VENC stabilization mode control register" hexmask.long 0x8C 0.--31. 1. "SWREG_FIELD,Stabilization mode control (all format mode)" line.long 0x90 "VENC_SWREG41,VENC stabilization motion sum div8 output register" hexmask.long 0x90 0.--31. 1. "SWREG_FIELD,Stabilization motion sum div8 output (all format mode)" line.long 0x94 "VENC_SWREG42,VENC stabilization GMV output. matrix 1. up-left position output register" hexmask.long 0x94 0.--31. 1. "SWREG_FIELD,Stabilization GMV output matrix 1 (up-left position) output (all format mode)" line.long 0x98 "VENC_SWREG43,VENC stabilization GMV output. matrix 2. up position output register" hexmask.long 0x98 0.--31. 1. "SWREG_FIELD,Stabilization GMV output matrix 2 (up position) output (all format mode)" line.long 0x9C "VENC_SWREG44,VENC stabilization matrix 3. up-right position output register" hexmask.long 0x9C 0.--31. 1. "SWREG_FIELD,Stabilization matrix 3 (up-right position) output (all format mode)" line.long 0xA0 "VENC_SWREG45,VENC stabilization matrix 4. left position output register" hexmask.long 0xA0 0.--31. 1. "SWREG_FIELD,Stabilization matrix 4 (left position) output (all format mode)" line.long 0xA4 "VENC_SWREG46,VENC stabilization matrix 5. GMV position output register" hexmask.long 0xA4 0.--31. 1. "SWREG_FIELD,Stabilization matrix 5 (GMV position) output (all format mode)" line.long 0xA8 "VENC_SWREG47,VENC stabilization matrix 6. right position output register" hexmask.long 0xA8 0.--31. 1. "SWREG_FIELD,Stabilization matrix 6 (right position) output (all format mode)" line.long 0xAC "VENC_SWREG48,VENC stabilization matrix 7. down-left position output register" hexmask.long 0xAC 0.--31. 1. "SWREG_FIELD,Stabilization matrix 7 (down-left position) output (all format mode)" line.long 0xB0 "VENC_SWREG49,VENC stabilization matrix 8. down position output register" hexmask.long 0xB0 0.--31. 1. "SWREG_FIELD,Stabilization matrix 8 (down position) output (all format mode)" line.long 0xB4 "VENC_SWREG50,VENC stabilization matrix 9. down-right position output register" hexmask.long 0xB4 0.--31. 1. "SWREG_FIELD,Stabilization matrix 9 (down-right position) output (all format mode)" line.long 0xB8 "VENC_SWREG51,VENC base address for cabac context tables H264 or probability tables VP8 register" hexmask.long 0xB8 0.--31. 1. "SWREG_FIELD,Base address for cabac context tables (H264) or probability tables (VP8) (all format mode)" line.long 0xBC "VENC_SWREG52,VENC base address for MV output writing register" hexmask.long 0xBC 0.--31. 1. "SWREG_FIELD,Base address for MV output writing (all format mode)" line.long 0xC0 "VENC_SWREG53,VENC RGB to YUV conversion coefficient A - B register" hexmask.long 0xC0 0.--31. 1. "SWREG_FIELD,RGB to YUV conversion coefficient A - B (all format mode)" line.long 0xC4 "VENC_SWREG54,VENC RGB to YUV conversion coefficient C - E register" hexmask.long 0xC4 0.--31. 1. "SWREG_FIELD,RGB to YUV conversion coefficient C - E (all format mode)" line.long 0xC8 "VENC_SWREG55,VENC RGB to YUV conversion coefficient F. RGB mask MSB bit position register" hexmask.long 0xC8 0.--31. 1. "SWREG_FIELD,RGB to YUV conversion coefficient F RGB mask MSB bit position (all format mode)" line.long 0xCC "VENC_SWREG56,VENC intra area register" hexmask.long 0xCC 0.--31. 1. "SWREG_FIELD,intra area (all format mode)" line.long 0xD0 "VENC_SWREG57,VENC CIR intra mb position register" hexmask.long 0xD0 0.--31. 1. "SWREG_FIELD,CIR intra mb position (all format mode)" line.long 0xD4 "VENC_SWREG58,VENC intra slice bitmap for slices 0..31/base address for VP8 1st DCT partition register" hexmask.long 0xD4 0.--31. 1. "SWREG_FIELD,intra slice bitmap for slices 0..31 / Base address for VP8 1st DCT partition (all format mode)" line.long 0xD8 "VENC_SWREG59,VENC intra slice bitmap for slices 32..63/base address for VP8 2nd DCT partition register" hexmask.long 0xD8 0.--31. 1. "SWREG_FIELD,intra slice bitmap for slices 32..63 / Base address for VP8 2nd DCT partition (all format mode)" line.long 0xDC "VENC_SWREG60,VENC 1st ROI area register" hexmask.long 0xDC 0.--31. 1. "SWREG_FIELD,1st ROI area (all format mode)" line.long 0xE0 "VENC_SWREG61,VENC 2nd ROI area register" hexmask.long 0xE0 0.--31. 1. "SWREG_FIELD,2nd ROI area (all format mode)" line.long 0xE4 "VENC_SWREG62,VENC ROI area delta QP. MV register" hexmask.long 0xE4 0.--31. 1. "SWREG_FIELD,ROI area delta QP MV (all format mode)" rgroup.long 0xFC++0x3 line.long 0x0 "VENC_SWREG63,VENC synthesis configuration register encoder 0 register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Synthesis configuration register encoder 0 (read only) (all format mode)" group.long 0x100++0x7F line.long 0x0 "VENC_SWREG64,VENC JPEG luma quantization 1/VP8 intra 16x16 mode 0-1 penalty register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 1 / VP8 intra 16x16 mode 0-1 penalty (all format mode)" line.long 0x4 "VENC_SWREG65,VENC JPEG luma quantization 2/VP8 intra 16x16 mode 2-3 penalty register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 2 / VP8 intra 16x16 mode 2-3 penalty (all format mode)" line.long 0x8 "VENC_SWREG66,VENC JPEG luma quantization 3/VP8 intra 4x4 mode 0-1 penalty register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 3 / VP8 intra 4x4 mode 0-1 penalty (all format mode)" line.long 0xC "VENC_SWREG67,VENC JPEG luma quantization 4/VP8 intra 4x4 mode 2-3 penalty register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 4 / VP8 intra 4x4 mode 2-3 penalty (all format mode)" line.long 0x10 "VENC_SWREG68,VENC JPEG luma quantization 5/VP8 intra 4x4 mode 4-5 penalty register" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 5 / VP8 intra 4x4 mode 4-5 penalty (all format mode)" line.long 0x14 "VENC_SWREG69,VENC JPEG luma quantization 6/VP8 intra 4x4 mode 6-7 penalty register" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 6 / VP8 intra 4x4 mode 6-7 penalty (all format mode)" line.long 0x18 "VENC_SWREG70,VENC JPEG luma quantization 7/VP8 intra 4x4 mode 8-9 penalty register" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 7 / VP8 intra 4x4 mode 8-9 penalty (all format mode)" line.long 0x1C "VENC_SWREG71,VENC JPEG luma quantization 8/base address for VP8 segmentation map register" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 8 / Base address for VP8 segmentation map (all format mode)" line.long 0x20 "VENC_SWREG72,VENC JPEG luma quantization 9/VP8 segment1 parameter register" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 9 / VP8 segment1 parameter (all format mode)" line.long 0x24 "VENC_SWREG73,VENC JPEG luma quantization 10/VP8 segment1 parameter register" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 10 / VP8 segment1 parameter (all format mode)" line.long 0x28 "VENC_SWREG74,VENC JPEG luma quantization 11/VP8 segment1 parameter register" hexmask.long 0x28 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 11 / VP8 segment1 parameter (all format mode)" line.long 0x2C "VENC_SWREG75,VENC JPEG luma quantization 12/VP8 segment1 parameter register" hexmask.long 0x2C 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 12 / VP8 segment1 parameter (all format mode)" line.long 0x30 "VENC_SWREG76,VENC JPEG luma quantization 13/VP8 segment1 parameter register" hexmask.long 0x30 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 13 / VP8 segment1 parameter (all format mode)" line.long 0x34 "VENC_SWREG77,VENC JPEG luma quantization 14/VP8 segment1 parameter register" hexmask.long 0x34 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 14 / VP8 segment1 parameter (all format mode)" line.long 0x38 "VENC_SWREG78,VENC JPEG luma quantization 15/VP8 segment1 parameter register" hexmask.long 0x38 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 15 / VP8 segment1 parameter (all format mode)" line.long 0x3C "VENC_SWREG79,VENC JPEG luma quantization 16/VP8 segment2 parameter register" hexmask.long 0x3C 0.--31. 1. "SWREG_FIELD,JPEG luma quantization 16 / VP8 segment2 parameter (all format mode)" line.long 0x40 "VENC_SWREG80,VENC JPEG chroma quantization 1/VP8 segment2 parameter register" hexmask.long 0x40 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 1 / VP8 segment2 parameter (all format mode)" line.long 0x44 "VENC_SWREG81,VENC JPEG chroma quantization 2/VP8 segment2 parameter register" hexmask.long 0x44 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 2 / VP8 segment2 parameter (all format mode)" line.long 0x48 "VENC_SWREG82,VENC JPEG chroma quantization 3/VP8 segment2 parameter register" hexmask.long 0x48 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 3 / VP8 segment2 parameter (all format mode)" line.long 0x4C "VENC_SWREG83,VENC JPEG chroma quantization 4/VP8 segment2 parameter register" hexmask.long 0x4C 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 4 / VP8 segment2 parameter (all format mode)" line.long 0x50 "VENC_SWREG84,VENC JPEG chroma quantization 5/VP8 segment2 parameter register" hexmask.long 0x50 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 5 / VP8 segment2 parameter (all format mode)" line.long 0x54 "VENC_SWREG85,VENC JPEG chroma quantization 6/VP8 segment2 parameter register" hexmask.long 0x54 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 6 / VP8 segment2 parameter (all format mode)" line.long 0x58 "VENC_SWREG86,VENC JPEG chroma quantization 7/VP8 segment2 parameter register" hexmask.long 0x58 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 7 / VP8 segment2 parameter (all format mode)" line.long 0x5C "VENC_SWREG87,VENC JPEG chroma quantization 8/VP8 segment2 parameter register" hexmask.long 0x5C 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 8 / VP8 segment2 parameter (all format mode)" line.long 0x60 "VENC_SWREG88,VENC JPEG chroma quantization 9/VP8 segment3 parameter register" hexmask.long 0x60 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 9 / VP8 segment3 parameter (all format mode)" line.long 0x64 "VENC_SWREG89,VENC JPEG chroma quantization 10/VP8 segment3 parameter register" hexmask.long 0x64 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 10 / VP8 segment3 parameter (all format mode)" line.long 0x68 "VENC_SWREG90,VENC JPEG chroma quantization 11/VP8 segment3 parameter register" hexmask.long 0x68 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 11 / VP8 segment3 parameter (all format mode)" line.long 0x6C "VENC_SWREG91,VENC JPEG chroma quantization 12/VP8 segment3 parameter register" hexmask.long 0x6C 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 12 / VP8 segment3 parameter (all format mode)" line.long 0x70 "VENC_SWREG92,VENC JPEG chroma quantization 13/VP8 segment3 parameter register" hexmask.long 0x70 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 13 / VP8 segment3 parameter (all format mode)" line.long 0x74 "VENC_SWREG93,VENC JPEG chroma quantization 14/VP8 segment3 parameter register" hexmask.long 0x74 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 14 / VP8 segment3 parameter (all format mode)" line.long 0x78 "VENC_SWREG94,VENC JPEG chroma quantization 15/VP8 segment3 parameter register" hexmask.long 0x78 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 15 / VP8 segment3 parameter (all format mode)" line.long 0x7C "VENC_SWREG95,VENC JPEG chroma quantization 16/VP8 segment3 parameter register" hexmask.long 0x7C 0.--31. 1. "SWREG_FIELD,JPEG chroma quantization 16 / VP8 segment3 parameter (all format mode)" wgroup.long 0x180++0xFF line.long 0x0 "VENC_SWREG96,VENC DMV 4p/1p penalty values 0-3 register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values 0-3 (all format mode)" line.long 0x4 "VENC_SWREG97,VENC DMV 4p/1p penalty values 4-7 register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values 4-7 (all format mode)" line.long 0x8 "VENC_SWREG98,VENC DMV 4p/1p penalty values register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0xC "VENC_SWREG99,VENC DMV 4p/1p penalty values register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x10 "VENC_SWREG100,VENC DMV 4p/1p penalty values register" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x14 "VENC_SWREG101,VENC DMV 4p/1p penalty values register" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x18 "VENC_SWREG102,VENC DMV 4p/1p penalty values register" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x1C "VENC_SWREG103,VENC DMV 4p/1p penalty values register" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x20 "VENC_SWREG104,VENC DMV 4p/1p penalty values register" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x24 "VENC_SWREG105,VENC DMV 4p/1p penalty values register" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x28 "VENC_SWREG106,VENC DMV 4p/1p penalty values register" hexmask.long 0x28 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x2C "VENC_SWREG107,VENC DMV 4p/1p penalty values register" hexmask.long 0x2C 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x30 "VENC_SWREG108,VENC DMV 4p/1p penalty values register" hexmask.long 0x30 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x34 "VENC_SWREG109,VENC DMV 4p/1p penalty values register" hexmask.long 0x34 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x38 "VENC_SWREG110,VENC DMV 4p/1p penalty values register" hexmask.long 0x38 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x3C "VENC_SWREG111,VENC DMV 4p/1p penalty values register" hexmask.long 0x3C 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x40 "VENC_SWREG112,VENC DMV 4p/1p penalty values register" hexmask.long 0x40 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x44 "VENC_SWREG113,VENC DMV 4p/1p penalty values register" hexmask.long 0x44 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x48 "VENC_SWREG114,VENC DMV 4p/1p penalty values register" hexmask.long 0x48 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x4C "VENC_SWREG115,VENC DMV 4p/1p penalty values register" hexmask.long 0x4C 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x50 "VENC_SWREG116,VENC DMV 4p/1p penalty values register" hexmask.long 0x50 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x54 "VENC_SWREG117,VENC DMV 4p/1p penalty values register" hexmask.long 0x54 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x58 "VENC_SWREG118,VENC DMV 4p/1p penalty values register" hexmask.long 0x58 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x5C "VENC_SWREG119,VENC DMV 4p/1p penalty values register" hexmask.long 0x5C 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x60 "VENC_SWREG120,VENC DMV 4p/1p penalty values register" hexmask.long 0x60 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x64 "VENC_SWREG121,VENC DMV 4p/1p penalty values register" hexmask.long 0x64 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x68 "VENC_SWREG122,VENC DMV 4p/1p penalty values register" hexmask.long 0x68 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x6C "VENC_SWREG123,VENC DMV 4p/1p penalty values register" hexmask.long 0x6C 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x70 "VENC_SWREG124,VENC DMV 4p/1p penalty values register" hexmask.long 0x70 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x74 "VENC_SWREG125,VENC DMV 4p/1p penalty values register" hexmask.long 0x74 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x78 "VENC_SWREG126,VENC DMV 4p/1p penalty values register" hexmask.long 0x78 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values (all format mode)" line.long 0x7C "VENC_SWREG127,VENC DMV 4p/1p penalty values 124-127 register" hexmask.long 0x7C 0.--31. 1. "SWREG_FIELD,DMV 4p/1p penalty values 124-127 (all format mode)" line.long 0x80 "VENC_SWREG128,VENC DMV qpel penalty values 0-3 register" hexmask.long 0x80 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values 0-3 (all format mode)" line.long 0x84 "VENC_SWREG129,VENC DMV qpel penalty values 4-7 register" hexmask.long 0x84 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values 4-7 (all format mode)" line.long 0x88 "VENC_SWREG130,VENC DMV qpel penalty values register" hexmask.long 0x88 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0x8C "VENC_SWREG131,VENC DMV qpel penalty values register" hexmask.long 0x8C 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0x90 "VENC_SWREG132,VENC DMV qpel penalty values register" hexmask.long 0x90 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0x94 "VENC_SWREG133,VENC DMV qpel penalty values register" hexmask.long 0x94 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0x98 "VENC_SWREG134,VENC DMV qpel penalty values register" hexmask.long 0x98 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0x9C "VENC_SWREG135,VENC DMV qpel penalty values register" hexmask.long 0x9C 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xA0 "VENC_SWREG136,VENC DMV qpel penalty values register" hexmask.long 0xA0 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xA4 "VENC_SWREG137,VENC DMV qpel penalty values register" hexmask.long 0xA4 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xA8 "VENC_SWREG138,VENC DMV qpel penalty values register" hexmask.long 0xA8 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xAC "VENC_SWREG139,VENC DMV qpel penalty values register" hexmask.long 0xAC 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xB0 "VENC_SWREG140,VENC DMV qpel penalty values register" hexmask.long 0xB0 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xB4 "VENC_SWREG141,VENC DMV qpel penalty values register" hexmask.long 0xB4 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xB8 "VENC_SWREG142,VENC DMV qpel penalty values register" hexmask.long 0xB8 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xBC "VENC_SWREG143,VENC DMV qpel penalty values register" hexmask.long 0xBC 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xC0 "VENC_SWREG144,VENC DMV qpel penalty values register" hexmask.long 0xC0 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xC4 "VENC_SWREG145,VENC DMV qpel penalty values register" hexmask.long 0xC4 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xC8 "VENC_SWREG146,VENC DMV qpel penalty values register" hexmask.long 0xC8 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xCC "VENC_SWREG147,VENC DMV qpel penalty values register" hexmask.long 0xCC 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xD0 "VENC_SWREG148,VENC DMV qpel penalty values register" hexmask.long 0xD0 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xD4 "VENC_SWREG149,VENC DMV qpel penalty values register" hexmask.long 0xD4 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xD8 "VENC_SWREG150,VENC DMV qpel penalty values register" hexmask.long 0xD8 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xDC "VENC_SWREG151,VENC DMV qpel penalty values register" hexmask.long 0xDC 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xE0 "VENC_SWREG152,VENC DMV qpel penalty values register" hexmask.long 0xE0 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xE4 "VENC_SWREG153,VENC DMV qpel penalty values register" hexmask.long 0xE4 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xE8 "VENC_SWREG154,VENC DMV qpel penalty values register" hexmask.long 0xE8 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xEC "VENC_SWREG155,VENC DMV qpel penalty values register" hexmask.long 0xEC 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xF0 "VENC_SWREG156,VENC DMV qpel penalty values register" hexmask.long 0xF0 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xF4 "VENC_SWREG157,VENC DMV qpel penalty values register" hexmask.long 0xF4 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xF8 "VENC_SWREG158,VENC DMV qpel penalty values register" hexmask.long 0xF8 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values (all format mode)" line.long 0xFC "VENC_SWREG159,VENC DMV qpel penalty values 124-127 register" hexmask.long 0xFC 0.--31. 1. "SWREG_FIELD,DMV qpel penalty values 124-127 (all format mode)" group.long 0x280++0x127 line.long 0x0 "VENC_SWREG160,VENC VP8 bit cost of inter type. coeff for dmv penalty register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,VP8 bit cost of inter type coeff for dmv penalty etc (all format mode)" line.long 0x4 "VENC_SWREG161,VENC VP8 bit cost of golden ref frame register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,VP8 bit cost of golden ref frame (not used) (all format mode)" line.long 0x8 "VENC_SWREG162,VENC VP8 loop filter delta register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,VP8 loop filter delta (all format mode)" line.long 0xC "VENC_SWREG163,VENC VP8 loop filter delta register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,VP8 loop filter delta (all format mode)" line.long 0x10 "VENC_SWREG164,VENC VP8 deadzone lookup table register" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x14 "VENC_SWREG165,VENC VP8 deadzone lookup table register" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x18 "VENC_SWREG166,VENC VP8 deadzone lookup table register" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x1C "VENC_SWREG167,VENC VP8 deadzone lookup table register" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x20 "VENC_SWREG168,VENC VP8 deadzone lookup table register" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x24 "VENC_SWREG169,VENC VP8 deadzone lookup table register" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x28 "VENC_SWREG170,VENC VP8 deadzone lookup table register" hexmask.long 0x28 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x2C "VENC_SWREG171,VENC VP8 deadzone lookup table register" hexmask.long 0x2C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x30 "VENC_SWREG172,VENC VP8 deadzone lookup table register" hexmask.long 0x30 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x34 "VENC_SWREG173,VENC VP8 deadzone lookup table register" hexmask.long 0x34 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x38 "VENC_SWREG174,VENC VP8 deadzone lookup table register" hexmask.long 0x38 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x3C "VENC_SWREG175,VENC VP8 deadzone lookup table register" hexmask.long 0x3C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x40 "VENC_SWREG176,VENC VP8 deadzone lookup table register" hexmask.long 0x40 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x44 "VENC_SWREG177,VENC VP8 deadzone lookup table register" hexmask.long 0x44 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x48 "VENC_SWREG178,VENC VP8 deadzone lookup table register" hexmask.long 0x48 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x4C "VENC_SWREG179,VENC VP8 deadzone lookup table register" hexmask.long 0x4C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x50 "VENC_SWREG180,VENC VP8 deadzone lookup table register" hexmask.long 0x50 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x54 "VENC_SWREG181,VENC VP8 deadzone lookup table register" hexmask.long 0x54 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x58 "VENC_SWREG182,VENC VP8 deadzone lookup table register" hexmask.long 0x58 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x5C "VENC_SWREG183,VENC VP8 deadzone lookup table register" hexmask.long 0x5C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x60 "VENC_SWREG184,VENC VP8 deadzone lookup table register" hexmask.long 0x60 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x64 "VENC_SWREG185,VENC VP8 deadzone lookup table register" hexmask.long 0x64 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x68 "VENC_SWREG186,VENC VP8 deadzone lookup table register" hexmask.long 0x68 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x6C "VENC_SWREG187,VENC VP8 deadzone lookup table register" hexmask.long 0x6C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x70 "VENC_SWREG188,VENC VP8 deadzone lookup table register" hexmask.long 0x70 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x74 "VENC_SWREG189,VENC VP8 deadzone lookup table register" hexmask.long 0x74 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x78 "VENC_SWREG190,VENC VP8 deadzone lookup table register" hexmask.long 0x78 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x7C "VENC_SWREG191,VENC VP8 deadzone lookup table register" hexmask.long 0x7C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x80 "VENC_SWREG192,VENC VP8 deadzone lookup table register" hexmask.long 0x80 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x84 "VENC_SWREG193,VENC VP8 deadzone lookup table register" hexmask.long 0x84 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x88 "VENC_SWREG194,VENC VP8 deadzone lookup table register" hexmask.long 0x88 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x8C "VENC_SWREG195,VENC VP8 deadzone lookup table register" hexmask.long 0x8C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x90 "VENC_SWREG196,VENC VP8 deadzone lookup table register" hexmask.long 0x90 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x94 "VENC_SWREG197,VENC VP8 deadzone lookup table register" hexmask.long 0x94 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x98 "VENC_SWREG198,VENC VP8 deadzone lookup table register" hexmask.long 0x98 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x9C "VENC_SWREG199,VENC VP8 deadzone lookup table register" hexmask.long 0x9C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xA0 "VENC_SWREG200,VENC VP8 deadzone lookup table register" hexmask.long 0xA0 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xA4 "VENC_SWREG201,VENC VP8 deadzone lookup table register" hexmask.long 0xA4 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xA8 "VENC_SWREG202,VENC VP8 deadzone lookup table register" hexmask.long 0xA8 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xAC "VENC_SWREG203,VENC VP8 deadzone lookup table register" hexmask.long 0xAC 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xB0 "VENC_SWREG204,VENC VP8 deadzone lookup table register" hexmask.long 0xB0 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xB4 "VENC_SWREG205,VENC VP8 deadzone lookup table register" hexmask.long 0xB4 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xB8 "VENC_SWREG206,VENC VP8 deadzone lookup table register" hexmask.long 0xB8 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xBC "VENC_SWREG207,VENC VP8 deadzone lookup table register" hexmask.long 0xBC 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xC0 "VENC_SWREG208,VENC VP8 deadzone lookup table register" hexmask.long 0xC0 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xC4 "VENC_SWREG209,VENC VP8 deadzone lookup table register" hexmask.long 0xC4 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xC8 "VENC_SWREG210,VENC VP8 deadzone lookup table register" hexmask.long 0xC8 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xCC "VENC_SWREG211,VENC VP8 deadzone lookup table register" hexmask.long 0xCC 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xD0 "VENC_SWREG212,VENC VP8 deadzone lookup table register" hexmask.long 0xD0 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xD4 "VENC_SWREG213,VENC VP8 deadzone lookup table register" hexmask.long 0xD4 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xD8 "VENC_SWREG214,VENC VP8 deadzone lookup table register" hexmask.long 0xD8 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xDC "VENC_SWREG215,VENC VP8 deadzone lookup table register" hexmask.long 0xDC 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xE0 "VENC_SWREG216,VENC VP8 deadzone lookup table register" hexmask.long 0xE0 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xE4 "VENC_SWREG217,VENC VP8 deadzone lookup table register" hexmask.long 0xE4 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xE8 "VENC_SWREG218,VENC VP8 deadzone lookup table register" hexmask.long 0xE8 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xEC "VENC_SWREG219,VENC VP8 deadzone lookup table register" hexmask.long 0xEC 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xF0 "VENC_SWREG220,VENC VP8 deadzone lookup table register" hexmask.long 0xF0 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xF4 "VENC_SWREG221,VENC VP8 deadzone lookup table register" hexmask.long 0xF4 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xF8 "VENC_SWREG222,VENC VP8 deadzone lookup table register" hexmask.long 0xF8 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0xFC "VENC_SWREG223,VENC VP8 deadzone lookup table register" hexmask.long 0xFC 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x100 "VENC_SWREG224,VENC VP8 deadzone lookup table register" hexmask.long 0x100 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x104 "VENC_SWREG225,VENC VP8 deadzone lookup table register" hexmask.long 0x104 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x108 "VENC_SWREG226,VENC VP8 deadzone lookup table register" hexmask.long 0x108 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x10C "VENC_SWREG227,VENC VP8 deadzone lookup table register" hexmask.long 0x10C 0.--31. 1. "SWREG_FIELD,VP8 deadzone lookup table (all format mode)" line.long 0x110 "VENC_SWREG228,VENC VP8 deadzone rate multiplier for plane 0-1 register" hexmask.long 0x110 0.--31. 1. "SWREG_FIELD,VP8 deadzone rate multiplier for plane 0-1 (all format mode)" line.long 0x114 "VENC_SWREG229,VENC VP8 deadzone rate multiplier for plane 2-3 register" hexmask.long 0x114 0.--31. 1. "SWREG_FIELD,VP8 deadzone rate multiplier for plane 2-3 (all format mode)" line.long 0x118 "VENC_SWREG230,VENC VP8 deadzone rate for macroblock skip token 0-1 register" hexmask.long 0x118 0.--31. 1. "SWREG_FIELD,VP8 deadzone rate for macroblock skip token 0-1 (all format mode)" line.long 0x11C "VENC_SWREG231,VENC base address for output of down-scaled encoder image in YUYV 4:2:2 format register" hexmask.long 0x11C 0.--31. 1. "SWREG_FIELD,Base address for output of down-scaled encoder image in YUYV 4:2:2 format (all format mode)" line.long 0x120 "VENC_SWREG232,VENC scaling control register" hexmask.long 0x120 0.--31. 1. "SWREG_FIELD,Scaling control (all format mode)" line.long 0x124 "VENC_SWREG233,VENC scaling control register" hexmask.long 0x124 0.--31. 1. "SWREG_FIELD,Scaling control (all format mode)" group.long 0x3B0++0x27 line.long 0x0 "VENC_SWREG236,VENC squared error output calculated for 13x13 pixels per macroblock register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Squared error output calculated for 13x13 pixels per macroblock (all format mode)" line.long 0x4 "VENC_SWREG237,VENC MAD 2 control and output register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,MAD 2 control and output (all format mode)" line.long 0x8 "VENC_SWREG238,VENC MAD 3 control and output register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,MAD 3 control and output (all format mode)" line.long 0xC "VENC_SWREG239,VENC VP8 predictor interpolation coefficient for full pixel position register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,VP8 predictor interpolation coefficient for full pixel position (all format mode)" line.long 0x10 "VENC_SWREG240,VENC VP8 predictor interpolation coefficient for 1/8 pixel position register" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,VP8 predictor interpolation coefficient for 1/8 pixel position (all format mode)" line.long 0x14 "VENC_SWREG241,VENC VP8 predictor interpolation coefficient for 2/8 pixel position register" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,VP8 predictor interpolation coefficient for 2/8 pixel position (all format mode)" line.long 0x18 "VENC_SWREG242,VENC VP8 predictor interpolation coefficient for 3/8 pixel position register" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,VP8 predictor interpolation coefficient for 3/8 pixel position (all format mode)" line.long 0x1C "VENC_SWREG243,VENC VP8 predictor interpolation coefficient for 4/8 pixel position register" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,VP8 predictor interpolation coefficient for 4/8 pixel position (all format mode)" line.long 0x20 "VENC_SWREG244,VENC base address for VP8 3rd DCT partition register" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,Base address for VP8 3rd DCT partition (all format mode)" line.long 0x24 "VENC_SWREG245,VENC base address for VP8 4th DCT partition register" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,Base address for VP8 4th DCT partition (all format mode)" group.long 0x400++0x9F line.long 0x0 "VENC_SWREG256,VENC segment 1: intra 16x16 mode 0-2 penalty register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,segment 1: intra 16x16 mode 0-2 penalty (all format mode)" line.long 0x4 "VENC_SWREG257,VENC segment 1: intra 16x16 mode 3. intra 4x4 0-1 penalty register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,segment 1: intra 16x16 mode 3 and intra 4x4 0-1 penalty (all format mode)" line.long 0x8 "VENC_SWREG258,VENC segment 1: intra 4x4 mode 2-4 penalty register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,segment 1: intra 4x4 mode 2-4 penalty (all format mode)" line.long 0xC "VENC_SWREG259,VENC segment 1: intra 4x4 mode 5-7 penalty register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,segment 1: intra 4x4 mode 5-7 penalty (all format mode)" line.long 0x10 "VENC_SWREG260,VENC segment 1: intra 4x4 mode 8-9 penalty. previous mode favor for H.264 register" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,segment 1: intra 4x4 mode 8-9 penalty previous mode favor for H.264 (all format mode)" line.long 0x14 "VENC_SWREG261,VENC segment 1: bit cost of inter type. intra 16x16 mode favor register" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,segment 1: Bit cost of inter type intra 16x16 mode favor (all format mode)" line.long 0x18 "VENC_SWREG262,VENC segment 1: inter MB mode favor. skip mode penalty. penalty value for 2nd reference frame register" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,segment 1: inter MB mode favor skip mode penalty penalty value for second reference frame (all format mode)" line.long 0x1C "VENC_SWREG263,VENC segment 1: penalty value register" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,segment 1: penalty value (all format mode)" line.long 0x20 "VENC_SWREG264,VENC segment 1: penalty value register" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,segment 1: penalty value (all format mode)" line.long 0x24 "VENC_SWREG265,VENC segment 1: deadzone rate multiplier for plane 0-1 register" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,segment 1: Deadzone rate multiplier for plane 0-1 (all format mode)" line.long 0x28 "VENC_SWREG266,VENC segment 1: deadzone rate multiplier for plane 2-3 register" hexmask.long 0x28 0.--31. 1. "SWREG_FIELD,segment 1: Deadzone rate multiplier for plane 2-3 (all format mode)" line.long 0x2C "VENC_SWREG267,VENC segment 1: deadzone rate for macroblock skip token 0-1. dmv penalty coefficient register" hexmask.long 0x2C 0.--31. 1. "SWREG_FIELD,segment 1: Deadzone rate for macroblock skip token 0-1 dmv penalty coefficient (all format mode)" line.long 0x30 "VENC_SWREG268,VENC segment 2: intra 16x16 mode 0-2 penalty register" hexmask.long 0x30 0.--31. 1. "SWREG_FIELD,segment 2: intra 16x16 mode 0-2 penalty (all format mode)" line.long 0x34 "VENC_SWREG269,VENC segment 2: intra 16x16 mode 3 penalty. intra 4x4 mode 0-1 penalty register" hexmask.long 0x34 0.--31. 1. "SWREG_FIELD,segment 2: intra 16x16 mode 3 penalty intra 4x4 mode 0-1 penalty (all format mode)" line.long 0x38 "VENC_SWREG270,VENC segment 2: intra 4x4 mode 2-4 penalty register" hexmask.long 0x38 0.--31. 1. "SWREG_FIELD,segment 2: intra 4x4 mode 2-4 penalty (all format mode)" line.long 0x3C "VENC_SWREG271,VENC segment 2: intra 4x4 mode 5-7 penalty register" hexmask.long 0x3C 0.--31. 1. "SWREG_FIELD,segment 2: intra 4x4 mode 5-7 penalty (all format mode)" line.long 0x40 "VENC_SWREG272,VENC segment 2: intra 4x4 mode 8-9 penalty. intra 4x4 previous mode favor for H.264 register" hexmask.long 0x40 0.--31. 1. "SWREG_FIELD,segment 2: intra 4x4 mode 8-9 penalty intra 4x4 previous mode favor for H.264 (all format mode)" line.long 0x44 "VENC_SWREG273,VENC segment 2: bit cost of inter type. intra 16x16 mode favor register" hexmask.long 0x44 0.--31. 1. "SWREG_FIELD,segment 2: Bit cost of inter type intra 16x16 mode favor (all format mode)" line.long 0x48 "VENC_SWREG274,VENC segment 2: inter MB mode favor. skip mode penalty. penalty value register" hexmask.long 0x48 0.--31. 1. "SWREG_FIELD,segment 2: inter MB mode favor skip mode penalty panelty value (all format mode)" line.long 0x4C "VENC_SWREG275,VENC segment 2: penalty value register" hexmask.long 0x4C 0.--31. 1. "SWREG_FIELD,segment 2: penalty value (all format mode)" line.long 0x50 "VENC_SWREG276,VENC segment 2: penalty value register" hexmask.long 0x50 0.--31. 1. "SWREG_FIELD,segment 2: penalty value (all format mode)" line.long 0x54 "VENC_SWREG277,VENC segment 2: deadzone rate multiplier for plane 0-1 register" hexmask.long 0x54 0.--31. 1. "SWREG_FIELD,segment 2: Deadzone rate multiplier for plane 0-1 (all format mode)" line.long 0x58 "VENC_SWREG278,VENC segment 2: deadzone rate multiplier for plane 2-3 register" hexmask.long 0x58 0.--31. 1. "SWREG_FIELD,segment 2: Deadzone rate multiplier for plane 2-3 (all format mode)" line.long 0x5C "VENC_SWREG279,VENC segment 2: deadzone rate for macroblock skip token 0-1. dmv penalty coefficient register" hexmask.long 0x5C 0.--31. 1. "SWREG_FIELD,segment 2: Deadzone rate for macroblock skip token 0-1 dmv penalty coefficient (all format mode)" line.long 0x60 "VENC_SWREG280,VENC segment 3: intra 16x16 mode 0-2 penalty register" hexmask.long 0x60 0.--31. 1. "SWREG_FIELD,segment 3: intra 16x16 mode 0-2 penalty (all format mode)" line.long 0x64 "VENC_SWREG281,VENC segment 3: intra 16x16 mode 3 penalty. intra 4x4 mode 0-1 penalty register" hexmask.long 0x64 0.--31. 1. "SWREG_FIELD,segment 3: intra 16x16 mode 3 penalty intra 4x4 mode 0-1 penalty (all format mode)" line.long 0x68 "VENC_SWREG282,VENC segment 3: intra 4x4 mode 2-4 penalty register" hexmask.long 0x68 0.--31. 1. "SWREG_FIELD,segment 3: intra 4x4 mode 2-4 penalty (all format mode)" line.long 0x6C "VENC_SWREG283,VENC segment 3: intra 4x4 mode 5-7 penalty register" hexmask.long 0x6C 0.--31. 1. "SWREG_FIELD,segment 3: intra 4x4 mode 5-7 penalty (all format mode)" line.long 0x70 "VENC_SWREG284,VENC segment 3: intra 4x4 mode 8-9 penalty. intra 4x4 previous mode favor for H.264 register" hexmask.long 0x70 0.--31. 1. "SWREG_FIELD,segment 3: intra 4x4 mode 8-9 penalty intra 4x4 previous mode favor for H.264 (all format mode)" line.long 0x74 "VENC_SWREG285,VENC segment 3: bit cost of inter type. intra 16x16 mode favor register" hexmask.long 0x74 0.--31. 1. "SWREG_FIELD,segment 3: Bit cost of inter type intra 16x16 mode favor (all format mode)" line.long 0x78 "VENC_SWREG286,VENC segment 3: inter MB mode favor in intra/inter selection. inter MB mode favor. penalty value for second reference frame register" hexmask.long 0x78 0.--31. 1. "SWREG_FIELD,segment 3: inter MB mode favor in intra/inter selection inter MB mode favor penalty value for second reference frame (all format mode)" line.long 0x7C "VENC_SWREG287,VENC segment 3: penalty value register" hexmask.long 0x7C 0.--31. 1. "SWREG_FIELD,segment 3: penalty value (all format mode)" line.long 0x80 "VENC_SWREG288,VENC segment 3: penalty value register" hexmask.long 0x80 0.--31. 1. "SWREG_FIELD,segment 3: penalty value (all format mode)" line.long 0x84 "VENC_SWREG289,VENC segment 3: deadzone rate multiplier for plane 0-1 register" hexmask.long 0x84 0.--31. 1. "SWREG_FIELD,segment 3: Deadzone rate multiplier for plane 0-1 (all format mode)" line.long 0x88 "VENC_SWREG290,VENC segment 3: deadzone rate multiplier for plane 2-3 register" hexmask.long 0x88 0.--31. 1. "SWREG_FIELD,segment 3: Deadzone rate multiplier for plane 2-3 (all format mode)" line.long 0x8C "VENC_SWREG291,VENC segment 3: deadzone rate for macroblock skip token 0-1. dmv penalty coefficient register" hexmask.long 0x8C 0.--31. 1. "SWREG_FIELD,segment 3: Deadzone rate for macroblock skip token 0-1 dmv penalty coefficient (all format mode)" line.long 0x90 "VENC_SWREG292,VENC VP8 average variance in prev frame register" hexmask.long 0x90 0.--31. 1. "SWREG_FIELD,VP8 average variance in prev frame (all format mode)" line.long 0x94 "VENC_SWREG293,VENC VP8 16384/average variance in prev frame. H264 field control register" hexmask.long 0x94 0.--31. 1. "SWREG_FIELD,VP8 16384/avgVar in prev frame H264 Field control (all format mode)" line.long 0x98 "VENC_SWREG294,VENC Mb boost register" hexmask.long 0x98 0.--31. 1. "SWREG_FIELD,Mb boost (all format mode)" line.long 0x9C "VENC_SWREG295,VENC variance control. Pskop conding mode register" hexmask.long 0x9C 0.--31. 1. "SWREG_FIELD,Variance control Pskop conding mode (all format mode)" rgroup.long 0x4A0++0x3 line.long 0x0 "VENC_SWREG296,VENC synthesis configuration register encoder 1 read only register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Synthesis configuration register encoder 1 (read only) (all format mode)" group.long 0x4A4++0x1CF line.long 0x0 "VENC_SWREG297,VENC MBRC control register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,MBRC control (all format mode)" line.long 0x4 "VENC_SWREG298,VENC segment 4: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,segment 4: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x8 "VENC_SWREG299,VENC segment 4: skip mode penalty. inter MB mode favor register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,segment 4: skip mode penalty inter MB mode favor (all format mode)" line.long 0xC "VENC_SWREG300,VENC segment 4: penalty value register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,segment 4: penalty value (all format mode)" line.long 0x10 "VENC_SWREG301,VENC segment 4: penalty value register" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,segment 4: penalty value (all format mode)" line.long 0x14 "VENC_SWREG302,VENC segment 5: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,segment 5: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x18 "VENC_SWREG303,VENC segment 5: skip mode penalty. inter MB mode favor register" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,segment 5: skip mode penalty inter MB mode favor (all format mode)" line.long 0x1C "VENC_SWREG304,VENC segment 5: penalty value register" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,segment 5: penalty value (all format mode)" line.long 0x20 "VENC_SWREG305,VENC segment 5: penalty value register" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,segment 5: penalty value (all format mode)" line.long 0x24 "VENC_SWREG306,VENC segment 6: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,segment 6: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x28 "VENC_SWREG307,VENC segment 6: skip mode penalty. inter MB mode favor register" hexmask.long 0x28 0.--31. 1. "SWREG_FIELD,segment 6: skip mode penalty inter MB mode favor (all format mode)" line.long 0x2C "VENC_SWREG308,VENC segment 6: penalty value register" hexmask.long 0x2C 0.--31. 1. "SWREG_FIELD,segment 6: penalty value (all format mode)" line.long 0x30 "VENC_SWREG309,VENC segment 6: penalty value register" hexmask.long 0x30 0.--31. 1. "SWREG_FIELD,segment 6: penalty value (all format mode)" line.long 0x34 "VENC_SWREG310,VENC segment 7: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x34 0.--31. 1. "SWREG_FIELD,segment 7: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x38 "VENC_SWREG311,VENC segment 7: skip mode penalty. inter MB mode favor register" hexmask.long 0x38 0.--31. 1. "SWREG_FIELD,segment 7: skip mode penalty inter MB mode favor (all format mode)" line.long 0x3C "VENC_SWREG312,VENC segment 7: penalty value register" hexmask.long 0x3C 0.--31. 1. "SWREG_FIELD,segment 7: penalty value (all format mode)" line.long 0x40 "VENC_SWREG313,VENC segment 7: penalty value register" hexmask.long 0x40 0.--31. 1. "SWREG_FIELD,segment 7: penalty value (all format mode)" line.long 0x44 "VENC_SWREG314,VENC segment 8: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x44 0.--31. 1. "SWREG_FIELD,segment 8: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x48 "VENC_SWREG315,VENC segment 8: skip mode penalty. inter MB mode favor register" hexmask.long 0x48 0.--31. 1. "SWREG_FIELD,segment 8: skip mode penalty inter MB mode favor (all format mode)" line.long 0x4C "VENC_SWREG316,VENC segment 8: penalty value register" hexmask.long 0x4C 0.--31. 1. "SWREG_FIELD,segment 8: penalty value (all format mode)" line.long 0x50 "VENC_SWREG317,VENC segment 8: penalty value register" hexmask.long 0x50 0.--31. 1. "SWREG_FIELD,segment 8: penalty value (all format mode)" line.long 0x54 "VENC_SWREG318,VENC segment 9: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x54 0.--31. 1. "SWREG_FIELD,segment 9: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x58 "VENC_SWREG319,VENC segment 9: skip mode penalty. inter MB mode favor register" hexmask.long 0x58 0.--31. 1. "SWREG_FIELD,segment 9: skip mode penalty inter MB mode favor (all format mode)" line.long 0x5C "VENC_SWREG320,VENC segment 9: penalty value register" hexmask.long 0x5C 0.--31. 1. "SWREG_FIELD,segment 9: penalty value (all format mode)" line.long 0x60 "VENC_SWREG321,VENC segment 9: penalty value register" hexmask.long 0x60 0.--31. 1. "SWREG_FIELD,segment 9: penalty value (all format mode)" line.long 0x64 "VENC_SWREG322,VENC segment 10: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x64 0.--31. 1. "SWREG_FIELD,segment 10: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x68 "VENC_SWREG323,VENC segment 10: skip mode penalty. inter MB mode favor register" hexmask.long 0x68 0.--31. 1. "SWREG_FIELD,segment 10: skip mode penalty inter MB mode favor (all format mode)" line.long 0x6C "VENC_SWREG324,VENC segment 10: penalty value register" hexmask.long 0x6C 0.--31. 1. "SWREG_FIELD,segment 10: penalty value (all format mode)" line.long 0x70 "VENC_SWREG325,VENC segment 10: penalty value register" hexmask.long 0x70 0.--31. 1. "SWREG_FIELD,segment 10: penalty value (all format mode)" line.long 0x74 "VENC_SWREG326,VENC segment 11: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x74 0.--31. 1. "SWREG_FIELD,segment 11: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x78 "VENC_SWREG327,VENC segment 11: skip mode penalty. inter MB mode favor register" hexmask.long 0x78 0.--31. 1. "SWREG_FIELD,segment 11: skip mode penalty inter MB mode favor (all format mode)" line.long 0x7C "VENC_SWREG328,VENC segment 11: penalty value register" hexmask.long 0x7C 0.--31. 1. "SWREG_FIELD,segment 11: penalty value (all format mode)" line.long 0x80 "VENC_SWREG329,VENC segment 11: penalty value register" hexmask.long 0x80 0.--31. 1. "SWREG_FIELD,segment 11: penalty value (all format mode)" line.long 0x84 "VENC_SWREG330,VENC segment 12: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x84 0.--31. 1. "SWREG_FIELD,segment 12: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x88 "VENC_SWREG331,VENC segment 12: skip mode penalty. inter MB mode favor register" hexmask.long 0x88 0.--31. 1. "SWREG_FIELD,segment 12: skip mode penalty inter MB mode favor (all format mode)" line.long 0x8C "VENC_SWREG332,VENC segment 12: penalty value register" hexmask.long 0x8C 0.--31. 1. "SWREG_FIELD,segment 12: penalty value (all format mode)" line.long 0x90 "VENC_SWREG333,VENC segment 12: penalty value register" hexmask.long 0x90 0.--31. 1. "SWREG_FIELD,segment 12: penalty value (all format mode)" line.long 0x94 "VENC_SWREG334,VENC segment 13: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x94 0.--31. 1. "SWREG_FIELD,segment 13: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x98 "VENC_SWREG335,VENC segment 13: skip mode penalty. inter MB mode favor register" hexmask.long 0x98 0.--31. 1. "SWREG_FIELD,segment 13: skip mode penalty inter MB mode favor (all format mode)" line.long 0x9C "VENC_SWREG336,VENC segment 13: penalty value register" hexmask.long 0x9C 0.--31. 1. "SWREG_FIELD,segment 13: penalty value (all format mode)" line.long 0xA0 "VENC_SWREG337,VENC segment 13: penalty value register" hexmask.long 0xA0 0.--31. 1. "SWREG_FIELD,segment 13: penalty value (all format mode)" line.long 0xA4 "VENC_SWREG338,VENC segment 14: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0xA4 0.--31. 1. "SWREG_FIELD,segment 14: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0xA8 "VENC_SWREG339,VENC segment 14: skip mode penalty. inter MB mode favor register" hexmask.long 0xA8 0.--31. 1. "SWREG_FIELD,segment 14: skip mode penalty inter MB mode favor (all format mode)" line.long 0xAC "VENC_SWREG340,VENC segment 14: penalty value register" hexmask.long 0xAC 0.--31. 1. "SWREG_FIELD,segment 14: penalty value (all format mode)" line.long 0xB0 "VENC_SWREG341,VENC segment 14: penalty value register" hexmask.long 0xB0 0.--31. 1. "SWREG_FIELD,segment 14: penalty value (all format mode)" line.long 0xB4 "VENC_SWREG342,VENC segment 15: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0xB4 0.--31. 1. "SWREG_FIELD,segment 15: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0xB8 "VENC_SWREG343,VENC segment 15: skip mode penalty. inter MB mode favor register" hexmask.long 0xB8 0.--31. 1. "SWREG_FIELD,segment 15: skip mode penalty inter MB mode favor (all format mode)" line.long 0xBC "VENC_SWREG344,VENC segment 15: penalty value register" hexmask.long 0xBC 0.--31. 1. "SWREG_FIELD,segment 15: penalty value (all format mode)" line.long 0xC0 "VENC_SWREG345,VENC segment 15: penalty value register" hexmask.long 0xC0 0.--31. 1. "SWREG_FIELD,segment 15: penalty value (all format mode)" line.long 0xC4 "VENC_SWREG346,VENC segment 16: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0xC4 0.--31. 1. "SWREG_FIELD,segment 16: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0xC8 "VENC_SWREG347,VENC segment 16: skip mode penalty. inter MB mode favor register" hexmask.long 0xC8 0.--31. 1. "SWREG_FIELD,segment 16: skip mode penalty inter MB mode favor (all format mode)" line.long 0xCC "VENC_SWREG348,VENC segment 16: penalty value register" hexmask.long 0xCC 0.--31. 1. "SWREG_FIELD,segment 16: penalty value (all format mode)" line.long 0xD0 "VENC_SWREG349,VENC segment 16: penalty value register" hexmask.long 0xD0 0.--31. 1. "SWREG_FIELD,segment 16: penalty value (all format mode)" line.long 0xD4 "VENC_SWREG350,VENC segment 17: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0xD4 0.--31. 1. "SWREG_FIELD,segment 17: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0xD8 "VENC_SWREG351,VENC segment 17: skip mode penalty. inter MB mode favor register" hexmask.long 0xD8 0.--31. 1. "SWREG_FIELD,segment 17: skip mode penalty inter MB mode favor (all format mode)" line.long 0xDC "VENC_SWREG352,VENC segment 17: penalty value register" hexmask.long 0xDC 0.--31. 1. "SWREG_FIELD,segment 17: penalty value (all format mode)" line.long 0xE0 "VENC_SWREG353,VENC segment 17: penalty value register" hexmask.long 0xE0 0.--31. 1. "SWREG_FIELD,segment 17: penalty value (all format mode)" line.long 0xE4 "VENC_SWREG354,VENC segment 18: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0xE4 0.--31. 1. "SWREG_FIELD,segment 18: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0xE8 "VENC_SWREG355,VENC segment 18: skip mode penalty. inter MB mode favor register" hexmask.long 0xE8 0.--31. 1. "SWREG_FIELD,segment 18: skip mode penalty inter MB mode favor (all format mode)" line.long 0xEC "VENC_SWREG356,VENC segment 18: penalty value register" hexmask.long 0xEC 0.--31. 1. "SWREG_FIELD,segment 18: penalty value (all format mode)" line.long 0xF0 "VENC_SWREG357,VENC segment 18: penalty value register" hexmask.long 0xF0 0.--31. 1. "SWREG_FIELD,segment 18: penalty value (all format mode)" line.long 0xF4 "VENC_SWREG358,VENC segment 19: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0xF4 0.--31. 1. "SWREG_FIELD,segment 19: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0xF8 "VENC_SWREG359,VENC segment 19: skip mode penalty. inter MB mode favor register" hexmask.long 0xF8 0.--31. 1. "SWREG_FIELD,segment 19: skip mode penalty inter MB mode favor (all format mode)" line.long 0xFC "VENC_SWREG360,VENC segment 19: penalty value register" hexmask.long 0xFC 0.--31. 1. "SWREG_FIELD,segment 19: penalty value (all format mode)" line.long 0x100 "VENC_SWREG361,VENC segment 19: penalty value register" hexmask.long 0x100 0.--31. 1. "SWREG_FIELD,segment 19: penalty value (all format mode)" line.long 0x104 "VENC_SWREG362,VENC segment 20: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x104 0.--31. 1. "SWREG_FIELD,segment 20: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x108 "VENC_SWREG363,VENC segment 20: skip mode penalty. inter MB mode favor register" hexmask.long 0x108 0.--31. 1. "SWREG_FIELD,segment 20: skip mode penalty inter MB mode favor (all format mode)" line.long 0x10C "VENC_SWREG364,VENC segment 20: penalty value register" hexmask.long 0x10C 0.--31. 1. "SWREG_FIELD,segment 20: penalty value (all format mode)" line.long 0x110 "VENC_SWREG365,VENC segment 20: penalty value register" hexmask.long 0x110 0.--31. 1. "SWREG_FIELD,segment 20: penalty value (all format mode)" line.long 0x114 "VENC_SWREG366,VENC segment 21: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x114 0.--31. 1. "SWREG_FIELD,segment 21: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x118 "VENC_SWREG367,VENC segment 21: skip mode penalty. inter MB mode favor register" hexmask.long 0x118 0.--31. 1. "SWREG_FIELD,segment 21: skip mode penalty inter MB mode favor (all format mode)" line.long 0x11C "VENC_SWREG368,VENC segment 21: penalty value register" hexmask.long 0x11C 0.--31. 1. "SWREG_FIELD,segment 21: penalty value (all format mode)" line.long 0x120 "VENC_SWREG369,VENC segment 21: penalty value register" hexmask.long 0x120 0.--31. 1. "SWREG_FIELD,segment 21: penalty value (all format mode)" line.long 0x124 "VENC_SWREG370,VENC segment 22: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x124 0.--31. 1. "SWREG_FIELD,segment 22: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x128 "VENC_SWREG371,VENC segment 22: skip mode penalty. inter MB mode favor register" hexmask.long 0x128 0.--31. 1. "SWREG_FIELD,segment 22: skip mode penalty inter MB mode favor (all format mode)" line.long 0x12C "VENC_SWREG372,VENC segment 22: penalty value register" hexmask.long 0x12C 0.--31. 1. "SWREG_FIELD,segment 22: penalty value (all format mode)" line.long 0x130 "VENC_SWREG373,VENC segment 22: penalty value register" hexmask.long 0x130 0.--31. 1. "SWREG_FIELD,segment 22: penalty value (all format mode)" line.long 0x134 "VENC_SWREG374,VENC segment 23: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x134 0.--31. 1. "SWREG_FIELD,segment 23: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x138 "VENC_SWREG375,VENC segment 23: skip mode penalty. inter MB mode favor register" hexmask.long 0x138 0.--31. 1. "SWREG_FIELD,segment 23: skip mode penalty inter MB mode favor (all format mode)" line.long 0x13C "VENC_SWREG376,VENC segment 23: penalty value register" hexmask.long 0x13C 0.--31. 1. "SWREG_FIELD,segment 23: penalty value (all format mode)" line.long 0x140 "VENC_SWREG377,VENC segment 23: penalty value register" hexmask.long 0x140 0.--31. 1. "SWREG_FIELD,segment 23: penalty value (all format mode)" line.long 0x144 "VENC_SWREG378,VENC segment 24: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x144 0.--31. 1. "SWREG_FIELD,segment 24: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x148 "VENC_SWREG379,VENC segment 24: skip mode penalty. inter MB mode favor register" hexmask.long 0x148 0.--31. 1. "SWREG_FIELD,segment 24: skip mode penalty inter MB mode favor (all format mode)" line.long 0x14C "VENC_SWREG380,VENC segment 24: penalty value register" hexmask.long 0x14C 0.--31. 1. "SWREG_FIELD,segment 24: penalty value (all format mode)" line.long 0x150 "VENC_SWREG381,VENC segment 24: penalty value register" hexmask.long 0x150 0.--31. 1. "SWREG_FIELD,segment 24: penalty value (all format mode)" line.long 0x154 "VENC_SWREG382,VENC segment 25: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x154 0.--31. 1. "SWREG_FIELD,segment 25: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x158 "VENC_SWREG383,VENC segment 25: skip mode penalty. inter MB mode favor register" hexmask.long 0x158 0.--31. 1. "SWREG_FIELD,segment 25: skip mode penalty inter MB mode favor (all format mode)" line.long 0x15C "VENC_SWREG384,VENC segment 25: penalty value register" hexmask.long 0x15C 0.--31. 1. "SWREG_FIELD,segment 25: penalty value (all format mode)" line.long 0x160 "VENC_SWREG385,VENC segment 25: penalty value register" hexmask.long 0x160 0.--31. 1. "SWREG_FIELD,segment 25: penalty value (all format mode)" line.long 0x164 "VENC_SWREG386,VENC segment 26: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x164 0.--31. 1. "SWREG_FIELD,segment 26: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x168 "VENC_SWREG387,VENC segment 26: skip mode penalty. inter MB mode favor register" hexmask.long 0x168 0.--31. 1. "SWREG_FIELD,segment 26: skip mode penalty inter MB mode favor (all format mode)" line.long 0x16C "VENC_SWREG388,VENC segment 26: penalty value register" hexmask.long 0x16C 0.--31. 1. "SWREG_FIELD,segment 26: penalty value (all format mode)" line.long 0x170 "VENC_SWREG389,VENC segment 26: penalty value register" hexmask.long 0x170 0.--31. 1. "SWREG_FIELD,segment 26: penalty value (all format mode)" line.long 0x174 "VENC_SWREG390,VENC segment 27: intra 4x4 previous mode favor. intra 16x16mode favor. penalty value for second reference frame register" hexmask.long 0x174 0.--31. 1. "SWREG_FIELD,segment 27: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x178 "VENC_SWREG391,VENC segment 27: skip mode penalty. inter MB mode favor register" hexmask.long 0x178 0.--31. 1. "SWREG_FIELD,segment 27: skip mode penalty inter MB mode favor (all format mode)" line.long 0x17C "VENC_SWREG392,VENC segment 27: penalty value register" hexmask.long 0x17C 0.--31. 1. "SWREG_FIELD,segment 27: penalty value (all format mode)" line.long 0x180 "VENC_SWREG393,VENC segment 27: penalty value register" hexmask.long 0x180 0.--31. 1. "SWREG_FIELD,segment 27: penalty value (all format mode)" line.long 0x184 "VENC_SWREG394,VENC segment 28: intra 4x4 previous mode favor. intra 16x16mode favor. penalty value for second reference frame register" hexmask.long 0x184 0.--31. 1. "SWREG_FIELD,segment 28: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x188 "VENC_SWREG395,VENC segment 28: skip mode penalty. inter MB mode favor register" hexmask.long 0x188 0.--31. 1. "SWREG_FIELD,segment 28: skip mode penalty inter MB mode favor (all format mode)" line.long 0x18C "VENC_SWREG396,VENC segment 28: penalty value register" hexmask.long 0x18C 0.--31. 1. "SWREG_FIELD,segment 28: penalty value (all format mode)" line.long 0x190 "VENC_SWREG397,VENC segment 28: penalty value register" hexmask.long 0x190 0.--31. 1. "SWREG_FIELD,segment 28: penalty value (all format mode)" line.long 0x194 "VENC_SWREG398,VENC segment 29: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x194 0.--31. 1. "SWREG_FIELD,segment 29: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x198 "VENC_SWREG399,VENC segment 29: skip mode penalty. inter MB mode favor register" hexmask.long 0x198 0.--31. 1. "SWREG_FIELD,segment 29: skip mode penalty inter MB mode favor (all format mode)" line.long 0x19C "VENC_SWREG400,VENC segment 29: penalty value register" hexmask.long 0x19C 0.--31. 1. "SWREG_FIELD,segment 29: penalty value (all format mode)" line.long 0x1A0 "VENC_SWREG401,VENC segment 29: penalty value register" hexmask.long 0x1A0 0.--31. 1. "SWREG_FIELD,segment 29: penalty value (all format mode)" line.long 0x1A4 "VENC_SWREG402,VENC segment 30: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x1A4 0.--31. 1. "SWREG_FIELD,segment 30: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x1A8 "VENC_SWREG403,VENC segment 30: skip mode penalty. inter MB mode favor register" hexmask.long 0x1A8 0.--31. 1. "SWREG_FIELD,segment 30: skip mode penalty inter MB mode favor (all format mode)" line.long 0x1AC "VENC_SWREG404,VENC segment 30: penalty value register" hexmask.long 0x1AC 0.--31. 1. "SWREG_FIELD,segment 30: penalty value (all format mode)" line.long 0x1B0 "VENC_SWREG405,VENC segment 30: penalty value register" hexmask.long 0x1B0 0.--31. 1. "SWREG_FIELD,segment 30: penalty value (all format mode)" line.long 0x1B4 "VENC_SWREG406,VENC segment 31: intra 4x4 previous mode favor. intra 16x16 mode favor. penalty value for second reference frame register" hexmask.long 0x1B4 0.--31. 1. "SWREG_FIELD,segment 31: intra 4x4 previous mode favor intra 16x16 mode favor penalty value for second reference frame (all format mode)" line.long 0x1B8 "VENC_SWREG407,VENC segment 31: skip mode penalty. inter MB mode favor register" hexmask.long 0x1B8 0.--31. 1. "SWREG_FIELD,segment 31: skip mode penalty inter MB mode favor (all format mode)" line.long 0x1BC "VENC_SWREG408,VENC segment 31: penalty value register" hexmask.long 0x1BC 0.--31. 1. "SWREG_FIELD,segment 31: penalty value (all format mode)" line.long 0x1C0 "VENC_SWREG409,VENC segment 31: penalty value register" hexmask.long 0x1C0 0.--31. 1. "SWREG_FIELD,segment 31: penalty value (all format mode)" line.long 0x1C4 "VENC_SWREG410,VENC MBRC control. QP. offset. enable register" hexmask.long 0x1C4 0.--31. 1. "SWREG_FIELD,MBRC control (QP offset enable) (all format mode)" line.long 0x1C8 "VENC_SWREG411,VENC gain of MB QP delta. 8.8 format register" hexmask.long 0x1C8 0.--31. 1. "SWREG_FIELD,gain of MB QPdelta. 8.8 format (all format mode)" line.long 0x1CC "VENC_SWREG412,VENC average of MB complexity register" hexmask.long 0x1CC 0.--31. 1. "SWREG_FIELD,average of MB complexity (all format mode)" group.long 0x694++0x7B line.long 0x0 "VENC_SWREG421,VENC reorder control register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Reorder control (all format mode)" line.long 0x4 "VENC_SWREG422,VENC AXI read ID register" hexmask.long 0x4 0.--31. 1. "SWREG_FIELD,AXI Read ID (all format mode)" line.long 0x8 "VENC_SWREG423,VENC base address MSB for reference luma compression table register" hexmask.long 0x8 0.--31. 1. "SWREG_FIELD,AXI Read ID (all format mode)" line.long 0xC "VENC_SWREG424,VENC base address MSB for reference chroma compression table register" hexmask.long 0xC 0.--31. 1. "SWREG_FIELD,AXI Read ID (all format mode)" line.long 0x10 "VENC_SWREG425,VENC base address MSB for reconstructed luma compression table register" hexmask.long 0x10 0.--31. 1. "SWREG_FIELD,AXI Read ID (all format mode)" line.long 0x14 "VENC_SWREG426,VENC base address for reconstructed chroma compression table register" hexmask.long 0x14 0.--31. 1. "SWREG_FIELD,Base address for reconstructed chroma compression table (all format mode)" line.long 0x18 "VENC_SWREG427,VENC base address MSB for second reference luma compression table register" hexmask.long 0x18 0.--31. 1. "SWREG_FIELD,Base address MSB for second reference luma compression table (all format mode)" line.long 0x1C "VENC_SWREG428,VENC base address MSB for second reference chroma compression table register" hexmask.long 0x1C 0.--31. 1. "SWREG_FIELD,Base address MSB for second reference chroma compression table (all format mode)" line.long 0x20 "VENC_SWREG429,VENC high 32 bits of base address for output stream data register" hexmask.long 0x20 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for output stream data (all format mode)" line.long 0x24 "VENC_SWREG430,VENC high 32 bits of base address for output control data register" hexmask.long 0x24 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for output control data (all format mode)" line.long 0x28 "VENC_SWREG431,VENC high 32 bits of base address for reference luma register" hexmask.long 0x28 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for reference luma (all format mode)" line.long 0x2C "VENC_SWREG432,VENC high 32 bits of base address for reference chroma register" hexmask.long 0x2C 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for reference chroma (all format mode)" line.long 0x30 "VENC_SWREG433,VENC high 32 bits of base address for reconstructed luma register" hexmask.long 0x30 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for reconstructed luma (all format mode)" line.long 0x34 "VENC_SWREG434,VENC high 32 bits of base address for reconstructed chroma register" hexmask.long 0x34 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for reconstructed chroma (all format mode)" line.long 0x38 "VENC_SWREG435,VENC high 32 bits of base address for input picture luma register" hexmask.long 0x38 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for input picture luma (all format mode)" line.long 0x3C "VENC_SWREG436,VENC high 32 bits of base address for input picture cb register" hexmask.long 0x3C 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for input picture cb (all format mode)" line.long 0x40 "VENC_SWREG437,VENC high 32 bits of base address for input picture cr register" hexmask.long 0x40 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for input picture cr (all format mode)" line.long 0x44 "VENC_SWREG438,VENC high 32 bits of base address for second reference luma register" hexmask.long 0x44 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for second reference luma (all format mode)" line.long 0x48 "VENC_SWREG439,VENC high 32 bits of base address for second reference chroma register" hexmask.long 0x48 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for second reference chroma (all format mode)" line.long 0x4C "VENC_SWREG440,VENC high 32 bits of H264 secondary ref pic base register" hexmask.long 0x4C 0.--31. 1. "SWREG_FIELD,high 32 bits of H264 secondary ref pic base (all format mode)" line.long 0x50 "VENC_SWREG441,VENC high 32 bits of H264 secondary ref pic base register" hexmask.long 0x50 0.--31. 1. "SWREG_FIELD,high 32 bits of H264 secondary ref pic base (all format mode)" line.long 0x54 "VENC_SWREG442,VENC high 32 bits of base address for next pic luminance register" hexmask.long 0x54 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for next pic luminance (all format mode)" line.long 0x58 "VENC_SWREG443,VENC high 32 bits of base address for cabac context tables H264 or probability tables VP8 register" hexmask.long 0x58 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for cabac context tables (H264) or probability tables (VP8) (all format mode)" line.long 0x5C "VENC_SWREG444,VENC high 32 bits of base address for MV output writing register" hexmask.long 0x5C 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for MV output writing (all format mode)" line.long 0x60 "VENC_SWREG445,VENC high 32 bits of base address for VP8 1st DCT partition register" hexmask.long 0x60 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for VP8 1st DCT partition (all format mode)" line.long 0x64 "VENC_SWREG446,VENC high 32 bits of base address for VP8 2nd DCT partition register" hexmask.long 0x64 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for VP8 2nd DCT partition (all format mode)" line.long 0x68 "VENC_SWREG447,VENC high 32 bits of base address for VP8 counters for probability updates register" hexmask.long 0x68 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for VP8 counters for probability updates (all format mode)" line.long 0x6C "VENC_SWREG448,VENC high 32 bits of base address for VP8 segmentation map segment Id 2- bits/macroblock register" hexmask.long 0x6C 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for VP8 segmentation map. segmentId 2-bits/macroblock (all format mode)" line.long 0x70 "VENC_SWREG449,VENC high 32 bits of base address for output of down-scaled encoder image in YUYV 4:2:2 format register" hexmask.long 0x70 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for output of down-scaled encoder image in YUYV 4:2:2 format (all format mode)" line.long 0x74 "VENC_SWREG450,VENC high 32 bits of base address for VP8 3rd DCT partition register" hexmask.long 0x74 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for VP8 3rd DCT partition (all format mode)" line.long 0x78 "VENC_SWREG451,VENC high 32 bits of base address for VP8 4th DCT partition register" hexmask.long 0x78 0.--31. 1. "SWREG_FIELD,high 32 bits of Base address for VP8 4th DCT partition (all format mode)" group.long 0x7C4++0x3 line.long 0x0 "VENC_SWREG497,VENC low-latency control register" hexmask.long 0x0 0.--31. 1. "SWREG_FIELD,Low latency control (all format mode)" tree.end tree.end tree "VREFBUF (Voltage Reference Buffer)" base ad:0x0 tree "VREFBUF" base ad:0x44060000 group.long 0x0++0x7 line.long 0x0 "VREFBUF_CSR,VREFBUF control and status register" bitfld.long 0x0 4.--6. "VRS,Voltage reference scale" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 3. "VRR,Voltage reference buffer ready" "B_0x0,B_0x1" bitfld.long 0x0 1. "HIZ,High impedance mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "ENVR,Voltage reference buffer mode enable" "B_0x0,B_0x1" line.long 0x4 "VREFBUF_CCR,VREFBUF calibration control register" hexmask.long.byte 0x4 0.--5. 1. "TRIM,Trimming code" tree.end tree "VREFBUF_S" base ad:0x54060000 group.long 0x0++0x7 line.long 0x0 "VREFBUF_CSR,VREFBUF control and status register" bitfld.long 0x0 4.--6. "VRS,Voltage reference scale" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 3. "VRR,Voltage reference buffer ready" "B_0x0,B_0x1" bitfld.long 0x0 1. "HIZ,High impedance mode" "B_0x0,B_0x1" bitfld.long 0x0 0. "ENVR,Voltage reference buffer mode enable" "B_0x0,B_0x1" line.long 0x4 "VREFBUF_CCR,VREFBUF calibration control register" hexmask.long.byte 0x4 0.--5. 1. "TRIM,Trimming code" tree.end tree.end endif tree "WWDG (System Window Watchdog)" base ad:0x0 sif (cpuis("*CA35")||cpuis("*CM33F")) tree "WWDG" base ad:0x44050000 group.long 0x0++0xB line.long 0x0 "WWDG_CR,WWDG control register" bitfld.long 0x0 7. "WDGA,Activation bit" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--6. 1. "T,7-bit counter (MSB to LSB)" line.long 0x4 "WWDG_CFR,WWDG configuration register" bitfld.long 0x4 11.--13. "WDGTB,Timer base" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 9. "EWI,Early wake-up interrupt enable" "0,1" hexmask.long.byte 0x4 0.--6. 1. "W,7-bit window value" line.long 0x8 "WWDG_SR,WWDG status register" bitfld.long 0x8 0. "EWIF,Early wake-up interrupt flag" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "WWDG_HWCFGR,WWDG hardware configuration register" hexmask.long.word 0x0 0.--15. 1. "PREDIV,The watchdog clock is prescaled by 4096 (PREDIV[15:0])." line.long 0x4 "WWDG_VERR,WWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,WWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,WWDG minor revision" line.long 0x8 "WWDG_IPIDR,WWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,WWDG peripheral identifier" line.long 0xC "WWDG_SIDR,WWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,The address decoding range is 1 Kbyte" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "WWDG1_S" base ad:0x54050000 group.long 0x0++0xB line.long 0x0 "WWDG_CR,WWDG control register" bitfld.long 0x0 7. "WDGA,Activation bit" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--6. 1. "T,7-bit counter (MSB to LSB)" line.long 0x4 "WWDG_CFR,WWDG configuration register" bitfld.long 0x4 11.--13. "WDGTB,Timer base" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 9. "EWI,Early wake-up interrupt enable" "0,1" hexmask.long.byte 0x4 0.--6. 1. "W,7-bit window value" line.long 0x8 "WWDG_SR,WWDG status register" bitfld.long 0x8 0. "EWIF,Early wake-up interrupt flag" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "WWDG_HWCFGR,WWDG hardware configuration register" hexmask.long.word 0x0 0.--15. 1. "PREDIV,The watchdog clock is prescaled by 4096 (PREDIV[15:0])." line.long 0x4 "WWDG_VERR,WWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,WWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,WWDG minor revision" line.long 0x8 "WWDG_IPIDR,WWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,WWDG peripheral identifier" line.long 0xC "WWDG_SIDR,WWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,The address decoding range is 1 Kbyte" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "WWDG2" base ad:0x460A0000 group.long 0x0++0xB line.long 0x0 "WWDG_CR,WWDG control register" bitfld.long 0x0 7. "WDGA,Activation bit" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--6. 1. "T,7-bit counter (MSB to LSB)" line.long 0x4 "WWDG_CFR,WWDG configuration register" bitfld.long 0x4 11.--13. "WDGTB,Timer base" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 9. "EWI,Early wake-up interrupt enable" "0,1" hexmask.long.byte 0x4 0.--6. 1. "W,7-bit window value" line.long 0x8 "WWDG_SR,WWDG status register" bitfld.long 0x8 0. "EWIF,Early wake-up interrupt flag" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "WWDG_HWCFGR,WWDG hardware configuration register" hexmask.long.word 0x0 0.--15. 1. "PREDIV,The watchdog clock is prescaled by 4096 (PREDIV[15:0])." line.long 0x4 "WWDG_VERR,WWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,WWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,WWDG minor revision" line.long 0x8 "WWDG_IPIDR,WWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,WWDG peripheral identifier" line.long 0xC "WWDG_SIDR,WWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,The address decoding range is 1 Kbyte" tree.end endif sif (cpuis("*CA35")||cpuis("*CM33F")) tree "WWDG2_S" base ad:0x560A0000 group.long 0x0++0xB line.long 0x0 "WWDG_CR,WWDG control register" bitfld.long 0x0 7. "WDGA,Activation bit" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--6. 1. "T,7-bit counter (MSB to LSB)" line.long 0x4 "WWDG_CFR,WWDG configuration register" bitfld.long 0x4 11.--13. "WDGTB,Timer base" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 9. "EWI,Early wake-up interrupt enable" "0,1" hexmask.long.byte 0x4 0.--6. 1. "W,7-bit window value" line.long 0x8 "WWDG_SR,WWDG status register" bitfld.long 0x8 0. "EWIF,Early wake-up interrupt flag" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "WWDG_HWCFGR,WWDG hardware configuration register" hexmask.long.word 0x0 0.--15. 1. "PREDIV,The watchdog clock is prescaled by 4096 (PREDIV[15:0])." line.long 0x4 "WWDG_VERR,WWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,WWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,WWDG minor revision" line.long 0x8 "WWDG_IPIDR,WWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,WWDG peripheral identifier" line.long 0xC "WWDG_SIDR,WWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,The address decoding range is 1 Kbyte" tree.end endif sif (cpuis("*CM0+")) tree "WWDG2" base ad:0x460A0000 group.long 0x0++0xB line.long 0x0 "WWDG2_CR,WWDG control register" bitfld.long 0x0 7. "WDGA,Activation bit" "B_0x0,B_0x1" hexmask.long.byte 0x0 0.--6. 1. "T,7-bit counter (MSB to LSB)" line.long 0x4 "WWDG2_CFR,WWDG configuration register" bitfld.long 0x4 11.--13. "WDGTB,Timer base" "B_0x0,B_0x1,B_0x2,B_0x3,B_0x4,B_0x5,B_0x6,B_0x7" bitfld.long 0x4 9. "EWI,Early wake-up interrupt enable" "0,1" hexmask.long.byte 0x4 0.--6. 1. "W,7-bit window value" line.long 0x8 "WWDG2_SR,WWDG status register" bitfld.long 0x8 0. "EWIF,Early wake-up interrupt flag" "0,1" rgroup.long 0x3F0++0xF line.long 0x0 "WWDG2_HWCFGR,WWDG hardware configuration register" hexmask.long.word 0x0 0.--15. 1. "PREDIV,The watchdog clock is prescaled by 4096 (PREDIV[15:0])." line.long 0x4 "WWDG2_VERR,WWDG version register" hexmask.long.byte 0x4 4.--7. 1. "MAJREV,WWDG major revision" hexmask.long.byte 0x4 0.--3. 1. "MINREV,WWDG minor revision" line.long 0x8 "WWDG2_IPIDR,WWDG identification register" hexmask.long 0x8 0.--31. 1. "ID,WWDG peripheral identifier" line.long 0xC "WWDG2_SIDR,WWDG size identification register" hexmask.long 0xC 0.--31. 1. "SID,The address decoding range is 1 Kbyte" tree.end endif tree.end newline AUTOINDENT.OFF